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Aligner Updated

This commit is contained in:
waleed-lm 2020-10-13 14:43:50 +05:00
parent 91ed771e91
commit 74c995180c
4 changed files with 472 additions and 473 deletions
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684
el2_ifu_aln_ctl.fir
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@ -2794,363 +2794,365 @@ circuit el2_ifu_aln_ctl :
node _T_515 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 316:75] node _T_515 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 316:75]
node _T_516 = and(_T_514, _T_515) @[el2_ifu_aln_ctl.scala 316:68] node _T_516 = and(_T_514, _T_515) @[el2_ifu_aln_ctl.scala 316:68]
node _T_517 = bits(_T_516, 0, 0) @[el2_ifu_aln_ctl.scala 316:80] node _T_517 = bits(_T_516, 0, 0) @[el2_ifu_aln_ctl.scala 316:80]
node _T_518 = cat(q1final, q0final) @[Cat.scala 29:58] node _T_518 = bits(q1final, 15, 0) @[el2_ifu_aln_ctl.scala 316:101]
node _T_519 = mux(_T_512, q0final, UInt<1>("h00")) @[Mux.scala 27:72] node _T_519 = bits(q0final, 15, 0) @[el2_ifu_aln_ctl.scala 316:115]
node _T_520 = mux(_T_517, _T_518, UInt<1>("h00")) @[Mux.scala 27:72] node _T_520 = cat(_T_518, _T_519) @[Cat.scala 29:58]
node _T_521 = or(_T_519, _T_520) @[Mux.scala 27:72] node _T_521 = mux(_T_512, q0final, UInt<1>("h00")) @[Mux.scala 27:72]
wire aligndata : UInt<48> @[Mux.scala 27:72] node _T_522 = mux(_T_517, _T_520, UInt<1>("h00")) @[Mux.scala 27:72]
aligndata <= _T_521 @[Mux.scala 27:72] node _T_523 = or(_T_521, _T_522) @[Mux.scala 27:72]
node _T_522 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:30] wire aligndata : UInt<32> @[Mux.scala 27:72]
node _T_523 = bits(_T_522, 0, 0) @[el2_ifu_aln_ctl.scala 318:34] aligndata <= _T_523 @[Mux.scala 27:72]
node _T_524 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:54] node _T_524 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:30]
node _T_525 = eq(_T_524, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 318:48] node _T_525 = bits(_T_524, 0, 0) @[el2_ifu_aln_ctl.scala 318:34]
node _T_526 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 318:65] node _T_526 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:54]
node _T_527 = and(_T_525, _T_526) @[el2_ifu_aln_ctl.scala 318:58] node _T_527 = eq(_T_526, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 318:48]
node _T_528 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 318:82] node _T_528 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 318:65]
node _T_529 = cat(_T_528, UInt<1>("h01")) @[Cat.scala 29:58] node _T_529 = and(_T_527, _T_528) @[el2_ifu_aln_ctl.scala 318:58]
node _T_530 = mux(_T_523, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] node _T_530 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 318:82]
node _T_531 = mux(_T_527, _T_529, UInt<1>("h00")) @[Mux.scala 27:72] node _T_531 = cat(_T_530, UInt<1>("h01")) @[Cat.scala 29:58]
node _T_532 = or(_T_530, _T_531) @[Mux.scala 27:72] node _T_532 = mux(_T_525, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
wire _T_533 : UInt<2> @[Mux.scala 27:72] node _T_533 = mux(_T_529, _T_531, UInt<1>("h00")) @[Mux.scala 27:72]
_T_533 <= _T_532 @[Mux.scala 27:72] node _T_534 = or(_T_532, _T_533) @[Mux.scala 27:72]
alignval <= _T_533 @[el2_ifu_aln_ctl.scala 318:12] wire _T_535 : UInt<2> @[Mux.scala 27:72]
node _T_534 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 320:34] _T_535 <= _T_534 @[Mux.scala 27:72]
node _T_535 = bits(_T_534, 0, 0) @[el2_ifu_aln_ctl.scala 320:38] alignval <= _T_535 @[el2_ifu_aln_ctl.scala 318:12]
node _T_536 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 320:63] node _T_536 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 320:34]
node _T_537 = not(_T_536) @[el2_ifu_aln_ctl.scala 320:57] node _T_537 = bits(_T_536, 0, 0) @[el2_ifu_aln_ctl.scala 320:38]
node _T_538 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 320:74] node _T_538 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 320:63]
node _T_539 = and(_T_537, _T_538) @[el2_ifu_aln_ctl.scala 320:67] node _T_539 = not(_T_538) @[el2_ifu_aln_ctl.scala 320:57]
node _T_540 = bits(_T_539, 0, 0) @[el2_ifu_aln_ctl.scala 320:79] node _T_540 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 320:74]
node _T_541 = cat(f1icaf, f0icaf) @[Cat.scala 29:58] node _T_541 = and(_T_539, _T_540) @[el2_ifu_aln_ctl.scala 320:67]
node _T_542 = mux(_T_535, f0icaf, UInt<1>("h00")) @[Mux.scala 27:72] node _T_542 = bits(_T_541, 0, 0) @[el2_ifu_aln_ctl.scala 320:79]
node _T_543 = mux(_T_540, _T_541, UInt<1>("h00")) @[Mux.scala 27:72] node _T_543 = cat(f1icaf, f0icaf) @[Cat.scala 29:58]
node _T_544 = or(_T_542, _T_543) @[Mux.scala 27:72] node _T_544 = mux(_T_537, f0icaf, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_545 = mux(_T_542, _T_543, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_546 = or(_T_544, _T_545) @[Mux.scala 27:72]
wire alignicaf : UInt<2> @[Mux.scala 27:72] wire alignicaf : UInt<2> @[Mux.scala 27:72]
alignicaf <= _T_544 @[Mux.scala 27:72] alignicaf <= _T_546 @[Mux.scala 27:72]
node _T_545 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 322:35] node _T_547 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 322:35]
node _T_546 = bits(_T_545, 0, 0) @[el2_ifu_aln_ctl.scala 322:39] node _T_548 = bits(_T_547, 0, 0) @[el2_ifu_aln_ctl.scala 322:39]
node _T_547 = bits(f0dbecc, 0, 0) @[Bitwise.scala 72:15] node _T_549 = bits(f0dbecc, 0, 0) @[Bitwise.scala 72:15]
node _T_548 = mux(_T_547, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12] node _T_550 = mux(_T_549, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
node _T_549 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 322:73] node _T_551 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 322:73]
node _T_550 = eq(_T_549, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 322:67] node _T_552 = eq(_T_551, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 322:67]
node _T_551 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 322:84] node _T_553 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 322:84]
node _T_552 = and(_T_550, _T_551) @[el2_ifu_aln_ctl.scala 322:77] node _T_554 = and(_T_552, _T_553) @[el2_ifu_aln_ctl.scala 322:77]
node _T_553 = bits(_T_552, 0, 0) @[el2_ifu_aln_ctl.scala 322:89] node _T_555 = bits(_T_554, 0, 0) @[el2_ifu_aln_ctl.scala 322:89]
node _T_554 = cat(f1dbecc, f0dbecc) @[Cat.scala 29:58] node _T_556 = cat(f1dbecc, f0dbecc) @[Cat.scala 29:58]
node _T_555 = mux(_T_546, _T_548, UInt<1>("h00")) @[Mux.scala 27:72] node _T_557 = mux(_T_548, _T_550, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_556 = mux(_T_553, _T_554, UInt<1>("h00")) @[Mux.scala 27:72] node _T_558 = mux(_T_555, _T_556, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_557 = or(_T_555, _T_556) @[Mux.scala 27:72] node _T_559 = or(_T_557, _T_558) @[Mux.scala 27:72]
wire aligndbecc : UInt<2> @[Mux.scala 27:72] wire aligndbecc : UInt<2> @[Mux.scala 27:72]
aligndbecc <= _T_557 @[Mux.scala 27:72] aligndbecc <= _T_559 @[Mux.scala 27:72]
node _T_558 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:35] node _T_560 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:35]
node _T_559 = bits(_T_558, 0, 0) @[el2_ifu_aln_ctl.scala 324:45] node _T_561 = bits(_T_560, 0, 0) @[el2_ifu_aln_ctl.scala 324:45]
node _T_560 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:65] node _T_562 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:65]
node _T_561 = eq(_T_560, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 324:59] node _T_563 = eq(_T_562, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 324:59]
node _T_562 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 324:76] node _T_564 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 324:76]
node _T_563 = and(_T_561, _T_562) @[el2_ifu_aln_ctl.scala 324:69] node _T_565 = and(_T_563, _T_564) @[el2_ifu_aln_ctl.scala 324:69]
node _T_564 = bits(_T_563, 0, 0) @[el2_ifu_aln_ctl.scala 324:81] node _T_566 = bits(_T_565, 0, 0) @[el2_ifu_aln_ctl.scala 324:81]
node _T_565 = bits(f1brend, 0, 0) @[el2_ifu_aln_ctl.scala 324:100] node _T_567 = bits(f1brend, 0, 0) @[el2_ifu_aln_ctl.scala 324:100]
node _T_566 = bits(f0brend, 0, 0) @[el2_ifu_aln_ctl.scala 324:111] node _T_568 = bits(f0brend, 0, 0) @[el2_ifu_aln_ctl.scala 324:111]
node _T_567 = cat(_T_565, _T_566) @[Cat.scala 29:58] node _T_569 = cat(_T_567, _T_568) @[Cat.scala 29:58]
node _T_568 = mux(_T_559, f0brend, UInt<1>("h00")) @[Mux.scala 27:72] node _T_570 = mux(_T_561, f0brend, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_569 = mux(_T_564, _T_567, UInt<1>("h00")) @[Mux.scala 27:72] node _T_571 = mux(_T_566, _T_569, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_570 = or(_T_568, _T_569) @[Mux.scala 27:72] node _T_572 = or(_T_570, _T_571) @[Mux.scala 27:72]
wire alignbrend : UInt<2> @[Mux.scala 27:72] wire alignbrend : UInt<2> @[Mux.scala 27:72]
alignbrend <= _T_570 @[Mux.scala 27:72] alignbrend <= _T_572 @[Mux.scala 27:72]
node _T_571 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 326:33] node _T_573 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 326:33]
node _T_572 = bits(_T_571, 0, 0) @[el2_ifu_aln_ctl.scala 326:43] node _T_574 = bits(_T_573, 0, 0) @[el2_ifu_aln_ctl.scala 326:43]
node _T_573 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 326:61] node _T_575 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 326:61]
node _T_574 = eq(_T_573, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 326:55] node _T_576 = eq(_T_575, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 326:55]
node _T_575 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 326:72] node _T_577 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 326:72]
node _T_576 = and(_T_574, _T_575) @[el2_ifu_aln_ctl.scala 326:65] node _T_578 = and(_T_576, _T_577) @[el2_ifu_aln_ctl.scala 326:65]
node _T_577 = bits(_T_576, 0, 0) @[el2_ifu_aln_ctl.scala 326:77] node _T_579 = bits(_T_578, 0, 0) @[el2_ifu_aln_ctl.scala 326:77]
node _T_578 = bits(f1pc4, 0, 0) @[el2_ifu_aln_ctl.scala 326:94] node _T_580 = bits(f1pc4, 0, 0) @[el2_ifu_aln_ctl.scala 326:94]
node _T_579 = bits(f0pc4, 0, 0) @[el2_ifu_aln_ctl.scala 326:103] node _T_581 = bits(f0pc4, 0, 0) @[el2_ifu_aln_ctl.scala 326:103]
node _T_580 = cat(_T_578, _T_579) @[Cat.scala 29:58] node _T_582 = cat(_T_580, _T_581) @[Cat.scala 29:58]
node _T_581 = mux(_T_572, f0pc4, UInt<1>("h00")) @[Mux.scala 27:72] node _T_583 = mux(_T_574, f0pc4, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_582 = mux(_T_577, _T_580, UInt<1>("h00")) @[Mux.scala 27:72] node _T_584 = mux(_T_579, _T_582, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_583 = or(_T_581, _T_582) @[Mux.scala 27:72] node _T_585 = or(_T_583, _T_584) @[Mux.scala 27:72]
wire alignpc4 : UInt<2> @[Mux.scala 27:72] wire alignpc4 : UInt<2> @[Mux.scala 27:72]
alignpc4 <= _T_583 @[Mux.scala 27:72] alignpc4 <= _T_585 @[Mux.scala 27:72]
node _T_584 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 328:33] node _T_586 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 328:33]
node _T_585 = bits(_T_584, 0, 0) @[el2_ifu_aln_ctl.scala 328:43] node _T_587 = bits(_T_586, 0, 0) @[el2_ifu_aln_ctl.scala 328:43]
node _T_586 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 328:61] node _T_588 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 328:61]
node _T_587 = eq(_T_586, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 328:55] node _T_589 = eq(_T_588, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 328:55]
node _T_588 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 328:72] node _T_590 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 328:72]
node _T_589 = and(_T_587, _T_588) @[el2_ifu_aln_ctl.scala 328:65] node _T_591 = and(_T_589, _T_590) @[el2_ifu_aln_ctl.scala 328:65]
node _T_590 = bits(_T_589, 0, 0) @[el2_ifu_aln_ctl.scala 328:77] node _T_592 = bits(_T_591, 0, 0) @[el2_ifu_aln_ctl.scala 328:77]
node _T_591 = bits(f1ret, 0, 0) @[el2_ifu_aln_ctl.scala 328:94] node _T_593 = bits(f1ret, 0, 0) @[el2_ifu_aln_ctl.scala 328:94]
node _T_592 = bits(f0ret, 0, 0) @[el2_ifu_aln_ctl.scala 328:103] node _T_594 = bits(f0ret, 0, 0) @[el2_ifu_aln_ctl.scala 328:103]
node _T_593 = cat(_T_591, _T_592) @[Cat.scala 29:58] node _T_595 = cat(_T_593, _T_594) @[Cat.scala 29:58]
node _T_594 = mux(_T_585, f0ret, UInt<1>("h00")) @[Mux.scala 27:72] node _T_596 = mux(_T_587, f0ret, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_595 = mux(_T_590, _T_593, UInt<1>("h00")) @[Mux.scala 27:72] node _T_597 = mux(_T_592, _T_595, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_596 = or(_T_594, _T_595) @[Mux.scala 27:72] node _T_598 = or(_T_596, _T_597) @[Mux.scala 27:72]
wire alignret : UInt<2> @[Mux.scala 27:72] wire alignret : UInt<2> @[Mux.scala 27:72]
alignret <= _T_596 @[Mux.scala 27:72] alignret <= _T_598 @[Mux.scala 27:72]
node _T_597 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 330:33] node _T_599 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 330:33]
node _T_598 = bits(_T_597, 0, 0) @[el2_ifu_aln_ctl.scala 330:43] node _T_600 = bits(_T_599, 0, 0) @[el2_ifu_aln_ctl.scala 330:43]
node _T_599 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 330:61] node _T_601 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 330:61]
node _T_600 = eq(_T_599, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 330:55] node _T_602 = eq(_T_601, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 330:55]
node _T_601 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 330:72] node _T_603 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 330:72]
node _T_602 = and(_T_600, _T_601) @[el2_ifu_aln_ctl.scala 330:65] node _T_604 = and(_T_602, _T_603) @[el2_ifu_aln_ctl.scala 330:65]
node _T_603 = bits(_T_602, 0, 0) @[el2_ifu_aln_ctl.scala 330:77] node _T_605 = bits(_T_604, 0, 0) @[el2_ifu_aln_ctl.scala 330:77]
node _T_604 = bits(f1way, 0, 0) @[el2_ifu_aln_ctl.scala 330:94] node _T_606 = bits(f1way, 0, 0) @[el2_ifu_aln_ctl.scala 330:94]
node _T_605 = bits(f0way, 0, 0) @[el2_ifu_aln_ctl.scala 330:103] node _T_607 = bits(f0way, 0, 0) @[el2_ifu_aln_ctl.scala 330:103]
node _T_606 = cat(_T_604, _T_605) @[Cat.scala 29:58] node _T_608 = cat(_T_606, _T_607) @[Cat.scala 29:58]
node _T_607 = mux(_T_598, f0way, UInt<1>("h00")) @[Mux.scala 27:72] node _T_609 = mux(_T_600, f0way, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_608 = mux(_T_603, _T_606, UInt<1>("h00")) @[Mux.scala 27:72] node _T_610 = mux(_T_605, _T_608, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_609 = or(_T_607, _T_608) @[Mux.scala 27:72] node _T_611 = or(_T_609, _T_610) @[Mux.scala 27:72]
wire alignway : UInt<2> @[Mux.scala 27:72] wire alignway : UInt<2> @[Mux.scala 27:72]
alignway <= _T_609 @[Mux.scala 27:72] alignway <= _T_611 @[Mux.scala 27:72]
node _T_610 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 332:35] node _T_612 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 332:35]
node _T_611 = bits(_T_610, 0, 0) @[el2_ifu_aln_ctl.scala 332:45] node _T_613 = bits(_T_612, 0, 0) @[el2_ifu_aln_ctl.scala 332:45]
node _T_612 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 332:65] node _T_614 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 332:65]
node _T_613 = eq(_T_612, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 332:59] node _T_615 = eq(_T_614, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 332:59]
node _T_614 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 332:76] node _T_616 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 332:76]
node _T_615 = and(_T_613, _T_614) @[el2_ifu_aln_ctl.scala 332:69] node _T_617 = and(_T_615, _T_616) @[el2_ifu_aln_ctl.scala 332:69]
node _T_616 = bits(_T_615, 0, 0) @[el2_ifu_aln_ctl.scala 332:81] node _T_618 = bits(_T_617, 0, 0) @[el2_ifu_aln_ctl.scala 332:81]
node _T_617 = bits(f1hist1, 0, 0) @[el2_ifu_aln_ctl.scala 332:100] node _T_619 = bits(f1hist1, 0, 0) @[el2_ifu_aln_ctl.scala 332:100]
node _T_618 = bits(f0hist1, 0, 0) @[el2_ifu_aln_ctl.scala 332:111] node _T_620 = bits(f0hist1, 0, 0) @[el2_ifu_aln_ctl.scala 332:111]
node _T_619 = cat(_T_617, _T_618) @[Cat.scala 29:58] node _T_621 = cat(_T_619, _T_620) @[Cat.scala 29:58]
node _T_620 = mux(_T_611, f0hist1, UInt<1>("h00")) @[Mux.scala 27:72] node _T_622 = mux(_T_613, f0hist1, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_621 = mux(_T_616, _T_619, UInt<1>("h00")) @[Mux.scala 27:72] node _T_623 = mux(_T_618, _T_621, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_622 = or(_T_620, _T_621) @[Mux.scala 27:72] node _T_624 = or(_T_622, _T_623) @[Mux.scala 27:72]
wire alignhist1 : UInt<2> @[Mux.scala 27:72] wire alignhist1 : UInt<2> @[Mux.scala 27:72]
alignhist1 <= _T_622 @[Mux.scala 27:72] alignhist1 <= _T_624 @[Mux.scala 27:72]
node _T_623 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 334:35] node _T_625 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 334:35]
node _T_624 = bits(_T_623, 0, 0) @[el2_ifu_aln_ctl.scala 334:45] node _T_626 = bits(_T_625, 0, 0) @[el2_ifu_aln_ctl.scala 334:45]
node _T_625 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 334:65] node _T_627 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 334:65]
node _T_626 = eq(_T_625, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 334:59] node _T_628 = eq(_T_627, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 334:59]
node _T_627 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 334:76] node _T_629 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 334:76]
node _T_628 = and(_T_626, _T_627) @[el2_ifu_aln_ctl.scala 334:69] node _T_630 = and(_T_628, _T_629) @[el2_ifu_aln_ctl.scala 334:69]
node _T_629 = bits(_T_628, 0, 0) @[el2_ifu_aln_ctl.scala 334:81] node _T_631 = bits(_T_630, 0, 0) @[el2_ifu_aln_ctl.scala 334:81]
node _T_630 = bits(f1hist0, 0, 0) @[el2_ifu_aln_ctl.scala 334:100] node _T_632 = bits(f1hist0, 0, 0) @[el2_ifu_aln_ctl.scala 334:100]
node _T_631 = bits(f0hist0, 0, 0) @[el2_ifu_aln_ctl.scala 334:111] node _T_633 = bits(f0hist0, 0, 0) @[el2_ifu_aln_ctl.scala 334:111]
node _T_632 = cat(_T_630, _T_631) @[Cat.scala 29:58] node _T_634 = cat(_T_632, _T_633) @[Cat.scala 29:58]
node _T_633 = mux(_T_624, f0hist0, UInt<1>("h00")) @[Mux.scala 27:72] node _T_635 = mux(_T_626, f0hist0, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_634 = mux(_T_629, _T_632, UInt<1>("h00")) @[Mux.scala 27:72] node _T_636 = mux(_T_631, _T_634, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_635 = or(_T_633, _T_634) @[Mux.scala 27:72] node _T_637 = or(_T_635, _T_636) @[Mux.scala 27:72]
wire alignhist0 : UInt<2> @[Mux.scala 27:72] wire alignhist0 : UInt<2> @[Mux.scala 27:72]
alignhist0 <= _T_635 @[Mux.scala 27:72] alignhist0 <= _T_637 @[Mux.scala 27:72]
node _T_636 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 336:27] node _T_638 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 336:27]
node _T_637 = eq(_T_636, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 336:21] node _T_639 = eq(_T_638, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 336:21]
node _T_638 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 336:38] node _T_640 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 336:38]
node alignfromf1 = and(_T_637, _T_638) @[el2_ifu_aln_ctl.scala 336:31] node alignfromf1 = and(_T_639, _T_640) @[el2_ifu_aln_ctl.scala 336:31]
node _T_639 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 338:33] node _T_641 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 338:33]
node _T_640 = bits(_T_639, 0, 0) @[el2_ifu_aln_ctl.scala 338:43] node _T_642 = bits(_T_641, 0, 0) @[el2_ifu_aln_ctl.scala 338:43]
node _T_641 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 338:67] node _T_643 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 338:67]
node _T_642 = eq(_T_641, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 338:61] node _T_644 = eq(_T_643, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 338:61]
node _T_643 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 338:78] node _T_645 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 338:78]
node _T_644 = and(_T_642, _T_643) @[el2_ifu_aln_ctl.scala 338:71] node _T_646 = and(_T_644, _T_645) @[el2_ifu_aln_ctl.scala 338:71]
node _T_645 = bits(_T_644, 0, 0) @[el2_ifu_aln_ctl.scala 338:83] node _T_647 = bits(_T_646, 0, 0) @[el2_ifu_aln_ctl.scala 338:83]
node _T_646 = mux(_T_640, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72] node _T_648 = mux(_T_642, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_647 = mux(_T_645, f1pc, UInt<1>("h00")) @[Mux.scala 27:72] node _T_649 = mux(_T_647, f1pc, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_648 = or(_T_646, _T_647) @[Mux.scala 27:72] node _T_650 = or(_T_648, _T_649) @[Mux.scala 27:72]
wire secondpc : UInt @[Mux.scala 27:72] wire secondpc : UInt @[Mux.scala 27:72]
secondpc <= _T_648 @[Mux.scala 27:72] secondpc <= _T_650 @[Mux.scala 27:72]
io.ifu_i0_pc <= f0pc @[el2_ifu_aln_ctl.scala 340:16] io.ifu_i0_pc <= f0pc @[el2_ifu_aln_ctl.scala 340:16]
io.ifu_i0_pc4 <= first4B @[el2_ifu_aln_ctl.scala 344:17] io.ifu_i0_pc4 <= first4B @[el2_ifu_aln_ctl.scala 344:17]
node _T_649 = bits(aligndata, 15, 0) @[el2_ifu_aln_ctl.scala 346:31] node _T_651 = bits(aligndata, 15, 0) @[el2_ifu_aln_ctl.scala 346:31]
io.ifu_i0_cinst <= _T_649 @[el2_ifu_aln_ctl.scala 346:19] io.ifu_i0_cinst <= _T_651 @[el2_ifu_aln_ctl.scala 346:19]
node _T_650 = bits(aligndata, 1, 0) @[el2_ifu_aln_ctl.scala 348:23] node _T_652 = bits(aligndata, 1, 0) @[el2_ifu_aln_ctl.scala 348:23]
node _T_651 = eq(_T_650, UInt<2>("h03")) @[el2_ifu_aln_ctl.scala 348:29] node _T_653 = eq(_T_652, UInt<2>("h03")) @[el2_ifu_aln_ctl.scala 348:29]
first4B <= _T_651 @[el2_ifu_aln_ctl.scala 348:11] first4B <= _T_653 @[el2_ifu_aln_ctl.scala 348:11]
node first2B = not(first4B) @[el2_ifu_aln_ctl.scala 350:17] node first2B = not(first4B) @[el2_ifu_aln_ctl.scala 350:17]
node _T_652 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 352:40] node _T_654 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 352:40]
node _T_653 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 352:58] node _T_655 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 352:58]
node _T_654 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 352:71] node _T_656 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 352:71]
node _T_655 = bits(alignval, 0, 0) @[el2_ifu_aln_ctl.scala 352:89] node _T_657 = bits(alignval, 0, 0) @[el2_ifu_aln_ctl.scala 352:89]
node _T_656 = mux(_T_652, _T_653, UInt<1>("h00")) @[Mux.scala 27:72] node _T_658 = mux(_T_654, _T_655, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_657 = mux(_T_654, _T_655, UInt<1>("h00")) @[Mux.scala 27:72] node _T_659 = mux(_T_656, _T_657, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_658 = or(_T_656, _T_657) @[Mux.scala 27:72] node _T_660 = or(_T_658, _T_659) @[Mux.scala 27:72]
wire _T_659 : UInt<1> @[Mux.scala 27:72] wire _T_661 : UInt<1> @[Mux.scala 27:72]
_T_659 <= _T_658 @[Mux.scala 27:72] _T_661 <= _T_660 @[Mux.scala 27:72]
io.ifu_i0_valid <= _T_659 @[el2_ifu_aln_ctl.scala 352:19] io.ifu_i0_valid <= _T_661 @[el2_ifu_aln_ctl.scala 352:19]
node _T_660 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 354:39] node _T_662 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 354:39]
node _T_661 = orr(alignicaf) @[el2_ifu_aln_ctl.scala 354:59] node _T_663 = orr(alignicaf) @[el2_ifu_aln_ctl.scala 354:59]
node _T_662 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 354:72] node _T_664 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 354:72]
node _T_663 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 354:91] node _T_665 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 354:91]
node _T_664 = mux(_T_660, _T_661, UInt<1>("h00")) @[Mux.scala 27:72] node _T_666 = mux(_T_662, _T_663, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_665 = mux(_T_662, _T_663, UInt<1>("h00")) @[Mux.scala 27:72] node _T_667 = mux(_T_664, _T_665, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_666 = or(_T_664, _T_665) @[Mux.scala 27:72] node _T_668 = or(_T_666, _T_667) @[Mux.scala 27:72]
wire _T_667 : UInt<1> @[Mux.scala 27:72] wire _T_669 : UInt<1> @[Mux.scala 27:72]
_T_667 <= _T_666 @[Mux.scala 27:72] _T_669 <= _T_668 @[Mux.scala 27:72]
io.ifu_i0_icaf <= _T_667 @[el2_ifu_aln_ctl.scala 354:18] io.ifu_i0_icaf <= _T_669 @[el2_ifu_aln_ctl.scala 354:18]
node _T_668 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 356:47] node _T_670 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 356:47]
node _T_669 = eq(_T_668, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:41] node _T_671 = eq(_T_670, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:41]
node _T_670 = and(first4B, _T_669) @[el2_ifu_aln_ctl.scala 356:39] node _T_672 = and(first4B, _T_671) @[el2_ifu_aln_ctl.scala 356:39]
node _T_671 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 356:58] node _T_673 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 356:58]
node _T_672 = and(_T_670, _T_671) @[el2_ifu_aln_ctl.scala 356:51] node _T_674 = and(_T_672, _T_673) @[el2_ifu_aln_ctl.scala 356:51]
node _T_673 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 356:74] node _T_675 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 356:74]
node _T_674 = eq(_T_673, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:64] node _T_676 = eq(_T_675, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:64]
node _T_675 = and(_T_672, _T_674) @[el2_ifu_aln_ctl.scala 356:62] node _T_677 = and(_T_674, _T_676) @[el2_ifu_aln_ctl.scala 356:62]
node _T_676 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 356:91] node _T_678 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 356:91]
node _T_677 = eq(_T_676, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:80] node _T_679 = eq(_T_678, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 356:80]
node _T_678 = and(_T_675, _T_677) @[el2_ifu_aln_ctl.scala 356:78] node _T_680 = and(_T_677, _T_679) @[el2_ifu_aln_ctl.scala 356:78]
node _T_679 = bits(_T_678, 0, 0) @[el2_ifu_aln_ctl.scala 356:96] node _T_681 = bits(_T_680, 0, 0) @[el2_ifu_aln_ctl.scala 356:96]
node _T_680 = mux(_T_679, f1ictype, f0ictype) @[el2_ifu_aln_ctl.scala 356:29] node _T_682 = mux(_T_681, f1ictype, f0ictype) @[el2_ifu_aln_ctl.scala 356:29]
io.ifu_i0_icaf_type <= _T_680 @[el2_ifu_aln_ctl.scala 356:23] io.ifu_i0_icaf_type <= _T_682 @[el2_ifu_aln_ctl.scala 356:23]
node _T_681 = bits(alignicaf, 1, 1) @[el2_ifu_aln_ctl.scala 358:27] node _T_683 = bits(alignicaf, 1, 1) @[el2_ifu_aln_ctl.scala 358:27]
node _T_682 = bits(aligndbecc, 1, 1) @[el2_ifu_aln_ctl.scala 358:43] node _T_684 = bits(aligndbecc, 1, 1) @[el2_ifu_aln_ctl.scala 358:43]
node icaf_eff = or(_T_681, _T_682) @[el2_ifu_aln_ctl.scala 358:31] node icaf_eff = or(_T_683, _T_684) @[el2_ifu_aln_ctl.scala 358:31]
node _T_683 = and(first4B, icaf_eff) @[el2_ifu_aln_ctl.scala 360:32] node _T_685 = and(first4B, icaf_eff) @[el2_ifu_aln_ctl.scala 360:32]
node _T_684 = and(_T_683, alignfromf1) @[el2_ifu_aln_ctl.scala 360:43] node _T_686 = and(_T_685, alignfromf1) @[el2_ifu_aln_ctl.scala 360:43]
io.ifu_i0_icaf_f1 <= _T_684 @[el2_ifu_aln_ctl.scala 360:21] io.ifu_i0_icaf_f1 <= _T_686 @[el2_ifu_aln_ctl.scala 360:21]
node _T_685 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 362:40] node _T_687 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 362:40]
node _T_686 = orr(aligndbecc) @[el2_ifu_aln_ctl.scala 362:59] node _T_688 = orr(aligndbecc) @[el2_ifu_aln_ctl.scala 362:59]
node _T_687 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 362:72] node _T_689 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 362:72]
node _T_688 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 362:90] node _T_690 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 362:90]
node _T_689 = mux(_T_685, _T_686, UInt<1>("h00")) @[Mux.scala 27:72] node _T_691 = mux(_T_687, _T_688, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_690 = mux(_T_687, _T_688, UInt<1>("h00")) @[Mux.scala 27:72] node _T_692 = mux(_T_689, _T_690, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_691 = or(_T_689, _T_690) @[Mux.scala 27:72] node _T_693 = or(_T_691, _T_692) @[Mux.scala 27:72]
wire _T_692 : UInt<1> @[Mux.scala 27:72] wire _T_694 : UInt<1> @[Mux.scala 27:72]
_T_692 <= _T_691 @[Mux.scala 27:72] _T_694 <= _T_693 @[Mux.scala 27:72]
io.ifu_i0_dbecc <= _T_692 @[el2_ifu_aln_ctl.scala 362:19] io.ifu_i0_dbecc <= _T_694 @[el2_ifu_aln_ctl.scala 362:19]
inst decompressed of el2_ifu_compress_ctl @[el2_ifu_aln_ctl.scala 366:28] inst decompressed of el2_ifu_compress_ctl @[el2_ifu_aln_ctl.scala 366:28]
decompressed.clock <= clock decompressed.clock <= clock
decompressed.reset <= reset decompressed.reset <= reset
node _T_693 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 368:40] node _T_695 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 368:40]
node _T_694 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 368:66] node _T_696 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 368:66]
node _T_695 = mux(_T_693, aligndata, UInt<1>("h00")) @[Mux.scala 27:72] node _T_697 = mux(_T_695, aligndata, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_696 = mux(_T_694, decompressed.io.dout, UInt<1>("h00")) @[Mux.scala 27:72] node _T_698 = mux(_T_696, decompressed.io.dout, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_697 = or(_T_695, _T_696) @[Mux.scala 27:72] node _T_699 = or(_T_697, _T_698) @[Mux.scala 27:72]
wire _T_698 : UInt<48> @[Mux.scala 27:72] wire _T_700 : UInt<32> @[Mux.scala 27:72]
_T_698 <= _T_697 @[Mux.scala 27:72] _T_700 <= _T_699 @[Mux.scala 27:72]
io.ifu_i0_instr <= _T_698 @[el2_ifu_aln_ctl.scala 368:19] io.ifu_i0_instr <= _T_700 @[el2_ifu_aln_ctl.scala 368:19]
node _T_699 = bits(f0pc, 8, 1) @[el2_lib.scala 191:12] node _T_701 = bits(f0pc, 8, 1) @[el2_lib.scala 191:12]
node _T_700 = bits(f0pc, 16, 9) @[el2_lib.scala 191:50] node _T_702 = bits(f0pc, 16, 9) @[el2_lib.scala 191:50]
node _T_701 = xor(_T_699, _T_700) @[el2_lib.scala 191:46] node _T_703 = xor(_T_701, _T_702) @[el2_lib.scala 191:46]
node _T_702 = bits(f0pc, 24, 17) @[el2_lib.scala 191:88] node _T_704 = bits(f0pc, 24, 17) @[el2_lib.scala 191:88]
node firstpc_hash = xor(_T_701, _T_702) @[el2_lib.scala 191:84] node firstpc_hash = xor(_T_703, _T_704) @[el2_lib.scala 191:84]
node _T_703 = bits(secondpc, 8, 1) @[el2_lib.scala 191:12] node _T_705 = bits(secondpc, 8, 1) @[el2_lib.scala 191:12]
node _T_704 = bits(secondpc, 16, 9) @[el2_lib.scala 191:50] node _T_706 = bits(secondpc, 16, 9) @[el2_lib.scala 191:50]
node _T_705 = xor(_T_703, _T_704) @[el2_lib.scala 191:46] node _T_707 = xor(_T_705, _T_706) @[el2_lib.scala 191:46]
node _T_706 = bits(secondpc, 24, 17) @[el2_lib.scala 191:88] node _T_708 = bits(secondpc, 24, 17) @[el2_lib.scala 191:88]
node secondpc_hash = xor(_T_705, _T_706) @[el2_lib.scala 191:84] node secondpc_hash = xor(_T_707, _T_708) @[el2_lib.scala 191:84]
node _T_707 = bits(f0pc, 13, 9) @[el2_lib.scala 182:32] node _T_709 = bits(f0pc, 13, 9) @[el2_lib.scala 182:32]
node _T_708 = bits(f0pc, 18, 14) @[el2_lib.scala 182:32] node _T_710 = bits(f0pc, 18, 14) @[el2_lib.scala 182:32]
node _T_709 = bits(f0pc, 23, 19) @[el2_lib.scala 182:32] node _T_711 = bits(f0pc, 23, 19) @[el2_lib.scala 182:32]
wire _T_710 : UInt<5>[3] @[el2_lib.scala 182:24] wire _T_712 : UInt<5>[3] @[el2_lib.scala 182:24]
_T_710[0] <= _T_707 @[el2_lib.scala 182:24] _T_712[0] <= _T_709 @[el2_lib.scala 182:24]
_T_710[1] <= _T_708 @[el2_lib.scala 182:24] _T_712[1] <= _T_710 @[el2_lib.scala 182:24]
_T_710[2] <= _T_709 @[el2_lib.scala 182:24] _T_712[2] <= _T_711 @[el2_lib.scala 182:24]
node _T_711 = xor(_T_710[0], _T_710[1]) @[el2_lib.scala 182:111] node _T_713 = xor(_T_712[0], _T_712[1]) @[el2_lib.scala 182:111]
node firstbrtag_hash = xor(_T_711, _T_710[2]) @[el2_lib.scala 182:111] node firstbrtag_hash = xor(_T_713, _T_712[2]) @[el2_lib.scala 182:111]
node _T_712 = bits(secondpc, 13, 9) @[el2_lib.scala 182:32] node _T_714 = bits(secondpc, 13, 9) @[el2_lib.scala 182:32]
node _T_713 = bits(secondpc, 18, 14) @[el2_lib.scala 182:32] node _T_715 = bits(secondpc, 18, 14) @[el2_lib.scala 182:32]
node _T_714 = bits(secondpc, 23, 19) @[el2_lib.scala 182:32] node _T_716 = bits(secondpc, 23, 19) @[el2_lib.scala 182:32]
wire _T_715 : UInt<5>[3] @[el2_lib.scala 182:24] wire _T_717 : UInt<5>[3] @[el2_lib.scala 182:24]
_T_715[0] <= _T_712 @[el2_lib.scala 182:24] _T_717[0] <= _T_714 @[el2_lib.scala 182:24]
_T_715[1] <= _T_713 @[el2_lib.scala 182:24] _T_717[1] <= _T_715 @[el2_lib.scala 182:24]
_T_715[2] <= _T_714 @[el2_lib.scala 182:24] _T_717[2] <= _T_716 @[el2_lib.scala 182:24]
node _T_716 = xor(_T_715[0], _T_715[1]) @[el2_lib.scala 182:111] node _T_718 = xor(_T_717[0], _T_717[1]) @[el2_lib.scala 182:111]
node secondbrtag_hash = xor(_T_716, _T_715[2]) @[el2_lib.scala 182:111] node secondbrtag_hash = xor(_T_718, _T_717[2]) @[el2_lib.scala 182:111]
node _T_717 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 378:42] node _T_719 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 378:42]
node _T_718 = and(first2B, _T_717) @[el2_ifu_aln_ctl.scala 378:30] node _T_720 = and(first2B, _T_719) @[el2_ifu_aln_ctl.scala 378:30]
node _T_719 = bits(alignbrend, 1, 1) @[el2_ifu_aln_ctl.scala 378:70] node _T_721 = bits(alignbrend, 1, 1) @[el2_ifu_aln_ctl.scala 378:70]
node _T_720 = and(first4B, _T_719) @[el2_ifu_aln_ctl.scala 378:58] node _T_722 = and(first4B, _T_721) @[el2_ifu_aln_ctl.scala 378:58]
node _T_721 = or(_T_718, _T_720) @[el2_ifu_aln_ctl.scala 378:47] node _T_723 = or(_T_720, _T_722) @[el2_ifu_aln_ctl.scala 378:47]
node _T_722 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 378:96] node _T_724 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 378:96]
node _T_723 = and(first4B, _T_722) @[el2_ifu_aln_ctl.scala 378:86] node _T_725 = and(first4B, _T_724) @[el2_ifu_aln_ctl.scala 378:86]
node _T_724 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 378:112] node _T_726 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 378:112]
node _T_725 = and(_T_723, _T_724) @[el2_ifu_aln_ctl.scala 378:100] node _T_727 = and(_T_725, _T_726) @[el2_ifu_aln_ctl.scala 378:100]
node _T_726 = or(_T_721, _T_725) @[el2_ifu_aln_ctl.scala 378:75] node _T_728 = or(_T_723, _T_727) @[el2_ifu_aln_ctl.scala 378:75]
io.i0_brp.valid <= _T_726 @[el2_ifu_aln_ctl.scala 378:19] io.i0_brp.valid <= _T_728 @[el2_ifu_aln_ctl.scala 378:19]
node _T_727 = bits(alignret, 0, 0) @[el2_ifu_aln_ctl.scala 380:39] node _T_729 = bits(alignret, 0, 0) @[el2_ifu_aln_ctl.scala 380:39]
node _T_728 = and(first2B, _T_727) @[el2_ifu_aln_ctl.scala 380:29] node _T_730 = and(first2B, _T_729) @[el2_ifu_aln_ctl.scala 380:29]
node _T_729 = bits(alignret, 1, 1) @[el2_ifu_aln_ctl.scala 380:65] node _T_731 = bits(alignret, 1, 1) @[el2_ifu_aln_ctl.scala 380:65]
node _T_730 = and(first4B, _T_729) @[el2_ifu_aln_ctl.scala 380:55] node _T_732 = and(first4B, _T_731) @[el2_ifu_aln_ctl.scala 380:55]
node _T_731 = or(_T_728, _T_730) @[el2_ifu_aln_ctl.scala 380:44] node _T_733 = or(_T_730, _T_732) @[el2_ifu_aln_ctl.scala 380:44]
io.i0_brp.ret <= _T_731 @[el2_ifu_aln_ctl.scala 380:17] io.i0_brp.ret <= _T_733 @[el2_ifu_aln_ctl.scala 380:17]
node _T_732 = bits(alignpc4, 0, 0) @[el2_ifu_aln_ctl.scala 382:39] node _T_734 = bits(alignpc4, 0, 0) @[el2_ifu_aln_ctl.scala 382:39]
node _T_733 = and(first2B, _T_732) @[el2_ifu_aln_ctl.scala 382:29] node _T_735 = and(first2B, _T_734) @[el2_ifu_aln_ctl.scala 382:29]
node _T_734 = bits(alignpc4, 1, 1) @[el2_ifu_aln_ctl.scala 382:65] node _T_736 = bits(alignpc4, 1, 1) @[el2_ifu_aln_ctl.scala 382:65]
node _T_735 = and(first4B, _T_734) @[el2_ifu_aln_ctl.scala 382:55] node _T_737 = and(first4B, _T_736) @[el2_ifu_aln_ctl.scala 382:55]
node i0_brp_pc4 = or(_T_733, _T_735) @[el2_ifu_aln_ctl.scala 382:44] node i0_brp_pc4 = or(_T_735, _T_737) @[el2_ifu_aln_ctl.scala 382:44]
node _T_736 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 384:45] node _T_738 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 384:45]
node _T_737 = or(first2B, _T_736) @[el2_ifu_aln_ctl.scala 384:33] node _T_739 = or(first2B, _T_738) @[el2_ifu_aln_ctl.scala 384:33]
node _T_738 = bits(_T_737, 0, 0) @[el2_ifu_aln_ctl.scala 384:50] node _T_740 = bits(_T_739, 0, 0) @[el2_ifu_aln_ctl.scala 384:50]
node _T_739 = bits(alignway, 0, 0) @[el2_ifu_aln_ctl.scala 384:66] node _T_741 = bits(alignway, 0, 0) @[el2_ifu_aln_ctl.scala 384:66]
node _T_740 = bits(alignway, 1, 1) @[el2_ifu_aln_ctl.scala 384:80] node _T_742 = bits(alignway, 1, 1) @[el2_ifu_aln_ctl.scala 384:80]
node _T_741 = mux(_T_738, _T_739, _T_740) @[el2_ifu_aln_ctl.scala 384:23] node _T_743 = mux(_T_740, _T_741, _T_742) @[el2_ifu_aln_ctl.scala 384:23]
io.i0_brp.way <= _T_741 @[el2_ifu_aln_ctl.scala 384:17] io.i0_brp.way <= _T_743 @[el2_ifu_aln_ctl.scala 384:17]
node _T_742 = bits(alignhist1, 0, 0) @[el2_ifu_aln_ctl.scala 386:46] node _T_744 = bits(alignhist1, 0, 0) @[el2_ifu_aln_ctl.scala 386:46]
node _T_743 = and(first2B, _T_742) @[el2_ifu_aln_ctl.scala 386:34] node _T_745 = and(first2B, _T_744) @[el2_ifu_aln_ctl.scala 386:34]
node _T_744 = bits(alignhist1, 1, 1) @[el2_ifu_aln_ctl.scala 386:74] node _T_746 = bits(alignhist1, 1, 1) @[el2_ifu_aln_ctl.scala 386:74]
node _T_745 = and(first4B, _T_744) @[el2_ifu_aln_ctl.scala 386:62] node _T_747 = and(first4B, _T_746) @[el2_ifu_aln_ctl.scala 386:62]
node _T_746 = or(_T_743, _T_745) @[el2_ifu_aln_ctl.scala 386:51] node _T_748 = or(_T_745, _T_747) @[el2_ifu_aln_ctl.scala 386:51]
node _T_747 = bits(alignhist0, 0, 0) @[el2_ifu_aln_ctl.scala 387:26] node _T_749 = bits(alignhist0, 0, 0) @[el2_ifu_aln_ctl.scala 387:26]
node _T_748 = and(first2B, _T_747) @[el2_ifu_aln_ctl.scala 387:14] node _T_750 = and(first2B, _T_749) @[el2_ifu_aln_ctl.scala 387:14]
node _T_749 = bits(alignhist0, 1, 1) @[el2_ifu_aln_ctl.scala 387:54] node _T_751 = bits(alignhist0, 1, 1) @[el2_ifu_aln_ctl.scala 387:54]
node _T_750 = and(first4B, _T_749) @[el2_ifu_aln_ctl.scala 387:42] node _T_752 = and(first4B, _T_751) @[el2_ifu_aln_ctl.scala 387:42]
node _T_751 = or(_T_748, _T_750) @[el2_ifu_aln_ctl.scala 387:31] node _T_753 = or(_T_750, _T_752) @[el2_ifu_aln_ctl.scala 387:31]
node _T_752 = cat(_T_746, _T_751) @[Cat.scala 29:58] node _T_754 = cat(_T_748, _T_753) @[Cat.scala 29:58]
io.i0_brp.hist <= _T_752 @[el2_ifu_aln_ctl.scala 386:18] io.i0_brp.hist <= _T_754 @[el2_ifu_aln_ctl.scala 386:18]
node i0_ends_f1 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 389:28] node i0_ends_f1 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 389:28]
node _T_753 = bits(i0_ends_f1, 0, 0) @[el2_ifu_aln_ctl.scala 390:39] node _T_755 = bits(i0_ends_f1, 0, 0) @[el2_ifu_aln_ctl.scala 390:39]
node _T_754 = mux(_T_753, f1poffset, f0poffset) @[el2_ifu_aln_ctl.scala 390:27] node _T_756 = mux(_T_755, f1poffset, f0poffset) @[el2_ifu_aln_ctl.scala 390:27]
io.i0_brp.toffset <= _T_754 @[el2_ifu_aln_ctl.scala 390:21] io.i0_brp.toffset <= _T_756 @[el2_ifu_aln_ctl.scala 390:21]
node _T_755 = bits(i0_ends_f1, 0, 0) @[el2_ifu_aln_ctl.scala 392:37] node _T_757 = bits(i0_ends_f1, 0, 0) @[el2_ifu_aln_ctl.scala 392:37]
node _T_756 = mux(_T_755, f1prett, f0prett) @[el2_ifu_aln_ctl.scala 392:25] node _T_758 = mux(_T_757, f1prett, f0prett) @[el2_ifu_aln_ctl.scala 392:25]
io.i0_brp.prett <= _T_756 @[el2_ifu_aln_ctl.scala 392:19] io.i0_brp.prett <= _T_758 @[el2_ifu_aln_ctl.scala 392:19]
node _T_757 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 394:51] node _T_759 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 394:51]
node _T_758 = and(first4B, _T_757) @[el2_ifu_aln_ctl.scala 394:41] node _T_760 = and(first4B, _T_759) @[el2_ifu_aln_ctl.scala 394:41]
node _T_759 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 394:67] node _T_761 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 394:67]
node _T_760 = and(_T_758, _T_759) @[el2_ifu_aln_ctl.scala 394:55] node _T_762 = and(_T_760, _T_761) @[el2_ifu_aln_ctl.scala 394:55]
io.i0_brp.br_start_error <= _T_760 @[el2_ifu_aln_ctl.scala 394:29] io.i0_brp.br_start_error <= _T_762 @[el2_ifu_aln_ctl.scala 394:29]
node _T_761 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 396:57] node _T_763 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 396:57]
node _T_762 = or(first2B, _T_761) @[el2_ifu_aln_ctl.scala 396:45] node _T_764 = or(first2B, _T_763) @[el2_ifu_aln_ctl.scala 396:45]
node _T_763 = bits(_T_762, 0, 0) @[el2_ifu_aln_ctl.scala 396:62] node _T_765 = bits(_T_764, 0, 0) @[el2_ifu_aln_ctl.scala 396:62]
node _T_764 = bits(f0pc, 1, 1) @[el2_ifu_aln_ctl.scala 396:77] node _T_766 = bits(f0pc, 1, 1) @[el2_ifu_aln_ctl.scala 396:77]
node _T_765 = bits(secondpc, 1, 1) @[el2_ifu_aln_ctl.scala 396:90] node _T_767 = bits(secondpc, 1, 1) @[el2_ifu_aln_ctl.scala 396:90]
node _T_766 = mux(_T_763, _T_764, _T_765) @[el2_ifu_aln_ctl.scala 396:35] node _T_768 = mux(_T_765, _T_766, _T_767) @[el2_ifu_aln_ctl.scala 396:35]
io.i0_brp.bank <= _T_766 @[el2_ifu_aln_ctl.scala 396:29] io.i0_brp.bank <= _T_768 @[el2_ifu_aln_ctl.scala 396:29]
node _T_767 = and(io.i0_brp.valid, i0_brp_pc4) @[el2_ifu_aln_ctl.scala 398:42] node _T_769 = and(io.i0_brp.valid, i0_brp_pc4) @[el2_ifu_aln_ctl.scala 398:42]
node _T_768 = and(_T_767, first2B) @[el2_ifu_aln_ctl.scala 398:56] node _T_770 = and(_T_769, first2B) @[el2_ifu_aln_ctl.scala 398:56]
node _T_769 = eq(i0_brp_pc4, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 398:89] node _T_771 = eq(i0_brp_pc4, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 398:89]
node _T_770 = and(io.i0_brp.valid, _T_769) @[el2_ifu_aln_ctl.scala 398:87] node _T_772 = and(io.i0_brp.valid, _T_771) @[el2_ifu_aln_ctl.scala 398:87]
node _T_771 = and(_T_770, first4B) @[el2_ifu_aln_ctl.scala 398:101] node _T_773 = and(_T_772, first4B) @[el2_ifu_aln_ctl.scala 398:101]
node _T_772 = or(_T_768, _T_771) @[el2_ifu_aln_ctl.scala 398:68] node _T_774 = or(_T_770, _T_773) @[el2_ifu_aln_ctl.scala 398:68]
io.i0_brp.br_error <= _T_772 @[el2_ifu_aln_ctl.scala 398:22] io.i0_brp.br_error <= _T_774 @[el2_ifu_aln_ctl.scala 398:22]
node _T_773 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 400:50] node _T_775 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 400:50]
node _T_774 = or(first2B, _T_773) @[el2_ifu_aln_ctl.scala 400:38] node _T_776 = or(first2B, _T_775) @[el2_ifu_aln_ctl.scala 400:38]
node _T_775 = bits(_T_774, 0, 0) @[el2_ifu_aln_ctl.scala 400:55] node _T_777 = bits(_T_776, 0, 0) @[el2_ifu_aln_ctl.scala 400:55]
node _T_776 = mux(_T_775, firstpc_hash, secondpc_hash) @[el2_ifu_aln_ctl.scala 400:28] node _T_778 = mux(_T_777, firstpc_hash, secondpc_hash) @[el2_ifu_aln_ctl.scala 400:28]
io.ifu_i0_bp_index <= _T_776 @[el2_ifu_aln_ctl.scala 400:22] io.ifu_i0_bp_index <= _T_778 @[el2_ifu_aln_ctl.scala 400:22]
node _T_777 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 402:37] node _T_779 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 402:37]
node _T_778 = bits(_T_777, 0, 0) @[el2_ifu_aln_ctl.scala 402:52] node _T_780 = bits(_T_779, 0, 0) @[el2_ifu_aln_ctl.scala 402:52]
node _T_779 = mux(_T_778, f1fghr, f0fghr) @[el2_ifu_aln_ctl.scala 402:27] node _T_781 = mux(_T_780, f1fghr, f0fghr) @[el2_ifu_aln_ctl.scala 402:27]
io.ifu_i0_bp_fghr <= _T_779 @[el2_ifu_aln_ctl.scala 402:21] io.ifu_i0_bp_fghr <= _T_781 @[el2_ifu_aln_ctl.scala 402:21]
node _T_780 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 404:49] node _T_782 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 404:49]
node _T_781 = or(first2B, _T_780) @[el2_ifu_aln_ctl.scala 404:37] node _T_783 = or(first2B, _T_782) @[el2_ifu_aln_ctl.scala 404:37]
node _T_782 = bits(_T_781, 0, 0) @[el2_ifu_aln_ctl.scala 404:54] node _T_784 = bits(_T_783, 0, 0) @[el2_ifu_aln_ctl.scala 404:54]
node _T_783 = mux(_T_782, firstbrtag_hash, secondbrtag_hash) @[el2_ifu_aln_ctl.scala 404:27] node _T_785 = mux(_T_784, firstbrtag_hash, secondbrtag_hash) @[el2_ifu_aln_ctl.scala 404:27]
io.ifu_i0_bp_btag <= _T_783 @[el2_ifu_aln_ctl.scala 404:21] io.ifu_i0_bp_btag <= _T_785 @[el2_ifu_aln_ctl.scala 404:21]
decompressed.io.din <= aligndata @[el2_ifu_aln_ctl.scala 406:23] decompressed.io.din <= aligndata @[el2_ifu_aln_ctl.scala 406:23]
node _T_784 = not(error_stall) @[el2_ifu_aln_ctl.scala 408:39] node _T_786 = not(error_stall) @[el2_ifu_aln_ctl.scala 408:39]
node i0_shift = and(io.dec_i0_decode_d, _T_784) @[el2_ifu_aln_ctl.scala 408:37] node i0_shift = and(io.dec_i0_decode_d, _T_786) @[el2_ifu_aln_ctl.scala 408:37]
io.ifu_pmu_instr_aligned <= i0_shift @[el2_ifu_aln_ctl.scala 410:28] io.ifu_pmu_instr_aligned <= i0_shift @[el2_ifu_aln_ctl.scala 410:28]
node _T_785 = and(i0_shift, first2B) @[el2_ifu_aln_ctl.scala 412:24] node _T_787 = and(i0_shift, first2B) @[el2_ifu_aln_ctl.scala 412:24]
shift_2B <= _T_785 @[el2_ifu_aln_ctl.scala 412:12] shift_2B <= _T_787 @[el2_ifu_aln_ctl.scala 412:12]
node _T_786 = and(i0_shift, first4B) @[el2_ifu_aln_ctl.scala 413:24] node _T_788 = and(i0_shift, first4B) @[el2_ifu_aln_ctl.scala 413:24]
shift_4B <= _T_786 @[el2_ifu_aln_ctl.scala 413:12] shift_4B <= _T_788 @[el2_ifu_aln_ctl.scala 413:12]
node _T_787 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 415:37] node _T_789 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 415:37]
node _T_788 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:52] node _T_790 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:52]
node _T_789 = bits(shift_4B, 0, 0) @[el2_ifu_aln_ctl.scala 415:66] node _T_791 = bits(shift_4B, 0, 0) @[el2_ifu_aln_ctl.scala 415:66]
node _T_790 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:83] node _T_792 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:83]
node _T_791 = eq(_T_790, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 415:77] node _T_793 = eq(_T_792, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 415:77]
node _T_792 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:94] node _T_794 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 415:94]
node _T_793 = and(_T_791, _T_792) @[el2_ifu_aln_ctl.scala 415:87] node _T_795 = and(_T_793, _T_794) @[el2_ifu_aln_ctl.scala 415:87]
node _T_794 = mux(_T_787, _T_788, UInt<1>("h00")) @[Mux.scala 27:72] node _T_796 = mux(_T_789, _T_790, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_795 = mux(_T_789, _T_793, UInt<1>("h00")) @[Mux.scala 27:72] node _T_797 = mux(_T_791, _T_795, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_796 = or(_T_794, _T_795) @[Mux.scala 27:72] node _T_798 = or(_T_796, _T_797) @[Mux.scala 27:72]
wire _T_797 : UInt<1> @[Mux.scala 27:72] wire _T_799 : UInt<1> @[Mux.scala 27:72]
_T_797 <= _T_796 @[Mux.scala 27:72] _T_799 <= _T_798 @[Mux.scala 27:72]
f0_shift_2B <= _T_797 @[el2_ifu_aln_ctl.scala 415:15] f0_shift_2B <= _T_799 @[el2_ifu_aln_ctl.scala 415:15]
node _T_798 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 416:24] node _T_800 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 416:24]
node _T_799 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 416:36] node _T_801 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 416:36]
node _T_800 = eq(_T_799, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 416:30] node _T_802 = eq(_T_801, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 416:30]
node _T_801 = and(_T_798, _T_800) @[el2_ifu_aln_ctl.scala 416:28] node _T_803 = and(_T_800, _T_802) @[el2_ifu_aln_ctl.scala 416:28]
node _T_802 = and(_T_801, shift_4B) @[el2_ifu_aln_ctl.scala 416:40] node _T_804 = and(_T_803, shift_4B) @[el2_ifu_aln_ctl.scala 416:40]
f1_shift_2B <= _T_802 @[el2_ifu_aln_ctl.scala 416:15] f1_shift_2B <= _T_804 @[el2_ifu_aln_ctl.scala 416:15]

259
el2_ifu_aln_ctl.v
View File

@ -592,8 +592,8 @@ module el2_ifu_aln_ctl(
reg q2off; // @[el2_ifu_aln_ctl.scala 136:48] reg q2off; // @[el2_ifu_aln_ctl.scala 136:48]
reg q1off; // @[el2_ifu_aln_ctl.scala 137:48] reg q1off; // @[el2_ifu_aln_ctl.scala 137:48]
reg q0off; // @[el2_ifu_aln_ctl.scala 138:48] reg q0off; // @[el2_ifu_aln_ctl.scala 138:48]
wire _T_784 = ~error_stall; // @[el2_ifu_aln_ctl.scala 408:39] wire _T_786 = ~error_stall; // @[el2_ifu_aln_ctl.scala 408:39]
wire i0_shift = io_dec_i0_decode_d & _T_784; // @[el2_ifu_aln_ctl.scala 408:37] wire i0_shift = io_dec_i0_decode_d & _T_786; // @[el2_ifu_aln_ctl.scala 408:37]
wire _T_186 = rdptr == 2'h0; // @[el2_ifu_aln_ctl.scala 188:31] wire _T_186 = rdptr == 2'h0; // @[el2_ifu_aln_ctl.scala 188:31]
wire _T_189 = _T_186 & q0off; // @[Mux.scala 27:72] wire _T_189 = _T_186 & q0off; // @[Mux.scala 27:72]
wire _T_187 = rdptr == 2'h1; // @[el2_ifu_aln_ctl.scala 189:11] wire _T_187 = rdptr == 2'h1; // @[el2_ifu_aln_ctl.scala 189:11]
@ -621,7 +621,7 @@ module el2_ifu_aln_ctl(
wire [15:0] _T_498 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72] wire [15:0] _T_498 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
wire [31:0] _GEN_12 = {{16'd0}, _T_498}; // @[Mux.scala 27:72] wire [31:0] _GEN_12 = {{16'd0}, _T_498}; // @[Mux.scala 27:72]
wire [31:0] q0final = _T_497 | _GEN_12; // @[Mux.scala 27:72] wire [31:0] q0final = _T_497 | _GEN_12; // @[Mux.scala 27:72]
wire [31:0] _T_519 = f0val[0] ? q0final : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_521 = f0val[0] ? q0final : 32'h0; // @[Mux.scala 27:72]
wire _T_514 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 316:58] wire _T_514 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 316:58]
wire _T_516 = _T_514 & f0val[0]; // @[el2_ifu_aln_ctl.scala 316:68] wire _T_516 = _T_514 & f0val[0]; // @[el2_ifu_aln_ctl.scala 316:68]
wire _T_197 = _T_186 & q1off; // @[Mux.scala 27:72] wire _T_197 = _T_186 & q1off; // @[Mux.scala 27:72]
@ -635,10 +635,9 @@ module el2_ifu_aln_ctl(
wire [15:0] _T_507 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72] wire [15:0] _T_507 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72]
wire [15:0] _T_508 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72] wire [15:0] _T_508 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72]
wire [15:0] q1final = _T_507 | _T_508; // @[Mux.scala 27:72] wire [15:0] q1final = _T_507 | _T_508; // @[Mux.scala 27:72]
wire [47:0] _T_518 = {q1final,q0final}; // @[Cat.scala 29:58] wire [31:0] _T_520 = {q1final,q0final[15:0]}; // @[Cat.scala 29:58]
wire [47:0] _T_520 = _T_516 ? _T_518 : 48'h0; // @[Mux.scala 27:72] wire [31:0] _T_522 = _T_516 ? _T_520 : 32'h0; // @[Mux.scala 27:72]
wire [47:0] _GEN_13 = {{16'd0}, _T_519}; // @[Mux.scala 27:72] wire [31:0] aligndata = _T_521 | _T_522; // @[Mux.scala 27:72]
wire [47:0] aligndata = _GEN_13 | _T_520; // @[Mux.scala 27:72]
wire first4B = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 348:29] wire first4B = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 348:29]
wire first2B = ~first4B; // @[el2_ifu_aln_ctl.scala 350:17] wire first2B = ~first4B; // @[el2_ifu_aln_ctl.scala 350:17]
wire shift_2B = i0_shift & first2B; // @[el2_ifu_aln_ctl.scala 412:24] wire shift_2B = i0_shift & first2B; // @[el2_ifu_aln_ctl.scala 412:24]
@ -652,13 +651,13 @@ module el2_ifu_aln_ctl(
wire [1:0] sf0val = _T_449 | _T_450; // @[Mux.scala 27:72] wire [1:0] sf0val = _T_449 | _T_450; // @[Mux.scala 27:72]
wire sf0_valid = sf0val[0]; // @[el2_ifu_aln_ctl.scala 253:22] wire sf0_valid = sf0val[0]; // @[el2_ifu_aln_ctl.scala 253:22]
wire _T_352 = ~sf0_valid; // @[el2_ifu_aln_ctl.scala 272:26] wire _T_352 = ~sf0_valid; // @[el2_ifu_aln_ctl.scala 272:26]
wire _T_801 = f0val[0] & _T_514; // @[el2_ifu_aln_ctl.scala 416:28] wire _T_803 = f0val[0] & _T_514; // @[el2_ifu_aln_ctl.scala 416:28]
wire f1_shift_2B = _T_801 & shift_4B; // @[el2_ifu_aln_ctl.scala 416:40] wire f1_shift_2B = _T_803 & shift_4B; // @[el2_ifu_aln_ctl.scala 416:40]
wire _T_418 = f1_shift_2B & f1val[1]; // @[Mux.scala 27:72] wire _T_418 = f1_shift_2B & f1val[1]; // @[Mux.scala 27:72]
wire _T_417 = ~f1_shift_2B; // @[el2_ifu_aln_ctl.scala 293:53] wire _T_417 = ~f1_shift_2B; // @[el2_ifu_aln_ctl.scala 293:53]
wire [1:0] _T_419 = _T_417 ? f1val : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_419 = _T_417 ? f1val : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _GEN_14 = {{1'd0}, _T_418}; // @[Mux.scala 27:72] wire [1:0] _GEN_13 = {{1'd0}, _T_418}; // @[Mux.scala 27:72]
wire [1:0] sf1val = _GEN_14 | _T_419; // @[Mux.scala 27:72] wire [1:0] sf1val = _GEN_13 | _T_419; // @[Mux.scala 27:72]
wire sf1_valid = sf1val[0]; // @[el2_ifu_aln_ctl.scala 252:22] wire sf1_valid = sf1val[0]; // @[el2_ifu_aln_ctl.scala 252:22]
wire _T_353 = _T_352 & sf1_valid; // @[el2_ifu_aln_ctl.scala 272:37] wire _T_353 = _T_352 & sf1_valid; // @[el2_ifu_aln_ctl.scala 272:37]
wire f2_valid = f2val[0]; // @[el2_ifu_aln_ctl.scala 251:20] wire f2_valid = f2val[0]; // @[el2_ifu_aln_ctl.scala 251:20]
@ -749,11 +748,11 @@ module el2_ifu_aln_ctl(
wire [1:0] _T_80 = _T_51 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_80 = _T_51 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_82 = _T_61 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_82 = _T_61 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_85 = _T_77 ? rdptr : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_85 = _T_77 ? rdptr : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _GEN_15 = {{1'd0}, _T_46}; // @[Mux.scala 27:72] wire [1:0] _GEN_14 = {{1'd0}, _T_46}; // @[Mux.scala 27:72]
wire [1:0] _T_86 = _GEN_15 | _T_80; // @[Mux.scala 27:72] wire [1:0] _T_86 = _GEN_14 | _T_80; // @[Mux.scala 27:72]
wire [1:0] _T_88 = _T_86 | _T_82; // @[Mux.scala 27:72] wire [1:0] _T_88 = _T_86 | _T_82; // @[Mux.scala 27:72]
wire [1:0] _GEN_16 = {{1'd0}, _T_71}; // @[Mux.scala 27:72] wire [1:0] _GEN_15 = {{1'd0}, _T_71}; // @[Mux.scala 27:72]
wire [1:0] _T_90 = _T_88 | _GEN_16; // @[Mux.scala 27:72] wire [1:0] _T_90 = _T_88 | _GEN_15; // @[Mux.scala 27:72]
wire [1:0] rdptr_in = _T_90 | _T_85; // @[Mux.scala 27:72] wire [1:0] rdptr_in = _T_90 | _T_85; // @[Mux.scala 27:72]
wire _T_95 = qwen[0] & _T_1; // @[el2_ifu_aln_ctl.scala 171:34] wire _T_95 = qwen[0] & _T_1; // @[el2_ifu_aln_ctl.scala 171:34]
wire _T_99 = qwen[1] & _T_1; // @[el2_ifu_aln_ctl.scala 172:14] wire _T_99 = qwen[1] & _T_1; // @[el2_ifu_aln_ctl.scala 172:14]
@ -761,16 +760,16 @@ module el2_ifu_aln_ctl(
wire _T_107 = _T_105 & _T_1; // @[el2_ifu_aln_ctl.scala 174:15] wire _T_107 = _T_105 & _T_1; // @[el2_ifu_aln_ctl.scala 174:15]
wire [1:0] _T_110 = _T_99 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_110 = _T_99 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_112 = _T_107 ? wrptr : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_112 = _T_107 ? wrptr : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _GEN_17 = {{1'd0}, _T_95}; // @[Mux.scala 27:72] wire [1:0] _GEN_16 = {{1'd0}, _T_95}; // @[Mux.scala 27:72]
wire [1:0] _T_113 = _GEN_17 | _T_110; // @[Mux.scala 27:72] wire [1:0] _T_113 = _GEN_16 | _T_110; // @[Mux.scala 27:72]
wire [1:0] wrptr_in = _T_113 | _T_112; // @[Mux.scala 27:72] wire [1:0] wrptr_in = _T_113 | _T_112; // @[Mux.scala 27:72]
wire _T_118 = ~qwen[2]; // @[el2_ifu_aln_ctl.scala 176:26] wire _T_118 = ~qwen[2]; // @[el2_ifu_aln_ctl.scala 176:26]
wire _T_120 = _T_118 & _T_188; // @[el2_ifu_aln_ctl.scala 176:35] wire _T_120 = _T_118 & _T_188; // @[el2_ifu_aln_ctl.scala 176:35]
wire _T_794 = shift_2B & f0val[0]; // @[Mux.scala 27:72] wire _T_796 = shift_2B & f0val[0]; // @[Mux.scala 27:72]
wire _T_791 = ~f0val[0]; // @[el2_ifu_aln_ctl.scala 415:77] wire _T_793 = ~f0val[0]; // @[el2_ifu_aln_ctl.scala 415:77]
wire _T_793 = _T_791 & f0val[0]; // @[el2_ifu_aln_ctl.scala 415:87] wire _T_795 = _T_793 & f0val[0]; // @[el2_ifu_aln_ctl.scala 415:87]
wire _T_795 = shift_4B & _T_793; // @[Mux.scala 27:72] wire _T_797 = shift_4B & _T_795; // @[Mux.scala 27:72]
wire f0_shift_2B = _T_794 | _T_795; // @[Mux.scala 27:72] wire f0_shift_2B = _T_796 | _T_797; // @[Mux.scala 27:72]
wire _T_122 = q2off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 176:74] wire _T_122 = q2off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 176:74]
wire _T_126 = _T_118 & _T_187; // @[el2_ifu_aln_ctl.scala 177:15] wire _T_126 = _T_118 & _T_187; // @[el2_ifu_aln_ctl.scala 177:15]
wire _T_128 = q2off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 177:54] wire _T_128 = q2off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 177:54]
@ -839,12 +838,12 @@ module el2_ifu_aln_ctl(
wire [11:0] brdata1eff = brdataeff[23:12]; // @[el2_ifu_aln_ctl.scala 231:61] wire [11:0] brdata1eff = brdataeff[23:12]; // @[el2_ifu_aln_ctl.scala 231:61]
wire [11:0] _T_268 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72] wire [11:0] _T_268 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72]
wire [5:0] _T_269 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72] wire [5:0] _T_269 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72]
wire [11:0] _GEN_18 = {{6'd0}, _T_269}; // @[Mux.scala 27:72] wire [11:0] _GEN_17 = {{6'd0}, _T_269}; // @[Mux.scala 27:72]
wire [11:0] brdata0final = _T_268 | _GEN_18; // @[Mux.scala 27:72] wire [11:0] brdata0final = _T_268 | _GEN_17; // @[Mux.scala 27:72]
wire [11:0] _T_276 = q1sel[0] ? brdata1eff : 12'h0; // @[Mux.scala 27:72] wire [11:0] _T_276 = q1sel[0] ? brdata1eff : 12'h0; // @[Mux.scala 27:72]
wire [5:0] _T_277 = q1sel[1] ? brdata1eff[11:6] : 6'h0; // @[Mux.scala 27:72] wire [5:0] _T_277 = q1sel[1] ? brdata1eff[11:6] : 6'h0; // @[Mux.scala 27:72]
wire [11:0] _GEN_19 = {{6'd0}, _T_277}; // @[Mux.scala 27:72] wire [11:0] _GEN_18 = {{6'd0}, _T_277}; // @[Mux.scala 27:72]
wire [11:0] brdata1final = _T_276 | _GEN_19; // @[Mux.scala 27:72] wire [11:0] brdata1final = _T_276 | _GEN_18; // @[Mux.scala 27:72]
wire [1:0] f0ret = {brdata0final[6],brdata0final[0]}; // @[Cat.scala 29:58] wire [1:0] f0ret = {brdata0final[6],brdata0final[0]}; // @[Cat.scala 29:58]
wire [1:0] f0brend = {brdata0final[7],brdata0final[1]}; // @[Cat.scala 29:58] wire [1:0] f0brend = {brdata0final[7],brdata0final[1]}; // @[Cat.scala 29:58]
wire [1:0] f0way = {brdata0final[8],brdata0final[2]}; // @[Cat.scala 29:58] wire [1:0] f0way = {brdata0final[8],brdata0final[2]}; // @[Cat.scala 29:58]
@ -890,125 +889,123 @@ module el2_ifu_aln_ctl(
wire [1:0] _T_474 = _T_470 | _T_471; // @[Mux.scala 27:72] wire [1:0] _T_474 = _T_470 | _T_471; // @[Mux.scala 27:72]
wire [1:0] _T_475 = _T_474 | _T_472; // @[Mux.scala 27:72] wire [1:0] _T_475 = _T_474 | _T_472; // @[Mux.scala 27:72]
wire [1:0] f0val_in = _T_475 | _T_473; // @[Mux.scala 27:72] wire [1:0] f0val_in = _T_475 | _T_473; // @[Mux.scala 27:72]
wire [1:0] _T_529 = {f1val[0],1'h1}; // @[Cat.scala 29:58] wire [1:0] _T_531 = {f1val[0],1'h1}; // @[Cat.scala 29:58]
wire [1:0] _T_530 = f0val[1] ? 2'h3 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_532 = f0val[1] ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_531 = _T_516 ? _T_529 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_533 = _T_516 ? _T_531 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] alignval = _T_530 | _T_531; // @[Mux.scala 27:72] wire [1:0] alignval = _T_532 | _T_533; // @[Mux.scala 27:72]
wire [1:0] _T_541 = {f1icaf,f0icaf}; // @[Cat.scala 29:58] wire [1:0] _T_543 = {f1icaf,f0icaf}; // @[Cat.scala 29:58]
wire _T_542 = f0val[1] & f0icaf; // @[Mux.scala 27:72] wire _T_544 = f0val[1] & f0icaf; // @[Mux.scala 27:72]
wire [1:0] _T_543 = _T_516 ? _T_541 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_545 = _T_516 ? _T_543 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _GEN_20 = {{1'd0}, _T_542}; // @[Mux.scala 27:72] wire [1:0] _GEN_19 = {{1'd0}, _T_544}; // @[Mux.scala 27:72]
wire [1:0] alignicaf = _GEN_20 | _T_543; // @[Mux.scala 27:72] wire [1:0] alignicaf = _GEN_19 | _T_545; // @[Mux.scala 27:72]
wire [1:0] _T_548 = f0dbecc ? 2'h3 : 2'h0; // @[Bitwise.scala 72:12] wire [1:0] _T_550 = f0dbecc ? 2'h3 : 2'h0; // @[Bitwise.scala 72:12]
wire [1:0] _T_554 = {f1dbecc,f0dbecc}; // @[Cat.scala 29:58] wire [1:0] _T_556 = {f1dbecc,f0dbecc}; // @[Cat.scala 29:58]
wire [1:0] _T_555 = f0val[1] ? _T_548 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_557 = f0val[1] ? _T_550 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_556 = _T_516 ? _T_554 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_558 = _T_516 ? _T_556 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] aligndbecc = _T_555 | _T_556; // @[Mux.scala 27:72] wire [1:0] aligndbecc = _T_557 | _T_558; // @[Mux.scala 27:72]
wire [1:0] _T_567 = {f1brend[0],f0brend[0]}; // @[Cat.scala 29:58] wire [1:0] _T_569 = {f1brend[0],f0brend[0]}; // @[Cat.scala 29:58]
wire [1:0] _T_568 = f0val[1] ? f0brend : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_570 = f0val[1] ? f0brend : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_569 = _T_516 ? _T_567 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_571 = _T_516 ? _T_569 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] alignbrend = _T_568 | _T_569; // @[Mux.scala 27:72] wire [1:0] alignbrend = _T_570 | _T_571; // @[Mux.scala 27:72]
wire [1:0] _T_580 = {f1pc4[0],f0pc4[0]}; // @[Cat.scala 29:58] wire [1:0] _T_582 = {f1pc4[0],f0pc4[0]}; // @[Cat.scala 29:58]
wire [1:0] _T_581 = f0val[1] ? f0pc4 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_583 = f0val[1] ? f0pc4 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_582 = _T_516 ? _T_580 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_584 = _T_516 ? _T_582 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] alignpc4 = _T_581 | _T_582; // @[Mux.scala 27:72] wire [1:0] alignpc4 = _T_583 | _T_584; // @[Mux.scala 27:72]
wire [1:0] _T_593 = {f1ret[0],f0ret[0]}; // @[Cat.scala 29:58] wire [1:0] _T_595 = {f1ret[0],f0ret[0]}; // @[Cat.scala 29:58]
wire [1:0] _T_594 = f0val[1] ? f0ret : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_596 = f0val[1] ? f0ret : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_595 = _T_516 ? _T_593 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_597 = _T_516 ? _T_595 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] alignret = _T_594 | _T_595; // @[Mux.scala 27:72] wire [1:0] alignret = _T_596 | _T_597; // @[Mux.scala 27:72]
wire [1:0] _T_606 = {f1way[0],f0way[0]}; // @[Cat.scala 29:58] wire [1:0] _T_608 = {f1way[0],f0way[0]}; // @[Cat.scala 29:58]
wire [1:0] _T_607 = f0val[1] ? f0way : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_609 = f0val[1] ? f0way : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_608 = _T_516 ? _T_606 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_610 = _T_516 ? _T_608 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] alignway = _T_607 | _T_608; // @[Mux.scala 27:72] wire [1:0] alignway = _T_609 | _T_610; // @[Mux.scala 27:72]
wire [1:0] _T_619 = {f1hist1[0],f0hist1[0]}; // @[Cat.scala 29:58] wire [1:0] _T_621 = {f1hist1[0],f0hist1[0]}; // @[Cat.scala 29:58]
wire [1:0] _T_620 = f0val[1] ? f0hist1 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_622 = f0val[1] ? f0hist1 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_621 = _T_516 ? _T_619 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_623 = _T_516 ? _T_621 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] alignhist1 = _T_620 | _T_621; // @[Mux.scala 27:72] wire [1:0] alignhist1 = _T_622 | _T_623; // @[Mux.scala 27:72]
wire [1:0] _T_632 = {f1hist0[0],f0hist0[0]}; // @[Cat.scala 29:58] wire [1:0] _T_634 = {f1hist0[0],f0hist0[0]}; // @[Cat.scala 29:58]
wire [1:0] _T_633 = f0val[1] ? f0hist0 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_635 = f0val[1] ? f0hist0 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_634 = _T_516 ? _T_632 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_636 = _T_516 ? _T_634 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] alignhist0 = _T_633 | _T_634; // @[Mux.scala 27:72] wire [1:0] alignhist0 = _T_635 | _T_636; // @[Mux.scala 27:72]
wire [30:0] _T_646 = f0val[1] ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72] wire [30:0] _T_648 = f0val[1] ? f0pc_plus1 : 31'h0; // @[Mux.scala 27:72]
wire [30:0] _T_647 = _T_516 ? f1pc : 31'h0; // @[Mux.scala 27:72] wire [30:0] _T_649 = _T_516 ? f1pc : 31'h0; // @[Mux.scala 27:72]
wire [30:0] secondpc = _T_646 | _T_647; // @[Mux.scala 27:72] wire [30:0] secondpc = _T_648 | _T_649; // @[Mux.scala 27:72]
wire _T_656 = first4B & alignval[1]; // @[Mux.scala 27:72] wire _T_658 = first4B & alignval[1]; // @[Mux.scala 27:72]
wire _T_657 = first2B & alignval[0]; // @[Mux.scala 27:72] wire _T_659 = first2B & alignval[0]; // @[Mux.scala 27:72]
wire _T_661 = |alignicaf; // @[el2_ifu_aln_ctl.scala 354:59] wire _T_663 = |alignicaf; // @[el2_ifu_aln_ctl.scala 354:59]
wire _T_664 = first4B & _T_661; // @[Mux.scala 27:72] wire _T_666 = first4B & _T_663; // @[Mux.scala 27:72]
wire _T_665 = first2B & alignicaf[0]; // @[Mux.scala 27:72] wire _T_667 = first2B & alignicaf[0]; // @[Mux.scala 27:72]
wire _T_670 = first4B & _T_514; // @[el2_ifu_aln_ctl.scala 356:39] wire _T_672 = first4B & _T_514; // @[el2_ifu_aln_ctl.scala 356:39]
wire _T_672 = _T_670 & f0val[0]; // @[el2_ifu_aln_ctl.scala 356:51] wire _T_674 = _T_672 & f0val[0]; // @[el2_ifu_aln_ctl.scala 356:51]
wire _T_674 = ~alignicaf[0]; // @[el2_ifu_aln_ctl.scala 356:64] wire _T_676 = ~alignicaf[0]; // @[el2_ifu_aln_ctl.scala 356:64]
wire _T_675 = _T_672 & _T_674; // @[el2_ifu_aln_ctl.scala 356:62] wire _T_677 = _T_674 & _T_676; // @[el2_ifu_aln_ctl.scala 356:62]
wire _T_677 = ~aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 356:80] wire _T_679 = ~aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 356:80]
wire _T_678 = _T_675 & _T_677; // @[el2_ifu_aln_ctl.scala 356:78] wire _T_680 = _T_677 & _T_679; // @[el2_ifu_aln_ctl.scala 356:78]
wire icaf_eff = alignicaf[1] | aligndbecc[1]; // @[el2_ifu_aln_ctl.scala 358:31] wire icaf_eff = alignicaf[1] | aligndbecc[1]; // @[el2_ifu_aln_ctl.scala 358:31]
wire _T_683 = first4B & icaf_eff; // @[el2_ifu_aln_ctl.scala 360:32] wire _T_685 = first4B & icaf_eff; // @[el2_ifu_aln_ctl.scala 360:32]
wire _T_686 = |aligndbecc; // @[el2_ifu_aln_ctl.scala 362:59] wire _T_688 = |aligndbecc; // @[el2_ifu_aln_ctl.scala 362:59]
wire _T_689 = first4B & _T_686; // @[Mux.scala 27:72] wire _T_691 = first4B & _T_688; // @[Mux.scala 27:72]
wire _T_690 = first2B & aligndbecc[0]; // @[Mux.scala 27:72] wire _T_692 = first2B & aligndbecc[0]; // @[Mux.scala 27:72]
wire [47:0] _T_695 = first4B ? aligndata : 48'h0; // @[Mux.scala 27:72] wire [31:0] _T_697 = first4B ? aligndata : 32'h0; // @[Mux.scala 27:72]
wire [31:0] _T_696 = first2B ? decompressed_io_dout : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_698 = first2B ? decompressed_io_dout : 32'h0; // @[Mux.scala 27:72]
wire [47:0] _GEN_21 = {{16'd0}, _T_696}; // @[Mux.scala 27:72] wire [7:0] _T_703 = f0pc[8:1] ^ f0pc[16:9]; // @[el2_lib.scala 191:46]
wire [47:0] _T_697 = _T_695 | _GEN_21; // @[Mux.scala 27:72] wire [7:0] firstpc_hash = _T_703 ^ f0pc[24:17]; // @[el2_lib.scala 191:84]
wire [7:0] _T_701 = f0pc[8:1] ^ f0pc[16:9]; // @[el2_lib.scala 191:46] wire [7:0] _T_707 = secondpc[8:1] ^ secondpc[16:9]; // @[el2_lib.scala 191:46]
wire [7:0] firstpc_hash = _T_701 ^ f0pc[24:17]; // @[el2_lib.scala 191:84] wire [7:0] secondpc_hash = _T_707 ^ secondpc[24:17]; // @[el2_lib.scala 191:84]
wire [7:0] _T_705 = secondpc[8:1] ^ secondpc[16:9]; // @[el2_lib.scala 191:46] wire [4:0] _T_713 = f0pc[13:9] ^ f0pc[18:14]; // @[el2_lib.scala 182:111]
wire [7:0] secondpc_hash = _T_705 ^ secondpc[24:17]; // @[el2_lib.scala 191:84] wire [4:0] firstbrtag_hash = _T_713 ^ f0pc[23:19]; // @[el2_lib.scala 182:111]
wire [4:0] _T_711 = f0pc[13:9] ^ f0pc[18:14]; // @[el2_lib.scala 182:111] wire [4:0] _T_718 = secondpc[13:9] ^ secondpc[18:14]; // @[el2_lib.scala 182:111]
wire [4:0] firstbrtag_hash = _T_711 ^ f0pc[23:19]; // @[el2_lib.scala 182:111] wire [4:0] secondbrtag_hash = _T_718 ^ secondpc[23:19]; // @[el2_lib.scala 182:111]
wire [4:0] _T_716 = secondpc[13:9] ^ secondpc[18:14]; // @[el2_lib.scala 182:111] wire _T_720 = first2B & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:30]
wire [4:0] secondbrtag_hash = _T_716 ^ secondpc[23:19]; // @[el2_lib.scala 182:111] wire _T_722 = first4B & alignbrend[1]; // @[el2_ifu_aln_ctl.scala 378:58]
wire _T_718 = first2B & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:30] wire _T_723 = _T_720 | _T_722; // @[el2_ifu_aln_ctl.scala 378:47]
wire _T_720 = first4B & alignbrend[1]; // @[el2_ifu_aln_ctl.scala 378:58] wire _T_727 = _T_658 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:100]
wire _T_721 = _T_718 | _T_720; // @[el2_ifu_aln_ctl.scala 378:47] wire _T_730 = first2B & alignret[0]; // @[el2_ifu_aln_ctl.scala 380:29]
wire _T_725 = _T_656 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 378:100] wire _T_732 = first4B & alignret[1]; // @[el2_ifu_aln_ctl.scala 380:55]
wire _T_728 = first2B & alignret[0]; // @[el2_ifu_aln_ctl.scala 380:29] wire _T_735 = first2B & alignpc4[0]; // @[el2_ifu_aln_ctl.scala 382:29]
wire _T_730 = first4B & alignret[1]; // @[el2_ifu_aln_ctl.scala 380:55] wire _T_737 = first4B & alignpc4[1]; // @[el2_ifu_aln_ctl.scala 382:55]
wire _T_733 = first2B & alignpc4[0]; // @[el2_ifu_aln_ctl.scala 382:29] wire i0_brp_pc4 = _T_735 | _T_737; // @[el2_ifu_aln_ctl.scala 382:44]
wire _T_735 = first4B & alignpc4[1]; // @[el2_ifu_aln_ctl.scala 382:55] wire _T_739 = first2B | alignbrend[0]; // @[el2_ifu_aln_ctl.scala 384:33]
wire i0_brp_pc4 = _T_733 | _T_735; // @[el2_ifu_aln_ctl.scala 382:44] wire _T_745 = first2B & alignhist1[0]; // @[el2_ifu_aln_ctl.scala 386:34]
wire _T_737 = first2B | alignbrend[0]; // @[el2_ifu_aln_ctl.scala 384:33] wire _T_747 = first4B & alignhist1[1]; // @[el2_ifu_aln_ctl.scala 386:62]
wire _T_743 = first2B & alignhist1[0]; // @[el2_ifu_aln_ctl.scala 386:34] wire _T_748 = _T_745 | _T_747; // @[el2_ifu_aln_ctl.scala 386:51]
wire _T_745 = first4B & alignhist1[1]; // @[el2_ifu_aln_ctl.scala 386:62] wire _T_750 = first2B & alignhist0[0]; // @[el2_ifu_aln_ctl.scala 387:14]
wire _T_746 = _T_743 | _T_745; // @[el2_ifu_aln_ctl.scala 386:51] wire _T_752 = first4B & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 387:42]
wire _T_748 = first2B & alignhist0[0]; // @[el2_ifu_aln_ctl.scala 387:14] wire _T_753 = _T_750 | _T_752; // @[el2_ifu_aln_ctl.scala 387:31]
wire _T_750 = first4B & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 387:42]
wire _T_751 = _T_748 | _T_750; // @[el2_ifu_aln_ctl.scala 387:31]
wire i0_ends_f1 = first4B & _T_516; // @[el2_ifu_aln_ctl.scala 389:28] wire i0_ends_f1 = first4B & _T_516; // @[el2_ifu_aln_ctl.scala 389:28]
wire _T_767 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:42] wire _T_769 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:42]
wire _T_768 = _T_767 & first2B; // @[el2_ifu_aln_ctl.scala 398:56] wire _T_770 = _T_769 & first2B; // @[el2_ifu_aln_ctl.scala 398:56]
wire _T_769 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:89] wire _T_771 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 398:89]
wire _T_770 = io_i0_brp_valid & _T_769; // @[el2_ifu_aln_ctl.scala 398:87] wire _T_772 = io_i0_brp_valid & _T_771; // @[el2_ifu_aln_ctl.scala 398:87]
wire _T_771 = _T_770 & first4B; // @[el2_ifu_aln_ctl.scala 398:101] wire _T_773 = _T_772 & first4B; // @[el2_ifu_aln_ctl.scala 398:101]
el2_ifu_compress_ctl decompressed ( // @[el2_ifu_aln_ctl.scala 366:28] el2_ifu_compress_ctl decompressed ( // @[el2_ifu_aln_ctl.scala 366:28]
.io_din(decompressed_io_din), .io_din(decompressed_io_din),
.io_dout(decompressed_io_dout) .io_dout(decompressed_io_dout)
); );
assign io_ifu_i0_valid = _T_656 | _T_657; // @[el2_ifu_aln_ctl.scala 47:19 el2_ifu_aln_ctl.scala 352:19] assign io_ifu_i0_valid = _T_658 | _T_659; // @[el2_ifu_aln_ctl.scala 47:19 el2_ifu_aln_ctl.scala 352:19]
assign io_ifu_i0_icaf = _T_664 | _T_665; // @[el2_ifu_aln_ctl.scala 48:18 el2_ifu_aln_ctl.scala 354:18] assign io_ifu_i0_icaf = _T_666 | _T_667; // @[el2_ifu_aln_ctl.scala 48:18 el2_ifu_aln_ctl.scala 354:18]
assign io_ifu_i0_icaf_type = _T_678 ? f1ictype : f0ictype; // @[el2_ifu_aln_ctl.scala 49:23 el2_ifu_aln_ctl.scala 356:23] assign io_ifu_i0_icaf_type = _T_680 ? f1ictype : f0ictype; // @[el2_ifu_aln_ctl.scala 49:23 el2_ifu_aln_ctl.scala 356:23]
assign io_ifu_i0_icaf_f1 = _T_683 & _T_516; // @[el2_ifu_aln_ctl.scala 50:21 el2_ifu_aln_ctl.scala 360:21] assign io_ifu_i0_icaf_f1 = _T_685 & _T_516; // @[el2_ifu_aln_ctl.scala 50:21 el2_ifu_aln_ctl.scala 360:21]
assign io_ifu_i0_dbecc = _T_689 | _T_690; // @[el2_ifu_aln_ctl.scala 51:19 el2_ifu_aln_ctl.scala 362:19] assign io_ifu_i0_dbecc = _T_691 | _T_692; // @[el2_ifu_aln_ctl.scala 51:19 el2_ifu_aln_ctl.scala 362:19]
assign io_ifu_i0_instr = _T_697[31:0]; // @[el2_ifu_aln_ctl.scala 52:19 el2_ifu_aln_ctl.scala 368:19] assign io_ifu_i0_instr = _T_697 | _T_698; // @[el2_ifu_aln_ctl.scala 52:19 el2_ifu_aln_ctl.scala 368:19]
assign io_ifu_i0_pc = f0pc; // @[el2_ifu_aln_ctl.scala 53:16 el2_ifu_aln_ctl.scala 340:16] assign io_ifu_i0_pc = f0pc; // @[el2_ifu_aln_ctl.scala 53:16 el2_ifu_aln_ctl.scala 340:16]
assign io_ifu_i0_pc4 = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 54:17 el2_ifu_aln_ctl.scala 344:17] assign io_ifu_i0_pc4 = aligndata[1:0] == 2'h3; // @[el2_ifu_aln_ctl.scala 54:17 el2_ifu_aln_ctl.scala 344:17]
assign io_ifu_fb_consume1 = _T_313 & _T_1; // @[el2_ifu_aln_ctl.scala 55:22 el2_ifu_aln_ctl.scala 258:22] assign io_ifu_fb_consume1 = _T_313 & _T_1; // @[el2_ifu_aln_ctl.scala 55:22 el2_ifu_aln_ctl.scala 258:22]
assign io_ifu_fb_consume2 = _T_316 & _T_1; // @[el2_ifu_aln_ctl.scala 56:22 el2_ifu_aln_ctl.scala 259:22] assign io_ifu_fb_consume2 = _T_316 & _T_1; // @[el2_ifu_aln_ctl.scala 56:22 el2_ifu_aln_ctl.scala 259:22]
assign io_ifu_i0_bp_index = _T_737 ? firstpc_hash : secondpc_hash; // @[el2_ifu_aln_ctl.scala 57:22 el2_ifu_aln_ctl.scala 400:22] assign io_ifu_i0_bp_index = _T_739 ? firstpc_hash : secondpc_hash; // @[el2_ifu_aln_ctl.scala 57:22 el2_ifu_aln_ctl.scala 400:22]
assign io_ifu_i0_bp_fghr = i0_ends_f1 ? f1fghr : f0fghr; // @[el2_ifu_aln_ctl.scala 58:21 el2_ifu_aln_ctl.scala 402:21] assign io_ifu_i0_bp_fghr = i0_ends_f1 ? f1fghr : f0fghr; // @[el2_ifu_aln_ctl.scala 58:21 el2_ifu_aln_ctl.scala 402:21]
assign io_ifu_i0_bp_btag = _T_737 ? firstbrtag_hash : secondbrtag_hash; // @[el2_ifu_aln_ctl.scala 59:21 el2_ifu_aln_ctl.scala 404:21] assign io_ifu_i0_bp_btag = _T_739 ? firstbrtag_hash : secondbrtag_hash; // @[el2_ifu_aln_ctl.scala 59:21 el2_ifu_aln_ctl.scala 404:21]
assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_784; // @[el2_ifu_aln_ctl.scala 60:28 el2_ifu_aln_ctl.scala 410:28] assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_786; // @[el2_ifu_aln_ctl.scala 60:28 el2_ifu_aln_ctl.scala 410:28]
assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 61:19 el2_ifu_aln_ctl.scala 346:19] assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 61:19 el2_ifu_aln_ctl.scala 346:19]
assign io_i0_brp_valid = _T_721 | _T_725; // @[el2_ifu_aln_ctl.scala 378:19] assign io_i0_brp_valid = _T_723 | _T_727; // @[el2_ifu_aln_ctl.scala 378:19]
assign io_i0_brp_toffset = i0_ends_f1 ? f1poffset : f0poffset; // @[el2_ifu_aln_ctl.scala 390:21] assign io_i0_brp_toffset = i0_ends_f1 ? f1poffset : f0poffset; // @[el2_ifu_aln_ctl.scala 390:21]
assign io_i0_brp_hist = {_T_746,_T_751}; // @[el2_ifu_aln_ctl.scala 386:18] assign io_i0_brp_hist = {_T_748,_T_753}; // @[el2_ifu_aln_ctl.scala 386:18]
assign io_i0_brp_br_error = _T_768 | _T_771; // @[el2_ifu_aln_ctl.scala 398:22] assign io_i0_brp_br_error = _T_770 | _T_773; // @[el2_ifu_aln_ctl.scala 398:22]
assign io_i0_brp_br_start_error = _T_656 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 394:29] assign io_i0_brp_br_start_error = _T_658 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 394:29]
assign io_i0_brp_bank = _T_737 ? f0pc[1] : secondpc[1]; // @[el2_ifu_aln_ctl.scala 396:29] assign io_i0_brp_bank = _T_739 ? f0pc[1] : secondpc[1]; // @[el2_ifu_aln_ctl.scala 396:29]
assign io_i0_brp_prett = i0_ends_f1 ? f1prett : f0prett; // @[el2_ifu_aln_ctl.scala 392:19] assign io_i0_brp_prett = i0_ends_f1 ? f1prett : f0prett; // @[el2_ifu_aln_ctl.scala 392:19]
assign io_i0_brp_way = _T_737 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 384:17] assign io_i0_brp_way = _T_739 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 384:17]
assign io_i0_brp_ret = _T_728 | _T_730; // @[el2_ifu_aln_ctl.scala 380:17] assign io_i0_brp_ret = _T_730 | _T_732; // @[el2_ifu_aln_ctl.scala 380:17]
assign decompressed_io_din = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 406:23] assign decompressed_io_din = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 406:23]
`ifdef RANDOMIZE_GARBAGE_ASSIGN `ifdef RANDOMIZE_GARBAGE_ASSIGN
`define RANDOMIZE `define RANDOMIZE

2
src/main/scala/ifu/el2_ifu_aln_ctl.scala
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@ -313,7 +313,7 @@ class el2_ifu_aln_ctl extends Module with el2_lib {
q1final := Mux1H(Seq(q1sel(0).asBool->q1eff(15,0), q1sel(1).asBool->q1eff(31,16))) q1final := Mux1H(Seq(q1sel(0).asBool->q1eff(15,0), q1sel(1).asBool->q1eff(31,16)))
val aligndata = Mux1H(Seq(f0val(0).asBool -> q0final, (~f0val(1) & f0val(0)).asBool -> Cat(q1final,q0final))) val aligndata = Mux1H(Seq(f0val(0).asBool -> q0final, (~f0val(1) & f0val(0)).asBool -> Cat(q1final(15,0),q0final(15,0))))
alignval := Mux1H(Seq(f0val(1).asBool->3.U, (!f0val(1) & f0val(0)) -> Cat(f1val(0),1.U))) alignval := Mux1H(Seq(f0val(1).asBool->3.U, (!f0val(1) & f0val(0)) -> Cat(f1val(0),1.U)))

BIN
target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class
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