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Bus buffer updated

This commit is contained in:
​Laraib Khan 2020-11-20 11:32:39 +05:00
parent 2b59a630d6
commit 7dc1174c9a
3 changed files with 182 additions and 182 deletions
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168
el2_lsu_bus_buffer.fir
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@ -1295,16 +1295,16 @@ circuit el2_lsu_bus_buffer :
node _T_798 = eq(_T_797, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 244:54] node _T_798 = eq(_T_797, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 244:54]
node _T_799 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 245:19] node _T_799 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 245:19]
node _T_800 = eq(_T_799, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 245:24] node _T_800 = eq(_T_799, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 245:24]
node _T_801 = bits(io.store_data_r, 31, 8) @[el2_lsu_bus_buffer.scala 245:63] node _T_801 = bits(io.store_data_r, 31, 24) @[el2_lsu_bus_buffer.scala 245:64]
node _T_802 = cat(UInt<8>("h00"), _T_801) @[Cat.scala 29:58] node _T_802 = cat(UInt<24>("h00"), _T_801) @[Cat.scala 29:58]
node _T_803 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 246:19] node _T_803 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 246:19]
node _T_804 = eq(_T_803, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 246:24] node _T_804 = eq(_T_803, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 246:24]
node _T_805 = bits(io.store_data_r, 31, 16) @[el2_lsu_bus_buffer.scala 246:63] node _T_805 = bits(io.store_data_r, 31, 16) @[el2_lsu_bus_buffer.scala 246:63]
node _T_806 = cat(UInt<16>("h00"), _T_805) @[Cat.scala 29:58] node _T_806 = cat(UInt<16>("h00"), _T_805) @[Cat.scala 29:58]
node _T_807 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 247:19] node _T_807 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 247:19]
node _T_808 = eq(_T_807, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 247:24] node _T_808 = eq(_T_807, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 247:24]
node _T_809 = bits(io.store_data_r, 31, 24) @[el2_lsu_bus_buffer.scala 247:63] node _T_809 = bits(io.store_data_r, 31, 8) @[el2_lsu_bus_buffer.scala 247:62]
node _T_810 = cat(UInt<24>("h00"), _T_809) @[Cat.scala 29:58] node _T_810 = cat(UInt<8>("h00"), _T_809) @[Cat.scala 29:58]
node _T_811 = mux(_T_798, UInt<32>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] node _T_811 = mux(_T_798, UInt<32>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_812 = mux(_T_800, _T_802, UInt<1>("h00")) @[Mux.scala 27:72] node _T_812 = mux(_T_800, _T_802, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_813 = mux(_T_804, _T_806, UInt<1>("h00")) @[Mux.scala 27:72] node _T_813 = mux(_T_804, _T_806, UInt<1>("h00")) @[Mux.scala 27:72]
@ -1671,8 +1671,8 @@ circuit el2_lsu_bus_buffer :
node _T_1056 = orr(buf_numvld_cmd_any) @[el2_lsu_bus_buffer.scala 318:75] node _T_1056 = orr(buf_numvld_cmd_any) @[el2_lsu_bus_buffer.scala 318:75]
node _T_1057 = lt(obuf_wr_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 318:95] node _T_1057 = lt(obuf_wr_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 318:95]
node _T_1058 = and(_T_1056, _T_1057) @[el2_lsu_bus_buffer.scala 318:79] node _T_1058 = and(_T_1056, _T_1057) @[el2_lsu_bus_buffer.scala 318:79]
node _T_1059 = add(obuf_wr_timer, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 318:121] node _T_1059 = add(obuf_wr_timer, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 318:123]
node _T_1060 = tail(_T_1059, 1) @[el2_lsu_bus_buffer.scala 318:121] node _T_1060 = tail(_T_1059, 1) @[el2_lsu_bus_buffer.scala 318:123]
node _T_1061 = mux(_T_1058, _T_1060, obuf_wr_timer) @[el2_lsu_bus_buffer.scala 318:55] node _T_1061 = mux(_T_1058, _T_1060, obuf_wr_timer) @[el2_lsu_bus_buffer.scala 318:55]
node obuf_wr_timer_in = mux(obuf_wr_en, UInt<3>("h00"), _T_1061) @[el2_lsu_bus_buffer.scala 318:29] node obuf_wr_timer_in = mux(obuf_wr_en, UInt<3>("h00"), _T_1061) @[el2_lsu_bus_buffer.scala 318:29]
node _T_1062 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 319:41] node _T_1062 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 319:41]
@ -2041,7 +2041,7 @@ circuit el2_lsu_bus_buffer :
wire obuf_tag0 : UInt<3> wire obuf_tag0 : UInt<3>
obuf_tag0 <= UInt<1>("h00") obuf_tag0 <= UInt<1>("h00")
node _T_1335 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 372:46] node _T_1335 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 372:46]
node _T_1336 = or(bus_cmd_sent, _T_1335) @[el2_lsu_bus_buffer.scala 372:44] node _T_1336 = and(bus_cmd_sent, _T_1335) @[el2_lsu_bus_buffer.scala 372:44]
node obuf_rdrsp_tag_in = mux(_T_1336, obuf_tag0, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 372:30] node obuf_rdrsp_tag_in = mux(_T_1336, obuf_tag0, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 372:30]
wire obuf_addr : UInt<32> wire obuf_addr : UInt<32>
obuf_addr <= UInt<1>("h00") obuf_addr <= UInt<1>("h00")
@ -6098,25 +6098,25 @@ circuit el2_lsu_bus_buffer :
node _T_4653 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 592:101] node _T_4653 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 592:101]
node _T_4654 = eq(_T_4653, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:91] node _T_4654 = eq(_T_4653, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:91]
node _T_4655 = and(_T_4652, _T_4654) @[el2_lsu_bus_buffer.scala 592:89] node _T_4655 = and(_T_4652, _T_4654) @[el2_lsu_bus_buffer.scala 592:89]
node _T_4656 = or(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 592:120] node _T_4656 = and(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 592:120]
node _T_4657 = and(_T_4655, _T_4656) @[el2_lsu_bus_buffer.scala 592:105] node _T_4657 = and(_T_4655, _T_4656) @[el2_lsu_bus_buffer.scala 592:105]
node _T_4658 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 592:78] node _T_4658 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 592:78]
node _T_4659 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 592:101] node _T_4659 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 592:101]
node _T_4660 = eq(_T_4659, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:91] node _T_4660 = eq(_T_4659, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:91]
node _T_4661 = and(_T_4658, _T_4660) @[el2_lsu_bus_buffer.scala 592:89] node _T_4661 = and(_T_4658, _T_4660) @[el2_lsu_bus_buffer.scala 592:89]
node _T_4662 = or(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 592:120] node _T_4662 = and(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 592:120]
node _T_4663 = and(_T_4661, _T_4662) @[el2_lsu_bus_buffer.scala 592:105] node _T_4663 = and(_T_4661, _T_4662) @[el2_lsu_bus_buffer.scala 592:105]
node _T_4664 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 592:78] node _T_4664 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 592:78]
node _T_4665 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 592:101] node _T_4665 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 592:101]
node _T_4666 = eq(_T_4665, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:91] node _T_4666 = eq(_T_4665, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:91]
node _T_4667 = and(_T_4664, _T_4666) @[el2_lsu_bus_buffer.scala 592:89] node _T_4667 = and(_T_4664, _T_4666) @[el2_lsu_bus_buffer.scala 592:89]
node _T_4668 = or(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 592:120] node _T_4668 = and(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 592:120]
node _T_4669 = and(_T_4667, _T_4668) @[el2_lsu_bus_buffer.scala 592:105] node _T_4669 = and(_T_4667, _T_4668) @[el2_lsu_bus_buffer.scala 592:105]
node _T_4670 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 592:78] node _T_4670 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 592:78]
node _T_4671 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 592:101] node _T_4671 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 592:101]
node _T_4672 = eq(_T_4671, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:91] node _T_4672 = eq(_T_4671, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:91]
node _T_4673 = and(_T_4670, _T_4672) @[el2_lsu_bus_buffer.scala 592:89] node _T_4673 = and(_T_4670, _T_4672) @[el2_lsu_bus_buffer.scala 592:89]
node _T_4674 = or(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 592:120] node _T_4674 = and(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 592:120]
node _T_4675 = and(_T_4673, _T_4674) @[el2_lsu_bus_buffer.scala 592:105] node _T_4675 = and(_T_4673, _T_4674) @[el2_lsu_bus_buffer.scala 592:105]
node _T_4676 = mux(_T_4657, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] node _T_4676 = mux(_T_4657, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4677 = mux(_T_4663, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] node _T_4677 = mux(_T_4663, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
@ -6432,82 +6432,76 @@ circuit el2_lsu_bus_buffer :
wire _T_4931 : UInt<1> @[Mux.scala 27:72] wire _T_4931 : UInt<1> @[Mux.scala 27:72]
_T_4931 <= _T_4930 @[Mux.scala 27:72] _T_4931 <= _T_4930 @[Mux.scala 27:72]
io.lsu_imprecise_error_store_any <= _T_4931 @[el2_lsu_bus_buffer.scala 652:36] io.lsu_imprecise_error_store_any <= _T_4931 @[el2_lsu_bus_buffer.scala 652:36]
node _T_4932 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 653:87] node _T_4932 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 653:82]
node _T_4933 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 653:109] node _T_4933 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 653:104]
node _T_4934 = and(_T_4932, _T_4933) @[el2_lsu_bus_buffer.scala 653:98] node _T_4934 = and(_T_4932, _T_4933) @[el2_lsu_bus_buffer.scala 653:93]
node _T_4935 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 653:124] node _T_4935 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 653:119]
node _T_4936 = and(_T_4934, _T_4935) @[el2_lsu_bus_buffer.scala 653:113] node _T_4936 = and(_T_4934, _T_4935) @[el2_lsu_bus_buffer.scala 653:108]
node _T_4937 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 653:87] node _T_4937 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 653:82]
node _T_4938 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 653:109] node _T_4938 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 653:104]
node _T_4939 = and(_T_4937, _T_4938) @[el2_lsu_bus_buffer.scala 653:98] node _T_4939 = and(_T_4937, _T_4938) @[el2_lsu_bus_buffer.scala 653:93]
node _T_4940 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 653:124] node _T_4940 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 653:119]
node _T_4941 = and(_T_4939, _T_4940) @[el2_lsu_bus_buffer.scala 653:113] node _T_4941 = and(_T_4939, _T_4940) @[el2_lsu_bus_buffer.scala 653:108]
node _T_4942 = mux(_T_4936, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] node _T_4942 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 653:82]
node _T_4943 = mux(_T_4941, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] node _T_4943 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 653:104]
node _T_4944 = or(_T_4942, _T_4943) @[Mux.scala 27:72] node _T_4944 = and(_T_4942, _T_4943) @[el2_lsu_bus_buffer.scala 653:93]
wire lsu_imprecise_error_store_tag : UInt<1> @[Mux.scala 27:72] node _T_4945 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 653:119]
lsu_imprecise_error_store_tag <= _T_4944 @[Mux.scala 27:72] node _T_4946 = and(_T_4944, _T_4945) @[el2_lsu_bus_buffer.scala 653:108]
node _T_4945 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 655:72] node _T_4947 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 653:82]
node _T_4946 = and(io.lsu_nonblock_load_data_error, _T_4945) @[el2_lsu_bus_buffer.scala 655:70] node _T_4948 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 653:104]
io.lsu_imprecise_error_load_any <= _T_4946 @[el2_lsu_bus_buffer.scala 655:35] node _T_4949 = and(_T_4947, _T_4948) @[el2_lsu_bus_buffer.scala 653:93]
node _T_4947 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 112:123] node _T_4950 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 653:119]
node _T_4948 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 112:123] node _T_4951 = and(_T_4949, _T_4950) @[el2_lsu_bus_buffer.scala 653:108]
node _T_4949 = mux(_T_4947, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] node _T_4952 = mux(_T_4936, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4950 = mux(_T_4948, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] node _T_4953 = mux(_T_4941, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_4951 = or(_T_4949, _T_4950) @[Mux.scala 27:72] node _T_4954 = mux(_T_4946, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
wire _T_4952 : UInt<32> @[Mux.scala 27:72] node _T_4955 = mux(_T_4951, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
_T_4952 <= _T_4951 @[Mux.scala 27:72] node _T_4956 = or(_T_4952, _T_4953) @[Mux.scala 27:72]
node _T_4953 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 112:123] node _T_4957 = or(_T_4956, _T_4954) @[Mux.scala 27:72]
node _T_4954 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 112:123] node _T_4958 = or(_T_4957, _T_4955) @[Mux.scala 27:72]
node _T_4955 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 112:123] wire lsu_imprecise_error_store_tag : UInt<2> @[Mux.scala 27:72]
node _T_4956 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 112:123] lsu_imprecise_error_store_tag <= _T_4958 @[Mux.scala 27:72]
node _T_4957 = mux(_T_4953, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] node _T_4959 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 655:72]
node _T_4958 = mux(_T_4954, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] node _T_4960 = and(io.lsu_nonblock_load_data_error, _T_4959) @[el2_lsu_bus_buffer.scala 655:70]
node _T_4959 = mux(_T_4955, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] io.lsu_imprecise_error_load_any <= _T_4960 @[el2_lsu_bus_buffer.scala 655:35]
node _T_4960 = mux(_T_4956, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] node _T_4961 = mux(io.lsu_imprecise_error_store_any, buf_addr[lsu_imprecise_error_store_tag], buf_addr[io.lsu_nonblock_load_data_tag]) @[el2_lsu_bus_buffer.scala 656:41]
node _T_4961 = or(_T_4957, _T_4958) @[Mux.scala 27:72] io.lsu_imprecise_error_addr_any <= _T_4961 @[el2_lsu_bus_buffer.scala 656:35]
node _T_4962 = or(_T_4961, _T_4959) @[Mux.scala 27:72]
node _T_4963 = or(_T_4962, _T_4960) @[Mux.scala 27:72]
wire _T_4964 : UInt<32> @[Mux.scala 27:72]
_T_4964 <= _T_4963 @[Mux.scala 27:72]
node _T_4965 = mux(io.lsu_imprecise_error_store_any, _T_4952, _T_4964) @[el2_lsu_bus_buffer.scala 656:41]
io.lsu_imprecise_error_addr_any <= _T_4965 @[el2_lsu_bus_buffer.scala 656:35]
lsu_bus_cntr_overflow <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 657:25] lsu_bus_cntr_overflow <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 657:25]
io.lsu_bus_idle_any <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 659:23] io.lsu_bus_idle_any <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 659:23]
node _T_4966 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 662:46] node _T_4962 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 662:46]
node _T_4967 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 662:89] node _T_4963 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 662:89]
node _T_4968 = or(_T_4966, _T_4967) @[el2_lsu_bus_buffer.scala 662:68] node _T_4964 = or(_T_4962, _T_4963) @[el2_lsu_bus_buffer.scala 662:68]
node _T_4969 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 662:132] node _T_4965 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 662:132]
node _T_4970 = or(_T_4968, _T_4969) @[el2_lsu_bus_buffer.scala 662:110] node _T_4966 = or(_T_4964, _T_4965) @[el2_lsu_bus_buffer.scala 662:110]
io.lsu_pmu_bus_trxn <= _T_4970 @[el2_lsu_bus_buffer.scala 662:23] io.lsu_pmu_bus_trxn <= _T_4966 @[el2_lsu_bus_buffer.scala 662:23]
node _T_4971 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 663:48] node _T_4967 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 663:48]
node _T_4972 = and(_T_4971, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 663:65] node _T_4968 = and(_T_4967, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 663:65]
io.lsu_pmu_bus_misaligned <= _T_4972 @[el2_lsu_bus_buffer.scala 663:29] io.lsu_pmu_bus_misaligned <= _T_4968 @[el2_lsu_bus_buffer.scala 663:29]
node _T_4973 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 664:59] node _T_4969 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 664:59]
io.lsu_pmu_bus_error <= _T_4973 @[el2_lsu_bus_buffer.scala 664:24] io.lsu_pmu_bus_error <= _T_4969 @[el2_lsu_bus_buffer.scala 664:24]
node _T_4974 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 666:48] node _T_4970 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 666:48]
node _T_4975 = and(io.lsu_axi_awvalid, _T_4974) @[el2_lsu_bus_buffer.scala 666:46] node _T_4971 = and(io.lsu_axi_awvalid, _T_4970) @[el2_lsu_bus_buffer.scala 666:46]
node _T_4976 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 666:92] node _T_4972 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 666:92]
node _T_4977 = and(io.lsu_axi_wvalid, _T_4976) @[el2_lsu_bus_buffer.scala 666:90] node _T_4973 = and(io.lsu_axi_wvalid, _T_4972) @[el2_lsu_bus_buffer.scala 666:90]
node _T_4978 = or(_T_4975, _T_4977) @[el2_lsu_bus_buffer.scala 666:69] node _T_4974 = or(_T_4971, _T_4973) @[el2_lsu_bus_buffer.scala 666:69]
node _T_4979 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 666:136] node _T_4975 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 666:136]
node _T_4980 = and(io.lsu_axi_arvalid, _T_4979) @[el2_lsu_bus_buffer.scala 666:134] node _T_4976 = and(io.lsu_axi_arvalid, _T_4975) @[el2_lsu_bus_buffer.scala 666:134]
node _T_4981 = or(_T_4978, _T_4980) @[el2_lsu_bus_buffer.scala 666:112] node _T_4977 = or(_T_4974, _T_4976) @[el2_lsu_bus_buffer.scala 666:112]
io.lsu_pmu_bus_busy <= _T_4981 @[el2_lsu_bus_buffer.scala 666:23] io.lsu_pmu_bus_busy <= _T_4977 @[el2_lsu_bus_buffer.scala 666:23]
reg _T_4982 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 668:49] reg _T_4978 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 668:49]
_T_4982 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 668:49] _T_4978 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 668:49]
WrPtr0_r <= _T_4982 @[el2_lsu_bus_buffer.scala 668:12] WrPtr0_r <= _T_4978 @[el2_lsu_bus_buffer.scala 668:12]
reg _T_4983 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 669:49] reg _T_4979 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 669:49]
_T_4983 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 669:49] _T_4979 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 669:49]
WrPtr1_r <= _T_4983 @[el2_lsu_bus_buffer.scala 669:12] WrPtr1_r <= _T_4979 @[el2_lsu_bus_buffer.scala 669:12]
node _T_4984 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 670:75] node _T_4980 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 670:75]
node _T_4985 = and(io.lsu_busreq_m, _T_4984) @[el2_lsu_bus_buffer.scala 670:73] node _T_4981 = and(io.lsu_busreq_m, _T_4980) @[el2_lsu_bus_buffer.scala 670:73]
node _T_4986 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 670:89] node _T_4982 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 670:89]
node _T_4987 = and(_T_4985, _T_4986) @[el2_lsu_bus_buffer.scala 670:87] node _T_4983 = and(_T_4981, _T_4982) @[el2_lsu_bus_buffer.scala 670:87]
reg _T_4988 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 670:56] reg _T_4984 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 670:56]
_T_4988 <= _T_4987 @[el2_lsu_bus_buffer.scala 670:56] _T_4984 <= _T_4983 @[el2_lsu_bus_buffer.scala 670:56]
io.lsu_busreq_r <= _T_4988 @[el2_lsu_bus_buffer.scala 670:19] io.lsu_busreq_r <= _T_4984 @[el2_lsu_bus_buffer.scala 670:19]
reg _T_4989 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 671:66] reg _T_4985 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 671:66]
_T_4989 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 671:66] _T_4985 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 671:66]
lsu_nonblock_load_valid_r <= _T_4989 @[el2_lsu_bus_buffer.scala 671:29] lsu_nonblock_load_valid_r <= _T_4985 @[el2_lsu_bus_buffer.scala 671:29]

196
el2_lsu_bus_buffer.v
View File

@ -373,8 +373,8 @@ module el2_lsu_bus_buffer(
wire _T_4141 = obuf_tag0 == 3'h3; // @[el2_lsu_bus_buffer.scala 508:48] wire _T_4141 = obuf_tag0 == 3'h3; // @[el2_lsu_bus_buffer.scala 508:48]
reg obuf_merge; // @[Reg.scala 27:20] reg obuf_merge; // @[Reg.scala 27:20]
reg [1:0] obuf_tag1; // @[Reg.scala 27:20] reg [1:0] obuf_tag1; // @[Reg.scala 27:20]
wire [2:0] _GEN_350 = {{1'd0}, obuf_tag1}; // @[el2_lsu_bus_buffer.scala 508:104] wire [2:0] _GEN_358 = {{1'd0}, obuf_tag1}; // @[el2_lsu_bus_buffer.scala 508:104]
wire _T_4142 = _GEN_350 == 3'h3; // @[el2_lsu_bus_buffer.scala 508:104] wire _T_4142 = _GEN_358 == 3'h3; // @[el2_lsu_bus_buffer.scala 508:104]
wire _T_4143 = obuf_merge & _T_4142; // @[el2_lsu_bus_buffer.scala 508:91] wire _T_4143 = obuf_merge & _T_4142; // @[el2_lsu_bus_buffer.scala 508:91]
wire _T_4144 = _T_4141 | _T_4143; // @[el2_lsu_bus_buffer.scala 508:77] wire _T_4144 = _T_4141 | _T_4143; // @[el2_lsu_bus_buffer.scala 508:77]
reg obuf_valid; // @[el2_lsu_bus_buffer.scala 399:54] reg obuf_valid; // @[el2_lsu_bus_buffer.scala 399:54]
@ -392,7 +392,7 @@ module el2_lsu_bus_buffer(
wire _T_3937 = 3'h1 == buf_state_2; // @[Conditional.scala 37:30] wire _T_3937 = 3'h1 == buf_state_2; // @[Conditional.scala 37:30]
wire _T_3941 = 3'h2 == buf_state_2; // @[Conditional.scala 37:30] wire _T_3941 = 3'h2 == buf_state_2; // @[Conditional.scala 37:30]
wire _T_3948 = obuf_tag0 == 3'h2; // @[el2_lsu_bus_buffer.scala 508:48] wire _T_3948 = obuf_tag0 == 3'h2; // @[el2_lsu_bus_buffer.scala 508:48]
wire _T_3949 = _GEN_350 == 3'h2; // @[el2_lsu_bus_buffer.scala 508:104] wire _T_3949 = _GEN_358 == 3'h2; // @[el2_lsu_bus_buffer.scala 508:104]
wire _T_3950 = obuf_merge & _T_3949; // @[el2_lsu_bus_buffer.scala 508:91] wire _T_3950 = obuf_merge & _T_3949; // @[el2_lsu_bus_buffer.scala 508:91]
wire _T_3951 = _T_3948 | _T_3950; // @[el2_lsu_bus_buffer.scala 508:77] wire _T_3951 = _T_3948 | _T_3950; // @[el2_lsu_bus_buffer.scala 508:77]
wire _T_3952 = _T_3951 & obuf_valid; // @[el2_lsu_bus_buffer.scala 508:135] wire _T_3952 = _T_3951 & obuf_valid; // @[el2_lsu_bus_buffer.scala 508:135]
@ -408,7 +408,7 @@ module el2_lsu_bus_buffer(
wire _T_3744 = 3'h1 == buf_state_1; // @[Conditional.scala 37:30] wire _T_3744 = 3'h1 == buf_state_1; // @[Conditional.scala 37:30]
wire _T_3748 = 3'h2 == buf_state_1; // @[Conditional.scala 37:30] wire _T_3748 = 3'h2 == buf_state_1; // @[Conditional.scala 37:30]
wire _T_3755 = obuf_tag0 == 3'h1; // @[el2_lsu_bus_buffer.scala 508:48] wire _T_3755 = obuf_tag0 == 3'h1; // @[el2_lsu_bus_buffer.scala 508:48]
wire _T_3756 = _GEN_350 == 3'h1; // @[el2_lsu_bus_buffer.scala 508:104] wire _T_3756 = _GEN_358 == 3'h1; // @[el2_lsu_bus_buffer.scala 508:104]
wire _T_3757 = obuf_merge & _T_3756; // @[el2_lsu_bus_buffer.scala 508:91] wire _T_3757 = obuf_merge & _T_3756; // @[el2_lsu_bus_buffer.scala 508:91]
wire _T_3758 = _T_3755 | _T_3757; // @[el2_lsu_bus_buffer.scala 508:77] wire _T_3758 = _T_3755 | _T_3757; // @[el2_lsu_bus_buffer.scala 508:77]
wire _T_3759 = _T_3758 & obuf_valid; // @[el2_lsu_bus_buffer.scala 508:135] wire _T_3759 = _T_3758 & obuf_valid; // @[el2_lsu_bus_buffer.scala 508:135]
@ -424,7 +424,7 @@ module el2_lsu_bus_buffer(
wire _T_3551 = 3'h1 == buf_state_0; // @[Conditional.scala 37:30] wire _T_3551 = 3'h1 == buf_state_0; // @[Conditional.scala 37:30]
wire _T_3555 = 3'h2 == buf_state_0; // @[Conditional.scala 37:30] wire _T_3555 = 3'h2 == buf_state_0; // @[Conditional.scala 37:30]
wire _T_3562 = obuf_tag0 == 3'h0; // @[el2_lsu_bus_buffer.scala 508:48] wire _T_3562 = obuf_tag0 == 3'h0; // @[el2_lsu_bus_buffer.scala 508:48]
wire _T_3563 = _GEN_350 == 3'h0; // @[el2_lsu_bus_buffer.scala 508:104] wire _T_3563 = _GEN_358 == 3'h0; // @[el2_lsu_bus_buffer.scala 508:104]
wire _T_3564 = obuf_merge & _T_3563; // @[el2_lsu_bus_buffer.scala 508:91] wire _T_3564 = obuf_merge & _T_3563; // @[el2_lsu_bus_buffer.scala 508:91]
wire _T_3565 = _T_3562 | _T_3564; // @[el2_lsu_bus_buffer.scala 508:77] wire _T_3565 = _T_3562 | _T_3564; // @[el2_lsu_bus_buffer.scala 508:77]
wire _T_3566 = _T_3565 & obuf_valid; // @[el2_lsu_bus_buffer.scala 508:135] wire _T_3566 = _T_3565 & obuf_valid; // @[el2_lsu_bus_buffer.scala 508:135]
@ -891,9 +891,9 @@ module el2_lsu_bus_buffer(
wire [3:0] _T_794 = _T_790 | _T_791; // @[Mux.scala 27:72] wire [3:0] _T_794 = _T_790 | _T_791; // @[Mux.scala 27:72]
wire [3:0] _T_795 = _T_794 | _T_792; // @[Mux.scala 27:72] wire [3:0] _T_795 = _T_794 | _T_792; // @[Mux.scala 27:72]
wire [3:0] ldst_byteen_lo_r = _T_795 | _T_793; // @[Mux.scala 27:72] wire [3:0] ldst_byteen_lo_r = _T_795 | _T_793; // @[Mux.scala 27:72]
wire [31:0] _T_802 = {8'h0,io_store_data_r[31:8]}; // @[Cat.scala 29:58] wire [31:0] _T_802 = {24'h0,io_store_data_r[31:24]}; // @[Cat.scala 29:58]
wire [31:0] _T_806 = {16'h0,io_store_data_r[31:16]}; // @[Cat.scala 29:58] wire [31:0] _T_806 = {16'h0,io_store_data_r[31:16]}; // @[Cat.scala 29:58]
wire [31:0] _T_810 = {24'h0,io_store_data_r[31:24]}; // @[Cat.scala 29:58] wire [31:0] _T_810 = {8'h0,io_store_data_r[31:8]}; // @[Cat.scala 29:58]
wire [31:0] _T_812 = _T_758 ? _T_802 : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_812 = _T_758 ? _T_802 : 32'h0; // @[Mux.scala 27:72]
wire [31:0] _T_813 = _T_762 ? _T_806 : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_813 = _T_762 ? _T_806 : 32'h0; // @[Mux.scala 27:72]
wire [31:0] _T_814 = _T_766 ? _T_810 : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_814 = _T_766 ? _T_810 : 32'h0; // @[Mux.scala 27:72]
@ -1009,23 +1009,23 @@ module el2_lsu_bus_buffer(
wire _T_4436 = buf_write[1] & _T_2611; // @[el2_lsu_bus_buffer.scala 575:64] wire _T_4436 = buf_write[1] & _T_2611; // @[el2_lsu_bus_buffer.scala 575:64]
wire _T_4437 = ~buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 575:91] wire _T_4437 = ~buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 575:91]
wire _T_4438 = _T_4436 & _T_4437; // @[el2_lsu_bus_buffer.scala 575:89] wire _T_4438 = _T_4436 & _T_4437; // @[el2_lsu_bus_buffer.scala 575:89]
wire [1:0] _GEN_354 = {{1'd0}, _T_4438}; // @[el2_lsu_bus_buffer.scala 575:142] wire [1:0] _GEN_362 = {{1'd0}, _T_4438}; // @[el2_lsu_bus_buffer.scala 575:142]
wire [2:0] _T_4450 = _T_4449 + _GEN_354; // @[el2_lsu_bus_buffer.scala 575:142] wire [2:0] _T_4450 = _T_4449 + _GEN_362; // @[el2_lsu_bus_buffer.scala 575:142]
wire _T_4431 = buf_write[0] & _T_2606; // @[el2_lsu_bus_buffer.scala 575:64] wire _T_4431 = buf_write[0] & _T_2606; // @[el2_lsu_bus_buffer.scala 575:64]
wire _T_4432 = ~buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 575:91] wire _T_4432 = ~buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 575:91]
wire _T_4433 = _T_4431 & _T_4432; // @[el2_lsu_bus_buffer.scala 575:89] wire _T_4433 = _T_4431 & _T_4432; // @[el2_lsu_bus_buffer.scala 575:89]
wire [2:0] _GEN_355 = {{2'd0}, _T_4433}; // @[el2_lsu_bus_buffer.scala 575:142] wire [2:0] _GEN_363 = {{2'd0}, _T_4433}; // @[el2_lsu_bus_buffer.scala 575:142]
wire [3:0] buf_numvld_wrcmd_any = _T_4450 + _GEN_355; // @[el2_lsu_bus_buffer.scala 575:142] wire [3:0] buf_numvld_wrcmd_any = _T_4450 + _GEN_363; // @[el2_lsu_bus_buffer.scala 575:142]
wire _T_1016 = buf_numvld_wrcmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 315:43] wire _T_1016 = buf_numvld_wrcmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 315:43]
wire _T_4463 = _T_2621 & _T_4447; // @[el2_lsu_bus_buffer.scala 576:73] wire _T_4463 = _T_2621 & _T_4447; // @[el2_lsu_bus_buffer.scala 576:73]
wire _T_4460 = _T_2616 & _T_4442; // @[el2_lsu_bus_buffer.scala 576:73] wire _T_4460 = _T_2616 & _T_4442; // @[el2_lsu_bus_buffer.scala 576:73]
wire [1:0] _T_4464 = _T_4463 + _T_4460; // @[el2_lsu_bus_buffer.scala 576:126] wire [1:0] _T_4464 = _T_4463 + _T_4460; // @[el2_lsu_bus_buffer.scala 576:126]
wire _T_4457 = _T_2611 & _T_4437; // @[el2_lsu_bus_buffer.scala 576:73] wire _T_4457 = _T_2611 & _T_4437; // @[el2_lsu_bus_buffer.scala 576:73]
wire [1:0] _GEN_356 = {{1'd0}, _T_4457}; // @[el2_lsu_bus_buffer.scala 576:126] wire [1:0] _GEN_364 = {{1'd0}, _T_4457}; // @[el2_lsu_bus_buffer.scala 576:126]
wire [2:0] _T_4465 = _T_4464 + _GEN_356; // @[el2_lsu_bus_buffer.scala 576:126] wire [2:0] _T_4465 = _T_4464 + _GEN_364; // @[el2_lsu_bus_buffer.scala 576:126]
wire _T_4454 = _T_2606 & _T_4432; // @[el2_lsu_bus_buffer.scala 576:73] wire _T_4454 = _T_2606 & _T_4432; // @[el2_lsu_bus_buffer.scala 576:73]
wire [2:0] _GEN_357 = {{2'd0}, _T_4454}; // @[el2_lsu_bus_buffer.scala 576:126] wire [2:0] _GEN_365 = {{2'd0}, _T_4454}; // @[el2_lsu_bus_buffer.scala 576:126]
wire [3:0] buf_numvld_cmd_any = _T_4465 + _GEN_357; // @[el2_lsu_bus_buffer.scala 576:126] wire [3:0] buf_numvld_cmd_any = _T_4465 + _GEN_365; // @[el2_lsu_bus_buffer.scala 576:126]
wire _T_1017 = buf_numvld_cmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 315:72] wire _T_1017 = buf_numvld_cmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 315:72]
wire _T_1018 = _T_1016 & _T_1017; // @[el2_lsu_bus_buffer.scala 315:51] wire _T_1018 = _T_1016 & _T_1017; // @[el2_lsu_bus_buffer.scala 315:51]
reg [2:0] obuf_wr_timer; // @[el2_lsu_bus_buffer.scala 414:54] reg [2:0] obuf_wr_timer; // @[el2_lsu_bus_buffer.scala 414:54]
@ -1108,7 +1108,7 @@ module el2_lsu_bus_buffer(
wire _T_1056 = |buf_numvld_cmd_any; // @[el2_lsu_bus_buffer.scala 318:75] wire _T_1056 = |buf_numvld_cmd_any; // @[el2_lsu_bus_buffer.scala 318:75]
wire _T_1057 = obuf_wr_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 318:95] wire _T_1057 = obuf_wr_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 318:95]
wire _T_1058 = _T_1056 & _T_1057; // @[el2_lsu_bus_buffer.scala 318:79] wire _T_1058 = _T_1056 & _T_1057; // @[el2_lsu_bus_buffer.scala 318:79]
wire [2:0] _T_1060 = obuf_wr_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 318:121] wire [2:0] _T_1060 = obuf_wr_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 318:123]
wire _T_4482 = buf_state_3 == 3'h1; // @[el2_lsu_bus_buffer.scala 577:63] wire _T_4482 = buf_state_3 == 3'h1; // @[el2_lsu_bus_buffer.scala 577:63]
wire _T_4486 = _T_4482 | _T_4463; // @[el2_lsu_bus_buffer.scala 577:74] wire _T_4486 = _T_4482 | _T_4463; // @[el2_lsu_bus_buffer.scala 577:74]
wire _T_4477 = buf_state_2 == 3'h1; // @[el2_lsu_bus_buffer.scala 577:63] wire _T_4477 = buf_state_2 == 3'h1; // @[el2_lsu_bus_buffer.scala 577:63]
@ -1116,12 +1116,12 @@ module el2_lsu_bus_buffer(
wire [1:0] _T_4487 = _T_4486 + _T_4481; // @[el2_lsu_bus_buffer.scala 577:154] wire [1:0] _T_4487 = _T_4486 + _T_4481; // @[el2_lsu_bus_buffer.scala 577:154]
wire _T_4472 = buf_state_1 == 3'h1; // @[el2_lsu_bus_buffer.scala 577:63] wire _T_4472 = buf_state_1 == 3'h1; // @[el2_lsu_bus_buffer.scala 577:63]
wire _T_4476 = _T_4472 | _T_4457; // @[el2_lsu_bus_buffer.scala 577:74] wire _T_4476 = _T_4472 | _T_4457; // @[el2_lsu_bus_buffer.scala 577:74]
wire [1:0] _GEN_358 = {{1'd0}, _T_4476}; // @[el2_lsu_bus_buffer.scala 577:154] wire [1:0] _GEN_366 = {{1'd0}, _T_4476}; // @[el2_lsu_bus_buffer.scala 577:154]
wire [2:0] _T_4488 = _T_4487 + _GEN_358; // @[el2_lsu_bus_buffer.scala 577:154] wire [2:0] _T_4488 = _T_4487 + _GEN_366; // @[el2_lsu_bus_buffer.scala 577:154]
wire _T_4467 = buf_state_0 == 3'h1; // @[el2_lsu_bus_buffer.scala 577:63] wire _T_4467 = buf_state_0 == 3'h1; // @[el2_lsu_bus_buffer.scala 577:63]
wire _T_4471 = _T_4467 | _T_4454; // @[el2_lsu_bus_buffer.scala 577:74] wire _T_4471 = _T_4467 | _T_4454; // @[el2_lsu_bus_buffer.scala 577:74]
wire [2:0] _GEN_359 = {{2'd0}, _T_4471}; // @[el2_lsu_bus_buffer.scala 577:154] wire [2:0] _GEN_367 = {{2'd0}, _T_4471}; // @[el2_lsu_bus_buffer.scala 577:154]
wire [3:0] buf_numvld_pend_any = _T_4488 + _GEN_359; // @[el2_lsu_bus_buffer.scala 577:154] wire [3:0] buf_numvld_pend_any = _T_4488 + _GEN_367; // @[el2_lsu_bus_buffer.scala 577:154]
wire _T_1087 = buf_numvld_pend_any == 4'h0; // @[el2_lsu_bus_buffer.scala 321:53] wire _T_1087 = buf_numvld_pend_any == 4'h0; // @[el2_lsu_bus_buffer.scala 321:53]
wire _T_1088 = ibuf_byp & _T_1087; // @[el2_lsu_bus_buffer.scala 321:31] wire _T_1088 = ibuf_byp & _T_1087; // @[el2_lsu_bus_buffer.scala 321:31]
wire _T_1089 = ~io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 321:64] wire _T_1089 = ~io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 321:64]
@ -1376,7 +1376,6 @@ module el2_lsu_bus_buffer(
wire _T_1332 = bus_cmd_sent & _T_1343; // @[el2_lsu_bus_buffer.scala 370:20] wire _T_1332 = bus_cmd_sent & _T_1343; // @[el2_lsu_bus_buffer.scala 370:20]
wire _T_1333 = ~io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 370:37] wire _T_1333 = ~io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 370:37]
wire _T_1334 = _T_1332 & _T_1333; // @[el2_lsu_bus_buffer.scala 370:35] wire _T_1334 = _T_1332 & _T_1333; // @[el2_lsu_bus_buffer.scala 370:35]
wire _T_1336 = bus_cmd_sent | _T_1343; // @[el2_lsu_bus_buffer.scala 372:44]
wire [7:0] _T_1358 = {ldst_byteen_lo_r,4'h0}; // @[Cat.scala 29:58] wire [7:0] _T_1358 = {ldst_byteen_lo_r,4'h0}; // @[Cat.scala 29:58]
wire [7:0] _T_1359 = {4'h0,ldst_byteen_lo_r}; // @[Cat.scala 29:58] wire [7:0] _T_1359 = {4'h0,ldst_byteen_lo_r}; // @[Cat.scala 29:58]
wire [7:0] _T_1360 = io_lsu_addr_r[2] ? _T_1358 : _T_1359; // @[el2_lsu_bus_buffer.scala 377:46] wire [7:0] _T_1360 = io_lsu_addr_r[2] ? _T_1358 : _T_1359; // @[el2_lsu_bus_buffer.scala 377:46]
@ -1611,8 +1610,8 @@ module el2_lsu_bus_buffer(
reg _T_4301; // @[Reg.scala 27:20] reg _T_4301; // @[Reg.scala 27:20]
wire [3:0] buf_ldfwd = {_T_4307,_T_4305,_T_4303,_T_4301}; // @[Cat.scala 29:58] wire [3:0] buf_ldfwd = {_T_4307,_T_4305,_T_4303,_T_4301}; // @[Cat.scala 29:58]
reg [1:0] buf_ldfwdtag_0; // @[Reg.scala 27:20] reg [1:0] buf_ldfwdtag_0; // @[Reg.scala 27:20]
wire [2:0] _GEN_360 = {{1'd0}, buf_ldfwdtag_0}; // @[el2_lsu_bus_buffer.scala 524:47] wire [2:0] _GEN_368 = {{1'd0}, buf_ldfwdtag_0}; // @[el2_lsu_bus_buffer.scala 524:47]
wire _T_3638 = io_lsu_axi_rid == _GEN_360; // @[el2_lsu_bus_buffer.scala 524:47] wire _T_3638 = io_lsu_axi_rid == _GEN_368; // @[el2_lsu_bus_buffer.scala 524:47]
wire _T_3639 = buf_ldfwd[0] & _T_3638; // @[el2_lsu_bus_buffer.scala 524:27] wire _T_3639 = buf_ldfwd[0] & _T_3638; // @[el2_lsu_bus_buffer.scala 524:27]
wire _T_3640 = _T_3636 | _T_3639; // @[el2_lsu_bus_buffer.scala 523:77] wire _T_3640 = _T_3636 | _T_3639; // @[el2_lsu_bus_buffer.scala 523:77]
wire _T_3641 = buf_dual_0 & buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 525:26] wire _T_3641 = buf_dual_0 & buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 525:26]
@ -1620,8 +1619,8 @@ module el2_lsu_bus_buffer(
wire _T_3644 = _T_3641 & _T_3643; // @[el2_lsu_bus_buffer.scala 525:42] wire _T_3644 = _T_3641 & _T_3643; // @[el2_lsu_bus_buffer.scala 525:42]
wire _T_3645 = _T_3644 & buf_samedw_0; // @[el2_lsu_bus_buffer.scala 525:58] wire _T_3645 = _T_3644 & buf_samedw_0; // @[el2_lsu_bus_buffer.scala 525:58]
reg [1:0] buf_dualtag_0; // @[Reg.scala 27:20] reg [1:0] buf_dualtag_0; // @[Reg.scala 27:20]
wire [2:0] _GEN_361 = {{1'd0}, buf_dualtag_0}; // @[el2_lsu_bus_buffer.scala 525:94] wire [2:0] _GEN_369 = {{1'd0}, buf_dualtag_0}; // @[el2_lsu_bus_buffer.scala 525:94]
wire _T_3646 = io_lsu_axi_rid == _GEN_361; // @[el2_lsu_bus_buffer.scala 525:94] wire _T_3646 = io_lsu_axi_rid == _GEN_369; // @[el2_lsu_bus_buffer.scala 525:94]
wire _T_3647 = _T_3645 & _T_3646; // @[el2_lsu_bus_buffer.scala 525:74] wire _T_3647 = _T_3645 & _T_3646; // @[el2_lsu_bus_buffer.scala 525:74]
wire _T_3648 = _T_3640 | _T_3647; // @[el2_lsu_bus_buffer.scala 524:71] wire _T_3648 = _T_3640 | _T_3647; // @[el2_lsu_bus_buffer.scala 524:71]
wire _T_3649 = bus_rsp_read & _T_3648; // @[el2_lsu_bus_buffer.scala 523:25] wire _T_3649 = bus_rsp_read & _T_3648; // @[el2_lsu_bus_buffer.scala 523:25]
@ -1638,8 +1637,8 @@ module el2_lsu_bus_buffer(
wire [1:0] _GEN_23 = 2'h1 == buf_dualtag_0 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_23 = 2'h1 == buf_dualtag_0 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 537:58]
wire [1:0] _GEN_24 = 2'h2 == buf_dualtag_0 ? buf_ldfwdtag_2 : _GEN_23; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_24 = 2'h2 == buf_dualtag_0 ? buf_ldfwdtag_2 : _GEN_23; // @[el2_lsu_bus_buffer.scala 537:58]
wire [1:0] _GEN_25 = 2'h3 == buf_dualtag_0 ? buf_ldfwdtag_3 : _GEN_24; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_25 = 2'h3 == buf_dualtag_0 ? buf_ldfwdtag_3 : _GEN_24; // @[el2_lsu_bus_buffer.scala 537:58]
wire [2:0] _GEN_363 = {{1'd0}, _GEN_25}; // @[el2_lsu_bus_buffer.scala 537:58] wire [2:0] _GEN_371 = {{1'd0}, _GEN_25}; // @[el2_lsu_bus_buffer.scala 537:58]
wire _T_3688 = io_lsu_axi_rid == _GEN_363; // @[el2_lsu_bus_buffer.scala 537:58] wire _T_3688 = io_lsu_axi_rid == _GEN_371; // @[el2_lsu_bus_buffer.scala 537:58]
wire _T_3689 = _T_3686[0] & _T_3688; // @[el2_lsu_bus_buffer.scala 537:38] wire _T_3689 = _T_3686[0] & _T_3688; // @[el2_lsu_bus_buffer.scala 537:38]
wire _T_3690 = _T_3646 | _T_3689; // @[el2_lsu_bus_buffer.scala 536:95] wire _T_3690 = _T_3646 | _T_3689; // @[el2_lsu_bus_buffer.scala 536:95]
wire _T_3691 = bus_rsp_read & _T_3690; // @[el2_lsu_bus_buffer.scala 536:45] wire _T_3691 = bus_rsp_read & _T_3690; // @[el2_lsu_bus_buffer.scala 536:45]
@ -1709,8 +1708,8 @@ module el2_lsu_bus_buffer(
wire _T_3827 = io_lsu_axi_bid == 3'h1; // @[el2_lsu_bus_buffer.scala 522:73] wire _T_3827 = io_lsu_axi_bid == 3'h1; // @[el2_lsu_bus_buffer.scala 522:73]
wire _T_3828 = bus_rsp_write & _T_3827; // @[el2_lsu_bus_buffer.scala 522:52] wire _T_3828 = bus_rsp_write & _T_3827; // @[el2_lsu_bus_buffer.scala 522:52]
wire _T_3829 = io_lsu_axi_rid == 3'h1; // @[el2_lsu_bus_buffer.scala 523:46] wire _T_3829 = io_lsu_axi_rid == 3'h1; // @[el2_lsu_bus_buffer.scala 523:46]
wire [2:0] _GEN_364 = {{1'd0}, buf_ldfwdtag_1}; // @[el2_lsu_bus_buffer.scala 524:47] wire [2:0] _GEN_372 = {{1'd0}, buf_ldfwdtag_1}; // @[el2_lsu_bus_buffer.scala 524:47]
wire _T_3831 = io_lsu_axi_rid == _GEN_364; // @[el2_lsu_bus_buffer.scala 524:47] wire _T_3831 = io_lsu_axi_rid == _GEN_372; // @[el2_lsu_bus_buffer.scala 524:47]
wire _T_3832 = buf_ldfwd[1] & _T_3831; // @[el2_lsu_bus_buffer.scala 524:27] wire _T_3832 = buf_ldfwd[1] & _T_3831; // @[el2_lsu_bus_buffer.scala 524:27]
wire _T_3833 = _T_3829 | _T_3832; // @[el2_lsu_bus_buffer.scala 523:77] wire _T_3833 = _T_3829 | _T_3832; // @[el2_lsu_bus_buffer.scala 523:77]
wire _T_3834 = buf_dual_1 & buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 525:26] wire _T_3834 = buf_dual_1 & buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 525:26]
@ -1718,8 +1717,8 @@ module el2_lsu_bus_buffer(
wire _T_3837 = _T_3834 & _T_3836; // @[el2_lsu_bus_buffer.scala 525:42] wire _T_3837 = _T_3834 & _T_3836; // @[el2_lsu_bus_buffer.scala 525:42]
wire _T_3838 = _T_3837 & buf_samedw_1; // @[el2_lsu_bus_buffer.scala 525:58] wire _T_3838 = _T_3837 & buf_samedw_1; // @[el2_lsu_bus_buffer.scala 525:58]
reg [1:0] buf_dualtag_1; // @[Reg.scala 27:20] reg [1:0] buf_dualtag_1; // @[Reg.scala 27:20]
wire [2:0] _GEN_365 = {{1'd0}, buf_dualtag_1}; // @[el2_lsu_bus_buffer.scala 525:94] wire [2:0] _GEN_373 = {{1'd0}, buf_dualtag_1}; // @[el2_lsu_bus_buffer.scala 525:94]
wire _T_3839 = io_lsu_axi_rid == _GEN_365; // @[el2_lsu_bus_buffer.scala 525:94] wire _T_3839 = io_lsu_axi_rid == _GEN_373; // @[el2_lsu_bus_buffer.scala 525:94]
wire _T_3840 = _T_3838 & _T_3839; // @[el2_lsu_bus_buffer.scala 525:74] wire _T_3840 = _T_3838 & _T_3839; // @[el2_lsu_bus_buffer.scala 525:74]
wire _T_3841 = _T_3833 | _T_3840; // @[el2_lsu_bus_buffer.scala 524:71] wire _T_3841 = _T_3833 | _T_3840; // @[el2_lsu_bus_buffer.scala 524:71]
wire _T_3842 = bus_rsp_read & _T_3841; // @[el2_lsu_bus_buffer.scala 523:25] wire _T_3842 = bus_rsp_read & _T_3841; // @[el2_lsu_bus_buffer.scala 523:25]
@ -1733,8 +1732,8 @@ module el2_lsu_bus_buffer(
wire [1:0] _GEN_99 = 2'h1 == buf_dualtag_1 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_99 = 2'h1 == buf_dualtag_1 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 537:58]
wire [1:0] _GEN_100 = 2'h2 == buf_dualtag_1 ? buf_ldfwdtag_2 : _GEN_99; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_100 = 2'h2 == buf_dualtag_1 ? buf_ldfwdtag_2 : _GEN_99; // @[el2_lsu_bus_buffer.scala 537:58]
wire [1:0] _GEN_101 = 2'h3 == buf_dualtag_1 ? buf_ldfwdtag_3 : _GEN_100; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_101 = 2'h3 == buf_dualtag_1 ? buf_ldfwdtag_3 : _GEN_100; // @[el2_lsu_bus_buffer.scala 537:58]
wire [2:0] _GEN_367 = {{1'd0}, _GEN_101}; // @[el2_lsu_bus_buffer.scala 537:58] wire [2:0] _GEN_375 = {{1'd0}, _GEN_101}; // @[el2_lsu_bus_buffer.scala 537:58]
wire _T_3881 = io_lsu_axi_rid == _GEN_367; // @[el2_lsu_bus_buffer.scala 537:58] wire _T_3881 = io_lsu_axi_rid == _GEN_375; // @[el2_lsu_bus_buffer.scala 537:58]
wire _T_3882 = _T_3879[0] & _T_3881; // @[el2_lsu_bus_buffer.scala 537:38] wire _T_3882 = _T_3879[0] & _T_3881; // @[el2_lsu_bus_buffer.scala 537:38]
wire _T_3883 = _T_3839 | _T_3882; // @[el2_lsu_bus_buffer.scala 536:95] wire _T_3883 = _T_3839 | _T_3882; // @[el2_lsu_bus_buffer.scala 536:95]
wire _T_3884 = bus_rsp_read & _T_3883; // @[el2_lsu_bus_buffer.scala 536:45] wire _T_3884 = bus_rsp_read & _T_3883; // @[el2_lsu_bus_buffer.scala 536:45]
@ -1799,8 +1798,8 @@ module el2_lsu_bus_buffer(
wire _T_4020 = io_lsu_axi_bid == 3'h2; // @[el2_lsu_bus_buffer.scala 522:73] wire _T_4020 = io_lsu_axi_bid == 3'h2; // @[el2_lsu_bus_buffer.scala 522:73]
wire _T_4021 = bus_rsp_write & _T_4020; // @[el2_lsu_bus_buffer.scala 522:52] wire _T_4021 = bus_rsp_write & _T_4020; // @[el2_lsu_bus_buffer.scala 522:52]
wire _T_4022 = io_lsu_axi_rid == 3'h2; // @[el2_lsu_bus_buffer.scala 523:46] wire _T_4022 = io_lsu_axi_rid == 3'h2; // @[el2_lsu_bus_buffer.scala 523:46]
wire [2:0] _GEN_368 = {{1'd0}, buf_ldfwdtag_2}; // @[el2_lsu_bus_buffer.scala 524:47] wire [2:0] _GEN_376 = {{1'd0}, buf_ldfwdtag_2}; // @[el2_lsu_bus_buffer.scala 524:47]
wire _T_4024 = io_lsu_axi_rid == _GEN_368; // @[el2_lsu_bus_buffer.scala 524:47] wire _T_4024 = io_lsu_axi_rid == _GEN_376; // @[el2_lsu_bus_buffer.scala 524:47]
wire _T_4025 = buf_ldfwd[2] & _T_4024; // @[el2_lsu_bus_buffer.scala 524:27] wire _T_4025 = buf_ldfwd[2] & _T_4024; // @[el2_lsu_bus_buffer.scala 524:27]
wire _T_4026 = _T_4022 | _T_4025; // @[el2_lsu_bus_buffer.scala 523:77] wire _T_4026 = _T_4022 | _T_4025; // @[el2_lsu_bus_buffer.scala 523:77]
wire _T_4027 = buf_dual_2 & buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 525:26] wire _T_4027 = buf_dual_2 & buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 525:26]
@ -1808,8 +1807,8 @@ module el2_lsu_bus_buffer(
wire _T_4030 = _T_4027 & _T_4029; // @[el2_lsu_bus_buffer.scala 525:42] wire _T_4030 = _T_4027 & _T_4029; // @[el2_lsu_bus_buffer.scala 525:42]
wire _T_4031 = _T_4030 & buf_samedw_2; // @[el2_lsu_bus_buffer.scala 525:58] wire _T_4031 = _T_4030 & buf_samedw_2; // @[el2_lsu_bus_buffer.scala 525:58]
reg [1:0] buf_dualtag_2; // @[Reg.scala 27:20] reg [1:0] buf_dualtag_2; // @[Reg.scala 27:20]
wire [2:0] _GEN_369 = {{1'd0}, buf_dualtag_2}; // @[el2_lsu_bus_buffer.scala 525:94] wire [2:0] _GEN_377 = {{1'd0}, buf_dualtag_2}; // @[el2_lsu_bus_buffer.scala 525:94]
wire _T_4032 = io_lsu_axi_rid == _GEN_369; // @[el2_lsu_bus_buffer.scala 525:94] wire _T_4032 = io_lsu_axi_rid == _GEN_377; // @[el2_lsu_bus_buffer.scala 525:94]
wire _T_4033 = _T_4031 & _T_4032; // @[el2_lsu_bus_buffer.scala 525:74] wire _T_4033 = _T_4031 & _T_4032; // @[el2_lsu_bus_buffer.scala 525:74]
wire _T_4034 = _T_4026 | _T_4033; // @[el2_lsu_bus_buffer.scala 524:71] wire _T_4034 = _T_4026 | _T_4033; // @[el2_lsu_bus_buffer.scala 524:71]
wire _T_4035 = bus_rsp_read & _T_4034; // @[el2_lsu_bus_buffer.scala 523:25] wire _T_4035 = bus_rsp_read & _T_4034; // @[el2_lsu_bus_buffer.scala 523:25]
@ -1823,8 +1822,8 @@ module el2_lsu_bus_buffer(
wire [1:0] _GEN_175 = 2'h1 == buf_dualtag_2 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_175 = 2'h1 == buf_dualtag_2 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 537:58]
wire [1:0] _GEN_176 = 2'h2 == buf_dualtag_2 ? buf_ldfwdtag_2 : _GEN_175; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_176 = 2'h2 == buf_dualtag_2 ? buf_ldfwdtag_2 : _GEN_175; // @[el2_lsu_bus_buffer.scala 537:58]
wire [1:0] _GEN_177 = 2'h3 == buf_dualtag_2 ? buf_ldfwdtag_3 : _GEN_176; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_177 = 2'h3 == buf_dualtag_2 ? buf_ldfwdtag_3 : _GEN_176; // @[el2_lsu_bus_buffer.scala 537:58]
wire [2:0] _GEN_371 = {{1'd0}, _GEN_177}; // @[el2_lsu_bus_buffer.scala 537:58] wire [2:0] _GEN_379 = {{1'd0}, _GEN_177}; // @[el2_lsu_bus_buffer.scala 537:58]
wire _T_4074 = io_lsu_axi_rid == _GEN_371; // @[el2_lsu_bus_buffer.scala 537:58] wire _T_4074 = io_lsu_axi_rid == _GEN_379; // @[el2_lsu_bus_buffer.scala 537:58]
wire _T_4075 = _T_4072[0] & _T_4074; // @[el2_lsu_bus_buffer.scala 537:38] wire _T_4075 = _T_4072[0] & _T_4074; // @[el2_lsu_bus_buffer.scala 537:38]
wire _T_4076 = _T_4032 | _T_4075; // @[el2_lsu_bus_buffer.scala 536:95] wire _T_4076 = _T_4032 | _T_4075; // @[el2_lsu_bus_buffer.scala 536:95]
wire _T_4077 = bus_rsp_read & _T_4076; // @[el2_lsu_bus_buffer.scala 536:45] wire _T_4077 = bus_rsp_read & _T_4076; // @[el2_lsu_bus_buffer.scala 536:45]
@ -1889,8 +1888,8 @@ module el2_lsu_bus_buffer(
wire _T_4213 = io_lsu_axi_bid == 3'h3; // @[el2_lsu_bus_buffer.scala 522:73] wire _T_4213 = io_lsu_axi_bid == 3'h3; // @[el2_lsu_bus_buffer.scala 522:73]
wire _T_4214 = bus_rsp_write & _T_4213; // @[el2_lsu_bus_buffer.scala 522:52] wire _T_4214 = bus_rsp_write & _T_4213; // @[el2_lsu_bus_buffer.scala 522:52]
wire _T_4215 = io_lsu_axi_rid == 3'h3; // @[el2_lsu_bus_buffer.scala 523:46] wire _T_4215 = io_lsu_axi_rid == 3'h3; // @[el2_lsu_bus_buffer.scala 523:46]
wire [2:0] _GEN_372 = {{1'd0}, buf_ldfwdtag_3}; // @[el2_lsu_bus_buffer.scala 524:47] wire [2:0] _GEN_380 = {{1'd0}, buf_ldfwdtag_3}; // @[el2_lsu_bus_buffer.scala 524:47]
wire _T_4217 = io_lsu_axi_rid == _GEN_372; // @[el2_lsu_bus_buffer.scala 524:47] wire _T_4217 = io_lsu_axi_rid == _GEN_380; // @[el2_lsu_bus_buffer.scala 524:47]
wire _T_4218 = buf_ldfwd[3] & _T_4217; // @[el2_lsu_bus_buffer.scala 524:27] wire _T_4218 = buf_ldfwd[3] & _T_4217; // @[el2_lsu_bus_buffer.scala 524:27]
wire _T_4219 = _T_4215 | _T_4218; // @[el2_lsu_bus_buffer.scala 523:77] wire _T_4219 = _T_4215 | _T_4218; // @[el2_lsu_bus_buffer.scala 523:77]
wire _T_4220 = buf_dual_3 & buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 525:26] wire _T_4220 = buf_dual_3 & buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 525:26]
@ -1898,8 +1897,8 @@ module el2_lsu_bus_buffer(
wire _T_4223 = _T_4220 & _T_4222; // @[el2_lsu_bus_buffer.scala 525:42] wire _T_4223 = _T_4220 & _T_4222; // @[el2_lsu_bus_buffer.scala 525:42]
wire _T_4224 = _T_4223 & buf_samedw_3; // @[el2_lsu_bus_buffer.scala 525:58] wire _T_4224 = _T_4223 & buf_samedw_3; // @[el2_lsu_bus_buffer.scala 525:58]
reg [1:0] buf_dualtag_3; // @[Reg.scala 27:20] reg [1:0] buf_dualtag_3; // @[Reg.scala 27:20]
wire [2:0] _GEN_373 = {{1'd0}, buf_dualtag_3}; // @[el2_lsu_bus_buffer.scala 525:94] wire [2:0] _GEN_381 = {{1'd0}, buf_dualtag_3}; // @[el2_lsu_bus_buffer.scala 525:94]
wire _T_4225 = io_lsu_axi_rid == _GEN_373; // @[el2_lsu_bus_buffer.scala 525:94] wire _T_4225 = io_lsu_axi_rid == _GEN_381; // @[el2_lsu_bus_buffer.scala 525:94]
wire _T_4226 = _T_4224 & _T_4225; // @[el2_lsu_bus_buffer.scala 525:74] wire _T_4226 = _T_4224 & _T_4225; // @[el2_lsu_bus_buffer.scala 525:74]
wire _T_4227 = _T_4219 | _T_4226; // @[el2_lsu_bus_buffer.scala 524:71] wire _T_4227 = _T_4219 | _T_4226; // @[el2_lsu_bus_buffer.scala 524:71]
wire _T_4228 = bus_rsp_read & _T_4227; // @[el2_lsu_bus_buffer.scala 523:25] wire _T_4228 = bus_rsp_read & _T_4227; // @[el2_lsu_bus_buffer.scala 523:25]
@ -1913,8 +1912,8 @@ module el2_lsu_bus_buffer(
wire [1:0] _GEN_251 = 2'h1 == buf_dualtag_3 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_251 = 2'h1 == buf_dualtag_3 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 537:58]
wire [1:0] _GEN_252 = 2'h2 == buf_dualtag_3 ? buf_ldfwdtag_2 : _GEN_251; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_252 = 2'h2 == buf_dualtag_3 ? buf_ldfwdtag_2 : _GEN_251; // @[el2_lsu_bus_buffer.scala 537:58]
wire [1:0] _GEN_253 = 2'h3 == buf_dualtag_3 ? buf_ldfwdtag_3 : _GEN_252; // @[el2_lsu_bus_buffer.scala 537:58] wire [1:0] _GEN_253 = 2'h3 == buf_dualtag_3 ? buf_ldfwdtag_3 : _GEN_252; // @[el2_lsu_bus_buffer.scala 537:58]
wire [2:0] _GEN_375 = {{1'd0}, _GEN_253}; // @[el2_lsu_bus_buffer.scala 537:58] wire [2:0] _GEN_383 = {{1'd0}, _GEN_253}; // @[el2_lsu_bus_buffer.scala 537:58]
wire _T_4267 = io_lsu_axi_rid == _GEN_375; // @[el2_lsu_bus_buffer.scala 537:58] wire _T_4267 = io_lsu_axi_rid == _GEN_383; // @[el2_lsu_bus_buffer.scala 537:58]
wire _T_4268 = _T_4265[0] & _T_4267; // @[el2_lsu_bus_buffer.scala 537:38] wire _T_4268 = _T_4265[0] & _T_4267; // @[el2_lsu_bus_buffer.scala 537:38]
wire _T_4269 = _T_4225 | _T_4268; // @[el2_lsu_bus_buffer.scala 536:95] wire _T_4269 = _T_4225 | _T_4268; // @[el2_lsu_bus_buffer.scala 536:95]
wire _T_4270 = bus_rsp_read & _T_4269; // @[el2_lsu_bus_buffer.scala 536:45] wire _T_4270 = bus_rsp_read & _T_4269; // @[el2_lsu_bus_buffer.scala 536:45]
@ -2423,13 +2422,13 @@ module el2_lsu_bus_buffer(
wire [1:0] _T_4417 = {io_lsu_busreq_r,1'h0}; // @[Cat.scala 29:58] wire [1:0] _T_4417 = {io_lsu_busreq_r,1'h0}; // @[Cat.scala 29:58]
wire [1:0] _T_4418 = io_ldst_dual_r ? _T_4417 : {{1'd0}, io_lsu_busreq_r}; // @[el2_lsu_bus_buffer.scala 574:94] wire [1:0] _T_4418 = io_ldst_dual_r ? _T_4417 : {{1'd0}, io_lsu_busreq_r}; // @[el2_lsu_bus_buffer.scala 574:94]
wire [2:0] _T_4419 = _T_4416 + _T_4418; // @[el2_lsu_bus_buffer.scala 574:88] wire [2:0] _T_4419 = _T_4416 + _T_4418; // @[el2_lsu_bus_buffer.scala 574:88]
wire [2:0] _GEN_380 = {{2'd0}, ibuf_valid}; // @[el2_lsu_bus_buffer.scala 574:154] wire [2:0] _GEN_388 = {{2'd0}, ibuf_valid}; // @[el2_lsu_bus_buffer.scala 574:154]
wire [3:0] _T_4420 = _T_4419 + _GEN_380; // @[el2_lsu_bus_buffer.scala 574:154] wire [3:0] _T_4420 = _T_4419 + _GEN_388; // @[el2_lsu_bus_buffer.scala 574:154]
wire [1:0] _T_4425 = _T_5 + _T_12; // @[el2_lsu_bus_buffer.scala 574:217] wire [1:0] _T_4425 = _T_5 + _T_12; // @[el2_lsu_bus_buffer.scala 574:217]
wire [1:0] _GEN_381 = {{1'd0}, _T_19}; // @[el2_lsu_bus_buffer.scala 574:217] wire [1:0] _GEN_389 = {{1'd0}, _T_19}; // @[el2_lsu_bus_buffer.scala 574:217]
wire [2:0] _T_4426 = _T_4425 + _GEN_381; // @[el2_lsu_bus_buffer.scala 574:217] wire [2:0] _T_4426 = _T_4425 + _GEN_389; // @[el2_lsu_bus_buffer.scala 574:217]
wire [2:0] _GEN_382 = {{2'd0}, _T_26}; // @[el2_lsu_bus_buffer.scala 574:217] wire [2:0] _GEN_390 = {{2'd0}, _T_26}; // @[el2_lsu_bus_buffer.scala 574:217]
wire [3:0] _T_4427 = _T_4426 + _GEN_382; // @[el2_lsu_bus_buffer.scala 574:217] wire [3:0] _T_4427 = _T_4426 + _GEN_390; // @[el2_lsu_bus_buffer.scala 574:217]
wire [3:0] buf_numvld_any = _T_4420 + _T_4427; // @[el2_lsu_bus_buffer.scala 574:169] wire [3:0] buf_numvld_any = _T_4420 + _T_4427; // @[el2_lsu_bus_buffer.scala 574:169]
wire _T_4498 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_buffer.scala 580:52] wire _T_4498 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_buffer.scala 580:52]
wire _T_4499 = buf_numvld_any >= 4'h3; // @[el2_lsu_bus_buffer.scala 580:92] wire _T_4499 = buf_numvld_any >= 4'h3; // @[el2_lsu_bus_buffer.scala 580:92]
@ -2485,8 +2484,8 @@ module el2_lsu_bus_buffer(
wire _T_4604 = _T_4541 & _T_4603; // @[el2_lsu_bus_buffer.scala 590:106] wire _T_4604 = _T_4541 & _T_4603; // @[el2_lsu_bus_buffer.scala 590:106]
wire [1:0] _T_4607 = _T_4596 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_4607 = _T_4596 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _T_4608 = _T_4604 ? 2'h3 : 2'h0; // @[Mux.scala 27:72] wire [1:0] _T_4608 = _T_4604 ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
wire [1:0] _GEN_383 = {{1'd0}, _T_4588}; // @[Mux.scala 27:72] wire [1:0] _GEN_391 = {{1'd0}, _T_4588}; // @[Mux.scala 27:72]
wire [1:0] _T_4610 = _GEN_383 | _T_4607; // @[Mux.scala 27:72] wire [1:0] _T_4610 = _GEN_391 | _T_4607; // @[Mux.scala 27:72]
wire [31:0] _T_4645 = _T_4580 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_4645 = _T_4580 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72]
wire [31:0] _T_4646 = _T_4588 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_4646 = _T_4588 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72]
wire [31:0] _T_4647 = _T_4596 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_4647 = _T_4596 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72]
@ -2494,14 +2493,10 @@ module el2_lsu_bus_buffer(
wire [31:0] _T_4649 = _T_4645 | _T_4646; // @[Mux.scala 27:72] wire [31:0] _T_4649 = _T_4645 | _T_4646; // @[Mux.scala 27:72]
wire [31:0] _T_4650 = _T_4649 | _T_4647; // @[Mux.scala 27:72] wire [31:0] _T_4650 = _T_4649 | _T_4647; // @[Mux.scala 27:72]
wire [31:0] lsu_nonblock_load_data_lo = _T_4650 | _T_4648; // @[Mux.scala 27:72] wire [31:0] lsu_nonblock_load_data_lo = _T_4650 | _T_4648; // @[Mux.scala 27:72]
wire _T_4656 = buf_dual_0 | buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 592:120] wire _T_4657 = _T_4538 & _T_3641; // @[el2_lsu_bus_buffer.scala 592:105]
wire _T_4657 = _T_4538 & _T_4656; // @[el2_lsu_bus_buffer.scala 592:105] wire _T_4663 = _T_4539 & _T_3834; // @[el2_lsu_bus_buffer.scala 592:105]
wire _T_4662 = buf_dual_1 | buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 592:120] wire _T_4669 = _T_4540 & _T_4027; // @[el2_lsu_bus_buffer.scala 592:105]
wire _T_4663 = _T_4539 & _T_4662; // @[el2_lsu_bus_buffer.scala 592:105] wire _T_4675 = _T_4541 & _T_4220; // @[el2_lsu_bus_buffer.scala 592:105]
wire _T_4668 = buf_dual_2 | buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 592:120]
wire _T_4669 = _T_4540 & _T_4668; // @[el2_lsu_bus_buffer.scala 592:105]
wire _T_4674 = buf_dual_3 | buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 592:120]
wire _T_4675 = _T_4541 & _T_4674; // @[el2_lsu_bus_buffer.scala 592:105]
wire [31:0] _T_4676 = _T_4657 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_4676 = _T_4657 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72]
wire [31:0] _T_4677 = _T_4663 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_4677 = _T_4663 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72]
wire [31:0] _T_4678 = _T_4669 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_4678 = _T_4669 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72]
@ -2536,8 +2531,8 @@ module el2_lsu_bus_buffer(
wire _T_4719 = _T_4718 | _T_4716; // @[Mux.scala 27:72] wire _T_4719 = _T_4718 | _T_4716; // @[Mux.scala 27:72]
wire lsu_nonblock_unsign = _T_4719 | _T_4717; // @[Mux.scala 27:72] wire lsu_nonblock_unsign = _T_4719 | _T_4717; // @[Mux.scala 27:72]
wire [63:0] _T_4739 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58] wire [63:0] _T_4739 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58]
wire [3:0] _GEN_384 = {{2'd0}, lsu_nonblock_addr_offset}; // @[el2_lsu_bus_buffer.scala 597:121] wire [3:0] _GEN_392 = {{2'd0}, lsu_nonblock_addr_offset}; // @[el2_lsu_bus_buffer.scala 597:121]
wire [5:0] _T_4740 = _GEN_384 * 4'h8; // @[el2_lsu_bus_buffer.scala 597:121] wire [5:0] _T_4740 = _GEN_392 * 4'h8; // @[el2_lsu_bus_buffer.scala 597:121]
wire [63:0] lsu_nonblock_data_unalgn = _T_4739 >> _T_4740; // @[el2_lsu_bus_buffer.scala 597:92] wire [63:0] lsu_nonblock_data_unalgn = _T_4739 >> _T_4740; // @[el2_lsu_bus_buffer.scala 597:92]
wire _T_4741 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 599:69] wire _T_4741 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 599:69]
wire _T_4743 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 600:81] wire _T_4743 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 600:81]
@ -2562,8 +2557,8 @@ module el2_lsu_bus_buffer(
wire [31:0] _T_4773 = _T_4768 | _T_4769; // @[Mux.scala 27:72] wire [31:0] _T_4773 = _T_4768 | _T_4769; // @[Mux.scala 27:72]
wire [31:0] _T_4774 = _T_4773 | _T_4770; // @[Mux.scala 27:72] wire [31:0] _T_4774 = _T_4773 | _T_4770; // @[Mux.scala 27:72]
wire [31:0] _T_4775 = _T_4774 | _T_4771; // @[Mux.scala 27:72] wire [31:0] _T_4775 = _T_4774 | _T_4771; // @[Mux.scala 27:72]
wire [63:0] _GEN_385 = {{32'd0}, _T_4775}; // @[Mux.scala 27:72] wire [63:0] _GEN_393 = {{32'd0}, _T_4775}; // @[Mux.scala 27:72]
wire [63:0] _T_4776 = _GEN_385 | _T_4772; // @[Mux.scala 27:72] wire [63:0] _T_4776 = _GEN_393 | _T_4772; // @[Mux.scala 27:72]
wire _T_4871 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 622:36] wire _T_4871 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 622:36]
wire _T_4872 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 622:51] wire _T_4872 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 622:51]
wire _T_4873 = _T_4871 & _T_4872; // @[el2_lsu_bus_buffer.scala 622:49] wire _T_4873 = _T_4871 & _T_4872; // @[el2_lsu_bus_buffer.scala 622:49]
@ -2588,25 +2583,36 @@ module el2_lsu_bus_buffer(
wire _T_4927 = _T_2865 & _T_4923; // @[Mux.scala 27:72] wire _T_4927 = _T_2865 & _T_4923; // @[Mux.scala 27:72]
wire _T_4928 = _T_4924 | _T_4925; // @[Mux.scala 27:72] wire _T_4928 = _T_4924 | _T_4925; // @[Mux.scala 27:72]
wire _T_4929 = _T_4928 | _T_4926; // @[Mux.scala 27:72] wire _T_4929 = _T_4928 | _T_4926; // @[Mux.scala 27:72]
wire _T_4939 = _T_2821 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 653:98] wire _T_4939 = _T_2821 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 653:93]
wire lsu_imprecise_error_store_tag = _T_4939 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 653:113] wire _T_4941 = _T_4939 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 653:108]
wire _T_4945 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 655:72] wire _T_4944 = _T_2843 & buf_error[2]; // @[el2_lsu_bus_buffer.scala 653:93]
wire _T_4947 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 112:123] wire _T_4946 = _T_4944 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 653:108]
wire [31:0] _T_4949 = _T_4947 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] wire _T_4949 = _T_2865 & buf_error[3]; // @[el2_lsu_bus_buffer.scala 653:93]
wire [31:0] _T_4950 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] wire _T_4951 = _T_4949 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 653:108]
wire [31:0] _T_4951 = _T_4949 | _T_4950; // @[Mux.scala 27:72] wire [1:0] _T_4954 = _T_4946 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
wire _T_4968 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 662:68] wire [1:0] _T_4955 = _T_4951 ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
wire _T_4971 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 663:48] wire [1:0] _GEN_394 = {{1'd0}, _T_4941}; // @[Mux.scala 27:72]
wire _T_4974 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 666:48] wire [1:0] _T_4957 = _GEN_394 | _T_4954; // @[Mux.scala 27:72]
wire _T_4975 = io_lsu_axi_awvalid & _T_4974; // @[el2_lsu_bus_buffer.scala 666:46] wire [1:0] lsu_imprecise_error_store_tag = _T_4957 | _T_4955; // @[Mux.scala 27:72]
wire _T_4976 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 666:92] wire _T_4959 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 655:72]
wire _T_4977 = io_lsu_axi_wvalid & _T_4976; // @[el2_lsu_bus_buffer.scala 666:90] wire [31:0] _GEN_351 = 2'h1 == lsu_imprecise_error_store_tag ? buf_addr_1 : buf_addr_0; // @[el2_lsu_bus_buffer.scala 656:41]
wire _T_4978 = _T_4975 | _T_4977; // @[el2_lsu_bus_buffer.scala 666:69] wire [31:0] _GEN_352 = 2'h2 == lsu_imprecise_error_store_tag ? buf_addr_2 : _GEN_351; // @[el2_lsu_bus_buffer.scala 656:41]
wire _T_4979 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 666:136] wire [31:0] _GEN_353 = 2'h3 == lsu_imprecise_error_store_tag ? buf_addr_3 : _GEN_352; // @[el2_lsu_bus_buffer.scala 656:41]
wire _T_4980 = io_lsu_axi_arvalid & _T_4979; // @[el2_lsu_bus_buffer.scala 666:134] wire [31:0] _GEN_355 = 2'h1 == io_lsu_nonblock_load_data_tag ? buf_addr_1 : buf_addr_0; // @[el2_lsu_bus_buffer.scala 656:41]
wire _T_4984 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 670:75] wire [31:0] _GEN_356 = 2'h2 == io_lsu_nonblock_load_data_tag ? buf_addr_2 : _GEN_355; // @[el2_lsu_bus_buffer.scala 656:41]
wire _T_4985 = io_lsu_busreq_m & _T_4984; // @[el2_lsu_bus_buffer.scala 670:73] wire [31:0] _GEN_357 = 2'h3 == io_lsu_nonblock_load_data_tag ? buf_addr_3 : _GEN_356; // @[el2_lsu_bus_buffer.scala 656:41]
reg _T_4988; // @[el2_lsu_bus_buffer.scala 670:56] wire _T_4964 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 662:68]
wire _T_4967 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 663:48]
wire _T_4970 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 666:48]
wire _T_4971 = io_lsu_axi_awvalid & _T_4970; // @[el2_lsu_bus_buffer.scala 666:46]
wire _T_4972 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 666:92]
wire _T_4973 = io_lsu_axi_wvalid & _T_4972; // @[el2_lsu_bus_buffer.scala 666:90]
wire _T_4974 = _T_4971 | _T_4973; // @[el2_lsu_bus_buffer.scala 666:69]
wire _T_4975 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 666:136]
wire _T_4976 = io_lsu_axi_arvalid & _T_4975; // @[el2_lsu_bus_buffer.scala 666:134]
wire _T_4980 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 670:75]
wire _T_4981 = io_lsu_busreq_m & _T_4980; // @[el2_lsu_bus_buffer.scala 670:73]
reg _T_4984; // @[el2_lsu_bus_buffer.scala 670:56]
rvclkhdr rvclkhdr ( // @[el2_lib.scala 508:23] rvclkhdr rvclkhdr ( // @[el2_lib.scala 508:23]
.io_l1clk(rvclkhdr_io_l1clk), .io_l1clk(rvclkhdr_io_l1clk),
.io_clk(rvclkhdr_io_clk), .io_clk(rvclkhdr_io_clk),
@ -2679,7 +2685,7 @@ module el2_lsu_bus_buffer(
.io_en(rvclkhdr_11_io_en), .io_en(rvclkhdr_11_io_en),
.io_scan_mode(rvclkhdr_11_io_scan_mode) .io_scan_mode(rvclkhdr_11_io_scan_mode)
); );
assign io_lsu_busreq_r = _T_4988; // @[el2_lsu_bus_buffer.scala 670:19] assign io_lsu_busreq_r = _T_4984; // @[el2_lsu_bus_buffer.scala 670:19]
assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[el2_lsu_bus_buffer.scala 579:30] assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[el2_lsu_bus_buffer.scala 579:30]
assign io_lsu_bus_buffer_full_any = _T_4498 ? _T_4499 : _T_4500; // @[el2_lsu_bus_buffer.scala 580:30] assign io_lsu_bus_buffer_full_any = _T_4498 ? _T_4499 : _T_4500; // @[el2_lsu_bus_buffer.scala 580:30]
assign io_lsu_bus_buffer_empty_any = _T_4511 & _T_1231; // @[el2_lsu_bus_buffer.scala 581:31] assign io_lsu_bus_buffer_empty_any = _T_4511 & _T_1231; // @[el2_lsu_bus_buffer.scala 581:31]
@ -2688,9 +2694,9 @@ module el2_lsu_bus_buffer(
assign io_ld_byte_hit_buf_hi = {_T_84,_T_73}; // @[el2_lsu_bus_buffer.scala 192:25] assign io_ld_byte_hit_buf_hi = {_T_84,_T_73}; // @[el2_lsu_bus_buffer.scala 192:25]
assign io_ld_fwddata_buf_lo = _T_650 | _T_651; // @[el2_lsu_bus_buffer.scala 218:24] assign io_ld_fwddata_buf_lo = _T_650 | _T_651; // @[el2_lsu_bus_buffer.scala 218:24]
assign io_ld_fwddata_buf_hi = _T_747 | _T_748; // @[el2_lsu_bus_buffer.scala 224:24] assign io_ld_fwddata_buf_hi = _T_747 | _T_748; // @[el2_lsu_bus_buffer.scala 224:24]
assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4945; // @[el2_lsu_bus_buffer.scala 655:35] assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4959; // @[el2_lsu_bus_buffer.scala 655:35]
assign io_lsu_imprecise_error_store_any = _T_4929 | _T_4927; // @[el2_lsu_bus_buffer.scala 652:36] assign io_lsu_imprecise_error_store_any = _T_4929 | _T_4927; // @[el2_lsu_bus_buffer.scala 652:36]
assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4951 : _T_4693; // @[el2_lsu_bus_buffer.scala 656:35] assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _GEN_353 : _GEN_357; // @[el2_lsu_bus_buffer.scala 656:35]
assign io_lsu_nonblock_load_valid_m = _T_4517 & _T_4518; // @[el2_lsu_bus_buffer.scala 583:32] assign io_lsu_nonblock_load_valid_m = _T_4517 & _T_4518; // @[el2_lsu_bus_buffer.scala 583:32]
assign io_lsu_nonblock_load_tag_m = _T_1863 ? 2'h0 : _T_1899; // @[el2_lsu_bus_buffer.scala 584:30] assign io_lsu_nonblock_load_tag_m = _T_1863 ? 2'h0 : _T_1899; // @[el2_lsu_bus_buffer.scala 584:30]
assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4520; // @[el2_lsu_bus_buffer.scala 586:30] assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4520; // @[el2_lsu_bus_buffer.scala 586:30]
@ -2699,10 +2705,10 @@ module el2_lsu_bus_buffer(
assign io_lsu_nonblock_load_data_error = _T_4570 | _T_4568; // @[el2_lsu_bus_buffer.scala 589:35] assign io_lsu_nonblock_load_data_error = _T_4570 | _T_4568; // @[el2_lsu_bus_buffer.scala 589:35]
assign io_lsu_nonblock_load_data_tag = _T_4610 | _T_4608; // @[el2_lsu_bus_buffer.scala 590:33] assign io_lsu_nonblock_load_data_tag = _T_4610 | _T_4608; // @[el2_lsu_bus_buffer.scala 590:33]
assign io_lsu_nonblock_load_data = _T_4776[31:0]; // @[el2_lsu_bus_buffer.scala 600:29] assign io_lsu_nonblock_load_data = _T_4776[31:0]; // @[el2_lsu_bus_buffer.scala 600:29]
assign io_lsu_pmu_bus_trxn = _T_4968 | _T_4863; // @[el2_lsu_bus_buffer.scala 662:23] assign io_lsu_pmu_bus_trxn = _T_4964 | _T_4863; // @[el2_lsu_bus_buffer.scala 662:23]
assign io_lsu_pmu_bus_misaligned = _T_4971 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 663:29] assign io_lsu_pmu_bus_misaligned = _T_4967 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 663:29]
assign io_lsu_pmu_bus_error = io_lsu_imprecise_error_load_any | io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 664:24] assign io_lsu_pmu_bus_error = io_lsu_imprecise_error_load_any | io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 664:24]
assign io_lsu_pmu_bus_busy = _T_4978 | _T_4980; // @[el2_lsu_bus_buffer.scala 666:23] assign io_lsu_pmu_bus_busy = _T_4974 | _T_4976; // @[el2_lsu_bus_buffer.scala 666:23]
assign io_lsu_axi_awvalid = _T_4873 & _T_1239; // @[el2_lsu_bus_buffer.scala 622:22] assign io_lsu_axi_awvalid = _T_4873 & _T_1239; // @[el2_lsu_bus_buffer.scala 622:22]
assign io_lsu_axi_awid = {{1'd0}, _T_1848}; // @[el2_lsu_bus_buffer.scala 623:19] assign io_lsu_axi_awid = {{1'd0}, _T_1848}; // @[el2_lsu_bus_buffer.scala 623:19]
assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4877; // @[el2_lsu_bus_buffer.scala 624:21] assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4877; // @[el2_lsu_bus_buffer.scala 624:21]
@ -3015,7 +3021,7 @@ initial begin
_RAND_105 = {1{`RANDOM}}; _RAND_105 = {1{`RANDOM}};
lsu_nonblock_load_valid_r = _RAND_105[0:0]; lsu_nonblock_load_valid_r = _RAND_105[0:0];
_RAND_106 = {1{`RANDOM}}; _RAND_106 = {1{`RANDOM}};
_T_4988 = _RAND_106[0:0]; _T_4984 = _RAND_106[0:0];
`endif // RANDOMIZE_REG_INIT `endif // RANDOMIZE_REG_INIT
if (reset) begin if (reset) begin
buf_addr_0 = 32'h0; buf_addr_0 = 32'h0;
@ -3336,7 +3342,7 @@ initial begin
lsu_nonblock_load_valid_r = 1'h0; lsu_nonblock_load_valid_r = 1'h0;
end end
if (reset) begin if (reset) begin
_T_4988 = 1'h0; _T_4984 = 1'h0;
end end
`endif // RANDOMIZE `endif // RANDOMIZE
end // initial end // initial
@ -4250,7 +4256,7 @@ end // initial
always @(posedge io_lsu_busm_clk or posedge reset) begin always @(posedge io_lsu_busm_clk or posedge reset) begin
if (reset) begin if (reset) begin
obuf_rdrsp_tag <= 3'h0; obuf_rdrsp_tag <= 3'h0;
end else if (_T_1336) begin end else if (_T_1332) begin
obuf_rdrsp_tag <= obuf_tag0; obuf_rdrsp_tag <= obuf_tag0;
end end
end end
@ -4564,9 +4570,9 @@ end // initial
end end
always @(posedge io_lsu_c2_r_clk or posedge reset) begin always @(posedge io_lsu_c2_r_clk or posedge reset) begin
if (reset) begin if (reset) begin
_T_4988 <= 1'h0; _T_4984 <= 1'h0;
end else begin end else begin
_T_4988 <= _T_4985 & _T_4518; _T_4984 <= _T_4981 & _T_4518;
end end
end end
endmodule endmodule

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target/scala-2.12/classes/lsu/el2_lsu_ecc.class
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