diff --git a/lsu.fir b/lsu.fir index 31e690e4..e7d8b924 100644 --- a/lsu.fir +++ b/lsu.fir @@ -10809,7 +10809,7 @@ circuit lsu : skip @[Reg.scala 28:19] reg _T_1791 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] when obuf_wr_en : @[Reg.scala 28:19] - _T_1791 <= obuf_data_done_in @[Reg.scala 28:23] + _T_1791 <= obuf_wr_timer_in @[Reg.scala 28:23] skip @[Reg.scala 28:19] obuf_wr_timer <= _T_1791 @[lsu_bus_buffer.scala 365:17] wire WrPtr0_m : UInt<2> @@ -14886,56 +14886,56 @@ circuit lsu : bus_buffer.io.lsu_pkt_r.bits.stack <= io.lsu_pkt_r.bits.stack @[lsu_bus_intf.scala 118:27] bus_buffer.io.lsu_pkt_r.bits.fast_int <= io.lsu_pkt_r.bits.fast_int @[lsu_bus_intf.scala 118:27] bus_buffer.io.lsu_pkt_r.valid <= io.lsu_pkt_r.valid @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_addr_m <= io.lsu_addr_m @[lsu_bus_intf.scala 121:51] - bus_buffer.io.end_addr_m <= io.end_addr_m @[lsu_bus_intf.scala 122:51] - bus_buffer.io.lsu_addr_r <= io.lsu_addr_r @[lsu_bus_intf.scala 123:51] - bus_buffer.io.end_addr_r <= io.end_addr_r @[lsu_bus_intf.scala 124:51] - bus_buffer.io.store_data_r <= io.store_data_r @[lsu_bus_intf.scala 125:51] - bus_buffer.io.lsu_busreq_m <= io.lsu_busreq_m @[lsu_bus_intf.scala 127:51] - bus_buffer.io.flush_m_up <= io.flush_m_up @[lsu_bus_intf.scala 128:51] - bus_buffer.io.flush_r <= io.flush_r @[lsu_bus_intf.scala 129:51] - bus_buffer.io.lsu_commit_r <= io.lsu_commit_r @[lsu_bus_intf.scala 130:51] - bus_buffer.io.lsu_axi.r.bits.last <= io.axi.r.bits.last @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.r.bits.resp <= io.axi.r.bits.resp @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.r.bits.data <= io.axi.r.bits.data @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.r.bits.id <= io.axi.r.bits.id @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.r.valid <= io.axi.r.valid @[lsu_bus_intf.scala 131:51] - io.axi.r.ready <= bus_buffer.io.lsu_axi.r.ready @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.qos <= bus_buffer.io.lsu_axi.ar.bits.qos @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.prot <= bus_buffer.io.lsu_axi.ar.bits.prot @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.cache <= bus_buffer.io.lsu_axi.ar.bits.cache @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.lock <= bus_buffer.io.lsu_axi.ar.bits.lock @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.burst <= bus_buffer.io.lsu_axi.ar.bits.burst @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.size <= bus_buffer.io.lsu_axi.ar.bits.size @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.len <= bus_buffer.io.lsu_axi.ar.bits.len @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.region <= bus_buffer.io.lsu_axi.ar.bits.region @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.addr <= bus_buffer.io.lsu_axi.ar.bits.addr @[lsu_bus_intf.scala 131:51] - io.axi.ar.bits.id <= bus_buffer.io.lsu_axi.ar.bits.id @[lsu_bus_intf.scala 131:51] - io.axi.ar.valid <= bus_buffer.io.lsu_axi.ar.valid @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.ar.ready <= io.axi.ar.ready @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.b.bits.id <= io.axi.b.bits.id @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.b.bits.resp <= io.axi.b.bits.resp @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.b.valid <= io.axi.b.valid @[lsu_bus_intf.scala 131:51] - io.axi.b.ready <= bus_buffer.io.lsu_axi.b.ready @[lsu_bus_intf.scala 131:51] - io.axi.w.bits.last <= bus_buffer.io.lsu_axi.w.bits.last @[lsu_bus_intf.scala 131:51] - io.axi.w.bits.strb <= bus_buffer.io.lsu_axi.w.bits.strb @[lsu_bus_intf.scala 131:51] - io.axi.w.bits.data <= bus_buffer.io.lsu_axi.w.bits.data @[lsu_bus_intf.scala 131:51] - io.axi.w.valid <= bus_buffer.io.lsu_axi.w.valid @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.w.ready <= io.axi.w.ready @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.qos <= bus_buffer.io.lsu_axi.aw.bits.qos @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.prot <= bus_buffer.io.lsu_axi.aw.bits.prot @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.cache <= bus_buffer.io.lsu_axi.aw.bits.cache @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.lock <= bus_buffer.io.lsu_axi.aw.bits.lock @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.burst <= bus_buffer.io.lsu_axi.aw.bits.burst @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.size <= bus_buffer.io.lsu_axi.aw.bits.size @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.len <= bus_buffer.io.lsu_axi.aw.bits.len @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.region <= bus_buffer.io.lsu_axi.aw.bits.region @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.addr <= bus_buffer.io.lsu_axi.aw.bits.addr @[lsu_bus_intf.scala 131:51] - io.axi.aw.bits.id <= bus_buffer.io.lsu_axi.aw.bits.id @[lsu_bus_intf.scala 131:51] - io.axi.aw.valid <= bus_buffer.io.lsu_axi.aw.valid @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_axi.aw.ready <= io.axi.aw.ready @[lsu_bus_intf.scala 131:51] - bus_buffer.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[lsu_bus_intf.scala 132:51] - io.lsu_nonblock_load_data <= bus_buffer.io.lsu_nonblock_load_data @[lsu_bus_intf.scala 133:29] + bus_buffer.io.lsu_addr_m <= io.lsu_addr_m @[lsu_bus_intf.scala 121:38] + bus_buffer.io.end_addr_m <= io.end_addr_m @[lsu_bus_intf.scala 122:38] + bus_buffer.io.lsu_addr_r <= io.lsu_addr_r @[lsu_bus_intf.scala 123:38] + bus_buffer.io.end_addr_r <= io.end_addr_r @[lsu_bus_intf.scala 124:38] + bus_buffer.io.store_data_r <= io.store_data_r @[lsu_bus_intf.scala 125:38] + bus_buffer.io.lsu_busreq_m <= io.lsu_busreq_m @[lsu_bus_intf.scala 127:38] + bus_buffer.io.flush_m_up <= io.flush_m_up @[lsu_bus_intf.scala 128:38] + bus_buffer.io.flush_r <= io.flush_r @[lsu_bus_intf.scala 129:38] + bus_buffer.io.lsu_commit_r <= io.lsu_commit_r @[lsu_bus_intf.scala 130:38] + bus_buffer.io.lsu_axi.r.bits.last <= io.axi.r.bits.last @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.r.bits.resp <= io.axi.r.bits.resp @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.r.bits.data <= io.axi.r.bits.data @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.r.bits.id <= io.axi.r.bits.id @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.r.valid <= io.axi.r.valid @[lsu_bus_intf.scala 131:38] + io.axi.r.ready <= bus_buffer.io.lsu_axi.r.ready @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.qos <= bus_buffer.io.lsu_axi.ar.bits.qos @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.prot <= bus_buffer.io.lsu_axi.ar.bits.prot @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.cache <= bus_buffer.io.lsu_axi.ar.bits.cache @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.lock <= bus_buffer.io.lsu_axi.ar.bits.lock @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.burst <= bus_buffer.io.lsu_axi.ar.bits.burst @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.size <= bus_buffer.io.lsu_axi.ar.bits.size @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.len <= bus_buffer.io.lsu_axi.ar.bits.len @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.region <= bus_buffer.io.lsu_axi.ar.bits.region @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.addr <= bus_buffer.io.lsu_axi.ar.bits.addr @[lsu_bus_intf.scala 131:38] + io.axi.ar.bits.id <= bus_buffer.io.lsu_axi.ar.bits.id @[lsu_bus_intf.scala 131:38] + io.axi.ar.valid <= bus_buffer.io.lsu_axi.ar.valid @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.ar.ready <= io.axi.ar.ready @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.b.bits.id <= io.axi.b.bits.id @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.b.bits.resp <= io.axi.b.bits.resp @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.b.valid <= io.axi.b.valid @[lsu_bus_intf.scala 131:38] + io.axi.b.ready <= bus_buffer.io.lsu_axi.b.ready @[lsu_bus_intf.scala 131:38] + io.axi.w.bits.last <= bus_buffer.io.lsu_axi.w.bits.last @[lsu_bus_intf.scala 131:38] + io.axi.w.bits.strb <= bus_buffer.io.lsu_axi.w.bits.strb @[lsu_bus_intf.scala 131:38] + io.axi.w.bits.data <= bus_buffer.io.lsu_axi.w.bits.data @[lsu_bus_intf.scala 131:38] + io.axi.w.valid <= bus_buffer.io.lsu_axi.w.valid @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.w.ready <= io.axi.w.ready @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.qos <= bus_buffer.io.lsu_axi.aw.bits.qos @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.prot <= bus_buffer.io.lsu_axi.aw.bits.prot @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.cache <= bus_buffer.io.lsu_axi.aw.bits.cache @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.lock <= bus_buffer.io.lsu_axi.aw.bits.lock @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.burst <= bus_buffer.io.lsu_axi.aw.bits.burst @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.size <= bus_buffer.io.lsu_axi.aw.bits.size @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.len <= bus_buffer.io.lsu_axi.aw.bits.len @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.region <= bus_buffer.io.lsu_axi.aw.bits.region @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.addr <= bus_buffer.io.lsu_axi.aw.bits.addr @[lsu_bus_intf.scala 131:38] + io.axi.aw.bits.id <= bus_buffer.io.lsu_axi.aw.bits.id @[lsu_bus_intf.scala 131:38] + io.axi.aw.valid <= bus_buffer.io.lsu_axi.aw.valid @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_axi.aw.ready <= io.axi.aw.ready @[lsu_bus_intf.scala 131:38] + bus_buffer.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[lsu_bus_intf.scala 132:38] + io.lsu_nonblock_load_data <= bus_buffer.io.lsu_nonblock_load_data @[lsu_bus_intf.scala 133:38] io.lsu_busreq_r <= bus_buffer.io.lsu_busreq_r @[lsu_bus_intf.scala 134:38] io.lsu_bus_buffer_pend_any <= bus_buffer.io.lsu_bus_buffer_pend_any @[lsu_bus_intf.scala 135:38] io.lsu_bus_buffer_full_any <= bus_buffer.io.lsu_bus_buffer_full_any @[lsu_bus_intf.scala 136:38] @@ -15440,35 +15440,35 @@ circuit lsu : bus_intf.reset <= reset node lsu_raw_fwd_lo_m = orr(stbuf.io.stbuf_fwdbyteen_lo_m) @[lsu.scala 83:56] node lsu_raw_fwd_hi_m = orr(stbuf.io.stbuf_fwdbyteen_hi_m) @[lsu.scala 84:56] - node _T = or(stbuf.io.lsu_stbuf_full_any, bus_intf.io.lsu_bus_buffer_full_any) @[lsu.scala 87:57] - node _T_1 = or(_T, dccm_ctl.io.ld_single_ecc_error_r_ff) @[lsu.scala 87:95] - io.lsu_store_stall_any <= _T_1 @[lsu.scala 87:26] - node _T_2 = or(bus_intf.io.lsu_bus_buffer_full_any, dccm_ctl.io.ld_single_ecc_error_r_ff) @[lsu.scala 88:64] - io.lsu_load_stall_any <= _T_2 @[lsu.scala 88:25] - io.lsu_fastint_stall_any <= dccm_ctl.io.ld_single_ecc_error_r @[lsu.scala 89:28] - node _T_3 = eq(lsu_lsc_ctl.io.lsu_pkt_m.bits.dma, UInt<1>("h00")) @[lsu.scala 94:58] - node _T_4 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_3) @[lsu.scala 94:56] - node _T_5 = or(lsu_lsc_ctl.io.addr_in_dccm_m, lsu_lsc_ctl.io.addr_in_pic_m) @[lsu.scala 94:126] - node _T_6 = and(_T_4, _T_5) @[lsu.scala 94:93] - node ldst_nodma_mtor = and(_T_6, lsu_lsc_ctl.io.lsu_pkt_m.bits.store) @[lsu.scala 94:158] - node _T_7 = or(io.dec_lsu_valid_raw_d, ldst_nodma_mtor) @[lsu.scala 95:53] - node _T_8 = or(_T_7, dccm_ctl.io.ld_single_ecc_error_r_ff) @[lsu.scala 95:71] - node _T_9 = eq(_T_8, UInt<1>("h00")) @[lsu.scala 95:28] - io.lsu_dma.dccm_ready <= _T_9 @[lsu.scala 95:25] - node _T_10 = and(io.lsu_dma.dma_lsc_ctl.dma_dccm_req, io.lsu_dma.dma_lsc_ctl.dma_mem_write) @[lsu.scala 96:58] - node _T_11 = and(_T_10, lsu_lsc_ctl.io.addr_in_dccm_d) @[lsu.scala 96:97] - node _T_12 = bits(io.lsu_dma.dma_lsc_ctl.dma_mem_sz, 1, 1) @[lsu.scala 96:164] - node dma_dccm_wen = and(_T_11, _T_12) @[lsu.scala 96:129] - node _T_13 = and(io.lsu_dma.dma_lsc_ctl.dma_dccm_req, io.lsu_dma.dma_lsc_ctl.dma_mem_write) @[lsu.scala 97:58] - node dma_pic_wen = and(_T_13, lsu_lsc_ctl.io.addr_in_pic_d) @[lsu.scala 97:97] - node _T_14 = bits(io.lsu_dma.dma_lsc_ctl.dma_mem_addr, 2, 0) @[lsu.scala 98:100] + node _T = or(stbuf.io.lsu_stbuf_full_any, bus_intf.io.lsu_bus_buffer_full_any) @[lsu.scala 87:60] + node _T_1 = or(_T, dccm_ctl.io.ld_single_ecc_error_r_ff) @[lsu.scala 87:98] + io.lsu_store_stall_any <= _T_1 @[lsu.scala 87:29] + node _T_2 = or(bus_intf.io.lsu_bus_buffer_full_any, dccm_ctl.io.ld_single_ecc_error_r_ff) @[lsu.scala 88:68] + io.lsu_load_stall_any <= _T_2 @[lsu.scala 88:29] + io.lsu_fastint_stall_any <= dccm_ctl.io.ld_single_ecc_error_r @[lsu.scala 89:29] + node _T_3 = eq(lsu_lsc_ctl.io.lsu_pkt_m.bits.dma, UInt<1>("h00")) @[lsu.scala 94:62] + node _T_4 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_3) @[lsu.scala 94:60] + node _T_5 = or(lsu_lsc_ctl.io.addr_in_dccm_m, lsu_lsc_ctl.io.addr_in_pic_m) @[lsu.scala 94:130] + node _T_6 = and(_T_4, _T_5) @[lsu.scala 94:97] + node ldst_nodma_mtor = and(_T_6, lsu_lsc_ctl.io.lsu_pkt_m.bits.store) @[lsu.scala 94:162] + node _T_7 = or(io.dec_lsu_valid_raw_d, ldst_nodma_mtor) @[lsu.scala 95:55] + node _T_8 = or(_T_7, dccm_ctl.io.ld_single_ecc_error_r_ff) @[lsu.scala 95:73] + node _T_9 = eq(_T_8, UInt<1>("h00")) @[lsu.scala 95:30] + io.lsu_dma.dccm_ready <= _T_9 @[lsu.scala 95:27] + node _T_10 = and(io.lsu_dma.dma_lsc_ctl.dma_dccm_req, io.lsu_dma.dma_lsc_ctl.dma_mem_write) @[lsu.scala 96:65] + node _T_11 = and(_T_10, lsu_lsc_ctl.io.addr_in_dccm_d) @[lsu.scala 96:104] + node _T_12 = bits(io.lsu_dma.dma_lsc_ctl.dma_mem_sz, 1, 1) @[lsu.scala 96:171] + node dma_dccm_wen = and(_T_11, _T_12) @[lsu.scala 96:136] + node _T_13 = and(io.lsu_dma.dma_lsc_ctl.dma_dccm_req, io.lsu_dma.dma_lsc_ctl.dma_mem_write) @[lsu.scala 97:65] + node dma_pic_wen = and(_T_13, lsu_lsc_ctl.io.addr_in_pic_d) @[lsu.scala 97:104] + node _T_14 = bits(io.lsu_dma.dma_lsc_ctl.dma_mem_addr, 2, 0) @[lsu.scala 98:109] node _T_15 = cat(_T_14, UInt<3>("h00")) @[Cat.scala 29:58] - node _T_16 = dshr(io.lsu_dma.dma_lsc_ctl.dma_mem_wdata, _T_15) @[lsu.scala 98:58] - dma_dccm_wdata <= _T_16 @[lsu.scala 98:18] - node _T_17 = bits(dma_dccm_wdata, 63, 32) @[lsu.scala 99:38] - dma_dccm_wdata_hi <= _T_17 @[lsu.scala 99:21] - node _T_18 = bits(dma_dccm_wdata, 31, 0) @[lsu.scala 100:38] - dma_dccm_wdata_lo <= _T_18 @[lsu.scala 100:21] + node _T_16 = dshr(io.lsu_dma.dma_lsc_ctl.dma_mem_wdata, _T_15) @[lsu.scala 98:67] + dma_dccm_wdata <= _T_16 @[lsu.scala 98:27] + node _T_17 = bits(dma_dccm_wdata, 63, 32) @[lsu.scala 99:44] + dma_dccm_wdata_hi <= _T_17 @[lsu.scala 99:27] + node _T_18 = bits(dma_dccm_wdata, 31, 0) @[lsu.scala 100:44] + dma_dccm_wdata_lo <= _T_18 @[lsu.scala 100:27] node _T_19 = eq(lsu_lsc_ctl.io.lsu_pkt_m.bits.dma, UInt<1>("h00")) @[lsu.scala 109:58] node _T_20 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_19) @[lsu.scala 109:56] node _T_21 = eq(lsu_lsc_ctl.io.lsu_pkt_r.bits.dma, UInt<1>("h00")) @[lsu.scala 109:130] @@ -15477,11 +15477,11 @@ circuit lsu : node _T_24 = eq(_T_23, UInt<1>("h00")) @[lsu.scala 109:22] node _T_25 = and(_T_24, bus_intf.io.lsu_bus_buffer_empty_any) @[lsu.scala 109:167] io.lsu_idle_any <= _T_25 @[lsu.scala 109:19] - node _T_26 = or(lsu_lsc_ctl.io.lsu_pkt_m.valid, lsu_lsc_ctl.io.lsu_pkt_r.valid) @[lsu.scala 110:53] - node _T_27 = or(_T_26, dccm_ctl.io.ld_single_ecc_error_r_ff) @[lsu.scala 110:86] - node _T_28 = eq(bus_intf.io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[lsu.scala 110:128] - node _T_29 = or(_T_27, _T_28) @[lsu.scala 110:126] - io.lsu_active <= _T_29 @[lsu.scala 110:18] + node _T_26 = or(lsu_lsc_ctl.io.lsu_pkt_m.valid, lsu_lsc_ctl.io.lsu_pkt_r.valid) @[lsu.scala 110:54] + node _T_27 = or(_T_26, dccm_ctl.io.ld_single_ecc_error_r_ff) @[lsu.scala 110:87] + node _T_28 = eq(bus_intf.io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[lsu.scala 110:129] + node _T_29 = or(_T_27, _T_28) @[lsu.scala 110:127] + io.lsu_active <= _T_29 @[lsu.scala 110:19] node _T_30 = and(lsu_lsc_ctl.io.lsu_pkt_r.valid, lsu_lsc_ctl.io.lsu_pkt_r.bits.store) @[lsu.scala 112:61] node _T_31 = and(_T_30, lsu_lsc_ctl.io.addr_in_dccm_r) @[lsu.scala 112:99] node _T_32 = eq(io.dec_tlu_i0_kill_writeb_r, UInt<1>("h00")) @[lsu.scala 112:133] @@ -15492,27 +15492,27 @@ circuit lsu : node _T_37 = and(_T_35, _T_36) @[lsu.scala 112:255] node _T_38 = or(_T_34, _T_37) @[lsu.scala 112:180] node store_stbuf_reqvld_r = and(_T_33, _T_38) @[lsu.scala 112:142] - node _T_39 = or(lsu_lsc_ctl.io.lsu_pkt_m.bits.load, lsu_lsc_ctl.io.lsu_pkt_m.bits.store) @[lsu.scala 114:90] - node _T_40 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_39) @[lsu.scala 114:52] - node _T_41 = or(lsu_lsc_ctl.io.addr_in_dccm_m, lsu_lsc_ctl.io.addr_in_pic_m) @[lsu.scala 114:162] - node lsu_cmpen_m = and(_T_40, _T_41) @[lsu.scala 114:129] - node _T_42 = or(lsu_lsc_ctl.io.lsu_pkt_m.bits.load, lsu_lsc_ctl.io.lsu_pkt_m.bits.store) @[lsu.scala 116:92] - node _T_43 = and(_T_42, lsu_lsc_ctl.io.addr_external_m) @[lsu.scala 116:131] - node _T_44 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_43) @[lsu.scala 116:53] - node _T_45 = eq(io.dec_tlu_flush_lower_r, UInt<1>("h00")) @[lsu.scala 116:167] - node _T_46 = and(_T_44, _T_45) @[lsu.scala 116:165] - node _T_47 = eq(lsu_lsc_ctl.io.lsu_exc_m, UInt<1>("h00")) @[lsu.scala 116:181] - node _T_48 = and(_T_46, _T_47) @[lsu.scala 116:179] - node _T_49 = eq(lsu_lsc_ctl.io.lsu_pkt_m.bits.fast_int, UInt<1>("h00")) @[lsu.scala 116:209] - node lsu_busreq_m = and(_T_48, _T_49) @[lsu.scala 116:207] - node _T_50 = bits(lsu_lsc_ctl.io.lsu_addr_m, 0, 0) @[lsu.scala 120:127] - node _T_51 = and(lsu_lsc_ctl.io.lsu_pkt_m.bits.half, _T_50) @[lsu.scala 120:100] - node _T_52 = bits(lsu_lsc_ctl.io.lsu_addr_m, 1, 0) @[lsu.scala 120:197] - node _T_53 = orr(_T_52) @[lsu.scala 120:203] - node _T_54 = and(lsu_lsc_ctl.io.lsu_pkt_m.bits.word, _T_53) @[lsu.scala 120:170] - node _T_55 = or(_T_51, _T_54) @[lsu.scala 120:132] - node _T_56 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_55) @[lsu.scala 120:61] - io.lsu_pmu_misaligned_m <= _T_56 @[lsu.scala 120:27] + node _T_39 = or(lsu_lsc_ctl.io.lsu_pkt_m.bits.load, lsu_lsc_ctl.io.lsu_pkt_m.bits.store) @[lsu.scala 114:92] + node _T_40 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_39) @[lsu.scala 114:54] + node _T_41 = or(lsu_lsc_ctl.io.addr_in_dccm_m, lsu_lsc_ctl.io.addr_in_pic_m) @[lsu.scala 114:164] + node lsu_cmpen_m = and(_T_40, _T_41) @[lsu.scala 114:131] + node _T_42 = or(lsu_lsc_ctl.io.lsu_pkt_m.bits.load, lsu_lsc_ctl.io.lsu_pkt_m.bits.store) @[lsu.scala 116:93] + node _T_43 = and(_T_42, lsu_lsc_ctl.io.addr_external_m) @[lsu.scala 116:132] + node _T_44 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_43) @[lsu.scala 116:54] + node _T_45 = eq(io.dec_tlu_flush_lower_r, UInt<1>("h00")) @[lsu.scala 116:168] + node _T_46 = and(_T_44, _T_45) @[lsu.scala 116:166] + node _T_47 = eq(lsu_lsc_ctl.io.lsu_exc_m, UInt<1>("h00")) @[lsu.scala 116:182] + node _T_48 = and(_T_46, _T_47) @[lsu.scala 116:180] + node _T_49 = eq(lsu_lsc_ctl.io.lsu_pkt_m.bits.fast_int, UInt<1>("h00")) @[lsu.scala 116:210] + node lsu_busreq_m = and(_T_48, _T_49) @[lsu.scala 116:208] + node _T_50 = bits(lsu_lsc_ctl.io.lsu_addr_m, 0, 0) @[lsu.scala 120:139] + node _T_51 = and(lsu_lsc_ctl.io.lsu_pkt_m.bits.half, _T_50) @[lsu.scala 120:112] + node _T_52 = bits(lsu_lsc_ctl.io.lsu_addr_m, 1, 0) @[lsu.scala 120:209] + node _T_53 = orr(_T_52) @[lsu.scala 120:215] + node _T_54 = and(lsu_lsc_ctl.io.lsu_pkt_m.bits.word, _T_53) @[lsu.scala 120:182] + node _T_55 = or(_T_51, _T_54) @[lsu.scala 120:144] + node _T_56 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, _T_55) @[lsu.scala 120:73] + io.lsu_pmu_misaligned_m <= _T_56 @[lsu.scala 120:39] node _T_57 = and(lsu_lsc_ctl.io.lsu_pkt_m.valid, lsu_lsc_ctl.io.lsu_pkt_m.bits.load) @[lsu.scala 121:73] node _T_58 = and(_T_57, lsu_lsc_ctl.io.addr_external_m) @[lsu.scala 121:110] io.lsu_tlu.lsu_pmu_load_external_m <= _T_58 @[lsu.scala 121:39] @@ -15724,52 +15724,52 @@ circuit lsu : stbuf.io.ldst_dual_r <= _T_88 @[lsu.scala 229:50] stbuf.io.lsu_stbuf_c1_clk <= clkdomain.io.lsu_stbuf_c1_clk @[lsu.scala 230:54] stbuf.io.lsu_free_c2_clk <= clkdomain.io.lsu_free_c2_clk @[lsu.scala 231:54] - stbuf.io.lsu_pkt_m.bits.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.bits.store_data_bypass_m @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.bits.load_ldst_bypass_d @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.bits.store_data_bypass_d @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.dma <= lsu_lsc_ctl.io.lsu_pkt_m.bits.dma @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.bits.unsign @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.store <= lsu_lsc_ctl.io.lsu_pkt_m.bits.store @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.load <= lsu_lsc_ctl.io.lsu_pkt_m.bits.load @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.dword <= lsu_lsc_ctl.io.lsu_pkt_m.bits.dword @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.word <= lsu_lsc_ctl.io.lsu_pkt_m.bits.word @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.half <= lsu_lsc_ctl.io.lsu_pkt_m.bits.half @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.by <= lsu_lsc_ctl.io.lsu_pkt_m.bits.by @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.stack <= lsu_lsc_ctl.io.lsu_pkt_m.bits.stack @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.bits.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.bits.fast_int @[lsu.scala 232:48] - stbuf.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[lsu.scala 232:48] - stbuf.io.lsu_pkt_r.bits.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.bits.store_data_bypass_m @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.bits.load_ldst_bypass_d @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.bits.store_data_bypass_d @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.dma <= lsu_lsc_ctl.io.lsu_pkt_r.bits.dma @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.bits.unsign @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.store <= lsu_lsc_ctl.io.lsu_pkt_r.bits.store @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.load <= lsu_lsc_ctl.io.lsu_pkt_r.bits.load @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.dword <= lsu_lsc_ctl.io.lsu_pkt_r.bits.dword @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.word <= lsu_lsc_ctl.io.lsu_pkt_r.bits.word @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.half <= lsu_lsc_ctl.io.lsu_pkt_r.bits.half @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.by <= lsu_lsc_ctl.io.lsu_pkt_r.bits.by @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.stack <= lsu_lsc_ctl.io.lsu_pkt_r.bits.stack @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.bits.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.bits.fast_int @[lsu.scala 233:48] - stbuf.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[lsu.scala 233:48] - stbuf.io.store_stbuf_reqvld_r <= store_stbuf_reqvld_r @[lsu.scala 234:48] - stbuf.io.lsu_commit_r <= lsu_lsc_ctl.io.lsu_commit_r @[lsu.scala 235:49] - stbuf.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[lsu.scala 236:49] + stbuf.io.lsu_pkt_m.bits.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.bits.store_data_bypass_m @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.bits.load_ldst_bypass_d @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_m.bits.store_data_bypass_d @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.dma <= lsu_lsc_ctl.io.lsu_pkt_m.bits.dma @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.unsign <= lsu_lsc_ctl.io.lsu_pkt_m.bits.unsign @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.store <= lsu_lsc_ctl.io.lsu_pkt_m.bits.store @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.load <= lsu_lsc_ctl.io.lsu_pkt_m.bits.load @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.dword <= lsu_lsc_ctl.io.lsu_pkt_m.bits.dword @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.word <= lsu_lsc_ctl.io.lsu_pkt_m.bits.word @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.half <= lsu_lsc_ctl.io.lsu_pkt_m.bits.half @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.by <= lsu_lsc_ctl.io.lsu_pkt_m.bits.by @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.stack <= lsu_lsc_ctl.io.lsu_pkt_m.bits.stack @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.bits.fast_int <= lsu_lsc_ctl.io.lsu_pkt_m.bits.fast_int @[lsu.scala 232:50] + stbuf.io.lsu_pkt_m.valid <= lsu_lsc_ctl.io.lsu_pkt_m.valid @[lsu.scala 232:50] + stbuf.io.lsu_pkt_r.bits.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_r.bits.store_data_bypass_m @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.load_ldst_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.bits.load_ldst_bypass_d @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.store_data_bypass_d <= lsu_lsc_ctl.io.lsu_pkt_r.bits.store_data_bypass_d @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.dma <= lsu_lsc_ctl.io.lsu_pkt_r.bits.dma @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.unsign <= lsu_lsc_ctl.io.lsu_pkt_r.bits.unsign @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.store <= lsu_lsc_ctl.io.lsu_pkt_r.bits.store @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.load <= lsu_lsc_ctl.io.lsu_pkt_r.bits.load @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.dword <= lsu_lsc_ctl.io.lsu_pkt_r.bits.dword @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.word <= lsu_lsc_ctl.io.lsu_pkt_r.bits.word @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.half <= lsu_lsc_ctl.io.lsu_pkt_r.bits.half @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.by <= lsu_lsc_ctl.io.lsu_pkt_r.bits.by @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.stack <= lsu_lsc_ctl.io.lsu_pkt_r.bits.stack @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.bits.fast_int <= lsu_lsc_ctl.io.lsu_pkt_r.bits.fast_int @[lsu.scala 233:50] + stbuf.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[lsu.scala 233:50] + stbuf.io.store_stbuf_reqvld_r <= store_stbuf_reqvld_r @[lsu.scala 234:50] + stbuf.io.lsu_commit_r <= lsu_lsc_ctl.io.lsu_commit_r @[lsu.scala 235:50] + stbuf.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[lsu.scala 236:50] stbuf.io.store_data_hi_r <= dccm_ctl.io.store_data_hi_r @[lsu.scala 237:62] stbuf.io.store_data_lo_r <= dccm_ctl.io.store_data_lo_r @[lsu.scala 238:62] - stbuf.io.store_datafn_hi_r <= dccm_ctl.io.store_datafn_hi_r @[lsu.scala 239:49] + stbuf.io.store_datafn_hi_r <= dccm_ctl.io.store_datafn_hi_r @[lsu.scala 239:50] stbuf.io.store_datafn_lo_r <= dccm_ctl.io.store_datafn_lo_r @[lsu.scala 240:56] - stbuf.io.lsu_stbuf_commit_any <= dccm_ctl.io.lsu_stbuf_commit_any @[lsu.scala 241:52] - stbuf.io.lsu_addr_d <= lsu_lsc_ctl.io.lsu_addr_d @[lsu.scala 242:64] - stbuf.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[lsu.scala 243:64] - stbuf.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[lsu.scala 244:64] - stbuf.io.end_addr_d <= lsu_lsc_ctl.io.end_addr_d @[lsu.scala 245:64] - stbuf.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[lsu.scala 246:64] - stbuf.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[lsu.scala 247:64] - stbuf.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[lsu.scala 248:49] + stbuf.io.lsu_stbuf_commit_any <= dccm_ctl.io.lsu_stbuf_commit_any @[lsu.scala 241:54] + stbuf.io.lsu_addr_d <= lsu_lsc_ctl.io.lsu_addr_d @[lsu.scala 242:66] + stbuf.io.lsu_addr_m <= lsu_lsc_ctl.io.lsu_addr_m @[lsu.scala 243:66] + stbuf.io.lsu_addr_r <= lsu_lsc_ctl.io.lsu_addr_r @[lsu.scala 244:66] + stbuf.io.end_addr_d <= lsu_lsc_ctl.io.end_addr_d @[lsu.scala 245:66] + stbuf.io.end_addr_m <= lsu_lsc_ctl.io.end_addr_m @[lsu.scala 246:66] + stbuf.io.end_addr_r <= lsu_lsc_ctl.io.end_addr_r @[lsu.scala 247:66] + stbuf.io.addr_in_dccm_m <= lsu_lsc_ctl.io.addr_in_dccm_m @[lsu.scala 248:50] stbuf.io.addr_in_dccm_r <= lsu_lsc_ctl.io.addr_in_dccm_r @[lsu.scala 249:56] - stbuf.io.lsu_cmpen_m <= lsu_cmpen_m @[lsu.scala 250:54] - stbuf.io.scan_mode <= io.scan_mode @[lsu.scala 251:49] + stbuf.io.lsu_cmpen_m <= lsu_cmpen_m @[lsu.scala 250:56] + stbuf.io.scan_mode <= io.scan_mode @[lsu.scala 251:50] ecc.io.clk_override <= io.clk_override @[lsu.scala 255:50] ecc.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_r_clk @[lsu.scala 256:52] ecc.io.lsu_pkt_m.bits.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.bits.store_data_bypass_m @[lsu.scala 257:52] @@ -15939,16 +15939,16 @@ circuit lsu : clkdomain.io.lsu_pkt_r.valid <= lsu_lsc_ctl.io.lsu_pkt_r.valid @[lsu.scala 310:50] clkdomain.io.scan_mode <= io.scan_mode @[lsu.scala 311:50] bus_intf.io.scan_mode <= io.scan_mode @[lsu.scala 315:49] - io.lsu_dec.tlu_busbuff.lsu_imprecise_error_addr_any <= bus_intf.io.tlu_busbuff.lsu_imprecise_error_addr_any @[lsu.scala 316:26] - io.lsu_dec.tlu_busbuff.lsu_imprecise_error_store_any <= bus_intf.io.tlu_busbuff.lsu_imprecise_error_store_any @[lsu.scala 316:26] - io.lsu_dec.tlu_busbuff.lsu_imprecise_error_load_any <= bus_intf.io.tlu_busbuff.lsu_imprecise_error_load_any @[lsu.scala 316:26] - bus_intf.io.tlu_busbuff.dec_tlu_sideeffect_posted_disable <= io.lsu_dec.tlu_busbuff.dec_tlu_sideeffect_posted_disable @[lsu.scala 316:26] - bus_intf.io.tlu_busbuff.dec_tlu_wb_coalescing_disable <= io.lsu_dec.tlu_busbuff.dec_tlu_wb_coalescing_disable @[lsu.scala 316:26] - bus_intf.io.tlu_busbuff.dec_tlu_external_ldfwd_disable <= io.lsu_dec.tlu_busbuff.dec_tlu_external_ldfwd_disable @[lsu.scala 316:26] - io.lsu_dec.tlu_busbuff.lsu_pmu_bus_busy <= bus_intf.io.tlu_busbuff.lsu_pmu_bus_busy @[lsu.scala 316:26] - io.lsu_dec.tlu_busbuff.lsu_pmu_bus_error <= bus_intf.io.tlu_busbuff.lsu_pmu_bus_error @[lsu.scala 316:26] - io.lsu_dec.tlu_busbuff.lsu_pmu_bus_misaligned <= bus_intf.io.tlu_busbuff.lsu_pmu_bus_misaligned @[lsu.scala 316:26] - io.lsu_dec.tlu_busbuff.lsu_pmu_bus_trxn <= bus_intf.io.tlu_busbuff.lsu_pmu_bus_trxn @[lsu.scala 316:26] + io.lsu_dec.tlu_busbuff.lsu_imprecise_error_addr_any <= bus_intf.io.tlu_busbuff.lsu_imprecise_error_addr_any @[lsu.scala 316:49] + io.lsu_dec.tlu_busbuff.lsu_imprecise_error_store_any <= bus_intf.io.tlu_busbuff.lsu_imprecise_error_store_any @[lsu.scala 316:49] + io.lsu_dec.tlu_busbuff.lsu_imprecise_error_load_any <= bus_intf.io.tlu_busbuff.lsu_imprecise_error_load_any @[lsu.scala 316:49] + bus_intf.io.tlu_busbuff.dec_tlu_sideeffect_posted_disable <= io.lsu_dec.tlu_busbuff.dec_tlu_sideeffect_posted_disable @[lsu.scala 316:49] + bus_intf.io.tlu_busbuff.dec_tlu_wb_coalescing_disable <= io.lsu_dec.tlu_busbuff.dec_tlu_wb_coalescing_disable @[lsu.scala 316:49] + bus_intf.io.tlu_busbuff.dec_tlu_external_ldfwd_disable <= io.lsu_dec.tlu_busbuff.dec_tlu_external_ldfwd_disable @[lsu.scala 316:49] + io.lsu_dec.tlu_busbuff.lsu_pmu_bus_busy <= bus_intf.io.tlu_busbuff.lsu_pmu_bus_busy @[lsu.scala 316:49] + io.lsu_dec.tlu_busbuff.lsu_pmu_bus_error <= bus_intf.io.tlu_busbuff.lsu_pmu_bus_error @[lsu.scala 316:49] + io.lsu_dec.tlu_busbuff.lsu_pmu_bus_misaligned <= bus_intf.io.tlu_busbuff.lsu_pmu_bus_misaligned @[lsu.scala 316:49] + io.lsu_dec.tlu_busbuff.lsu_pmu_bus_trxn <= bus_intf.io.tlu_busbuff.lsu_pmu_bus_trxn @[lsu.scala 316:49] bus_intf.io.clk_override <= io.clk_override @[lsu.scala 317:49] bus_intf.io.lsu_c1_r_clk <= clkdomain.io.lsu_c1_r_clk @[lsu.scala 318:49] bus_intf.io.lsu_c2_r_clk <= clkdomain.io.lsu_c2_r_clk @[lsu.scala 319:49] @@ -16029,55 +16029,55 @@ circuit lsu : bus_intf.io.is_sideeffects_m <= lsu_lsc_ctl.io.is_sideeffects_m @[lsu.scala 342:49] bus_intf.io.flush_m_up <= io.dec_tlu_flush_lower_r @[lsu.scala 343:49] bus_intf.io.flush_r <= io.dec_tlu_i0_kill_writeb_r @[lsu.scala 344:49] - io.lsu_dec.dctl_busbuff.lsu_nonblock_load_data_tag <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_data_tag @[lsu.scala 346:27] - io.lsu_dec.dctl_busbuff.lsu_nonblock_load_data_error <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_data_error @[lsu.scala 346:27] - io.lsu_dec.dctl_busbuff.lsu_nonblock_load_data_valid <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_data_valid @[lsu.scala 346:27] - io.lsu_dec.dctl_busbuff.lsu_nonblock_load_inv_tag_r <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_inv_tag_r @[lsu.scala 346:27] - io.lsu_dec.dctl_busbuff.lsu_nonblock_load_inv_r <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_inv_r @[lsu.scala 346:27] - io.lsu_dec.dctl_busbuff.lsu_nonblock_load_tag_m <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_tag_m @[lsu.scala 346:27] - io.lsu_dec.dctl_busbuff.lsu_nonblock_load_valid_m <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_valid_m @[lsu.scala 346:27] - io.lsu_nonblock_load_data <= bus_intf.io.lsu_nonblock_load_data @[lsu.scala 347:29] - lsu_busreq_r <= bus_intf.io.lsu_busreq_r @[lsu.scala 348:16] - bus_intf.io.axi.r.bits.last <= io.axi.r.bits.last @[lsu.scala 349:49] - bus_intf.io.axi.r.bits.resp <= io.axi.r.bits.resp @[lsu.scala 349:49] - bus_intf.io.axi.r.bits.data <= io.axi.r.bits.data @[lsu.scala 349:49] - bus_intf.io.axi.r.bits.id <= io.axi.r.bits.id @[lsu.scala 349:49] - bus_intf.io.axi.r.valid <= io.axi.r.valid @[lsu.scala 349:49] - io.axi.r.ready <= bus_intf.io.axi.r.ready @[lsu.scala 349:49] - io.axi.ar.bits.qos <= bus_intf.io.axi.ar.bits.qos @[lsu.scala 349:49] - io.axi.ar.bits.prot <= bus_intf.io.axi.ar.bits.prot @[lsu.scala 349:49] - io.axi.ar.bits.cache <= bus_intf.io.axi.ar.bits.cache @[lsu.scala 349:49] - io.axi.ar.bits.lock <= bus_intf.io.axi.ar.bits.lock @[lsu.scala 349:49] - io.axi.ar.bits.burst <= bus_intf.io.axi.ar.bits.burst @[lsu.scala 349:49] - io.axi.ar.bits.size <= bus_intf.io.axi.ar.bits.size @[lsu.scala 349:49] - io.axi.ar.bits.len <= bus_intf.io.axi.ar.bits.len @[lsu.scala 349:49] - io.axi.ar.bits.region <= bus_intf.io.axi.ar.bits.region @[lsu.scala 349:49] - io.axi.ar.bits.addr <= bus_intf.io.axi.ar.bits.addr @[lsu.scala 349:49] - io.axi.ar.bits.id <= bus_intf.io.axi.ar.bits.id @[lsu.scala 349:49] - io.axi.ar.valid <= bus_intf.io.axi.ar.valid @[lsu.scala 349:49] - bus_intf.io.axi.ar.ready <= io.axi.ar.ready @[lsu.scala 349:49] - bus_intf.io.axi.b.bits.id <= io.axi.b.bits.id @[lsu.scala 349:49] - bus_intf.io.axi.b.bits.resp <= io.axi.b.bits.resp @[lsu.scala 349:49] - bus_intf.io.axi.b.valid <= io.axi.b.valid @[lsu.scala 349:49] - io.axi.b.ready <= bus_intf.io.axi.b.ready @[lsu.scala 349:49] - io.axi.w.bits.last <= bus_intf.io.axi.w.bits.last @[lsu.scala 349:49] - io.axi.w.bits.strb <= bus_intf.io.axi.w.bits.strb @[lsu.scala 349:49] - io.axi.w.bits.data <= bus_intf.io.axi.w.bits.data @[lsu.scala 349:49] - io.axi.w.valid <= bus_intf.io.axi.w.valid @[lsu.scala 349:49] - bus_intf.io.axi.w.ready <= io.axi.w.ready @[lsu.scala 349:49] - io.axi.aw.bits.qos <= bus_intf.io.axi.aw.bits.qos @[lsu.scala 349:49] - io.axi.aw.bits.prot <= bus_intf.io.axi.aw.bits.prot @[lsu.scala 349:49] - io.axi.aw.bits.cache <= bus_intf.io.axi.aw.bits.cache @[lsu.scala 349:49] - io.axi.aw.bits.lock <= bus_intf.io.axi.aw.bits.lock @[lsu.scala 349:49] - io.axi.aw.bits.burst <= bus_intf.io.axi.aw.bits.burst @[lsu.scala 349:49] - io.axi.aw.bits.size <= bus_intf.io.axi.aw.bits.size @[lsu.scala 349:49] - io.axi.aw.bits.len <= bus_intf.io.axi.aw.bits.len @[lsu.scala 349:49] - io.axi.aw.bits.region <= bus_intf.io.axi.aw.bits.region @[lsu.scala 349:49] - io.axi.aw.bits.addr <= bus_intf.io.axi.aw.bits.addr @[lsu.scala 349:49] - io.axi.aw.bits.id <= bus_intf.io.axi.aw.bits.id @[lsu.scala 349:49] - io.axi.aw.valid <= bus_intf.io.axi.aw.valid @[lsu.scala 349:49] - bus_intf.io.axi.aw.ready <= io.axi.aw.ready @[lsu.scala 349:49] - bus_intf.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[lsu.scala 350:49] + io.lsu_dec.dctl_busbuff.lsu_nonblock_load_data_tag <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_data_tag @[lsu.scala 346:31] + io.lsu_dec.dctl_busbuff.lsu_nonblock_load_data_error <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_data_error @[lsu.scala 346:31] + io.lsu_dec.dctl_busbuff.lsu_nonblock_load_data_valid <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_data_valid @[lsu.scala 346:31] + io.lsu_dec.dctl_busbuff.lsu_nonblock_load_inv_tag_r <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_inv_tag_r @[lsu.scala 346:31] + io.lsu_dec.dctl_busbuff.lsu_nonblock_load_inv_r <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_inv_r @[lsu.scala 346:31] + io.lsu_dec.dctl_busbuff.lsu_nonblock_load_tag_m <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_tag_m @[lsu.scala 346:31] + io.lsu_dec.dctl_busbuff.lsu_nonblock_load_valid_m <= bus_intf.io.dctl_busbuff.lsu_nonblock_load_valid_m @[lsu.scala 346:31] + io.lsu_nonblock_load_data <= bus_intf.io.lsu_nonblock_load_data @[lsu.scala 347:31] + lsu_busreq_r <= bus_intf.io.lsu_busreq_r @[lsu.scala 348:31] + bus_intf.io.axi.r.bits.last <= io.axi.r.bits.last @[lsu.scala 349:31] + bus_intf.io.axi.r.bits.resp <= io.axi.r.bits.resp @[lsu.scala 349:31] + bus_intf.io.axi.r.bits.data <= io.axi.r.bits.data @[lsu.scala 349:31] + bus_intf.io.axi.r.bits.id <= io.axi.r.bits.id @[lsu.scala 349:31] + bus_intf.io.axi.r.valid <= io.axi.r.valid @[lsu.scala 349:31] + io.axi.r.ready <= bus_intf.io.axi.r.ready @[lsu.scala 349:31] + io.axi.ar.bits.qos <= bus_intf.io.axi.ar.bits.qos @[lsu.scala 349:31] + io.axi.ar.bits.prot <= bus_intf.io.axi.ar.bits.prot @[lsu.scala 349:31] + io.axi.ar.bits.cache <= bus_intf.io.axi.ar.bits.cache @[lsu.scala 349:31] + io.axi.ar.bits.lock <= bus_intf.io.axi.ar.bits.lock @[lsu.scala 349:31] + io.axi.ar.bits.burst <= bus_intf.io.axi.ar.bits.burst @[lsu.scala 349:31] + io.axi.ar.bits.size <= bus_intf.io.axi.ar.bits.size @[lsu.scala 349:31] + io.axi.ar.bits.len <= bus_intf.io.axi.ar.bits.len @[lsu.scala 349:31] + io.axi.ar.bits.region <= bus_intf.io.axi.ar.bits.region @[lsu.scala 349:31] + io.axi.ar.bits.addr <= bus_intf.io.axi.ar.bits.addr @[lsu.scala 349:31] + io.axi.ar.bits.id <= bus_intf.io.axi.ar.bits.id @[lsu.scala 349:31] + io.axi.ar.valid <= bus_intf.io.axi.ar.valid @[lsu.scala 349:31] + bus_intf.io.axi.ar.ready <= io.axi.ar.ready @[lsu.scala 349:31] + bus_intf.io.axi.b.bits.id <= io.axi.b.bits.id @[lsu.scala 349:31] + bus_intf.io.axi.b.bits.resp <= io.axi.b.bits.resp @[lsu.scala 349:31] + bus_intf.io.axi.b.valid <= io.axi.b.valid @[lsu.scala 349:31] + io.axi.b.ready <= bus_intf.io.axi.b.ready @[lsu.scala 349:31] + io.axi.w.bits.last <= bus_intf.io.axi.w.bits.last @[lsu.scala 349:31] + io.axi.w.bits.strb <= bus_intf.io.axi.w.bits.strb @[lsu.scala 349:31] + io.axi.w.bits.data <= bus_intf.io.axi.w.bits.data @[lsu.scala 349:31] + io.axi.w.valid <= bus_intf.io.axi.w.valid @[lsu.scala 349:31] + bus_intf.io.axi.w.ready <= io.axi.w.ready @[lsu.scala 349:31] + io.axi.aw.bits.qos <= bus_intf.io.axi.aw.bits.qos @[lsu.scala 349:31] + io.axi.aw.bits.prot <= bus_intf.io.axi.aw.bits.prot @[lsu.scala 349:31] + io.axi.aw.bits.cache <= bus_intf.io.axi.aw.bits.cache @[lsu.scala 349:31] + io.axi.aw.bits.lock <= bus_intf.io.axi.aw.bits.lock @[lsu.scala 349:31] + io.axi.aw.bits.burst <= bus_intf.io.axi.aw.bits.burst @[lsu.scala 349:31] + io.axi.aw.bits.size <= bus_intf.io.axi.aw.bits.size @[lsu.scala 349:31] + io.axi.aw.bits.len <= bus_intf.io.axi.aw.bits.len @[lsu.scala 349:31] + io.axi.aw.bits.region <= bus_intf.io.axi.aw.bits.region @[lsu.scala 349:31] + io.axi.aw.bits.addr <= bus_intf.io.axi.aw.bits.addr @[lsu.scala 349:31] + io.axi.aw.bits.id <= bus_intf.io.axi.aw.bits.id @[lsu.scala 349:31] + io.axi.aw.valid <= bus_intf.io.axi.aw.valid @[lsu.scala 349:31] + bus_intf.io.axi.aw.ready <= io.axi.aw.ready @[lsu.scala 349:31] + bus_intf.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[lsu.scala 350:31] reg _T_115 : UInt, clkdomain.io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu.scala 352:67] _T_115 <= io.lsu_dma.dma_mem_tag @[lsu.scala 352:67] dma_mem_tag_m <= _T_115 @[lsu.scala 352:57] diff --git a/lsu.v b/lsu.v index 2d1d7bc1..42c12f46 100644 --- a/lsu.v +++ b/lsu.v @@ -5852,8 +5852,7 @@ module lsu_bus_buffer( wire [3:0] buf_numvld_cmd_any = _T_4460 + _GEN_379; // @[lsu_bus_buffer.scala 534:126] wire _T_1017 = buf_numvld_cmd_any == 4'h1; // @[lsu_bus_buffer.scala 267:72] wire _T_1018 = _T_1016 & _T_1017; // @[lsu_bus_buffer.scala 267:51] - reg _T_1791; // @[Reg.scala 27:20] - wire [2:0] obuf_wr_timer = {{2'd0}, _T_1791}; // @[lsu_bus_buffer.scala 365:17] + reg [2:0] obuf_wr_timer; // @[Reg.scala 27:20] wire _T_1019 = obuf_wr_timer != 3'h7; // @[lsu_bus_buffer.scala 267:97] wire _T_1020 = _T_1018 & _T_1019; // @[lsu_bus_buffer.scala 267:80] wire _T_1022 = _T_1020 & _T_938; // @[lsu_bus_buffer.scala 267:114] @@ -5926,6 +5925,10 @@ module lsu_bus_buffer( wire obuf_force_wr_en = _T_1067 & _T_1085; // @[lsu_bus_buffer.scala 271:101] wire _T_1055 = ~obuf_force_wr_en; // @[lsu_bus_buffer.scala 269:119] wire obuf_wr_wait = _T_1054 & _T_1055; // @[lsu_bus_buffer.scala 269:117] + wire _T_1056 = |buf_numvld_cmd_any; // @[lsu_bus_buffer.scala 270:75] + wire _T_1057 = obuf_wr_timer < 3'h7; // @[lsu_bus_buffer.scala 270:95] + wire _T_1058 = _T_1056 & _T_1057; // @[lsu_bus_buffer.scala 270:79] + wire [2:0] _T_1060 = obuf_wr_timer + 3'h1; // @[lsu_bus_buffer.scala 270:123] wire _T_4477 = buf_state_3 == 3'h1; // @[lsu_bus_buffer.scala 535:63] wire _T_4481 = _T_4477 | _T_2590; // @[lsu_bus_buffer.scala 535:74] wire _T_4472 = buf_state_2 == 3'h1; // @[lsu_bus_buffer.scala 535:63] @@ -6117,9 +6120,6 @@ module lsu_bus_buffer( wire _T_2039 = _T_2037 | _T_2018[7]; // @[lsu_bus_buffer.scala 391:104] wire [2:0] _T_2041 = {_T_2025,_T_2032,_T_2039}; // @[Cat.scala 29:58] wire [1:0] CmdPtr1 = _T_2041[1:0]; // @[lsu_bus_buffer.scala 398:11] - wire _T_1302 = obuf_wr_en | obuf_rst; // @[lsu_bus_buffer.scala 310:39] - wire _T_1303 = ~_T_1302; // @[lsu_bus_buffer.scala 310:26] - wire obuf_data_done_in = _T_1303 & bus_wdata_sent; // @[lsu_bus_buffer.scala 313:52] wire _T_1309 = obuf_sz_in == 2'h0; // @[lsu_bus_buffer.scala 314:72] wire _T_1312 = ~obuf_addr_in[0]; // @[lsu_bus_buffer.scala 314:98] wire _T_1313 = obuf_sz_in[0] & _T_1312; // @[lsu_bus_buffer.scala 314:96] @@ -7581,7 +7581,7 @@ initial begin _RAND_40 = {1{`RANDOM}}; ibuf_sz = _RAND_40[1:0]; _RAND_41 = {1{`RANDOM}}; - _T_1791 = _RAND_41[0:0]; + obuf_wr_timer = _RAND_41[2:0]; _RAND_42 = {1{`RANDOM}}; buf_nomerge_0 = _RAND_42[0:0]; _RAND_43 = {1{`RANDOM}}; @@ -7807,7 +7807,7 @@ initial begin ibuf_sz = 2'h0; end if (reset) begin - _T_1791 = 1'h0; + obuf_wr_timer = 3'h0; end if (reset) begin buf_nomerge_0 = 1'h0; @@ -8628,9 +8628,13 @@ end // initial end always @(posedge clock or posedge reset) begin if (reset) begin - _T_1791 <= 1'h0; + obuf_wr_timer <= 3'h0; end else if (obuf_wr_en) begin - _T_1791 <= obuf_data_done_in; + if (obuf_wr_en) begin + obuf_wr_timer <= 3'h0; + end else if (_T_1058) begin + obuf_wr_timer <= _T_1060; + end end end always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin @@ -9484,18 +9488,18 @@ module lsu_bus_intf( assign io_tlu_busbuff_lsu_imprecise_error_load_any = bus_buffer_io_tlu_busbuff_lsu_imprecise_error_load_any; // @[lsu_bus_intf.scala 103:18] assign io_tlu_busbuff_lsu_imprecise_error_store_any = bus_buffer_io_tlu_busbuff_lsu_imprecise_error_store_any; // @[lsu_bus_intf.scala 103:18] assign io_tlu_busbuff_lsu_imprecise_error_addr_any = bus_buffer_io_tlu_busbuff_lsu_imprecise_error_addr_any; // @[lsu_bus_intf.scala 103:18] - assign io_axi_aw_bits_addr = bus_buffer_io_lsu_axi_aw_bits_addr; // @[lsu_bus_intf.scala 131:51] - assign io_axi_aw_bits_region = bus_buffer_io_lsu_axi_aw_bits_region; // @[lsu_bus_intf.scala 131:51] - assign io_axi_w_bits_data = bus_buffer_io_lsu_axi_w_bits_data; // @[lsu_bus_intf.scala 131:51] - assign io_axi_ar_valid = bus_buffer_io_lsu_axi_ar_valid; // @[lsu_bus_intf.scala 131:51] - assign io_axi_ar_bits_addr = bus_buffer_io_lsu_axi_ar_bits_addr; // @[lsu_bus_intf.scala 131:51] - assign io_axi_ar_bits_region = bus_buffer_io_lsu_axi_ar_bits_region; // @[lsu_bus_intf.scala 131:51] + assign io_axi_aw_bits_addr = bus_buffer_io_lsu_axi_aw_bits_addr; // @[lsu_bus_intf.scala 131:38] + assign io_axi_aw_bits_region = bus_buffer_io_lsu_axi_aw_bits_region; // @[lsu_bus_intf.scala 131:38] + assign io_axi_w_bits_data = bus_buffer_io_lsu_axi_w_bits_data; // @[lsu_bus_intf.scala 131:38] + assign io_axi_ar_valid = bus_buffer_io_lsu_axi_ar_valid; // @[lsu_bus_intf.scala 131:38] + assign io_axi_ar_bits_addr = bus_buffer_io_lsu_axi_ar_bits_addr; // @[lsu_bus_intf.scala 131:38] + assign io_axi_ar_bits_region = bus_buffer_io_lsu_axi_ar_bits_region; // @[lsu_bus_intf.scala 131:38] assign io_lsu_busreq_r = bus_buffer_io_lsu_busreq_r; // @[lsu_bus_intf.scala 134:38] assign io_lsu_bus_buffer_pend_any = bus_buffer_io_lsu_bus_buffer_pend_any; // @[lsu_bus_intf.scala 135:38] assign io_lsu_bus_buffer_full_any = bus_buffer_io_lsu_bus_buffer_full_any; // @[lsu_bus_intf.scala 136:38] assign io_lsu_bus_buffer_empty_any = bus_buffer_io_lsu_bus_buffer_empty_any; // @[lsu_bus_intf.scala 137:38] assign io_bus_read_data_m = ld_fwddata_m[31:0]; // @[lsu_bus_intf.scala 192:27] - assign io_lsu_nonblock_load_data = bus_buffer_io_lsu_nonblock_load_data; // @[lsu_bus_intf.scala 133:29] + assign io_lsu_nonblock_load_data = bus_buffer_io_lsu_nonblock_load_data; // @[lsu_bus_intf.scala 133:38] assign io_dctl_busbuff_lsu_nonblock_load_valid_m = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_valid_m; // @[lsu_bus_intf.scala 143:19] assign io_dctl_busbuff_lsu_nonblock_load_tag_m = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_tag_m; // @[lsu_bus_intf.scala 143:19] assign io_dctl_busbuff_lsu_nonblock_load_inv_r = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_inv_r; // @[lsu_bus_intf.scala 143:19] @@ -9522,34 +9526,34 @@ module lsu_bus_intf( assign bus_buffer_io_lsu_pkt_r_bits_load = io_lsu_pkt_r_bits_load; // @[lsu_bus_intf.scala 118:27] assign bus_buffer_io_lsu_pkt_r_bits_store = io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 118:27] assign bus_buffer_io_lsu_pkt_r_bits_unsign = io_lsu_pkt_r_bits_unsign; // @[lsu_bus_intf.scala 118:27] - assign bus_buffer_io_lsu_addr_m = io_lsu_addr_m; // @[lsu_bus_intf.scala 121:51] - assign bus_buffer_io_end_addr_m = io_end_addr_m; // @[lsu_bus_intf.scala 122:51] - assign bus_buffer_io_lsu_addr_r = io_lsu_addr_r; // @[lsu_bus_intf.scala 123:51] - assign bus_buffer_io_end_addr_r = io_end_addr_r; // @[lsu_bus_intf.scala 124:51] - assign bus_buffer_io_store_data_r = io_store_data_r; // @[lsu_bus_intf.scala 125:51] + assign bus_buffer_io_lsu_addr_m = io_lsu_addr_m; // @[lsu_bus_intf.scala 121:38] + assign bus_buffer_io_end_addr_m = io_end_addr_m; // @[lsu_bus_intf.scala 122:38] + assign bus_buffer_io_lsu_addr_r = io_lsu_addr_r; // @[lsu_bus_intf.scala 123:38] + assign bus_buffer_io_end_addr_r = io_end_addr_r; // @[lsu_bus_intf.scala 124:38] + assign bus_buffer_io_store_data_r = io_store_data_r; // @[lsu_bus_intf.scala 125:38] assign bus_buffer_io_no_word_merge_r = _T_19 & _T_21; // @[lsu_bus_intf.scala 144:51] assign bus_buffer_io_no_dword_merge_r = _T_19 & _T_27; // @[lsu_bus_intf.scala 145:51] - assign bus_buffer_io_lsu_busreq_m = io_lsu_busreq_m; // @[lsu_bus_intf.scala 127:51] + assign bus_buffer_io_lsu_busreq_m = io_lsu_busreq_m; // @[lsu_bus_intf.scala 127:38] assign bus_buffer_io_ld_full_hit_m = _T_369 & _T_370; // @[lsu_bus_intf.scala 151:51] - assign bus_buffer_io_flush_m_up = io_flush_m_up; // @[lsu_bus_intf.scala 128:51] - assign bus_buffer_io_flush_r = io_flush_r; // @[lsu_bus_intf.scala 129:51] - assign bus_buffer_io_lsu_commit_r = io_lsu_commit_r; // @[lsu_bus_intf.scala 130:51] + assign bus_buffer_io_flush_m_up = io_flush_m_up; // @[lsu_bus_intf.scala 128:38] + assign bus_buffer_io_flush_r = io_flush_r; // @[lsu_bus_intf.scala 129:38] + assign bus_buffer_io_lsu_commit_r = io_lsu_commit_r; // @[lsu_bus_intf.scala 130:38] assign bus_buffer_io_is_sideeffects_r = is_sideeffects_r; // @[lsu_bus_intf.scala 146:51] assign bus_buffer_io_ldst_dual_d = io_ldst_dual_d; // @[lsu_bus_intf.scala 147:51] assign bus_buffer_io_ldst_dual_m = io_ldst_dual_m; // @[lsu_bus_intf.scala 148:51] assign bus_buffer_io_ldst_dual_r = io_ldst_dual_r; // @[lsu_bus_intf.scala 149:51] assign bus_buffer_io_ldst_byteen_ext_m = {{1'd0}, _T_31}; // @[lsu_bus_intf.scala 150:51] - assign bus_buffer_io_lsu_axi_aw_ready = io_axi_aw_ready; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_axi_w_ready = io_axi_w_ready; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_axi_b_valid = io_axi_b_valid; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_axi_b_bits_resp = io_axi_b_bits_resp; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_axi_b_bits_id = io_axi_b_bits_id; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_axi_ar_ready = io_axi_ar_ready; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_axi_r_valid = io_axi_r_valid; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_axi_r_bits_id = io_axi_r_bits_id; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_axi_r_bits_data = io_axi_r_bits_data; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_axi_r_bits_resp = io_axi_r_bits_resp; // @[lsu_bus_intf.scala 131:51] - assign bus_buffer_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[lsu_bus_intf.scala 132:51] + assign bus_buffer_io_lsu_axi_aw_ready = io_axi_aw_ready; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_axi_w_ready = io_axi_w_ready; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_axi_b_valid = io_axi_b_valid; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_axi_b_bits_resp = io_axi_b_bits_resp; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_axi_b_bits_id = io_axi_b_bits_id; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_axi_ar_ready = io_axi_ar_ready; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_axi_r_valid = io_axi_r_valid; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_axi_r_bits_id = io_axi_r_bits_id; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_axi_r_bits_data = io_axi_r_bits_data; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_axi_r_bits_resp = io_axi_r_bits_resp; // @[lsu_bus_intf.scala 131:38] + assign bus_buffer_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[lsu_bus_intf.scala 132:38] assign bus_buffer_io_lsu_bus_clk_en_q = lsu_bus_clk_en_q; // @[lsu_bus_intf.scala 152:51] `ifdef RANDOMIZE_GARBAGE_ASSIGN `define RANDOMIZE @@ -10218,25 +10222,25 @@ module lsu( wire bus_intf_io_dctl_busbuff_lsu_nonblock_load_data_error; // @[lsu.scala 81:30] wire [1:0] bus_intf_io_dctl_busbuff_lsu_nonblock_load_data_tag; // @[lsu.scala 81:30] wire bus_intf_io_lsu_bus_clk_en; // @[lsu.scala 81:30] - wire _T = stbuf_io_lsu_stbuf_full_any | bus_intf_io_lsu_bus_buffer_full_any; // @[lsu.scala 87:57] - wire _T_3 = ~lsu_lsc_ctl_io_lsu_pkt_m_bits_dma; // @[lsu.scala 94:58] - wire _T_4 = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_3; // @[lsu.scala 94:56] - wire _T_5 = lsu_lsc_ctl_io_addr_in_dccm_m | lsu_lsc_ctl_io_addr_in_pic_m; // @[lsu.scala 94:126] - wire _T_6 = _T_4 & _T_5; // @[lsu.scala 94:93] - wire ldst_nodma_mtor = _T_6 & lsu_lsc_ctl_io_lsu_pkt_m_bits_store; // @[lsu.scala 94:158] - wire _T_7 = io_dec_lsu_valid_raw_d | ldst_nodma_mtor; // @[lsu.scala 95:53] - wire _T_8 = _T_7 | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[lsu.scala 95:71] - wire _T_10 = io_lsu_dma_dma_lsc_ctl_dma_dccm_req & io_lsu_dma_dma_lsc_ctl_dma_mem_write; // @[lsu.scala 96:58] - wire _T_11 = _T_10 & lsu_lsc_ctl_io_addr_in_dccm_d; // @[lsu.scala 96:97] + wire _T = stbuf_io_lsu_stbuf_full_any | bus_intf_io_lsu_bus_buffer_full_any; // @[lsu.scala 87:60] + wire _T_3 = ~lsu_lsc_ctl_io_lsu_pkt_m_bits_dma; // @[lsu.scala 94:62] + wire _T_4 = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_3; // @[lsu.scala 94:60] + wire _T_5 = lsu_lsc_ctl_io_addr_in_dccm_m | lsu_lsc_ctl_io_addr_in_pic_m; // @[lsu.scala 94:130] + wire _T_6 = _T_4 & _T_5; // @[lsu.scala 94:97] + wire ldst_nodma_mtor = _T_6 & lsu_lsc_ctl_io_lsu_pkt_m_bits_store; // @[lsu.scala 94:162] + wire _T_7 = io_dec_lsu_valid_raw_d | ldst_nodma_mtor; // @[lsu.scala 95:55] + wire _T_8 = _T_7 | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[lsu.scala 95:73] + wire _T_10 = io_lsu_dma_dma_lsc_ctl_dma_dccm_req & io_lsu_dma_dma_lsc_ctl_dma_mem_write; // @[lsu.scala 96:65] + wire _T_11 = _T_10 & lsu_lsc_ctl_io_addr_in_dccm_d; // @[lsu.scala 96:104] wire [5:0] _T_15 = {io_lsu_dma_dma_lsc_ctl_dma_mem_addr[2:0],3'h0}; // @[Cat.scala 29:58] - wire [63:0] dma_dccm_wdata = io_lsu_dma_dma_lsc_ctl_dma_mem_wdata >> _T_15; // @[lsu.scala 98:58] + wire [63:0] dma_dccm_wdata = io_lsu_dma_dma_lsc_ctl_dma_mem_wdata >> _T_15; // @[lsu.scala 98:67] wire _T_21 = ~lsu_lsc_ctl_io_lsu_pkt_r_bits_dma; // @[lsu.scala 109:130] wire _T_22 = lsu_lsc_ctl_io_lsu_pkt_r_valid & _T_21; // @[lsu.scala 109:128] wire _T_23 = _T_4 | _T_22; // @[lsu.scala 109:94] wire _T_24 = ~_T_23; // @[lsu.scala 109:22] - wire _T_26 = lsu_lsc_ctl_io_lsu_pkt_m_valid | lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[lsu.scala 110:53] - wire _T_27 = _T_26 | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[lsu.scala 110:86] - wire _T_28 = ~bus_intf_io_lsu_bus_buffer_empty_any; // @[lsu.scala 110:128] + wire _T_26 = lsu_lsc_ctl_io_lsu_pkt_m_valid | lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[lsu.scala 110:54] + wire _T_27 = _T_26 | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[lsu.scala 110:87] + wire _T_28 = ~bus_intf_io_lsu_bus_buffer_empty_any; // @[lsu.scala 110:129] wire _T_30 = lsu_lsc_ctl_io_lsu_pkt_r_valid & lsu_lsc_ctl_io_lsu_pkt_r_bits_store; // @[lsu.scala 112:61] wire _T_31 = _T_30 & lsu_lsc_ctl_io_addr_in_dccm_r; // @[lsu.scala 112:99] wire _T_32 = ~io_dec_tlu_i0_kill_writeb_r; // @[lsu.scala 112:133] @@ -10245,23 +10249,23 @@ module lsu( wire _T_36 = ~ecc_io_lsu_double_ecc_error_r; // @[lsu.scala 112:257] wire _T_37 = _T_35 & _T_36; // @[lsu.scala 112:255] wire _T_38 = _T_21 | _T_37; // @[lsu.scala 112:180] - wire _T_39 = lsu_lsc_ctl_io_lsu_pkt_m_bits_load | lsu_lsc_ctl_io_lsu_pkt_m_bits_store; // @[lsu.scala 114:90] - wire _T_43 = _T_39 & lsu_lsc_ctl_io_addr_external_m; // @[lsu.scala 116:131] - wire _T_44 = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_43; // @[lsu.scala 116:53] - wire _T_45 = ~io_dec_tlu_flush_lower_r; // @[lsu.scala 116:167] - wire _T_46 = _T_44 & _T_45; // @[lsu.scala 116:165] - wire _T_47 = ~lsu_lsc_ctl_io_lsu_exc_m; // @[lsu.scala 116:181] - wire _T_48 = _T_46 & _T_47; // @[lsu.scala 116:179] - wire _T_49 = ~lsu_lsc_ctl_io_lsu_pkt_m_bits_fast_int; // @[lsu.scala 116:209] - wire _T_51 = lsu_lsc_ctl_io_lsu_pkt_m_bits_half & lsu_lsc_ctl_io_lsu_addr_m[0]; // @[lsu.scala 120:100] - wire _T_53 = |lsu_lsc_ctl_io_lsu_addr_m[1:0]; // @[lsu.scala 120:203] - wire _T_54 = lsu_lsc_ctl_io_lsu_pkt_m_bits_word & _T_53; // @[lsu.scala 120:170] - wire _T_55 = _T_51 | _T_54; // @[lsu.scala 120:132] + wire _T_39 = lsu_lsc_ctl_io_lsu_pkt_m_bits_load | lsu_lsc_ctl_io_lsu_pkt_m_bits_store; // @[lsu.scala 114:92] + wire _T_43 = _T_39 & lsu_lsc_ctl_io_addr_external_m; // @[lsu.scala 116:132] + wire _T_44 = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_43; // @[lsu.scala 116:54] + wire _T_45 = ~io_dec_tlu_flush_lower_r; // @[lsu.scala 116:168] + wire _T_46 = _T_44 & _T_45; // @[lsu.scala 116:166] + wire _T_47 = ~lsu_lsc_ctl_io_lsu_exc_m; // @[lsu.scala 116:182] + wire _T_48 = _T_46 & _T_47; // @[lsu.scala 116:180] + wire _T_49 = ~lsu_lsc_ctl_io_lsu_pkt_m_bits_fast_int; // @[lsu.scala 116:210] + wire _T_51 = lsu_lsc_ctl_io_lsu_pkt_m_bits_half & lsu_lsc_ctl_io_lsu_addr_m[0]; // @[lsu.scala 120:112] + wire _T_53 = |lsu_lsc_ctl_io_lsu_addr_m[1:0]; // @[lsu.scala 120:215] + wire _T_54 = lsu_lsc_ctl_io_lsu_pkt_m_bits_word & _T_53; // @[lsu.scala 120:182] + wire _T_55 = _T_51 | _T_54; // @[lsu.scala 120:144] wire _T_57 = lsu_lsc_ctl_io_lsu_pkt_m_valid & lsu_lsc_ctl_io_lsu_pkt_m_bits_load; // @[lsu.scala 121:73] wire _T_59 = lsu_lsc_ctl_io_lsu_pkt_m_valid & lsu_lsc_ctl_io_lsu_pkt_m_bits_store; // @[lsu.scala 122:73] wire _T_98 = lsu_lsc_ctl_io_addr_external_m & lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[lsu.scala 333:119] wire [31:0] _T_100 = _T_98 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire lsu_busreq_r = bus_intf_io_lsu_busreq_r; // @[lsu.scala 348:16] + wire lsu_busreq_r = bus_intf_io_lsu_busreq_r; // @[lsu.scala 348:31] wire [31:0] _T_103 = lsu_busreq_r ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] reg [2:0] dma_mem_tag_m; // @[lsu.scala 352:67] reg lsu_raw_fwd_hi_r; // @[lsu.scala 353:67] @@ -10701,7 +10705,7 @@ module lsu( assign io_lsu_dma_dma_dccm_ctl_dccm_dma_ecc_error = dccm_ctl_io_dma_dccm_ctl_dccm_dma_ecc_error; // @[lsu.scala 222:27] assign io_lsu_dma_dma_dccm_ctl_dccm_dma_rtag = dccm_ctl_io_dma_dccm_ctl_dccm_dma_rtag; // @[lsu.scala 222:27] assign io_lsu_dma_dma_dccm_ctl_dccm_dma_rdata = dccm_ctl_io_dma_dccm_ctl_dccm_dma_rdata; // @[lsu.scala 222:27] - assign io_lsu_dma_dccm_ready = ~_T_8; // @[lsu.scala 95:25] + assign io_lsu_dma_dccm_ready = ~_T_8; // @[lsu.scala 95:27] assign io_lsu_pic_picm_wren = dccm_ctl_io_lsu_pic_picm_wren; // @[lsu.scala 224:14] assign io_lsu_pic_picm_rden = dccm_ctl_io_lsu_pic_picm_rden; // @[lsu.scala 224:14] assign io_lsu_pic_picm_mken = dccm_ctl_io_lsu_pic_picm_mken; // @[lsu.scala 224:14] @@ -10709,20 +10713,20 @@ module lsu( assign io_lsu_pic_picm_wraddr = dccm_ctl_io_lsu_pic_picm_wraddr; // @[lsu.scala 224:14] assign io_lsu_pic_picm_wr_data = dccm_ctl_io_lsu_pic_picm_wr_data; // @[lsu.scala 224:14] assign io_lsu_exu_lsu_result_m = lsu_lsc_ctl_io_lsu_exu_lsu_result_m; // @[lsu.scala 144:46] - assign io_lsu_dec_tlu_busbuff_lsu_pmu_bus_trxn = bus_intf_io_tlu_busbuff_lsu_pmu_bus_trxn; // @[lsu.scala 316:26] - assign io_lsu_dec_tlu_busbuff_lsu_pmu_bus_misaligned = bus_intf_io_tlu_busbuff_lsu_pmu_bus_misaligned; // @[lsu.scala 316:26] - assign io_lsu_dec_tlu_busbuff_lsu_pmu_bus_error = bus_intf_io_tlu_busbuff_lsu_pmu_bus_error; // @[lsu.scala 316:26] - assign io_lsu_dec_tlu_busbuff_lsu_pmu_bus_busy = bus_intf_io_tlu_busbuff_lsu_pmu_bus_busy; // @[lsu.scala 316:26] - assign io_lsu_dec_tlu_busbuff_lsu_imprecise_error_load_any = bus_intf_io_tlu_busbuff_lsu_imprecise_error_load_any; // @[lsu.scala 316:26] - assign io_lsu_dec_tlu_busbuff_lsu_imprecise_error_store_any = bus_intf_io_tlu_busbuff_lsu_imprecise_error_store_any; // @[lsu.scala 316:26] - assign io_lsu_dec_tlu_busbuff_lsu_imprecise_error_addr_any = bus_intf_io_tlu_busbuff_lsu_imprecise_error_addr_any; // @[lsu.scala 316:26] - assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_valid_m = bus_intf_io_dctl_busbuff_lsu_nonblock_load_valid_m; // @[lsu.scala 346:27] - assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_tag_m = bus_intf_io_dctl_busbuff_lsu_nonblock_load_tag_m; // @[lsu.scala 346:27] - assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_inv_r = bus_intf_io_dctl_busbuff_lsu_nonblock_load_inv_r; // @[lsu.scala 346:27] - assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_inv_tag_r = bus_intf_io_dctl_busbuff_lsu_nonblock_load_inv_tag_r; // @[lsu.scala 346:27] - assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_data_valid = bus_intf_io_dctl_busbuff_lsu_nonblock_load_data_valid; // @[lsu.scala 346:27] - assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_data_error = bus_intf_io_dctl_busbuff_lsu_nonblock_load_data_error; // @[lsu.scala 346:27] - assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_data_tag = bus_intf_io_dctl_busbuff_lsu_nonblock_load_data_tag; // @[lsu.scala 346:27] + assign io_lsu_dec_tlu_busbuff_lsu_pmu_bus_trxn = bus_intf_io_tlu_busbuff_lsu_pmu_bus_trxn; // @[lsu.scala 316:49] + assign io_lsu_dec_tlu_busbuff_lsu_pmu_bus_misaligned = bus_intf_io_tlu_busbuff_lsu_pmu_bus_misaligned; // @[lsu.scala 316:49] + assign io_lsu_dec_tlu_busbuff_lsu_pmu_bus_error = bus_intf_io_tlu_busbuff_lsu_pmu_bus_error; // @[lsu.scala 316:49] + assign io_lsu_dec_tlu_busbuff_lsu_pmu_bus_busy = bus_intf_io_tlu_busbuff_lsu_pmu_bus_busy; // @[lsu.scala 316:49] + assign io_lsu_dec_tlu_busbuff_lsu_imprecise_error_load_any = bus_intf_io_tlu_busbuff_lsu_imprecise_error_load_any; // @[lsu.scala 316:49] + assign io_lsu_dec_tlu_busbuff_lsu_imprecise_error_store_any = bus_intf_io_tlu_busbuff_lsu_imprecise_error_store_any; // @[lsu.scala 316:49] + assign io_lsu_dec_tlu_busbuff_lsu_imprecise_error_addr_any = bus_intf_io_tlu_busbuff_lsu_imprecise_error_addr_any; // @[lsu.scala 316:49] + assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_valid_m = bus_intf_io_dctl_busbuff_lsu_nonblock_load_valid_m; // @[lsu.scala 346:31] + assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_tag_m = bus_intf_io_dctl_busbuff_lsu_nonblock_load_tag_m; // @[lsu.scala 346:31] + assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_inv_r = bus_intf_io_dctl_busbuff_lsu_nonblock_load_inv_r; // @[lsu.scala 346:31] + assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_inv_tag_r = bus_intf_io_dctl_busbuff_lsu_nonblock_load_inv_tag_r; // @[lsu.scala 346:31] + assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_data_valid = bus_intf_io_dctl_busbuff_lsu_nonblock_load_data_valid; // @[lsu.scala 346:31] + assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_data_error = bus_intf_io_dctl_busbuff_lsu_nonblock_load_data_error; // @[lsu.scala 346:31] + assign io_lsu_dec_dctl_busbuff_lsu_nonblock_load_data_tag = bus_intf_io_dctl_busbuff_lsu_nonblock_load_data_tag; // @[lsu.scala 346:31] assign io_dccm_wren = dccm_ctl_io_dccm_wren; // @[lsu.scala 223:11] assign io_dccm_rden = dccm_ctl_io_dccm_rden; // @[lsu.scala 223:11] assign io_dccm_wr_addr_lo = dccm_ctl_io_dccm_wr_addr_lo; // @[lsu.scala 223:11] @@ -10733,40 +10737,40 @@ module lsu( assign io_dccm_wr_data_hi = dccm_ctl_io_dccm_wr_data_hi; // @[lsu.scala 223:11] assign io_lsu_tlu_lsu_pmu_load_external_m = _T_57 & lsu_lsc_ctl_io_addr_external_m; // @[lsu.scala 121:39] assign io_lsu_tlu_lsu_pmu_store_external_m = _T_59 & lsu_lsc_ctl_io_addr_external_m; // @[lsu.scala 122:39] - assign io_axi_aw_valid = 1'h0; // @[lsu.scala 349:49] - assign io_axi_aw_bits_id = 3'h0; // @[lsu.scala 349:49] - assign io_axi_aw_bits_addr = bus_intf_io_axi_aw_bits_addr; // @[lsu.scala 349:49] - assign io_axi_aw_bits_region = bus_intf_io_axi_aw_bits_region; // @[lsu.scala 349:49] - assign io_axi_aw_bits_len = 8'h0; // @[lsu.scala 349:49] - assign io_axi_aw_bits_size = 3'h3; // @[lsu.scala 349:49] - assign io_axi_aw_bits_burst = 2'h1; // @[lsu.scala 349:49] - assign io_axi_aw_bits_lock = 1'h0; // @[lsu.scala 349:49] - assign io_axi_aw_bits_cache = 4'hf; // @[lsu.scala 349:49] - assign io_axi_aw_bits_prot = 3'h1; // @[lsu.scala 349:49] - assign io_axi_aw_bits_qos = 4'h0; // @[lsu.scala 349:49] - assign io_axi_w_valid = 1'h0; // @[lsu.scala 349:49] - assign io_axi_w_bits_data = bus_intf_io_axi_w_bits_data; // @[lsu.scala 349:49] - assign io_axi_w_bits_strb = 8'h0; // @[lsu.scala 349:49] - assign io_axi_w_bits_last = 1'h1; // @[lsu.scala 349:49] - assign io_axi_b_ready = 1'h1; // @[lsu.scala 349:49] - assign io_axi_ar_valid = bus_intf_io_axi_ar_valid; // @[lsu.scala 349:49] - assign io_axi_ar_bits_id = 3'h0; // @[lsu.scala 349:49] - assign io_axi_ar_bits_addr = bus_intf_io_axi_ar_bits_addr; // @[lsu.scala 349:49] - assign io_axi_ar_bits_region = bus_intf_io_axi_ar_bits_region; // @[lsu.scala 349:49] - assign io_axi_ar_bits_len = 8'h0; // @[lsu.scala 349:49] - assign io_axi_ar_bits_size = 3'h3; // @[lsu.scala 349:49] - assign io_axi_ar_bits_burst = 2'h1; // @[lsu.scala 349:49] - assign io_axi_ar_bits_lock = 1'h0; // @[lsu.scala 349:49] - assign io_axi_ar_bits_cache = 4'hf; // @[lsu.scala 349:49] - assign io_axi_ar_bits_prot = 3'h1; // @[lsu.scala 349:49] - assign io_axi_ar_bits_qos = 4'h0; // @[lsu.scala 349:49] - assign io_axi_r_ready = 1'h1; // @[lsu.scala 349:49] + assign io_axi_aw_valid = 1'h0; // @[lsu.scala 349:31] + assign io_axi_aw_bits_id = 3'h0; // @[lsu.scala 349:31] + assign io_axi_aw_bits_addr = bus_intf_io_axi_aw_bits_addr; // @[lsu.scala 349:31] + assign io_axi_aw_bits_region = bus_intf_io_axi_aw_bits_region; // @[lsu.scala 349:31] + assign io_axi_aw_bits_len = 8'h0; // @[lsu.scala 349:31] + assign io_axi_aw_bits_size = 3'h3; // @[lsu.scala 349:31] + assign io_axi_aw_bits_burst = 2'h1; // @[lsu.scala 349:31] + assign io_axi_aw_bits_lock = 1'h0; // @[lsu.scala 349:31] + assign io_axi_aw_bits_cache = 4'hf; // @[lsu.scala 349:31] + assign io_axi_aw_bits_prot = 3'h1; // @[lsu.scala 349:31] + assign io_axi_aw_bits_qos = 4'h0; // @[lsu.scala 349:31] + assign io_axi_w_valid = 1'h0; // @[lsu.scala 349:31] + assign io_axi_w_bits_data = bus_intf_io_axi_w_bits_data; // @[lsu.scala 349:31] + assign io_axi_w_bits_strb = 8'h0; // @[lsu.scala 349:31] + assign io_axi_w_bits_last = 1'h1; // @[lsu.scala 349:31] + assign io_axi_b_ready = 1'h1; // @[lsu.scala 349:31] + assign io_axi_ar_valid = bus_intf_io_axi_ar_valid; // @[lsu.scala 349:31] + assign io_axi_ar_bits_id = 3'h0; // @[lsu.scala 349:31] + assign io_axi_ar_bits_addr = bus_intf_io_axi_ar_bits_addr; // @[lsu.scala 349:31] + assign io_axi_ar_bits_region = bus_intf_io_axi_ar_bits_region; // @[lsu.scala 349:31] + assign io_axi_ar_bits_len = 8'h0; // @[lsu.scala 349:31] + assign io_axi_ar_bits_size = 3'h3; // @[lsu.scala 349:31] + assign io_axi_ar_bits_burst = 2'h1; // @[lsu.scala 349:31] + assign io_axi_ar_bits_lock = 1'h0; // @[lsu.scala 349:31] + assign io_axi_ar_bits_cache = 4'hf; // @[lsu.scala 349:31] + assign io_axi_ar_bits_prot = 3'h1; // @[lsu.scala 349:31] + assign io_axi_ar_bits_qos = 4'h0; // @[lsu.scala 349:31] + assign io_axi_r_ready = 1'h1; // @[lsu.scala 349:31] assign io_lsu_result_corr_r = lsu_lsc_ctl_io_lsu_result_corr_r; // @[lsu.scala 75:24] - assign io_lsu_load_stall_any = bus_intf_io_lsu_bus_buffer_full_any | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[lsu.scala 88:25] - assign io_lsu_store_stall_any = _T | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[lsu.scala 87:26] - assign io_lsu_fastint_stall_any = dccm_ctl_io_ld_single_ecc_error_r; // @[lsu.scala 89:28] + assign io_lsu_load_stall_any = bus_intf_io_lsu_bus_buffer_full_any | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[lsu.scala 88:29] + assign io_lsu_store_stall_any = _T | dccm_ctl_io_ld_single_ecc_error_r_ff; // @[lsu.scala 87:29] + assign io_lsu_fastint_stall_any = dccm_ctl_io_ld_single_ecc_error_r; // @[lsu.scala 89:29] assign io_lsu_idle_any = _T_24 & bus_intf_io_lsu_bus_buffer_empty_any; // @[lsu.scala 109:19] - assign io_lsu_active = _T_27 | _T_28; // @[lsu.scala 110:18] + assign io_lsu_active = _T_27 | _T_28; // @[lsu.scala 110:19] assign io_lsu_fir_addr = lsu_lsc_ctl_io_lsu_fir_addr; // @[lsu.scala 162:49] assign io_lsu_fir_error = lsu_lsc_ctl_io_lsu_fir_error; // @[lsu.scala 163:49] assign io_lsu_single_ecc_error_incr = lsu_lsc_ctl_io_lsu_single_ecc_error_incr; // @[lsu.scala 160:49] @@ -10776,9 +10780,9 @@ module lsu( assign io_lsu_error_pkt_r_bits_exc_type = lsu_lsc_ctl_io_lsu_error_pkt_r_bits_exc_type; // @[lsu.scala 161:49] assign io_lsu_error_pkt_r_bits_mscause = lsu_lsc_ctl_io_lsu_error_pkt_r_bits_mscause; // @[lsu.scala 161:49] assign io_lsu_error_pkt_r_bits_addr = lsu_lsc_ctl_io_lsu_error_pkt_r_bits_addr; // @[lsu.scala 161:49] - assign io_lsu_pmu_misaligned_m = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_55; // @[lsu.scala 120:27] + assign io_lsu_pmu_misaligned_m = lsu_lsc_ctl_io_lsu_pkt_m_valid & _T_55; // @[lsu.scala 120:39] assign io_lsu_trigger_match_m = trigger_io_lsu_trigger_match_m; // @[lsu.scala 291:50] - assign io_lsu_nonblock_load_data = bus_intf_io_lsu_nonblock_load_data; // @[lsu.scala 347:29] + assign io_lsu_nonblock_load_data = bus_intf_io_lsu_nonblock_load_data; // @[lsu.scala 347:31] assign lsu_lsc_ctl_clock = clock; assign lsu_lsc_ctl_reset = reset; assign lsu_lsc_ctl_io_clk_override = io_clk_override; // @[lsu.scala 126:46] @@ -10898,32 +10902,32 @@ module lsu( assign stbuf_reset = reset; assign stbuf_io_lsu_stbuf_c1_clk = clkdomain_io_lsu_stbuf_c1_clk; // @[lsu.scala 230:54] assign stbuf_io_lsu_free_c2_clk = clkdomain_io_lsu_free_c2_clk; // @[lsu.scala 231:54] - assign stbuf_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[lsu.scala 232:48] - assign stbuf_io_lsu_pkt_m_bits_store = lsu_lsc_ctl_io_lsu_pkt_m_bits_store; // @[lsu.scala 232:48] - assign stbuf_io_lsu_pkt_m_bits_dma = lsu_lsc_ctl_io_lsu_pkt_m_bits_dma; // @[lsu.scala 232:48] - assign stbuf_io_lsu_pkt_r_valid = lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[lsu.scala 233:48] - assign stbuf_io_lsu_pkt_r_bits_by = lsu_lsc_ctl_io_lsu_pkt_r_bits_by; // @[lsu.scala 233:48] - assign stbuf_io_lsu_pkt_r_bits_half = lsu_lsc_ctl_io_lsu_pkt_r_bits_half; // @[lsu.scala 233:48] - assign stbuf_io_lsu_pkt_r_bits_word = lsu_lsc_ctl_io_lsu_pkt_r_bits_word; // @[lsu.scala 233:48] - assign stbuf_io_lsu_pkt_r_bits_dword = lsu_lsc_ctl_io_lsu_pkt_r_bits_dword; // @[lsu.scala 233:48] - assign stbuf_io_lsu_pkt_r_bits_store = lsu_lsc_ctl_io_lsu_pkt_r_bits_store; // @[lsu.scala 233:48] - assign stbuf_io_lsu_pkt_r_bits_dma = lsu_lsc_ctl_io_lsu_pkt_r_bits_dma; // @[lsu.scala 233:48] - assign stbuf_io_store_stbuf_reqvld_r = _T_33 & _T_38; // @[lsu.scala 234:48] - assign stbuf_io_lsu_commit_r = lsu_lsc_ctl_io_lsu_commit_r; // @[lsu.scala 235:49] - assign stbuf_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[lsu.scala 236:49] + assign stbuf_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[lsu.scala 232:50] + assign stbuf_io_lsu_pkt_m_bits_store = lsu_lsc_ctl_io_lsu_pkt_m_bits_store; // @[lsu.scala 232:50] + assign stbuf_io_lsu_pkt_m_bits_dma = lsu_lsc_ctl_io_lsu_pkt_m_bits_dma; // @[lsu.scala 232:50] + assign stbuf_io_lsu_pkt_r_valid = lsu_lsc_ctl_io_lsu_pkt_r_valid; // @[lsu.scala 233:50] + assign stbuf_io_lsu_pkt_r_bits_by = lsu_lsc_ctl_io_lsu_pkt_r_bits_by; // @[lsu.scala 233:50] + assign stbuf_io_lsu_pkt_r_bits_half = lsu_lsc_ctl_io_lsu_pkt_r_bits_half; // @[lsu.scala 233:50] + assign stbuf_io_lsu_pkt_r_bits_word = lsu_lsc_ctl_io_lsu_pkt_r_bits_word; // @[lsu.scala 233:50] + assign stbuf_io_lsu_pkt_r_bits_dword = lsu_lsc_ctl_io_lsu_pkt_r_bits_dword; // @[lsu.scala 233:50] + assign stbuf_io_lsu_pkt_r_bits_store = lsu_lsc_ctl_io_lsu_pkt_r_bits_store; // @[lsu.scala 233:50] + assign stbuf_io_lsu_pkt_r_bits_dma = lsu_lsc_ctl_io_lsu_pkt_r_bits_dma; // @[lsu.scala 233:50] + assign stbuf_io_store_stbuf_reqvld_r = _T_33 & _T_38; // @[lsu.scala 234:50] + assign stbuf_io_lsu_commit_r = lsu_lsc_ctl_io_lsu_commit_r; // @[lsu.scala 235:50] + assign stbuf_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[lsu.scala 236:50] assign stbuf_io_store_data_hi_r = dccm_ctl_io_store_data_hi_r; // @[lsu.scala 237:62] assign stbuf_io_store_data_lo_r = dccm_ctl_io_store_data_lo_r; // @[lsu.scala 238:62] - assign stbuf_io_store_datafn_hi_r = dccm_ctl_io_store_datafn_hi_r; // @[lsu.scala 239:49] + assign stbuf_io_store_datafn_hi_r = dccm_ctl_io_store_datafn_hi_r; // @[lsu.scala 239:50] assign stbuf_io_store_datafn_lo_r = dccm_ctl_io_store_datafn_lo_r; // @[lsu.scala 240:56] - assign stbuf_io_lsu_stbuf_commit_any = dccm_ctl_io_lsu_stbuf_commit_any; // @[lsu.scala 241:52] - assign stbuf_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m; // @[lsu.scala 243:64] - assign stbuf_io_lsu_addr_r = lsu_lsc_ctl_io_lsu_addr_r; // @[lsu.scala 244:64] - assign stbuf_io_end_addr_m = lsu_lsc_ctl_io_end_addr_m; // @[lsu.scala 246:64] - assign stbuf_io_end_addr_r = lsu_lsc_ctl_io_end_addr_r; // @[lsu.scala 247:64] + assign stbuf_io_lsu_stbuf_commit_any = dccm_ctl_io_lsu_stbuf_commit_any; // @[lsu.scala 241:54] + assign stbuf_io_lsu_addr_m = lsu_lsc_ctl_io_lsu_addr_m; // @[lsu.scala 243:66] + assign stbuf_io_lsu_addr_r = lsu_lsc_ctl_io_lsu_addr_r; // @[lsu.scala 244:66] + assign stbuf_io_end_addr_m = lsu_lsc_ctl_io_end_addr_m; // @[lsu.scala 246:66] + assign stbuf_io_end_addr_r = lsu_lsc_ctl_io_end_addr_r; // @[lsu.scala 247:66] assign stbuf_io_ldst_dual_d = lsu_lsc_ctl_io_lsu_addr_d[2] != lsu_lsc_ctl_io_end_addr_d[2]; // @[lsu.scala 227:50] assign stbuf_io_ldst_dual_m = lsu_lsc_ctl_io_lsu_addr_m[2] != lsu_lsc_ctl_io_end_addr_m[2]; // @[lsu.scala 228:50] assign stbuf_io_ldst_dual_r = lsu_lsc_ctl_io_lsu_addr_r[2] != lsu_lsc_ctl_io_end_addr_r[2]; // @[lsu.scala 229:50] - assign stbuf_io_addr_in_dccm_m = lsu_lsc_ctl_io_addr_in_dccm_m; // @[lsu.scala 248:49] + assign stbuf_io_addr_in_dccm_m = lsu_lsc_ctl_io_addr_in_dccm_m; // @[lsu.scala 248:50] assign stbuf_io_addr_in_dccm_r = lsu_lsc_ctl_io_addr_in_dccm_r; // @[lsu.scala 249:56] assign ecc_clock = clock; assign ecc_reset = reset; @@ -10988,25 +10992,25 @@ module lsu( assign clkdomain_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[lsu.scala 306:50] assign bus_intf_clock = clock; assign bus_intf_reset = reset; - assign bus_intf_io_tlu_busbuff_dec_tlu_external_ldfwd_disable = io_lsu_dec_tlu_busbuff_dec_tlu_external_ldfwd_disable; // @[lsu.scala 316:26] - assign bus_intf_io_tlu_busbuff_dec_tlu_wb_coalescing_disable = io_lsu_dec_tlu_busbuff_dec_tlu_wb_coalescing_disable; // @[lsu.scala 316:26] - assign bus_intf_io_tlu_busbuff_dec_tlu_sideeffect_posted_disable = io_lsu_dec_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu.scala 316:26] + assign bus_intf_io_tlu_busbuff_dec_tlu_external_ldfwd_disable = io_lsu_dec_tlu_busbuff_dec_tlu_external_ldfwd_disable; // @[lsu.scala 316:49] + assign bus_intf_io_tlu_busbuff_dec_tlu_wb_coalescing_disable = io_lsu_dec_tlu_busbuff_dec_tlu_wb_coalescing_disable; // @[lsu.scala 316:49] + assign bus_intf_io_tlu_busbuff_dec_tlu_sideeffect_posted_disable = io_lsu_dec_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu.scala 316:49] assign bus_intf_io_lsu_c1_r_clk = clkdomain_io_lsu_c1_r_clk; // @[lsu.scala 318:49] assign bus_intf_io_lsu_c2_r_clk = clkdomain_io_lsu_c2_r_clk; // @[lsu.scala 319:49] assign bus_intf_io_lsu_bus_ibuf_c1_clk = clkdomain_io_lsu_bus_ibuf_c1_clk; // @[lsu.scala 322:49] assign bus_intf_io_lsu_bus_buf_c1_clk = clkdomain_io_lsu_bus_buf_c1_clk; // @[lsu.scala 324:49] assign bus_intf_io_lsu_free_c2_clk = clkdomain_io_lsu_free_c2_clk; // @[lsu.scala 325:49] assign bus_intf_io_active_clk = io_active_clk; // @[lsu.scala 326:49] - assign bus_intf_io_axi_aw_ready = io_axi_aw_ready; // @[lsu.scala 349:49] - assign bus_intf_io_axi_w_ready = io_axi_w_ready; // @[lsu.scala 349:49] - assign bus_intf_io_axi_b_valid = io_axi_b_valid; // @[lsu.scala 349:49] - assign bus_intf_io_axi_b_bits_resp = io_axi_b_bits_resp; // @[lsu.scala 349:49] - assign bus_intf_io_axi_b_bits_id = io_axi_b_bits_id; // @[lsu.scala 349:49] - assign bus_intf_io_axi_ar_ready = io_axi_ar_ready; // @[lsu.scala 349:49] - assign bus_intf_io_axi_r_valid = io_axi_r_valid; // @[lsu.scala 349:49] - assign bus_intf_io_axi_r_bits_id = io_axi_r_bits_id; // @[lsu.scala 349:49] - assign bus_intf_io_axi_r_bits_data = io_axi_r_bits_data; // @[lsu.scala 349:49] - assign bus_intf_io_axi_r_bits_resp = io_axi_r_bits_resp; // @[lsu.scala 349:49] + assign bus_intf_io_axi_aw_ready = io_axi_aw_ready; // @[lsu.scala 349:31] + assign bus_intf_io_axi_w_ready = io_axi_w_ready; // @[lsu.scala 349:31] + assign bus_intf_io_axi_b_valid = io_axi_b_valid; // @[lsu.scala 349:31] + assign bus_intf_io_axi_b_bits_resp = io_axi_b_bits_resp; // @[lsu.scala 349:31] + assign bus_intf_io_axi_b_bits_id = io_axi_b_bits_id; // @[lsu.scala 349:31] + assign bus_intf_io_axi_ar_ready = io_axi_ar_ready; // @[lsu.scala 349:31] + assign bus_intf_io_axi_r_valid = io_axi_r_valid; // @[lsu.scala 349:31] + assign bus_intf_io_axi_r_bits_id = io_axi_r_bits_id; // @[lsu.scala 349:31] + assign bus_intf_io_axi_r_bits_data = io_axi_r_bits_data; // @[lsu.scala 349:31] + assign bus_intf_io_axi_r_bits_resp = io_axi_r_bits_resp; // @[lsu.scala 349:31] assign bus_intf_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[lsu.scala 328:49] assign bus_intf_io_lsu_busreq_m = _T_48 & _T_49; // @[lsu.scala 329:49] assign bus_intf_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[lsu.scala 338:49] @@ -11034,7 +11038,7 @@ module lsu( assign bus_intf_io_is_sideeffects_m = lsu_lsc_ctl_io_is_sideeffects_m; // @[lsu.scala 342:49] assign bus_intf_io_flush_m_up = io_dec_tlu_flush_lower_r; // @[lsu.scala 343:49] assign bus_intf_io_flush_r = io_dec_tlu_i0_kill_writeb_r; // @[lsu.scala 344:49] - assign bus_intf_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[lsu.scala 350:49] + assign bus_intf_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[lsu.scala 350:31] `ifdef RANDOMIZE_GARBAGE_ASSIGN `define RANDOMIZE `endif diff --git a/lsu_bus_buffer.anno.json b/lsu_bus_buffer.anno.json new file mode 100644 index 00000000..38e397f4 --- /dev/null +++ b/lsu_bus_buffer.anno.json @@ -0,0 +1,183 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_ld_byte_hit_buf_hi", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_ldst_byteen_ext_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_busreq_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_end_addr_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_dec_tlu_force_halt" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_dctl_busbuff_lsu_nonblock_load_data_valid", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_dctl_busbuff_lsu_nonblock_load_data_error" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_ld_fwddata_buf_lo", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_ldst_byteen_ext_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_busreq_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_addr_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_dec_tlu_force_halt" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_pmu_bus_busy", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_ar_valid", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_aw_valid", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_w_valid", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_ar_ready", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_aw_ready", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_w_ready" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_lsu_nonblock_load_data", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_dctl_busbuff_lsu_nonblock_load_data_tag" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_dctl_busbuff_lsu_nonblock_load_tag_m", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_busreq_r", + "~lsu_bus_buffer|lsu_bus_buffer>io_ldst_dual_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_lsu_bus_buffer_full_any", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_ldst_dual_d", + "~lsu_bus_buffer|lsu_bus_buffer>io_dec_lsu_valid_raw_d", + "~lsu_bus_buffer|lsu_bus_buffer>io_ldst_dual_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_busreq_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_ldst_dual_r", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_busreq_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_dctl_busbuff_lsu_nonblock_load_valid_m", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_ld_full_hit_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_pkt_m_bits_load", + "~lsu_bus_buffer|lsu_bus_buffer>io_flush_m_up", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_busreq_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_pkt_m_valid" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_imprecise_error_load_any", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_dctl_busbuff_lsu_nonblock_load_data_error", + "~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_imprecise_error_store_any", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_bus_clk_en_q" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_pmu_bus_misaligned", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_commit_r", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_busreq_r", + "~lsu_bus_buffer|lsu_bus_buffer>io_ldst_dual_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_pmu_bus_trxn", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_ar_valid", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_ar_ready", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_aw_valid", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_aw_ready", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_w_valid", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_axi_w_ready" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_ld_byte_hit_buf_lo", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_ldst_byteen_ext_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_busreq_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_addr_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_dec_tlu_force_halt" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_imprecise_error_addr_any", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_imprecise_error_store_any", + "~lsu_bus_buffer|lsu_bus_buffer>io_dctl_busbuff_lsu_nonblock_load_data_tag", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_bus_clk_en_q" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_ld_fwddata_buf_hi", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_ldst_byteen_ext_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_busreq_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_end_addr_m", + "~lsu_bus_buffer|lsu_bus_buffer>io_dec_tlu_force_halt" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_dctl_busbuff_lsu_nonblock_load_inv_r", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_commit_r" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_imprecise_error_store_any", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_bus_clk_en_q" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_pmu_bus_error", + "sources":[ + "~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_imprecise_error_load_any", + "~lsu_bus_buffer|lsu_bus_buffer>io_tlu_busbuff_lsu_imprecise_error_store_any", + "~lsu_bus_buffer|lsu_bus_buffer>io_dctl_busbuff_lsu_nonblock_load_data_error", + "~lsu_bus_buffer|lsu_bus_buffer>io_lsu_bus_clk_en_q" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.transforms.BlackBoxResourceAnno", + "target":"lsu_bus_buffer.gated_latch", + "resourceId":"/vsrc/gated_latch.sv" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"lsu_bus_buffer" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/lsu_bus_buffer.fir b/lsu_bus_buffer.fir new file mode 100644 index 00000000..7176fe56 --- /dev/null +++ b/lsu_bus_buffer.fir @@ -0,0 +1,6552 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit lsu_bus_buffer : + extmodule gated_latch : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_1 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_1 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_1 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_2 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_2 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_2 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_3 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_3 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_3 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_4 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_4 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_4 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_5 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_5 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_5 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_6 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_6 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_6 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_7 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_7 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_7 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_8 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_8 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_8 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_9 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_9 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_9 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_10 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_10 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_10 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + extmodule gated_latch_11 : + output Q : Clock + input CK : Clock + input EN : UInt<1> + input SE : UInt<1> + + defname = gated_latch + + + module rvclkhdr_11 : + input clock : Clock + input reset : Reset + output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>} + + inst clkhdr of gated_latch_11 @[lib.scala 334:26] + clkhdr.SE is invalid + clkhdr.EN is invalid + clkhdr.CK is invalid + clkhdr.Q is invalid + io.l1clk <= clkhdr.Q @[lib.scala 335:14] + clkhdr.CK <= io.clk @[lib.scala 336:18] + clkhdr.EN <= io.en @[lib.scala 337:18] + clkhdr.SE <= io.scan_mode @[lib.scala 338:18] + + module lsu_bus_buffer : + input clock : Clock + input reset : AsyncReset + output io : {flip clk_override : UInt<1>, flip scan_mode : UInt<1>, tlu_busbuff : {lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>}, dctl_busbuff : {lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<1>, lsu_nonblock_load_data_tag : UInt<2>}, flip dec_tlu_force_halt : UInt<1>, flip lsu_bus_obuf_c1_clken : UInt<1>, flip lsu_busm_clken : UInt<1>, flip lsu_c2_r_clk : Clock, flip lsu_bus_ibuf_c1_clk : Clock, flip lsu_bus_obuf_c1_clk : Clock, flip lsu_bus_buf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_busm_clk : Clock, flip dec_lsu_valid_raw_d : UInt<1>, flip lsu_pkt_m : {valid : UInt<1>, bits : {fast_int : UInt<1>, stack : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>}}, flip lsu_pkt_r : {valid : UInt<1>, bits : {fast_int : UInt<1>, stack : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>}}, flip lsu_addr_m : UInt<32>, flip end_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_r : UInt<32>, flip store_data_r : UInt<32>, flip no_word_merge_r : UInt<1>, flip no_dword_merge_r : UInt<1>, flip lsu_busreq_m : UInt<1>, flip ld_full_hit_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip is_sideeffects_r : UInt<1>, flip ldst_dual_d : UInt<1>, flip ldst_dual_m : UInt<1>, flip ldst_dual_r : UInt<1>, flip ldst_byteen_ext_m : UInt<8>, lsu_axi : {aw : {flip ready : UInt<1>, valid : UInt<1>, bits : {id : UInt<3>, addr : UInt<32>, region : UInt<4>, len : UInt<8>, size : UInt<3>, burst : UInt<2>, lock : UInt<1>, cache : UInt<4>, prot : UInt<3>, qos : UInt<4>}}, w : {flip ready : UInt<1>, valid : UInt<1>, bits : {data : UInt<64>, strb : UInt<8>, last : UInt<1>}}, flip b : {flip ready : UInt<1>, valid : UInt<1>, bits : {resp : UInt<2>, id : UInt<3>}}, ar : {flip ready : UInt<1>, valid : UInt<1>, bits : {id : UInt<3>, addr : UInt<32>, region : UInt<4>, len : UInt<8>, size : UInt<3>, burst : UInt<2>, lock : UInt<1>, cache : UInt<4>, prot : UInt<3>, qos : UInt<4>}}, flip r : {flip ready : UInt<1>, valid : UInt<1>, bits : {id : UInt<3>, data : UInt<64>, resp : UInt<2>, last : UInt<1>}}}, flip lsu_bus_clk_en : UInt<1>, flip lsu_bus_clk_en_q : UInt<1>, lsu_busreq_r : UInt<1>, lsu_bus_buffer_pend_any : UInt<1>, lsu_bus_buffer_full_any : UInt<1>, lsu_bus_buffer_empty_any : UInt<1>, ld_byte_hit_buf_lo : UInt<4>, ld_byte_hit_buf_hi : UInt<4>, ld_fwddata_buf_lo : UInt<32>, ld_fwddata_buf_hi : UInt<32>, lsu_nonblock_load_data : UInt<32>} + + wire buf_addr : UInt<32>[4] @[lsu_bus_buffer.scala 71:22] + wire buf_state : UInt<3>[4] @[lsu_bus_buffer.scala 72:23] + wire buf_write : UInt<4> + buf_write <= UInt<1>("h00") + wire CmdPtr0 : UInt<2> + CmdPtr0 <= UInt<1>("h00") + node ldst_byteen_hi_m = bits(io.ldst_byteen_ext_m, 7, 4) @[lsu_bus_buffer.scala 77:46] + node ldst_byteen_lo_m = bits(io.ldst_byteen_ext_m, 3, 0) @[lsu_bus_buffer.scala 78:46] + node _T = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 80:66] + node _T_1 = bits(buf_addr[0], 31, 2) @[lsu_bus_buffer.scala 80:89] + node _T_2 = eq(_T, _T_1) @[lsu_bus_buffer.scala 80:74] + node _T_3 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 80:109] + node _T_4 = and(_T_2, _T_3) @[lsu_bus_buffer.scala 80:98] + node _T_5 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 80:129] + node _T_6 = and(_T_4, _T_5) @[lsu_bus_buffer.scala 80:113] + node ld_addr_hitvec_lo_0 = and(_T_6, io.lsu_busreq_m) @[lsu_bus_buffer.scala 80:141] + node _T_7 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 80:66] + node _T_8 = bits(buf_addr[1], 31, 2) @[lsu_bus_buffer.scala 80:89] + node _T_9 = eq(_T_7, _T_8) @[lsu_bus_buffer.scala 80:74] + node _T_10 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 80:109] + node _T_11 = and(_T_9, _T_10) @[lsu_bus_buffer.scala 80:98] + node _T_12 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 80:129] + node _T_13 = and(_T_11, _T_12) @[lsu_bus_buffer.scala 80:113] + node ld_addr_hitvec_lo_1 = and(_T_13, io.lsu_busreq_m) @[lsu_bus_buffer.scala 80:141] + node _T_14 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 80:66] + node _T_15 = bits(buf_addr[2], 31, 2) @[lsu_bus_buffer.scala 80:89] + node _T_16 = eq(_T_14, _T_15) @[lsu_bus_buffer.scala 80:74] + node _T_17 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 80:109] + node _T_18 = and(_T_16, _T_17) @[lsu_bus_buffer.scala 80:98] + node _T_19 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 80:129] + node _T_20 = and(_T_18, _T_19) @[lsu_bus_buffer.scala 80:113] + node ld_addr_hitvec_lo_2 = and(_T_20, io.lsu_busreq_m) @[lsu_bus_buffer.scala 80:141] + node _T_21 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 80:66] + node _T_22 = bits(buf_addr[3], 31, 2) @[lsu_bus_buffer.scala 80:89] + node _T_23 = eq(_T_21, _T_22) @[lsu_bus_buffer.scala 80:74] + node _T_24 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 80:109] + node _T_25 = and(_T_23, _T_24) @[lsu_bus_buffer.scala 80:98] + node _T_26 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 80:129] + node _T_27 = and(_T_25, _T_26) @[lsu_bus_buffer.scala 80:113] + node ld_addr_hitvec_lo_3 = and(_T_27, io.lsu_busreq_m) @[lsu_bus_buffer.scala 80:141] + node _T_28 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 81:66] + node _T_29 = bits(buf_addr[0], 31, 2) @[lsu_bus_buffer.scala 81:89] + node _T_30 = eq(_T_28, _T_29) @[lsu_bus_buffer.scala 81:74] + node _T_31 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 81:109] + node _T_32 = and(_T_30, _T_31) @[lsu_bus_buffer.scala 81:98] + node _T_33 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 81:129] + node _T_34 = and(_T_32, _T_33) @[lsu_bus_buffer.scala 81:113] + node ld_addr_hitvec_hi_0 = and(_T_34, io.lsu_busreq_m) @[lsu_bus_buffer.scala 81:141] + node _T_35 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 81:66] + node _T_36 = bits(buf_addr[1], 31, 2) @[lsu_bus_buffer.scala 81:89] + node _T_37 = eq(_T_35, _T_36) @[lsu_bus_buffer.scala 81:74] + node _T_38 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 81:109] + node _T_39 = and(_T_37, _T_38) @[lsu_bus_buffer.scala 81:98] + node _T_40 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 81:129] + node _T_41 = and(_T_39, _T_40) @[lsu_bus_buffer.scala 81:113] + node ld_addr_hitvec_hi_1 = and(_T_41, io.lsu_busreq_m) @[lsu_bus_buffer.scala 81:141] + node _T_42 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 81:66] + node _T_43 = bits(buf_addr[2], 31, 2) @[lsu_bus_buffer.scala 81:89] + node _T_44 = eq(_T_42, _T_43) @[lsu_bus_buffer.scala 81:74] + node _T_45 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 81:109] + node _T_46 = and(_T_44, _T_45) @[lsu_bus_buffer.scala 81:98] + node _T_47 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 81:129] + node _T_48 = and(_T_46, _T_47) @[lsu_bus_buffer.scala 81:113] + node ld_addr_hitvec_hi_2 = and(_T_48, io.lsu_busreq_m) @[lsu_bus_buffer.scala 81:141] + node _T_49 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 81:66] + node _T_50 = bits(buf_addr[3], 31, 2) @[lsu_bus_buffer.scala 81:89] + node _T_51 = eq(_T_49, _T_50) @[lsu_bus_buffer.scala 81:74] + node _T_52 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 81:109] + node _T_53 = and(_T_51, _T_52) @[lsu_bus_buffer.scala 81:98] + node _T_54 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 81:129] + node _T_55 = and(_T_53, _T_54) @[lsu_bus_buffer.scala 81:113] + node ld_addr_hitvec_hi_3 = and(_T_55, io.lsu_busreq_m) @[lsu_bus_buffer.scala 81:141] + wire ld_byte_hitvecfn_lo : UInt<4>[4] @[lsu_bus_buffer.scala 82:33] + wire ld_byte_ibuf_hit_lo : UInt<4> + ld_byte_ibuf_hit_lo <= UInt<1>("h00") + wire ld_byte_hitvecfn_hi : UInt<4>[4] @[lsu_bus_buffer.scala 84:33] + wire ld_byte_ibuf_hit_hi : UInt<4> + ld_byte_ibuf_hit_hi <= UInt<1>("h00") + wire buf_byteen : UInt<4>[4] @[lsu_bus_buffer.scala 86:24] + buf_byteen[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 87:14] + buf_byteen[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 87:14] + buf_byteen[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 87:14] + buf_byteen[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 87:14] + wire buf_nxtstate : UInt<3>[4] @[lsu_bus_buffer.scala 88:26] + buf_nxtstate[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 89:16] + buf_nxtstate[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 89:16] + buf_nxtstate[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 89:16] + buf_nxtstate[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 89:16] + wire buf_wr_en : UInt<1>[4] @[lsu_bus_buffer.scala 90:23] + buf_wr_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 91:13] + buf_wr_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 91:13] + buf_wr_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 91:13] + buf_wr_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 91:13] + wire buf_data_en : UInt<1>[4] @[lsu_bus_buffer.scala 92:25] + buf_data_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 93:15] + buf_data_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 93:15] + buf_data_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 93:15] + buf_data_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 93:15] + wire buf_state_bus_en : UInt<1>[4] @[lsu_bus_buffer.scala 94:30] + buf_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 95:20] + buf_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 95:20] + buf_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 95:20] + buf_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 95:20] + wire buf_ldfwd_in : UInt<1>[4] @[lsu_bus_buffer.scala 96:26] + buf_ldfwd_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 97:16] + buf_ldfwd_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 97:16] + buf_ldfwd_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 97:16] + buf_ldfwd_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 97:16] + wire buf_ldfwd_en : UInt<1>[4] @[lsu_bus_buffer.scala 98:26] + buf_ldfwd_en[0] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 99:16] + buf_ldfwd_en[1] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 99:16] + buf_ldfwd_en[2] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 99:16] + buf_ldfwd_en[3] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 99:16] + wire buf_data_in : UInt<32>[4] @[lsu_bus_buffer.scala 100:25] + buf_data_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 101:15] + buf_data_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 101:15] + buf_data_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 101:15] + buf_data_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 101:15] + wire buf_ldfwdtag_in : UInt<2>[4] @[lsu_bus_buffer.scala 102:29] + buf_ldfwdtag_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 103:19] + buf_ldfwdtag_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 103:19] + buf_ldfwdtag_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 103:19] + buf_ldfwdtag_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 103:19] + wire buf_error_en : UInt<1>[4] @[lsu_bus_buffer.scala 104:26] + buf_error_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 105:16] + buf_error_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 105:16] + buf_error_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 105:16] + buf_error_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 105:16] + wire bus_rsp_read_error : UInt<1> + bus_rsp_read_error <= UInt<1>("h00") + wire bus_rsp_rdata : UInt<64> + bus_rsp_rdata <= UInt<1>("h00") + wire bus_rsp_write_error : UInt<1> + bus_rsp_write_error <= UInt<1>("h00") + wire buf_dualtag : UInt<2>[4] @[lsu_bus_buffer.scala 109:25] + buf_dualtag[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 110:15] + buf_dualtag[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 110:15] + buf_dualtag[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 110:15] + buf_dualtag[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 110:15] + wire buf_ldfwd : UInt<4> + buf_ldfwd <= UInt<1>("h00") + wire buf_resp_state_bus_en : UInt<1>[4] @[lsu_bus_buffer.scala 112:35] + buf_resp_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 113:25] + buf_resp_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 113:25] + buf_resp_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 113:25] + buf_resp_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 113:25] + wire any_done_wait_state : UInt<1> + any_done_wait_state <= UInt<1>("h00") + wire bus_rsp_write : UInt<1> + bus_rsp_write <= UInt<1>("h00") + wire bus_rsp_write_tag : UInt<3> + bus_rsp_write_tag <= UInt<1>("h00") + wire buf_ldfwdtag : UInt<2>[4] @[lsu_bus_buffer.scala 117:26] + buf_ldfwdtag[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 118:16] + buf_ldfwdtag[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 118:16] + buf_ldfwdtag[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 118:16] + buf_ldfwdtag[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 118:16] + wire buf_rst : UInt<1>[4] @[lsu_bus_buffer.scala 119:21] + buf_rst[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 120:11] + buf_rst[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 120:11] + buf_rst[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 120:11] + buf_rst[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 120:11] + wire ibuf_drainvec_vld : UInt<4> + ibuf_drainvec_vld <= UInt<1>("h00") + wire buf_byteen_in : UInt<4>[4] @[lsu_bus_buffer.scala 122:27] + buf_byteen_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 123:17] + buf_byteen_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 123:17] + buf_byteen_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 123:17] + buf_byteen_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 123:17] + wire buf_addr_in : UInt<32>[4] @[lsu_bus_buffer.scala 124:25] + buf_addr_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 125:15] + buf_addr_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 125:15] + buf_addr_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 125:15] + buf_addr_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 125:15] + wire buf_dual_in : UInt<4> + buf_dual_in <= UInt<1>("h00") + wire buf_samedw_in : UInt<4> + buf_samedw_in <= UInt<1>("h00") + wire buf_nomerge_in : UInt<4> + buf_nomerge_in <= UInt<1>("h00") + wire buf_dualhi_in : UInt<4> + buf_dualhi_in <= UInt<1>("h00") + wire buf_dualtag_in : UInt<2>[4] @[lsu_bus_buffer.scala 130:28] + buf_dualtag_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 131:18] + buf_dualtag_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 131:18] + buf_dualtag_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 131:18] + buf_dualtag_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 131:18] + wire buf_sideeffect_in : UInt<4> + buf_sideeffect_in <= UInt<1>("h00") + wire buf_unsign_in : UInt<4> + buf_unsign_in <= UInt<1>("h00") + wire buf_sz_in : UInt<2>[4] @[lsu_bus_buffer.scala 134:23] + buf_sz_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 135:13] + buf_sz_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 135:13] + buf_sz_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 135:13] + buf_sz_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 135:13] + wire buf_write_in : UInt<4> + buf_write_in <= UInt<1>("h00") + wire buf_unsign : UInt<4> + buf_unsign <= UInt<1>("h00") + wire buf_error : UInt<4> + buf_error <= UInt<1>("h00") + wire CmdPtr1 : UInt<2> + CmdPtr1 <= UInt<1>("h00") + wire ibuf_data : UInt<32> + ibuf_data <= UInt<1>("h00") + node _T_56 = orr(ld_byte_hitvecfn_lo[0]) @[lsu_bus_buffer.scala 142:73] + node _T_57 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 142:98] + node _T_58 = or(_T_56, _T_57) @[lsu_bus_buffer.scala 142:77] + node _T_59 = orr(ld_byte_hitvecfn_lo[1]) @[lsu_bus_buffer.scala 142:73] + node _T_60 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 142:98] + node _T_61 = or(_T_59, _T_60) @[lsu_bus_buffer.scala 142:77] + node _T_62 = orr(ld_byte_hitvecfn_lo[2]) @[lsu_bus_buffer.scala 142:73] + node _T_63 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 142:98] + node _T_64 = or(_T_62, _T_63) @[lsu_bus_buffer.scala 142:77] + node _T_65 = orr(ld_byte_hitvecfn_lo[3]) @[lsu_bus_buffer.scala 142:73] + node _T_66 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 142:98] + node _T_67 = or(_T_65, _T_66) @[lsu_bus_buffer.scala 142:77] + node _T_68 = cat(_T_67, _T_64) @[Cat.scala 29:58] + node _T_69 = cat(_T_68, _T_61) @[Cat.scala 29:58] + node _T_70 = cat(_T_69, _T_58) @[Cat.scala 29:58] + io.ld_byte_hit_buf_lo <= _T_70 @[lsu_bus_buffer.scala 142:25] + node _T_71 = orr(ld_byte_hitvecfn_hi[0]) @[lsu_bus_buffer.scala 143:73] + node _T_72 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 143:98] + node _T_73 = or(_T_71, _T_72) @[lsu_bus_buffer.scala 143:77] + node _T_74 = orr(ld_byte_hitvecfn_hi[1]) @[lsu_bus_buffer.scala 143:73] + node _T_75 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 143:98] + node _T_76 = or(_T_74, _T_75) @[lsu_bus_buffer.scala 143:77] + node _T_77 = orr(ld_byte_hitvecfn_hi[2]) @[lsu_bus_buffer.scala 143:73] + node _T_78 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 143:98] + node _T_79 = or(_T_77, _T_78) @[lsu_bus_buffer.scala 143:77] + node _T_80 = orr(ld_byte_hitvecfn_hi[3]) @[lsu_bus_buffer.scala 143:73] + node _T_81 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 143:98] + node _T_82 = or(_T_80, _T_81) @[lsu_bus_buffer.scala 143:77] + node _T_83 = cat(_T_82, _T_79) @[Cat.scala 29:58] + node _T_84 = cat(_T_83, _T_76) @[Cat.scala 29:58] + node _T_85 = cat(_T_84, _T_73) @[Cat.scala 29:58] + io.ld_byte_hit_buf_hi <= _T_85 @[lsu_bus_buffer.scala 143:25] + node _T_86 = bits(buf_byteen[0], 0, 0) @[lsu_bus_buffer.scala 145:110] + node _T_87 = and(ld_addr_hitvec_lo_0, _T_86) @[lsu_bus_buffer.scala 145:95] + node _T_88 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_buffer.scala 145:132] + node _T_89 = and(_T_87, _T_88) @[lsu_bus_buffer.scala 145:114] + node _T_90 = bits(buf_byteen[1], 0, 0) @[lsu_bus_buffer.scala 145:110] + node _T_91 = and(ld_addr_hitvec_lo_1, _T_90) @[lsu_bus_buffer.scala 145:95] + node _T_92 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_buffer.scala 145:132] + node _T_93 = and(_T_91, _T_92) @[lsu_bus_buffer.scala 145:114] + node _T_94 = bits(buf_byteen[2], 0, 0) @[lsu_bus_buffer.scala 145:110] + node _T_95 = and(ld_addr_hitvec_lo_2, _T_94) @[lsu_bus_buffer.scala 145:95] + node _T_96 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_buffer.scala 145:132] + node _T_97 = and(_T_95, _T_96) @[lsu_bus_buffer.scala 145:114] + node _T_98 = bits(buf_byteen[3], 0, 0) @[lsu_bus_buffer.scala 145:110] + node _T_99 = and(ld_addr_hitvec_lo_3, _T_98) @[lsu_bus_buffer.scala 145:95] + node _T_100 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_buffer.scala 145:132] + node _T_101 = and(_T_99, _T_100) @[lsu_bus_buffer.scala 145:114] + node _T_102 = cat(_T_101, _T_97) @[Cat.scala 29:58] + node _T_103 = cat(_T_102, _T_93) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_0 = cat(_T_103, _T_89) @[Cat.scala 29:58] + node _T_104 = bits(buf_byteen[0], 1, 1) @[lsu_bus_buffer.scala 145:110] + node _T_105 = and(ld_addr_hitvec_lo_0, _T_104) @[lsu_bus_buffer.scala 145:95] + node _T_106 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_buffer.scala 145:132] + node _T_107 = and(_T_105, _T_106) @[lsu_bus_buffer.scala 145:114] + node _T_108 = bits(buf_byteen[1], 1, 1) @[lsu_bus_buffer.scala 145:110] + node _T_109 = and(ld_addr_hitvec_lo_1, _T_108) @[lsu_bus_buffer.scala 145:95] + node _T_110 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_buffer.scala 145:132] + node _T_111 = and(_T_109, _T_110) @[lsu_bus_buffer.scala 145:114] + node _T_112 = bits(buf_byteen[2], 1, 1) @[lsu_bus_buffer.scala 145:110] + node _T_113 = and(ld_addr_hitvec_lo_2, _T_112) @[lsu_bus_buffer.scala 145:95] + node _T_114 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_buffer.scala 145:132] + node _T_115 = and(_T_113, _T_114) @[lsu_bus_buffer.scala 145:114] + node _T_116 = bits(buf_byteen[3], 1, 1) @[lsu_bus_buffer.scala 145:110] + node _T_117 = and(ld_addr_hitvec_lo_3, _T_116) @[lsu_bus_buffer.scala 145:95] + node _T_118 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_buffer.scala 145:132] + node _T_119 = and(_T_117, _T_118) @[lsu_bus_buffer.scala 145:114] + node _T_120 = cat(_T_119, _T_115) @[Cat.scala 29:58] + node _T_121 = cat(_T_120, _T_111) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_1 = cat(_T_121, _T_107) @[Cat.scala 29:58] + node _T_122 = bits(buf_byteen[0], 2, 2) @[lsu_bus_buffer.scala 145:110] + node _T_123 = and(ld_addr_hitvec_lo_0, _T_122) @[lsu_bus_buffer.scala 145:95] + node _T_124 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_buffer.scala 145:132] + node _T_125 = and(_T_123, _T_124) @[lsu_bus_buffer.scala 145:114] + node _T_126 = bits(buf_byteen[1], 2, 2) @[lsu_bus_buffer.scala 145:110] + node _T_127 = and(ld_addr_hitvec_lo_1, _T_126) @[lsu_bus_buffer.scala 145:95] + node _T_128 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_buffer.scala 145:132] + node _T_129 = and(_T_127, _T_128) @[lsu_bus_buffer.scala 145:114] + node _T_130 = bits(buf_byteen[2], 2, 2) @[lsu_bus_buffer.scala 145:110] + node _T_131 = and(ld_addr_hitvec_lo_2, _T_130) @[lsu_bus_buffer.scala 145:95] + node _T_132 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_buffer.scala 145:132] + node _T_133 = and(_T_131, _T_132) @[lsu_bus_buffer.scala 145:114] + node _T_134 = bits(buf_byteen[3], 2, 2) @[lsu_bus_buffer.scala 145:110] + node _T_135 = and(ld_addr_hitvec_lo_3, _T_134) @[lsu_bus_buffer.scala 145:95] + node _T_136 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_buffer.scala 145:132] + node _T_137 = and(_T_135, _T_136) @[lsu_bus_buffer.scala 145:114] + node _T_138 = cat(_T_137, _T_133) @[Cat.scala 29:58] + node _T_139 = cat(_T_138, _T_129) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_2 = cat(_T_139, _T_125) @[Cat.scala 29:58] + node _T_140 = bits(buf_byteen[0], 3, 3) @[lsu_bus_buffer.scala 145:110] + node _T_141 = and(ld_addr_hitvec_lo_0, _T_140) @[lsu_bus_buffer.scala 145:95] + node _T_142 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_buffer.scala 145:132] + node _T_143 = and(_T_141, _T_142) @[lsu_bus_buffer.scala 145:114] + node _T_144 = bits(buf_byteen[1], 3, 3) @[lsu_bus_buffer.scala 145:110] + node _T_145 = and(ld_addr_hitvec_lo_1, _T_144) @[lsu_bus_buffer.scala 145:95] + node _T_146 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_buffer.scala 145:132] + node _T_147 = and(_T_145, _T_146) @[lsu_bus_buffer.scala 145:114] + node _T_148 = bits(buf_byteen[2], 3, 3) @[lsu_bus_buffer.scala 145:110] + node _T_149 = and(ld_addr_hitvec_lo_2, _T_148) @[lsu_bus_buffer.scala 145:95] + node _T_150 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_buffer.scala 145:132] + node _T_151 = and(_T_149, _T_150) @[lsu_bus_buffer.scala 145:114] + node _T_152 = bits(buf_byteen[3], 3, 3) @[lsu_bus_buffer.scala 145:110] + node _T_153 = and(ld_addr_hitvec_lo_3, _T_152) @[lsu_bus_buffer.scala 145:95] + node _T_154 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_buffer.scala 145:132] + node _T_155 = and(_T_153, _T_154) @[lsu_bus_buffer.scala 145:114] + node _T_156 = cat(_T_155, _T_151) @[Cat.scala 29:58] + node _T_157 = cat(_T_156, _T_147) @[Cat.scala 29:58] + node ld_byte_hitvec_lo_3 = cat(_T_157, _T_143) @[Cat.scala 29:58] + node _T_158 = bits(buf_byteen[0], 0, 0) @[lsu_bus_buffer.scala 146:110] + node _T_159 = and(ld_addr_hitvec_hi_0, _T_158) @[lsu_bus_buffer.scala 146:95] + node _T_160 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_buffer.scala 146:132] + node _T_161 = and(_T_159, _T_160) @[lsu_bus_buffer.scala 146:114] + node _T_162 = bits(buf_byteen[1], 0, 0) @[lsu_bus_buffer.scala 146:110] + node _T_163 = and(ld_addr_hitvec_hi_1, _T_162) @[lsu_bus_buffer.scala 146:95] + node _T_164 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_buffer.scala 146:132] + node _T_165 = and(_T_163, _T_164) @[lsu_bus_buffer.scala 146:114] + node _T_166 = bits(buf_byteen[2], 0, 0) @[lsu_bus_buffer.scala 146:110] + node _T_167 = and(ld_addr_hitvec_hi_2, _T_166) @[lsu_bus_buffer.scala 146:95] + node _T_168 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_buffer.scala 146:132] + node _T_169 = and(_T_167, _T_168) @[lsu_bus_buffer.scala 146:114] + node _T_170 = bits(buf_byteen[3], 0, 0) @[lsu_bus_buffer.scala 146:110] + node _T_171 = and(ld_addr_hitvec_hi_3, _T_170) @[lsu_bus_buffer.scala 146:95] + node _T_172 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_buffer.scala 146:132] + node _T_173 = and(_T_171, _T_172) @[lsu_bus_buffer.scala 146:114] + node _T_174 = cat(_T_173, _T_169) @[Cat.scala 29:58] + node _T_175 = cat(_T_174, _T_165) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_0 = cat(_T_175, _T_161) @[Cat.scala 29:58] + node _T_176 = bits(buf_byteen[0], 1, 1) @[lsu_bus_buffer.scala 146:110] + node _T_177 = and(ld_addr_hitvec_hi_0, _T_176) @[lsu_bus_buffer.scala 146:95] + node _T_178 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_buffer.scala 146:132] + node _T_179 = and(_T_177, _T_178) @[lsu_bus_buffer.scala 146:114] + node _T_180 = bits(buf_byteen[1], 1, 1) @[lsu_bus_buffer.scala 146:110] + node _T_181 = and(ld_addr_hitvec_hi_1, _T_180) @[lsu_bus_buffer.scala 146:95] + node _T_182 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_buffer.scala 146:132] + node _T_183 = and(_T_181, _T_182) @[lsu_bus_buffer.scala 146:114] + node _T_184 = bits(buf_byteen[2], 1, 1) @[lsu_bus_buffer.scala 146:110] + node _T_185 = and(ld_addr_hitvec_hi_2, _T_184) @[lsu_bus_buffer.scala 146:95] + node _T_186 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_buffer.scala 146:132] + node _T_187 = and(_T_185, _T_186) @[lsu_bus_buffer.scala 146:114] + node _T_188 = bits(buf_byteen[3], 1, 1) @[lsu_bus_buffer.scala 146:110] + node _T_189 = and(ld_addr_hitvec_hi_3, _T_188) @[lsu_bus_buffer.scala 146:95] + node _T_190 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_buffer.scala 146:132] + node _T_191 = and(_T_189, _T_190) @[lsu_bus_buffer.scala 146:114] + node _T_192 = cat(_T_191, _T_187) @[Cat.scala 29:58] + node _T_193 = cat(_T_192, _T_183) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_1 = cat(_T_193, _T_179) @[Cat.scala 29:58] + node _T_194 = bits(buf_byteen[0], 2, 2) @[lsu_bus_buffer.scala 146:110] + node _T_195 = and(ld_addr_hitvec_hi_0, _T_194) @[lsu_bus_buffer.scala 146:95] + node _T_196 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_buffer.scala 146:132] + node _T_197 = and(_T_195, _T_196) @[lsu_bus_buffer.scala 146:114] + node _T_198 = bits(buf_byteen[1], 2, 2) @[lsu_bus_buffer.scala 146:110] + node _T_199 = and(ld_addr_hitvec_hi_1, _T_198) @[lsu_bus_buffer.scala 146:95] + node _T_200 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_buffer.scala 146:132] + node _T_201 = and(_T_199, _T_200) @[lsu_bus_buffer.scala 146:114] + node _T_202 = bits(buf_byteen[2], 2, 2) @[lsu_bus_buffer.scala 146:110] + node _T_203 = and(ld_addr_hitvec_hi_2, _T_202) @[lsu_bus_buffer.scala 146:95] + node _T_204 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_buffer.scala 146:132] + node _T_205 = and(_T_203, _T_204) @[lsu_bus_buffer.scala 146:114] + node _T_206 = bits(buf_byteen[3], 2, 2) @[lsu_bus_buffer.scala 146:110] + node _T_207 = and(ld_addr_hitvec_hi_3, _T_206) @[lsu_bus_buffer.scala 146:95] + node _T_208 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_buffer.scala 146:132] + node _T_209 = and(_T_207, _T_208) @[lsu_bus_buffer.scala 146:114] + node _T_210 = cat(_T_209, _T_205) @[Cat.scala 29:58] + node _T_211 = cat(_T_210, _T_201) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_2 = cat(_T_211, _T_197) @[Cat.scala 29:58] + node _T_212 = bits(buf_byteen[0], 3, 3) @[lsu_bus_buffer.scala 146:110] + node _T_213 = and(ld_addr_hitvec_hi_0, _T_212) @[lsu_bus_buffer.scala 146:95] + node _T_214 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_buffer.scala 146:132] + node _T_215 = and(_T_213, _T_214) @[lsu_bus_buffer.scala 146:114] + node _T_216 = bits(buf_byteen[1], 3, 3) @[lsu_bus_buffer.scala 146:110] + node _T_217 = and(ld_addr_hitvec_hi_1, _T_216) @[lsu_bus_buffer.scala 146:95] + node _T_218 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_buffer.scala 146:132] + node _T_219 = and(_T_217, _T_218) @[lsu_bus_buffer.scala 146:114] + node _T_220 = bits(buf_byteen[2], 3, 3) @[lsu_bus_buffer.scala 146:110] + node _T_221 = and(ld_addr_hitvec_hi_2, _T_220) @[lsu_bus_buffer.scala 146:95] + node _T_222 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_buffer.scala 146:132] + node _T_223 = and(_T_221, _T_222) @[lsu_bus_buffer.scala 146:114] + node _T_224 = bits(buf_byteen[3], 3, 3) @[lsu_bus_buffer.scala 146:110] + node _T_225 = and(ld_addr_hitvec_hi_3, _T_224) @[lsu_bus_buffer.scala 146:95] + node _T_226 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_buffer.scala 146:132] + node _T_227 = and(_T_225, _T_226) @[lsu_bus_buffer.scala 146:114] + node _T_228 = cat(_T_227, _T_223) @[Cat.scala 29:58] + node _T_229 = cat(_T_228, _T_219) @[Cat.scala 29:58] + node ld_byte_hitvec_hi_3 = cat(_T_229, _T_215) @[Cat.scala 29:58] + wire buf_age_younger : UInt<4>[4] @[lsu_bus_buffer.scala 148:29] + buf_age_younger[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 149:19] + buf_age_younger[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 149:19] + buf_age_younger[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 149:19] + buf_age_younger[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 149:19] + node _T_230 = bits(ld_byte_hitvec_lo_0, 0, 0) @[lsu_bus_buffer.scala 150:93] + node _T_231 = and(ld_byte_hitvec_lo_0, buf_age_younger[0]) @[lsu_bus_buffer.scala 150:122] + node _T_232 = orr(_T_231) @[lsu_bus_buffer.scala 150:144] + node _T_233 = eq(_T_232, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_234 = and(_T_230, _T_233) @[lsu_bus_buffer.scala 150:97] + node _T_235 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 150:170] + node _T_236 = eq(_T_235, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_237 = and(_T_234, _T_236) @[lsu_bus_buffer.scala 150:148] + node _T_238 = bits(ld_byte_hitvec_lo_0, 1, 1) @[lsu_bus_buffer.scala 150:93] + node _T_239 = and(ld_byte_hitvec_lo_0, buf_age_younger[1]) @[lsu_bus_buffer.scala 150:122] + node _T_240 = orr(_T_239) @[lsu_bus_buffer.scala 150:144] + node _T_241 = eq(_T_240, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_242 = and(_T_238, _T_241) @[lsu_bus_buffer.scala 150:97] + node _T_243 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 150:170] + node _T_244 = eq(_T_243, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_245 = and(_T_242, _T_244) @[lsu_bus_buffer.scala 150:148] + node _T_246 = bits(ld_byte_hitvec_lo_0, 2, 2) @[lsu_bus_buffer.scala 150:93] + node _T_247 = and(ld_byte_hitvec_lo_0, buf_age_younger[2]) @[lsu_bus_buffer.scala 150:122] + node _T_248 = orr(_T_247) @[lsu_bus_buffer.scala 150:144] + node _T_249 = eq(_T_248, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_250 = and(_T_246, _T_249) @[lsu_bus_buffer.scala 150:97] + node _T_251 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 150:170] + node _T_252 = eq(_T_251, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_253 = and(_T_250, _T_252) @[lsu_bus_buffer.scala 150:148] + node _T_254 = bits(ld_byte_hitvec_lo_0, 3, 3) @[lsu_bus_buffer.scala 150:93] + node _T_255 = and(ld_byte_hitvec_lo_0, buf_age_younger[3]) @[lsu_bus_buffer.scala 150:122] + node _T_256 = orr(_T_255) @[lsu_bus_buffer.scala 150:144] + node _T_257 = eq(_T_256, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_258 = and(_T_254, _T_257) @[lsu_bus_buffer.scala 150:97] + node _T_259 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 150:170] + node _T_260 = eq(_T_259, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_261 = and(_T_258, _T_260) @[lsu_bus_buffer.scala 150:148] + node _T_262 = cat(_T_261, _T_253) @[Cat.scala 29:58] + node _T_263 = cat(_T_262, _T_245) @[Cat.scala 29:58] + node _T_264 = cat(_T_263, _T_237) @[Cat.scala 29:58] + node _T_265 = bits(ld_byte_hitvec_lo_1, 0, 0) @[lsu_bus_buffer.scala 150:93] + node _T_266 = and(ld_byte_hitvec_lo_1, buf_age_younger[0]) @[lsu_bus_buffer.scala 150:122] + node _T_267 = orr(_T_266) @[lsu_bus_buffer.scala 150:144] + node _T_268 = eq(_T_267, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_269 = and(_T_265, _T_268) @[lsu_bus_buffer.scala 150:97] + node _T_270 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 150:170] + node _T_271 = eq(_T_270, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_272 = and(_T_269, _T_271) @[lsu_bus_buffer.scala 150:148] + node _T_273 = bits(ld_byte_hitvec_lo_1, 1, 1) @[lsu_bus_buffer.scala 150:93] + node _T_274 = and(ld_byte_hitvec_lo_1, buf_age_younger[1]) @[lsu_bus_buffer.scala 150:122] + node _T_275 = orr(_T_274) @[lsu_bus_buffer.scala 150:144] + node _T_276 = eq(_T_275, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_277 = and(_T_273, _T_276) @[lsu_bus_buffer.scala 150:97] + node _T_278 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 150:170] + node _T_279 = eq(_T_278, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_280 = and(_T_277, _T_279) @[lsu_bus_buffer.scala 150:148] + node _T_281 = bits(ld_byte_hitvec_lo_1, 2, 2) @[lsu_bus_buffer.scala 150:93] + node _T_282 = and(ld_byte_hitvec_lo_1, buf_age_younger[2]) @[lsu_bus_buffer.scala 150:122] + node _T_283 = orr(_T_282) @[lsu_bus_buffer.scala 150:144] + node _T_284 = eq(_T_283, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_285 = and(_T_281, _T_284) @[lsu_bus_buffer.scala 150:97] + node _T_286 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 150:170] + node _T_287 = eq(_T_286, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_288 = and(_T_285, _T_287) @[lsu_bus_buffer.scala 150:148] + node _T_289 = bits(ld_byte_hitvec_lo_1, 3, 3) @[lsu_bus_buffer.scala 150:93] + node _T_290 = and(ld_byte_hitvec_lo_1, buf_age_younger[3]) @[lsu_bus_buffer.scala 150:122] + node _T_291 = orr(_T_290) @[lsu_bus_buffer.scala 150:144] + node _T_292 = eq(_T_291, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_293 = and(_T_289, _T_292) @[lsu_bus_buffer.scala 150:97] + node _T_294 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 150:170] + node _T_295 = eq(_T_294, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_296 = and(_T_293, _T_295) @[lsu_bus_buffer.scala 150:148] + node _T_297 = cat(_T_296, _T_288) @[Cat.scala 29:58] + node _T_298 = cat(_T_297, _T_280) @[Cat.scala 29:58] + node _T_299 = cat(_T_298, _T_272) @[Cat.scala 29:58] + node _T_300 = bits(ld_byte_hitvec_lo_2, 0, 0) @[lsu_bus_buffer.scala 150:93] + node _T_301 = and(ld_byte_hitvec_lo_2, buf_age_younger[0]) @[lsu_bus_buffer.scala 150:122] + node _T_302 = orr(_T_301) @[lsu_bus_buffer.scala 150:144] + node _T_303 = eq(_T_302, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_304 = and(_T_300, _T_303) @[lsu_bus_buffer.scala 150:97] + node _T_305 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 150:170] + node _T_306 = eq(_T_305, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_307 = and(_T_304, _T_306) @[lsu_bus_buffer.scala 150:148] + node _T_308 = bits(ld_byte_hitvec_lo_2, 1, 1) @[lsu_bus_buffer.scala 150:93] + node _T_309 = and(ld_byte_hitvec_lo_2, buf_age_younger[1]) @[lsu_bus_buffer.scala 150:122] + node _T_310 = orr(_T_309) @[lsu_bus_buffer.scala 150:144] + node _T_311 = eq(_T_310, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_312 = and(_T_308, _T_311) @[lsu_bus_buffer.scala 150:97] + node _T_313 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 150:170] + node _T_314 = eq(_T_313, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_315 = and(_T_312, _T_314) @[lsu_bus_buffer.scala 150:148] + node _T_316 = bits(ld_byte_hitvec_lo_2, 2, 2) @[lsu_bus_buffer.scala 150:93] + node _T_317 = and(ld_byte_hitvec_lo_2, buf_age_younger[2]) @[lsu_bus_buffer.scala 150:122] + node _T_318 = orr(_T_317) @[lsu_bus_buffer.scala 150:144] + node _T_319 = eq(_T_318, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_320 = and(_T_316, _T_319) @[lsu_bus_buffer.scala 150:97] + node _T_321 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 150:170] + node _T_322 = eq(_T_321, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_323 = and(_T_320, _T_322) @[lsu_bus_buffer.scala 150:148] + node _T_324 = bits(ld_byte_hitvec_lo_2, 3, 3) @[lsu_bus_buffer.scala 150:93] + node _T_325 = and(ld_byte_hitvec_lo_2, buf_age_younger[3]) @[lsu_bus_buffer.scala 150:122] + node _T_326 = orr(_T_325) @[lsu_bus_buffer.scala 150:144] + node _T_327 = eq(_T_326, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_328 = and(_T_324, _T_327) @[lsu_bus_buffer.scala 150:97] + node _T_329 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 150:170] + node _T_330 = eq(_T_329, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_331 = and(_T_328, _T_330) @[lsu_bus_buffer.scala 150:148] + node _T_332 = cat(_T_331, _T_323) @[Cat.scala 29:58] + node _T_333 = cat(_T_332, _T_315) @[Cat.scala 29:58] + node _T_334 = cat(_T_333, _T_307) @[Cat.scala 29:58] + node _T_335 = bits(ld_byte_hitvec_lo_3, 0, 0) @[lsu_bus_buffer.scala 150:93] + node _T_336 = and(ld_byte_hitvec_lo_3, buf_age_younger[0]) @[lsu_bus_buffer.scala 150:122] + node _T_337 = orr(_T_336) @[lsu_bus_buffer.scala 150:144] + node _T_338 = eq(_T_337, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_339 = and(_T_335, _T_338) @[lsu_bus_buffer.scala 150:97] + node _T_340 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 150:170] + node _T_341 = eq(_T_340, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_342 = and(_T_339, _T_341) @[lsu_bus_buffer.scala 150:148] + node _T_343 = bits(ld_byte_hitvec_lo_3, 1, 1) @[lsu_bus_buffer.scala 150:93] + node _T_344 = and(ld_byte_hitvec_lo_3, buf_age_younger[1]) @[lsu_bus_buffer.scala 150:122] + node _T_345 = orr(_T_344) @[lsu_bus_buffer.scala 150:144] + node _T_346 = eq(_T_345, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_347 = and(_T_343, _T_346) @[lsu_bus_buffer.scala 150:97] + node _T_348 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 150:170] + node _T_349 = eq(_T_348, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_350 = and(_T_347, _T_349) @[lsu_bus_buffer.scala 150:148] + node _T_351 = bits(ld_byte_hitvec_lo_3, 2, 2) @[lsu_bus_buffer.scala 150:93] + node _T_352 = and(ld_byte_hitvec_lo_3, buf_age_younger[2]) @[lsu_bus_buffer.scala 150:122] + node _T_353 = orr(_T_352) @[lsu_bus_buffer.scala 150:144] + node _T_354 = eq(_T_353, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_355 = and(_T_351, _T_354) @[lsu_bus_buffer.scala 150:97] + node _T_356 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 150:170] + node _T_357 = eq(_T_356, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_358 = and(_T_355, _T_357) @[lsu_bus_buffer.scala 150:148] + node _T_359 = bits(ld_byte_hitvec_lo_3, 3, 3) @[lsu_bus_buffer.scala 150:93] + node _T_360 = and(ld_byte_hitvec_lo_3, buf_age_younger[3]) @[lsu_bus_buffer.scala 150:122] + node _T_361 = orr(_T_360) @[lsu_bus_buffer.scala 150:144] + node _T_362 = eq(_T_361, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:99] + node _T_363 = and(_T_359, _T_362) @[lsu_bus_buffer.scala 150:97] + node _T_364 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 150:170] + node _T_365 = eq(_T_364, UInt<1>("h00")) @[lsu_bus_buffer.scala 150:150] + node _T_366 = and(_T_363, _T_365) @[lsu_bus_buffer.scala 150:148] + node _T_367 = cat(_T_366, _T_358) @[Cat.scala 29:58] + node _T_368 = cat(_T_367, _T_350) @[Cat.scala 29:58] + node _T_369 = cat(_T_368, _T_342) @[Cat.scala 29:58] + ld_byte_hitvecfn_lo[0] <= _T_264 @[lsu_bus_buffer.scala 150:23] + ld_byte_hitvecfn_lo[1] <= _T_299 @[lsu_bus_buffer.scala 150:23] + ld_byte_hitvecfn_lo[2] <= _T_334 @[lsu_bus_buffer.scala 150:23] + ld_byte_hitvecfn_lo[3] <= _T_369 @[lsu_bus_buffer.scala 150:23] + node _T_370 = bits(ld_byte_hitvec_hi_0, 0, 0) @[lsu_bus_buffer.scala 151:93] + node _T_371 = and(ld_byte_hitvec_hi_0, buf_age_younger[0]) @[lsu_bus_buffer.scala 151:122] + node _T_372 = orr(_T_371) @[lsu_bus_buffer.scala 151:144] + node _T_373 = eq(_T_372, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_374 = and(_T_370, _T_373) @[lsu_bus_buffer.scala 151:97] + node _T_375 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 151:170] + node _T_376 = eq(_T_375, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_377 = and(_T_374, _T_376) @[lsu_bus_buffer.scala 151:148] + node _T_378 = bits(ld_byte_hitvec_hi_0, 1, 1) @[lsu_bus_buffer.scala 151:93] + node _T_379 = and(ld_byte_hitvec_hi_0, buf_age_younger[1]) @[lsu_bus_buffer.scala 151:122] + node _T_380 = orr(_T_379) @[lsu_bus_buffer.scala 151:144] + node _T_381 = eq(_T_380, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_382 = and(_T_378, _T_381) @[lsu_bus_buffer.scala 151:97] + node _T_383 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 151:170] + node _T_384 = eq(_T_383, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_385 = and(_T_382, _T_384) @[lsu_bus_buffer.scala 151:148] + node _T_386 = bits(ld_byte_hitvec_hi_0, 2, 2) @[lsu_bus_buffer.scala 151:93] + node _T_387 = and(ld_byte_hitvec_hi_0, buf_age_younger[2]) @[lsu_bus_buffer.scala 151:122] + node _T_388 = orr(_T_387) @[lsu_bus_buffer.scala 151:144] + node _T_389 = eq(_T_388, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_390 = and(_T_386, _T_389) @[lsu_bus_buffer.scala 151:97] + node _T_391 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 151:170] + node _T_392 = eq(_T_391, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_393 = and(_T_390, _T_392) @[lsu_bus_buffer.scala 151:148] + node _T_394 = bits(ld_byte_hitvec_hi_0, 3, 3) @[lsu_bus_buffer.scala 151:93] + node _T_395 = and(ld_byte_hitvec_hi_0, buf_age_younger[3]) @[lsu_bus_buffer.scala 151:122] + node _T_396 = orr(_T_395) @[lsu_bus_buffer.scala 151:144] + node _T_397 = eq(_T_396, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_398 = and(_T_394, _T_397) @[lsu_bus_buffer.scala 151:97] + node _T_399 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 151:170] + node _T_400 = eq(_T_399, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_401 = and(_T_398, _T_400) @[lsu_bus_buffer.scala 151:148] + node _T_402 = cat(_T_401, _T_393) @[Cat.scala 29:58] + node _T_403 = cat(_T_402, _T_385) @[Cat.scala 29:58] + node _T_404 = cat(_T_403, _T_377) @[Cat.scala 29:58] + node _T_405 = bits(ld_byte_hitvec_hi_1, 0, 0) @[lsu_bus_buffer.scala 151:93] + node _T_406 = and(ld_byte_hitvec_hi_1, buf_age_younger[0]) @[lsu_bus_buffer.scala 151:122] + node _T_407 = orr(_T_406) @[lsu_bus_buffer.scala 151:144] + node _T_408 = eq(_T_407, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_409 = and(_T_405, _T_408) @[lsu_bus_buffer.scala 151:97] + node _T_410 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 151:170] + node _T_411 = eq(_T_410, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_412 = and(_T_409, _T_411) @[lsu_bus_buffer.scala 151:148] + node _T_413 = bits(ld_byte_hitvec_hi_1, 1, 1) @[lsu_bus_buffer.scala 151:93] + node _T_414 = and(ld_byte_hitvec_hi_1, buf_age_younger[1]) @[lsu_bus_buffer.scala 151:122] + node _T_415 = orr(_T_414) @[lsu_bus_buffer.scala 151:144] + node _T_416 = eq(_T_415, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_417 = and(_T_413, _T_416) @[lsu_bus_buffer.scala 151:97] + node _T_418 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 151:170] + node _T_419 = eq(_T_418, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_420 = and(_T_417, _T_419) @[lsu_bus_buffer.scala 151:148] + node _T_421 = bits(ld_byte_hitvec_hi_1, 2, 2) @[lsu_bus_buffer.scala 151:93] + node _T_422 = and(ld_byte_hitvec_hi_1, buf_age_younger[2]) @[lsu_bus_buffer.scala 151:122] + node _T_423 = orr(_T_422) @[lsu_bus_buffer.scala 151:144] + node _T_424 = eq(_T_423, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_425 = and(_T_421, _T_424) @[lsu_bus_buffer.scala 151:97] + node _T_426 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 151:170] + node _T_427 = eq(_T_426, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_428 = and(_T_425, _T_427) @[lsu_bus_buffer.scala 151:148] + node _T_429 = bits(ld_byte_hitvec_hi_1, 3, 3) @[lsu_bus_buffer.scala 151:93] + node _T_430 = and(ld_byte_hitvec_hi_1, buf_age_younger[3]) @[lsu_bus_buffer.scala 151:122] + node _T_431 = orr(_T_430) @[lsu_bus_buffer.scala 151:144] + node _T_432 = eq(_T_431, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_433 = and(_T_429, _T_432) @[lsu_bus_buffer.scala 151:97] + node _T_434 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 151:170] + node _T_435 = eq(_T_434, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_436 = and(_T_433, _T_435) @[lsu_bus_buffer.scala 151:148] + node _T_437 = cat(_T_436, _T_428) @[Cat.scala 29:58] + node _T_438 = cat(_T_437, _T_420) @[Cat.scala 29:58] + node _T_439 = cat(_T_438, _T_412) @[Cat.scala 29:58] + node _T_440 = bits(ld_byte_hitvec_hi_2, 0, 0) @[lsu_bus_buffer.scala 151:93] + node _T_441 = and(ld_byte_hitvec_hi_2, buf_age_younger[0]) @[lsu_bus_buffer.scala 151:122] + node _T_442 = orr(_T_441) @[lsu_bus_buffer.scala 151:144] + node _T_443 = eq(_T_442, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_444 = and(_T_440, _T_443) @[lsu_bus_buffer.scala 151:97] + node _T_445 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 151:170] + node _T_446 = eq(_T_445, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_447 = and(_T_444, _T_446) @[lsu_bus_buffer.scala 151:148] + node _T_448 = bits(ld_byte_hitvec_hi_2, 1, 1) @[lsu_bus_buffer.scala 151:93] + node _T_449 = and(ld_byte_hitvec_hi_2, buf_age_younger[1]) @[lsu_bus_buffer.scala 151:122] + node _T_450 = orr(_T_449) @[lsu_bus_buffer.scala 151:144] + node _T_451 = eq(_T_450, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_452 = and(_T_448, _T_451) @[lsu_bus_buffer.scala 151:97] + node _T_453 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 151:170] + node _T_454 = eq(_T_453, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_455 = and(_T_452, _T_454) @[lsu_bus_buffer.scala 151:148] + node _T_456 = bits(ld_byte_hitvec_hi_2, 2, 2) @[lsu_bus_buffer.scala 151:93] + node _T_457 = and(ld_byte_hitvec_hi_2, buf_age_younger[2]) @[lsu_bus_buffer.scala 151:122] + node _T_458 = orr(_T_457) @[lsu_bus_buffer.scala 151:144] + node _T_459 = eq(_T_458, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_460 = and(_T_456, _T_459) @[lsu_bus_buffer.scala 151:97] + node _T_461 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 151:170] + node _T_462 = eq(_T_461, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_463 = and(_T_460, _T_462) @[lsu_bus_buffer.scala 151:148] + node _T_464 = bits(ld_byte_hitvec_hi_2, 3, 3) @[lsu_bus_buffer.scala 151:93] + node _T_465 = and(ld_byte_hitvec_hi_2, buf_age_younger[3]) @[lsu_bus_buffer.scala 151:122] + node _T_466 = orr(_T_465) @[lsu_bus_buffer.scala 151:144] + node _T_467 = eq(_T_466, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_468 = and(_T_464, _T_467) @[lsu_bus_buffer.scala 151:97] + node _T_469 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 151:170] + node _T_470 = eq(_T_469, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_471 = and(_T_468, _T_470) @[lsu_bus_buffer.scala 151:148] + node _T_472 = cat(_T_471, _T_463) @[Cat.scala 29:58] + node _T_473 = cat(_T_472, _T_455) @[Cat.scala 29:58] + node _T_474 = cat(_T_473, _T_447) @[Cat.scala 29:58] + node _T_475 = bits(ld_byte_hitvec_hi_3, 0, 0) @[lsu_bus_buffer.scala 151:93] + node _T_476 = and(ld_byte_hitvec_hi_3, buf_age_younger[0]) @[lsu_bus_buffer.scala 151:122] + node _T_477 = orr(_T_476) @[lsu_bus_buffer.scala 151:144] + node _T_478 = eq(_T_477, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_479 = and(_T_475, _T_478) @[lsu_bus_buffer.scala 151:97] + node _T_480 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 151:170] + node _T_481 = eq(_T_480, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_482 = and(_T_479, _T_481) @[lsu_bus_buffer.scala 151:148] + node _T_483 = bits(ld_byte_hitvec_hi_3, 1, 1) @[lsu_bus_buffer.scala 151:93] + node _T_484 = and(ld_byte_hitvec_hi_3, buf_age_younger[1]) @[lsu_bus_buffer.scala 151:122] + node _T_485 = orr(_T_484) @[lsu_bus_buffer.scala 151:144] + node _T_486 = eq(_T_485, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_487 = and(_T_483, _T_486) @[lsu_bus_buffer.scala 151:97] + node _T_488 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 151:170] + node _T_489 = eq(_T_488, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_490 = and(_T_487, _T_489) @[lsu_bus_buffer.scala 151:148] + node _T_491 = bits(ld_byte_hitvec_hi_3, 2, 2) @[lsu_bus_buffer.scala 151:93] + node _T_492 = and(ld_byte_hitvec_hi_3, buf_age_younger[2]) @[lsu_bus_buffer.scala 151:122] + node _T_493 = orr(_T_492) @[lsu_bus_buffer.scala 151:144] + node _T_494 = eq(_T_493, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_495 = and(_T_491, _T_494) @[lsu_bus_buffer.scala 151:97] + node _T_496 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 151:170] + node _T_497 = eq(_T_496, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_498 = and(_T_495, _T_497) @[lsu_bus_buffer.scala 151:148] + node _T_499 = bits(ld_byte_hitvec_hi_3, 3, 3) @[lsu_bus_buffer.scala 151:93] + node _T_500 = and(ld_byte_hitvec_hi_3, buf_age_younger[3]) @[lsu_bus_buffer.scala 151:122] + node _T_501 = orr(_T_500) @[lsu_bus_buffer.scala 151:144] + node _T_502 = eq(_T_501, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:99] + node _T_503 = and(_T_499, _T_502) @[lsu_bus_buffer.scala 151:97] + node _T_504 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 151:170] + node _T_505 = eq(_T_504, UInt<1>("h00")) @[lsu_bus_buffer.scala 151:150] + node _T_506 = and(_T_503, _T_505) @[lsu_bus_buffer.scala 151:148] + node _T_507 = cat(_T_506, _T_498) @[Cat.scala 29:58] + node _T_508 = cat(_T_507, _T_490) @[Cat.scala 29:58] + node _T_509 = cat(_T_508, _T_482) @[Cat.scala 29:58] + ld_byte_hitvecfn_hi[0] <= _T_404 @[lsu_bus_buffer.scala 151:23] + ld_byte_hitvecfn_hi[1] <= _T_439 @[lsu_bus_buffer.scala 151:23] + ld_byte_hitvecfn_hi[2] <= _T_474 @[lsu_bus_buffer.scala 151:23] + ld_byte_hitvecfn_hi[3] <= _T_509 @[lsu_bus_buffer.scala 151:23] + wire ibuf_addr : UInt<32> + ibuf_addr <= UInt<1>("h00") + wire ibuf_write : UInt<1> + ibuf_write <= UInt<1>("h00") + wire ibuf_valid : UInt<1> + ibuf_valid <= UInt<1>("h00") + node _T_510 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 156:43] + node _T_511 = bits(ibuf_addr, 31, 2) @[lsu_bus_buffer.scala 156:64] + node _T_512 = eq(_T_510, _T_511) @[lsu_bus_buffer.scala 156:51] + node _T_513 = and(_T_512, ibuf_write) @[lsu_bus_buffer.scala 156:73] + node _T_514 = and(_T_513, ibuf_valid) @[lsu_bus_buffer.scala 156:86] + node ld_addr_ibuf_hit_lo = and(_T_514, io.lsu_busreq_m) @[lsu_bus_buffer.scala 156:99] + node _T_515 = bits(io.end_addr_m, 31, 2) @[lsu_bus_buffer.scala 157:43] + node _T_516 = bits(ibuf_addr, 31, 2) @[lsu_bus_buffer.scala 157:64] + node _T_517 = eq(_T_515, _T_516) @[lsu_bus_buffer.scala 157:51] + node _T_518 = and(_T_517, ibuf_write) @[lsu_bus_buffer.scala 157:73] + node _T_519 = and(_T_518, ibuf_valid) @[lsu_bus_buffer.scala 157:86] + node ld_addr_ibuf_hit_hi = and(_T_519, io.lsu_busreq_m) @[lsu_bus_buffer.scala 157:99] + wire ibuf_byteen : UInt<4> + ibuf_byteen <= UInt<1>("h00") + node _T_520 = bits(ld_addr_ibuf_hit_lo, 0, 0) @[Bitwise.scala 72:15] + node _T_521 = mux(_T_520, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_522 = and(_T_521, ibuf_byteen) @[lsu_bus_buffer.scala 161:55] + node _T_523 = and(_T_522, ldst_byteen_lo_m) @[lsu_bus_buffer.scala 161:69] + ld_byte_ibuf_hit_lo <= _T_523 @[lsu_bus_buffer.scala 161:23] + node _T_524 = bits(ld_addr_ibuf_hit_hi, 0, 0) @[Bitwise.scala 72:15] + node _T_525 = mux(_T_524, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_526 = and(_T_525, ibuf_byteen) @[lsu_bus_buffer.scala 162:55] + node _T_527 = and(_T_526, ldst_byteen_hi_m) @[lsu_bus_buffer.scala 162:69] + ld_byte_ibuf_hit_hi <= _T_527 @[lsu_bus_buffer.scala 162:23] + wire buf_data : UInt<32>[4] @[lsu_bus_buffer.scala 164:22] + buf_data[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 165:12] + buf_data[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 165:12] + buf_data[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 165:12] + buf_data[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 165:12] + wire fwd_data : UInt<32> + fwd_data <= UInt<1>("h00") + node _T_528 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[lsu_bus_buffer.scala 167:81] + node _T_529 = bits(_T_528, 0, 0) @[Bitwise.scala 72:15] + node _T_530 = mux(_T_529, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_531 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[lsu_bus_buffer.scala 167:81] + node _T_532 = bits(_T_531, 0, 0) @[Bitwise.scala 72:15] + node _T_533 = mux(_T_532, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_534 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[lsu_bus_buffer.scala 167:81] + node _T_535 = bits(_T_534, 0, 0) @[Bitwise.scala 72:15] + node _T_536 = mux(_T_535, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_537 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[lsu_bus_buffer.scala 167:81] + node _T_538 = bits(_T_537, 0, 0) @[Bitwise.scala 72:15] + node _T_539 = mux(_T_538, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_540 = cat(_T_539, _T_536) @[Cat.scala 29:58] + node _T_541 = cat(_T_540, _T_533) @[Cat.scala 29:58] + node ld_fwddata_buf_lo_initial = cat(_T_541, _T_530) @[Cat.scala 29:58] + node _T_542 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[lsu_bus_buffer.scala 168:81] + node _T_543 = bits(_T_542, 0, 0) @[Bitwise.scala 72:15] + node _T_544 = mux(_T_543, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_545 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[lsu_bus_buffer.scala 168:81] + node _T_546 = bits(_T_545, 0, 0) @[Bitwise.scala 72:15] + node _T_547 = mux(_T_546, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_548 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[lsu_bus_buffer.scala 168:81] + node _T_549 = bits(_T_548, 0, 0) @[Bitwise.scala 72:15] + node _T_550 = mux(_T_549, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_551 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[lsu_bus_buffer.scala 168:81] + node _T_552 = bits(_T_551, 0, 0) @[Bitwise.scala 72:15] + node _T_553 = mux(_T_552, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_554 = cat(_T_553, _T_550) @[Cat.scala 29:58] + node _T_555 = cat(_T_554, _T_547) @[Cat.scala 29:58] + node ld_fwddata_buf_hi_initial = cat(_T_555, _T_544) @[Cat.scala 29:58] + node _T_556 = bits(ld_byte_hitvecfn_lo[3], 0, 0) @[lsu_bus_buffer.scala 169:86] + node _T_557 = bits(_T_556, 0, 0) @[Bitwise.scala 72:15] + node _T_558 = mux(_T_557, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_559 = bits(buf_data[0], 31, 24) @[lsu_bus_buffer.scala 169:104] + node _T_560 = and(_T_558, _T_559) @[lsu_bus_buffer.scala 169:91] + node _T_561 = bits(ld_byte_hitvecfn_lo[3], 1, 1) @[lsu_bus_buffer.scala 169:86] + node _T_562 = bits(_T_561, 0, 0) @[Bitwise.scala 72:15] + node _T_563 = mux(_T_562, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_564 = bits(buf_data[1], 31, 24) @[lsu_bus_buffer.scala 169:104] + node _T_565 = and(_T_563, _T_564) @[lsu_bus_buffer.scala 169:91] + node _T_566 = bits(ld_byte_hitvecfn_lo[3], 2, 2) @[lsu_bus_buffer.scala 169:86] + node _T_567 = bits(_T_566, 0, 0) @[Bitwise.scala 72:15] + node _T_568 = mux(_T_567, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_569 = bits(buf_data[2], 31, 24) @[lsu_bus_buffer.scala 169:104] + node _T_570 = and(_T_568, _T_569) @[lsu_bus_buffer.scala 169:91] + node _T_571 = bits(ld_byte_hitvecfn_lo[3], 3, 3) @[lsu_bus_buffer.scala 169:86] + node _T_572 = bits(_T_571, 0, 0) @[Bitwise.scala 72:15] + node _T_573 = mux(_T_572, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_574 = bits(buf_data[3], 31, 24) @[lsu_bus_buffer.scala 169:104] + node _T_575 = and(_T_573, _T_574) @[lsu_bus_buffer.scala 169:91] + node _T_576 = or(_T_560, _T_565) @[lsu_bus_buffer.scala 169:123] + node _T_577 = or(_T_576, _T_570) @[lsu_bus_buffer.scala 169:123] + node _T_578 = or(_T_577, _T_575) @[lsu_bus_buffer.scala 169:123] + node _T_579 = bits(ld_byte_hitvecfn_lo[2], 0, 0) @[lsu_bus_buffer.scala 170:60] + node _T_580 = bits(_T_579, 0, 0) @[Bitwise.scala 72:15] + node _T_581 = mux(_T_580, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_582 = bits(buf_data[0], 23, 16) @[lsu_bus_buffer.scala 170:78] + node _T_583 = and(_T_581, _T_582) @[lsu_bus_buffer.scala 170:65] + node _T_584 = bits(ld_byte_hitvecfn_lo[2], 1, 1) @[lsu_bus_buffer.scala 170:60] + node _T_585 = bits(_T_584, 0, 0) @[Bitwise.scala 72:15] + node _T_586 = mux(_T_585, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_587 = bits(buf_data[1], 23, 16) @[lsu_bus_buffer.scala 170:78] + node _T_588 = and(_T_586, _T_587) @[lsu_bus_buffer.scala 170:65] + node _T_589 = bits(ld_byte_hitvecfn_lo[2], 2, 2) @[lsu_bus_buffer.scala 170:60] + node _T_590 = bits(_T_589, 0, 0) @[Bitwise.scala 72:15] + node _T_591 = mux(_T_590, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_592 = bits(buf_data[2], 23, 16) @[lsu_bus_buffer.scala 170:78] + node _T_593 = and(_T_591, _T_592) @[lsu_bus_buffer.scala 170:65] + node _T_594 = bits(ld_byte_hitvecfn_lo[2], 3, 3) @[lsu_bus_buffer.scala 170:60] + node _T_595 = bits(_T_594, 0, 0) @[Bitwise.scala 72:15] + node _T_596 = mux(_T_595, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_597 = bits(buf_data[3], 23, 16) @[lsu_bus_buffer.scala 170:78] + node _T_598 = and(_T_596, _T_597) @[lsu_bus_buffer.scala 170:65] + node _T_599 = or(_T_583, _T_588) @[lsu_bus_buffer.scala 170:97] + node _T_600 = or(_T_599, _T_593) @[lsu_bus_buffer.scala 170:97] + node _T_601 = or(_T_600, _T_598) @[lsu_bus_buffer.scala 170:97] + node _T_602 = bits(ld_byte_hitvecfn_lo[1], 0, 0) @[lsu_bus_buffer.scala 171:60] + node _T_603 = bits(_T_602, 0, 0) @[Bitwise.scala 72:15] + node _T_604 = mux(_T_603, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_605 = bits(buf_data[0], 15, 8) @[lsu_bus_buffer.scala 171:78] + node _T_606 = and(_T_604, _T_605) @[lsu_bus_buffer.scala 171:65] + node _T_607 = bits(ld_byte_hitvecfn_lo[1], 1, 1) @[lsu_bus_buffer.scala 171:60] + node _T_608 = bits(_T_607, 0, 0) @[Bitwise.scala 72:15] + node _T_609 = mux(_T_608, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_610 = bits(buf_data[1], 15, 8) @[lsu_bus_buffer.scala 171:78] + node _T_611 = and(_T_609, _T_610) @[lsu_bus_buffer.scala 171:65] + node _T_612 = bits(ld_byte_hitvecfn_lo[1], 2, 2) @[lsu_bus_buffer.scala 171:60] + node _T_613 = bits(_T_612, 0, 0) @[Bitwise.scala 72:15] + node _T_614 = mux(_T_613, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_615 = bits(buf_data[2], 15, 8) @[lsu_bus_buffer.scala 171:78] + node _T_616 = and(_T_614, _T_615) @[lsu_bus_buffer.scala 171:65] + node _T_617 = bits(ld_byte_hitvecfn_lo[1], 3, 3) @[lsu_bus_buffer.scala 171:60] + node _T_618 = bits(_T_617, 0, 0) @[Bitwise.scala 72:15] + node _T_619 = mux(_T_618, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_620 = bits(buf_data[3], 15, 8) @[lsu_bus_buffer.scala 171:78] + node _T_621 = and(_T_619, _T_620) @[lsu_bus_buffer.scala 171:65] + node _T_622 = or(_T_606, _T_611) @[lsu_bus_buffer.scala 171:97] + node _T_623 = or(_T_622, _T_616) @[lsu_bus_buffer.scala 171:97] + node _T_624 = or(_T_623, _T_621) @[lsu_bus_buffer.scala 171:97] + node _T_625 = bits(ld_byte_hitvecfn_lo[0], 0, 0) @[lsu_bus_buffer.scala 172:60] + node _T_626 = bits(_T_625, 0, 0) @[Bitwise.scala 72:15] + node _T_627 = mux(_T_626, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_628 = bits(buf_data[0], 7, 0) @[lsu_bus_buffer.scala 172:78] + node _T_629 = and(_T_627, _T_628) @[lsu_bus_buffer.scala 172:65] + node _T_630 = bits(ld_byte_hitvecfn_lo[0], 1, 1) @[lsu_bus_buffer.scala 172:60] + node _T_631 = bits(_T_630, 0, 0) @[Bitwise.scala 72:15] + node _T_632 = mux(_T_631, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_633 = bits(buf_data[1], 7, 0) @[lsu_bus_buffer.scala 172:78] + node _T_634 = and(_T_632, _T_633) @[lsu_bus_buffer.scala 172:65] + node _T_635 = bits(ld_byte_hitvecfn_lo[0], 2, 2) @[lsu_bus_buffer.scala 172:60] + node _T_636 = bits(_T_635, 0, 0) @[Bitwise.scala 72:15] + node _T_637 = mux(_T_636, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_638 = bits(buf_data[2], 7, 0) @[lsu_bus_buffer.scala 172:78] + node _T_639 = and(_T_637, _T_638) @[lsu_bus_buffer.scala 172:65] + node _T_640 = bits(ld_byte_hitvecfn_lo[0], 3, 3) @[lsu_bus_buffer.scala 172:60] + node _T_641 = bits(_T_640, 0, 0) @[Bitwise.scala 72:15] + node _T_642 = mux(_T_641, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_643 = bits(buf_data[3], 7, 0) @[lsu_bus_buffer.scala 172:78] + node _T_644 = and(_T_642, _T_643) @[lsu_bus_buffer.scala 172:65] + node _T_645 = or(_T_629, _T_634) @[lsu_bus_buffer.scala 172:97] + node _T_646 = or(_T_645, _T_639) @[lsu_bus_buffer.scala 172:97] + node _T_647 = or(_T_646, _T_644) @[lsu_bus_buffer.scala 172:97] + node _T_648 = cat(_T_624, _T_647) @[Cat.scala 29:58] + node _T_649 = cat(_T_578, _T_601) @[Cat.scala 29:58] + node _T_650 = cat(_T_649, _T_648) @[Cat.scala 29:58] + node _T_651 = and(ld_fwddata_buf_lo_initial, ibuf_data) @[lsu_bus_buffer.scala 173:32] + node _T_652 = or(_T_650, _T_651) @[lsu_bus_buffer.scala 172:103] + io.ld_fwddata_buf_lo <= _T_652 @[lsu_bus_buffer.scala 169:24] + node _T_653 = bits(ld_byte_hitvecfn_hi[3], 0, 0) @[lsu_bus_buffer.scala 175:86] + node _T_654 = bits(_T_653, 0, 0) @[Bitwise.scala 72:15] + node _T_655 = mux(_T_654, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_656 = bits(buf_data[0], 31, 24) @[lsu_bus_buffer.scala 175:104] + node _T_657 = and(_T_655, _T_656) @[lsu_bus_buffer.scala 175:91] + node _T_658 = bits(ld_byte_hitvecfn_hi[3], 1, 1) @[lsu_bus_buffer.scala 175:86] + node _T_659 = bits(_T_658, 0, 0) @[Bitwise.scala 72:15] + node _T_660 = mux(_T_659, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_661 = bits(buf_data[1], 31, 24) @[lsu_bus_buffer.scala 175:104] + node _T_662 = and(_T_660, _T_661) @[lsu_bus_buffer.scala 175:91] + node _T_663 = bits(ld_byte_hitvecfn_hi[3], 2, 2) @[lsu_bus_buffer.scala 175:86] + node _T_664 = bits(_T_663, 0, 0) @[Bitwise.scala 72:15] + node _T_665 = mux(_T_664, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_666 = bits(buf_data[2], 31, 24) @[lsu_bus_buffer.scala 175:104] + node _T_667 = and(_T_665, _T_666) @[lsu_bus_buffer.scala 175:91] + node _T_668 = bits(ld_byte_hitvecfn_hi[3], 3, 3) @[lsu_bus_buffer.scala 175:86] + node _T_669 = bits(_T_668, 0, 0) @[Bitwise.scala 72:15] + node _T_670 = mux(_T_669, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_671 = bits(buf_data[3], 31, 24) @[lsu_bus_buffer.scala 175:104] + node _T_672 = and(_T_670, _T_671) @[lsu_bus_buffer.scala 175:91] + node _T_673 = or(_T_657, _T_662) @[lsu_bus_buffer.scala 175:123] + node _T_674 = or(_T_673, _T_667) @[lsu_bus_buffer.scala 175:123] + node _T_675 = or(_T_674, _T_672) @[lsu_bus_buffer.scala 175:123] + node _T_676 = bits(ld_byte_hitvecfn_hi[2], 0, 0) @[lsu_bus_buffer.scala 176:60] + node _T_677 = bits(_T_676, 0, 0) @[Bitwise.scala 72:15] + node _T_678 = mux(_T_677, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_679 = bits(buf_data[0], 23, 16) @[lsu_bus_buffer.scala 176:78] + node _T_680 = and(_T_678, _T_679) @[lsu_bus_buffer.scala 176:65] + node _T_681 = bits(ld_byte_hitvecfn_hi[2], 1, 1) @[lsu_bus_buffer.scala 176:60] + node _T_682 = bits(_T_681, 0, 0) @[Bitwise.scala 72:15] + node _T_683 = mux(_T_682, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_684 = bits(buf_data[1], 23, 16) @[lsu_bus_buffer.scala 176:78] + node _T_685 = and(_T_683, _T_684) @[lsu_bus_buffer.scala 176:65] + node _T_686 = bits(ld_byte_hitvecfn_hi[2], 2, 2) @[lsu_bus_buffer.scala 176:60] + node _T_687 = bits(_T_686, 0, 0) @[Bitwise.scala 72:15] + node _T_688 = mux(_T_687, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_689 = bits(buf_data[2], 23, 16) @[lsu_bus_buffer.scala 176:78] + node _T_690 = and(_T_688, _T_689) @[lsu_bus_buffer.scala 176:65] + node _T_691 = bits(ld_byte_hitvecfn_hi[2], 3, 3) @[lsu_bus_buffer.scala 176:60] + node _T_692 = bits(_T_691, 0, 0) @[Bitwise.scala 72:15] + node _T_693 = mux(_T_692, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_694 = bits(buf_data[3], 23, 16) @[lsu_bus_buffer.scala 176:78] + node _T_695 = and(_T_693, _T_694) @[lsu_bus_buffer.scala 176:65] + node _T_696 = or(_T_680, _T_685) @[lsu_bus_buffer.scala 176:97] + node _T_697 = or(_T_696, _T_690) @[lsu_bus_buffer.scala 176:97] + node _T_698 = or(_T_697, _T_695) @[lsu_bus_buffer.scala 176:97] + node _T_699 = bits(ld_byte_hitvecfn_hi[1], 0, 0) @[lsu_bus_buffer.scala 177:60] + node _T_700 = bits(_T_699, 0, 0) @[Bitwise.scala 72:15] + node _T_701 = mux(_T_700, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_702 = bits(buf_data[0], 15, 8) @[lsu_bus_buffer.scala 177:78] + node _T_703 = and(_T_701, _T_702) @[lsu_bus_buffer.scala 177:65] + node _T_704 = bits(ld_byte_hitvecfn_hi[1], 1, 1) @[lsu_bus_buffer.scala 177:60] + node _T_705 = bits(_T_704, 0, 0) @[Bitwise.scala 72:15] + node _T_706 = mux(_T_705, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_707 = bits(buf_data[1], 15, 8) @[lsu_bus_buffer.scala 177:78] + node _T_708 = and(_T_706, _T_707) @[lsu_bus_buffer.scala 177:65] + node _T_709 = bits(ld_byte_hitvecfn_hi[1], 2, 2) @[lsu_bus_buffer.scala 177:60] + node _T_710 = bits(_T_709, 0, 0) @[Bitwise.scala 72:15] + node _T_711 = mux(_T_710, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_712 = bits(buf_data[2], 15, 8) @[lsu_bus_buffer.scala 177:78] + node _T_713 = and(_T_711, _T_712) @[lsu_bus_buffer.scala 177:65] + node _T_714 = bits(ld_byte_hitvecfn_hi[1], 3, 3) @[lsu_bus_buffer.scala 177:60] + node _T_715 = bits(_T_714, 0, 0) @[Bitwise.scala 72:15] + node _T_716 = mux(_T_715, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_717 = bits(buf_data[3], 15, 8) @[lsu_bus_buffer.scala 177:78] + node _T_718 = and(_T_716, _T_717) @[lsu_bus_buffer.scala 177:65] + node _T_719 = or(_T_703, _T_708) @[lsu_bus_buffer.scala 177:97] + node _T_720 = or(_T_719, _T_713) @[lsu_bus_buffer.scala 177:97] + node _T_721 = or(_T_720, _T_718) @[lsu_bus_buffer.scala 177:97] + node _T_722 = bits(ld_byte_hitvecfn_hi[0], 0, 0) @[lsu_bus_buffer.scala 178:60] + node _T_723 = bits(_T_722, 0, 0) @[Bitwise.scala 72:15] + node _T_724 = mux(_T_723, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_725 = bits(buf_data[0], 7, 0) @[lsu_bus_buffer.scala 178:78] + node _T_726 = and(_T_724, _T_725) @[lsu_bus_buffer.scala 178:65] + node _T_727 = bits(ld_byte_hitvecfn_hi[0], 1, 1) @[lsu_bus_buffer.scala 178:60] + node _T_728 = bits(_T_727, 0, 0) @[Bitwise.scala 72:15] + node _T_729 = mux(_T_728, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_730 = bits(buf_data[1], 7, 0) @[lsu_bus_buffer.scala 178:78] + node _T_731 = and(_T_729, _T_730) @[lsu_bus_buffer.scala 178:65] + node _T_732 = bits(ld_byte_hitvecfn_hi[0], 2, 2) @[lsu_bus_buffer.scala 178:60] + node _T_733 = bits(_T_732, 0, 0) @[Bitwise.scala 72:15] + node _T_734 = mux(_T_733, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_735 = bits(buf_data[2], 7, 0) @[lsu_bus_buffer.scala 178:78] + node _T_736 = and(_T_734, _T_735) @[lsu_bus_buffer.scala 178:65] + node _T_737 = bits(ld_byte_hitvecfn_hi[0], 3, 3) @[lsu_bus_buffer.scala 178:60] + node _T_738 = bits(_T_737, 0, 0) @[Bitwise.scala 72:15] + node _T_739 = mux(_T_738, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_740 = bits(buf_data[3], 7, 0) @[lsu_bus_buffer.scala 178:78] + node _T_741 = and(_T_739, _T_740) @[lsu_bus_buffer.scala 178:65] + node _T_742 = or(_T_726, _T_731) @[lsu_bus_buffer.scala 178:97] + node _T_743 = or(_T_742, _T_736) @[lsu_bus_buffer.scala 178:97] + node _T_744 = or(_T_743, _T_741) @[lsu_bus_buffer.scala 178:97] + node _T_745 = cat(_T_721, _T_744) @[Cat.scala 29:58] + node _T_746 = cat(_T_675, _T_698) @[Cat.scala 29:58] + node _T_747 = cat(_T_746, _T_745) @[Cat.scala 29:58] + node _T_748 = and(ld_fwddata_buf_hi_initial, ibuf_data) @[lsu_bus_buffer.scala 179:32] + node _T_749 = or(_T_747, _T_748) @[lsu_bus_buffer.scala 178:103] + io.ld_fwddata_buf_hi <= _T_749 @[lsu_bus_buffer.scala 175:24] + node bus_coalescing_disable = or(io.tlu_busbuff.dec_tlu_wb_coalescing_disable, UInt<1>("h00")) @[lsu_bus_buffer.scala 181:77] + node _T_750 = mux(io.lsu_pkt_r.bits.by, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_751 = mux(io.lsu_pkt_r.bits.half, UInt<4>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_752 = mux(io.lsu_pkt_r.bits.word, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_753 = or(_T_750, _T_751) @[Mux.scala 27:72] + node _T_754 = or(_T_753, _T_752) @[Mux.scala 27:72] + wire ldst_byteen_r : UInt<4> @[Mux.scala 27:72] + ldst_byteen_r <= _T_754 @[Mux.scala 27:72] + node _T_755 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 186:50] + node _T_756 = eq(_T_755, UInt<1>("h00")) @[lsu_bus_buffer.scala 186:55] + node _T_757 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 187:19] + node _T_758 = eq(_T_757, UInt<1>("h01")) @[lsu_bus_buffer.scala 187:24] + node _T_759 = bits(ldst_byteen_r, 3, 3) @[lsu_bus_buffer.scala 187:60] + node _T_760 = cat(UInt<3>("h00"), _T_759) @[Cat.scala 29:58] + node _T_761 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 188:19] + node _T_762 = eq(_T_761, UInt<2>("h02")) @[lsu_bus_buffer.scala 188:24] + node _T_763 = bits(ldst_byteen_r, 3, 2) @[lsu_bus_buffer.scala 188:60] + node _T_764 = cat(UInt<2>("h00"), _T_763) @[Cat.scala 29:58] + node _T_765 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 189:19] + node _T_766 = eq(_T_765, UInt<2>("h03")) @[lsu_bus_buffer.scala 189:24] + node _T_767 = bits(ldst_byteen_r, 3, 1) @[lsu_bus_buffer.scala 189:60] + node _T_768 = cat(UInt<1>("h00"), _T_767) @[Cat.scala 29:58] + node _T_769 = mux(_T_756, UInt<4>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_770 = mux(_T_758, _T_760, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_771 = mux(_T_762, _T_764, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_772 = mux(_T_766, _T_768, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_773 = or(_T_769, _T_770) @[Mux.scala 27:72] + node _T_774 = or(_T_773, _T_771) @[Mux.scala 27:72] + node _T_775 = or(_T_774, _T_772) @[Mux.scala 27:72] + wire ldst_byteen_hi_r : UInt<4> @[Mux.scala 27:72] + ldst_byteen_hi_r <= _T_775 @[Mux.scala 27:72] + node _T_776 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 191:50] + node _T_777 = eq(_T_776, UInt<1>("h00")) @[lsu_bus_buffer.scala 191:55] + node _T_778 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 192:19] + node _T_779 = eq(_T_778, UInt<1>("h01")) @[lsu_bus_buffer.scala 192:24] + node _T_780 = bits(ldst_byteen_r, 2, 0) @[lsu_bus_buffer.scala 192:50] + node _T_781 = cat(_T_780, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_782 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 193:19] + node _T_783 = eq(_T_782, UInt<2>("h02")) @[lsu_bus_buffer.scala 193:24] + node _T_784 = bits(ldst_byteen_r, 1, 0) @[lsu_bus_buffer.scala 193:50] + node _T_785 = cat(_T_784, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_786 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 194:19] + node _T_787 = eq(_T_786, UInt<2>("h03")) @[lsu_bus_buffer.scala 194:24] + node _T_788 = bits(ldst_byteen_r, 0, 0) @[lsu_bus_buffer.scala 194:50] + node _T_789 = cat(_T_788, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_790 = mux(_T_777, ldst_byteen_r, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_791 = mux(_T_779, _T_781, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_792 = mux(_T_783, _T_785, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_793 = mux(_T_787, _T_789, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_794 = or(_T_790, _T_791) @[Mux.scala 27:72] + node _T_795 = or(_T_794, _T_792) @[Mux.scala 27:72] + node _T_796 = or(_T_795, _T_793) @[Mux.scala 27:72] + wire ldst_byteen_lo_r : UInt<4> @[Mux.scala 27:72] + ldst_byteen_lo_r <= _T_796 @[Mux.scala 27:72] + node _T_797 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 196:49] + node _T_798 = eq(_T_797, UInt<1>("h00")) @[lsu_bus_buffer.scala 196:54] + node _T_799 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 197:19] + node _T_800 = eq(_T_799, UInt<1>("h01")) @[lsu_bus_buffer.scala 197:24] + node _T_801 = bits(io.store_data_r, 31, 24) @[lsu_bus_buffer.scala 197:64] + node _T_802 = cat(UInt<24>("h00"), _T_801) @[Cat.scala 29:58] + node _T_803 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 198:19] + node _T_804 = eq(_T_803, UInt<2>("h02")) @[lsu_bus_buffer.scala 198:24] + node _T_805 = bits(io.store_data_r, 31, 16) @[lsu_bus_buffer.scala 198:63] + node _T_806 = cat(UInt<16>("h00"), _T_805) @[Cat.scala 29:58] + node _T_807 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 199:19] + node _T_808 = eq(_T_807, UInt<2>("h03")) @[lsu_bus_buffer.scala 199:24] + node _T_809 = bits(io.store_data_r, 31, 8) @[lsu_bus_buffer.scala 199:62] + node _T_810 = cat(UInt<8>("h00"), _T_809) @[Cat.scala 29:58] + node _T_811 = mux(_T_798, UInt<32>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_812 = mux(_T_800, _T_802, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_813 = mux(_T_804, _T_806, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_814 = mux(_T_808, _T_810, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_815 = or(_T_811, _T_812) @[Mux.scala 27:72] + node _T_816 = or(_T_815, _T_813) @[Mux.scala 27:72] + node _T_817 = or(_T_816, _T_814) @[Mux.scala 27:72] + wire store_data_hi_r : UInt<32> @[Mux.scala 27:72] + store_data_hi_r <= _T_817 @[Mux.scala 27:72] + node _T_818 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 201:49] + node _T_819 = eq(_T_818, UInt<1>("h00")) @[lsu_bus_buffer.scala 201:54] + node _T_820 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 202:19] + node _T_821 = eq(_T_820, UInt<1>("h01")) @[lsu_bus_buffer.scala 202:24] + node _T_822 = bits(io.store_data_r, 23, 0) @[lsu_bus_buffer.scala 202:52] + node _T_823 = cat(_T_822, UInt<8>("h00")) @[Cat.scala 29:58] + node _T_824 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 203:19] + node _T_825 = eq(_T_824, UInt<2>("h02")) @[lsu_bus_buffer.scala 203:24] + node _T_826 = bits(io.store_data_r, 15, 0) @[lsu_bus_buffer.scala 203:52] + node _T_827 = cat(_T_826, UInt<16>("h00")) @[Cat.scala 29:58] + node _T_828 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 204:19] + node _T_829 = eq(_T_828, UInt<2>("h03")) @[lsu_bus_buffer.scala 204:24] + node _T_830 = bits(io.store_data_r, 7, 0) @[lsu_bus_buffer.scala 204:52] + node _T_831 = cat(_T_830, UInt<24>("h00")) @[Cat.scala 29:58] + node _T_832 = mux(_T_819, io.store_data_r, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_833 = mux(_T_821, _T_823, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_834 = mux(_T_825, _T_827, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_835 = mux(_T_829, _T_831, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_836 = or(_T_832, _T_833) @[Mux.scala 27:72] + node _T_837 = or(_T_836, _T_834) @[Mux.scala 27:72] + node _T_838 = or(_T_837, _T_835) @[Mux.scala 27:72] + wire store_data_lo_r : UInt<32> @[Mux.scala 27:72] + store_data_lo_r <= _T_838 @[Mux.scala 27:72] + node _T_839 = bits(io.lsu_addr_r, 3, 3) @[lsu_bus_buffer.scala 207:36] + node _T_840 = bits(io.end_addr_r, 3, 3) @[lsu_bus_buffer.scala 207:57] + node ldst_samedw_r = eq(_T_839, _T_840) @[lsu_bus_buffer.scala 207:40] + node _T_841 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_buffer.scala 208:72] + node _T_842 = eq(_T_841, UInt<1>("h00")) @[lsu_bus_buffer.scala 208:79] + node _T_843 = bits(io.lsu_addr_r, 0, 0) @[lsu_bus_buffer.scala 209:45] + node _T_844 = eq(_T_843, UInt<1>("h00")) @[lsu_bus_buffer.scala 209:31] + node _T_845 = mux(io.lsu_pkt_r.bits.word, _T_842, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_846 = mux(io.lsu_pkt_r.bits.half, _T_844, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_847 = mux(io.lsu_pkt_r.bits.by, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_848 = or(_T_845, _T_846) @[Mux.scala 27:72] + node _T_849 = or(_T_848, _T_847) @[Mux.scala 27:72] + wire is_aligned_r : UInt<1> @[Mux.scala 27:72] + is_aligned_r <= _T_849 @[Mux.scala 27:72] + node _T_850 = or(io.lsu_pkt_r.bits.load, io.no_word_merge_r) @[lsu_bus_buffer.scala 211:60] + node _T_851 = and(io.lsu_busreq_r, _T_850) @[lsu_bus_buffer.scala 211:34] + node _T_852 = eq(ibuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 211:84] + node ibuf_byp = and(_T_851, _T_852) @[lsu_bus_buffer.scala 211:82] + node _T_853 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 212:36] + node _T_854 = eq(ibuf_byp, UInt<1>("h00")) @[lsu_bus_buffer.scala 212:56] + node ibuf_wr_en = and(_T_853, _T_854) @[lsu_bus_buffer.scala 212:54] + wire ibuf_drain_vld : UInt<1> + ibuf_drain_vld <= UInt<1>("h00") + node _T_855 = eq(ibuf_wr_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 214:36] + node _T_856 = and(ibuf_drain_vld, _T_855) @[lsu_bus_buffer.scala 214:34] + node ibuf_rst = or(_T_856, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 214:49] + node _T_857 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 215:44] + node _T_858 = and(io.lsu_busreq_m, _T_857) @[lsu_bus_buffer.scala 215:42] + node _T_859 = and(_T_858, ibuf_valid) @[lsu_bus_buffer.scala 215:61] + node _T_860 = bits(ibuf_addr, 31, 2) @[lsu_bus_buffer.scala 215:112] + node _T_861 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 215:137] + node _T_862 = neq(_T_860, _T_861) @[lsu_bus_buffer.scala 215:120] + node _T_863 = or(io.lsu_pkt_m.bits.load, _T_862) @[lsu_bus_buffer.scala 215:100] + node ibuf_force_drain = and(_T_859, _T_863) @[lsu_bus_buffer.scala 215:74] + wire ibuf_sideeffect : UInt<1> + ibuf_sideeffect <= UInt<1>("h00") + wire ibuf_timer : UInt<3> + ibuf_timer <= UInt<1>("h00") + wire ibuf_merge_en : UInt<1> + ibuf_merge_en <= UInt<1>("h00") + wire ibuf_merge_in : UInt<1> + ibuf_merge_in <= UInt<1>("h00") + node _T_864 = eq(ibuf_timer, UInt<3>("h07")) @[lsu_bus_buffer.scala 220:62] + node _T_865 = or(ibuf_wr_en, _T_864) @[lsu_bus_buffer.scala 220:48] + node _T_866 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 220:98] + node _T_867 = eq(_T_866, UInt<1>("h00")) @[lsu_bus_buffer.scala 220:82] + node _T_868 = and(_T_865, _T_867) @[lsu_bus_buffer.scala 220:80] + node _T_869 = or(_T_868, ibuf_byp) @[lsu_bus_buffer.scala 221:5] + node _T_870 = or(_T_869, ibuf_force_drain) @[lsu_bus_buffer.scala 221:16] + node _T_871 = or(_T_870, ibuf_sideeffect) @[lsu_bus_buffer.scala 221:35] + node _T_872 = eq(ibuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 221:55] + node _T_873 = or(_T_871, _T_872) @[lsu_bus_buffer.scala 221:53] + node _T_874 = or(_T_873, bus_coalescing_disable) @[lsu_bus_buffer.scala 221:67] + node _T_875 = and(ibuf_valid, _T_874) @[lsu_bus_buffer.scala 220:32] + ibuf_drain_vld <= _T_875 @[lsu_bus_buffer.scala 220:18] + wire ibuf_tag : UInt<2> + ibuf_tag <= UInt<1>("h00") + wire WrPtr1_r : UInt<2> + WrPtr1_r <= UInt<1>("h00") + wire WrPtr0_r : UInt<2> + WrPtr0_r <= UInt<1>("h00") + node _T_876 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 226:39] + node _T_877 = mux(io.ldst_dual_r, WrPtr1_r, WrPtr0_r) @[lsu_bus_buffer.scala 226:69] + node ibuf_tag_in = mux(_T_876, ibuf_tag, _T_877) @[lsu_bus_buffer.scala 226:24] + node ibuf_sz_in = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58] + node ibuf_addr_in = mux(io.ldst_dual_r, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 229:25] + node _T_878 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 230:42] + node _T_879 = bits(ibuf_byteen, 3, 0) @[lsu_bus_buffer.scala 230:70] + node _T_880 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 230:95] + node _T_881 = or(_T_879, _T_880) @[lsu_bus_buffer.scala 230:77] + node _T_882 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 231:41] + node _T_883 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 231:65] + node _T_884 = mux(io.ldst_dual_r, _T_882, _T_883) @[lsu_bus_buffer.scala 231:8] + node ibuf_byteen_in = mux(_T_878, _T_881, _T_884) @[lsu_bus_buffer.scala 230:27] + node _T_885 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 234:61] + node _T_886 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_buffer.scala 235:25] + node _T_887 = bits(store_data_lo_r, 7, 0) @[lsu_bus_buffer.scala 235:45] + node _T_888 = bits(ibuf_data, 7, 0) @[lsu_bus_buffer.scala 235:76] + node _T_889 = mux(_T_886, _T_887, _T_888) @[lsu_bus_buffer.scala 235:8] + node _T_890 = bits(store_data_hi_r, 7, 0) @[lsu_bus_buffer.scala 236:40] + node _T_891 = bits(store_data_lo_r, 7, 0) @[lsu_bus_buffer.scala 236:77] + node _T_892 = mux(io.ldst_dual_r, _T_890, _T_891) @[lsu_bus_buffer.scala 236:8] + node _T_893 = mux(_T_885, _T_889, _T_892) @[lsu_bus_buffer.scala 234:46] + node _T_894 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 234:61] + node _T_895 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_buffer.scala 235:25] + node _T_896 = bits(store_data_lo_r, 15, 8) @[lsu_bus_buffer.scala 235:45] + node _T_897 = bits(ibuf_data, 15, 8) @[lsu_bus_buffer.scala 235:76] + node _T_898 = mux(_T_895, _T_896, _T_897) @[lsu_bus_buffer.scala 235:8] + node _T_899 = bits(store_data_hi_r, 15, 8) @[lsu_bus_buffer.scala 236:40] + node _T_900 = bits(store_data_lo_r, 15, 8) @[lsu_bus_buffer.scala 236:77] + node _T_901 = mux(io.ldst_dual_r, _T_899, _T_900) @[lsu_bus_buffer.scala 236:8] + node _T_902 = mux(_T_894, _T_898, _T_901) @[lsu_bus_buffer.scala 234:46] + node _T_903 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 234:61] + node _T_904 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_buffer.scala 235:25] + node _T_905 = bits(store_data_lo_r, 23, 16) @[lsu_bus_buffer.scala 235:45] + node _T_906 = bits(ibuf_data, 23, 16) @[lsu_bus_buffer.scala 235:76] + node _T_907 = mux(_T_904, _T_905, _T_906) @[lsu_bus_buffer.scala 235:8] + node _T_908 = bits(store_data_hi_r, 23, 16) @[lsu_bus_buffer.scala 236:40] + node _T_909 = bits(store_data_lo_r, 23, 16) @[lsu_bus_buffer.scala 236:77] + node _T_910 = mux(io.ldst_dual_r, _T_908, _T_909) @[lsu_bus_buffer.scala 236:8] + node _T_911 = mux(_T_903, _T_907, _T_910) @[lsu_bus_buffer.scala 234:46] + node _T_912 = and(ibuf_merge_en, ibuf_merge_in) @[lsu_bus_buffer.scala 234:61] + node _T_913 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_buffer.scala 235:25] + node _T_914 = bits(store_data_lo_r, 31, 24) @[lsu_bus_buffer.scala 235:45] + node _T_915 = bits(ibuf_data, 31, 24) @[lsu_bus_buffer.scala 235:76] + node _T_916 = mux(_T_913, _T_914, _T_915) @[lsu_bus_buffer.scala 235:8] + node _T_917 = bits(store_data_hi_r, 31, 24) @[lsu_bus_buffer.scala 236:40] + node _T_918 = bits(store_data_lo_r, 31, 24) @[lsu_bus_buffer.scala 236:77] + node _T_919 = mux(io.ldst_dual_r, _T_917, _T_918) @[lsu_bus_buffer.scala 236:8] + node _T_920 = mux(_T_912, _T_916, _T_919) @[lsu_bus_buffer.scala 234:46] + node _T_921 = cat(_T_920, _T_911) @[Cat.scala 29:58] + node _T_922 = cat(_T_921, _T_902) @[Cat.scala 29:58] + node ibuf_data_in = cat(_T_922, _T_893) @[Cat.scala 29:58] + node _T_923 = lt(ibuf_timer, UInt<3>("h07")) @[lsu_bus_buffer.scala 237:60] + node _T_924 = bits(_T_923, 0, 0) @[lsu_bus_buffer.scala 237:81] + node _T_925 = add(ibuf_timer, UInt<1>("h01")) @[lsu_bus_buffer.scala 237:95] + node _T_926 = tail(_T_925, 1) @[lsu_bus_buffer.scala 237:95] + node _T_927 = mux(_T_924, _T_926, ibuf_timer) @[lsu_bus_buffer.scala 237:47] + node ibuf_timer_in = mux(ibuf_wr_en, UInt<1>("h00"), _T_927) @[lsu_bus_buffer.scala 237:26] + node _T_928 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 239:36] + node _T_929 = and(_T_928, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 239:54] + node _T_930 = and(_T_929, ibuf_valid) @[lsu_bus_buffer.scala 239:80] + node _T_931 = and(_T_930, ibuf_write) @[lsu_bus_buffer.scala 239:93] + node _T_932 = bits(io.lsu_addr_r, 31, 2) @[lsu_bus_buffer.scala 239:122] + node _T_933 = bits(ibuf_addr, 31, 2) @[lsu_bus_buffer.scala 239:142] + node _T_934 = eq(_T_932, _T_933) @[lsu_bus_buffer.scala 239:129] + node _T_935 = and(_T_931, _T_934) @[lsu_bus_buffer.scala 239:106] + node _T_936 = eq(io.is_sideeffects_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 239:152] + node _T_937 = and(_T_935, _T_936) @[lsu_bus_buffer.scala 239:150] + node _T_938 = eq(bus_coalescing_disable, UInt<1>("h00")) @[lsu_bus_buffer.scala 239:175] + node _T_939 = and(_T_937, _T_938) @[lsu_bus_buffer.scala 239:173] + ibuf_merge_en <= _T_939 @[lsu_bus_buffer.scala 239:17] + node _T_940 = eq(io.ldst_dual_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 240:20] + ibuf_merge_in <= _T_940 @[lsu_bus_buffer.scala 240:17] + node _T_941 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 241:65] + node _T_942 = and(ibuf_merge_en, _T_941) @[lsu_bus_buffer.scala 241:63] + node _T_943 = bits(ibuf_byteen, 0, 0) @[lsu_bus_buffer.scala 241:92] + node _T_944 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_buffer.scala 241:114] + node _T_945 = or(_T_943, _T_944) @[lsu_bus_buffer.scala 241:96] + node _T_946 = bits(ibuf_byteen, 0, 0) @[lsu_bus_buffer.scala 241:130] + node _T_947 = mux(_T_942, _T_945, _T_946) @[lsu_bus_buffer.scala 241:48] + node _T_948 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 241:65] + node _T_949 = and(ibuf_merge_en, _T_948) @[lsu_bus_buffer.scala 241:63] + node _T_950 = bits(ibuf_byteen, 1, 1) @[lsu_bus_buffer.scala 241:92] + node _T_951 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_buffer.scala 241:114] + node _T_952 = or(_T_950, _T_951) @[lsu_bus_buffer.scala 241:96] + node _T_953 = bits(ibuf_byteen, 1, 1) @[lsu_bus_buffer.scala 241:130] + node _T_954 = mux(_T_949, _T_952, _T_953) @[lsu_bus_buffer.scala 241:48] + node _T_955 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 241:65] + node _T_956 = and(ibuf_merge_en, _T_955) @[lsu_bus_buffer.scala 241:63] + node _T_957 = bits(ibuf_byteen, 2, 2) @[lsu_bus_buffer.scala 241:92] + node _T_958 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_buffer.scala 241:114] + node _T_959 = or(_T_957, _T_958) @[lsu_bus_buffer.scala 241:96] + node _T_960 = bits(ibuf_byteen, 2, 2) @[lsu_bus_buffer.scala 241:130] + node _T_961 = mux(_T_956, _T_959, _T_960) @[lsu_bus_buffer.scala 241:48] + node _T_962 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 241:65] + node _T_963 = and(ibuf_merge_en, _T_962) @[lsu_bus_buffer.scala 241:63] + node _T_964 = bits(ibuf_byteen, 3, 3) @[lsu_bus_buffer.scala 241:92] + node _T_965 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_buffer.scala 241:114] + node _T_966 = or(_T_964, _T_965) @[lsu_bus_buffer.scala 241:96] + node _T_967 = bits(ibuf_byteen, 3, 3) @[lsu_bus_buffer.scala 241:130] + node _T_968 = mux(_T_963, _T_966, _T_967) @[lsu_bus_buffer.scala 241:48] + node _T_969 = cat(_T_968, _T_961) @[Cat.scala 29:58] + node _T_970 = cat(_T_969, _T_954) @[Cat.scala 29:58] + node ibuf_byteen_out = cat(_T_970, _T_947) @[Cat.scala 29:58] + node _T_971 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 242:62] + node _T_972 = and(ibuf_merge_en, _T_971) @[lsu_bus_buffer.scala 242:60] + node _T_973 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_buffer.scala 242:98] + node _T_974 = bits(store_data_lo_r, 7, 0) @[lsu_bus_buffer.scala 242:118] + node _T_975 = bits(ibuf_data, 7, 0) @[lsu_bus_buffer.scala 242:143] + node _T_976 = mux(_T_973, _T_974, _T_975) @[lsu_bus_buffer.scala 242:81] + node _T_977 = bits(ibuf_data, 7, 0) @[lsu_bus_buffer.scala 242:169] + node _T_978 = mux(_T_972, _T_976, _T_977) @[lsu_bus_buffer.scala 242:45] + node _T_979 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 242:62] + node _T_980 = and(ibuf_merge_en, _T_979) @[lsu_bus_buffer.scala 242:60] + node _T_981 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_buffer.scala 242:98] + node _T_982 = bits(store_data_lo_r, 15, 8) @[lsu_bus_buffer.scala 242:118] + node _T_983 = bits(ibuf_data, 15, 8) @[lsu_bus_buffer.scala 242:143] + node _T_984 = mux(_T_981, _T_982, _T_983) @[lsu_bus_buffer.scala 242:81] + node _T_985 = bits(ibuf_data, 15, 8) @[lsu_bus_buffer.scala 242:169] + node _T_986 = mux(_T_980, _T_984, _T_985) @[lsu_bus_buffer.scala 242:45] + node _T_987 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 242:62] + node _T_988 = and(ibuf_merge_en, _T_987) @[lsu_bus_buffer.scala 242:60] + node _T_989 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_buffer.scala 242:98] + node _T_990 = bits(store_data_lo_r, 23, 16) @[lsu_bus_buffer.scala 242:118] + node _T_991 = bits(ibuf_data, 23, 16) @[lsu_bus_buffer.scala 242:143] + node _T_992 = mux(_T_989, _T_990, _T_991) @[lsu_bus_buffer.scala 242:81] + node _T_993 = bits(ibuf_data, 23, 16) @[lsu_bus_buffer.scala 242:169] + node _T_994 = mux(_T_988, _T_992, _T_993) @[lsu_bus_buffer.scala 242:45] + node _T_995 = eq(ibuf_merge_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 242:62] + node _T_996 = and(ibuf_merge_en, _T_995) @[lsu_bus_buffer.scala 242:60] + node _T_997 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_buffer.scala 242:98] + node _T_998 = bits(store_data_lo_r, 31, 24) @[lsu_bus_buffer.scala 242:118] + node _T_999 = bits(ibuf_data, 31, 24) @[lsu_bus_buffer.scala 242:143] + node _T_1000 = mux(_T_997, _T_998, _T_999) @[lsu_bus_buffer.scala 242:81] + node _T_1001 = bits(ibuf_data, 31, 24) @[lsu_bus_buffer.scala 242:169] + node _T_1002 = mux(_T_996, _T_1000, _T_1001) @[lsu_bus_buffer.scala 242:45] + node _T_1003 = cat(_T_1002, _T_994) @[Cat.scala 29:58] + node _T_1004 = cat(_T_1003, _T_986) @[Cat.scala 29:58] + node ibuf_data_out = cat(_T_1004, _T_978) @[Cat.scala 29:58] + node _T_1005 = mux(ibuf_wr_en, UInt<1>("h01"), ibuf_valid) @[lsu_bus_buffer.scala 244:58] + node _T_1006 = eq(ibuf_rst, UInt<1>("h00")) @[lsu_bus_buffer.scala 244:93] + node _T_1007 = and(_T_1005, _T_1006) @[lsu_bus_buffer.scala 244:91] + reg _T_1008 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 244:54] + _T_1008 <= _T_1007 @[lsu_bus_buffer.scala 244:54] + ibuf_valid <= _T_1008 @[lsu_bus_buffer.scala 244:14] + reg _T_1009 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1009 <= ibuf_tag_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_tag <= _T_1009 @[lsu_bus_buffer.scala 245:12] + reg ibuf_dualtag : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + ibuf_dualtag <= WrPtr0_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg ibuf_dual : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + ibuf_dual <= io.ldst_dual_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg ibuf_samedw : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + ibuf_samedw <= ldst_samedw_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg ibuf_nomerge : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + ibuf_nomerge <= io.no_dword_merge_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg _T_1010 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1010 <= io.is_sideeffects_r @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_sideeffect <= _T_1010 @[lsu_bus_buffer.scala 250:19] + reg ibuf_unsign : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + ibuf_unsign <= io.lsu_pkt_r.bits.unsign @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg _T_1011 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1011 <= io.lsu_pkt_r.bits.store @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_write <= _T_1011 @[lsu_bus_buffer.scala 252:14] + reg ibuf_sz : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + ibuf_sz <= ibuf_sz_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr of rvclkhdr @[lib.scala 404:23] + rvclkhdr.clock <= clock + rvclkhdr.reset <= reset + rvclkhdr.io.clk <= clock @[lib.scala 406:18] + rvclkhdr.io.en <= ibuf_wr_en @[lib.scala 407:17] + rvclkhdr.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_1012 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1012 <= ibuf_addr_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_addr <= _T_1012 @[lsu_bus_buffer.scala 254:13] + reg _T_1013 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1013 <= ibuf_byteen_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_byteen <= _T_1013 @[lsu_bus_buffer.scala 255:15] + inst rvclkhdr_1 of rvclkhdr_1 @[lib.scala 404:23] + rvclkhdr_1.clock <= clock + rvclkhdr_1.reset <= reset + rvclkhdr_1.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_1.io.en <= ibuf_wr_en @[lib.scala 407:17] + rvclkhdr_1.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_1014 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when ibuf_wr_en : @[Reg.scala 28:19] + _T_1014 <= ibuf_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ibuf_data <= _T_1014 @[lsu_bus_buffer.scala 256:13] + reg _T_1015 : UInt, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 257:55] + _T_1015 <= ibuf_timer_in @[lsu_bus_buffer.scala 257:55] + ibuf_timer <= _T_1015 @[lsu_bus_buffer.scala 257:14] + wire buf_numvld_wrcmd_any : UInt<4> + buf_numvld_wrcmd_any <= UInt<1>("h00") + wire buf_numvld_cmd_any : UInt<4> + buf_numvld_cmd_any <= UInt<1>("h00") + wire obuf_wr_timer : UInt<3> + obuf_wr_timer <= UInt<1>("h00") + wire buf_nomerge : UInt<1>[4] @[lsu_bus_buffer.scala 261:25] + buf_nomerge[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 262:15] + buf_nomerge[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 262:15] + buf_nomerge[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 262:15] + buf_nomerge[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 262:15] + wire buf_sideeffect : UInt<4> + buf_sideeffect <= UInt<1>("h00") + wire obuf_force_wr_en : UInt<1> + obuf_force_wr_en <= UInt<1>("h00") + wire obuf_wr_en : UInt<1> + obuf_wr_en <= UInt<1>("h00") + node _T_1016 = eq(buf_numvld_wrcmd_any, UInt<1>("h01")) @[lsu_bus_buffer.scala 267:43] + node _T_1017 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[lsu_bus_buffer.scala 267:72] + node _T_1018 = and(_T_1016, _T_1017) @[lsu_bus_buffer.scala 267:51] + node _T_1019 = neq(obuf_wr_timer, UInt<3>("h07")) @[lsu_bus_buffer.scala 267:97] + node _T_1020 = and(_T_1018, _T_1019) @[lsu_bus_buffer.scala 267:80] + node _T_1021 = eq(bus_coalescing_disable, UInt<1>("h00")) @[lsu_bus_buffer.scala 268:5] + node _T_1022 = and(_T_1020, _T_1021) @[lsu_bus_buffer.scala 267:114] + node _T_1023 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 268:114] + node _T_1024 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 268:114] + node _T_1025 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 268:114] + node _T_1026 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 268:114] + node _T_1027 = mux(_T_1023, buf_nomerge[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1028 = mux(_T_1024, buf_nomerge[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1029 = mux(_T_1025, buf_nomerge[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1030 = mux(_T_1026, buf_nomerge[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1031 = or(_T_1027, _T_1028) @[Mux.scala 27:72] + node _T_1032 = or(_T_1031, _T_1029) @[Mux.scala 27:72] + node _T_1033 = or(_T_1032, _T_1030) @[Mux.scala 27:72] + wire _T_1034 : UInt<1> @[Mux.scala 27:72] + _T_1034 <= _T_1033 @[Mux.scala 27:72] + node _T_1035 = eq(_T_1034, UInt<1>("h00")) @[lsu_bus_buffer.scala 268:31] + node _T_1036 = and(_T_1022, _T_1035) @[lsu_bus_buffer.scala 268:29] + node _T_1037 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 269:88] + node _T_1038 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 269:111] + node _T_1039 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 269:88] + node _T_1040 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 269:111] + node _T_1041 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 269:88] + node _T_1042 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 269:111] + node _T_1043 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 269:88] + node _T_1044 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 269:111] + node _T_1045 = mux(_T_1037, _T_1038, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1046 = mux(_T_1039, _T_1040, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1047 = mux(_T_1041, _T_1042, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1048 = mux(_T_1043, _T_1044, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1049 = or(_T_1045, _T_1046) @[Mux.scala 27:72] + node _T_1050 = or(_T_1049, _T_1047) @[Mux.scala 27:72] + node _T_1051 = or(_T_1050, _T_1048) @[Mux.scala 27:72] + wire _T_1052 : UInt<1> @[Mux.scala 27:72] + _T_1052 <= _T_1051 @[Mux.scala 27:72] + node _T_1053 = eq(_T_1052, UInt<1>("h00")) @[lsu_bus_buffer.scala 269:5] + node _T_1054 = and(_T_1036, _T_1053) @[lsu_bus_buffer.scala 268:140] + node _T_1055 = eq(obuf_force_wr_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 269:119] + node obuf_wr_wait = and(_T_1054, _T_1055) @[lsu_bus_buffer.scala 269:117] + node _T_1056 = orr(buf_numvld_cmd_any) @[lsu_bus_buffer.scala 270:75] + node _T_1057 = lt(obuf_wr_timer, UInt<3>("h07")) @[lsu_bus_buffer.scala 270:95] + node _T_1058 = and(_T_1056, _T_1057) @[lsu_bus_buffer.scala 270:79] + node _T_1059 = add(obuf_wr_timer, UInt<1>("h01")) @[lsu_bus_buffer.scala 270:123] + node _T_1060 = tail(_T_1059, 1) @[lsu_bus_buffer.scala 270:123] + node _T_1061 = mux(_T_1058, _T_1060, obuf_wr_timer) @[lsu_bus_buffer.scala 270:55] + node obuf_wr_timer_in = mux(obuf_wr_en, UInt<3>("h00"), _T_1061) @[lsu_bus_buffer.scala 270:29] + node _T_1062 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 271:41] + node _T_1063 = and(io.lsu_busreq_m, _T_1062) @[lsu_bus_buffer.scala 271:39] + node _T_1064 = eq(ibuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 271:60] + node _T_1065 = and(_T_1063, _T_1064) @[lsu_bus_buffer.scala 271:58] + node _T_1066 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[lsu_bus_buffer.scala 271:93] + node _T_1067 = and(_T_1065, _T_1066) @[lsu_bus_buffer.scala 271:72] + node _T_1068 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_buffer.scala 271:117] + node _T_1069 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 271:208] + node _T_1070 = bits(buf_addr[0], 31, 2) @[lsu_bus_buffer.scala 271:228] + node _T_1071 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 271:208] + node _T_1072 = bits(buf_addr[1], 31, 2) @[lsu_bus_buffer.scala 271:228] + node _T_1073 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 271:208] + node _T_1074 = bits(buf_addr[2], 31, 2) @[lsu_bus_buffer.scala 271:228] + node _T_1075 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 271:208] + node _T_1076 = bits(buf_addr[3], 31, 2) @[lsu_bus_buffer.scala 271:228] + node _T_1077 = mux(_T_1069, _T_1070, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1078 = mux(_T_1071, _T_1072, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1079 = mux(_T_1073, _T_1074, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1080 = mux(_T_1075, _T_1076, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1081 = or(_T_1077, _T_1078) @[Mux.scala 27:72] + node _T_1082 = or(_T_1081, _T_1079) @[Mux.scala 27:72] + node _T_1083 = or(_T_1082, _T_1080) @[Mux.scala 27:72] + wire _T_1084 : UInt<30> @[Mux.scala 27:72] + _T_1084 <= _T_1083 @[Mux.scala 27:72] + node _T_1085 = neq(_T_1068, _T_1084) @[lsu_bus_buffer.scala 271:123] + node _T_1086 = and(_T_1067, _T_1085) @[lsu_bus_buffer.scala 271:101] + obuf_force_wr_en <= _T_1086 @[lsu_bus_buffer.scala 271:20] + wire buf_numvld_pend_any : UInt<4> + buf_numvld_pend_any <= UInt<1>("h00") + node _T_1087 = eq(buf_numvld_pend_any, UInt<1>("h00")) @[lsu_bus_buffer.scala 273:53] + node _T_1088 = and(ibuf_byp, _T_1087) @[lsu_bus_buffer.scala 273:31] + node _T_1089 = eq(io.lsu_pkt_r.bits.store, UInt<1>("h00")) @[lsu_bus_buffer.scala 273:64] + node _T_1090 = or(_T_1089, io.no_dword_merge_r) @[lsu_bus_buffer.scala 273:89] + node ibuf_buf_byp = and(_T_1088, _T_1090) @[lsu_bus_buffer.scala 273:61] + wire bus_sideeffect_pend : UInt<1> + bus_sideeffect_pend <= UInt<1>("h00") + wire found_cmdptr0 : UInt<1> + found_cmdptr0 <= UInt<1>("h00") + wire buf_cmd_state_bus_en : UInt<1>[4] @[lsu_bus_buffer.scala 276:34] + buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 277:24] + buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 277:24] + buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 277:24] + buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 277:24] + wire buf_dual : UInt<1>[4] @[lsu_bus_buffer.scala 278:22] + buf_dual[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 279:12] + buf_dual[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 279:12] + buf_dual[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 279:12] + buf_dual[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 279:12] + wire buf_samedw : UInt<1>[4] @[lsu_bus_buffer.scala 280:24] + buf_samedw[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 281:14] + buf_samedw[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 281:14] + buf_samedw[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 281:14] + buf_samedw[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 281:14] + wire found_cmdptr1 : UInt<1> + found_cmdptr1 <= UInt<1>("h00") + wire bus_cmd_ready : UInt<1> + bus_cmd_ready <= UInt<1>("h00") + wire obuf_valid : UInt<1> + obuf_valid <= UInt<1>("h00") + wire obuf_nosend : UInt<1> + obuf_nosend <= UInt<1>("h00") + wire bus_addr_match_pending : UInt<1> + bus_addr_match_pending <= UInt<1>("h00") + node _T_1091 = and(ibuf_buf_byp, io.lsu_commit_r) @[lsu_bus_buffer.scala 289:32] + node _T_1092 = and(io.is_sideeffects_r, bus_sideeffect_pend) @[lsu_bus_buffer.scala 289:74] + node _T_1093 = eq(_T_1092, UInt<1>("h00")) @[lsu_bus_buffer.scala 289:52] + node _T_1094 = and(_T_1091, _T_1093) @[lsu_bus_buffer.scala 289:50] + node _T_1095 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1096 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1097 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1098 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1099 = mux(_T_1095, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1100 = mux(_T_1096, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1101 = mux(_T_1097, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1102 = mux(_T_1098, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1103 = or(_T_1099, _T_1100) @[Mux.scala 27:72] + node _T_1104 = or(_T_1103, _T_1101) @[Mux.scala 27:72] + node _T_1105 = or(_T_1104, _T_1102) @[Mux.scala 27:72] + wire _T_1106 : UInt<3> @[Mux.scala 27:72] + _T_1106 <= _T_1105 @[Mux.scala 27:72] + node _T_1107 = eq(_T_1106, UInt<3>("h02")) @[lsu_bus_buffer.scala 290:36] + node _T_1108 = and(_T_1107, found_cmdptr0) @[lsu_bus_buffer.scala 290:47] + node _T_1109 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58] + node _T_1110 = cat(_T_1109, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58] + node _T_1111 = cat(_T_1110, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58] + node _T_1112 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1113 = bits(_T_1111, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1114 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1115 = bits(_T_1111, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1116 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1117 = bits(_T_1111, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1118 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1119 = bits(_T_1111, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1120 = mux(_T_1112, _T_1113, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1121 = mux(_T_1114, _T_1115, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1122 = mux(_T_1116, _T_1117, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1123 = mux(_T_1118, _T_1119, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1124 = or(_T_1120, _T_1121) @[Mux.scala 27:72] + node _T_1125 = or(_T_1124, _T_1122) @[Mux.scala 27:72] + node _T_1126 = or(_T_1125, _T_1123) @[Mux.scala 27:72] + wire _T_1127 : UInt<1> @[Mux.scala 27:72] + _T_1127 <= _T_1126 @[Mux.scala 27:72] + node _T_1128 = eq(_T_1127, UInt<1>("h00")) @[lsu_bus_buffer.scala 291:23] + node _T_1129 = and(_T_1108, _T_1128) @[lsu_bus_buffer.scala 291:21] + node _T_1130 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1131 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1132 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1133 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1134 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1135 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1136 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1137 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1138 = mux(_T_1130, _T_1131, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1139 = mux(_T_1132, _T_1133, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1140 = mux(_T_1134, _T_1135, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1141 = mux(_T_1136, _T_1137, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1142 = or(_T_1138, _T_1139) @[Mux.scala 27:72] + node _T_1143 = or(_T_1142, _T_1140) @[Mux.scala 27:72] + node _T_1144 = or(_T_1143, _T_1141) @[Mux.scala 27:72] + wire _T_1145 : UInt<1> @[Mux.scala 27:72] + _T_1145 <= _T_1144 @[Mux.scala 27:72] + node _T_1146 = and(_T_1145, bus_sideeffect_pend) @[lsu_bus_buffer.scala 291:141] + node _T_1147 = eq(_T_1146, UInt<1>("h00")) @[lsu_bus_buffer.scala 291:105] + node _T_1148 = and(_T_1129, _T_1147) @[lsu_bus_buffer.scala 291:103] + node _T_1149 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_1150 = cat(_T_1149, buf_dual[1]) @[Cat.scala 29:58] + node _T_1151 = cat(_T_1150, buf_dual[0]) @[Cat.scala 29:58] + node _T_1152 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1153 = bits(_T_1151, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1154 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1155 = bits(_T_1151, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1156 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1157 = bits(_T_1151, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1158 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1159 = bits(_T_1151, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1160 = mux(_T_1152, _T_1153, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1161 = mux(_T_1154, _T_1155, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1162 = mux(_T_1156, _T_1157, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1163 = mux(_T_1158, _T_1159, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1164 = or(_T_1160, _T_1161) @[Mux.scala 27:72] + node _T_1165 = or(_T_1164, _T_1162) @[Mux.scala 27:72] + node _T_1166 = or(_T_1165, _T_1163) @[Mux.scala 27:72] + wire _T_1167 : UInt<1> @[Mux.scala 27:72] + _T_1167 <= _T_1166 @[Mux.scala 27:72] + node _T_1168 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58] + node _T_1169 = cat(_T_1168, buf_samedw[1]) @[Cat.scala 29:58] + node _T_1170 = cat(_T_1169, buf_samedw[0]) @[Cat.scala 29:58] + node _T_1171 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1172 = bits(_T_1170, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1173 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1174 = bits(_T_1170, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1175 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1176 = bits(_T_1170, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1177 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1178 = bits(_T_1170, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1179 = mux(_T_1171, _T_1172, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1180 = mux(_T_1173, _T_1174, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1181 = mux(_T_1175, _T_1176, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1182 = mux(_T_1177, _T_1178, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1183 = or(_T_1179, _T_1180) @[Mux.scala 27:72] + node _T_1184 = or(_T_1183, _T_1181) @[Mux.scala 27:72] + node _T_1185 = or(_T_1184, _T_1182) @[Mux.scala 27:72] + wire _T_1186 : UInt<1> @[Mux.scala 27:72] + _T_1186 <= _T_1185 @[Mux.scala 27:72] + node _T_1187 = and(_T_1167, _T_1186) @[lsu_bus_buffer.scala 292:77] + node _T_1188 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1189 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1190 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1191 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1192 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1193 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1194 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1195 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1196 = mux(_T_1188, _T_1189, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1197 = mux(_T_1190, _T_1191, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1198 = mux(_T_1192, _T_1193, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1199 = mux(_T_1194, _T_1195, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1200 = or(_T_1196, _T_1197) @[Mux.scala 27:72] + node _T_1201 = or(_T_1200, _T_1198) @[Mux.scala 27:72] + node _T_1202 = or(_T_1201, _T_1199) @[Mux.scala 27:72] + wire _T_1203 : UInt<1> @[Mux.scala 27:72] + _T_1203 <= _T_1202 @[Mux.scala 27:72] + node _T_1204 = eq(_T_1203, UInt<1>("h00")) @[lsu_bus_buffer.scala 292:150] + node _T_1205 = and(_T_1187, _T_1204) @[lsu_bus_buffer.scala 292:148] + node _T_1206 = eq(_T_1205, UInt<1>("h00")) @[lsu_bus_buffer.scala 292:8] + node _T_1207 = or(_T_1206, found_cmdptr1) @[lsu_bus_buffer.scala 292:181] + node _T_1208 = cat(buf_nomerge[3], buf_nomerge[2]) @[Cat.scala 29:58] + node _T_1209 = cat(_T_1208, buf_nomerge[1]) @[Cat.scala 29:58] + node _T_1210 = cat(_T_1209, buf_nomerge[0]) @[Cat.scala 29:58] + node _T_1211 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1212 = bits(_T_1210, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1213 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1214 = bits(_T_1210, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1215 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1216 = bits(_T_1210, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1217 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1218 = bits(_T_1210, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1219 = mux(_T_1211, _T_1212, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1220 = mux(_T_1213, _T_1214, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1221 = mux(_T_1215, _T_1216, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1222 = mux(_T_1217, _T_1218, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1223 = or(_T_1219, _T_1220) @[Mux.scala 27:72] + node _T_1224 = or(_T_1223, _T_1221) @[Mux.scala 27:72] + node _T_1225 = or(_T_1224, _T_1222) @[Mux.scala 27:72] + wire _T_1226 : UInt<1> @[Mux.scala 27:72] + _T_1226 <= _T_1225 @[Mux.scala 27:72] + node _T_1227 = or(_T_1207, _T_1226) @[lsu_bus_buffer.scala 292:197] + node _T_1228 = or(_T_1227, obuf_force_wr_en) @[lsu_bus_buffer.scala 292:269] + node _T_1229 = and(_T_1148, _T_1228) @[lsu_bus_buffer.scala 291:164] + node _T_1230 = or(_T_1094, _T_1229) @[lsu_bus_buffer.scala 289:98] + node _T_1231 = eq(obuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 293:48] + node _T_1232 = or(bus_cmd_ready, _T_1231) @[lsu_bus_buffer.scala 293:46] + node _T_1233 = or(_T_1232, obuf_nosend) @[lsu_bus_buffer.scala 293:60] + node _T_1234 = and(_T_1230, _T_1233) @[lsu_bus_buffer.scala 293:29] + node _T_1235 = eq(obuf_wr_wait, UInt<1>("h00")) @[lsu_bus_buffer.scala 293:77] + node _T_1236 = and(_T_1234, _T_1235) @[lsu_bus_buffer.scala 293:75] + node _T_1237 = eq(bus_addr_match_pending, UInt<1>("h00")) @[lsu_bus_buffer.scala 293:94] + node _T_1238 = and(_T_1236, _T_1237) @[lsu_bus_buffer.scala 293:92] + node _T_1239 = and(_T_1238, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 293:118] + obuf_wr_en <= _T_1239 @[lsu_bus_buffer.scala 289:14] + wire bus_cmd_sent : UInt<1> + bus_cmd_sent <= UInt<1>("h00") + node _T_1240 = and(obuf_valid, obuf_nosend) @[lsu_bus_buffer.scala 296:47] + node _T_1241 = or(bus_cmd_sent, _T_1240) @[lsu_bus_buffer.scala 296:33] + node _T_1242 = eq(obuf_wr_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 296:65] + node _T_1243 = and(_T_1241, _T_1242) @[lsu_bus_buffer.scala 296:63] + node _T_1244 = and(_T_1243, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 296:77] + node obuf_rst = or(_T_1244, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 296:98] + node _T_1245 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1246 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1247 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1248 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1249 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1250 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1251 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1252 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1253 = mux(_T_1245, _T_1246, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1254 = mux(_T_1247, _T_1248, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1255 = mux(_T_1249, _T_1250, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1256 = mux(_T_1251, _T_1252, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1257 = or(_T_1253, _T_1254) @[Mux.scala 27:72] + node _T_1258 = or(_T_1257, _T_1255) @[Mux.scala 27:72] + node _T_1259 = or(_T_1258, _T_1256) @[Mux.scala 27:72] + wire _T_1260 : UInt<1> @[Mux.scala 27:72] + _T_1260 <= _T_1259 @[Mux.scala 27:72] + node obuf_write_in = mux(ibuf_buf_byp, io.lsu_pkt_r.bits.store, _T_1260) @[lsu_bus_buffer.scala 297:26] + node _T_1261 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1262 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1263 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1264 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1265 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1266 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1267 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1268 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1269 = mux(_T_1261, _T_1262, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1270 = mux(_T_1263, _T_1264, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1271 = mux(_T_1265, _T_1266, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1272 = mux(_T_1267, _T_1268, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1273 = or(_T_1269, _T_1270) @[Mux.scala 27:72] + node _T_1274 = or(_T_1273, _T_1271) @[Mux.scala 27:72] + node _T_1275 = or(_T_1274, _T_1272) @[Mux.scala 27:72] + wire _T_1276 : UInt<1> @[Mux.scala 27:72] + _T_1276 <= _T_1275 @[Mux.scala 27:72] + node obuf_sideeffect_in = mux(ibuf_buf_byp, io.is_sideeffects_r, _T_1276) @[lsu_bus_buffer.scala 298:31] + node _T_1277 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1278 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1279 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1280 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1281 = mux(_T_1277, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1282 = mux(_T_1278, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1283 = mux(_T_1279, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1284 = mux(_T_1280, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1285 = or(_T_1281, _T_1282) @[Mux.scala 27:72] + node _T_1286 = or(_T_1285, _T_1283) @[Mux.scala 27:72] + node _T_1287 = or(_T_1286, _T_1284) @[Mux.scala 27:72] + wire _T_1288 : UInt<32> @[Mux.scala 27:72] + _T_1288 <= _T_1287 @[Mux.scala 27:72] + node obuf_addr_in = mux(ibuf_buf_byp, io.lsu_addr_r, _T_1288) @[lsu_bus_buffer.scala 299:25] + wire buf_sz : UInt<2>[4] @[lsu_bus_buffer.scala 300:20] + buf_sz[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 301:10] + buf_sz[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 301:10] + buf_sz[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 301:10] + buf_sz[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 301:10] + node _T_1289 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58] + node _T_1290 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1291 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1292 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1293 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1294 = mux(_T_1290, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1295 = mux(_T_1291, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1296 = mux(_T_1292, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1297 = mux(_T_1293, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1298 = or(_T_1294, _T_1295) @[Mux.scala 27:72] + node _T_1299 = or(_T_1298, _T_1296) @[Mux.scala 27:72] + node _T_1300 = or(_T_1299, _T_1297) @[Mux.scala 27:72] + wire _T_1301 : UInt<2> @[Mux.scala 27:72] + _T_1301 <= _T_1300 @[Mux.scala 27:72] + node obuf_sz_in = mux(ibuf_buf_byp, _T_1289, _T_1301) @[lsu_bus_buffer.scala 302:23] + wire obuf_merge_en : UInt<1> + obuf_merge_en <= UInt<1>("h00") + node obuf_tag0_in = mux(ibuf_buf_byp, WrPtr0_r, CmdPtr0) @[lsu_bus_buffer.scala 305:25] + node obuf_tag1_in = mux(ibuf_buf_byp, WrPtr1_r, CmdPtr1) @[lsu_bus_buffer.scala 307:25] + wire obuf_cmd_done : UInt<1> + obuf_cmd_done <= UInt<1>("h00") + wire bus_wcmd_sent : UInt<1> + bus_wcmd_sent <= UInt<1>("h00") + node _T_1302 = or(obuf_wr_en, obuf_rst) @[lsu_bus_buffer.scala 310:39] + node _T_1303 = eq(_T_1302, UInt<1>("h00")) @[lsu_bus_buffer.scala 310:26] + node _T_1304 = or(obuf_cmd_done, bus_wcmd_sent) @[lsu_bus_buffer.scala 310:68] + node obuf_cmd_done_in = and(_T_1303, _T_1304) @[lsu_bus_buffer.scala 310:51] + wire obuf_data_done : UInt<1> + obuf_data_done <= UInt<1>("h00") + wire bus_wdata_sent : UInt<1> + bus_wdata_sent <= UInt<1>("h00") + node _T_1305 = or(obuf_wr_en, obuf_rst) @[lsu_bus_buffer.scala 313:40] + node _T_1306 = eq(_T_1305, UInt<1>("h00")) @[lsu_bus_buffer.scala 313:27] + node _T_1307 = or(obuf_data_done, bus_wdata_sent) @[lsu_bus_buffer.scala 313:70] + node obuf_data_done_in = and(_T_1306, _T_1307) @[lsu_bus_buffer.scala 313:52] + node _T_1308 = bits(obuf_sz_in, 1, 0) @[lsu_bus_buffer.scala 314:67] + node _T_1309 = eq(_T_1308, UInt<1>("h00")) @[lsu_bus_buffer.scala 314:72] + node _T_1310 = bits(obuf_sz_in, 0, 0) @[lsu_bus_buffer.scala 314:92] + node _T_1311 = bits(obuf_addr_in, 0, 0) @[lsu_bus_buffer.scala 314:111] + node _T_1312 = eq(_T_1311, UInt<1>("h00")) @[lsu_bus_buffer.scala 314:98] + node _T_1313 = and(_T_1310, _T_1312) @[lsu_bus_buffer.scala 314:96] + node _T_1314 = or(_T_1309, _T_1313) @[lsu_bus_buffer.scala 314:79] + node _T_1315 = bits(obuf_sz_in, 1, 1) @[lsu_bus_buffer.scala 314:129] + node _T_1316 = bits(obuf_addr_in, 1, 0) @[lsu_bus_buffer.scala 314:147] + node _T_1317 = orr(_T_1316) @[lsu_bus_buffer.scala 314:153] + node _T_1318 = eq(_T_1317, UInt<1>("h00")) @[lsu_bus_buffer.scala 314:134] + node _T_1319 = and(_T_1315, _T_1318) @[lsu_bus_buffer.scala 314:132] + node _T_1320 = or(_T_1314, _T_1319) @[lsu_bus_buffer.scala 314:116] + node obuf_aligned_in = mux(ibuf_buf_byp, is_aligned_r, _T_1320) @[lsu_bus_buffer.scala 314:28] + wire obuf_nosend_in : UInt<1> + obuf_nosend_in <= UInt<1>("h00") + wire obuf_rdrsp_pend : UInt<1> + obuf_rdrsp_pend <= UInt<1>("h00") + wire bus_rsp_read : UInt<1> + bus_rsp_read <= UInt<1>("h00") + wire bus_rsp_read_tag : UInt<3> + bus_rsp_read_tag <= UInt<1>("h00") + wire obuf_rdrsp_tag : UInt<3> + obuf_rdrsp_tag <= UInt<1>("h00") + wire obuf_write : UInt<1> + obuf_write <= UInt<1>("h00") + node _T_1321 = eq(obuf_nosend_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 322:45] + node _T_1322 = and(obuf_wr_en, _T_1321) @[lsu_bus_buffer.scala 322:43] + node _T_1323 = eq(_T_1322, UInt<1>("h00")) @[lsu_bus_buffer.scala 322:30] + node _T_1324 = and(_T_1323, obuf_rdrsp_pend) @[lsu_bus_buffer.scala 322:62] + node _T_1325 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 322:117] + node _T_1326 = and(bus_rsp_read, _T_1325) @[lsu_bus_buffer.scala 322:97] + node _T_1327 = eq(_T_1326, UInt<1>("h00")) @[lsu_bus_buffer.scala 322:82] + node _T_1328 = and(_T_1324, _T_1327) @[lsu_bus_buffer.scala 322:80] + node _T_1329 = eq(obuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 322:157] + node _T_1330 = and(bus_cmd_sent, _T_1329) @[lsu_bus_buffer.scala 322:155] + node _T_1331 = or(_T_1328, _T_1330) @[lsu_bus_buffer.scala 322:139] + node _T_1332 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 322:173] + node obuf_rdrsp_pend_in = and(_T_1331, _T_1332) @[lsu_bus_buffer.scala 322:171] + node obuf_rdrsp_pend_en = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 323:47] + wire obuf_tag0 : UInt<3> + obuf_tag0 <= UInt<1>("h00") + node _T_1333 = eq(obuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 325:46] + node _T_1334 = and(bus_cmd_sent, _T_1333) @[lsu_bus_buffer.scala 325:44] + node obuf_rdrsp_tag_in = mux(_T_1334, obuf_tag0, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 325:30] + wire obuf_addr : UInt<32> + obuf_addr <= UInt<1>("h00") + wire obuf_sideeffect : UInt<1> + obuf_sideeffect <= UInt<1>("h00") + node _T_1335 = bits(obuf_addr_in, 31, 3) @[lsu_bus_buffer.scala 328:34] + node _T_1336 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 328:52] + node _T_1337 = eq(_T_1335, _T_1336) @[lsu_bus_buffer.scala 328:40] + node _T_1338 = and(_T_1337, obuf_aligned_in) @[lsu_bus_buffer.scala 328:60] + node _T_1339 = eq(obuf_sideeffect, UInt<1>("h00")) @[lsu_bus_buffer.scala 328:80] + node _T_1340 = and(_T_1338, _T_1339) @[lsu_bus_buffer.scala 328:78] + node _T_1341 = eq(obuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 328:99] + node _T_1342 = and(_T_1340, _T_1341) @[lsu_bus_buffer.scala 328:97] + node _T_1343 = eq(obuf_write_in, UInt<1>("h00")) @[lsu_bus_buffer.scala 328:113] + node _T_1344 = and(_T_1342, _T_1343) @[lsu_bus_buffer.scala 328:111] + node _T_1345 = eq(io.tlu_busbuff.dec_tlu_external_ldfwd_disable, UInt<1>("h00")) @[lsu_bus_buffer.scala 328:130] + node _T_1346 = and(_T_1344, _T_1345) @[lsu_bus_buffer.scala 328:128] + node _T_1347 = eq(obuf_nosend, UInt<1>("h00")) @[lsu_bus_buffer.scala 329:20] + node _T_1348 = and(obuf_valid, _T_1347) @[lsu_bus_buffer.scala 329:18] + node _T_1349 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 329:90] + node _T_1350 = and(bus_rsp_read, _T_1349) @[lsu_bus_buffer.scala 329:70] + node _T_1351 = eq(_T_1350, UInt<1>("h00")) @[lsu_bus_buffer.scala 329:55] + node _T_1352 = and(obuf_rdrsp_pend, _T_1351) @[lsu_bus_buffer.scala 329:53] + node _T_1353 = or(_T_1348, _T_1352) @[lsu_bus_buffer.scala 329:34] + node _T_1354 = and(_T_1346, _T_1353) @[lsu_bus_buffer.scala 328:177] + obuf_nosend_in <= _T_1354 @[lsu_bus_buffer.scala 328:18] + node _T_1355 = bits(io.lsu_addr_r, 2, 2) @[lsu_bus_buffer.scala 330:60] + node _T_1356 = cat(ldst_byteen_lo_r, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1357 = cat(UInt<4>("h00"), ldst_byteen_lo_r) @[Cat.scala 29:58] + node _T_1358 = mux(_T_1355, _T_1356, _T_1357) @[lsu_bus_buffer.scala 330:46] + node _T_1359 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1360 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1361 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1362 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1363 = mux(_T_1359, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1364 = mux(_T_1360, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1365 = mux(_T_1361, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1366 = mux(_T_1362, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1367 = or(_T_1363, _T_1364) @[Mux.scala 27:72] + node _T_1368 = or(_T_1367, _T_1365) @[Mux.scala 27:72] + node _T_1369 = or(_T_1368, _T_1366) @[Mux.scala 27:72] + wire _T_1370 : UInt<32> @[Mux.scala 27:72] + _T_1370 <= _T_1369 @[Mux.scala 27:72] + node _T_1371 = bits(_T_1370, 2, 2) @[lsu_bus_buffer.scala 331:36] + node _T_1372 = bits(_T_1371, 0, 0) @[lsu_bus_buffer.scala 331:46] + node _T_1373 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1374 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1375 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1376 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1377 = mux(_T_1373, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1378 = mux(_T_1374, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1379 = mux(_T_1375, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1380 = mux(_T_1376, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1381 = or(_T_1377, _T_1378) @[Mux.scala 27:72] + node _T_1382 = or(_T_1381, _T_1379) @[Mux.scala 27:72] + node _T_1383 = or(_T_1382, _T_1380) @[Mux.scala 27:72] + wire _T_1384 : UInt<4> @[Mux.scala 27:72] + _T_1384 <= _T_1383 @[Mux.scala 27:72] + node _T_1385 = cat(_T_1384, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1386 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1387 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1388 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1389 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1390 = mux(_T_1386, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1391 = mux(_T_1387, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1392 = mux(_T_1388, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1393 = mux(_T_1389, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1394 = or(_T_1390, _T_1391) @[Mux.scala 27:72] + node _T_1395 = or(_T_1394, _T_1392) @[Mux.scala 27:72] + node _T_1396 = or(_T_1395, _T_1393) @[Mux.scala 27:72] + wire _T_1397 : UInt<4> @[Mux.scala 27:72] + _T_1397 <= _T_1396 @[Mux.scala 27:72] + node _T_1398 = cat(UInt<4>("h00"), _T_1397) @[Cat.scala 29:58] + node _T_1399 = mux(_T_1372, _T_1385, _T_1398) @[lsu_bus_buffer.scala 331:8] + node obuf_byteen0_in = mux(ibuf_buf_byp, _T_1358, _T_1399) @[lsu_bus_buffer.scala 330:28] + node _T_1400 = bits(io.end_addr_r, 2, 2) @[lsu_bus_buffer.scala 332:60] + node _T_1401 = cat(ldst_byteen_hi_r, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1402 = cat(UInt<4>("h00"), ldst_byteen_hi_r) @[Cat.scala 29:58] + node _T_1403 = mux(_T_1400, _T_1401, _T_1402) @[lsu_bus_buffer.scala 332:46] + node _T_1404 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1405 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1406 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1407 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1408 = mux(_T_1404, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1409 = mux(_T_1405, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1410 = mux(_T_1406, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1411 = mux(_T_1407, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1412 = or(_T_1408, _T_1409) @[Mux.scala 27:72] + node _T_1413 = or(_T_1412, _T_1410) @[Mux.scala 27:72] + node _T_1414 = or(_T_1413, _T_1411) @[Mux.scala 27:72] + wire _T_1415 : UInt<32> @[Mux.scala 27:72] + _T_1415 <= _T_1414 @[Mux.scala 27:72] + node _T_1416 = bits(_T_1415, 2, 2) @[lsu_bus_buffer.scala 333:36] + node _T_1417 = bits(_T_1416, 0, 0) @[lsu_bus_buffer.scala 333:46] + node _T_1418 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1419 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1420 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1421 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1422 = mux(_T_1418, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1423 = mux(_T_1419, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1424 = mux(_T_1420, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1425 = mux(_T_1421, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1426 = or(_T_1422, _T_1423) @[Mux.scala 27:72] + node _T_1427 = or(_T_1426, _T_1424) @[Mux.scala 27:72] + node _T_1428 = or(_T_1427, _T_1425) @[Mux.scala 27:72] + wire _T_1429 : UInt<4> @[Mux.scala 27:72] + _T_1429 <= _T_1428 @[Mux.scala 27:72] + node _T_1430 = cat(_T_1429, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_1431 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1432 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1433 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1434 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1435 = mux(_T_1431, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1436 = mux(_T_1432, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1437 = mux(_T_1433, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1438 = mux(_T_1434, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1439 = or(_T_1435, _T_1436) @[Mux.scala 27:72] + node _T_1440 = or(_T_1439, _T_1437) @[Mux.scala 27:72] + node _T_1441 = or(_T_1440, _T_1438) @[Mux.scala 27:72] + wire _T_1442 : UInt<4> @[Mux.scala 27:72] + _T_1442 <= _T_1441 @[Mux.scala 27:72] + node _T_1443 = cat(UInt<4>("h00"), _T_1442) @[Cat.scala 29:58] + node _T_1444 = mux(_T_1417, _T_1430, _T_1443) @[lsu_bus_buffer.scala 333:8] + node obuf_byteen1_in = mux(ibuf_buf_byp, _T_1403, _T_1444) @[lsu_bus_buffer.scala 332:28] + node _T_1445 = bits(io.lsu_addr_r, 2, 2) @[lsu_bus_buffer.scala 335:58] + node _T_1446 = cat(store_data_lo_r, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1447 = cat(UInt<32>("h00"), store_data_lo_r) @[Cat.scala 29:58] + node _T_1448 = mux(_T_1445, _T_1446, _T_1447) @[lsu_bus_buffer.scala 335:44] + node _T_1449 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1450 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1451 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1452 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1453 = mux(_T_1449, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1454 = mux(_T_1450, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1455 = mux(_T_1451, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1456 = mux(_T_1452, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1457 = or(_T_1453, _T_1454) @[Mux.scala 27:72] + node _T_1458 = or(_T_1457, _T_1455) @[Mux.scala 27:72] + node _T_1459 = or(_T_1458, _T_1456) @[Mux.scala 27:72] + wire _T_1460 : UInt<32> @[Mux.scala 27:72] + _T_1460 <= _T_1459 @[Mux.scala 27:72] + node _T_1461 = bits(_T_1460, 2, 2) @[lsu_bus_buffer.scala 336:36] + node _T_1462 = bits(_T_1461, 0, 0) @[lsu_bus_buffer.scala 336:46] + node _T_1463 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1464 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1465 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1466 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1467 = mux(_T_1463, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1468 = mux(_T_1464, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1469 = mux(_T_1465, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1470 = mux(_T_1466, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1471 = or(_T_1467, _T_1468) @[Mux.scala 27:72] + node _T_1472 = or(_T_1471, _T_1469) @[Mux.scala 27:72] + node _T_1473 = or(_T_1472, _T_1470) @[Mux.scala 27:72] + wire _T_1474 : UInt<32> @[Mux.scala 27:72] + _T_1474 <= _T_1473 @[Mux.scala 27:72] + node _T_1475 = cat(_T_1474, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1476 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1477 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1478 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1479 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1480 = mux(_T_1476, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1481 = mux(_T_1477, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1482 = mux(_T_1478, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1483 = mux(_T_1479, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1484 = or(_T_1480, _T_1481) @[Mux.scala 27:72] + node _T_1485 = or(_T_1484, _T_1482) @[Mux.scala 27:72] + node _T_1486 = or(_T_1485, _T_1483) @[Mux.scala 27:72] + wire _T_1487 : UInt<32> @[Mux.scala 27:72] + _T_1487 <= _T_1486 @[Mux.scala 27:72] + node _T_1488 = cat(UInt<32>("h00"), _T_1487) @[Cat.scala 29:58] + node _T_1489 = mux(_T_1462, _T_1475, _T_1488) @[lsu_bus_buffer.scala 336:8] + node obuf_data0_in = mux(ibuf_buf_byp, _T_1448, _T_1489) @[lsu_bus_buffer.scala 335:26] + node _T_1490 = bits(io.end_addr_r, 2, 2) @[lsu_bus_buffer.scala 337:58] + node _T_1491 = cat(store_data_hi_r, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1492 = cat(UInt<32>("h00"), store_data_hi_r) @[Cat.scala 29:58] + node _T_1493 = mux(_T_1490, _T_1491, _T_1492) @[lsu_bus_buffer.scala 337:44] + node _T_1494 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1495 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1496 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1497 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1498 = mux(_T_1494, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1499 = mux(_T_1495, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1500 = mux(_T_1496, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1501 = mux(_T_1497, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1502 = or(_T_1498, _T_1499) @[Mux.scala 27:72] + node _T_1503 = or(_T_1502, _T_1500) @[Mux.scala 27:72] + node _T_1504 = or(_T_1503, _T_1501) @[Mux.scala 27:72] + wire _T_1505 : UInt<32> @[Mux.scala 27:72] + _T_1505 <= _T_1504 @[Mux.scala 27:72] + node _T_1506 = bits(_T_1505, 2, 2) @[lsu_bus_buffer.scala 338:36] + node _T_1507 = bits(_T_1506, 0, 0) @[lsu_bus_buffer.scala 338:46] + node _T_1508 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1509 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1510 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1511 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1512 = mux(_T_1508, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1513 = mux(_T_1509, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1514 = mux(_T_1510, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1515 = mux(_T_1511, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1516 = or(_T_1512, _T_1513) @[Mux.scala 27:72] + node _T_1517 = or(_T_1516, _T_1514) @[Mux.scala 27:72] + node _T_1518 = or(_T_1517, _T_1515) @[Mux.scala 27:72] + wire _T_1519 : UInt<32> @[Mux.scala 27:72] + _T_1519 <= _T_1518 @[Mux.scala 27:72] + node _T_1520 = cat(_T_1519, UInt<32>("h00")) @[Cat.scala 29:58] + node _T_1521 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1522 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1523 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1524 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1525 = mux(_T_1521, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1526 = mux(_T_1522, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1527 = mux(_T_1523, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1528 = mux(_T_1524, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1529 = or(_T_1525, _T_1526) @[Mux.scala 27:72] + node _T_1530 = or(_T_1529, _T_1527) @[Mux.scala 27:72] + node _T_1531 = or(_T_1530, _T_1528) @[Mux.scala 27:72] + wire _T_1532 : UInt<32> @[Mux.scala 27:72] + _T_1532 <= _T_1531 @[Mux.scala 27:72] + node _T_1533 = cat(UInt<32>("h00"), _T_1532) @[Cat.scala 29:58] + node _T_1534 = mux(_T_1507, _T_1520, _T_1533) @[lsu_bus_buffer.scala 338:8] + node obuf_data1_in = mux(ibuf_buf_byp, _T_1493, _T_1534) @[lsu_bus_buffer.scala 337:26] + node _T_1535 = bits(obuf_byteen0_in, 0, 0) @[lsu_bus_buffer.scala 339:59] + node _T_1536 = bits(obuf_byteen1_in, 0, 0) @[lsu_bus_buffer.scala 339:97] + node _T_1537 = and(obuf_merge_en, _T_1536) @[lsu_bus_buffer.scala 339:80] + node _T_1538 = or(_T_1535, _T_1537) @[lsu_bus_buffer.scala 339:63] + node _T_1539 = bits(obuf_byteen0_in, 1, 1) @[lsu_bus_buffer.scala 339:59] + node _T_1540 = bits(obuf_byteen1_in, 1, 1) @[lsu_bus_buffer.scala 339:97] + node _T_1541 = and(obuf_merge_en, _T_1540) @[lsu_bus_buffer.scala 339:80] + node _T_1542 = or(_T_1539, _T_1541) @[lsu_bus_buffer.scala 339:63] + node _T_1543 = bits(obuf_byteen0_in, 2, 2) @[lsu_bus_buffer.scala 339:59] + node _T_1544 = bits(obuf_byteen1_in, 2, 2) @[lsu_bus_buffer.scala 339:97] + node _T_1545 = and(obuf_merge_en, _T_1544) @[lsu_bus_buffer.scala 339:80] + node _T_1546 = or(_T_1543, _T_1545) @[lsu_bus_buffer.scala 339:63] + node _T_1547 = bits(obuf_byteen0_in, 3, 3) @[lsu_bus_buffer.scala 339:59] + node _T_1548 = bits(obuf_byteen1_in, 3, 3) @[lsu_bus_buffer.scala 339:97] + node _T_1549 = and(obuf_merge_en, _T_1548) @[lsu_bus_buffer.scala 339:80] + node _T_1550 = or(_T_1547, _T_1549) @[lsu_bus_buffer.scala 339:63] + node _T_1551 = bits(obuf_byteen0_in, 4, 4) @[lsu_bus_buffer.scala 339:59] + node _T_1552 = bits(obuf_byteen1_in, 4, 4) @[lsu_bus_buffer.scala 339:97] + node _T_1553 = and(obuf_merge_en, _T_1552) @[lsu_bus_buffer.scala 339:80] + node _T_1554 = or(_T_1551, _T_1553) @[lsu_bus_buffer.scala 339:63] + node _T_1555 = bits(obuf_byteen0_in, 5, 5) @[lsu_bus_buffer.scala 339:59] + node _T_1556 = bits(obuf_byteen1_in, 5, 5) @[lsu_bus_buffer.scala 339:97] + node _T_1557 = and(obuf_merge_en, _T_1556) @[lsu_bus_buffer.scala 339:80] + node _T_1558 = or(_T_1555, _T_1557) @[lsu_bus_buffer.scala 339:63] + node _T_1559 = bits(obuf_byteen0_in, 6, 6) @[lsu_bus_buffer.scala 339:59] + node _T_1560 = bits(obuf_byteen1_in, 6, 6) @[lsu_bus_buffer.scala 339:97] + node _T_1561 = and(obuf_merge_en, _T_1560) @[lsu_bus_buffer.scala 339:80] + node _T_1562 = or(_T_1559, _T_1561) @[lsu_bus_buffer.scala 339:63] + node _T_1563 = bits(obuf_byteen0_in, 7, 7) @[lsu_bus_buffer.scala 339:59] + node _T_1564 = bits(obuf_byteen1_in, 7, 7) @[lsu_bus_buffer.scala 339:97] + node _T_1565 = and(obuf_merge_en, _T_1564) @[lsu_bus_buffer.scala 339:80] + node _T_1566 = or(_T_1563, _T_1565) @[lsu_bus_buffer.scala 339:63] + node _T_1567 = cat(_T_1566, _T_1562) @[Cat.scala 29:58] + node _T_1568 = cat(_T_1567, _T_1558) @[Cat.scala 29:58] + node _T_1569 = cat(_T_1568, _T_1554) @[Cat.scala 29:58] + node _T_1570 = cat(_T_1569, _T_1550) @[Cat.scala 29:58] + node _T_1571 = cat(_T_1570, _T_1546) @[Cat.scala 29:58] + node _T_1572 = cat(_T_1571, _T_1542) @[Cat.scala 29:58] + node obuf_byteen_in = cat(_T_1572, _T_1538) @[Cat.scala 29:58] + node _T_1573 = bits(obuf_byteen1_in, 0, 0) @[lsu_bus_buffer.scala 340:76] + node _T_1574 = and(obuf_merge_en, _T_1573) @[lsu_bus_buffer.scala 340:59] + node _T_1575 = bits(obuf_data1_in, 7, 0) @[lsu_bus_buffer.scala 340:94] + node _T_1576 = bits(obuf_data0_in, 7, 0) @[lsu_bus_buffer.scala 340:123] + node _T_1577 = mux(_T_1574, _T_1575, _T_1576) @[lsu_bus_buffer.scala 340:44] + node _T_1578 = bits(obuf_byteen1_in, 1, 1) @[lsu_bus_buffer.scala 340:76] + node _T_1579 = and(obuf_merge_en, _T_1578) @[lsu_bus_buffer.scala 340:59] + node _T_1580 = bits(obuf_data1_in, 15, 8) @[lsu_bus_buffer.scala 340:94] + node _T_1581 = bits(obuf_data0_in, 15, 8) @[lsu_bus_buffer.scala 340:123] + node _T_1582 = mux(_T_1579, _T_1580, _T_1581) @[lsu_bus_buffer.scala 340:44] + node _T_1583 = bits(obuf_byteen1_in, 2, 2) @[lsu_bus_buffer.scala 340:76] + node _T_1584 = and(obuf_merge_en, _T_1583) @[lsu_bus_buffer.scala 340:59] + node _T_1585 = bits(obuf_data1_in, 23, 16) @[lsu_bus_buffer.scala 340:94] + node _T_1586 = bits(obuf_data0_in, 23, 16) @[lsu_bus_buffer.scala 340:123] + node _T_1587 = mux(_T_1584, _T_1585, _T_1586) @[lsu_bus_buffer.scala 340:44] + node _T_1588 = bits(obuf_byteen1_in, 3, 3) @[lsu_bus_buffer.scala 340:76] + node _T_1589 = and(obuf_merge_en, _T_1588) @[lsu_bus_buffer.scala 340:59] + node _T_1590 = bits(obuf_data1_in, 31, 24) @[lsu_bus_buffer.scala 340:94] + node _T_1591 = bits(obuf_data0_in, 31, 24) @[lsu_bus_buffer.scala 340:123] + node _T_1592 = mux(_T_1589, _T_1590, _T_1591) @[lsu_bus_buffer.scala 340:44] + node _T_1593 = bits(obuf_byteen1_in, 4, 4) @[lsu_bus_buffer.scala 340:76] + node _T_1594 = and(obuf_merge_en, _T_1593) @[lsu_bus_buffer.scala 340:59] + node _T_1595 = bits(obuf_data1_in, 39, 32) @[lsu_bus_buffer.scala 340:94] + node _T_1596 = bits(obuf_data0_in, 39, 32) @[lsu_bus_buffer.scala 340:123] + node _T_1597 = mux(_T_1594, _T_1595, _T_1596) @[lsu_bus_buffer.scala 340:44] + node _T_1598 = bits(obuf_byteen1_in, 5, 5) @[lsu_bus_buffer.scala 340:76] + node _T_1599 = and(obuf_merge_en, _T_1598) @[lsu_bus_buffer.scala 340:59] + node _T_1600 = bits(obuf_data1_in, 47, 40) @[lsu_bus_buffer.scala 340:94] + node _T_1601 = bits(obuf_data0_in, 47, 40) @[lsu_bus_buffer.scala 340:123] + node _T_1602 = mux(_T_1599, _T_1600, _T_1601) @[lsu_bus_buffer.scala 340:44] + node _T_1603 = bits(obuf_byteen1_in, 6, 6) @[lsu_bus_buffer.scala 340:76] + node _T_1604 = and(obuf_merge_en, _T_1603) @[lsu_bus_buffer.scala 340:59] + node _T_1605 = bits(obuf_data1_in, 55, 48) @[lsu_bus_buffer.scala 340:94] + node _T_1606 = bits(obuf_data0_in, 55, 48) @[lsu_bus_buffer.scala 340:123] + node _T_1607 = mux(_T_1604, _T_1605, _T_1606) @[lsu_bus_buffer.scala 340:44] + node _T_1608 = bits(obuf_byteen1_in, 7, 7) @[lsu_bus_buffer.scala 340:76] + node _T_1609 = and(obuf_merge_en, _T_1608) @[lsu_bus_buffer.scala 340:59] + node _T_1610 = bits(obuf_data1_in, 63, 56) @[lsu_bus_buffer.scala 340:94] + node _T_1611 = bits(obuf_data0_in, 63, 56) @[lsu_bus_buffer.scala 340:123] + node _T_1612 = mux(_T_1609, _T_1610, _T_1611) @[lsu_bus_buffer.scala 340:44] + node _T_1613 = cat(_T_1612, _T_1607) @[Cat.scala 29:58] + node _T_1614 = cat(_T_1613, _T_1602) @[Cat.scala 29:58] + node _T_1615 = cat(_T_1614, _T_1597) @[Cat.scala 29:58] + node _T_1616 = cat(_T_1615, _T_1592) @[Cat.scala 29:58] + node _T_1617 = cat(_T_1616, _T_1587) @[Cat.scala 29:58] + node _T_1618 = cat(_T_1617, _T_1582) @[Cat.scala 29:58] + node obuf_data_in = cat(_T_1618, _T_1577) @[Cat.scala 29:58] + wire buf_dualhi : UInt<1>[4] @[lsu_bus_buffer.scala 342:24] + buf_dualhi[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 343:14] + buf_dualhi[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 343:14] + buf_dualhi[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 343:14] + buf_dualhi[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 343:14] + node _T_1619 = neq(CmdPtr0, CmdPtr1) @[lsu_bus_buffer.scala 344:30] + node _T_1620 = and(_T_1619, found_cmdptr0) @[lsu_bus_buffer.scala 344:43] + node _T_1621 = and(_T_1620, found_cmdptr1) @[lsu_bus_buffer.scala 344:59] + node _T_1622 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1623 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1624 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1625 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1626 = mux(_T_1622, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1627 = mux(_T_1623, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1628 = mux(_T_1624, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1629 = mux(_T_1625, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1630 = or(_T_1626, _T_1627) @[Mux.scala 27:72] + node _T_1631 = or(_T_1630, _T_1628) @[Mux.scala 27:72] + node _T_1632 = or(_T_1631, _T_1629) @[Mux.scala 27:72] + wire _T_1633 : UInt<3> @[Mux.scala 27:72] + _T_1633 <= _T_1632 @[Mux.scala 27:72] + node _T_1634 = eq(_T_1633, UInt<3>("h02")) @[lsu_bus_buffer.scala 344:107] + node _T_1635 = and(_T_1621, _T_1634) @[lsu_bus_buffer.scala 344:75] + node _T_1636 = eq(CmdPtr1, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_1637 = eq(CmdPtr1, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_1638 = eq(CmdPtr1, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_1639 = eq(CmdPtr1, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_1640 = mux(_T_1636, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1641 = mux(_T_1637, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1642 = mux(_T_1638, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1643 = mux(_T_1639, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1644 = or(_T_1640, _T_1641) @[Mux.scala 27:72] + node _T_1645 = or(_T_1644, _T_1642) @[Mux.scala 27:72] + node _T_1646 = or(_T_1645, _T_1643) @[Mux.scala 27:72] + wire _T_1647 : UInt<3> @[Mux.scala 27:72] + _T_1647 <= _T_1646 @[Mux.scala 27:72] + node _T_1648 = eq(_T_1647, UInt<3>("h02")) @[lsu_bus_buffer.scala 344:150] + node _T_1649 = and(_T_1635, _T_1648) @[lsu_bus_buffer.scala 344:118] + node _T_1650 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58] + node _T_1651 = cat(_T_1650, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58] + node _T_1652 = cat(_T_1651, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58] + node _T_1653 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1654 = bits(_T_1652, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1655 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1656 = bits(_T_1652, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1657 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1658 = bits(_T_1652, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1659 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1660 = bits(_T_1652, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1661 = mux(_T_1653, _T_1654, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1662 = mux(_T_1655, _T_1656, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1663 = mux(_T_1657, _T_1658, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1664 = mux(_T_1659, _T_1660, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1665 = or(_T_1661, _T_1662) @[Mux.scala 27:72] + node _T_1666 = or(_T_1665, _T_1663) @[Mux.scala 27:72] + node _T_1667 = or(_T_1666, _T_1664) @[Mux.scala 27:72] + wire _T_1668 : UInt<1> @[Mux.scala 27:72] + _T_1668 <= _T_1667 @[Mux.scala 27:72] + node _T_1669 = eq(_T_1668, UInt<1>("h00")) @[lsu_bus_buffer.scala 345:5] + node _T_1670 = and(_T_1649, _T_1669) @[lsu_bus_buffer.scala 344:161] + node _T_1671 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1672 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1673 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1674 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1675 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1676 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1677 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1678 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1679 = mux(_T_1671, _T_1672, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1680 = mux(_T_1673, _T_1674, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1681 = mux(_T_1675, _T_1676, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1682 = mux(_T_1677, _T_1678, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1683 = or(_T_1679, _T_1680) @[Mux.scala 27:72] + node _T_1684 = or(_T_1683, _T_1681) @[Mux.scala 27:72] + node _T_1685 = or(_T_1684, _T_1682) @[Mux.scala 27:72] + wire _T_1686 : UInt<1> @[Mux.scala 27:72] + _T_1686 <= _T_1685 @[Mux.scala 27:72] + node _T_1687 = eq(_T_1686, UInt<1>("h00")) @[lsu_bus_buffer.scala 345:87] + node _T_1688 = and(_T_1670, _T_1687) @[lsu_bus_buffer.scala 345:85] + node _T_1689 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1690 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1691 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1692 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1693 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1694 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1695 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1696 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1697 = mux(_T_1689, _T_1690, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1698 = mux(_T_1691, _T_1692, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1699 = mux(_T_1693, _T_1694, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1700 = mux(_T_1695, _T_1696, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1701 = or(_T_1697, _T_1698) @[Mux.scala 27:72] + node _T_1702 = or(_T_1701, _T_1699) @[Mux.scala 27:72] + node _T_1703 = or(_T_1702, _T_1700) @[Mux.scala 27:72] + wire _T_1704 : UInt<1> @[Mux.scala 27:72] + _T_1704 <= _T_1703 @[Mux.scala 27:72] + node _T_1705 = eq(_T_1704, UInt<1>("h00")) @[lsu_bus_buffer.scala 346:6] + node _T_1706 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_1707 = cat(_T_1706, buf_dual[1]) @[Cat.scala 29:58] + node _T_1708 = cat(_T_1707, buf_dual[0]) @[Cat.scala 29:58] + node _T_1709 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1710 = bits(_T_1708, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1711 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1712 = bits(_T_1708, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1713 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1714 = bits(_T_1708, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1715 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1716 = bits(_T_1708, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1717 = mux(_T_1709, _T_1710, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1718 = mux(_T_1711, _T_1712, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1719 = mux(_T_1713, _T_1714, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1720 = mux(_T_1715, _T_1716, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1721 = or(_T_1717, _T_1718) @[Mux.scala 27:72] + node _T_1722 = or(_T_1721, _T_1719) @[Mux.scala 27:72] + node _T_1723 = or(_T_1722, _T_1720) @[Mux.scala 27:72] + wire _T_1724 : UInt<1> @[Mux.scala 27:72] + _T_1724 <= _T_1723 @[Mux.scala 27:72] + node _T_1725 = and(_T_1705, _T_1724) @[lsu_bus_buffer.scala 346:36] + node _T_1726 = cat(buf_dualhi[3], buf_dualhi[2]) @[Cat.scala 29:58] + node _T_1727 = cat(_T_1726, buf_dualhi[1]) @[Cat.scala 29:58] + node _T_1728 = cat(_T_1727, buf_dualhi[0]) @[Cat.scala 29:58] + node _T_1729 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1730 = bits(_T_1728, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1731 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1732 = bits(_T_1728, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1733 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1734 = bits(_T_1728, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1735 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1736 = bits(_T_1728, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1737 = mux(_T_1729, _T_1730, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1738 = mux(_T_1731, _T_1732, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1739 = mux(_T_1733, _T_1734, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1740 = mux(_T_1735, _T_1736, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1741 = or(_T_1737, _T_1738) @[Mux.scala 27:72] + node _T_1742 = or(_T_1741, _T_1739) @[Mux.scala 27:72] + node _T_1743 = or(_T_1742, _T_1740) @[Mux.scala 27:72] + wire _T_1744 : UInt<1> @[Mux.scala 27:72] + _T_1744 <= _T_1743 @[Mux.scala 27:72] + node _T_1745 = eq(_T_1744, UInt<1>("h00")) @[lsu_bus_buffer.scala 346:107] + node _T_1746 = and(_T_1725, _T_1745) @[lsu_bus_buffer.scala 346:105] + node _T_1747 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58] + node _T_1748 = cat(_T_1747, buf_samedw[1]) @[Cat.scala 29:58] + node _T_1749 = cat(_T_1748, buf_samedw[0]) @[Cat.scala 29:58] + node _T_1750 = eq(CmdPtr0, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_1751 = bits(_T_1749, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_1752 = eq(CmdPtr0, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_1753 = bits(_T_1749, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_1754 = eq(CmdPtr0, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_1755 = bits(_T_1749, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_1756 = eq(CmdPtr0, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_1757 = bits(_T_1749, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_1758 = mux(_T_1750, _T_1751, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1759 = mux(_T_1752, _T_1753, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1760 = mux(_T_1754, _T_1755, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1761 = mux(_T_1756, _T_1757, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1762 = or(_T_1758, _T_1759) @[Mux.scala 27:72] + node _T_1763 = or(_T_1762, _T_1760) @[Mux.scala 27:72] + node _T_1764 = or(_T_1763, _T_1761) @[Mux.scala 27:72] + wire _T_1765 : UInt<1> @[Mux.scala 27:72] + _T_1765 <= _T_1764 @[Mux.scala 27:72] + node _T_1766 = and(_T_1746, _T_1765) @[lsu_bus_buffer.scala 346:177] + node _T_1767 = and(_T_1688, _T_1766) @[lsu_bus_buffer.scala 345:122] + node _T_1768 = and(ibuf_buf_byp, ldst_samedw_r) @[lsu_bus_buffer.scala 347:19] + node _T_1769 = and(_T_1768, io.ldst_dual_r) @[lsu_bus_buffer.scala 347:35] + node _T_1770 = or(_T_1767, _T_1769) @[lsu_bus_buffer.scala 346:250] + obuf_merge_en <= _T_1770 @[lsu_bus_buffer.scala 344:17] + reg obuf_wr_enQ : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.lsu_busm_clken : @[Reg.scala 28:19] + obuf_wr_enQ <= obuf_wr_en @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1771 = mux(obuf_wr_en, UInt<1>("h01"), obuf_valid) @[lsu_bus_buffer.scala 349:58] + node _T_1772 = eq(obuf_rst, UInt<1>("h00")) @[lsu_bus_buffer.scala 349:93] + node _T_1773 = and(_T_1771, _T_1772) @[lsu_bus_buffer.scala 349:91] + reg _T_1774 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 349:54] + _T_1774 <= _T_1773 @[lsu_bus_buffer.scala 349:54] + obuf_valid <= _T_1774 @[lsu_bus_buffer.scala 349:14] + reg _T_1775 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1775 <= obuf_nosend_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_nosend <= _T_1775 @[lsu_bus_buffer.scala 350:15] + reg _T_1776 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_rdrsp_pend_en : @[Reg.scala 28:19] + _T_1776 <= obuf_rdrsp_pend_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_rdrsp_pend <= _T_1776 @[lsu_bus_buffer.scala 351:19] + reg _T_1777 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.lsu_busm_clken : @[Reg.scala 28:19] + _T_1777 <= obuf_cmd_done_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_cmd_done <= _T_1777 @[lsu_bus_buffer.scala 352:17] + reg _T_1778 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.lsu_busm_clken : @[Reg.scala 28:19] + _T_1778 <= obuf_data_done_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_data_done <= _T_1778 @[lsu_bus_buffer.scala 353:18] + reg _T_1779 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when io.lsu_busm_clken : @[Reg.scala 28:19] + _T_1779 <= obuf_rdrsp_tag_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_rdrsp_tag <= _T_1779 @[lsu_bus_buffer.scala 354:18] + node _T_1780 = and(io.lsu_bus_obuf_c1_clken, obuf_wr_en) @[lib.scala 388:57] + reg _T_1781 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1780 : @[Reg.scala 28:19] + _T_1781 <= obuf_tag0_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_tag0 <= _T_1781 @[lsu_bus_buffer.scala 356:13] + node _T_1782 = and(io.lsu_bus_obuf_c1_clken, obuf_wr_en) @[lib.scala 388:57] + reg obuf_tag1 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1782 : @[Reg.scala 28:19] + obuf_tag1 <= obuf_tag1_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1783 = and(io.lsu_bus_obuf_c1_clken, obuf_wr_en) @[lib.scala 388:57] + reg obuf_merge : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1783 : @[Reg.scala 28:19] + obuf_merge <= obuf_merge_en @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1784 = and(io.lsu_bus_obuf_c1_clken, obuf_wr_en) @[lib.scala 388:57] + reg _T_1785 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1784 : @[Reg.scala 28:19] + _T_1785 <= obuf_write_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_write <= _T_1785 @[lsu_bus_buffer.scala 359:14] + node _T_1786 = and(io.lsu_bus_obuf_c1_clken, obuf_wr_en) @[lib.scala 388:57] + reg _T_1787 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1786 : @[Reg.scala 28:19] + _T_1787 <= obuf_sideeffect_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_sideeffect <= _T_1787 @[lsu_bus_buffer.scala 360:19] + node _T_1788 = and(io.lsu_bus_obuf_c1_clken, obuf_wr_en) @[lib.scala 388:57] + reg obuf_sz : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1788 : @[Reg.scala 28:19] + obuf_sz <= obuf_sz_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_1789 = and(io.lsu_bus_obuf_c1_clken, obuf_wr_en) @[lib.scala 388:57] + reg obuf_byteen : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1789 : @[Reg.scala 28:19] + obuf_byteen <= obuf_byteen_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr_2 of rvclkhdr_2 @[lib.scala 404:23] + rvclkhdr_2.clock <= clock + rvclkhdr_2.reset <= reset + rvclkhdr_2.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_2.io.en <= obuf_wr_en @[lib.scala 407:17] + rvclkhdr_2.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_1790 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1790 <= obuf_addr_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_addr <= _T_1790 @[lsu_bus_buffer.scala 363:13] + inst rvclkhdr_3 of rvclkhdr_3 @[lib.scala 404:23] + rvclkhdr_3.clock <= clock + rvclkhdr_3.reset <= reset + rvclkhdr_3.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_3.io.en <= obuf_wr_en @[lib.scala 407:17] + rvclkhdr_3.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg obuf_data : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + obuf_data <= obuf_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg _T_1791 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when obuf_wr_en : @[Reg.scala 28:19] + _T_1791 <= obuf_wr_timer_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + obuf_wr_timer <= _T_1791 @[lsu_bus_buffer.scala 365:17] + wire WrPtr0_m : UInt<2> + WrPtr0_m <= UInt<1>("h00") + node _T_1792 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 369:65] + node _T_1793 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 370:30] + node _T_1794 = and(ibuf_valid, _T_1793) @[lsu_bus_buffer.scala 370:19] + node _T_1795 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 371:18] + node _T_1796 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 371:57] + node _T_1797 = and(io.ldst_dual_r, _T_1796) @[lsu_bus_buffer.scala 371:45] + node _T_1798 = or(_T_1795, _T_1797) @[lsu_bus_buffer.scala 371:27] + node _T_1799 = and(io.lsu_busreq_r, _T_1798) @[lsu_bus_buffer.scala 370:58] + node _T_1800 = or(_T_1794, _T_1799) @[lsu_bus_buffer.scala 370:39] + node _T_1801 = eq(_T_1800, UInt<1>("h00")) @[lsu_bus_buffer.scala 370:5] + node _T_1802 = and(_T_1792, _T_1801) @[lsu_bus_buffer.scala 369:76] + node _T_1803 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 369:65] + node _T_1804 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 370:30] + node _T_1805 = and(ibuf_valid, _T_1804) @[lsu_bus_buffer.scala 370:19] + node _T_1806 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 371:18] + node _T_1807 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 371:57] + node _T_1808 = and(io.ldst_dual_r, _T_1807) @[lsu_bus_buffer.scala 371:45] + node _T_1809 = or(_T_1806, _T_1808) @[lsu_bus_buffer.scala 371:27] + node _T_1810 = and(io.lsu_busreq_r, _T_1809) @[lsu_bus_buffer.scala 370:58] + node _T_1811 = or(_T_1805, _T_1810) @[lsu_bus_buffer.scala 370:39] + node _T_1812 = eq(_T_1811, UInt<1>("h00")) @[lsu_bus_buffer.scala 370:5] + node _T_1813 = and(_T_1803, _T_1812) @[lsu_bus_buffer.scala 369:76] + node _T_1814 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 369:65] + node _T_1815 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 370:30] + node _T_1816 = and(ibuf_valid, _T_1815) @[lsu_bus_buffer.scala 370:19] + node _T_1817 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 371:18] + node _T_1818 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 371:57] + node _T_1819 = and(io.ldst_dual_r, _T_1818) @[lsu_bus_buffer.scala 371:45] + node _T_1820 = or(_T_1817, _T_1819) @[lsu_bus_buffer.scala 371:27] + node _T_1821 = and(io.lsu_busreq_r, _T_1820) @[lsu_bus_buffer.scala 370:58] + node _T_1822 = or(_T_1816, _T_1821) @[lsu_bus_buffer.scala 370:39] + node _T_1823 = eq(_T_1822, UInt<1>("h00")) @[lsu_bus_buffer.scala 370:5] + node _T_1824 = and(_T_1814, _T_1823) @[lsu_bus_buffer.scala 369:76] + node _T_1825 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 369:65] + node _T_1826 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 370:30] + node _T_1827 = and(ibuf_valid, _T_1826) @[lsu_bus_buffer.scala 370:19] + node _T_1828 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 371:18] + node _T_1829 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 371:57] + node _T_1830 = and(io.ldst_dual_r, _T_1829) @[lsu_bus_buffer.scala 371:45] + node _T_1831 = or(_T_1828, _T_1830) @[lsu_bus_buffer.scala 371:27] + node _T_1832 = and(io.lsu_busreq_r, _T_1831) @[lsu_bus_buffer.scala 370:58] + node _T_1833 = or(_T_1827, _T_1832) @[lsu_bus_buffer.scala 370:39] + node _T_1834 = eq(_T_1833, UInt<1>("h00")) @[lsu_bus_buffer.scala 370:5] + node _T_1835 = and(_T_1825, _T_1834) @[lsu_bus_buffer.scala 369:76] + node _T_1836 = mux(_T_1835, UInt<2>("h03"), UInt<2>("h03")) @[Mux.scala 98:16] + node _T_1837 = mux(_T_1824, UInt<2>("h02"), _T_1836) @[Mux.scala 98:16] + node _T_1838 = mux(_T_1813, UInt<1>("h01"), _T_1837) @[Mux.scala 98:16] + node _T_1839 = mux(_T_1802, UInt<1>("h00"), _T_1838) @[Mux.scala 98:16] + WrPtr0_m <= _T_1839 @[lsu_bus_buffer.scala 369:12] + wire WrPtr1_m : UInt<2> + WrPtr1_m <= UInt<1>("h00") + node _T_1840 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 375:65] + node _T_1841 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 375:103] + node _T_1842 = and(ibuf_valid, _T_1841) @[lsu_bus_buffer.scala 375:92] + node _T_1843 = eq(WrPtr0_m, UInt<1>("h00")) @[lsu_bus_buffer.scala 376:33] + node _T_1844 = and(io.lsu_busreq_m, _T_1843) @[lsu_bus_buffer.scala 376:22] + node _T_1845 = or(_T_1842, _T_1844) @[lsu_bus_buffer.scala 375:112] + node _T_1846 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 377:36] + node _T_1847 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 378:34] + node _T_1848 = and(io.ldst_dual_r, _T_1847) @[lsu_bus_buffer.scala 378:23] + node _T_1849 = or(_T_1846, _T_1848) @[lsu_bus_buffer.scala 377:46] + node _T_1850 = and(io.lsu_busreq_r, _T_1849) @[lsu_bus_buffer.scala 377:22] + node _T_1851 = or(_T_1845, _T_1850) @[lsu_bus_buffer.scala 376:42] + node _T_1852 = eq(_T_1851, UInt<1>("h00")) @[lsu_bus_buffer.scala 375:78] + node _T_1853 = and(_T_1840, _T_1852) @[lsu_bus_buffer.scala 375:76] + node _T_1854 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 375:65] + node _T_1855 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 375:103] + node _T_1856 = and(ibuf_valid, _T_1855) @[lsu_bus_buffer.scala 375:92] + node _T_1857 = eq(WrPtr0_m, UInt<1>("h01")) @[lsu_bus_buffer.scala 376:33] + node _T_1858 = and(io.lsu_busreq_m, _T_1857) @[lsu_bus_buffer.scala 376:22] + node _T_1859 = or(_T_1856, _T_1858) @[lsu_bus_buffer.scala 375:112] + node _T_1860 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 377:36] + node _T_1861 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 378:34] + node _T_1862 = and(io.ldst_dual_r, _T_1861) @[lsu_bus_buffer.scala 378:23] + node _T_1863 = or(_T_1860, _T_1862) @[lsu_bus_buffer.scala 377:46] + node _T_1864 = and(io.lsu_busreq_r, _T_1863) @[lsu_bus_buffer.scala 377:22] + node _T_1865 = or(_T_1859, _T_1864) @[lsu_bus_buffer.scala 376:42] + node _T_1866 = eq(_T_1865, UInt<1>("h00")) @[lsu_bus_buffer.scala 375:78] + node _T_1867 = and(_T_1854, _T_1866) @[lsu_bus_buffer.scala 375:76] + node _T_1868 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 375:65] + node _T_1869 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 375:103] + node _T_1870 = and(ibuf_valid, _T_1869) @[lsu_bus_buffer.scala 375:92] + node _T_1871 = eq(WrPtr0_m, UInt<2>("h02")) @[lsu_bus_buffer.scala 376:33] + node _T_1872 = and(io.lsu_busreq_m, _T_1871) @[lsu_bus_buffer.scala 376:22] + node _T_1873 = or(_T_1870, _T_1872) @[lsu_bus_buffer.scala 375:112] + node _T_1874 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 377:36] + node _T_1875 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 378:34] + node _T_1876 = and(io.ldst_dual_r, _T_1875) @[lsu_bus_buffer.scala 378:23] + node _T_1877 = or(_T_1874, _T_1876) @[lsu_bus_buffer.scala 377:46] + node _T_1878 = and(io.lsu_busreq_r, _T_1877) @[lsu_bus_buffer.scala 377:22] + node _T_1879 = or(_T_1873, _T_1878) @[lsu_bus_buffer.scala 376:42] + node _T_1880 = eq(_T_1879, UInt<1>("h00")) @[lsu_bus_buffer.scala 375:78] + node _T_1881 = and(_T_1868, _T_1880) @[lsu_bus_buffer.scala 375:76] + node _T_1882 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 375:65] + node _T_1883 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 375:103] + node _T_1884 = and(ibuf_valid, _T_1883) @[lsu_bus_buffer.scala 375:92] + node _T_1885 = eq(WrPtr0_m, UInt<2>("h03")) @[lsu_bus_buffer.scala 376:33] + node _T_1886 = and(io.lsu_busreq_m, _T_1885) @[lsu_bus_buffer.scala 376:22] + node _T_1887 = or(_T_1884, _T_1886) @[lsu_bus_buffer.scala 375:112] + node _T_1888 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 377:36] + node _T_1889 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 378:34] + node _T_1890 = and(io.ldst_dual_r, _T_1889) @[lsu_bus_buffer.scala 378:23] + node _T_1891 = or(_T_1888, _T_1890) @[lsu_bus_buffer.scala 377:46] + node _T_1892 = and(io.lsu_busreq_r, _T_1891) @[lsu_bus_buffer.scala 377:22] + node _T_1893 = or(_T_1887, _T_1892) @[lsu_bus_buffer.scala 376:42] + node _T_1894 = eq(_T_1893, UInt<1>("h00")) @[lsu_bus_buffer.scala 375:78] + node _T_1895 = and(_T_1882, _T_1894) @[lsu_bus_buffer.scala 375:76] + node _T_1896 = mux(_T_1895, UInt<2>("h03"), UInt<2>("h03")) @[Mux.scala 98:16] + node _T_1897 = mux(_T_1881, UInt<2>("h02"), _T_1896) @[Mux.scala 98:16] + node _T_1898 = mux(_T_1867, UInt<1>("h01"), _T_1897) @[Mux.scala 98:16] + node _T_1899 = mux(_T_1853, UInt<1>("h00"), _T_1898) @[Mux.scala 98:16] + WrPtr1_m <= _T_1899 @[lsu_bus_buffer.scala 375:12] + wire buf_age : UInt<4>[4] @[lsu_bus_buffer.scala 380:21] + buf_age[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 381:11] + buf_age[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 381:11] + buf_age[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 381:11] + buf_age[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 381:11] + node _T_1900 = orr(buf_age[0]) @[lsu_bus_buffer.scala 383:58] + node _T_1901 = eq(_T_1900, UInt<1>("h00")) @[lsu_bus_buffer.scala 383:45] + node _T_1902 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 383:78] + node _T_1903 = and(_T_1901, _T_1902) @[lsu_bus_buffer.scala 383:63] + node _T_1904 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 383:90] + node _T_1905 = and(_T_1903, _T_1904) @[lsu_bus_buffer.scala 383:88] + node _T_1906 = orr(buf_age[1]) @[lsu_bus_buffer.scala 383:58] + node _T_1907 = eq(_T_1906, UInt<1>("h00")) @[lsu_bus_buffer.scala 383:45] + node _T_1908 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 383:78] + node _T_1909 = and(_T_1907, _T_1908) @[lsu_bus_buffer.scala 383:63] + node _T_1910 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 383:90] + node _T_1911 = and(_T_1909, _T_1910) @[lsu_bus_buffer.scala 383:88] + node _T_1912 = orr(buf_age[2]) @[lsu_bus_buffer.scala 383:58] + node _T_1913 = eq(_T_1912, UInt<1>("h00")) @[lsu_bus_buffer.scala 383:45] + node _T_1914 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 383:78] + node _T_1915 = and(_T_1913, _T_1914) @[lsu_bus_buffer.scala 383:63] + node _T_1916 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 383:90] + node _T_1917 = and(_T_1915, _T_1916) @[lsu_bus_buffer.scala 383:88] + node _T_1918 = orr(buf_age[3]) @[lsu_bus_buffer.scala 383:58] + node _T_1919 = eq(_T_1918, UInt<1>("h00")) @[lsu_bus_buffer.scala 383:45] + node _T_1920 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 383:78] + node _T_1921 = and(_T_1919, _T_1920) @[lsu_bus_buffer.scala 383:63] + node _T_1922 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 383:90] + node _T_1923 = and(_T_1921, _T_1922) @[lsu_bus_buffer.scala 383:88] + node _T_1924 = cat(_T_1923, _T_1917) @[Cat.scala 29:58] + node _T_1925 = cat(_T_1924, _T_1911) @[Cat.scala 29:58] + node CmdPtr0Dec = cat(_T_1925, _T_1905) @[Cat.scala 29:58] + node _T_1926 = not(CmdPtr0Dec) @[lsu_bus_buffer.scala 384:62] + node _T_1927 = and(buf_age[0], _T_1926) @[lsu_bus_buffer.scala 384:59] + node _T_1928 = orr(_T_1927) @[lsu_bus_buffer.scala 384:76] + node _T_1929 = eq(_T_1928, UInt<1>("h00")) @[lsu_bus_buffer.scala 384:45] + node _T_1930 = bits(CmdPtr0Dec, 0, 0) @[lsu_bus_buffer.scala 384:94] + node _T_1931 = eq(_T_1930, UInt<1>("h00")) @[lsu_bus_buffer.scala 384:83] + node _T_1932 = and(_T_1929, _T_1931) @[lsu_bus_buffer.scala 384:81] + node _T_1933 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 384:113] + node _T_1934 = and(_T_1932, _T_1933) @[lsu_bus_buffer.scala 384:98] + node _T_1935 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 384:125] + node _T_1936 = and(_T_1934, _T_1935) @[lsu_bus_buffer.scala 384:123] + node _T_1937 = not(CmdPtr0Dec) @[lsu_bus_buffer.scala 384:62] + node _T_1938 = and(buf_age[1], _T_1937) @[lsu_bus_buffer.scala 384:59] + node _T_1939 = orr(_T_1938) @[lsu_bus_buffer.scala 384:76] + node _T_1940 = eq(_T_1939, UInt<1>("h00")) @[lsu_bus_buffer.scala 384:45] + node _T_1941 = bits(CmdPtr0Dec, 1, 1) @[lsu_bus_buffer.scala 384:94] + node _T_1942 = eq(_T_1941, UInt<1>("h00")) @[lsu_bus_buffer.scala 384:83] + node _T_1943 = and(_T_1940, _T_1942) @[lsu_bus_buffer.scala 384:81] + node _T_1944 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 384:113] + node _T_1945 = and(_T_1943, _T_1944) @[lsu_bus_buffer.scala 384:98] + node _T_1946 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 384:125] + node _T_1947 = and(_T_1945, _T_1946) @[lsu_bus_buffer.scala 384:123] + node _T_1948 = not(CmdPtr0Dec) @[lsu_bus_buffer.scala 384:62] + node _T_1949 = and(buf_age[2], _T_1948) @[lsu_bus_buffer.scala 384:59] + node _T_1950 = orr(_T_1949) @[lsu_bus_buffer.scala 384:76] + node _T_1951 = eq(_T_1950, UInt<1>("h00")) @[lsu_bus_buffer.scala 384:45] + node _T_1952 = bits(CmdPtr0Dec, 2, 2) @[lsu_bus_buffer.scala 384:94] + node _T_1953 = eq(_T_1952, UInt<1>("h00")) @[lsu_bus_buffer.scala 384:83] + node _T_1954 = and(_T_1951, _T_1953) @[lsu_bus_buffer.scala 384:81] + node _T_1955 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 384:113] + node _T_1956 = and(_T_1954, _T_1955) @[lsu_bus_buffer.scala 384:98] + node _T_1957 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 384:125] + node _T_1958 = and(_T_1956, _T_1957) @[lsu_bus_buffer.scala 384:123] + node _T_1959 = not(CmdPtr0Dec) @[lsu_bus_buffer.scala 384:62] + node _T_1960 = and(buf_age[3], _T_1959) @[lsu_bus_buffer.scala 384:59] + node _T_1961 = orr(_T_1960) @[lsu_bus_buffer.scala 384:76] + node _T_1962 = eq(_T_1961, UInt<1>("h00")) @[lsu_bus_buffer.scala 384:45] + node _T_1963 = bits(CmdPtr0Dec, 3, 3) @[lsu_bus_buffer.scala 384:94] + node _T_1964 = eq(_T_1963, UInt<1>("h00")) @[lsu_bus_buffer.scala 384:83] + node _T_1965 = and(_T_1962, _T_1964) @[lsu_bus_buffer.scala 384:81] + node _T_1966 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 384:113] + node _T_1967 = and(_T_1965, _T_1966) @[lsu_bus_buffer.scala 384:98] + node _T_1968 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 384:125] + node _T_1969 = and(_T_1967, _T_1968) @[lsu_bus_buffer.scala 384:123] + node _T_1970 = cat(_T_1969, _T_1958) @[Cat.scala 29:58] + node _T_1971 = cat(_T_1970, _T_1947) @[Cat.scala 29:58] + node CmdPtr1Dec = cat(_T_1971, _T_1936) @[Cat.scala 29:58] + wire buf_rsp_pickage : UInt<4>[4] @[lsu_bus_buffer.scala 385:29] + buf_rsp_pickage[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 386:19] + buf_rsp_pickage[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 386:19] + buf_rsp_pickage[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 386:19] + buf_rsp_pickage[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 386:19] + node _T_1972 = orr(buf_rsp_pickage[0]) @[lsu_bus_buffer.scala 387:65] + node _T_1973 = eq(_T_1972, UInt<1>("h00")) @[lsu_bus_buffer.scala 387:44] + node _T_1974 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 387:85] + node _T_1975 = and(_T_1973, _T_1974) @[lsu_bus_buffer.scala 387:70] + node _T_1976 = orr(buf_rsp_pickage[1]) @[lsu_bus_buffer.scala 387:65] + node _T_1977 = eq(_T_1976, UInt<1>("h00")) @[lsu_bus_buffer.scala 387:44] + node _T_1978 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 387:85] + node _T_1979 = and(_T_1977, _T_1978) @[lsu_bus_buffer.scala 387:70] + node _T_1980 = orr(buf_rsp_pickage[2]) @[lsu_bus_buffer.scala 387:65] + node _T_1981 = eq(_T_1980, UInt<1>("h00")) @[lsu_bus_buffer.scala 387:44] + node _T_1982 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 387:85] + node _T_1983 = and(_T_1981, _T_1982) @[lsu_bus_buffer.scala 387:70] + node _T_1984 = orr(buf_rsp_pickage[3]) @[lsu_bus_buffer.scala 387:65] + node _T_1985 = eq(_T_1984, UInt<1>("h00")) @[lsu_bus_buffer.scala 387:44] + node _T_1986 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 387:85] + node _T_1987 = and(_T_1985, _T_1986) @[lsu_bus_buffer.scala 387:70] + node _T_1988 = cat(_T_1987, _T_1983) @[Cat.scala 29:58] + node _T_1989 = cat(_T_1988, _T_1979) @[Cat.scala 29:58] + node RspPtrDec = cat(_T_1989, _T_1975) @[Cat.scala 29:58] + node _T_1990 = orr(CmdPtr0Dec) @[lsu_bus_buffer.scala 388:31] + found_cmdptr0 <= _T_1990 @[lsu_bus_buffer.scala 388:17] + node _T_1991 = orr(CmdPtr1Dec) @[lsu_bus_buffer.scala 389:31] + found_cmdptr1 <= _T_1991 @[lsu_bus_buffer.scala 389:17] + wire RspPtr : UInt<2> + RspPtr <= UInt<1>("h00") + node _T_1992 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_1993 = cat(_T_1992, CmdPtr0Dec) @[Cat.scala 29:58] + node _T_1994 = bits(_T_1993, 4, 4) @[lsu_bus_buffer.scala 391:39] + node _T_1995 = bits(_T_1993, 5, 5) @[lsu_bus_buffer.scala 391:45] + node _T_1996 = or(_T_1994, _T_1995) @[lsu_bus_buffer.scala 391:42] + node _T_1997 = bits(_T_1993, 6, 6) @[lsu_bus_buffer.scala 391:51] + node _T_1998 = or(_T_1996, _T_1997) @[lsu_bus_buffer.scala 391:48] + node _T_1999 = bits(_T_1993, 7, 7) @[lsu_bus_buffer.scala 391:57] + node _T_2000 = or(_T_1998, _T_1999) @[lsu_bus_buffer.scala 391:54] + node _T_2001 = bits(_T_1993, 2, 2) @[lsu_bus_buffer.scala 391:64] + node _T_2002 = bits(_T_1993, 3, 3) @[lsu_bus_buffer.scala 391:70] + node _T_2003 = or(_T_2001, _T_2002) @[lsu_bus_buffer.scala 391:67] + node _T_2004 = bits(_T_1993, 6, 6) @[lsu_bus_buffer.scala 391:76] + node _T_2005 = or(_T_2003, _T_2004) @[lsu_bus_buffer.scala 391:73] + node _T_2006 = bits(_T_1993, 7, 7) @[lsu_bus_buffer.scala 391:82] + node _T_2007 = or(_T_2005, _T_2006) @[lsu_bus_buffer.scala 391:79] + node _T_2008 = bits(_T_1993, 1, 1) @[lsu_bus_buffer.scala 391:89] + node _T_2009 = bits(_T_1993, 3, 3) @[lsu_bus_buffer.scala 391:95] + node _T_2010 = or(_T_2008, _T_2009) @[lsu_bus_buffer.scala 391:92] + node _T_2011 = bits(_T_1993, 5, 5) @[lsu_bus_buffer.scala 391:101] + node _T_2012 = or(_T_2010, _T_2011) @[lsu_bus_buffer.scala 391:98] + node _T_2013 = bits(_T_1993, 7, 7) @[lsu_bus_buffer.scala 391:107] + node _T_2014 = or(_T_2012, _T_2013) @[lsu_bus_buffer.scala 391:104] + node _T_2015 = cat(_T_2000, _T_2007) @[Cat.scala 29:58] + node _T_2016 = cat(_T_2015, _T_2014) @[Cat.scala 29:58] + CmdPtr0 <= _T_2016 @[lsu_bus_buffer.scala 396:11] + node _T_2017 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_2018 = cat(_T_2017, CmdPtr1Dec) @[Cat.scala 29:58] + node _T_2019 = bits(_T_2018, 4, 4) @[lsu_bus_buffer.scala 391:39] + node _T_2020 = bits(_T_2018, 5, 5) @[lsu_bus_buffer.scala 391:45] + node _T_2021 = or(_T_2019, _T_2020) @[lsu_bus_buffer.scala 391:42] + node _T_2022 = bits(_T_2018, 6, 6) @[lsu_bus_buffer.scala 391:51] + node _T_2023 = or(_T_2021, _T_2022) @[lsu_bus_buffer.scala 391:48] + node _T_2024 = bits(_T_2018, 7, 7) @[lsu_bus_buffer.scala 391:57] + node _T_2025 = or(_T_2023, _T_2024) @[lsu_bus_buffer.scala 391:54] + node _T_2026 = bits(_T_2018, 2, 2) @[lsu_bus_buffer.scala 391:64] + node _T_2027 = bits(_T_2018, 3, 3) @[lsu_bus_buffer.scala 391:70] + node _T_2028 = or(_T_2026, _T_2027) @[lsu_bus_buffer.scala 391:67] + node _T_2029 = bits(_T_2018, 6, 6) @[lsu_bus_buffer.scala 391:76] + node _T_2030 = or(_T_2028, _T_2029) @[lsu_bus_buffer.scala 391:73] + node _T_2031 = bits(_T_2018, 7, 7) @[lsu_bus_buffer.scala 391:82] + node _T_2032 = or(_T_2030, _T_2031) @[lsu_bus_buffer.scala 391:79] + node _T_2033 = bits(_T_2018, 1, 1) @[lsu_bus_buffer.scala 391:89] + node _T_2034 = bits(_T_2018, 3, 3) @[lsu_bus_buffer.scala 391:95] + node _T_2035 = or(_T_2033, _T_2034) @[lsu_bus_buffer.scala 391:92] + node _T_2036 = bits(_T_2018, 5, 5) @[lsu_bus_buffer.scala 391:101] + node _T_2037 = or(_T_2035, _T_2036) @[lsu_bus_buffer.scala 391:98] + node _T_2038 = bits(_T_2018, 7, 7) @[lsu_bus_buffer.scala 391:107] + node _T_2039 = or(_T_2037, _T_2038) @[lsu_bus_buffer.scala 391:104] + node _T_2040 = cat(_T_2025, _T_2032) @[Cat.scala 29:58] + node _T_2041 = cat(_T_2040, _T_2039) @[Cat.scala 29:58] + CmdPtr1 <= _T_2041 @[lsu_bus_buffer.scala 398:11] + node _T_2042 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] + node _T_2043 = cat(_T_2042, RspPtrDec) @[Cat.scala 29:58] + node _T_2044 = bits(_T_2043, 4, 4) @[lsu_bus_buffer.scala 391:39] + node _T_2045 = bits(_T_2043, 5, 5) @[lsu_bus_buffer.scala 391:45] + node _T_2046 = or(_T_2044, _T_2045) @[lsu_bus_buffer.scala 391:42] + node _T_2047 = bits(_T_2043, 6, 6) @[lsu_bus_buffer.scala 391:51] + node _T_2048 = or(_T_2046, _T_2047) @[lsu_bus_buffer.scala 391:48] + node _T_2049 = bits(_T_2043, 7, 7) @[lsu_bus_buffer.scala 391:57] + node _T_2050 = or(_T_2048, _T_2049) @[lsu_bus_buffer.scala 391:54] + node _T_2051 = bits(_T_2043, 2, 2) @[lsu_bus_buffer.scala 391:64] + node _T_2052 = bits(_T_2043, 3, 3) @[lsu_bus_buffer.scala 391:70] + node _T_2053 = or(_T_2051, _T_2052) @[lsu_bus_buffer.scala 391:67] + node _T_2054 = bits(_T_2043, 6, 6) @[lsu_bus_buffer.scala 391:76] + node _T_2055 = or(_T_2053, _T_2054) @[lsu_bus_buffer.scala 391:73] + node _T_2056 = bits(_T_2043, 7, 7) @[lsu_bus_buffer.scala 391:82] + node _T_2057 = or(_T_2055, _T_2056) @[lsu_bus_buffer.scala 391:79] + node _T_2058 = bits(_T_2043, 1, 1) @[lsu_bus_buffer.scala 391:89] + node _T_2059 = bits(_T_2043, 3, 3) @[lsu_bus_buffer.scala 391:95] + node _T_2060 = or(_T_2058, _T_2059) @[lsu_bus_buffer.scala 391:92] + node _T_2061 = bits(_T_2043, 5, 5) @[lsu_bus_buffer.scala 391:101] + node _T_2062 = or(_T_2060, _T_2061) @[lsu_bus_buffer.scala 391:98] + node _T_2063 = bits(_T_2043, 7, 7) @[lsu_bus_buffer.scala 391:107] + node _T_2064 = or(_T_2062, _T_2063) @[lsu_bus_buffer.scala 391:104] + node _T_2065 = cat(_T_2050, _T_2057) @[Cat.scala 29:58] + node _T_2066 = cat(_T_2065, _T_2064) @[Cat.scala 29:58] + RspPtr <= _T_2066 @[lsu_bus_buffer.scala 399:10] + wire buf_state_en : UInt<1>[4] @[lsu_bus_buffer.scala 400:26] + buf_state_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 401:16] + buf_state_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 401:16] + buf_state_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 401:16] + buf_state_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 401:16] + wire buf_rspageQ : UInt<4>[4] @[lsu_bus_buffer.scala 402:25] + buf_rspageQ[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 403:15] + buf_rspageQ[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 403:15] + buf_rspageQ[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 403:15] + buf_rspageQ[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 403:15] + wire buf_rspage_set : UInt<4>[4] @[lsu_bus_buffer.scala 404:28] + buf_rspage_set[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 405:18] + buf_rspage_set[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 405:18] + buf_rspage_set[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 405:18] + buf_rspage_set[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 405:18] + wire buf_rspage_in : UInt<4>[4] @[lsu_bus_buffer.scala 406:27] + buf_rspage_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 407:17] + buf_rspage_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 407:17] + buf_rspage_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 407:17] + buf_rspage_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 407:17] + wire buf_rspage : UInt<4>[4] @[lsu_bus_buffer.scala 408:24] + buf_rspage[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 409:14] + buf_rspage[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 409:14] + buf_rspage[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 409:14] + buf_rspage[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 409:14] + node _T_2067 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2068 = and(_T_2067, buf_state_en[0]) @[lsu_bus_buffer.scala 411:94] + node _T_2069 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2070 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2071 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2072 = and(_T_2070, _T_2071) @[lsu_bus_buffer.scala 412:57] + node _T_2073 = or(_T_2069, _T_2072) @[lsu_bus_buffer.scala 412:31] + node _T_2074 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2075 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2076 = and(_T_2074, _T_2075) @[lsu_bus_buffer.scala 413:41] + node _T_2077 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 413:83] + node _T_2078 = and(_T_2076, _T_2077) @[lsu_bus_buffer.scala 413:71] + node _T_2079 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 413:104] + node _T_2080 = and(_T_2078, _T_2079) @[lsu_bus_buffer.scala 413:92] + node _T_2081 = or(_T_2073, _T_2080) @[lsu_bus_buffer.scala 412:86] + node _T_2082 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2083 = and(_T_2082, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2084 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 414:64] + node _T_2085 = and(_T_2083, _T_2084) @[lsu_bus_buffer.scala 414:52] + node _T_2086 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 414:85] + node _T_2087 = and(_T_2085, _T_2086) @[lsu_bus_buffer.scala 414:73] + node _T_2088 = or(_T_2081, _T_2087) @[lsu_bus_buffer.scala 413:114] + node _T_2089 = and(_T_2068, _T_2088) @[lsu_bus_buffer.scala 411:113] + node _T_2090 = bits(buf_age[0], 0, 0) @[lsu_bus_buffer.scala 414:109] + node _T_2091 = or(_T_2089, _T_2090) @[lsu_bus_buffer.scala 414:97] + node _T_2092 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2093 = and(_T_2092, buf_state_en[0]) @[lsu_bus_buffer.scala 411:94] + node _T_2094 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2095 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2096 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2097 = and(_T_2095, _T_2096) @[lsu_bus_buffer.scala 412:57] + node _T_2098 = or(_T_2094, _T_2097) @[lsu_bus_buffer.scala 412:31] + node _T_2099 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2100 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2101 = and(_T_2099, _T_2100) @[lsu_bus_buffer.scala 413:41] + node _T_2102 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 413:83] + node _T_2103 = and(_T_2101, _T_2102) @[lsu_bus_buffer.scala 413:71] + node _T_2104 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 413:104] + node _T_2105 = and(_T_2103, _T_2104) @[lsu_bus_buffer.scala 413:92] + node _T_2106 = or(_T_2098, _T_2105) @[lsu_bus_buffer.scala 412:86] + node _T_2107 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2108 = and(_T_2107, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2109 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 414:64] + node _T_2110 = and(_T_2108, _T_2109) @[lsu_bus_buffer.scala 414:52] + node _T_2111 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 414:85] + node _T_2112 = and(_T_2110, _T_2111) @[lsu_bus_buffer.scala 414:73] + node _T_2113 = or(_T_2106, _T_2112) @[lsu_bus_buffer.scala 413:114] + node _T_2114 = and(_T_2093, _T_2113) @[lsu_bus_buffer.scala 411:113] + node _T_2115 = bits(buf_age[0], 1, 1) @[lsu_bus_buffer.scala 414:109] + node _T_2116 = or(_T_2114, _T_2115) @[lsu_bus_buffer.scala 414:97] + node _T_2117 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2118 = and(_T_2117, buf_state_en[0]) @[lsu_bus_buffer.scala 411:94] + node _T_2119 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2120 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2121 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2122 = and(_T_2120, _T_2121) @[lsu_bus_buffer.scala 412:57] + node _T_2123 = or(_T_2119, _T_2122) @[lsu_bus_buffer.scala 412:31] + node _T_2124 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2125 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2126 = and(_T_2124, _T_2125) @[lsu_bus_buffer.scala 413:41] + node _T_2127 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 413:83] + node _T_2128 = and(_T_2126, _T_2127) @[lsu_bus_buffer.scala 413:71] + node _T_2129 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 413:104] + node _T_2130 = and(_T_2128, _T_2129) @[lsu_bus_buffer.scala 413:92] + node _T_2131 = or(_T_2123, _T_2130) @[lsu_bus_buffer.scala 412:86] + node _T_2132 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2133 = and(_T_2132, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2134 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 414:64] + node _T_2135 = and(_T_2133, _T_2134) @[lsu_bus_buffer.scala 414:52] + node _T_2136 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 414:85] + node _T_2137 = and(_T_2135, _T_2136) @[lsu_bus_buffer.scala 414:73] + node _T_2138 = or(_T_2131, _T_2137) @[lsu_bus_buffer.scala 413:114] + node _T_2139 = and(_T_2118, _T_2138) @[lsu_bus_buffer.scala 411:113] + node _T_2140 = bits(buf_age[0], 2, 2) @[lsu_bus_buffer.scala 414:109] + node _T_2141 = or(_T_2139, _T_2140) @[lsu_bus_buffer.scala 414:97] + node _T_2142 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2143 = and(_T_2142, buf_state_en[0]) @[lsu_bus_buffer.scala 411:94] + node _T_2144 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2145 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2146 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2147 = and(_T_2145, _T_2146) @[lsu_bus_buffer.scala 412:57] + node _T_2148 = or(_T_2144, _T_2147) @[lsu_bus_buffer.scala 412:31] + node _T_2149 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2150 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2151 = and(_T_2149, _T_2150) @[lsu_bus_buffer.scala 413:41] + node _T_2152 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 413:83] + node _T_2153 = and(_T_2151, _T_2152) @[lsu_bus_buffer.scala 413:71] + node _T_2154 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 413:104] + node _T_2155 = and(_T_2153, _T_2154) @[lsu_bus_buffer.scala 413:92] + node _T_2156 = or(_T_2148, _T_2155) @[lsu_bus_buffer.scala 412:86] + node _T_2157 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2158 = and(_T_2157, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2159 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 414:64] + node _T_2160 = and(_T_2158, _T_2159) @[lsu_bus_buffer.scala 414:52] + node _T_2161 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 414:85] + node _T_2162 = and(_T_2160, _T_2161) @[lsu_bus_buffer.scala 414:73] + node _T_2163 = or(_T_2156, _T_2162) @[lsu_bus_buffer.scala 413:114] + node _T_2164 = and(_T_2143, _T_2163) @[lsu_bus_buffer.scala 411:113] + node _T_2165 = bits(buf_age[0], 3, 3) @[lsu_bus_buffer.scala 414:109] + node _T_2166 = or(_T_2164, _T_2165) @[lsu_bus_buffer.scala 414:97] + node _T_2167 = cat(_T_2166, _T_2141) @[Cat.scala 29:58] + node _T_2168 = cat(_T_2167, _T_2116) @[Cat.scala 29:58] + node buf_age_in_0 = cat(_T_2168, _T_2091) @[Cat.scala 29:58] + node _T_2169 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2170 = and(_T_2169, buf_state_en[1]) @[lsu_bus_buffer.scala 411:94] + node _T_2171 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2172 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2173 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2174 = and(_T_2172, _T_2173) @[lsu_bus_buffer.scala 412:57] + node _T_2175 = or(_T_2171, _T_2174) @[lsu_bus_buffer.scala 412:31] + node _T_2176 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2177 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2178 = and(_T_2176, _T_2177) @[lsu_bus_buffer.scala 413:41] + node _T_2179 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 413:83] + node _T_2180 = and(_T_2178, _T_2179) @[lsu_bus_buffer.scala 413:71] + node _T_2181 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 413:104] + node _T_2182 = and(_T_2180, _T_2181) @[lsu_bus_buffer.scala 413:92] + node _T_2183 = or(_T_2175, _T_2182) @[lsu_bus_buffer.scala 412:86] + node _T_2184 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2185 = and(_T_2184, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2186 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 414:64] + node _T_2187 = and(_T_2185, _T_2186) @[lsu_bus_buffer.scala 414:52] + node _T_2188 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 414:85] + node _T_2189 = and(_T_2187, _T_2188) @[lsu_bus_buffer.scala 414:73] + node _T_2190 = or(_T_2183, _T_2189) @[lsu_bus_buffer.scala 413:114] + node _T_2191 = and(_T_2170, _T_2190) @[lsu_bus_buffer.scala 411:113] + node _T_2192 = bits(buf_age[1], 0, 0) @[lsu_bus_buffer.scala 414:109] + node _T_2193 = or(_T_2191, _T_2192) @[lsu_bus_buffer.scala 414:97] + node _T_2194 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2195 = and(_T_2194, buf_state_en[1]) @[lsu_bus_buffer.scala 411:94] + node _T_2196 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2197 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2198 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2199 = and(_T_2197, _T_2198) @[lsu_bus_buffer.scala 412:57] + node _T_2200 = or(_T_2196, _T_2199) @[lsu_bus_buffer.scala 412:31] + node _T_2201 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2202 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2203 = and(_T_2201, _T_2202) @[lsu_bus_buffer.scala 413:41] + node _T_2204 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 413:83] + node _T_2205 = and(_T_2203, _T_2204) @[lsu_bus_buffer.scala 413:71] + node _T_2206 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 413:104] + node _T_2207 = and(_T_2205, _T_2206) @[lsu_bus_buffer.scala 413:92] + node _T_2208 = or(_T_2200, _T_2207) @[lsu_bus_buffer.scala 412:86] + node _T_2209 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2210 = and(_T_2209, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2211 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 414:64] + node _T_2212 = and(_T_2210, _T_2211) @[lsu_bus_buffer.scala 414:52] + node _T_2213 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 414:85] + node _T_2214 = and(_T_2212, _T_2213) @[lsu_bus_buffer.scala 414:73] + node _T_2215 = or(_T_2208, _T_2214) @[lsu_bus_buffer.scala 413:114] + node _T_2216 = and(_T_2195, _T_2215) @[lsu_bus_buffer.scala 411:113] + node _T_2217 = bits(buf_age[1], 1, 1) @[lsu_bus_buffer.scala 414:109] + node _T_2218 = or(_T_2216, _T_2217) @[lsu_bus_buffer.scala 414:97] + node _T_2219 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2220 = and(_T_2219, buf_state_en[1]) @[lsu_bus_buffer.scala 411:94] + node _T_2221 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2222 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2223 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2224 = and(_T_2222, _T_2223) @[lsu_bus_buffer.scala 412:57] + node _T_2225 = or(_T_2221, _T_2224) @[lsu_bus_buffer.scala 412:31] + node _T_2226 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2227 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2228 = and(_T_2226, _T_2227) @[lsu_bus_buffer.scala 413:41] + node _T_2229 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 413:83] + node _T_2230 = and(_T_2228, _T_2229) @[lsu_bus_buffer.scala 413:71] + node _T_2231 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 413:104] + node _T_2232 = and(_T_2230, _T_2231) @[lsu_bus_buffer.scala 413:92] + node _T_2233 = or(_T_2225, _T_2232) @[lsu_bus_buffer.scala 412:86] + node _T_2234 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2235 = and(_T_2234, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2236 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 414:64] + node _T_2237 = and(_T_2235, _T_2236) @[lsu_bus_buffer.scala 414:52] + node _T_2238 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 414:85] + node _T_2239 = and(_T_2237, _T_2238) @[lsu_bus_buffer.scala 414:73] + node _T_2240 = or(_T_2233, _T_2239) @[lsu_bus_buffer.scala 413:114] + node _T_2241 = and(_T_2220, _T_2240) @[lsu_bus_buffer.scala 411:113] + node _T_2242 = bits(buf_age[1], 2, 2) @[lsu_bus_buffer.scala 414:109] + node _T_2243 = or(_T_2241, _T_2242) @[lsu_bus_buffer.scala 414:97] + node _T_2244 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2245 = and(_T_2244, buf_state_en[1]) @[lsu_bus_buffer.scala 411:94] + node _T_2246 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2247 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2248 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2249 = and(_T_2247, _T_2248) @[lsu_bus_buffer.scala 412:57] + node _T_2250 = or(_T_2246, _T_2249) @[lsu_bus_buffer.scala 412:31] + node _T_2251 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2252 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2253 = and(_T_2251, _T_2252) @[lsu_bus_buffer.scala 413:41] + node _T_2254 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 413:83] + node _T_2255 = and(_T_2253, _T_2254) @[lsu_bus_buffer.scala 413:71] + node _T_2256 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 413:104] + node _T_2257 = and(_T_2255, _T_2256) @[lsu_bus_buffer.scala 413:92] + node _T_2258 = or(_T_2250, _T_2257) @[lsu_bus_buffer.scala 412:86] + node _T_2259 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2260 = and(_T_2259, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2261 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 414:64] + node _T_2262 = and(_T_2260, _T_2261) @[lsu_bus_buffer.scala 414:52] + node _T_2263 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 414:85] + node _T_2264 = and(_T_2262, _T_2263) @[lsu_bus_buffer.scala 414:73] + node _T_2265 = or(_T_2258, _T_2264) @[lsu_bus_buffer.scala 413:114] + node _T_2266 = and(_T_2245, _T_2265) @[lsu_bus_buffer.scala 411:113] + node _T_2267 = bits(buf_age[1], 3, 3) @[lsu_bus_buffer.scala 414:109] + node _T_2268 = or(_T_2266, _T_2267) @[lsu_bus_buffer.scala 414:97] + node _T_2269 = cat(_T_2268, _T_2243) @[Cat.scala 29:58] + node _T_2270 = cat(_T_2269, _T_2218) @[Cat.scala 29:58] + node buf_age_in_1 = cat(_T_2270, _T_2193) @[Cat.scala 29:58] + node _T_2271 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2272 = and(_T_2271, buf_state_en[2]) @[lsu_bus_buffer.scala 411:94] + node _T_2273 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2274 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2275 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2276 = and(_T_2274, _T_2275) @[lsu_bus_buffer.scala 412:57] + node _T_2277 = or(_T_2273, _T_2276) @[lsu_bus_buffer.scala 412:31] + node _T_2278 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2279 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2280 = and(_T_2278, _T_2279) @[lsu_bus_buffer.scala 413:41] + node _T_2281 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 413:83] + node _T_2282 = and(_T_2280, _T_2281) @[lsu_bus_buffer.scala 413:71] + node _T_2283 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 413:104] + node _T_2284 = and(_T_2282, _T_2283) @[lsu_bus_buffer.scala 413:92] + node _T_2285 = or(_T_2277, _T_2284) @[lsu_bus_buffer.scala 412:86] + node _T_2286 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2287 = and(_T_2286, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2288 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 414:64] + node _T_2289 = and(_T_2287, _T_2288) @[lsu_bus_buffer.scala 414:52] + node _T_2290 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 414:85] + node _T_2291 = and(_T_2289, _T_2290) @[lsu_bus_buffer.scala 414:73] + node _T_2292 = or(_T_2285, _T_2291) @[lsu_bus_buffer.scala 413:114] + node _T_2293 = and(_T_2272, _T_2292) @[lsu_bus_buffer.scala 411:113] + node _T_2294 = bits(buf_age[2], 0, 0) @[lsu_bus_buffer.scala 414:109] + node _T_2295 = or(_T_2293, _T_2294) @[lsu_bus_buffer.scala 414:97] + node _T_2296 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2297 = and(_T_2296, buf_state_en[2]) @[lsu_bus_buffer.scala 411:94] + node _T_2298 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2299 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2300 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2301 = and(_T_2299, _T_2300) @[lsu_bus_buffer.scala 412:57] + node _T_2302 = or(_T_2298, _T_2301) @[lsu_bus_buffer.scala 412:31] + node _T_2303 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2304 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2305 = and(_T_2303, _T_2304) @[lsu_bus_buffer.scala 413:41] + node _T_2306 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 413:83] + node _T_2307 = and(_T_2305, _T_2306) @[lsu_bus_buffer.scala 413:71] + node _T_2308 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 413:104] + node _T_2309 = and(_T_2307, _T_2308) @[lsu_bus_buffer.scala 413:92] + node _T_2310 = or(_T_2302, _T_2309) @[lsu_bus_buffer.scala 412:86] + node _T_2311 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2312 = and(_T_2311, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2313 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 414:64] + node _T_2314 = and(_T_2312, _T_2313) @[lsu_bus_buffer.scala 414:52] + node _T_2315 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 414:85] + node _T_2316 = and(_T_2314, _T_2315) @[lsu_bus_buffer.scala 414:73] + node _T_2317 = or(_T_2310, _T_2316) @[lsu_bus_buffer.scala 413:114] + node _T_2318 = and(_T_2297, _T_2317) @[lsu_bus_buffer.scala 411:113] + node _T_2319 = bits(buf_age[2], 1, 1) @[lsu_bus_buffer.scala 414:109] + node _T_2320 = or(_T_2318, _T_2319) @[lsu_bus_buffer.scala 414:97] + node _T_2321 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2322 = and(_T_2321, buf_state_en[2]) @[lsu_bus_buffer.scala 411:94] + node _T_2323 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2324 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2325 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2326 = and(_T_2324, _T_2325) @[lsu_bus_buffer.scala 412:57] + node _T_2327 = or(_T_2323, _T_2326) @[lsu_bus_buffer.scala 412:31] + node _T_2328 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2329 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2330 = and(_T_2328, _T_2329) @[lsu_bus_buffer.scala 413:41] + node _T_2331 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 413:83] + node _T_2332 = and(_T_2330, _T_2331) @[lsu_bus_buffer.scala 413:71] + node _T_2333 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 413:104] + node _T_2334 = and(_T_2332, _T_2333) @[lsu_bus_buffer.scala 413:92] + node _T_2335 = or(_T_2327, _T_2334) @[lsu_bus_buffer.scala 412:86] + node _T_2336 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2337 = and(_T_2336, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2338 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 414:64] + node _T_2339 = and(_T_2337, _T_2338) @[lsu_bus_buffer.scala 414:52] + node _T_2340 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 414:85] + node _T_2341 = and(_T_2339, _T_2340) @[lsu_bus_buffer.scala 414:73] + node _T_2342 = or(_T_2335, _T_2341) @[lsu_bus_buffer.scala 413:114] + node _T_2343 = and(_T_2322, _T_2342) @[lsu_bus_buffer.scala 411:113] + node _T_2344 = bits(buf_age[2], 2, 2) @[lsu_bus_buffer.scala 414:109] + node _T_2345 = or(_T_2343, _T_2344) @[lsu_bus_buffer.scala 414:97] + node _T_2346 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2347 = and(_T_2346, buf_state_en[2]) @[lsu_bus_buffer.scala 411:94] + node _T_2348 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2349 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2350 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2351 = and(_T_2349, _T_2350) @[lsu_bus_buffer.scala 412:57] + node _T_2352 = or(_T_2348, _T_2351) @[lsu_bus_buffer.scala 412:31] + node _T_2353 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2354 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2355 = and(_T_2353, _T_2354) @[lsu_bus_buffer.scala 413:41] + node _T_2356 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 413:83] + node _T_2357 = and(_T_2355, _T_2356) @[lsu_bus_buffer.scala 413:71] + node _T_2358 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 413:104] + node _T_2359 = and(_T_2357, _T_2358) @[lsu_bus_buffer.scala 413:92] + node _T_2360 = or(_T_2352, _T_2359) @[lsu_bus_buffer.scala 412:86] + node _T_2361 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2362 = and(_T_2361, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2363 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 414:64] + node _T_2364 = and(_T_2362, _T_2363) @[lsu_bus_buffer.scala 414:52] + node _T_2365 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 414:85] + node _T_2366 = and(_T_2364, _T_2365) @[lsu_bus_buffer.scala 414:73] + node _T_2367 = or(_T_2360, _T_2366) @[lsu_bus_buffer.scala 413:114] + node _T_2368 = and(_T_2347, _T_2367) @[lsu_bus_buffer.scala 411:113] + node _T_2369 = bits(buf_age[2], 3, 3) @[lsu_bus_buffer.scala 414:109] + node _T_2370 = or(_T_2368, _T_2369) @[lsu_bus_buffer.scala 414:97] + node _T_2371 = cat(_T_2370, _T_2345) @[Cat.scala 29:58] + node _T_2372 = cat(_T_2371, _T_2320) @[Cat.scala 29:58] + node buf_age_in_2 = cat(_T_2372, _T_2295) @[Cat.scala 29:58] + node _T_2373 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2374 = and(_T_2373, buf_state_en[3]) @[lsu_bus_buffer.scala 411:94] + node _T_2375 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2376 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2377 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2378 = and(_T_2376, _T_2377) @[lsu_bus_buffer.scala 412:57] + node _T_2379 = or(_T_2375, _T_2378) @[lsu_bus_buffer.scala 412:31] + node _T_2380 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2381 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2382 = and(_T_2380, _T_2381) @[lsu_bus_buffer.scala 413:41] + node _T_2383 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 413:83] + node _T_2384 = and(_T_2382, _T_2383) @[lsu_bus_buffer.scala 413:71] + node _T_2385 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 413:104] + node _T_2386 = and(_T_2384, _T_2385) @[lsu_bus_buffer.scala 413:92] + node _T_2387 = or(_T_2379, _T_2386) @[lsu_bus_buffer.scala 412:86] + node _T_2388 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2389 = and(_T_2388, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2390 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 414:64] + node _T_2391 = and(_T_2389, _T_2390) @[lsu_bus_buffer.scala 414:52] + node _T_2392 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 414:85] + node _T_2393 = and(_T_2391, _T_2392) @[lsu_bus_buffer.scala 414:73] + node _T_2394 = or(_T_2387, _T_2393) @[lsu_bus_buffer.scala 413:114] + node _T_2395 = and(_T_2374, _T_2394) @[lsu_bus_buffer.scala 411:113] + node _T_2396 = bits(buf_age[3], 0, 0) @[lsu_bus_buffer.scala 414:109] + node _T_2397 = or(_T_2395, _T_2396) @[lsu_bus_buffer.scala 414:97] + node _T_2398 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2399 = and(_T_2398, buf_state_en[3]) @[lsu_bus_buffer.scala 411:94] + node _T_2400 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2401 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2402 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2403 = and(_T_2401, _T_2402) @[lsu_bus_buffer.scala 412:57] + node _T_2404 = or(_T_2400, _T_2403) @[lsu_bus_buffer.scala 412:31] + node _T_2405 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2406 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2407 = and(_T_2405, _T_2406) @[lsu_bus_buffer.scala 413:41] + node _T_2408 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 413:83] + node _T_2409 = and(_T_2407, _T_2408) @[lsu_bus_buffer.scala 413:71] + node _T_2410 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 413:104] + node _T_2411 = and(_T_2409, _T_2410) @[lsu_bus_buffer.scala 413:92] + node _T_2412 = or(_T_2404, _T_2411) @[lsu_bus_buffer.scala 412:86] + node _T_2413 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2414 = and(_T_2413, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2415 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 414:64] + node _T_2416 = and(_T_2414, _T_2415) @[lsu_bus_buffer.scala 414:52] + node _T_2417 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 414:85] + node _T_2418 = and(_T_2416, _T_2417) @[lsu_bus_buffer.scala 414:73] + node _T_2419 = or(_T_2412, _T_2418) @[lsu_bus_buffer.scala 413:114] + node _T_2420 = and(_T_2399, _T_2419) @[lsu_bus_buffer.scala 411:113] + node _T_2421 = bits(buf_age[3], 1, 1) @[lsu_bus_buffer.scala 414:109] + node _T_2422 = or(_T_2420, _T_2421) @[lsu_bus_buffer.scala 414:97] + node _T_2423 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2424 = and(_T_2423, buf_state_en[3]) @[lsu_bus_buffer.scala 411:94] + node _T_2425 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2426 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2427 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2428 = and(_T_2426, _T_2427) @[lsu_bus_buffer.scala 412:57] + node _T_2429 = or(_T_2425, _T_2428) @[lsu_bus_buffer.scala 412:31] + node _T_2430 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2431 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2432 = and(_T_2430, _T_2431) @[lsu_bus_buffer.scala 413:41] + node _T_2433 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 413:83] + node _T_2434 = and(_T_2432, _T_2433) @[lsu_bus_buffer.scala 413:71] + node _T_2435 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 413:104] + node _T_2436 = and(_T_2434, _T_2435) @[lsu_bus_buffer.scala 413:92] + node _T_2437 = or(_T_2429, _T_2436) @[lsu_bus_buffer.scala 412:86] + node _T_2438 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2439 = and(_T_2438, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2440 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 414:64] + node _T_2441 = and(_T_2439, _T_2440) @[lsu_bus_buffer.scala 414:52] + node _T_2442 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 414:85] + node _T_2443 = and(_T_2441, _T_2442) @[lsu_bus_buffer.scala 414:73] + node _T_2444 = or(_T_2437, _T_2443) @[lsu_bus_buffer.scala 413:114] + node _T_2445 = and(_T_2424, _T_2444) @[lsu_bus_buffer.scala 411:113] + node _T_2446 = bits(buf_age[3], 2, 2) @[lsu_bus_buffer.scala 414:109] + node _T_2447 = or(_T_2445, _T_2446) @[lsu_bus_buffer.scala 414:97] + node _T_2448 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 411:83] + node _T_2449 = and(_T_2448, buf_state_en[3]) @[lsu_bus_buffer.scala 411:94] + node _T_2450 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 412:20] + node _T_2451 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 412:47] + node _T_2452 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 412:59] + node _T_2453 = and(_T_2451, _T_2452) @[lsu_bus_buffer.scala 412:57] + node _T_2454 = or(_T_2450, _T_2453) @[lsu_bus_buffer.scala 412:31] + node _T_2455 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 413:23] + node _T_2456 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 413:53] + node _T_2457 = and(_T_2455, _T_2456) @[lsu_bus_buffer.scala 413:41] + node _T_2458 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 413:83] + node _T_2459 = and(_T_2457, _T_2458) @[lsu_bus_buffer.scala 413:71] + node _T_2460 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 413:104] + node _T_2461 = and(_T_2459, _T_2460) @[lsu_bus_buffer.scala 413:92] + node _T_2462 = or(_T_2454, _T_2461) @[lsu_bus_buffer.scala 412:86] + node _T_2463 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 414:17] + node _T_2464 = and(_T_2463, io.ldst_dual_r) @[lsu_bus_buffer.scala 414:35] + node _T_2465 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 414:64] + node _T_2466 = and(_T_2464, _T_2465) @[lsu_bus_buffer.scala 414:52] + node _T_2467 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 414:85] + node _T_2468 = and(_T_2466, _T_2467) @[lsu_bus_buffer.scala 414:73] + node _T_2469 = or(_T_2462, _T_2468) @[lsu_bus_buffer.scala 413:114] + node _T_2470 = and(_T_2449, _T_2469) @[lsu_bus_buffer.scala 411:113] + node _T_2471 = bits(buf_age[3], 3, 3) @[lsu_bus_buffer.scala 414:109] + node _T_2472 = or(_T_2470, _T_2471) @[lsu_bus_buffer.scala 414:97] + node _T_2473 = cat(_T_2472, _T_2447) @[Cat.scala 29:58] + node _T_2474 = cat(_T_2473, _T_2422) @[Cat.scala 29:58] + node buf_age_in_3 = cat(_T_2474, _T_2397) @[Cat.scala 29:58] + wire buf_ageQ : UInt<4>[4] @[lsu_bus_buffer.scala 415:22] + buf_ageQ[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 416:12] + buf_ageQ[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 416:12] + buf_ageQ[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 416:12] + buf_ageQ[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 416:12] + node _T_2475 = bits(buf_ageQ[0], 0, 0) @[lsu_bus_buffer.scala 417:72] + node _T_2476 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2477 = and(_T_2476, buf_cmd_state_bus_en[0]) @[lsu_bus_buffer.scala 417:103] + node _T_2478 = eq(_T_2477, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2479 = and(_T_2475, _T_2478) @[lsu_bus_buffer.scala 417:76] + node _T_2480 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2481 = and(_T_2479, _T_2480) @[lsu_bus_buffer.scala 417:130] + node _T_2482 = bits(buf_ageQ[0], 1, 1) @[lsu_bus_buffer.scala 417:72] + node _T_2483 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2484 = and(_T_2483, buf_cmd_state_bus_en[1]) @[lsu_bus_buffer.scala 417:103] + node _T_2485 = eq(_T_2484, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2486 = and(_T_2482, _T_2485) @[lsu_bus_buffer.scala 417:76] + node _T_2487 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2488 = and(_T_2486, _T_2487) @[lsu_bus_buffer.scala 417:130] + node _T_2489 = bits(buf_ageQ[0], 2, 2) @[lsu_bus_buffer.scala 417:72] + node _T_2490 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2491 = and(_T_2490, buf_cmd_state_bus_en[2]) @[lsu_bus_buffer.scala 417:103] + node _T_2492 = eq(_T_2491, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2493 = and(_T_2489, _T_2492) @[lsu_bus_buffer.scala 417:76] + node _T_2494 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2495 = and(_T_2493, _T_2494) @[lsu_bus_buffer.scala 417:130] + node _T_2496 = bits(buf_ageQ[0], 3, 3) @[lsu_bus_buffer.scala 417:72] + node _T_2497 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2498 = and(_T_2497, buf_cmd_state_bus_en[3]) @[lsu_bus_buffer.scala 417:103] + node _T_2499 = eq(_T_2498, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2500 = and(_T_2496, _T_2499) @[lsu_bus_buffer.scala 417:76] + node _T_2501 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2502 = and(_T_2500, _T_2501) @[lsu_bus_buffer.scala 417:130] + node _T_2503 = cat(_T_2502, _T_2495) @[Cat.scala 29:58] + node _T_2504 = cat(_T_2503, _T_2488) @[Cat.scala 29:58] + node _T_2505 = cat(_T_2504, _T_2481) @[Cat.scala 29:58] + node _T_2506 = bits(buf_ageQ[1], 0, 0) @[lsu_bus_buffer.scala 417:72] + node _T_2507 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2508 = and(_T_2507, buf_cmd_state_bus_en[0]) @[lsu_bus_buffer.scala 417:103] + node _T_2509 = eq(_T_2508, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2510 = and(_T_2506, _T_2509) @[lsu_bus_buffer.scala 417:76] + node _T_2511 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2512 = and(_T_2510, _T_2511) @[lsu_bus_buffer.scala 417:130] + node _T_2513 = bits(buf_ageQ[1], 1, 1) @[lsu_bus_buffer.scala 417:72] + node _T_2514 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2515 = and(_T_2514, buf_cmd_state_bus_en[1]) @[lsu_bus_buffer.scala 417:103] + node _T_2516 = eq(_T_2515, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2517 = and(_T_2513, _T_2516) @[lsu_bus_buffer.scala 417:76] + node _T_2518 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2519 = and(_T_2517, _T_2518) @[lsu_bus_buffer.scala 417:130] + node _T_2520 = bits(buf_ageQ[1], 2, 2) @[lsu_bus_buffer.scala 417:72] + node _T_2521 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2522 = and(_T_2521, buf_cmd_state_bus_en[2]) @[lsu_bus_buffer.scala 417:103] + node _T_2523 = eq(_T_2522, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2524 = and(_T_2520, _T_2523) @[lsu_bus_buffer.scala 417:76] + node _T_2525 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2526 = and(_T_2524, _T_2525) @[lsu_bus_buffer.scala 417:130] + node _T_2527 = bits(buf_ageQ[1], 3, 3) @[lsu_bus_buffer.scala 417:72] + node _T_2528 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2529 = and(_T_2528, buf_cmd_state_bus_en[3]) @[lsu_bus_buffer.scala 417:103] + node _T_2530 = eq(_T_2529, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2531 = and(_T_2527, _T_2530) @[lsu_bus_buffer.scala 417:76] + node _T_2532 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2533 = and(_T_2531, _T_2532) @[lsu_bus_buffer.scala 417:130] + node _T_2534 = cat(_T_2533, _T_2526) @[Cat.scala 29:58] + node _T_2535 = cat(_T_2534, _T_2519) @[Cat.scala 29:58] + node _T_2536 = cat(_T_2535, _T_2512) @[Cat.scala 29:58] + node _T_2537 = bits(buf_ageQ[2], 0, 0) @[lsu_bus_buffer.scala 417:72] + node _T_2538 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2539 = and(_T_2538, buf_cmd_state_bus_en[0]) @[lsu_bus_buffer.scala 417:103] + node _T_2540 = eq(_T_2539, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2541 = and(_T_2537, _T_2540) @[lsu_bus_buffer.scala 417:76] + node _T_2542 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2543 = and(_T_2541, _T_2542) @[lsu_bus_buffer.scala 417:130] + node _T_2544 = bits(buf_ageQ[2], 1, 1) @[lsu_bus_buffer.scala 417:72] + node _T_2545 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2546 = and(_T_2545, buf_cmd_state_bus_en[1]) @[lsu_bus_buffer.scala 417:103] + node _T_2547 = eq(_T_2546, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2548 = and(_T_2544, _T_2547) @[lsu_bus_buffer.scala 417:76] + node _T_2549 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2550 = and(_T_2548, _T_2549) @[lsu_bus_buffer.scala 417:130] + node _T_2551 = bits(buf_ageQ[2], 2, 2) @[lsu_bus_buffer.scala 417:72] + node _T_2552 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2553 = and(_T_2552, buf_cmd_state_bus_en[2]) @[lsu_bus_buffer.scala 417:103] + node _T_2554 = eq(_T_2553, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2555 = and(_T_2551, _T_2554) @[lsu_bus_buffer.scala 417:76] + node _T_2556 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2557 = and(_T_2555, _T_2556) @[lsu_bus_buffer.scala 417:130] + node _T_2558 = bits(buf_ageQ[2], 3, 3) @[lsu_bus_buffer.scala 417:72] + node _T_2559 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2560 = and(_T_2559, buf_cmd_state_bus_en[3]) @[lsu_bus_buffer.scala 417:103] + node _T_2561 = eq(_T_2560, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2562 = and(_T_2558, _T_2561) @[lsu_bus_buffer.scala 417:76] + node _T_2563 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2564 = and(_T_2562, _T_2563) @[lsu_bus_buffer.scala 417:130] + node _T_2565 = cat(_T_2564, _T_2557) @[Cat.scala 29:58] + node _T_2566 = cat(_T_2565, _T_2550) @[Cat.scala 29:58] + node _T_2567 = cat(_T_2566, _T_2543) @[Cat.scala 29:58] + node _T_2568 = bits(buf_ageQ[3], 0, 0) @[lsu_bus_buffer.scala 417:72] + node _T_2569 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2570 = and(_T_2569, buf_cmd_state_bus_en[0]) @[lsu_bus_buffer.scala 417:103] + node _T_2571 = eq(_T_2570, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2572 = and(_T_2568, _T_2571) @[lsu_bus_buffer.scala 417:76] + node _T_2573 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2574 = and(_T_2572, _T_2573) @[lsu_bus_buffer.scala 417:130] + node _T_2575 = bits(buf_ageQ[3], 1, 1) @[lsu_bus_buffer.scala 417:72] + node _T_2576 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2577 = and(_T_2576, buf_cmd_state_bus_en[1]) @[lsu_bus_buffer.scala 417:103] + node _T_2578 = eq(_T_2577, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2579 = and(_T_2575, _T_2578) @[lsu_bus_buffer.scala 417:76] + node _T_2580 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2581 = and(_T_2579, _T_2580) @[lsu_bus_buffer.scala 417:130] + node _T_2582 = bits(buf_ageQ[3], 2, 2) @[lsu_bus_buffer.scala 417:72] + node _T_2583 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2584 = and(_T_2583, buf_cmd_state_bus_en[2]) @[lsu_bus_buffer.scala 417:103] + node _T_2585 = eq(_T_2584, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2586 = and(_T_2582, _T_2585) @[lsu_bus_buffer.scala 417:76] + node _T_2587 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2588 = and(_T_2586, _T_2587) @[lsu_bus_buffer.scala 417:130] + node _T_2589 = bits(buf_ageQ[3], 3, 3) @[lsu_bus_buffer.scala 417:72] + node _T_2590 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 417:93] + node _T_2591 = and(_T_2590, buf_cmd_state_bus_en[3]) @[lsu_bus_buffer.scala 417:103] + node _T_2592 = eq(_T_2591, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:78] + node _T_2593 = and(_T_2589, _T_2592) @[lsu_bus_buffer.scala 417:76] + node _T_2594 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 417:132] + node _T_2595 = and(_T_2593, _T_2594) @[lsu_bus_buffer.scala 417:130] + node _T_2596 = cat(_T_2595, _T_2588) @[Cat.scala 29:58] + node _T_2597 = cat(_T_2596, _T_2581) @[Cat.scala 29:58] + node _T_2598 = cat(_T_2597, _T_2574) @[Cat.scala 29:58] + buf_age[0] <= _T_2505 @[lsu_bus_buffer.scala 417:11] + buf_age[1] <= _T_2536 @[lsu_bus_buffer.scala 417:11] + buf_age[2] <= _T_2567 @[lsu_bus_buffer.scala 417:11] + buf_age[3] <= _T_2598 @[lsu_bus_buffer.scala 417:11] + node _T_2599 = eq(UInt<1>("h00"), UInt<1>("h00")) @[lsu_bus_buffer.scala 418:76] + node _T_2600 = bits(buf_age[0], 0, 0) @[lsu_bus_buffer.scala 418:100] + node _T_2601 = eq(_T_2600, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2602 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2603 = and(_T_2601, _T_2602) @[lsu_bus_buffer.scala 418:104] + node _T_2604 = mux(_T_2599, UInt<1>("h00"), _T_2603) @[lsu_bus_buffer.scala 418:72] + node _T_2605 = eq(UInt<1>("h00"), UInt<1>("h01")) @[lsu_bus_buffer.scala 418:76] + node _T_2606 = bits(buf_age[0], 1, 1) @[lsu_bus_buffer.scala 418:100] + node _T_2607 = eq(_T_2606, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2608 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2609 = and(_T_2607, _T_2608) @[lsu_bus_buffer.scala 418:104] + node _T_2610 = mux(_T_2605, UInt<1>("h00"), _T_2609) @[lsu_bus_buffer.scala 418:72] + node _T_2611 = eq(UInt<1>("h00"), UInt<2>("h02")) @[lsu_bus_buffer.scala 418:76] + node _T_2612 = bits(buf_age[0], 2, 2) @[lsu_bus_buffer.scala 418:100] + node _T_2613 = eq(_T_2612, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2614 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2615 = and(_T_2613, _T_2614) @[lsu_bus_buffer.scala 418:104] + node _T_2616 = mux(_T_2611, UInt<1>("h00"), _T_2615) @[lsu_bus_buffer.scala 418:72] + node _T_2617 = eq(UInt<1>("h00"), UInt<2>("h03")) @[lsu_bus_buffer.scala 418:76] + node _T_2618 = bits(buf_age[0], 3, 3) @[lsu_bus_buffer.scala 418:100] + node _T_2619 = eq(_T_2618, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2620 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2621 = and(_T_2619, _T_2620) @[lsu_bus_buffer.scala 418:104] + node _T_2622 = mux(_T_2617, UInt<1>("h00"), _T_2621) @[lsu_bus_buffer.scala 418:72] + node _T_2623 = cat(_T_2622, _T_2616) @[Cat.scala 29:58] + node _T_2624 = cat(_T_2623, _T_2610) @[Cat.scala 29:58] + node _T_2625 = cat(_T_2624, _T_2604) @[Cat.scala 29:58] + node _T_2626 = eq(UInt<1>("h01"), UInt<1>("h00")) @[lsu_bus_buffer.scala 418:76] + node _T_2627 = bits(buf_age[1], 0, 0) @[lsu_bus_buffer.scala 418:100] + node _T_2628 = eq(_T_2627, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2629 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2630 = and(_T_2628, _T_2629) @[lsu_bus_buffer.scala 418:104] + node _T_2631 = mux(_T_2626, UInt<1>("h00"), _T_2630) @[lsu_bus_buffer.scala 418:72] + node _T_2632 = eq(UInt<1>("h01"), UInt<1>("h01")) @[lsu_bus_buffer.scala 418:76] + node _T_2633 = bits(buf_age[1], 1, 1) @[lsu_bus_buffer.scala 418:100] + node _T_2634 = eq(_T_2633, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2635 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2636 = and(_T_2634, _T_2635) @[lsu_bus_buffer.scala 418:104] + node _T_2637 = mux(_T_2632, UInt<1>("h00"), _T_2636) @[lsu_bus_buffer.scala 418:72] + node _T_2638 = eq(UInt<1>("h01"), UInt<2>("h02")) @[lsu_bus_buffer.scala 418:76] + node _T_2639 = bits(buf_age[1], 2, 2) @[lsu_bus_buffer.scala 418:100] + node _T_2640 = eq(_T_2639, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2641 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2642 = and(_T_2640, _T_2641) @[lsu_bus_buffer.scala 418:104] + node _T_2643 = mux(_T_2638, UInt<1>("h00"), _T_2642) @[lsu_bus_buffer.scala 418:72] + node _T_2644 = eq(UInt<1>("h01"), UInt<2>("h03")) @[lsu_bus_buffer.scala 418:76] + node _T_2645 = bits(buf_age[1], 3, 3) @[lsu_bus_buffer.scala 418:100] + node _T_2646 = eq(_T_2645, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2647 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2648 = and(_T_2646, _T_2647) @[lsu_bus_buffer.scala 418:104] + node _T_2649 = mux(_T_2644, UInt<1>("h00"), _T_2648) @[lsu_bus_buffer.scala 418:72] + node _T_2650 = cat(_T_2649, _T_2643) @[Cat.scala 29:58] + node _T_2651 = cat(_T_2650, _T_2637) @[Cat.scala 29:58] + node _T_2652 = cat(_T_2651, _T_2631) @[Cat.scala 29:58] + node _T_2653 = eq(UInt<2>("h02"), UInt<1>("h00")) @[lsu_bus_buffer.scala 418:76] + node _T_2654 = bits(buf_age[2], 0, 0) @[lsu_bus_buffer.scala 418:100] + node _T_2655 = eq(_T_2654, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2656 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2657 = and(_T_2655, _T_2656) @[lsu_bus_buffer.scala 418:104] + node _T_2658 = mux(_T_2653, UInt<1>("h00"), _T_2657) @[lsu_bus_buffer.scala 418:72] + node _T_2659 = eq(UInt<2>("h02"), UInt<1>("h01")) @[lsu_bus_buffer.scala 418:76] + node _T_2660 = bits(buf_age[2], 1, 1) @[lsu_bus_buffer.scala 418:100] + node _T_2661 = eq(_T_2660, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2662 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2663 = and(_T_2661, _T_2662) @[lsu_bus_buffer.scala 418:104] + node _T_2664 = mux(_T_2659, UInt<1>("h00"), _T_2663) @[lsu_bus_buffer.scala 418:72] + node _T_2665 = eq(UInt<2>("h02"), UInt<2>("h02")) @[lsu_bus_buffer.scala 418:76] + node _T_2666 = bits(buf_age[2], 2, 2) @[lsu_bus_buffer.scala 418:100] + node _T_2667 = eq(_T_2666, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2668 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2669 = and(_T_2667, _T_2668) @[lsu_bus_buffer.scala 418:104] + node _T_2670 = mux(_T_2665, UInt<1>("h00"), _T_2669) @[lsu_bus_buffer.scala 418:72] + node _T_2671 = eq(UInt<2>("h02"), UInt<2>("h03")) @[lsu_bus_buffer.scala 418:76] + node _T_2672 = bits(buf_age[2], 3, 3) @[lsu_bus_buffer.scala 418:100] + node _T_2673 = eq(_T_2672, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2674 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2675 = and(_T_2673, _T_2674) @[lsu_bus_buffer.scala 418:104] + node _T_2676 = mux(_T_2671, UInt<1>("h00"), _T_2675) @[lsu_bus_buffer.scala 418:72] + node _T_2677 = cat(_T_2676, _T_2670) @[Cat.scala 29:58] + node _T_2678 = cat(_T_2677, _T_2664) @[Cat.scala 29:58] + node _T_2679 = cat(_T_2678, _T_2658) @[Cat.scala 29:58] + node _T_2680 = eq(UInt<2>("h03"), UInt<1>("h00")) @[lsu_bus_buffer.scala 418:76] + node _T_2681 = bits(buf_age[3], 0, 0) @[lsu_bus_buffer.scala 418:100] + node _T_2682 = eq(_T_2681, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2683 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2684 = and(_T_2682, _T_2683) @[lsu_bus_buffer.scala 418:104] + node _T_2685 = mux(_T_2680, UInt<1>("h00"), _T_2684) @[lsu_bus_buffer.scala 418:72] + node _T_2686 = eq(UInt<2>("h03"), UInt<1>("h01")) @[lsu_bus_buffer.scala 418:76] + node _T_2687 = bits(buf_age[3], 1, 1) @[lsu_bus_buffer.scala 418:100] + node _T_2688 = eq(_T_2687, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2689 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2690 = and(_T_2688, _T_2689) @[lsu_bus_buffer.scala 418:104] + node _T_2691 = mux(_T_2686, UInt<1>("h00"), _T_2690) @[lsu_bus_buffer.scala 418:72] + node _T_2692 = eq(UInt<2>("h03"), UInt<2>("h02")) @[lsu_bus_buffer.scala 418:76] + node _T_2693 = bits(buf_age[3], 2, 2) @[lsu_bus_buffer.scala 418:100] + node _T_2694 = eq(_T_2693, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2695 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2696 = and(_T_2694, _T_2695) @[lsu_bus_buffer.scala 418:104] + node _T_2697 = mux(_T_2692, UInt<1>("h00"), _T_2696) @[lsu_bus_buffer.scala 418:72] + node _T_2698 = eq(UInt<2>("h03"), UInt<2>("h03")) @[lsu_bus_buffer.scala 418:76] + node _T_2699 = bits(buf_age[3], 3, 3) @[lsu_bus_buffer.scala 418:100] + node _T_2700 = eq(_T_2699, UInt<1>("h00")) @[lsu_bus_buffer.scala 418:89] + node _T_2701 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 418:119] + node _T_2702 = and(_T_2700, _T_2701) @[lsu_bus_buffer.scala 418:104] + node _T_2703 = mux(_T_2698, UInt<1>("h00"), _T_2702) @[lsu_bus_buffer.scala 418:72] + node _T_2704 = cat(_T_2703, _T_2697) @[Cat.scala 29:58] + node _T_2705 = cat(_T_2704, _T_2691) @[Cat.scala 29:58] + node _T_2706 = cat(_T_2705, _T_2685) @[Cat.scala 29:58] + buf_age_younger[0] <= _T_2625 @[lsu_bus_buffer.scala 418:19] + buf_age_younger[1] <= _T_2652 @[lsu_bus_buffer.scala 418:19] + buf_age_younger[2] <= _T_2679 @[lsu_bus_buffer.scala 418:19] + buf_age_younger[3] <= _T_2706 @[lsu_bus_buffer.scala 418:19] + node _T_2707 = bits(buf_rspageQ[0], 0, 0) @[lsu_bus_buffer.scala 419:83] + node _T_2708 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2709 = and(_T_2707, _T_2708) @[lsu_bus_buffer.scala 419:87] + node _T_2710 = bits(buf_rspageQ[0], 1, 1) @[lsu_bus_buffer.scala 419:83] + node _T_2711 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2712 = and(_T_2710, _T_2711) @[lsu_bus_buffer.scala 419:87] + node _T_2713 = bits(buf_rspageQ[0], 2, 2) @[lsu_bus_buffer.scala 419:83] + node _T_2714 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2715 = and(_T_2713, _T_2714) @[lsu_bus_buffer.scala 419:87] + node _T_2716 = bits(buf_rspageQ[0], 3, 3) @[lsu_bus_buffer.scala 419:83] + node _T_2717 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2718 = and(_T_2716, _T_2717) @[lsu_bus_buffer.scala 419:87] + node _T_2719 = cat(_T_2718, _T_2715) @[Cat.scala 29:58] + node _T_2720 = cat(_T_2719, _T_2712) @[Cat.scala 29:58] + node _T_2721 = cat(_T_2720, _T_2709) @[Cat.scala 29:58] + node _T_2722 = bits(buf_rspageQ[1], 0, 0) @[lsu_bus_buffer.scala 419:83] + node _T_2723 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2724 = and(_T_2722, _T_2723) @[lsu_bus_buffer.scala 419:87] + node _T_2725 = bits(buf_rspageQ[1], 1, 1) @[lsu_bus_buffer.scala 419:83] + node _T_2726 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2727 = and(_T_2725, _T_2726) @[lsu_bus_buffer.scala 419:87] + node _T_2728 = bits(buf_rspageQ[1], 2, 2) @[lsu_bus_buffer.scala 419:83] + node _T_2729 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2730 = and(_T_2728, _T_2729) @[lsu_bus_buffer.scala 419:87] + node _T_2731 = bits(buf_rspageQ[1], 3, 3) @[lsu_bus_buffer.scala 419:83] + node _T_2732 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2733 = and(_T_2731, _T_2732) @[lsu_bus_buffer.scala 419:87] + node _T_2734 = cat(_T_2733, _T_2730) @[Cat.scala 29:58] + node _T_2735 = cat(_T_2734, _T_2727) @[Cat.scala 29:58] + node _T_2736 = cat(_T_2735, _T_2724) @[Cat.scala 29:58] + node _T_2737 = bits(buf_rspageQ[2], 0, 0) @[lsu_bus_buffer.scala 419:83] + node _T_2738 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2739 = and(_T_2737, _T_2738) @[lsu_bus_buffer.scala 419:87] + node _T_2740 = bits(buf_rspageQ[2], 1, 1) @[lsu_bus_buffer.scala 419:83] + node _T_2741 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2742 = and(_T_2740, _T_2741) @[lsu_bus_buffer.scala 419:87] + node _T_2743 = bits(buf_rspageQ[2], 2, 2) @[lsu_bus_buffer.scala 419:83] + node _T_2744 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2745 = and(_T_2743, _T_2744) @[lsu_bus_buffer.scala 419:87] + node _T_2746 = bits(buf_rspageQ[2], 3, 3) @[lsu_bus_buffer.scala 419:83] + node _T_2747 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2748 = and(_T_2746, _T_2747) @[lsu_bus_buffer.scala 419:87] + node _T_2749 = cat(_T_2748, _T_2745) @[Cat.scala 29:58] + node _T_2750 = cat(_T_2749, _T_2742) @[Cat.scala 29:58] + node _T_2751 = cat(_T_2750, _T_2739) @[Cat.scala 29:58] + node _T_2752 = bits(buf_rspageQ[3], 0, 0) @[lsu_bus_buffer.scala 419:83] + node _T_2753 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2754 = and(_T_2752, _T_2753) @[lsu_bus_buffer.scala 419:87] + node _T_2755 = bits(buf_rspageQ[3], 1, 1) @[lsu_bus_buffer.scala 419:83] + node _T_2756 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2757 = and(_T_2755, _T_2756) @[lsu_bus_buffer.scala 419:87] + node _T_2758 = bits(buf_rspageQ[3], 2, 2) @[lsu_bus_buffer.scala 419:83] + node _T_2759 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2760 = and(_T_2758, _T_2759) @[lsu_bus_buffer.scala 419:87] + node _T_2761 = bits(buf_rspageQ[3], 3, 3) @[lsu_bus_buffer.scala 419:83] + node _T_2762 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 419:102] + node _T_2763 = and(_T_2761, _T_2762) @[lsu_bus_buffer.scala 419:87] + node _T_2764 = cat(_T_2763, _T_2760) @[Cat.scala 29:58] + node _T_2765 = cat(_T_2764, _T_2757) @[Cat.scala 29:58] + node _T_2766 = cat(_T_2765, _T_2754) @[Cat.scala 29:58] + buf_rsp_pickage[0] <= _T_2721 @[lsu_bus_buffer.scala 419:19] + buf_rsp_pickage[1] <= _T_2736 @[lsu_bus_buffer.scala 419:19] + buf_rsp_pickage[2] <= _T_2751 @[lsu_bus_buffer.scala 419:19] + buf_rsp_pickage[3] <= _T_2766 @[lsu_bus_buffer.scala 419:19] + node _T_2767 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2768 = and(_T_2767, buf_state_en[0]) @[lsu_bus_buffer.scala 421:93] + node _T_2769 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2770 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2771 = or(_T_2769, _T_2770) @[lsu_bus_buffer.scala 422:32] + node _T_2772 = eq(_T_2771, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2773 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2774 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2775 = and(_T_2773, _T_2774) @[lsu_bus_buffer.scala 423:41] + node _T_2776 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 423:82] + node _T_2777 = and(_T_2775, _T_2776) @[lsu_bus_buffer.scala 423:71] + node _T_2778 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 423:101] + node _T_2779 = and(_T_2777, _T_2778) @[lsu_bus_buffer.scala 423:90] + node _T_2780 = or(_T_2772, _T_2779) @[lsu_bus_buffer.scala 422:59] + node _T_2781 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2782 = and(_T_2781, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2783 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 424:63] + node _T_2784 = and(_T_2782, _T_2783) @[lsu_bus_buffer.scala 424:52] + node _T_2785 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 424:82] + node _T_2786 = and(_T_2784, _T_2785) @[lsu_bus_buffer.scala 424:71] + node _T_2787 = or(_T_2780, _T_2786) @[lsu_bus_buffer.scala 423:110] + node _T_2788 = and(_T_2768, _T_2787) @[lsu_bus_buffer.scala 421:112] + node _T_2789 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2790 = and(_T_2789, buf_state_en[0]) @[lsu_bus_buffer.scala 421:93] + node _T_2791 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2792 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2793 = or(_T_2791, _T_2792) @[lsu_bus_buffer.scala 422:32] + node _T_2794 = eq(_T_2793, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2795 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2796 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2797 = and(_T_2795, _T_2796) @[lsu_bus_buffer.scala 423:41] + node _T_2798 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 423:82] + node _T_2799 = and(_T_2797, _T_2798) @[lsu_bus_buffer.scala 423:71] + node _T_2800 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 423:101] + node _T_2801 = and(_T_2799, _T_2800) @[lsu_bus_buffer.scala 423:90] + node _T_2802 = or(_T_2794, _T_2801) @[lsu_bus_buffer.scala 422:59] + node _T_2803 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2804 = and(_T_2803, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2805 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 424:63] + node _T_2806 = and(_T_2804, _T_2805) @[lsu_bus_buffer.scala 424:52] + node _T_2807 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 424:82] + node _T_2808 = and(_T_2806, _T_2807) @[lsu_bus_buffer.scala 424:71] + node _T_2809 = or(_T_2802, _T_2808) @[lsu_bus_buffer.scala 423:110] + node _T_2810 = and(_T_2790, _T_2809) @[lsu_bus_buffer.scala 421:112] + node _T_2811 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2812 = and(_T_2811, buf_state_en[0]) @[lsu_bus_buffer.scala 421:93] + node _T_2813 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2814 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2815 = or(_T_2813, _T_2814) @[lsu_bus_buffer.scala 422:32] + node _T_2816 = eq(_T_2815, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2817 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2818 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2819 = and(_T_2817, _T_2818) @[lsu_bus_buffer.scala 423:41] + node _T_2820 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 423:82] + node _T_2821 = and(_T_2819, _T_2820) @[lsu_bus_buffer.scala 423:71] + node _T_2822 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 423:101] + node _T_2823 = and(_T_2821, _T_2822) @[lsu_bus_buffer.scala 423:90] + node _T_2824 = or(_T_2816, _T_2823) @[lsu_bus_buffer.scala 422:59] + node _T_2825 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2826 = and(_T_2825, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2827 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 424:63] + node _T_2828 = and(_T_2826, _T_2827) @[lsu_bus_buffer.scala 424:52] + node _T_2829 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 424:82] + node _T_2830 = and(_T_2828, _T_2829) @[lsu_bus_buffer.scala 424:71] + node _T_2831 = or(_T_2824, _T_2830) @[lsu_bus_buffer.scala 423:110] + node _T_2832 = and(_T_2812, _T_2831) @[lsu_bus_buffer.scala 421:112] + node _T_2833 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2834 = and(_T_2833, buf_state_en[0]) @[lsu_bus_buffer.scala 421:93] + node _T_2835 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2836 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2837 = or(_T_2835, _T_2836) @[lsu_bus_buffer.scala 422:32] + node _T_2838 = eq(_T_2837, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2839 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2840 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2841 = and(_T_2839, _T_2840) @[lsu_bus_buffer.scala 423:41] + node _T_2842 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 423:82] + node _T_2843 = and(_T_2841, _T_2842) @[lsu_bus_buffer.scala 423:71] + node _T_2844 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 423:101] + node _T_2845 = and(_T_2843, _T_2844) @[lsu_bus_buffer.scala 423:90] + node _T_2846 = or(_T_2838, _T_2845) @[lsu_bus_buffer.scala 422:59] + node _T_2847 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2848 = and(_T_2847, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2849 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 424:63] + node _T_2850 = and(_T_2848, _T_2849) @[lsu_bus_buffer.scala 424:52] + node _T_2851 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 424:82] + node _T_2852 = and(_T_2850, _T_2851) @[lsu_bus_buffer.scala 424:71] + node _T_2853 = or(_T_2846, _T_2852) @[lsu_bus_buffer.scala 423:110] + node _T_2854 = and(_T_2834, _T_2853) @[lsu_bus_buffer.scala 421:112] + node _T_2855 = cat(_T_2854, _T_2832) @[Cat.scala 29:58] + node _T_2856 = cat(_T_2855, _T_2810) @[Cat.scala 29:58] + node _T_2857 = cat(_T_2856, _T_2788) @[Cat.scala 29:58] + node _T_2858 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2859 = and(_T_2858, buf_state_en[1]) @[lsu_bus_buffer.scala 421:93] + node _T_2860 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2861 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2862 = or(_T_2860, _T_2861) @[lsu_bus_buffer.scala 422:32] + node _T_2863 = eq(_T_2862, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2864 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2865 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2866 = and(_T_2864, _T_2865) @[lsu_bus_buffer.scala 423:41] + node _T_2867 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 423:82] + node _T_2868 = and(_T_2866, _T_2867) @[lsu_bus_buffer.scala 423:71] + node _T_2869 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 423:101] + node _T_2870 = and(_T_2868, _T_2869) @[lsu_bus_buffer.scala 423:90] + node _T_2871 = or(_T_2863, _T_2870) @[lsu_bus_buffer.scala 422:59] + node _T_2872 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2873 = and(_T_2872, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2874 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 424:63] + node _T_2875 = and(_T_2873, _T_2874) @[lsu_bus_buffer.scala 424:52] + node _T_2876 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 424:82] + node _T_2877 = and(_T_2875, _T_2876) @[lsu_bus_buffer.scala 424:71] + node _T_2878 = or(_T_2871, _T_2877) @[lsu_bus_buffer.scala 423:110] + node _T_2879 = and(_T_2859, _T_2878) @[lsu_bus_buffer.scala 421:112] + node _T_2880 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2881 = and(_T_2880, buf_state_en[1]) @[lsu_bus_buffer.scala 421:93] + node _T_2882 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2883 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2884 = or(_T_2882, _T_2883) @[lsu_bus_buffer.scala 422:32] + node _T_2885 = eq(_T_2884, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2886 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2887 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2888 = and(_T_2886, _T_2887) @[lsu_bus_buffer.scala 423:41] + node _T_2889 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 423:82] + node _T_2890 = and(_T_2888, _T_2889) @[lsu_bus_buffer.scala 423:71] + node _T_2891 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 423:101] + node _T_2892 = and(_T_2890, _T_2891) @[lsu_bus_buffer.scala 423:90] + node _T_2893 = or(_T_2885, _T_2892) @[lsu_bus_buffer.scala 422:59] + node _T_2894 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2895 = and(_T_2894, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2896 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 424:63] + node _T_2897 = and(_T_2895, _T_2896) @[lsu_bus_buffer.scala 424:52] + node _T_2898 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 424:82] + node _T_2899 = and(_T_2897, _T_2898) @[lsu_bus_buffer.scala 424:71] + node _T_2900 = or(_T_2893, _T_2899) @[lsu_bus_buffer.scala 423:110] + node _T_2901 = and(_T_2881, _T_2900) @[lsu_bus_buffer.scala 421:112] + node _T_2902 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2903 = and(_T_2902, buf_state_en[1]) @[lsu_bus_buffer.scala 421:93] + node _T_2904 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2905 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2906 = or(_T_2904, _T_2905) @[lsu_bus_buffer.scala 422:32] + node _T_2907 = eq(_T_2906, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2908 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2909 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2910 = and(_T_2908, _T_2909) @[lsu_bus_buffer.scala 423:41] + node _T_2911 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 423:82] + node _T_2912 = and(_T_2910, _T_2911) @[lsu_bus_buffer.scala 423:71] + node _T_2913 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 423:101] + node _T_2914 = and(_T_2912, _T_2913) @[lsu_bus_buffer.scala 423:90] + node _T_2915 = or(_T_2907, _T_2914) @[lsu_bus_buffer.scala 422:59] + node _T_2916 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2917 = and(_T_2916, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2918 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 424:63] + node _T_2919 = and(_T_2917, _T_2918) @[lsu_bus_buffer.scala 424:52] + node _T_2920 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 424:82] + node _T_2921 = and(_T_2919, _T_2920) @[lsu_bus_buffer.scala 424:71] + node _T_2922 = or(_T_2915, _T_2921) @[lsu_bus_buffer.scala 423:110] + node _T_2923 = and(_T_2903, _T_2922) @[lsu_bus_buffer.scala 421:112] + node _T_2924 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2925 = and(_T_2924, buf_state_en[1]) @[lsu_bus_buffer.scala 421:93] + node _T_2926 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2927 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2928 = or(_T_2926, _T_2927) @[lsu_bus_buffer.scala 422:32] + node _T_2929 = eq(_T_2928, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2930 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2931 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2932 = and(_T_2930, _T_2931) @[lsu_bus_buffer.scala 423:41] + node _T_2933 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 423:82] + node _T_2934 = and(_T_2932, _T_2933) @[lsu_bus_buffer.scala 423:71] + node _T_2935 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 423:101] + node _T_2936 = and(_T_2934, _T_2935) @[lsu_bus_buffer.scala 423:90] + node _T_2937 = or(_T_2929, _T_2936) @[lsu_bus_buffer.scala 422:59] + node _T_2938 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2939 = and(_T_2938, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2940 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 424:63] + node _T_2941 = and(_T_2939, _T_2940) @[lsu_bus_buffer.scala 424:52] + node _T_2942 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 424:82] + node _T_2943 = and(_T_2941, _T_2942) @[lsu_bus_buffer.scala 424:71] + node _T_2944 = or(_T_2937, _T_2943) @[lsu_bus_buffer.scala 423:110] + node _T_2945 = and(_T_2925, _T_2944) @[lsu_bus_buffer.scala 421:112] + node _T_2946 = cat(_T_2945, _T_2923) @[Cat.scala 29:58] + node _T_2947 = cat(_T_2946, _T_2901) @[Cat.scala 29:58] + node _T_2948 = cat(_T_2947, _T_2879) @[Cat.scala 29:58] + node _T_2949 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2950 = and(_T_2949, buf_state_en[2]) @[lsu_bus_buffer.scala 421:93] + node _T_2951 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2952 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2953 = or(_T_2951, _T_2952) @[lsu_bus_buffer.scala 422:32] + node _T_2954 = eq(_T_2953, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2955 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2956 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2957 = and(_T_2955, _T_2956) @[lsu_bus_buffer.scala 423:41] + node _T_2958 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 423:82] + node _T_2959 = and(_T_2957, _T_2958) @[lsu_bus_buffer.scala 423:71] + node _T_2960 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 423:101] + node _T_2961 = and(_T_2959, _T_2960) @[lsu_bus_buffer.scala 423:90] + node _T_2962 = or(_T_2954, _T_2961) @[lsu_bus_buffer.scala 422:59] + node _T_2963 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2964 = and(_T_2963, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2965 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 424:63] + node _T_2966 = and(_T_2964, _T_2965) @[lsu_bus_buffer.scala 424:52] + node _T_2967 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 424:82] + node _T_2968 = and(_T_2966, _T_2967) @[lsu_bus_buffer.scala 424:71] + node _T_2969 = or(_T_2962, _T_2968) @[lsu_bus_buffer.scala 423:110] + node _T_2970 = and(_T_2950, _T_2969) @[lsu_bus_buffer.scala 421:112] + node _T_2971 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2972 = and(_T_2971, buf_state_en[2]) @[lsu_bus_buffer.scala 421:93] + node _T_2973 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2974 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2975 = or(_T_2973, _T_2974) @[lsu_bus_buffer.scala 422:32] + node _T_2976 = eq(_T_2975, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2977 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_2978 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_2979 = and(_T_2977, _T_2978) @[lsu_bus_buffer.scala 423:41] + node _T_2980 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 423:82] + node _T_2981 = and(_T_2979, _T_2980) @[lsu_bus_buffer.scala 423:71] + node _T_2982 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 423:101] + node _T_2983 = and(_T_2981, _T_2982) @[lsu_bus_buffer.scala 423:90] + node _T_2984 = or(_T_2976, _T_2983) @[lsu_bus_buffer.scala 422:59] + node _T_2985 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_2986 = and(_T_2985, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_2987 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 424:63] + node _T_2988 = and(_T_2986, _T_2987) @[lsu_bus_buffer.scala 424:52] + node _T_2989 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 424:82] + node _T_2990 = and(_T_2988, _T_2989) @[lsu_bus_buffer.scala 424:71] + node _T_2991 = or(_T_2984, _T_2990) @[lsu_bus_buffer.scala 423:110] + node _T_2992 = and(_T_2972, _T_2991) @[lsu_bus_buffer.scala 421:112] + node _T_2993 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_2994 = and(_T_2993, buf_state_en[2]) @[lsu_bus_buffer.scala 421:93] + node _T_2995 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_2996 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_2997 = or(_T_2995, _T_2996) @[lsu_bus_buffer.scala 422:32] + node _T_2998 = eq(_T_2997, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_2999 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_3000 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_3001 = and(_T_2999, _T_3000) @[lsu_bus_buffer.scala 423:41] + node _T_3002 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 423:82] + node _T_3003 = and(_T_3001, _T_3002) @[lsu_bus_buffer.scala 423:71] + node _T_3004 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 423:101] + node _T_3005 = and(_T_3003, _T_3004) @[lsu_bus_buffer.scala 423:90] + node _T_3006 = or(_T_2998, _T_3005) @[lsu_bus_buffer.scala 422:59] + node _T_3007 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_3008 = and(_T_3007, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_3009 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 424:63] + node _T_3010 = and(_T_3008, _T_3009) @[lsu_bus_buffer.scala 424:52] + node _T_3011 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 424:82] + node _T_3012 = and(_T_3010, _T_3011) @[lsu_bus_buffer.scala 424:71] + node _T_3013 = or(_T_3006, _T_3012) @[lsu_bus_buffer.scala 423:110] + node _T_3014 = and(_T_2994, _T_3013) @[lsu_bus_buffer.scala 421:112] + node _T_3015 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_3016 = and(_T_3015, buf_state_en[2]) @[lsu_bus_buffer.scala 421:93] + node _T_3017 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_3018 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_3019 = or(_T_3017, _T_3018) @[lsu_bus_buffer.scala 422:32] + node _T_3020 = eq(_T_3019, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_3021 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_3022 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_3023 = and(_T_3021, _T_3022) @[lsu_bus_buffer.scala 423:41] + node _T_3024 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 423:82] + node _T_3025 = and(_T_3023, _T_3024) @[lsu_bus_buffer.scala 423:71] + node _T_3026 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 423:101] + node _T_3027 = and(_T_3025, _T_3026) @[lsu_bus_buffer.scala 423:90] + node _T_3028 = or(_T_3020, _T_3027) @[lsu_bus_buffer.scala 422:59] + node _T_3029 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_3030 = and(_T_3029, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_3031 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 424:63] + node _T_3032 = and(_T_3030, _T_3031) @[lsu_bus_buffer.scala 424:52] + node _T_3033 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 424:82] + node _T_3034 = and(_T_3032, _T_3033) @[lsu_bus_buffer.scala 424:71] + node _T_3035 = or(_T_3028, _T_3034) @[lsu_bus_buffer.scala 423:110] + node _T_3036 = and(_T_3016, _T_3035) @[lsu_bus_buffer.scala 421:112] + node _T_3037 = cat(_T_3036, _T_3014) @[Cat.scala 29:58] + node _T_3038 = cat(_T_3037, _T_2992) @[Cat.scala 29:58] + node _T_3039 = cat(_T_3038, _T_2970) @[Cat.scala 29:58] + node _T_3040 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_3041 = and(_T_3040, buf_state_en[3]) @[lsu_bus_buffer.scala 421:93] + node _T_3042 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_3043 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_3044 = or(_T_3042, _T_3043) @[lsu_bus_buffer.scala 422:32] + node _T_3045 = eq(_T_3044, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_3046 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_3047 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_3048 = and(_T_3046, _T_3047) @[lsu_bus_buffer.scala 423:41] + node _T_3049 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 423:82] + node _T_3050 = and(_T_3048, _T_3049) @[lsu_bus_buffer.scala 423:71] + node _T_3051 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 423:101] + node _T_3052 = and(_T_3050, _T_3051) @[lsu_bus_buffer.scala 423:90] + node _T_3053 = or(_T_3045, _T_3052) @[lsu_bus_buffer.scala 422:59] + node _T_3054 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_3055 = and(_T_3054, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_3056 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 424:63] + node _T_3057 = and(_T_3055, _T_3056) @[lsu_bus_buffer.scala 424:52] + node _T_3058 = eq(WrPtr0_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 424:82] + node _T_3059 = and(_T_3057, _T_3058) @[lsu_bus_buffer.scala 424:71] + node _T_3060 = or(_T_3053, _T_3059) @[lsu_bus_buffer.scala 423:110] + node _T_3061 = and(_T_3041, _T_3060) @[lsu_bus_buffer.scala 421:112] + node _T_3062 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_3063 = and(_T_3062, buf_state_en[3]) @[lsu_bus_buffer.scala 421:93] + node _T_3064 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_3065 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_3066 = or(_T_3064, _T_3065) @[lsu_bus_buffer.scala 422:32] + node _T_3067 = eq(_T_3066, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_3068 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_3069 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_3070 = and(_T_3068, _T_3069) @[lsu_bus_buffer.scala 423:41] + node _T_3071 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 423:82] + node _T_3072 = and(_T_3070, _T_3071) @[lsu_bus_buffer.scala 423:71] + node _T_3073 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 423:101] + node _T_3074 = and(_T_3072, _T_3073) @[lsu_bus_buffer.scala 423:90] + node _T_3075 = or(_T_3067, _T_3074) @[lsu_bus_buffer.scala 422:59] + node _T_3076 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_3077 = and(_T_3076, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_3078 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 424:63] + node _T_3079 = and(_T_3077, _T_3078) @[lsu_bus_buffer.scala 424:52] + node _T_3080 = eq(WrPtr0_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 424:82] + node _T_3081 = and(_T_3079, _T_3080) @[lsu_bus_buffer.scala 424:71] + node _T_3082 = or(_T_3075, _T_3081) @[lsu_bus_buffer.scala 423:110] + node _T_3083 = and(_T_3063, _T_3082) @[lsu_bus_buffer.scala 421:112] + node _T_3084 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_3085 = and(_T_3084, buf_state_en[3]) @[lsu_bus_buffer.scala 421:93] + node _T_3086 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_3087 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_3088 = or(_T_3086, _T_3087) @[lsu_bus_buffer.scala 422:32] + node _T_3089 = eq(_T_3088, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_3090 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_3091 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_3092 = and(_T_3090, _T_3091) @[lsu_bus_buffer.scala 423:41] + node _T_3093 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 423:82] + node _T_3094 = and(_T_3092, _T_3093) @[lsu_bus_buffer.scala 423:71] + node _T_3095 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 423:101] + node _T_3096 = and(_T_3094, _T_3095) @[lsu_bus_buffer.scala 423:90] + node _T_3097 = or(_T_3089, _T_3096) @[lsu_bus_buffer.scala 422:59] + node _T_3098 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_3099 = and(_T_3098, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_3100 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 424:63] + node _T_3101 = and(_T_3099, _T_3100) @[lsu_bus_buffer.scala 424:52] + node _T_3102 = eq(WrPtr0_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 424:82] + node _T_3103 = and(_T_3101, _T_3102) @[lsu_bus_buffer.scala 424:71] + node _T_3104 = or(_T_3097, _T_3103) @[lsu_bus_buffer.scala 423:110] + node _T_3105 = and(_T_3085, _T_3104) @[lsu_bus_buffer.scala 421:112] + node _T_3106 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 421:82] + node _T_3107 = and(_T_3106, buf_state_en[3]) @[lsu_bus_buffer.scala 421:93] + node _T_3108 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 422:21] + node _T_3109 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 422:47] + node _T_3110 = or(_T_3108, _T_3109) @[lsu_bus_buffer.scala 422:32] + node _T_3111 = eq(_T_3110, UInt<1>("h00")) @[lsu_bus_buffer.scala 422:6] + node _T_3112 = and(ibuf_drain_vld, io.lsu_busreq_r) @[lsu_bus_buffer.scala 423:23] + node _T_3113 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 423:53] + node _T_3114 = and(_T_3112, _T_3113) @[lsu_bus_buffer.scala 423:41] + node _T_3115 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 423:82] + node _T_3116 = and(_T_3114, _T_3115) @[lsu_bus_buffer.scala 423:71] + node _T_3117 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 423:101] + node _T_3118 = and(_T_3116, _T_3117) @[lsu_bus_buffer.scala 423:90] + node _T_3119 = or(_T_3111, _T_3118) @[lsu_bus_buffer.scala 422:59] + node _T_3120 = and(ibuf_byp, io.lsu_busreq_r) @[lsu_bus_buffer.scala 424:17] + node _T_3121 = and(_T_3120, io.ldst_dual_r) @[lsu_bus_buffer.scala 424:35] + node _T_3122 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 424:63] + node _T_3123 = and(_T_3121, _T_3122) @[lsu_bus_buffer.scala 424:52] + node _T_3124 = eq(WrPtr0_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 424:82] + node _T_3125 = and(_T_3123, _T_3124) @[lsu_bus_buffer.scala 424:71] + node _T_3126 = or(_T_3119, _T_3125) @[lsu_bus_buffer.scala 423:110] + node _T_3127 = and(_T_3107, _T_3126) @[lsu_bus_buffer.scala 421:112] + node _T_3128 = cat(_T_3127, _T_3105) @[Cat.scala 29:58] + node _T_3129 = cat(_T_3128, _T_3083) @[Cat.scala 29:58] + node _T_3130 = cat(_T_3129, _T_3061) @[Cat.scala 29:58] + buf_rspage_set[0] <= _T_2857 @[lsu_bus_buffer.scala 421:18] + buf_rspage_set[1] <= _T_2948 @[lsu_bus_buffer.scala 421:18] + buf_rspage_set[2] <= _T_3039 @[lsu_bus_buffer.scala 421:18] + buf_rspage_set[3] <= _T_3130 @[lsu_bus_buffer.scala 421:18] + node _T_3131 = bits(buf_rspage_set[0], 0, 0) @[lsu_bus_buffer.scala 425:84] + node _T_3132 = bits(buf_rspage[0], 0, 0) @[lsu_bus_buffer.scala 425:103] + node _T_3133 = or(_T_3131, _T_3132) @[lsu_bus_buffer.scala 425:88] + node _T_3134 = bits(buf_rspage_set[0], 1, 1) @[lsu_bus_buffer.scala 425:84] + node _T_3135 = bits(buf_rspage[0], 1, 1) @[lsu_bus_buffer.scala 425:103] + node _T_3136 = or(_T_3134, _T_3135) @[lsu_bus_buffer.scala 425:88] + node _T_3137 = bits(buf_rspage_set[0], 2, 2) @[lsu_bus_buffer.scala 425:84] + node _T_3138 = bits(buf_rspage[0], 2, 2) @[lsu_bus_buffer.scala 425:103] + node _T_3139 = or(_T_3137, _T_3138) @[lsu_bus_buffer.scala 425:88] + node _T_3140 = bits(buf_rspage_set[0], 3, 3) @[lsu_bus_buffer.scala 425:84] + node _T_3141 = bits(buf_rspage[0], 3, 3) @[lsu_bus_buffer.scala 425:103] + node _T_3142 = or(_T_3140, _T_3141) @[lsu_bus_buffer.scala 425:88] + node _T_3143 = cat(_T_3142, _T_3139) @[Cat.scala 29:58] + node _T_3144 = cat(_T_3143, _T_3136) @[Cat.scala 29:58] + node _T_3145 = cat(_T_3144, _T_3133) @[Cat.scala 29:58] + node _T_3146 = bits(buf_rspage_set[1], 0, 0) @[lsu_bus_buffer.scala 425:84] + node _T_3147 = bits(buf_rspage[1], 0, 0) @[lsu_bus_buffer.scala 425:103] + node _T_3148 = or(_T_3146, _T_3147) @[lsu_bus_buffer.scala 425:88] + node _T_3149 = bits(buf_rspage_set[1], 1, 1) @[lsu_bus_buffer.scala 425:84] + node _T_3150 = bits(buf_rspage[1], 1, 1) @[lsu_bus_buffer.scala 425:103] + node _T_3151 = or(_T_3149, _T_3150) @[lsu_bus_buffer.scala 425:88] + node _T_3152 = bits(buf_rspage_set[1], 2, 2) @[lsu_bus_buffer.scala 425:84] + node _T_3153 = bits(buf_rspage[1], 2, 2) @[lsu_bus_buffer.scala 425:103] + node _T_3154 = or(_T_3152, _T_3153) @[lsu_bus_buffer.scala 425:88] + node _T_3155 = bits(buf_rspage_set[1], 3, 3) @[lsu_bus_buffer.scala 425:84] + node _T_3156 = bits(buf_rspage[1], 3, 3) @[lsu_bus_buffer.scala 425:103] + node _T_3157 = or(_T_3155, _T_3156) @[lsu_bus_buffer.scala 425:88] + node _T_3158 = cat(_T_3157, _T_3154) @[Cat.scala 29:58] + node _T_3159 = cat(_T_3158, _T_3151) @[Cat.scala 29:58] + node _T_3160 = cat(_T_3159, _T_3148) @[Cat.scala 29:58] + node _T_3161 = bits(buf_rspage_set[2], 0, 0) @[lsu_bus_buffer.scala 425:84] + node _T_3162 = bits(buf_rspage[2], 0, 0) @[lsu_bus_buffer.scala 425:103] + node _T_3163 = or(_T_3161, _T_3162) @[lsu_bus_buffer.scala 425:88] + node _T_3164 = bits(buf_rspage_set[2], 1, 1) @[lsu_bus_buffer.scala 425:84] + node _T_3165 = bits(buf_rspage[2], 1, 1) @[lsu_bus_buffer.scala 425:103] + node _T_3166 = or(_T_3164, _T_3165) @[lsu_bus_buffer.scala 425:88] + node _T_3167 = bits(buf_rspage_set[2], 2, 2) @[lsu_bus_buffer.scala 425:84] + node _T_3168 = bits(buf_rspage[2], 2, 2) @[lsu_bus_buffer.scala 425:103] + node _T_3169 = or(_T_3167, _T_3168) @[lsu_bus_buffer.scala 425:88] + node _T_3170 = bits(buf_rspage_set[2], 3, 3) @[lsu_bus_buffer.scala 425:84] + node _T_3171 = bits(buf_rspage[2], 3, 3) @[lsu_bus_buffer.scala 425:103] + node _T_3172 = or(_T_3170, _T_3171) @[lsu_bus_buffer.scala 425:88] + node _T_3173 = cat(_T_3172, _T_3169) @[Cat.scala 29:58] + node _T_3174 = cat(_T_3173, _T_3166) @[Cat.scala 29:58] + node _T_3175 = cat(_T_3174, _T_3163) @[Cat.scala 29:58] + node _T_3176 = bits(buf_rspage_set[3], 0, 0) @[lsu_bus_buffer.scala 425:84] + node _T_3177 = bits(buf_rspage[3], 0, 0) @[lsu_bus_buffer.scala 425:103] + node _T_3178 = or(_T_3176, _T_3177) @[lsu_bus_buffer.scala 425:88] + node _T_3179 = bits(buf_rspage_set[3], 1, 1) @[lsu_bus_buffer.scala 425:84] + node _T_3180 = bits(buf_rspage[3], 1, 1) @[lsu_bus_buffer.scala 425:103] + node _T_3181 = or(_T_3179, _T_3180) @[lsu_bus_buffer.scala 425:88] + node _T_3182 = bits(buf_rspage_set[3], 2, 2) @[lsu_bus_buffer.scala 425:84] + node _T_3183 = bits(buf_rspage[3], 2, 2) @[lsu_bus_buffer.scala 425:103] + node _T_3184 = or(_T_3182, _T_3183) @[lsu_bus_buffer.scala 425:88] + node _T_3185 = bits(buf_rspage_set[3], 3, 3) @[lsu_bus_buffer.scala 425:84] + node _T_3186 = bits(buf_rspage[3], 3, 3) @[lsu_bus_buffer.scala 425:103] + node _T_3187 = or(_T_3185, _T_3186) @[lsu_bus_buffer.scala 425:88] + node _T_3188 = cat(_T_3187, _T_3184) @[Cat.scala 29:58] + node _T_3189 = cat(_T_3188, _T_3181) @[Cat.scala 29:58] + node _T_3190 = cat(_T_3189, _T_3178) @[Cat.scala 29:58] + buf_rspage_in[0] <= _T_3145 @[lsu_bus_buffer.scala 425:17] + buf_rspage_in[1] <= _T_3160 @[lsu_bus_buffer.scala 425:17] + buf_rspage_in[2] <= _T_3175 @[lsu_bus_buffer.scala 425:17] + buf_rspage_in[3] <= _T_3190 @[lsu_bus_buffer.scala 425:17] + node _T_3191 = bits(buf_rspageQ[0], 0, 0) @[lsu_bus_buffer.scala 426:78] + node _T_3192 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3193 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3194 = or(_T_3192, _T_3193) @[lsu_bus_buffer.scala 426:110] + node _T_3195 = eq(_T_3194, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3196 = and(_T_3191, _T_3195) @[lsu_bus_buffer.scala 426:82] + node _T_3197 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3198 = and(_T_3196, _T_3197) @[lsu_bus_buffer.scala 426:136] + node _T_3199 = bits(buf_rspageQ[0], 1, 1) @[lsu_bus_buffer.scala 426:78] + node _T_3200 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3201 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3202 = or(_T_3200, _T_3201) @[lsu_bus_buffer.scala 426:110] + node _T_3203 = eq(_T_3202, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3204 = and(_T_3199, _T_3203) @[lsu_bus_buffer.scala 426:82] + node _T_3205 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3206 = and(_T_3204, _T_3205) @[lsu_bus_buffer.scala 426:136] + node _T_3207 = bits(buf_rspageQ[0], 2, 2) @[lsu_bus_buffer.scala 426:78] + node _T_3208 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3209 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3210 = or(_T_3208, _T_3209) @[lsu_bus_buffer.scala 426:110] + node _T_3211 = eq(_T_3210, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3212 = and(_T_3207, _T_3211) @[lsu_bus_buffer.scala 426:82] + node _T_3213 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3214 = and(_T_3212, _T_3213) @[lsu_bus_buffer.scala 426:136] + node _T_3215 = bits(buf_rspageQ[0], 3, 3) @[lsu_bus_buffer.scala 426:78] + node _T_3216 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3217 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3218 = or(_T_3216, _T_3217) @[lsu_bus_buffer.scala 426:110] + node _T_3219 = eq(_T_3218, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3220 = and(_T_3215, _T_3219) @[lsu_bus_buffer.scala 426:82] + node _T_3221 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3222 = and(_T_3220, _T_3221) @[lsu_bus_buffer.scala 426:136] + node _T_3223 = cat(_T_3222, _T_3214) @[Cat.scala 29:58] + node _T_3224 = cat(_T_3223, _T_3206) @[Cat.scala 29:58] + node _T_3225 = cat(_T_3224, _T_3198) @[Cat.scala 29:58] + node _T_3226 = bits(buf_rspageQ[1], 0, 0) @[lsu_bus_buffer.scala 426:78] + node _T_3227 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3228 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3229 = or(_T_3227, _T_3228) @[lsu_bus_buffer.scala 426:110] + node _T_3230 = eq(_T_3229, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3231 = and(_T_3226, _T_3230) @[lsu_bus_buffer.scala 426:82] + node _T_3232 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3233 = and(_T_3231, _T_3232) @[lsu_bus_buffer.scala 426:136] + node _T_3234 = bits(buf_rspageQ[1], 1, 1) @[lsu_bus_buffer.scala 426:78] + node _T_3235 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3236 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3237 = or(_T_3235, _T_3236) @[lsu_bus_buffer.scala 426:110] + node _T_3238 = eq(_T_3237, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3239 = and(_T_3234, _T_3238) @[lsu_bus_buffer.scala 426:82] + node _T_3240 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3241 = and(_T_3239, _T_3240) @[lsu_bus_buffer.scala 426:136] + node _T_3242 = bits(buf_rspageQ[1], 2, 2) @[lsu_bus_buffer.scala 426:78] + node _T_3243 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3244 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3245 = or(_T_3243, _T_3244) @[lsu_bus_buffer.scala 426:110] + node _T_3246 = eq(_T_3245, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3247 = and(_T_3242, _T_3246) @[lsu_bus_buffer.scala 426:82] + node _T_3248 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3249 = and(_T_3247, _T_3248) @[lsu_bus_buffer.scala 426:136] + node _T_3250 = bits(buf_rspageQ[1], 3, 3) @[lsu_bus_buffer.scala 426:78] + node _T_3251 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3252 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3253 = or(_T_3251, _T_3252) @[lsu_bus_buffer.scala 426:110] + node _T_3254 = eq(_T_3253, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3255 = and(_T_3250, _T_3254) @[lsu_bus_buffer.scala 426:82] + node _T_3256 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3257 = and(_T_3255, _T_3256) @[lsu_bus_buffer.scala 426:136] + node _T_3258 = cat(_T_3257, _T_3249) @[Cat.scala 29:58] + node _T_3259 = cat(_T_3258, _T_3241) @[Cat.scala 29:58] + node _T_3260 = cat(_T_3259, _T_3233) @[Cat.scala 29:58] + node _T_3261 = bits(buf_rspageQ[2], 0, 0) @[lsu_bus_buffer.scala 426:78] + node _T_3262 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3263 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3264 = or(_T_3262, _T_3263) @[lsu_bus_buffer.scala 426:110] + node _T_3265 = eq(_T_3264, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3266 = and(_T_3261, _T_3265) @[lsu_bus_buffer.scala 426:82] + node _T_3267 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3268 = and(_T_3266, _T_3267) @[lsu_bus_buffer.scala 426:136] + node _T_3269 = bits(buf_rspageQ[2], 1, 1) @[lsu_bus_buffer.scala 426:78] + node _T_3270 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3271 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3272 = or(_T_3270, _T_3271) @[lsu_bus_buffer.scala 426:110] + node _T_3273 = eq(_T_3272, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3274 = and(_T_3269, _T_3273) @[lsu_bus_buffer.scala 426:82] + node _T_3275 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3276 = and(_T_3274, _T_3275) @[lsu_bus_buffer.scala 426:136] + node _T_3277 = bits(buf_rspageQ[2], 2, 2) @[lsu_bus_buffer.scala 426:78] + node _T_3278 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3279 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3280 = or(_T_3278, _T_3279) @[lsu_bus_buffer.scala 426:110] + node _T_3281 = eq(_T_3280, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3282 = and(_T_3277, _T_3281) @[lsu_bus_buffer.scala 426:82] + node _T_3283 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3284 = and(_T_3282, _T_3283) @[lsu_bus_buffer.scala 426:136] + node _T_3285 = bits(buf_rspageQ[2], 3, 3) @[lsu_bus_buffer.scala 426:78] + node _T_3286 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3287 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3288 = or(_T_3286, _T_3287) @[lsu_bus_buffer.scala 426:110] + node _T_3289 = eq(_T_3288, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3290 = and(_T_3285, _T_3289) @[lsu_bus_buffer.scala 426:82] + node _T_3291 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3292 = and(_T_3290, _T_3291) @[lsu_bus_buffer.scala 426:136] + node _T_3293 = cat(_T_3292, _T_3284) @[Cat.scala 29:58] + node _T_3294 = cat(_T_3293, _T_3276) @[Cat.scala 29:58] + node _T_3295 = cat(_T_3294, _T_3268) @[Cat.scala 29:58] + node _T_3296 = bits(buf_rspageQ[3], 0, 0) @[lsu_bus_buffer.scala 426:78] + node _T_3297 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3298 = eq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3299 = or(_T_3297, _T_3298) @[lsu_bus_buffer.scala 426:110] + node _T_3300 = eq(_T_3299, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3301 = and(_T_3296, _T_3300) @[lsu_bus_buffer.scala 426:82] + node _T_3302 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3303 = and(_T_3301, _T_3302) @[lsu_bus_buffer.scala 426:136] + node _T_3304 = bits(buf_rspageQ[3], 1, 1) @[lsu_bus_buffer.scala 426:78] + node _T_3305 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3306 = eq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3307 = or(_T_3305, _T_3306) @[lsu_bus_buffer.scala 426:110] + node _T_3308 = eq(_T_3307, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3309 = and(_T_3304, _T_3308) @[lsu_bus_buffer.scala 426:82] + node _T_3310 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3311 = and(_T_3309, _T_3310) @[lsu_bus_buffer.scala 426:136] + node _T_3312 = bits(buf_rspageQ[3], 2, 2) @[lsu_bus_buffer.scala 426:78] + node _T_3313 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3314 = eq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3315 = or(_T_3313, _T_3314) @[lsu_bus_buffer.scala 426:110] + node _T_3316 = eq(_T_3315, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3317 = and(_T_3312, _T_3316) @[lsu_bus_buffer.scala 426:82] + node _T_3318 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3319 = and(_T_3317, _T_3318) @[lsu_bus_buffer.scala 426:136] + node _T_3320 = bits(buf_rspageQ[3], 3, 3) @[lsu_bus_buffer.scala 426:78] + node _T_3321 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 426:99] + node _T_3322 = eq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 426:125] + node _T_3323 = or(_T_3321, _T_3322) @[lsu_bus_buffer.scala 426:110] + node _T_3324 = eq(_T_3323, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:84] + node _T_3325 = and(_T_3320, _T_3324) @[lsu_bus_buffer.scala 426:82] + node _T_3326 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 426:138] + node _T_3327 = and(_T_3325, _T_3326) @[lsu_bus_buffer.scala 426:136] + node _T_3328 = cat(_T_3327, _T_3319) @[Cat.scala 29:58] + node _T_3329 = cat(_T_3328, _T_3311) @[Cat.scala 29:58] + node _T_3330 = cat(_T_3329, _T_3303) @[Cat.scala 29:58] + buf_rspage[0] <= _T_3225 @[lsu_bus_buffer.scala 426:14] + buf_rspage[1] <= _T_3260 @[lsu_bus_buffer.scala 426:14] + buf_rspage[2] <= _T_3295 @[lsu_bus_buffer.scala 426:14] + buf_rspage[3] <= _T_3330 @[lsu_bus_buffer.scala 426:14] + node _T_3331 = eq(ibuf_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 427:75] + node _T_3332 = and(ibuf_drain_vld, _T_3331) @[lsu_bus_buffer.scala 427:63] + node _T_3333 = eq(ibuf_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 427:75] + node _T_3334 = and(ibuf_drain_vld, _T_3333) @[lsu_bus_buffer.scala 427:63] + node _T_3335 = eq(ibuf_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 427:75] + node _T_3336 = and(ibuf_drain_vld, _T_3335) @[lsu_bus_buffer.scala 427:63] + node _T_3337 = eq(ibuf_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 427:75] + node _T_3338 = and(ibuf_drain_vld, _T_3337) @[lsu_bus_buffer.scala 427:63] + node _T_3339 = cat(_T_3338, _T_3336) @[Cat.scala 29:58] + node _T_3340 = cat(_T_3339, _T_3334) @[Cat.scala 29:58] + node _T_3341 = cat(_T_3340, _T_3332) @[Cat.scala 29:58] + ibuf_drainvec_vld <= _T_3341 @[lsu_bus_buffer.scala 427:21] + node _T_3342 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 428:64] + node _T_3343 = bits(ibuf_byteen_out, 3, 0) @[lsu_bus_buffer.scala 428:84] + node _T_3344 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 429:18] + node _T_3345 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 429:46] + node _T_3346 = and(_T_3344, _T_3345) @[lsu_bus_buffer.scala 429:35] + node _T_3347 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 429:71] + node _T_3348 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 429:94] + node _T_3349 = mux(_T_3346, _T_3347, _T_3348) @[lsu_bus_buffer.scala 429:8] + node _T_3350 = mux(_T_3342, _T_3343, _T_3349) @[lsu_bus_buffer.scala 428:46] + node _T_3351 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 428:64] + node _T_3352 = bits(ibuf_byteen_out, 3, 0) @[lsu_bus_buffer.scala 428:84] + node _T_3353 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 429:18] + node _T_3354 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 429:46] + node _T_3355 = and(_T_3353, _T_3354) @[lsu_bus_buffer.scala 429:35] + node _T_3356 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 429:71] + node _T_3357 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 429:94] + node _T_3358 = mux(_T_3355, _T_3356, _T_3357) @[lsu_bus_buffer.scala 429:8] + node _T_3359 = mux(_T_3351, _T_3352, _T_3358) @[lsu_bus_buffer.scala 428:46] + node _T_3360 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 428:64] + node _T_3361 = bits(ibuf_byteen_out, 3, 0) @[lsu_bus_buffer.scala 428:84] + node _T_3362 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 429:18] + node _T_3363 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 429:46] + node _T_3364 = and(_T_3362, _T_3363) @[lsu_bus_buffer.scala 429:35] + node _T_3365 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 429:71] + node _T_3366 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 429:94] + node _T_3367 = mux(_T_3364, _T_3365, _T_3366) @[lsu_bus_buffer.scala 429:8] + node _T_3368 = mux(_T_3360, _T_3361, _T_3367) @[lsu_bus_buffer.scala 428:46] + node _T_3369 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 428:64] + node _T_3370 = bits(ibuf_byteen_out, 3, 0) @[lsu_bus_buffer.scala 428:84] + node _T_3371 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 429:18] + node _T_3372 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 429:46] + node _T_3373 = and(_T_3371, _T_3372) @[lsu_bus_buffer.scala 429:35] + node _T_3374 = bits(ldst_byteen_hi_r, 3, 0) @[lsu_bus_buffer.scala 429:71] + node _T_3375 = bits(ldst_byteen_lo_r, 3, 0) @[lsu_bus_buffer.scala 429:94] + node _T_3376 = mux(_T_3373, _T_3374, _T_3375) @[lsu_bus_buffer.scala 429:8] + node _T_3377 = mux(_T_3369, _T_3370, _T_3376) @[lsu_bus_buffer.scala 428:46] + buf_byteen_in[0] <= _T_3350 @[lsu_bus_buffer.scala 428:17] + buf_byteen_in[1] <= _T_3359 @[lsu_bus_buffer.scala 428:17] + buf_byteen_in[2] <= _T_3368 @[lsu_bus_buffer.scala 428:17] + buf_byteen_in[3] <= _T_3377 @[lsu_bus_buffer.scala 428:17] + node _T_3378 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 430:62] + node _T_3379 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 430:91] + node _T_3380 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 430:119] + node _T_3381 = and(_T_3379, _T_3380) @[lsu_bus_buffer.scala 430:108] + node _T_3382 = mux(_T_3381, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 430:81] + node _T_3383 = mux(_T_3378, ibuf_addr, _T_3382) @[lsu_bus_buffer.scala 430:44] + node _T_3384 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 430:62] + node _T_3385 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 430:91] + node _T_3386 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 430:119] + node _T_3387 = and(_T_3385, _T_3386) @[lsu_bus_buffer.scala 430:108] + node _T_3388 = mux(_T_3387, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 430:81] + node _T_3389 = mux(_T_3384, ibuf_addr, _T_3388) @[lsu_bus_buffer.scala 430:44] + node _T_3390 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 430:62] + node _T_3391 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 430:91] + node _T_3392 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 430:119] + node _T_3393 = and(_T_3391, _T_3392) @[lsu_bus_buffer.scala 430:108] + node _T_3394 = mux(_T_3393, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 430:81] + node _T_3395 = mux(_T_3390, ibuf_addr, _T_3394) @[lsu_bus_buffer.scala 430:44] + node _T_3396 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 430:62] + node _T_3397 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 430:91] + node _T_3398 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 430:119] + node _T_3399 = and(_T_3397, _T_3398) @[lsu_bus_buffer.scala 430:108] + node _T_3400 = mux(_T_3399, io.end_addr_r, io.lsu_addr_r) @[lsu_bus_buffer.scala 430:81] + node _T_3401 = mux(_T_3396, ibuf_addr, _T_3400) @[lsu_bus_buffer.scala 430:44] + buf_addr_in[0] <= _T_3383 @[lsu_bus_buffer.scala 430:15] + buf_addr_in[1] <= _T_3389 @[lsu_bus_buffer.scala 430:15] + buf_addr_in[2] <= _T_3395 @[lsu_bus_buffer.scala 430:15] + buf_addr_in[3] <= _T_3401 @[lsu_bus_buffer.scala 430:15] + node _T_3402 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 431:63] + node _T_3403 = mux(_T_3402, ibuf_dual, io.ldst_dual_r) @[lsu_bus_buffer.scala 431:45] + node _T_3404 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 431:63] + node _T_3405 = mux(_T_3404, ibuf_dual, io.ldst_dual_r) @[lsu_bus_buffer.scala 431:45] + node _T_3406 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 431:63] + node _T_3407 = mux(_T_3406, ibuf_dual, io.ldst_dual_r) @[lsu_bus_buffer.scala 431:45] + node _T_3408 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 431:63] + node _T_3409 = mux(_T_3408, ibuf_dual, io.ldst_dual_r) @[lsu_bus_buffer.scala 431:45] + node _T_3410 = cat(_T_3409, _T_3407) @[Cat.scala 29:58] + node _T_3411 = cat(_T_3410, _T_3405) @[Cat.scala 29:58] + node _T_3412 = cat(_T_3411, _T_3403) @[Cat.scala 29:58] + buf_dual_in <= _T_3412 @[lsu_bus_buffer.scala 431:15] + node _T_3413 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 432:65] + node _T_3414 = mux(_T_3413, ibuf_samedw, ldst_samedw_r) @[lsu_bus_buffer.scala 432:47] + node _T_3415 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 432:65] + node _T_3416 = mux(_T_3415, ibuf_samedw, ldst_samedw_r) @[lsu_bus_buffer.scala 432:47] + node _T_3417 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 432:65] + node _T_3418 = mux(_T_3417, ibuf_samedw, ldst_samedw_r) @[lsu_bus_buffer.scala 432:47] + node _T_3419 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 432:65] + node _T_3420 = mux(_T_3419, ibuf_samedw, ldst_samedw_r) @[lsu_bus_buffer.scala 432:47] + node _T_3421 = cat(_T_3420, _T_3418) @[Cat.scala 29:58] + node _T_3422 = cat(_T_3421, _T_3416) @[Cat.scala 29:58] + node _T_3423 = cat(_T_3422, _T_3414) @[Cat.scala 29:58] + buf_samedw_in <= _T_3423 @[lsu_bus_buffer.scala 432:17] + node _T_3424 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 433:66] + node _T_3425 = or(ibuf_nomerge, ibuf_force_drain) @[lsu_bus_buffer.scala 433:84] + node _T_3426 = mux(_T_3424, _T_3425, io.no_dword_merge_r) @[lsu_bus_buffer.scala 433:48] + node _T_3427 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 433:66] + node _T_3428 = or(ibuf_nomerge, ibuf_force_drain) @[lsu_bus_buffer.scala 433:84] + node _T_3429 = mux(_T_3427, _T_3428, io.no_dword_merge_r) @[lsu_bus_buffer.scala 433:48] + node _T_3430 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 433:66] + node _T_3431 = or(ibuf_nomerge, ibuf_force_drain) @[lsu_bus_buffer.scala 433:84] + node _T_3432 = mux(_T_3430, _T_3431, io.no_dword_merge_r) @[lsu_bus_buffer.scala 433:48] + node _T_3433 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 433:66] + node _T_3434 = or(ibuf_nomerge, ibuf_force_drain) @[lsu_bus_buffer.scala 433:84] + node _T_3435 = mux(_T_3433, _T_3434, io.no_dword_merge_r) @[lsu_bus_buffer.scala 433:48] + node _T_3436 = cat(_T_3435, _T_3432) @[Cat.scala 29:58] + node _T_3437 = cat(_T_3436, _T_3429) @[Cat.scala 29:58] + node _T_3438 = cat(_T_3437, _T_3426) @[Cat.scala 29:58] + buf_nomerge_in <= _T_3438 @[lsu_bus_buffer.scala 433:18] + node _T_3439 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 434:65] + node _T_3440 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 434:90] + node _T_3441 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 434:118] + node _T_3442 = and(_T_3440, _T_3441) @[lsu_bus_buffer.scala 434:107] + node _T_3443 = mux(_T_3439, ibuf_dual, _T_3442) @[lsu_bus_buffer.scala 434:47] + node _T_3444 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 434:65] + node _T_3445 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 434:90] + node _T_3446 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 434:118] + node _T_3447 = and(_T_3445, _T_3446) @[lsu_bus_buffer.scala 434:107] + node _T_3448 = mux(_T_3444, ibuf_dual, _T_3447) @[lsu_bus_buffer.scala 434:47] + node _T_3449 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 434:65] + node _T_3450 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 434:90] + node _T_3451 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 434:118] + node _T_3452 = and(_T_3450, _T_3451) @[lsu_bus_buffer.scala 434:107] + node _T_3453 = mux(_T_3449, ibuf_dual, _T_3452) @[lsu_bus_buffer.scala 434:47] + node _T_3454 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 434:65] + node _T_3455 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 434:90] + node _T_3456 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 434:118] + node _T_3457 = and(_T_3455, _T_3456) @[lsu_bus_buffer.scala 434:107] + node _T_3458 = mux(_T_3454, ibuf_dual, _T_3457) @[lsu_bus_buffer.scala 434:47] + node _T_3459 = cat(_T_3458, _T_3453) @[Cat.scala 29:58] + node _T_3460 = cat(_T_3459, _T_3448) @[Cat.scala 29:58] + node _T_3461 = cat(_T_3460, _T_3443) @[Cat.scala 29:58] + buf_dualhi_in <= _T_3461 @[lsu_bus_buffer.scala 434:17] + node _T_3462 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 435:65] + node _T_3463 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 435:97] + node _T_3464 = eq(WrPtr1_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 435:125] + node _T_3465 = and(_T_3463, _T_3464) @[lsu_bus_buffer.scala 435:114] + node _T_3466 = mux(_T_3465, WrPtr0_r, WrPtr1_r) @[lsu_bus_buffer.scala 435:87] + node _T_3467 = mux(_T_3462, ibuf_dualtag, _T_3466) @[lsu_bus_buffer.scala 435:47] + node _T_3468 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 435:65] + node _T_3469 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 435:97] + node _T_3470 = eq(WrPtr1_r, UInt<1>("h01")) @[lsu_bus_buffer.scala 435:125] + node _T_3471 = and(_T_3469, _T_3470) @[lsu_bus_buffer.scala 435:114] + node _T_3472 = mux(_T_3471, WrPtr0_r, WrPtr1_r) @[lsu_bus_buffer.scala 435:87] + node _T_3473 = mux(_T_3468, ibuf_dualtag, _T_3472) @[lsu_bus_buffer.scala 435:47] + node _T_3474 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 435:65] + node _T_3475 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 435:97] + node _T_3476 = eq(WrPtr1_r, UInt<2>("h02")) @[lsu_bus_buffer.scala 435:125] + node _T_3477 = and(_T_3475, _T_3476) @[lsu_bus_buffer.scala 435:114] + node _T_3478 = mux(_T_3477, WrPtr0_r, WrPtr1_r) @[lsu_bus_buffer.scala 435:87] + node _T_3479 = mux(_T_3474, ibuf_dualtag, _T_3478) @[lsu_bus_buffer.scala 435:47] + node _T_3480 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 435:65] + node _T_3481 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 435:97] + node _T_3482 = eq(WrPtr1_r, UInt<2>("h03")) @[lsu_bus_buffer.scala 435:125] + node _T_3483 = and(_T_3481, _T_3482) @[lsu_bus_buffer.scala 435:114] + node _T_3484 = mux(_T_3483, WrPtr0_r, WrPtr1_r) @[lsu_bus_buffer.scala 435:87] + node _T_3485 = mux(_T_3480, ibuf_dualtag, _T_3484) @[lsu_bus_buffer.scala 435:47] + buf_dualtag_in[0] <= _T_3467 @[lsu_bus_buffer.scala 435:18] + buf_dualtag_in[1] <= _T_3473 @[lsu_bus_buffer.scala 435:18] + buf_dualtag_in[2] <= _T_3479 @[lsu_bus_buffer.scala 435:18] + buf_dualtag_in[3] <= _T_3485 @[lsu_bus_buffer.scala 435:18] + node _T_3486 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 436:69] + node _T_3487 = mux(_T_3486, ibuf_sideeffect, io.is_sideeffects_r) @[lsu_bus_buffer.scala 436:51] + node _T_3488 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 436:69] + node _T_3489 = mux(_T_3488, ibuf_sideeffect, io.is_sideeffects_r) @[lsu_bus_buffer.scala 436:51] + node _T_3490 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 436:69] + node _T_3491 = mux(_T_3490, ibuf_sideeffect, io.is_sideeffects_r) @[lsu_bus_buffer.scala 436:51] + node _T_3492 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 436:69] + node _T_3493 = mux(_T_3492, ibuf_sideeffect, io.is_sideeffects_r) @[lsu_bus_buffer.scala 436:51] + node _T_3494 = cat(_T_3493, _T_3491) @[Cat.scala 29:58] + node _T_3495 = cat(_T_3494, _T_3489) @[Cat.scala 29:58] + node _T_3496 = cat(_T_3495, _T_3487) @[Cat.scala 29:58] + buf_sideeffect_in <= _T_3496 @[lsu_bus_buffer.scala 436:21] + node _T_3497 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 437:65] + node _T_3498 = mux(_T_3497, ibuf_unsign, io.lsu_pkt_r.bits.unsign) @[lsu_bus_buffer.scala 437:47] + node _T_3499 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 437:65] + node _T_3500 = mux(_T_3499, ibuf_unsign, io.lsu_pkt_r.bits.unsign) @[lsu_bus_buffer.scala 437:47] + node _T_3501 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 437:65] + node _T_3502 = mux(_T_3501, ibuf_unsign, io.lsu_pkt_r.bits.unsign) @[lsu_bus_buffer.scala 437:47] + node _T_3503 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 437:65] + node _T_3504 = mux(_T_3503, ibuf_unsign, io.lsu_pkt_r.bits.unsign) @[lsu_bus_buffer.scala 437:47] + node _T_3505 = cat(_T_3504, _T_3502) @[Cat.scala 29:58] + node _T_3506 = cat(_T_3505, _T_3500) @[Cat.scala 29:58] + node _T_3507 = cat(_T_3506, _T_3498) @[Cat.scala 29:58] + buf_unsign_in <= _T_3507 @[lsu_bus_buffer.scala 437:17] + node _T_3508 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 438:60] + node _T_3509 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58] + node _T_3510 = mux(_T_3508, ibuf_sz, _T_3509) @[lsu_bus_buffer.scala 438:42] + node _T_3511 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 438:60] + node _T_3512 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58] + node _T_3513 = mux(_T_3511, ibuf_sz, _T_3512) @[lsu_bus_buffer.scala 438:42] + node _T_3514 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 438:60] + node _T_3515 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58] + node _T_3516 = mux(_T_3514, ibuf_sz, _T_3515) @[lsu_bus_buffer.scala 438:42] + node _T_3517 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 438:60] + node _T_3518 = cat(io.lsu_pkt_r.bits.word, io.lsu_pkt_r.bits.half) @[Cat.scala 29:58] + node _T_3519 = mux(_T_3517, ibuf_sz, _T_3518) @[lsu_bus_buffer.scala 438:42] + buf_sz_in[0] <= _T_3510 @[lsu_bus_buffer.scala 438:13] + buf_sz_in[1] <= _T_3513 @[lsu_bus_buffer.scala 438:13] + buf_sz_in[2] <= _T_3516 @[lsu_bus_buffer.scala 438:13] + buf_sz_in[3] <= _T_3519 @[lsu_bus_buffer.scala 438:13] + node _T_3520 = bits(ibuf_drainvec_vld, 0, 0) @[lsu_bus_buffer.scala 439:64] + node _T_3521 = mux(_T_3520, ibuf_write, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 439:46] + node _T_3522 = bits(ibuf_drainvec_vld, 1, 1) @[lsu_bus_buffer.scala 439:64] + node _T_3523 = mux(_T_3522, ibuf_write, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 439:46] + node _T_3524 = bits(ibuf_drainvec_vld, 2, 2) @[lsu_bus_buffer.scala 439:64] + node _T_3525 = mux(_T_3524, ibuf_write, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 439:46] + node _T_3526 = bits(ibuf_drainvec_vld, 3, 3) @[lsu_bus_buffer.scala 439:64] + node _T_3527 = mux(_T_3526, ibuf_write, io.lsu_pkt_r.bits.store) @[lsu_bus_buffer.scala 439:46] + node _T_3528 = cat(_T_3527, _T_3525) @[Cat.scala 29:58] + node _T_3529 = cat(_T_3528, _T_3523) @[Cat.scala 29:58] + node _T_3530 = cat(_T_3529, _T_3521) @[Cat.scala 29:58] + buf_write_in <= _T_3530 @[lsu_bus_buffer.scala 439:16] + node _T_3531 = eq(UInt<3>("h00"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3531 : @[Conditional.scala 40:58] + node _T_3532 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_bus_buffer.scala 444:56] + node _T_3533 = mux(_T_3532, UInt<3>("h02"), UInt<3>("h01")) @[lsu_bus_buffer.scala 444:31] + buf_nxtstate[0] <= _T_3533 @[lsu_bus_buffer.scala 444:25] + node _T_3534 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 445:45] + node _T_3535 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 445:77] + node _T_3536 = eq(ibuf_merge_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 445:97] + node _T_3537 = and(_T_3535, _T_3536) @[lsu_bus_buffer.scala 445:95] + node _T_3538 = eq(UInt<1>("h00"), WrPtr0_r) @[lsu_bus_buffer.scala 445:117] + node _T_3539 = and(_T_3537, _T_3538) @[lsu_bus_buffer.scala 445:112] + node _T_3540 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 445:144] + node _T_3541 = eq(UInt<1>("h00"), WrPtr1_r) @[lsu_bus_buffer.scala 445:166] + node _T_3542 = and(_T_3540, _T_3541) @[lsu_bus_buffer.scala 445:161] + node _T_3543 = or(_T_3539, _T_3542) @[lsu_bus_buffer.scala 445:132] + node _T_3544 = and(_T_3534, _T_3543) @[lsu_bus_buffer.scala 445:63] + node _T_3545 = eq(UInt<1>("h00"), ibuf_tag) @[lsu_bus_buffer.scala 445:206] + node _T_3546 = and(ibuf_drain_vld, _T_3545) @[lsu_bus_buffer.scala 445:201] + node _T_3547 = or(_T_3544, _T_3546) @[lsu_bus_buffer.scala 445:183] + buf_state_en[0] <= _T_3547 @[lsu_bus_buffer.scala 445:25] + buf_wr_en[0] <= buf_state_en[0] @[lsu_bus_buffer.scala 446:22] + buf_data_en[0] <= buf_state_en[0] @[lsu_bus_buffer.scala 447:24] + node _T_3548 = eq(UInt<1>("h00"), ibuf_tag) @[lsu_bus_buffer.scala 448:52] + node _T_3549 = and(ibuf_drain_vld, _T_3548) @[lsu_bus_buffer.scala 448:47] + node _T_3550 = bits(_T_3549, 0, 0) @[lsu_bus_buffer.scala 448:73] + node _T_3551 = bits(ibuf_data_out, 31, 0) @[lsu_bus_buffer.scala 448:90] + node _T_3552 = bits(store_data_lo_r, 31, 0) @[lsu_bus_buffer.scala 448:114] + node _T_3553 = mux(_T_3550, _T_3551, _T_3552) @[lsu_bus_buffer.scala 448:30] + buf_data_in[0] <= _T_3553 @[lsu_bus_buffer.scala 448:24] + buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 449:34] + buf_rst[0] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 450:21] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_3554 = eq(UInt<3>("h01"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3554 : @[Conditional.scala 39:67] + node _T_3555 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 453:60] + node _T_3556 = mux(_T_3555, UInt<3>("h00"), UInt<3>("h02")) @[lsu_bus_buffer.scala 453:31] + buf_nxtstate[0] <= _T_3556 @[lsu_bus_buffer.scala 453:25] + node _T_3557 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 454:46] + buf_state_en[0] <= _T_3557 @[lsu_bus_buffer.scala 454:25] + buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 455:34] + buf_rst[0] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 456:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3558 = eq(UInt<3>("h02"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3558 : @[Conditional.scala 39:67] + node _T_3559 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 459:60] + node _T_3560 = and(obuf_nosend, bus_rsp_read) @[lsu_bus_buffer.scala 459:89] + node _T_3561 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 459:124] + node _T_3562 = and(_T_3560, _T_3561) @[lsu_bus_buffer.scala 459:104] + node _T_3563 = mux(_T_3562, UInt<3>("h05"), UInt<3>("h03")) @[lsu_bus_buffer.scala 459:75] + node _T_3564 = mux(_T_3559, UInt<3>("h00"), _T_3563) @[lsu_bus_buffer.scala 459:31] + buf_nxtstate[0] <= _T_3564 @[lsu_bus_buffer.scala 459:25] + node _T_3565 = eq(obuf_tag0, UInt<3>("h00")) @[lsu_bus_buffer.scala 460:48] + node _T_3566 = eq(obuf_tag1, UInt<3>("h00")) @[lsu_bus_buffer.scala 460:104] + node _T_3567 = and(obuf_merge, _T_3566) @[lsu_bus_buffer.scala 460:91] + node _T_3568 = or(_T_3565, _T_3567) @[lsu_bus_buffer.scala 460:77] + node _T_3569 = and(_T_3568, obuf_valid) @[lsu_bus_buffer.scala 460:135] + node _T_3570 = and(_T_3569, obuf_wr_enQ) @[lsu_bus_buffer.scala 460:148] + buf_cmd_state_bus_en[0] <= _T_3570 @[lsu_bus_buffer.scala 460:33] + buf_state_bus_en[0] <= buf_cmd_state_bus_en[0] @[lsu_bus_buffer.scala 461:29] + node _T_3571 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 462:49] + node _T_3572 = or(_T_3571, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 462:70] + buf_state_en[0] <= _T_3572 @[lsu_bus_buffer.scala 462:25] + buf_ldfwd_in[0] <= UInt<1>("h01") @[lsu_bus_buffer.scala 463:25] + node _T_3573 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 464:56] + node _T_3574 = eq(_T_3573, UInt<1>("h00")) @[lsu_bus_buffer.scala 464:46] + node _T_3575 = and(buf_state_en[0], _T_3574) @[lsu_bus_buffer.scala 464:44] + node _T_3576 = and(_T_3575, obuf_nosend) @[lsu_bus_buffer.scala 464:60] + node _T_3577 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 464:76] + node _T_3578 = and(_T_3576, _T_3577) @[lsu_bus_buffer.scala 464:74] + buf_ldfwd_en[0] <= _T_3578 @[lsu_bus_buffer.scala 464:25] + node _T_3579 = bits(obuf_rdrsp_tag, 1, 0) @[lsu_bus_buffer.scala 465:46] + buf_ldfwdtag_in[0] <= _T_3579 @[lsu_bus_buffer.scala 465:28] + node _T_3580 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 466:47] + node _T_3581 = and(_T_3580, obuf_nosend) @[lsu_bus_buffer.scala 466:67] + node _T_3582 = and(_T_3581, bus_rsp_read) @[lsu_bus_buffer.scala 466:81] + buf_data_en[0] <= _T_3582 @[lsu_bus_buffer.scala 466:24] + node _T_3583 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 467:48] + node _T_3584 = and(_T_3583, obuf_nosend) @[lsu_bus_buffer.scala 467:68] + node _T_3585 = and(_T_3584, bus_rsp_read_error) @[lsu_bus_buffer.scala 467:82] + buf_error_en[0] <= _T_3585 @[lsu_bus_buffer.scala 467:25] + node _T_3586 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 468:61] + node _T_3587 = bits(buf_addr[0], 2, 2) @[lsu_bus_buffer.scala 468:85] + node _T_3588 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 468:103] + node _T_3589 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 468:126] + node _T_3590 = mux(_T_3587, _T_3588, _T_3589) @[lsu_bus_buffer.scala 468:73] + node _T_3591 = mux(buf_error_en[0], _T_3586, _T_3590) @[lsu_bus_buffer.scala 468:30] + buf_data_in[0] <= _T_3591 @[lsu_bus_buffer.scala 468:24] + buf_rst[0] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 469:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3592 = eq(UInt<3>("h03"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3592 : @[Conditional.scala 39:67] + node _T_3593 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 472:69] + node _T_3594 = eq(bus_rsp_write_error, UInt<1>("h00")) @[lsu_bus_buffer.scala 472:75] + node _T_3595 = and(_T_3593, _T_3594) @[lsu_bus_buffer.scala 472:73] + node _T_3596 = or(io.dec_tlu_force_halt, _T_3595) @[lsu_bus_buffer.scala 472:57] + node _T_3597 = bits(_T_3596, 0, 0) @[lsu_bus_buffer.scala 472:104] + node _T_3598 = eq(buf_samedw[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 473:30] + node _T_3599 = and(buf_dual[0], _T_3598) @[lsu_bus_buffer.scala 473:28] + node _T_3600 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 473:57] + node _T_3601 = eq(_T_3600, UInt<1>("h00")) @[lsu_bus_buffer.scala 473:47] + node _T_3602 = and(_T_3599, _T_3601) @[lsu_bus_buffer.scala 473:45] + node _T_3603 = neq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[lsu_bus_buffer.scala 473:90] + node _T_3604 = and(_T_3602, _T_3603) @[lsu_bus_buffer.scala 473:61] + node _T_3605 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 474:27] + node _T_3606 = or(_T_3605, any_done_wait_state) @[lsu_bus_buffer.scala 474:31] + node _T_3607 = eq(buf_samedw[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 474:70] + node _T_3608 = and(buf_dual[0], _T_3607) @[lsu_bus_buffer.scala 474:68] + node _T_3609 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 474:97] + node _T_3610 = eq(_T_3609, UInt<1>("h00")) @[lsu_bus_buffer.scala 474:87] + node _T_3611 = and(_T_3608, _T_3610) @[lsu_bus_buffer.scala 474:85] + node _T_3612 = eq(buf_dualtag[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_3613 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_3614 = eq(buf_dualtag[0], UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_3615 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_3616 = eq(buf_dualtag[0], UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_3617 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_3618 = eq(buf_dualtag[0], UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_3619 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_3620 = mux(_T_3612, _T_3613, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3621 = mux(_T_3614, _T_3615, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3622 = mux(_T_3616, _T_3617, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3623 = mux(_T_3618, _T_3619, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3624 = or(_T_3620, _T_3621) @[Mux.scala 27:72] + node _T_3625 = or(_T_3624, _T_3622) @[Mux.scala 27:72] + node _T_3626 = or(_T_3625, _T_3623) @[Mux.scala 27:72] + wire _T_3627 : UInt<1> @[Mux.scala 27:72] + _T_3627 <= _T_3626 @[Mux.scala 27:72] + node _T_3628 = and(_T_3611, _T_3627) @[lsu_bus_buffer.scala 474:101] + node _T_3629 = eq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[lsu_bus_buffer.scala 474:167] + node _T_3630 = and(_T_3628, _T_3629) @[lsu_bus_buffer.scala 474:138] + node _T_3631 = and(_T_3630, any_done_wait_state) @[lsu_bus_buffer.scala 474:187] + node _T_3632 = or(_T_3606, _T_3631) @[lsu_bus_buffer.scala 474:53] + node _T_3633 = mux(_T_3632, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 474:16] + node _T_3634 = mux(_T_3604, UInt<3>("h04"), _T_3633) @[lsu_bus_buffer.scala 473:14] + node _T_3635 = mux(_T_3597, UInt<3>("h00"), _T_3634) @[lsu_bus_buffer.scala 472:33] + buf_nxtstate[0] <= _T_3635 @[lsu_bus_buffer.scala 472:27] + node _T_3636 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[lsu_bus_buffer.scala 475:73] + node _T_3637 = and(bus_rsp_write, _T_3636) @[lsu_bus_buffer.scala 475:52] + node _T_3638 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[lsu_bus_buffer.scala 476:46] + node _T_3639 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 477:23] + node _T_3640 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[lsu_bus_buffer.scala 477:47] + node _T_3641 = and(_T_3639, _T_3640) @[lsu_bus_buffer.scala 477:27] + node _T_3642 = or(_T_3638, _T_3641) @[lsu_bus_buffer.scala 476:77] + node _T_3643 = and(buf_dual[0], buf_dualhi[0]) @[lsu_bus_buffer.scala 478:26] + node _T_3644 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 478:54] + node _T_3645 = not(_T_3644) @[lsu_bus_buffer.scala 478:44] + node _T_3646 = and(_T_3643, _T_3645) @[lsu_bus_buffer.scala 478:42] + node _T_3647 = and(_T_3646, buf_samedw[0]) @[lsu_bus_buffer.scala 478:58] + node _T_3648 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[lsu_bus_buffer.scala 478:94] + node _T_3649 = and(_T_3647, _T_3648) @[lsu_bus_buffer.scala 478:74] + node _T_3650 = or(_T_3642, _T_3649) @[lsu_bus_buffer.scala 477:71] + node _T_3651 = and(bus_rsp_read, _T_3650) @[lsu_bus_buffer.scala 476:25] + node _T_3652 = or(_T_3637, _T_3651) @[lsu_bus_buffer.scala 475:105] + buf_resp_state_bus_en[0] <= _T_3652 @[lsu_bus_buffer.scala 475:34] + buf_state_bus_en[0] <= buf_resp_state_bus_en[0] @[lsu_bus_buffer.scala 479:29] + node _T_3653 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 480:49] + node _T_3654 = or(_T_3653, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 480:70] + buf_state_en[0] <= _T_3654 @[lsu_bus_buffer.scala 480:25] + node _T_3655 = and(buf_state_bus_en[0], bus_rsp_read) @[lsu_bus_buffer.scala 481:47] + node _T_3656 = and(_T_3655, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 481:62] + buf_data_en[0] <= _T_3656 @[lsu_bus_buffer.scala 481:24] + node _T_3657 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 482:48] + node _T_3658 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[lsu_bus_buffer.scala 482:111] + node _T_3659 = and(bus_rsp_read_error, _T_3658) @[lsu_bus_buffer.scala 482:91] + node _T_3660 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 483:42] + node _T_3661 = and(bus_rsp_read_error, _T_3660) @[lsu_bus_buffer.scala 483:31] + node _T_3662 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[lsu_bus_buffer.scala 483:66] + node _T_3663 = and(_T_3661, _T_3662) @[lsu_bus_buffer.scala 483:46] + node _T_3664 = or(_T_3659, _T_3663) @[lsu_bus_buffer.scala 482:143] + node _T_3665 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[lsu_bus_buffer.scala 484:54] + node _T_3666 = and(bus_rsp_write_error, _T_3665) @[lsu_bus_buffer.scala 484:33] + node _T_3667 = or(_T_3664, _T_3666) @[lsu_bus_buffer.scala 483:88] + node _T_3668 = and(_T_3657, _T_3667) @[lsu_bus_buffer.scala 482:68] + buf_error_en[0] <= _T_3668 @[lsu_bus_buffer.scala 482:25] + node _T_3669 = eq(buf_error_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 485:50] + node _T_3670 = and(buf_state_en[0], _T_3669) @[lsu_bus_buffer.scala 485:48] + node _T_3671 = bits(buf_addr[0], 2, 2) @[lsu_bus_buffer.scala 485:84] + node _T_3672 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 485:102] + node _T_3673 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 485:125] + node _T_3674 = mux(_T_3671, _T_3672, _T_3673) @[lsu_bus_buffer.scala 485:72] + node _T_3675 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 485:148] + node _T_3676 = mux(_T_3670, _T_3674, _T_3675) @[lsu_bus_buffer.scala 485:30] + buf_data_in[0] <= _T_3676 @[lsu_bus_buffer.scala 485:24] + buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 486:34] + buf_rst[0] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 487:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3677 = eq(UInt<3>("h04"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3677 : @[Conditional.scala 39:67] + node _T_3678 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 490:60] + node _T_3679 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 490:86] + node _T_3680 = dshr(buf_ldfwd, buf_dualtag[0]) @[lsu_bus_buffer.scala 490:101] + node _T_3681 = bits(_T_3680, 0, 0) @[lsu_bus_buffer.scala 490:101] + node _T_3682 = or(_T_3679, _T_3681) @[lsu_bus_buffer.scala 490:90] + node _T_3683 = or(_T_3682, any_done_wait_state) @[lsu_bus_buffer.scala 490:118] + node _T_3684 = mux(_T_3683, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 490:75] + node _T_3685 = mux(_T_3678, UInt<3>("h00"), _T_3684) @[lsu_bus_buffer.scala 490:31] + buf_nxtstate[0] <= _T_3685 @[lsu_bus_buffer.scala 490:25] + node _T_3686 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[lsu_bus_buffer.scala 491:66] + node _T_3687 = dshr(buf_ldfwd, buf_dualtag[0]) @[lsu_bus_buffer.scala 492:21] + node _T_3688 = bits(_T_3687, 0, 0) @[lsu_bus_buffer.scala 492:21] + node _T_3689 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[0]]) @[lsu_bus_buffer.scala 492:58] + node _T_3690 = and(_T_3688, _T_3689) @[lsu_bus_buffer.scala 492:38] + node _T_3691 = or(_T_3686, _T_3690) @[lsu_bus_buffer.scala 491:95] + node _T_3692 = and(bus_rsp_read, _T_3691) @[lsu_bus_buffer.scala 491:45] + buf_state_bus_en[0] <= _T_3692 @[lsu_bus_buffer.scala 491:29] + node _T_3693 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 493:49] + node _T_3694 = or(_T_3693, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 493:70] + buf_state_en[0] <= _T_3694 @[lsu_bus_buffer.scala 493:25] + buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 494:34] + buf_rst[0] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 495:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3695 = eq(UInt<3>("h05"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3695 : @[Conditional.scala 39:67] + node _T_3696 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 498:60] + node _T_3697 = mux(_T_3696, UInt<3>("h00"), UInt<3>("h06")) @[lsu_bus_buffer.scala 498:31] + buf_nxtstate[0] <= _T_3697 @[lsu_bus_buffer.scala 498:25] + node _T_3698 = eq(RspPtr, UInt<2>("h00")) @[lsu_bus_buffer.scala 499:37] + node _T_3699 = eq(buf_dualtag[0], RspPtr) @[lsu_bus_buffer.scala 499:98] + node _T_3700 = and(buf_dual[0], _T_3699) @[lsu_bus_buffer.scala 499:80] + node _T_3701 = or(_T_3698, _T_3700) @[lsu_bus_buffer.scala 499:65] + node _T_3702 = or(_T_3701, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 499:112] + buf_state_en[0] <= _T_3702 @[lsu_bus_buffer.scala 499:25] + buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 500:34] + buf_rst[0] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 501:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3703 = eq(UInt<3>("h06"), buf_state[0]) @[Conditional.scala 37:30] + when _T_3703 : @[Conditional.scala 39:67] + buf_nxtstate[0] <= UInt<3>("h00") @[lsu_bus_buffer.scala 504:25] + buf_rst[0] <= UInt<1>("h01") @[lsu_bus_buffer.scala 505:20] + buf_state_en[0] <= UInt<1>("h01") @[lsu_bus_buffer.scala 506:25] + buf_ldfwd_in[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 507:25] + buf_ldfwd_en[0] <= buf_state_en[0] @[lsu_bus_buffer.scala 508:25] + buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[lsu_bus_buffer.scala 509:34] + skip @[Conditional.scala 39:67] + node _T_3704 = bits(buf_state_en[0], 0, 0) @[lsu_bus_buffer.scala 512:108] + reg _T_3705 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3704 : @[Reg.scala 28:19] + _T_3705 <= buf_nxtstate[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[0] <= _T_3705 @[lsu_bus_buffer.scala 512:18] + reg _T_3706 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 513:60] + _T_3706 <= buf_age_in_0 @[lsu_bus_buffer.scala 513:60] + buf_ageQ[0] <= _T_3706 @[lsu_bus_buffer.scala 513:17] + reg _T_3707 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 514:63] + _T_3707 <= buf_rspage_in[0] @[lsu_bus_buffer.scala 514:63] + buf_rspageQ[0] <= _T_3707 @[lsu_bus_buffer.scala 514:20] + node _T_3708 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 515:109] + reg _T_3709 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3708 : @[Reg.scala 28:19] + _T_3709 <= buf_dualtag_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[0] <= _T_3709 @[lsu_bus_buffer.scala 515:20] + node _T_3710 = bits(buf_dual_in, 0, 0) @[lsu_bus_buffer.scala 516:74] + node _T_3711 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 516:107] + reg _T_3712 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3711 : @[Reg.scala 28:19] + _T_3712 <= _T_3710 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[0] <= _T_3712 @[lsu_bus_buffer.scala 516:17] + node _T_3713 = bits(buf_samedw_in, 0, 0) @[lsu_bus_buffer.scala 517:78] + node _T_3714 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 517:111] + reg _T_3715 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3714 : @[Reg.scala 28:19] + _T_3715 <= _T_3713 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[0] <= _T_3715 @[lsu_bus_buffer.scala 517:19] + node _T_3716 = bits(buf_nomerge_in, 0, 0) @[lsu_bus_buffer.scala 518:80] + node _T_3717 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 518:113] + reg _T_3718 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3717 : @[Reg.scala 28:19] + _T_3718 <= _T_3716 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[0] <= _T_3718 @[lsu_bus_buffer.scala 518:20] + node _T_3719 = bits(buf_dualhi_in, 0, 0) @[lsu_bus_buffer.scala 519:78] + node _T_3720 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 519:111] + reg _T_3721 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3720 : @[Reg.scala 28:19] + _T_3721 <= _T_3719 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[0] <= _T_3721 @[lsu_bus_buffer.scala 519:19] + node _T_3722 = eq(UInt<3>("h00"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3722 : @[Conditional.scala 40:58] + node _T_3723 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_bus_buffer.scala 444:56] + node _T_3724 = mux(_T_3723, UInt<3>("h02"), UInt<3>("h01")) @[lsu_bus_buffer.scala 444:31] + buf_nxtstate[1] <= _T_3724 @[lsu_bus_buffer.scala 444:25] + node _T_3725 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 445:45] + node _T_3726 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 445:77] + node _T_3727 = eq(ibuf_merge_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 445:97] + node _T_3728 = and(_T_3726, _T_3727) @[lsu_bus_buffer.scala 445:95] + node _T_3729 = eq(UInt<1>("h01"), WrPtr0_r) @[lsu_bus_buffer.scala 445:117] + node _T_3730 = and(_T_3728, _T_3729) @[lsu_bus_buffer.scala 445:112] + node _T_3731 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 445:144] + node _T_3732 = eq(UInt<1>("h01"), WrPtr1_r) @[lsu_bus_buffer.scala 445:166] + node _T_3733 = and(_T_3731, _T_3732) @[lsu_bus_buffer.scala 445:161] + node _T_3734 = or(_T_3730, _T_3733) @[lsu_bus_buffer.scala 445:132] + node _T_3735 = and(_T_3725, _T_3734) @[lsu_bus_buffer.scala 445:63] + node _T_3736 = eq(UInt<1>("h01"), ibuf_tag) @[lsu_bus_buffer.scala 445:206] + node _T_3737 = and(ibuf_drain_vld, _T_3736) @[lsu_bus_buffer.scala 445:201] + node _T_3738 = or(_T_3735, _T_3737) @[lsu_bus_buffer.scala 445:183] + buf_state_en[1] <= _T_3738 @[lsu_bus_buffer.scala 445:25] + buf_wr_en[1] <= buf_state_en[1] @[lsu_bus_buffer.scala 446:22] + buf_data_en[1] <= buf_state_en[1] @[lsu_bus_buffer.scala 447:24] + node _T_3739 = eq(UInt<1>("h01"), ibuf_tag) @[lsu_bus_buffer.scala 448:52] + node _T_3740 = and(ibuf_drain_vld, _T_3739) @[lsu_bus_buffer.scala 448:47] + node _T_3741 = bits(_T_3740, 0, 0) @[lsu_bus_buffer.scala 448:73] + node _T_3742 = bits(ibuf_data_out, 31, 0) @[lsu_bus_buffer.scala 448:90] + node _T_3743 = bits(store_data_lo_r, 31, 0) @[lsu_bus_buffer.scala 448:114] + node _T_3744 = mux(_T_3741, _T_3742, _T_3743) @[lsu_bus_buffer.scala 448:30] + buf_data_in[1] <= _T_3744 @[lsu_bus_buffer.scala 448:24] + buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 449:34] + buf_rst[1] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 450:21] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_3745 = eq(UInt<3>("h01"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3745 : @[Conditional.scala 39:67] + node _T_3746 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 453:60] + node _T_3747 = mux(_T_3746, UInt<3>("h00"), UInt<3>("h02")) @[lsu_bus_buffer.scala 453:31] + buf_nxtstate[1] <= _T_3747 @[lsu_bus_buffer.scala 453:25] + node _T_3748 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 454:46] + buf_state_en[1] <= _T_3748 @[lsu_bus_buffer.scala 454:25] + buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 455:34] + buf_rst[1] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 456:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3749 = eq(UInt<3>("h02"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3749 : @[Conditional.scala 39:67] + node _T_3750 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 459:60] + node _T_3751 = and(obuf_nosend, bus_rsp_read) @[lsu_bus_buffer.scala 459:89] + node _T_3752 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 459:124] + node _T_3753 = and(_T_3751, _T_3752) @[lsu_bus_buffer.scala 459:104] + node _T_3754 = mux(_T_3753, UInt<3>("h05"), UInt<3>("h03")) @[lsu_bus_buffer.scala 459:75] + node _T_3755 = mux(_T_3750, UInt<3>("h00"), _T_3754) @[lsu_bus_buffer.scala 459:31] + buf_nxtstate[1] <= _T_3755 @[lsu_bus_buffer.scala 459:25] + node _T_3756 = eq(obuf_tag0, UInt<3>("h01")) @[lsu_bus_buffer.scala 460:48] + node _T_3757 = eq(obuf_tag1, UInt<3>("h01")) @[lsu_bus_buffer.scala 460:104] + node _T_3758 = and(obuf_merge, _T_3757) @[lsu_bus_buffer.scala 460:91] + node _T_3759 = or(_T_3756, _T_3758) @[lsu_bus_buffer.scala 460:77] + node _T_3760 = and(_T_3759, obuf_valid) @[lsu_bus_buffer.scala 460:135] + node _T_3761 = and(_T_3760, obuf_wr_enQ) @[lsu_bus_buffer.scala 460:148] + buf_cmd_state_bus_en[1] <= _T_3761 @[lsu_bus_buffer.scala 460:33] + buf_state_bus_en[1] <= buf_cmd_state_bus_en[1] @[lsu_bus_buffer.scala 461:29] + node _T_3762 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 462:49] + node _T_3763 = or(_T_3762, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 462:70] + buf_state_en[1] <= _T_3763 @[lsu_bus_buffer.scala 462:25] + buf_ldfwd_in[1] <= UInt<1>("h01") @[lsu_bus_buffer.scala 463:25] + node _T_3764 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 464:56] + node _T_3765 = eq(_T_3764, UInt<1>("h00")) @[lsu_bus_buffer.scala 464:46] + node _T_3766 = and(buf_state_en[1], _T_3765) @[lsu_bus_buffer.scala 464:44] + node _T_3767 = and(_T_3766, obuf_nosend) @[lsu_bus_buffer.scala 464:60] + node _T_3768 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 464:76] + node _T_3769 = and(_T_3767, _T_3768) @[lsu_bus_buffer.scala 464:74] + buf_ldfwd_en[1] <= _T_3769 @[lsu_bus_buffer.scala 464:25] + node _T_3770 = bits(obuf_rdrsp_tag, 1, 0) @[lsu_bus_buffer.scala 465:46] + buf_ldfwdtag_in[1] <= _T_3770 @[lsu_bus_buffer.scala 465:28] + node _T_3771 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 466:47] + node _T_3772 = and(_T_3771, obuf_nosend) @[lsu_bus_buffer.scala 466:67] + node _T_3773 = and(_T_3772, bus_rsp_read) @[lsu_bus_buffer.scala 466:81] + buf_data_en[1] <= _T_3773 @[lsu_bus_buffer.scala 466:24] + node _T_3774 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 467:48] + node _T_3775 = and(_T_3774, obuf_nosend) @[lsu_bus_buffer.scala 467:68] + node _T_3776 = and(_T_3775, bus_rsp_read_error) @[lsu_bus_buffer.scala 467:82] + buf_error_en[1] <= _T_3776 @[lsu_bus_buffer.scala 467:25] + node _T_3777 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 468:61] + node _T_3778 = bits(buf_addr[1], 2, 2) @[lsu_bus_buffer.scala 468:85] + node _T_3779 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 468:103] + node _T_3780 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 468:126] + node _T_3781 = mux(_T_3778, _T_3779, _T_3780) @[lsu_bus_buffer.scala 468:73] + node _T_3782 = mux(buf_error_en[1], _T_3777, _T_3781) @[lsu_bus_buffer.scala 468:30] + buf_data_in[1] <= _T_3782 @[lsu_bus_buffer.scala 468:24] + buf_rst[1] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 469:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3783 = eq(UInt<3>("h03"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3783 : @[Conditional.scala 39:67] + node _T_3784 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 472:69] + node _T_3785 = eq(bus_rsp_write_error, UInt<1>("h00")) @[lsu_bus_buffer.scala 472:75] + node _T_3786 = and(_T_3784, _T_3785) @[lsu_bus_buffer.scala 472:73] + node _T_3787 = or(io.dec_tlu_force_halt, _T_3786) @[lsu_bus_buffer.scala 472:57] + node _T_3788 = bits(_T_3787, 0, 0) @[lsu_bus_buffer.scala 472:104] + node _T_3789 = eq(buf_samedw[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 473:30] + node _T_3790 = and(buf_dual[1], _T_3789) @[lsu_bus_buffer.scala 473:28] + node _T_3791 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 473:57] + node _T_3792 = eq(_T_3791, UInt<1>("h00")) @[lsu_bus_buffer.scala 473:47] + node _T_3793 = and(_T_3790, _T_3792) @[lsu_bus_buffer.scala 473:45] + node _T_3794 = neq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[lsu_bus_buffer.scala 473:90] + node _T_3795 = and(_T_3793, _T_3794) @[lsu_bus_buffer.scala 473:61] + node _T_3796 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 474:27] + node _T_3797 = or(_T_3796, any_done_wait_state) @[lsu_bus_buffer.scala 474:31] + node _T_3798 = eq(buf_samedw[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 474:70] + node _T_3799 = and(buf_dual[1], _T_3798) @[lsu_bus_buffer.scala 474:68] + node _T_3800 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 474:97] + node _T_3801 = eq(_T_3800, UInt<1>("h00")) @[lsu_bus_buffer.scala 474:87] + node _T_3802 = and(_T_3799, _T_3801) @[lsu_bus_buffer.scala 474:85] + node _T_3803 = eq(buf_dualtag[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_3804 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_3805 = eq(buf_dualtag[1], UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_3806 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_3807 = eq(buf_dualtag[1], UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_3808 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_3809 = eq(buf_dualtag[1], UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_3810 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_3811 = mux(_T_3803, _T_3804, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3812 = mux(_T_3805, _T_3806, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3813 = mux(_T_3807, _T_3808, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3814 = mux(_T_3809, _T_3810, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_3815 = or(_T_3811, _T_3812) @[Mux.scala 27:72] + node _T_3816 = or(_T_3815, _T_3813) @[Mux.scala 27:72] + node _T_3817 = or(_T_3816, _T_3814) @[Mux.scala 27:72] + wire _T_3818 : UInt<1> @[Mux.scala 27:72] + _T_3818 <= _T_3817 @[Mux.scala 27:72] + node _T_3819 = and(_T_3802, _T_3818) @[lsu_bus_buffer.scala 474:101] + node _T_3820 = eq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[lsu_bus_buffer.scala 474:167] + node _T_3821 = and(_T_3819, _T_3820) @[lsu_bus_buffer.scala 474:138] + node _T_3822 = and(_T_3821, any_done_wait_state) @[lsu_bus_buffer.scala 474:187] + node _T_3823 = or(_T_3797, _T_3822) @[lsu_bus_buffer.scala 474:53] + node _T_3824 = mux(_T_3823, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 474:16] + node _T_3825 = mux(_T_3795, UInt<3>("h04"), _T_3824) @[lsu_bus_buffer.scala 473:14] + node _T_3826 = mux(_T_3788, UInt<3>("h00"), _T_3825) @[lsu_bus_buffer.scala 472:33] + buf_nxtstate[1] <= _T_3826 @[lsu_bus_buffer.scala 472:27] + node _T_3827 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[lsu_bus_buffer.scala 475:73] + node _T_3828 = and(bus_rsp_write, _T_3827) @[lsu_bus_buffer.scala 475:52] + node _T_3829 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[lsu_bus_buffer.scala 476:46] + node _T_3830 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 477:23] + node _T_3831 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[lsu_bus_buffer.scala 477:47] + node _T_3832 = and(_T_3830, _T_3831) @[lsu_bus_buffer.scala 477:27] + node _T_3833 = or(_T_3829, _T_3832) @[lsu_bus_buffer.scala 476:77] + node _T_3834 = and(buf_dual[1], buf_dualhi[1]) @[lsu_bus_buffer.scala 478:26] + node _T_3835 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 478:54] + node _T_3836 = not(_T_3835) @[lsu_bus_buffer.scala 478:44] + node _T_3837 = and(_T_3834, _T_3836) @[lsu_bus_buffer.scala 478:42] + node _T_3838 = and(_T_3837, buf_samedw[1]) @[lsu_bus_buffer.scala 478:58] + node _T_3839 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[lsu_bus_buffer.scala 478:94] + node _T_3840 = and(_T_3838, _T_3839) @[lsu_bus_buffer.scala 478:74] + node _T_3841 = or(_T_3833, _T_3840) @[lsu_bus_buffer.scala 477:71] + node _T_3842 = and(bus_rsp_read, _T_3841) @[lsu_bus_buffer.scala 476:25] + node _T_3843 = or(_T_3828, _T_3842) @[lsu_bus_buffer.scala 475:105] + buf_resp_state_bus_en[1] <= _T_3843 @[lsu_bus_buffer.scala 475:34] + buf_state_bus_en[1] <= buf_resp_state_bus_en[1] @[lsu_bus_buffer.scala 479:29] + node _T_3844 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 480:49] + node _T_3845 = or(_T_3844, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 480:70] + buf_state_en[1] <= _T_3845 @[lsu_bus_buffer.scala 480:25] + node _T_3846 = and(buf_state_bus_en[1], bus_rsp_read) @[lsu_bus_buffer.scala 481:47] + node _T_3847 = and(_T_3846, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 481:62] + buf_data_en[1] <= _T_3847 @[lsu_bus_buffer.scala 481:24] + node _T_3848 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 482:48] + node _T_3849 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[lsu_bus_buffer.scala 482:111] + node _T_3850 = and(bus_rsp_read_error, _T_3849) @[lsu_bus_buffer.scala 482:91] + node _T_3851 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 483:42] + node _T_3852 = and(bus_rsp_read_error, _T_3851) @[lsu_bus_buffer.scala 483:31] + node _T_3853 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[lsu_bus_buffer.scala 483:66] + node _T_3854 = and(_T_3852, _T_3853) @[lsu_bus_buffer.scala 483:46] + node _T_3855 = or(_T_3850, _T_3854) @[lsu_bus_buffer.scala 482:143] + node _T_3856 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[lsu_bus_buffer.scala 484:54] + node _T_3857 = and(bus_rsp_write_error, _T_3856) @[lsu_bus_buffer.scala 484:33] + node _T_3858 = or(_T_3855, _T_3857) @[lsu_bus_buffer.scala 483:88] + node _T_3859 = and(_T_3848, _T_3858) @[lsu_bus_buffer.scala 482:68] + buf_error_en[1] <= _T_3859 @[lsu_bus_buffer.scala 482:25] + node _T_3860 = eq(buf_error_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 485:50] + node _T_3861 = and(buf_state_en[1], _T_3860) @[lsu_bus_buffer.scala 485:48] + node _T_3862 = bits(buf_addr[1], 2, 2) @[lsu_bus_buffer.scala 485:84] + node _T_3863 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 485:102] + node _T_3864 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 485:125] + node _T_3865 = mux(_T_3862, _T_3863, _T_3864) @[lsu_bus_buffer.scala 485:72] + node _T_3866 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 485:148] + node _T_3867 = mux(_T_3861, _T_3865, _T_3866) @[lsu_bus_buffer.scala 485:30] + buf_data_in[1] <= _T_3867 @[lsu_bus_buffer.scala 485:24] + buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 486:34] + buf_rst[1] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 487:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3868 = eq(UInt<3>("h04"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3868 : @[Conditional.scala 39:67] + node _T_3869 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 490:60] + node _T_3870 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 490:86] + node _T_3871 = dshr(buf_ldfwd, buf_dualtag[1]) @[lsu_bus_buffer.scala 490:101] + node _T_3872 = bits(_T_3871, 0, 0) @[lsu_bus_buffer.scala 490:101] + node _T_3873 = or(_T_3870, _T_3872) @[lsu_bus_buffer.scala 490:90] + node _T_3874 = or(_T_3873, any_done_wait_state) @[lsu_bus_buffer.scala 490:118] + node _T_3875 = mux(_T_3874, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 490:75] + node _T_3876 = mux(_T_3869, UInt<3>("h00"), _T_3875) @[lsu_bus_buffer.scala 490:31] + buf_nxtstate[1] <= _T_3876 @[lsu_bus_buffer.scala 490:25] + node _T_3877 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[lsu_bus_buffer.scala 491:66] + node _T_3878 = dshr(buf_ldfwd, buf_dualtag[1]) @[lsu_bus_buffer.scala 492:21] + node _T_3879 = bits(_T_3878, 0, 0) @[lsu_bus_buffer.scala 492:21] + node _T_3880 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[1]]) @[lsu_bus_buffer.scala 492:58] + node _T_3881 = and(_T_3879, _T_3880) @[lsu_bus_buffer.scala 492:38] + node _T_3882 = or(_T_3877, _T_3881) @[lsu_bus_buffer.scala 491:95] + node _T_3883 = and(bus_rsp_read, _T_3882) @[lsu_bus_buffer.scala 491:45] + buf_state_bus_en[1] <= _T_3883 @[lsu_bus_buffer.scala 491:29] + node _T_3884 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 493:49] + node _T_3885 = or(_T_3884, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 493:70] + buf_state_en[1] <= _T_3885 @[lsu_bus_buffer.scala 493:25] + buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 494:34] + buf_rst[1] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 495:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3886 = eq(UInt<3>("h05"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3886 : @[Conditional.scala 39:67] + node _T_3887 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 498:60] + node _T_3888 = mux(_T_3887, UInt<3>("h00"), UInt<3>("h06")) @[lsu_bus_buffer.scala 498:31] + buf_nxtstate[1] <= _T_3888 @[lsu_bus_buffer.scala 498:25] + node _T_3889 = eq(RspPtr, UInt<2>("h01")) @[lsu_bus_buffer.scala 499:37] + node _T_3890 = eq(buf_dualtag[1], RspPtr) @[lsu_bus_buffer.scala 499:98] + node _T_3891 = and(buf_dual[1], _T_3890) @[lsu_bus_buffer.scala 499:80] + node _T_3892 = or(_T_3889, _T_3891) @[lsu_bus_buffer.scala 499:65] + node _T_3893 = or(_T_3892, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 499:112] + buf_state_en[1] <= _T_3893 @[lsu_bus_buffer.scala 499:25] + buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 500:34] + buf_rst[1] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 501:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3894 = eq(UInt<3>("h06"), buf_state[1]) @[Conditional.scala 37:30] + when _T_3894 : @[Conditional.scala 39:67] + buf_nxtstate[1] <= UInt<3>("h00") @[lsu_bus_buffer.scala 504:25] + buf_rst[1] <= UInt<1>("h01") @[lsu_bus_buffer.scala 505:20] + buf_state_en[1] <= UInt<1>("h01") @[lsu_bus_buffer.scala 506:25] + buf_ldfwd_in[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 507:25] + buf_ldfwd_en[1] <= buf_state_en[1] @[lsu_bus_buffer.scala 508:25] + buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[lsu_bus_buffer.scala 509:34] + skip @[Conditional.scala 39:67] + node _T_3895 = bits(buf_state_en[1], 0, 0) @[lsu_bus_buffer.scala 512:108] + reg _T_3896 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3895 : @[Reg.scala 28:19] + _T_3896 <= buf_nxtstate[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[1] <= _T_3896 @[lsu_bus_buffer.scala 512:18] + reg _T_3897 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 513:60] + _T_3897 <= buf_age_in_1 @[lsu_bus_buffer.scala 513:60] + buf_ageQ[1] <= _T_3897 @[lsu_bus_buffer.scala 513:17] + reg _T_3898 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 514:63] + _T_3898 <= buf_rspage_in[1] @[lsu_bus_buffer.scala 514:63] + buf_rspageQ[1] <= _T_3898 @[lsu_bus_buffer.scala 514:20] + node _T_3899 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 515:109] + reg _T_3900 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3899 : @[Reg.scala 28:19] + _T_3900 <= buf_dualtag_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[1] <= _T_3900 @[lsu_bus_buffer.scala 515:20] + node _T_3901 = bits(buf_dual_in, 1, 1) @[lsu_bus_buffer.scala 516:74] + node _T_3902 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 516:107] + reg _T_3903 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3902 : @[Reg.scala 28:19] + _T_3903 <= _T_3901 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[1] <= _T_3903 @[lsu_bus_buffer.scala 516:17] + node _T_3904 = bits(buf_samedw_in, 1, 1) @[lsu_bus_buffer.scala 517:78] + node _T_3905 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 517:111] + reg _T_3906 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3905 : @[Reg.scala 28:19] + _T_3906 <= _T_3904 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[1] <= _T_3906 @[lsu_bus_buffer.scala 517:19] + node _T_3907 = bits(buf_nomerge_in, 1, 1) @[lsu_bus_buffer.scala 518:80] + node _T_3908 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 518:113] + reg _T_3909 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3908 : @[Reg.scala 28:19] + _T_3909 <= _T_3907 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[1] <= _T_3909 @[lsu_bus_buffer.scala 518:20] + node _T_3910 = bits(buf_dualhi_in, 1, 1) @[lsu_bus_buffer.scala 519:78] + node _T_3911 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 519:111] + reg _T_3912 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_3911 : @[Reg.scala 28:19] + _T_3912 <= _T_3910 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[1] <= _T_3912 @[lsu_bus_buffer.scala 519:19] + node _T_3913 = eq(UInt<3>("h00"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3913 : @[Conditional.scala 40:58] + node _T_3914 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_bus_buffer.scala 444:56] + node _T_3915 = mux(_T_3914, UInt<3>("h02"), UInt<3>("h01")) @[lsu_bus_buffer.scala 444:31] + buf_nxtstate[2] <= _T_3915 @[lsu_bus_buffer.scala 444:25] + node _T_3916 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 445:45] + node _T_3917 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 445:77] + node _T_3918 = eq(ibuf_merge_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 445:97] + node _T_3919 = and(_T_3917, _T_3918) @[lsu_bus_buffer.scala 445:95] + node _T_3920 = eq(UInt<2>("h02"), WrPtr0_r) @[lsu_bus_buffer.scala 445:117] + node _T_3921 = and(_T_3919, _T_3920) @[lsu_bus_buffer.scala 445:112] + node _T_3922 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 445:144] + node _T_3923 = eq(UInt<2>("h02"), WrPtr1_r) @[lsu_bus_buffer.scala 445:166] + node _T_3924 = and(_T_3922, _T_3923) @[lsu_bus_buffer.scala 445:161] + node _T_3925 = or(_T_3921, _T_3924) @[lsu_bus_buffer.scala 445:132] + node _T_3926 = and(_T_3916, _T_3925) @[lsu_bus_buffer.scala 445:63] + node _T_3927 = eq(UInt<2>("h02"), ibuf_tag) @[lsu_bus_buffer.scala 445:206] + node _T_3928 = and(ibuf_drain_vld, _T_3927) @[lsu_bus_buffer.scala 445:201] + node _T_3929 = or(_T_3926, _T_3928) @[lsu_bus_buffer.scala 445:183] + buf_state_en[2] <= _T_3929 @[lsu_bus_buffer.scala 445:25] + buf_wr_en[2] <= buf_state_en[2] @[lsu_bus_buffer.scala 446:22] + buf_data_en[2] <= buf_state_en[2] @[lsu_bus_buffer.scala 447:24] + node _T_3930 = eq(UInt<2>("h02"), ibuf_tag) @[lsu_bus_buffer.scala 448:52] + node _T_3931 = and(ibuf_drain_vld, _T_3930) @[lsu_bus_buffer.scala 448:47] + node _T_3932 = bits(_T_3931, 0, 0) @[lsu_bus_buffer.scala 448:73] + node _T_3933 = bits(ibuf_data_out, 31, 0) @[lsu_bus_buffer.scala 448:90] + node _T_3934 = bits(store_data_lo_r, 31, 0) @[lsu_bus_buffer.scala 448:114] + node _T_3935 = mux(_T_3932, _T_3933, _T_3934) @[lsu_bus_buffer.scala 448:30] + buf_data_in[2] <= _T_3935 @[lsu_bus_buffer.scala 448:24] + buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 449:34] + buf_rst[2] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 450:21] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_3936 = eq(UInt<3>("h01"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3936 : @[Conditional.scala 39:67] + node _T_3937 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 453:60] + node _T_3938 = mux(_T_3937, UInt<3>("h00"), UInt<3>("h02")) @[lsu_bus_buffer.scala 453:31] + buf_nxtstate[2] <= _T_3938 @[lsu_bus_buffer.scala 453:25] + node _T_3939 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 454:46] + buf_state_en[2] <= _T_3939 @[lsu_bus_buffer.scala 454:25] + buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 455:34] + buf_rst[2] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 456:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3940 = eq(UInt<3>("h02"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3940 : @[Conditional.scala 39:67] + node _T_3941 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 459:60] + node _T_3942 = and(obuf_nosend, bus_rsp_read) @[lsu_bus_buffer.scala 459:89] + node _T_3943 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 459:124] + node _T_3944 = and(_T_3942, _T_3943) @[lsu_bus_buffer.scala 459:104] + node _T_3945 = mux(_T_3944, UInt<3>("h05"), UInt<3>("h03")) @[lsu_bus_buffer.scala 459:75] + node _T_3946 = mux(_T_3941, UInt<3>("h00"), _T_3945) @[lsu_bus_buffer.scala 459:31] + buf_nxtstate[2] <= _T_3946 @[lsu_bus_buffer.scala 459:25] + node _T_3947 = eq(obuf_tag0, UInt<3>("h02")) @[lsu_bus_buffer.scala 460:48] + node _T_3948 = eq(obuf_tag1, UInt<3>("h02")) @[lsu_bus_buffer.scala 460:104] + node _T_3949 = and(obuf_merge, _T_3948) @[lsu_bus_buffer.scala 460:91] + node _T_3950 = or(_T_3947, _T_3949) @[lsu_bus_buffer.scala 460:77] + node _T_3951 = and(_T_3950, obuf_valid) @[lsu_bus_buffer.scala 460:135] + node _T_3952 = and(_T_3951, obuf_wr_enQ) @[lsu_bus_buffer.scala 460:148] + buf_cmd_state_bus_en[2] <= _T_3952 @[lsu_bus_buffer.scala 460:33] + buf_state_bus_en[2] <= buf_cmd_state_bus_en[2] @[lsu_bus_buffer.scala 461:29] + node _T_3953 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 462:49] + node _T_3954 = or(_T_3953, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 462:70] + buf_state_en[2] <= _T_3954 @[lsu_bus_buffer.scala 462:25] + buf_ldfwd_in[2] <= UInt<1>("h01") @[lsu_bus_buffer.scala 463:25] + node _T_3955 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 464:56] + node _T_3956 = eq(_T_3955, UInt<1>("h00")) @[lsu_bus_buffer.scala 464:46] + node _T_3957 = and(buf_state_en[2], _T_3956) @[lsu_bus_buffer.scala 464:44] + node _T_3958 = and(_T_3957, obuf_nosend) @[lsu_bus_buffer.scala 464:60] + node _T_3959 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 464:76] + node _T_3960 = and(_T_3958, _T_3959) @[lsu_bus_buffer.scala 464:74] + buf_ldfwd_en[2] <= _T_3960 @[lsu_bus_buffer.scala 464:25] + node _T_3961 = bits(obuf_rdrsp_tag, 1, 0) @[lsu_bus_buffer.scala 465:46] + buf_ldfwdtag_in[2] <= _T_3961 @[lsu_bus_buffer.scala 465:28] + node _T_3962 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 466:47] + node _T_3963 = and(_T_3962, obuf_nosend) @[lsu_bus_buffer.scala 466:67] + node _T_3964 = and(_T_3963, bus_rsp_read) @[lsu_bus_buffer.scala 466:81] + buf_data_en[2] <= _T_3964 @[lsu_bus_buffer.scala 466:24] + node _T_3965 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 467:48] + node _T_3966 = and(_T_3965, obuf_nosend) @[lsu_bus_buffer.scala 467:68] + node _T_3967 = and(_T_3966, bus_rsp_read_error) @[lsu_bus_buffer.scala 467:82] + buf_error_en[2] <= _T_3967 @[lsu_bus_buffer.scala 467:25] + node _T_3968 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 468:61] + node _T_3969 = bits(buf_addr[2], 2, 2) @[lsu_bus_buffer.scala 468:85] + node _T_3970 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 468:103] + node _T_3971 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 468:126] + node _T_3972 = mux(_T_3969, _T_3970, _T_3971) @[lsu_bus_buffer.scala 468:73] + node _T_3973 = mux(buf_error_en[2], _T_3968, _T_3972) @[lsu_bus_buffer.scala 468:30] + buf_data_in[2] <= _T_3973 @[lsu_bus_buffer.scala 468:24] + buf_rst[2] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 469:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_3974 = eq(UInt<3>("h03"), buf_state[2]) @[Conditional.scala 37:30] + when _T_3974 : @[Conditional.scala 39:67] + node _T_3975 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 472:69] + node _T_3976 = eq(bus_rsp_write_error, UInt<1>("h00")) @[lsu_bus_buffer.scala 472:75] + node _T_3977 = and(_T_3975, _T_3976) @[lsu_bus_buffer.scala 472:73] + node _T_3978 = or(io.dec_tlu_force_halt, _T_3977) @[lsu_bus_buffer.scala 472:57] + node _T_3979 = bits(_T_3978, 0, 0) @[lsu_bus_buffer.scala 472:104] + node _T_3980 = eq(buf_samedw[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 473:30] + node _T_3981 = and(buf_dual[2], _T_3980) @[lsu_bus_buffer.scala 473:28] + node _T_3982 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 473:57] + node _T_3983 = eq(_T_3982, UInt<1>("h00")) @[lsu_bus_buffer.scala 473:47] + node _T_3984 = and(_T_3981, _T_3983) @[lsu_bus_buffer.scala 473:45] + node _T_3985 = neq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[lsu_bus_buffer.scala 473:90] + node _T_3986 = and(_T_3984, _T_3985) @[lsu_bus_buffer.scala 473:61] + node _T_3987 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 474:27] + node _T_3988 = or(_T_3987, any_done_wait_state) @[lsu_bus_buffer.scala 474:31] + node _T_3989 = eq(buf_samedw[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 474:70] + node _T_3990 = and(buf_dual[2], _T_3989) @[lsu_bus_buffer.scala 474:68] + node _T_3991 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 474:97] + node _T_3992 = eq(_T_3991, UInt<1>("h00")) @[lsu_bus_buffer.scala 474:87] + node _T_3993 = and(_T_3990, _T_3992) @[lsu_bus_buffer.scala 474:85] + node _T_3994 = eq(buf_dualtag[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_3995 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_3996 = eq(buf_dualtag[2], UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_3997 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_3998 = eq(buf_dualtag[2], UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_3999 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_4000 = eq(buf_dualtag[2], UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_4001 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_4002 = mux(_T_3994, _T_3995, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4003 = mux(_T_3996, _T_3997, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4004 = mux(_T_3998, _T_3999, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4005 = mux(_T_4000, _T_4001, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4006 = or(_T_4002, _T_4003) @[Mux.scala 27:72] + node _T_4007 = or(_T_4006, _T_4004) @[Mux.scala 27:72] + node _T_4008 = or(_T_4007, _T_4005) @[Mux.scala 27:72] + wire _T_4009 : UInt<1> @[Mux.scala 27:72] + _T_4009 <= _T_4008 @[Mux.scala 27:72] + node _T_4010 = and(_T_3993, _T_4009) @[lsu_bus_buffer.scala 474:101] + node _T_4011 = eq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[lsu_bus_buffer.scala 474:167] + node _T_4012 = and(_T_4010, _T_4011) @[lsu_bus_buffer.scala 474:138] + node _T_4013 = and(_T_4012, any_done_wait_state) @[lsu_bus_buffer.scala 474:187] + node _T_4014 = or(_T_3988, _T_4013) @[lsu_bus_buffer.scala 474:53] + node _T_4015 = mux(_T_4014, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 474:16] + node _T_4016 = mux(_T_3986, UInt<3>("h04"), _T_4015) @[lsu_bus_buffer.scala 473:14] + node _T_4017 = mux(_T_3979, UInt<3>("h00"), _T_4016) @[lsu_bus_buffer.scala 472:33] + buf_nxtstate[2] <= _T_4017 @[lsu_bus_buffer.scala 472:27] + node _T_4018 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[lsu_bus_buffer.scala 475:73] + node _T_4019 = and(bus_rsp_write, _T_4018) @[lsu_bus_buffer.scala 475:52] + node _T_4020 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[lsu_bus_buffer.scala 476:46] + node _T_4021 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 477:23] + node _T_4022 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[lsu_bus_buffer.scala 477:47] + node _T_4023 = and(_T_4021, _T_4022) @[lsu_bus_buffer.scala 477:27] + node _T_4024 = or(_T_4020, _T_4023) @[lsu_bus_buffer.scala 476:77] + node _T_4025 = and(buf_dual[2], buf_dualhi[2]) @[lsu_bus_buffer.scala 478:26] + node _T_4026 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 478:54] + node _T_4027 = not(_T_4026) @[lsu_bus_buffer.scala 478:44] + node _T_4028 = and(_T_4025, _T_4027) @[lsu_bus_buffer.scala 478:42] + node _T_4029 = and(_T_4028, buf_samedw[2]) @[lsu_bus_buffer.scala 478:58] + node _T_4030 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[lsu_bus_buffer.scala 478:94] + node _T_4031 = and(_T_4029, _T_4030) @[lsu_bus_buffer.scala 478:74] + node _T_4032 = or(_T_4024, _T_4031) @[lsu_bus_buffer.scala 477:71] + node _T_4033 = and(bus_rsp_read, _T_4032) @[lsu_bus_buffer.scala 476:25] + node _T_4034 = or(_T_4019, _T_4033) @[lsu_bus_buffer.scala 475:105] + buf_resp_state_bus_en[2] <= _T_4034 @[lsu_bus_buffer.scala 475:34] + buf_state_bus_en[2] <= buf_resp_state_bus_en[2] @[lsu_bus_buffer.scala 479:29] + node _T_4035 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 480:49] + node _T_4036 = or(_T_4035, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 480:70] + buf_state_en[2] <= _T_4036 @[lsu_bus_buffer.scala 480:25] + node _T_4037 = and(buf_state_bus_en[2], bus_rsp_read) @[lsu_bus_buffer.scala 481:47] + node _T_4038 = and(_T_4037, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 481:62] + buf_data_en[2] <= _T_4038 @[lsu_bus_buffer.scala 481:24] + node _T_4039 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 482:48] + node _T_4040 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[lsu_bus_buffer.scala 482:111] + node _T_4041 = and(bus_rsp_read_error, _T_4040) @[lsu_bus_buffer.scala 482:91] + node _T_4042 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 483:42] + node _T_4043 = and(bus_rsp_read_error, _T_4042) @[lsu_bus_buffer.scala 483:31] + node _T_4044 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[lsu_bus_buffer.scala 483:66] + node _T_4045 = and(_T_4043, _T_4044) @[lsu_bus_buffer.scala 483:46] + node _T_4046 = or(_T_4041, _T_4045) @[lsu_bus_buffer.scala 482:143] + node _T_4047 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[lsu_bus_buffer.scala 484:54] + node _T_4048 = and(bus_rsp_write_error, _T_4047) @[lsu_bus_buffer.scala 484:33] + node _T_4049 = or(_T_4046, _T_4048) @[lsu_bus_buffer.scala 483:88] + node _T_4050 = and(_T_4039, _T_4049) @[lsu_bus_buffer.scala 482:68] + buf_error_en[2] <= _T_4050 @[lsu_bus_buffer.scala 482:25] + node _T_4051 = eq(buf_error_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 485:50] + node _T_4052 = and(buf_state_en[2], _T_4051) @[lsu_bus_buffer.scala 485:48] + node _T_4053 = bits(buf_addr[2], 2, 2) @[lsu_bus_buffer.scala 485:84] + node _T_4054 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 485:102] + node _T_4055 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 485:125] + node _T_4056 = mux(_T_4053, _T_4054, _T_4055) @[lsu_bus_buffer.scala 485:72] + node _T_4057 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 485:148] + node _T_4058 = mux(_T_4052, _T_4056, _T_4057) @[lsu_bus_buffer.scala 485:30] + buf_data_in[2] <= _T_4058 @[lsu_bus_buffer.scala 485:24] + buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 486:34] + buf_rst[2] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 487:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4059 = eq(UInt<3>("h04"), buf_state[2]) @[Conditional.scala 37:30] + when _T_4059 : @[Conditional.scala 39:67] + node _T_4060 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 490:60] + node _T_4061 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 490:86] + node _T_4062 = dshr(buf_ldfwd, buf_dualtag[2]) @[lsu_bus_buffer.scala 490:101] + node _T_4063 = bits(_T_4062, 0, 0) @[lsu_bus_buffer.scala 490:101] + node _T_4064 = or(_T_4061, _T_4063) @[lsu_bus_buffer.scala 490:90] + node _T_4065 = or(_T_4064, any_done_wait_state) @[lsu_bus_buffer.scala 490:118] + node _T_4066 = mux(_T_4065, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 490:75] + node _T_4067 = mux(_T_4060, UInt<3>("h00"), _T_4066) @[lsu_bus_buffer.scala 490:31] + buf_nxtstate[2] <= _T_4067 @[lsu_bus_buffer.scala 490:25] + node _T_4068 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[lsu_bus_buffer.scala 491:66] + node _T_4069 = dshr(buf_ldfwd, buf_dualtag[2]) @[lsu_bus_buffer.scala 492:21] + node _T_4070 = bits(_T_4069, 0, 0) @[lsu_bus_buffer.scala 492:21] + node _T_4071 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[2]]) @[lsu_bus_buffer.scala 492:58] + node _T_4072 = and(_T_4070, _T_4071) @[lsu_bus_buffer.scala 492:38] + node _T_4073 = or(_T_4068, _T_4072) @[lsu_bus_buffer.scala 491:95] + node _T_4074 = and(bus_rsp_read, _T_4073) @[lsu_bus_buffer.scala 491:45] + buf_state_bus_en[2] <= _T_4074 @[lsu_bus_buffer.scala 491:29] + node _T_4075 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 493:49] + node _T_4076 = or(_T_4075, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 493:70] + buf_state_en[2] <= _T_4076 @[lsu_bus_buffer.scala 493:25] + buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 494:34] + buf_rst[2] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 495:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4077 = eq(UInt<3>("h05"), buf_state[2]) @[Conditional.scala 37:30] + when _T_4077 : @[Conditional.scala 39:67] + node _T_4078 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 498:60] + node _T_4079 = mux(_T_4078, UInt<3>("h00"), UInt<3>("h06")) @[lsu_bus_buffer.scala 498:31] + buf_nxtstate[2] <= _T_4079 @[lsu_bus_buffer.scala 498:25] + node _T_4080 = eq(RspPtr, UInt<2>("h02")) @[lsu_bus_buffer.scala 499:37] + node _T_4081 = eq(buf_dualtag[2], RspPtr) @[lsu_bus_buffer.scala 499:98] + node _T_4082 = and(buf_dual[2], _T_4081) @[lsu_bus_buffer.scala 499:80] + node _T_4083 = or(_T_4080, _T_4082) @[lsu_bus_buffer.scala 499:65] + node _T_4084 = or(_T_4083, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 499:112] + buf_state_en[2] <= _T_4084 @[lsu_bus_buffer.scala 499:25] + buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 500:34] + buf_rst[2] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 501:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4085 = eq(UInt<3>("h06"), buf_state[2]) @[Conditional.scala 37:30] + when _T_4085 : @[Conditional.scala 39:67] + buf_nxtstate[2] <= UInt<3>("h00") @[lsu_bus_buffer.scala 504:25] + buf_rst[2] <= UInt<1>("h01") @[lsu_bus_buffer.scala 505:20] + buf_state_en[2] <= UInt<1>("h01") @[lsu_bus_buffer.scala 506:25] + buf_ldfwd_in[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 507:25] + buf_ldfwd_en[2] <= buf_state_en[2] @[lsu_bus_buffer.scala 508:25] + buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[lsu_bus_buffer.scala 509:34] + skip @[Conditional.scala 39:67] + node _T_4086 = bits(buf_state_en[2], 0, 0) @[lsu_bus_buffer.scala 512:108] + reg _T_4087 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4086 : @[Reg.scala 28:19] + _T_4087 <= buf_nxtstate[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[2] <= _T_4087 @[lsu_bus_buffer.scala 512:18] + reg _T_4088 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 513:60] + _T_4088 <= buf_age_in_2 @[lsu_bus_buffer.scala 513:60] + buf_ageQ[2] <= _T_4088 @[lsu_bus_buffer.scala 513:17] + reg _T_4089 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 514:63] + _T_4089 <= buf_rspage_in[2] @[lsu_bus_buffer.scala 514:63] + buf_rspageQ[2] <= _T_4089 @[lsu_bus_buffer.scala 514:20] + node _T_4090 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 515:109] + reg _T_4091 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4090 : @[Reg.scala 28:19] + _T_4091 <= buf_dualtag_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[2] <= _T_4091 @[lsu_bus_buffer.scala 515:20] + node _T_4092 = bits(buf_dual_in, 2, 2) @[lsu_bus_buffer.scala 516:74] + node _T_4093 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 516:107] + reg _T_4094 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4093 : @[Reg.scala 28:19] + _T_4094 <= _T_4092 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[2] <= _T_4094 @[lsu_bus_buffer.scala 516:17] + node _T_4095 = bits(buf_samedw_in, 2, 2) @[lsu_bus_buffer.scala 517:78] + node _T_4096 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 517:111] + reg _T_4097 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4096 : @[Reg.scala 28:19] + _T_4097 <= _T_4095 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[2] <= _T_4097 @[lsu_bus_buffer.scala 517:19] + node _T_4098 = bits(buf_nomerge_in, 2, 2) @[lsu_bus_buffer.scala 518:80] + node _T_4099 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 518:113] + reg _T_4100 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4099 : @[Reg.scala 28:19] + _T_4100 <= _T_4098 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[2] <= _T_4100 @[lsu_bus_buffer.scala 518:20] + node _T_4101 = bits(buf_dualhi_in, 2, 2) @[lsu_bus_buffer.scala 519:78] + node _T_4102 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 519:111] + reg _T_4103 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4102 : @[Reg.scala 28:19] + _T_4103 <= _T_4101 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[2] <= _T_4103 @[lsu_bus_buffer.scala 519:19] + node _T_4104 = eq(UInt<3>("h00"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4104 : @[Conditional.scala 40:58] + node _T_4105 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_bus_buffer.scala 444:56] + node _T_4106 = mux(_T_4105, UInt<3>("h02"), UInt<3>("h01")) @[lsu_bus_buffer.scala 444:31] + buf_nxtstate[3] <= _T_4106 @[lsu_bus_buffer.scala 444:25] + node _T_4107 = and(io.lsu_busreq_r, io.lsu_commit_r) @[lsu_bus_buffer.scala 445:45] + node _T_4108 = or(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 445:77] + node _T_4109 = eq(ibuf_merge_en, UInt<1>("h00")) @[lsu_bus_buffer.scala 445:97] + node _T_4110 = and(_T_4108, _T_4109) @[lsu_bus_buffer.scala 445:95] + node _T_4111 = eq(UInt<2>("h03"), WrPtr0_r) @[lsu_bus_buffer.scala 445:117] + node _T_4112 = and(_T_4110, _T_4111) @[lsu_bus_buffer.scala 445:112] + node _T_4113 = and(ibuf_byp, io.ldst_dual_r) @[lsu_bus_buffer.scala 445:144] + node _T_4114 = eq(UInt<2>("h03"), WrPtr1_r) @[lsu_bus_buffer.scala 445:166] + node _T_4115 = and(_T_4113, _T_4114) @[lsu_bus_buffer.scala 445:161] + node _T_4116 = or(_T_4112, _T_4115) @[lsu_bus_buffer.scala 445:132] + node _T_4117 = and(_T_4107, _T_4116) @[lsu_bus_buffer.scala 445:63] + node _T_4118 = eq(UInt<2>("h03"), ibuf_tag) @[lsu_bus_buffer.scala 445:206] + node _T_4119 = and(ibuf_drain_vld, _T_4118) @[lsu_bus_buffer.scala 445:201] + node _T_4120 = or(_T_4117, _T_4119) @[lsu_bus_buffer.scala 445:183] + buf_state_en[3] <= _T_4120 @[lsu_bus_buffer.scala 445:25] + buf_wr_en[3] <= buf_state_en[3] @[lsu_bus_buffer.scala 446:22] + buf_data_en[3] <= buf_state_en[3] @[lsu_bus_buffer.scala 447:24] + node _T_4121 = eq(UInt<2>("h03"), ibuf_tag) @[lsu_bus_buffer.scala 448:52] + node _T_4122 = and(ibuf_drain_vld, _T_4121) @[lsu_bus_buffer.scala 448:47] + node _T_4123 = bits(_T_4122, 0, 0) @[lsu_bus_buffer.scala 448:73] + node _T_4124 = bits(ibuf_data_out, 31, 0) @[lsu_bus_buffer.scala 448:90] + node _T_4125 = bits(store_data_lo_r, 31, 0) @[lsu_bus_buffer.scala 448:114] + node _T_4126 = mux(_T_4123, _T_4124, _T_4125) @[lsu_bus_buffer.scala 448:30] + buf_data_in[3] <= _T_4126 @[lsu_bus_buffer.scala 448:24] + buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 449:34] + buf_rst[3] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 450:21] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_4127 = eq(UInt<3>("h01"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4127 : @[Conditional.scala 39:67] + node _T_4128 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 453:60] + node _T_4129 = mux(_T_4128, UInt<3>("h00"), UInt<3>("h02")) @[lsu_bus_buffer.scala 453:31] + buf_nxtstate[3] <= _T_4129 @[lsu_bus_buffer.scala 453:25] + node _T_4130 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 454:46] + buf_state_en[3] <= _T_4130 @[lsu_bus_buffer.scala 454:25] + buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 455:34] + buf_rst[3] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 456:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4131 = eq(UInt<3>("h02"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4131 : @[Conditional.scala 39:67] + node _T_4132 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 459:60] + node _T_4133 = and(obuf_nosend, bus_rsp_read) @[lsu_bus_buffer.scala 459:89] + node _T_4134 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[lsu_bus_buffer.scala 459:124] + node _T_4135 = and(_T_4133, _T_4134) @[lsu_bus_buffer.scala 459:104] + node _T_4136 = mux(_T_4135, UInt<3>("h05"), UInt<3>("h03")) @[lsu_bus_buffer.scala 459:75] + node _T_4137 = mux(_T_4132, UInt<3>("h00"), _T_4136) @[lsu_bus_buffer.scala 459:31] + buf_nxtstate[3] <= _T_4137 @[lsu_bus_buffer.scala 459:25] + node _T_4138 = eq(obuf_tag0, UInt<3>("h03")) @[lsu_bus_buffer.scala 460:48] + node _T_4139 = eq(obuf_tag1, UInt<3>("h03")) @[lsu_bus_buffer.scala 460:104] + node _T_4140 = and(obuf_merge, _T_4139) @[lsu_bus_buffer.scala 460:91] + node _T_4141 = or(_T_4138, _T_4140) @[lsu_bus_buffer.scala 460:77] + node _T_4142 = and(_T_4141, obuf_valid) @[lsu_bus_buffer.scala 460:135] + node _T_4143 = and(_T_4142, obuf_wr_enQ) @[lsu_bus_buffer.scala 460:148] + buf_cmd_state_bus_en[3] <= _T_4143 @[lsu_bus_buffer.scala 460:33] + buf_state_bus_en[3] <= buf_cmd_state_bus_en[3] @[lsu_bus_buffer.scala 461:29] + node _T_4144 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 462:49] + node _T_4145 = or(_T_4144, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 462:70] + buf_state_en[3] <= _T_4145 @[lsu_bus_buffer.scala 462:25] + buf_ldfwd_in[3] <= UInt<1>("h01") @[lsu_bus_buffer.scala 463:25] + node _T_4146 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 464:56] + node _T_4147 = eq(_T_4146, UInt<1>("h00")) @[lsu_bus_buffer.scala 464:46] + node _T_4148 = and(buf_state_en[3], _T_4147) @[lsu_bus_buffer.scala 464:44] + node _T_4149 = and(_T_4148, obuf_nosend) @[lsu_bus_buffer.scala 464:60] + node _T_4150 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[lsu_bus_buffer.scala 464:76] + node _T_4151 = and(_T_4149, _T_4150) @[lsu_bus_buffer.scala 464:74] + buf_ldfwd_en[3] <= _T_4151 @[lsu_bus_buffer.scala 464:25] + node _T_4152 = bits(obuf_rdrsp_tag, 1, 0) @[lsu_bus_buffer.scala 465:46] + buf_ldfwdtag_in[3] <= _T_4152 @[lsu_bus_buffer.scala 465:28] + node _T_4153 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 466:47] + node _T_4154 = and(_T_4153, obuf_nosend) @[lsu_bus_buffer.scala 466:67] + node _T_4155 = and(_T_4154, bus_rsp_read) @[lsu_bus_buffer.scala 466:81] + buf_data_en[3] <= _T_4155 @[lsu_bus_buffer.scala 466:24] + node _T_4156 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 467:48] + node _T_4157 = and(_T_4156, obuf_nosend) @[lsu_bus_buffer.scala 467:68] + node _T_4158 = and(_T_4157, bus_rsp_read_error) @[lsu_bus_buffer.scala 467:82] + buf_error_en[3] <= _T_4158 @[lsu_bus_buffer.scala 467:25] + node _T_4159 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 468:61] + node _T_4160 = bits(buf_addr[3], 2, 2) @[lsu_bus_buffer.scala 468:85] + node _T_4161 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 468:103] + node _T_4162 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 468:126] + node _T_4163 = mux(_T_4160, _T_4161, _T_4162) @[lsu_bus_buffer.scala 468:73] + node _T_4164 = mux(buf_error_en[3], _T_4159, _T_4163) @[lsu_bus_buffer.scala 468:30] + buf_data_in[3] <= _T_4164 @[lsu_bus_buffer.scala 468:24] + buf_rst[3] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 469:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4165 = eq(UInt<3>("h03"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4165 : @[Conditional.scala 39:67] + node _T_4166 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 472:69] + node _T_4167 = eq(bus_rsp_write_error, UInt<1>("h00")) @[lsu_bus_buffer.scala 472:75] + node _T_4168 = and(_T_4166, _T_4167) @[lsu_bus_buffer.scala 472:73] + node _T_4169 = or(io.dec_tlu_force_halt, _T_4168) @[lsu_bus_buffer.scala 472:57] + node _T_4170 = bits(_T_4169, 0, 0) @[lsu_bus_buffer.scala 472:104] + node _T_4171 = eq(buf_samedw[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 473:30] + node _T_4172 = and(buf_dual[3], _T_4171) @[lsu_bus_buffer.scala 473:28] + node _T_4173 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 473:57] + node _T_4174 = eq(_T_4173, UInt<1>("h00")) @[lsu_bus_buffer.scala 473:47] + node _T_4175 = and(_T_4172, _T_4174) @[lsu_bus_buffer.scala 473:45] + node _T_4176 = neq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[lsu_bus_buffer.scala 473:90] + node _T_4177 = and(_T_4175, _T_4176) @[lsu_bus_buffer.scala 473:61] + node _T_4178 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 474:27] + node _T_4179 = or(_T_4178, any_done_wait_state) @[lsu_bus_buffer.scala 474:31] + node _T_4180 = eq(buf_samedw[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 474:70] + node _T_4181 = and(buf_dual[3], _T_4180) @[lsu_bus_buffer.scala 474:68] + node _T_4182 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 474:97] + node _T_4183 = eq(_T_4182, UInt<1>("h00")) @[lsu_bus_buffer.scala 474:87] + node _T_4184 = and(_T_4181, _T_4183) @[lsu_bus_buffer.scala 474:85] + node _T_4185 = eq(buf_dualtag[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_4186 = bits(buf_ldfwd, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_4187 = eq(buf_dualtag[3], UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_4188 = bits(buf_ldfwd, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_4189 = eq(buf_dualtag[3], UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_4190 = bits(buf_ldfwd, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_4191 = eq(buf_dualtag[3], UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_4192 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_4193 = mux(_T_4185, _T_4186, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4194 = mux(_T_4187, _T_4188, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4195 = mux(_T_4189, _T_4190, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4196 = mux(_T_4191, _T_4192, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4197 = or(_T_4193, _T_4194) @[Mux.scala 27:72] + node _T_4198 = or(_T_4197, _T_4195) @[Mux.scala 27:72] + node _T_4199 = or(_T_4198, _T_4196) @[Mux.scala 27:72] + wire _T_4200 : UInt<1> @[Mux.scala 27:72] + _T_4200 <= _T_4199 @[Mux.scala 27:72] + node _T_4201 = and(_T_4184, _T_4200) @[lsu_bus_buffer.scala 474:101] + node _T_4202 = eq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[lsu_bus_buffer.scala 474:167] + node _T_4203 = and(_T_4201, _T_4202) @[lsu_bus_buffer.scala 474:138] + node _T_4204 = and(_T_4203, any_done_wait_state) @[lsu_bus_buffer.scala 474:187] + node _T_4205 = or(_T_4179, _T_4204) @[lsu_bus_buffer.scala 474:53] + node _T_4206 = mux(_T_4205, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 474:16] + node _T_4207 = mux(_T_4177, UInt<3>("h04"), _T_4206) @[lsu_bus_buffer.scala 473:14] + node _T_4208 = mux(_T_4170, UInt<3>("h00"), _T_4207) @[lsu_bus_buffer.scala 472:33] + buf_nxtstate[3] <= _T_4208 @[lsu_bus_buffer.scala 472:27] + node _T_4209 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[lsu_bus_buffer.scala 475:73] + node _T_4210 = and(bus_rsp_write, _T_4209) @[lsu_bus_buffer.scala 475:52] + node _T_4211 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[lsu_bus_buffer.scala 476:46] + node _T_4212 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 477:23] + node _T_4213 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[lsu_bus_buffer.scala 477:47] + node _T_4214 = and(_T_4212, _T_4213) @[lsu_bus_buffer.scala 477:27] + node _T_4215 = or(_T_4211, _T_4214) @[lsu_bus_buffer.scala 476:77] + node _T_4216 = and(buf_dual[3], buf_dualhi[3]) @[lsu_bus_buffer.scala 478:26] + node _T_4217 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 478:54] + node _T_4218 = not(_T_4217) @[lsu_bus_buffer.scala 478:44] + node _T_4219 = and(_T_4216, _T_4218) @[lsu_bus_buffer.scala 478:42] + node _T_4220 = and(_T_4219, buf_samedw[3]) @[lsu_bus_buffer.scala 478:58] + node _T_4221 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[lsu_bus_buffer.scala 478:94] + node _T_4222 = and(_T_4220, _T_4221) @[lsu_bus_buffer.scala 478:74] + node _T_4223 = or(_T_4215, _T_4222) @[lsu_bus_buffer.scala 477:71] + node _T_4224 = and(bus_rsp_read, _T_4223) @[lsu_bus_buffer.scala 476:25] + node _T_4225 = or(_T_4210, _T_4224) @[lsu_bus_buffer.scala 475:105] + buf_resp_state_bus_en[3] <= _T_4225 @[lsu_bus_buffer.scala 475:34] + buf_state_bus_en[3] <= buf_resp_state_bus_en[3] @[lsu_bus_buffer.scala 479:29] + node _T_4226 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 480:49] + node _T_4227 = or(_T_4226, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 480:70] + buf_state_en[3] <= _T_4227 @[lsu_bus_buffer.scala 480:25] + node _T_4228 = and(buf_state_bus_en[3], bus_rsp_read) @[lsu_bus_buffer.scala 481:47] + node _T_4229 = and(_T_4228, io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 481:62] + buf_data_en[3] <= _T_4229 @[lsu_bus_buffer.scala 481:24] + node _T_4230 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 482:48] + node _T_4231 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[lsu_bus_buffer.scala 482:111] + node _T_4232 = and(bus_rsp_read_error, _T_4231) @[lsu_bus_buffer.scala 482:91] + node _T_4233 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 483:42] + node _T_4234 = and(bus_rsp_read_error, _T_4233) @[lsu_bus_buffer.scala 483:31] + node _T_4235 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[lsu_bus_buffer.scala 483:66] + node _T_4236 = and(_T_4234, _T_4235) @[lsu_bus_buffer.scala 483:46] + node _T_4237 = or(_T_4232, _T_4236) @[lsu_bus_buffer.scala 482:143] + node _T_4238 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[lsu_bus_buffer.scala 484:54] + node _T_4239 = and(bus_rsp_write_error, _T_4238) @[lsu_bus_buffer.scala 484:33] + node _T_4240 = or(_T_4237, _T_4239) @[lsu_bus_buffer.scala 483:88] + node _T_4241 = and(_T_4230, _T_4240) @[lsu_bus_buffer.scala 482:68] + buf_error_en[3] <= _T_4241 @[lsu_bus_buffer.scala 482:25] + node _T_4242 = eq(buf_error_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 485:50] + node _T_4243 = and(buf_state_en[3], _T_4242) @[lsu_bus_buffer.scala 485:48] + node _T_4244 = bits(buf_addr[3], 2, 2) @[lsu_bus_buffer.scala 485:84] + node _T_4245 = bits(bus_rsp_rdata, 63, 32) @[lsu_bus_buffer.scala 485:102] + node _T_4246 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 485:125] + node _T_4247 = mux(_T_4244, _T_4245, _T_4246) @[lsu_bus_buffer.scala 485:72] + node _T_4248 = bits(bus_rsp_rdata, 31, 0) @[lsu_bus_buffer.scala 485:148] + node _T_4249 = mux(_T_4243, _T_4247, _T_4248) @[lsu_bus_buffer.scala 485:30] + buf_data_in[3] <= _T_4249 @[lsu_bus_buffer.scala 485:24] + buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 486:34] + buf_rst[3] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 487:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4250 = eq(UInt<3>("h04"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4250 : @[Conditional.scala 39:67] + node _T_4251 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 490:60] + node _T_4252 = bits(buf_ldfwd, 3, 3) @[lsu_bus_buffer.scala 490:86] + node _T_4253 = dshr(buf_ldfwd, buf_dualtag[3]) @[lsu_bus_buffer.scala 490:101] + node _T_4254 = bits(_T_4253, 0, 0) @[lsu_bus_buffer.scala 490:101] + node _T_4255 = or(_T_4252, _T_4254) @[lsu_bus_buffer.scala 490:90] + node _T_4256 = or(_T_4255, any_done_wait_state) @[lsu_bus_buffer.scala 490:118] + node _T_4257 = mux(_T_4256, UInt<3>("h05"), UInt<3>("h06")) @[lsu_bus_buffer.scala 490:75] + node _T_4258 = mux(_T_4251, UInt<3>("h00"), _T_4257) @[lsu_bus_buffer.scala 490:31] + buf_nxtstate[3] <= _T_4258 @[lsu_bus_buffer.scala 490:25] + node _T_4259 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[lsu_bus_buffer.scala 491:66] + node _T_4260 = dshr(buf_ldfwd, buf_dualtag[3]) @[lsu_bus_buffer.scala 492:21] + node _T_4261 = bits(_T_4260, 0, 0) @[lsu_bus_buffer.scala 492:21] + node _T_4262 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[3]]) @[lsu_bus_buffer.scala 492:58] + node _T_4263 = and(_T_4261, _T_4262) @[lsu_bus_buffer.scala 492:38] + node _T_4264 = or(_T_4259, _T_4263) @[lsu_bus_buffer.scala 491:95] + node _T_4265 = and(bus_rsp_read, _T_4264) @[lsu_bus_buffer.scala 491:45] + buf_state_bus_en[3] <= _T_4265 @[lsu_bus_buffer.scala 491:29] + node _T_4266 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[lsu_bus_buffer.scala 493:49] + node _T_4267 = or(_T_4266, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 493:70] + buf_state_en[3] <= _T_4267 @[lsu_bus_buffer.scala 493:25] + buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 494:34] + buf_rst[3] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 495:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4268 = eq(UInt<3>("h05"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4268 : @[Conditional.scala 39:67] + node _T_4269 = bits(io.dec_tlu_force_halt, 0, 0) @[lsu_bus_buffer.scala 498:60] + node _T_4270 = mux(_T_4269, UInt<3>("h00"), UInt<3>("h06")) @[lsu_bus_buffer.scala 498:31] + buf_nxtstate[3] <= _T_4270 @[lsu_bus_buffer.scala 498:25] + node _T_4271 = eq(RspPtr, UInt<2>("h03")) @[lsu_bus_buffer.scala 499:37] + node _T_4272 = eq(buf_dualtag[3], RspPtr) @[lsu_bus_buffer.scala 499:98] + node _T_4273 = and(buf_dual[3], _T_4272) @[lsu_bus_buffer.scala 499:80] + node _T_4274 = or(_T_4271, _T_4273) @[lsu_bus_buffer.scala 499:65] + node _T_4275 = or(_T_4274, io.dec_tlu_force_halt) @[lsu_bus_buffer.scala 499:112] + buf_state_en[3] <= _T_4275 @[lsu_bus_buffer.scala 499:25] + buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 500:34] + buf_rst[3] <= io.dec_tlu_force_halt @[lsu_bus_buffer.scala 501:20] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_4276 = eq(UInt<3>("h06"), buf_state[3]) @[Conditional.scala 37:30] + when _T_4276 : @[Conditional.scala 39:67] + buf_nxtstate[3] <= UInt<3>("h00") @[lsu_bus_buffer.scala 504:25] + buf_rst[3] <= UInt<1>("h01") @[lsu_bus_buffer.scala 505:20] + buf_state_en[3] <= UInt<1>("h01") @[lsu_bus_buffer.scala 506:25] + buf_ldfwd_in[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 507:25] + buf_ldfwd_en[3] <= buf_state_en[3] @[lsu_bus_buffer.scala 508:25] + buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[lsu_bus_buffer.scala 509:34] + skip @[Conditional.scala 39:67] + node _T_4277 = bits(buf_state_en[3], 0, 0) @[lsu_bus_buffer.scala 512:108] + reg _T_4278 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4277 : @[Reg.scala 28:19] + _T_4278 <= buf_nxtstate[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_state[3] <= _T_4278 @[lsu_bus_buffer.scala 512:18] + reg _T_4279 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 513:60] + _T_4279 <= buf_age_in_3 @[lsu_bus_buffer.scala 513:60] + buf_ageQ[3] <= _T_4279 @[lsu_bus_buffer.scala 513:17] + reg _T_4280 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 514:63] + _T_4280 <= buf_rspage_in[3] @[lsu_bus_buffer.scala 514:63] + buf_rspageQ[3] <= _T_4280 @[lsu_bus_buffer.scala 514:20] + node _T_4281 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 515:109] + reg _T_4282 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4281 : @[Reg.scala 28:19] + _T_4282 <= buf_dualtag_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualtag[3] <= _T_4282 @[lsu_bus_buffer.scala 515:20] + node _T_4283 = bits(buf_dual_in, 3, 3) @[lsu_bus_buffer.scala 516:74] + node _T_4284 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 516:107] + reg _T_4285 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4284 : @[Reg.scala 28:19] + _T_4285 <= _T_4283 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dual[3] <= _T_4285 @[lsu_bus_buffer.scala 516:17] + node _T_4286 = bits(buf_samedw_in, 3, 3) @[lsu_bus_buffer.scala 517:78] + node _T_4287 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 517:111] + reg _T_4288 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4287 : @[Reg.scala 28:19] + _T_4288 <= _T_4286 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_samedw[3] <= _T_4288 @[lsu_bus_buffer.scala 517:19] + node _T_4289 = bits(buf_nomerge_in, 3, 3) @[lsu_bus_buffer.scala 518:80] + node _T_4290 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 518:113] + reg _T_4291 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4290 : @[Reg.scala 28:19] + _T_4291 <= _T_4289 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_nomerge[3] <= _T_4291 @[lsu_bus_buffer.scala 518:20] + node _T_4292 = bits(buf_dualhi_in, 3, 3) @[lsu_bus_buffer.scala 519:78] + node _T_4293 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 519:111] + reg _T_4294 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4293 : @[Reg.scala 28:19] + _T_4294 <= _T_4292 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_dualhi[3] <= _T_4294 @[lsu_bus_buffer.scala 519:19] + node _T_4295 = bits(buf_ldfwd_en[0], 0, 0) @[lsu_bus_buffer.scala 522:131] + reg _T_4296 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4295 : @[Reg.scala 28:19] + _T_4296 <= buf_ldfwd_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4297 = bits(buf_ldfwd_en[1], 0, 0) @[lsu_bus_buffer.scala 522:131] + reg _T_4298 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4297 : @[Reg.scala 28:19] + _T_4298 <= buf_ldfwd_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4299 = bits(buf_ldfwd_en[2], 0, 0) @[lsu_bus_buffer.scala 522:131] + reg _T_4300 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4299 : @[Reg.scala 28:19] + _T_4300 <= buf_ldfwd_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4301 = bits(buf_ldfwd_en[3], 0, 0) @[lsu_bus_buffer.scala 522:131] + reg _T_4302 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4301 : @[Reg.scala 28:19] + _T_4302 <= buf_ldfwd_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4303 = cat(_T_4302, _T_4300) @[Cat.scala 29:58] + node _T_4304 = cat(_T_4303, _T_4298) @[Cat.scala 29:58] + node _T_4305 = cat(_T_4304, _T_4296) @[Cat.scala 29:58] + buf_ldfwd <= _T_4305 @[lsu_bus_buffer.scala 522:13] + node _T_4306 = bits(buf_ldfwd_en[0], 0, 0) @[lsu_bus_buffer.scala 523:132] + reg _T_4307 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4306 : @[Reg.scala 28:19] + _T_4307 <= buf_ldfwdtag_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4308 = bits(buf_ldfwd_en[1], 0, 0) @[lsu_bus_buffer.scala 523:132] + reg _T_4309 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4308 : @[Reg.scala 28:19] + _T_4309 <= buf_ldfwdtag_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4310 = bits(buf_ldfwd_en[2], 0, 0) @[lsu_bus_buffer.scala 523:132] + reg _T_4311 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4310 : @[Reg.scala 28:19] + _T_4311 <= buf_ldfwdtag_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4312 = bits(buf_ldfwd_en[3], 0, 0) @[lsu_bus_buffer.scala 523:132] + reg _T_4313 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4312 : @[Reg.scala 28:19] + _T_4313 <= buf_ldfwdtag_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_ldfwdtag[0] <= _T_4307 @[lsu_bus_buffer.scala 523:16] + buf_ldfwdtag[1] <= _T_4309 @[lsu_bus_buffer.scala 523:16] + buf_ldfwdtag[2] <= _T_4311 @[lsu_bus_buffer.scala 523:16] + buf_ldfwdtag[3] <= _T_4313 @[lsu_bus_buffer.scala 523:16] + node _T_4314 = bits(buf_sideeffect_in, 0, 0) @[lsu_bus_buffer.scala 524:105] + node _T_4315 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 524:138] + reg _T_4316 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4315 : @[Reg.scala 28:19] + _T_4316 <= _T_4314 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4317 = bits(buf_sideeffect_in, 1, 1) @[lsu_bus_buffer.scala 524:105] + node _T_4318 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 524:138] + reg _T_4319 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4318 : @[Reg.scala 28:19] + _T_4319 <= _T_4317 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4320 = bits(buf_sideeffect_in, 2, 2) @[lsu_bus_buffer.scala 524:105] + node _T_4321 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 524:138] + reg _T_4322 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4321 : @[Reg.scala 28:19] + _T_4322 <= _T_4320 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4323 = bits(buf_sideeffect_in, 3, 3) @[lsu_bus_buffer.scala 524:105] + node _T_4324 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 524:138] + reg _T_4325 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4324 : @[Reg.scala 28:19] + _T_4325 <= _T_4323 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4326 = cat(_T_4325, _T_4322) @[Cat.scala 29:58] + node _T_4327 = cat(_T_4326, _T_4319) @[Cat.scala 29:58] + node _T_4328 = cat(_T_4327, _T_4316) @[Cat.scala 29:58] + buf_sideeffect <= _T_4328 @[lsu_bus_buffer.scala 524:18] + node _T_4329 = bits(buf_unsign_in, 0, 0) @[lsu_bus_buffer.scala 525:97] + node _T_4330 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 525:130] + reg _T_4331 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4330 : @[Reg.scala 28:19] + _T_4331 <= _T_4329 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4332 = bits(buf_unsign_in, 1, 1) @[lsu_bus_buffer.scala 525:97] + node _T_4333 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 525:130] + reg _T_4334 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4333 : @[Reg.scala 28:19] + _T_4334 <= _T_4332 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4335 = bits(buf_unsign_in, 2, 2) @[lsu_bus_buffer.scala 525:97] + node _T_4336 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 525:130] + reg _T_4337 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4336 : @[Reg.scala 28:19] + _T_4337 <= _T_4335 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4338 = bits(buf_unsign_in, 3, 3) @[lsu_bus_buffer.scala 525:97] + node _T_4339 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 525:130] + reg _T_4340 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4339 : @[Reg.scala 28:19] + _T_4340 <= _T_4338 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4341 = cat(_T_4340, _T_4337) @[Cat.scala 29:58] + node _T_4342 = cat(_T_4341, _T_4334) @[Cat.scala 29:58] + node _T_4343 = cat(_T_4342, _T_4331) @[Cat.scala 29:58] + buf_unsign <= _T_4343 @[lsu_bus_buffer.scala 525:14] + node _T_4344 = bits(buf_write_in, 0, 0) @[lsu_bus_buffer.scala 526:95] + node _T_4345 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 526:128] + reg _T_4346 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4345 : @[Reg.scala 28:19] + _T_4346 <= _T_4344 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4347 = bits(buf_write_in, 1, 1) @[lsu_bus_buffer.scala 526:95] + node _T_4348 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 526:128] + reg _T_4349 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4348 : @[Reg.scala 28:19] + _T_4349 <= _T_4347 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4350 = bits(buf_write_in, 2, 2) @[lsu_bus_buffer.scala 526:95] + node _T_4351 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 526:128] + reg _T_4352 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4351 : @[Reg.scala 28:19] + _T_4352 <= _T_4350 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4353 = bits(buf_write_in, 3, 3) @[lsu_bus_buffer.scala 526:95] + node _T_4354 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 526:128] + reg _T_4355 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4354 : @[Reg.scala 28:19] + _T_4355 <= _T_4353 @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4356 = cat(_T_4355, _T_4352) @[Cat.scala 29:58] + node _T_4357 = cat(_T_4356, _T_4349) @[Cat.scala 29:58] + node _T_4358 = cat(_T_4357, _T_4346) @[Cat.scala 29:58] + buf_write <= _T_4358 @[lsu_bus_buffer.scala 526:13] + node _T_4359 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 527:117] + reg _T_4360 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4359 : @[Reg.scala 28:19] + _T_4360 <= buf_sz_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4361 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 527:117] + reg _T_4362 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4361 : @[Reg.scala 28:19] + _T_4362 <= buf_sz_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4363 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 527:117] + reg _T_4364 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4363 : @[Reg.scala 28:19] + _T_4364 <= buf_sz_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4365 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 527:117] + reg _T_4366 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4365 : @[Reg.scala 28:19] + _T_4366 <= buf_sz_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_sz[0] <= _T_4360 @[lsu_bus_buffer.scala 527:10] + buf_sz[1] <= _T_4362 @[lsu_bus_buffer.scala 527:10] + buf_sz[2] <= _T_4364 @[lsu_bus_buffer.scala 527:10] + buf_sz[3] <= _T_4366 @[lsu_bus_buffer.scala 527:10] + node _T_4367 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 528:80] + inst rvclkhdr_4 of rvclkhdr_4 @[lib.scala 404:23] + rvclkhdr_4.clock <= clock + rvclkhdr_4.reset <= reset + rvclkhdr_4.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_4.io.en <= _T_4367 @[lib.scala 407:17] + rvclkhdr_4.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_4368 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4367 : @[Reg.scala 28:19] + _T_4368 <= buf_addr_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4369 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 528:80] + inst rvclkhdr_5 of rvclkhdr_5 @[lib.scala 404:23] + rvclkhdr_5.clock <= clock + rvclkhdr_5.reset <= reset + rvclkhdr_5.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_5.io.en <= _T_4369 @[lib.scala 407:17] + rvclkhdr_5.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_4370 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4369 : @[Reg.scala 28:19] + _T_4370 <= buf_addr_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4371 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 528:80] + inst rvclkhdr_6 of rvclkhdr_6 @[lib.scala 404:23] + rvclkhdr_6.clock <= clock + rvclkhdr_6.reset <= reset + rvclkhdr_6.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_6.io.en <= _T_4371 @[lib.scala 407:17] + rvclkhdr_6.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_4372 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4371 : @[Reg.scala 28:19] + _T_4372 <= buf_addr_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4373 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 528:80] + inst rvclkhdr_7 of rvclkhdr_7 @[lib.scala 404:23] + rvclkhdr_7.clock <= clock + rvclkhdr_7.reset <= reset + rvclkhdr_7.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_7.io.en <= _T_4373 @[lib.scala 407:17] + rvclkhdr_7.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_4374 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4373 : @[Reg.scala 28:19] + _T_4374 <= buf_addr_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_addr[0] <= _T_4368 @[lsu_bus_buffer.scala 528:12] + buf_addr[1] <= _T_4370 @[lsu_bus_buffer.scala 528:12] + buf_addr[2] <= _T_4372 @[lsu_bus_buffer.scala 528:12] + buf_addr[3] <= _T_4374 @[lsu_bus_buffer.scala 528:12] + node _T_4375 = bits(buf_wr_en[0], 0, 0) @[lsu_bus_buffer.scala 529:125] + reg _T_4376 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4375 : @[Reg.scala 28:19] + _T_4376 <= buf_byteen_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4377 = bits(buf_wr_en[1], 0, 0) @[lsu_bus_buffer.scala 529:125] + reg _T_4378 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4377 : @[Reg.scala 28:19] + _T_4378 <= buf_byteen_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4379 = bits(buf_wr_en[2], 0, 0) @[lsu_bus_buffer.scala 529:125] + reg _T_4380 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4379 : @[Reg.scala 28:19] + _T_4380 <= buf_byteen_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + node _T_4381 = bits(buf_wr_en[3], 0, 0) @[lsu_bus_buffer.scala 529:125] + reg _T_4382 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_4381 : @[Reg.scala 28:19] + _T_4382 <= buf_byteen_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_byteen[0] <= _T_4376 @[lsu_bus_buffer.scala 529:14] + buf_byteen[1] <= _T_4378 @[lsu_bus_buffer.scala 529:14] + buf_byteen[2] <= _T_4380 @[lsu_bus_buffer.scala 529:14] + buf_byteen[3] <= _T_4382 @[lsu_bus_buffer.scala 529:14] + inst rvclkhdr_8 of rvclkhdr_8 @[lib.scala 404:23] + rvclkhdr_8.clock <= clock + rvclkhdr_8.reset <= reset + rvclkhdr_8.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_8.io.en <= buf_data_en[0] @[lib.scala 407:17] + rvclkhdr_8.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_4383 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when buf_data_en[0] : @[Reg.scala 28:19] + _T_4383 <= buf_data_in[0] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr_9 of rvclkhdr_9 @[lib.scala 404:23] + rvclkhdr_9.clock <= clock + rvclkhdr_9.reset <= reset + rvclkhdr_9.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_9.io.en <= buf_data_en[1] @[lib.scala 407:17] + rvclkhdr_9.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_4384 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when buf_data_en[1] : @[Reg.scala 28:19] + _T_4384 <= buf_data_in[1] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr_10 of rvclkhdr_10 @[lib.scala 404:23] + rvclkhdr_10.clock <= clock + rvclkhdr_10.reset <= reset + rvclkhdr_10.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_10.io.en <= buf_data_en[2] @[lib.scala 407:17] + rvclkhdr_10.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_4385 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when buf_data_en[2] : @[Reg.scala 28:19] + _T_4385 <= buf_data_in[2] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + inst rvclkhdr_11 of rvclkhdr_11 @[lib.scala 404:23] + rvclkhdr_11.clock <= clock + rvclkhdr_11.reset <= reset + rvclkhdr_11.io.clk <= clock @[lib.scala 406:18] + rvclkhdr_11.io.en <= buf_data_en[3] @[lib.scala 407:17] + rvclkhdr_11.io.scan_mode <= UInt<1>("h00") @[lib.scala 408:24] + reg _T_4386 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when buf_data_en[3] : @[Reg.scala 28:19] + _T_4386 <= buf_data_in[3] @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + buf_data[0] <= _T_4383 @[lsu_bus_buffer.scala 530:12] + buf_data[1] <= _T_4384 @[lsu_bus_buffer.scala 530:12] + buf_data[2] <= _T_4385 @[lsu_bus_buffer.scala 530:12] + buf_data[3] <= _T_4386 @[lsu_bus_buffer.scala 530:12] + node _T_4387 = eq(buf_rst[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 531:81] + node _T_4388 = bits(buf_error, 0, 0) @[lsu_bus_buffer.scala 531:133] + node _T_4389 = mux(buf_error_en[0], UInt<1>("h01"), _T_4388) @[lsu_bus_buffer.scala 531:98] + node _T_4390 = and(_T_4387, _T_4389) @[lsu_bus_buffer.scala 531:93] + reg _T_4391 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 531:80] + _T_4391 <= _T_4390 @[lsu_bus_buffer.scala 531:80] + node _T_4392 = eq(buf_rst[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 531:81] + node _T_4393 = bits(buf_error, 1, 1) @[lsu_bus_buffer.scala 531:133] + node _T_4394 = mux(buf_error_en[1], UInt<1>("h01"), _T_4393) @[lsu_bus_buffer.scala 531:98] + node _T_4395 = and(_T_4392, _T_4394) @[lsu_bus_buffer.scala 531:93] + reg _T_4396 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 531:80] + _T_4396 <= _T_4395 @[lsu_bus_buffer.scala 531:80] + node _T_4397 = eq(buf_rst[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 531:81] + node _T_4398 = bits(buf_error, 2, 2) @[lsu_bus_buffer.scala 531:133] + node _T_4399 = mux(buf_error_en[2], UInt<1>("h01"), _T_4398) @[lsu_bus_buffer.scala 531:98] + node _T_4400 = and(_T_4397, _T_4399) @[lsu_bus_buffer.scala 531:93] + reg _T_4401 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 531:80] + _T_4401 <= _T_4400 @[lsu_bus_buffer.scala 531:80] + node _T_4402 = eq(buf_rst[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 531:81] + node _T_4403 = bits(buf_error, 3, 3) @[lsu_bus_buffer.scala 531:133] + node _T_4404 = mux(buf_error_en[3], UInt<1>("h01"), _T_4403) @[lsu_bus_buffer.scala 531:98] + node _T_4405 = and(_T_4402, _T_4404) @[lsu_bus_buffer.scala 531:93] + reg _T_4406 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 531:80] + _T_4406 <= _T_4405 @[lsu_bus_buffer.scala 531:80] + node _T_4407 = cat(_T_4406, _T_4401) @[Cat.scala 29:58] + node _T_4408 = cat(_T_4407, _T_4396) @[Cat.scala 29:58] + node _T_4409 = cat(_T_4408, _T_4391) @[Cat.scala 29:58] + buf_error <= _T_4409 @[lsu_bus_buffer.scala 531:13] + node _T_4410 = cat(io.lsu_busreq_m, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_4411 = mux(io.ldst_dual_m, _T_4410, io.lsu_busreq_m) @[lsu_bus_buffer.scala 532:28] + node _T_4412 = cat(io.lsu_busreq_r, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_4413 = mux(io.ldst_dual_r, _T_4412, io.lsu_busreq_r) @[lsu_bus_buffer.scala 532:94] + node _T_4414 = add(_T_4411, _T_4413) @[lsu_bus_buffer.scala 532:88] + node _T_4415 = add(_T_4414, ibuf_valid) @[lsu_bus_buffer.scala 532:154] + node _T_4416 = neq(buf_state[0], UInt<3>("h00")) @[lsu_bus_buffer.scala 532:190] + node _T_4417 = neq(buf_state[1], UInt<3>("h00")) @[lsu_bus_buffer.scala 532:190] + node _T_4418 = neq(buf_state[2], UInt<3>("h00")) @[lsu_bus_buffer.scala 532:190] + node _T_4419 = neq(buf_state[3], UInt<3>("h00")) @[lsu_bus_buffer.scala 532:190] + node _T_4420 = add(_T_4416, _T_4417) @[lsu_bus_buffer.scala 532:217] + node _T_4421 = add(_T_4420, _T_4418) @[lsu_bus_buffer.scala 532:217] + node _T_4422 = add(_T_4421, _T_4419) @[lsu_bus_buffer.scala 532:217] + node _T_4423 = add(_T_4415, _T_4422) @[lsu_bus_buffer.scala 532:169] + node buf_numvld_any = tail(_T_4423, 1) @[lsu_bus_buffer.scala 532:169] + node _T_4424 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 533:60] + node _T_4425 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 533:79] + node _T_4426 = and(_T_4424, _T_4425) @[lsu_bus_buffer.scala 533:64] + node _T_4427 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 533:91] + node _T_4428 = and(_T_4426, _T_4427) @[lsu_bus_buffer.scala 533:89] + node _T_4429 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 533:60] + node _T_4430 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 533:79] + node _T_4431 = and(_T_4429, _T_4430) @[lsu_bus_buffer.scala 533:64] + node _T_4432 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 533:91] + node _T_4433 = and(_T_4431, _T_4432) @[lsu_bus_buffer.scala 533:89] + node _T_4434 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 533:60] + node _T_4435 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 533:79] + node _T_4436 = and(_T_4434, _T_4435) @[lsu_bus_buffer.scala 533:64] + node _T_4437 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 533:91] + node _T_4438 = and(_T_4436, _T_4437) @[lsu_bus_buffer.scala 533:89] + node _T_4439 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 533:60] + node _T_4440 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 533:79] + node _T_4441 = and(_T_4439, _T_4440) @[lsu_bus_buffer.scala 533:64] + node _T_4442 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 533:91] + node _T_4443 = and(_T_4441, _T_4442) @[lsu_bus_buffer.scala 533:89] + node _T_4444 = add(_T_4443, _T_4438) @[lsu_bus_buffer.scala 533:142] + node _T_4445 = add(_T_4444, _T_4433) @[lsu_bus_buffer.scala 533:142] + node _T_4446 = add(_T_4445, _T_4428) @[lsu_bus_buffer.scala 533:142] + buf_numvld_wrcmd_any <= _T_4446 @[lsu_bus_buffer.scala 533:24] + node _T_4447 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 534:63] + node _T_4448 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 534:75] + node _T_4449 = and(_T_4447, _T_4448) @[lsu_bus_buffer.scala 534:73] + node _T_4450 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 534:63] + node _T_4451 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 534:75] + node _T_4452 = and(_T_4450, _T_4451) @[lsu_bus_buffer.scala 534:73] + node _T_4453 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 534:63] + node _T_4454 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 534:75] + node _T_4455 = and(_T_4453, _T_4454) @[lsu_bus_buffer.scala 534:73] + node _T_4456 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 534:63] + node _T_4457 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 534:75] + node _T_4458 = and(_T_4456, _T_4457) @[lsu_bus_buffer.scala 534:73] + node _T_4459 = add(_T_4458, _T_4455) @[lsu_bus_buffer.scala 534:126] + node _T_4460 = add(_T_4459, _T_4452) @[lsu_bus_buffer.scala 534:126] + node _T_4461 = add(_T_4460, _T_4449) @[lsu_bus_buffer.scala 534:126] + buf_numvld_cmd_any <= _T_4461 @[lsu_bus_buffer.scala 534:22] + node _T_4462 = eq(buf_state[0], UInt<3>("h01")) @[lsu_bus_buffer.scala 535:63] + node _T_4463 = eq(buf_state[0], UInt<3>("h02")) @[lsu_bus_buffer.scala 535:90] + node _T_4464 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 535:102] + node _T_4465 = and(_T_4463, _T_4464) @[lsu_bus_buffer.scala 535:100] + node _T_4466 = or(_T_4462, _T_4465) @[lsu_bus_buffer.scala 535:74] + node _T_4467 = eq(buf_state[1], UInt<3>("h01")) @[lsu_bus_buffer.scala 535:63] + node _T_4468 = eq(buf_state[1], UInt<3>("h02")) @[lsu_bus_buffer.scala 535:90] + node _T_4469 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 535:102] + node _T_4470 = and(_T_4468, _T_4469) @[lsu_bus_buffer.scala 535:100] + node _T_4471 = or(_T_4467, _T_4470) @[lsu_bus_buffer.scala 535:74] + node _T_4472 = eq(buf_state[2], UInt<3>("h01")) @[lsu_bus_buffer.scala 535:63] + node _T_4473 = eq(buf_state[2], UInt<3>("h02")) @[lsu_bus_buffer.scala 535:90] + node _T_4474 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 535:102] + node _T_4475 = and(_T_4473, _T_4474) @[lsu_bus_buffer.scala 535:100] + node _T_4476 = or(_T_4472, _T_4475) @[lsu_bus_buffer.scala 535:74] + node _T_4477 = eq(buf_state[3], UInt<3>("h01")) @[lsu_bus_buffer.scala 535:63] + node _T_4478 = eq(buf_state[3], UInt<3>("h02")) @[lsu_bus_buffer.scala 535:90] + node _T_4479 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 535:102] + node _T_4480 = and(_T_4478, _T_4479) @[lsu_bus_buffer.scala 535:100] + node _T_4481 = or(_T_4477, _T_4480) @[lsu_bus_buffer.scala 535:74] + node _T_4482 = add(_T_4481, _T_4476) @[lsu_bus_buffer.scala 535:154] + node _T_4483 = add(_T_4482, _T_4471) @[lsu_bus_buffer.scala 535:154] + node _T_4484 = add(_T_4483, _T_4466) @[lsu_bus_buffer.scala 535:154] + buf_numvld_pend_any <= _T_4484 @[lsu_bus_buffer.scala 535:23] + node _T_4485 = eq(buf_state[0], UInt<3>("h05")) @[lsu_bus_buffer.scala 536:61] + node _T_4486 = eq(buf_state[1], UInt<3>("h05")) @[lsu_bus_buffer.scala 536:61] + node _T_4487 = eq(buf_state[2], UInt<3>("h05")) @[lsu_bus_buffer.scala 536:61] + node _T_4488 = eq(buf_state[3], UInt<3>("h05")) @[lsu_bus_buffer.scala 536:61] + node _T_4489 = or(_T_4488, _T_4487) @[lsu_bus_buffer.scala 536:93] + node _T_4490 = or(_T_4489, _T_4486) @[lsu_bus_buffer.scala 536:93] + node _T_4491 = or(_T_4490, _T_4485) @[lsu_bus_buffer.scala 536:93] + any_done_wait_state <= _T_4491 @[lsu_bus_buffer.scala 536:23] + node _T_4492 = orr(buf_numvld_pend_any) @[lsu_bus_buffer.scala 537:53] + io.lsu_bus_buffer_pend_any <= _T_4492 @[lsu_bus_buffer.scala 537:30] + node _T_4493 = and(io.ldst_dual_d, io.dec_lsu_valid_raw_d) @[lsu_bus_buffer.scala 538:52] + node _T_4494 = geq(buf_numvld_any, UInt<2>("h03")) @[lsu_bus_buffer.scala 538:92] + node _T_4495 = eq(buf_numvld_any, UInt<3>("h04")) @[lsu_bus_buffer.scala 538:121] + node _T_4496 = mux(_T_4493, _T_4494, _T_4495) @[lsu_bus_buffer.scala 538:36] + io.lsu_bus_buffer_full_any <= _T_4496 @[lsu_bus_buffer.scala 538:30] + node _T_4497 = orr(buf_state[0]) @[lsu_bus_buffer.scala 539:52] + node _T_4498 = orr(buf_state[1]) @[lsu_bus_buffer.scala 539:52] + node _T_4499 = orr(buf_state[2]) @[lsu_bus_buffer.scala 539:52] + node _T_4500 = orr(buf_state[3]) @[lsu_bus_buffer.scala 539:52] + node _T_4501 = or(_T_4497, _T_4498) @[lsu_bus_buffer.scala 539:65] + node _T_4502 = or(_T_4501, _T_4499) @[lsu_bus_buffer.scala 539:65] + node _T_4503 = or(_T_4502, _T_4500) @[lsu_bus_buffer.scala 539:65] + node _T_4504 = eq(_T_4503, UInt<1>("h00")) @[lsu_bus_buffer.scala 539:34] + node _T_4505 = eq(ibuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 539:72] + node _T_4506 = and(_T_4504, _T_4505) @[lsu_bus_buffer.scala 539:70] + node _T_4507 = eq(obuf_valid, UInt<1>("h00")) @[lsu_bus_buffer.scala 539:86] + node _T_4508 = and(_T_4506, _T_4507) @[lsu_bus_buffer.scala 539:84] + io.lsu_bus_buffer_empty_any <= _T_4508 @[lsu_bus_buffer.scala 539:31] + node _T_4509 = and(io.lsu_busreq_m, io.lsu_pkt_m.valid) @[lsu_bus_buffer.scala 541:64] + node _T_4510 = and(_T_4509, io.lsu_pkt_m.bits.load) @[lsu_bus_buffer.scala 541:85] + node _T_4511 = eq(io.flush_m_up, UInt<1>("h00")) @[lsu_bus_buffer.scala 541:112] + node _T_4512 = and(_T_4510, _T_4511) @[lsu_bus_buffer.scala 541:110] + node _T_4513 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[lsu_bus_buffer.scala 541:129] + node _T_4514 = and(_T_4512, _T_4513) @[lsu_bus_buffer.scala 541:127] + io.dctl_busbuff.lsu_nonblock_load_valid_m <= _T_4514 @[lsu_bus_buffer.scala 541:45] + io.dctl_busbuff.lsu_nonblock_load_tag_m <= WrPtr0_m @[lsu_bus_buffer.scala 542:43] + wire lsu_nonblock_load_valid_r : UInt<1> + lsu_nonblock_load_valid_r <= UInt<1>("h00") + node _T_4515 = eq(io.lsu_commit_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 544:74] + node _T_4516 = and(lsu_nonblock_load_valid_r, _T_4515) @[lsu_bus_buffer.scala 544:72] + io.dctl_busbuff.lsu_nonblock_load_inv_r <= _T_4516 @[lsu_bus_buffer.scala 544:43] + io.dctl_busbuff.lsu_nonblock_load_inv_tag_r <= WrPtr0_r @[lsu_bus_buffer.scala 545:47] + node _T_4517 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 546:80] + node _T_4518 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 546:106] + node _T_4519 = eq(_T_4518, UInt<1>("h00")) @[lsu_bus_buffer.scala 546:95] + node _T_4520 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 546:80] + node _T_4521 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 546:106] + node _T_4522 = eq(_T_4521, UInt<1>("h00")) @[lsu_bus_buffer.scala 546:95] + node _T_4523 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 546:80] + node _T_4524 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 546:106] + node _T_4525 = eq(_T_4524, UInt<1>("h00")) @[lsu_bus_buffer.scala 546:95] + node _T_4526 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 546:80] + node _T_4527 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 546:106] + node _T_4528 = eq(_T_4527, UInt<1>("h00")) @[lsu_bus_buffer.scala 546:95] + node _T_4529 = mux(_T_4517, _T_4519, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4530 = mux(_T_4520, _T_4522, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4531 = mux(_T_4523, _T_4525, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4532 = mux(_T_4526, _T_4528, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4533 = or(_T_4529, _T_4530) @[Mux.scala 27:72] + node _T_4534 = or(_T_4533, _T_4531) @[Mux.scala 27:72] + node _T_4535 = or(_T_4534, _T_4532) @[Mux.scala 27:72] + wire lsu_nonblock_load_data_ready : UInt<1> @[Mux.scala 27:72] + lsu_nonblock_load_data_ready <= _T_4535 @[Mux.scala 27:72] + node _T_4536 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 547:93] + node _T_4537 = bits(buf_error, 0, 0) @[lsu_bus_buffer.scala 547:117] + node _T_4538 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 547:133] + node _T_4539 = eq(_T_4538, UInt<1>("h00")) @[lsu_bus_buffer.scala 547:123] + node _T_4540 = and(_T_4537, _T_4539) @[lsu_bus_buffer.scala 547:121] + node _T_4541 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 547:93] + node _T_4542 = bits(buf_error, 1, 1) @[lsu_bus_buffer.scala 547:117] + node _T_4543 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 547:133] + node _T_4544 = eq(_T_4543, UInt<1>("h00")) @[lsu_bus_buffer.scala 547:123] + node _T_4545 = and(_T_4542, _T_4544) @[lsu_bus_buffer.scala 547:121] + node _T_4546 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 547:93] + node _T_4547 = bits(buf_error, 2, 2) @[lsu_bus_buffer.scala 547:117] + node _T_4548 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 547:133] + node _T_4549 = eq(_T_4548, UInt<1>("h00")) @[lsu_bus_buffer.scala 547:123] + node _T_4550 = and(_T_4547, _T_4549) @[lsu_bus_buffer.scala 547:121] + node _T_4551 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 547:93] + node _T_4552 = bits(buf_error, 3, 3) @[lsu_bus_buffer.scala 547:117] + node _T_4553 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 547:133] + node _T_4554 = eq(_T_4553, UInt<1>("h00")) @[lsu_bus_buffer.scala 547:123] + node _T_4555 = and(_T_4552, _T_4554) @[lsu_bus_buffer.scala 547:121] + node _T_4556 = mux(_T_4536, _T_4540, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4557 = mux(_T_4541, _T_4545, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4558 = mux(_T_4546, _T_4550, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4559 = mux(_T_4551, _T_4555, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4560 = or(_T_4556, _T_4557) @[Mux.scala 27:72] + node _T_4561 = or(_T_4560, _T_4558) @[Mux.scala 27:72] + node _T_4562 = or(_T_4561, _T_4559) @[Mux.scala 27:72] + wire _T_4563 : UInt<1> @[Mux.scala 27:72] + _T_4563 <= _T_4562 @[Mux.scala 27:72] + io.dctl_busbuff.lsu_nonblock_load_data_error <= _T_4563 @[lsu_bus_buffer.scala 547:48] + node _T_4564 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 548:91] + node _T_4565 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 548:114] + node _T_4566 = eq(_T_4565, UInt<1>("h00")) @[lsu_bus_buffer.scala 548:104] + node _T_4567 = and(_T_4564, _T_4566) @[lsu_bus_buffer.scala 548:102] + node _T_4568 = eq(buf_dual[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 548:121] + node _T_4569 = eq(buf_dualhi[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 548:136] + node _T_4570 = or(_T_4568, _T_4569) @[lsu_bus_buffer.scala 548:134] + node _T_4571 = and(_T_4567, _T_4570) @[lsu_bus_buffer.scala 548:118] + node _T_4572 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 548:91] + node _T_4573 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 548:114] + node _T_4574 = eq(_T_4573, UInt<1>("h00")) @[lsu_bus_buffer.scala 548:104] + node _T_4575 = and(_T_4572, _T_4574) @[lsu_bus_buffer.scala 548:102] + node _T_4576 = eq(buf_dual[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 548:121] + node _T_4577 = eq(buf_dualhi[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 548:136] + node _T_4578 = or(_T_4576, _T_4577) @[lsu_bus_buffer.scala 548:134] + node _T_4579 = and(_T_4575, _T_4578) @[lsu_bus_buffer.scala 548:118] + node _T_4580 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 548:91] + node _T_4581 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 548:114] + node _T_4582 = eq(_T_4581, UInt<1>("h00")) @[lsu_bus_buffer.scala 548:104] + node _T_4583 = and(_T_4580, _T_4582) @[lsu_bus_buffer.scala 548:102] + node _T_4584 = eq(buf_dual[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 548:121] + node _T_4585 = eq(buf_dualhi[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 548:136] + node _T_4586 = or(_T_4584, _T_4585) @[lsu_bus_buffer.scala 548:134] + node _T_4587 = and(_T_4583, _T_4586) @[lsu_bus_buffer.scala 548:118] + node _T_4588 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 548:91] + node _T_4589 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 548:114] + node _T_4590 = eq(_T_4589, UInt<1>("h00")) @[lsu_bus_buffer.scala 548:104] + node _T_4591 = and(_T_4588, _T_4590) @[lsu_bus_buffer.scala 548:102] + node _T_4592 = eq(buf_dual[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 548:121] + node _T_4593 = eq(buf_dualhi[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 548:136] + node _T_4594 = or(_T_4592, _T_4593) @[lsu_bus_buffer.scala 548:134] + node _T_4595 = and(_T_4591, _T_4594) @[lsu_bus_buffer.scala 548:118] + node _T_4596 = mux(_T_4571, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4597 = mux(_T_4579, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4598 = mux(_T_4587, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4599 = mux(_T_4595, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4600 = or(_T_4596, _T_4597) @[Mux.scala 27:72] + node _T_4601 = or(_T_4600, _T_4598) @[Mux.scala 27:72] + node _T_4602 = or(_T_4601, _T_4599) @[Mux.scala 27:72] + wire _T_4603 : UInt<2> @[Mux.scala 27:72] + _T_4603 <= _T_4602 @[Mux.scala 27:72] + io.dctl_busbuff.lsu_nonblock_load_data_tag <= _T_4603 @[lsu_bus_buffer.scala 548:45] + node _T_4604 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 549:78] + node _T_4605 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 549:101] + node _T_4606 = eq(_T_4605, UInt<1>("h00")) @[lsu_bus_buffer.scala 549:91] + node _T_4607 = and(_T_4604, _T_4606) @[lsu_bus_buffer.scala 549:89] + node _T_4608 = eq(buf_dual[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 549:108] + node _T_4609 = eq(buf_dualhi[0], UInt<1>("h00")) @[lsu_bus_buffer.scala 549:123] + node _T_4610 = or(_T_4608, _T_4609) @[lsu_bus_buffer.scala 549:121] + node _T_4611 = and(_T_4607, _T_4610) @[lsu_bus_buffer.scala 549:105] + node _T_4612 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 549:78] + node _T_4613 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 549:101] + node _T_4614 = eq(_T_4613, UInt<1>("h00")) @[lsu_bus_buffer.scala 549:91] + node _T_4615 = and(_T_4612, _T_4614) @[lsu_bus_buffer.scala 549:89] + node _T_4616 = eq(buf_dual[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 549:108] + node _T_4617 = eq(buf_dualhi[1], UInt<1>("h00")) @[lsu_bus_buffer.scala 549:123] + node _T_4618 = or(_T_4616, _T_4617) @[lsu_bus_buffer.scala 549:121] + node _T_4619 = and(_T_4615, _T_4618) @[lsu_bus_buffer.scala 549:105] + node _T_4620 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 549:78] + node _T_4621 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 549:101] + node _T_4622 = eq(_T_4621, UInt<1>("h00")) @[lsu_bus_buffer.scala 549:91] + node _T_4623 = and(_T_4620, _T_4622) @[lsu_bus_buffer.scala 549:89] + node _T_4624 = eq(buf_dual[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 549:108] + node _T_4625 = eq(buf_dualhi[2], UInt<1>("h00")) @[lsu_bus_buffer.scala 549:123] + node _T_4626 = or(_T_4624, _T_4625) @[lsu_bus_buffer.scala 549:121] + node _T_4627 = and(_T_4623, _T_4626) @[lsu_bus_buffer.scala 549:105] + node _T_4628 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 549:78] + node _T_4629 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 549:101] + node _T_4630 = eq(_T_4629, UInt<1>("h00")) @[lsu_bus_buffer.scala 549:91] + node _T_4631 = and(_T_4628, _T_4630) @[lsu_bus_buffer.scala 549:89] + node _T_4632 = eq(buf_dual[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 549:108] + node _T_4633 = eq(buf_dualhi[3], UInt<1>("h00")) @[lsu_bus_buffer.scala 549:123] + node _T_4634 = or(_T_4632, _T_4633) @[lsu_bus_buffer.scala 549:121] + node _T_4635 = and(_T_4631, _T_4634) @[lsu_bus_buffer.scala 549:105] + node _T_4636 = mux(_T_4611, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4637 = mux(_T_4619, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4638 = mux(_T_4627, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4639 = mux(_T_4635, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4640 = or(_T_4636, _T_4637) @[Mux.scala 27:72] + node _T_4641 = or(_T_4640, _T_4638) @[Mux.scala 27:72] + node _T_4642 = or(_T_4641, _T_4639) @[Mux.scala 27:72] + wire lsu_nonblock_load_data_lo : UInt<32> @[Mux.scala 27:72] + lsu_nonblock_load_data_lo <= _T_4642 @[Mux.scala 27:72] + node _T_4643 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 550:78] + node _T_4644 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 550:101] + node _T_4645 = eq(_T_4644, UInt<1>("h00")) @[lsu_bus_buffer.scala 550:91] + node _T_4646 = and(_T_4643, _T_4645) @[lsu_bus_buffer.scala 550:89] + node _T_4647 = and(buf_dual[0], buf_dualhi[0]) @[lsu_bus_buffer.scala 550:120] + node _T_4648 = and(_T_4646, _T_4647) @[lsu_bus_buffer.scala 550:105] + node _T_4649 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 550:78] + node _T_4650 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 550:101] + node _T_4651 = eq(_T_4650, UInt<1>("h00")) @[lsu_bus_buffer.scala 550:91] + node _T_4652 = and(_T_4649, _T_4651) @[lsu_bus_buffer.scala 550:89] + node _T_4653 = and(buf_dual[1], buf_dualhi[1]) @[lsu_bus_buffer.scala 550:120] + node _T_4654 = and(_T_4652, _T_4653) @[lsu_bus_buffer.scala 550:105] + node _T_4655 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 550:78] + node _T_4656 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 550:101] + node _T_4657 = eq(_T_4656, UInt<1>("h00")) @[lsu_bus_buffer.scala 550:91] + node _T_4658 = and(_T_4655, _T_4657) @[lsu_bus_buffer.scala 550:89] + node _T_4659 = and(buf_dual[2], buf_dualhi[2]) @[lsu_bus_buffer.scala 550:120] + node _T_4660 = and(_T_4658, _T_4659) @[lsu_bus_buffer.scala 550:105] + node _T_4661 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 550:78] + node _T_4662 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 550:101] + node _T_4663 = eq(_T_4662, UInt<1>("h00")) @[lsu_bus_buffer.scala 550:91] + node _T_4664 = and(_T_4661, _T_4663) @[lsu_bus_buffer.scala 550:89] + node _T_4665 = and(buf_dual[3], buf_dualhi[3]) @[lsu_bus_buffer.scala 550:120] + node _T_4666 = and(_T_4664, _T_4665) @[lsu_bus_buffer.scala 550:105] + node _T_4667 = mux(_T_4648, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4668 = mux(_T_4654, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4669 = mux(_T_4660, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4670 = mux(_T_4666, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4671 = or(_T_4667, _T_4668) @[Mux.scala 27:72] + node _T_4672 = or(_T_4671, _T_4669) @[Mux.scala 27:72] + node _T_4673 = or(_T_4672, _T_4670) @[Mux.scala 27:72] + wire lsu_nonblock_load_data_hi : UInt<32> @[Mux.scala 27:72] + lsu_nonblock_load_data_hi <= _T_4673 @[Mux.scala 27:72] + node _T_4674 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_4675 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_4676 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_4677 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_4678 = mux(_T_4674, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4679 = mux(_T_4675, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4680 = mux(_T_4676, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4681 = mux(_T_4677, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4682 = or(_T_4678, _T_4679) @[Mux.scala 27:72] + node _T_4683 = or(_T_4682, _T_4680) @[Mux.scala 27:72] + node _T_4684 = or(_T_4683, _T_4681) @[Mux.scala 27:72] + wire _T_4685 : UInt<32> @[Mux.scala 27:72] + _T_4685 <= _T_4684 @[Mux.scala 27:72] + node lsu_nonblock_addr_offset = bits(_T_4685, 1, 0) @[lsu_bus_buffer.scala 551:96] + node _T_4686 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 62:123] + node _T_4687 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 62:123] + node _T_4688 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 62:123] + node _T_4689 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 62:123] + node _T_4690 = mux(_T_4686, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4691 = mux(_T_4687, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4692 = mux(_T_4688, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4693 = mux(_T_4689, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4694 = or(_T_4690, _T_4691) @[Mux.scala 27:72] + node _T_4695 = or(_T_4694, _T_4692) @[Mux.scala 27:72] + node _T_4696 = or(_T_4695, _T_4693) @[Mux.scala 27:72] + wire lsu_nonblock_sz : UInt<2> @[Mux.scala 27:72] + lsu_nonblock_sz <= _T_4696 @[Mux.scala 27:72] + node _T_4697 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[lsu_bus_buffer.scala 61:118] + node _T_4698 = bits(buf_unsign, 0, 0) @[lsu_bus_buffer.scala 61:129] + node _T_4699 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[lsu_bus_buffer.scala 61:118] + node _T_4700 = bits(buf_unsign, 1, 1) @[lsu_bus_buffer.scala 61:129] + node _T_4701 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[lsu_bus_buffer.scala 61:118] + node _T_4702 = bits(buf_unsign, 2, 2) @[lsu_bus_buffer.scala 61:129] + node _T_4703 = eq(io.dctl_busbuff.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[lsu_bus_buffer.scala 61:118] + node _T_4704 = bits(buf_unsign, 3, 3) @[lsu_bus_buffer.scala 61:129] + node _T_4705 = mux(_T_4697, _T_4698, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4706 = mux(_T_4699, _T_4700, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4707 = mux(_T_4701, _T_4702, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4708 = mux(_T_4703, _T_4704, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4709 = or(_T_4705, _T_4706) @[Mux.scala 27:72] + node _T_4710 = or(_T_4709, _T_4707) @[Mux.scala 27:72] + node _T_4711 = or(_T_4710, _T_4708) @[Mux.scala 27:72] + wire lsu_nonblock_unsign : UInt<1> @[Mux.scala 27:72] + lsu_nonblock_unsign <= _T_4711 @[Mux.scala 27:72] + node _T_4712 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58] + node _T_4713 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[lsu_bus_buffer.scala 555:121] + node lsu_nonblock_data_unalgn = dshr(_T_4712, _T_4713) @[lsu_bus_buffer.scala 555:92] + node _T_4714 = eq(io.dctl_busbuff.lsu_nonblock_load_data_error, UInt<1>("h00")) @[lsu_bus_buffer.scala 557:82] + node _T_4715 = and(lsu_nonblock_load_data_ready, _T_4714) @[lsu_bus_buffer.scala 557:80] + io.dctl_busbuff.lsu_nonblock_load_data_valid <= _T_4715 @[lsu_bus_buffer.scala 557:48] + node _T_4716 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[lsu_bus_buffer.scala 558:81] + node _T_4717 = and(lsu_nonblock_unsign, _T_4716) @[lsu_bus_buffer.scala 558:63] + node _T_4718 = bits(lsu_nonblock_data_unalgn, 7, 0) @[lsu_bus_buffer.scala 558:131] + node _T_4719 = cat(UInt<24>("h00"), _T_4718) @[Cat.scala 29:58] + node _T_4720 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[lsu_bus_buffer.scala 559:45] + node _T_4721 = and(lsu_nonblock_unsign, _T_4720) @[lsu_bus_buffer.scala 559:26] + node _T_4722 = bits(lsu_nonblock_data_unalgn, 15, 0) @[lsu_bus_buffer.scala 559:95] + node _T_4723 = cat(UInt<16>("h00"), _T_4722) @[Cat.scala 29:58] + node _T_4724 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[lsu_bus_buffer.scala 560:6] + node _T_4725 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[lsu_bus_buffer.scala 560:45] + node _T_4726 = and(_T_4724, _T_4725) @[lsu_bus_buffer.scala 560:27] + node _T_4727 = bits(lsu_nonblock_data_unalgn, 7, 7) @[lsu_bus_buffer.scala 560:93] + node _T_4728 = bits(_T_4727, 0, 0) @[Bitwise.scala 72:15] + node _T_4729 = mux(_T_4728, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_4730 = bits(lsu_nonblock_data_unalgn, 7, 0) @[lsu_bus_buffer.scala 560:123] + node _T_4731 = cat(_T_4729, _T_4730) @[Cat.scala 29:58] + node _T_4732 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[lsu_bus_buffer.scala 561:6] + node _T_4733 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[lsu_bus_buffer.scala 561:45] + node _T_4734 = and(_T_4732, _T_4733) @[lsu_bus_buffer.scala 561:27] + node _T_4735 = bits(lsu_nonblock_data_unalgn, 15, 15) @[lsu_bus_buffer.scala 561:93] + node _T_4736 = bits(_T_4735, 0, 0) @[Bitwise.scala 72:15] + node _T_4737 = mux(_T_4736, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_4738 = bits(lsu_nonblock_data_unalgn, 15, 0) @[lsu_bus_buffer.scala 561:124] + node _T_4739 = cat(_T_4737, _T_4738) @[Cat.scala 29:58] + node _T_4740 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[lsu_bus_buffer.scala 562:21] + node _T_4741 = mux(_T_4717, _T_4719, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4742 = mux(_T_4721, _T_4723, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4743 = mux(_T_4726, _T_4731, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4744 = mux(_T_4734, _T_4739, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4745 = mux(_T_4740, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4746 = or(_T_4741, _T_4742) @[Mux.scala 27:72] + node _T_4747 = or(_T_4746, _T_4743) @[Mux.scala 27:72] + node _T_4748 = or(_T_4747, _T_4744) @[Mux.scala 27:72] + node _T_4749 = or(_T_4748, _T_4745) @[Mux.scala 27:72] + wire _T_4750 : UInt<64> @[Mux.scala 27:72] + _T_4750 <= _T_4749 @[Mux.scala 27:72] + io.lsu_nonblock_load_data <= _T_4750 @[lsu_bus_buffer.scala 558:29] + node _T_4751 = eq(buf_state[0], UInt<3>("h03")) @[lsu_bus_buffer.scala 563:62] + node _T_4752 = bits(buf_sideeffect, 0, 0) @[lsu_bus_buffer.scala 563:89] + node _T_4753 = and(_T_4751, _T_4752) @[lsu_bus_buffer.scala 563:73] + node _T_4754 = and(_T_4753, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 563:93] + node _T_4755 = eq(buf_state[1], UInt<3>("h03")) @[lsu_bus_buffer.scala 563:62] + node _T_4756 = bits(buf_sideeffect, 1, 1) @[lsu_bus_buffer.scala 563:89] + node _T_4757 = and(_T_4755, _T_4756) @[lsu_bus_buffer.scala 563:73] + node _T_4758 = and(_T_4757, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 563:93] + node _T_4759 = eq(buf_state[2], UInt<3>("h03")) @[lsu_bus_buffer.scala 563:62] + node _T_4760 = bits(buf_sideeffect, 2, 2) @[lsu_bus_buffer.scala 563:89] + node _T_4761 = and(_T_4759, _T_4760) @[lsu_bus_buffer.scala 563:73] + node _T_4762 = and(_T_4761, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 563:93] + node _T_4763 = eq(buf_state[3], UInt<3>("h03")) @[lsu_bus_buffer.scala 563:62] + node _T_4764 = bits(buf_sideeffect, 3, 3) @[lsu_bus_buffer.scala 563:89] + node _T_4765 = and(_T_4763, _T_4764) @[lsu_bus_buffer.scala 563:73] + node _T_4766 = and(_T_4765, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 563:93] + node _T_4767 = or(_T_4754, _T_4758) @[lsu_bus_buffer.scala 563:153] + node _T_4768 = or(_T_4767, _T_4762) @[lsu_bus_buffer.scala 563:153] + node _T_4769 = or(_T_4768, _T_4766) @[lsu_bus_buffer.scala 563:153] + node _T_4770 = and(obuf_valid, obuf_sideeffect) @[lsu_bus_buffer.scala 563:171] + node _T_4771 = and(_T_4770, io.tlu_busbuff.dec_tlu_sideeffect_posted_disable) @[lsu_bus_buffer.scala 563:189] + node _T_4772 = or(_T_4769, _T_4771) @[lsu_bus_buffer.scala 563:157] + bus_sideeffect_pend <= _T_4772 @[lsu_bus_buffer.scala 563:23] + node _T_4773 = eq(buf_state[0], UInt<3>("h03")) @[lsu_bus_buffer.scala 564:71] + node _T_4774 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 565:31] + node _T_4775 = bits(buf_addr[0], 31, 3) @[lsu_bus_buffer.scala 565:51] + node _T_4776 = eq(_T_4774, _T_4775) @[lsu_bus_buffer.scala 565:37] + node _T_4777 = and(obuf_valid, _T_4776) @[lsu_bus_buffer.scala 565:19] + node _T_4778 = eq(obuf_tag0, UInt<1>("h00")) @[lsu_bus_buffer.scala 565:73] + node _T_4779 = eq(obuf_tag1, UInt<1>("h00")) @[lsu_bus_buffer.scala 565:107] + node _T_4780 = and(obuf_merge, _T_4779) @[lsu_bus_buffer.scala 565:95] + node _T_4781 = or(_T_4778, _T_4780) @[lsu_bus_buffer.scala 565:81] + node _T_4782 = eq(_T_4781, UInt<1>("h00")) @[lsu_bus_buffer.scala 565:61] + node _T_4783 = and(_T_4777, _T_4782) @[lsu_bus_buffer.scala 565:59] + node _T_4784 = eq(buf_state[1], UInt<3>("h03")) @[lsu_bus_buffer.scala 564:71] + node _T_4785 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 565:31] + node _T_4786 = bits(buf_addr[1], 31, 3) @[lsu_bus_buffer.scala 565:51] + node _T_4787 = eq(_T_4785, _T_4786) @[lsu_bus_buffer.scala 565:37] + node _T_4788 = and(obuf_valid, _T_4787) @[lsu_bus_buffer.scala 565:19] + node _T_4789 = eq(obuf_tag0, UInt<1>("h01")) @[lsu_bus_buffer.scala 565:73] + node _T_4790 = eq(obuf_tag1, UInt<1>("h01")) @[lsu_bus_buffer.scala 565:107] + node _T_4791 = and(obuf_merge, _T_4790) @[lsu_bus_buffer.scala 565:95] + node _T_4792 = or(_T_4789, _T_4791) @[lsu_bus_buffer.scala 565:81] + node _T_4793 = eq(_T_4792, UInt<1>("h00")) @[lsu_bus_buffer.scala 565:61] + node _T_4794 = and(_T_4788, _T_4793) @[lsu_bus_buffer.scala 565:59] + node _T_4795 = eq(buf_state[2], UInt<3>("h03")) @[lsu_bus_buffer.scala 564:71] + node _T_4796 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 565:31] + node _T_4797 = bits(buf_addr[2], 31, 3) @[lsu_bus_buffer.scala 565:51] + node _T_4798 = eq(_T_4796, _T_4797) @[lsu_bus_buffer.scala 565:37] + node _T_4799 = and(obuf_valid, _T_4798) @[lsu_bus_buffer.scala 565:19] + node _T_4800 = eq(obuf_tag0, UInt<2>("h02")) @[lsu_bus_buffer.scala 565:73] + node _T_4801 = eq(obuf_tag1, UInt<2>("h02")) @[lsu_bus_buffer.scala 565:107] + node _T_4802 = and(obuf_merge, _T_4801) @[lsu_bus_buffer.scala 565:95] + node _T_4803 = or(_T_4800, _T_4802) @[lsu_bus_buffer.scala 565:81] + node _T_4804 = eq(_T_4803, UInt<1>("h00")) @[lsu_bus_buffer.scala 565:61] + node _T_4805 = and(_T_4799, _T_4804) @[lsu_bus_buffer.scala 565:59] + node _T_4806 = eq(buf_state[3], UInt<3>("h03")) @[lsu_bus_buffer.scala 564:71] + node _T_4807 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 565:31] + node _T_4808 = bits(buf_addr[3], 31, 3) @[lsu_bus_buffer.scala 565:51] + node _T_4809 = eq(_T_4807, _T_4808) @[lsu_bus_buffer.scala 565:37] + node _T_4810 = and(obuf_valid, _T_4809) @[lsu_bus_buffer.scala 565:19] + node _T_4811 = eq(obuf_tag0, UInt<2>("h03")) @[lsu_bus_buffer.scala 565:73] + node _T_4812 = eq(obuf_tag1, UInt<2>("h03")) @[lsu_bus_buffer.scala 565:107] + node _T_4813 = and(obuf_merge, _T_4812) @[lsu_bus_buffer.scala 565:95] + node _T_4814 = or(_T_4811, _T_4813) @[lsu_bus_buffer.scala 565:81] + node _T_4815 = eq(_T_4814, UInt<1>("h00")) @[lsu_bus_buffer.scala 565:61] + node _T_4816 = and(_T_4810, _T_4815) @[lsu_bus_buffer.scala 565:59] + node _T_4817 = mux(_T_4773, _T_4783, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4818 = mux(_T_4784, _T_4794, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4819 = mux(_T_4795, _T_4805, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4820 = mux(_T_4806, _T_4816, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4821 = or(_T_4817, _T_4818) @[Mux.scala 27:72] + node _T_4822 = or(_T_4821, _T_4819) @[Mux.scala 27:72] + node _T_4823 = or(_T_4822, _T_4820) @[Mux.scala 27:72] + wire _T_4824 : UInt<1> @[Mux.scala 27:72] + _T_4824 <= _T_4823 @[Mux.scala 27:72] + bus_addr_match_pending <= _T_4824 @[lsu_bus_buffer.scala 564:26] + node _T_4825 = or(obuf_cmd_done, obuf_data_done) @[lsu_bus_buffer.scala 567:54] + node _T_4826 = mux(obuf_cmd_done, io.lsu_axi.w.ready, io.lsu_axi.aw.ready) @[lsu_bus_buffer.scala 567:75] + node _T_4827 = and(io.lsu_axi.aw.ready, io.lsu_axi.w.ready) @[lsu_bus_buffer.scala 567:153] + node _T_4828 = mux(_T_4825, _T_4826, _T_4827) @[lsu_bus_buffer.scala 567:39] + node _T_4829 = mux(obuf_write, _T_4828, io.lsu_axi.ar.ready) @[lsu_bus_buffer.scala 567:23] + bus_cmd_ready <= _T_4829 @[lsu_bus_buffer.scala 567:17] + node _T_4830 = and(io.lsu_axi.aw.valid, io.lsu_axi.aw.ready) @[lsu_bus_buffer.scala 568:40] + bus_wcmd_sent <= _T_4830 @[lsu_bus_buffer.scala 568:17] + node _T_4831 = and(io.lsu_axi.w.valid, io.lsu_axi.w.ready) @[lsu_bus_buffer.scala 569:40] + bus_wdata_sent <= _T_4831 @[lsu_bus_buffer.scala 569:18] + node _T_4832 = or(obuf_cmd_done, bus_wcmd_sent) @[lsu_bus_buffer.scala 570:35] + node _T_4833 = or(obuf_data_done, bus_wdata_sent) @[lsu_bus_buffer.scala 570:70] + node _T_4834 = and(_T_4832, _T_4833) @[lsu_bus_buffer.scala 570:52] + node _T_4835 = and(io.lsu_axi.ar.valid, io.lsu_axi.ar.ready) @[lsu_bus_buffer.scala 570:112] + node _T_4836 = or(_T_4834, _T_4835) @[lsu_bus_buffer.scala 570:89] + bus_cmd_sent <= _T_4836 @[lsu_bus_buffer.scala 570:16] + node _T_4837 = and(io.lsu_axi.r.valid, io.lsu_axi.r.ready) @[lsu_bus_buffer.scala 571:38] + bus_rsp_read <= _T_4837 @[lsu_bus_buffer.scala 571:16] + node _T_4838 = and(io.lsu_axi.b.valid, io.lsu_axi.b.ready) @[lsu_bus_buffer.scala 572:39] + bus_rsp_write <= _T_4838 @[lsu_bus_buffer.scala 572:17] + bus_rsp_read_tag <= io.lsu_axi.r.bits.id @[lsu_bus_buffer.scala 573:20] + bus_rsp_write_tag <= io.lsu_axi.b.bits.id @[lsu_bus_buffer.scala 574:21] + node _T_4839 = neq(io.lsu_axi.b.bits.resp, UInt<1>("h00")) @[lsu_bus_buffer.scala 575:66] + node _T_4840 = and(bus_rsp_write, _T_4839) @[lsu_bus_buffer.scala 575:40] + bus_rsp_write_error <= _T_4840 @[lsu_bus_buffer.scala 575:23] + node _T_4841 = neq(io.lsu_axi.r.bits.resp, UInt<1>("h00")) @[lsu_bus_buffer.scala 576:64] + node _T_4842 = and(bus_rsp_read, _T_4841) @[lsu_bus_buffer.scala 576:38] + bus_rsp_read_error <= _T_4842 @[lsu_bus_buffer.scala 576:22] + bus_rsp_rdata <= io.lsu_axi.r.bits.data @[lsu_bus_buffer.scala 577:17] + node _T_4843 = and(obuf_valid, obuf_write) @[lsu_bus_buffer.scala 580:37] + node _T_4844 = eq(obuf_cmd_done, UInt<1>("h00")) @[lsu_bus_buffer.scala 580:52] + node _T_4845 = and(_T_4843, _T_4844) @[lsu_bus_buffer.scala 580:50] + node _T_4846 = eq(bus_addr_match_pending, UInt<1>("h00")) @[lsu_bus_buffer.scala 580:69] + node _T_4847 = and(_T_4845, _T_4846) @[lsu_bus_buffer.scala 580:67] + io.lsu_axi.aw.valid <= _T_4847 @[lsu_bus_buffer.scala 580:23] + io.lsu_axi.aw.bits.id <= obuf_tag0 @[lsu_bus_buffer.scala 581:25] + node _T_4848 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 582:75] + node _T_4849 = cat(_T_4848, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4850 = mux(obuf_sideeffect, obuf_addr, _T_4849) @[lsu_bus_buffer.scala 582:33] + io.lsu_axi.aw.bits.addr <= _T_4850 @[lsu_bus_buffer.scala 582:27] + node _T_4851 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4852 = mux(obuf_sideeffect, _T_4851, UInt<3>("h03")) @[lsu_bus_buffer.scala 583:33] + io.lsu_axi.aw.bits.size <= _T_4852 @[lsu_bus_buffer.scala 583:27] + io.lsu_axi.aw.bits.prot <= UInt<3>("h01") @[lsu_bus_buffer.scala 584:27] + node _T_4853 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[lsu_bus_buffer.scala 585:34] + io.lsu_axi.aw.bits.cache <= _T_4853 @[lsu_bus_buffer.scala 585:28] + node _T_4854 = bits(obuf_addr, 31, 28) @[lsu_bus_buffer.scala 586:41] + io.lsu_axi.aw.bits.region <= _T_4854 @[lsu_bus_buffer.scala 586:29] + io.lsu_axi.aw.bits.len <= UInt<1>("h00") @[lsu_bus_buffer.scala 587:26] + io.lsu_axi.aw.bits.burst <= UInt<2>("h01") @[lsu_bus_buffer.scala 588:28] + io.lsu_axi.aw.bits.qos <= UInt<1>("h00") @[lsu_bus_buffer.scala 589:26] + io.lsu_axi.aw.bits.lock <= UInt<1>("h00") @[lsu_bus_buffer.scala 590:27] + node _T_4855 = and(obuf_valid, obuf_write) @[lsu_bus_buffer.scala 592:36] + node _T_4856 = eq(obuf_data_done, UInt<1>("h00")) @[lsu_bus_buffer.scala 592:51] + node _T_4857 = and(_T_4855, _T_4856) @[lsu_bus_buffer.scala 592:49] + node _T_4858 = eq(bus_addr_match_pending, UInt<1>("h00")) @[lsu_bus_buffer.scala 592:69] + node _T_4859 = and(_T_4857, _T_4858) @[lsu_bus_buffer.scala 592:67] + io.lsu_axi.w.valid <= _T_4859 @[lsu_bus_buffer.scala 592:22] + node _T_4860 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15] + node _T_4861 = mux(_T_4860, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_4862 = and(obuf_byteen, _T_4861) @[lsu_bus_buffer.scala 593:41] + io.lsu_axi.w.bits.strb <= _T_4862 @[lsu_bus_buffer.scala 593:26] + io.lsu_axi.w.bits.data <= obuf_data @[lsu_bus_buffer.scala 594:26] + io.lsu_axi.w.bits.last <= UInt<1>("h01") @[lsu_bus_buffer.scala 595:26] + node _T_4863 = eq(obuf_write, UInt<1>("h00")) @[lsu_bus_buffer.scala 597:39] + node _T_4864 = and(obuf_valid, _T_4863) @[lsu_bus_buffer.scala 597:37] + node _T_4865 = eq(obuf_nosend, UInt<1>("h00")) @[lsu_bus_buffer.scala 597:53] + node _T_4866 = and(_T_4864, _T_4865) @[lsu_bus_buffer.scala 597:51] + node _T_4867 = eq(bus_addr_match_pending, UInt<1>("h00")) @[lsu_bus_buffer.scala 597:68] + node _T_4868 = and(_T_4866, _T_4867) @[lsu_bus_buffer.scala 597:66] + io.lsu_axi.ar.valid <= _T_4868 @[lsu_bus_buffer.scala 597:23] + io.lsu_axi.ar.bits.id <= obuf_tag0 @[lsu_bus_buffer.scala 598:25] + node _T_4869 = bits(obuf_addr, 31, 3) @[lsu_bus_buffer.scala 599:75] + node _T_4870 = cat(_T_4869, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4871 = mux(obuf_sideeffect, obuf_addr, _T_4870) @[lsu_bus_buffer.scala 599:33] + io.lsu_axi.ar.bits.addr <= _T_4871 @[lsu_bus_buffer.scala 599:27] + node _T_4872 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4873 = mux(obuf_sideeffect, _T_4872, UInt<3>("h03")) @[lsu_bus_buffer.scala 600:33] + io.lsu_axi.ar.bits.size <= _T_4873 @[lsu_bus_buffer.scala 600:27] + io.lsu_axi.ar.bits.prot <= UInt<3>("h01") @[lsu_bus_buffer.scala 601:27] + node _T_4874 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[lsu_bus_buffer.scala 602:34] + io.lsu_axi.ar.bits.cache <= _T_4874 @[lsu_bus_buffer.scala 602:28] + node _T_4875 = bits(obuf_addr, 31, 28) @[lsu_bus_buffer.scala 603:41] + io.lsu_axi.ar.bits.region <= _T_4875 @[lsu_bus_buffer.scala 603:29] + io.lsu_axi.ar.bits.len <= UInt<1>("h00") @[lsu_bus_buffer.scala 604:26] + io.lsu_axi.ar.bits.burst <= UInt<2>("h01") @[lsu_bus_buffer.scala 605:28] + io.lsu_axi.ar.bits.qos <= UInt<1>("h00") @[lsu_bus_buffer.scala 606:26] + io.lsu_axi.ar.bits.lock <= UInt<1>("h00") @[lsu_bus_buffer.scala 607:27] + io.lsu_axi.b.ready <= UInt<1>("h01") @[lsu_bus_buffer.scala 608:22] + io.lsu_axi.r.ready <= UInt<1>("h01") @[lsu_bus_buffer.scala 609:22] + node _T_4876 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 610:93] + node _T_4877 = bits(buf_error, 0, 0) @[lsu_bus_buffer.scala 610:137] + node _T_4878 = and(io.lsu_bus_clk_en_q, _T_4877) @[lsu_bus_buffer.scala 610:126] + node _T_4879 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 610:152] + node _T_4880 = and(_T_4878, _T_4879) @[lsu_bus_buffer.scala 610:141] + node _T_4881 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 610:93] + node _T_4882 = bits(buf_error, 1, 1) @[lsu_bus_buffer.scala 610:137] + node _T_4883 = and(io.lsu_bus_clk_en_q, _T_4882) @[lsu_bus_buffer.scala 610:126] + node _T_4884 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 610:152] + node _T_4885 = and(_T_4883, _T_4884) @[lsu_bus_buffer.scala 610:141] + node _T_4886 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 610:93] + node _T_4887 = bits(buf_error, 2, 2) @[lsu_bus_buffer.scala 610:137] + node _T_4888 = and(io.lsu_bus_clk_en_q, _T_4887) @[lsu_bus_buffer.scala 610:126] + node _T_4889 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 610:152] + node _T_4890 = and(_T_4888, _T_4889) @[lsu_bus_buffer.scala 610:141] + node _T_4891 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 610:93] + node _T_4892 = bits(buf_error, 3, 3) @[lsu_bus_buffer.scala 610:137] + node _T_4893 = and(io.lsu_bus_clk_en_q, _T_4892) @[lsu_bus_buffer.scala 610:126] + node _T_4894 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 610:152] + node _T_4895 = and(_T_4893, _T_4894) @[lsu_bus_buffer.scala 610:141] + node _T_4896 = mux(_T_4876, _T_4880, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4897 = mux(_T_4881, _T_4885, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4898 = mux(_T_4886, _T_4890, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4899 = mux(_T_4891, _T_4895, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4900 = or(_T_4896, _T_4897) @[Mux.scala 27:72] + node _T_4901 = or(_T_4900, _T_4898) @[Mux.scala 27:72] + node _T_4902 = or(_T_4901, _T_4899) @[Mux.scala 27:72] + wire _T_4903 : UInt<1> @[Mux.scala 27:72] + _T_4903 <= _T_4902 @[Mux.scala 27:72] + io.tlu_busbuff.lsu_imprecise_error_store_any <= _T_4903 @[lsu_bus_buffer.scala 610:48] + node _T_4904 = eq(buf_state[0], UInt<3>("h06")) @[lsu_bus_buffer.scala 611:82] + node _T_4905 = bits(buf_error, 0, 0) @[lsu_bus_buffer.scala 611:104] + node _T_4906 = and(_T_4904, _T_4905) @[lsu_bus_buffer.scala 611:93] + node _T_4907 = bits(buf_write, 0, 0) @[lsu_bus_buffer.scala 611:119] + node _T_4908 = and(_T_4906, _T_4907) @[lsu_bus_buffer.scala 611:108] + node _T_4909 = eq(buf_state[1], UInt<3>("h06")) @[lsu_bus_buffer.scala 611:82] + node _T_4910 = bits(buf_error, 1, 1) @[lsu_bus_buffer.scala 611:104] + node _T_4911 = and(_T_4909, _T_4910) @[lsu_bus_buffer.scala 611:93] + node _T_4912 = bits(buf_write, 1, 1) @[lsu_bus_buffer.scala 611:119] + node _T_4913 = and(_T_4911, _T_4912) @[lsu_bus_buffer.scala 611:108] + node _T_4914 = eq(buf_state[2], UInt<3>("h06")) @[lsu_bus_buffer.scala 611:82] + node _T_4915 = bits(buf_error, 2, 2) @[lsu_bus_buffer.scala 611:104] + node _T_4916 = and(_T_4914, _T_4915) @[lsu_bus_buffer.scala 611:93] + node _T_4917 = bits(buf_write, 2, 2) @[lsu_bus_buffer.scala 611:119] + node _T_4918 = and(_T_4916, _T_4917) @[lsu_bus_buffer.scala 611:108] + node _T_4919 = eq(buf_state[3], UInt<3>("h06")) @[lsu_bus_buffer.scala 611:82] + node _T_4920 = bits(buf_error, 3, 3) @[lsu_bus_buffer.scala 611:104] + node _T_4921 = and(_T_4919, _T_4920) @[lsu_bus_buffer.scala 611:93] + node _T_4922 = bits(buf_write, 3, 3) @[lsu_bus_buffer.scala 611:119] + node _T_4923 = and(_T_4921, _T_4922) @[lsu_bus_buffer.scala 611:108] + node _T_4924 = mux(_T_4908, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4925 = mux(_T_4913, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4926 = mux(_T_4918, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4927 = mux(_T_4923, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4928 = or(_T_4924, _T_4925) @[Mux.scala 27:72] + node _T_4929 = or(_T_4928, _T_4926) @[Mux.scala 27:72] + node _T_4930 = or(_T_4929, _T_4927) @[Mux.scala 27:72] + wire lsu_imprecise_error_store_tag : UInt<2> @[Mux.scala 27:72] + lsu_imprecise_error_store_tag <= _T_4930 @[Mux.scala 27:72] + node _T_4931 = eq(io.tlu_busbuff.lsu_imprecise_error_store_any, UInt<1>("h00")) @[lsu_bus_buffer.scala 613:97] + node _T_4932 = and(io.dctl_busbuff.lsu_nonblock_load_data_error, _T_4931) @[lsu_bus_buffer.scala 613:95] + io.tlu_busbuff.lsu_imprecise_error_load_any <= _T_4932 @[lsu_bus_buffer.scala 613:47] + node _T_4933 = mux(io.tlu_busbuff.lsu_imprecise_error_store_any, buf_addr[lsu_imprecise_error_store_tag], buf_addr[io.dctl_busbuff.lsu_nonblock_load_data_tag]) @[lsu_bus_buffer.scala 614:53] + io.tlu_busbuff.lsu_imprecise_error_addr_any <= _T_4933 @[lsu_bus_buffer.scala 614:47] + node _T_4934 = and(io.lsu_axi.aw.valid, io.lsu_axi.aw.ready) @[lsu_bus_buffer.scala 620:59] + node _T_4935 = and(io.lsu_axi.w.valid, io.lsu_axi.w.ready) @[lsu_bus_buffer.scala 620:104] + node _T_4936 = or(_T_4934, _T_4935) @[lsu_bus_buffer.scala 620:82] + node _T_4937 = and(io.lsu_axi.ar.valid, io.lsu_axi.ar.ready) @[lsu_bus_buffer.scala 620:149] + node _T_4938 = or(_T_4936, _T_4937) @[lsu_bus_buffer.scala 620:126] + io.tlu_busbuff.lsu_pmu_bus_trxn <= _T_4938 @[lsu_bus_buffer.scala 620:35] + node _T_4939 = and(io.lsu_busreq_r, io.ldst_dual_r) @[lsu_bus_buffer.scala 621:60] + node _T_4940 = and(_T_4939, io.lsu_commit_r) @[lsu_bus_buffer.scala 621:77] + io.tlu_busbuff.lsu_pmu_bus_misaligned <= _T_4940 @[lsu_bus_buffer.scala 621:41] + node _T_4941 = or(io.tlu_busbuff.lsu_imprecise_error_load_any, io.tlu_busbuff.lsu_imprecise_error_store_any) @[lsu_bus_buffer.scala 622:83] + io.tlu_busbuff.lsu_pmu_bus_error <= _T_4941 @[lsu_bus_buffer.scala 622:36] + node _T_4942 = eq(io.lsu_axi.aw.ready, UInt<1>("h00")) @[lsu_bus_buffer.scala 624:61] + node _T_4943 = and(io.lsu_axi.aw.valid, _T_4942) @[lsu_bus_buffer.scala 624:59] + node _T_4944 = eq(io.lsu_axi.w.ready, UInt<1>("h00")) @[lsu_bus_buffer.scala 624:107] + node _T_4945 = and(io.lsu_axi.w.valid, _T_4944) @[lsu_bus_buffer.scala 624:105] + node _T_4946 = or(_T_4943, _T_4945) @[lsu_bus_buffer.scala 624:83] + node _T_4947 = eq(io.lsu_axi.ar.ready, UInt<1>("h00")) @[lsu_bus_buffer.scala 624:153] + node _T_4948 = and(io.lsu_axi.ar.valid, _T_4947) @[lsu_bus_buffer.scala 624:151] + node _T_4949 = or(_T_4946, _T_4948) @[lsu_bus_buffer.scala 624:128] + io.tlu_busbuff.lsu_pmu_bus_busy <= _T_4949 @[lsu_bus_buffer.scala 624:35] + reg _T_4950 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 626:49] + _T_4950 <= WrPtr0_m @[lsu_bus_buffer.scala 626:49] + WrPtr0_r <= _T_4950 @[lsu_bus_buffer.scala 626:12] + reg _T_4951 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 627:49] + _T_4951 <= WrPtr1_m @[lsu_bus_buffer.scala 627:49] + WrPtr1_r <= _T_4951 @[lsu_bus_buffer.scala 627:12] + node _T_4952 = eq(io.flush_r, UInt<1>("h00")) @[lsu_bus_buffer.scala 628:75] + node _T_4953 = and(io.lsu_busreq_m, _T_4952) @[lsu_bus_buffer.scala 628:73] + node _T_4954 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[lsu_bus_buffer.scala 628:89] + node _T_4955 = and(_T_4953, _T_4954) @[lsu_bus_buffer.scala 628:87] + reg _T_4956 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 628:56] + _T_4956 <= _T_4955 @[lsu_bus_buffer.scala 628:56] + io.lsu_busreq_r <= _T_4956 @[lsu_bus_buffer.scala 628:19] + reg _T_4957 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_buffer.scala 629:66] + _T_4957 <= io.dctl_busbuff.lsu_nonblock_load_valid_m @[lsu_bus_buffer.scala 629:66] + lsu_nonblock_load_valid_r <= _T_4957 @[lsu_bus_buffer.scala 629:29] + diff --git a/lsu_bus_buffer.v b/lsu_bus_buffer.v new file mode 100644 index 00000000..e66d1f31 --- /dev/null +++ b/lsu_bus_buffer.v @@ -0,0 +1,4633 @@ +module rvclkhdr( + input io_clk, + input io_en +); + wire clkhdr_Q; // @[lib.scala 334:26] + wire clkhdr_CK; // @[lib.scala 334:26] + wire clkhdr_EN; // @[lib.scala 334:26] + wire clkhdr_SE; // @[lib.scala 334:26] + gated_latch clkhdr ( // @[lib.scala 334:26] + .Q(clkhdr_Q), + .CK(clkhdr_CK), + .EN(clkhdr_EN), + .SE(clkhdr_SE) + ); + assign clkhdr_CK = io_clk; // @[lib.scala 336:18] + assign clkhdr_EN = io_en; // @[lib.scala 337:18] + assign clkhdr_SE = 1'h0; // @[lib.scala 338:18] +endmodule +module lsu_bus_buffer( + input clock, + input reset, + input io_clk_override, + input io_scan_mode, + output io_tlu_busbuff_lsu_pmu_bus_trxn, + output io_tlu_busbuff_lsu_pmu_bus_misaligned, + output io_tlu_busbuff_lsu_pmu_bus_error, + output io_tlu_busbuff_lsu_pmu_bus_busy, + input io_tlu_busbuff_dec_tlu_external_ldfwd_disable, + input io_tlu_busbuff_dec_tlu_wb_coalescing_disable, + input io_tlu_busbuff_dec_tlu_sideeffect_posted_disable, + output io_tlu_busbuff_lsu_imprecise_error_load_any, + output io_tlu_busbuff_lsu_imprecise_error_store_any, + output [31:0] io_tlu_busbuff_lsu_imprecise_error_addr_any, + output io_dctl_busbuff_lsu_nonblock_load_valid_m, + output [1:0] io_dctl_busbuff_lsu_nonblock_load_tag_m, + output io_dctl_busbuff_lsu_nonblock_load_inv_r, + output [1:0] io_dctl_busbuff_lsu_nonblock_load_inv_tag_r, + output io_dctl_busbuff_lsu_nonblock_load_data_valid, + output io_dctl_busbuff_lsu_nonblock_load_data_error, + output [1:0] io_dctl_busbuff_lsu_nonblock_load_data_tag, + input io_dec_tlu_force_halt, + input io_lsu_bus_obuf_c1_clken, + input io_lsu_busm_clken, + input io_lsu_c2_r_clk, + input io_lsu_bus_ibuf_c1_clk, + input io_lsu_bus_obuf_c1_clk, + input io_lsu_bus_buf_c1_clk, + input io_lsu_free_c2_clk, + input io_lsu_busm_clk, + input io_dec_lsu_valid_raw_d, + input io_lsu_pkt_m_valid, + input io_lsu_pkt_m_bits_fast_int, + input io_lsu_pkt_m_bits_stack, + input io_lsu_pkt_m_bits_by, + input io_lsu_pkt_m_bits_half, + input io_lsu_pkt_m_bits_word, + input io_lsu_pkt_m_bits_dword, + input io_lsu_pkt_m_bits_load, + input io_lsu_pkt_m_bits_store, + input io_lsu_pkt_m_bits_unsign, + input io_lsu_pkt_m_bits_dma, + input io_lsu_pkt_m_bits_store_data_bypass_d, + input io_lsu_pkt_m_bits_load_ldst_bypass_d, + input io_lsu_pkt_m_bits_store_data_bypass_m, + input io_lsu_pkt_r_valid, + input io_lsu_pkt_r_bits_fast_int, + input io_lsu_pkt_r_bits_stack, + input io_lsu_pkt_r_bits_by, + input io_lsu_pkt_r_bits_half, + input io_lsu_pkt_r_bits_word, + input io_lsu_pkt_r_bits_dword, + input io_lsu_pkt_r_bits_load, + input io_lsu_pkt_r_bits_store, + input io_lsu_pkt_r_bits_unsign, + input io_lsu_pkt_r_bits_dma, + input io_lsu_pkt_r_bits_store_data_bypass_d, + input io_lsu_pkt_r_bits_load_ldst_bypass_d, + input io_lsu_pkt_r_bits_store_data_bypass_m, + input [31:0] io_lsu_addr_m, + input [31:0] io_end_addr_m, + input [31:0] io_lsu_addr_r, + input [31:0] io_end_addr_r, + input [31:0] io_store_data_r, + input io_no_word_merge_r, + input io_no_dword_merge_r, + input io_lsu_busreq_m, + input io_ld_full_hit_m, + input io_flush_m_up, + input io_flush_r, + input io_lsu_commit_r, + input io_is_sideeffects_r, + input io_ldst_dual_d, + input io_ldst_dual_m, + input io_ldst_dual_r, + input [7:0] io_ldst_byteen_ext_m, + input io_lsu_axi_aw_ready, + output io_lsu_axi_aw_valid, + output [2:0] io_lsu_axi_aw_bits_id, + output [31:0] io_lsu_axi_aw_bits_addr, + output [3:0] io_lsu_axi_aw_bits_region, + output [7:0] io_lsu_axi_aw_bits_len, + output [2:0] io_lsu_axi_aw_bits_size, + output [1:0] io_lsu_axi_aw_bits_burst, + output io_lsu_axi_aw_bits_lock, + output [3:0] io_lsu_axi_aw_bits_cache, + output [2:0] io_lsu_axi_aw_bits_prot, + output [3:0] io_lsu_axi_aw_bits_qos, + input io_lsu_axi_w_ready, + output io_lsu_axi_w_valid, + output [63:0] io_lsu_axi_w_bits_data, + output [7:0] io_lsu_axi_w_bits_strb, + output io_lsu_axi_w_bits_last, + output io_lsu_axi_b_ready, + input io_lsu_axi_b_valid, + input [1:0] io_lsu_axi_b_bits_resp, + input [2:0] io_lsu_axi_b_bits_id, + input io_lsu_axi_ar_ready, + output io_lsu_axi_ar_valid, + output [2:0] io_lsu_axi_ar_bits_id, + output [31:0] io_lsu_axi_ar_bits_addr, + output [3:0] io_lsu_axi_ar_bits_region, + output [7:0] io_lsu_axi_ar_bits_len, + output [2:0] io_lsu_axi_ar_bits_size, + output [1:0] io_lsu_axi_ar_bits_burst, + output io_lsu_axi_ar_bits_lock, + output [3:0] io_lsu_axi_ar_bits_cache, + output [2:0] io_lsu_axi_ar_bits_prot, + output [3:0] io_lsu_axi_ar_bits_qos, + output io_lsu_axi_r_ready, + input io_lsu_axi_r_valid, + input [2:0] io_lsu_axi_r_bits_id, + input [63:0] io_lsu_axi_r_bits_data, + input [1:0] io_lsu_axi_r_bits_resp, + input io_lsu_axi_r_bits_last, + input io_lsu_bus_clk_en, + input io_lsu_bus_clk_en_q, + output io_lsu_busreq_r, + output io_lsu_bus_buffer_pend_any, + output io_lsu_bus_buffer_full_any, + output io_lsu_bus_buffer_empty_any, + output [3:0] io_ld_byte_hit_buf_lo, + output [3:0] io_ld_byte_hit_buf_hi, + output [31:0] io_ld_fwddata_buf_lo, + output [31:0] io_ld_fwddata_buf_hi, + output [31:0] io_lsu_nonblock_load_data +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; + reg [31:0] _RAND_24; + reg [31:0] _RAND_25; + reg [31:0] _RAND_26; + reg [31:0] _RAND_27; + reg [31:0] _RAND_28; + reg [31:0] _RAND_29; + reg [31:0] _RAND_30; + reg [31:0] _RAND_31; + reg [31:0] _RAND_32; + reg [31:0] _RAND_33; + reg [31:0] _RAND_34; + reg [31:0] _RAND_35; + reg [31:0] _RAND_36; + reg [31:0] _RAND_37; + reg [31:0] _RAND_38; + reg [31:0] _RAND_39; + reg [31:0] _RAND_40; + reg [31:0] _RAND_41; + reg [31:0] _RAND_42; + reg [31:0] _RAND_43; + reg [31:0] _RAND_44; + reg [31:0] _RAND_45; + reg [31:0] _RAND_46; + reg [31:0] _RAND_47; + reg [31:0] _RAND_48; + reg [31:0] _RAND_49; + reg [31:0] _RAND_50; + reg [31:0] _RAND_51; + reg [31:0] _RAND_52; + reg [31:0] _RAND_53; + reg [31:0] _RAND_54; + reg [31:0] _RAND_55; + reg [31:0] _RAND_56; + reg [31:0] _RAND_57; + reg [31:0] _RAND_58; + reg [31:0] _RAND_59; + reg [31:0] _RAND_60; + reg [31:0] _RAND_61; + reg [31:0] _RAND_62; + reg [31:0] _RAND_63; + reg [31:0] _RAND_64; + reg [31:0] _RAND_65; + reg [31:0] _RAND_66; + reg [31:0] _RAND_67; + reg [31:0] _RAND_68; + reg [31:0] _RAND_69; + reg [31:0] _RAND_70; + reg [31:0] _RAND_71; + reg [31:0] _RAND_72; + reg [31:0] _RAND_73; + reg [31:0] _RAND_74; + reg [31:0] _RAND_75; + reg [31:0] _RAND_76; + reg [31:0] _RAND_77; + reg [31:0] _RAND_78; + reg [31:0] _RAND_79; + reg [63:0] _RAND_80; + reg [31:0] _RAND_81; + reg [31:0] _RAND_82; + reg [31:0] _RAND_83; + reg [31:0] _RAND_84; + reg [31:0] _RAND_85; + reg [31:0] _RAND_86; + reg [31:0] _RAND_87; + reg [31:0] _RAND_88; + reg [31:0] _RAND_89; + reg [31:0] _RAND_90; + reg [31:0] _RAND_91; + reg [31:0] _RAND_92; + reg [31:0] _RAND_93; + reg [31:0] _RAND_94; + reg [31:0] _RAND_95; + reg [31:0] _RAND_96; + reg [31:0] _RAND_97; + reg [31:0] _RAND_98; + reg [31:0] _RAND_99; + reg [31:0] _RAND_100; + reg [31:0] _RAND_101; + reg [31:0] _RAND_102; + reg [31:0] _RAND_103; + reg [31:0] _RAND_104; + reg [31:0] _RAND_105; + reg [31:0] _RAND_106; +`endif // RANDOMIZE_REG_INIT + wire rvclkhdr_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_io_en; // @[lib.scala 404:23] + wire rvclkhdr_1_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_1_io_en; // @[lib.scala 404:23] + wire rvclkhdr_2_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_2_io_en; // @[lib.scala 404:23] + wire rvclkhdr_3_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_3_io_en; // @[lib.scala 404:23] + wire rvclkhdr_4_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_4_io_en; // @[lib.scala 404:23] + wire rvclkhdr_5_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_5_io_en; // @[lib.scala 404:23] + wire rvclkhdr_6_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_6_io_en; // @[lib.scala 404:23] + wire rvclkhdr_7_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_7_io_en; // @[lib.scala 404:23] + wire rvclkhdr_8_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_8_io_en; // @[lib.scala 404:23] + wire rvclkhdr_9_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_9_io_en; // @[lib.scala 404:23] + wire rvclkhdr_10_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_10_io_en; // @[lib.scala 404:23] + wire rvclkhdr_11_io_clk; // @[lib.scala 404:23] + wire rvclkhdr_11_io_en; // @[lib.scala 404:23] + wire [3:0] ldst_byteen_hi_m = io_ldst_byteen_ext_m[7:4]; // @[lsu_bus_buffer.scala 77:46] + wire [3:0] ldst_byteen_lo_m = io_ldst_byteen_ext_m[3:0]; // @[lsu_bus_buffer.scala 78:46] + reg [31:0] buf_addr_0; // @[Reg.scala 27:20] + wire _T_2 = io_lsu_addr_m[31:2] == buf_addr_0[31:2]; // @[lsu_bus_buffer.scala 80:74] + reg _T_4355; // @[Reg.scala 27:20] + reg _T_4352; // @[Reg.scala 27:20] + reg _T_4349; // @[Reg.scala 27:20] + reg _T_4346; // @[Reg.scala 27:20] + wire [3:0] buf_write = {_T_4355,_T_4352,_T_4349,_T_4346}; // @[Cat.scala 29:58] + wire _T_4 = _T_2 & buf_write[0]; // @[lsu_bus_buffer.scala 80:98] + reg [2:0] buf_state_0; // @[Reg.scala 27:20] + wire _T_5 = buf_state_0 != 3'h0; // @[lsu_bus_buffer.scala 80:129] + wire _T_6 = _T_4 & _T_5; // @[lsu_bus_buffer.scala 80:113] + wire ld_addr_hitvec_lo_0 = _T_6 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 80:141] + reg [31:0] buf_addr_1; // @[Reg.scala 27:20] + wire _T_9 = io_lsu_addr_m[31:2] == buf_addr_1[31:2]; // @[lsu_bus_buffer.scala 80:74] + wire _T_11 = _T_9 & buf_write[1]; // @[lsu_bus_buffer.scala 80:98] + reg [2:0] buf_state_1; // @[Reg.scala 27:20] + wire _T_12 = buf_state_1 != 3'h0; // @[lsu_bus_buffer.scala 80:129] + wire _T_13 = _T_11 & _T_12; // @[lsu_bus_buffer.scala 80:113] + wire ld_addr_hitvec_lo_1 = _T_13 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 80:141] + reg [31:0] buf_addr_2; // @[Reg.scala 27:20] + wire _T_16 = io_lsu_addr_m[31:2] == buf_addr_2[31:2]; // @[lsu_bus_buffer.scala 80:74] + wire _T_18 = _T_16 & buf_write[2]; // @[lsu_bus_buffer.scala 80:98] + reg [2:0] buf_state_2; // @[Reg.scala 27:20] + wire _T_19 = buf_state_2 != 3'h0; // @[lsu_bus_buffer.scala 80:129] + wire _T_20 = _T_18 & _T_19; // @[lsu_bus_buffer.scala 80:113] + wire ld_addr_hitvec_lo_2 = _T_20 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 80:141] + reg [31:0] buf_addr_3; // @[Reg.scala 27:20] + wire _T_23 = io_lsu_addr_m[31:2] == buf_addr_3[31:2]; // @[lsu_bus_buffer.scala 80:74] + wire _T_25 = _T_23 & buf_write[3]; // @[lsu_bus_buffer.scala 80:98] + reg [2:0] buf_state_3; // @[Reg.scala 27:20] + wire _T_26 = buf_state_3 != 3'h0; // @[lsu_bus_buffer.scala 80:129] + wire _T_27 = _T_25 & _T_26; // @[lsu_bus_buffer.scala 80:113] + wire ld_addr_hitvec_lo_3 = _T_27 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 80:141] + wire _T_30 = io_end_addr_m[31:2] == buf_addr_0[31:2]; // @[lsu_bus_buffer.scala 81:74] + wire _T_32 = _T_30 & buf_write[0]; // @[lsu_bus_buffer.scala 81:98] + wire _T_34 = _T_32 & _T_5; // @[lsu_bus_buffer.scala 81:113] + wire ld_addr_hitvec_hi_0 = _T_34 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 81:141] + wire _T_37 = io_end_addr_m[31:2] == buf_addr_1[31:2]; // @[lsu_bus_buffer.scala 81:74] + wire _T_39 = _T_37 & buf_write[1]; // @[lsu_bus_buffer.scala 81:98] + wire _T_41 = _T_39 & _T_12; // @[lsu_bus_buffer.scala 81:113] + wire ld_addr_hitvec_hi_1 = _T_41 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 81:141] + wire _T_44 = io_end_addr_m[31:2] == buf_addr_2[31:2]; // @[lsu_bus_buffer.scala 81:74] + wire _T_46 = _T_44 & buf_write[2]; // @[lsu_bus_buffer.scala 81:98] + wire _T_48 = _T_46 & _T_19; // @[lsu_bus_buffer.scala 81:113] + wire ld_addr_hitvec_hi_2 = _T_48 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 81:141] + wire _T_51 = io_end_addr_m[31:2] == buf_addr_3[31:2]; // @[lsu_bus_buffer.scala 81:74] + wire _T_53 = _T_51 & buf_write[3]; // @[lsu_bus_buffer.scala 81:98] + wire _T_55 = _T_53 & _T_26; // @[lsu_bus_buffer.scala 81:113] + wire ld_addr_hitvec_hi_3 = _T_55 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 81:141] + reg [3:0] buf_byteen_3; // @[Reg.scala 27:20] + wire _T_99 = ld_addr_hitvec_lo_3 & buf_byteen_3[0]; // @[lsu_bus_buffer.scala 145:95] + wire _T_101 = _T_99 & ldst_byteen_lo_m[0]; // @[lsu_bus_buffer.scala 145:114] + reg [3:0] buf_byteen_2; // @[Reg.scala 27:20] + wire _T_95 = ld_addr_hitvec_lo_2 & buf_byteen_2[0]; // @[lsu_bus_buffer.scala 145:95] + wire _T_97 = _T_95 & ldst_byteen_lo_m[0]; // @[lsu_bus_buffer.scala 145:114] + reg [3:0] buf_byteen_1; // @[Reg.scala 27:20] + wire _T_91 = ld_addr_hitvec_lo_1 & buf_byteen_1[0]; // @[lsu_bus_buffer.scala 145:95] + wire _T_93 = _T_91 & ldst_byteen_lo_m[0]; // @[lsu_bus_buffer.scala 145:114] + reg [3:0] buf_byteen_0; // @[Reg.scala 27:20] + wire _T_87 = ld_addr_hitvec_lo_0 & buf_byteen_0[0]; // @[lsu_bus_buffer.scala 145:95] + wire _T_89 = _T_87 & ldst_byteen_lo_m[0]; // @[lsu_bus_buffer.scala 145:114] + wire [3:0] ld_byte_hitvec_lo_0 = {_T_101,_T_97,_T_93,_T_89}; // @[Cat.scala 29:58] + reg [3:0] buf_ageQ_3; // @[lsu_bus_buffer.scala 513:60] + wire _T_2590 = buf_state_3 == 3'h2; // @[lsu_bus_buffer.scala 417:93] + wire _T_4104 = 3'h0 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4127 = 3'h1 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4131 = 3'h2 == buf_state_3; // @[Conditional.scala 37:30] + reg [1:0] _T_1781; // @[Reg.scala 27:20] + wire [2:0] obuf_tag0 = {{1'd0}, _T_1781}; // @[lsu_bus_buffer.scala 356:13] + wire _T_4138 = obuf_tag0 == 3'h3; // @[lsu_bus_buffer.scala 460:48] + reg obuf_merge; // @[Reg.scala 27:20] + reg [1:0] obuf_tag1; // @[Reg.scala 27:20] + wire [2:0] _GEN_376 = {{1'd0}, obuf_tag1}; // @[lsu_bus_buffer.scala 460:104] + wire _T_4139 = _GEN_376 == 3'h3; // @[lsu_bus_buffer.scala 460:104] + wire _T_4140 = obuf_merge & _T_4139; // @[lsu_bus_buffer.scala 460:91] + wire _T_4141 = _T_4138 | _T_4140; // @[lsu_bus_buffer.scala 460:77] + reg obuf_valid; // @[lsu_bus_buffer.scala 349:54] + wire _T_4142 = _T_4141 & obuf_valid; // @[lsu_bus_buffer.scala 460:135] + reg obuf_wr_enQ; // @[Reg.scala 27:20] + wire _T_4143 = _T_4142 & obuf_wr_enQ; // @[lsu_bus_buffer.scala 460:148] + wire _T_4165 = 3'h3 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4250 = 3'h4 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4268 = 3'h5 == buf_state_3; // @[Conditional.scala 37:30] + wire _T_4276 = 3'h6 == buf_state_3; // @[Conditional.scala 37:30] + wire _GEN_290 = _T_4131 & _T_4143; // @[Conditional.scala 39:67] + wire _GEN_303 = _T_4127 ? 1'h0 : _GEN_290; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_3 = _T_4104 ? 1'h0 : _GEN_303; // @[Conditional.scala 40:58] + wire _T_2591 = _T_2590 & buf_cmd_state_bus_en_3; // @[lsu_bus_buffer.scala 417:103] + wire _T_2592 = ~_T_2591; // @[lsu_bus_buffer.scala 417:78] + wire _T_2593 = buf_ageQ_3[3] & _T_2592; // @[lsu_bus_buffer.scala 417:76] + wire _T_2594 = ~io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 417:132] + wire _T_2595 = _T_2593 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2583 = buf_state_2 == 3'h2; // @[lsu_bus_buffer.scala 417:93] + wire _T_3913 = 3'h0 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_3936 = 3'h1 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_3940 = 3'h2 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_3947 = obuf_tag0 == 3'h2; // @[lsu_bus_buffer.scala 460:48] + wire _T_3948 = _GEN_376 == 3'h2; // @[lsu_bus_buffer.scala 460:104] + wire _T_3949 = obuf_merge & _T_3948; // @[lsu_bus_buffer.scala 460:91] + wire _T_3950 = _T_3947 | _T_3949; // @[lsu_bus_buffer.scala 460:77] + wire _T_3951 = _T_3950 & obuf_valid; // @[lsu_bus_buffer.scala 460:135] + wire _T_3952 = _T_3951 & obuf_wr_enQ; // @[lsu_bus_buffer.scala 460:148] + wire _T_3974 = 3'h3 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_4059 = 3'h4 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_4077 = 3'h5 == buf_state_2; // @[Conditional.scala 37:30] + wire _T_4085 = 3'h6 == buf_state_2; // @[Conditional.scala 37:30] + wire _GEN_214 = _T_3940 & _T_3952; // @[Conditional.scala 39:67] + wire _GEN_227 = _T_3936 ? 1'h0 : _GEN_214; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_2 = _T_3913 ? 1'h0 : _GEN_227; // @[Conditional.scala 40:58] + wire _T_2584 = _T_2583 & buf_cmd_state_bus_en_2; // @[lsu_bus_buffer.scala 417:103] + wire _T_2585 = ~_T_2584; // @[lsu_bus_buffer.scala 417:78] + wire _T_2586 = buf_ageQ_3[2] & _T_2585; // @[lsu_bus_buffer.scala 417:76] + wire _T_2588 = _T_2586 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2576 = buf_state_1 == 3'h2; // @[lsu_bus_buffer.scala 417:93] + wire _T_3722 = 3'h0 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3745 = 3'h1 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3749 = 3'h2 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3756 = obuf_tag0 == 3'h1; // @[lsu_bus_buffer.scala 460:48] + wire _T_3757 = _GEN_376 == 3'h1; // @[lsu_bus_buffer.scala 460:104] + wire _T_3758 = obuf_merge & _T_3757; // @[lsu_bus_buffer.scala 460:91] + wire _T_3759 = _T_3756 | _T_3758; // @[lsu_bus_buffer.scala 460:77] + wire _T_3760 = _T_3759 & obuf_valid; // @[lsu_bus_buffer.scala 460:135] + wire _T_3761 = _T_3760 & obuf_wr_enQ; // @[lsu_bus_buffer.scala 460:148] + wire _T_3783 = 3'h3 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3868 = 3'h4 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3886 = 3'h5 == buf_state_1; // @[Conditional.scala 37:30] + wire _T_3894 = 3'h6 == buf_state_1; // @[Conditional.scala 37:30] + wire _GEN_138 = _T_3749 & _T_3761; // @[Conditional.scala 39:67] + wire _GEN_151 = _T_3745 ? 1'h0 : _GEN_138; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_1 = _T_3722 ? 1'h0 : _GEN_151; // @[Conditional.scala 40:58] + wire _T_2577 = _T_2576 & buf_cmd_state_bus_en_1; // @[lsu_bus_buffer.scala 417:103] + wire _T_2578 = ~_T_2577; // @[lsu_bus_buffer.scala 417:78] + wire _T_2579 = buf_ageQ_3[1] & _T_2578; // @[lsu_bus_buffer.scala 417:76] + wire _T_2581 = _T_2579 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2569 = buf_state_0 == 3'h2; // @[lsu_bus_buffer.scala 417:93] + wire _T_3531 = 3'h0 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3554 = 3'h1 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3558 = 3'h2 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3565 = obuf_tag0 == 3'h0; // @[lsu_bus_buffer.scala 460:48] + wire _T_3566 = _GEN_376 == 3'h0; // @[lsu_bus_buffer.scala 460:104] + wire _T_3567 = obuf_merge & _T_3566; // @[lsu_bus_buffer.scala 460:91] + wire _T_3568 = _T_3565 | _T_3567; // @[lsu_bus_buffer.scala 460:77] + wire _T_3569 = _T_3568 & obuf_valid; // @[lsu_bus_buffer.scala 460:135] + wire _T_3570 = _T_3569 & obuf_wr_enQ; // @[lsu_bus_buffer.scala 460:148] + wire _T_3592 = 3'h3 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3677 = 3'h4 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3695 = 3'h5 == buf_state_0; // @[Conditional.scala 37:30] + wire _T_3703 = 3'h6 == buf_state_0; // @[Conditional.scala 37:30] + wire _GEN_62 = _T_3558 & _T_3570; // @[Conditional.scala 39:67] + wire _GEN_75 = _T_3554 ? 1'h0 : _GEN_62; // @[Conditional.scala 39:67] + wire buf_cmd_state_bus_en_0 = _T_3531 ? 1'h0 : _GEN_75; // @[Conditional.scala 40:58] + wire _T_2570 = _T_2569 & buf_cmd_state_bus_en_0; // @[lsu_bus_buffer.scala 417:103] + wire _T_2571 = ~_T_2570; // @[lsu_bus_buffer.scala 417:78] + wire _T_2572 = buf_ageQ_3[0] & _T_2571; // @[lsu_bus_buffer.scala 417:76] + wire _T_2574 = _T_2572 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire [3:0] buf_age_3 = {_T_2595,_T_2588,_T_2581,_T_2574}; // @[Cat.scala 29:58] + wire _T_2694 = ~buf_age_3[2]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2696 = _T_2694 & _T_19; // @[lsu_bus_buffer.scala 418:104] + wire _T_2688 = ~buf_age_3[1]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2690 = _T_2688 & _T_12; // @[lsu_bus_buffer.scala 418:104] + wire _T_2682 = ~buf_age_3[0]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2684 = _T_2682 & _T_5; // @[lsu_bus_buffer.scala 418:104] + wire [3:0] buf_age_younger_3 = {1'h0,_T_2696,_T_2690,_T_2684}; // @[Cat.scala 29:58] + wire [3:0] _T_255 = ld_byte_hitvec_lo_0 & buf_age_younger_3; // @[lsu_bus_buffer.scala 150:122] + wire _T_256 = |_T_255; // @[lsu_bus_buffer.scala 150:144] + wire _T_257 = ~_T_256; // @[lsu_bus_buffer.scala 150:99] + wire _T_258 = ld_byte_hitvec_lo_0[3] & _T_257; // @[lsu_bus_buffer.scala 150:97] + reg [31:0] ibuf_addr; // @[Reg.scala 27:20] + wire _T_512 = io_lsu_addr_m[31:2] == ibuf_addr[31:2]; // @[lsu_bus_buffer.scala 156:51] + reg ibuf_write; // @[Reg.scala 27:20] + wire _T_513 = _T_512 & ibuf_write; // @[lsu_bus_buffer.scala 156:73] + reg ibuf_valid; // @[lsu_bus_buffer.scala 244:54] + wire _T_514 = _T_513 & ibuf_valid; // @[lsu_bus_buffer.scala 156:86] + wire ld_addr_ibuf_hit_lo = _T_514 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 156:99] + wire [3:0] _T_521 = ld_addr_ibuf_hit_lo ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + reg [3:0] ibuf_byteen; // @[Reg.scala 27:20] + wire [3:0] _T_522 = _T_521 & ibuf_byteen; // @[lsu_bus_buffer.scala 161:55] + wire [3:0] ld_byte_ibuf_hit_lo = _T_522 & ldst_byteen_lo_m; // @[lsu_bus_buffer.scala 161:69] + wire _T_260 = ~ld_byte_ibuf_hit_lo[0]; // @[lsu_bus_buffer.scala 150:150] + wire _T_261 = _T_258 & _T_260; // @[lsu_bus_buffer.scala 150:148] + reg [3:0] buf_ageQ_2; // @[lsu_bus_buffer.scala 513:60] + wire _T_2562 = buf_ageQ_2[3] & _T_2592; // @[lsu_bus_buffer.scala 417:76] + wire _T_2564 = _T_2562 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2555 = buf_ageQ_2[2] & _T_2585; // @[lsu_bus_buffer.scala 417:76] + wire _T_2557 = _T_2555 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2548 = buf_ageQ_2[1] & _T_2578; // @[lsu_bus_buffer.scala 417:76] + wire _T_2550 = _T_2548 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2541 = buf_ageQ_2[0] & _T_2571; // @[lsu_bus_buffer.scala 417:76] + wire _T_2543 = _T_2541 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire [3:0] buf_age_2 = {_T_2564,_T_2557,_T_2550,_T_2543}; // @[Cat.scala 29:58] + wire _T_2673 = ~buf_age_2[3]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2675 = _T_2673 & _T_26; // @[lsu_bus_buffer.scala 418:104] + wire _T_2661 = ~buf_age_2[1]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2663 = _T_2661 & _T_12; // @[lsu_bus_buffer.scala 418:104] + wire _T_2655 = ~buf_age_2[0]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2657 = _T_2655 & _T_5; // @[lsu_bus_buffer.scala 418:104] + wire [3:0] buf_age_younger_2 = {_T_2675,1'h0,_T_2663,_T_2657}; // @[Cat.scala 29:58] + wire [3:0] _T_247 = ld_byte_hitvec_lo_0 & buf_age_younger_2; // @[lsu_bus_buffer.scala 150:122] + wire _T_248 = |_T_247; // @[lsu_bus_buffer.scala 150:144] + wire _T_249 = ~_T_248; // @[lsu_bus_buffer.scala 150:99] + wire _T_250 = ld_byte_hitvec_lo_0[2] & _T_249; // @[lsu_bus_buffer.scala 150:97] + wire _T_253 = _T_250 & _T_260; // @[lsu_bus_buffer.scala 150:148] + reg [3:0] buf_ageQ_1; // @[lsu_bus_buffer.scala 513:60] + wire _T_2531 = buf_ageQ_1[3] & _T_2592; // @[lsu_bus_buffer.scala 417:76] + wire _T_2533 = _T_2531 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2524 = buf_ageQ_1[2] & _T_2585; // @[lsu_bus_buffer.scala 417:76] + wire _T_2526 = _T_2524 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2517 = buf_ageQ_1[1] & _T_2578; // @[lsu_bus_buffer.scala 417:76] + wire _T_2519 = _T_2517 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2510 = buf_ageQ_1[0] & _T_2571; // @[lsu_bus_buffer.scala 417:76] + wire _T_2512 = _T_2510 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire [3:0] buf_age_1 = {_T_2533,_T_2526,_T_2519,_T_2512}; // @[Cat.scala 29:58] + wire _T_2646 = ~buf_age_1[3]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2648 = _T_2646 & _T_26; // @[lsu_bus_buffer.scala 418:104] + wire _T_2640 = ~buf_age_1[2]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2642 = _T_2640 & _T_19; // @[lsu_bus_buffer.scala 418:104] + wire _T_2628 = ~buf_age_1[0]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2630 = _T_2628 & _T_5; // @[lsu_bus_buffer.scala 418:104] + wire [3:0] buf_age_younger_1 = {_T_2648,_T_2642,1'h0,_T_2630}; // @[Cat.scala 29:58] + wire [3:0] _T_239 = ld_byte_hitvec_lo_0 & buf_age_younger_1; // @[lsu_bus_buffer.scala 150:122] + wire _T_240 = |_T_239; // @[lsu_bus_buffer.scala 150:144] + wire _T_241 = ~_T_240; // @[lsu_bus_buffer.scala 150:99] + wire _T_242 = ld_byte_hitvec_lo_0[1] & _T_241; // @[lsu_bus_buffer.scala 150:97] + wire _T_245 = _T_242 & _T_260; // @[lsu_bus_buffer.scala 150:148] + reg [3:0] buf_ageQ_0; // @[lsu_bus_buffer.scala 513:60] + wire _T_2500 = buf_ageQ_0[3] & _T_2592; // @[lsu_bus_buffer.scala 417:76] + wire _T_2502 = _T_2500 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2493 = buf_ageQ_0[2] & _T_2585; // @[lsu_bus_buffer.scala 417:76] + wire _T_2495 = _T_2493 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2486 = buf_ageQ_0[1] & _T_2578; // @[lsu_bus_buffer.scala 417:76] + wire _T_2488 = _T_2486 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire _T_2479 = buf_ageQ_0[0] & _T_2571; // @[lsu_bus_buffer.scala 417:76] + wire _T_2481 = _T_2479 & _T_2594; // @[lsu_bus_buffer.scala 417:130] + wire [3:0] buf_age_0 = {_T_2502,_T_2495,_T_2488,_T_2481}; // @[Cat.scala 29:58] + wire _T_2619 = ~buf_age_0[3]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2621 = _T_2619 & _T_26; // @[lsu_bus_buffer.scala 418:104] + wire _T_2613 = ~buf_age_0[2]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2615 = _T_2613 & _T_19; // @[lsu_bus_buffer.scala 418:104] + wire _T_2607 = ~buf_age_0[1]; // @[lsu_bus_buffer.scala 418:89] + wire _T_2609 = _T_2607 & _T_12; // @[lsu_bus_buffer.scala 418:104] + wire [3:0] buf_age_younger_0 = {_T_2621,_T_2615,_T_2609,1'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_231 = ld_byte_hitvec_lo_0 & buf_age_younger_0; // @[lsu_bus_buffer.scala 150:122] + wire _T_232 = |_T_231; // @[lsu_bus_buffer.scala 150:144] + wire _T_233 = ~_T_232; // @[lsu_bus_buffer.scala 150:99] + wire _T_234 = ld_byte_hitvec_lo_0[0] & _T_233; // @[lsu_bus_buffer.scala 150:97] + wire _T_237 = _T_234 & _T_260; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] ld_byte_hitvecfn_lo_0 = {_T_261,_T_253,_T_245,_T_237}; // @[Cat.scala 29:58] + wire _T_56 = |ld_byte_hitvecfn_lo_0; // @[lsu_bus_buffer.scala 142:73] + wire _T_58 = _T_56 | ld_byte_ibuf_hit_lo[0]; // @[lsu_bus_buffer.scala 142:77] + wire _T_117 = ld_addr_hitvec_lo_3 & buf_byteen_3[1]; // @[lsu_bus_buffer.scala 145:95] + wire _T_119 = _T_117 & ldst_byteen_lo_m[1]; // @[lsu_bus_buffer.scala 145:114] + wire _T_113 = ld_addr_hitvec_lo_2 & buf_byteen_2[1]; // @[lsu_bus_buffer.scala 145:95] + wire _T_115 = _T_113 & ldst_byteen_lo_m[1]; // @[lsu_bus_buffer.scala 145:114] + wire _T_109 = ld_addr_hitvec_lo_1 & buf_byteen_1[1]; // @[lsu_bus_buffer.scala 145:95] + wire _T_111 = _T_109 & ldst_byteen_lo_m[1]; // @[lsu_bus_buffer.scala 145:114] + wire _T_105 = ld_addr_hitvec_lo_0 & buf_byteen_0[1]; // @[lsu_bus_buffer.scala 145:95] + wire _T_107 = _T_105 & ldst_byteen_lo_m[1]; // @[lsu_bus_buffer.scala 145:114] + wire [3:0] ld_byte_hitvec_lo_1 = {_T_119,_T_115,_T_111,_T_107}; // @[Cat.scala 29:58] + wire [3:0] _T_290 = ld_byte_hitvec_lo_1 & buf_age_younger_3; // @[lsu_bus_buffer.scala 150:122] + wire _T_291 = |_T_290; // @[lsu_bus_buffer.scala 150:144] + wire _T_292 = ~_T_291; // @[lsu_bus_buffer.scala 150:99] + wire _T_293 = ld_byte_hitvec_lo_1[3] & _T_292; // @[lsu_bus_buffer.scala 150:97] + wire _T_295 = ~ld_byte_ibuf_hit_lo[1]; // @[lsu_bus_buffer.scala 150:150] + wire _T_296 = _T_293 & _T_295; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] _T_282 = ld_byte_hitvec_lo_1 & buf_age_younger_2; // @[lsu_bus_buffer.scala 150:122] + wire _T_283 = |_T_282; // @[lsu_bus_buffer.scala 150:144] + wire _T_284 = ~_T_283; // @[lsu_bus_buffer.scala 150:99] + wire _T_285 = ld_byte_hitvec_lo_1[2] & _T_284; // @[lsu_bus_buffer.scala 150:97] + wire _T_288 = _T_285 & _T_295; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] _T_274 = ld_byte_hitvec_lo_1 & buf_age_younger_1; // @[lsu_bus_buffer.scala 150:122] + wire _T_275 = |_T_274; // @[lsu_bus_buffer.scala 150:144] + wire _T_276 = ~_T_275; // @[lsu_bus_buffer.scala 150:99] + wire _T_277 = ld_byte_hitvec_lo_1[1] & _T_276; // @[lsu_bus_buffer.scala 150:97] + wire _T_280 = _T_277 & _T_295; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] _T_266 = ld_byte_hitvec_lo_1 & buf_age_younger_0; // @[lsu_bus_buffer.scala 150:122] + wire _T_267 = |_T_266; // @[lsu_bus_buffer.scala 150:144] + wire _T_268 = ~_T_267; // @[lsu_bus_buffer.scala 150:99] + wire _T_269 = ld_byte_hitvec_lo_1[0] & _T_268; // @[lsu_bus_buffer.scala 150:97] + wire _T_272 = _T_269 & _T_295; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] ld_byte_hitvecfn_lo_1 = {_T_296,_T_288,_T_280,_T_272}; // @[Cat.scala 29:58] + wire _T_59 = |ld_byte_hitvecfn_lo_1; // @[lsu_bus_buffer.scala 142:73] + wire _T_61 = _T_59 | ld_byte_ibuf_hit_lo[1]; // @[lsu_bus_buffer.scala 142:77] + wire _T_135 = ld_addr_hitvec_lo_3 & buf_byteen_3[2]; // @[lsu_bus_buffer.scala 145:95] + wire _T_137 = _T_135 & ldst_byteen_lo_m[2]; // @[lsu_bus_buffer.scala 145:114] + wire _T_131 = ld_addr_hitvec_lo_2 & buf_byteen_2[2]; // @[lsu_bus_buffer.scala 145:95] + wire _T_133 = _T_131 & ldst_byteen_lo_m[2]; // @[lsu_bus_buffer.scala 145:114] + wire _T_127 = ld_addr_hitvec_lo_1 & buf_byteen_1[2]; // @[lsu_bus_buffer.scala 145:95] + wire _T_129 = _T_127 & ldst_byteen_lo_m[2]; // @[lsu_bus_buffer.scala 145:114] + wire _T_123 = ld_addr_hitvec_lo_0 & buf_byteen_0[2]; // @[lsu_bus_buffer.scala 145:95] + wire _T_125 = _T_123 & ldst_byteen_lo_m[2]; // @[lsu_bus_buffer.scala 145:114] + wire [3:0] ld_byte_hitvec_lo_2 = {_T_137,_T_133,_T_129,_T_125}; // @[Cat.scala 29:58] + wire [3:0] _T_325 = ld_byte_hitvec_lo_2 & buf_age_younger_3; // @[lsu_bus_buffer.scala 150:122] + wire _T_326 = |_T_325; // @[lsu_bus_buffer.scala 150:144] + wire _T_327 = ~_T_326; // @[lsu_bus_buffer.scala 150:99] + wire _T_328 = ld_byte_hitvec_lo_2[3] & _T_327; // @[lsu_bus_buffer.scala 150:97] + wire _T_330 = ~ld_byte_ibuf_hit_lo[2]; // @[lsu_bus_buffer.scala 150:150] + wire _T_331 = _T_328 & _T_330; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] _T_317 = ld_byte_hitvec_lo_2 & buf_age_younger_2; // @[lsu_bus_buffer.scala 150:122] + wire _T_318 = |_T_317; // @[lsu_bus_buffer.scala 150:144] + wire _T_319 = ~_T_318; // @[lsu_bus_buffer.scala 150:99] + wire _T_320 = ld_byte_hitvec_lo_2[2] & _T_319; // @[lsu_bus_buffer.scala 150:97] + wire _T_323 = _T_320 & _T_330; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] _T_309 = ld_byte_hitvec_lo_2 & buf_age_younger_1; // @[lsu_bus_buffer.scala 150:122] + wire _T_310 = |_T_309; // @[lsu_bus_buffer.scala 150:144] + wire _T_311 = ~_T_310; // @[lsu_bus_buffer.scala 150:99] + wire _T_312 = ld_byte_hitvec_lo_2[1] & _T_311; // @[lsu_bus_buffer.scala 150:97] + wire _T_315 = _T_312 & _T_330; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] _T_301 = ld_byte_hitvec_lo_2 & buf_age_younger_0; // @[lsu_bus_buffer.scala 150:122] + wire _T_302 = |_T_301; // @[lsu_bus_buffer.scala 150:144] + wire _T_303 = ~_T_302; // @[lsu_bus_buffer.scala 150:99] + wire _T_304 = ld_byte_hitvec_lo_2[0] & _T_303; // @[lsu_bus_buffer.scala 150:97] + wire _T_307 = _T_304 & _T_330; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] ld_byte_hitvecfn_lo_2 = {_T_331,_T_323,_T_315,_T_307}; // @[Cat.scala 29:58] + wire _T_62 = |ld_byte_hitvecfn_lo_2; // @[lsu_bus_buffer.scala 142:73] + wire _T_64 = _T_62 | ld_byte_ibuf_hit_lo[2]; // @[lsu_bus_buffer.scala 142:77] + wire _T_153 = ld_addr_hitvec_lo_3 & buf_byteen_3[3]; // @[lsu_bus_buffer.scala 145:95] + wire _T_155 = _T_153 & ldst_byteen_lo_m[3]; // @[lsu_bus_buffer.scala 145:114] + wire _T_149 = ld_addr_hitvec_lo_2 & buf_byteen_2[3]; // @[lsu_bus_buffer.scala 145:95] + wire _T_151 = _T_149 & ldst_byteen_lo_m[3]; // @[lsu_bus_buffer.scala 145:114] + wire _T_145 = ld_addr_hitvec_lo_1 & buf_byteen_1[3]; // @[lsu_bus_buffer.scala 145:95] + wire _T_147 = _T_145 & ldst_byteen_lo_m[3]; // @[lsu_bus_buffer.scala 145:114] + wire _T_141 = ld_addr_hitvec_lo_0 & buf_byteen_0[3]; // @[lsu_bus_buffer.scala 145:95] + wire _T_143 = _T_141 & ldst_byteen_lo_m[3]; // @[lsu_bus_buffer.scala 145:114] + wire [3:0] ld_byte_hitvec_lo_3 = {_T_155,_T_151,_T_147,_T_143}; // @[Cat.scala 29:58] + wire [3:0] _T_360 = ld_byte_hitvec_lo_3 & buf_age_younger_3; // @[lsu_bus_buffer.scala 150:122] + wire _T_361 = |_T_360; // @[lsu_bus_buffer.scala 150:144] + wire _T_362 = ~_T_361; // @[lsu_bus_buffer.scala 150:99] + wire _T_363 = ld_byte_hitvec_lo_3[3] & _T_362; // @[lsu_bus_buffer.scala 150:97] + wire _T_365 = ~ld_byte_ibuf_hit_lo[3]; // @[lsu_bus_buffer.scala 150:150] + wire _T_366 = _T_363 & _T_365; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] _T_352 = ld_byte_hitvec_lo_3 & buf_age_younger_2; // @[lsu_bus_buffer.scala 150:122] + wire _T_353 = |_T_352; // @[lsu_bus_buffer.scala 150:144] + wire _T_354 = ~_T_353; // @[lsu_bus_buffer.scala 150:99] + wire _T_355 = ld_byte_hitvec_lo_3[2] & _T_354; // @[lsu_bus_buffer.scala 150:97] + wire _T_358 = _T_355 & _T_365; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] _T_344 = ld_byte_hitvec_lo_3 & buf_age_younger_1; // @[lsu_bus_buffer.scala 150:122] + wire _T_345 = |_T_344; // @[lsu_bus_buffer.scala 150:144] + wire _T_346 = ~_T_345; // @[lsu_bus_buffer.scala 150:99] + wire _T_347 = ld_byte_hitvec_lo_3[1] & _T_346; // @[lsu_bus_buffer.scala 150:97] + wire _T_350 = _T_347 & _T_365; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] _T_336 = ld_byte_hitvec_lo_3 & buf_age_younger_0; // @[lsu_bus_buffer.scala 150:122] + wire _T_337 = |_T_336; // @[lsu_bus_buffer.scala 150:144] + wire _T_338 = ~_T_337; // @[lsu_bus_buffer.scala 150:99] + wire _T_339 = ld_byte_hitvec_lo_3[0] & _T_338; // @[lsu_bus_buffer.scala 150:97] + wire _T_342 = _T_339 & _T_365; // @[lsu_bus_buffer.scala 150:148] + wire [3:0] ld_byte_hitvecfn_lo_3 = {_T_366,_T_358,_T_350,_T_342}; // @[Cat.scala 29:58] + wire _T_65 = |ld_byte_hitvecfn_lo_3; // @[lsu_bus_buffer.scala 142:73] + wire _T_67 = _T_65 | ld_byte_ibuf_hit_lo[3]; // @[lsu_bus_buffer.scala 142:77] + wire [2:0] _T_69 = {_T_67,_T_64,_T_61}; // @[Cat.scala 29:58] + wire _T_171 = ld_addr_hitvec_hi_3 & buf_byteen_3[0]; // @[lsu_bus_buffer.scala 146:95] + wire _T_173 = _T_171 & ldst_byteen_hi_m[0]; // @[lsu_bus_buffer.scala 146:114] + wire _T_167 = ld_addr_hitvec_hi_2 & buf_byteen_2[0]; // @[lsu_bus_buffer.scala 146:95] + wire _T_169 = _T_167 & ldst_byteen_hi_m[0]; // @[lsu_bus_buffer.scala 146:114] + wire _T_163 = ld_addr_hitvec_hi_1 & buf_byteen_1[0]; // @[lsu_bus_buffer.scala 146:95] + wire _T_165 = _T_163 & ldst_byteen_hi_m[0]; // @[lsu_bus_buffer.scala 146:114] + wire _T_159 = ld_addr_hitvec_hi_0 & buf_byteen_0[0]; // @[lsu_bus_buffer.scala 146:95] + wire _T_161 = _T_159 & ldst_byteen_hi_m[0]; // @[lsu_bus_buffer.scala 146:114] + wire [3:0] ld_byte_hitvec_hi_0 = {_T_173,_T_169,_T_165,_T_161}; // @[Cat.scala 29:58] + wire [3:0] _T_395 = ld_byte_hitvec_hi_0 & buf_age_younger_3; // @[lsu_bus_buffer.scala 151:122] + wire _T_396 = |_T_395; // @[lsu_bus_buffer.scala 151:144] + wire _T_397 = ~_T_396; // @[lsu_bus_buffer.scala 151:99] + wire _T_398 = ld_byte_hitvec_hi_0[3] & _T_397; // @[lsu_bus_buffer.scala 151:97] + wire _T_517 = io_end_addr_m[31:2] == ibuf_addr[31:2]; // @[lsu_bus_buffer.scala 157:51] + wire _T_518 = _T_517 & ibuf_write; // @[lsu_bus_buffer.scala 157:73] + wire _T_519 = _T_518 & ibuf_valid; // @[lsu_bus_buffer.scala 157:86] + wire ld_addr_ibuf_hit_hi = _T_519 & io_lsu_busreq_m; // @[lsu_bus_buffer.scala 157:99] + wire [3:0] _T_525 = ld_addr_ibuf_hit_hi ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire [3:0] _T_526 = _T_525 & ibuf_byteen; // @[lsu_bus_buffer.scala 162:55] + wire [3:0] ld_byte_ibuf_hit_hi = _T_526 & ldst_byteen_hi_m; // @[lsu_bus_buffer.scala 162:69] + wire _T_400 = ~ld_byte_ibuf_hit_hi[0]; // @[lsu_bus_buffer.scala 151:150] + wire _T_401 = _T_398 & _T_400; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_387 = ld_byte_hitvec_hi_0 & buf_age_younger_2; // @[lsu_bus_buffer.scala 151:122] + wire _T_388 = |_T_387; // @[lsu_bus_buffer.scala 151:144] + wire _T_389 = ~_T_388; // @[lsu_bus_buffer.scala 151:99] + wire _T_390 = ld_byte_hitvec_hi_0[2] & _T_389; // @[lsu_bus_buffer.scala 151:97] + wire _T_393 = _T_390 & _T_400; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_379 = ld_byte_hitvec_hi_0 & buf_age_younger_1; // @[lsu_bus_buffer.scala 151:122] + wire _T_380 = |_T_379; // @[lsu_bus_buffer.scala 151:144] + wire _T_381 = ~_T_380; // @[lsu_bus_buffer.scala 151:99] + wire _T_382 = ld_byte_hitvec_hi_0[1] & _T_381; // @[lsu_bus_buffer.scala 151:97] + wire _T_385 = _T_382 & _T_400; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_371 = ld_byte_hitvec_hi_0 & buf_age_younger_0; // @[lsu_bus_buffer.scala 151:122] + wire _T_372 = |_T_371; // @[lsu_bus_buffer.scala 151:144] + wire _T_373 = ~_T_372; // @[lsu_bus_buffer.scala 151:99] + wire _T_374 = ld_byte_hitvec_hi_0[0] & _T_373; // @[lsu_bus_buffer.scala 151:97] + wire _T_377 = _T_374 & _T_400; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] ld_byte_hitvecfn_hi_0 = {_T_401,_T_393,_T_385,_T_377}; // @[Cat.scala 29:58] + wire _T_71 = |ld_byte_hitvecfn_hi_0; // @[lsu_bus_buffer.scala 143:73] + wire _T_73 = _T_71 | ld_byte_ibuf_hit_hi[0]; // @[lsu_bus_buffer.scala 143:77] + wire _T_189 = ld_addr_hitvec_hi_3 & buf_byteen_3[1]; // @[lsu_bus_buffer.scala 146:95] + wire _T_191 = _T_189 & ldst_byteen_hi_m[1]; // @[lsu_bus_buffer.scala 146:114] + wire _T_185 = ld_addr_hitvec_hi_2 & buf_byteen_2[1]; // @[lsu_bus_buffer.scala 146:95] + wire _T_187 = _T_185 & ldst_byteen_hi_m[1]; // @[lsu_bus_buffer.scala 146:114] + wire _T_181 = ld_addr_hitvec_hi_1 & buf_byteen_1[1]; // @[lsu_bus_buffer.scala 146:95] + wire _T_183 = _T_181 & ldst_byteen_hi_m[1]; // @[lsu_bus_buffer.scala 146:114] + wire _T_177 = ld_addr_hitvec_hi_0 & buf_byteen_0[1]; // @[lsu_bus_buffer.scala 146:95] + wire _T_179 = _T_177 & ldst_byteen_hi_m[1]; // @[lsu_bus_buffer.scala 146:114] + wire [3:0] ld_byte_hitvec_hi_1 = {_T_191,_T_187,_T_183,_T_179}; // @[Cat.scala 29:58] + wire [3:0] _T_430 = ld_byte_hitvec_hi_1 & buf_age_younger_3; // @[lsu_bus_buffer.scala 151:122] + wire _T_431 = |_T_430; // @[lsu_bus_buffer.scala 151:144] + wire _T_432 = ~_T_431; // @[lsu_bus_buffer.scala 151:99] + wire _T_433 = ld_byte_hitvec_hi_1[3] & _T_432; // @[lsu_bus_buffer.scala 151:97] + wire _T_435 = ~ld_byte_ibuf_hit_hi[1]; // @[lsu_bus_buffer.scala 151:150] + wire _T_436 = _T_433 & _T_435; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_422 = ld_byte_hitvec_hi_1 & buf_age_younger_2; // @[lsu_bus_buffer.scala 151:122] + wire _T_423 = |_T_422; // @[lsu_bus_buffer.scala 151:144] + wire _T_424 = ~_T_423; // @[lsu_bus_buffer.scala 151:99] + wire _T_425 = ld_byte_hitvec_hi_1[2] & _T_424; // @[lsu_bus_buffer.scala 151:97] + wire _T_428 = _T_425 & _T_435; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_414 = ld_byte_hitvec_hi_1 & buf_age_younger_1; // @[lsu_bus_buffer.scala 151:122] + wire _T_415 = |_T_414; // @[lsu_bus_buffer.scala 151:144] + wire _T_416 = ~_T_415; // @[lsu_bus_buffer.scala 151:99] + wire _T_417 = ld_byte_hitvec_hi_1[1] & _T_416; // @[lsu_bus_buffer.scala 151:97] + wire _T_420 = _T_417 & _T_435; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_406 = ld_byte_hitvec_hi_1 & buf_age_younger_0; // @[lsu_bus_buffer.scala 151:122] + wire _T_407 = |_T_406; // @[lsu_bus_buffer.scala 151:144] + wire _T_408 = ~_T_407; // @[lsu_bus_buffer.scala 151:99] + wire _T_409 = ld_byte_hitvec_hi_1[0] & _T_408; // @[lsu_bus_buffer.scala 151:97] + wire _T_412 = _T_409 & _T_435; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] ld_byte_hitvecfn_hi_1 = {_T_436,_T_428,_T_420,_T_412}; // @[Cat.scala 29:58] + wire _T_74 = |ld_byte_hitvecfn_hi_1; // @[lsu_bus_buffer.scala 143:73] + wire _T_76 = _T_74 | ld_byte_ibuf_hit_hi[1]; // @[lsu_bus_buffer.scala 143:77] + wire _T_207 = ld_addr_hitvec_hi_3 & buf_byteen_3[2]; // @[lsu_bus_buffer.scala 146:95] + wire _T_209 = _T_207 & ldst_byteen_hi_m[2]; // @[lsu_bus_buffer.scala 146:114] + wire _T_203 = ld_addr_hitvec_hi_2 & buf_byteen_2[2]; // @[lsu_bus_buffer.scala 146:95] + wire _T_205 = _T_203 & ldst_byteen_hi_m[2]; // @[lsu_bus_buffer.scala 146:114] + wire _T_199 = ld_addr_hitvec_hi_1 & buf_byteen_1[2]; // @[lsu_bus_buffer.scala 146:95] + wire _T_201 = _T_199 & ldst_byteen_hi_m[2]; // @[lsu_bus_buffer.scala 146:114] + wire _T_195 = ld_addr_hitvec_hi_0 & buf_byteen_0[2]; // @[lsu_bus_buffer.scala 146:95] + wire _T_197 = _T_195 & ldst_byteen_hi_m[2]; // @[lsu_bus_buffer.scala 146:114] + wire [3:0] ld_byte_hitvec_hi_2 = {_T_209,_T_205,_T_201,_T_197}; // @[Cat.scala 29:58] + wire [3:0] _T_465 = ld_byte_hitvec_hi_2 & buf_age_younger_3; // @[lsu_bus_buffer.scala 151:122] + wire _T_466 = |_T_465; // @[lsu_bus_buffer.scala 151:144] + wire _T_467 = ~_T_466; // @[lsu_bus_buffer.scala 151:99] + wire _T_468 = ld_byte_hitvec_hi_2[3] & _T_467; // @[lsu_bus_buffer.scala 151:97] + wire _T_470 = ~ld_byte_ibuf_hit_hi[2]; // @[lsu_bus_buffer.scala 151:150] + wire _T_471 = _T_468 & _T_470; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_457 = ld_byte_hitvec_hi_2 & buf_age_younger_2; // @[lsu_bus_buffer.scala 151:122] + wire _T_458 = |_T_457; // @[lsu_bus_buffer.scala 151:144] + wire _T_459 = ~_T_458; // @[lsu_bus_buffer.scala 151:99] + wire _T_460 = ld_byte_hitvec_hi_2[2] & _T_459; // @[lsu_bus_buffer.scala 151:97] + wire _T_463 = _T_460 & _T_470; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_449 = ld_byte_hitvec_hi_2 & buf_age_younger_1; // @[lsu_bus_buffer.scala 151:122] + wire _T_450 = |_T_449; // @[lsu_bus_buffer.scala 151:144] + wire _T_451 = ~_T_450; // @[lsu_bus_buffer.scala 151:99] + wire _T_452 = ld_byte_hitvec_hi_2[1] & _T_451; // @[lsu_bus_buffer.scala 151:97] + wire _T_455 = _T_452 & _T_470; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_441 = ld_byte_hitvec_hi_2 & buf_age_younger_0; // @[lsu_bus_buffer.scala 151:122] + wire _T_442 = |_T_441; // @[lsu_bus_buffer.scala 151:144] + wire _T_443 = ~_T_442; // @[lsu_bus_buffer.scala 151:99] + wire _T_444 = ld_byte_hitvec_hi_2[0] & _T_443; // @[lsu_bus_buffer.scala 151:97] + wire _T_447 = _T_444 & _T_470; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] ld_byte_hitvecfn_hi_2 = {_T_471,_T_463,_T_455,_T_447}; // @[Cat.scala 29:58] + wire _T_77 = |ld_byte_hitvecfn_hi_2; // @[lsu_bus_buffer.scala 143:73] + wire _T_79 = _T_77 | ld_byte_ibuf_hit_hi[2]; // @[lsu_bus_buffer.scala 143:77] + wire _T_225 = ld_addr_hitvec_hi_3 & buf_byteen_3[3]; // @[lsu_bus_buffer.scala 146:95] + wire _T_227 = _T_225 & ldst_byteen_hi_m[3]; // @[lsu_bus_buffer.scala 146:114] + wire _T_221 = ld_addr_hitvec_hi_2 & buf_byteen_2[3]; // @[lsu_bus_buffer.scala 146:95] + wire _T_223 = _T_221 & ldst_byteen_hi_m[3]; // @[lsu_bus_buffer.scala 146:114] + wire _T_217 = ld_addr_hitvec_hi_1 & buf_byteen_1[3]; // @[lsu_bus_buffer.scala 146:95] + wire _T_219 = _T_217 & ldst_byteen_hi_m[3]; // @[lsu_bus_buffer.scala 146:114] + wire _T_213 = ld_addr_hitvec_hi_0 & buf_byteen_0[3]; // @[lsu_bus_buffer.scala 146:95] + wire _T_215 = _T_213 & ldst_byteen_hi_m[3]; // @[lsu_bus_buffer.scala 146:114] + wire [3:0] ld_byte_hitvec_hi_3 = {_T_227,_T_223,_T_219,_T_215}; // @[Cat.scala 29:58] + wire [3:0] _T_500 = ld_byte_hitvec_hi_3 & buf_age_younger_3; // @[lsu_bus_buffer.scala 151:122] + wire _T_501 = |_T_500; // @[lsu_bus_buffer.scala 151:144] + wire _T_502 = ~_T_501; // @[lsu_bus_buffer.scala 151:99] + wire _T_503 = ld_byte_hitvec_hi_3[3] & _T_502; // @[lsu_bus_buffer.scala 151:97] + wire _T_505 = ~ld_byte_ibuf_hit_hi[3]; // @[lsu_bus_buffer.scala 151:150] + wire _T_506 = _T_503 & _T_505; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_492 = ld_byte_hitvec_hi_3 & buf_age_younger_2; // @[lsu_bus_buffer.scala 151:122] + wire _T_493 = |_T_492; // @[lsu_bus_buffer.scala 151:144] + wire _T_494 = ~_T_493; // @[lsu_bus_buffer.scala 151:99] + wire _T_495 = ld_byte_hitvec_hi_3[2] & _T_494; // @[lsu_bus_buffer.scala 151:97] + wire _T_498 = _T_495 & _T_505; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_484 = ld_byte_hitvec_hi_3 & buf_age_younger_1; // @[lsu_bus_buffer.scala 151:122] + wire _T_485 = |_T_484; // @[lsu_bus_buffer.scala 151:144] + wire _T_486 = ~_T_485; // @[lsu_bus_buffer.scala 151:99] + wire _T_487 = ld_byte_hitvec_hi_3[1] & _T_486; // @[lsu_bus_buffer.scala 151:97] + wire _T_490 = _T_487 & _T_505; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] _T_476 = ld_byte_hitvec_hi_3 & buf_age_younger_0; // @[lsu_bus_buffer.scala 151:122] + wire _T_477 = |_T_476; // @[lsu_bus_buffer.scala 151:144] + wire _T_478 = ~_T_477; // @[lsu_bus_buffer.scala 151:99] + wire _T_479 = ld_byte_hitvec_hi_3[0] & _T_478; // @[lsu_bus_buffer.scala 151:97] + wire _T_482 = _T_479 & _T_505; // @[lsu_bus_buffer.scala 151:148] + wire [3:0] ld_byte_hitvecfn_hi_3 = {_T_506,_T_498,_T_490,_T_482}; // @[Cat.scala 29:58] + wire _T_80 = |ld_byte_hitvecfn_hi_3; // @[lsu_bus_buffer.scala 143:73] + wire _T_82 = _T_80 | ld_byte_ibuf_hit_hi[3]; // @[lsu_bus_buffer.scala 143:77] + wire [2:0] _T_84 = {_T_82,_T_79,_T_76}; // @[Cat.scala 29:58] + wire [7:0] _T_530 = ld_byte_ibuf_hit_lo[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_533 = ld_byte_ibuf_hit_lo[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_536 = ld_byte_ibuf_hit_lo[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_539 = ld_byte_ibuf_hit_lo[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [31:0] ld_fwddata_buf_lo_initial = {_T_539,_T_536,_T_533,_T_530}; // @[Cat.scala 29:58] + wire [7:0] _T_544 = ld_byte_ibuf_hit_hi[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_547 = ld_byte_ibuf_hit_hi[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_550 = ld_byte_ibuf_hit_hi[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_553 = ld_byte_ibuf_hit_hi[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [31:0] ld_fwddata_buf_hi_initial = {_T_553,_T_550,_T_547,_T_544}; // @[Cat.scala 29:58] + wire [7:0] _T_558 = ld_byte_hitvecfn_lo_3[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_0; // @[Reg.scala 27:20] + wire [7:0] _T_560 = _T_558 & buf_data_0[31:24]; // @[lsu_bus_buffer.scala 169:91] + wire [7:0] _T_563 = ld_byte_hitvecfn_lo_3[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_1; // @[Reg.scala 27:20] + wire [7:0] _T_565 = _T_563 & buf_data_1[31:24]; // @[lsu_bus_buffer.scala 169:91] + wire [7:0] _T_568 = ld_byte_hitvecfn_lo_3[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_2; // @[Reg.scala 27:20] + wire [7:0] _T_570 = _T_568 & buf_data_2[31:24]; // @[lsu_bus_buffer.scala 169:91] + wire [7:0] _T_573 = ld_byte_hitvecfn_lo_3[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + reg [31:0] buf_data_3; // @[Reg.scala 27:20] + wire [7:0] _T_575 = _T_573 & buf_data_3[31:24]; // @[lsu_bus_buffer.scala 169:91] + wire [7:0] _T_576 = _T_560 | _T_565; // @[lsu_bus_buffer.scala 169:123] + wire [7:0] _T_577 = _T_576 | _T_570; // @[lsu_bus_buffer.scala 169:123] + wire [7:0] _T_578 = _T_577 | _T_575; // @[lsu_bus_buffer.scala 169:123] + wire [7:0] _T_581 = ld_byte_hitvecfn_lo_2[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_583 = _T_581 & buf_data_0[23:16]; // @[lsu_bus_buffer.scala 170:65] + wire [7:0] _T_586 = ld_byte_hitvecfn_lo_2[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_588 = _T_586 & buf_data_1[23:16]; // @[lsu_bus_buffer.scala 170:65] + wire [7:0] _T_591 = ld_byte_hitvecfn_lo_2[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_593 = _T_591 & buf_data_2[23:16]; // @[lsu_bus_buffer.scala 170:65] + wire [7:0] _T_596 = ld_byte_hitvecfn_lo_2[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_598 = _T_596 & buf_data_3[23:16]; // @[lsu_bus_buffer.scala 170:65] + wire [7:0] _T_599 = _T_583 | _T_588; // @[lsu_bus_buffer.scala 170:97] + wire [7:0] _T_600 = _T_599 | _T_593; // @[lsu_bus_buffer.scala 170:97] + wire [7:0] _T_601 = _T_600 | _T_598; // @[lsu_bus_buffer.scala 170:97] + wire [7:0] _T_604 = ld_byte_hitvecfn_lo_1[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_606 = _T_604 & buf_data_0[15:8]; // @[lsu_bus_buffer.scala 171:65] + wire [7:0] _T_609 = ld_byte_hitvecfn_lo_1[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_611 = _T_609 & buf_data_1[15:8]; // @[lsu_bus_buffer.scala 171:65] + wire [7:0] _T_614 = ld_byte_hitvecfn_lo_1[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_616 = _T_614 & buf_data_2[15:8]; // @[lsu_bus_buffer.scala 171:65] + wire [7:0] _T_619 = ld_byte_hitvecfn_lo_1[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_621 = _T_619 & buf_data_3[15:8]; // @[lsu_bus_buffer.scala 171:65] + wire [7:0] _T_622 = _T_606 | _T_611; // @[lsu_bus_buffer.scala 171:97] + wire [7:0] _T_623 = _T_622 | _T_616; // @[lsu_bus_buffer.scala 171:97] + wire [7:0] _T_624 = _T_623 | _T_621; // @[lsu_bus_buffer.scala 171:97] + wire [7:0] _T_627 = ld_byte_hitvecfn_lo_0[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_629 = _T_627 & buf_data_0[7:0]; // @[lsu_bus_buffer.scala 172:65] + wire [7:0] _T_632 = ld_byte_hitvecfn_lo_0[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_634 = _T_632 & buf_data_1[7:0]; // @[lsu_bus_buffer.scala 172:65] + wire [7:0] _T_637 = ld_byte_hitvecfn_lo_0[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_639 = _T_637 & buf_data_2[7:0]; // @[lsu_bus_buffer.scala 172:65] + wire [7:0] _T_642 = ld_byte_hitvecfn_lo_0[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_644 = _T_642 & buf_data_3[7:0]; // @[lsu_bus_buffer.scala 172:65] + wire [7:0] _T_645 = _T_629 | _T_634; // @[lsu_bus_buffer.scala 172:97] + wire [7:0] _T_646 = _T_645 | _T_639; // @[lsu_bus_buffer.scala 172:97] + wire [7:0] _T_647 = _T_646 | _T_644; // @[lsu_bus_buffer.scala 172:97] + wire [31:0] _T_650 = {_T_578,_T_601,_T_624,_T_647}; // @[Cat.scala 29:58] + reg [31:0] ibuf_data; // @[Reg.scala 27:20] + wire [31:0] _T_651 = ld_fwddata_buf_lo_initial & ibuf_data; // @[lsu_bus_buffer.scala 173:32] + wire [7:0] _T_655 = ld_byte_hitvecfn_hi_3[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_657 = _T_655 & buf_data_0[31:24]; // @[lsu_bus_buffer.scala 175:91] + wire [7:0] _T_660 = ld_byte_hitvecfn_hi_3[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_662 = _T_660 & buf_data_1[31:24]; // @[lsu_bus_buffer.scala 175:91] + wire [7:0] _T_665 = ld_byte_hitvecfn_hi_3[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_667 = _T_665 & buf_data_2[31:24]; // @[lsu_bus_buffer.scala 175:91] + wire [7:0] _T_670 = ld_byte_hitvecfn_hi_3[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_672 = _T_670 & buf_data_3[31:24]; // @[lsu_bus_buffer.scala 175:91] + wire [7:0] _T_673 = _T_657 | _T_662; // @[lsu_bus_buffer.scala 175:123] + wire [7:0] _T_674 = _T_673 | _T_667; // @[lsu_bus_buffer.scala 175:123] + wire [7:0] _T_675 = _T_674 | _T_672; // @[lsu_bus_buffer.scala 175:123] + wire [7:0] _T_678 = ld_byte_hitvecfn_hi_2[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_680 = _T_678 & buf_data_0[23:16]; // @[lsu_bus_buffer.scala 176:65] + wire [7:0] _T_683 = ld_byte_hitvecfn_hi_2[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_685 = _T_683 & buf_data_1[23:16]; // @[lsu_bus_buffer.scala 176:65] + wire [7:0] _T_688 = ld_byte_hitvecfn_hi_2[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_690 = _T_688 & buf_data_2[23:16]; // @[lsu_bus_buffer.scala 176:65] + wire [7:0] _T_693 = ld_byte_hitvecfn_hi_2[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_695 = _T_693 & buf_data_3[23:16]; // @[lsu_bus_buffer.scala 176:65] + wire [7:0] _T_696 = _T_680 | _T_685; // @[lsu_bus_buffer.scala 176:97] + wire [7:0] _T_697 = _T_696 | _T_690; // @[lsu_bus_buffer.scala 176:97] + wire [7:0] _T_698 = _T_697 | _T_695; // @[lsu_bus_buffer.scala 176:97] + wire [7:0] _T_701 = ld_byte_hitvecfn_hi_1[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_703 = _T_701 & buf_data_0[15:8]; // @[lsu_bus_buffer.scala 177:65] + wire [7:0] _T_706 = ld_byte_hitvecfn_hi_1[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_708 = _T_706 & buf_data_1[15:8]; // @[lsu_bus_buffer.scala 177:65] + wire [7:0] _T_711 = ld_byte_hitvecfn_hi_1[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_713 = _T_711 & buf_data_2[15:8]; // @[lsu_bus_buffer.scala 177:65] + wire [7:0] _T_716 = ld_byte_hitvecfn_hi_1[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_718 = _T_716 & buf_data_3[15:8]; // @[lsu_bus_buffer.scala 177:65] + wire [7:0] _T_719 = _T_703 | _T_708; // @[lsu_bus_buffer.scala 177:97] + wire [7:0] _T_720 = _T_719 | _T_713; // @[lsu_bus_buffer.scala 177:97] + wire [7:0] _T_721 = _T_720 | _T_718; // @[lsu_bus_buffer.scala 177:97] + wire [7:0] _T_724 = ld_byte_hitvecfn_hi_0[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_726 = _T_724 & buf_data_0[7:0]; // @[lsu_bus_buffer.scala 178:65] + wire [7:0] _T_729 = ld_byte_hitvecfn_hi_0[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_731 = _T_729 & buf_data_1[7:0]; // @[lsu_bus_buffer.scala 178:65] + wire [7:0] _T_734 = ld_byte_hitvecfn_hi_0[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_736 = _T_734 & buf_data_2[7:0]; // @[lsu_bus_buffer.scala 178:65] + wire [7:0] _T_739 = ld_byte_hitvecfn_hi_0[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire [7:0] _T_741 = _T_739 & buf_data_3[7:0]; // @[lsu_bus_buffer.scala 178:65] + wire [7:0] _T_742 = _T_726 | _T_731; // @[lsu_bus_buffer.scala 178:97] + wire [7:0] _T_743 = _T_742 | _T_736; // @[lsu_bus_buffer.scala 178:97] + wire [7:0] _T_744 = _T_743 | _T_741; // @[lsu_bus_buffer.scala 178:97] + wire [31:0] _T_747 = {_T_675,_T_698,_T_721,_T_744}; // @[Cat.scala 29:58] + wire [31:0] _T_748 = ld_fwddata_buf_hi_initial & ibuf_data; // @[lsu_bus_buffer.scala 179:32] + wire [3:0] _T_750 = io_lsu_pkt_r_bits_by ? 4'h1 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_751 = io_lsu_pkt_r_bits_half ? 4'h3 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_752 = io_lsu_pkt_r_bits_word ? 4'hf : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_753 = _T_750 | _T_751; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_r = _T_753 | _T_752; // @[Mux.scala 27:72] + wire _T_756 = io_lsu_addr_r[1:0] == 2'h0; // @[lsu_bus_buffer.scala 186:55] + wire _T_758 = io_lsu_addr_r[1:0] == 2'h1; // @[lsu_bus_buffer.scala 187:24] + wire [3:0] _T_760 = {3'h0,ldst_byteen_r[3]}; // @[Cat.scala 29:58] + wire _T_762 = io_lsu_addr_r[1:0] == 2'h2; // @[lsu_bus_buffer.scala 188:24] + wire [3:0] _T_764 = {2'h0,ldst_byteen_r[3:2]}; // @[Cat.scala 29:58] + wire _T_766 = io_lsu_addr_r[1:0] == 2'h3; // @[lsu_bus_buffer.scala 189:24] + wire [3:0] _T_768 = {1'h0,ldst_byteen_r[3:1]}; // @[Cat.scala 29:58] + wire [3:0] _T_770 = _T_758 ? _T_760 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_771 = _T_762 ? _T_764 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_772 = _T_766 ? _T_768 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_774 = _T_770 | _T_771; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_hi_r = _T_774 | _T_772; // @[Mux.scala 27:72] + wire [3:0] _T_781 = {ldst_byteen_r[2:0],1'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_785 = {ldst_byteen_r[1:0],2'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_789 = {ldst_byteen_r[0],3'h0}; // @[Cat.scala 29:58] + wire [3:0] _T_790 = _T_756 ? ldst_byteen_r : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_791 = _T_758 ? _T_781 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_792 = _T_762 ? _T_785 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_793 = _T_766 ? _T_789 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_794 = _T_790 | _T_791; // @[Mux.scala 27:72] + wire [3:0] _T_795 = _T_794 | _T_792; // @[Mux.scala 27:72] + wire [3:0] ldst_byteen_lo_r = _T_795 | _T_793; // @[Mux.scala 27:72] + wire [31:0] _T_802 = {24'h0,io_store_data_r[31:24]}; // @[Cat.scala 29:58] + wire [31:0] _T_806 = {16'h0,io_store_data_r[31:16]}; // @[Cat.scala 29:58] + wire [31:0] _T_810 = {8'h0,io_store_data_r[31:8]}; // @[Cat.scala 29:58] + wire [31:0] _T_812 = _T_758 ? _T_802 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_813 = _T_762 ? _T_806 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_814 = _T_766 ? _T_810 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_816 = _T_812 | _T_813; // @[Mux.scala 27:72] + wire [31:0] store_data_hi_r = _T_816 | _T_814; // @[Mux.scala 27:72] + wire [31:0] _T_823 = {io_store_data_r[23:0],8'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_827 = {io_store_data_r[15:0],16'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_831 = {io_store_data_r[7:0],24'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_832 = _T_756 ? io_store_data_r : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_833 = _T_758 ? _T_823 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_834 = _T_762 ? _T_827 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_835 = _T_766 ? _T_831 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_836 = _T_832 | _T_833; // @[Mux.scala 27:72] + wire [31:0] _T_837 = _T_836 | _T_834; // @[Mux.scala 27:72] + wire [31:0] store_data_lo_r = _T_837 | _T_835; // @[Mux.scala 27:72] + wire ldst_samedw_r = io_lsu_addr_r[3] == io_end_addr_r[3]; // @[lsu_bus_buffer.scala 207:40] + wire _T_844 = ~io_lsu_addr_r[0]; // @[lsu_bus_buffer.scala 209:31] + wire _T_845 = io_lsu_pkt_r_bits_word & _T_756; // @[Mux.scala 27:72] + wire _T_846 = io_lsu_pkt_r_bits_half & _T_844; // @[Mux.scala 27:72] + wire _T_848 = _T_845 | _T_846; // @[Mux.scala 27:72] + wire is_aligned_r = _T_848 | io_lsu_pkt_r_bits_by; // @[Mux.scala 27:72] + wire _T_850 = io_lsu_pkt_r_bits_load | io_no_word_merge_r; // @[lsu_bus_buffer.scala 211:60] + wire _T_851 = io_lsu_busreq_r & _T_850; // @[lsu_bus_buffer.scala 211:34] + wire _T_852 = ~ibuf_valid; // @[lsu_bus_buffer.scala 211:84] + wire ibuf_byp = _T_851 & _T_852; // @[lsu_bus_buffer.scala 211:82] + wire _T_853 = io_lsu_busreq_r & io_lsu_commit_r; // @[lsu_bus_buffer.scala 212:36] + wire _T_854 = ~ibuf_byp; // @[lsu_bus_buffer.scala 212:56] + wire ibuf_wr_en = _T_853 & _T_854; // @[lsu_bus_buffer.scala 212:54] + wire _T_855 = ~ibuf_wr_en; // @[lsu_bus_buffer.scala 214:36] + reg [2:0] ibuf_timer; // @[lsu_bus_buffer.scala 257:55] + wire _T_864 = ibuf_timer == 3'h7; // @[lsu_bus_buffer.scala 220:62] + wire _T_865 = ibuf_wr_en | _T_864; // @[lsu_bus_buffer.scala 220:48] + wire _T_929 = _T_853 & io_lsu_pkt_r_bits_store; // @[lsu_bus_buffer.scala 239:54] + wire _T_930 = _T_929 & ibuf_valid; // @[lsu_bus_buffer.scala 239:80] + wire _T_931 = _T_930 & ibuf_write; // @[lsu_bus_buffer.scala 239:93] + wire _T_934 = io_lsu_addr_r[31:2] == ibuf_addr[31:2]; // @[lsu_bus_buffer.scala 239:129] + wire _T_935 = _T_931 & _T_934; // @[lsu_bus_buffer.scala 239:106] + wire _T_936 = ~io_is_sideeffects_r; // @[lsu_bus_buffer.scala 239:152] + wire _T_937 = _T_935 & _T_936; // @[lsu_bus_buffer.scala 239:150] + wire _T_938 = ~io_tlu_busbuff_dec_tlu_wb_coalescing_disable; // @[lsu_bus_buffer.scala 239:175] + wire ibuf_merge_en = _T_937 & _T_938; // @[lsu_bus_buffer.scala 239:173] + wire ibuf_merge_in = ~io_ldst_dual_r; // @[lsu_bus_buffer.scala 240:20] + wire _T_866 = ibuf_merge_en & ibuf_merge_in; // @[lsu_bus_buffer.scala 220:98] + wire _T_867 = ~_T_866; // @[lsu_bus_buffer.scala 220:82] + wire _T_868 = _T_865 & _T_867; // @[lsu_bus_buffer.scala 220:80] + wire _T_869 = _T_868 | ibuf_byp; // @[lsu_bus_buffer.scala 221:5] + wire _T_857 = ~io_lsu_busreq_r; // @[lsu_bus_buffer.scala 215:44] + wire _T_858 = io_lsu_busreq_m & _T_857; // @[lsu_bus_buffer.scala 215:42] + wire _T_859 = _T_858 & ibuf_valid; // @[lsu_bus_buffer.scala 215:61] + wire _T_862 = ibuf_addr[31:2] != io_lsu_addr_m[31:2]; // @[lsu_bus_buffer.scala 215:120] + wire _T_863 = io_lsu_pkt_m_bits_load | _T_862; // @[lsu_bus_buffer.scala 215:100] + wire ibuf_force_drain = _T_859 & _T_863; // @[lsu_bus_buffer.scala 215:74] + wire _T_870 = _T_869 | ibuf_force_drain; // @[lsu_bus_buffer.scala 221:16] + reg ibuf_sideeffect; // @[Reg.scala 27:20] + wire _T_871 = _T_870 | ibuf_sideeffect; // @[lsu_bus_buffer.scala 221:35] + wire _T_872 = ~ibuf_write; // @[lsu_bus_buffer.scala 221:55] + wire _T_873 = _T_871 | _T_872; // @[lsu_bus_buffer.scala 221:53] + wire _T_874 = _T_873 | io_tlu_busbuff_dec_tlu_wb_coalescing_disable; // @[lsu_bus_buffer.scala 221:67] + wire ibuf_drain_vld = ibuf_valid & _T_874; // @[lsu_bus_buffer.scala 220:32] + wire _T_856 = ibuf_drain_vld & _T_855; // @[lsu_bus_buffer.scala 214:34] + wire ibuf_rst = _T_856 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 214:49] + reg [1:0] WrPtr1_r; // @[lsu_bus_buffer.scala 627:49] + reg [1:0] WrPtr0_r; // @[lsu_bus_buffer.scala 626:49] + reg [1:0] ibuf_tag; // @[Reg.scala 27:20] + wire [1:0] ibuf_sz_in = {io_lsu_pkt_r_bits_word,io_lsu_pkt_r_bits_half}; // @[Cat.scala 29:58] + wire [3:0] _T_881 = ibuf_byteen | ldst_byteen_lo_r; // @[lsu_bus_buffer.scala 230:77] + wire [7:0] _T_889 = ldst_byteen_lo_r[0] ? store_data_lo_r[7:0] : ibuf_data[7:0]; // @[lsu_bus_buffer.scala 235:8] + wire [7:0] _T_892 = io_ldst_dual_r ? store_data_hi_r[7:0] : store_data_lo_r[7:0]; // @[lsu_bus_buffer.scala 236:8] + wire [7:0] _T_893 = _T_866 ? _T_889 : _T_892; // @[lsu_bus_buffer.scala 234:46] + wire [7:0] _T_898 = ldst_byteen_lo_r[1] ? store_data_lo_r[15:8] : ibuf_data[15:8]; // @[lsu_bus_buffer.scala 235:8] + wire [7:0] _T_901 = io_ldst_dual_r ? store_data_hi_r[15:8] : store_data_lo_r[15:8]; // @[lsu_bus_buffer.scala 236:8] + wire [7:0] _T_902 = _T_866 ? _T_898 : _T_901; // @[lsu_bus_buffer.scala 234:46] + wire [7:0] _T_907 = ldst_byteen_lo_r[2] ? store_data_lo_r[23:16] : ibuf_data[23:16]; // @[lsu_bus_buffer.scala 235:8] + wire [7:0] _T_910 = io_ldst_dual_r ? store_data_hi_r[23:16] : store_data_lo_r[23:16]; // @[lsu_bus_buffer.scala 236:8] + wire [7:0] _T_911 = _T_866 ? _T_907 : _T_910; // @[lsu_bus_buffer.scala 234:46] + wire [7:0] _T_916 = ldst_byteen_lo_r[3] ? store_data_lo_r[31:24] : ibuf_data[31:24]; // @[lsu_bus_buffer.scala 235:8] + wire [7:0] _T_919 = io_ldst_dual_r ? store_data_hi_r[31:24] : store_data_lo_r[31:24]; // @[lsu_bus_buffer.scala 236:8] + wire [7:0] _T_920 = _T_866 ? _T_916 : _T_919; // @[lsu_bus_buffer.scala 234:46] + wire [31:0] ibuf_data_in = {_T_920,_T_911,_T_902,_T_893}; // @[Cat.scala 29:58] + wire _T_923 = ibuf_timer < 3'h7; // @[lsu_bus_buffer.scala 237:60] + wire [2:0] _T_926 = ibuf_timer + 3'h1; // @[lsu_bus_buffer.scala 237:95] + wire _T_941 = ~ibuf_merge_in; // @[lsu_bus_buffer.scala 241:65] + wire _T_942 = ibuf_merge_en & _T_941; // @[lsu_bus_buffer.scala 241:63] + wire _T_945 = ibuf_byteen[0] | ldst_byteen_lo_r[0]; // @[lsu_bus_buffer.scala 241:96] + wire _T_947 = _T_942 ? _T_945 : ibuf_byteen[0]; // @[lsu_bus_buffer.scala 241:48] + wire _T_952 = ibuf_byteen[1] | ldst_byteen_lo_r[1]; // @[lsu_bus_buffer.scala 241:96] + wire _T_954 = _T_942 ? _T_952 : ibuf_byteen[1]; // @[lsu_bus_buffer.scala 241:48] + wire _T_959 = ibuf_byteen[2] | ldst_byteen_lo_r[2]; // @[lsu_bus_buffer.scala 241:96] + wire _T_961 = _T_942 ? _T_959 : ibuf_byteen[2]; // @[lsu_bus_buffer.scala 241:48] + wire _T_966 = ibuf_byteen[3] | ldst_byteen_lo_r[3]; // @[lsu_bus_buffer.scala 241:96] + wire _T_968 = _T_942 ? _T_966 : ibuf_byteen[3]; // @[lsu_bus_buffer.scala 241:48] + wire [3:0] ibuf_byteen_out = {_T_968,_T_961,_T_954,_T_947}; // @[Cat.scala 29:58] + wire [7:0] _T_978 = _T_942 ? _T_889 : ibuf_data[7:0]; // @[lsu_bus_buffer.scala 242:45] + wire [7:0] _T_986 = _T_942 ? _T_898 : ibuf_data[15:8]; // @[lsu_bus_buffer.scala 242:45] + wire [7:0] _T_994 = _T_942 ? _T_907 : ibuf_data[23:16]; // @[lsu_bus_buffer.scala 242:45] + wire [7:0] _T_1002 = _T_942 ? _T_916 : ibuf_data[31:24]; // @[lsu_bus_buffer.scala 242:45] + wire [31:0] ibuf_data_out = {_T_1002,_T_994,_T_986,_T_978}; // @[Cat.scala 29:58] + wire _T_1005 = ibuf_wr_en | ibuf_valid; // @[lsu_bus_buffer.scala 244:58] + wire _T_1006 = ~ibuf_rst; // @[lsu_bus_buffer.scala 244:93] + reg [1:0] ibuf_dualtag; // @[Reg.scala 27:20] + reg ibuf_dual; // @[Reg.scala 27:20] + reg ibuf_samedw; // @[Reg.scala 27:20] + reg ibuf_nomerge; // @[Reg.scala 27:20] + reg ibuf_unsign; // @[Reg.scala 27:20] + reg [1:0] ibuf_sz; // @[Reg.scala 27:20] + wire _T_4441 = buf_write[3] & _T_2590; // @[lsu_bus_buffer.scala 533:64] + wire _T_4442 = ~buf_cmd_state_bus_en_3; // @[lsu_bus_buffer.scala 533:91] + wire _T_4443 = _T_4441 & _T_4442; // @[lsu_bus_buffer.scala 533:89] + wire _T_4436 = buf_write[2] & _T_2583; // @[lsu_bus_buffer.scala 533:64] + wire _T_4437 = ~buf_cmd_state_bus_en_2; // @[lsu_bus_buffer.scala 533:91] + wire _T_4438 = _T_4436 & _T_4437; // @[lsu_bus_buffer.scala 533:89] + wire [1:0] _T_4444 = _T_4443 + _T_4438; // @[lsu_bus_buffer.scala 533:142] + wire _T_4431 = buf_write[1] & _T_2576; // @[lsu_bus_buffer.scala 533:64] + wire _T_4432 = ~buf_cmd_state_bus_en_1; // @[lsu_bus_buffer.scala 533:91] + wire _T_4433 = _T_4431 & _T_4432; // @[lsu_bus_buffer.scala 533:89] + wire [1:0] _GEN_380 = {{1'd0}, _T_4433}; // @[lsu_bus_buffer.scala 533:142] + wire [2:0] _T_4445 = _T_4444 + _GEN_380; // @[lsu_bus_buffer.scala 533:142] + wire _T_4426 = buf_write[0] & _T_2569; // @[lsu_bus_buffer.scala 533:64] + wire _T_4427 = ~buf_cmd_state_bus_en_0; // @[lsu_bus_buffer.scala 533:91] + wire _T_4428 = _T_4426 & _T_4427; // @[lsu_bus_buffer.scala 533:89] + wire [2:0] _GEN_381 = {{2'd0}, _T_4428}; // @[lsu_bus_buffer.scala 533:142] + wire [3:0] buf_numvld_wrcmd_any = _T_4445 + _GEN_381; // @[lsu_bus_buffer.scala 533:142] + wire _T_1016 = buf_numvld_wrcmd_any == 4'h1; // @[lsu_bus_buffer.scala 267:43] + wire _T_4458 = _T_2590 & _T_4442; // @[lsu_bus_buffer.scala 534:73] + wire _T_4455 = _T_2583 & _T_4437; // @[lsu_bus_buffer.scala 534:73] + wire [1:0] _T_4459 = _T_4458 + _T_4455; // @[lsu_bus_buffer.scala 534:126] + wire _T_4452 = _T_2576 & _T_4432; // @[lsu_bus_buffer.scala 534:73] + wire [1:0] _GEN_382 = {{1'd0}, _T_4452}; // @[lsu_bus_buffer.scala 534:126] + wire [2:0] _T_4460 = _T_4459 + _GEN_382; // @[lsu_bus_buffer.scala 534:126] + wire _T_4449 = _T_2569 & _T_4427; // @[lsu_bus_buffer.scala 534:73] + wire [2:0] _GEN_383 = {{2'd0}, _T_4449}; // @[lsu_bus_buffer.scala 534:126] + wire [3:0] buf_numvld_cmd_any = _T_4460 + _GEN_383; // @[lsu_bus_buffer.scala 534:126] + wire _T_1017 = buf_numvld_cmd_any == 4'h1; // @[lsu_bus_buffer.scala 267:72] + wire _T_1018 = _T_1016 & _T_1017; // @[lsu_bus_buffer.scala 267:51] + reg [2:0] obuf_wr_timer; // @[Reg.scala 27:20] + wire _T_1019 = obuf_wr_timer != 3'h7; // @[lsu_bus_buffer.scala 267:97] + wire _T_1020 = _T_1018 & _T_1019; // @[lsu_bus_buffer.scala 267:80] + wire _T_1022 = _T_1020 & _T_938; // @[lsu_bus_buffer.scala 267:114] + wire _T_1918 = |buf_age_3; // @[lsu_bus_buffer.scala 383:58] + wire _T_1919 = ~_T_1918; // @[lsu_bus_buffer.scala 383:45] + wire _T_1921 = _T_1919 & _T_2590; // @[lsu_bus_buffer.scala 383:63] + wire _T_1923 = _T_1921 & _T_4442; // @[lsu_bus_buffer.scala 383:88] + wire _T_1912 = |buf_age_2; // @[lsu_bus_buffer.scala 383:58] + wire _T_1913 = ~_T_1912; // @[lsu_bus_buffer.scala 383:45] + wire _T_1915 = _T_1913 & _T_2583; // @[lsu_bus_buffer.scala 383:63] + wire _T_1917 = _T_1915 & _T_4437; // @[lsu_bus_buffer.scala 383:88] + wire _T_1906 = |buf_age_1; // @[lsu_bus_buffer.scala 383:58] + wire _T_1907 = ~_T_1906; // @[lsu_bus_buffer.scala 383:45] + wire _T_1909 = _T_1907 & _T_2576; // @[lsu_bus_buffer.scala 383:63] + wire _T_1911 = _T_1909 & _T_4432; // @[lsu_bus_buffer.scala 383:88] + wire _T_1900 = |buf_age_0; // @[lsu_bus_buffer.scala 383:58] + wire _T_1901 = ~_T_1900; // @[lsu_bus_buffer.scala 383:45] + wire _T_1903 = _T_1901 & _T_2569; // @[lsu_bus_buffer.scala 383:63] + wire _T_1905 = _T_1903 & _T_4427; // @[lsu_bus_buffer.scala 383:88] + wire [3:0] CmdPtr0Dec = {_T_1923,_T_1917,_T_1911,_T_1905}; // @[Cat.scala 29:58] + wire [7:0] _T_1993 = {4'h0,_T_1923,_T_1917,_T_1911,_T_1905}; // @[Cat.scala 29:58] + wire _T_1996 = _T_1993[4] | _T_1993[5]; // @[lsu_bus_buffer.scala 391:42] + wire _T_1998 = _T_1996 | _T_1993[6]; // @[lsu_bus_buffer.scala 391:48] + wire _T_2000 = _T_1998 | _T_1993[7]; // @[lsu_bus_buffer.scala 391:54] + wire _T_2003 = _T_1993[2] | _T_1993[3]; // @[lsu_bus_buffer.scala 391:67] + wire _T_2005 = _T_2003 | _T_1993[6]; // @[lsu_bus_buffer.scala 391:73] + wire _T_2007 = _T_2005 | _T_1993[7]; // @[lsu_bus_buffer.scala 391:79] + wire _T_2010 = _T_1993[1] | _T_1993[3]; // @[lsu_bus_buffer.scala 391:92] + wire _T_2012 = _T_2010 | _T_1993[5]; // @[lsu_bus_buffer.scala 391:98] + wire _T_2014 = _T_2012 | _T_1993[7]; // @[lsu_bus_buffer.scala 391:104] + wire [2:0] _T_2016 = {_T_2000,_T_2007,_T_2014}; // @[Cat.scala 29:58] + wire [1:0] CmdPtr0 = _T_2016[1:0]; // @[lsu_bus_buffer.scala 396:11] + wire _T_1023 = CmdPtr0 == 2'h0; // @[lsu_bus_buffer.scala 268:114] + wire _T_1024 = CmdPtr0 == 2'h1; // @[lsu_bus_buffer.scala 268:114] + wire _T_1025 = CmdPtr0 == 2'h2; // @[lsu_bus_buffer.scala 268:114] + wire _T_1026 = CmdPtr0 == 2'h3; // @[lsu_bus_buffer.scala 268:114] + reg buf_nomerge_0; // @[Reg.scala 27:20] + wire _T_1027 = _T_1023 & buf_nomerge_0; // @[Mux.scala 27:72] + reg buf_nomerge_1; // @[Reg.scala 27:20] + wire _T_1028 = _T_1024 & buf_nomerge_1; // @[Mux.scala 27:72] + reg buf_nomerge_2; // @[Reg.scala 27:20] + wire _T_1029 = _T_1025 & buf_nomerge_2; // @[Mux.scala 27:72] + reg buf_nomerge_3; // @[Reg.scala 27:20] + wire _T_1030 = _T_1026 & buf_nomerge_3; // @[Mux.scala 27:72] + wire _T_1031 = _T_1027 | _T_1028; // @[Mux.scala 27:72] + wire _T_1032 = _T_1031 | _T_1029; // @[Mux.scala 27:72] + wire _T_1033 = _T_1032 | _T_1030; // @[Mux.scala 27:72] + wire _T_1035 = ~_T_1033; // @[lsu_bus_buffer.scala 268:31] + wire _T_1036 = _T_1022 & _T_1035; // @[lsu_bus_buffer.scala 268:29] + reg _T_4325; // @[Reg.scala 27:20] + reg _T_4322; // @[Reg.scala 27:20] + reg _T_4319; // @[Reg.scala 27:20] + reg _T_4316; // @[Reg.scala 27:20] + wire [3:0] buf_sideeffect = {_T_4325,_T_4322,_T_4319,_T_4316}; // @[Cat.scala 29:58] + wire _T_1045 = _T_1023 & buf_sideeffect[0]; // @[Mux.scala 27:72] + wire _T_1046 = _T_1024 & buf_sideeffect[1]; // @[Mux.scala 27:72] + wire _T_1047 = _T_1025 & buf_sideeffect[2]; // @[Mux.scala 27:72] + wire _T_1048 = _T_1026 & buf_sideeffect[3]; // @[Mux.scala 27:72] + wire _T_1049 = _T_1045 | _T_1046; // @[Mux.scala 27:72] + wire _T_1050 = _T_1049 | _T_1047; // @[Mux.scala 27:72] + wire _T_1051 = _T_1050 | _T_1048; // @[Mux.scala 27:72] + wire _T_1053 = ~_T_1051; // @[lsu_bus_buffer.scala 269:5] + wire _T_1054 = _T_1036 & _T_1053; // @[lsu_bus_buffer.scala 268:140] + wire _T_1065 = _T_858 & _T_852; // @[lsu_bus_buffer.scala 271:58] + wire _T_1067 = _T_1065 & _T_1017; // @[lsu_bus_buffer.scala 271:72] + wire [29:0] _T_1077 = _T_1023 ? buf_addr_0[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1078 = _T_1024 ? buf_addr_1[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1081 = _T_1077 | _T_1078; // @[Mux.scala 27:72] + wire [29:0] _T_1079 = _T_1025 ? buf_addr_2[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1082 = _T_1081 | _T_1079; // @[Mux.scala 27:72] + wire [29:0] _T_1080 = _T_1026 ? buf_addr_3[31:2] : 30'h0; // @[Mux.scala 27:72] + wire [29:0] _T_1083 = _T_1082 | _T_1080; // @[Mux.scala 27:72] + wire _T_1085 = io_lsu_addr_m[31:2] != _T_1083; // @[lsu_bus_buffer.scala 271:123] + wire obuf_force_wr_en = _T_1067 & _T_1085; // @[lsu_bus_buffer.scala 271:101] + wire _T_1055 = ~obuf_force_wr_en; // @[lsu_bus_buffer.scala 269:119] + wire obuf_wr_wait = _T_1054 & _T_1055; // @[lsu_bus_buffer.scala 269:117] + wire _T_1056 = |buf_numvld_cmd_any; // @[lsu_bus_buffer.scala 270:75] + wire _T_1057 = obuf_wr_timer < 3'h7; // @[lsu_bus_buffer.scala 270:95] + wire _T_1058 = _T_1056 & _T_1057; // @[lsu_bus_buffer.scala 270:79] + wire [2:0] _T_1060 = obuf_wr_timer + 3'h1; // @[lsu_bus_buffer.scala 270:123] + wire _T_4477 = buf_state_3 == 3'h1; // @[lsu_bus_buffer.scala 535:63] + wire _T_4481 = _T_4477 | _T_4458; // @[lsu_bus_buffer.scala 535:74] + wire _T_4472 = buf_state_2 == 3'h1; // @[lsu_bus_buffer.scala 535:63] + wire _T_4476 = _T_4472 | _T_4455; // @[lsu_bus_buffer.scala 535:74] + wire [1:0] _T_4482 = _T_4481 + _T_4476; // @[lsu_bus_buffer.scala 535:154] + wire _T_4467 = buf_state_1 == 3'h1; // @[lsu_bus_buffer.scala 535:63] + wire _T_4471 = _T_4467 | _T_4452; // @[lsu_bus_buffer.scala 535:74] + wire [1:0] _GEN_384 = {{1'd0}, _T_4471}; // @[lsu_bus_buffer.scala 535:154] + wire [2:0] _T_4483 = _T_4482 + _GEN_384; // @[lsu_bus_buffer.scala 535:154] + wire _T_4462 = buf_state_0 == 3'h1; // @[lsu_bus_buffer.scala 535:63] + wire _T_4466 = _T_4462 | _T_4449; // @[lsu_bus_buffer.scala 535:74] + wire [2:0] _GEN_385 = {{2'd0}, _T_4466}; // @[lsu_bus_buffer.scala 535:154] + wire [3:0] buf_numvld_pend_any = _T_4483 + _GEN_385; // @[lsu_bus_buffer.scala 535:154] + wire _T_1087 = buf_numvld_pend_any == 4'h0; // @[lsu_bus_buffer.scala 273:53] + wire _T_1088 = ibuf_byp & _T_1087; // @[lsu_bus_buffer.scala 273:31] + wire _T_1089 = ~io_lsu_pkt_r_bits_store; // @[lsu_bus_buffer.scala 273:64] + wire _T_1090 = _T_1089 | io_no_dword_merge_r; // @[lsu_bus_buffer.scala 273:89] + wire ibuf_buf_byp = _T_1088 & _T_1090; // @[lsu_bus_buffer.scala 273:61] + wire _T_1091 = ibuf_buf_byp & io_lsu_commit_r; // @[lsu_bus_buffer.scala 289:32] + wire _T_4751 = buf_state_0 == 3'h3; // @[lsu_bus_buffer.scala 563:62] + wire _T_4753 = _T_4751 & buf_sideeffect[0]; // @[lsu_bus_buffer.scala 563:73] + wire _T_4754 = _T_4753 & io_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu_bus_buffer.scala 563:93] + wire _T_4755 = buf_state_1 == 3'h3; // @[lsu_bus_buffer.scala 563:62] + wire _T_4757 = _T_4755 & buf_sideeffect[1]; // @[lsu_bus_buffer.scala 563:73] + wire _T_4758 = _T_4757 & io_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu_bus_buffer.scala 563:93] + wire _T_4767 = _T_4754 | _T_4758; // @[lsu_bus_buffer.scala 563:153] + wire _T_4759 = buf_state_2 == 3'h3; // @[lsu_bus_buffer.scala 563:62] + wire _T_4761 = _T_4759 & buf_sideeffect[2]; // @[lsu_bus_buffer.scala 563:73] + wire _T_4762 = _T_4761 & io_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu_bus_buffer.scala 563:93] + wire _T_4768 = _T_4767 | _T_4762; // @[lsu_bus_buffer.scala 563:153] + wire _T_4763 = buf_state_3 == 3'h3; // @[lsu_bus_buffer.scala 563:62] + wire _T_4765 = _T_4763 & buf_sideeffect[3]; // @[lsu_bus_buffer.scala 563:73] + wire _T_4766 = _T_4765 & io_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu_bus_buffer.scala 563:93] + wire _T_4769 = _T_4768 | _T_4766; // @[lsu_bus_buffer.scala 563:153] + reg obuf_sideeffect; // @[Reg.scala 27:20] + wire _T_4770 = obuf_valid & obuf_sideeffect; // @[lsu_bus_buffer.scala 563:171] + wire _T_4771 = _T_4770 & io_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu_bus_buffer.scala 563:189] + wire bus_sideeffect_pend = _T_4769 | _T_4771; // @[lsu_bus_buffer.scala 563:157] + wire _T_1092 = io_is_sideeffects_r & bus_sideeffect_pend; // @[lsu_bus_buffer.scala 289:74] + wire _T_1093 = ~_T_1092; // @[lsu_bus_buffer.scala 289:52] + wire _T_1094 = _T_1091 & _T_1093; // @[lsu_bus_buffer.scala 289:50] + wire [2:0] _T_1099 = _T_1023 ? buf_state_0 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1100 = _T_1024 ? buf_state_1 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1103 = _T_1099 | _T_1100; // @[Mux.scala 27:72] + wire [2:0] _T_1101 = _T_1025 ? buf_state_2 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1104 = _T_1103 | _T_1101; // @[Mux.scala 27:72] + wire [2:0] _T_1102 = _T_1026 ? buf_state_3 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1105 = _T_1104 | _T_1102; // @[Mux.scala 27:72] + wire _T_1107 = _T_1105 == 3'h2; // @[lsu_bus_buffer.scala 290:36] + wire found_cmdptr0 = |CmdPtr0Dec; // @[lsu_bus_buffer.scala 388:31] + wire _T_1108 = _T_1107 & found_cmdptr0; // @[lsu_bus_buffer.scala 290:47] + wire [3:0] _T_1111 = {buf_cmd_state_bus_en_3,buf_cmd_state_bus_en_2,buf_cmd_state_bus_en_1,buf_cmd_state_bus_en_0}; // @[Cat.scala 29:58] + wire _T_1120 = _T_1023 & _T_1111[0]; // @[Mux.scala 27:72] + wire _T_1121 = _T_1024 & _T_1111[1]; // @[Mux.scala 27:72] + wire _T_1124 = _T_1120 | _T_1121; // @[Mux.scala 27:72] + wire _T_1122 = _T_1025 & _T_1111[2]; // @[Mux.scala 27:72] + wire _T_1125 = _T_1124 | _T_1122; // @[Mux.scala 27:72] + wire _T_1123 = _T_1026 & _T_1111[3]; // @[Mux.scala 27:72] + wire _T_1126 = _T_1125 | _T_1123; // @[Mux.scala 27:72] + wire _T_1128 = ~_T_1126; // @[lsu_bus_buffer.scala 291:23] + wire _T_1129 = _T_1108 & _T_1128; // @[lsu_bus_buffer.scala 291:21] + wire _T_1146 = _T_1051 & bus_sideeffect_pend; // @[lsu_bus_buffer.scala 291:141] + wire _T_1147 = ~_T_1146; // @[lsu_bus_buffer.scala 291:105] + wire _T_1148 = _T_1129 & _T_1147; // @[lsu_bus_buffer.scala 291:103] + reg buf_dual_3; // @[Reg.scala 27:20] + reg buf_dual_2; // @[Reg.scala 27:20] + reg buf_dual_1; // @[Reg.scala 27:20] + reg buf_dual_0; // @[Reg.scala 27:20] + wire [3:0] _T_1151 = {buf_dual_3,buf_dual_2,buf_dual_1,buf_dual_0}; // @[Cat.scala 29:58] + wire _T_1160 = _T_1023 & _T_1151[0]; // @[Mux.scala 27:72] + wire _T_1161 = _T_1024 & _T_1151[1]; // @[Mux.scala 27:72] + wire _T_1164 = _T_1160 | _T_1161; // @[Mux.scala 27:72] + wire _T_1162 = _T_1025 & _T_1151[2]; // @[Mux.scala 27:72] + wire _T_1165 = _T_1164 | _T_1162; // @[Mux.scala 27:72] + wire _T_1163 = _T_1026 & _T_1151[3]; // @[Mux.scala 27:72] + wire _T_1166 = _T_1165 | _T_1163; // @[Mux.scala 27:72] + reg buf_samedw_3; // @[Reg.scala 27:20] + reg buf_samedw_2; // @[Reg.scala 27:20] + reg buf_samedw_1; // @[Reg.scala 27:20] + reg buf_samedw_0; // @[Reg.scala 27:20] + wire [3:0] _T_1170 = {buf_samedw_3,buf_samedw_2,buf_samedw_1,buf_samedw_0}; // @[Cat.scala 29:58] + wire _T_1179 = _T_1023 & _T_1170[0]; // @[Mux.scala 27:72] + wire _T_1180 = _T_1024 & _T_1170[1]; // @[Mux.scala 27:72] + wire _T_1183 = _T_1179 | _T_1180; // @[Mux.scala 27:72] + wire _T_1181 = _T_1025 & _T_1170[2]; // @[Mux.scala 27:72] + wire _T_1184 = _T_1183 | _T_1181; // @[Mux.scala 27:72] + wire _T_1182 = _T_1026 & _T_1170[3]; // @[Mux.scala 27:72] + wire _T_1185 = _T_1184 | _T_1182; // @[Mux.scala 27:72] + wire _T_1187 = _T_1166 & _T_1185; // @[lsu_bus_buffer.scala 292:77] + wire _T_1196 = _T_1023 & buf_write[0]; // @[Mux.scala 27:72] + wire _T_1197 = _T_1024 & buf_write[1]; // @[Mux.scala 27:72] + wire _T_1200 = _T_1196 | _T_1197; // @[Mux.scala 27:72] + wire _T_1198 = _T_1025 & buf_write[2]; // @[Mux.scala 27:72] + wire _T_1201 = _T_1200 | _T_1198; // @[Mux.scala 27:72] + wire _T_1199 = _T_1026 & buf_write[3]; // @[Mux.scala 27:72] + wire _T_1202 = _T_1201 | _T_1199; // @[Mux.scala 27:72] + wire _T_1204 = ~_T_1202; // @[lsu_bus_buffer.scala 292:150] + wire _T_1205 = _T_1187 & _T_1204; // @[lsu_bus_buffer.scala 292:148] + wire _T_1206 = ~_T_1205; // @[lsu_bus_buffer.scala 292:8] + wire [3:0] _T_1959 = ~CmdPtr0Dec; // @[lsu_bus_buffer.scala 384:62] + wire [3:0] _T_1960 = buf_age_3 & _T_1959; // @[lsu_bus_buffer.scala 384:59] + wire _T_1961 = |_T_1960; // @[lsu_bus_buffer.scala 384:76] + wire _T_1962 = ~_T_1961; // @[lsu_bus_buffer.scala 384:45] + wire _T_1964 = ~CmdPtr0Dec[3]; // @[lsu_bus_buffer.scala 384:83] + wire _T_1965 = _T_1962 & _T_1964; // @[lsu_bus_buffer.scala 384:81] + wire _T_1967 = _T_1965 & _T_2590; // @[lsu_bus_buffer.scala 384:98] + wire _T_1969 = _T_1967 & _T_4442; // @[lsu_bus_buffer.scala 384:123] + wire [3:0] _T_1949 = buf_age_2 & _T_1959; // @[lsu_bus_buffer.scala 384:59] + wire _T_1950 = |_T_1949; // @[lsu_bus_buffer.scala 384:76] + wire _T_1951 = ~_T_1950; // @[lsu_bus_buffer.scala 384:45] + wire _T_1953 = ~CmdPtr0Dec[2]; // @[lsu_bus_buffer.scala 384:83] + wire _T_1954 = _T_1951 & _T_1953; // @[lsu_bus_buffer.scala 384:81] + wire _T_1956 = _T_1954 & _T_2583; // @[lsu_bus_buffer.scala 384:98] + wire _T_1958 = _T_1956 & _T_4437; // @[lsu_bus_buffer.scala 384:123] + wire [3:0] _T_1938 = buf_age_1 & _T_1959; // @[lsu_bus_buffer.scala 384:59] + wire _T_1939 = |_T_1938; // @[lsu_bus_buffer.scala 384:76] + wire _T_1940 = ~_T_1939; // @[lsu_bus_buffer.scala 384:45] + wire _T_1942 = ~CmdPtr0Dec[1]; // @[lsu_bus_buffer.scala 384:83] + wire _T_1943 = _T_1940 & _T_1942; // @[lsu_bus_buffer.scala 384:81] + wire _T_1945 = _T_1943 & _T_2576; // @[lsu_bus_buffer.scala 384:98] + wire _T_1947 = _T_1945 & _T_4432; // @[lsu_bus_buffer.scala 384:123] + wire [3:0] _T_1927 = buf_age_0 & _T_1959; // @[lsu_bus_buffer.scala 384:59] + wire _T_1928 = |_T_1927; // @[lsu_bus_buffer.scala 384:76] + wire _T_1929 = ~_T_1928; // @[lsu_bus_buffer.scala 384:45] + wire _T_1931 = ~CmdPtr0Dec[0]; // @[lsu_bus_buffer.scala 384:83] + wire _T_1932 = _T_1929 & _T_1931; // @[lsu_bus_buffer.scala 384:81] + wire _T_1934 = _T_1932 & _T_2569; // @[lsu_bus_buffer.scala 384:98] + wire _T_1936 = _T_1934 & _T_4427; // @[lsu_bus_buffer.scala 384:123] + wire [3:0] CmdPtr1Dec = {_T_1969,_T_1958,_T_1947,_T_1936}; // @[Cat.scala 29:58] + wire found_cmdptr1 = |CmdPtr1Dec; // @[lsu_bus_buffer.scala 389:31] + wire _T_1207 = _T_1206 | found_cmdptr1; // @[lsu_bus_buffer.scala 292:181] + wire [3:0] _T_1210 = {buf_nomerge_3,buf_nomerge_2,buf_nomerge_1,buf_nomerge_0}; // @[Cat.scala 29:58] + wire _T_1219 = _T_1023 & _T_1210[0]; // @[Mux.scala 27:72] + wire _T_1220 = _T_1024 & _T_1210[1]; // @[Mux.scala 27:72] + wire _T_1223 = _T_1219 | _T_1220; // @[Mux.scala 27:72] + wire _T_1221 = _T_1025 & _T_1210[2]; // @[Mux.scala 27:72] + wire _T_1224 = _T_1223 | _T_1221; // @[Mux.scala 27:72] + wire _T_1222 = _T_1026 & _T_1210[3]; // @[Mux.scala 27:72] + wire _T_1225 = _T_1224 | _T_1222; // @[Mux.scala 27:72] + wire _T_1227 = _T_1207 | _T_1225; // @[lsu_bus_buffer.scala 292:197] + wire _T_1228 = _T_1227 | obuf_force_wr_en; // @[lsu_bus_buffer.scala 292:269] + wire _T_1229 = _T_1148 & _T_1228; // @[lsu_bus_buffer.scala 291:164] + wire _T_1230 = _T_1094 | _T_1229; // @[lsu_bus_buffer.scala 289:98] + reg obuf_write; // @[Reg.scala 27:20] + reg obuf_cmd_done; // @[Reg.scala 27:20] + reg obuf_data_done; // @[Reg.scala 27:20] + wire _T_4825 = obuf_cmd_done | obuf_data_done; // @[lsu_bus_buffer.scala 567:54] + wire _T_4826 = obuf_cmd_done ? io_lsu_axi_w_ready : io_lsu_axi_aw_ready; // @[lsu_bus_buffer.scala 567:75] + wire _T_4827 = io_lsu_axi_aw_ready & io_lsu_axi_w_ready; // @[lsu_bus_buffer.scala 567:153] + wire _T_4828 = _T_4825 ? _T_4826 : _T_4827; // @[lsu_bus_buffer.scala 567:39] + wire bus_cmd_ready = obuf_write ? _T_4828 : io_lsu_axi_ar_ready; // @[lsu_bus_buffer.scala 567:23] + wire _T_1231 = ~obuf_valid; // @[lsu_bus_buffer.scala 293:48] + wire _T_1232 = bus_cmd_ready | _T_1231; // @[lsu_bus_buffer.scala 293:46] + reg obuf_nosend; // @[Reg.scala 27:20] + wire _T_1233 = _T_1232 | obuf_nosend; // @[lsu_bus_buffer.scala 293:60] + wire _T_1234 = _T_1230 & _T_1233; // @[lsu_bus_buffer.scala 293:29] + wire _T_1235 = ~obuf_wr_wait; // @[lsu_bus_buffer.scala 293:77] + wire _T_1236 = _T_1234 & _T_1235; // @[lsu_bus_buffer.scala 293:75] + reg [31:0] obuf_addr; // @[Reg.scala 27:20] + wire _T_4776 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[lsu_bus_buffer.scala 565:37] + wire _T_4777 = obuf_valid & _T_4776; // @[lsu_bus_buffer.scala 565:19] + wire _T_4779 = obuf_tag1 == 2'h0; // @[lsu_bus_buffer.scala 565:107] + wire _T_4780 = obuf_merge & _T_4779; // @[lsu_bus_buffer.scala 565:95] + wire _T_4781 = _T_3565 | _T_4780; // @[lsu_bus_buffer.scala 565:81] + wire _T_4782 = ~_T_4781; // @[lsu_bus_buffer.scala 565:61] + wire _T_4783 = _T_4777 & _T_4782; // @[lsu_bus_buffer.scala 565:59] + wire _T_4817 = _T_4751 & _T_4783; // @[Mux.scala 27:72] + wire _T_4787 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[lsu_bus_buffer.scala 565:37] + wire _T_4788 = obuf_valid & _T_4787; // @[lsu_bus_buffer.scala 565:19] + wire _T_4790 = obuf_tag1 == 2'h1; // @[lsu_bus_buffer.scala 565:107] + wire _T_4791 = obuf_merge & _T_4790; // @[lsu_bus_buffer.scala 565:95] + wire _T_4792 = _T_3756 | _T_4791; // @[lsu_bus_buffer.scala 565:81] + wire _T_4793 = ~_T_4792; // @[lsu_bus_buffer.scala 565:61] + wire _T_4794 = _T_4788 & _T_4793; // @[lsu_bus_buffer.scala 565:59] + wire _T_4818 = _T_4755 & _T_4794; // @[Mux.scala 27:72] + wire _T_4821 = _T_4817 | _T_4818; // @[Mux.scala 27:72] + wire _T_4798 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[lsu_bus_buffer.scala 565:37] + wire _T_4799 = obuf_valid & _T_4798; // @[lsu_bus_buffer.scala 565:19] + wire _T_4801 = obuf_tag1 == 2'h2; // @[lsu_bus_buffer.scala 565:107] + wire _T_4802 = obuf_merge & _T_4801; // @[lsu_bus_buffer.scala 565:95] + wire _T_4803 = _T_3947 | _T_4802; // @[lsu_bus_buffer.scala 565:81] + wire _T_4804 = ~_T_4803; // @[lsu_bus_buffer.scala 565:61] + wire _T_4805 = _T_4799 & _T_4804; // @[lsu_bus_buffer.scala 565:59] + wire _T_4819 = _T_4759 & _T_4805; // @[Mux.scala 27:72] + wire _T_4822 = _T_4821 | _T_4819; // @[Mux.scala 27:72] + wire _T_4809 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[lsu_bus_buffer.scala 565:37] + wire _T_4810 = obuf_valid & _T_4809; // @[lsu_bus_buffer.scala 565:19] + wire _T_4812 = obuf_tag1 == 2'h3; // @[lsu_bus_buffer.scala 565:107] + wire _T_4813 = obuf_merge & _T_4812; // @[lsu_bus_buffer.scala 565:95] + wire _T_4814 = _T_4138 | _T_4813; // @[lsu_bus_buffer.scala 565:81] + wire _T_4815 = ~_T_4814; // @[lsu_bus_buffer.scala 565:61] + wire _T_4816 = _T_4810 & _T_4815; // @[lsu_bus_buffer.scala 565:59] + wire _T_4820 = _T_4763 & _T_4816; // @[Mux.scala 27:72] + wire bus_addr_match_pending = _T_4822 | _T_4820; // @[Mux.scala 27:72] + wire _T_1237 = ~bus_addr_match_pending; // @[lsu_bus_buffer.scala 293:94] + wire _T_1238 = _T_1236 & _T_1237; // @[lsu_bus_buffer.scala 293:92] + wire obuf_wr_en = _T_1238 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 293:118] + wire _T_1240 = obuf_valid & obuf_nosend; // @[lsu_bus_buffer.scala 296:47] + wire bus_wcmd_sent = io_lsu_axi_aw_valid & io_lsu_axi_aw_ready; // @[lsu_bus_buffer.scala 568:40] + wire _T_4832 = obuf_cmd_done | bus_wcmd_sent; // @[lsu_bus_buffer.scala 570:35] + wire bus_wdata_sent = io_lsu_axi_w_valid & io_lsu_axi_w_ready; // @[lsu_bus_buffer.scala 569:40] + wire _T_4833 = obuf_data_done | bus_wdata_sent; // @[lsu_bus_buffer.scala 570:70] + wire _T_4834 = _T_4832 & _T_4833; // @[lsu_bus_buffer.scala 570:52] + wire _T_4835 = io_lsu_axi_ar_valid & io_lsu_axi_ar_ready; // @[lsu_bus_buffer.scala 570:112] + wire bus_cmd_sent = _T_4834 | _T_4835; // @[lsu_bus_buffer.scala 570:89] + wire _T_1241 = bus_cmd_sent | _T_1240; // @[lsu_bus_buffer.scala 296:33] + wire _T_1242 = ~obuf_wr_en; // @[lsu_bus_buffer.scala 296:65] + wire _T_1243 = _T_1241 & _T_1242; // @[lsu_bus_buffer.scala 296:63] + wire _T_1244 = _T_1243 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 296:77] + wire obuf_rst = _T_1244 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 296:98] + wire obuf_write_in = ibuf_buf_byp ? io_lsu_pkt_r_bits_store : _T_1202; // @[lsu_bus_buffer.scala 297:26] + wire [31:0] _T_1281 = _T_1023 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1282 = _T_1024 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1283 = _T_1025 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1284 = _T_1026 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1285 = _T_1281 | _T_1282; // @[Mux.scala 27:72] + wire [31:0] _T_1286 = _T_1285 | _T_1283; // @[Mux.scala 27:72] + wire [31:0] _T_1287 = _T_1286 | _T_1284; // @[Mux.scala 27:72] + wire [31:0] obuf_addr_in = ibuf_buf_byp ? io_lsu_addr_r : _T_1287; // @[lsu_bus_buffer.scala 299:25] + reg [1:0] buf_sz_0; // @[Reg.scala 27:20] + wire [1:0] _T_1294 = _T_1023 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] + reg [1:0] buf_sz_1; // @[Reg.scala 27:20] + wire [1:0] _T_1295 = _T_1024 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] + reg [1:0] buf_sz_2; // @[Reg.scala 27:20] + wire [1:0] _T_1296 = _T_1025 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] + reg [1:0] buf_sz_3; // @[Reg.scala 27:20] + wire [1:0] _T_1297 = _T_1026 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_1298 = _T_1294 | _T_1295; // @[Mux.scala 27:72] + wire [1:0] _T_1299 = _T_1298 | _T_1296; // @[Mux.scala 27:72] + wire [1:0] _T_1300 = _T_1299 | _T_1297; // @[Mux.scala 27:72] + wire [1:0] obuf_sz_in = ibuf_buf_byp ? ibuf_sz_in : _T_1300; // @[lsu_bus_buffer.scala 302:23] + wire [7:0] _T_2018 = {4'h0,_T_1969,_T_1958,_T_1947,_T_1936}; // @[Cat.scala 29:58] + wire _T_2021 = _T_2018[4] | _T_2018[5]; // @[lsu_bus_buffer.scala 391:42] + wire _T_2023 = _T_2021 | _T_2018[6]; // @[lsu_bus_buffer.scala 391:48] + wire _T_2025 = _T_2023 | _T_2018[7]; // @[lsu_bus_buffer.scala 391:54] + wire _T_2028 = _T_2018[2] | _T_2018[3]; // @[lsu_bus_buffer.scala 391:67] + wire _T_2030 = _T_2028 | _T_2018[6]; // @[lsu_bus_buffer.scala 391:73] + wire _T_2032 = _T_2030 | _T_2018[7]; // @[lsu_bus_buffer.scala 391:79] + wire _T_2035 = _T_2018[1] | _T_2018[3]; // @[lsu_bus_buffer.scala 391:92] + wire _T_2037 = _T_2035 | _T_2018[5]; // @[lsu_bus_buffer.scala 391:98] + wire _T_2039 = _T_2037 | _T_2018[7]; // @[lsu_bus_buffer.scala 391:104] + wire [2:0] _T_2041 = {_T_2025,_T_2032,_T_2039}; // @[Cat.scala 29:58] + wire [1:0] CmdPtr1 = _T_2041[1:0]; // @[lsu_bus_buffer.scala 398:11] + wire _T_1302 = obuf_wr_en | obuf_rst; // @[lsu_bus_buffer.scala 310:39] + wire _T_1303 = ~_T_1302; // @[lsu_bus_buffer.scala 310:26] + wire obuf_cmd_done_in = _T_1303 & _T_4832; // @[lsu_bus_buffer.scala 310:51] + wire obuf_data_done_in = _T_1303 & _T_4833; // @[lsu_bus_buffer.scala 313:52] + wire _T_1309 = obuf_sz_in == 2'h0; // @[lsu_bus_buffer.scala 314:72] + wire _T_1312 = ~obuf_addr_in[0]; // @[lsu_bus_buffer.scala 314:98] + wire _T_1313 = obuf_sz_in[0] & _T_1312; // @[lsu_bus_buffer.scala 314:96] + wire _T_1314 = _T_1309 | _T_1313; // @[lsu_bus_buffer.scala 314:79] + wire _T_1317 = |obuf_addr_in[1:0]; // @[lsu_bus_buffer.scala 314:153] + wire _T_1318 = ~_T_1317; // @[lsu_bus_buffer.scala 314:134] + wire _T_1319 = obuf_sz_in[1] & _T_1318; // @[lsu_bus_buffer.scala 314:132] + wire _T_1320 = _T_1314 | _T_1319; // @[lsu_bus_buffer.scala 314:116] + wire obuf_aligned_in = ibuf_buf_byp ? is_aligned_r : _T_1320; // @[lsu_bus_buffer.scala 314:28] + wire _T_1337 = obuf_addr_in[31:3] == obuf_addr[31:3]; // @[lsu_bus_buffer.scala 328:40] + wire _T_1338 = _T_1337 & obuf_aligned_in; // @[lsu_bus_buffer.scala 328:60] + wire _T_1339 = ~obuf_sideeffect; // @[lsu_bus_buffer.scala 328:80] + wire _T_1340 = _T_1338 & _T_1339; // @[lsu_bus_buffer.scala 328:78] + wire _T_1341 = ~obuf_write; // @[lsu_bus_buffer.scala 328:99] + wire _T_1342 = _T_1340 & _T_1341; // @[lsu_bus_buffer.scala 328:97] + wire _T_1343 = ~obuf_write_in; // @[lsu_bus_buffer.scala 328:113] + wire _T_1344 = _T_1342 & _T_1343; // @[lsu_bus_buffer.scala 328:111] + wire _T_1345 = ~io_tlu_busbuff_dec_tlu_external_ldfwd_disable; // @[lsu_bus_buffer.scala 328:130] + wire _T_1346 = _T_1344 & _T_1345; // @[lsu_bus_buffer.scala 328:128] + wire _T_1347 = ~obuf_nosend; // @[lsu_bus_buffer.scala 329:20] + wire _T_1348 = obuf_valid & _T_1347; // @[lsu_bus_buffer.scala 329:18] + reg obuf_rdrsp_pend; // @[Reg.scala 27:20] + wire bus_rsp_read = io_lsu_axi_r_valid & io_lsu_axi_r_ready; // @[lsu_bus_buffer.scala 571:38] + reg [2:0] obuf_rdrsp_tag; // @[Reg.scala 27:20] + wire _T_1349 = io_lsu_axi_r_bits_id == obuf_rdrsp_tag; // @[lsu_bus_buffer.scala 329:90] + wire _T_1350 = bus_rsp_read & _T_1349; // @[lsu_bus_buffer.scala 329:70] + wire _T_1351 = ~_T_1350; // @[lsu_bus_buffer.scala 329:55] + wire _T_1352 = obuf_rdrsp_pend & _T_1351; // @[lsu_bus_buffer.scala 329:53] + wire _T_1353 = _T_1348 | _T_1352; // @[lsu_bus_buffer.scala 329:34] + wire obuf_nosend_in = _T_1346 & _T_1353; // @[lsu_bus_buffer.scala 328:177] + wire _T_1321 = ~obuf_nosend_in; // @[lsu_bus_buffer.scala 322:45] + wire _T_1322 = obuf_wr_en & _T_1321; // @[lsu_bus_buffer.scala 322:43] + wire _T_1323 = ~_T_1322; // @[lsu_bus_buffer.scala 322:30] + wire _T_1324 = _T_1323 & obuf_rdrsp_pend; // @[lsu_bus_buffer.scala 322:62] + wire _T_1328 = _T_1324 & _T_1351; // @[lsu_bus_buffer.scala 322:80] + wire _T_1330 = bus_cmd_sent & _T_1341; // @[lsu_bus_buffer.scala 322:155] + wire _T_1331 = _T_1328 | _T_1330; // @[lsu_bus_buffer.scala 322:139] + wire obuf_rdrsp_pend_in = _T_1331 & _T_2594; // @[lsu_bus_buffer.scala 322:171] + wire obuf_rdrsp_pend_en = io_lsu_bus_clk_en | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 323:47] + wire [7:0] _T_1356 = {ldst_byteen_lo_r,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1357 = {4'h0,ldst_byteen_lo_r}; // @[Cat.scala 29:58] + wire [7:0] _T_1358 = io_lsu_addr_r[2] ? _T_1356 : _T_1357; // @[lsu_bus_buffer.scala 330:46] + wire [3:0] _T_1377 = _T_1023 ? buf_byteen_0 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1378 = _T_1024 ? buf_byteen_1 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1379 = _T_1025 ? buf_byteen_2 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1380 = _T_1026 ? buf_byteen_3 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1381 = _T_1377 | _T_1378; // @[Mux.scala 27:72] + wire [3:0] _T_1382 = _T_1381 | _T_1379; // @[Mux.scala 27:72] + wire [3:0] _T_1383 = _T_1382 | _T_1380; // @[Mux.scala 27:72] + wire [7:0] _T_1385 = {_T_1383,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1398 = {4'h0,_T_1383}; // @[Cat.scala 29:58] + wire [7:0] _T_1399 = _T_1287[2] ? _T_1385 : _T_1398; // @[lsu_bus_buffer.scala 331:8] + wire [7:0] obuf_byteen0_in = ibuf_buf_byp ? _T_1358 : _T_1399; // @[lsu_bus_buffer.scala 330:28] + wire [7:0] _T_1401 = {ldst_byteen_hi_r,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1402 = {4'h0,ldst_byteen_hi_r}; // @[Cat.scala 29:58] + wire [7:0] _T_1403 = io_end_addr_r[2] ? _T_1401 : _T_1402; // @[lsu_bus_buffer.scala 332:46] + wire _T_1404 = CmdPtr1 == 2'h0; // @[lsu_bus_buffer.scala 62:123] + wire _T_1405 = CmdPtr1 == 2'h1; // @[lsu_bus_buffer.scala 62:123] + wire _T_1406 = CmdPtr1 == 2'h2; // @[lsu_bus_buffer.scala 62:123] + wire _T_1407 = CmdPtr1 == 2'h3; // @[lsu_bus_buffer.scala 62:123] + wire [31:0] _T_1408 = _T_1404 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1409 = _T_1405 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1410 = _T_1406 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1411 = _T_1407 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1412 = _T_1408 | _T_1409; // @[Mux.scala 27:72] + wire [31:0] _T_1413 = _T_1412 | _T_1410; // @[Mux.scala 27:72] + wire [31:0] _T_1414 = _T_1413 | _T_1411; // @[Mux.scala 27:72] + wire [3:0] _T_1422 = _T_1404 ? buf_byteen_0 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1423 = _T_1405 ? buf_byteen_1 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1424 = _T_1406 ? buf_byteen_2 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1425 = _T_1407 ? buf_byteen_3 : 4'h0; // @[Mux.scala 27:72] + wire [3:0] _T_1426 = _T_1422 | _T_1423; // @[Mux.scala 27:72] + wire [3:0] _T_1427 = _T_1426 | _T_1424; // @[Mux.scala 27:72] + wire [3:0] _T_1428 = _T_1427 | _T_1425; // @[Mux.scala 27:72] + wire [7:0] _T_1430 = {_T_1428,4'h0}; // @[Cat.scala 29:58] + wire [7:0] _T_1443 = {4'h0,_T_1428}; // @[Cat.scala 29:58] + wire [7:0] _T_1444 = _T_1414[2] ? _T_1430 : _T_1443; // @[lsu_bus_buffer.scala 333:8] + wire [7:0] obuf_byteen1_in = ibuf_buf_byp ? _T_1403 : _T_1444; // @[lsu_bus_buffer.scala 332:28] + wire [63:0] _T_1446 = {store_data_lo_r,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1447 = {32'h0,store_data_lo_r}; // @[Cat.scala 29:58] + wire [63:0] _T_1448 = io_lsu_addr_r[2] ? _T_1446 : _T_1447; // @[lsu_bus_buffer.scala 335:44] + wire [31:0] _T_1467 = _T_1023 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1468 = _T_1024 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1469 = _T_1025 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1470 = _T_1026 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1471 = _T_1467 | _T_1468; // @[Mux.scala 27:72] + wire [31:0] _T_1472 = _T_1471 | _T_1469; // @[Mux.scala 27:72] + wire [31:0] _T_1473 = _T_1472 | _T_1470; // @[Mux.scala 27:72] + wire [63:0] _T_1475 = {_T_1473,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1488 = {32'h0,_T_1473}; // @[Cat.scala 29:58] + wire [63:0] _T_1489 = _T_1287[2] ? _T_1475 : _T_1488; // @[lsu_bus_buffer.scala 336:8] + wire [63:0] obuf_data0_in = ibuf_buf_byp ? _T_1448 : _T_1489; // @[lsu_bus_buffer.scala 335:26] + wire [63:0] _T_1491 = {store_data_hi_r,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1492 = {32'h0,store_data_hi_r}; // @[Cat.scala 29:58] + wire [63:0] _T_1493 = io_end_addr_r[2] ? _T_1491 : _T_1492; // @[lsu_bus_buffer.scala 337:44] + wire [31:0] _T_1512 = _T_1404 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1513 = _T_1405 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1514 = _T_1406 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1515 = _T_1407 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_1516 = _T_1512 | _T_1513; // @[Mux.scala 27:72] + wire [31:0] _T_1517 = _T_1516 | _T_1514; // @[Mux.scala 27:72] + wire [31:0] _T_1518 = _T_1517 | _T_1515; // @[Mux.scala 27:72] + wire [63:0] _T_1520 = {_T_1518,32'h0}; // @[Cat.scala 29:58] + wire [63:0] _T_1533 = {32'h0,_T_1518}; // @[Cat.scala 29:58] + wire [63:0] _T_1534 = _T_1414[2] ? _T_1520 : _T_1533; // @[lsu_bus_buffer.scala 338:8] + wire [63:0] obuf_data1_in = ibuf_buf_byp ? _T_1493 : _T_1534; // @[lsu_bus_buffer.scala 337:26] + wire _T_1619 = CmdPtr0 != CmdPtr1; // @[lsu_bus_buffer.scala 344:30] + wire _T_1620 = _T_1619 & found_cmdptr0; // @[lsu_bus_buffer.scala 344:43] + wire _T_1621 = _T_1620 & found_cmdptr1; // @[lsu_bus_buffer.scala 344:59] + wire _T_1635 = _T_1621 & _T_1107; // @[lsu_bus_buffer.scala 344:75] + wire [2:0] _T_1640 = _T_1404 ? buf_state_0 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1641 = _T_1405 ? buf_state_1 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1644 = _T_1640 | _T_1641; // @[Mux.scala 27:72] + wire [2:0] _T_1642 = _T_1406 ? buf_state_2 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1645 = _T_1644 | _T_1642; // @[Mux.scala 27:72] + wire [2:0] _T_1643 = _T_1407 ? buf_state_3 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_1646 = _T_1645 | _T_1643; // @[Mux.scala 27:72] + wire _T_1648 = _T_1646 == 3'h2; // @[lsu_bus_buffer.scala 344:150] + wire _T_1649 = _T_1635 & _T_1648; // @[lsu_bus_buffer.scala 344:118] + wire _T_1670 = _T_1649 & _T_1128; // @[lsu_bus_buffer.scala 344:161] + wire _T_1688 = _T_1670 & _T_1053; // @[lsu_bus_buffer.scala 345:85] + wire _T_1725 = _T_1204 & _T_1166; // @[lsu_bus_buffer.scala 346:36] + reg buf_dualhi_3; // @[Reg.scala 27:20] + reg buf_dualhi_2; // @[Reg.scala 27:20] + reg buf_dualhi_1; // @[Reg.scala 27:20] + reg buf_dualhi_0; // @[Reg.scala 27:20] + wire [3:0] _T_1728 = {buf_dualhi_3,buf_dualhi_2,buf_dualhi_1,buf_dualhi_0}; // @[Cat.scala 29:58] + wire _T_1737 = _T_1023 & _T_1728[0]; // @[Mux.scala 27:72] + wire _T_1738 = _T_1024 & _T_1728[1]; // @[Mux.scala 27:72] + wire _T_1741 = _T_1737 | _T_1738; // @[Mux.scala 27:72] + wire _T_1739 = _T_1025 & _T_1728[2]; // @[Mux.scala 27:72] + wire _T_1742 = _T_1741 | _T_1739; // @[Mux.scala 27:72] + wire _T_1740 = _T_1026 & _T_1728[3]; // @[Mux.scala 27:72] + wire _T_1743 = _T_1742 | _T_1740; // @[Mux.scala 27:72] + wire _T_1745 = ~_T_1743; // @[lsu_bus_buffer.scala 346:107] + wire _T_1746 = _T_1725 & _T_1745; // @[lsu_bus_buffer.scala 346:105] + wire _T_1766 = _T_1746 & _T_1185; // @[lsu_bus_buffer.scala 346:177] + wire _T_1767 = _T_1688 & _T_1766; // @[lsu_bus_buffer.scala 345:122] + wire _T_1768 = ibuf_buf_byp & ldst_samedw_r; // @[lsu_bus_buffer.scala 347:19] + wire _T_1769 = _T_1768 & io_ldst_dual_r; // @[lsu_bus_buffer.scala 347:35] + wire obuf_merge_en = _T_1767 | _T_1769; // @[lsu_bus_buffer.scala 346:250] + wire _T_1537 = obuf_merge_en & obuf_byteen1_in[0]; // @[lsu_bus_buffer.scala 339:80] + wire _T_1538 = obuf_byteen0_in[0] | _T_1537; // @[lsu_bus_buffer.scala 339:63] + wire _T_1541 = obuf_merge_en & obuf_byteen1_in[1]; // @[lsu_bus_buffer.scala 339:80] + wire _T_1542 = obuf_byteen0_in[1] | _T_1541; // @[lsu_bus_buffer.scala 339:63] + wire _T_1545 = obuf_merge_en & obuf_byteen1_in[2]; // @[lsu_bus_buffer.scala 339:80] + wire _T_1546 = obuf_byteen0_in[2] | _T_1545; // @[lsu_bus_buffer.scala 339:63] + wire _T_1549 = obuf_merge_en & obuf_byteen1_in[3]; // @[lsu_bus_buffer.scala 339:80] + wire _T_1550 = obuf_byteen0_in[3] | _T_1549; // @[lsu_bus_buffer.scala 339:63] + wire _T_1553 = obuf_merge_en & obuf_byteen1_in[4]; // @[lsu_bus_buffer.scala 339:80] + wire _T_1554 = obuf_byteen0_in[4] | _T_1553; // @[lsu_bus_buffer.scala 339:63] + wire _T_1557 = obuf_merge_en & obuf_byteen1_in[5]; // @[lsu_bus_buffer.scala 339:80] + wire _T_1558 = obuf_byteen0_in[5] | _T_1557; // @[lsu_bus_buffer.scala 339:63] + wire _T_1561 = obuf_merge_en & obuf_byteen1_in[6]; // @[lsu_bus_buffer.scala 339:80] + wire _T_1562 = obuf_byteen0_in[6] | _T_1561; // @[lsu_bus_buffer.scala 339:63] + wire _T_1565 = obuf_merge_en & obuf_byteen1_in[7]; // @[lsu_bus_buffer.scala 339:80] + wire _T_1566 = obuf_byteen0_in[7] | _T_1565; // @[lsu_bus_buffer.scala 339:63] + wire [7:0] obuf_byteen_in = {_T_1566,_T_1562,_T_1558,_T_1554,_T_1550,_T_1546,_T_1542,_T_1538}; // @[Cat.scala 29:58] + wire [7:0] _T_1577 = _T_1537 ? obuf_data1_in[7:0] : obuf_data0_in[7:0]; // @[lsu_bus_buffer.scala 340:44] + wire [7:0] _T_1582 = _T_1541 ? obuf_data1_in[15:8] : obuf_data0_in[15:8]; // @[lsu_bus_buffer.scala 340:44] + wire [7:0] _T_1587 = _T_1545 ? obuf_data1_in[23:16] : obuf_data0_in[23:16]; // @[lsu_bus_buffer.scala 340:44] + wire [7:0] _T_1592 = _T_1549 ? obuf_data1_in[31:24] : obuf_data0_in[31:24]; // @[lsu_bus_buffer.scala 340:44] + wire [7:0] _T_1597 = _T_1553 ? obuf_data1_in[39:32] : obuf_data0_in[39:32]; // @[lsu_bus_buffer.scala 340:44] + wire [7:0] _T_1602 = _T_1557 ? obuf_data1_in[47:40] : obuf_data0_in[47:40]; // @[lsu_bus_buffer.scala 340:44] + wire [7:0] _T_1607 = _T_1561 ? obuf_data1_in[55:48] : obuf_data0_in[55:48]; // @[lsu_bus_buffer.scala 340:44] + wire [7:0] _T_1612 = _T_1565 ? obuf_data1_in[63:56] : obuf_data0_in[63:56]; // @[lsu_bus_buffer.scala 340:44] + wire [63:0] obuf_data_in = {_T_1612,_T_1607,_T_1602,_T_1597,_T_1592,_T_1587,_T_1582,_T_1577}; // @[Cat.scala 29:58] + wire _T_1771 = obuf_wr_en | obuf_valid; // @[lsu_bus_buffer.scala 349:58] + wire _T_1772 = ~obuf_rst; // @[lsu_bus_buffer.scala 349:93] + wire _T_1780 = io_lsu_bus_obuf_c1_clken & obuf_wr_en; // @[lib.scala 388:57] + reg [1:0] obuf_sz; // @[Reg.scala 27:20] + reg [7:0] obuf_byteen; // @[Reg.scala 27:20] + reg [63:0] obuf_data; // @[Reg.scala 27:20] + wire _T_1792 = buf_state_0 == 3'h0; // @[lsu_bus_buffer.scala 369:65] + wire _T_1793 = ibuf_tag == 2'h0; // @[lsu_bus_buffer.scala 370:30] + wire _T_1794 = ibuf_valid & _T_1793; // @[lsu_bus_buffer.scala 370:19] + wire _T_1795 = WrPtr0_r == 2'h0; // @[lsu_bus_buffer.scala 371:18] + wire _T_1796 = WrPtr1_r == 2'h0; // @[lsu_bus_buffer.scala 371:57] + wire _T_1797 = io_ldst_dual_r & _T_1796; // @[lsu_bus_buffer.scala 371:45] + wire _T_1798 = _T_1795 | _T_1797; // @[lsu_bus_buffer.scala 371:27] + wire _T_1799 = io_lsu_busreq_r & _T_1798; // @[lsu_bus_buffer.scala 370:58] + wire _T_1800 = _T_1794 | _T_1799; // @[lsu_bus_buffer.scala 370:39] + wire _T_1801 = ~_T_1800; // @[lsu_bus_buffer.scala 370:5] + wire _T_1802 = _T_1792 & _T_1801; // @[lsu_bus_buffer.scala 369:76] + wire _T_1803 = buf_state_1 == 3'h0; // @[lsu_bus_buffer.scala 369:65] + wire _T_1804 = ibuf_tag == 2'h1; // @[lsu_bus_buffer.scala 370:30] + wire _T_1805 = ibuf_valid & _T_1804; // @[lsu_bus_buffer.scala 370:19] + wire _T_1806 = WrPtr0_r == 2'h1; // @[lsu_bus_buffer.scala 371:18] + wire _T_1807 = WrPtr1_r == 2'h1; // @[lsu_bus_buffer.scala 371:57] + wire _T_1808 = io_ldst_dual_r & _T_1807; // @[lsu_bus_buffer.scala 371:45] + wire _T_1809 = _T_1806 | _T_1808; // @[lsu_bus_buffer.scala 371:27] + wire _T_1810 = io_lsu_busreq_r & _T_1809; // @[lsu_bus_buffer.scala 370:58] + wire _T_1811 = _T_1805 | _T_1810; // @[lsu_bus_buffer.scala 370:39] + wire _T_1812 = ~_T_1811; // @[lsu_bus_buffer.scala 370:5] + wire _T_1813 = _T_1803 & _T_1812; // @[lsu_bus_buffer.scala 369:76] + wire _T_1814 = buf_state_2 == 3'h0; // @[lsu_bus_buffer.scala 369:65] + wire _T_1815 = ibuf_tag == 2'h2; // @[lsu_bus_buffer.scala 370:30] + wire _T_1816 = ibuf_valid & _T_1815; // @[lsu_bus_buffer.scala 370:19] + wire _T_1817 = WrPtr0_r == 2'h2; // @[lsu_bus_buffer.scala 371:18] + wire _T_1818 = WrPtr1_r == 2'h2; // @[lsu_bus_buffer.scala 371:57] + wire _T_1819 = io_ldst_dual_r & _T_1818; // @[lsu_bus_buffer.scala 371:45] + wire _T_1820 = _T_1817 | _T_1819; // @[lsu_bus_buffer.scala 371:27] + wire _T_1821 = io_lsu_busreq_r & _T_1820; // @[lsu_bus_buffer.scala 370:58] + wire _T_1822 = _T_1816 | _T_1821; // @[lsu_bus_buffer.scala 370:39] + wire _T_1823 = ~_T_1822; // @[lsu_bus_buffer.scala 370:5] + wire _T_1824 = _T_1814 & _T_1823; // @[lsu_bus_buffer.scala 369:76] + wire _T_1825 = buf_state_3 == 3'h0; // @[lsu_bus_buffer.scala 369:65] + wire _T_1826 = ibuf_tag == 2'h3; // @[lsu_bus_buffer.scala 370:30] + wire _T_1828 = WrPtr0_r == 2'h3; // @[lsu_bus_buffer.scala 371:18] + wire _T_1829 = WrPtr1_r == 2'h3; // @[lsu_bus_buffer.scala 371:57] + wire [1:0] _T_1837 = _T_1824 ? 2'h2 : 2'h3; // @[Mux.scala 98:16] + wire [1:0] _T_1838 = _T_1813 ? 2'h1 : _T_1837; // @[Mux.scala 98:16] + wire [1:0] WrPtr0_m = _T_1802 ? 2'h0 : _T_1838; // @[Mux.scala 98:16] + wire _T_1843 = WrPtr0_m == 2'h0; // @[lsu_bus_buffer.scala 376:33] + wire _T_1844 = io_lsu_busreq_m & _T_1843; // @[lsu_bus_buffer.scala 376:22] + wire _T_1845 = _T_1794 | _T_1844; // @[lsu_bus_buffer.scala 375:112] + wire _T_1851 = _T_1845 | _T_1799; // @[lsu_bus_buffer.scala 376:42] + wire _T_1852 = ~_T_1851; // @[lsu_bus_buffer.scala 375:78] + wire _T_1853 = _T_1792 & _T_1852; // @[lsu_bus_buffer.scala 375:76] + wire _T_1857 = WrPtr0_m == 2'h1; // @[lsu_bus_buffer.scala 376:33] + wire _T_1858 = io_lsu_busreq_m & _T_1857; // @[lsu_bus_buffer.scala 376:22] + wire _T_1859 = _T_1805 | _T_1858; // @[lsu_bus_buffer.scala 375:112] + wire _T_1865 = _T_1859 | _T_1810; // @[lsu_bus_buffer.scala 376:42] + wire _T_1866 = ~_T_1865; // @[lsu_bus_buffer.scala 375:78] + wire _T_1867 = _T_1803 & _T_1866; // @[lsu_bus_buffer.scala 375:76] + wire _T_1871 = WrPtr0_m == 2'h2; // @[lsu_bus_buffer.scala 376:33] + wire _T_1872 = io_lsu_busreq_m & _T_1871; // @[lsu_bus_buffer.scala 376:22] + wire _T_1873 = _T_1816 | _T_1872; // @[lsu_bus_buffer.scala 375:112] + wire _T_1879 = _T_1873 | _T_1821; // @[lsu_bus_buffer.scala 376:42] + wire _T_1880 = ~_T_1879; // @[lsu_bus_buffer.scala 375:78] + wire _T_1881 = _T_1814 & _T_1880; // @[lsu_bus_buffer.scala 375:76] + reg [3:0] buf_rspageQ_0; // @[lsu_bus_buffer.scala 514:63] + wire _T_2717 = buf_state_3 == 3'h5; // @[lsu_bus_buffer.scala 419:102] + wire _T_2718 = buf_rspageQ_0[3] & _T_2717; // @[lsu_bus_buffer.scala 419:87] + wire _T_2714 = buf_state_2 == 3'h5; // @[lsu_bus_buffer.scala 419:102] + wire _T_2715 = buf_rspageQ_0[2] & _T_2714; // @[lsu_bus_buffer.scala 419:87] + wire _T_2711 = buf_state_1 == 3'h5; // @[lsu_bus_buffer.scala 419:102] + wire _T_2712 = buf_rspageQ_0[1] & _T_2711; // @[lsu_bus_buffer.scala 419:87] + wire _T_2708 = buf_state_0 == 3'h5; // @[lsu_bus_buffer.scala 419:102] + wire _T_2709 = buf_rspageQ_0[0] & _T_2708; // @[lsu_bus_buffer.scala 419:87] + wire [3:0] buf_rsp_pickage_0 = {_T_2718,_T_2715,_T_2712,_T_2709}; // @[Cat.scala 29:58] + wire _T_1972 = |buf_rsp_pickage_0; // @[lsu_bus_buffer.scala 387:65] + wire _T_1973 = ~_T_1972; // @[lsu_bus_buffer.scala 387:44] + wire _T_1975 = _T_1973 & _T_2708; // @[lsu_bus_buffer.scala 387:70] + reg [3:0] buf_rspageQ_1; // @[lsu_bus_buffer.scala 514:63] + wire _T_2733 = buf_rspageQ_1[3] & _T_2717; // @[lsu_bus_buffer.scala 419:87] + wire _T_2730 = buf_rspageQ_1[2] & _T_2714; // @[lsu_bus_buffer.scala 419:87] + wire _T_2727 = buf_rspageQ_1[1] & _T_2711; // @[lsu_bus_buffer.scala 419:87] + wire _T_2724 = buf_rspageQ_1[0] & _T_2708; // @[lsu_bus_buffer.scala 419:87] + wire [3:0] buf_rsp_pickage_1 = {_T_2733,_T_2730,_T_2727,_T_2724}; // @[Cat.scala 29:58] + wire _T_1976 = |buf_rsp_pickage_1; // @[lsu_bus_buffer.scala 387:65] + wire _T_1977 = ~_T_1976; // @[lsu_bus_buffer.scala 387:44] + wire _T_1979 = _T_1977 & _T_2711; // @[lsu_bus_buffer.scala 387:70] + reg [3:0] buf_rspageQ_2; // @[lsu_bus_buffer.scala 514:63] + wire _T_2748 = buf_rspageQ_2[3] & _T_2717; // @[lsu_bus_buffer.scala 419:87] + wire _T_2745 = buf_rspageQ_2[2] & _T_2714; // @[lsu_bus_buffer.scala 419:87] + wire _T_2742 = buf_rspageQ_2[1] & _T_2711; // @[lsu_bus_buffer.scala 419:87] + wire _T_2739 = buf_rspageQ_2[0] & _T_2708; // @[lsu_bus_buffer.scala 419:87] + wire [3:0] buf_rsp_pickage_2 = {_T_2748,_T_2745,_T_2742,_T_2739}; // @[Cat.scala 29:58] + wire _T_1980 = |buf_rsp_pickage_2; // @[lsu_bus_buffer.scala 387:65] + wire _T_1981 = ~_T_1980; // @[lsu_bus_buffer.scala 387:44] + wire _T_1983 = _T_1981 & _T_2714; // @[lsu_bus_buffer.scala 387:70] + reg [3:0] buf_rspageQ_3; // @[lsu_bus_buffer.scala 514:63] + wire _T_2763 = buf_rspageQ_3[3] & _T_2717; // @[lsu_bus_buffer.scala 419:87] + wire _T_2760 = buf_rspageQ_3[2] & _T_2714; // @[lsu_bus_buffer.scala 419:87] + wire _T_2757 = buf_rspageQ_3[1] & _T_2711; // @[lsu_bus_buffer.scala 419:87] + wire _T_2754 = buf_rspageQ_3[0] & _T_2708; // @[lsu_bus_buffer.scala 419:87] + wire [3:0] buf_rsp_pickage_3 = {_T_2763,_T_2760,_T_2757,_T_2754}; // @[Cat.scala 29:58] + wire _T_1984 = |buf_rsp_pickage_3; // @[lsu_bus_buffer.scala 387:65] + wire _T_1985 = ~_T_1984; // @[lsu_bus_buffer.scala 387:44] + wire _T_1987 = _T_1985 & _T_2717; // @[lsu_bus_buffer.scala 387:70] + wire [7:0] _T_2043 = {4'h0,_T_1987,_T_1983,_T_1979,_T_1975}; // @[Cat.scala 29:58] + wire _T_2046 = _T_2043[4] | _T_2043[5]; // @[lsu_bus_buffer.scala 391:42] + wire _T_2048 = _T_2046 | _T_2043[6]; // @[lsu_bus_buffer.scala 391:48] + wire _T_2050 = _T_2048 | _T_2043[7]; // @[lsu_bus_buffer.scala 391:54] + wire _T_2053 = _T_2043[2] | _T_2043[3]; // @[lsu_bus_buffer.scala 391:67] + wire _T_2055 = _T_2053 | _T_2043[6]; // @[lsu_bus_buffer.scala 391:73] + wire _T_2057 = _T_2055 | _T_2043[7]; // @[lsu_bus_buffer.scala 391:79] + wire _T_2060 = _T_2043[1] | _T_2043[3]; // @[lsu_bus_buffer.scala 391:92] + wire _T_2062 = _T_2060 | _T_2043[5]; // @[lsu_bus_buffer.scala 391:98] + wire _T_2064 = _T_2062 | _T_2043[7]; // @[lsu_bus_buffer.scala 391:104] + wire [2:0] _T_2066 = {_T_2050,_T_2057,_T_2064}; // @[Cat.scala 29:58] + wire _T_3535 = ibuf_byp | io_ldst_dual_r; // @[lsu_bus_buffer.scala 445:77] + wire _T_3536 = ~ibuf_merge_en; // @[lsu_bus_buffer.scala 445:97] + wire _T_3537 = _T_3535 & _T_3536; // @[lsu_bus_buffer.scala 445:95] + wire _T_3538 = 2'h0 == WrPtr0_r; // @[lsu_bus_buffer.scala 445:117] + wire _T_3539 = _T_3537 & _T_3538; // @[lsu_bus_buffer.scala 445:112] + wire _T_3540 = ibuf_byp & io_ldst_dual_r; // @[lsu_bus_buffer.scala 445:144] + wire _T_3541 = 2'h0 == WrPtr1_r; // @[lsu_bus_buffer.scala 445:166] + wire _T_3542 = _T_3540 & _T_3541; // @[lsu_bus_buffer.scala 445:161] + wire _T_3543 = _T_3539 | _T_3542; // @[lsu_bus_buffer.scala 445:132] + wire _T_3544 = _T_853 & _T_3543; // @[lsu_bus_buffer.scala 445:63] + wire _T_3545 = 2'h0 == ibuf_tag; // @[lsu_bus_buffer.scala 445:206] + wire _T_3546 = ibuf_drain_vld & _T_3545; // @[lsu_bus_buffer.scala 445:201] + wire _T_3547 = _T_3544 | _T_3546; // @[lsu_bus_buffer.scala 445:183] + wire bus_rsp_write = io_lsu_axi_b_valid & io_lsu_axi_b_ready; // @[lsu_bus_buffer.scala 572:39] + wire _T_3636 = io_lsu_axi_b_bits_id == 3'h0; // @[lsu_bus_buffer.scala 475:73] + wire _T_3637 = bus_rsp_write & _T_3636; // @[lsu_bus_buffer.scala 475:52] + wire _T_3638 = io_lsu_axi_r_bits_id == 3'h0; // @[lsu_bus_buffer.scala 476:46] + reg _T_4302; // @[Reg.scala 27:20] + reg _T_4300; // @[Reg.scala 27:20] + reg _T_4298; // @[Reg.scala 27:20] + reg _T_4296; // @[Reg.scala 27:20] + wire [3:0] buf_ldfwd = {_T_4302,_T_4300,_T_4298,_T_4296}; // @[Cat.scala 29:58] + reg [1:0] buf_ldfwdtag_0; // @[Reg.scala 27:20] + wire [2:0] _GEN_386 = {{1'd0}, buf_ldfwdtag_0}; // @[lsu_bus_buffer.scala 477:47] + wire _T_3640 = io_lsu_axi_r_bits_id == _GEN_386; // @[lsu_bus_buffer.scala 477:47] + wire _T_3641 = buf_ldfwd[0] & _T_3640; // @[lsu_bus_buffer.scala 477:27] + wire _T_3642 = _T_3638 | _T_3641; // @[lsu_bus_buffer.scala 476:77] + wire _T_3643 = buf_dual_0 & buf_dualhi_0; // @[lsu_bus_buffer.scala 478:26] + wire _T_3645 = ~buf_write[0]; // @[lsu_bus_buffer.scala 478:44] + wire _T_3646 = _T_3643 & _T_3645; // @[lsu_bus_buffer.scala 478:42] + wire _T_3647 = _T_3646 & buf_samedw_0; // @[lsu_bus_buffer.scala 478:58] + reg [1:0] buf_dualtag_0; // @[Reg.scala 27:20] + wire [2:0] _GEN_387 = {{1'd0}, buf_dualtag_0}; // @[lsu_bus_buffer.scala 478:94] + wire _T_3648 = io_lsu_axi_r_bits_id == _GEN_387; // @[lsu_bus_buffer.scala 478:94] + wire _T_3649 = _T_3647 & _T_3648; // @[lsu_bus_buffer.scala 478:74] + wire _T_3650 = _T_3642 | _T_3649; // @[lsu_bus_buffer.scala 477:71] + wire _T_3651 = bus_rsp_read & _T_3650; // @[lsu_bus_buffer.scala 476:25] + wire _T_3652 = _T_3637 | _T_3651; // @[lsu_bus_buffer.scala 475:105] + wire _GEN_52 = _T_3592 & _T_3652; // @[Conditional.scala 39:67] + wire _GEN_72 = _T_3558 ? 1'h0 : _GEN_52; // @[Conditional.scala 39:67] + wire _GEN_84 = _T_3554 ? 1'h0 : _GEN_72; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_0 = _T_3531 ? 1'h0 : _GEN_84; // @[Conditional.scala 40:58] + wire [3:0] _T_3687 = buf_ldfwd >> buf_dualtag_0; // @[lsu_bus_buffer.scala 492:21] + reg [1:0] buf_ldfwdtag_3; // @[Reg.scala 27:20] + reg [1:0] buf_ldfwdtag_2; // @[Reg.scala 27:20] + reg [1:0] buf_ldfwdtag_1; // @[Reg.scala 27:20] + wire [1:0] _GEN_33 = 2'h1 == buf_dualtag_0 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[lsu_bus_buffer.scala 492:58] + wire [1:0] _GEN_34 = 2'h2 == buf_dualtag_0 ? buf_ldfwdtag_2 : _GEN_33; // @[lsu_bus_buffer.scala 492:58] + wire [1:0] _GEN_35 = 2'h3 == buf_dualtag_0 ? buf_ldfwdtag_3 : _GEN_34; // @[lsu_bus_buffer.scala 492:58] + wire [2:0] _GEN_389 = {{1'd0}, _GEN_35}; // @[lsu_bus_buffer.scala 492:58] + wire _T_3689 = io_lsu_axi_r_bits_id == _GEN_389; // @[lsu_bus_buffer.scala 492:58] + wire _T_3690 = _T_3687[0] & _T_3689; // @[lsu_bus_buffer.scala 492:38] + wire _T_3691 = _T_3648 | _T_3690; // @[lsu_bus_buffer.scala 491:95] + wire _T_3692 = bus_rsp_read & _T_3691; // @[lsu_bus_buffer.scala 491:45] + wire _GEN_46 = _T_3677 & _T_3692; // @[Conditional.scala 39:67] + wire _GEN_53 = _T_3592 ? buf_resp_state_bus_en_0 : _GEN_46; // @[Conditional.scala 39:67] + wire _GEN_63 = _T_3558 ? buf_cmd_state_bus_en_0 : _GEN_53; // @[Conditional.scala 39:67] + wire _GEN_77 = _T_3554 ? 1'h0 : _GEN_63; // @[Conditional.scala 39:67] + wire buf_state_bus_en_0 = _T_3531 ? 1'h0 : _GEN_77; // @[Conditional.scala 40:58] + wire _T_3571 = buf_state_bus_en_0 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 462:49] + wire _T_3572 = _T_3571 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 462:70] + wire [1:0] RspPtr = _T_2066[1:0]; // @[lsu_bus_buffer.scala 399:10] + wire _T_3698 = RspPtr == 2'h0; // @[lsu_bus_buffer.scala 499:37] + wire _T_3699 = buf_dualtag_0 == RspPtr; // @[lsu_bus_buffer.scala 499:98] + wire _T_3700 = buf_dual_0 & _T_3699; // @[lsu_bus_buffer.scala 499:80] + wire _T_3701 = _T_3698 | _T_3700; // @[lsu_bus_buffer.scala 499:65] + wire _T_3702 = _T_3701 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 499:112] + wire _GEN_41 = _T_3695 ? _T_3702 : _T_3703; // @[Conditional.scala 39:67] + wire _GEN_47 = _T_3677 ? _T_3572 : _GEN_41; // @[Conditional.scala 39:67] + wire _GEN_54 = _T_3592 ? _T_3572 : _GEN_47; // @[Conditional.scala 39:67] + wire _GEN_64 = _T_3558 ? _T_3572 : _GEN_54; // @[Conditional.scala 39:67] + wire _GEN_74 = _T_3554 ? obuf_rdrsp_pend_en : _GEN_64; // @[Conditional.scala 39:67] + wire buf_state_en_0 = _T_3531 ? _T_3547 : _GEN_74; // @[Conditional.scala 40:58] + wire _T_2068 = _T_1792 & buf_state_en_0; // @[lsu_bus_buffer.scala 411:94] + wire _T_2074 = ibuf_drain_vld & io_lsu_busreq_r; // @[lsu_bus_buffer.scala 413:23] + wire _T_2076 = _T_2074 & _T_3535; // @[lsu_bus_buffer.scala 413:41] + wire _T_2078 = _T_2076 & _T_1795; // @[lsu_bus_buffer.scala 413:71] + wire _T_2080 = _T_2078 & _T_1793; // @[lsu_bus_buffer.scala 413:92] + wire _T_2081 = _T_4466 | _T_2080; // @[lsu_bus_buffer.scala 412:86] + wire _T_2082 = ibuf_byp & io_lsu_busreq_r; // @[lsu_bus_buffer.scala 414:17] + wire _T_2083 = _T_2082 & io_ldst_dual_r; // @[lsu_bus_buffer.scala 414:35] + wire _T_2085 = _T_2083 & _T_1796; // @[lsu_bus_buffer.scala 414:52] + wire _T_2087 = _T_2085 & _T_1795; // @[lsu_bus_buffer.scala 414:73] + wire _T_2088 = _T_2081 | _T_2087; // @[lsu_bus_buffer.scala 413:114] + wire _T_2089 = _T_2068 & _T_2088; // @[lsu_bus_buffer.scala 411:113] + wire _T_2091 = _T_2089 | buf_age_0[0]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2105 = _T_2078 & _T_1804; // @[lsu_bus_buffer.scala 413:92] + wire _T_2106 = _T_4471 | _T_2105; // @[lsu_bus_buffer.scala 412:86] + wire _T_2112 = _T_2085 & _T_1806; // @[lsu_bus_buffer.scala 414:73] + wire _T_2113 = _T_2106 | _T_2112; // @[lsu_bus_buffer.scala 413:114] + wire _T_2114 = _T_2068 & _T_2113; // @[lsu_bus_buffer.scala 411:113] + wire _T_2116 = _T_2114 | buf_age_0[1]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2130 = _T_2078 & _T_1815; // @[lsu_bus_buffer.scala 413:92] + wire _T_2131 = _T_4476 | _T_2130; // @[lsu_bus_buffer.scala 412:86] + wire _T_2137 = _T_2085 & _T_1817; // @[lsu_bus_buffer.scala 414:73] + wire _T_2138 = _T_2131 | _T_2137; // @[lsu_bus_buffer.scala 413:114] + wire _T_2139 = _T_2068 & _T_2138; // @[lsu_bus_buffer.scala 411:113] + wire _T_2141 = _T_2139 | buf_age_0[2]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2155 = _T_2078 & _T_1826; // @[lsu_bus_buffer.scala 413:92] + wire _T_2156 = _T_4481 | _T_2155; // @[lsu_bus_buffer.scala 412:86] + wire _T_2162 = _T_2085 & _T_1828; // @[lsu_bus_buffer.scala 414:73] + wire _T_2163 = _T_2156 | _T_2162; // @[lsu_bus_buffer.scala 413:114] + wire _T_2164 = _T_2068 & _T_2163; // @[lsu_bus_buffer.scala 411:113] + wire _T_2166 = _T_2164 | buf_age_0[3]; // @[lsu_bus_buffer.scala 414:97] + wire [2:0] _T_2168 = {_T_2166,_T_2141,_T_2116}; // @[Cat.scala 29:58] + wire _T_3729 = 2'h1 == WrPtr0_r; // @[lsu_bus_buffer.scala 445:117] + wire _T_3730 = _T_3537 & _T_3729; // @[lsu_bus_buffer.scala 445:112] + wire _T_3732 = 2'h1 == WrPtr1_r; // @[lsu_bus_buffer.scala 445:166] + wire _T_3733 = _T_3540 & _T_3732; // @[lsu_bus_buffer.scala 445:161] + wire _T_3734 = _T_3730 | _T_3733; // @[lsu_bus_buffer.scala 445:132] + wire _T_3735 = _T_853 & _T_3734; // @[lsu_bus_buffer.scala 445:63] + wire _T_3736 = 2'h1 == ibuf_tag; // @[lsu_bus_buffer.scala 445:206] + wire _T_3737 = ibuf_drain_vld & _T_3736; // @[lsu_bus_buffer.scala 445:201] + wire _T_3738 = _T_3735 | _T_3737; // @[lsu_bus_buffer.scala 445:183] + wire _T_3827 = io_lsu_axi_b_bits_id == 3'h1; // @[lsu_bus_buffer.scala 475:73] + wire _T_3828 = bus_rsp_write & _T_3827; // @[lsu_bus_buffer.scala 475:52] + wire _T_3829 = io_lsu_axi_r_bits_id == 3'h1; // @[lsu_bus_buffer.scala 476:46] + wire [2:0] _GEN_390 = {{1'd0}, buf_ldfwdtag_1}; // @[lsu_bus_buffer.scala 477:47] + wire _T_3831 = io_lsu_axi_r_bits_id == _GEN_390; // @[lsu_bus_buffer.scala 477:47] + wire _T_3832 = buf_ldfwd[1] & _T_3831; // @[lsu_bus_buffer.scala 477:27] + wire _T_3833 = _T_3829 | _T_3832; // @[lsu_bus_buffer.scala 476:77] + wire _T_3834 = buf_dual_1 & buf_dualhi_1; // @[lsu_bus_buffer.scala 478:26] + wire _T_3836 = ~buf_write[1]; // @[lsu_bus_buffer.scala 478:44] + wire _T_3837 = _T_3834 & _T_3836; // @[lsu_bus_buffer.scala 478:42] + wire _T_3838 = _T_3837 & buf_samedw_1; // @[lsu_bus_buffer.scala 478:58] + reg [1:0] buf_dualtag_1; // @[Reg.scala 27:20] + wire [2:0] _GEN_391 = {{1'd0}, buf_dualtag_1}; // @[lsu_bus_buffer.scala 478:94] + wire _T_3839 = io_lsu_axi_r_bits_id == _GEN_391; // @[lsu_bus_buffer.scala 478:94] + wire _T_3840 = _T_3838 & _T_3839; // @[lsu_bus_buffer.scala 478:74] + wire _T_3841 = _T_3833 | _T_3840; // @[lsu_bus_buffer.scala 477:71] + wire _T_3842 = bus_rsp_read & _T_3841; // @[lsu_bus_buffer.scala 476:25] + wire _T_3843 = _T_3828 | _T_3842; // @[lsu_bus_buffer.scala 475:105] + wire _GEN_128 = _T_3783 & _T_3843; // @[Conditional.scala 39:67] + wire _GEN_148 = _T_3749 ? 1'h0 : _GEN_128; // @[Conditional.scala 39:67] + wire _GEN_160 = _T_3745 ? 1'h0 : _GEN_148; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_1 = _T_3722 ? 1'h0 : _GEN_160; // @[Conditional.scala 40:58] + wire [3:0] _T_3878 = buf_ldfwd >> buf_dualtag_1; // @[lsu_bus_buffer.scala 492:21] + wire [1:0] _GEN_109 = 2'h1 == buf_dualtag_1 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[lsu_bus_buffer.scala 492:58] + wire [1:0] _GEN_110 = 2'h2 == buf_dualtag_1 ? buf_ldfwdtag_2 : _GEN_109; // @[lsu_bus_buffer.scala 492:58] + wire [1:0] _GEN_111 = 2'h3 == buf_dualtag_1 ? buf_ldfwdtag_3 : _GEN_110; // @[lsu_bus_buffer.scala 492:58] + wire [2:0] _GEN_393 = {{1'd0}, _GEN_111}; // @[lsu_bus_buffer.scala 492:58] + wire _T_3880 = io_lsu_axi_r_bits_id == _GEN_393; // @[lsu_bus_buffer.scala 492:58] + wire _T_3881 = _T_3878[0] & _T_3880; // @[lsu_bus_buffer.scala 492:38] + wire _T_3882 = _T_3839 | _T_3881; // @[lsu_bus_buffer.scala 491:95] + wire _T_3883 = bus_rsp_read & _T_3882; // @[lsu_bus_buffer.scala 491:45] + wire _GEN_122 = _T_3868 & _T_3883; // @[Conditional.scala 39:67] + wire _GEN_129 = _T_3783 ? buf_resp_state_bus_en_1 : _GEN_122; // @[Conditional.scala 39:67] + wire _GEN_139 = _T_3749 ? buf_cmd_state_bus_en_1 : _GEN_129; // @[Conditional.scala 39:67] + wire _GEN_153 = _T_3745 ? 1'h0 : _GEN_139; // @[Conditional.scala 39:67] + wire buf_state_bus_en_1 = _T_3722 ? 1'h0 : _GEN_153; // @[Conditional.scala 40:58] + wire _T_3762 = buf_state_bus_en_1 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 462:49] + wire _T_3763 = _T_3762 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 462:70] + wire _T_3889 = RspPtr == 2'h1; // @[lsu_bus_buffer.scala 499:37] + wire _T_3890 = buf_dualtag_1 == RspPtr; // @[lsu_bus_buffer.scala 499:98] + wire _T_3891 = buf_dual_1 & _T_3890; // @[lsu_bus_buffer.scala 499:80] + wire _T_3892 = _T_3889 | _T_3891; // @[lsu_bus_buffer.scala 499:65] + wire _T_3893 = _T_3892 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 499:112] + wire _GEN_117 = _T_3886 ? _T_3893 : _T_3894; // @[Conditional.scala 39:67] + wire _GEN_123 = _T_3868 ? _T_3763 : _GEN_117; // @[Conditional.scala 39:67] + wire _GEN_130 = _T_3783 ? _T_3763 : _GEN_123; // @[Conditional.scala 39:67] + wire _GEN_140 = _T_3749 ? _T_3763 : _GEN_130; // @[Conditional.scala 39:67] + wire _GEN_150 = _T_3745 ? obuf_rdrsp_pend_en : _GEN_140; // @[Conditional.scala 39:67] + wire buf_state_en_1 = _T_3722 ? _T_3738 : _GEN_150; // @[Conditional.scala 40:58] + wire _T_2170 = _T_1803 & buf_state_en_1; // @[lsu_bus_buffer.scala 411:94] + wire _T_2180 = _T_2076 & _T_1806; // @[lsu_bus_buffer.scala 413:71] + wire _T_2182 = _T_2180 & _T_1793; // @[lsu_bus_buffer.scala 413:92] + wire _T_2183 = _T_4466 | _T_2182; // @[lsu_bus_buffer.scala 412:86] + wire _T_2187 = _T_2083 & _T_1807; // @[lsu_bus_buffer.scala 414:52] + wire _T_2189 = _T_2187 & _T_1795; // @[lsu_bus_buffer.scala 414:73] + wire _T_2190 = _T_2183 | _T_2189; // @[lsu_bus_buffer.scala 413:114] + wire _T_2191 = _T_2170 & _T_2190; // @[lsu_bus_buffer.scala 411:113] + wire _T_2193 = _T_2191 | buf_age_1[0]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2207 = _T_2180 & _T_1804; // @[lsu_bus_buffer.scala 413:92] + wire _T_2208 = _T_4471 | _T_2207; // @[lsu_bus_buffer.scala 412:86] + wire _T_2214 = _T_2187 & _T_1806; // @[lsu_bus_buffer.scala 414:73] + wire _T_2215 = _T_2208 | _T_2214; // @[lsu_bus_buffer.scala 413:114] + wire _T_2216 = _T_2170 & _T_2215; // @[lsu_bus_buffer.scala 411:113] + wire _T_2218 = _T_2216 | buf_age_1[1]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2232 = _T_2180 & _T_1815; // @[lsu_bus_buffer.scala 413:92] + wire _T_2233 = _T_4476 | _T_2232; // @[lsu_bus_buffer.scala 412:86] + wire _T_2239 = _T_2187 & _T_1817; // @[lsu_bus_buffer.scala 414:73] + wire _T_2240 = _T_2233 | _T_2239; // @[lsu_bus_buffer.scala 413:114] + wire _T_2241 = _T_2170 & _T_2240; // @[lsu_bus_buffer.scala 411:113] + wire _T_2243 = _T_2241 | buf_age_1[2]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2257 = _T_2180 & _T_1826; // @[lsu_bus_buffer.scala 413:92] + wire _T_2258 = _T_4481 | _T_2257; // @[lsu_bus_buffer.scala 412:86] + wire _T_2264 = _T_2187 & _T_1828; // @[lsu_bus_buffer.scala 414:73] + wire _T_2265 = _T_2258 | _T_2264; // @[lsu_bus_buffer.scala 413:114] + wire _T_2266 = _T_2170 & _T_2265; // @[lsu_bus_buffer.scala 411:113] + wire _T_2268 = _T_2266 | buf_age_1[3]; // @[lsu_bus_buffer.scala 414:97] + wire [2:0] _T_2270 = {_T_2268,_T_2243,_T_2218}; // @[Cat.scala 29:58] + wire _T_3920 = 2'h2 == WrPtr0_r; // @[lsu_bus_buffer.scala 445:117] + wire _T_3921 = _T_3537 & _T_3920; // @[lsu_bus_buffer.scala 445:112] + wire _T_3923 = 2'h2 == WrPtr1_r; // @[lsu_bus_buffer.scala 445:166] + wire _T_3924 = _T_3540 & _T_3923; // @[lsu_bus_buffer.scala 445:161] + wire _T_3925 = _T_3921 | _T_3924; // @[lsu_bus_buffer.scala 445:132] + wire _T_3926 = _T_853 & _T_3925; // @[lsu_bus_buffer.scala 445:63] + wire _T_3927 = 2'h2 == ibuf_tag; // @[lsu_bus_buffer.scala 445:206] + wire _T_3928 = ibuf_drain_vld & _T_3927; // @[lsu_bus_buffer.scala 445:201] + wire _T_3929 = _T_3926 | _T_3928; // @[lsu_bus_buffer.scala 445:183] + wire _T_4018 = io_lsu_axi_b_bits_id == 3'h2; // @[lsu_bus_buffer.scala 475:73] + wire _T_4019 = bus_rsp_write & _T_4018; // @[lsu_bus_buffer.scala 475:52] + wire _T_4020 = io_lsu_axi_r_bits_id == 3'h2; // @[lsu_bus_buffer.scala 476:46] + wire [2:0] _GEN_394 = {{1'd0}, buf_ldfwdtag_2}; // @[lsu_bus_buffer.scala 477:47] + wire _T_4022 = io_lsu_axi_r_bits_id == _GEN_394; // @[lsu_bus_buffer.scala 477:47] + wire _T_4023 = buf_ldfwd[2] & _T_4022; // @[lsu_bus_buffer.scala 477:27] + wire _T_4024 = _T_4020 | _T_4023; // @[lsu_bus_buffer.scala 476:77] + wire _T_4025 = buf_dual_2 & buf_dualhi_2; // @[lsu_bus_buffer.scala 478:26] + wire _T_4027 = ~buf_write[2]; // @[lsu_bus_buffer.scala 478:44] + wire _T_4028 = _T_4025 & _T_4027; // @[lsu_bus_buffer.scala 478:42] + wire _T_4029 = _T_4028 & buf_samedw_2; // @[lsu_bus_buffer.scala 478:58] + reg [1:0] buf_dualtag_2; // @[Reg.scala 27:20] + wire [2:0] _GEN_395 = {{1'd0}, buf_dualtag_2}; // @[lsu_bus_buffer.scala 478:94] + wire _T_4030 = io_lsu_axi_r_bits_id == _GEN_395; // @[lsu_bus_buffer.scala 478:94] + wire _T_4031 = _T_4029 & _T_4030; // @[lsu_bus_buffer.scala 478:74] + wire _T_4032 = _T_4024 | _T_4031; // @[lsu_bus_buffer.scala 477:71] + wire _T_4033 = bus_rsp_read & _T_4032; // @[lsu_bus_buffer.scala 476:25] + wire _T_4034 = _T_4019 | _T_4033; // @[lsu_bus_buffer.scala 475:105] + wire _GEN_204 = _T_3974 & _T_4034; // @[Conditional.scala 39:67] + wire _GEN_224 = _T_3940 ? 1'h0 : _GEN_204; // @[Conditional.scala 39:67] + wire _GEN_236 = _T_3936 ? 1'h0 : _GEN_224; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_2 = _T_3913 ? 1'h0 : _GEN_236; // @[Conditional.scala 40:58] + wire [3:0] _T_4069 = buf_ldfwd >> buf_dualtag_2; // @[lsu_bus_buffer.scala 492:21] + wire [1:0] _GEN_185 = 2'h1 == buf_dualtag_2 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[lsu_bus_buffer.scala 492:58] + wire [1:0] _GEN_186 = 2'h2 == buf_dualtag_2 ? buf_ldfwdtag_2 : _GEN_185; // @[lsu_bus_buffer.scala 492:58] + wire [1:0] _GEN_187 = 2'h3 == buf_dualtag_2 ? buf_ldfwdtag_3 : _GEN_186; // @[lsu_bus_buffer.scala 492:58] + wire [2:0] _GEN_397 = {{1'd0}, _GEN_187}; // @[lsu_bus_buffer.scala 492:58] + wire _T_4071 = io_lsu_axi_r_bits_id == _GEN_397; // @[lsu_bus_buffer.scala 492:58] + wire _T_4072 = _T_4069[0] & _T_4071; // @[lsu_bus_buffer.scala 492:38] + wire _T_4073 = _T_4030 | _T_4072; // @[lsu_bus_buffer.scala 491:95] + wire _T_4074 = bus_rsp_read & _T_4073; // @[lsu_bus_buffer.scala 491:45] + wire _GEN_198 = _T_4059 & _T_4074; // @[Conditional.scala 39:67] + wire _GEN_205 = _T_3974 ? buf_resp_state_bus_en_2 : _GEN_198; // @[Conditional.scala 39:67] + wire _GEN_215 = _T_3940 ? buf_cmd_state_bus_en_2 : _GEN_205; // @[Conditional.scala 39:67] + wire _GEN_229 = _T_3936 ? 1'h0 : _GEN_215; // @[Conditional.scala 39:67] + wire buf_state_bus_en_2 = _T_3913 ? 1'h0 : _GEN_229; // @[Conditional.scala 40:58] + wire _T_3953 = buf_state_bus_en_2 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 462:49] + wire _T_3954 = _T_3953 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 462:70] + wire _T_4080 = RspPtr == 2'h2; // @[lsu_bus_buffer.scala 499:37] + wire _T_4081 = buf_dualtag_2 == RspPtr; // @[lsu_bus_buffer.scala 499:98] + wire _T_4082 = buf_dual_2 & _T_4081; // @[lsu_bus_buffer.scala 499:80] + wire _T_4083 = _T_4080 | _T_4082; // @[lsu_bus_buffer.scala 499:65] + wire _T_4084 = _T_4083 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 499:112] + wire _GEN_193 = _T_4077 ? _T_4084 : _T_4085; // @[Conditional.scala 39:67] + wire _GEN_199 = _T_4059 ? _T_3954 : _GEN_193; // @[Conditional.scala 39:67] + wire _GEN_206 = _T_3974 ? _T_3954 : _GEN_199; // @[Conditional.scala 39:67] + wire _GEN_216 = _T_3940 ? _T_3954 : _GEN_206; // @[Conditional.scala 39:67] + wire _GEN_226 = _T_3936 ? obuf_rdrsp_pend_en : _GEN_216; // @[Conditional.scala 39:67] + wire buf_state_en_2 = _T_3913 ? _T_3929 : _GEN_226; // @[Conditional.scala 40:58] + wire _T_2272 = _T_1814 & buf_state_en_2; // @[lsu_bus_buffer.scala 411:94] + wire _T_2282 = _T_2076 & _T_1817; // @[lsu_bus_buffer.scala 413:71] + wire _T_2284 = _T_2282 & _T_1793; // @[lsu_bus_buffer.scala 413:92] + wire _T_2285 = _T_4466 | _T_2284; // @[lsu_bus_buffer.scala 412:86] + wire _T_2289 = _T_2083 & _T_1818; // @[lsu_bus_buffer.scala 414:52] + wire _T_2291 = _T_2289 & _T_1795; // @[lsu_bus_buffer.scala 414:73] + wire _T_2292 = _T_2285 | _T_2291; // @[lsu_bus_buffer.scala 413:114] + wire _T_2293 = _T_2272 & _T_2292; // @[lsu_bus_buffer.scala 411:113] + wire _T_2295 = _T_2293 | buf_age_2[0]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2309 = _T_2282 & _T_1804; // @[lsu_bus_buffer.scala 413:92] + wire _T_2310 = _T_4471 | _T_2309; // @[lsu_bus_buffer.scala 412:86] + wire _T_2316 = _T_2289 & _T_1806; // @[lsu_bus_buffer.scala 414:73] + wire _T_2317 = _T_2310 | _T_2316; // @[lsu_bus_buffer.scala 413:114] + wire _T_2318 = _T_2272 & _T_2317; // @[lsu_bus_buffer.scala 411:113] + wire _T_2320 = _T_2318 | buf_age_2[1]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2334 = _T_2282 & _T_1815; // @[lsu_bus_buffer.scala 413:92] + wire _T_2335 = _T_4476 | _T_2334; // @[lsu_bus_buffer.scala 412:86] + wire _T_2341 = _T_2289 & _T_1817; // @[lsu_bus_buffer.scala 414:73] + wire _T_2342 = _T_2335 | _T_2341; // @[lsu_bus_buffer.scala 413:114] + wire _T_2343 = _T_2272 & _T_2342; // @[lsu_bus_buffer.scala 411:113] + wire _T_2345 = _T_2343 | buf_age_2[2]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2359 = _T_2282 & _T_1826; // @[lsu_bus_buffer.scala 413:92] + wire _T_2360 = _T_4481 | _T_2359; // @[lsu_bus_buffer.scala 412:86] + wire _T_2366 = _T_2289 & _T_1828; // @[lsu_bus_buffer.scala 414:73] + wire _T_2367 = _T_2360 | _T_2366; // @[lsu_bus_buffer.scala 413:114] + wire _T_2368 = _T_2272 & _T_2367; // @[lsu_bus_buffer.scala 411:113] + wire _T_2370 = _T_2368 | buf_age_2[3]; // @[lsu_bus_buffer.scala 414:97] + wire [2:0] _T_2372 = {_T_2370,_T_2345,_T_2320}; // @[Cat.scala 29:58] + wire _T_4111 = 2'h3 == WrPtr0_r; // @[lsu_bus_buffer.scala 445:117] + wire _T_4112 = _T_3537 & _T_4111; // @[lsu_bus_buffer.scala 445:112] + wire _T_4114 = 2'h3 == WrPtr1_r; // @[lsu_bus_buffer.scala 445:166] + wire _T_4115 = _T_3540 & _T_4114; // @[lsu_bus_buffer.scala 445:161] + wire _T_4116 = _T_4112 | _T_4115; // @[lsu_bus_buffer.scala 445:132] + wire _T_4117 = _T_853 & _T_4116; // @[lsu_bus_buffer.scala 445:63] + wire _T_4118 = 2'h3 == ibuf_tag; // @[lsu_bus_buffer.scala 445:206] + wire _T_4119 = ibuf_drain_vld & _T_4118; // @[lsu_bus_buffer.scala 445:201] + wire _T_4120 = _T_4117 | _T_4119; // @[lsu_bus_buffer.scala 445:183] + wire _T_4209 = io_lsu_axi_b_bits_id == 3'h3; // @[lsu_bus_buffer.scala 475:73] + wire _T_4210 = bus_rsp_write & _T_4209; // @[lsu_bus_buffer.scala 475:52] + wire _T_4211 = io_lsu_axi_r_bits_id == 3'h3; // @[lsu_bus_buffer.scala 476:46] + wire [2:0] _GEN_398 = {{1'd0}, buf_ldfwdtag_3}; // @[lsu_bus_buffer.scala 477:47] + wire _T_4213 = io_lsu_axi_r_bits_id == _GEN_398; // @[lsu_bus_buffer.scala 477:47] + wire _T_4214 = buf_ldfwd[3] & _T_4213; // @[lsu_bus_buffer.scala 477:27] + wire _T_4215 = _T_4211 | _T_4214; // @[lsu_bus_buffer.scala 476:77] + wire _T_4216 = buf_dual_3 & buf_dualhi_3; // @[lsu_bus_buffer.scala 478:26] + wire _T_4218 = ~buf_write[3]; // @[lsu_bus_buffer.scala 478:44] + wire _T_4219 = _T_4216 & _T_4218; // @[lsu_bus_buffer.scala 478:42] + wire _T_4220 = _T_4219 & buf_samedw_3; // @[lsu_bus_buffer.scala 478:58] + reg [1:0] buf_dualtag_3; // @[Reg.scala 27:20] + wire [2:0] _GEN_399 = {{1'd0}, buf_dualtag_3}; // @[lsu_bus_buffer.scala 478:94] + wire _T_4221 = io_lsu_axi_r_bits_id == _GEN_399; // @[lsu_bus_buffer.scala 478:94] + wire _T_4222 = _T_4220 & _T_4221; // @[lsu_bus_buffer.scala 478:74] + wire _T_4223 = _T_4215 | _T_4222; // @[lsu_bus_buffer.scala 477:71] + wire _T_4224 = bus_rsp_read & _T_4223; // @[lsu_bus_buffer.scala 476:25] + wire _T_4225 = _T_4210 | _T_4224; // @[lsu_bus_buffer.scala 475:105] + wire _GEN_280 = _T_4165 & _T_4225; // @[Conditional.scala 39:67] + wire _GEN_300 = _T_4131 ? 1'h0 : _GEN_280; // @[Conditional.scala 39:67] + wire _GEN_312 = _T_4127 ? 1'h0 : _GEN_300; // @[Conditional.scala 39:67] + wire buf_resp_state_bus_en_3 = _T_4104 ? 1'h0 : _GEN_312; // @[Conditional.scala 40:58] + wire [3:0] _T_4260 = buf_ldfwd >> buf_dualtag_3; // @[lsu_bus_buffer.scala 492:21] + wire [1:0] _GEN_261 = 2'h1 == buf_dualtag_3 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[lsu_bus_buffer.scala 492:58] + wire [1:0] _GEN_262 = 2'h2 == buf_dualtag_3 ? buf_ldfwdtag_2 : _GEN_261; // @[lsu_bus_buffer.scala 492:58] + wire [1:0] _GEN_263 = 2'h3 == buf_dualtag_3 ? buf_ldfwdtag_3 : _GEN_262; // @[lsu_bus_buffer.scala 492:58] + wire [2:0] _GEN_401 = {{1'd0}, _GEN_263}; // @[lsu_bus_buffer.scala 492:58] + wire _T_4262 = io_lsu_axi_r_bits_id == _GEN_401; // @[lsu_bus_buffer.scala 492:58] + wire _T_4263 = _T_4260[0] & _T_4262; // @[lsu_bus_buffer.scala 492:38] + wire _T_4264 = _T_4221 | _T_4263; // @[lsu_bus_buffer.scala 491:95] + wire _T_4265 = bus_rsp_read & _T_4264; // @[lsu_bus_buffer.scala 491:45] + wire _GEN_274 = _T_4250 & _T_4265; // @[Conditional.scala 39:67] + wire _GEN_281 = _T_4165 ? buf_resp_state_bus_en_3 : _GEN_274; // @[Conditional.scala 39:67] + wire _GEN_291 = _T_4131 ? buf_cmd_state_bus_en_3 : _GEN_281; // @[Conditional.scala 39:67] + wire _GEN_305 = _T_4127 ? 1'h0 : _GEN_291; // @[Conditional.scala 39:67] + wire buf_state_bus_en_3 = _T_4104 ? 1'h0 : _GEN_305; // @[Conditional.scala 40:58] + wire _T_4144 = buf_state_bus_en_3 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 462:49] + wire _T_4145 = _T_4144 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 462:70] + wire _T_4271 = RspPtr == 2'h3; // @[lsu_bus_buffer.scala 499:37] + wire _T_4272 = buf_dualtag_3 == RspPtr; // @[lsu_bus_buffer.scala 499:98] + wire _T_4273 = buf_dual_3 & _T_4272; // @[lsu_bus_buffer.scala 499:80] + wire _T_4274 = _T_4271 | _T_4273; // @[lsu_bus_buffer.scala 499:65] + wire _T_4275 = _T_4274 | io_dec_tlu_force_halt; // @[lsu_bus_buffer.scala 499:112] + wire _GEN_269 = _T_4268 ? _T_4275 : _T_4276; // @[Conditional.scala 39:67] + wire _GEN_275 = _T_4250 ? _T_4145 : _GEN_269; // @[Conditional.scala 39:67] + wire _GEN_282 = _T_4165 ? _T_4145 : _GEN_275; // @[Conditional.scala 39:67] + wire _GEN_292 = _T_4131 ? _T_4145 : _GEN_282; // @[Conditional.scala 39:67] + wire _GEN_302 = _T_4127 ? obuf_rdrsp_pend_en : _GEN_292; // @[Conditional.scala 39:67] + wire buf_state_en_3 = _T_4104 ? _T_4120 : _GEN_302; // @[Conditional.scala 40:58] + wire _T_2374 = _T_1825 & buf_state_en_3; // @[lsu_bus_buffer.scala 411:94] + wire _T_2384 = _T_2076 & _T_1828; // @[lsu_bus_buffer.scala 413:71] + wire _T_2386 = _T_2384 & _T_1793; // @[lsu_bus_buffer.scala 413:92] + wire _T_2387 = _T_4466 | _T_2386; // @[lsu_bus_buffer.scala 412:86] + wire _T_2391 = _T_2083 & _T_1829; // @[lsu_bus_buffer.scala 414:52] + wire _T_2393 = _T_2391 & _T_1795; // @[lsu_bus_buffer.scala 414:73] + wire _T_2394 = _T_2387 | _T_2393; // @[lsu_bus_buffer.scala 413:114] + wire _T_2395 = _T_2374 & _T_2394; // @[lsu_bus_buffer.scala 411:113] + wire _T_2397 = _T_2395 | buf_age_3[0]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2411 = _T_2384 & _T_1804; // @[lsu_bus_buffer.scala 413:92] + wire _T_2412 = _T_4471 | _T_2411; // @[lsu_bus_buffer.scala 412:86] + wire _T_2418 = _T_2391 & _T_1806; // @[lsu_bus_buffer.scala 414:73] + wire _T_2419 = _T_2412 | _T_2418; // @[lsu_bus_buffer.scala 413:114] + wire _T_2420 = _T_2374 & _T_2419; // @[lsu_bus_buffer.scala 411:113] + wire _T_2422 = _T_2420 | buf_age_3[1]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2436 = _T_2384 & _T_1815; // @[lsu_bus_buffer.scala 413:92] + wire _T_2437 = _T_4476 | _T_2436; // @[lsu_bus_buffer.scala 412:86] + wire _T_2443 = _T_2391 & _T_1817; // @[lsu_bus_buffer.scala 414:73] + wire _T_2444 = _T_2437 | _T_2443; // @[lsu_bus_buffer.scala 413:114] + wire _T_2445 = _T_2374 & _T_2444; // @[lsu_bus_buffer.scala 411:113] + wire _T_2447 = _T_2445 | buf_age_3[2]; // @[lsu_bus_buffer.scala 414:97] + wire _T_2461 = _T_2384 & _T_1826; // @[lsu_bus_buffer.scala 413:92] + wire _T_2462 = _T_4481 | _T_2461; // @[lsu_bus_buffer.scala 412:86] + wire _T_2468 = _T_2391 & _T_1828; // @[lsu_bus_buffer.scala 414:73] + wire _T_2469 = _T_2462 | _T_2468; // @[lsu_bus_buffer.scala 413:114] + wire _T_2470 = _T_2374 & _T_2469; // @[lsu_bus_buffer.scala 411:113] + wire _T_2472 = _T_2470 | buf_age_3[3]; // @[lsu_bus_buffer.scala 414:97] + wire [2:0] _T_2474 = {_T_2472,_T_2447,_T_2422}; // @[Cat.scala 29:58] + wire _T_2770 = buf_state_0 == 3'h6; // @[lsu_bus_buffer.scala 422:47] + wire _T_2771 = _T_1792 | _T_2770; // @[lsu_bus_buffer.scala 422:32] + wire _T_2772 = ~_T_2771; // @[lsu_bus_buffer.scala 422:6] + wire _T_2780 = _T_2772 | _T_2080; // @[lsu_bus_buffer.scala 422:59] + wire _T_2787 = _T_2780 | _T_2087; // @[lsu_bus_buffer.scala 423:110] + wire _T_2788 = _T_2068 & _T_2787; // @[lsu_bus_buffer.scala 421:112] + wire _T_2792 = buf_state_1 == 3'h6; // @[lsu_bus_buffer.scala 422:47] + wire _T_2793 = _T_1803 | _T_2792; // @[lsu_bus_buffer.scala 422:32] + wire _T_2794 = ~_T_2793; // @[lsu_bus_buffer.scala 422:6] + wire _T_2802 = _T_2794 | _T_2105; // @[lsu_bus_buffer.scala 422:59] + wire _T_2809 = _T_2802 | _T_2112; // @[lsu_bus_buffer.scala 423:110] + wire _T_2810 = _T_2068 & _T_2809; // @[lsu_bus_buffer.scala 421:112] + wire _T_2814 = buf_state_2 == 3'h6; // @[lsu_bus_buffer.scala 422:47] + wire _T_2815 = _T_1814 | _T_2814; // @[lsu_bus_buffer.scala 422:32] + wire _T_2816 = ~_T_2815; // @[lsu_bus_buffer.scala 422:6] + wire _T_2824 = _T_2816 | _T_2130; // @[lsu_bus_buffer.scala 422:59] + wire _T_2831 = _T_2824 | _T_2137; // @[lsu_bus_buffer.scala 423:110] + wire _T_2832 = _T_2068 & _T_2831; // @[lsu_bus_buffer.scala 421:112] + wire _T_2836 = buf_state_3 == 3'h6; // @[lsu_bus_buffer.scala 422:47] + wire _T_2837 = _T_1825 | _T_2836; // @[lsu_bus_buffer.scala 422:32] + wire _T_2838 = ~_T_2837; // @[lsu_bus_buffer.scala 422:6] + wire _T_2846 = _T_2838 | _T_2155; // @[lsu_bus_buffer.scala 422:59] + wire _T_2853 = _T_2846 | _T_2162; // @[lsu_bus_buffer.scala 423:110] + wire _T_2854 = _T_2068 & _T_2853; // @[lsu_bus_buffer.scala 421:112] + wire [3:0] buf_rspage_set_0 = {_T_2854,_T_2832,_T_2810,_T_2788}; // @[Cat.scala 29:58] + wire _T_2871 = _T_2772 | _T_2182; // @[lsu_bus_buffer.scala 422:59] + wire _T_2878 = _T_2871 | _T_2189; // @[lsu_bus_buffer.scala 423:110] + wire _T_2879 = _T_2170 & _T_2878; // @[lsu_bus_buffer.scala 421:112] + wire _T_2893 = _T_2794 | _T_2207; // @[lsu_bus_buffer.scala 422:59] + wire _T_2900 = _T_2893 | _T_2214; // @[lsu_bus_buffer.scala 423:110] + wire _T_2901 = _T_2170 & _T_2900; // @[lsu_bus_buffer.scala 421:112] + wire _T_2915 = _T_2816 | _T_2232; // @[lsu_bus_buffer.scala 422:59] + wire _T_2922 = _T_2915 | _T_2239; // @[lsu_bus_buffer.scala 423:110] + wire _T_2923 = _T_2170 & _T_2922; // @[lsu_bus_buffer.scala 421:112] + wire _T_2937 = _T_2838 | _T_2257; // @[lsu_bus_buffer.scala 422:59] + wire _T_2944 = _T_2937 | _T_2264; // @[lsu_bus_buffer.scala 423:110] + wire _T_2945 = _T_2170 & _T_2944; // @[lsu_bus_buffer.scala 421:112] + wire [3:0] buf_rspage_set_1 = {_T_2945,_T_2923,_T_2901,_T_2879}; // @[Cat.scala 29:58] + wire _T_2962 = _T_2772 | _T_2284; // @[lsu_bus_buffer.scala 422:59] + wire _T_2969 = _T_2962 | _T_2291; // @[lsu_bus_buffer.scala 423:110] + wire _T_2970 = _T_2272 & _T_2969; // @[lsu_bus_buffer.scala 421:112] + wire _T_2984 = _T_2794 | _T_2309; // @[lsu_bus_buffer.scala 422:59] + wire _T_2991 = _T_2984 | _T_2316; // @[lsu_bus_buffer.scala 423:110] + wire _T_2992 = _T_2272 & _T_2991; // @[lsu_bus_buffer.scala 421:112] + wire _T_3006 = _T_2816 | _T_2334; // @[lsu_bus_buffer.scala 422:59] + wire _T_3013 = _T_3006 | _T_2341; // @[lsu_bus_buffer.scala 423:110] + wire _T_3014 = _T_2272 & _T_3013; // @[lsu_bus_buffer.scala 421:112] + wire _T_3028 = _T_2838 | _T_2359; // @[lsu_bus_buffer.scala 422:59] + wire _T_3035 = _T_3028 | _T_2366; // @[lsu_bus_buffer.scala 423:110] + wire _T_3036 = _T_2272 & _T_3035; // @[lsu_bus_buffer.scala 421:112] + wire [3:0] buf_rspage_set_2 = {_T_3036,_T_3014,_T_2992,_T_2970}; // @[Cat.scala 29:58] + wire _T_3053 = _T_2772 | _T_2386; // @[lsu_bus_buffer.scala 422:59] + wire _T_3060 = _T_3053 | _T_2393; // @[lsu_bus_buffer.scala 423:110] + wire _T_3061 = _T_2374 & _T_3060; // @[lsu_bus_buffer.scala 421:112] + wire _T_3075 = _T_2794 | _T_2411; // @[lsu_bus_buffer.scala 422:59] + wire _T_3082 = _T_3075 | _T_2418; // @[lsu_bus_buffer.scala 423:110] + wire _T_3083 = _T_2374 & _T_3082; // @[lsu_bus_buffer.scala 421:112] + wire _T_3097 = _T_2816 | _T_2436; // @[lsu_bus_buffer.scala 422:59] + wire _T_3104 = _T_3097 | _T_2443; // @[lsu_bus_buffer.scala 423:110] + wire _T_3105 = _T_2374 & _T_3104; // @[lsu_bus_buffer.scala 421:112] + wire _T_3119 = _T_2838 | _T_2461; // @[lsu_bus_buffer.scala 422:59] + wire _T_3126 = _T_3119 | _T_2468; // @[lsu_bus_buffer.scala 423:110] + wire _T_3127 = _T_2374 & _T_3126; // @[lsu_bus_buffer.scala 421:112] + wire [3:0] buf_rspage_set_3 = {_T_3127,_T_3105,_T_3083,_T_3061}; // @[Cat.scala 29:58] + wire _T_3218 = _T_2836 | _T_1825; // @[lsu_bus_buffer.scala 426:110] + wire _T_3219 = ~_T_3218; // @[lsu_bus_buffer.scala 426:84] + wire _T_3220 = buf_rspageQ_0[3] & _T_3219; // @[lsu_bus_buffer.scala 426:82] + wire _T_3222 = _T_3220 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3210 = _T_2814 | _T_1814; // @[lsu_bus_buffer.scala 426:110] + wire _T_3211 = ~_T_3210; // @[lsu_bus_buffer.scala 426:84] + wire _T_3212 = buf_rspageQ_0[2] & _T_3211; // @[lsu_bus_buffer.scala 426:82] + wire _T_3214 = _T_3212 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3202 = _T_2792 | _T_1803; // @[lsu_bus_buffer.scala 426:110] + wire _T_3203 = ~_T_3202; // @[lsu_bus_buffer.scala 426:84] + wire _T_3204 = buf_rspageQ_0[1] & _T_3203; // @[lsu_bus_buffer.scala 426:82] + wire _T_3206 = _T_3204 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3194 = _T_2770 | _T_1792; // @[lsu_bus_buffer.scala 426:110] + wire _T_3195 = ~_T_3194; // @[lsu_bus_buffer.scala 426:84] + wire _T_3196 = buf_rspageQ_0[0] & _T_3195; // @[lsu_bus_buffer.scala 426:82] + wire _T_3198 = _T_3196 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire [3:0] buf_rspage_0 = {_T_3222,_T_3214,_T_3206,_T_3198}; // @[Cat.scala 29:58] + wire _T_3133 = buf_rspage_set_0[0] | buf_rspage_0[0]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3136 = buf_rspage_set_0[1] | buf_rspage_0[1]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3139 = buf_rspage_set_0[2] | buf_rspage_0[2]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3142 = buf_rspage_set_0[3] | buf_rspage_0[3]; // @[lsu_bus_buffer.scala 425:88] + wire [2:0] _T_3144 = {_T_3142,_T_3139,_T_3136}; // @[Cat.scala 29:58] + wire _T_3255 = buf_rspageQ_1[3] & _T_3219; // @[lsu_bus_buffer.scala 426:82] + wire _T_3257 = _T_3255 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3247 = buf_rspageQ_1[2] & _T_3211; // @[lsu_bus_buffer.scala 426:82] + wire _T_3249 = _T_3247 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3239 = buf_rspageQ_1[1] & _T_3203; // @[lsu_bus_buffer.scala 426:82] + wire _T_3241 = _T_3239 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3231 = buf_rspageQ_1[0] & _T_3195; // @[lsu_bus_buffer.scala 426:82] + wire _T_3233 = _T_3231 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire [3:0] buf_rspage_1 = {_T_3257,_T_3249,_T_3241,_T_3233}; // @[Cat.scala 29:58] + wire _T_3148 = buf_rspage_set_1[0] | buf_rspage_1[0]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3151 = buf_rspage_set_1[1] | buf_rspage_1[1]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3154 = buf_rspage_set_1[2] | buf_rspage_1[2]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3157 = buf_rspage_set_1[3] | buf_rspage_1[3]; // @[lsu_bus_buffer.scala 425:88] + wire [2:0] _T_3159 = {_T_3157,_T_3154,_T_3151}; // @[Cat.scala 29:58] + wire _T_3290 = buf_rspageQ_2[3] & _T_3219; // @[lsu_bus_buffer.scala 426:82] + wire _T_3292 = _T_3290 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3282 = buf_rspageQ_2[2] & _T_3211; // @[lsu_bus_buffer.scala 426:82] + wire _T_3284 = _T_3282 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3274 = buf_rspageQ_2[1] & _T_3203; // @[lsu_bus_buffer.scala 426:82] + wire _T_3276 = _T_3274 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3266 = buf_rspageQ_2[0] & _T_3195; // @[lsu_bus_buffer.scala 426:82] + wire _T_3268 = _T_3266 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire [3:0] buf_rspage_2 = {_T_3292,_T_3284,_T_3276,_T_3268}; // @[Cat.scala 29:58] + wire _T_3163 = buf_rspage_set_2[0] | buf_rspage_2[0]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3166 = buf_rspage_set_2[1] | buf_rspage_2[1]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3169 = buf_rspage_set_2[2] | buf_rspage_2[2]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3172 = buf_rspage_set_2[3] | buf_rspage_2[3]; // @[lsu_bus_buffer.scala 425:88] + wire [2:0] _T_3174 = {_T_3172,_T_3169,_T_3166}; // @[Cat.scala 29:58] + wire _T_3325 = buf_rspageQ_3[3] & _T_3219; // @[lsu_bus_buffer.scala 426:82] + wire _T_3327 = _T_3325 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3317 = buf_rspageQ_3[2] & _T_3211; // @[lsu_bus_buffer.scala 426:82] + wire _T_3319 = _T_3317 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3309 = buf_rspageQ_3[1] & _T_3203; // @[lsu_bus_buffer.scala 426:82] + wire _T_3311 = _T_3309 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire _T_3301 = buf_rspageQ_3[0] & _T_3195; // @[lsu_bus_buffer.scala 426:82] + wire _T_3303 = _T_3301 & _T_2594; // @[lsu_bus_buffer.scala 426:136] + wire [3:0] buf_rspage_3 = {_T_3327,_T_3319,_T_3311,_T_3303}; // @[Cat.scala 29:58] + wire _T_3178 = buf_rspage_set_3[0] | buf_rspage_3[0]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3181 = buf_rspage_set_3[1] | buf_rspage_3[1]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3184 = buf_rspage_set_3[2] | buf_rspage_3[2]; // @[lsu_bus_buffer.scala 425:88] + wire _T_3187 = buf_rspage_set_3[3] | buf_rspage_3[3]; // @[lsu_bus_buffer.scala 425:88] + wire [2:0] _T_3189 = {_T_3187,_T_3184,_T_3181}; // @[Cat.scala 29:58] + wire _T_3332 = ibuf_drain_vld & _T_1793; // @[lsu_bus_buffer.scala 427:63] + wire _T_3334 = ibuf_drain_vld & _T_1804; // @[lsu_bus_buffer.scala 427:63] + wire _T_3336 = ibuf_drain_vld & _T_1815; // @[lsu_bus_buffer.scala 427:63] + wire _T_3338 = ibuf_drain_vld & _T_1826; // @[lsu_bus_buffer.scala 427:63] + wire [3:0] ibuf_drainvec_vld = {_T_3338,_T_3336,_T_3334,_T_3332}; // @[Cat.scala 29:58] + wire _T_3346 = _T_3540 & _T_1796; // @[lsu_bus_buffer.scala 429:35] + wire _T_3355 = _T_3540 & _T_1807; // @[lsu_bus_buffer.scala 429:35] + wire _T_3364 = _T_3540 & _T_1818; // @[lsu_bus_buffer.scala 429:35] + wire _T_3373 = _T_3540 & _T_1829; // @[lsu_bus_buffer.scala 429:35] + wire _T_3403 = ibuf_drainvec_vld[0] ? ibuf_dual : io_ldst_dual_r; // @[lsu_bus_buffer.scala 431:45] + wire _T_3405 = ibuf_drainvec_vld[1] ? ibuf_dual : io_ldst_dual_r; // @[lsu_bus_buffer.scala 431:45] + wire _T_3407 = ibuf_drainvec_vld[2] ? ibuf_dual : io_ldst_dual_r; // @[lsu_bus_buffer.scala 431:45] + wire _T_3409 = ibuf_drainvec_vld[3] ? ibuf_dual : io_ldst_dual_r; // @[lsu_bus_buffer.scala 431:45] + wire [3:0] buf_dual_in = {_T_3409,_T_3407,_T_3405,_T_3403}; // @[Cat.scala 29:58] + wire _T_3414 = ibuf_drainvec_vld[0] ? ibuf_samedw : ldst_samedw_r; // @[lsu_bus_buffer.scala 432:47] + wire _T_3416 = ibuf_drainvec_vld[1] ? ibuf_samedw : ldst_samedw_r; // @[lsu_bus_buffer.scala 432:47] + wire _T_3418 = ibuf_drainvec_vld[2] ? ibuf_samedw : ldst_samedw_r; // @[lsu_bus_buffer.scala 432:47] + wire _T_3420 = ibuf_drainvec_vld[3] ? ibuf_samedw : ldst_samedw_r; // @[lsu_bus_buffer.scala 432:47] + wire [3:0] buf_samedw_in = {_T_3420,_T_3418,_T_3416,_T_3414}; // @[Cat.scala 29:58] + wire _T_3425 = ibuf_nomerge | ibuf_force_drain; // @[lsu_bus_buffer.scala 433:84] + wire _T_3426 = ibuf_drainvec_vld[0] ? _T_3425 : io_no_dword_merge_r; // @[lsu_bus_buffer.scala 433:48] + wire _T_3429 = ibuf_drainvec_vld[1] ? _T_3425 : io_no_dword_merge_r; // @[lsu_bus_buffer.scala 433:48] + wire _T_3432 = ibuf_drainvec_vld[2] ? _T_3425 : io_no_dword_merge_r; // @[lsu_bus_buffer.scala 433:48] + wire _T_3435 = ibuf_drainvec_vld[3] ? _T_3425 : io_no_dword_merge_r; // @[lsu_bus_buffer.scala 433:48] + wire [3:0] buf_nomerge_in = {_T_3435,_T_3432,_T_3429,_T_3426}; // @[Cat.scala 29:58] + wire _T_3443 = ibuf_drainvec_vld[0] ? ibuf_dual : _T_3346; // @[lsu_bus_buffer.scala 434:47] + wire _T_3448 = ibuf_drainvec_vld[1] ? ibuf_dual : _T_3355; // @[lsu_bus_buffer.scala 434:47] + wire _T_3453 = ibuf_drainvec_vld[2] ? ibuf_dual : _T_3364; // @[lsu_bus_buffer.scala 434:47] + wire _T_3458 = ibuf_drainvec_vld[3] ? ibuf_dual : _T_3373; // @[lsu_bus_buffer.scala 434:47] + wire [3:0] buf_dualhi_in = {_T_3458,_T_3453,_T_3448,_T_3443}; // @[Cat.scala 29:58] + wire _T_3487 = ibuf_drainvec_vld[0] ? ibuf_sideeffect : io_is_sideeffects_r; // @[lsu_bus_buffer.scala 436:51] + wire _T_3489 = ibuf_drainvec_vld[1] ? ibuf_sideeffect : io_is_sideeffects_r; // @[lsu_bus_buffer.scala 436:51] + wire _T_3491 = ibuf_drainvec_vld[2] ? ibuf_sideeffect : io_is_sideeffects_r; // @[lsu_bus_buffer.scala 436:51] + wire _T_3493 = ibuf_drainvec_vld[3] ? ibuf_sideeffect : io_is_sideeffects_r; // @[lsu_bus_buffer.scala 436:51] + wire [3:0] buf_sideeffect_in = {_T_3493,_T_3491,_T_3489,_T_3487}; // @[Cat.scala 29:58] + wire _T_3498 = ibuf_drainvec_vld[0] ? ibuf_unsign : io_lsu_pkt_r_bits_unsign; // @[lsu_bus_buffer.scala 437:47] + wire _T_3500 = ibuf_drainvec_vld[1] ? ibuf_unsign : io_lsu_pkt_r_bits_unsign; // @[lsu_bus_buffer.scala 437:47] + wire _T_3502 = ibuf_drainvec_vld[2] ? ibuf_unsign : io_lsu_pkt_r_bits_unsign; // @[lsu_bus_buffer.scala 437:47] + wire _T_3504 = ibuf_drainvec_vld[3] ? ibuf_unsign : io_lsu_pkt_r_bits_unsign; // @[lsu_bus_buffer.scala 437:47] + wire [3:0] buf_unsign_in = {_T_3504,_T_3502,_T_3500,_T_3498}; // @[Cat.scala 29:58] + wire _T_3521 = ibuf_drainvec_vld[0] ? ibuf_write : io_lsu_pkt_r_bits_store; // @[lsu_bus_buffer.scala 439:46] + wire _T_3523 = ibuf_drainvec_vld[1] ? ibuf_write : io_lsu_pkt_r_bits_store; // @[lsu_bus_buffer.scala 439:46] + wire _T_3525 = ibuf_drainvec_vld[2] ? ibuf_write : io_lsu_pkt_r_bits_store; // @[lsu_bus_buffer.scala 439:46] + wire _T_3527 = ibuf_drainvec_vld[3] ? ibuf_write : io_lsu_pkt_r_bits_store; // @[lsu_bus_buffer.scala 439:46] + wire [3:0] buf_write_in = {_T_3527,_T_3525,_T_3523,_T_3521}; // @[Cat.scala 29:58] + wire _T_3560 = obuf_nosend & bus_rsp_read; // @[lsu_bus_buffer.scala 459:89] + wire _T_3562 = _T_3560 & _T_1349; // @[lsu_bus_buffer.scala 459:104] + wire _T_3575 = buf_state_en_0 & _T_3645; // @[lsu_bus_buffer.scala 464:44] + wire _T_3576 = _T_3575 & obuf_nosend; // @[lsu_bus_buffer.scala 464:60] + wire _T_3578 = _T_3576 & _T_2594; // @[lsu_bus_buffer.scala 464:74] + wire _T_3581 = _T_3571 & obuf_nosend; // @[lsu_bus_buffer.scala 466:67] + wire _T_3582 = _T_3581 & bus_rsp_read; // @[lsu_bus_buffer.scala 466:81] + wire _T_4841 = io_lsu_axi_r_bits_resp != 2'h0; // @[lsu_bus_buffer.scala 576:64] + wire bus_rsp_read_error = bus_rsp_read & _T_4841; // @[lsu_bus_buffer.scala 576:38] + wire _T_3585 = _T_3581 & bus_rsp_read_error; // @[lsu_bus_buffer.scala 467:82] + wire _T_3659 = bus_rsp_read_error & _T_3638; // @[lsu_bus_buffer.scala 482:91] + wire _T_3661 = bus_rsp_read_error & buf_ldfwd[0]; // @[lsu_bus_buffer.scala 483:31] + wire _T_3663 = _T_3661 & _T_3640; // @[lsu_bus_buffer.scala 483:46] + wire _T_3664 = _T_3659 | _T_3663; // @[lsu_bus_buffer.scala 482:143] + wire _T_4839 = io_lsu_axi_b_bits_resp != 2'h0; // @[lsu_bus_buffer.scala 575:66] + wire bus_rsp_write_error = bus_rsp_write & _T_4839; // @[lsu_bus_buffer.scala 575:40] + wire _T_3666 = bus_rsp_write_error & _T_3636; // @[lsu_bus_buffer.scala 484:33] + wire _T_3667 = _T_3664 | _T_3666; // @[lsu_bus_buffer.scala 483:88] + wire _T_3668 = _T_3571 & _T_3667; // @[lsu_bus_buffer.scala 482:68] + wire _GEN_56 = _T_3592 & _T_3668; // @[Conditional.scala 39:67] + wire _GEN_69 = _T_3558 ? _T_3585 : _GEN_56; // @[Conditional.scala 39:67] + wire _GEN_82 = _T_3554 ? 1'h0 : _GEN_69; // @[Conditional.scala 39:67] + wire buf_error_en_0 = _T_3531 ? 1'h0 : _GEN_82; // @[Conditional.scala 40:58] + wire _T_3594 = ~bus_rsp_write_error; // @[lsu_bus_buffer.scala 472:75] + wire _T_3595 = buf_write[0] & _T_3594; // @[lsu_bus_buffer.scala 472:73] + wire _T_3596 = io_dec_tlu_force_halt | _T_3595; // @[lsu_bus_buffer.scala 472:57] + wire _T_3598 = ~buf_samedw_0; // @[lsu_bus_buffer.scala 473:30] + wire _T_3599 = buf_dual_0 & _T_3598; // @[lsu_bus_buffer.scala 473:28] + wire _T_3602 = _T_3599 & _T_3645; // @[lsu_bus_buffer.scala 473:45] + wire [2:0] _GEN_29 = 2'h1 == buf_dualtag_0 ? buf_state_1 : buf_state_0; // @[lsu_bus_buffer.scala 473:90] + wire [2:0] _GEN_30 = 2'h2 == buf_dualtag_0 ? buf_state_2 : _GEN_29; // @[lsu_bus_buffer.scala 473:90] + wire [2:0] _GEN_31 = 2'h3 == buf_dualtag_0 ? buf_state_3 : _GEN_30; // @[lsu_bus_buffer.scala 473:90] + wire _T_3603 = _GEN_31 != 3'h4; // @[lsu_bus_buffer.scala 473:90] + wire _T_3604 = _T_3602 & _T_3603; // @[lsu_bus_buffer.scala 473:61] + wire _T_4489 = _T_2717 | _T_2714; // @[lsu_bus_buffer.scala 536:93] + wire _T_4490 = _T_4489 | _T_2711; // @[lsu_bus_buffer.scala 536:93] + wire any_done_wait_state = _T_4490 | _T_2708; // @[lsu_bus_buffer.scala 536:93] + wire _T_3606 = buf_ldfwd[0] | any_done_wait_state; // @[lsu_bus_buffer.scala 474:31] + wire _T_3612 = buf_dualtag_0 == 2'h0; // @[lsu_bus_buffer.scala 61:118] + wire _T_3614 = buf_dualtag_0 == 2'h1; // @[lsu_bus_buffer.scala 61:118] + wire _T_3616 = buf_dualtag_0 == 2'h2; // @[lsu_bus_buffer.scala 61:118] + wire _T_3618 = buf_dualtag_0 == 2'h3; // @[lsu_bus_buffer.scala 61:118] + wire _T_3620 = _T_3612 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_3621 = _T_3614 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_3622 = _T_3616 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_3623 = _T_3618 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_3624 = _T_3620 | _T_3621; // @[Mux.scala 27:72] + wire _T_3625 = _T_3624 | _T_3622; // @[Mux.scala 27:72] + wire _T_3626 = _T_3625 | _T_3623; // @[Mux.scala 27:72] + wire _T_3628 = _T_3602 & _T_3626; // @[lsu_bus_buffer.scala 474:101] + wire _T_3629 = _GEN_31 == 3'h4; // @[lsu_bus_buffer.scala 474:167] + wire _T_3630 = _T_3628 & _T_3629; // @[lsu_bus_buffer.scala 474:138] + wire _T_3631 = _T_3630 & any_done_wait_state; // @[lsu_bus_buffer.scala 474:187] + wire _T_3632 = _T_3606 | _T_3631; // @[lsu_bus_buffer.scala 474:53] + wire _T_3655 = buf_state_bus_en_0 & bus_rsp_read; // @[lsu_bus_buffer.scala 481:47] + wire _T_3656 = _T_3655 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 481:62] + wire _T_3669 = ~buf_error_en_0; // @[lsu_bus_buffer.scala 485:50] + wire _T_3670 = buf_state_en_0 & _T_3669; // @[lsu_bus_buffer.scala 485:48] + wire _T_3682 = buf_ldfwd[0] | _T_3687[0]; // @[lsu_bus_buffer.scala 490:90] + wire _T_3683 = _T_3682 | any_done_wait_state; // @[lsu_bus_buffer.scala 490:118] + wire _GEN_39 = _T_3703 ? buf_state_en_0 : io_dec_tlu_force_halt; // @[Conditional.scala 39:67] + wire _GEN_43 = _T_3695 ? io_dec_tlu_force_halt : _T_3703; // @[Conditional.scala 39:67] + wire _GEN_44 = _T_3695 ? io_dec_tlu_force_halt : _GEN_39; // @[Conditional.scala 39:67] + wire _GEN_49 = _T_3677 ? io_dec_tlu_force_halt : _GEN_43; // @[Conditional.scala 39:67] + wire _GEN_50 = _T_3677 ? io_dec_tlu_force_halt : _GEN_44; // @[Conditional.scala 39:67] + wire _GEN_55 = _T_3592 & _T_3656; // @[Conditional.scala 39:67] + wire _GEN_59 = _T_3592 ? io_dec_tlu_force_halt : _GEN_49; // @[Conditional.scala 39:67] + wire _GEN_60 = _T_3592 ? io_dec_tlu_force_halt : _GEN_50; // @[Conditional.scala 39:67] + wire _GEN_66 = _T_3558 ? _T_3578 : _GEN_60; // @[Conditional.scala 39:67] + wire _GEN_68 = _T_3558 ? _T_3582 : _GEN_55; // @[Conditional.scala 39:67] + wire _GEN_71 = _T_3558 ? io_dec_tlu_force_halt : _GEN_59; // @[Conditional.scala 39:67] + wire _GEN_76 = _T_3554 ? io_dec_tlu_force_halt : _GEN_71; // @[Conditional.scala 39:67] + wire _GEN_79 = _T_3554 ? io_dec_tlu_force_halt : _GEN_66; // @[Conditional.scala 39:67] + wire _GEN_81 = _T_3554 ? 1'h0 : _GEN_68; // @[Conditional.scala 39:67] + wire buf_wr_en_0 = _T_3531 & buf_state_en_0; // @[Conditional.scala 40:58] + wire buf_data_en_0 = _T_3531 ? buf_state_en_0 : _GEN_81; // @[Conditional.scala 40:58] + wire buf_rst_0 = _T_3531 ? io_dec_tlu_force_halt : _GEN_76; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_0 = _T_3531 ? io_dec_tlu_force_halt : _GEN_79; // @[Conditional.scala 40:58] + wire _T_3766 = buf_state_en_1 & _T_3836; // @[lsu_bus_buffer.scala 464:44] + wire _T_3767 = _T_3766 & obuf_nosend; // @[lsu_bus_buffer.scala 464:60] + wire _T_3769 = _T_3767 & _T_2594; // @[lsu_bus_buffer.scala 464:74] + wire _T_3772 = _T_3762 & obuf_nosend; // @[lsu_bus_buffer.scala 466:67] + wire _T_3773 = _T_3772 & bus_rsp_read; // @[lsu_bus_buffer.scala 466:81] + wire _T_3776 = _T_3772 & bus_rsp_read_error; // @[lsu_bus_buffer.scala 467:82] + wire _T_3850 = bus_rsp_read_error & _T_3829; // @[lsu_bus_buffer.scala 482:91] + wire _T_3852 = bus_rsp_read_error & buf_ldfwd[1]; // @[lsu_bus_buffer.scala 483:31] + wire _T_3854 = _T_3852 & _T_3831; // @[lsu_bus_buffer.scala 483:46] + wire _T_3855 = _T_3850 | _T_3854; // @[lsu_bus_buffer.scala 482:143] + wire _T_3857 = bus_rsp_write_error & _T_3827; // @[lsu_bus_buffer.scala 484:33] + wire _T_3858 = _T_3855 | _T_3857; // @[lsu_bus_buffer.scala 483:88] + wire _T_3859 = _T_3762 & _T_3858; // @[lsu_bus_buffer.scala 482:68] + wire _GEN_132 = _T_3783 & _T_3859; // @[Conditional.scala 39:67] + wire _GEN_145 = _T_3749 ? _T_3776 : _GEN_132; // @[Conditional.scala 39:67] + wire _GEN_158 = _T_3745 ? 1'h0 : _GEN_145; // @[Conditional.scala 39:67] + wire buf_error_en_1 = _T_3722 ? 1'h0 : _GEN_158; // @[Conditional.scala 40:58] + wire _T_3786 = buf_write[1] & _T_3594; // @[lsu_bus_buffer.scala 472:73] + wire _T_3787 = io_dec_tlu_force_halt | _T_3786; // @[lsu_bus_buffer.scala 472:57] + wire _T_3789 = ~buf_samedw_1; // @[lsu_bus_buffer.scala 473:30] + wire _T_3790 = buf_dual_1 & _T_3789; // @[lsu_bus_buffer.scala 473:28] + wire _T_3793 = _T_3790 & _T_3836; // @[lsu_bus_buffer.scala 473:45] + wire [2:0] _GEN_105 = 2'h1 == buf_dualtag_1 ? buf_state_1 : buf_state_0; // @[lsu_bus_buffer.scala 473:90] + wire [2:0] _GEN_106 = 2'h2 == buf_dualtag_1 ? buf_state_2 : _GEN_105; // @[lsu_bus_buffer.scala 473:90] + wire [2:0] _GEN_107 = 2'h3 == buf_dualtag_1 ? buf_state_3 : _GEN_106; // @[lsu_bus_buffer.scala 473:90] + wire _T_3794 = _GEN_107 != 3'h4; // @[lsu_bus_buffer.scala 473:90] + wire _T_3795 = _T_3793 & _T_3794; // @[lsu_bus_buffer.scala 473:61] + wire _T_3797 = buf_ldfwd[1] | any_done_wait_state; // @[lsu_bus_buffer.scala 474:31] + wire _T_3803 = buf_dualtag_1 == 2'h0; // @[lsu_bus_buffer.scala 61:118] + wire _T_3805 = buf_dualtag_1 == 2'h1; // @[lsu_bus_buffer.scala 61:118] + wire _T_3807 = buf_dualtag_1 == 2'h2; // @[lsu_bus_buffer.scala 61:118] + wire _T_3809 = buf_dualtag_1 == 2'h3; // @[lsu_bus_buffer.scala 61:118] + wire _T_3811 = _T_3803 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_3812 = _T_3805 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_3813 = _T_3807 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_3814 = _T_3809 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_3815 = _T_3811 | _T_3812; // @[Mux.scala 27:72] + wire _T_3816 = _T_3815 | _T_3813; // @[Mux.scala 27:72] + wire _T_3817 = _T_3816 | _T_3814; // @[Mux.scala 27:72] + wire _T_3819 = _T_3793 & _T_3817; // @[lsu_bus_buffer.scala 474:101] + wire _T_3820 = _GEN_107 == 3'h4; // @[lsu_bus_buffer.scala 474:167] + wire _T_3821 = _T_3819 & _T_3820; // @[lsu_bus_buffer.scala 474:138] + wire _T_3822 = _T_3821 & any_done_wait_state; // @[lsu_bus_buffer.scala 474:187] + wire _T_3823 = _T_3797 | _T_3822; // @[lsu_bus_buffer.scala 474:53] + wire _T_3846 = buf_state_bus_en_1 & bus_rsp_read; // @[lsu_bus_buffer.scala 481:47] + wire _T_3847 = _T_3846 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 481:62] + wire _T_3860 = ~buf_error_en_1; // @[lsu_bus_buffer.scala 485:50] + wire _T_3861 = buf_state_en_1 & _T_3860; // @[lsu_bus_buffer.scala 485:48] + wire _T_3873 = buf_ldfwd[1] | _T_3878[0]; // @[lsu_bus_buffer.scala 490:90] + wire _T_3874 = _T_3873 | any_done_wait_state; // @[lsu_bus_buffer.scala 490:118] + wire _GEN_115 = _T_3894 ? buf_state_en_1 : io_dec_tlu_force_halt; // @[Conditional.scala 39:67] + wire _GEN_119 = _T_3886 ? io_dec_tlu_force_halt : _T_3894; // @[Conditional.scala 39:67] + wire _GEN_120 = _T_3886 ? io_dec_tlu_force_halt : _GEN_115; // @[Conditional.scala 39:67] + wire _GEN_125 = _T_3868 ? io_dec_tlu_force_halt : _GEN_119; // @[Conditional.scala 39:67] + wire _GEN_126 = _T_3868 ? io_dec_tlu_force_halt : _GEN_120; // @[Conditional.scala 39:67] + wire _GEN_131 = _T_3783 & _T_3847; // @[Conditional.scala 39:67] + wire _GEN_135 = _T_3783 ? io_dec_tlu_force_halt : _GEN_125; // @[Conditional.scala 39:67] + wire _GEN_136 = _T_3783 ? io_dec_tlu_force_halt : _GEN_126; // @[Conditional.scala 39:67] + wire _GEN_142 = _T_3749 ? _T_3769 : _GEN_136; // @[Conditional.scala 39:67] + wire _GEN_144 = _T_3749 ? _T_3773 : _GEN_131; // @[Conditional.scala 39:67] + wire _GEN_147 = _T_3749 ? io_dec_tlu_force_halt : _GEN_135; // @[Conditional.scala 39:67] + wire _GEN_152 = _T_3745 ? io_dec_tlu_force_halt : _GEN_147; // @[Conditional.scala 39:67] + wire _GEN_155 = _T_3745 ? io_dec_tlu_force_halt : _GEN_142; // @[Conditional.scala 39:67] + wire _GEN_157 = _T_3745 ? 1'h0 : _GEN_144; // @[Conditional.scala 39:67] + wire buf_wr_en_1 = _T_3722 & buf_state_en_1; // @[Conditional.scala 40:58] + wire buf_data_en_1 = _T_3722 ? buf_state_en_1 : _GEN_157; // @[Conditional.scala 40:58] + wire buf_rst_1 = _T_3722 ? io_dec_tlu_force_halt : _GEN_152; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_1 = _T_3722 ? io_dec_tlu_force_halt : _GEN_155; // @[Conditional.scala 40:58] + wire _T_3957 = buf_state_en_2 & _T_4027; // @[lsu_bus_buffer.scala 464:44] + wire _T_3958 = _T_3957 & obuf_nosend; // @[lsu_bus_buffer.scala 464:60] + wire _T_3960 = _T_3958 & _T_2594; // @[lsu_bus_buffer.scala 464:74] + wire _T_3963 = _T_3953 & obuf_nosend; // @[lsu_bus_buffer.scala 466:67] + wire _T_3964 = _T_3963 & bus_rsp_read; // @[lsu_bus_buffer.scala 466:81] + wire _T_3967 = _T_3963 & bus_rsp_read_error; // @[lsu_bus_buffer.scala 467:82] + wire _T_4041 = bus_rsp_read_error & _T_4020; // @[lsu_bus_buffer.scala 482:91] + wire _T_4043 = bus_rsp_read_error & buf_ldfwd[2]; // @[lsu_bus_buffer.scala 483:31] + wire _T_4045 = _T_4043 & _T_4022; // @[lsu_bus_buffer.scala 483:46] + wire _T_4046 = _T_4041 | _T_4045; // @[lsu_bus_buffer.scala 482:143] + wire _T_4048 = bus_rsp_write_error & _T_4018; // @[lsu_bus_buffer.scala 484:33] + wire _T_4049 = _T_4046 | _T_4048; // @[lsu_bus_buffer.scala 483:88] + wire _T_4050 = _T_3953 & _T_4049; // @[lsu_bus_buffer.scala 482:68] + wire _GEN_208 = _T_3974 & _T_4050; // @[Conditional.scala 39:67] + wire _GEN_221 = _T_3940 ? _T_3967 : _GEN_208; // @[Conditional.scala 39:67] + wire _GEN_234 = _T_3936 ? 1'h0 : _GEN_221; // @[Conditional.scala 39:67] + wire buf_error_en_2 = _T_3913 ? 1'h0 : _GEN_234; // @[Conditional.scala 40:58] + wire _T_3977 = buf_write[2] & _T_3594; // @[lsu_bus_buffer.scala 472:73] + wire _T_3978 = io_dec_tlu_force_halt | _T_3977; // @[lsu_bus_buffer.scala 472:57] + wire _T_3980 = ~buf_samedw_2; // @[lsu_bus_buffer.scala 473:30] + wire _T_3981 = buf_dual_2 & _T_3980; // @[lsu_bus_buffer.scala 473:28] + wire _T_3984 = _T_3981 & _T_4027; // @[lsu_bus_buffer.scala 473:45] + wire [2:0] _GEN_181 = 2'h1 == buf_dualtag_2 ? buf_state_1 : buf_state_0; // @[lsu_bus_buffer.scala 473:90] + wire [2:0] _GEN_182 = 2'h2 == buf_dualtag_2 ? buf_state_2 : _GEN_181; // @[lsu_bus_buffer.scala 473:90] + wire [2:0] _GEN_183 = 2'h3 == buf_dualtag_2 ? buf_state_3 : _GEN_182; // @[lsu_bus_buffer.scala 473:90] + wire _T_3985 = _GEN_183 != 3'h4; // @[lsu_bus_buffer.scala 473:90] + wire _T_3986 = _T_3984 & _T_3985; // @[lsu_bus_buffer.scala 473:61] + wire _T_3988 = buf_ldfwd[2] | any_done_wait_state; // @[lsu_bus_buffer.scala 474:31] + wire _T_3994 = buf_dualtag_2 == 2'h0; // @[lsu_bus_buffer.scala 61:118] + wire _T_3996 = buf_dualtag_2 == 2'h1; // @[lsu_bus_buffer.scala 61:118] + wire _T_3998 = buf_dualtag_2 == 2'h2; // @[lsu_bus_buffer.scala 61:118] + wire _T_4000 = buf_dualtag_2 == 2'h3; // @[lsu_bus_buffer.scala 61:118] + wire _T_4002 = _T_3994 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_4003 = _T_3996 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_4004 = _T_3998 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_4005 = _T_4000 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_4006 = _T_4002 | _T_4003; // @[Mux.scala 27:72] + wire _T_4007 = _T_4006 | _T_4004; // @[Mux.scala 27:72] + wire _T_4008 = _T_4007 | _T_4005; // @[Mux.scala 27:72] + wire _T_4010 = _T_3984 & _T_4008; // @[lsu_bus_buffer.scala 474:101] + wire _T_4011 = _GEN_183 == 3'h4; // @[lsu_bus_buffer.scala 474:167] + wire _T_4012 = _T_4010 & _T_4011; // @[lsu_bus_buffer.scala 474:138] + wire _T_4013 = _T_4012 & any_done_wait_state; // @[lsu_bus_buffer.scala 474:187] + wire _T_4014 = _T_3988 | _T_4013; // @[lsu_bus_buffer.scala 474:53] + wire _T_4037 = buf_state_bus_en_2 & bus_rsp_read; // @[lsu_bus_buffer.scala 481:47] + wire _T_4038 = _T_4037 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 481:62] + wire _T_4051 = ~buf_error_en_2; // @[lsu_bus_buffer.scala 485:50] + wire _T_4052 = buf_state_en_2 & _T_4051; // @[lsu_bus_buffer.scala 485:48] + wire _T_4064 = buf_ldfwd[2] | _T_4069[0]; // @[lsu_bus_buffer.scala 490:90] + wire _T_4065 = _T_4064 | any_done_wait_state; // @[lsu_bus_buffer.scala 490:118] + wire _GEN_191 = _T_4085 ? buf_state_en_2 : io_dec_tlu_force_halt; // @[Conditional.scala 39:67] + wire _GEN_195 = _T_4077 ? io_dec_tlu_force_halt : _T_4085; // @[Conditional.scala 39:67] + wire _GEN_196 = _T_4077 ? io_dec_tlu_force_halt : _GEN_191; // @[Conditional.scala 39:67] + wire _GEN_201 = _T_4059 ? io_dec_tlu_force_halt : _GEN_195; // @[Conditional.scala 39:67] + wire _GEN_202 = _T_4059 ? io_dec_tlu_force_halt : _GEN_196; // @[Conditional.scala 39:67] + wire _GEN_207 = _T_3974 & _T_4038; // @[Conditional.scala 39:67] + wire _GEN_211 = _T_3974 ? io_dec_tlu_force_halt : _GEN_201; // @[Conditional.scala 39:67] + wire _GEN_212 = _T_3974 ? io_dec_tlu_force_halt : _GEN_202; // @[Conditional.scala 39:67] + wire _GEN_218 = _T_3940 ? _T_3960 : _GEN_212; // @[Conditional.scala 39:67] + wire _GEN_220 = _T_3940 ? _T_3964 : _GEN_207; // @[Conditional.scala 39:67] + wire _GEN_223 = _T_3940 ? io_dec_tlu_force_halt : _GEN_211; // @[Conditional.scala 39:67] + wire _GEN_228 = _T_3936 ? io_dec_tlu_force_halt : _GEN_223; // @[Conditional.scala 39:67] + wire _GEN_231 = _T_3936 ? io_dec_tlu_force_halt : _GEN_218; // @[Conditional.scala 39:67] + wire _GEN_233 = _T_3936 ? 1'h0 : _GEN_220; // @[Conditional.scala 39:67] + wire buf_wr_en_2 = _T_3913 & buf_state_en_2; // @[Conditional.scala 40:58] + wire buf_data_en_2 = _T_3913 ? buf_state_en_2 : _GEN_233; // @[Conditional.scala 40:58] + wire buf_rst_2 = _T_3913 ? io_dec_tlu_force_halt : _GEN_228; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_2 = _T_3913 ? io_dec_tlu_force_halt : _GEN_231; // @[Conditional.scala 40:58] + wire _T_4148 = buf_state_en_3 & _T_4218; // @[lsu_bus_buffer.scala 464:44] + wire _T_4149 = _T_4148 & obuf_nosend; // @[lsu_bus_buffer.scala 464:60] + wire _T_4151 = _T_4149 & _T_2594; // @[lsu_bus_buffer.scala 464:74] + wire _T_4154 = _T_4144 & obuf_nosend; // @[lsu_bus_buffer.scala 466:67] + wire _T_4155 = _T_4154 & bus_rsp_read; // @[lsu_bus_buffer.scala 466:81] + wire _T_4158 = _T_4154 & bus_rsp_read_error; // @[lsu_bus_buffer.scala 467:82] + wire _T_4232 = bus_rsp_read_error & _T_4211; // @[lsu_bus_buffer.scala 482:91] + wire _T_4234 = bus_rsp_read_error & buf_ldfwd[3]; // @[lsu_bus_buffer.scala 483:31] + wire _T_4236 = _T_4234 & _T_4213; // @[lsu_bus_buffer.scala 483:46] + wire _T_4237 = _T_4232 | _T_4236; // @[lsu_bus_buffer.scala 482:143] + wire _T_4239 = bus_rsp_write_error & _T_4209; // @[lsu_bus_buffer.scala 484:33] + wire _T_4240 = _T_4237 | _T_4239; // @[lsu_bus_buffer.scala 483:88] + wire _T_4241 = _T_4144 & _T_4240; // @[lsu_bus_buffer.scala 482:68] + wire _GEN_284 = _T_4165 & _T_4241; // @[Conditional.scala 39:67] + wire _GEN_297 = _T_4131 ? _T_4158 : _GEN_284; // @[Conditional.scala 39:67] + wire _GEN_310 = _T_4127 ? 1'h0 : _GEN_297; // @[Conditional.scala 39:67] + wire buf_error_en_3 = _T_4104 ? 1'h0 : _GEN_310; // @[Conditional.scala 40:58] + wire _T_4168 = buf_write[3] & _T_3594; // @[lsu_bus_buffer.scala 472:73] + wire _T_4169 = io_dec_tlu_force_halt | _T_4168; // @[lsu_bus_buffer.scala 472:57] + wire _T_4171 = ~buf_samedw_3; // @[lsu_bus_buffer.scala 473:30] + wire _T_4172 = buf_dual_3 & _T_4171; // @[lsu_bus_buffer.scala 473:28] + wire _T_4175 = _T_4172 & _T_4218; // @[lsu_bus_buffer.scala 473:45] + wire [2:0] _GEN_257 = 2'h1 == buf_dualtag_3 ? buf_state_1 : buf_state_0; // @[lsu_bus_buffer.scala 473:90] + wire [2:0] _GEN_258 = 2'h2 == buf_dualtag_3 ? buf_state_2 : _GEN_257; // @[lsu_bus_buffer.scala 473:90] + wire [2:0] _GEN_259 = 2'h3 == buf_dualtag_3 ? buf_state_3 : _GEN_258; // @[lsu_bus_buffer.scala 473:90] + wire _T_4176 = _GEN_259 != 3'h4; // @[lsu_bus_buffer.scala 473:90] + wire _T_4177 = _T_4175 & _T_4176; // @[lsu_bus_buffer.scala 473:61] + wire _T_4179 = buf_ldfwd[3] | any_done_wait_state; // @[lsu_bus_buffer.scala 474:31] + wire _T_4185 = buf_dualtag_3 == 2'h0; // @[lsu_bus_buffer.scala 61:118] + wire _T_4187 = buf_dualtag_3 == 2'h1; // @[lsu_bus_buffer.scala 61:118] + wire _T_4189 = buf_dualtag_3 == 2'h2; // @[lsu_bus_buffer.scala 61:118] + wire _T_4191 = buf_dualtag_3 == 2'h3; // @[lsu_bus_buffer.scala 61:118] + wire _T_4193 = _T_4185 & buf_ldfwd[0]; // @[Mux.scala 27:72] + wire _T_4194 = _T_4187 & buf_ldfwd[1]; // @[Mux.scala 27:72] + wire _T_4195 = _T_4189 & buf_ldfwd[2]; // @[Mux.scala 27:72] + wire _T_4196 = _T_4191 & buf_ldfwd[3]; // @[Mux.scala 27:72] + wire _T_4197 = _T_4193 | _T_4194; // @[Mux.scala 27:72] + wire _T_4198 = _T_4197 | _T_4195; // @[Mux.scala 27:72] + wire _T_4199 = _T_4198 | _T_4196; // @[Mux.scala 27:72] + wire _T_4201 = _T_4175 & _T_4199; // @[lsu_bus_buffer.scala 474:101] + wire _T_4202 = _GEN_259 == 3'h4; // @[lsu_bus_buffer.scala 474:167] + wire _T_4203 = _T_4201 & _T_4202; // @[lsu_bus_buffer.scala 474:138] + wire _T_4204 = _T_4203 & any_done_wait_state; // @[lsu_bus_buffer.scala 474:187] + wire _T_4205 = _T_4179 | _T_4204; // @[lsu_bus_buffer.scala 474:53] + wire _T_4228 = buf_state_bus_en_3 & bus_rsp_read; // @[lsu_bus_buffer.scala 481:47] + wire _T_4229 = _T_4228 & io_lsu_bus_clk_en; // @[lsu_bus_buffer.scala 481:62] + wire _T_4242 = ~buf_error_en_3; // @[lsu_bus_buffer.scala 485:50] + wire _T_4243 = buf_state_en_3 & _T_4242; // @[lsu_bus_buffer.scala 485:48] + wire _T_4255 = buf_ldfwd[3] | _T_4260[0]; // @[lsu_bus_buffer.scala 490:90] + wire _T_4256 = _T_4255 | any_done_wait_state; // @[lsu_bus_buffer.scala 490:118] + wire _GEN_267 = _T_4276 ? buf_state_en_3 : io_dec_tlu_force_halt; // @[Conditional.scala 39:67] + wire _GEN_271 = _T_4268 ? io_dec_tlu_force_halt : _T_4276; // @[Conditional.scala 39:67] + wire _GEN_272 = _T_4268 ? io_dec_tlu_force_halt : _GEN_267; // @[Conditional.scala 39:67] + wire _GEN_277 = _T_4250 ? io_dec_tlu_force_halt : _GEN_271; // @[Conditional.scala 39:67] + wire _GEN_278 = _T_4250 ? io_dec_tlu_force_halt : _GEN_272; // @[Conditional.scala 39:67] + wire _GEN_283 = _T_4165 & _T_4229; // @[Conditional.scala 39:67] + wire _GEN_287 = _T_4165 ? io_dec_tlu_force_halt : _GEN_277; // @[Conditional.scala 39:67] + wire _GEN_288 = _T_4165 ? io_dec_tlu_force_halt : _GEN_278; // @[Conditional.scala 39:67] + wire _GEN_294 = _T_4131 ? _T_4151 : _GEN_288; // @[Conditional.scala 39:67] + wire _GEN_296 = _T_4131 ? _T_4155 : _GEN_283; // @[Conditional.scala 39:67] + wire _GEN_299 = _T_4131 ? io_dec_tlu_force_halt : _GEN_287; // @[Conditional.scala 39:67] + wire _GEN_304 = _T_4127 ? io_dec_tlu_force_halt : _GEN_299; // @[Conditional.scala 39:67] + wire _GEN_307 = _T_4127 ? io_dec_tlu_force_halt : _GEN_294; // @[Conditional.scala 39:67] + wire _GEN_309 = _T_4127 ? 1'h0 : _GEN_296; // @[Conditional.scala 39:67] + wire buf_wr_en_3 = _T_4104 & buf_state_en_3; // @[Conditional.scala 40:58] + wire buf_data_en_3 = _T_4104 ? buf_state_en_3 : _GEN_309; // @[Conditional.scala 40:58] + wire buf_rst_3 = _T_4104 ? io_dec_tlu_force_halt : _GEN_304; // @[Conditional.scala 40:58] + wire buf_ldfwd_en_3 = _T_4104 ? io_dec_tlu_force_halt : _GEN_307; // @[Conditional.scala 40:58] + reg _T_4331; // @[Reg.scala 27:20] + reg _T_4334; // @[Reg.scala 27:20] + reg _T_4337; // @[Reg.scala 27:20] + reg _T_4340; // @[Reg.scala 27:20] + wire [3:0] buf_unsign = {_T_4340,_T_4337,_T_4334,_T_4331}; // @[Cat.scala 29:58] + wire _T_4387 = ~buf_rst_0; // @[lsu_bus_buffer.scala 531:81] + reg _T_4406; // @[lsu_bus_buffer.scala 531:80] + reg _T_4401; // @[lsu_bus_buffer.scala 531:80] + reg _T_4396; // @[lsu_bus_buffer.scala 531:80] + reg _T_4391; // @[lsu_bus_buffer.scala 531:80] + wire [3:0] buf_error = {_T_4406,_T_4401,_T_4396,_T_4391}; // @[Cat.scala 29:58] + wire _T_4389 = buf_error_en_0 | buf_error[0]; // @[lsu_bus_buffer.scala 531:98] + wire _T_4392 = ~buf_rst_1; // @[lsu_bus_buffer.scala 531:81] + wire _T_4394 = buf_error_en_1 | buf_error[1]; // @[lsu_bus_buffer.scala 531:98] + wire _T_4397 = ~buf_rst_2; // @[lsu_bus_buffer.scala 531:81] + wire _T_4399 = buf_error_en_2 | buf_error[2]; // @[lsu_bus_buffer.scala 531:98] + wire _T_4402 = ~buf_rst_3; // @[lsu_bus_buffer.scala 531:81] + wire _T_4404 = buf_error_en_3 | buf_error[3]; // @[lsu_bus_buffer.scala 531:98] + wire [1:0] _T_4410 = {io_lsu_busreq_m,1'h0}; // @[Cat.scala 29:58] + wire [1:0] _T_4411 = io_ldst_dual_m ? _T_4410 : {{1'd0}, io_lsu_busreq_m}; // @[lsu_bus_buffer.scala 532:28] + wire [1:0] _T_4412 = {io_lsu_busreq_r,1'h0}; // @[Cat.scala 29:58] + wire [1:0] _T_4413 = io_ldst_dual_r ? _T_4412 : {{1'd0}, io_lsu_busreq_r}; // @[lsu_bus_buffer.scala 532:94] + wire [2:0] _T_4414 = _T_4411 + _T_4413; // @[lsu_bus_buffer.scala 532:88] + wire [2:0] _GEN_406 = {{2'd0}, ibuf_valid}; // @[lsu_bus_buffer.scala 532:154] + wire [3:0] _T_4415 = _T_4414 + _GEN_406; // @[lsu_bus_buffer.scala 532:154] + wire [1:0] _T_4420 = _T_5 + _T_12; // @[lsu_bus_buffer.scala 532:217] + wire [1:0] _GEN_407 = {{1'd0}, _T_19}; // @[lsu_bus_buffer.scala 532:217] + wire [2:0] _T_4421 = _T_4420 + _GEN_407; // @[lsu_bus_buffer.scala 532:217] + wire [2:0] _GEN_408 = {{2'd0}, _T_26}; // @[lsu_bus_buffer.scala 532:217] + wire [3:0] _T_4422 = _T_4421 + _GEN_408; // @[lsu_bus_buffer.scala 532:217] + wire [3:0] buf_numvld_any = _T_4415 + _T_4422; // @[lsu_bus_buffer.scala 532:169] + wire _T_4493 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[lsu_bus_buffer.scala 538:52] + wire _T_4494 = buf_numvld_any >= 4'h3; // @[lsu_bus_buffer.scala 538:92] + wire _T_4495 = buf_numvld_any == 4'h4; // @[lsu_bus_buffer.scala 538:121] + wire _T_4497 = |buf_state_0; // @[lsu_bus_buffer.scala 539:52] + wire _T_4498 = |buf_state_1; // @[lsu_bus_buffer.scala 539:52] + wire _T_4499 = |buf_state_2; // @[lsu_bus_buffer.scala 539:52] + wire _T_4500 = |buf_state_3; // @[lsu_bus_buffer.scala 539:52] + wire _T_4501 = _T_4497 | _T_4498; // @[lsu_bus_buffer.scala 539:65] + wire _T_4502 = _T_4501 | _T_4499; // @[lsu_bus_buffer.scala 539:65] + wire _T_4503 = _T_4502 | _T_4500; // @[lsu_bus_buffer.scala 539:65] + wire _T_4504 = ~_T_4503; // @[lsu_bus_buffer.scala 539:34] + wire _T_4506 = _T_4504 & _T_852; // @[lsu_bus_buffer.scala 539:70] + wire _T_4509 = io_lsu_busreq_m & io_lsu_pkt_m_valid; // @[lsu_bus_buffer.scala 541:64] + wire _T_4510 = _T_4509 & io_lsu_pkt_m_bits_load; // @[lsu_bus_buffer.scala 541:85] + wire _T_4511 = ~io_flush_m_up; // @[lsu_bus_buffer.scala 541:112] + wire _T_4512 = _T_4510 & _T_4511; // @[lsu_bus_buffer.scala 541:110] + wire _T_4513 = ~io_ld_full_hit_m; // @[lsu_bus_buffer.scala 541:129] + wire _T_4515 = ~io_lsu_commit_r; // @[lsu_bus_buffer.scala 544:74] + reg lsu_nonblock_load_valid_r; // @[lsu_bus_buffer.scala 629:66] + wire _T_4529 = _T_2770 & _T_3645; // @[Mux.scala 27:72] + wire _T_4530 = _T_2792 & _T_3836; // @[Mux.scala 27:72] + wire _T_4531 = _T_2814 & _T_4027; // @[Mux.scala 27:72] + wire _T_4532 = _T_2836 & _T_4218; // @[Mux.scala 27:72] + wire _T_4533 = _T_4529 | _T_4530; // @[Mux.scala 27:72] + wire _T_4534 = _T_4533 | _T_4531; // @[Mux.scala 27:72] + wire lsu_nonblock_load_data_ready = _T_4534 | _T_4532; // @[Mux.scala 27:72] + wire _T_4540 = buf_error[0] & _T_3645; // @[lsu_bus_buffer.scala 547:121] + wire _T_4545 = buf_error[1] & _T_3836; // @[lsu_bus_buffer.scala 547:121] + wire _T_4550 = buf_error[2] & _T_4027; // @[lsu_bus_buffer.scala 547:121] + wire _T_4555 = buf_error[3] & _T_4218; // @[lsu_bus_buffer.scala 547:121] + wire _T_4556 = _T_2770 & _T_4540; // @[Mux.scala 27:72] + wire _T_4557 = _T_2792 & _T_4545; // @[Mux.scala 27:72] + wire _T_4558 = _T_2814 & _T_4550; // @[Mux.scala 27:72] + wire _T_4559 = _T_2836 & _T_4555; // @[Mux.scala 27:72] + wire _T_4560 = _T_4556 | _T_4557; // @[Mux.scala 27:72] + wire _T_4561 = _T_4560 | _T_4558; // @[Mux.scala 27:72] + wire _T_4568 = ~buf_dual_0; // @[lsu_bus_buffer.scala 548:121] + wire _T_4569 = ~buf_dualhi_0; // @[lsu_bus_buffer.scala 548:136] + wire _T_4570 = _T_4568 | _T_4569; // @[lsu_bus_buffer.scala 548:134] + wire _T_4571 = _T_4529 & _T_4570; // @[lsu_bus_buffer.scala 548:118] + wire _T_4576 = ~buf_dual_1; // @[lsu_bus_buffer.scala 548:121] + wire _T_4577 = ~buf_dualhi_1; // @[lsu_bus_buffer.scala 548:136] + wire _T_4578 = _T_4576 | _T_4577; // @[lsu_bus_buffer.scala 548:134] + wire _T_4579 = _T_4530 & _T_4578; // @[lsu_bus_buffer.scala 548:118] + wire _T_4584 = ~buf_dual_2; // @[lsu_bus_buffer.scala 548:121] + wire _T_4585 = ~buf_dualhi_2; // @[lsu_bus_buffer.scala 548:136] + wire _T_4586 = _T_4584 | _T_4585; // @[lsu_bus_buffer.scala 548:134] + wire _T_4587 = _T_4531 & _T_4586; // @[lsu_bus_buffer.scala 548:118] + wire _T_4592 = ~buf_dual_3; // @[lsu_bus_buffer.scala 548:121] + wire _T_4593 = ~buf_dualhi_3; // @[lsu_bus_buffer.scala 548:136] + wire _T_4594 = _T_4592 | _T_4593; // @[lsu_bus_buffer.scala 548:134] + wire _T_4595 = _T_4532 & _T_4594; // @[lsu_bus_buffer.scala 548:118] + wire [1:0] _T_4598 = _T_4587 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4599 = _T_4595 ? 2'h3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _GEN_409 = {{1'd0}, _T_4579}; // @[Mux.scala 27:72] + wire [1:0] _T_4601 = _GEN_409 | _T_4598; // @[Mux.scala 27:72] + wire [31:0] _T_4636 = _T_4571 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4637 = _T_4579 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4638 = _T_4587 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4639 = _T_4595 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4640 = _T_4636 | _T_4637; // @[Mux.scala 27:72] + wire [31:0] _T_4641 = _T_4640 | _T_4638; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_lo = _T_4641 | _T_4639; // @[Mux.scala 27:72] + wire _T_4648 = _T_4529 & _T_3643; // @[lsu_bus_buffer.scala 550:105] + wire _T_4654 = _T_4530 & _T_3834; // @[lsu_bus_buffer.scala 550:105] + wire _T_4660 = _T_4531 & _T_4025; // @[lsu_bus_buffer.scala 550:105] + wire _T_4666 = _T_4532 & _T_4216; // @[lsu_bus_buffer.scala 550:105] + wire [31:0] _T_4667 = _T_4648 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4668 = _T_4654 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4669 = _T_4660 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4670 = _T_4666 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4671 = _T_4667 | _T_4668; // @[Mux.scala 27:72] + wire [31:0] _T_4672 = _T_4671 | _T_4669; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_hi = _T_4672 | _T_4670; // @[Mux.scala 27:72] + wire _T_4674 = io_dctl_busbuff_lsu_nonblock_load_data_tag == 2'h0; // @[lsu_bus_buffer.scala 62:123] + wire _T_4675 = io_dctl_busbuff_lsu_nonblock_load_data_tag == 2'h1; // @[lsu_bus_buffer.scala 62:123] + wire _T_4676 = io_dctl_busbuff_lsu_nonblock_load_data_tag == 2'h2; // @[lsu_bus_buffer.scala 62:123] + wire _T_4677 = io_dctl_busbuff_lsu_nonblock_load_data_tag == 2'h3; // @[lsu_bus_buffer.scala 62:123] + wire [31:0] _T_4678 = _T_4674 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4679 = _T_4675 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4680 = _T_4676 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4681 = _T_4677 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4682 = _T_4678 | _T_4679; // @[Mux.scala 27:72] + wire [31:0] _T_4683 = _T_4682 | _T_4680; // @[Mux.scala 27:72] + wire [31:0] _T_4684 = _T_4683 | _T_4681; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_addr_offset = _T_4684[1:0]; // @[lsu_bus_buffer.scala 551:96] + wire [1:0] _T_4690 = _T_4674 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4691 = _T_4675 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4692 = _T_4676 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4693 = _T_4677 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4694 = _T_4690 | _T_4691; // @[Mux.scala 27:72] + wire [1:0] _T_4695 = _T_4694 | _T_4692; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_sz = _T_4695 | _T_4693; // @[Mux.scala 27:72] + wire _T_4705 = _T_4674 & buf_unsign[0]; // @[Mux.scala 27:72] + wire _T_4706 = _T_4675 & buf_unsign[1]; // @[Mux.scala 27:72] + wire _T_4707 = _T_4676 & buf_unsign[2]; // @[Mux.scala 27:72] + wire _T_4708 = _T_4677 & buf_unsign[3]; // @[Mux.scala 27:72] + wire _T_4709 = _T_4705 | _T_4706; // @[Mux.scala 27:72] + wire _T_4710 = _T_4709 | _T_4707; // @[Mux.scala 27:72] + wire lsu_nonblock_unsign = _T_4710 | _T_4708; // @[Mux.scala 27:72] + wire [63:0] _T_4712 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58] + wire [3:0] _GEN_410 = {{2'd0}, lsu_nonblock_addr_offset}; // @[lsu_bus_buffer.scala 555:121] + wire [5:0] _T_4713 = _GEN_410 * 4'h8; // @[lsu_bus_buffer.scala 555:121] + wire [63:0] lsu_nonblock_data_unalgn = _T_4712 >> _T_4713; // @[lsu_bus_buffer.scala 555:92] + wire _T_4714 = ~io_dctl_busbuff_lsu_nonblock_load_data_error; // @[lsu_bus_buffer.scala 557:82] + wire _T_4716 = lsu_nonblock_sz == 2'h0; // @[lsu_bus_buffer.scala 558:81] + wire _T_4717 = lsu_nonblock_unsign & _T_4716; // @[lsu_bus_buffer.scala 558:63] + wire [31:0] _T_4719 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4720 = lsu_nonblock_sz == 2'h1; // @[lsu_bus_buffer.scala 559:45] + wire _T_4721 = lsu_nonblock_unsign & _T_4720; // @[lsu_bus_buffer.scala 559:26] + wire [31:0] _T_4723 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4724 = ~lsu_nonblock_unsign; // @[lsu_bus_buffer.scala 560:6] + wire _T_4726 = _T_4724 & _T_4716; // @[lsu_bus_buffer.scala 560:27] + wire [23:0] _T_4729 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4731 = {_T_4729,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4734 = _T_4724 & _T_4720; // @[lsu_bus_buffer.scala 561:27] + wire [15:0] _T_4737 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4739 = {_T_4737,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4740 = lsu_nonblock_sz == 2'h2; // @[lsu_bus_buffer.scala 562:21] + wire [31:0] _T_4741 = _T_4717 ? _T_4719 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4742 = _T_4721 ? _T_4723 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4743 = _T_4726 ? _T_4731 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4744 = _T_4734 ? _T_4739 : 32'h0; // @[Mux.scala 27:72] + wire [63:0] _T_4745 = _T_4740 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4746 = _T_4741 | _T_4742; // @[Mux.scala 27:72] + wire [31:0] _T_4747 = _T_4746 | _T_4743; // @[Mux.scala 27:72] + wire [31:0] _T_4748 = _T_4747 | _T_4744; // @[Mux.scala 27:72] + wire [63:0] _GEN_411 = {{32'd0}, _T_4748}; // @[Mux.scala 27:72] + wire [63:0] _T_4749 = _GEN_411 | _T_4745; // @[Mux.scala 27:72] + wire _T_4843 = obuf_valid & obuf_write; // @[lsu_bus_buffer.scala 580:37] + wire _T_4844 = ~obuf_cmd_done; // @[lsu_bus_buffer.scala 580:52] + wire _T_4845 = _T_4843 & _T_4844; // @[lsu_bus_buffer.scala 580:50] + wire [31:0] _T_4849 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58] + wire [2:0] _T_4851 = {1'h0,obuf_sz}; // @[Cat.scala 29:58] + wire _T_4856 = ~obuf_data_done; // @[lsu_bus_buffer.scala 592:51] + wire _T_4857 = _T_4843 & _T_4856; // @[lsu_bus_buffer.scala 592:49] + wire [7:0] _T_4861 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire _T_4864 = obuf_valid & _T_1341; // @[lsu_bus_buffer.scala 597:37] + wire _T_4866 = _T_4864 & _T_1347; // @[lsu_bus_buffer.scala 597:51] + wire _T_4878 = io_lsu_bus_clk_en_q & buf_error[0]; // @[lsu_bus_buffer.scala 610:126] + wire _T_4880 = _T_4878 & buf_write[0]; // @[lsu_bus_buffer.scala 610:141] + wire _T_4883 = io_lsu_bus_clk_en_q & buf_error[1]; // @[lsu_bus_buffer.scala 610:126] + wire _T_4885 = _T_4883 & buf_write[1]; // @[lsu_bus_buffer.scala 610:141] + wire _T_4888 = io_lsu_bus_clk_en_q & buf_error[2]; // @[lsu_bus_buffer.scala 610:126] + wire _T_4890 = _T_4888 & buf_write[2]; // @[lsu_bus_buffer.scala 610:141] + wire _T_4893 = io_lsu_bus_clk_en_q & buf_error[3]; // @[lsu_bus_buffer.scala 610:126] + wire _T_4895 = _T_4893 & buf_write[3]; // @[lsu_bus_buffer.scala 610:141] + wire _T_4896 = _T_2770 & _T_4880; // @[Mux.scala 27:72] + wire _T_4897 = _T_2792 & _T_4885; // @[Mux.scala 27:72] + wire _T_4898 = _T_2814 & _T_4890; // @[Mux.scala 27:72] + wire _T_4899 = _T_2836 & _T_4895; // @[Mux.scala 27:72] + wire _T_4900 = _T_4896 | _T_4897; // @[Mux.scala 27:72] + wire _T_4901 = _T_4900 | _T_4898; // @[Mux.scala 27:72] + wire _T_4911 = _T_2792 & buf_error[1]; // @[lsu_bus_buffer.scala 611:93] + wire _T_4913 = _T_4911 & buf_write[1]; // @[lsu_bus_buffer.scala 611:108] + wire _T_4916 = _T_2814 & buf_error[2]; // @[lsu_bus_buffer.scala 611:93] + wire _T_4918 = _T_4916 & buf_write[2]; // @[lsu_bus_buffer.scala 611:108] + wire _T_4921 = _T_2836 & buf_error[3]; // @[lsu_bus_buffer.scala 611:93] + wire _T_4923 = _T_4921 & buf_write[3]; // @[lsu_bus_buffer.scala 611:108] + wire [1:0] _T_4926 = _T_4918 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4927 = _T_4923 ? 2'h3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _GEN_412 = {{1'd0}, _T_4913}; // @[Mux.scala 27:72] + wire [1:0] _T_4929 = _GEN_412 | _T_4926; // @[Mux.scala 27:72] + wire [1:0] lsu_imprecise_error_store_tag = _T_4929 | _T_4927; // @[Mux.scala 27:72] + wire _T_4931 = ~io_tlu_busbuff_lsu_imprecise_error_store_any; // @[lsu_bus_buffer.scala 613:97] + wire [31:0] _GEN_369 = 2'h1 == lsu_imprecise_error_store_tag ? buf_addr_1 : buf_addr_0; // @[lsu_bus_buffer.scala 614:53] + wire [31:0] _GEN_370 = 2'h2 == lsu_imprecise_error_store_tag ? buf_addr_2 : _GEN_369; // @[lsu_bus_buffer.scala 614:53] + wire [31:0] _GEN_371 = 2'h3 == lsu_imprecise_error_store_tag ? buf_addr_3 : _GEN_370; // @[lsu_bus_buffer.scala 614:53] + wire [31:0] _GEN_373 = 2'h1 == io_dctl_busbuff_lsu_nonblock_load_data_tag ? buf_addr_1 : buf_addr_0; // @[lsu_bus_buffer.scala 614:53] + wire [31:0] _GEN_374 = 2'h2 == io_dctl_busbuff_lsu_nonblock_load_data_tag ? buf_addr_2 : _GEN_373; // @[lsu_bus_buffer.scala 614:53] + wire [31:0] _GEN_375 = 2'h3 == io_dctl_busbuff_lsu_nonblock_load_data_tag ? buf_addr_3 : _GEN_374; // @[lsu_bus_buffer.scala 614:53] + wire _T_4936 = bus_wcmd_sent | bus_wdata_sent; // @[lsu_bus_buffer.scala 620:82] + wire _T_4939 = io_lsu_busreq_r & io_ldst_dual_r; // @[lsu_bus_buffer.scala 621:60] + wire _T_4942 = ~io_lsu_axi_aw_ready; // @[lsu_bus_buffer.scala 624:61] + wire _T_4943 = io_lsu_axi_aw_valid & _T_4942; // @[lsu_bus_buffer.scala 624:59] + wire _T_4944 = ~io_lsu_axi_w_ready; // @[lsu_bus_buffer.scala 624:107] + wire _T_4945 = io_lsu_axi_w_valid & _T_4944; // @[lsu_bus_buffer.scala 624:105] + wire _T_4946 = _T_4943 | _T_4945; // @[lsu_bus_buffer.scala 624:83] + wire _T_4947 = ~io_lsu_axi_ar_ready; // @[lsu_bus_buffer.scala 624:153] + wire _T_4948 = io_lsu_axi_ar_valid & _T_4947; // @[lsu_bus_buffer.scala 624:151] + wire _T_4952 = ~io_flush_r; // @[lsu_bus_buffer.scala 628:75] + wire _T_4953 = io_lsu_busreq_m & _T_4952; // @[lsu_bus_buffer.scala 628:73] + reg _T_4956; // @[lsu_bus_buffer.scala 628:56] + rvclkhdr rvclkhdr ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en) + ); + rvclkhdr rvclkhdr_1 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en) + ); + rvclkhdr rvclkhdr_2 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_2_io_clk), + .io_en(rvclkhdr_2_io_en) + ); + rvclkhdr rvclkhdr_3 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_3_io_clk), + .io_en(rvclkhdr_3_io_en) + ); + rvclkhdr rvclkhdr_4 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_4_io_clk), + .io_en(rvclkhdr_4_io_en) + ); + rvclkhdr rvclkhdr_5 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_5_io_clk), + .io_en(rvclkhdr_5_io_en) + ); + rvclkhdr rvclkhdr_6 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_6_io_clk), + .io_en(rvclkhdr_6_io_en) + ); + rvclkhdr rvclkhdr_7 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_7_io_clk), + .io_en(rvclkhdr_7_io_en) + ); + rvclkhdr rvclkhdr_8 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_8_io_clk), + .io_en(rvclkhdr_8_io_en) + ); + rvclkhdr rvclkhdr_9 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_9_io_clk), + .io_en(rvclkhdr_9_io_en) + ); + rvclkhdr rvclkhdr_10 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_10_io_clk), + .io_en(rvclkhdr_10_io_en) + ); + rvclkhdr rvclkhdr_11 ( // @[lib.scala 404:23] + .io_clk(rvclkhdr_11_io_clk), + .io_en(rvclkhdr_11_io_en) + ); + assign io_tlu_busbuff_lsu_pmu_bus_trxn = _T_4936 | _T_4835; // @[lsu_bus_buffer.scala 620:35] + assign io_tlu_busbuff_lsu_pmu_bus_misaligned = _T_4939 & io_lsu_commit_r; // @[lsu_bus_buffer.scala 621:41] + assign io_tlu_busbuff_lsu_pmu_bus_error = io_tlu_busbuff_lsu_imprecise_error_load_any | io_tlu_busbuff_lsu_imprecise_error_store_any; // @[lsu_bus_buffer.scala 622:36] + assign io_tlu_busbuff_lsu_pmu_bus_busy = _T_4946 | _T_4948; // @[lsu_bus_buffer.scala 624:35] + assign io_tlu_busbuff_lsu_imprecise_error_load_any = io_dctl_busbuff_lsu_nonblock_load_data_error & _T_4931; // @[lsu_bus_buffer.scala 613:47] + assign io_tlu_busbuff_lsu_imprecise_error_store_any = _T_4901 | _T_4899; // @[lsu_bus_buffer.scala 610:48] + assign io_tlu_busbuff_lsu_imprecise_error_addr_any = io_tlu_busbuff_lsu_imprecise_error_store_any ? _GEN_371 : _GEN_375; // @[lsu_bus_buffer.scala 614:47] + assign io_dctl_busbuff_lsu_nonblock_load_valid_m = _T_4512 & _T_4513; // @[lsu_bus_buffer.scala 541:45] + assign io_dctl_busbuff_lsu_nonblock_load_tag_m = _T_1802 ? 2'h0 : _T_1838; // @[lsu_bus_buffer.scala 542:43] + assign io_dctl_busbuff_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4515; // @[lsu_bus_buffer.scala 544:43] + assign io_dctl_busbuff_lsu_nonblock_load_inv_tag_r = WrPtr0_r; // @[lsu_bus_buffer.scala 545:47] + assign io_dctl_busbuff_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4714; // @[lsu_bus_buffer.scala 557:48] + assign io_dctl_busbuff_lsu_nonblock_load_data_error = _T_4561 | _T_4559; // @[lsu_bus_buffer.scala 547:48] + assign io_dctl_busbuff_lsu_nonblock_load_data_tag = _T_4601 | _T_4599; // @[lsu_bus_buffer.scala 548:45] + assign io_lsu_axi_aw_valid = _T_4845 & _T_1237; // @[lsu_bus_buffer.scala 580:23] + assign io_lsu_axi_aw_bits_id = {{1'd0}, _T_1781}; // @[lsu_bus_buffer.scala 581:25] + assign io_lsu_axi_aw_bits_addr = obuf_sideeffect ? obuf_addr : _T_4849; // @[lsu_bus_buffer.scala 582:27] + assign io_lsu_axi_aw_bits_region = obuf_addr[31:28]; // @[lsu_bus_buffer.scala 586:29] + assign io_lsu_axi_aw_bits_len = 8'h0; // @[lsu_bus_buffer.scala 587:26] + assign io_lsu_axi_aw_bits_size = obuf_sideeffect ? _T_4851 : 3'h3; // @[lsu_bus_buffer.scala 583:27] + assign io_lsu_axi_aw_bits_burst = 2'h1; // @[lsu_bus_buffer.scala 588:28] + assign io_lsu_axi_aw_bits_lock = 1'h0; // @[lsu_bus_buffer.scala 590:27] + assign io_lsu_axi_aw_bits_cache = obuf_sideeffect ? 4'h0 : 4'hf; // @[lsu_bus_buffer.scala 585:28] + assign io_lsu_axi_aw_bits_prot = 3'h1; // @[lsu_bus_buffer.scala 584:27] + assign io_lsu_axi_aw_bits_qos = 4'h0; // @[lsu_bus_buffer.scala 589:26] + assign io_lsu_axi_w_valid = _T_4857 & _T_1237; // @[lsu_bus_buffer.scala 592:22] + assign io_lsu_axi_w_bits_data = obuf_data; // @[lsu_bus_buffer.scala 594:26] + assign io_lsu_axi_w_bits_strb = obuf_byteen & _T_4861; // @[lsu_bus_buffer.scala 593:26] + assign io_lsu_axi_w_bits_last = 1'h1; // @[lsu_bus_buffer.scala 595:26] + assign io_lsu_axi_b_ready = 1'h1; // @[lsu_bus_buffer.scala 608:22] + assign io_lsu_axi_ar_valid = _T_4866 & _T_1237; // @[lsu_bus_buffer.scala 597:23] + assign io_lsu_axi_ar_bits_id = {{1'd0}, _T_1781}; // @[lsu_bus_buffer.scala 598:25] + assign io_lsu_axi_ar_bits_addr = obuf_sideeffect ? obuf_addr : _T_4849; // @[lsu_bus_buffer.scala 599:27] + assign io_lsu_axi_ar_bits_region = obuf_addr[31:28]; // @[lsu_bus_buffer.scala 603:29] + assign io_lsu_axi_ar_bits_len = 8'h0; // @[lsu_bus_buffer.scala 604:26] + assign io_lsu_axi_ar_bits_size = obuf_sideeffect ? _T_4851 : 3'h3; // @[lsu_bus_buffer.scala 600:27] + assign io_lsu_axi_ar_bits_burst = 2'h1; // @[lsu_bus_buffer.scala 605:28] + assign io_lsu_axi_ar_bits_lock = 1'h0; // @[lsu_bus_buffer.scala 607:27] + assign io_lsu_axi_ar_bits_cache = obuf_sideeffect ? 4'h0 : 4'hf; // @[lsu_bus_buffer.scala 602:28] + assign io_lsu_axi_ar_bits_prot = 3'h1; // @[lsu_bus_buffer.scala 601:27] + assign io_lsu_axi_ar_bits_qos = 4'h0; // @[lsu_bus_buffer.scala 606:26] + assign io_lsu_axi_r_ready = 1'h1; // @[lsu_bus_buffer.scala 609:22] + assign io_lsu_busreq_r = _T_4956; // @[lsu_bus_buffer.scala 628:19] + assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[lsu_bus_buffer.scala 537:30] + assign io_lsu_bus_buffer_full_any = _T_4493 ? _T_4494 : _T_4495; // @[lsu_bus_buffer.scala 538:30] + assign io_lsu_bus_buffer_empty_any = _T_4506 & _T_1231; // @[lsu_bus_buffer.scala 539:31] + assign io_ld_byte_hit_buf_lo = {_T_69,_T_58}; // @[lsu_bus_buffer.scala 142:25] + assign io_ld_byte_hit_buf_hi = {_T_84,_T_73}; // @[lsu_bus_buffer.scala 143:25] + assign io_ld_fwddata_buf_lo = _T_650 | _T_651; // @[lsu_bus_buffer.scala 169:24] + assign io_ld_fwddata_buf_hi = _T_747 | _T_748; // @[lsu_bus_buffer.scala 175:24] + assign io_lsu_nonblock_load_data = _T_4749[31:0]; // @[lsu_bus_buffer.scala 558:29] + assign rvclkhdr_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_io_en = _T_853 & _T_854; // @[lib.scala 407:17] + assign rvclkhdr_1_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_1_io_en = _T_853 & _T_854; // @[lib.scala 407:17] + assign rvclkhdr_2_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_2_io_en = _T_1238 & io_lsu_bus_clk_en; // @[lib.scala 407:17] + assign rvclkhdr_3_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_3_io_en = _T_1238 & io_lsu_bus_clk_en; // @[lib.scala 407:17] + assign rvclkhdr_4_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_4_io_en = _T_3531 & buf_state_en_0; // @[lib.scala 407:17] + assign rvclkhdr_5_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_5_io_en = _T_3722 & buf_state_en_1; // @[lib.scala 407:17] + assign rvclkhdr_6_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_6_io_en = _T_3913 & buf_state_en_2; // @[lib.scala 407:17] + assign rvclkhdr_7_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_7_io_en = _T_4104 & buf_state_en_3; // @[lib.scala 407:17] + assign rvclkhdr_8_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_8_io_en = _T_3531 ? buf_state_en_0 : _GEN_81; // @[lib.scala 407:17] + assign rvclkhdr_9_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_9_io_en = _T_3722 ? buf_state_en_1 : _GEN_157; // @[lib.scala 407:17] + assign rvclkhdr_10_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_10_io_en = _T_3913 ? buf_state_en_2 : _GEN_233; // @[lib.scala 407:17] + assign rvclkhdr_11_io_clk = clock; // @[lib.scala 406:18] + assign rvclkhdr_11_io_en = _T_4104 ? buf_state_en_3 : _GEN_309; // @[lib.scala 407:17] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + buf_addr_0 = _RAND_0[31:0]; + _RAND_1 = {1{`RANDOM}}; + _T_4355 = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + _T_4352 = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + _T_4349 = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + _T_4346 = _RAND_4[0:0]; + _RAND_5 = {1{`RANDOM}}; + buf_state_0 = _RAND_5[2:0]; + _RAND_6 = {1{`RANDOM}}; + buf_addr_1 = _RAND_6[31:0]; + _RAND_7 = {1{`RANDOM}}; + buf_state_1 = _RAND_7[2:0]; + _RAND_8 = {1{`RANDOM}}; + buf_addr_2 = _RAND_8[31:0]; + _RAND_9 = {1{`RANDOM}}; + buf_state_2 = _RAND_9[2:0]; + _RAND_10 = {1{`RANDOM}}; + buf_addr_3 = _RAND_10[31:0]; + _RAND_11 = {1{`RANDOM}}; + buf_state_3 = _RAND_11[2:0]; + _RAND_12 = {1{`RANDOM}}; + buf_byteen_3 = _RAND_12[3:0]; + _RAND_13 = {1{`RANDOM}}; + buf_byteen_2 = _RAND_13[3:0]; + _RAND_14 = {1{`RANDOM}}; + buf_byteen_1 = _RAND_14[3:0]; + _RAND_15 = {1{`RANDOM}}; + buf_byteen_0 = _RAND_15[3:0]; + _RAND_16 = {1{`RANDOM}}; + buf_ageQ_3 = _RAND_16[3:0]; + _RAND_17 = {1{`RANDOM}}; + _T_1781 = _RAND_17[1:0]; + _RAND_18 = {1{`RANDOM}}; + obuf_merge = _RAND_18[0:0]; + _RAND_19 = {1{`RANDOM}}; + obuf_tag1 = _RAND_19[1:0]; + _RAND_20 = {1{`RANDOM}}; + obuf_valid = _RAND_20[0:0]; + _RAND_21 = {1{`RANDOM}}; + obuf_wr_enQ = _RAND_21[0:0]; + _RAND_22 = {1{`RANDOM}}; + ibuf_addr = _RAND_22[31:0]; + _RAND_23 = {1{`RANDOM}}; + ibuf_write = _RAND_23[0:0]; + _RAND_24 = {1{`RANDOM}}; + ibuf_valid = _RAND_24[0:0]; + _RAND_25 = {1{`RANDOM}}; + ibuf_byteen = _RAND_25[3:0]; + _RAND_26 = {1{`RANDOM}}; + buf_ageQ_2 = _RAND_26[3:0]; + _RAND_27 = {1{`RANDOM}}; + buf_ageQ_1 = _RAND_27[3:0]; + _RAND_28 = {1{`RANDOM}}; + buf_ageQ_0 = _RAND_28[3:0]; + _RAND_29 = {1{`RANDOM}}; + buf_data_0 = _RAND_29[31:0]; + _RAND_30 = {1{`RANDOM}}; + buf_data_1 = _RAND_30[31:0]; + _RAND_31 = {1{`RANDOM}}; + buf_data_2 = _RAND_31[31:0]; + _RAND_32 = {1{`RANDOM}}; + buf_data_3 = _RAND_32[31:0]; + _RAND_33 = {1{`RANDOM}}; + ibuf_data = _RAND_33[31:0]; + _RAND_34 = {1{`RANDOM}}; + ibuf_timer = _RAND_34[2:0]; + _RAND_35 = {1{`RANDOM}}; + ibuf_sideeffect = _RAND_35[0:0]; + _RAND_36 = {1{`RANDOM}}; + WrPtr1_r = _RAND_36[1:0]; + _RAND_37 = {1{`RANDOM}}; + WrPtr0_r = _RAND_37[1:0]; + _RAND_38 = {1{`RANDOM}}; + ibuf_tag = _RAND_38[1:0]; + _RAND_39 = {1{`RANDOM}}; + ibuf_dualtag = _RAND_39[1:0]; + _RAND_40 = {1{`RANDOM}}; + ibuf_dual = _RAND_40[0:0]; + _RAND_41 = {1{`RANDOM}}; + ibuf_samedw = _RAND_41[0:0]; + _RAND_42 = {1{`RANDOM}}; + ibuf_nomerge = _RAND_42[0:0]; + _RAND_43 = {1{`RANDOM}}; + ibuf_unsign = _RAND_43[0:0]; + _RAND_44 = {1{`RANDOM}}; + ibuf_sz = _RAND_44[1:0]; + _RAND_45 = {1{`RANDOM}}; + obuf_wr_timer = _RAND_45[2:0]; + _RAND_46 = {1{`RANDOM}}; + buf_nomerge_0 = _RAND_46[0:0]; + _RAND_47 = {1{`RANDOM}}; + buf_nomerge_1 = _RAND_47[0:0]; + _RAND_48 = {1{`RANDOM}}; + buf_nomerge_2 = _RAND_48[0:0]; + _RAND_49 = {1{`RANDOM}}; + buf_nomerge_3 = _RAND_49[0:0]; + _RAND_50 = {1{`RANDOM}}; + _T_4325 = _RAND_50[0:0]; + _RAND_51 = {1{`RANDOM}}; + _T_4322 = _RAND_51[0:0]; + _RAND_52 = {1{`RANDOM}}; + _T_4319 = _RAND_52[0:0]; + _RAND_53 = {1{`RANDOM}}; + _T_4316 = _RAND_53[0:0]; + _RAND_54 = {1{`RANDOM}}; + obuf_sideeffect = _RAND_54[0:0]; + _RAND_55 = {1{`RANDOM}}; + buf_dual_3 = _RAND_55[0:0]; + _RAND_56 = {1{`RANDOM}}; + buf_dual_2 = _RAND_56[0:0]; + _RAND_57 = {1{`RANDOM}}; + buf_dual_1 = _RAND_57[0:0]; + _RAND_58 = {1{`RANDOM}}; + buf_dual_0 = _RAND_58[0:0]; + _RAND_59 = {1{`RANDOM}}; + buf_samedw_3 = _RAND_59[0:0]; + _RAND_60 = {1{`RANDOM}}; + buf_samedw_2 = _RAND_60[0:0]; + _RAND_61 = {1{`RANDOM}}; + buf_samedw_1 = _RAND_61[0:0]; + _RAND_62 = {1{`RANDOM}}; + buf_samedw_0 = _RAND_62[0:0]; + _RAND_63 = {1{`RANDOM}}; + obuf_write = _RAND_63[0:0]; + _RAND_64 = {1{`RANDOM}}; + obuf_cmd_done = _RAND_64[0:0]; + _RAND_65 = {1{`RANDOM}}; + obuf_data_done = _RAND_65[0:0]; + _RAND_66 = {1{`RANDOM}}; + obuf_nosend = _RAND_66[0:0]; + _RAND_67 = {1{`RANDOM}}; + obuf_addr = _RAND_67[31:0]; + _RAND_68 = {1{`RANDOM}}; + buf_sz_0 = _RAND_68[1:0]; + _RAND_69 = {1{`RANDOM}}; + buf_sz_1 = _RAND_69[1:0]; + _RAND_70 = {1{`RANDOM}}; + buf_sz_2 = _RAND_70[1:0]; + _RAND_71 = {1{`RANDOM}}; + buf_sz_3 = _RAND_71[1:0]; + _RAND_72 = {1{`RANDOM}}; + obuf_rdrsp_pend = _RAND_72[0:0]; + _RAND_73 = {1{`RANDOM}}; + obuf_rdrsp_tag = _RAND_73[2:0]; + _RAND_74 = {1{`RANDOM}}; + buf_dualhi_3 = _RAND_74[0:0]; + _RAND_75 = {1{`RANDOM}}; + buf_dualhi_2 = _RAND_75[0:0]; + _RAND_76 = {1{`RANDOM}}; + buf_dualhi_1 = _RAND_76[0:0]; + _RAND_77 = {1{`RANDOM}}; + buf_dualhi_0 = _RAND_77[0:0]; + _RAND_78 = {1{`RANDOM}}; + obuf_sz = _RAND_78[1:0]; + _RAND_79 = {1{`RANDOM}}; + obuf_byteen = _RAND_79[7:0]; + _RAND_80 = {2{`RANDOM}}; + obuf_data = _RAND_80[63:0]; + _RAND_81 = {1{`RANDOM}}; + buf_rspageQ_0 = _RAND_81[3:0]; + _RAND_82 = {1{`RANDOM}}; + buf_rspageQ_1 = _RAND_82[3:0]; + _RAND_83 = {1{`RANDOM}}; + buf_rspageQ_2 = _RAND_83[3:0]; + _RAND_84 = {1{`RANDOM}}; + buf_rspageQ_3 = _RAND_84[3:0]; + _RAND_85 = {1{`RANDOM}}; + _T_4302 = _RAND_85[0:0]; + _RAND_86 = {1{`RANDOM}}; + _T_4300 = _RAND_86[0:0]; + _RAND_87 = {1{`RANDOM}}; + _T_4298 = _RAND_87[0:0]; + _RAND_88 = {1{`RANDOM}}; + _T_4296 = _RAND_88[0:0]; + _RAND_89 = {1{`RANDOM}}; + buf_ldfwdtag_0 = _RAND_89[1:0]; + _RAND_90 = {1{`RANDOM}}; + buf_dualtag_0 = _RAND_90[1:0]; + _RAND_91 = {1{`RANDOM}}; + buf_ldfwdtag_3 = _RAND_91[1:0]; + _RAND_92 = {1{`RANDOM}}; + buf_ldfwdtag_2 = _RAND_92[1:0]; + _RAND_93 = {1{`RANDOM}}; + buf_ldfwdtag_1 = _RAND_93[1:0]; + _RAND_94 = {1{`RANDOM}}; + buf_dualtag_1 = _RAND_94[1:0]; + _RAND_95 = {1{`RANDOM}}; + buf_dualtag_2 = _RAND_95[1:0]; + _RAND_96 = {1{`RANDOM}}; + buf_dualtag_3 = _RAND_96[1:0]; + _RAND_97 = {1{`RANDOM}}; + _T_4331 = _RAND_97[0:0]; + _RAND_98 = {1{`RANDOM}}; + _T_4334 = _RAND_98[0:0]; + _RAND_99 = {1{`RANDOM}}; + _T_4337 = _RAND_99[0:0]; + _RAND_100 = {1{`RANDOM}}; + _T_4340 = _RAND_100[0:0]; + _RAND_101 = {1{`RANDOM}}; + _T_4406 = _RAND_101[0:0]; + _RAND_102 = {1{`RANDOM}}; + _T_4401 = _RAND_102[0:0]; + _RAND_103 = {1{`RANDOM}}; + _T_4396 = _RAND_103[0:0]; + _RAND_104 = {1{`RANDOM}}; + _T_4391 = _RAND_104[0:0]; + _RAND_105 = {1{`RANDOM}}; + lsu_nonblock_load_valid_r = _RAND_105[0:0]; + _RAND_106 = {1{`RANDOM}}; + _T_4956 = _RAND_106[0:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + buf_addr_0 = 32'h0; + end + if (reset) begin + _T_4355 = 1'h0; + end + if (reset) begin + _T_4352 = 1'h0; + end + if (reset) begin + _T_4349 = 1'h0; + end + if (reset) begin + _T_4346 = 1'h0; + end + if (reset) begin + buf_state_0 = 3'h0; + end + if (reset) begin + buf_addr_1 = 32'h0; + end + if (reset) begin + buf_state_1 = 3'h0; + end + if (reset) begin + buf_addr_2 = 32'h0; + end + if (reset) begin + buf_state_2 = 3'h0; + end + if (reset) begin + buf_addr_3 = 32'h0; + end + if (reset) begin + buf_state_3 = 3'h0; + end + if (reset) begin + buf_byteen_3 = 4'h0; + end + if (reset) begin + buf_byteen_2 = 4'h0; + end + if (reset) begin + buf_byteen_1 = 4'h0; + end + if (reset) begin + buf_byteen_0 = 4'h0; + end + if (reset) begin + buf_ageQ_3 = 4'h0; + end + if (reset) begin + _T_1781 = 2'h0; + end + if (reset) begin + obuf_merge = 1'h0; + end + if (reset) begin + obuf_tag1 = 2'h0; + end + if (reset) begin + obuf_valid = 1'h0; + end + if (reset) begin + obuf_wr_enQ = 1'h0; + end + if (reset) begin + ibuf_addr = 32'h0; + end + if (reset) begin + ibuf_write = 1'h0; + end + if (reset) begin + ibuf_valid = 1'h0; + end + if (reset) begin + ibuf_byteen = 4'h0; + end + if (reset) begin + buf_ageQ_2 = 4'h0; + end + if (reset) begin + buf_ageQ_1 = 4'h0; + end + if (reset) begin + buf_ageQ_0 = 4'h0; + end + if (reset) begin + buf_data_0 = 32'h0; + end + if (reset) begin + buf_data_1 = 32'h0; + end + if (reset) begin + buf_data_2 = 32'h0; + end + if (reset) begin + buf_data_3 = 32'h0; + end + if (reset) begin + ibuf_data = 32'h0; + end + if (reset) begin + ibuf_timer = 3'h0; + end + if (reset) begin + ibuf_sideeffect = 1'h0; + end + if (reset) begin + WrPtr1_r = 2'h0; + end + if (reset) begin + WrPtr0_r = 2'h0; + end + if (reset) begin + ibuf_tag = 2'h0; + end + if (reset) begin + ibuf_dualtag = 2'h0; + end + if (reset) begin + ibuf_dual = 1'h0; + end + if (reset) begin + ibuf_samedw = 1'h0; + end + if (reset) begin + ibuf_nomerge = 1'h0; + end + if (reset) begin + ibuf_unsign = 1'h0; + end + if (reset) begin + ibuf_sz = 2'h0; + end + if (reset) begin + obuf_wr_timer = 3'h0; + end + if (reset) begin + buf_nomerge_0 = 1'h0; + end + if (reset) begin + buf_nomerge_1 = 1'h0; + end + if (reset) begin + buf_nomerge_2 = 1'h0; + end + if (reset) begin + buf_nomerge_3 = 1'h0; + end + if (reset) begin + _T_4325 = 1'h0; + end + if (reset) begin + _T_4322 = 1'h0; + end + if (reset) begin + _T_4319 = 1'h0; + end + if (reset) begin + _T_4316 = 1'h0; + end + if (reset) begin + obuf_sideeffect = 1'h0; + end + if (reset) begin + buf_dual_3 = 1'h0; + end + if (reset) begin + buf_dual_2 = 1'h0; + end + if (reset) begin + buf_dual_1 = 1'h0; + end + if (reset) begin + buf_dual_0 = 1'h0; + end + if (reset) begin + buf_samedw_3 = 1'h0; + end + if (reset) begin + buf_samedw_2 = 1'h0; + end + if (reset) begin + buf_samedw_1 = 1'h0; + end + if (reset) begin + buf_samedw_0 = 1'h0; + end + if (reset) begin + obuf_write = 1'h0; + end + if (reset) begin + obuf_cmd_done = 1'h0; + end + if (reset) begin + obuf_data_done = 1'h0; + end + if (reset) begin + obuf_nosend = 1'h0; + end + if (reset) begin + obuf_addr = 32'h0; + end + if (reset) begin + buf_sz_0 = 2'h0; + end + if (reset) begin + buf_sz_1 = 2'h0; + end + if (reset) begin + buf_sz_2 = 2'h0; + end + if (reset) begin + buf_sz_3 = 2'h0; + end + if (reset) begin + obuf_rdrsp_pend = 1'h0; + end + if (reset) begin + obuf_rdrsp_tag = 3'h0; + end + if (reset) begin + buf_dualhi_3 = 1'h0; + end + if (reset) begin + buf_dualhi_2 = 1'h0; + end + if (reset) begin + buf_dualhi_1 = 1'h0; + end + if (reset) begin + buf_dualhi_0 = 1'h0; + end + if (reset) begin + obuf_sz = 2'h0; + end + if (reset) begin + obuf_byteen = 8'h0; + end + if (reset) begin + obuf_data = 64'h0; + end + if (reset) begin + buf_rspageQ_0 = 4'h0; + end + if (reset) begin + buf_rspageQ_1 = 4'h0; + end + if (reset) begin + buf_rspageQ_2 = 4'h0; + end + if (reset) begin + buf_rspageQ_3 = 4'h0; + end + if (reset) begin + _T_4302 = 1'h0; + end + if (reset) begin + _T_4300 = 1'h0; + end + if (reset) begin + _T_4298 = 1'h0; + end + if (reset) begin + _T_4296 = 1'h0; + end + if (reset) begin + buf_ldfwdtag_0 = 2'h0; + end + if (reset) begin + buf_dualtag_0 = 2'h0; + end + if (reset) begin + buf_ldfwdtag_3 = 2'h0; + end + if (reset) begin + buf_ldfwdtag_2 = 2'h0; + end + if (reset) begin + buf_ldfwdtag_1 = 2'h0; + end + if (reset) begin + buf_dualtag_1 = 2'h0; + end + if (reset) begin + buf_dualtag_2 = 2'h0; + end + if (reset) begin + buf_dualtag_3 = 2'h0; + end + if (reset) begin + _T_4331 = 1'h0; + end + if (reset) begin + _T_4334 = 1'h0; + end + if (reset) begin + _T_4337 = 1'h0; + end + if (reset) begin + _T_4340 = 1'h0; + end + if (reset) begin + _T_4406 = 1'h0; + end + if (reset) begin + _T_4401 = 1'h0; + end + if (reset) begin + _T_4396 = 1'h0; + end + if (reset) begin + _T_4391 = 1'h0; + end + if (reset) begin + lsu_nonblock_load_valid_r = 1'h0; + end + if (reset) begin + _T_4956 = 1'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge clock or posedge reset) begin + if (reset) begin + buf_addr_0 <= 32'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_addr_0 <= ibuf_addr; + end else if (_T_3346) begin + buf_addr_0 <= io_end_addr_r; + end else begin + buf_addr_0 <= io_lsu_addr_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4355 <= 1'h0; + end else if (buf_wr_en_3) begin + _T_4355 <= buf_write_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4352 <= 1'h0; + end else if (buf_wr_en_2) begin + _T_4352 <= buf_write_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4349 <= 1'h0; + end else if (buf_wr_en_1) begin + _T_4349 <= buf_write_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4346 <= 1'h0; + end else if (buf_wr_en_0) begin + _T_4346 <= buf_write_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_0 <= 3'h0; + end else if (buf_state_en_0) begin + if (_T_3531) begin + if (io_lsu_bus_clk_en) begin + buf_state_0 <= 3'h2; + end else begin + buf_state_0 <= 3'h1; + end + end else if (_T_3554) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else begin + buf_state_0 <= 3'h2; + end + end else if (_T_3558) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else if (_T_3562) begin + buf_state_0 <= 3'h5; + end else begin + buf_state_0 <= 3'h3; + end + end else if (_T_3592) begin + if (_T_3596) begin + buf_state_0 <= 3'h0; + end else if (_T_3604) begin + buf_state_0 <= 3'h4; + end else if (_T_3632) begin + buf_state_0 <= 3'h5; + end else begin + buf_state_0 <= 3'h6; + end + end else if (_T_3677) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else if (_T_3683) begin + buf_state_0 <= 3'h5; + end else begin + buf_state_0 <= 3'h6; + end + end else if (_T_3695) begin + if (io_dec_tlu_force_halt) begin + buf_state_0 <= 3'h0; + end else begin + buf_state_0 <= 3'h6; + end + end else begin + buf_state_0 <= 3'h0; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + buf_addr_1 <= 32'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_addr_1 <= ibuf_addr; + end else if (_T_3355) begin + buf_addr_1 <= io_end_addr_r; + end else begin + buf_addr_1 <= io_lsu_addr_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_1 <= 3'h0; + end else if (buf_state_en_1) begin + if (_T_3722) begin + if (io_lsu_bus_clk_en) begin + buf_state_1 <= 3'h2; + end else begin + buf_state_1 <= 3'h1; + end + end else if (_T_3745) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else begin + buf_state_1 <= 3'h2; + end + end else if (_T_3749) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else if (_T_3562) begin + buf_state_1 <= 3'h5; + end else begin + buf_state_1 <= 3'h3; + end + end else if (_T_3783) begin + if (_T_3787) begin + buf_state_1 <= 3'h0; + end else if (_T_3795) begin + buf_state_1 <= 3'h4; + end else if (_T_3823) begin + buf_state_1 <= 3'h5; + end else begin + buf_state_1 <= 3'h6; + end + end else if (_T_3868) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else if (_T_3874) begin + buf_state_1 <= 3'h5; + end else begin + buf_state_1 <= 3'h6; + end + end else if (_T_3886) begin + if (io_dec_tlu_force_halt) begin + buf_state_1 <= 3'h0; + end else begin + buf_state_1 <= 3'h6; + end + end else begin + buf_state_1 <= 3'h0; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + buf_addr_2 <= 32'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_addr_2 <= ibuf_addr; + end else if (_T_3364) begin + buf_addr_2 <= io_end_addr_r; + end else begin + buf_addr_2 <= io_lsu_addr_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_2 <= 3'h0; + end else if (buf_state_en_2) begin + if (_T_3913) begin + if (io_lsu_bus_clk_en) begin + buf_state_2 <= 3'h2; + end else begin + buf_state_2 <= 3'h1; + end + end else if (_T_3936) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else begin + buf_state_2 <= 3'h2; + end + end else if (_T_3940) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else if (_T_3562) begin + buf_state_2 <= 3'h5; + end else begin + buf_state_2 <= 3'h3; + end + end else if (_T_3974) begin + if (_T_3978) begin + buf_state_2 <= 3'h0; + end else if (_T_3986) begin + buf_state_2 <= 3'h4; + end else if (_T_4014) begin + buf_state_2 <= 3'h5; + end else begin + buf_state_2 <= 3'h6; + end + end else if (_T_4059) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else if (_T_4065) begin + buf_state_2 <= 3'h5; + end else begin + buf_state_2 <= 3'h6; + end + end else if (_T_4077) begin + if (io_dec_tlu_force_halt) begin + buf_state_2 <= 3'h0; + end else begin + buf_state_2 <= 3'h6; + end + end else begin + buf_state_2 <= 3'h0; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + buf_addr_3 <= 32'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_addr_3 <= ibuf_addr; + end else if (_T_3373) begin + buf_addr_3 <= io_end_addr_r; + end else begin + buf_addr_3 <= io_lsu_addr_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_state_3 <= 3'h0; + end else if (buf_state_en_3) begin + if (_T_4104) begin + if (io_lsu_bus_clk_en) begin + buf_state_3 <= 3'h2; + end else begin + buf_state_3 <= 3'h1; + end + end else if (_T_4127) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else begin + buf_state_3 <= 3'h2; + end + end else if (_T_4131) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else if (_T_3562) begin + buf_state_3 <= 3'h5; + end else begin + buf_state_3 <= 3'h3; + end + end else if (_T_4165) begin + if (_T_4169) begin + buf_state_3 <= 3'h0; + end else if (_T_4177) begin + buf_state_3 <= 3'h4; + end else if (_T_4205) begin + buf_state_3 <= 3'h5; + end else begin + buf_state_3 <= 3'h6; + end + end else if (_T_4250) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else if (_T_4256) begin + buf_state_3 <= 3'h5; + end else begin + buf_state_3 <= 3'h6; + end + end else if (_T_4268) begin + if (io_dec_tlu_force_halt) begin + buf_state_3 <= 3'h0; + end else begin + buf_state_3 <= 3'h6; + end + end else begin + buf_state_3 <= 3'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_3 <= 4'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_byteen_3 <= ibuf_byteen_out; + end else if (_T_3373) begin + buf_byteen_3 <= ldst_byteen_hi_r; + end else begin + buf_byteen_3 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_2 <= 4'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_byteen_2 <= ibuf_byteen_out; + end else if (_T_3364) begin + buf_byteen_2 <= ldst_byteen_hi_r; + end else begin + buf_byteen_2 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_1 <= 4'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_byteen_1 <= ibuf_byteen_out; + end else if (_T_3355) begin + buf_byteen_1 <= ldst_byteen_hi_r; + end else begin + buf_byteen_1 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_byteen_0 <= 4'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_byteen_0 <= ibuf_byteen_out; + end else if (_T_3346) begin + buf_byteen_0 <= ldst_byteen_hi_r; + end else begin + buf_byteen_0 <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_3 <= 4'h0; + end else begin + buf_ageQ_3 <= {_T_2474,_T_2397}; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_1781 <= 2'h0; + end else if (_T_1780) begin + if (ibuf_buf_byp) begin + _T_1781 <= WrPtr0_r; + end else begin + _T_1781 <= CmdPtr0; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_merge <= 1'h0; + end else if (_T_1780) begin + obuf_merge <= obuf_merge_en; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_tag1 <= 2'h0; + end else if (_T_1780) begin + if (ibuf_buf_byp) begin + obuf_tag1 <= WrPtr1_r; + end else begin + obuf_tag1 <= CmdPtr1; + end + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + obuf_valid <= 1'h0; + end else begin + obuf_valid <= _T_1771 & _T_1772; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_wr_enQ <= 1'h0; + end else if (io_lsu_busm_clken) begin + obuf_wr_enQ <= obuf_wr_en; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + ibuf_addr <= 32'h0; + end else if (ibuf_wr_en) begin + if (io_ldst_dual_r) begin + ibuf_addr <= io_end_addr_r; + end else begin + ibuf_addr <= io_lsu_addr_r; + end + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_write <= 1'h0; + end else if (ibuf_wr_en) begin + ibuf_write <= io_lsu_pkt_r_bits_store; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + ibuf_valid <= 1'h0; + end else begin + ibuf_valid <= _T_1005 & _T_1006; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_byteen <= 4'h0; + end else if (ibuf_wr_en) begin + if (_T_866) begin + ibuf_byteen <= _T_881; + end else if (io_ldst_dual_r) begin + ibuf_byteen <= ldst_byteen_hi_r; + end else begin + ibuf_byteen <= ldst_byteen_lo_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_2 <= 4'h0; + end else begin + buf_ageQ_2 <= {_T_2372,_T_2295}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_1 <= 4'h0; + end else begin + buf_ageQ_1 <= {_T_2270,_T_2193}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ageQ_0 <= 4'h0; + end else begin + buf_ageQ_0 <= {_T_2168,_T_2091}; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + buf_data_0 <= 32'h0; + end else if (buf_data_en_0) begin + if (_T_3531) begin + if (_T_3546) begin + buf_data_0 <= ibuf_data_out; + end else begin + buf_data_0 <= store_data_lo_r; + end + end else if (_T_3554) begin + buf_data_0 <= 32'h0; + end else if (_T_3558) begin + if (buf_error_en_0) begin + buf_data_0 <= io_lsu_axi_r_bits_data[31:0]; + end else if (buf_addr_0[2]) begin + buf_data_0 <= io_lsu_axi_r_bits_data[63:32]; + end else begin + buf_data_0 <= io_lsu_axi_r_bits_data[31:0]; + end + end else if (_T_3592) begin + if (_T_3670) begin + if (buf_addr_0[2]) begin + buf_data_0 <= io_lsu_axi_r_bits_data[63:32]; + end else begin + buf_data_0 <= io_lsu_axi_r_bits_data[31:0]; + end + end else begin + buf_data_0 <= io_lsu_axi_r_bits_data[31:0]; + end + end else begin + buf_data_0 <= 32'h0; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + buf_data_1 <= 32'h0; + end else if (buf_data_en_1) begin + if (_T_3722) begin + if (_T_3737) begin + buf_data_1 <= ibuf_data_out; + end else begin + buf_data_1 <= store_data_lo_r; + end + end else if (_T_3745) begin + buf_data_1 <= 32'h0; + end else if (_T_3749) begin + if (buf_error_en_1) begin + buf_data_1 <= io_lsu_axi_r_bits_data[31:0]; + end else if (buf_addr_1[2]) begin + buf_data_1 <= io_lsu_axi_r_bits_data[63:32]; + end else begin + buf_data_1 <= io_lsu_axi_r_bits_data[31:0]; + end + end else if (_T_3783) begin + if (_T_3861) begin + if (buf_addr_1[2]) begin + buf_data_1 <= io_lsu_axi_r_bits_data[63:32]; + end else begin + buf_data_1 <= io_lsu_axi_r_bits_data[31:0]; + end + end else begin + buf_data_1 <= io_lsu_axi_r_bits_data[31:0]; + end + end else begin + buf_data_1 <= 32'h0; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + buf_data_2 <= 32'h0; + end else if (buf_data_en_2) begin + if (_T_3913) begin + if (_T_3928) begin + buf_data_2 <= ibuf_data_out; + end else begin + buf_data_2 <= store_data_lo_r; + end + end else if (_T_3936) begin + buf_data_2 <= 32'h0; + end else if (_T_3940) begin + if (buf_error_en_2) begin + buf_data_2 <= io_lsu_axi_r_bits_data[31:0]; + end else if (buf_addr_2[2]) begin + buf_data_2 <= io_lsu_axi_r_bits_data[63:32]; + end else begin + buf_data_2 <= io_lsu_axi_r_bits_data[31:0]; + end + end else if (_T_3974) begin + if (_T_4052) begin + if (buf_addr_2[2]) begin + buf_data_2 <= io_lsu_axi_r_bits_data[63:32]; + end else begin + buf_data_2 <= io_lsu_axi_r_bits_data[31:0]; + end + end else begin + buf_data_2 <= io_lsu_axi_r_bits_data[31:0]; + end + end else begin + buf_data_2 <= 32'h0; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + buf_data_3 <= 32'h0; + end else if (buf_data_en_3) begin + if (_T_4104) begin + if (_T_4119) begin + buf_data_3 <= ibuf_data_out; + end else begin + buf_data_3 <= store_data_lo_r; + end + end else if (_T_4127) begin + buf_data_3 <= 32'h0; + end else if (_T_4131) begin + if (buf_error_en_3) begin + buf_data_3 <= io_lsu_axi_r_bits_data[31:0]; + end else if (buf_addr_3[2]) begin + buf_data_3 <= io_lsu_axi_r_bits_data[63:32]; + end else begin + buf_data_3 <= io_lsu_axi_r_bits_data[31:0]; + end + end else if (_T_4165) begin + if (_T_4243) begin + if (buf_addr_3[2]) begin + buf_data_3 <= io_lsu_axi_r_bits_data[63:32]; + end else begin + buf_data_3 <= io_lsu_axi_r_bits_data[31:0]; + end + end else begin + buf_data_3 <= io_lsu_axi_r_bits_data[31:0]; + end + end else begin + buf_data_3 <= 32'h0; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + ibuf_data <= 32'h0; + end else if (ibuf_wr_en) begin + ibuf_data <= ibuf_data_in; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + ibuf_timer <= 3'h0; + end else if (ibuf_wr_en) begin + ibuf_timer <= 3'h0; + end else if (_T_923) begin + ibuf_timer <= _T_926; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_sideeffect <= 1'h0; + end else if (ibuf_wr_en) begin + ibuf_sideeffect <= io_is_sideeffects_r; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + WrPtr1_r <= 2'h0; + end else if (_T_1853) begin + WrPtr1_r <= 2'h0; + end else if (_T_1867) begin + WrPtr1_r <= 2'h1; + end else if (_T_1881) begin + WrPtr1_r <= 2'h2; + end else begin + WrPtr1_r <= 2'h3; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + WrPtr0_r <= 2'h0; + end else if (_T_1802) begin + WrPtr0_r <= 2'h0; + end else if (_T_1813) begin + WrPtr0_r <= 2'h1; + end else if (_T_1824) begin + WrPtr0_r <= 2'h2; + end else begin + WrPtr0_r <= 2'h3; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_tag <= 2'h0; + end else if (ibuf_wr_en) begin + if (!(_T_866)) begin + if (io_ldst_dual_r) begin + ibuf_tag <= WrPtr1_r; + end else begin + ibuf_tag <= WrPtr0_r; + end + end + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_dualtag <= 2'h0; + end else if (ibuf_wr_en) begin + ibuf_dualtag <= WrPtr0_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_dual <= 1'h0; + end else if (ibuf_wr_en) begin + ibuf_dual <= io_ldst_dual_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_samedw <= 1'h0; + end else if (ibuf_wr_en) begin + ibuf_samedw <= ldst_samedw_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_nomerge <= 1'h0; + end else if (ibuf_wr_en) begin + ibuf_nomerge <= io_no_dword_merge_r; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_unsign <= 1'h0; + end else if (ibuf_wr_en) begin + ibuf_unsign <= io_lsu_pkt_r_bits_unsign; + end + end + always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin + if (reset) begin + ibuf_sz <= 2'h0; + end else if (ibuf_wr_en) begin + ibuf_sz <= ibuf_sz_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_wr_timer <= 3'h0; + end else if (obuf_wr_en) begin + if (obuf_wr_en) begin + obuf_wr_timer <= 3'h0; + end else if (_T_1058) begin + obuf_wr_timer <= _T_1060; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_nomerge_0 <= buf_nomerge_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_nomerge_1 <= buf_nomerge_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_nomerge_2 <= buf_nomerge_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_nomerge_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_nomerge_3 <= buf_nomerge_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4325 <= 1'h0; + end else if (buf_wr_en_3) begin + _T_4325 <= buf_sideeffect_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4322 <= 1'h0; + end else if (buf_wr_en_2) begin + _T_4322 <= buf_sideeffect_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4319 <= 1'h0; + end else if (buf_wr_en_1) begin + _T_4319 <= buf_sideeffect_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4316 <= 1'h0; + end else if (buf_wr_en_0) begin + _T_4316 <= buf_sideeffect_in[0]; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_sideeffect <= 1'h0; + end else if (_T_1780) begin + if (ibuf_buf_byp) begin + obuf_sideeffect <= io_is_sideeffects_r; + end else begin + obuf_sideeffect <= _T_1051; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_dual_3 <= buf_dual_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_dual_2 <= buf_dual_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_dual_1 <= buf_dual_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dual_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_dual_0 <= buf_dual_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_samedw_3 <= buf_samedw_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_samedw_2 <= buf_samedw_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_samedw_1 <= buf_samedw_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_samedw_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_samedw_0 <= buf_samedw_in[0]; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_write <= 1'h0; + end else if (_T_1780) begin + if (ibuf_buf_byp) begin + obuf_write <= io_lsu_pkt_r_bits_store; + end else begin + obuf_write <= _T_1202; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_cmd_done <= 1'h0; + end else if (io_lsu_busm_clken) begin + obuf_cmd_done <= obuf_cmd_done_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_data_done <= 1'h0; + end else if (io_lsu_busm_clken) begin + obuf_data_done <= obuf_data_done_in; + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + obuf_nosend <= 1'h0; + end else if (obuf_wr_en) begin + obuf_nosend <= obuf_nosend_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_addr <= 32'h0; + end else if (obuf_wr_en) begin + if (ibuf_buf_byp) begin + obuf_addr <= io_lsu_addr_r; + end else begin + obuf_addr <= _T_1287; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_0 <= 2'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_sz_0 <= ibuf_sz; + end else begin + buf_sz_0 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_1 <= 2'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_sz_1 <= ibuf_sz; + end else begin + buf_sz_1 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_2 <= 2'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_sz_2 <= ibuf_sz; + end else begin + buf_sz_2 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_sz_3 <= 2'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_sz_3 <= ibuf_sz; + end else begin + buf_sz_3 <= ibuf_sz_in; + end + end + end + always @(posedge io_lsu_free_c2_clk or posedge reset) begin + if (reset) begin + obuf_rdrsp_pend <= 1'h0; + end else if (obuf_rdrsp_pend_en) begin + obuf_rdrsp_pend <= obuf_rdrsp_pend_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_rdrsp_tag <= 3'h0; + end else if (io_lsu_busm_clken) begin + if (_T_1330) begin + obuf_rdrsp_tag <= obuf_tag0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_3 <= 1'h0; + end else if (buf_wr_en_3) begin + buf_dualhi_3 <= buf_dualhi_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_2 <= 1'h0; + end else if (buf_wr_en_2) begin + buf_dualhi_2 <= buf_dualhi_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_1 <= 1'h0; + end else if (buf_wr_en_1) begin + buf_dualhi_1 <= buf_dualhi_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualhi_0 <= 1'h0; + end else if (buf_wr_en_0) begin + buf_dualhi_0 <= buf_dualhi_in[0]; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_sz <= 2'h0; + end else if (_T_1780) begin + if (ibuf_buf_byp) begin + obuf_sz <= ibuf_sz_in; + end else begin + obuf_sz <= _T_1300; + end + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_byteen <= 8'h0; + end else if (_T_1780) begin + obuf_byteen <= obuf_byteen_in; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + obuf_data <= 64'h0; + end else if (obuf_wr_en) begin + obuf_data <= obuf_data_in; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_0 <= 4'h0; + end else begin + buf_rspageQ_0 <= {_T_3144,_T_3133}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_1 <= 4'h0; + end else begin + buf_rspageQ_1 <= {_T_3159,_T_3148}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_2 <= 4'h0; + end else begin + buf_rspageQ_2 <= {_T_3174,_T_3163}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_rspageQ_3 <= 4'h0; + end else begin + buf_rspageQ_3 <= {_T_3189,_T_3178}; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4302 <= 1'h0; + end else if (buf_ldfwd_en_3) begin + if (_T_4104) begin + _T_4302 <= 1'h0; + end else if (_T_4127) begin + _T_4302 <= 1'h0; + end else begin + _T_4302 <= _T_4131; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4300 <= 1'h0; + end else if (buf_ldfwd_en_2) begin + if (_T_3913) begin + _T_4300 <= 1'h0; + end else if (_T_3936) begin + _T_4300 <= 1'h0; + end else begin + _T_4300 <= _T_3940; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4298 <= 1'h0; + end else if (buf_ldfwd_en_1) begin + if (_T_3722) begin + _T_4298 <= 1'h0; + end else if (_T_3745) begin + _T_4298 <= 1'h0; + end else begin + _T_4298 <= _T_3749; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4296 <= 1'h0; + end else if (buf_ldfwd_en_0) begin + if (_T_3531) begin + _T_4296 <= 1'h0; + end else if (_T_3554) begin + _T_4296 <= 1'h0; + end else begin + _T_4296 <= _T_3558; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_0 <= 2'h0; + end else if (buf_ldfwd_en_0) begin + if (_T_3531) begin + buf_ldfwdtag_0 <= 2'h0; + end else if (_T_3554) begin + buf_ldfwdtag_0 <= 2'h0; + end else if (_T_3558) begin + buf_ldfwdtag_0 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_0 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_0 <= 2'h0; + end else if (buf_wr_en_0) begin + if (ibuf_drainvec_vld[0]) begin + buf_dualtag_0 <= ibuf_dualtag; + end else if (_T_3346) begin + buf_dualtag_0 <= WrPtr0_r; + end else begin + buf_dualtag_0 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_3 <= 2'h0; + end else if (buf_ldfwd_en_3) begin + if (_T_4104) begin + buf_ldfwdtag_3 <= 2'h0; + end else if (_T_4127) begin + buf_ldfwdtag_3 <= 2'h0; + end else if (_T_4131) begin + buf_ldfwdtag_3 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_3 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_2 <= 2'h0; + end else if (buf_ldfwd_en_2) begin + if (_T_3913) begin + buf_ldfwdtag_2 <= 2'h0; + end else if (_T_3936) begin + buf_ldfwdtag_2 <= 2'h0; + end else if (_T_3940) begin + buf_ldfwdtag_2 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_2 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_ldfwdtag_1 <= 2'h0; + end else if (buf_ldfwd_en_1) begin + if (_T_3722) begin + buf_ldfwdtag_1 <= 2'h0; + end else if (_T_3745) begin + buf_ldfwdtag_1 <= 2'h0; + end else if (_T_3749) begin + buf_ldfwdtag_1 <= obuf_rdrsp_tag[1:0]; + end else begin + buf_ldfwdtag_1 <= 2'h0; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_1 <= 2'h0; + end else if (buf_wr_en_1) begin + if (ibuf_drainvec_vld[1]) begin + buf_dualtag_1 <= ibuf_dualtag; + end else if (_T_3355) begin + buf_dualtag_1 <= WrPtr0_r; + end else begin + buf_dualtag_1 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_2 <= 2'h0; + end else if (buf_wr_en_2) begin + if (ibuf_drainvec_vld[2]) begin + buf_dualtag_2 <= ibuf_dualtag; + end else if (_T_3364) begin + buf_dualtag_2 <= WrPtr0_r; + end else begin + buf_dualtag_2 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + buf_dualtag_3 <= 2'h0; + end else if (buf_wr_en_3) begin + if (ibuf_drainvec_vld[3]) begin + buf_dualtag_3 <= ibuf_dualtag; + end else if (_T_3373) begin + buf_dualtag_3 <= WrPtr0_r; + end else begin + buf_dualtag_3 <= WrPtr1_r; + end + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4331 <= 1'h0; + end else if (buf_wr_en_0) begin + _T_4331 <= buf_unsign_in[0]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4334 <= 1'h0; + end else if (buf_wr_en_1) begin + _T_4334 <= buf_unsign_in[1]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4337 <= 1'h0; + end else if (buf_wr_en_2) begin + _T_4337 <= buf_unsign_in[2]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4340 <= 1'h0; + end else if (buf_wr_en_3) begin + _T_4340 <= buf_unsign_in[3]; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4406 <= 1'h0; + end else begin + _T_4406 <= _T_4402 & _T_4404; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4401 <= 1'h0; + end else begin + _T_4401 <= _T_4397 & _T_4399; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4396 <= 1'h0; + end else begin + _T_4396 <= _T_4392 & _T_4394; + end + end + always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin + if (reset) begin + _T_4391 <= 1'h0; + end else begin + _T_4391 <= _T_4387 & _T_4389; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + lsu_nonblock_load_valid_r <= 1'h0; + end else begin + lsu_nonblock_load_valid_r <= io_dctl_busbuff_lsu_nonblock_load_valid_m; + end + end + always @(posedge io_lsu_c2_r_clk or posedge reset) begin + if (reset) begin + _T_4956 <= 1'h0; + end else begin + _T_4956 <= _T_4953 & _T_4513; + end + end +endmodule diff --git a/lsu_lsc_ctl.fir b/lsu_lsc_ctl.fir index 76a95948..2ca19b53 100644 --- a/lsu_lsc_ctl.fir +++ b/lsu_lsc_ctl.fir @@ -783,45 +783,45 @@ circuit lsu_lsc_ctl : node _T_151 = bits(io.lsu_exu.lsu_result_m, 31, 0) @[lsu_lsc_ctl.scala 223:103] node _T_152 = bits(store_data_d, 31, 0) @[lsu_lsc_ctl.scala 223:122] node store_data_m_in = mux(_T_150, _T_151, _T_152) @[lsu_lsc_ctl.scala 223:34] - node _T_153 = bits(io.lsu_addr_d, 2, 2) @[lsu_lsc_ctl.scala 225:61] - reg _T_154 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 225:47] - _T_154 <= _T_153 @[lsu_lsc_ctl.scala 225:47] - node _T_155 = bits(io.end_addr_d, 2, 2) @[lsu_lsc_ctl.scala 225:123] - reg _T_156 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 225:109] - _T_156 <= _T_155 @[lsu_lsc_ctl.scala 225:109] - node int = neq(_T_154, _T_156) @[lsu_lsc_ctl.scala 225:71] - node _T_157 = bits(io.lsu_addr_m, 2, 2) @[lsu_lsc_ctl.scala 226:62] - reg _T_158 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 226:48] - _T_158 <= _T_157 @[lsu_lsc_ctl.scala 226:48] - node _T_159 = bits(io.end_addr_m, 2, 2) @[lsu_lsc_ctl.scala 226:124] - reg _T_160 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 226:110] - _T_160 <= _T_159 @[lsu_lsc_ctl.scala 226:110] - node int1 = neq(_T_158, _T_160) @[lsu_lsc_ctl.scala 226:72] - reg store_data_pre_m : UInt, io.lsu_store_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 229:72] - store_data_pre_m <= store_data_m_in @[lsu_lsc_ctl.scala 229:72] - reg _T_161 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 230:62] - _T_161 <= io.lsu_addr_d @[lsu_lsc_ctl.scala 230:62] - io.lsu_addr_m <= _T_161 @[lsu_lsc_ctl.scala 230:24] - reg _T_162 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 231:62] - _T_162 <= io.lsu_addr_m @[lsu_lsc_ctl.scala 231:62] - io.lsu_addr_r <= _T_162 @[lsu_lsc_ctl.scala 231:24] - node _T_163 = bits(io.lsu_addr_m, 31, 3) @[lsu_lsc_ctl.scala 232:60] - node _T_164 = mux(int, end_addr_pre_m, _T_163) @[lsu_lsc_ctl.scala 232:27] - node _T_165 = bits(io.end_addr_d, 2, 0) @[lsu_lsc_ctl.scala 232:117] - reg _T_166 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 232:103] - _T_166 <= _T_165 @[lsu_lsc_ctl.scala 232:103] + node _T_153 = bits(io.lsu_addr_d, 2, 2) @[lsu_lsc_ctl.scala 224:62] + reg _T_154 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 224:48] + _T_154 <= _T_153 @[lsu_lsc_ctl.scala 224:48] + node _T_155 = bits(io.end_addr_d, 2, 2) @[lsu_lsc_ctl.scala 224:124] + reg _T_156 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 224:110] + _T_156 <= _T_155 @[lsu_lsc_ctl.scala 224:110] + node int = neq(_T_154, _T_156) @[lsu_lsc_ctl.scala 224:72] + node _T_157 = bits(io.lsu_addr_m, 2, 2) @[lsu_lsc_ctl.scala 225:62] + reg _T_158 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 225:48] + _T_158 <= _T_157 @[lsu_lsc_ctl.scala 225:48] + node _T_159 = bits(io.end_addr_m, 2, 2) @[lsu_lsc_ctl.scala 225:124] + reg _T_160 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 225:110] + _T_160 <= _T_159 @[lsu_lsc_ctl.scala 225:110] + node int1 = neq(_T_158, _T_160) @[lsu_lsc_ctl.scala 225:72] + reg store_data_pre_m : UInt, io.lsu_store_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 226:72] + store_data_pre_m <= store_data_m_in @[lsu_lsc_ctl.scala 226:72] + reg _T_161 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 227:62] + _T_161 <= io.lsu_addr_d @[lsu_lsc_ctl.scala 227:62] + io.lsu_addr_m <= _T_161 @[lsu_lsc_ctl.scala 227:24] + reg _T_162 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 228:62] + _T_162 <= io.lsu_addr_m @[lsu_lsc_ctl.scala 228:62] + io.lsu_addr_r <= _T_162 @[lsu_lsc_ctl.scala 228:24] + node _T_163 = bits(io.lsu_addr_m, 31, 3) @[lsu_lsc_ctl.scala 229:60] + node _T_164 = mux(int, end_addr_pre_m, _T_163) @[lsu_lsc_ctl.scala 229:27] + node _T_165 = bits(io.end_addr_d, 2, 0) @[lsu_lsc_ctl.scala 229:117] + reg _T_166 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 229:103] + _T_166 <= _T_165 @[lsu_lsc_ctl.scala 229:103] node _T_167 = cat(_T_164, _T_166) @[Cat.scala 29:58] - io.end_addr_m <= _T_167 @[lsu_lsc_ctl.scala 232:17] - node _T_168 = bits(io.lsu_addr_r, 31, 3) @[lsu_lsc_ctl.scala 233:61] - node _T_169 = mux(int1, end_addr_pre_r, _T_168) @[lsu_lsc_ctl.scala 233:27] - node _T_170 = bits(io.end_addr_m, 2, 0) @[lsu_lsc_ctl.scala 233:118] - reg _T_171 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 233:104] - _T_171 <= _T_170 @[lsu_lsc_ctl.scala 233:104] + io.end_addr_m <= _T_167 @[lsu_lsc_ctl.scala 229:17] + node _T_168 = bits(io.lsu_addr_r, 31, 3) @[lsu_lsc_ctl.scala 230:61] + node _T_169 = mux(int1, end_addr_pre_r, _T_168) @[lsu_lsc_ctl.scala 230:27] + node _T_170 = bits(io.end_addr_m, 2, 0) @[lsu_lsc_ctl.scala 230:118] + reg _T_171 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 230:104] + _T_171 <= _T_170 @[lsu_lsc_ctl.scala 230:104] node _T_172 = cat(_T_169, _T_171) @[Cat.scala 29:58] - io.end_addr_r <= _T_172 @[lsu_lsc_ctl.scala 233:17] - node _T_173 = bits(io.end_addr_d, 31, 3) @[lsu_lsc_ctl.scala 234:41] - node _T_174 = and(io.lsu_pkt_d.valid, io.ldst_dual_d) @[lsu_lsc_ctl.scala 234:69] - node _T_175 = or(_T_174, io.clk_override) @[lsu_lsc_ctl.scala 234:87] + io.end_addr_r <= _T_172 @[lsu_lsc_ctl.scala 230:17] + node _T_173 = bits(io.end_addr_d, 31, 3) @[lsu_lsc_ctl.scala 231:41] + node _T_174 = and(io.lsu_pkt_d.valid, io.ldst_dual_d) @[lsu_lsc_ctl.scala 231:69] + node _T_175 = or(_T_174, io.clk_override) @[lsu_lsc_ctl.scala 231:87] node _T_176 = bits(io.scan_mode, 0, 0) @[lib.scala 8:44] inst rvclkhdr_1 of rvclkhdr_1 @[lib.scala 404:23] rvclkhdr_1.clock <= clock @@ -833,10 +833,10 @@ circuit lsu_lsc_ctl : when _T_175 : @[Reg.scala 28:19] _T_177 <= _T_173 @[Reg.scala 28:23] skip @[Reg.scala 28:19] - end_addr_pre_m <= _T_177 @[lsu_lsc_ctl.scala 234:18] - node _T_178 = bits(io.end_addr_m, 31, 3) @[lsu_lsc_ctl.scala 235:41] - node _T_179 = and(io.lsu_pkt_m.valid, int) @[lsu_lsc_ctl.scala 235:69] - node _T_180 = or(_T_179, io.clk_override) @[lsu_lsc_ctl.scala 235:76] + end_addr_pre_m <= _T_177 @[lsu_lsc_ctl.scala 231:18] + node _T_178 = bits(io.end_addr_m, 31, 3) @[lsu_lsc_ctl.scala 232:41] + node _T_179 = and(io.lsu_pkt_m.valid, int) @[lsu_lsc_ctl.scala 232:69] + node _T_180 = or(_T_179, io.clk_override) @[lsu_lsc_ctl.scala 232:76] node _T_181 = bits(io.scan_mode, 0, 0) @[lib.scala 8:44] inst rvclkhdr_2 of rvclkhdr_2 @[lib.scala 404:23] rvclkhdr_2.clock <= clock @@ -848,25 +848,25 @@ circuit lsu_lsc_ctl : when _T_180 : @[Reg.scala 28:19] _T_182 <= _T_178 @[Reg.scala 28:23] skip @[Reg.scala 28:19] - end_addr_pre_r <= _T_182 @[lsu_lsc_ctl.scala 235:18] - reg _T_183 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 236:62] - _T_183 <= io.addr_in_dccm_d @[lsu_lsc_ctl.scala 236:62] - io.addr_in_dccm_m <= _T_183 @[lsu_lsc_ctl.scala 236:24] - reg _T_184 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 237:62] - _T_184 <= io.addr_in_dccm_m @[lsu_lsc_ctl.scala 237:62] - io.addr_in_dccm_r <= _T_184 @[lsu_lsc_ctl.scala 237:24] - reg _T_185 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 238:62] - _T_185 <= io.addr_in_pic_d @[lsu_lsc_ctl.scala 238:62] - io.addr_in_pic_m <= _T_185 @[lsu_lsc_ctl.scala 238:24] - reg _T_186 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 239:62] - _T_186 <= io.addr_in_pic_m @[lsu_lsc_ctl.scala 239:62] - io.addr_in_pic_r <= _T_186 @[lsu_lsc_ctl.scala 239:24] - reg _T_187 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 240:62] - _T_187 <= addrcheck.io.addr_external_d @[lsu_lsc_ctl.scala 240:62] - io.addr_external_m <= _T_187 @[lsu_lsc_ctl.scala 240:24] - reg addr_external_r : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 241:66] - addr_external_r <= io.addr_external_m @[lsu_lsc_ctl.scala 241:66] - node _T_188 = or(io.addr_external_m, io.clk_override) @[lsu_lsc_ctl.scala 242:77] + end_addr_pre_r <= _T_182 @[lsu_lsc_ctl.scala 232:18] + reg _T_183 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 233:62] + _T_183 <= io.addr_in_dccm_d @[lsu_lsc_ctl.scala 233:62] + io.addr_in_dccm_m <= _T_183 @[lsu_lsc_ctl.scala 233:24] + reg _T_184 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 234:62] + _T_184 <= io.addr_in_dccm_m @[lsu_lsc_ctl.scala 234:62] + io.addr_in_dccm_r <= _T_184 @[lsu_lsc_ctl.scala 234:24] + reg _T_185 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 235:62] + _T_185 <= io.addr_in_pic_d @[lsu_lsc_ctl.scala 235:62] + io.addr_in_pic_m <= _T_185 @[lsu_lsc_ctl.scala 235:24] + reg _T_186 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 236:62] + _T_186 <= io.addr_in_pic_m @[lsu_lsc_ctl.scala 236:62] + io.addr_in_pic_r <= _T_186 @[lsu_lsc_ctl.scala 236:24] + reg _T_187 : UInt, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 237:62] + _T_187 <= addrcheck.io.addr_external_d @[lsu_lsc_ctl.scala 237:62] + io.addr_external_m <= _T_187 @[lsu_lsc_ctl.scala 237:24] + reg addr_external_r : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_lsc_ctl.scala 238:66] + addr_external_r <= io.addr_external_m @[lsu_lsc_ctl.scala 238:66] + node _T_188 = or(io.addr_external_m, io.clk_override) @[lsu_lsc_ctl.scala 239:77] node _T_189 = bits(io.scan_mode, 0, 0) @[lib.scala 8:44] inst rvclkhdr_3 of rvclkhdr_3 @[lib.scala 404:23] rvclkhdr_3.clock <= clock @@ -878,110 +878,110 @@ circuit lsu_lsc_ctl : when _T_188 : @[Reg.scala 28:19] bus_read_data_r <= io.bus_read_data_m @[Reg.scala 28:23] skip @[Reg.scala 28:19] - node _T_190 = bits(io.lsu_ld_data_corr_r, 31, 1) @[lsu_lsc_ctl.scala 245:52] - io.lsu_fir_addr <= _T_190 @[lsu_lsc_ctl.scala 245:28] - io.lsu_addr_d <= full_addr_d @[lsu_lsc_ctl.scala 247:28] - node _T_191 = or(io.lsu_pkt_r.bits.store, io.lsu_pkt_r.bits.load) @[lsu_lsc_ctl.scala 249:68] - node _T_192 = and(io.lsu_pkt_r.valid, _T_191) @[lsu_lsc_ctl.scala 249:41] - node _T_193 = eq(io.flush_r, UInt<1>("h00")) @[lsu_lsc_ctl.scala 249:96] - node _T_194 = and(_T_192, _T_193) @[lsu_lsc_ctl.scala 249:94] - node _T_195 = eq(io.lsu_pkt_r.bits.dma, UInt<1>("h00")) @[lsu_lsc_ctl.scala 249:110] - node _T_196 = and(_T_194, _T_195) @[lsu_lsc_ctl.scala 249:108] - io.lsu_commit_r <= _T_196 @[lsu_lsc_ctl.scala 249:19] - node _T_197 = bits(io.picm_mask_data_m, 31, 0) @[lsu_lsc_ctl.scala 250:52] - node _T_198 = eq(io.addr_in_pic_m, UInt<1>("h00")) @[lsu_lsc_ctl.scala 250:69] + node _T_190 = bits(io.lsu_ld_data_corr_r, 31, 1) @[lsu_lsc_ctl.scala 242:52] + io.lsu_fir_addr <= _T_190 @[lsu_lsc_ctl.scala 242:28] + io.lsu_addr_d <= full_addr_d @[lsu_lsc_ctl.scala 244:28] + node _T_191 = or(io.lsu_pkt_r.bits.store, io.lsu_pkt_r.bits.load) @[lsu_lsc_ctl.scala 246:68] + node _T_192 = and(io.lsu_pkt_r.valid, _T_191) @[lsu_lsc_ctl.scala 246:41] + node _T_193 = eq(io.flush_r, UInt<1>("h00")) @[lsu_lsc_ctl.scala 246:96] + node _T_194 = and(_T_192, _T_193) @[lsu_lsc_ctl.scala 246:94] + node _T_195 = eq(io.lsu_pkt_r.bits.dma, UInt<1>("h00")) @[lsu_lsc_ctl.scala 246:110] + node _T_196 = and(_T_194, _T_195) @[lsu_lsc_ctl.scala 246:108] + io.lsu_commit_r <= _T_196 @[lsu_lsc_ctl.scala 246:19] + node _T_197 = bits(io.picm_mask_data_m, 31, 0) @[lsu_lsc_ctl.scala 247:52] + node _T_198 = eq(io.addr_in_pic_m, UInt<1>("h00")) @[lsu_lsc_ctl.scala 247:69] node _T_199 = bits(_T_198, 0, 0) @[Bitwise.scala 72:15] node _T_200 = mux(_T_199, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_201 = or(_T_197, _T_200) @[lsu_lsc_ctl.scala 250:59] - node _T_202 = bits(io.lsu_pkt_m.bits.store_data_bypass_m, 0, 0) @[lsu_lsc_ctl.scala 250:133] - node _T_203 = mux(_T_202, io.lsu_exu.lsu_result_m, store_data_pre_m) @[lsu_lsc_ctl.scala 250:94] - node _T_204 = and(_T_201, _T_203) @[lsu_lsc_ctl.scala 250:89] - io.store_data_m <= _T_204 @[lsu_lsc_ctl.scala 250:29] - node _T_205 = mux(io.addr_external_m, io.bus_read_data_m, io.lsu_ld_data_m) @[lsu_lsc_ctl.scala 271:33] - lsu_ld_datafn_m <= _T_205 @[lsu_lsc_ctl.scala 271:27] - node _T_206 = eq(addr_external_r, UInt<1>("h01")) @[lsu_lsc_ctl.scala 272:49] - node _T_207 = mux(_T_206, bus_read_data_r, io.lsu_ld_data_corr_r) @[lsu_lsc_ctl.scala 272:33] - lsu_ld_datafn_corr_r <= _T_207 @[lsu_lsc_ctl.scala 272:27] - node _T_208 = and(io.lsu_pkt_m.bits.unsign, io.lsu_pkt_m.bits.by) @[lsu_lsc_ctl.scala 273:74] + node _T_201 = or(_T_197, _T_200) @[lsu_lsc_ctl.scala 247:59] + node _T_202 = bits(io.lsu_pkt_m.bits.store_data_bypass_m, 0, 0) @[lsu_lsc_ctl.scala 247:133] + node _T_203 = mux(_T_202, io.lsu_exu.lsu_result_m, store_data_pre_m) @[lsu_lsc_ctl.scala 247:94] + node _T_204 = and(_T_201, _T_203) @[lsu_lsc_ctl.scala 247:89] + io.store_data_m <= _T_204 @[lsu_lsc_ctl.scala 247:29] + node _T_205 = mux(io.addr_external_m, io.bus_read_data_m, io.lsu_ld_data_m) @[lsu_lsc_ctl.scala 268:33] + lsu_ld_datafn_m <= _T_205 @[lsu_lsc_ctl.scala 268:27] + node _T_206 = eq(addr_external_r, UInt<1>("h01")) @[lsu_lsc_ctl.scala 269:49] + node _T_207 = mux(_T_206, bus_read_data_r, io.lsu_ld_data_corr_r) @[lsu_lsc_ctl.scala 269:33] + lsu_ld_datafn_corr_r <= _T_207 @[lsu_lsc_ctl.scala 269:27] + node _T_208 = and(io.lsu_pkt_m.bits.unsign, io.lsu_pkt_m.bits.by) @[lsu_lsc_ctl.scala 270:74] node _T_209 = bits(_T_208, 0, 0) @[Bitwise.scala 72:15] node _T_210 = mux(_T_209, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_211 = bits(lsu_ld_datafn_m, 7, 0) @[lsu_lsc_ctl.scala 273:133] + node _T_211 = bits(lsu_ld_datafn_m, 7, 0) @[lsu_lsc_ctl.scala 270:133] node _T_212 = cat(UInt<24>("h00"), _T_211) @[Cat.scala 29:58] - node _T_213 = and(_T_210, _T_212) @[lsu_lsc_ctl.scala 273:102] - node _T_214 = and(io.lsu_pkt_m.bits.unsign, io.lsu_pkt_m.bits.half) @[lsu_lsc_ctl.scala 274:43] + node _T_213 = and(_T_210, _T_212) @[lsu_lsc_ctl.scala 270:102] + node _T_214 = and(io.lsu_pkt_m.bits.unsign, io.lsu_pkt_m.bits.half) @[lsu_lsc_ctl.scala 271:43] node _T_215 = bits(_T_214, 0, 0) @[Bitwise.scala 72:15] node _T_216 = mux(_T_215, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_217 = bits(lsu_ld_datafn_m, 15, 0) @[lsu_lsc_ctl.scala 274:102] + node _T_217 = bits(lsu_ld_datafn_m, 15, 0) @[lsu_lsc_ctl.scala 271:102] node _T_218 = cat(UInt<16>("h00"), _T_217) @[Cat.scala 29:58] - node _T_219 = and(_T_216, _T_218) @[lsu_lsc_ctl.scala 274:71] - node _T_220 = or(_T_213, _T_219) @[lsu_lsc_ctl.scala 273:141] - node _T_221 = eq(io.lsu_pkt_m.bits.unsign, UInt<1>("h00")) @[lsu_lsc_ctl.scala 275:17] - node _T_222 = and(_T_221, io.lsu_pkt_m.bits.by) @[lsu_lsc_ctl.scala 275:43] + node _T_219 = and(_T_216, _T_218) @[lsu_lsc_ctl.scala 271:71] + node _T_220 = or(_T_213, _T_219) @[lsu_lsc_ctl.scala 270:141] + node _T_221 = eq(io.lsu_pkt_m.bits.unsign, UInt<1>("h00")) @[lsu_lsc_ctl.scala 272:17] + node _T_222 = and(_T_221, io.lsu_pkt_m.bits.by) @[lsu_lsc_ctl.scala 272:43] node _T_223 = bits(_T_222, 0, 0) @[Bitwise.scala 72:15] node _T_224 = mux(_T_223, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_225 = bits(lsu_ld_datafn_m, 7, 7) @[lsu_lsc_ctl.scala 275:102] + node _T_225 = bits(lsu_ld_datafn_m, 7, 7) @[lsu_lsc_ctl.scala 272:102] node _T_226 = bits(_T_225, 0, 0) @[Bitwise.scala 72:15] node _T_227 = mux(_T_226, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] - node _T_228 = bits(lsu_ld_datafn_m, 7, 0) @[lsu_lsc_ctl.scala 275:125] + node _T_228 = bits(lsu_ld_datafn_m, 7, 0) @[lsu_lsc_ctl.scala 272:125] node _T_229 = cat(_T_227, _T_228) @[Cat.scala 29:58] - node _T_230 = and(_T_224, _T_229) @[lsu_lsc_ctl.scala 275:71] - node _T_231 = or(_T_220, _T_230) @[lsu_lsc_ctl.scala 274:114] - node _T_232 = eq(io.lsu_pkt_m.bits.unsign, UInt<1>("h00")) @[lsu_lsc_ctl.scala 276:17] - node _T_233 = and(_T_232, io.lsu_pkt_m.bits.half) @[lsu_lsc_ctl.scala 276:43] + node _T_230 = and(_T_224, _T_229) @[lsu_lsc_ctl.scala 272:71] + node _T_231 = or(_T_220, _T_230) @[lsu_lsc_ctl.scala 271:114] + node _T_232 = eq(io.lsu_pkt_m.bits.unsign, UInt<1>("h00")) @[lsu_lsc_ctl.scala 273:17] + node _T_233 = and(_T_232, io.lsu_pkt_m.bits.half) @[lsu_lsc_ctl.scala 273:43] node _T_234 = bits(_T_233, 0, 0) @[Bitwise.scala 72:15] node _T_235 = mux(_T_234, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_236 = bits(lsu_ld_datafn_m, 15, 15) @[lsu_lsc_ctl.scala 276:101] + node _T_236 = bits(lsu_ld_datafn_m, 15, 15) @[lsu_lsc_ctl.scala 273:101] node _T_237 = bits(_T_236, 0, 0) @[Bitwise.scala 72:15] node _T_238 = mux(_T_237, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] - node _T_239 = bits(lsu_ld_datafn_m, 15, 0) @[lsu_lsc_ctl.scala 276:125] + node _T_239 = bits(lsu_ld_datafn_m, 15, 0) @[lsu_lsc_ctl.scala 273:125] node _T_240 = cat(_T_238, _T_239) @[Cat.scala 29:58] - node _T_241 = and(_T_235, _T_240) @[lsu_lsc_ctl.scala 276:71] - node _T_242 = or(_T_231, _T_241) @[lsu_lsc_ctl.scala 275:134] + node _T_241 = and(_T_235, _T_240) @[lsu_lsc_ctl.scala 273:71] + node _T_242 = or(_T_231, _T_241) @[lsu_lsc_ctl.scala 272:134] node _T_243 = bits(io.lsu_pkt_m.bits.word, 0, 0) @[Bitwise.scala 72:15] node _T_244 = mux(_T_243, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_245 = bits(lsu_ld_datafn_m, 31, 0) @[lsu_lsc_ctl.scala 277:60] - node _T_246 = and(_T_244, _T_245) @[lsu_lsc_ctl.scala 277:43] - node _T_247 = or(_T_242, _T_246) @[lsu_lsc_ctl.scala 276:134] - io.lsu_exu.lsu_result_m <= _T_247 @[lsu_lsc_ctl.scala 273:35] - node _T_248 = and(io.lsu_pkt_r.bits.unsign, io.lsu_pkt_r.bits.by) @[lsu_lsc_ctl.scala 278:66] + node _T_245 = bits(lsu_ld_datafn_m, 31, 0) @[lsu_lsc_ctl.scala 274:60] + node _T_246 = and(_T_244, _T_245) @[lsu_lsc_ctl.scala 274:43] + node _T_247 = or(_T_242, _T_246) @[lsu_lsc_ctl.scala 273:134] + io.lsu_exu.lsu_result_m <= _T_247 @[lsu_lsc_ctl.scala 270:35] + node _T_248 = and(io.lsu_pkt_r.bits.unsign, io.lsu_pkt_r.bits.by) @[lsu_lsc_ctl.scala 275:66] node _T_249 = bits(_T_248, 0, 0) @[Bitwise.scala 72:15] node _T_250 = mux(_T_249, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_251 = bits(lsu_ld_datafn_corr_r, 7, 0) @[lsu_lsc_ctl.scala 278:130] + node _T_251 = bits(lsu_ld_datafn_corr_r, 7, 0) @[lsu_lsc_ctl.scala 275:130] node _T_252 = cat(UInt<24>("h00"), _T_251) @[Cat.scala 29:58] - node _T_253 = and(_T_250, _T_252) @[lsu_lsc_ctl.scala 278:94] - node _T_254 = and(io.lsu_pkt_r.bits.unsign, io.lsu_pkt_r.bits.half) @[lsu_lsc_ctl.scala 279:43] + node _T_253 = and(_T_250, _T_252) @[lsu_lsc_ctl.scala 275:94] + node _T_254 = and(io.lsu_pkt_r.bits.unsign, io.lsu_pkt_r.bits.half) @[lsu_lsc_ctl.scala 276:43] node _T_255 = bits(_T_254, 0, 0) @[Bitwise.scala 72:15] node _T_256 = mux(_T_255, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_257 = bits(lsu_ld_datafn_corr_r, 15, 0) @[lsu_lsc_ctl.scala 279:107] + node _T_257 = bits(lsu_ld_datafn_corr_r, 15, 0) @[lsu_lsc_ctl.scala 276:107] node _T_258 = cat(UInt<16>("h00"), _T_257) @[Cat.scala 29:58] - node _T_259 = and(_T_256, _T_258) @[lsu_lsc_ctl.scala 279:71] - node _T_260 = or(_T_253, _T_259) @[lsu_lsc_ctl.scala 278:138] - node _T_261 = eq(io.lsu_pkt_r.bits.unsign, UInt<1>("h00")) @[lsu_lsc_ctl.scala 280:17] - node _T_262 = and(_T_261, io.lsu_pkt_r.bits.by) @[lsu_lsc_ctl.scala 280:43] + node _T_259 = and(_T_256, _T_258) @[lsu_lsc_ctl.scala 276:71] + node _T_260 = or(_T_253, _T_259) @[lsu_lsc_ctl.scala 275:138] + node _T_261 = eq(io.lsu_pkt_r.bits.unsign, UInt<1>("h00")) @[lsu_lsc_ctl.scala 277:17] + node _T_262 = and(_T_261, io.lsu_pkt_r.bits.by) @[lsu_lsc_ctl.scala 277:43] node _T_263 = bits(_T_262, 0, 0) @[Bitwise.scala 72:15] node _T_264 = mux(_T_263, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_265 = bits(lsu_ld_datafn_corr_r, 7, 7) @[lsu_lsc_ctl.scala 280:107] + node _T_265 = bits(lsu_ld_datafn_corr_r, 7, 7) @[lsu_lsc_ctl.scala 277:107] node _T_266 = bits(_T_265, 0, 0) @[Bitwise.scala 72:15] node _T_267 = mux(_T_266, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] - node _T_268 = bits(lsu_ld_datafn_corr_r, 7, 0) @[lsu_lsc_ctl.scala 280:135] + node _T_268 = bits(lsu_ld_datafn_corr_r, 7, 0) @[lsu_lsc_ctl.scala 277:135] node _T_269 = cat(_T_267, _T_268) @[Cat.scala 29:58] - node _T_270 = and(_T_264, _T_269) @[lsu_lsc_ctl.scala 280:71] - node _T_271 = or(_T_260, _T_270) @[lsu_lsc_ctl.scala 279:119] - node _T_272 = eq(io.lsu_pkt_r.bits.unsign, UInt<1>("h00")) @[lsu_lsc_ctl.scala 281:17] - node _T_273 = and(_T_272, io.lsu_pkt_r.bits.half) @[lsu_lsc_ctl.scala 281:43] + node _T_270 = and(_T_264, _T_269) @[lsu_lsc_ctl.scala 277:71] + node _T_271 = or(_T_260, _T_270) @[lsu_lsc_ctl.scala 276:119] + node _T_272 = eq(io.lsu_pkt_r.bits.unsign, UInt<1>("h00")) @[lsu_lsc_ctl.scala 278:17] + node _T_273 = and(_T_272, io.lsu_pkt_r.bits.half) @[lsu_lsc_ctl.scala 278:43] node _T_274 = bits(_T_273, 0, 0) @[Bitwise.scala 72:15] node _T_275 = mux(_T_274, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_276 = bits(lsu_ld_datafn_corr_r, 15, 15) @[lsu_lsc_ctl.scala 281:106] + node _T_276 = bits(lsu_ld_datafn_corr_r, 15, 15) @[lsu_lsc_ctl.scala 278:106] node _T_277 = bits(_T_276, 0, 0) @[Bitwise.scala 72:15] node _T_278 = mux(_T_277, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] - node _T_279 = bits(lsu_ld_datafn_corr_r, 15, 0) @[lsu_lsc_ctl.scala 281:135] + node _T_279 = bits(lsu_ld_datafn_corr_r, 15, 0) @[lsu_lsc_ctl.scala 278:135] node _T_280 = cat(_T_278, _T_279) @[Cat.scala 29:58] - node _T_281 = and(_T_275, _T_280) @[lsu_lsc_ctl.scala 281:71] - node _T_282 = or(_T_271, _T_281) @[lsu_lsc_ctl.scala 280:144] + node _T_281 = and(_T_275, _T_280) @[lsu_lsc_ctl.scala 278:71] + node _T_282 = or(_T_271, _T_281) @[lsu_lsc_ctl.scala 277:144] node _T_283 = bits(io.lsu_pkt_r.bits.word, 0, 0) @[Bitwise.scala 72:15] node _T_284 = mux(_T_283, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_285 = bits(lsu_ld_datafn_corr_r, 31, 0) @[lsu_lsc_ctl.scala 282:65] - node _T_286 = and(_T_284, _T_285) @[lsu_lsc_ctl.scala 282:43] - node _T_287 = or(_T_282, _T_286) @[lsu_lsc_ctl.scala 281:144] - io.lsu_result_corr_r <= _T_287 @[lsu_lsc_ctl.scala 278:27] + node _T_285 = bits(lsu_ld_datafn_corr_r, 31, 0) @[lsu_lsc_ctl.scala 279:65] + node _T_286 = and(_T_284, _T_285) @[lsu_lsc_ctl.scala 279:43] + node _T_287 = or(_T_282, _T_286) @[lsu_lsc_ctl.scala 278:144] + io.lsu_result_corr_r <= _T_287 @[lsu_lsc_ctl.scala 275:27] diff --git a/lsu_lsc_ctl.v b/lsu_lsc_ctl.v index 528cdc60..1c271619 100644 --- a/lsu_lsc_ctl.v +++ b/lsu_lsc_ctl.v @@ -526,92 +526,92 @@ module lsu_lsc_ctl( reg _T_143; // @[lsu_lsc_ctl.scala 219:65] wire [5:0] _T_146 = {io_dma_lsc_ctl_dma_mem_addr[2:0],3'h0}; // @[Cat.scala 29:58] wire [63:0] dma_mem_wdata_shifted = io_dma_lsc_ctl_dma_mem_wdata >> _T_146; // @[lsu_lsc_ctl.scala 221:66] - reg _T_154; // @[lsu_lsc_ctl.scala 225:47] - reg _T_156; // @[lsu_lsc_ctl.scala 225:109] - wire int_ = _T_154 != _T_156; // @[lsu_lsc_ctl.scala 225:71] - reg _T_158; // @[lsu_lsc_ctl.scala 226:48] - reg _T_160; // @[lsu_lsc_ctl.scala 226:110] - wire int1 = _T_158 != _T_160; // @[lsu_lsc_ctl.scala 226:72] - reg [31:0] store_data_pre_m; // @[lsu_lsc_ctl.scala 229:72] - reg [31:0] _T_161; // @[lsu_lsc_ctl.scala 230:62] - reg [31:0] _T_162; // @[lsu_lsc_ctl.scala 231:62] + reg _T_154; // @[lsu_lsc_ctl.scala 224:48] + reg _T_156; // @[lsu_lsc_ctl.scala 224:110] + wire int_ = _T_154 != _T_156; // @[lsu_lsc_ctl.scala 224:72] + reg _T_158; // @[lsu_lsc_ctl.scala 225:48] + reg _T_160; // @[lsu_lsc_ctl.scala 225:110] + wire int1 = _T_158 != _T_160; // @[lsu_lsc_ctl.scala 225:72] + reg [31:0] store_data_pre_m; // @[lsu_lsc_ctl.scala 226:72] + reg [31:0] _T_161; // @[lsu_lsc_ctl.scala 227:62] + reg [31:0] _T_162; // @[lsu_lsc_ctl.scala 228:62] reg [28:0] end_addr_pre_m; // @[Reg.scala 27:20] - wire [28:0] _T_164 = int_ ? end_addr_pre_m : io_lsu_addr_m[31:3]; // @[lsu_lsc_ctl.scala 232:27] - reg [2:0] _T_166; // @[lsu_lsc_ctl.scala 232:103] + wire [28:0] _T_164 = int_ ? end_addr_pre_m : io_lsu_addr_m[31:3]; // @[lsu_lsc_ctl.scala 229:27] + reg [2:0] _T_166; // @[lsu_lsc_ctl.scala 229:103] reg [28:0] end_addr_pre_r; // @[Reg.scala 27:20] - wire [28:0] _T_169 = int1 ? end_addr_pre_r : io_lsu_addr_r[31:3]; // @[lsu_lsc_ctl.scala 233:27] - reg [2:0] _T_171; // @[lsu_lsc_ctl.scala 233:104] - wire _T_174 = io_lsu_pkt_d_valid & io_ldst_dual_d; // @[lsu_lsc_ctl.scala 234:69] - wire _T_175 = _T_174 | io_clk_override; // @[lsu_lsc_ctl.scala 234:87] - wire _T_179 = io_lsu_pkt_m_valid & int_; // @[lsu_lsc_ctl.scala 235:69] - wire _T_180 = _T_179 | io_clk_override; // @[lsu_lsc_ctl.scala 235:76] - reg _T_183; // @[lsu_lsc_ctl.scala 236:62] - reg _T_184; // @[lsu_lsc_ctl.scala 237:62] - reg _T_185; // @[lsu_lsc_ctl.scala 238:62] - reg _T_186; // @[lsu_lsc_ctl.scala 239:62] - reg _T_187; // @[lsu_lsc_ctl.scala 240:62] - reg addr_external_r; // @[lsu_lsc_ctl.scala 241:66] - wire _T_188 = io_addr_external_m | io_clk_override; // @[lsu_lsc_ctl.scala 242:77] + wire [28:0] _T_169 = int1 ? end_addr_pre_r : io_lsu_addr_r[31:3]; // @[lsu_lsc_ctl.scala 230:27] + reg [2:0] _T_171; // @[lsu_lsc_ctl.scala 230:104] + wire _T_174 = io_lsu_pkt_d_valid & io_ldst_dual_d; // @[lsu_lsc_ctl.scala 231:69] + wire _T_175 = _T_174 | io_clk_override; // @[lsu_lsc_ctl.scala 231:87] + wire _T_179 = io_lsu_pkt_m_valid & int_; // @[lsu_lsc_ctl.scala 232:69] + wire _T_180 = _T_179 | io_clk_override; // @[lsu_lsc_ctl.scala 232:76] + reg _T_183; // @[lsu_lsc_ctl.scala 233:62] + reg _T_184; // @[lsu_lsc_ctl.scala 234:62] + reg _T_185; // @[lsu_lsc_ctl.scala 235:62] + reg _T_186; // @[lsu_lsc_ctl.scala 236:62] + reg _T_187; // @[lsu_lsc_ctl.scala 237:62] + reg addr_external_r; // @[lsu_lsc_ctl.scala 238:66] + wire _T_188 = io_addr_external_m | io_clk_override; // @[lsu_lsc_ctl.scala 239:77] reg [31:0] bus_read_data_r; // @[Reg.scala 27:20] - wire _T_191 = io_lsu_pkt_r_bits_store | io_lsu_pkt_r_bits_load; // @[lsu_lsc_ctl.scala 249:68] - wire _T_192 = io_lsu_pkt_r_valid & _T_191; // @[lsu_lsc_ctl.scala 249:41] - wire _T_193 = ~io_flush_r; // @[lsu_lsc_ctl.scala 249:96] - wire _T_194 = _T_192 & _T_193; // @[lsu_lsc_ctl.scala 249:94] - wire _T_195 = ~io_lsu_pkt_r_bits_dma; // @[lsu_lsc_ctl.scala 249:110] - wire _T_198 = ~io_addr_in_pic_m; // @[lsu_lsc_ctl.scala 250:69] + wire _T_191 = io_lsu_pkt_r_bits_store | io_lsu_pkt_r_bits_load; // @[lsu_lsc_ctl.scala 246:68] + wire _T_192 = io_lsu_pkt_r_valid & _T_191; // @[lsu_lsc_ctl.scala 246:41] + wire _T_193 = ~io_flush_r; // @[lsu_lsc_ctl.scala 246:96] + wire _T_194 = _T_192 & _T_193; // @[lsu_lsc_ctl.scala 246:94] + wire _T_195 = ~io_lsu_pkt_r_bits_dma; // @[lsu_lsc_ctl.scala 246:110] + wire _T_198 = ~io_addr_in_pic_m; // @[lsu_lsc_ctl.scala 247:69] wire [31:0] _T_200 = _T_198 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_201 = io_picm_mask_data_m | _T_200; // @[lsu_lsc_ctl.scala 250:59] - wire [31:0] _T_203 = io_lsu_pkt_m_bits_store_data_bypass_m ? io_lsu_exu_lsu_result_m : store_data_pre_m; // @[lsu_lsc_ctl.scala 250:94] - wire [31:0] lsu_ld_datafn_m = io_addr_external_m ? io_bus_read_data_m : io_lsu_ld_data_m; // @[lsu_lsc_ctl.scala 271:33] - wire [31:0] lsu_ld_datafn_corr_r = addr_external_r ? bus_read_data_r : io_lsu_ld_data_corr_r; // @[lsu_lsc_ctl.scala 272:33] - wire _T_208 = io_lsu_pkt_m_bits_unsign & io_lsu_pkt_m_bits_by; // @[lsu_lsc_ctl.scala 273:74] + wire [31:0] _T_201 = io_picm_mask_data_m | _T_200; // @[lsu_lsc_ctl.scala 247:59] + wire [31:0] _T_203 = io_lsu_pkt_m_bits_store_data_bypass_m ? io_lsu_exu_lsu_result_m : store_data_pre_m; // @[lsu_lsc_ctl.scala 247:94] + wire [31:0] lsu_ld_datafn_m = io_addr_external_m ? io_bus_read_data_m : io_lsu_ld_data_m; // @[lsu_lsc_ctl.scala 268:33] + wire [31:0] lsu_ld_datafn_corr_r = addr_external_r ? bus_read_data_r : io_lsu_ld_data_corr_r; // @[lsu_lsc_ctl.scala 269:33] + wire _T_208 = io_lsu_pkt_m_bits_unsign & io_lsu_pkt_m_bits_by; // @[lsu_lsc_ctl.scala 270:74] wire [31:0] _T_210 = _T_208 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] wire [31:0] _T_212 = {24'h0,lsu_ld_datafn_m[7:0]}; // @[Cat.scala 29:58] - wire [31:0] _T_213 = _T_210 & _T_212; // @[lsu_lsc_ctl.scala 273:102] - wire _T_214 = io_lsu_pkt_m_bits_unsign & io_lsu_pkt_m_bits_half; // @[lsu_lsc_ctl.scala 274:43] + wire [31:0] _T_213 = _T_210 & _T_212; // @[lsu_lsc_ctl.scala 270:102] + wire _T_214 = io_lsu_pkt_m_bits_unsign & io_lsu_pkt_m_bits_half; // @[lsu_lsc_ctl.scala 271:43] wire [31:0] _T_216 = _T_214 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] wire [31:0] _T_218 = {16'h0,lsu_ld_datafn_m[15:0]}; // @[Cat.scala 29:58] - wire [31:0] _T_219 = _T_216 & _T_218; // @[lsu_lsc_ctl.scala 274:71] - wire [31:0] _T_220 = _T_213 | _T_219; // @[lsu_lsc_ctl.scala 273:141] - wire _T_221 = ~io_lsu_pkt_m_bits_unsign; // @[lsu_lsc_ctl.scala 275:17] - wire _T_222 = _T_221 & io_lsu_pkt_m_bits_by; // @[lsu_lsc_ctl.scala 275:43] + wire [31:0] _T_219 = _T_216 & _T_218; // @[lsu_lsc_ctl.scala 271:71] + wire [31:0] _T_220 = _T_213 | _T_219; // @[lsu_lsc_ctl.scala 270:141] + wire _T_221 = ~io_lsu_pkt_m_bits_unsign; // @[lsu_lsc_ctl.scala 272:17] + wire _T_222 = _T_221 & io_lsu_pkt_m_bits_by; // @[lsu_lsc_ctl.scala 272:43] wire [31:0] _T_224 = _T_222 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] wire [23:0] _T_227 = lsu_ld_datafn_m[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] wire [31:0] _T_229 = {_T_227,lsu_ld_datafn_m[7:0]}; // @[Cat.scala 29:58] - wire [31:0] _T_230 = _T_224 & _T_229; // @[lsu_lsc_ctl.scala 275:71] - wire [31:0] _T_231 = _T_220 | _T_230; // @[lsu_lsc_ctl.scala 274:114] - wire _T_233 = _T_221 & io_lsu_pkt_m_bits_half; // @[lsu_lsc_ctl.scala 276:43] + wire [31:0] _T_230 = _T_224 & _T_229; // @[lsu_lsc_ctl.scala 272:71] + wire [31:0] _T_231 = _T_220 | _T_230; // @[lsu_lsc_ctl.scala 271:114] + wire _T_233 = _T_221 & io_lsu_pkt_m_bits_half; // @[lsu_lsc_ctl.scala 273:43] wire [31:0] _T_235 = _T_233 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] wire [15:0] _T_238 = lsu_ld_datafn_m[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] wire [31:0] _T_240 = {_T_238,lsu_ld_datafn_m[15:0]}; // @[Cat.scala 29:58] - wire [31:0] _T_241 = _T_235 & _T_240; // @[lsu_lsc_ctl.scala 276:71] - wire [31:0] _T_242 = _T_231 | _T_241; // @[lsu_lsc_ctl.scala 275:134] + wire [31:0] _T_241 = _T_235 & _T_240; // @[lsu_lsc_ctl.scala 273:71] + wire [31:0] _T_242 = _T_231 | _T_241; // @[lsu_lsc_ctl.scala 272:134] wire [31:0] _T_244 = io_lsu_pkt_m_bits_word ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_246 = _T_244 & lsu_ld_datafn_m; // @[lsu_lsc_ctl.scala 277:43] - wire _T_248 = io_lsu_pkt_r_bits_unsign & io_lsu_pkt_r_bits_by; // @[lsu_lsc_ctl.scala 278:66] + wire [31:0] _T_246 = _T_244 & lsu_ld_datafn_m; // @[lsu_lsc_ctl.scala 274:43] + wire _T_248 = io_lsu_pkt_r_bits_unsign & io_lsu_pkt_r_bits_by; // @[lsu_lsc_ctl.scala 275:66] wire [31:0] _T_250 = _T_248 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] wire [31:0] _T_252 = {24'h0,lsu_ld_datafn_corr_r[7:0]}; // @[Cat.scala 29:58] - wire [31:0] _T_253 = _T_250 & _T_252; // @[lsu_lsc_ctl.scala 278:94] - wire _T_254 = io_lsu_pkt_r_bits_unsign & io_lsu_pkt_r_bits_half; // @[lsu_lsc_ctl.scala 279:43] + wire [31:0] _T_253 = _T_250 & _T_252; // @[lsu_lsc_ctl.scala 275:94] + wire _T_254 = io_lsu_pkt_r_bits_unsign & io_lsu_pkt_r_bits_half; // @[lsu_lsc_ctl.scala 276:43] wire [31:0] _T_256 = _T_254 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] wire [31:0] _T_258 = {16'h0,lsu_ld_datafn_corr_r[15:0]}; // @[Cat.scala 29:58] - wire [31:0] _T_259 = _T_256 & _T_258; // @[lsu_lsc_ctl.scala 279:71] - wire [31:0] _T_260 = _T_253 | _T_259; // @[lsu_lsc_ctl.scala 278:138] - wire _T_261 = ~io_lsu_pkt_r_bits_unsign; // @[lsu_lsc_ctl.scala 280:17] - wire _T_262 = _T_261 & io_lsu_pkt_r_bits_by; // @[lsu_lsc_ctl.scala 280:43] + wire [31:0] _T_259 = _T_256 & _T_258; // @[lsu_lsc_ctl.scala 276:71] + wire [31:0] _T_260 = _T_253 | _T_259; // @[lsu_lsc_ctl.scala 275:138] + wire _T_261 = ~io_lsu_pkt_r_bits_unsign; // @[lsu_lsc_ctl.scala 277:17] + wire _T_262 = _T_261 & io_lsu_pkt_r_bits_by; // @[lsu_lsc_ctl.scala 277:43] wire [31:0] _T_264 = _T_262 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] wire [23:0] _T_267 = lsu_ld_datafn_corr_r[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] wire [31:0] _T_269 = {_T_267,lsu_ld_datafn_corr_r[7:0]}; // @[Cat.scala 29:58] - wire [31:0] _T_270 = _T_264 & _T_269; // @[lsu_lsc_ctl.scala 280:71] - wire [31:0] _T_271 = _T_260 | _T_270; // @[lsu_lsc_ctl.scala 279:119] - wire _T_273 = _T_261 & io_lsu_pkt_r_bits_half; // @[lsu_lsc_ctl.scala 281:43] + wire [31:0] _T_270 = _T_264 & _T_269; // @[lsu_lsc_ctl.scala 277:71] + wire [31:0] _T_271 = _T_260 | _T_270; // @[lsu_lsc_ctl.scala 276:119] + wire _T_273 = _T_261 & io_lsu_pkt_r_bits_half; // @[lsu_lsc_ctl.scala 278:43] wire [31:0] _T_275 = _T_273 ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] wire [15:0] _T_278 = lsu_ld_datafn_corr_r[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] wire [31:0] _T_280 = {_T_278,lsu_ld_datafn_corr_r[15:0]}; // @[Cat.scala 29:58] - wire [31:0] _T_281 = _T_275 & _T_280; // @[lsu_lsc_ctl.scala 281:71] - wire [31:0] _T_282 = _T_271 | _T_281; // @[lsu_lsc_ctl.scala 280:144] + wire [31:0] _T_281 = _T_275 & _T_280; // @[lsu_lsc_ctl.scala 278:71] + wire [31:0] _T_282 = _T_271 | _T_281; // @[lsu_lsc_ctl.scala 277:144] wire [31:0] _T_284 = io_lsu_pkt_r_bits_word ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_286 = _T_284 & lsu_ld_datafn_corr_r; // @[lsu_lsc_ctl.scala 282:43] + wire [31:0] _T_286 = _T_284 & lsu_ld_datafn_corr_r; // @[lsu_lsc_ctl.scala 279:43] lsu_addrcheck addrcheck ( // @[lsu_lsc_ctl.scala 117:25] .reset(addrcheck_reset), .io_lsu_c2_m_clk(addrcheck_io_lsu_c2_m_clk), @@ -653,18 +653,18 @@ module lsu_lsc_ctl( .io_clk(rvclkhdr_3_io_clk), .io_en(rvclkhdr_3_io_en) ); - assign io_lsu_exu_lsu_result_m = _T_242 | _T_246; // @[lsu_lsc_ctl.scala 273:35] - assign io_lsu_result_corr_r = _T_282 | _T_286; // @[lsu_lsc_ctl.scala 278:27] - assign io_lsu_addr_d = {_T_41,_T_11[11:0]}; // @[lsu_lsc_ctl.scala 247:28] - assign io_lsu_addr_m = _T_161; // @[lsu_lsc_ctl.scala 230:24] - assign io_lsu_addr_r = _T_162; // @[lsu_lsc_ctl.scala 231:24] + assign io_lsu_exu_lsu_result_m = _T_242 | _T_246; // @[lsu_lsc_ctl.scala 270:35] + assign io_lsu_result_corr_r = _T_282 | _T_286; // @[lsu_lsc_ctl.scala 275:27] + assign io_lsu_addr_d = {_T_41,_T_11[11:0]}; // @[lsu_lsc_ctl.scala 244:28] + assign io_lsu_addr_m = _T_161; // @[lsu_lsc_ctl.scala 227:24] + assign io_lsu_addr_r = _T_162; // @[lsu_lsc_ctl.scala 228:24] assign io_end_addr_d = rs1_d + _T_65; // @[lsu_lsc_ctl.scala 114:24] - assign io_end_addr_m = {_T_164,_T_166}; // @[lsu_lsc_ctl.scala 232:17] - assign io_end_addr_r = {_T_169,_T_171}; // @[lsu_lsc_ctl.scala 233:17] - assign io_store_data_m = _T_201 & _T_203; // @[lsu_lsc_ctl.scala 250:29] + assign io_end_addr_m = {_T_164,_T_166}; // @[lsu_lsc_ctl.scala 229:17] + assign io_end_addr_r = {_T_169,_T_171}; // @[lsu_lsc_ctl.scala 230:17] + assign io_store_data_m = _T_201 & _T_203; // @[lsu_lsc_ctl.scala 247:29] assign io_lsu_exc_m = access_fault_m | misaligned_fault_m; // @[lsu_lsc_ctl.scala 154:16] assign io_is_sideeffects_m = addrcheck_io_is_sideeffects_m; // @[lsu_lsc_ctl.scala 127:42] - assign io_lsu_commit_r = _T_194 & _T_195; // @[lsu_lsc_ctl.scala 249:19] + assign io_lsu_commit_r = _T_194 & _T_195; // @[lsu_lsc_ctl.scala 246:19] assign io_lsu_single_ecc_error_incr = _T_74 & io_lsu_pkt_r_valid; // @[lsu_lsc_ctl.scala 155:32] assign io_lsu_error_pkt_r_valid = _T_112; // @[lsu_lsc_ctl.scala 184:24 lsu_lsc_ctl.scala 186:30] assign io_lsu_error_pkt_r_bits_single_ecc_error = _T_111; // @[lsu_lsc_ctl.scala 184:24 lsu_lsc_ctl.scala 185:46] @@ -672,15 +672,15 @@ module lsu_lsc_ctl( assign io_lsu_error_pkt_r_bits_exc_type = _T_110_bits_exc_type; // @[lsu_lsc_ctl.scala 184:24] assign io_lsu_error_pkt_r_bits_mscause = _T_110_bits_mscause; // @[lsu_lsc_ctl.scala 184:24] assign io_lsu_error_pkt_r_bits_addr = _T_110_bits_addr; // @[lsu_lsc_ctl.scala 184:24] - assign io_lsu_fir_addr = io_lsu_ld_data_corr_r[31:1]; // @[lsu_lsc_ctl.scala 245:28] + assign io_lsu_fir_addr = io_lsu_ld_data_corr_r[31:1]; // @[lsu_lsc_ctl.scala 242:28] assign io_lsu_fir_error = _T_113; // @[lsu_lsc_ctl.scala 187:38] assign io_addr_in_dccm_d = addrcheck_io_addr_in_dccm_d; // @[lsu_lsc_ctl.scala 128:42] - assign io_addr_in_dccm_m = _T_183; // @[lsu_lsc_ctl.scala 236:24] - assign io_addr_in_dccm_r = _T_184; // @[lsu_lsc_ctl.scala 237:24] + assign io_addr_in_dccm_m = _T_183; // @[lsu_lsc_ctl.scala 233:24] + assign io_addr_in_dccm_r = _T_184; // @[lsu_lsc_ctl.scala 234:24] assign io_addr_in_pic_d = addrcheck_io_addr_in_pic_d; // @[lsu_lsc_ctl.scala 129:42] - assign io_addr_in_pic_m = _T_185; // @[lsu_lsc_ctl.scala 238:24] - assign io_addr_in_pic_r = _T_186; // @[lsu_lsc_ctl.scala 239:24] - assign io_addr_external_m = _T_187; // @[lsu_lsc_ctl.scala 240:24] + assign io_addr_in_pic_m = _T_185; // @[lsu_lsc_ctl.scala 235:24] + assign io_addr_in_pic_r = _T_186; // @[lsu_lsc_ctl.scala 236:24] + assign io_addr_external_m = _T_187; // @[lsu_lsc_ctl.scala 237:24] assign io_lsu_pkt_d_valid = _T_128 | io_dma_lsc_ctl_dma_dccm_req; // @[lsu_lsc_ctl.scala 208:20 lsu_lsc_ctl.scala 212:24] assign io_lsu_pkt_d_bits_fast_int = io_dec_lsu_valid_raw_d & io_lsu_p_bits_fast_int; // @[lsu_lsc_ctl.scala 208:20] assign io_lsu_pkt_d_bits_stack = io_dec_lsu_valid_raw_d & io_lsu_p_bits_stack; // @[lsu_lsc_ctl.scala 208:20] diff --git a/src/main/scala/lsu/lsu.scala b/src/main/scala/lsu/lsu.scala index 5ae6353e..c293d2c1 100644 --- a/src/main/scala/lsu/lsu.scala +++ b/src/main/scala/lsu/lsu.scala @@ -84,20 +84,20 @@ class lsu extends Module with RequireAsyncReset with param with lib { val lsu_raw_fwd_hi_m = stbuf.io.stbuf_fwdbyteen_hi_m.orR // block stores in decode - for either bus or stbuf reasons - io.lsu_store_stall_any := stbuf.io.lsu_stbuf_full_any | bus_intf.io.lsu_bus_buffer_full_any | dccm_ctl.io.ld_single_ecc_error_r_ff - io.lsu_load_stall_any := bus_intf.io.lsu_bus_buffer_full_any | dccm_ctl.io.ld_single_ecc_error_r_ff - io.lsu_fastint_stall_any := dccm_ctl.io.ld_single_ecc_error_r // Stall the fastint in decode-1 stage + io.lsu_store_stall_any := stbuf.io.lsu_stbuf_full_any | bus_intf.io.lsu_bus_buffer_full_any | dccm_ctl.io.ld_single_ecc_error_r_ff + io.lsu_load_stall_any := bus_intf.io.lsu_bus_buffer_full_any | dccm_ctl.io.ld_single_ecc_error_r_ff + io.lsu_fastint_stall_any := dccm_ctl.io.ld_single_ecc_error_r // Stall the fastint in decode-1 stage // Ready to accept dma trxns // There can't be any inpipe forwarding from non-dma packet to dma packet since they can be flushed so we can't have st in r when dma is in m - val dma_mem_tag_d = io.lsu_dma.dma_mem_tag - val ldst_nodma_mtor = lsu_lsc_ctl.io.lsu_pkt_m.valid & !lsu_lsc_ctl.io.lsu_pkt_m.bits.dma & (lsu_lsc_ctl.io.addr_in_dccm_m | lsu_lsc_ctl.io.addr_in_pic_m) & lsu_lsc_ctl.io.lsu_pkt_m.bits.store - io.lsu_dma.dccm_ready := !(io.dec_lsu_valid_raw_d | ldst_nodma_mtor | dccm_ctl.io.ld_single_ecc_error_r_ff) - val dma_dccm_wen = io.lsu_dma.dma_lsc_ctl.dma_dccm_req & io.lsu_dma.dma_lsc_ctl.dma_mem_write & lsu_lsc_ctl.io.addr_in_dccm_d & io.lsu_dma.dma_lsc_ctl.dma_mem_sz(1) - val dma_pic_wen = io.lsu_dma.dma_lsc_ctl.dma_dccm_req & io.lsu_dma.dma_lsc_ctl.dma_mem_write & lsu_lsc_ctl.io.addr_in_pic_d - dma_dccm_wdata := io.lsu_dma.dma_lsc_ctl.dma_mem_wdata >> Cat(io.lsu_dma.dma_lsc_ctl.dma_mem_addr(2,0), 0.U(3.W)) // Shift the dma data to lower bits to make it consistent to lsu stores - dma_dccm_wdata_hi := dma_dccm_wdata(63,32) - dma_dccm_wdata_lo := dma_dccm_wdata(31,0) + val dma_mem_tag_d = io.lsu_dma.dma_mem_tag + val ldst_nodma_mtor = lsu_lsc_ctl.io.lsu_pkt_m.valid & !lsu_lsc_ctl.io.lsu_pkt_m.bits.dma & (lsu_lsc_ctl.io.addr_in_dccm_m | lsu_lsc_ctl.io.addr_in_pic_m) & lsu_lsc_ctl.io.lsu_pkt_m.bits.store + io.lsu_dma.dccm_ready := !(io.dec_lsu_valid_raw_d | ldst_nodma_mtor | dccm_ctl.io.ld_single_ecc_error_r_ff) + val dma_dccm_wen = io.lsu_dma.dma_lsc_ctl.dma_dccm_req & io.lsu_dma.dma_lsc_ctl.dma_mem_write & lsu_lsc_ctl.io.addr_in_dccm_d & io.lsu_dma.dma_lsc_ctl.dma_mem_sz(1) + val dma_pic_wen = io.lsu_dma.dma_lsc_ctl.dma_dccm_req & io.lsu_dma.dma_lsc_ctl.dma_mem_write & lsu_lsc_ctl.io.addr_in_pic_d + dma_dccm_wdata := io.lsu_dma.dma_lsc_ctl.dma_mem_wdata >> Cat(io.lsu_dma.dma_lsc_ctl.dma_mem_addr(2,0), 0.U(3.W)) // Shift the dma data to lower bits to make it consistent to lsu stores + dma_dccm_wdata_hi := dma_dccm_wdata(63,32) + dma_dccm_wdata_lo := dma_dccm_wdata(31,0) val flush_m_up = io.dec_tlu_flush_lower_r val flush_r = io.dec_tlu_i0_kill_writeb_r @@ -107,17 +107,17 @@ class lsu extends Module with RequireAsyncReset with param with lib { // Store buffer now have only non-dma dccm stores // stbuf_empty not needed since it has only dccm stores io.lsu_idle_any := !((lsu_lsc_ctl.io.lsu_pkt_m.valid & !lsu_lsc_ctl.io.lsu_pkt_m.bits.dma) | (lsu_lsc_ctl.io.lsu_pkt_r.valid & !lsu_lsc_ctl.io.lsu_pkt_r.bits.dma)) & bus_intf.io.lsu_bus_buffer_empty_any - io.lsu_active := (lsu_lsc_ctl.io.lsu_pkt_m.valid | lsu_lsc_ctl.io.lsu_pkt_r.valid | dccm_ctl.io.ld_single_ecc_error_r_ff) | !bus_intf.io.lsu_bus_buffer_empty_any // This includes DMA. Used for gating top clock + io.lsu_active := (lsu_lsc_ctl.io.lsu_pkt_m.valid | lsu_lsc_ctl.io.lsu_pkt_r.valid | dccm_ctl.io.ld_single_ecc_error_r_ff) | !bus_intf.io.lsu_bus_buffer_empty_any // This includes DMA. Used for gating top clock // Instantiate the store buffer val store_stbuf_reqvld_r = lsu_lsc_ctl.io.lsu_pkt_r.valid & lsu_lsc_ctl.io.lsu_pkt_r.bits.store & lsu_lsc_ctl.io.addr_in_dccm_r & !flush_r & (!lsu_lsc_ctl.io.lsu_pkt_r.bits.dma | ((lsu_lsc_ctl.io.lsu_pkt_r.bits.by | lsu_lsc_ctl.io.lsu_pkt_r.bits.half) & !ecc.io.lsu_double_ecc_error_r)) // Disable Forwarding for now - val lsu_cmpen_m = lsu_lsc_ctl.io.lsu_pkt_m.valid & (lsu_lsc_ctl.io.lsu_pkt_m.bits.load | lsu_lsc_ctl.io.lsu_pkt_m.bits.store) & (lsu_lsc_ctl.io.addr_in_dccm_m | lsu_lsc_ctl.io.addr_in_pic_m) + val lsu_cmpen_m = lsu_lsc_ctl.io.lsu_pkt_m.valid & (lsu_lsc_ctl.io.lsu_pkt_m.bits.load | lsu_lsc_ctl.io.lsu_pkt_m.bits.store) & (lsu_lsc_ctl.io.addr_in_dccm_m | lsu_lsc_ctl.io.addr_in_pic_m) // Bus signals - val lsu_busreq_m = lsu_lsc_ctl.io.lsu_pkt_m.valid & ((lsu_lsc_ctl.io.lsu_pkt_m.bits.load | lsu_lsc_ctl.io.lsu_pkt_m.bits.store) & lsu_lsc_ctl.io.addr_external_m) & !flush_m_up & !lsu_lsc_ctl.io.lsu_exc_m & !lsu_lsc_ctl.io.lsu_pkt_m.bits.fast_int + val lsu_busreq_m = lsu_lsc_ctl.io.lsu_pkt_m.valid & ((lsu_lsc_ctl.io.lsu_pkt_m.bits.load | lsu_lsc_ctl.io.lsu_pkt_m.bits.store) & lsu_lsc_ctl.io.addr_external_m) & !flush_m_up & !lsu_lsc_ctl.io.lsu_exc_m & !lsu_lsc_ctl.io.lsu_pkt_m.bits.fast_int // Dual signals // PMU signals - io.lsu_pmu_misaligned_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & ((lsu_lsc_ctl.io.lsu_pkt_m.bits.half & lsu_lsc_ctl.io.lsu_addr_m(0)) | (lsu_lsc_ctl.io.lsu_pkt_m.bits.word & lsu_lsc_ctl.io.lsu_addr_m(1,0).orR)) + io.lsu_pmu_misaligned_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & ((lsu_lsc_ctl.io.lsu_pkt_m.bits.half & lsu_lsc_ctl.io.lsu_addr_m(0)) | (lsu_lsc_ctl.io.lsu_pkt_m.bits.word & lsu_lsc_ctl.io.lsu_addr_m(1,0).orR)) io.lsu_tlu.lsu_pmu_load_external_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & lsu_lsc_ctl.io.lsu_pkt_m.bits.load & lsu_lsc_ctl.io.addr_external_m io.lsu_tlu.lsu_pmu_store_external_m := lsu_lsc_ctl.io.lsu_pkt_m.valid & lsu_lsc_ctl.io.lsu_pkt_m.bits.store & lsu_lsc_ctl.io.addr_external_m @@ -229,26 +229,26 @@ class lsu extends Module with RequireAsyncReset with param with lib { stbuf.io.ldst_dual_r := lsu_lsc_ctl.io.lsu_addr_r(2) =/= lsu_lsc_ctl.io.end_addr_r(2) stbuf.io.lsu_stbuf_c1_clk := clkdomain.io.lsu_stbuf_c1_clk stbuf.io.lsu_free_c2_clk := clkdomain.io.lsu_free_c2_clk - stbuf.io.lsu_pkt_m <> lsu_lsc_ctl.io.lsu_pkt_m - stbuf.io.lsu_pkt_r <> lsu_lsc_ctl.io.lsu_pkt_r - stbuf.io.store_stbuf_reqvld_r := store_stbuf_reqvld_r - stbuf.io.lsu_commit_r := lsu_lsc_ctl.io.lsu_commit_r - stbuf.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d + stbuf.io.lsu_pkt_m <> lsu_lsc_ctl.io.lsu_pkt_m + stbuf.io.lsu_pkt_r <> lsu_lsc_ctl.io.lsu_pkt_r + stbuf.io.store_stbuf_reqvld_r := store_stbuf_reqvld_r + stbuf.io.lsu_commit_r := lsu_lsc_ctl.io.lsu_commit_r + stbuf.io.dec_lsu_valid_raw_d := io.dec_lsu_valid_raw_d stbuf.io.store_data_hi_r := dccm_ctl.io.store_data_hi_r stbuf.io.store_data_lo_r := dccm_ctl.io.store_data_lo_r - stbuf.io.store_datafn_hi_r := dccm_ctl.io.store_datafn_hi_r + stbuf.io.store_datafn_hi_r := dccm_ctl.io.store_datafn_hi_r stbuf.io.store_datafn_lo_r := dccm_ctl.io.store_datafn_lo_r - stbuf.io.lsu_stbuf_commit_any := dccm_ctl.io.lsu_stbuf_commit_any - stbuf.io.lsu_addr_d := lsu_lsc_ctl.io.lsu_addr_d - stbuf.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m - stbuf.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r - stbuf.io.end_addr_d := lsu_lsc_ctl.io.end_addr_d - stbuf.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m - stbuf.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r - stbuf.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m + stbuf.io.lsu_stbuf_commit_any := dccm_ctl.io.lsu_stbuf_commit_any + stbuf.io.lsu_addr_d := lsu_lsc_ctl.io.lsu_addr_d + stbuf.io.lsu_addr_m := lsu_lsc_ctl.io.lsu_addr_m + stbuf.io.lsu_addr_r := lsu_lsc_ctl.io.lsu_addr_r + stbuf.io.end_addr_d := lsu_lsc_ctl.io.end_addr_d + stbuf.io.end_addr_m := lsu_lsc_ctl.io.end_addr_m + stbuf.io.end_addr_r := lsu_lsc_ctl.io.end_addr_r + stbuf.io.addr_in_dccm_m := lsu_lsc_ctl.io.addr_in_dccm_m stbuf.io.addr_in_dccm_r := lsu_lsc_ctl.io.addr_in_dccm_r - stbuf.io.lsu_cmpen_m := lsu_cmpen_m - stbuf.io.scan_mode := io.scan_mode + stbuf.io.lsu_cmpen_m := lsu_cmpen_m + stbuf.io.scan_mode := io.scan_mode // ECC //Inputs @@ -313,7 +313,7 @@ class lsu extends Module with RequireAsyncReset with param with lib { //Bus Interface //Inputs bus_intf.io.scan_mode := io.scan_mode - io.lsu_dec.tlu_busbuff <> bus_intf.io.tlu_busbuff + io.lsu_dec.tlu_busbuff <> bus_intf.io.tlu_busbuff bus_intf.io.clk_override := io.clk_override bus_intf.io.lsu_c1_r_clk := clkdomain.io.lsu_c1_r_clk bus_intf.io.lsu_c2_r_clk := clkdomain.io.lsu_c2_r_clk @@ -343,11 +343,11 @@ class lsu extends Module with RequireAsyncReset with param with lib { bus_intf.io.flush_m_up := flush_m_up bus_intf.io.flush_r := flush_r //Outputs - io.lsu_dec.dctl_busbuff <> bus_intf.io.dctl_busbuff - io.lsu_nonblock_load_data := bus_intf.io.lsu_nonblock_load_data - lsu_busreq_r := bus_intf.io.lsu_busreq_r - io.axi <> bus_intf.io.axi - bus_intf.io.lsu_bus_clk_en := io.lsu_bus_clk_en + io.lsu_dec.dctl_busbuff <> bus_intf.io.dctl_busbuff + io.lsu_nonblock_load_data := bus_intf.io.lsu_nonblock_load_data + lsu_busreq_r := bus_intf.io.lsu_busreq_r + io.axi <> bus_intf.io.axi + bus_intf.io.lsu_bus_clk_en := io.lsu_bus_clk_en withClock(clkdomain.io.lsu_c1_m_clk){dma_mem_tag_m := RegNext(dma_mem_tag_d,0.U)} withClock(clkdomain.io.lsu_c2_r_clk){lsu_raw_fwd_hi_r := RegNext(lsu_raw_fwd_hi_m,0.U)} diff --git a/src/main/scala/lsu/lsu_bus_buffer.scala b/src/main/scala/lsu/lsu_bus_buffer.scala index 6ce06e2f..062d5eee 100644 --- a/src/main/scala/lsu/lsu_bus_buffer.scala +++ b/src/main/scala/lsu/lsu_bus_buffer.scala @@ -362,7 +362,7 @@ class lsu_bus_buffer extends Module with RequireAsyncReset with lib { val obuf_byteen = rvdffs_fpga (obuf_byteen_in,obuf_wr_en,io.lsu_bus_obuf_c1_clk,io.lsu_bus_obuf_c1_clken,clock) obuf_addr := rvdffe(obuf_addr_in, obuf_wr_en, clock, io.scan_mode) val obuf_data = rvdffe(obuf_data_in, obuf_wr_en, clock, io.scan_mode) - obuf_wr_timer := rvdff_fpga (obuf_data_done_in,io.lsu_busm_clk,obuf_wr_en,clock) + obuf_wr_timer := rvdff_fpga (obuf_wr_timer_in,io.lsu_busm_clk,obuf_wr_en,clock) val WrPtr0_m = WireInit(UInt(DEPTH_LOG2.W), 0.U) diff --git a/src/main/scala/lsu/lsu_bus_intf.scala b/src/main/scala/lsu/lsu_bus_intf.scala index e800d75d..227f23a6 100644 --- a/src/main/scala/lsu/lsu_bus_intf.scala +++ b/src/main/scala/lsu/lsu_bus_intf.scala @@ -118,19 +118,19 @@ class lsu_bus_intf extends Module with RequireAsyncReset with lib { bus_buffer.io.lsu_pkt_r <> io.lsu_pkt_r // - bus_buffer.io.lsu_addr_m := io.lsu_addr_m - bus_buffer.io.end_addr_m := io.end_addr_m - bus_buffer.io.lsu_addr_r := io.lsu_addr_r - bus_buffer.io.end_addr_r := io.end_addr_r - bus_buffer.io.store_data_r := io.store_data_r + bus_buffer.io.lsu_addr_m := io.lsu_addr_m + bus_buffer.io.end_addr_m := io.end_addr_m + bus_buffer.io.lsu_addr_r := io.lsu_addr_r + bus_buffer.io.end_addr_r := io.end_addr_r + bus_buffer.io.store_data_r := io.store_data_r - bus_buffer.io.lsu_busreq_m := io.lsu_busreq_m - bus_buffer.io.flush_m_up := io.flush_m_up - bus_buffer.io.flush_r := io.flush_r - bus_buffer.io.lsu_commit_r := io.lsu_commit_r - bus_buffer.io.lsu_axi <> io.axi - bus_buffer.io.lsu_bus_clk_en := io.lsu_bus_clk_en - io.lsu_nonblock_load_data := bus_buffer.io.lsu_nonblock_load_data + bus_buffer.io.lsu_busreq_m := io.lsu_busreq_m + bus_buffer.io.flush_m_up := io.flush_m_up + bus_buffer.io.flush_r := io.flush_r + bus_buffer.io.lsu_commit_r := io.lsu_commit_r + bus_buffer.io.lsu_axi <> io.axi + bus_buffer.io.lsu_bus_clk_en := io.lsu_bus_clk_en + io.lsu_nonblock_load_data := bus_buffer.io.lsu_nonblock_load_data io.lsu_busreq_r := bus_buffer.io.lsu_busreq_r io.lsu_bus_buffer_pend_any := bus_buffer.io.lsu_bus_buffer_pend_any io.lsu_bus_buffer_full_any := bus_buffer.io.lsu_bus_buffer_full_any diff --git a/target/scala-2.12/classes/lsu/lsu.class b/target/scala-2.12/classes/lsu/lsu.class index c8461bf9..a714dd44 100644 Binary files a/target/scala-2.12/classes/lsu/lsu.class and b/target/scala-2.12/classes/lsu/lsu.class differ diff --git a/target/scala-2.12/classes/lsu/lsu_bus_buffer.class b/target/scala-2.12/classes/lsu/lsu_bus_buffer.class index 89ef4072..cb72b27d 100644 Binary files a/target/scala-2.12/classes/lsu/lsu_bus_buffer.class and b/target/scala-2.12/classes/lsu/lsu_bus_buffer.class differ diff --git a/target/scala-2.12/classes/lsu/lsu_bus_intf.class b/target/scala-2.12/classes/lsu/lsu_bus_intf.class index c414e25b..30093461 100644 Binary files a/target/scala-2.12/classes/lsu/lsu_bus_intf.class and b/target/scala-2.12/classes/lsu/lsu_bus_intf.class differ