diff --git a/EL2_IC_DATA.anno.json b/EL2_IC_DATA.anno.json
new file mode 100644
index 00000000..16430c21
--- /dev/null
+++ b/EL2_IC_DATA.anno.json
@@ -0,0 +1,18 @@
+[
+ {
+ "class":"firrtl.EmitCircuitAnnotation",
+ "emitter":"firrtl.VerilogEmitter"
+ },
+ {
+ "class":"firrtl.options.TargetDirAnnotation",
+ "directory":"."
+ },
+ {
+ "class":"firrtl.options.OutputAnnotationFileAnnotation",
+ "file":"EL2_IC_DATA"
+ },
+ {
+ "class":"firrtl.transforms.BlackBoxTargetDirAnno",
+ "targetDir":"."
+ }
+]
\ No newline at end of file
diff --git a/EL2_IC_DATA.fir b/EL2_IC_DATA.fir
new file mode 100644
index 00000000..8d944f25
--- /dev/null
+++ b/EL2_IC_DATA.fir
@@ -0,0 +1,26 @@
+;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
+circuit EL2_IC_DATA :
+ module EL2_IC_DATA :
+ input clock : Clock
+ input reset : UInt<1>
+ output io : {flip rst_l : UInt<1>, flip clk_override : UInt<1>, flip ic_rw_addr : UInt<12>, flip ic_wr_en : UInt<2>, flip ic_rd_en : UInt<1>, flip ic_wr_data : UInt<71>[2], ic_rd_data : UInt<64>, flip ic_debug_wr_data : UInt<71>, ic_debug_rd_data : UInt<71>, ic_parerr : UInt<2>, ic_eccerr : UInt<2>, flip ic_debug_addr : UInt<15>, flip ic_debug_rd_en : UInt<1>, flip ic_debug_wr_en : UInt<1>, flip ic_debug_tag_array : UInt<1>, flip ic_debug_way : UInt<2>, flip ic_premux_data : UInt<64>, flip ic_sel_premux_data : UInt<1>, flip ic_rd_hit : UInt<2>, flip scan_mode : UInt<1>, flip mask : UInt<1>[2][2]}
+
+ smem ic_memory : UInt<26>[2][2][512], undefined @[el2_ifu_ic_mem.scala 209:30]
+ wire data : UInt<71>[2][2] @[el2_ifu_ic_mem.scala 210:48]
+ data[0][0] <= io.ic_wr_data[0] @[el2_ifu_ic_mem.scala 210:48]
+ data[0][1] <= io.ic_wr_data[1] @[el2_ifu_ic_mem.scala 210:48]
+ data[1][0] <= io.ic_wr_data[0] @[el2_ifu_ic_mem.scala 210:48]
+ data[1][1] <= io.ic_wr_data[1] @[el2_ifu_ic_mem.scala 210:48]
+ wire mem_mask : UInt<1>[2] @[el2_ifu_ic_mem.scala 211:51]
+ mem_mask[0] <= UInt<1>("h01") @[el2_ifu_ic_mem.scala 211:51]
+ mem_mask[1] <= UInt<1>("h01") @[el2_ifu_ic_mem.scala 211:51]
+ wire mem_mask2 : UInt<1>[2][2] @[el2_ifu_ic_mem.scala 212:52]
+ mem_mask2[0][0] <= mem_mask[0] @[el2_ifu_ic_mem.scala 212:52]
+ mem_mask2[0][1] <= mem_mask[1] @[el2_ifu_ic_mem.scala 212:52]
+ mem_mask2[1][0] <= mem_mask[0] @[el2_ifu_ic_mem.scala 212:52]
+ mem_mask2[1][1] <= mem_mask[1] @[el2_ifu_ic_mem.scala 212:52]
+ io.ic_debug_rd_data <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 214:23]
+ io.ic_rd_data <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 215:17]
+ io.ic_eccerr <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 216:16]
+ io.ic_parerr <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 217:16]
+
diff --git a/EL2_IC_DATA.v b/EL2_IC_DATA.v
new file mode 100644
index 00000000..0bde4d62
--- /dev/null
+++ b/EL2_IC_DATA.v
@@ -0,0 +1,34 @@
+module EL2_IC_DATA(
+ input clock,
+ input reset,
+ input io_rst_l,
+ input io_clk_override,
+ input [11:0] io_ic_rw_addr,
+ input [1:0] io_ic_wr_en,
+ input io_ic_rd_en,
+ input [70:0] io_ic_wr_data_0,
+ input [70:0] io_ic_wr_data_1,
+ output [63:0] io_ic_rd_data,
+ input [70:0] io_ic_debug_wr_data,
+ output [70:0] io_ic_debug_rd_data,
+ output [1:0] io_ic_parerr,
+ output [1:0] io_ic_eccerr,
+ input [14:0] io_ic_debug_addr,
+ input io_ic_debug_rd_en,
+ input io_ic_debug_wr_en,
+ input io_ic_debug_tag_array,
+ input [1:0] io_ic_debug_way,
+ input [63:0] io_ic_premux_data,
+ input io_ic_sel_premux_data,
+ input [1:0] io_ic_rd_hit,
+ input io_scan_mode,
+ input io_mask_0_0,
+ input io_mask_0_1,
+ input io_mask_1_0,
+ input io_mask_1_1
+);
+ assign io_ic_rd_data = 64'h0; // @[el2_ifu_ic_mem.scala 215:17]
+ assign io_ic_debug_rd_data = 71'h0; // @[el2_ifu_ic_mem.scala 214:23]
+ assign io_ic_parerr = 2'h0; // @[el2_ifu_ic_mem.scala 217:16]
+ assign io_ic_eccerr = 2'h0; // @[el2_ifu_ic_mem.scala 216:16]
+endmodule
diff --git a/EL2_IC_TAG.anno.json b/EL2_IC_TAG.anno.json
new file mode 100644
index 00000000..da12c6d2
--- /dev/null
+++ b/EL2_IC_TAG.anno.json
@@ -0,0 +1,93 @@
+[
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_out_1",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
+ ]
+ },
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_db_out_0",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
+ ]
+ },
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_sb_out_1",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
+ ]
+ },
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_ic_rd_hit",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_ic_tag_valid"
+ ]
+ },
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_out_0",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
+ ]
+ },
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_ic_tag_perr",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_ic_tag_valid",
+ "~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_sb_out_0",
+ "~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_db_out_0",
+ "~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_sb_out_1",
+ "~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_db_out_1",
+ "~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
+ ]
+ },
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_data_out_1",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
+ ]
+ },
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_sb_out_0",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
+ ]
+ },
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_data_out_0",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
+ ]
+ },
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_db_out_1",
+ "sources":[
+ "~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
+ ]
+ },
+ {
+ "class":"firrtl.EmitCircuitAnnotation",
+ "emitter":"firrtl.VerilogEmitter"
+ },
+ {
+ "class":"firrtl.options.TargetDirAnnotation",
+ "directory":"."
+ },
+ {
+ "class":"firrtl.options.OutputAnnotationFileAnnotation",
+ "file":"EL2_IC_TAG"
+ },
+ {
+ "class":"firrtl.transforms.BlackBoxTargetDirAnno",
+ "targetDir":"."
+ }
+]
\ No newline at end of file
diff --git a/EL2_IC_TAG.fir b/EL2_IC_TAG.fir
new file mode 100644
index 00000000..36d3a97b
--- /dev/null
+++ b/EL2_IC_TAG.fir
@@ -0,0 +1,2156 @@
+;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
+circuit EL2_IC_TAG :
+ module rvecc_decode :
+ input clock : Clock
+ input reset : Reset
+ output io : {flip en : UInt<1>, flip din : UInt<32>, flip ecc_in : UInt<7>, flip sed_ded : UInt<1>, ecc_out : UInt<7>, dout : UInt<32>, single_ecc_error : UInt<1>, double_ecc_error : UInt<1>}
+
+ wire w0 : UInt<1>[18] @[beh_lib.scala 227:16]
+ wire w1 : UInt<1>[18] @[beh_lib.scala 228:16]
+ wire w2 : UInt<1>[18] @[beh_lib.scala 229:16]
+ wire w3 : UInt<1>[15] @[beh_lib.scala 230:16]
+ wire w4 : UInt<1>[15] @[beh_lib.scala 231:16]
+ wire w5 : UInt<1>[6] @[beh_lib.scala 232:16]
+ node _T = bits(io.din, 0, 0) @[beh_lib.scala 239:37]
+ w0[0] <= _T @[beh_lib.scala 239:28]
+ node _T_1 = bits(io.din, 0, 0) @[beh_lib.scala 240:37]
+ w1[0] <= _T_1 @[beh_lib.scala 240:28]
+ node _T_2 = bits(io.din, 1, 1) @[beh_lib.scala 239:37]
+ w0[1] <= _T_2 @[beh_lib.scala 239:28]
+ node _T_3 = bits(io.din, 1, 1) @[beh_lib.scala 241:37]
+ w2[0] <= _T_3 @[beh_lib.scala 241:28]
+ node _T_4 = bits(io.din, 2, 2) @[beh_lib.scala 240:37]
+ w1[1] <= _T_4 @[beh_lib.scala 240:28]
+ node _T_5 = bits(io.din, 2, 2) @[beh_lib.scala 241:37]
+ w2[1] <= _T_5 @[beh_lib.scala 241:28]
+ node _T_6 = bits(io.din, 3, 3) @[beh_lib.scala 239:37]
+ w0[2] <= _T_6 @[beh_lib.scala 239:28]
+ node _T_7 = bits(io.din, 3, 3) @[beh_lib.scala 240:37]
+ w1[2] <= _T_7 @[beh_lib.scala 240:28]
+ node _T_8 = bits(io.din, 3, 3) @[beh_lib.scala 241:37]
+ w2[2] <= _T_8 @[beh_lib.scala 241:28]
+ node _T_9 = bits(io.din, 4, 4) @[beh_lib.scala 239:37]
+ w0[3] <= _T_9 @[beh_lib.scala 239:28]
+ node _T_10 = bits(io.din, 4, 4) @[beh_lib.scala 242:37]
+ w3[0] <= _T_10 @[beh_lib.scala 242:28]
+ node _T_11 = bits(io.din, 5, 5) @[beh_lib.scala 240:37]
+ w1[3] <= _T_11 @[beh_lib.scala 240:28]
+ node _T_12 = bits(io.din, 5, 5) @[beh_lib.scala 242:37]
+ w3[1] <= _T_12 @[beh_lib.scala 242:28]
+ node _T_13 = bits(io.din, 6, 6) @[beh_lib.scala 239:37]
+ w0[4] <= _T_13 @[beh_lib.scala 239:28]
+ node _T_14 = bits(io.din, 6, 6) @[beh_lib.scala 240:37]
+ w1[4] <= _T_14 @[beh_lib.scala 240:28]
+ node _T_15 = bits(io.din, 6, 6) @[beh_lib.scala 242:37]
+ w3[2] <= _T_15 @[beh_lib.scala 242:28]
+ node _T_16 = bits(io.din, 7, 7) @[beh_lib.scala 241:37]
+ w2[3] <= _T_16 @[beh_lib.scala 241:28]
+ node _T_17 = bits(io.din, 7, 7) @[beh_lib.scala 242:37]
+ w3[3] <= _T_17 @[beh_lib.scala 242:28]
+ node _T_18 = bits(io.din, 8, 8) @[beh_lib.scala 239:37]
+ w0[5] <= _T_18 @[beh_lib.scala 239:28]
+ node _T_19 = bits(io.din, 8, 8) @[beh_lib.scala 241:37]
+ w2[4] <= _T_19 @[beh_lib.scala 241:28]
+ node _T_20 = bits(io.din, 8, 8) @[beh_lib.scala 242:37]
+ w3[4] <= _T_20 @[beh_lib.scala 242:28]
+ node _T_21 = bits(io.din, 9, 9) @[beh_lib.scala 240:37]
+ w1[5] <= _T_21 @[beh_lib.scala 240:28]
+ node _T_22 = bits(io.din, 9, 9) @[beh_lib.scala 241:37]
+ w2[5] <= _T_22 @[beh_lib.scala 241:28]
+ node _T_23 = bits(io.din, 9, 9) @[beh_lib.scala 242:37]
+ w3[5] <= _T_23 @[beh_lib.scala 242:28]
+ node _T_24 = bits(io.din, 10, 10) @[beh_lib.scala 239:37]
+ w0[6] <= _T_24 @[beh_lib.scala 239:28]
+ node _T_25 = bits(io.din, 10, 10) @[beh_lib.scala 240:37]
+ w1[6] <= _T_25 @[beh_lib.scala 240:28]
+ node _T_26 = bits(io.din, 10, 10) @[beh_lib.scala 241:37]
+ w2[6] <= _T_26 @[beh_lib.scala 241:28]
+ node _T_27 = bits(io.din, 10, 10) @[beh_lib.scala 242:37]
+ w3[6] <= _T_27 @[beh_lib.scala 242:28]
+ node _T_28 = bits(io.din, 11, 11) @[beh_lib.scala 239:37]
+ w0[7] <= _T_28 @[beh_lib.scala 239:28]
+ node _T_29 = bits(io.din, 11, 11) @[beh_lib.scala 243:37]
+ w4[0] <= _T_29 @[beh_lib.scala 243:28]
+ node _T_30 = bits(io.din, 12, 12) @[beh_lib.scala 240:37]
+ w1[7] <= _T_30 @[beh_lib.scala 240:28]
+ node _T_31 = bits(io.din, 12, 12) @[beh_lib.scala 243:37]
+ w4[1] <= _T_31 @[beh_lib.scala 243:28]
+ node _T_32 = bits(io.din, 13, 13) @[beh_lib.scala 239:37]
+ w0[8] <= _T_32 @[beh_lib.scala 239:28]
+ node _T_33 = bits(io.din, 13, 13) @[beh_lib.scala 240:37]
+ w1[8] <= _T_33 @[beh_lib.scala 240:28]
+ node _T_34 = bits(io.din, 13, 13) @[beh_lib.scala 243:37]
+ w4[2] <= _T_34 @[beh_lib.scala 243:28]
+ node _T_35 = bits(io.din, 14, 14) @[beh_lib.scala 241:37]
+ w2[7] <= _T_35 @[beh_lib.scala 241:28]
+ node _T_36 = bits(io.din, 14, 14) @[beh_lib.scala 243:37]
+ w4[3] <= _T_36 @[beh_lib.scala 243:28]
+ node _T_37 = bits(io.din, 15, 15) @[beh_lib.scala 239:37]
+ w0[9] <= _T_37 @[beh_lib.scala 239:28]
+ node _T_38 = bits(io.din, 15, 15) @[beh_lib.scala 241:37]
+ w2[8] <= _T_38 @[beh_lib.scala 241:28]
+ node _T_39 = bits(io.din, 15, 15) @[beh_lib.scala 243:37]
+ w4[4] <= _T_39 @[beh_lib.scala 243:28]
+ node _T_40 = bits(io.din, 16, 16) @[beh_lib.scala 240:37]
+ w1[9] <= _T_40 @[beh_lib.scala 240:28]
+ node _T_41 = bits(io.din, 16, 16) @[beh_lib.scala 241:37]
+ w2[9] <= _T_41 @[beh_lib.scala 241:28]
+ node _T_42 = bits(io.din, 16, 16) @[beh_lib.scala 243:37]
+ w4[5] <= _T_42 @[beh_lib.scala 243:28]
+ node _T_43 = bits(io.din, 17, 17) @[beh_lib.scala 239:37]
+ w0[10] <= _T_43 @[beh_lib.scala 239:28]
+ node _T_44 = bits(io.din, 17, 17) @[beh_lib.scala 240:37]
+ w1[10] <= _T_44 @[beh_lib.scala 240:28]
+ node _T_45 = bits(io.din, 17, 17) @[beh_lib.scala 241:37]
+ w2[10] <= _T_45 @[beh_lib.scala 241:28]
+ node _T_46 = bits(io.din, 17, 17) @[beh_lib.scala 243:37]
+ w4[6] <= _T_46 @[beh_lib.scala 243:28]
+ node _T_47 = bits(io.din, 18, 18) @[beh_lib.scala 242:37]
+ w3[7] <= _T_47 @[beh_lib.scala 242:28]
+ node _T_48 = bits(io.din, 18, 18) @[beh_lib.scala 243:37]
+ w4[7] <= _T_48 @[beh_lib.scala 243:28]
+ node _T_49 = bits(io.din, 19, 19) @[beh_lib.scala 239:37]
+ w0[11] <= _T_49 @[beh_lib.scala 239:28]
+ node _T_50 = bits(io.din, 19, 19) @[beh_lib.scala 242:37]
+ w3[8] <= _T_50 @[beh_lib.scala 242:28]
+ node _T_51 = bits(io.din, 19, 19) @[beh_lib.scala 243:37]
+ w4[8] <= _T_51 @[beh_lib.scala 243:28]
+ node _T_52 = bits(io.din, 20, 20) @[beh_lib.scala 240:37]
+ w1[11] <= _T_52 @[beh_lib.scala 240:28]
+ node _T_53 = bits(io.din, 20, 20) @[beh_lib.scala 242:37]
+ w3[9] <= _T_53 @[beh_lib.scala 242:28]
+ node _T_54 = bits(io.din, 20, 20) @[beh_lib.scala 243:37]
+ w4[9] <= _T_54 @[beh_lib.scala 243:28]
+ node _T_55 = bits(io.din, 21, 21) @[beh_lib.scala 239:37]
+ w0[12] <= _T_55 @[beh_lib.scala 239:28]
+ node _T_56 = bits(io.din, 21, 21) @[beh_lib.scala 240:37]
+ w1[12] <= _T_56 @[beh_lib.scala 240:28]
+ node _T_57 = bits(io.din, 21, 21) @[beh_lib.scala 242:37]
+ w3[10] <= _T_57 @[beh_lib.scala 242:28]
+ node _T_58 = bits(io.din, 21, 21) @[beh_lib.scala 243:37]
+ w4[10] <= _T_58 @[beh_lib.scala 243:28]
+ node _T_59 = bits(io.din, 22, 22) @[beh_lib.scala 241:37]
+ w2[11] <= _T_59 @[beh_lib.scala 241:28]
+ node _T_60 = bits(io.din, 22, 22) @[beh_lib.scala 242:37]
+ w3[11] <= _T_60 @[beh_lib.scala 242:28]
+ node _T_61 = bits(io.din, 22, 22) @[beh_lib.scala 243:37]
+ w4[11] <= _T_61 @[beh_lib.scala 243:28]
+ node _T_62 = bits(io.din, 23, 23) @[beh_lib.scala 239:37]
+ w0[13] <= _T_62 @[beh_lib.scala 239:28]
+ node _T_63 = bits(io.din, 23, 23) @[beh_lib.scala 241:37]
+ w2[12] <= _T_63 @[beh_lib.scala 241:28]
+ node _T_64 = bits(io.din, 23, 23) @[beh_lib.scala 242:37]
+ w3[12] <= _T_64 @[beh_lib.scala 242:28]
+ node _T_65 = bits(io.din, 23, 23) @[beh_lib.scala 243:37]
+ w4[12] <= _T_65 @[beh_lib.scala 243:28]
+ node _T_66 = bits(io.din, 24, 24) @[beh_lib.scala 240:37]
+ w1[13] <= _T_66 @[beh_lib.scala 240:28]
+ node _T_67 = bits(io.din, 24, 24) @[beh_lib.scala 241:37]
+ w2[13] <= _T_67 @[beh_lib.scala 241:28]
+ node _T_68 = bits(io.din, 24, 24) @[beh_lib.scala 242:37]
+ w3[13] <= _T_68 @[beh_lib.scala 242:28]
+ node _T_69 = bits(io.din, 24, 24) @[beh_lib.scala 243:37]
+ w4[13] <= _T_69 @[beh_lib.scala 243:28]
+ node _T_70 = bits(io.din, 25, 25) @[beh_lib.scala 239:37]
+ w0[14] <= _T_70 @[beh_lib.scala 239:28]
+ node _T_71 = bits(io.din, 25, 25) @[beh_lib.scala 240:37]
+ w1[14] <= _T_71 @[beh_lib.scala 240:28]
+ node _T_72 = bits(io.din, 25, 25) @[beh_lib.scala 241:37]
+ w2[14] <= _T_72 @[beh_lib.scala 241:28]
+ node _T_73 = bits(io.din, 25, 25) @[beh_lib.scala 242:37]
+ w3[14] <= _T_73 @[beh_lib.scala 242:28]
+ node _T_74 = bits(io.din, 25, 25) @[beh_lib.scala 243:37]
+ w4[14] <= _T_74 @[beh_lib.scala 243:28]
+ node _T_75 = bits(io.din, 26, 26) @[beh_lib.scala 239:37]
+ w0[15] <= _T_75 @[beh_lib.scala 239:28]
+ node _T_76 = bits(io.din, 26, 26) @[beh_lib.scala 244:37]
+ w5[0] <= _T_76 @[beh_lib.scala 244:28]
+ node _T_77 = bits(io.din, 27, 27) @[beh_lib.scala 240:37]
+ w1[15] <= _T_77 @[beh_lib.scala 240:28]
+ node _T_78 = bits(io.din, 27, 27) @[beh_lib.scala 244:37]
+ w5[1] <= _T_78 @[beh_lib.scala 244:28]
+ node _T_79 = bits(io.din, 28, 28) @[beh_lib.scala 239:37]
+ w0[16] <= _T_79 @[beh_lib.scala 239:28]
+ node _T_80 = bits(io.din, 28, 28) @[beh_lib.scala 240:37]
+ w1[16] <= _T_80 @[beh_lib.scala 240:28]
+ node _T_81 = bits(io.din, 28, 28) @[beh_lib.scala 244:37]
+ w5[2] <= _T_81 @[beh_lib.scala 244:28]
+ node _T_82 = bits(io.din, 29, 29) @[beh_lib.scala 241:37]
+ w2[15] <= _T_82 @[beh_lib.scala 241:28]
+ node _T_83 = bits(io.din, 29, 29) @[beh_lib.scala 244:37]
+ w5[3] <= _T_83 @[beh_lib.scala 244:28]
+ node _T_84 = bits(io.din, 30, 30) @[beh_lib.scala 239:37]
+ w0[17] <= _T_84 @[beh_lib.scala 239:28]
+ node _T_85 = bits(io.din, 30, 30) @[beh_lib.scala 241:37]
+ w2[16] <= _T_85 @[beh_lib.scala 241:28]
+ node _T_86 = bits(io.din, 30, 30) @[beh_lib.scala 244:37]
+ w5[4] <= _T_86 @[beh_lib.scala 244:28]
+ node _T_87 = bits(io.din, 31, 31) @[beh_lib.scala 240:37]
+ w1[17] <= _T_87 @[beh_lib.scala 240:28]
+ node _T_88 = bits(io.din, 31, 31) @[beh_lib.scala 241:37]
+ w2[17] <= _T_88 @[beh_lib.scala 241:28]
+ node _T_89 = bits(io.din, 31, 31) @[beh_lib.scala 244:37]
+ w5[5] <= _T_89 @[beh_lib.scala 244:28]
+ node _T_90 = xorr(io.din) @[beh_lib.scala 247:31]
+ node _T_91 = xorr(io.ecc_in) @[beh_lib.scala 247:48]
+ node _T_92 = xor(_T_90, _T_91) @[beh_lib.scala 247:36]
+ node _T_93 = not(io.sed_ded) @[beh_lib.scala 247:56]
+ node _T_94 = and(_T_92, _T_93) @[beh_lib.scala 247:54]
+ node _T_95 = bits(io.ecc_in, 5, 5) @[beh_lib.scala 247:78]
+ node _T_96 = cat(w5[2], w5[1]) @[beh_lib.scala 247:86]
+ node _T_97 = cat(_T_96, w5[0]) @[beh_lib.scala 247:86]
+ node _T_98 = cat(w5[5], w5[4]) @[beh_lib.scala 247:86]
+ node _T_99 = cat(_T_98, w5[3]) @[beh_lib.scala 247:86]
+ node _T_100 = cat(_T_99, _T_97) @[beh_lib.scala 247:86]
+ node _T_101 = xorr(_T_100) @[beh_lib.scala 247:93]
+ node _T_102 = xor(_T_95, _T_101) @[beh_lib.scala 247:81]
+ node _T_103 = bits(io.ecc_in, 4, 4) @[beh_lib.scala 247:108]
+ node _T_104 = cat(w4[2], w4[1]) @[beh_lib.scala 247:116]
+ node _T_105 = cat(_T_104, w4[0]) @[beh_lib.scala 247:116]
+ node _T_106 = cat(w4[4], w4[3]) @[beh_lib.scala 247:116]
+ node _T_107 = cat(w4[6], w4[5]) @[beh_lib.scala 247:116]
+ node _T_108 = cat(_T_107, _T_106) @[beh_lib.scala 247:116]
+ node _T_109 = cat(_T_108, _T_105) @[beh_lib.scala 247:116]
+ node _T_110 = cat(w4[8], w4[7]) @[beh_lib.scala 247:116]
+ node _T_111 = cat(w4[10], w4[9]) @[beh_lib.scala 247:116]
+ node _T_112 = cat(_T_111, _T_110) @[beh_lib.scala 247:116]
+ node _T_113 = cat(w4[12], w4[11]) @[beh_lib.scala 247:116]
+ node _T_114 = cat(w4[14], w4[13]) @[beh_lib.scala 247:116]
+ node _T_115 = cat(_T_114, _T_113) @[beh_lib.scala 247:116]
+ node _T_116 = cat(_T_115, _T_112) @[beh_lib.scala 247:116]
+ node _T_117 = cat(_T_116, _T_109) @[beh_lib.scala 247:116]
+ node _T_118 = xorr(_T_117) @[beh_lib.scala 247:123]
+ node _T_119 = xor(_T_103, _T_118) @[beh_lib.scala 247:111]
+ node _T_120 = bits(io.ecc_in, 3, 3) @[beh_lib.scala 247:138]
+ node _T_121 = cat(w3[2], w3[1]) @[beh_lib.scala 247:146]
+ node _T_122 = cat(_T_121, w3[0]) @[beh_lib.scala 247:146]
+ node _T_123 = cat(w3[4], w3[3]) @[beh_lib.scala 247:146]
+ node _T_124 = cat(w3[6], w3[5]) @[beh_lib.scala 247:146]
+ node _T_125 = cat(_T_124, _T_123) @[beh_lib.scala 247:146]
+ node _T_126 = cat(_T_125, _T_122) @[beh_lib.scala 247:146]
+ node _T_127 = cat(w3[8], w3[7]) @[beh_lib.scala 247:146]
+ node _T_128 = cat(w3[10], w3[9]) @[beh_lib.scala 247:146]
+ node _T_129 = cat(_T_128, _T_127) @[beh_lib.scala 247:146]
+ node _T_130 = cat(w3[12], w3[11]) @[beh_lib.scala 247:146]
+ node _T_131 = cat(w3[14], w3[13]) @[beh_lib.scala 247:146]
+ node _T_132 = cat(_T_131, _T_130) @[beh_lib.scala 247:146]
+ node _T_133 = cat(_T_132, _T_129) @[beh_lib.scala 247:146]
+ node _T_134 = cat(_T_133, _T_126) @[beh_lib.scala 247:146]
+ node _T_135 = xorr(_T_134) @[beh_lib.scala 247:153]
+ node _T_136 = xor(_T_120, _T_135) @[beh_lib.scala 247:141]
+ node _T_137 = bits(io.ecc_in, 2, 2) @[beh_lib.scala 247:168]
+ node _T_138 = cat(w2[1], w2[0]) @[beh_lib.scala 247:176]
+ node _T_139 = cat(w2[3], w2[2]) @[beh_lib.scala 247:176]
+ node _T_140 = cat(_T_139, _T_138) @[beh_lib.scala 247:176]
+ node _T_141 = cat(w2[5], w2[4]) @[beh_lib.scala 247:176]
+ node _T_142 = cat(w2[8], w2[7]) @[beh_lib.scala 247:176]
+ node _T_143 = cat(_T_142, w2[6]) @[beh_lib.scala 247:176]
+ node _T_144 = cat(_T_143, _T_141) @[beh_lib.scala 247:176]
+ node _T_145 = cat(_T_144, _T_140) @[beh_lib.scala 247:176]
+ node _T_146 = cat(w2[10], w2[9]) @[beh_lib.scala 247:176]
+ node _T_147 = cat(w2[12], w2[11]) @[beh_lib.scala 247:176]
+ node _T_148 = cat(_T_147, _T_146) @[beh_lib.scala 247:176]
+ node _T_149 = cat(w2[14], w2[13]) @[beh_lib.scala 247:176]
+ node _T_150 = cat(w2[17], w2[16]) @[beh_lib.scala 247:176]
+ node _T_151 = cat(_T_150, w2[15]) @[beh_lib.scala 247:176]
+ node _T_152 = cat(_T_151, _T_149) @[beh_lib.scala 247:176]
+ node _T_153 = cat(_T_152, _T_148) @[beh_lib.scala 247:176]
+ node _T_154 = cat(_T_153, _T_145) @[beh_lib.scala 247:176]
+ node _T_155 = xorr(_T_154) @[beh_lib.scala 247:183]
+ node _T_156 = xor(_T_137, _T_155) @[beh_lib.scala 247:171]
+ node _T_157 = bits(io.ecc_in, 1, 1) @[beh_lib.scala 247:198]
+ node _T_158 = cat(w1[1], w1[0]) @[beh_lib.scala 247:206]
+ node _T_159 = cat(w1[3], w1[2]) @[beh_lib.scala 247:206]
+ node _T_160 = cat(_T_159, _T_158) @[beh_lib.scala 247:206]
+ node _T_161 = cat(w1[5], w1[4]) @[beh_lib.scala 247:206]
+ node _T_162 = cat(w1[8], w1[7]) @[beh_lib.scala 247:206]
+ node _T_163 = cat(_T_162, w1[6]) @[beh_lib.scala 247:206]
+ node _T_164 = cat(_T_163, _T_161) @[beh_lib.scala 247:206]
+ node _T_165 = cat(_T_164, _T_160) @[beh_lib.scala 247:206]
+ node _T_166 = cat(w1[10], w1[9]) @[beh_lib.scala 247:206]
+ node _T_167 = cat(w1[12], w1[11]) @[beh_lib.scala 247:206]
+ node _T_168 = cat(_T_167, _T_166) @[beh_lib.scala 247:206]
+ node _T_169 = cat(w1[14], w1[13]) @[beh_lib.scala 247:206]
+ node _T_170 = cat(w1[17], w1[16]) @[beh_lib.scala 247:206]
+ node _T_171 = cat(_T_170, w1[15]) @[beh_lib.scala 247:206]
+ node _T_172 = cat(_T_171, _T_169) @[beh_lib.scala 247:206]
+ node _T_173 = cat(_T_172, _T_168) @[beh_lib.scala 247:206]
+ node _T_174 = cat(_T_173, _T_165) @[beh_lib.scala 247:206]
+ node _T_175 = xorr(_T_174) @[beh_lib.scala 247:213]
+ node _T_176 = xor(_T_157, _T_175) @[beh_lib.scala 247:201]
+ node _T_177 = bits(io.ecc_in, 0, 0) @[beh_lib.scala 247:228]
+ node _T_178 = cat(w0[1], w0[0]) @[beh_lib.scala 247:236]
+ node _T_179 = cat(w0[3], w0[2]) @[beh_lib.scala 247:236]
+ node _T_180 = cat(_T_179, _T_178) @[beh_lib.scala 247:236]
+ node _T_181 = cat(w0[5], w0[4]) @[beh_lib.scala 247:236]
+ node _T_182 = cat(w0[8], w0[7]) @[beh_lib.scala 247:236]
+ node _T_183 = cat(_T_182, w0[6]) @[beh_lib.scala 247:236]
+ node _T_184 = cat(_T_183, _T_181) @[beh_lib.scala 247:236]
+ node _T_185 = cat(_T_184, _T_180) @[beh_lib.scala 247:236]
+ node _T_186 = cat(w0[10], w0[9]) @[beh_lib.scala 247:236]
+ node _T_187 = cat(w0[12], w0[11]) @[beh_lib.scala 247:236]
+ node _T_188 = cat(_T_187, _T_186) @[beh_lib.scala 247:236]
+ node _T_189 = cat(w0[14], w0[13]) @[beh_lib.scala 247:236]
+ node _T_190 = cat(w0[17], w0[16]) @[beh_lib.scala 247:236]
+ node _T_191 = cat(_T_190, w0[15]) @[beh_lib.scala 247:236]
+ node _T_192 = cat(_T_191, _T_189) @[beh_lib.scala 247:236]
+ node _T_193 = cat(_T_192, _T_188) @[beh_lib.scala 247:236]
+ node _T_194 = cat(_T_193, _T_185) @[beh_lib.scala 247:236]
+ node _T_195 = xorr(_T_194) @[beh_lib.scala 247:243]
+ node _T_196 = xor(_T_177, _T_195) @[beh_lib.scala 247:231]
+ node _T_197 = cat(_T_156, _T_176) @[Cat.scala 29:58]
+ node _T_198 = cat(_T_197, _T_196) @[Cat.scala 29:58]
+ node _T_199 = cat(_T_119, _T_136) @[Cat.scala 29:58]
+ node _T_200 = cat(_T_94, _T_102) @[Cat.scala 29:58]
+ node _T_201 = cat(_T_200, _T_199) @[Cat.scala 29:58]
+ node ecc_check = cat(_T_201, _T_198) @[Cat.scala 29:58]
+ io.ecc_out <= ecc_check @[beh_lib.scala 248:14]
+ node _T_202 = neq(ecc_check, UInt<1>("h00")) @[beh_lib.scala 250:45]
+ node _T_203 = and(io.en, _T_202) @[beh_lib.scala 250:33]
+ node _T_204 = xorr(io.din) @[beh_lib.scala 250:64]
+ node _T_205 = xorr(io.ecc_in) @[beh_lib.scala 250:81]
+ node _T_206 = xor(_T_204, _T_205) @[beh_lib.scala 250:69]
+ node _T_207 = not(io.sed_ded) @[beh_lib.scala 250:89]
+ node _T_208 = and(_T_206, _T_207) @[beh_lib.scala 250:87]
+ node _T_209 = and(_T_203, _T_208) @[beh_lib.scala 250:53]
+ io.single_ecc_error <= _T_209 @[beh_lib.scala 250:23]
+ node _T_210 = neq(ecc_check, UInt<1>("h00")) @[beh_lib.scala 251:45]
+ node _T_211 = and(io.en, _T_210) @[beh_lib.scala 251:33]
+ node _T_212 = xorr(io.din) @[beh_lib.scala 251:64]
+ node _T_213 = xorr(io.ecc_in) @[beh_lib.scala 251:81]
+ node _T_214 = xor(_T_212, _T_213) @[beh_lib.scala 251:69]
+ node _T_215 = not(io.sed_ded) @[beh_lib.scala 251:89]
+ node _T_216 = and(_T_214, _T_215) @[beh_lib.scala 251:87]
+ node _T_217 = and(_T_211, _T_216) @[beh_lib.scala 251:53]
+ io.double_ecc_error <= _T_217 @[beh_lib.scala 251:23]
+ wire error_mask : UInt<1>[39] @[beh_lib.scala 252:24]
+ node _T_218 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_219 = eq(_T_218, UInt<1>("h01")) @[beh_lib.scala 255:39]
+ error_mask[0] <= _T_219 @[beh_lib.scala 255:21]
+ node _T_220 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_221 = eq(_T_220, UInt<2>("h02")) @[beh_lib.scala 255:39]
+ error_mask[1] <= _T_221 @[beh_lib.scala 255:21]
+ node _T_222 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_223 = eq(_T_222, UInt<2>("h03")) @[beh_lib.scala 255:39]
+ error_mask[2] <= _T_223 @[beh_lib.scala 255:21]
+ node _T_224 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_225 = eq(_T_224, UInt<3>("h04")) @[beh_lib.scala 255:39]
+ error_mask[3] <= _T_225 @[beh_lib.scala 255:21]
+ node _T_226 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_227 = eq(_T_226, UInt<3>("h05")) @[beh_lib.scala 255:39]
+ error_mask[4] <= _T_227 @[beh_lib.scala 255:21]
+ node _T_228 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_229 = eq(_T_228, UInt<3>("h06")) @[beh_lib.scala 255:39]
+ error_mask[5] <= _T_229 @[beh_lib.scala 255:21]
+ node _T_230 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_231 = eq(_T_230, UInt<3>("h07")) @[beh_lib.scala 255:39]
+ error_mask[6] <= _T_231 @[beh_lib.scala 255:21]
+ node _T_232 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_233 = eq(_T_232, UInt<4>("h08")) @[beh_lib.scala 255:39]
+ error_mask[7] <= _T_233 @[beh_lib.scala 255:21]
+ node _T_234 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_235 = eq(_T_234, UInt<4>("h09")) @[beh_lib.scala 255:39]
+ error_mask[8] <= _T_235 @[beh_lib.scala 255:21]
+ node _T_236 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_237 = eq(_T_236, UInt<4>("h0a")) @[beh_lib.scala 255:39]
+ error_mask[9] <= _T_237 @[beh_lib.scala 255:21]
+ node _T_238 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_239 = eq(_T_238, UInt<4>("h0b")) @[beh_lib.scala 255:39]
+ error_mask[10] <= _T_239 @[beh_lib.scala 255:21]
+ node _T_240 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_241 = eq(_T_240, UInt<4>("h0c")) @[beh_lib.scala 255:39]
+ error_mask[11] <= _T_241 @[beh_lib.scala 255:21]
+ node _T_242 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_243 = eq(_T_242, UInt<4>("h0d")) @[beh_lib.scala 255:39]
+ error_mask[12] <= _T_243 @[beh_lib.scala 255:21]
+ node _T_244 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_245 = eq(_T_244, UInt<4>("h0e")) @[beh_lib.scala 255:39]
+ error_mask[13] <= _T_245 @[beh_lib.scala 255:21]
+ node _T_246 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_247 = eq(_T_246, UInt<4>("h0f")) @[beh_lib.scala 255:39]
+ error_mask[14] <= _T_247 @[beh_lib.scala 255:21]
+ node _T_248 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_249 = eq(_T_248, UInt<5>("h010")) @[beh_lib.scala 255:39]
+ error_mask[15] <= _T_249 @[beh_lib.scala 255:21]
+ node _T_250 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_251 = eq(_T_250, UInt<5>("h011")) @[beh_lib.scala 255:39]
+ error_mask[16] <= _T_251 @[beh_lib.scala 255:21]
+ node _T_252 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_253 = eq(_T_252, UInt<5>("h012")) @[beh_lib.scala 255:39]
+ error_mask[17] <= _T_253 @[beh_lib.scala 255:21]
+ node _T_254 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_255 = eq(_T_254, UInt<5>("h013")) @[beh_lib.scala 255:39]
+ error_mask[18] <= _T_255 @[beh_lib.scala 255:21]
+ node _T_256 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_257 = eq(_T_256, UInt<5>("h014")) @[beh_lib.scala 255:39]
+ error_mask[19] <= _T_257 @[beh_lib.scala 255:21]
+ node _T_258 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_259 = eq(_T_258, UInt<5>("h015")) @[beh_lib.scala 255:39]
+ error_mask[20] <= _T_259 @[beh_lib.scala 255:21]
+ node _T_260 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_261 = eq(_T_260, UInt<5>("h016")) @[beh_lib.scala 255:39]
+ error_mask[21] <= _T_261 @[beh_lib.scala 255:21]
+ node _T_262 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_263 = eq(_T_262, UInt<5>("h017")) @[beh_lib.scala 255:39]
+ error_mask[22] <= _T_263 @[beh_lib.scala 255:21]
+ node _T_264 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_265 = eq(_T_264, UInt<5>("h018")) @[beh_lib.scala 255:39]
+ error_mask[23] <= _T_265 @[beh_lib.scala 255:21]
+ node _T_266 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_267 = eq(_T_266, UInt<5>("h019")) @[beh_lib.scala 255:39]
+ error_mask[24] <= _T_267 @[beh_lib.scala 255:21]
+ node _T_268 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_269 = eq(_T_268, UInt<5>("h01a")) @[beh_lib.scala 255:39]
+ error_mask[25] <= _T_269 @[beh_lib.scala 255:21]
+ node _T_270 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_271 = eq(_T_270, UInt<5>("h01b")) @[beh_lib.scala 255:39]
+ error_mask[26] <= _T_271 @[beh_lib.scala 255:21]
+ node _T_272 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_273 = eq(_T_272, UInt<5>("h01c")) @[beh_lib.scala 255:39]
+ error_mask[27] <= _T_273 @[beh_lib.scala 255:21]
+ node _T_274 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_275 = eq(_T_274, UInt<5>("h01d")) @[beh_lib.scala 255:39]
+ error_mask[28] <= _T_275 @[beh_lib.scala 255:21]
+ node _T_276 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_277 = eq(_T_276, UInt<5>("h01e")) @[beh_lib.scala 255:39]
+ error_mask[29] <= _T_277 @[beh_lib.scala 255:21]
+ node _T_278 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_279 = eq(_T_278, UInt<5>("h01f")) @[beh_lib.scala 255:39]
+ error_mask[30] <= _T_279 @[beh_lib.scala 255:21]
+ node _T_280 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_281 = eq(_T_280, UInt<6>("h020")) @[beh_lib.scala 255:39]
+ error_mask[31] <= _T_281 @[beh_lib.scala 255:21]
+ node _T_282 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_283 = eq(_T_282, UInt<6>("h021")) @[beh_lib.scala 255:39]
+ error_mask[32] <= _T_283 @[beh_lib.scala 255:21]
+ node _T_284 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_285 = eq(_T_284, UInt<6>("h022")) @[beh_lib.scala 255:39]
+ error_mask[33] <= _T_285 @[beh_lib.scala 255:21]
+ node _T_286 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_287 = eq(_T_286, UInt<6>("h023")) @[beh_lib.scala 255:39]
+ error_mask[34] <= _T_287 @[beh_lib.scala 255:21]
+ node _T_288 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_289 = eq(_T_288, UInt<6>("h024")) @[beh_lib.scala 255:39]
+ error_mask[35] <= _T_289 @[beh_lib.scala 255:21]
+ node _T_290 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_291 = eq(_T_290, UInt<6>("h025")) @[beh_lib.scala 255:39]
+ error_mask[36] <= _T_291 @[beh_lib.scala 255:21]
+ node _T_292 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_293 = eq(_T_292, UInt<6>("h026")) @[beh_lib.scala 255:39]
+ error_mask[37] <= _T_293 @[beh_lib.scala 255:21]
+ node _T_294 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_295 = eq(_T_294, UInt<6>("h027")) @[beh_lib.scala 255:39]
+ error_mask[38] <= _T_295 @[beh_lib.scala 255:21]
+ node _T_296 = bits(io.ecc_in, 6, 6) @[beh_lib.scala 257:38]
+ node _T_297 = bits(io.din, 31, 26) @[beh_lib.scala 257:49]
+ node _T_298 = bits(io.ecc_in, 5, 5) @[beh_lib.scala 257:67]
+ node _T_299 = bits(io.din, 25, 11) @[beh_lib.scala 257:78]
+ node _T_300 = bits(io.ecc_in, 4, 4) @[beh_lib.scala 257:96]
+ node _T_301 = bits(io.din, 10, 4) @[beh_lib.scala 257:107]
+ node _T_302 = bits(io.ecc_in, 3, 3) @[beh_lib.scala 257:124]
+ node _T_303 = bits(io.din, 3, 1) @[beh_lib.scala 257:135]
+ node _T_304 = bits(io.ecc_in, 2, 2) @[beh_lib.scala 257:151]
+ node _T_305 = bits(io.din, 0, 0) @[beh_lib.scala 257:162]
+ node _T_306 = bits(io.ecc_in, 1, 0) @[beh_lib.scala 257:176]
+ node _T_307 = cat(_T_305, _T_306) @[Cat.scala 29:58]
+ node _T_308 = cat(_T_302, _T_303) @[Cat.scala 29:58]
+ node _T_309 = cat(_T_308, _T_304) @[Cat.scala 29:58]
+ node _T_310 = cat(_T_309, _T_307) @[Cat.scala 29:58]
+ node _T_311 = cat(_T_299, _T_300) @[Cat.scala 29:58]
+ node _T_312 = cat(_T_311, _T_301) @[Cat.scala 29:58]
+ node _T_313 = cat(_T_296, _T_297) @[Cat.scala 29:58]
+ node _T_314 = cat(_T_313, _T_298) @[Cat.scala 29:58]
+ node _T_315 = cat(_T_314, _T_312) @[Cat.scala 29:58]
+ node din_plus_parity = cat(_T_315, _T_310) @[Cat.scala 29:58]
+ node _T_316 = bits(io.single_ecc_error, 0, 0) @[beh_lib.scala 258:50]
+ node _T_317 = cat(error_mask[1], error_mask[0]) @[beh_lib.scala 258:70]
+ node _T_318 = cat(error_mask[3], error_mask[2]) @[beh_lib.scala 258:70]
+ node _T_319 = cat(_T_318, _T_317) @[beh_lib.scala 258:70]
+ node _T_320 = cat(error_mask[5], error_mask[4]) @[beh_lib.scala 258:70]
+ node _T_321 = cat(error_mask[8], error_mask[7]) @[beh_lib.scala 258:70]
+ node _T_322 = cat(_T_321, error_mask[6]) @[beh_lib.scala 258:70]
+ node _T_323 = cat(_T_322, _T_320) @[beh_lib.scala 258:70]
+ node _T_324 = cat(_T_323, _T_319) @[beh_lib.scala 258:70]
+ node _T_325 = cat(error_mask[10], error_mask[9]) @[beh_lib.scala 258:70]
+ node _T_326 = cat(error_mask[13], error_mask[12]) @[beh_lib.scala 258:70]
+ node _T_327 = cat(_T_326, error_mask[11]) @[beh_lib.scala 258:70]
+ node _T_328 = cat(_T_327, _T_325) @[beh_lib.scala 258:70]
+ node _T_329 = cat(error_mask[15], error_mask[14]) @[beh_lib.scala 258:70]
+ node _T_330 = cat(error_mask[18], error_mask[17]) @[beh_lib.scala 258:70]
+ node _T_331 = cat(_T_330, error_mask[16]) @[beh_lib.scala 258:70]
+ node _T_332 = cat(_T_331, _T_329) @[beh_lib.scala 258:70]
+ node _T_333 = cat(_T_332, _T_328) @[beh_lib.scala 258:70]
+ node _T_334 = cat(_T_333, _T_324) @[beh_lib.scala 258:70]
+ node _T_335 = cat(error_mask[20], error_mask[19]) @[beh_lib.scala 258:70]
+ node _T_336 = cat(error_mask[23], error_mask[22]) @[beh_lib.scala 258:70]
+ node _T_337 = cat(_T_336, error_mask[21]) @[beh_lib.scala 258:70]
+ node _T_338 = cat(_T_337, _T_335) @[beh_lib.scala 258:70]
+ node _T_339 = cat(error_mask[25], error_mask[24]) @[beh_lib.scala 258:70]
+ node _T_340 = cat(error_mask[28], error_mask[27]) @[beh_lib.scala 258:70]
+ node _T_341 = cat(_T_340, error_mask[26]) @[beh_lib.scala 258:70]
+ node _T_342 = cat(_T_341, _T_339) @[beh_lib.scala 258:70]
+ node _T_343 = cat(_T_342, _T_338) @[beh_lib.scala 258:70]
+ node _T_344 = cat(error_mask[30], error_mask[29]) @[beh_lib.scala 258:70]
+ node _T_345 = cat(error_mask[33], error_mask[32]) @[beh_lib.scala 258:70]
+ node _T_346 = cat(_T_345, error_mask[31]) @[beh_lib.scala 258:70]
+ node _T_347 = cat(_T_346, _T_344) @[beh_lib.scala 258:70]
+ node _T_348 = cat(error_mask[35], error_mask[34]) @[beh_lib.scala 258:70]
+ node _T_349 = cat(error_mask[38], error_mask[37]) @[beh_lib.scala 258:70]
+ node _T_350 = cat(_T_349, error_mask[36]) @[beh_lib.scala 258:70]
+ node _T_351 = cat(_T_350, _T_348) @[beh_lib.scala 258:70]
+ node _T_352 = cat(_T_351, _T_347) @[beh_lib.scala 258:70]
+ node _T_353 = cat(_T_352, _T_343) @[beh_lib.scala 258:70]
+ node _T_354 = cat(_T_353, _T_334) @[beh_lib.scala 258:70]
+ node _T_355 = xor(_T_354, din_plus_parity) @[beh_lib.scala 258:77]
+ node dout_plus_parity = mux(_T_316, _T_355, din_plus_parity) @[beh_lib.scala 258:29]
+ node _T_356 = bits(dout_plus_parity, 37, 32) @[beh_lib.scala 260:35]
+ node _T_357 = bits(dout_plus_parity, 30, 16) @[beh_lib.scala 260:59]
+ node _T_358 = bits(dout_plus_parity, 14, 8) @[beh_lib.scala 260:84]
+ node _T_359 = bits(dout_plus_parity, 6, 4) @[beh_lib.scala 260:108]
+ node _T_360 = bits(dout_plus_parity, 2, 2) @[beh_lib.scala 260:131]
+ node _T_361 = cat(_T_359, _T_360) @[Cat.scala 29:58]
+ node _T_362 = cat(_T_356, _T_357) @[Cat.scala 29:58]
+ node _T_363 = cat(_T_362, _T_358) @[Cat.scala 29:58]
+ node _T_364 = cat(_T_363, _T_361) @[Cat.scala 29:58]
+ io.dout <= _T_364 @[beh_lib.scala 260:11]
+ node _T_365 = bits(dout_plus_parity, 38, 38) @[beh_lib.scala 261:37]
+ node _T_366 = bits(ecc_check, 6, 0) @[beh_lib.scala 261:54]
+ node _T_367 = eq(_T_366, UInt<7>("h040")) @[beh_lib.scala 261:60]
+ node _T_368 = xor(_T_365, _T_367) @[beh_lib.scala 261:42]
+ node _T_369 = bits(dout_plus_parity, 31, 31) @[beh_lib.scala 261:95]
+ node _T_370 = bits(dout_plus_parity, 15, 15) @[beh_lib.scala 261:117]
+ node _T_371 = bits(dout_plus_parity, 7, 7) @[beh_lib.scala 261:139]
+ node _T_372 = bits(dout_plus_parity, 3, 3) @[beh_lib.scala 261:160]
+ node _T_373 = bits(dout_plus_parity, 1, 0) @[beh_lib.scala 261:181]
+ node _T_374 = cat(_T_371, _T_372) @[Cat.scala 29:58]
+ node _T_375 = cat(_T_374, _T_373) @[Cat.scala 29:58]
+ node _T_376 = cat(_T_368, _T_369) @[Cat.scala 29:58]
+ node _T_377 = cat(_T_376, _T_370) @[Cat.scala 29:58]
+ node _T_378 = cat(_T_377, _T_375) @[Cat.scala 29:58]
+ io.ecc_out <= _T_378 @[beh_lib.scala 261:14]
+
+ module rvecc_decode_1 :
+ input clock : Clock
+ input reset : Reset
+ output io : {flip en : UInt<1>, flip din : UInt<32>, flip ecc_in : UInt<7>, flip sed_ded : UInt<1>, ecc_out : UInt<7>, dout : UInt<32>, single_ecc_error : UInt<1>, double_ecc_error : UInt<1>}
+
+ wire w0 : UInt<1>[18] @[beh_lib.scala 227:16]
+ wire w1 : UInt<1>[18] @[beh_lib.scala 228:16]
+ wire w2 : UInt<1>[18] @[beh_lib.scala 229:16]
+ wire w3 : UInt<1>[15] @[beh_lib.scala 230:16]
+ wire w4 : UInt<1>[15] @[beh_lib.scala 231:16]
+ wire w5 : UInt<1>[6] @[beh_lib.scala 232:16]
+ node _T = bits(io.din, 0, 0) @[beh_lib.scala 239:37]
+ w0[0] <= _T @[beh_lib.scala 239:28]
+ node _T_1 = bits(io.din, 0, 0) @[beh_lib.scala 240:37]
+ w1[0] <= _T_1 @[beh_lib.scala 240:28]
+ node _T_2 = bits(io.din, 1, 1) @[beh_lib.scala 239:37]
+ w0[1] <= _T_2 @[beh_lib.scala 239:28]
+ node _T_3 = bits(io.din, 1, 1) @[beh_lib.scala 241:37]
+ w2[0] <= _T_3 @[beh_lib.scala 241:28]
+ node _T_4 = bits(io.din, 2, 2) @[beh_lib.scala 240:37]
+ w1[1] <= _T_4 @[beh_lib.scala 240:28]
+ node _T_5 = bits(io.din, 2, 2) @[beh_lib.scala 241:37]
+ w2[1] <= _T_5 @[beh_lib.scala 241:28]
+ node _T_6 = bits(io.din, 3, 3) @[beh_lib.scala 239:37]
+ w0[2] <= _T_6 @[beh_lib.scala 239:28]
+ node _T_7 = bits(io.din, 3, 3) @[beh_lib.scala 240:37]
+ w1[2] <= _T_7 @[beh_lib.scala 240:28]
+ node _T_8 = bits(io.din, 3, 3) @[beh_lib.scala 241:37]
+ w2[2] <= _T_8 @[beh_lib.scala 241:28]
+ node _T_9 = bits(io.din, 4, 4) @[beh_lib.scala 239:37]
+ w0[3] <= _T_9 @[beh_lib.scala 239:28]
+ node _T_10 = bits(io.din, 4, 4) @[beh_lib.scala 242:37]
+ w3[0] <= _T_10 @[beh_lib.scala 242:28]
+ node _T_11 = bits(io.din, 5, 5) @[beh_lib.scala 240:37]
+ w1[3] <= _T_11 @[beh_lib.scala 240:28]
+ node _T_12 = bits(io.din, 5, 5) @[beh_lib.scala 242:37]
+ w3[1] <= _T_12 @[beh_lib.scala 242:28]
+ node _T_13 = bits(io.din, 6, 6) @[beh_lib.scala 239:37]
+ w0[4] <= _T_13 @[beh_lib.scala 239:28]
+ node _T_14 = bits(io.din, 6, 6) @[beh_lib.scala 240:37]
+ w1[4] <= _T_14 @[beh_lib.scala 240:28]
+ node _T_15 = bits(io.din, 6, 6) @[beh_lib.scala 242:37]
+ w3[2] <= _T_15 @[beh_lib.scala 242:28]
+ node _T_16 = bits(io.din, 7, 7) @[beh_lib.scala 241:37]
+ w2[3] <= _T_16 @[beh_lib.scala 241:28]
+ node _T_17 = bits(io.din, 7, 7) @[beh_lib.scala 242:37]
+ w3[3] <= _T_17 @[beh_lib.scala 242:28]
+ node _T_18 = bits(io.din, 8, 8) @[beh_lib.scala 239:37]
+ w0[5] <= _T_18 @[beh_lib.scala 239:28]
+ node _T_19 = bits(io.din, 8, 8) @[beh_lib.scala 241:37]
+ w2[4] <= _T_19 @[beh_lib.scala 241:28]
+ node _T_20 = bits(io.din, 8, 8) @[beh_lib.scala 242:37]
+ w3[4] <= _T_20 @[beh_lib.scala 242:28]
+ node _T_21 = bits(io.din, 9, 9) @[beh_lib.scala 240:37]
+ w1[5] <= _T_21 @[beh_lib.scala 240:28]
+ node _T_22 = bits(io.din, 9, 9) @[beh_lib.scala 241:37]
+ w2[5] <= _T_22 @[beh_lib.scala 241:28]
+ node _T_23 = bits(io.din, 9, 9) @[beh_lib.scala 242:37]
+ w3[5] <= _T_23 @[beh_lib.scala 242:28]
+ node _T_24 = bits(io.din, 10, 10) @[beh_lib.scala 239:37]
+ w0[6] <= _T_24 @[beh_lib.scala 239:28]
+ node _T_25 = bits(io.din, 10, 10) @[beh_lib.scala 240:37]
+ w1[6] <= _T_25 @[beh_lib.scala 240:28]
+ node _T_26 = bits(io.din, 10, 10) @[beh_lib.scala 241:37]
+ w2[6] <= _T_26 @[beh_lib.scala 241:28]
+ node _T_27 = bits(io.din, 10, 10) @[beh_lib.scala 242:37]
+ w3[6] <= _T_27 @[beh_lib.scala 242:28]
+ node _T_28 = bits(io.din, 11, 11) @[beh_lib.scala 239:37]
+ w0[7] <= _T_28 @[beh_lib.scala 239:28]
+ node _T_29 = bits(io.din, 11, 11) @[beh_lib.scala 243:37]
+ w4[0] <= _T_29 @[beh_lib.scala 243:28]
+ node _T_30 = bits(io.din, 12, 12) @[beh_lib.scala 240:37]
+ w1[7] <= _T_30 @[beh_lib.scala 240:28]
+ node _T_31 = bits(io.din, 12, 12) @[beh_lib.scala 243:37]
+ w4[1] <= _T_31 @[beh_lib.scala 243:28]
+ node _T_32 = bits(io.din, 13, 13) @[beh_lib.scala 239:37]
+ w0[8] <= _T_32 @[beh_lib.scala 239:28]
+ node _T_33 = bits(io.din, 13, 13) @[beh_lib.scala 240:37]
+ w1[8] <= _T_33 @[beh_lib.scala 240:28]
+ node _T_34 = bits(io.din, 13, 13) @[beh_lib.scala 243:37]
+ w4[2] <= _T_34 @[beh_lib.scala 243:28]
+ node _T_35 = bits(io.din, 14, 14) @[beh_lib.scala 241:37]
+ w2[7] <= _T_35 @[beh_lib.scala 241:28]
+ node _T_36 = bits(io.din, 14, 14) @[beh_lib.scala 243:37]
+ w4[3] <= _T_36 @[beh_lib.scala 243:28]
+ node _T_37 = bits(io.din, 15, 15) @[beh_lib.scala 239:37]
+ w0[9] <= _T_37 @[beh_lib.scala 239:28]
+ node _T_38 = bits(io.din, 15, 15) @[beh_lib.scala 241:37]
+ w2[8] <= _T_38 @[beh_lib.scala 241:28]
+ node _T_39 = bits(io.din, 15, 15) @[beh_lib.scala 243:37]
+ w4[4] <= _T_39 @[beh_lib.scala 243:28]
+ node _T_40 = bits(io.din, 16, 16) @[beh_lib.scala 240:37]
+ w1[9] <= _T_40 @[beh_lib.scala 240:28]
+ node _T_41 = bits(io.din, 16, 16) @[beh_lib.scala 241:37]
+ w2[9] <= _T_41 @[beh_lib.scala 241:28]
+ node _T_42 = bits(io.din, 16, 16) @[beh_lib.scala 243:37]
+ w4[5] <= _T_42 @[beh_lib.scala 243:28]
+ node _T_43 = bits(io.din, 17, 17) @[beh_lib.scala 239:37]
+ w0[10] <= _T_43 @[beh_lib.scala 239:28]
+ node _T_44 = bits(io.din, 17, 17) @[beh_lib.scala 240:37]
+ w1[10] <= _T_44 @[beh_lib.scala 240:28]
+ node _T_45 = bits(io.din, 17, 17) @[beh_lib.scala 241:37]
+ w2[10] <= _T_45 @[beh_lib.scala 241:28]
+ node _T_46 = bits(io.din, 17, 17) @[beh_lib.scala 243:37]
+ w4[6] <= _T_46 @[beh_lib.scala 243:28]
+ node _T_47 = bits(io.din, 18, 18) @[beh_lib.scala 242:37]
+ w3[7] <= _T_47 @[beh_lib.scala 242:28]
+ node _T_48 = bits(io.din, 18, 18) @[beh_lib.scala 243:37]
+ w4[7] <= _T_48 @[beh_lib.scala 243:28]
+ node _T_49 = bits(io.din, 19, 19) @[beh_lib.scala 239:37]
+ w0[11] <= _T_49 @[beh_lib.scala 239:28]
+ node _T_50 = bits(io.din, 19, 19) @[beh_lib.scala 242:37]
+ w3[8] <= _T_50 @[beh_lib.scala 242:28]
+ node _T_51 = bits(io.din, 19, 19) @[beh_lib.scala 243:37]
+ w4[8] <= _T_51 @[beh_lib.scala 243:28]
+ node _T_52 = bits(io.din, 20, 20) @[beh_lib.scala 240:37]
+ w1[11] <= _T_52 @[beh_lib.scala 240:28]
+ node _T_53 = bits(io.din, 20, 20) @[beh_lib.scala 242:37]
+ w3[9] <= _T_53 @[beh_lib.scala 242:28]
+ node _T_54 = bits(io.din, 20, 20) @[beh_lib.scala 243:37]
+ w4[9] <= _T_54 @[beh_lib.scala 243:28]
+ node _T_55 = bits(io.din, 21, 21) @[beh_lib.scala 239:37]
+ w0[12] <= _T_55 @[beh_lib.scala 239:28]
+ node _T_56 = bits(io.din, 21, 21) @[beh_lib.scala 240:37]
+ w1[12] <= _T_56 @[beh_lib.scala 240:28]
+ node _T_57 = bits(io.din, 21, 21) @[beh_lib.scala 242:37]
+ w3[10] <= _T_57 @[beh_lib.scala 242:28]
+ node _T_58 = bits(io.din, 21, 21) @[beh_lib.scala 243:37]
+ w4[10] <= _T_58 @[beh_lib.scala 243:28]
+ node _T_59 = bits(io.din, 22, 22) @[beh_lib.scala 241:37]
+ w2[11] <= _T_59 @[beh_lib.scala 241:28]
+ node _T_60 = bits(io.din, 22, 22) @[beh_lib.scala 242:37]
+ w3[11] <= _T_60 @[beh_lib.scala 242:28]
+ node _T_61 = bits(io.din, 22, 22) @[beh_lib.scala 243:37]
+ w4[11] <= _T_61 @[beh_lib.scala 243:28]
+ node _T_62 = bits(io.din, 23, 23) @[beh_lib.scala 239:37]
+ w0[13] <= _T_62 @[beh_lib.scala 239:28]
+ node _T_63 = bits(io.din, 23, 23) @[beh_lib.scala 241:37]
+ w2[12] <= _T_63 @[beh_lib.scala 241:28]
+ node _T_64 = bits(io.din, 23, 23) @[beh_lib.scala 242:37]
+ w3[12] <= _T_64 @[beh_lib.scala 242:28]
+ node _T_65 = bits(io.din, 23, 23) @[beh_lib.scala 243:37]
+ w4[12] <= _T_65 @[beh_lib.scala 243:28]
+ node _T_66 = bits(io.din, 24, 24) @[beh_lib.scala 240:37]
+ w1[13] <= _T_66 @[beh_lib.scala 240:28]
+ node _T_67 = bits(io.din, 24, 24) @[beh_lib.scala 241:37]
+ w2[13] <= _T_67 @[beh_lib.scala 241:28]
+ node _T_68 = bits(io.din, 24, 24) @[beh_lib.scala 242:37]
+ w3[13] <= _T_68 @[beh_lib.scala 242:28]
+ node _T_69 = bits(io.din, 24, 24) @[beh_lib.scala 243:37]
+ w4[13] <= _T_69 @[beh_lib.scala 243:28]
+ node _T_70 = bits(io.din, 25, 25) @[beh_lib.scala 239:37]
+ w0[14] <= _T_70 @[beh_lib.scala 239:28]
+ node _T_71 = bits(io.din, 25, 25) @[beh_lib.scala 240:37]
+ w1[14] <= _T_71 @[beh_lib.scala 240:28]
+ node _T_72 = bits(io.din, 25, 25) @[beh_lib.scala 241:37]
+ w2[14] <= _T_72 @[beh_lib.scala 241:28]
+ node _T_73 = bits(io.din, 25, 25) @[beh_lib.scala 242:37]
+ w3[14] <= _T_73 @[beh_lib.scala 242:28]
+ node _T_74 = bits(io.din, 25, 25) @[beh_lib.scala 243:37]
+ w4[14] <= _T_74 @[beh_lib.scala 243:28]
+ node _T_75 = bits(io.din, 26, 26) @[beh_lib.scala 239:37]
+ w0[15] <= _T_75 @[beh_lib.scala 239:28]
+ node _T_76 = bits(io.din, 26, 26) @[beh_lib.scala 244:37]
+ w5[0] <= _T_76 @[beh_lib.scala 244:28]
+ node _T_77 = bits(io.din, 27, 27) @[beh_lib.scala 240:37]
+ w1[15] <= _T_77 @[beh_lib.scala 240:28]
+ node _T_78 = bits(io.din, 27, 27) @[beh_lib.scala 244:37]
+ w5[1] <= _T_78 @[beh_lib.scala 244:28]
+ node _T_79 = bits(io.din, 28, 28) @[beh_lib.scala 239:37]
+ w0[16] <= _T_79 @[beh_lib.scala 239:28]
+ node _T_80 = bits(io.din, 28, 28) @[beh_lib.scala 240:37]
+ w1[16] <= _T_80 @[beh_lib.scala 240:28]
+ node _T_81 = bits(io.din, 28, 28) @[beh_lib.scala 244:37]
+ w5[2] <= _T_81 @[beh_lib.scala 244:28]
+ node _T_82 = bits(io.din, 29, 29) @[beh_lib.scala 241:37]
+ w2[15] <= _T_82 @[beh_lib.scala 241:28]
+ node _T_83 = bits(io.din, 29, 29) @[beh_lib.scala 244:37]
+ w5[3] <= _T_83 @[beh_lib.scala 244:28]
+ node _T_84 = bits(io.din, 30, 30) @[beh_lib.scala 239:37]
+ w0[17] <= _T_84 @[beh_lib.scala 239:28]
+ node _T_85 = bits(io.din, 30, 30) @[beh_lib.scala 241:37]
+ w2[16] <= _T_85 @[beh_lib.scala 241:28]
+ node _T_86 = bits(io.din, 30, 30) @[beh_lib.scala 244:37]
+ w5[4] <= _T_86 @[beh_lib.scala 244:28]
+ node _T_87 = bits(io.din, 31, 31) @[beh_lib.scala 240:37]
+ w1[17] <= _T_87 @[beh_lib.scala 240:28]
+ node _T_88 = bits(io.din, 31, 31) @[beh_lib.scala 241:37]
+ w2[17] <= _T_88 @[beh_lib.scala 241:28]
+ node _T_89 = bits(io.din, 31, 31) @[beh_lib.scala 244:37]
+ w5[5] <= _T_89 @[beh_lib.scala 244:28]
+ node _T_90 = xorr(io.din) @[beh_lib.scala 247:31]
+ node _T_91 = xorr(io.ecc_in) @[beh_lib.scala 247:48]
+ node _T_92 = xor(_T_90, _T_91) @[beh_lib.scala 247:36]
+ node _T_93 = not(io.sed_ded) @[beh_lib.scala 247:56]
+ node _T_94 = and(_T_92, _T_93) @[beh_lib.scala 247:54]
+ node _T_95 = bits(io.ecc_in, 5, 5) @[beh_lib.scala 247:78]
+ node _T_96 = cat(w5[2], w5[1]) @[beh_lib.scala 247:86]
+ node _T_97 = cat(_T_96, w5[0]) @[beh_lib.scala 247:86]
+ node _T_98 = cat(w5[5], w5[4]) @[beh_lib.scala 247:86]
+ node _T_99 = cat(_T_98, w5[3]) @[beh_lib.scala 247:86]
+ node _T_100 = cat(_T_99, _T_97) @[beh_lib.scala 247:86]
+ node _T_101 = xorr(_T_100) @[beh_lib.scala 247:93]
+ node _T_102 = xor(_T_95, _T_101) @[beh_lib.scala 247:81]
+ node _T_103 = bits(io.ecc_in, 4, 4) @[beh_lib.scala 247:108]
+ node _T_104 = cat(w4[2], w4[1]) @[beh_lib.scala 247:116]
+ node _T_105 = cat(_T_104, w4[0]) @[beh_lib.scala 247:116]
+ node _T_106 = cat(w4[4], w4[3]) @[beh_lib.scala 247:116]
+ node _T_107 = cat(w4[6], w4[5]) @[beh_lib.scala 247:116]
+ node _T_108 = cat(_T_107, _T_106) @[beh_lib.scala 247:116]
+ node _T_109 = cat(_T_108, _T_105) @[beh_lib.scala 247:116]
+ node _T_110 = cat(w4[8], w4[7]) @[beh_lib.scala 247:116]
+ node _T_111 = cat(w4[10], w4[9]) @[beh_lib.scala 247:116]
+ node _T_112 = cat(_T_111, _T_110) @[beh_lib.scala 247:116]
+ node _T_113 = cat(w4[12], w4[11]) @[beh_lib.scala 247:116]
+ node _T_114 = cat(w4[14], w4[13]) @[beh_lib.scala 247:116]
+ node _T_115 = cat(_T_114, _T_113) @[beh_lib.scala 247:116]
+ node _T_116 = cat(_T_115, _T_112) @[beh_lib.scala 247:116]
+ node _T_117 = cat(_T_116, _T_109) @[beh_lib.scala 247:116]
+ node _T_118 = xorr(_T_117) @[beh_lib.scala 247:123]
+ node _T_119 = xor(_T_103, _T_118) @[beh_lib.scala 247:111]
+ node _T_120 = bits(io.ecc_in, 3, 3) @[beh_lib.scala 247:138]
+ node _T_121 = cat(w3[2], w3[1]) @[beh_lib.scala 247:146]
+ node _T_122 = cat(_T_121, w3[0]) @[beh_lib.scala 247:146]
+ node _T_123 = cat(w3[4], w3[3]) @[beh_lib.scala 247:146]
+ node _T_124 = cat(w3[6], w3[5]) @[beh_lib.scala 247:146]
+ node _T_125 = cat(_T_124, _T_123) @[beh_lib.scala 247:146]
+ node _T_126 = cat(_T_125, _T_122) @[beh_lib.scala 247:146]
+ node _T_127 = cat(w3[8], w3[7]) @[beh_lib.scala 247:146]
+ node _T_128 = cat(w3[10], w3[9]) @[beh_lib.scala 247:146]
+ node _T_129 = cat(_T_128, _T_127) @[beh_lib.scala 247:146]
+ node _T_130 = cat(w3[12], w3[11]) @[beh_lib.scala 247:146]
+ node _T_131 = cat(w3[14], w3[13]) @[beh_lib.scala 247:146]
+ node _T_132 = cat(_T_131, _T_130) @[beh_lib.scala 247:146]
+ node _T_133 = cat(_T_132, _T_129) @[beh_lib.scala 247:146]
+ node _T_134 = cat(_T_133, _T_126) @[beh_lib.scala 247:146]
+ node _T_135 = xorr(_T_134) @[beh_lib.scala 247:153]
+ node _T_136 = xor(_T_120, _T_135) @[beh_lib.scala 247:141]
+ node _T_137 = bits(io.ecc_in, 2, 2) @[beh_lib.scala 247:168]
+ node _T_138 = cat(w2[1], w2[0]) @[beh_lib.scala 247:176]
+ node _T_139 = cat(w2[3], w2[2]) @[beh_lib.scala 247:176]
+ node _T_140 = cat(_T_139, _T_138) @[beh_lib.scala 247:176]
+ node _T_141 = cat(w2[5], w2[4]) @[beh_lib.scala 247:176]
+ node _T_142 = cat(w2[8], w2[7]) @[beh_lib.scala 247:176]
+ node _T_143 = cat(_T_142, w2[6]) @[beh_lib.scala 247:176]
+ node _T_144 = cat(_T_143, _T_141) @[beh_lib.scala 247:176]
+ node _T_145 = cat(_T_144, _T_140) @[beh_lib.scala 247:176]
+ node _T_146 = cat(w2[10], w2[9]) @[beh_lib.scala 247:176]
+ node _T_147 = cat(w2[12], w2[11]) @[beh_lib.scala 247:176]
+ node _T_148 = cat(_T_147, _T_146) @[beh_lib.scala 247:176]
+ node _T_149 = cat(w2[14], w2[13]) @[beh_lib.scala 247:176]
+ node _T_150 = cat(w2[17], w2[16]) @[beh_lib.scala 247:176]
+ node _T_151 = cat(_T_150, w2[15]) @[beh_lib.scala 247:176]
+ node _T_152 = cat(_T_151, _T_149) @[beh_lib.scala 247:176]
+ node _T_153 = cat(_T_152, _T_148) @[beh_lib.scala 247:176]
+ node _T_154 = cat(_T_153, _T_145) @[beh_lib.scala 247:176]
+ node _T_155 = xorr(_T_154) @[beh_lib.scala 247:183]
+ node _T_156 = xor(_T_137, _T_155) @[beh_lib.scala 247:171]
+ node _T_157 = bits(io.ecc_in, 1, 1) @[beh_lib.scala 247:198]
+ node _T_158 = cat(w1[1], w1[0]) @[beh_lib.scala 247:206]
+ node _T_159 = cat(w1[3], w1[2]) @[beh_lib.scala 247:206]
+ node _T_160 = cat(_T_159, _T_158) @[beh_lib.scala 247:206]
+ node _T_161 = cat(w1[5], w1[4]) @[beh_lib.scala 247:206]
+ node _T_162 = cat(w1[8], w1[7]) @[beh_lib.scala 247:206]
+ node _T_163 = cat(_T_162, w1[6]) @[beh_lib.scala 247:206]
+ node _T_164 = cat(_T_163, _T_161) @[beh_lib.scala 247:206]
+ node _T_165 = cat(_T_164, _T_160) @[beh_lib.scala 247:206]
+ node _T_166 = cat(w1[10], w1[9]) @[beh_lib.scala 247:206]
+ node _T_167 = cat(w1[12], w1[11]) @[beh_lib.scala 247:206]
+ node _T_168 = cat(_T_167, _T_166) @[beh_lib.scala 247:206]
+ node _T_169 = cat(w1[14], w1[13]) @[beh_lib.scala 247:206]
+ node _T_170 = cat(w1[17], w1[16]) @[beh_lib.scala 247:206]
+ node _T_171 = cat(_T_170, w1[15]) @[beh_lib.scala 247:206]
+ node _T_172 = cat(_T_171, _T_169) @[beh_lib.scala 247:206]
+ node _T_173 = cat(_T_172, _T_168) @[beh_lib.scala 247:206]
+ node _T_174 = cat(_T_173, _T_165) @[beh_lib.scala 247:206]
+ node _T_175 = xorr(_T_174) @[beh_lib.scala 247:213]
+ node _T_176 = xor(_T_157, _T_175) @[beh_lib.scala 247:201]
+ node _T_177 = bits(io.ecc_in, 0, 0) @[beh_lib.scala 247:228]
+ node _T_178 = cat(w0[1], w0[0]) @[beh_lib.scala 247:236]
+ node _T_179 = cat(w0[3], w0[2]) @[beh_lib.scala 247:236]
+ node _T_180 = cat(_T_179, _T_178) @[beh_lib.scala 247:236]
+ node _T_181 = cat(w0[5], w0[4]) @[beh_lib.scala 247:236]
+ node _T_182 = cat(w0[8], w0[7]) @[beh_lib.scala 247:236]
+ node _T_183 = cat(_T_182, w0[6]) @[beh_lib.scala 247:236]
+ node _T_184 = cat(_T_183, _T_181) @[beh_lib.scala 247:236]
+ node _T_185 = cat(_T_184, _T_180) @[beh_lib.scala 247:236]
+ node _T_186 = cat(w0[10], w0[9]) @[beh_lib.scala 247:236]
+ node _T_187 = cat(w0[12], w0[11]) @[beh_lib.scala 247:236]
+ node _T_188 = cat(_T_187, _T_186) @[beh_lib.scala 247:236]
+ node _T_189 = cat(w0[14], w0[13]) @[beh_lib.scala 247:236]
+ node _T_190 = cat(w0[17], w0[16]) @[beh_lib.scala 247:236]
+ node _T_191 = cat(_T_190, w0[15]) @[beh_lib.scala 247:236]
+ node _T_192 = cat(_T_191, _T_189) @[beh_lib.scala 247:236]
+ node _T_193 = cat(_T_192, _T_188) @[beh_lib.scala 247:236]
+ node _T_194 = cat(_T_193, _T_185) @[beh_lib.scala 247:236]
+ node _T_195 = xorr(_T_194) @[beh_lib.scala 247:243]
+ node _T_196 = xor(_T_177, _T_195) @[beh_lib.scala 247:231]
+ node _T_197 = cat(_T_156, _T_176) @[Cat.scala 29:58]
+ node _T_198 = cat(_T_197, _T_196) @[Cat.scala 29:58]
+ node _T_199 = cat(_T_119, _T_136) @[Cat.scala 29:58]
+ node _T_200 = cat(_T_94, _T_102) @[Cat.scala 29:58]
+ node _T_201 = cat(_T_200, _T_199) @[Cat.scala 29:58]
+ node ecc_check = cat(_T_201, _T_198) @[Cat.scala 29:58]
+ io.ecc_out <= ecc_check @[beh_lib.scala 248:14]
+ node _T_202 = neq(ecc_check, UInt<1>("h00")) @[beh_lib.scala 250:45]
+ node _T_203 = and(io.en, _T_202) @[beh_lib.scala 250:33]
+ node _T_204 = xorr(io.din) @[beh_lib.scala 250:64]
+ node _T_205 = xorr(io.ecc_in) @[beh_lib.scala 250:81]
+ node _T_206 = xor(_T_204, _T_205) @[beh_lib.scala 250:69]
+ node _T_207 = not(io.sed_ded) @[beh_lib.scala 250:89]
+ node _T_208 = and(_T_206, _T_207) @[beh_lib.scala 250:87]
+ node _T_209 = and(_T_203, _T_208) @[beh_lib.scala 250:53]
+ io.single_ecc_error <= _T_209 @[beh_lib.scala 250:23]
+ node _T_210 = neq(ecc_check, UInt<1>("h00")) @[beh_lib.scala 251:45]
+ node _T_211 = and(io.en, _T_210) @[beh_lib.scala 251:33]
+ node _T_212 = xorr(io.din) @[beh_lib.scala 251:64]
+ node _T_213 = xorr(io.ecc_in) @[beh_lib.scala 251:81]
+ node _T_214 = xor(_T_212, _T_213) @[beh_lib.scala 251:69]
+ node _T_215 = not(io.sed_ded) @[beh_lib.scala 251:89]
+ node _T_216 = and(_T_214, _T_215) @[beh_lib.scala 251:87]
+ node _T_217 = and(_T_211, _T_216) @[beh_lib.scala 251:53]
+ io.double_ecc_error <= _T_217 @[beh_lib.scala 251:23]
+ wire error_mask : UInt<1>[39] @[beh_lib.scala 252:24]
+ node _T_218 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_219 = eq(_T_218, UInt<1>("h01")) @[beh_lib.scala 255:39]
+ error_mask[0] <= _T_219 @[beh_lib.scala 255:21]
+ node _T_220 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_221 = eq(_T_220, UInt<2>("h02")) @[beh_lib.scala 255:39]
+ error_mask[1] <= _T_221 @[beh_lib.scala 255:21]
+ node _T_222 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_223 = eq(_T_222, UInt<2>("h03")) @[beh_lib.scala 255:39]
+ error_mask[2] <= _T_223 @[beh_lib.scala 255:21]
+ node _T_224 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_225 = eq(_T_224, UInt<3>("h04")) @[beh_lib.scala 255:39]
+ error_mask[3] <= _T_225 @[beh_lib.scala 255:21]
+ node _T_226 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_227 = eq(_T_226, UInt<3>("h05")) @[beh_lib.scala 255:39]
+ error_mask[4] <= _T_227 @[beh_lib.scala 255:21]
+ node _T_228 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_229 = eq(_T_228, UInt<3>("h06")) @[beh_lib.scala 255:39]
+ error_mask[5] <= _T_229 @[beh_lib.scala 255:21]
+ node _T_230 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_231 = eq(_T_230, UInt<3>("h07")) @[beh_lib.scala 255:39]
+ error_mask[6] <= _T_231 @[beh_lib.scala 255:21]
+ node _T_232 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_233 = eq(_T_232, UInt<4>("h08")) @[beh_lib.scala 255:39]
+ error_mask[7] <= _T_233 @[beh_lib.scala 255:21]
+ node _T_234 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_235 = eq(_T_234, UInt<4>("h09")) @[beh_lib.scala 255:39]
+ error_mask[8] <= _T_235 @[beh_lib.scala 255:21]
+ node _T_236 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_237 = eq(_T_236, UInt<4>("h0a")) @[beh_lib.scala 255:39]
+ error_mask[9] <= _T_237 @[beh_lib.scala 255:21]
+ node _T_238 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_239 = eq(_T_238, UInt<4>("h0b")) @[beh_lib.scala 255:39]
+ error_mask[10] <= _T_239 @[beh_lib.scala 255:21]
+ node _T_240 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_241 = eq(_T_240, UInt<4>("h0c")) @[beh_lib.scala 255:39]
+ error_mask[11] <= _T_241 @[beh_lib.scala 255:21]
+ node _T_242 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_243 = eq(_T_242, UInt<4>("h0d")) @[beh_lib.scala 255:39]
+ error_mask[12] <= _T_243 @[beh_lib.scala 255:21]
+ node _T_244 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_245 = eq(_T_244, UInt<4>("h0e")) @[beh_lib.scala 255:39]
+ error_mask[13] <= _T_245 @[beh_lib.scala 255:21]
+ node _T_246 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_247 = eq(_T_246, UInt<4>("h0f")) @[beh_lib.scala 255:39]
+ error_mask[14] <= _T_247 @[beh_lib.scala 255:21]
+ node _T_248 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_249 = eq(_T_248, UInt<5>("h010")) @[beh_lib.scala 255:39]
+ error_mask[15] <= _T_249 @[beh_lib.scala 255:21]
+ node _T_250 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_251 = eq(_T_250, UInt<5>("h011")) @[beh_lib.scala 255:39]
+ error_mask[16] <= _T_251 @[beh_lib.scala 255:21]
+ node _T_252 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_253 = eq(_T_252, UInt<5>("h012")) @[beh_lib.scala 255:39]
+ error_mask[17] <= _T_253 @[beh_lib.scala 255:21]
+ node _T_254 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_255 = eq(_T_254, UInt<5>("h013")) @[beh_lib.scala 255:39]
+ error_mask[18] <= _T_255 @[beh_lib.scala 255:21]
+ node _T_256 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_257 = eq(_T_256, UInt<5>("h014")) @[beh_lib.scala 255:39]
+ error_mask[19] <= _T_257 @[beh_lib.scala 255:21]
+ node _T_258 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_259 = eq(_T_258, UInt<5>("h015")) @[beh_lib.scala 255:39]
+ error_mask[20] <= _T_259 @[beh_lib.scala 255:21]
+ node _T_260 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_261 = eq(_T_260, UInt<5>("h016")) @[beh_lib.scala 255:39]
+ error_mask[21] <= _T_261 @[beh_lib.scala 255:21]
+ node _T_262 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_263 = eq(_T_262, UInt<5>("h017")) @[beh_lib.scala 255:39]
+ error_mask[22] <= _T_263 @[beh_lib.scala 255:21]
+ node _T_264 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_265 = eq(_T_264, UInt<5>("h018")) @[beh_lib.scala 255:39]
+ error_mask[23] <= _T_265 @[beh_lib.scala 255:21]
+ node _T_266 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_267 = eq(_T_266, UInt<5>("h019")) @[beh_lib.scala 255:39]
+ error_mask[24] <= _T_267 @[beh_lib.scala 255:21]
+ node _T_268 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_269 = eq(_T_268, UInt<5>("h01a")) @[beh_lib.scala 255:39]
+ error_mask[25] <= _T_269 @[beh_lib.scala 255:21]
+ node _T_270 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_271 = eq(_T_270, UInt<5>("h01b")) @[beh_lib.scala 255:39]
+ error_mask[26] <= _T_271 @[beh_lib.scala 255:21]
+ node _T_272 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_273 = eq(_T_272, UInt<5>("h01c")) @[beh_lib.scala 255:39]
+ error_mask[27] <= _T_273 @[beh_lib.scala 255:21]
+ node _T_274 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_275 = eq(_T_274, UInt<5>("h01d")) @[beh_lib.scala 255:39]
+ error_mask[28] <= _T_275 @[beh_lib.scala 255:21]
+ node _T_276 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_277 = eq(_T_276, UInt<5>("h01e")) @[beh_lib.scala 255:39]
+ error_mask[29] <= _T_277 @[beh_lib.scala 255:21]
+ node _T_278 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_279 = eq(_T_278, UInt<5>("h01f")) @[beh_lib.scala 255:39]
+ error_mask[30] <= _T_279 @[beh_lib.scala 255:21]
+ node _T_280 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_281 = eq(_T_280, UInt<6>("h020")) @[beh_lib.scala 255:39]
+ error_mask[31] <= _T_281 @[beh_lib.scala 255:21]
+ node _T_282 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_283 = eq(_T_282, UInt<6>("h021")) @[beh_lib.scala 255:39]
+ error_mask[32] <= _T_283 @[beh_lib.scala 255:21]
+ node _T_284 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_285 = eq(_T_284, UInt<6>("h022")) @[beh_lib.scala 255:39]
+ error_mask[33] <= _T_285 @[beh_lib.scala 255:21]
+ node _T_286 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_287 = eq(_T_286, UInt<6>("h023")) @[beh_lib.scala 255:39]
+ error_mask[34] <= _T_287 @[beh_lib.scala 255:21]
+ node _T_288 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_289 = eq(_T_288, UInt<6>("h024")) @[beh_lib.scala 255:39]
+ error_mask[35] <= _T_289 @[beh_lib.scala 255:21]
+ node _T_290 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_291 = eq(_T_290, UInt<6>("h025")) @[beh_lib.scala 255:39]
+ error_mask[36] <= _T_291 @[beh_lib.scala 255:21]
+ node _T_292 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_293 = eq(_T_292, UInt<6>("h026")) @[beh_lib.scala 255:39]
+ error_mask[37] <= _T_293 @[beh_lib.scala 255:21]
+ node _T_294 = bits(ecc_check, 5, 0) @[beh_lib.scala 255:33]
+ node _T_295 = eq(_T_294, UInt<6>("h027")) @[beh_lib.scala 255:39]
+ error_mask[38] <= _T_295 @[beh_lib.scala 255:21]
+ node _T_296 = bits(io.ecc_in, 6, 6) @[beh_lib.scala 257:38]
+ node _T_297 = bits(io.din, 31, 26) @[beh_lib.scala 257:49]
+ node _T_298 = bits(io.ecc_in, 5, 5) @[beh_lib.scala 257:67]
+ node _T_299 = bits(io.din, 25, 11) @[beh_lib.scala 257:78]
+ node _T_300 = bits(io.ecc_in, 4, 4) @[beh_lib.scala 257:96]
+ node _T_301 = bits(io.din, 10, 4) @[beh_lib.scala 257:107]
+ node _T_302 = bits(io.ecc_in, 3, 3) @[beh_lib.scala 257:124]
+ node _T_303 = bits(io.din, 3, 1) @[beh_lib.scala 257:135]
+ node _T_304 = bits(io.ecc_in, 2, 2) @[beh_lib.scala 257:151]
+ node _T_305 = bits(io.din, 0, 0) @[beh_lib.scala 257:162]
+ node _T_306 = bits(io.ecc_in, 1, 0) @[beh_lib.scala 257:176]
+ node _T_307 = cat(_T_305, _T_306) @[Cat.scala 29:58]
+ node _T_308 = cat(_T_302, _T_303) @[Cat.scala 29:58]
+ node _T_309 = cat(_T_308, _T_304) @[Cat.scala 29:58]
+ node _T_310 = cat(_T_309, _T_307) @[Cat.scala 29:58]
+ node _T_311 = cat(_T_299, _T_300) @[Cat.scala 29:58]
+ node _T_312 = cat(_T_311, _T_301) @[Cat.scala 29:58]
+ node _T_313 = cat(_T_296, _T_297) @[Cat.scala 29:58]
+ node _T_314 = cat(_T_313, _T_298) @[Cat.scala 29:58]
+ node _T_315 = cat(_T_314, _T_312) @[Cat.scala 29:58]
+ node din_plus_parity = cat(_T_315, _T_310) @[Cat.scala 29:58]
+ node _T_316 = bits(io.single_ecc_error, 0, 0) @[beh_lib.scala 258:50]
+ node _T_317 = cat(error_mask[1], error_mask[0]) @[beh_lib.scala 258:70]
+ node _T_318 = cat(error_mask[3], error_mask[2]) @[beh_lib.scala 258:70]
+ node _T_319 = cat(_T_318, _T_317) @[beh_lib.scala 258:70]
+ node _T_320 = cat(error_mask[5], error_mask[4]) @[beh_lib.scala 258:70]
+ node _T_321 = cat(error_mask[8], error_mask[7]) @[beh_lib.scala 258:70]
+ node _T_322 = cat(_T_321, error_mask[6]) @[beh_lib.scala 258:70]
+ node _T_323 = cat(_T_322, _T_320) @[beh_lib.scala 258:70]
+ node _T_324 = cat(_T_323, _T_319) @[beh_lib.scala 258:70]
+ node _T_325 = cat(error_mask[10], error_mask[9]) @[beh_lib.scala 258:70]
+ node _T_326 = cat(error_mask[13], error_mask[12]) @[beh_lib.scala 258:70]
+ node _T_327 = cat(_T_326, error_mask[11]) @[beh_lib.scala 258:70]
+ node _T_328 = cat(_T_327, _T_325) @[beh_lib.scala 258:70]
+ node _T_329 = cat(error_mask[15], error_mask[14]) @[beh_lib.scala 258:70]
+ node _T_330 = cat(error_mask[18], error_mask[17]) @[beh_lib.scala 258:70]
+ node _T_331 = cat(_T_330, error_mask[16]) @[beh_lib.scala 258:70]
+ node _T_332 = cat(_T_331, _T_329) @[beh_lib.scala 258:70]
+ node _T_333 = cat(_T_332, _T_328) @[beh_lib.scala 258:70]
+ node _T_334 = cat(_T_333, _T_324) @[beh_lib.scala 258:70]
+ node _T_335 = cat(error_mask[20], error_mask[19]) @[beh_lib.scala 258:70]
+ node _T_336 = cat(error_mask[23], error_mask[22]) @[beh_lib.scala 258:70]
+ node _T_337 = cat(_T_336, error_mask[21]) @[beh_lib.scala 258:70]
+ node _T_338 = cat(_T_337, _T_335) @[beh_lib.scala 258:70]
+ node _T_339 = cat(error_mask[25], error_mask[24]) @[beh_lib.scala 258:70]
+ node _T_340 = cat(error_mask[28], error_mask[27]) @[beh_lib.scala 258:70]
+ node _T_341 = cat(_T_340, error_mask[26]) @[beh_lib.scala 258:70]
+ node _T_342 = cat(_T_341, _T_339) @[beh_lib.scala 258:70]
+ node _T_343 = cat(_T_342, _T_338) @[beh_lib.scala 258:70]
+ node _T_344 = cat(error_mask[30], error_mask[29]) @[beh_lib.scala 258:70]
+ node _T_345 = cat(error_mask[33], error_mask[32]) @[beh_lib.scala 258:70]
+ node _T_346 = cat(_T_345, error_mask[31]) @[beh_lib.scala 258:70]
+ node _T_347 = cat(_T_346, _T_344) @[beh_lib.scala 258:70]
+ node _T_348 = cat(error_mask[35], error_mask[34]) @[beh_lib.scala 258:70]
+ node _T_349 = cat(error_mask[38], error_mask[37]) @[beh_lib.scala 258:70]
+ node _T_350 = cat(_T_349, error_mask[36]) @[beh_lib.scala 258:70]
+ node _T_351 = cat(_T_350, _T_348) @[beh_lib.scala 258:70]
+ node _T_352 = cat(_T_351, _T_347) @[beh_lib.scala 258:70]
+ node _T_353 = cat(_T_352, _T_343) @[beh_lib.scala 258:70]
+ node _T_354 = cat(_T_353, _T_334) @[beh_lib.scala 258:70]
+ node _T_355 = xor(_T_354, din_plus_parity) @[beh_lib.scala 258:77]
+ node dout_plus_parity = mux(_T_316, _T_355, din_plus_parity) @[beh_lib.scala 258:29]
+ node _T_356 = bits(dout_plus_parity, 37, 32) @[beh_lib.scala 260:35]
+ node _T_357 = bits(dout_plus_parity, 30, 16) @[beh_lib.scala 260:59]
+ node _T_358 = bits(dout_plus_parity, 14, 8) @[beh_lib.scala 260:84]
+ node _T_359 = bits(dout_plus_parity, 6, 4) @[beh_lib.scala 260:108]
+ node _T_360 = bits(dout_plus_parity, 2, 2) @[beh_lib.scala 260:131]
+ node _T_361 = cat(_T_359, _T_360) @[Cat.scala 29:58]
+ node _T_362 = cat(_T_356, _T_357) @[Cat.scala 29:58]
+ node _T_363 = cat(_T_362, _T_358) @[Cat.scala 29:58]
+ node _T_364 = cat(_T_363, _T_361) @[Cat.scala 29:58]
+ io.dout <= _T_364 @[beh_lib.scala 260:11]
+ node _T_365 = bits(dout_plus_parity, 38, 38) @[beh_lib.scala 261:37]
+ node _T_366 = bits(ecc_check, 6, 0) @[beh_lib.scala 261:54]
+ node _T_367 = eq(_T_366, UInt<7>("h040")) @[beh_lib.scala 261:60]
+ node _T_368 = xor(_T_365, _T_367) @[beh_lib.scala 261:42]
+ node _T_369 = bits(dout_plus_parity, 31, 31) @[beh_lib.scala 261:95]
+ node _T_370 = bits(dout_plus_parity, 15, 15) @[beh_lib.scala 261:117]
+ node _T_371 = bits(dout_plus_parity, 7, 7) @[beh_lib.scala 261:139]
+ node _T_372 = bits(dout_plus_parity, 3, 3) @[beh_lib.scala 261:160]
+ node _T_373 = bits(dout_plus_parity, 1, 0) @[beh_lib.scala 261:181]
+ node _T_374 = cat(_T_371, _T_372) @[Cat.scala 29:58]
+ node _T_375 = cat(_T_374, _T_373) @[Cat.scala 29:58]
+ node _T_376 = cat(_T_368, _T_369) @[Cat.scala 29:58]
+ node _T_377 = cat(_T_376, _T_370) @[Cat.scala 29:58]
+ node _T_378 = cat(_T_377, _T_375) @[Cat.scala 29:58]
+ io.ecc_out <= _T_378 @[beh_lib.scala 261:14]
+
+ module EL2_IC_TAG :
+ input clock : Clock
+ input reset : UInt<1>
+ output io : {flip clk : UInt<1>, flip rst_l : UInt<1>, flip clk_override : UInt<1>, flip dec_tlu_core_ecc_disable : UInt<1>, flip ic_rw_addr : UInt<32>, flip ic_wr_en : UInt<2>, flip ic_tag_valid : UInt<2>, flip ic_rd_en : UInt<1>, flip ic_debug_addr : UInt<13>, flip ic_debug_rd_en : UInt<1>, flip ic_debug_wr_en : UInt<1>, flip ic_debug_tag_array : UInt<1>, flip ic_debug_way : UInt<2>, ictag_debug_rd_data : UInt<26>, flip ic_debug_wr_data : UInt<71>, ic_rd_hit : UInt<2>, ic_tag_perr : UInt<1>, flip scan_mode : UInt<1>, test : UInt<26>, test_ecc_data_out : UInt<32>[2], test_ecc_out : UInt<7>[2], test_ecc_sb_out : UInt<1>[2], test_ecc_db_out : UInt<1>[2]}
+
+ node _T = bits(io.ic_rw_addr, 5, 4) @[el2_ifu_ic_mem.scala 73:70]
+ wire _T_1 : UInt<1>[1] @[el2_lib.scala 177:24]
+ _T_1[0] <= UInt<1>("h01") @[el2_lib.scala 177:24]
+ node _T_2 = eq(_T, _T_1[0]) @[el2_ifu_ic_mem.scala 73:93]
+ wire _T_3 : UInt<1>[2] @[el2_lib.scala 177:24]
+ _T_3[0] <= _T_2 @[el2_lib.scala 177:24]
+ _T_3[1] <= _T_2 @[el2_lib.scala 177:24]
+ node _T_4 = cat(_T_3[0], _T_3[1]) @[Cat.scala 29:58]
+ node ic_tag_wren = and(io.ic_wr_en, _T_4) @[el2_ifu_ic_mem.scala 73:33]
+ node _T_5 = and(io.ic_debug_rd_en, io.ic_debug_tag_array) @[el2_ifu_ic_mem.scala 75:68]
+ wire _T_6 : UInt<1>[2] @[el2_lib.scala 177:24]
+ _T_6[0] <= _T_5 @[el2_lib.scala 177:24]
+ _T_6[1] <= _T_5 @[el2_lib.scala 177:24]
+ node _T_7 = cat(_T_6[0], _T_6[1]) @[Cat.scala 29:58]
+ node ic_debug_rd_way_en = and(_T_7, io.ic_debug_way) @[el2_ifu_ic_mem.scala 75:93]
+ node _T_8 = and(io.ic_debug_wr_en, io.ic_debug_tag_array) @[el2_ifu_ic_mem.scala 76:68]
+ wire _T_9 : UInt<1>[2] @[el2_lib.scala 177:24]
+ _T_9[0] <= _T_8 @[el2_lib.scala 177:24]
+ _T_9[1] <= _T_8 @[el2_lib.scala 177:24]
+ node _T_10 = cat(_T_9[0], _T_9[1]) @[Cat.scala 29:58]
+ node ic_debug_wr_way_en = and(_T_10, io.ic_debug_way) @[el2_ifu_ic_mem.scala 76:93]
+ node _T_11 = or(io.ic_rd_en, io.clk_override) @[el2_ifu_ic_mem.scala 77:55]
+ wire _T_12 : UInt<1>[2] @[el2_lib.scala 177:24]
+ _T_12[0] <= _T_11 @[el2_lib.scala 177:24]
+ _T_12[1] <= _T_11 @[el2_lib.scala 177:24]
+ node _T_13 = cat(_T_12[0], _T_12[1]) @[Cat.scala 29:58]
+ node _T_14 = or(_T_13, io.ic_wr_en) @[el2_ifu_ic_mem.scala 77:74]
+ node _T_15 = or(_T_14, ic_debug_wr_way_en) @[el2_ifu_ic_mem.scala 77:88]
+ node ic_tag_clken = or(_T_15, ic_debug_rd_way_en) @[el2_ifu_ic_mem.scala 77:109]
+ reg ic_rd_en_ff : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ic_mem.scala 79:28]
+ ic_rd_en_ff <= io.ic_rd_en @[el2_ifu_ic_mem.scala 79:28]
+ reg ic_rw_addr_ff : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ic_mem.scala 80:30]
+ ic_rw_addr_ff <= io.ic_rw_addr @[el2_ifu_ic_mem.scala 80:30]
+ node ic_tag_wren_q = or(ic_tag_wren, ic_debug_wr_way_en) @[el2_ifu_ic_mem.scala 82:35]
+ wire ic_tag_ecc : UInt<7> @[el2_ifu_ic_mem.scala 83:24]
+ wire ic_tag_wr_data : UInt<26> @[el2_ifu_ic_mem.scala 84:28]
+ wire ic_tag_parity : UInt<1> @[el2_ifu_ic_mem.scala 85:27]
+ ic_tag_ecc <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 86:14]
+ ic_tag_wr_data <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 87:18]
+ ic_tag_parity <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 88:17]
+ when UInt<1>("h00") : @[el2_ifu_ic_mem.scala 89:32]
+ when UInt<1>("h01") : @[el2_ifu_ic_mem.scala 90:25]
+ wire _T_16 : UInt<1>[13] @[el2_lib.scala 177:24]
+ _T_16[0] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[1] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[2] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[3] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[4] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[5] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[6] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[7] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[8] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[9] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[10] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[11] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_16[12] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ node _T_17 = cat(_T_16[0], _T_16[1]) @[Cat.scala 29:58]
+ node _T_18 = cat(_T_17, _T_16[2]) @[Cat.scala 29:58]
+ node _T_19 = cat(_T_18, _T_16[3]) @[Cat.scala 29:58]
+ node _T_20 = cat(_T_19, _T_16[4]) @[Cat.scala 29:58]
+ node _T_21 = cat(_T_20, _T_16[5]) @[Cat.scala 29:58]
+ node _T_22 = cat(_T_21, _T_16[6]) @[Cat.scala 29:58]
+ node _T_23 = cat(_T_22, _T_16[7]) @[Cat.scala 29:58]
+ node _T_24 = cat(_T_23, _T_16[8]) @[Cat.scala 29:58]
+ node _T_25 = cat(_T_24, _T_16[9]) @[Cat.scala 29:58]
+ node _T_26 = cat(_T_25, _T_16[10]) @[Cat.scala 29:58]
+ node _T_27 = cat(_T_26, _T_16[11]) @[Cat.scala 29:58]
+ node _T_28 = cat(_T_27, _T_16[12]) @[Cat.scala 29:58]
+ node _T_29 = bits(io.ic_rw_addr, 31, 13) @[el2_ifu_ic_mem.scala 91:77]
+ node _T_30 = cat(_T_28, _T_29) @[Cat.scala 29:58]
+ wire _T_31 : UInt<1>[18] @[el2_lib.scala 193:18]
+ wire _T_32 : UInt<1>[18] @[el2_lib.scala 194:18]
+ wire _T_33 : UInt<1>[18] @[el2_lib.scala 195:18]
+ wire _T_34 : UInt<1>[15] @[el2_lib.scala 196:18]
+ wire _T_35 : UInt<1>[15] @[el2_lib.scala 197:18]
+ wire _T_36 : UInt<1>[6] @[el2_lib.scala 198:18]
+ node _T_37 = bits(_T_30, 0, 0) @[el2_lib.scala 205:36]
+ _T_32[0] <= _T_37 @[el2_lib.scala 205:30]
+ node _T_38 = bits(_T_30, 0, 0) @[el2_lib.scala 206:36]
+ _T_33[0] <= _T_38 @[el2_lib.scala 206:30]
+ node _T_39 = bits(_T_30, 0, 0) @[el2_lib.scala 209:36]
+ _T_36[0] <= _T_39 @[el2_lib.scala 209:30]
+ node _T_40 = bits(_T_30, 1, 1) @[el2_lib.scala 204:36]
+ _T_31[0] <= _T_40 @[el2_lib.scala 204:30]
+ node _T_41 = bits(_T_30, 1, 1) @[el2_lib.scala 206:36]
+ _T_33[1] <= _T_41 @[el2_lib.scala 206:30]
+ node _T_42 = bits(_T_30, 1, 1) @[el2_lib.scala 209:36]
+ _T_36[1] <= _T_42 @[el2_lib.scala 209:30]
+ node _T_43 = bits(_T_30, 2, 2) @[el2_lib.scala 206:36]
+ _T_33[2] <= _T_43 @[el2_lib.scala 206:30]
+ node _T_44 = bits(_T_30, 2, 2) @[el2_lib.scala 209:36]
+ _T_36[2] <= _T_44 @[el2_lib.scala 209:30]
+ node _T_45 = bits(_T_30, 3, 3) @[el2_lib.scala 204:36]
+ _T_31[1] <= _T_45 @[el2_lib.scala 204:30]
+ node _T_46 = bits(_T_30, 3, 3) @[el2_lib.scala 205:36]
+ _T_32[1] <= _T_46 @[el2_lib.scala 205:30]
+ node _T_47 = bits(_T_30, 3, 3) @[el2_lib.scala 209:36]
+ _T_36[3] <= _T_47 @[el2_lib.scala 209:30]
+ node _T_48 = bits(_T_30, 4, 4) @[el2_lib.scala 205:36]
+ _T_32[2] <= _T_48 @[el2_lib.scala 205:30]
+ node _T_49 = bits(_T_30, 4, 4) @[el2_lib.scala 209:36]
+ _T_36[4] <= _T_49 @[el2_lib.scala 209:30]
+ node _T_50 = bits(_T_30, 5, 5) @[el2_lib.scala 204:36]
+ _T_31[2] <= _T_50 @[el2_lib.scala 204:30]
+ node _T_51 = bits(_T_30, 5, 5) @[el2_lib.scala 209:36]
+ _T_36[5] <= _T_51 @[el2_lib.scala 209:30]
+ node _T_52 = bits(_T_30, 6, 6) @[el2_lib.scala 204:36]
+ _T_31[3] <= _T_52 @[el2_lib.scala 204:30]
+ node _T_53 = bits(_T_30, 6, 6) @[el2_lib.scala 205:36]
+ _T_32[3] <= _T_53 @[el2_lib.scala 205:30]
+ node _T_54 = bits(_T_30, 6, 6) @[el2_lib.scala 206:36]
+ _T_33[3] <= _T_54 @[el2_lib.scala 206:30]
+ node _T_55 = bits(_T_30, 6, 6) @[el2_lib.scala 207:36]
+ _T_34[0] <= _T_55 @[el2_lib.scala 207:30]
+ node _T_56 = bits(_T_30, 6, 6) @[el2_lib.scala 208:36]
+ _T_35[0] <= _T_56 @[el2_lib.scala 208:30]
+ node _T_57 = bits(_T_30, 7, 7) @[el2_lib.scala 205:36]
+ _T_32[4] <= _T_57 @[el2_lib.scala 205:30]
+ node _T_58 = bits(_T_30, 7, 7) @[el2_lib.scala 206:36]
+ _T_33[4] <= _T_58 @[el2_lib.scala 206:30]
+ node _T_59 = bits(_T_30, 7, 7) @[el2_lib.scala 207:36]
+ _T_34[1] <= _T_59 @[el2_lib.scala 207:30]
+ node _T_60 = bits(_T_30, 7, 7) @[el2_lib.scala 208:36]
+ _T_35[1] <= _T_60 @[el2_lib.scala 208:30]
+ node _T_61 = bits(_T_30, 8, 8) @[el2_lib.scala 204:36]
+ _T_31[4] <= _T_61 @[el2_lib.scala 204:30]
+ node _T_62 = bits(_T_30, 8, 8) @[el2_lib.scala 206:36]
+ _T_33[5] <= _T_62 @[el2_lib.scala 206:30]
+ node _T_63 = bits(_T_30, 8, 8) @[el2_lib.scala 207:36]
+ _T_34[2] <= _T_63 @[el2_lib.scala 207:30]
+ node _T_64 = bits(_T_30, 8, 8) @[el2_lib.scala 208:36]
+ _T_35[2] <= _T_64 @[el2_lib.scala 208:30]
+ node _T_65 = bits(_T_30, 9, 9) @[el2_lib.scala 206:36]
+ _T_33[6] <= _T_65 @[el2_lib.scala 206:30]
+ node _T_66 = bits(_T_30, 9, 9) @[el2_lib.scala 207:36]
+ _T_34[3] <= _T_66 @[el2_lib.scala 207:30]
+ node _T_67 = bits(_T_30, 9, 9) @[el2_lib.scala 208:36]
+ _T_35[3] <= _T_67 @[el2_lib.scala 208:30]
+ node _T_68 = bits(_T_30, 10, 10) @[el2_lib.scala 204:36]
+ _T_31[5] <= _T_68 @[el2_lib.scala 204:30]
+ node _T_69 = bits(_T_30, 10, 10) @[el2_lib.scala 205:36]
+ _T_32[5] <= _T_69 @[el2_lib.scala 205:30]
+ node _T_70 = bits(_T_30, 10, 10) @[el2_lib.scala 207:36]
+ _T_34[4] <= _T_70 @[el2_lib.scala 207:30]
+ node _T_71 = bits(_T_30, 10, 10) @[el2_lib.scala 208:36]
+ _T_35[4] <= _T_71 @[el2_lib.scala 208:30]
+ node _T_72 = bits(_T_30, 11, 11) @[el2_lib.scala 205:36]
+ _T_32[6] <= _T_72 @[el2_lib.scala 205:30]
+ node _T_73 = bits(_T_30, 11, 11) @[el2_lib.scala 207:36]
+ _T_34[5] <= _T_73 @[el2_lib.scala 207:30]
+ node _T_74 = bits(_T_30, 11, 11) @[el2_lib.scala 208:36]
+ _T_35[5] <= _T_74 @[el2_lib.scala 208:30]
+ node _T_75 = bits(_T_30, 12, 12) @[el2_lib.scala 204:36]
+ _T_31[6] <= _T_75 @[el2_lib.scala 204:30]
+ node _T_76 = bits(_T_30, 12, 12) @[el2_lib.scala 207:36]
+ _T_34[6] <= _T_76 @[el2_lib.scala 207:30]
+ node _T_77 = bits(_T_30, 12, 12) @[el2_lib.scala 208:36]
+ _T_35[6] <= _T_77 @[el2_lib.scala 208:30]
+ node _T_78 = bits(_T_30, 13, 13) @[el2_lib.scala 207:36]
+ _T_34[7] <= _T_78 @[el2_lib.scala 207:30]
+ node _T_79 = bits(_T_30, 13, 13) @[el2_lib.scala 208:36]
+ _T_35[7] <= _T_79 @[el2_lib.scala 208:30]
+ node _T_80 = bits(_T_30, 14, 14) @[el2_lib.scala 204:36]
+ _T_31[7] <= _T_80 @[el2_lib.scala 204:30]
+ node _T_81 = bits(_T_30, 14, 14) @[el2_lib.scala 205:36]
+ _T_32[7] <= _T_81 @[el2_lib.scala 205:30]
+ node _T_82 = bits(_T_30, 14, 14) @[el2_lib.scala 206:36]
+ _T_33[7] <= _T_82 @[el2_lib.scala 206:30]
+ node _T_83 = bits(_T_30, 14, 14) @[el2_lib.scala 208:36]
+ _T_35[8] <= _T_83 @[el2_lib.scala 208:30]
+ node _T_84 = bits(_T_30, 15, 15) @[el2_lib.scala 205:36]
+ _T_32[8] <= _T_84 @[el2_lib.scala 205:30]
+ node _T_85 = bits(_T_30, 15, 15) @[el2_lib.scala 206:36]
+ _T_33[8] <= _T_85 @[el2_lib.scala 206:30]
+ node _T_86 = bits(_T_30, 15, 15) @[el2_lib.scala 208:36]
+ _T_35[9] <= _T_86 @[el2_lib.scala 208:30]
+ node _T_87 = bits(_T_30, 16, 16) @[el2_lib.scala 204:36]
+ _T_31[8] <= _T_87 @[el2_lib.scala 204:30]
+ node _T_88 = bits(_T_30, 16, 16) @[el2_lib.scala 206:36]
+ _T_33[9] <= _T_88 @[el2_lib.scala 206:30]
+ node _T_89 = bits(_T_30, 16, 16) @[el2_lib.scala 208:36]
+ _T_35[10] <= _T_89 @[el2_lib.scala 208:30]
+ node _T_90 = bits(_T_30, 17, 17) @[el2_lib.scala 206:36]
+ _T_33[10] <= _T_90 @[el2_lib.scala 206:30]
+ node _T_91 = bits(_T_30, 17, 17) @[el2_lib.scala 208:36]
+ _T_35[11] <= _T_91 @[el2_lib.scala 208:30]
+ node _T_92 = bits(_T_30, 18, 18) @[el2_lib.scala 204:36]
+ _T_31[9] <= _T_92 @[el2_lib.scala 204:30]
+ node _T_93 = bits(_T_30, 18, 18) @[el2_lib.scala 205:36]
+ _T_32[9] <= _T_93 @[el2_lib.scala 205:30]
+ node _T_94 = bits(_T_30, 18, 18) @[el2_lib.scala 208:36]
+ _T_35[12] <= _T_94 @[el2_lib.scala 208:30]
+ node _T_95 = bits(_T_30, 19, 19) @[el2_lib.scala 205:36]
+ _T_32[10] <= _T_95 @[el2_lib.scala 205:30]
+ node _T_96 = bits(_T_30, 19, 19) @[el2_lib.scala 208:36]
+ _T_35[13] <= _T_96 @[el2_lib.scala 208:30]
+ node _T_97 = bits(_T_30, 20, 20) @[el2_lib.scala 204:36]
+ _T_31[10] <= _T_97 @[el2_lib.scala 204:30]
+ node _T_98 = bits(_T_30, 20, 20) @[el2_lib.scala 208:36]
+ _T_35[14] <= _T_98 @[el2_lib.scala 208:30]
+ node _T_99 = bits(_T_30, 21, 21) @[el2_lib.scala 204:36]
+ _T_31[11] <= _T_99 @[el2_lib.scala 204:30]
+ node _T_100 = bits(_T_30, 21, 21) @[el2_lib.scala 205:36]
+ _T_32[11] <= _T_100 @[el2_lib.scala 205:30]
+ node _T_101 = bits(_T_30, 21, 21) @[el2_lib.scala 206:36]
+ _T_33[11] <= _T_101 @[el2_lib.scala 206:30]
+ node _T_102 = bits(_T_30, 21, 21) @[el2_lib.scala 207:36]
+ _T_34[8] <= _T_102 @[el2_lib.scala 207:30]
+ node _T_103 = bits(_T_30, 22, 22) @[el2_lib.scala 205:36]
+ _T_32[12] <= _T_103 @[el2_lib.scala 205:30]
+ node _T_104 = bits(_T_30, 22, 22) @[el2_lib.scala 206:36]
+ _T_33[12] <= _T_104 @[el2_lib.scala 206:30]
+ node _T_105 = bits(_T_30, 22, 22) @[el2_lib.scala 207:36]
+ _T_34[9] <= _T_105 @[el2_lib.scala 207:30]
+ node _T_106 = bits(_T_30, 23, 23) @[el2_lib.scala 204:36]
+ _T_31[12] <= _T_106 @[el2_lib.scala 204:30]
+ node _T_107 = bits(_T_30, 23, 23) @[el2_lib.scala 206:36]
+ _T_33[13] <= _T_107 @[el2_lib.scala 206:30]
+ node _T_108 = bits(_T_30, 23, 23) @[el2_lib.scala 207:36]
+ _T_34[10] <= _T_108 @[el2_lib.scala 207:30]
+ node _T_109 = bits(_T_30, 24, 24) @[el2_lib.scala 206:36]
+ _T_33[14] <= _T_109 @[el2_lib.scala 206:30]
+ node _T_110 = bits(_T_30, 24, 24) @[el2_lib.scala 207:36]
+ _T_34[11] <= _T_110 @[el2_lib.scala 207:30]
+ node _T_111 = bits(_T_30, 25, 25) @[el2_lib.scala 204:36]
+ _T_31[13] <= _T_111 @[el2_lib.scala 204:30]
+ node _T_112 = bits(_T_30, 25, 25) @[el2_lib.scala 205:36]
+ _T_32[13] <= _T_112 @[el2_lib.scala 205:30]
+ node _T_113 = bits(_T_30, 25, 25) @[el2_lib.scala 207:36]
+ _T_34[12] <= _T_113 @[el2_lib.scala 207:30]
+ node _T_114 = bits(_T_30, 26, 26) @[el2_lib.scala 205:36]
+ _T_32[14] <= _T_114 @[el2_lib.scala 205:30]
+ node _T_115 = bits(_T_30, 26, 26) @[el2_lib.scala 207:36]
+ _T_34[13] <= _T_115 @[el2_lib.scala 207:30]
+ node _T_116 = bits(_T_30, 27, 27) @[el2_lib.scala 204:36]
+ _T_31[14] <= _T_116 @[el2_lib.scala 204:30]
+ node _T_117 = bits(_T_30, 27, 27) @[el2_lib.scala 207:36]
+ _T_34[14] <= _T_117 @[el2_lib.scala 207:30]
+ node _T_118 = bits(_T_30, 28, 28) @[el2_lib.scala 204:36]
+ _T_31[15] <= _T_118 @[el2_lib.scala 204:30]
+ node _T_119 = bits(_T_30, 28, 28) @[el2_lib.scala 205:36]
+ _T_32[15] <= _T_119 @[el2_lib.scala 205:30]
+ node _T_120 = bits(_T_30, 28, 28) @[el2_lib.scala 206:36]
+ _T_33[15] <= _T_120 @[el2_lib.scala 206:30]
+ node _T_121 = bits(_T_30, 29, 29) @[el2_lib.scala 205:36]
+ _T_32[16] <= _T_121 @[el2_lib.scala 205:30]
+ node _T_122 = bits(_T_30, 29, 29) @[el2_lib.scala 206:36]
+ _T_33[16] <= _T_122 @[el2_lib.scala 206:30]
+ node _T_123 = bits(_T_30, 30, 30) @[el2_lib.scala 204:36]
+ _T_31[16] <= _T_123 @[el2_lib.scala 204:30]
+ node _T_124 = bits(_T_30, 30, 30) @[el2_lib.scala 206:36]
+ _T_33[17] <= _T_124 @[el2_lib.scala 206:30]
+ node _T_125 = bits(_T_30, 31, 31) @[el2_lib.scala 204:36]
+ _T_31[17] <= _T_125 @[el2_lib.scala 204:30]
+ node _T_126 = bits(_T_30, 31, 31) @[el2_lib.scala 205:36]
+ _T_32[17] <= _T_126 @[el2_lib.scala 205:30]
+ node _T_127 = cat(_T_31[1], _T_31[0]) @[el2_lib.scala 211:22]
+ node _T_128 = cat(_T_31[3], _T_31[2]) @[el2_lib.scala 211:22]
+ node _T_129 = cat(_T_128, _T_127) @[el2_lib.scala 211:22]
+ node _T_130 = cat(_T_31[5], _T_31[4]) @[el2_lib.scala 211:22]
+ node _T_131 = cat(_T_31[8], _T_31[7]) @[el2_lib.scala 211:22]
+ node _T_132 = cat(_T_131, _T_31[6]) @[el2_lib.scala 211:22]
+ node _T_133 = cat(_T_132, _T_130) @[el2_lib.scala 211:22]
+ node _T_134 = cat(_T_133, _T_129) @[el2_lib.scala 211:22]
+ node _T_135 = cat(_T_31[10], _T_31[9]) @[el2_lib.scala 211:22]
+ node _T_136 = cat(_T_31[12], _T_31[11]) @[el2_lib.scala 211:22]
+ node _T_137 = cat(_T_136, _T_135) @[el2_lib.scala 211:22]
+ node _T_138 = cat(_T_31[14], _T_31[13]) @[el2_lib.scala 211:22]
+ node _T_139 = cat(_T_31[17], _T_31[16]) @[el2_lib.scala 211:22]
+ node _T_140 = cat(_T_139, _T_31[15]) @[el2_lib.scala 211:22]
+ node _T_141 = cat(_T_140, _T_138) @[el2_lib.scala 211:22]
+ node _T_142 = cat(_T_141, _T_137) @[el2_lib.scala 211:22]
+ node _T_143 = cat(_T_142, _T_134) @[el2_lib.scala 211:22]
+ node _T_144 = xorr(_T_143) @[el2_lib.scala 211:29]
+ node _T_145 = cat(_T_32[1], _T_32[0]) @[el2_lib.scala 211:39]
+ node _T_146 = cat(_T_32[3], _T_32[2]) @[el2_lib.scala 211:39]
+ node _T_147 = cat(_T_146, _T_145) @[el2_lib.scala 211:39]
+ node _T_148 = cat(_T_32[5], _T_32[4]) @[el2_lib.scala 211:39]
+ node _T_149 = cat(_T_32[8], _T_32[7]) @[el2_lib.scala 211:39]
+ node _T_150 = cat(_T_149, _T_32[6]) @[el2_lib.scala 211:39]
+ node _T_151 = cat(_T_150, _T_148) @[el2_lib.scala 211:39]
+ node _T_152 = cat(_T_151, _T_147) @[el2_lib.scala 211:39]
+ node _T_153 = cat(_T_32[10], _T_32[9]) @[el2_lib.scala 211:39]
+ node _T_154 = cat(_T_32[12], _T_32[11]) @[el2_lib.scala 211:39]
+ node _T_155 = cat(_T_154, _T_153) @[el2_lib.scala 211:39]
+ node _T_156 = cat(_T_32[14], _T_32[13]) @[el2_lib.scala 211:39]
+ node _T_157 = cat(_T_32[17], _T_32[16]) @[el2_lib.scala 211:39]
+ node _T_158 = cat(_T_157, _T_32[15]) @[el2_lib.scala 211:39]
+ node _T_159 = cat(_T_158, _T_156) @[el2_lib.scala 211:39]
+ node _T_160 = cat(_T_159, _T_155) @[el2_lib.scala 211:39]
+ node _T_161 = cat(_T_160, _T_152) @[el2_lib.scala 211:39]
+ node _T_162 = xorr(_T_161) @[el2_lib.scala 211:46]
+ node _T_163 = cat(_T_33[1], _T_33[0]) @[el2_lib.scala 211:56]
+ node _T_164 = cat(_T_33[3], _T_33[2]) @[el2_lib.scala 211:56]
+ node _T_165 = cat(_T_164, _T_163) @[el2_lib.scala 211:56]
+ node _T_166 = cat(_T_33[5], _T_33[4]) @[el2_lib.scala 211:56]
+ node _T_167 = cat(_T_33[8], _T_33[7]) @[el2_lib.scala 211:56]
+ node _T_168 = cat(_T_167, _T_33[6]) @[el2_lib.scala 211:56]
+ node _T_169 = cat(_T_168, _T_166) @[el2_lib.scala 211:56]
+ node _T_170 = cat(_T_169, _T_165) @[el2_lib.scala 211:56]
+ node _T_171 = cat(_T_33[10], _T_33[9]) @[el2_lib.scala 211:56]
+ node _T_172 = cat(_T_33[12], _T_33[11]) @[el2_lib.scala 211:56]
+ node _T_173 = cat(_T_172, _T_171) @[el2_lib.scala 211:56]
+ node _T_174 = cat(_T_33[14], _T_33[13]) @[el2_lib.scala 211:56]
+ node _T_175 = cat(_T_33[17], _T_33[16]) @[el2_lib.scala 211:56]
+ node _T_176 = cat(_T_175, _T_33[15]) @[el2_lib.scala 211:56]
+ node _T_177 = cat(_T_176, _T_174) @[el2_lib.scala 211:56]
+ node _T_178 = cat(_T_177, _T_173) @[el2_lib.scala 211:56]
+ node _T_179 = cat(_T_178, _T_170) @[el2_lib.scala 211:56]
+ node _T_180 = xorr(_T_179) @[el2_lib.scala 211:63]
+ node _T_181 = cat(_T_34[2], _T_34[1]) @[el2_lib.scala 211:73]
+ node _T_182 = cat(_T_181, _T_34[0]) @[el2_lib.scala 211:73]
+ node _T_183 = cat(_T_34[4], _T_34[3]) @[el2_lib.scala 211:73]
+ node _T_184 = cat(_T_34[6], _T_34[5]) @[el2_lib.scala 211:73]
+ node _T_185 = cat(_T_184, _T_183) @[el2_lib.scala 211:73]
+ node _T_186 = cat(_T_185, _T_182) @[el2_lib.scala 211:73]
+ node _T_187 = cat(_T_34[8], _T_34[7]) @[el2_lib.scala 211:73]
+ node _T_188 = cat(_T_34[10], _T_34[9]) @[el2_lib.scala 211:73]
+ node _T_189 = cat(_T_188, _T_187) @[el2_lib.scala 211:73]
+ node _T_190 = cat(_T_34[12], _T_34[11]) @[el2_lib.scala 211:73]
+ node _T_191 = cat(_T_34[14], _T_34[13]) @[el2_lib.scala 211:73]
+ node _T_192 = cat(_T_191, _T_190) @[el2_lib.scala 211:73]
+ node _T_193 = cat(_T_192, _T_189) @[el2_lib.scala 211:73]
+ node _T_194 = cat(_T_193, _T_186) @[el2_lib.scala 211:73]
+ node _T_195 = xorr(_T_194) @[el2_lib.scala 211:80]
+ node _T_196 = cat(_T_35[2], _T_35[1]) @[el2_lib.scala 211:90]
+ node _T_197 = cat(_T_196, _T_35[0]) @[el2_lib.scala 211:90]
+ node _T_198 = cat(_T_35[4], _T_35[3]) @[el2_lib.scala 211:90]
+ node _T_199 = cat(_T_35[6], _T_35[5]) @[el2_lib.scala 211:90]
+ node _T_200 = cat(_T_199, _T_198) @[el2_lib.scala 211:90]
+ node _T_201 = cat(_T_200, _T_197) @[el2_lib.scala 211:90]
+ node _T_202 = cat(_T_35[8], _T_35[7]) @[el2_lib.scala 211:90]
+ node _T_203 = cat(_T_35[10], _T_35[9]) @[el2_lib.scala 211:90]
+ node _T_204 = cat(_T_203, _T_202) @[el2_lib.scala 211:90]
+ node _T_205 = cat(_T_35[12], _T_35[11]) @[el2_lib.scala 211:90]
+ node _T_206 = cat(_T_35[14], _T_35[13]) @[el2_lib.scala 211:90]
+ node _T_207 = cat(_T_206, _T_205) @[el2_lib.scala 211:90]
+ node _T_208 = cat(_T_207, _T_204) @[el2_lib.scala 211:90]
+ node _T_209 = cat(_T_208, _T_201) @[el2_lib.scala 211:90]
+ node _T_210 = xorr(_T_209) @[el2_lib.scala 211:97]
+ node _T_211 = cat(_T_36[2], _T_36[1]) @[el2_lib.scala 211:107]
+ node _T_212 = cat(_T_211, _T_36[0]) @[el2_lib.scala 211:107]
+ node _T_213 = cat(_T_36[5], _T_36[4]) @[el2_lib.scala 211:107]
+ node _T_214 = cat(_T_213, _T_36[3]) @[el2_lib.scala 211:107]
+ node _T_215 = cat(_T_214, _T_212) @[el2_lib.scala 211:107]
+ node _T_216 = xorr(_T_215) @[el2_lib.scala 211:114]
+ node _T_217 = cat(_T_195, _T_210) @[Cat.scala 29:58]
+ node _T_218 = cat(_T_217, _T_216) @[Cat.scala 29:58]
+ node _T_219 = cat(_T_144, _T_162) @[Cat.scala 29:58]
+ node _T_220 = cat(_T_219, _T_180) @[Cat.scala 29:58]
+ node _T_221 = cat(_T_220, _T_218) @[Cat.scala 29:58]
+ node _T_222 = xorr(_T_30) @[el2_lib.scala 212:13]
+ node _T_223 = xorr(_T_221) @[el2_lib.scala 212:23]
+ node _T_224 = xor(_T_222, _T_223) @[el2_lib.scala 212:18]
+ node _T_225 = cat(_T_224, _T_221) @[Cat.scala 29:58]
+ ic_tag_ecc <= _T_225 @[el2_ifu_ic_mem.scala 91:18]
+ node _T_226 = and(io.ic_debug_wr_en, io.ic_debug_tag_array) @[el2_ifu_ic_mem.scala 92:47]
+ node _T_227 = bits(io.ic_debug_wr_data, 68, 64) @[el2_ifu_ic_mem.scala 93:32]
+ node _T_228 = bits(io.ic_debug_wr_data, 31, 11) @[el2_ifu_ic_mem.scala 93:60]
+ node _T_229 = cat(_T_227, _T_228) @[Cat.scala 29:58]
+ node _T_230 = bits(ic_tag_ecc, 4, 0) @[el2_ifu_ic_mem.scala 94:23]
+ node _T_231 = bits(io.ic_rw_addr, 31, 13) @[el2_ifu_ic_mem.scala 94:43]
+ node _T_232 = cat(_T_230, _T_231) @[Cat.scala 29:58]
+ node _T_233 = mux(_T_226, _T_229, _T_232) @[el2_ifu_ic_mem.scala 92:28]
+ ic_tag_wr_data <= _T_233 @[el2_ifu_ic_mem.scala 92:22]
+ skip @[el2_ifu_ic_mem.scala 90:25]
+ else : @[el2_ifu_ic_mem.scala 96:17]
+ node _T_234 = bits(io.ic_rw_addr, 31, 13) @[el2_ifu_ic_mem.scala 97:56]
+ node _T_235 = xorr(_T_234) @[el2_lib.scala 183:13]
+ ic_tag_parity <= _T_235 @[el2_ifu_ic_mem.scala 97:23]
+ node _T_236 = and(io.ic_debug_wr_en, io.ic_debug_tag_array) @[el2_ifu_ic_mem.scala 98:49]
+ node _T_237 = bits(io.ic_debug_wr_data, 68, 64) @[el2_ifu_ic_mem.scala 99:34]
+ node _T_238 = bits(io.ic_debug_wr_data, 31, 11) @[el2_ifu_ic_mem.scala 99:62]
+ node _T_239 = cat(_T_237, _T_238) @[Cat.scala 29:58]
+ node _T_240 = bits(ic_tag_ecc, 4, 0) @[el2_ifu_ic_mem.scala 100:25]
+ node _T_241 = bits(io.ic_rw_addr, 31, 13) @[el2_ifu_ic_mem.scala 100:45]
+ node _T_242 = cat(_T_240, _T_241) @[Cat.scala 29:58]
+ node _T_243 = mux(_T_236, _T_239, _T_242) @[el2_ifu_ic_mem.scala 98:30]
+ ic_tag_wr_data <= _T_243 @[el2_ifu_ic_mem.scala 98:24]
+ skip @[el2_ifu_ic_mem.scala 96:17]
+ skip @[el2_ifu_ic_mem.scala 89:32]
+ else : @[el2_ifu_ic_mem.scala 104:15]
+ when UInt<1>("h01") : @[el2_ifu_ic_mem.scala 105:25]
+ wire _T_244 : UInt<1>[13] @[el2_lib.scala 177:24]
+ _T_244[0] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[1] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[2] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[3] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[4] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[5] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[6] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[7] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[8] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[9] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[10] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[11] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_244[12] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ node _T_245 = cat(_T_244[0], _T_244[1]) @[Cat.scala 29:58]
+ node _T_246 = cat(_T_245, _T_244[2]) @[Cat.scala 29:58]
+ node _T_247 = cat(_T_246, _T_244[3]) @[Cat.scala 29:58]
+ node _T_248 = cat(_T_247, _T_244[4]) @[Cat.scala 29:58]
+ node _T_249 = cat(_T_248, _T_244[5]) @[Cat.scala 29:58]
+ node _T_250 = cat(_T_249, _T_244[6]) @[Cat.scala 29:58]
+ node _T_251 = cat(_T_250, _T_244[7]) @[Cat.scala 29:58]
+ node _T_252 = cat(_T_251, _T_244[8]) @[Cat.scala 29:58]
+ node _T_253 = cat(_T_252, _T_244[9]) @[Cat.scala 29:58]
+ node _T_254 = cat(_T_253, _T_244[10]) @[Cat.scala 29:58]
+ node _T_255 = cat(_T_254, _T_244[11]) @[Cat.scala 29:58]
+ node _T_256 = cat(_T_255, _T_244[12]) @[Cat.scala 29:58]
+ node _T_257 = bits(io.ic_rw_addr, 31, 13) @[el2_ifu_ic_mem.scala 106:79]
+ node _T_258 = cat(_T_256, _T_257) @[Cat.scala 29:58]
+ wire _T_259 : UInt<1>[18] @[el2_lib.scala 193:18]
+ wire _T_260 : UInt<1>[18] @[el2_lib.scala 194:18]
+ wire _T_261 : UInt<1>[18] @[el2_lib.scala 195:18]
+ wire _T_262 : UInt<1>[15] @[el2_lib.scala 196:18]
+ wire _T_263 : UInt<1>[15] @[el2_lib.scala 197:18]
+ wire _T_264 : UInt<1>[6] @[el2_lib.scala 198:18]
+ node _T_265 = bits(_T_258, 0, 0) @[el2_lib.scala 205:36]
+ _T_260[0] <= _T_265 @[el2_lib.scala 205:30]
+ node _T_266 = bits(_T_258, 0, 0) @[el2_lib.scala 206:36]
+ _T_261[0] <= _T_266 @[el2_lib.scala 206:30]
+ node _T_267 = bits(_T_258, 0, 0) @[el2_lib.scala 209:36]
+ _T_264[0] <= _T_267 @[el2_lib.scala 209:30]
+ node _T_268 = bits(_T_258, 1, 1) @[el2_lib.scala 204:36]
+ _T_259[0] <= _T_268 @[el2_lib.scala 204:30]
+ node _T_269 = bits(_T_258, 1, 1) @[el2_lib.scala 206:36]
+ _T_261[1] <= _T_269 @[el2_lib.scala 206:30]
+ node _T_270 = bits(_T_258, 1, 1) @[el2_lib.scala 209:36]
+ _T_264[1] <= _T_270 @[el2_lib.scala 209:30]
+ node _T_271 = bits(_T_258, 2, 2) @[el2_lib.scala 206:36]
+ _T_261[2] <= _T_271 @[el2_lib.scala 206:30]
+ node _T_272 = bits(_T_258, 2, 2) @[el2_lib.scala 209:36]
+ _T_264[2] <= _T_272 @[el2_lib.scala 209:30]
+ node _T_273 = bits(_T_258, 3, 3) @[el2_lib.scala 204:36]
+ _T_259[1] <= _T_273 @[el2_lib.scala 204:30]
+ node _T_274 = bits(_T_258, 3, 3) @[el2_lib.scala 205:36]
+ _T_260[1] <= _T_274 @[el2_lib.scala 205:30]
+ node _T_275 = bits(_T_258, 3, 3) @[el2_lib.scala 209:36]
+ _T_264[3] <= _T_275 @[el2_lib.scala 209:30]
+ node _T_276 = bits(_T_258, 4, 4) @[el2_lib.scala 205:36]
+ _T_260[2] <= _T_276 @[el2_lib.scala 205:30]
+ node _T_277 = bits(_T_258, 4, 4) @[el2_lib.scala 209:36]
+ _T_264[4] <= _T_277 @[el2_lib.scala 209:30]
+ node _T_278 = bits(_T_258, 5, 5) @[el2_lib.scala 204:36]
+ _T_259[2] <= _T_278 @[el2_lib.scala 204:30]
+ node _T_279 = bits(_T_258, 5, 5) @[el2_lib.scala 209:36]
+ _T_264[5] <= _T_279 @[el2_lib.scala 209:30]
+ node _T_280 = bits(_T_258, 6, 6) @[el2_lib.scala 204:36]
+ _T_259[3] <= _T_280 @[el2_lib.scala 204:30]
+ node _T_281 = bits(_T_258, 6, 6) @[el2_lib.scala 205:36]
+ _T_260[3] <= _T_281 @[el2_lib.scala 205:30]
+ node _T_282 = bits(_T_258, 6, 6) @[el2_lib.scala 206:36]
+ _T_261[3] <= _T_282 @[el2_lib.scala 206:30]
+ node _T_283 = bits(_T_258, 6, 6) @[el2_lib.scala 207:36]
+ _T_262[0] <= _T_283 @[el2_lib.scala 207:30]
+ node _T_284 = bits(_T_258, 6, 6) @[el2_lib.scala 208:36]
+ _T_263[0] <= _T_284 @[el2_lib.scala 208:30]
+ node _T_285 = bits(_T_258, 7, 7) @[el2_lib.scala 205:36]
+ _T_260[4] <= _T_285 @[el2_lib.scala 205:30]
+ node _T_286 = bits(_T_258, 7, 7) @[el2_lib.scala 206:36]
+ _T_261[4] <= _T_286 @[el2_lib.scala 206:30]
+ node _T_287 = bits(_T_258, 7, 7) @[el2_lib.scala 207:36]
+ _T_262[1] <= _T_287 @[el2_lib.scala 207:30]
+ node _T_288 = bits(_T_258, 7, 7) @[el2_lib.scala 208:36]
+ _T_263[1] <= _T_288 @[el2_lib.scala 208:30]
+ node _T_289 = bits(_T_258, 8, 8) @[el2_lib.scala 204:36]
+ _T_259[4] <= _T_289 @[el2_lib.scala 204:30]
+ node _T_290 = bits(_T_258, 8, 8) @[el2_lib.scala 206:36]
+ _T_261[5] <= _T_290 @[el2_lib.scala 206:30]
+ node _T_291 = bits(_T_258, 8, 8) @[el2_lib.scala 207:36]
+ _T_262[2] <= _T_291 @[el2_lib.scala 207:30]
+ node _T_292 = bits(_T_258, 8, 8) @[el2_lib.scala 208:36]
+ _T_263[2] <= _T_292 @[el2_lib.scala 208:30]
+ node _T_293 = bits(_T_258, 9, 9) @[el2_lib.scala 206:36]
+ _T_261[6] <= _T_293 @[el2_lib.scala 206:30]
+ node _T_294 = bits(_T_258, 9, 9) @[el2_lib.scala 207:36]
+ _T_262[3] <= _T_294 @[el2_lib.scala 207:30]
+ node _T_295 = bits(_T_258, 9, 9) @[el2_lib.scala 208:36]
+ _T_263[3] <= _T_295 @[el2_lib.scala 208:30]
+ node _T_296 = bits(_T_258, 10, 10) @[el2_lib.scala 204:36]
+ _T_259[5] <= _T_296 @[el2_lib.scala 204:30]
+ node _T_297 = bits(_T_258, 10, 10) @[el2_lib.scala 205:36]
+ _T_260[5] <= _T_297 @[el2_lib.scala 205:30]
+ node _T_298 = bits(_T_258, 10, 10) @[el2_lib.scala 207:36]
+ _T_262[4] <= _T_298 @[el2_lib.scala 207:30]
+ node _T_299 = bits(_T_258, 10, 10) @[el2_lib.scala 208:36]
+ _T_263[4] <= _T_299 @[el2_lib.scala 208:30]
+ node _T_300 = bits(_T_258, 11, 11) @[el2_lib.scala 205:36]
+ _T_260[6] <= _T_300 @[el2_lib.scala 205:30]
+ node _T_301 = bits(_T_258, 11, 11) @[el2_lib.scala 207:36]
+ _T_262[5] <= _T_301 @[el2_lib.scala 207:30]
+ node _T_302 = bits(_T_258, 11, 11) @[el2_lib.scala 208:36]
+ _T_263[5] <= _T_302 @[el2_lib.scala 208:30]
+ node _T_303 = bits(_T_258, 12, 12) @[el2_lib.scala 204:36]
+ _T_259[6] <= _T_303 @[el2_lib.scala 204:30]
+ node _T_304 = bits(_T_258, 12, 12) @[el2_lib.scala 207:36]
+ _T_262[6] <= _T_304 @[el2_lib.scala 207:30]
+ node _T_305 = bits(_T_258, 12, 12) @[el2_lib.scala 208:36]
+ _T_263[6] <= _T_305 @[el2_lib.scala 208:30]
+ node _T_306 = bits(_T_258, 13, 13) @[el2_lib.scala 207:36]
+ _T_262[7] <= _T_306 @[el2_lib.scala 207:30]
+ node _T_307 = bits(_T_258, 13, 13) @[el2_lib.scala 208:36]
+ _T_263[7] <= _T_307 @[el2_lib.scala 208:30]
+ node _T_308 = bits(_T_258, 14, 14) @[el2_lib.scala 204:36]
+ _T_259[7] <= _T_308 @[el2_lib.scala 204:30]
+ node _T_309 = bits(_T_258, 14, 14) @[el2_lib.scala 205:36]
+ _T_260[7] <= _T_309 @[el2_lib.scala 205:30]
+ node _T_310 = bits(_T_258, 14, 14) @[el2_lib.scala 206:36]
+ _T_261[7] <= _T_310 @[el2_lib.scala 206:30]
+ node _T_311 = bits(_T_258, 14, 14) @[el2_lib.scala 208:36]
+ _T_263[8] <= _T_311 @[el2_lib.scala 208:30]
+ node _T_312 = bits(_T_258, 15, 15) @[el2_lib.scala 205:36]
+ _T_260[8] <= _T_312 @[el2_lib.scala 205:30]
+ node _T_313 = bits(_T_258, 15, 15) @[el2_lib.scala 206:36]
+ _T_261[8] <= _T_313 @[el2_lib.scala 206:30]
+ node _T_314 = bits(_T_258, 15, 15) @[el2_lib.scala 208:36]
+ _T_263[9] <= _T_314 @[el2_lib.scala 208:30]
+ node _T_315 = bits(_T_258, 16, 16) @[el2_lib.scala 204:36]
+ _T_259[8] <= _T_315 @[el2_lib.scala 204:30]
+ node _T_316 = bits(_T_258, 16, 16) @[el2_lib.scala 206:36]
+ _T_261[9] <= _T_316 @[el2_lib.scala 206:30]
+ node _T_317 = bits(_T_258, 16, 16) @[el2_lib.scala 208:36]
+ _T_263[10] <= _T_317 @[el2_lib.scala 208:30]
+ node _T_318 = bits(_T_258, 17, 17) @[el2_lib.scala 206:36]
+ _T_261[10] <= _T_318 @[el2_lib.scala 206:30]
+ node _T_319 = bits(_T_258, 17, 17) @[el2_lib.scala 208:36]
+ _T_263[11] <= _T_319 @[el2_lib.scala 208:30]
+ node _T_320 = bits(_T_258, 18, 18) @[el2_lib.scala 204:36]
+ _T_259[9] <= _T_320 @[el2_lib.scala 204:30]
+ node _T_321 = bits(_T_258, 18, 18) @[el2_lib.scala 205:36]
+ _T_260[9] <= _T_321 @[el2_lib.scala 205:30]
+ node _T_322 = bits(_T_258, 18, 18) @[el2_lib.scala 208:36]
+ _T_263[12] <= _T_322 @[el2_lib.scala 208:30]
+ node _T_323 = bits(_T_258, 19, 19) @[el2_lib.scala 205:36]
+ _T_260[10] <= _T_323 @[el2_lib.scala 205:30]
+ node _T_324 = bits(_T_258, 19, 19) @[el2_lib.scala 208:36]
+ _T_263[13] <= _T_324 @[el2_lib.scala 208:30]
+ node _T_325 = bits(_T_258, 20, 20) @[el2_lib.scala 204:36]
+ _T_259[10] <= _T_325 @[el2_lib.scala 204:30]
+ node _T_326 = bits(_T_258, 20, 20) @[el2_lib.scala 208:36]
+ _T_263[14] <= _T_326 @[el2_lib.scala 208:30]
+ node _T_327 = bits(_T_258, 21, 21) @[el2_lib.scala 204:36]
+ _T_259[11] <= _T_327 @[el2_lib.scala 204:30]
+ node _T_328 = bits(_T_258, 21, 21) @[el2_lib.scala 205:36]
+ _T_260[11] <= _T_328 @[el2_lib.scala 205:30]
+ node _T_329 = bits(_T_258, 21, 21) @[el2_lib.scala 206:36]
+ _T_261[11] <= _T_329 @[el2_lib.scala 206:30]
+ node _T_330 = bits(_T_258, 21, 21) @[el2_lib.scala 207:36]
+ _T_262[8] <= _T_330 @[el2_lib.scala 207:30]
+ node _T_331 = bits(_T_258, 22, 22) @[el2_lib.scala 205:36]
+ _T_260[12] <= _T_331 @[el2_lib.scala 205:30]
+ node _T_332 = bits(_T_258, 22, 22) @[el2_lib.scala 206:36]
+ _T_261[12] <= _T_332 @[el2_lib.scala 206:30]
+ node _T_333 = bits(_T_258, 22, 22) @[el2_lib.scala 207:36]
+ _T_262[9] <= _T_333 @[el2_lib.scala 207:30]
+ node _T_334 = bits(_T_258, 23, 23) @[el2_lib.scala 204:36]
+ _T_259[12] <= _T_334 @[el2_lib.scala 204:30]
+ node _T_335 = bits(_T_258, 23, 23) @[el2_lib.scala 206:36]
+ _T_261[13] <= _T_335 @[el2_lib.scala 206:30]
+ node _T_336 = bits(_T_258, 23, 23) @[el2_lib.scala 207:36]
+ _T_262[10] <= _T_336 @[el2_lib.scala 207:30]
+ node _T_337 = bits(_T_258, 24, 24) @[el2_lib.scala 206:36]
+ _T_261[14] <= _T_337 @[el2_lib.scala 206:30]
+ node _T_338 = bits(_T_258, 24, 24) @[el2_lib.scala 207:36]
+ _T_262[11] <= _T_338 @[el2_lib.scala 207:30]
+ node _T_339 = bits(_T_258, 25, 25) @[el2_lib.scala 204:36]
+ _T_259[13] <= _T_339 @[el2_lib.scala 204:30]
+ node _T_340 = bits(_T_258, 25, 25) @[el2_lib.scala 205:36]
+ _T_260[13] <= _T_340 @[el2_lib.scala 205:30]
+ node _T_341 = bits(_T_258, 25, 25) @[el2_lib.scala 207:36]
+ _T_262[12] <= _T_341 @[el2_lib.scala 207:30]
+ node _T_342 = bits(_T_258, 26, 26) @[el2_lib.scala 205:36]
+ _T_260[14] <= _T_342 @[el2_lib.scala 205:30]
+ node _T_343 = bits(_T_258, 26, 26) @[el2_lib.scala 207:36]
+ _T_262[13] <= _T_343 @[el2_lib.scala 207:30]
+ node _T_344 = bits(_T_258, 27, 27) @[el2_lib.scala 204:36]
+ _T_259[14] <= _T_344 @[el2_lib.scala 204:30]
+ node _T_345 = bits(_T_258, 27, 27) @[el2_lib.scala 207:36]
+ _T_262[14] <= _T_345 @[el2_lib.scala 207:30]
+ node _T_346 = bits(_T_258, 28, 28) @[el2_lib.scala 204:36]
+ _T_259[15] <= _T_346 @[el2_lib.scala 204:30]
+ node _T_347 = bits(_T_258, 28, 28) @[el2_lib.scala 205:36]
+ _T_260[15] <= _T_347 @[el2_lib.scala 205:30]
+ node _T_348 = bits(_T_258, 28, 28) @[el2_lib.scala 206:36]
+ _T_261[15] <= _T_348 @[el2_lib.scala 206:30]
+ node _T_349 = bits(_T_258, 29, 29) @[el2_lib.scala 205:36]
+ _T_260[16] <= _T_349 @[el2_lib.scala 205:30]
+ node _T_350 = bits(_T_258, 29, 29) @[el2_lib.scala 206:36]
+ _T_261[16] <= _T_350 @[el2_lib.scala 206:30]
+ node _T_351 = bits(_T_258, 30, 30) @[el2_lib.scala 204:36]
+ _T_259[16] <= _T_351 @[el2_lib.scala 204:30]
+ node _T_352 = bits(_T_258, 30, 30) @[el2_lib.scala 206:36]
+ _T_261[17] <= _T_352 @[el2_lib.scala 206:30]
+ node _T_353 = bits(_T_258, 31, 31) @[el2_lib.scala 204:36]
+ _T_259[17] <= _T_353 @[el2_lib.scala 204:30]
+ node _T_354 = bits(_T_258, 31, 31) @[el2_lib.scala 205:36]
+ _T_260[17] <= _T_354 @[el2_lib.scala 205:30]
+ node _T_355 = cat(_T_259[1], _T_259[0]) @[el2_lib.scala 211:22]
+ node _T_356 = cat(_T_259[3], _T_259[2]) @[el2_lib.scala 211:22]
+ node _T_357 = cat(_T_356, _T_355) @[el2_lib.scala 211:22]
+ node _T_358 = cat(_T_259[5], _T_259[4]) @[el2_lib.scala 211:22]
+ node _T_359 = cat(_T_259[8], _T_259[7]) @[el2_lib.scala 211:22]
+ node _T_360 = cat(_T_359, _T_259[6]) @[el2_lib.scala 211:22]
+ node _T_361 = cat(_T_360, _T_358) @[el2_lib.scala 211:22]
+ node _T_362 = cat(_T_361, _T_357) @[el2_lib.scala 211:22]
+ node _T_363 = cat(_T_259[10], _T_259[9]) @[el2_lib.scala 211:22]
+ node _T_364 = cat(_T_259[12], _T_259[11]) @[el2_lib.scala 211:22]
+ node _T_365 = cat(_T_364, _T_363) @[el2_lib.scala 211:22]
+ node _T_366 = cat(_T_259[14], _T_259[13]) @[el2_lib.scala 211:22]
+ node _T_367 = cat(_T_259[17], _T_259[16]) @[el2_lib.scala 211:22]
+ node _T_368 = cat(_T_367, _T_259[15]) @[el2_lib.scala 211:22]
+ node _T_369 = cat(_T_368, _T_366) @[el2_lib.scala 211:22]
+ node _T_370 = cat(_T_369, _T_365) @[el2_lib.scala 211:22]
+ node _T_371 = cat(_T_370, _T_362) @[el2_lib.scala 211:22]
+ node _T_372 = xorr(_T_371) @[el2_lib.scala 211:29]
+ node _T_373 = cat(_T_260[1], _T_260[0]) @[el2_lib.scala 211:39]
+ node _T_374 = cat(_T_260[3], _T_260[2]) @[el2_lib.scala 211:39]
+ node _T_375 = cat(_T_374, _T_373) @[el2_lib.scala 211:39]
+ node _T_376 = cat(_T_260[5], _T_260[4]) @[el2_lib.scala 211:39]
+ node _T_377 = cat(_T_260[8], _T_260[7]) @[el2_lib.scala 211:39]
+ node _T_378 = cat(_T_377, _T_260[6]) @[el2_lib.scala 211:39]
+ node _T_379 = cat(_T_378, _T_376) @[el2_lib.scala 211:39]
+ node _T_380 = cat(_T_379, _T_375) @[el2_lib.scala 211:39]
+ node _T_381 = cat(_T_260[10], _T_260[9]) @[el2_lib.scala 211:39]
+ node _T_382 = cat(_T_260[12], _T_260[11]) @[el2_lib.scala 211:39]
+ node _T_383 = cat(_T_382, _T_381) @[el2_lib.scala 211:39]
+ node _T_384 = cat(_T_260[14], _T_260[13]) @[el2_lib.scala 211:39]
+ node _T_385 = cat(_T_260[17], _T_260[16]) @[el2_lib.scala 211:39]
+ node _T_386 = cat(_T_385, _T_260[15]) @[el2_lib.scala 211:39]
+ node _T_387 = cat(_T_386, _T_384) @[el2_lib.scala 211:39]
+ node _T_388 = cat(_T_387, _T_383) @[el2_lib.scala 211:39]
+ node _T_389 = cat(_T_388, _T_380) @[el2_lib.scala 211:39]
+ node _T_390 = xorr(_T_389) @[el2_lib.scala 211:46]
+ node _T_391 = cat(_T_261[1], _T_261[0]) @[el2_lib.scala 211:56]
+ node _T_392 = cat(_T_261[3], _T_261[2]) @[el2_lib.scala 211:56]
+ node _T_393 = cat(_T_392, _T_391) @[el2_lib.scala 211:56]
+ node _T_394 = cat(_T_261[5], _T_261[4]) @[el2_lib.scala 211:56]
+ node _T_395 = cat(_T_261[8], _T_261[7]) @[el2_lib.scala 211:56]
+ node _T_396 = cat(_T_395, _T_261[6]) @[el2_lib.scala 211:56]
+ node _T_397 = cat(_T_396, _T_394) @[el2_lib.scala 211:56]
+ node _T_398 = cat(_T_397, _T_393) @[el2_lib.scala 211:56]
+ node _T_399 = cat(_T_261[10], _T_261[9]) @[el2_lib.scala 211:56]
+ node _T_400 = cat(_T_261[12], _T_261[11]) @[el2_lib.scala 211:56]
+ node _T_401 = cat(_T_400, _T_399) @[el2_lib.scala 211:56]
+ node _T_402 = cat(_T_261[14], _T_261[13]) @[el2_lib.scala 211:56]
+ node _T_403 = cat(_T_261[17], _T_261[16]) @[el2_lib.scala 211:56]
+ node _T_404 = cat(_T_403, _T_261[15]) @[el2_lib.scala 211:56]
+ node _T_405 = cat(_T_404, _T_402) @[el2_lib.scala 211:56]
+ node _T_406 = cat(_T_405, _T_401) @[el2_lib.scala 211:56]
+ node _T_407 = cat(_T_406, _T_398) @[el2_lib.scala 211:56]
+ node _T_408 = xorr(_T_407) @[el2_lib.scala 211:63]
+ node _T_409 = cat(_T_262[2], _T_262[1]) @[el2_lib.scala 211:73]
+ node _T_410 = cat(_T_409, _T_262[0]) @[el2_lib.scala 211:73]
+ node _T_411 = cat(_T_262[4], _T_262[3]) @[el2_lib.scala 211:73]
+ node _T_412 = cat(_T_262[6], _T_262[5]) @[el2_lib.scala 211:73]
+ node _T_413 = cat(_T_412, _T_411) @[el2_lib.scala 211:73]
+ node _T_414 = cat(_T_413, _T_410) @[el2_lib.scala 211:73]
+ node _T_415 = cat(_T_262[8], _T_262[7]) @[el2_lib.scala 211:73]
+ node _T_416 = cat(_T_262[10], _T_262[9]) @[el2_lib.scala 211:73]
+ node _T_417 = cat(_T_416, _T_415) @[el2_lib.scala 211:73]
+ node _T_418 = cat(_T_262[12], _T_262[11]) @[el2_lib.scala 211:73]
+ node _T_419 = cat(_T_262[14], _T_262[13]) @[el2_lib.scala 211:73]
+ node _T_420 = cat(_T_419, _T_418) @[el2_lib.scala 211:73]
+ node _T_421 = cat(_T_420, _T_417) @[el2_lib.scala 211:73]
+ node _T_422 = cat(_T_421, _T_414) @[el2_lib.scala 211:73]
+ node _T_423 = xorr(_T_422) @[el2_lib.scala 211:80]
+ node _T_424 = cat(_T_263[2], _T_263[1]) @[el2_lib.scala 211:90]
+ node _T_425 = cat(_T_424, _T_263[0]) @[el2_lib.scala 211:90]
+ node _T_426 = cat(_T_263[4], _T_263[3]) @[el2_lib.scala 211:90]
+ node _T_427 = cat(_T_263[6], _T_263[5]) @[el2_lib.scala 211:90]
+ node _T_428 = cat(_T_427, _T_426) @[el2_lib.scala 211:90]
+ node _T_429 = cat(_T_428, _T_425) @[el2_lib.scala 211:90]
+ node _T_430 = cat(_T_263[8], _T_263[7]) @[el2_lib.scala 211:90]
+ node _T_431 = cat(_T_263[10], _T_263[9]) @[el2_lib.scala 211:90]
+ node _T_432 = cat(_T_431, _T_430) @[el2_lib.scala 211:90]
+ node _T_433 = cat(_T_263[12], _T_263[11]) @[el2_lib.scala 211:90]
+ node _T_434 = cat(_T_263[14], _T_263[13]) @[el2_lib.scala 211:90]
+ node _T_435 = cat(_T_434, _T_433) @[el2_lib.scala 211:90]
+ node _T_436 = cat(_T_435, _T_432) @[el2_lib.scala 211:90]
+ node _T_437 = cat(_T_436, _T_429) @[el2_lib.scala 211:90]
+ node _T_438 = xorr(_T_437) @[el2_lib.scala 211:97]
+ node _T_439 = cat(_T_264[2], _T_264[1]) @[el2_lib.scala 211:107]
+ node _T_440 = cat(_T_439, _T_264[0]) @[el2_lib.scala 211:107]
+ node _T_441 = cat(_T_264[5], _T_264[4]) @[el2_lib.scala 211:107]
+ node _T_442 = cat(_T_441, _T_264[3]) @[el2_lib.scala 211:107]
+ node _T_443 = cat(_T_442, _T_440) @[el2_lib.scala 211:107]
+ node _T_444 = xorr(_T_443) @[el2_lib.scala 211:114]
+ node _T_445 = cat(_T_423, _T_438) @[Cat.scala 29:58]
+ node _T_446 = cat(_T_445, _T_444) @[Cat.scala 29:58]
+ node _T_447 = cat(_T_372, _T_390) @[Cat.scala 29:58]
+ node _T_448 = cat(_T_447, _T_408) @[Cat.scala 29:58]
+ node _T_449 = cat(_T_448, _T_446) @[Cat.scala 29:58]
+ node _T_450 = xorr(_T_258) @[el2_lib.scala 212:13]
+ node _T_451 = xorr(_T_449) @[el2_lib.scala 212:23]
+ node _T_452 = xor(_T_450, _T_451) @[el2_lib.scala 212:18]
+ node _T_453 = cat(_T_452, _T_449) @[Cat.scala 29:58]
+ ic_tag_ecc <= _T_453 @[el2_ifu_ic_mem.scala 106:20]
+ node _T_454 = and(io.ic_debug_wr_en, io.ic_debug_tag_array) @[el2_ifu_ic_mem.scala 107:49]
+ node _T_455 = bits(io.ic_debug_wr_data, 68, 64) @[el2_ifu_ic_mem.scala 108:34]
+ node _T_456 = bits(io.ic_debug_wr_data, 31, 11) @[el2_ifu_ic_mem.scala 108:62]
+ node _T_457 = cat(_T_455, _T_456) @[Cat.scala 29:58]
+ node _T_458 = bits(ic_tag_ecc, 4, 0) @[el2_ifu_ic_mem.scala 109:25]
+ wire _T_459 : UInt<1>[2] @[el2_lib.scala 177:24]
+ _T_459[0] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_459[1] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ node _T_460 = cat(_T_459[0], _T_459[1]) @[Cat.scala 29:58]
+ node _T_461 = bits(io.ic_rw_addr, 31, 13) @[el2_ifu_ic_mem.scala 109:65]
+ node _T_462 = cat(_T_458, _T_460) @[Cat.scala 29:58]
+ node _T_463 = cat(_T_462, _T_461) @[Cat.scala 29:58]
+ node _T_464 = mux(_T_454, _T_457, _T_463) @[el2_ifu_ic_mem.scala 107:30]
+ ic_tag_wr_data <= _T_464 @[el2_ifu_ic_mem.scala 107:24]
+ skip @[el2_ifu_ic_mem.scala 105:25]
+ else : @[el2_ifu_ic_mem.scala 111:19]
+ node _T_465 = bits(io.ic_rw_addr, 31, 13) @[el2_ifu_ic_mem.scala 112:58]
+ node _T_466 = xorr(_T_465) @[el2_lib.scala 183:13]
+ ic_tag_parity <= _T_466 @[el2_ifu_ic_mem.scala 112:25]
+ node _T_467 = and(io.ic_debug_wr_en, io.ic_debug_tag_array) @[el2_ifu_ic_mem.scala 113:51]
+ node _T_468 = bits(io.ic_debug_wr_data, 68, 64) @[el2_ifu_ic_mem.scala 114:36]
+ node _T_469 = bits(io.ic_debug_wr_data, 31, 11) @[el2_ifu_ic_mem.scala 114:64]
+ node _T_470 = cat(_T_468, _T_469) @[Cat.scala 29:58]
+ node _T_471 = bits(ic_tag_ecc, 4, 0) @[el2_ifu_ic_mem.scala 115:27]
+ wire _T_472 : UInt<1>[2] @[el2_lib.scala 177:24]
+ _T_472[0] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ _T_472[1] <= UInt<1>("h00") @[el2_lib.scala 177:24]
+ node _T_473 = cat(_T_472[0], _T_472[1]) @[Cat.scala 29:58]
+ node _T_474 = bits(io.ic_rw_addr, 31, 13) @[el2_ifu_ic_mem.scala 115:67]
+ node _T_475 = cat(_T_471, _T_473) @[Cat.scala 29:58]
+ node _T_476 = cat(_T_475, _T_474) @[Cat.scala 29:58]
+ node _T_477 = mux(_T_467, _T_470, _T_476) @[el2_ifu_ic_mem.scala 113:32]
+ ic_tag_wr_data <= _T_477 @[el2_ifu_ic_mem.scala 113:26]
+ skip @[el2_ifu_ic_mem.scala 111:19]
+ skip @[el2_ifu_ic_mem.scala 104:15]
+ node _T_478 = or(io.ic_debug_rd_en, io.ic_debug_wr_en) @[el2_ifu_ic_mem.scala 119:44]
+ node _T_479 = bits(io.ic_debug_addr, 12, 6) @[el2_ifu_ic_mem.scala 120:21]
+ node _T_480 = bits(io.ic_rw_addr, 12, 6) @[el2_ifu_ic_mem.scala 121:18]
+ node ic_rw_addr_q = mux(_T_478, _T_479, _T_480) @[el2_ifu_ic_mem.scala 119:25]
+ reg ic_debug_rd_way_en_ff : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_ic_mem.scala 123:38]
+ ic_debug_rd_way_en_ff <= ic_debug_rd_way_en @[el2_ifu_ic_mem.scala 123:38]
+ smem ic_way_tag : UInt<26>[2][128], undefined @[el2_ifu_ic_mem.scala 125:46]
+ wire write_data : UInt<26>[2] @[el2_ifu_ic_mem.scala 129:53]
+ write_data[0] <= ic_tag_wr_data @[el2_ifu_ic_mem.scala 129:53]
+ write_data[1] <= ic_tag_wr_data @[el2_ifu_ic_mem.scala 129:53]
+ node _T_481 = bits(ic_tag_wren_q, 0, 0) @[el2_ifu_ic_mem.scala 131:70]
+ node _T_482 = bits(ic_tag_clken, 0, 0) @[el2_ifu_ic_mem.scala 131:88]
+ node _T_483 = and(_T_481, _T_482) @[el2_ifu_ic_mem.scala 131:74]
+ node _T_484 = bits(ic_tag_wren_q, 1, 1) @[el2_ifu_ic_mem.scala 131:70]
+ node _T_485 = bits(ic_tag_clken, 1, 1) @[el2_ifu_ic_mem.scala 131:88]
+ node _T_486 = and(_T_484, _T_485) @[el2_ifu_ic_mem.scala 131:74]
+ wire mem_mask : UInt<1>[2] @[el2_ifu_ic_mem.scala 131:51]
+ mem_mask[0] <= _T_483 @[el2_ifu_ic_mem.scala 131:51]
+ mem_mask[1] <= _T_486 @[el2_ifu_ic_mem.scala 131:51]
+ write mport _T_487 = ic_way_tag[ic_rw_addr_q], clock
+ when mem_mask[0] :
+ _T_487[0] <= write_data[0]
+ skip
+ when mem_mask[1] :
+ _T_487[1] <= write_data[1]
+ skip
+ wire _T_488 : UInt @[el2_ifu_ic_mem.scala 135:40]
+ _T_488 is invalid @[el2_ifu_ic_mem.scala 135:40]
+ when UInt<1>("h01") : @[el2_ifu_ic_mem.scala 135:40]
+ _T_488 <= ic_rw_addr_q @[el2_ifu_ic_mem.scala 135:40]
+ node _T_489 = or(_T_488, UInt<7>("h00")) @[el2_ifu_ic_mem.scala 135:40]
+ node _T_490 = bits(_T_489, 6, 0) @[el2_ifu_ic_mem.scala 135:40]
+ read mport ic_tag_data_raw = ic_way_tag[_T_490], clock @[el2_ifu_ic_mem.scala 135:40]
+ skip @[el2_ifu_ic_mem.scala 135:40]
+ node _T_491 = bits(ic_tag_data_raw[0], 0, 0)
+ node _T_492 = bits(ic_tag_data_raw[_T_491], 25, 21) @[el2_ifu_ic_mem.scala 137:75]
+ node _T_493 = bits(ic_tag_data_raw[0], 0, 0)
+ node _T_494 = bits(ic_tag_data_raw[_T_493], 18, 0) @[el2_ifu_ic_mem.scala 137:101]
+ node _T_495 = cat(_T_492, _T_494) @[Cat.scala 29:58]
+ node w_tout_0 = cat(_T_495, UInt<13>("h00")) @[Cat.scala 29:58]
+ node _T_496 = bits(ic_tag_data_raw[1], 0, 0)
+ node _T_497 = bits(ic_tag_data_raw[_T_496], 25, 21) @[el2_ifu_ic_mem.scala 137:75]
+ node _T_498 = bits(ic_tag_data_raw[1], 0, 0)
+ node _T_499 = bits(ic_tag_data_raw[_T_498], 18, 0) @[el2_ifu_ic_mem.scala 137:101]
+ node _T_500 = cat(_T_497, _T_499) @[Cat.scala 29:58]
+ node w_tout_1 = cat(_T_500, UInt<13>("h00")) @[Cat.scala 29:58]
+ wire ic_tag_corrected_data_unc : UInt<32>[2] @[el2_ifu_ic_mem.scala 142:39]
+ wire ic_tag_corrected_ecc_unc : UInt<7>[2] @[el2_ifu_ic_mem.scala 143:38]
+ wire ic_tag_single_ecc_error : UInt<1>[2] @[el2_ifu_ic_mem.scala 144:37]
+ wire ic_tag_double_ecc_error : UInt<1>[2] @[el2_ifu_ic_mem.scala 145:37]
+ node _T_501 = bits(w_tout_0, 31, 13) @[el2_ifu_ic_mem.scala 147:92]
+ node _T_502 = bits(w_tout_0, 31, 31) @[el2_ifu_ic_mem.scala 147:120]
+ node _T_503 = xorr(_T_501) @[el2_lib.scala 180:14]
+ node _T_504 = xor(_T_503, _T_502) @[el2_lib.scala 180:27]
+ node _T_505 = bits(w_tout_1, 31, 13) @[el2_ifu_ic_mem.scala 147:92]
+ node _T_506 = bits(w_tout_1, 31, 31) @[el2_ifu_ic_mem.scala 147:120]
+ node _T_507 = xorr(_T_505) @[el2_lib.scala 180:14]
+ node _T_508 = xor(_T_507, _T_506) @[el2_lib.scala 180:27]
+ wire ic_tag_way_perr : UInt<1>[2] @[el2_ifu_ic_mem.scala 147:58]
+ ic_tag_way_perr[0] <= _T_504 @[el2_ifu_ic_mem.scala 147:58]
+ ic_tag_way_perr[1] <= _T_508 @[el2_ifu_ic_mem.scala 147:58]
+ inst rvecc_decode of rvecc_decode @[el2_ifu_ic_mem.scala 149:27]
+ rvecc_decode.clock <= clock
+ rvecc_decode.reset <= reset
+ node _T_509 = not(io.dec_tlu_core_ecc_disable) @[el2_ifu_ic_mem.scala 150:28]
+ node _T_510 = and(_T_509, ic_rd_en_ff) @[el2_ifu_ic_mem.scala 150:57]
+ rvecc_decode.io.en <= _T_510 @[el2_ifu_ic_mem.scala 150:25]
+ rvecc_decode.io.sed_ded <= UInt<1>("h01") @[el2_ifu_ic_mem.scala 151:30]
+ node _T_511 = bits(ic_tag_data_raw[0], 20, 0) @[el2_ifu_ic_mem.scala 152:61]
+ node _T_512 = cat(UInt<11>("h00"), _T_511) @[Cat.scala 29:58]
+ rvecc_decode.io.din <= _T_512 @[el2_ifu_ic_mem.scala 152:26]
+ node _T_513 = bits(ic_tag_data_raw[0], 25, 21) @[el2_ifu_ic_mem.scala 153:63]
+ node _T_514 = cat(UInt<2>("h00"), _T_513) @[Cat.scala 29:58]
+ rvecc_decode.io.ecc_in <= _T_514 @[el2_ifu_ic_mem.scala 153:29]
+ ic_tag_corrected_data_unc[0] <= io.test_ecc_data_out[0] @[el2_ifu_ic_mem.scala 155:31]
+ ic_tag_corrected_data_unc[1] <= io.test_ecc_data_out[1] @[el2_ifu_ic_mem.scala 155:31]
+ ic_tag_corrected_ecc_unc[0] <= io.test_ecc_out[0] @[el2_ifu_ic_mem.scala 156:30]
+ ic_tag_corrected_ecc_unc[1] <= io.test_ecc_out[1] @[el2_ifu_ic_mem.scala 156:30]
+ ic_tag_single_ecc_error[0] <= io.test_ecc_sb_out[0] @[el2_ifu_ic_mem.scala 157:29]
+ ic_tag_single_ecc_error[1] <= io.test_ecc_sb_out[1] @[el2_ifu_ic_mem.scala 157:29]
+ ic_tag_double_ecc_error[0] <= io.test_ecc_db_out[0] @[el2_ifu_ic_mem.scala 158:29]
+ ic_tag_double_ecc_error[1] <= io.test_ecc_db_out[1] @[el2_ifu_ic_mem.scala 158:29]
+ io.test_ecc_data_out[0] <= rvecc_decode.io.dout @[el2_ifu_ic_mem.scala 160:29]
+ io.test_ecc_out[0] <= rvecc_decode.io.ecc_out @[el2_ifu_ic_mem.scala 161:24]
+ io.test_ecc_sb_out[0] <= rvecc_decode.io.single_ecc_error @[el2_ifu_ic_mem.scala 162:27]
+ io.test_ecc_db_out[0] <= rvecc_decode.io.double_ecc_error @[el2_ifu_ic_mem.scala 163:27]
+ node _T_515 = or(ic_tag_single_ecc_error[0], ic_tag_double_ecc_error[0]) @[el2_ifu_ic_mem.scala 165:54]
+ ic_tag_way_perr[0] <= _T_515 @[el2_ifu_ic_mem.scala 165:24]
+ inst rvecc_decode_1 of rvecc_decode_1 @[el2_ifu_ic_mem.scala 149:27]
+ rvecc_decode_1.clock <= clock
+ rvecc_decode_1.reset <= reset
+ node _T_516 = not(io.dec_tlu_core_ecc_disable) @[el2_ifu_ic_mem.scala 150:28]
+ node _T_517 = and(_T_516, ic_rd_en_ff) @[el2_ifu_ic_mem.scala 150:57]
+ rvecc_decode_1.io.en <= _T_517 @[el2_ifu_ic_mem.scala 150:25]
+ rvecc_decode_1.io.sed_ded <= UInt<1>("h01") @[el2_ifu_ic_mem.scala 151:30]
+ node _T_518 = bits(ic_tag_data_raw[1], 20, 0) @[el2_ifu_ic_mem.scala 152:61]
+ node _T_519 = cat(UInt<11>("h00"), _T_518) @[Cat.scala 29:58]
+ rvecc_decode_1.io.din <= _T_519 @[el2_ifu_ic_mem.scala 152:26]
+ node _T_520 = bits(ic_tag_data_raw[1], 25, 21) @[el2_ifu_ic_mem.scala 153:63]
+ node _T_521 = cat(UInt<2>("h00"), _T_520) @[Cat.scala 29:58]
+ rvecc_decode_1.io.ecc_in <= _T_521 @[el2_ifu_ic_mem.scala 153:29]
+ ic_tag_corrected_data_unc[0] <= io.test_ecc_data_out[0] @[el2_ifu_ic_mem.scala 155:31]
+ ic_tag_corrected_data_unc[1] <= io.test_ecc_data_out[1] @[el2_ifu_ic_mem.scala 155:31]
+ ic_tag_corrected_ecc_unc[0] <= io.test_ecc_out[0] @[el2_ifu_ic_mem.scala 156:30]
+ ic_tag_corrected_ecc_unc[1] <= io.test_ecc_out[1] @[el2_ifu_ic_mem.scala 156:30]
+ ic_tag_single_ecc_error[0] <= io.test_ecc_sb_out[0] @[el2_ifu_ic_mem.scala 157:29]
+ ic_tag_single_ecc_error[1] <= io.test_ecc_sb_out[1] @[el2_ifu_ic_mem.scala 157:29]
+ ic_tag_double_ecc_error[0] <= io.test_ecc_db_out[0] @[el2_ifu_ic_mem.scala 158:29]
+ ic_tag_double_ecc_error[1] <= io.test_ecc_db_out[1] @[el2_ifu_ic_mem.scala 158:29]
+ io.test_ecc_data_out[1] <= rvecc_decode_1.io.dout @[el2_ifu_ic_mem.scala 160:29]
+ io.test_ecc_out[1] <= rvecc_decode_1.io.ecc_out @[el2_ifu_ic_mem.scala 161:24]
+ io.test_ecc_sb_out[1] <= rvecc_decode_1.io.single_ecc_error @[el2_ifu_ic_mem.scala 162:27]
+ io.test_ecc_db_out[1] <= rvecc_decode_1.io.double_ecc_error @[el2_ifu_ic_mem.scala 163:27]
+ node _T_522 = or(ic_tag_single_ecc_error[1], ic_tag_double_ecc_error[1]) @[el2_ifu_ic_mem.scala 165:54]
+ ic_tag_way_perr[1] <= _T_522 @[el2_ifu_ic_mem.scala 165:24]
+ node _T_523 = bits(ic_debug_rd_way_en_ff, 0, 0) @[el2_ifu_ic_mem.scala 168:71]
+ wire _T_524 : UInt<1>[26] @[el2_lib.scala 177:24]
+ _T_524[0] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[1] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[2] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[3] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[4] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[5] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[6] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[7] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[8] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[9] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[10] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[11] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[12] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[13] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[14] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[15] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[16] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[17] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[18] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[19] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[20] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[21] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[22] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[23] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[24] <= _T_523 @[el2_lib.scala 177:24]
+ _T_524[25] <= _T_523 @[el2_lib.scala 177:24]
+ node _T_525 = cat(_T_524[0], _T_524[1]) @[Cat.scala 29:58]
+ node _T_526 = cat(_T_525, _T_524[2]) @[Cat.scala 29:58]
+ node _T_527 = cat(_T_526, _T_524[3]) @[Cat.scala 29:58]
+ node _T_528 = cat(_T_527, _T_524[4]) @[Cat.scala 29:58]
+ node _T_529 = cat(_T_528, _T_524[5]) @[Cat.scala 29:58]
+ node _T_530 = cat(_T_529, _T_524[6]) @[Cat.scala 29:58]
+ node _T_531 = cat(_T_530, _T_524[7]) @[Cat.scala 29:58]
+ node _T_532 = cat(_T_531, _T_524[8]) @[Cat.scala 29:58]
+ node _T_533 = cat(_T_532, _T_524[9]) @[Cat.scala 29:58]
+ node _T_534 = cat(_T_533, _T_524[10]) @[Cat.scala 29:58]
+ node _T_535 = cat(_T_534, _T_524[11]) @[Cat.scala 29:58]
+ node _T_536 = cat(_T_535, _T_524[12]) @[Cat.scala 29:58]
+ node _T_537 = cat(_T_536, _T_524[13]) @[Cat.scala 29:58]
+ node _T_538 = cat(_T_537, _T_524[14]) @[Cat.scala 29:58]
+ node _T_539 = cat(_T_538, _T_524[15]) @[Cat.scala 29:58]
+ node _T_540 = cat(_T_539, _T_524[16]) @[Cat.scala 29:58]
+ node _T_541 = cat(_T_540, _T_524[17]) @[Cat.scala 29:58]
+ node _T_542 = cat(_T_541, _T_524[18]) @[Cat.scala 29:58]
+ node _T_543 = cat(_T_542, _T_524[19]) @[Cat.scala 29:58]
+ node _T_544 = cat(_T_543, _T_524[20]) @[Cat.scala 29:58]
+ node _T_545 = cat(_T_544, _T_524[21]) @[Cat.scala 29:58]
+ node _T_546 = cat(_T_545, _T_524[22]) @[Cat.scala 29:58]
+ node _T_547 = cat(_T_546, _T_524[23]) @[Cat.scala 29:58]
+ node _T_548 = cat(_T_547, _T_524[24]) @[Cat.scala 29:58]
+ node _T_549 = cat(_T_548, _T_524[25]) @[Cat.scala 29:58]
+ node _T_550 = and(_T_549, ic_tag_data_raw[0]) @[el2_ifu_ic_mem.scala 168:75]
+ node _T_551 = bits(ic_debug_rd_way_en_ff, 1, 1) @[el2_ifu_ic_mem.scala 168:71]
+ wire _T_552 : UInt<1>[26] @[el2_lib.scala 177:24]
+ _T_552[0] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[1] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[2] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[3] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[4] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[5] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[6] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[7] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[8] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[9] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[10] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[11] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[12] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[13] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[14] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[15] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[16] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[17] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[18] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[19] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[20] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[21] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[22] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[23] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[24] <= _T_551 @[el2_lib.scala 177:24]
+ _T_552[25] <= _T_551 @[el2_lib.scala 177:24]
+ node _T_553 = cat(_T_552[0], _T_552[1]) @[Cat.scala 29:58]
+ node _T_554 = cat(_T_553, _T_552[2]) @[Cat.scala 29:58]
+ node _T_555 = cat(_T_554, _T_552[3]) @[Cat.scala 29:58]
+ node _T_556 = cat(_T_555, _T_552[4]) @[Cat.scala 29:58]
+ node _T_557 = cat(_T_556, _T_552[5]) @[Cat.scala 29:58]
+ node _T_558 = cat(_T_557, _T_552[6]) @[Cat.scala 29:58]
+ node _T_559 = cat(_T_558, _T_552[7]) @[Cat.scala 29:58]
+ node _T_560 = cat(_T_559, _T_552[8]) @[Cat.scala 29:58]
+ node _T_561 = cat(_T_560, _T_552[9]) @[Cat.scala 29:58]
+ node _T_562 = cat(_T_561, _T_552[10]) @[Cat.scala 29:58]
+ node _T_563 = cat(_T_562, _T_552[11]) @[Cat.scala 29:58]
+ node _T_564 = cat(_T_563, _T_552[12]) @[Cat.scala 29:58]
+ node _T_565 = cat(_T_564, _T_552[13]) @[Cat.scala 29:58]
+ node _T_566 = cat(_T_565, _T_552[14]) @[Cat.scala 29:58]
+ node _T_567 = cat(_T_566, _T_552[15]) @[Cat.scala 29:58]
+ node _T_568 = cat(_T_567, _T_552[16]) @[Cat.scala 29:58]
+ node _T_569 = cat(_T_568, _T_552[17]) @[Cat.scala 29:58]
+ node _T_570 = cat(_T_569, _T_552[18]) @[Cat.scala 29:58]
+ node _T_571 = cat(_T_570, _T_552[19]) @[Cat.scala 29:58]
+ node _T_572 = cat(_T_571, _T_552[20]) @[Cat.scala 29:58]
+ node _T_573 = cat(_T_572, _T_552[21]) @[Cat.scala 29:58]
+ node _T_574 = cat(_T_573, _T_552[22]) @[Cat.scala 29:58]
+ node _T_575 = cat(_T_574, _T_552[23]) @[Cat.scala 29:58]
+ node _T_576 = cat(_T_575, _T_552[24]) @[Cat.scala 29:58]
+ node _T_577 = cat(_T_576, _T_552[25]) @[Cat.scala 29:58]
+ node _T_578 = and(_T_577, ic_tag_data_raw[1]) @[el2_ifu_ic_mem.scala 168:75]
+ wire _T_579 : UInt<26>[2] @[el2_ifu_ic_mem.scala 168:38]
+ _T_579[0] <= _T_550 @[el2_ifu_ic_mem.scala 168:38]
+ _T_579[1] <= _T_578 @[el2_ifu_ic_mem.scala 168:38]
+ node temp = or(_T_579[0], _T_579[1]) @[el2_ifu_ic_mem.scala 168:104]
+ node _T_580 = bits(ic_debug_rd_way_en_ff, 0, 0) @[el2_ifu_ic_mem.scala 173:36]
+ wire _T_581 : UInt<1>[26] @[el2_lib.scala 177:24]
+ _T_581[0] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[1] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[2] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[3] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[4] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[5] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[6] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[7] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[8] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[9] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[10] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[11] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[12] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[13] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[14] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[15] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[16] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[17] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[18] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[19] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[20] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[21] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[22] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[23] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[24] <= _T_580 @[el2_lib.scala 177:24]
+ _T_581[25] <= _T_580 @[el2_lib.scala 177:24]
+ node _T_582 = cat(_T_581[0], _T_581[1]) @[Cat.scala 29:58]
+ node _T_583 = cat(_T_582, _T_581[2]) @[Cat.scala 29:58]
+ node _T_584 = cat(_T_583, _T_581[3]) @[Cat.scala 29:58]
+ node _T_585 = cat(_T_584, _T_581[4]) @[Cat.scala 29:58]
+ node _T_586 = cat(_T_585, _T_581[5]) @[Cat.scala 29:58]
+ node _T_587 = cat(_T_586, _T_581[6]) @[Cat.scala 29:58]
+ node _T_588 = cat(_T_587, _T_581[7]) @[Cat.scala 29:58]
+ node _T_589 = cat(_T_588, _T_581[8]) @[Cat.scala 29:58]
+ node _T_590 = cat(_T_589, _T_581[9]) @[Cat.scala 29:58]
+ node _T_591 = cat(_T_590, _T_581[10]) @[Cat.scala 29:58]
+ node _T_592 = cat(_T_591, _T_581[11]) @[Cat.scala 29:58]
+ node _T_593 = cat(_T_592, _T_581[12]) @[Cat.scala 29:58]
+ node _T_594 = cat(_T_593, _T_581[13]) @[Cat.scala 29:58]
+ node _T_595 = cat(_T_594, _T_581[14]) @[Cat.scala 29:58]
+ node _T_596 = cat(_T_595, _T_581[15]) @[Cat.scala 29:58]
+ node _T_597 = cat(_T_596, _T_581[16]) @[Cat.scala 29:58]
+ node _T_598 = cat(_T_597, _T_581[17]) @[Cat.scala 29:58]
+ node _T_599 = cat(_T_598, _T_581[18]) @[Cat.scala 29:58]
+ node _T_600 = cat(_T_599, _T_581[19]) @[Cat.scala 29:58]
+ node _T_601 = cat(_T_600, _T_581[20]) @[Cat.scala 29:58]
+ node _T_602 = cat(_T_601, _T_581[21]) @[Cat.scala 29:58]
+ node _T_603 = cat(_T_602, _T_581[22]) @[Cat.scala 29:58]
+ node _T_604 = cat(_T_603, _T_581[23]) @[Cat.scala 29:58]
+ node _T_605 = cat(_T_604, _T_581[24]) @[Cat.scala 29:58]
+ node _T_606 = cat(_T_605, _T_581[25]) @[Cat.scala 29:58]
+ node _T_607 = and(_T_606, ic_tag_data_raw[0]) @[el2_ifu_ic_mem.scala 173:40]
+ node _T_608 = bits(ic_debug_rd_way_en_ff, 1, 1) @[el2_ifu_ic_mem.scala 173:36]
+ wire _T_609 : UInt<1>[26] @[el2_lib.scala 177:24]
+ _T_609[0] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[1] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[2] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[3] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[4] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[5] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[6] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[7] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[8] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[9] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[10] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[11] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[12] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[13] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[14] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[15] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[16] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[17] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[18] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[19] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[20] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[21] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[22] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[23] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[24] <= _T_608 @[el2_lib.scala 177:24]
+ _T_609[25] <= _T_608 @[el2_lib.scala 177:24]
+ node _T_610 = cat(_T_609[0], _T_609[1]) @[Cat.scala 29:58]
+ node _T_611 = cat(_T_610, _T_609[2]) @[Cat.scala 29:58]
+ node _T_612 = cat(_T_611, _T_609[3]) @[Cat.scala 29:58]
+ node _T_613 = cat(_T_612, _T_609[4]) @[Cat.scala 29:58]
+ node _T_614 = cat(_T_613, _T_609[5]) @[Cat.scala 29:58]
+ node _T_615 = cat(_T_614, _T_609[6]) @[Cat.scala 29:58]
+ node _T_616 = cat(_T_615, _T_609[7]) @[Cat.scala 29:58]
+ node _T_617 = cat(_T_616, _T_609[8]) @[Cat.scala 29:58]
+ node _T_618 = cat(_T_617, _T_609[9]) @[Cat.scala 29:58]
+ node _T_619 = cat(_T_618, _T_609[10]) @[Cat.scala 29:58]
+ node _T_620 = cat(_T_619, _T_609[11]) @[Cat.scala 29:58]
+ node _T_621 = cat(_T_620, _T_609[12]) @[Cat.scala 29:58]
+ node _T_622 = cat(_T_621, _T_609[13]) @[Cat.scala 29:58]
+ node _T_623 = cat(_T_622, _T_609[14]) @[Cat.scala 29:58]
+ node _T_624 = cat(_T_623, _T_609[15]) @[Cat.scala 29:58]
+ node _T_625 = cat(_T_624, _T_609[16]) @[Cat.scala 29:58]
+ node _T_626 = cat(_T_625, _T_609[17]) @[Cat.scala 29:58]
+ node _T_627 = cat(_T_626, _T_609[18]) @[Cat.scala 29:58]
+ node _T_628 = cat(_T_627, _T_609[19]) @[Cat.scala 29:58]
+ node _T_629 = cat(_T_628, _T_609[20]) @[Cat.scala 29:58]
+ node _T_630 = cat(_T_629, _T_609[21]) @[Cat.scala 29:58]
+ node _T_631 = cat(_T_630, _T_609[22]) @[Cat.scala 29:58]
+ node _T_632 = cat(_T_631, _T_609[23]) @[Cat.scala 29:58]
+ node _T_633 = cat(_T_632, _T_609[24]) @[Cat.scala 29:58]
+ node _T_634 = cat(_T_633, _T_609[25]) @[Cat.scala 29:58]
+ node _T_635 = and(_T_634, ic_tag_data_raw[1]) @[el2_ifu_ic_mem.scala 173:40]
+ io.ictag_debug_rd_data <= temp @[el2_ifu_ic_mem.scala 175:26]
+ node _T_636 = and(w_tout_0, w_tout_1) @[el2_ifu_ic_mem.scala 176:31]
+ io.test <= _T_636 @[el2_ifu_ic_mem.scala 176:13]
+ node _T_637 = cat(ic_tag_way_perr[0], ic_tag_way_perr[1]) @[Cat.scala 29:58]
+ node _T_638 = and(_T_637, io.ic_tag_valid) @[el2_ifu_ic_mem.scala 177:55]
+ node _T_639 = orr(_T_638) @[el2_ifu_ic_mem.scala 177:74]
+ io.ic_tag_perr <= _T_639 @[el2_ifu_ic_mem.scala 177:18]
+ wire w_tout_Vec : UInt<37>[2] @[el2_ifu_ic_mem.scala 178:53]
+ w_tout_Vec[0] <= w_tout_0 @[el2_ifu_ic_mem.scala 178:53]
+ w_tout_Vec[1] <= w_tout_1 @[el2_ifu_ic_mem.scala 178:53]
+ node _T_640 = bits(w_tout_Vec[0], 31, 13) @[el2_ifu_ic_mem.scala 179:70]
+ node _T_641 = bits(ic_rw_addr_ff, 31, 13) @[el2_ifu_ic_mem.scala 179:104]
+ node _T_642 = eq(_T_640, _T_641) @[el2_ifu_ic_mem.scala 179:88]
+ node _T_643 = and(_T_642, io.ic_tag_valid) @[el2_ifu_ic_mem.scala 179:133]
+ node _T_644 = bits(w_tout_Vec[1], 31, 13) @[el2_ifu_ic_mem.scala 179:70]
+ node _T_645 = bits(ic_rw_addr_ff, 31, 13) @[el2_ifu_ic_mem.scala 179:104]
+ node _T_646 = eq(_T_644, _T_645) @[el2_ifu_ic_mem.scala 179:88]
+ node _T_647 = and(_T_646, io.ic_tag_valid) @[el2_ifu_ic_mem.scala 179:133]
+ wire _T_648 : UInt<2>[2] @[el2_ifu_ic_mem.scala 179:52]
+ _T_648[0] <= _T_643 @[el2_ifu_ic_mem.scala 179:52]
+ _T_648[1] <= _T_647 @[el2_ifu_ic_mem.scala 179:52]
+ node _T_649 = cat(_T_648[0], _T_648[1]) @[Cat.scala 29:58]
+ io.ic_rd_hit <= _T_649 @[el2_ifu_ic_mem.scala 179:16]
+
diff --git a/EL2_IC_TAG.v b/EL2_IC_TAG.v
new file mode 100644
index 00000000..1a723dbe
--- /dev/null
+++ b/EL2_IC_TAG.v
@@ -0,0 +1,384 @@
+module rvecc_decode(
+ input [31:0] io_din,
+ input [6:0] io_ecc_in,
+ output [6:0] io_ecc_out,
+ output [31:0] io_dout,
+ output io_single_ecc_error
+);
+ wire w0_0 = io_din[0]; // @[beh_lib.scala 239:37]
+ wire w0_1 = io_din[1]; // @[beh_lib.scala 239:37]
+ wire w1_1 = io_din[2]; // @[beh_lib.scala 240:37]
+ wire w0_2 = io_din[3]; // @[beh_lib.scala 239:37]
+ wire w0_3 = io_din[4]; // @[beh_lib.scala 239:37]
+ wire w1_3 = io_din[5]; // @[beh_lib.scala 240:37]
+ wire w0_4 = io_din[6]; // @[beh_lib.scala 239:37]
+ wire w2_3 = io_din[7]; // @[beh_lib.scala 241:37]
+ wire w0_5 = io_din[8]; // @[beh_lib.scala 239:37]
+ wire w1_5 = io_din[9]; // @[beh_lib.scala 240:37]
+ wire w0_6 = io_din[10]; // @[beh_lib.scala 239:37]
+ wire w0_7 = io_din[11]; // @[beh_lib.scala 239:37]
+ wire w1_7 = io_din[12]; // @[beh_lib.scala 240:37]
+ wire w0_8 = io_din[13]; // @[beh_lib.scala 239:37]
+ wire w2_7 = io_din[14]; // @[beh_lib.scala 241:37]
+ wire w0_9 = io_din[15]; // @[beh_lib.scala 239:37]
+ wire w1_9 = io_din[16]; // @[beh_lib.scala 240:37]
+ wire w0_10 = io_din[17]; // @[beh_lib.scala 239:37]
+ wire w3_7 = io_din[18]; // @[beh_lib.scala 242:37]
+ wire w0_11 = io_din[19]; // @[beh_lib.scala 239:37]
+ wire w1_11 = io_din[20]; // @[beh_lib.scala 240:37]
+ wire w0_12 = io_din[21]; // @[beh_lib.scala 239:37]
+ wire w2_11 = io_din[22]; // @[beh_lib.scala 241:37]
+ wire w0_13 = io_din[23]; // @[beh_lib.scala 239:37]
+ wire w1_13 = io_din[24]; // @[beh_lib.scala 240:37]
+ wire w0_14 = io_din[25]; // @[beh_lib.scala 239:37]
+ wire w0_15 = io_din[26]; // @[beh_lib.scala 239:37]
+ wire w1_15 = io_din[27]; // @[beh_lib.scala 240:37]
+ wire w0_16 = io_din[28]; // @[beh_lib.scala 239:37]
+ wire w2_15 = io_din[29]; // @[beh_lib.scala 241:37]
+ wire w0_17 = io_din[30]; // @[beh_lib.scala 239:37]
+ wire w1_17 = io_din[31]; // @[beh_lib.scala 240:37]
+ wire [5:0] _T_100 = {w1_17,w0_17,w2_15,w0_16,w1_15,w0_15}; // @[beh_lib.scala 247:86]
+ wire _T_101 = ^_T_100; // @[beh_lib.scala 247:93]
+ wire _T_102 = io_ecc_in[5] ^ _T_101; // @[beh_lib.scala 247:81]
+ wire [6:0] _T_109 = {w0_10,w1_9,w0_9,w2_7,w0_8,w1_7,w0_7}; // @[beh_lib.scala 247:116]
+ wire [14:0] _T_117 = {w0_14,w1_13,w0_13,w2_11,w0_12,w1_11,w0_11,w3_7,_T_109}; // @[beh_lib.scala 247:116]
+ wire _T_118 = ^_T_117; // @[beh_lib.scala 247:123]
+ wire _T_119 = io_ecc_in[4] ^ _T_118; // @[beh_lib.scala 247:111]
+ wire [6:0] _T_126 = {w0_6,w1_5,w0_5,w2_3,w0_4,w1_3,w0_3}; // @[beh_lib.scala 247:146]
+ wire [14:0] _T_134 = {w0_14,w1_13,w0_13,w2_11,w0_12,w1_11,w0_11,w3_7,_T_126}; // @[beh_lib.scala 247:146]
+ wire _T_135 = ^_T_134; // @[beh_lib.scala 247:153]
+ wire _T_136 = io_ecc_in[3] ^ _T_135; // @[beh_lib.scala 247:141]
+ wire [8:0] _T_145 = {w0_9,w2_7,w0_6,w1_5,w0_5,w2_3,w0_2,w1_1,w0_1}; // @[beh_lib.scala 247:176]
+ wire [17:0] _T_154 = {w1_17,w0_17,w2_15,w0_14,w1_13,w0_13,w2_11,w0_10,w1_9,_T_145}; // @[beh_lib.scala 247:176]
+ wire _T_155 = ^_T_154; // @[beh_lib.scala 247:183]
+ wire _T_156 = io_ecc_in[2] ^ _T_155; // @[beh_lib.scala 247:171]
+ wire [8:0] _T_165 = {w0_8,w1_7,w0_6,w1_5,w0_4,w1_3,w0_2,w1_1,w0_0}; // @[beh_lib.scala 247:206]
+ wire [17:0] _T_174 = {w1_17,w0_16,w1_15,w0_14,w1_13,w0_12,w1_11,w0_10,w1_9,_T_165}; // @[beh_lib.scala 247:206]
+ wire _T_175 = ^_T_174; // @[beh_lib.scala 247:213]
+ wire _T_176 = io_ecc_in[1] ^ _T_175; // @[beh_lib.scala 247:201]
+ wire [8:0] _T_185 = {w0_8,w0_7,w0_6,w0_5,w0_4,w0_3,w0_2,w0_1,w0_0}; // @[beh_lib.scala 247:236]
+ wire [17:0] _T_194 = {w0_17,w0_16,w0_15,w0_14,w0_13,w0_12,w0_11,w0_10,w0_9,_T_185}; // @[beh_lib.scala 247:236]
+ wire _T_195 = ^_T_194; // @[beh_lib.scala 247:243]
+ wire _T_196 = io_ecc_in[0] ^ _T_195; // @[beh_lib.scala 247:231]
+ wire [6:0] ecc_check = {1'h0,_T_102,_T_119,_T_136,_T_156,_T_176,_T_196}; // @[Cat.scala 29:58]
+ wire error_mask_0 = ecc_check[5:0] == 6'h1; // @[beh_lib.scala 255:39]
+ wire error_mask_1 = ecc_check[5:0] == 6'h2; // @[beh_lib.scala 255:39]
+ wire error_mask_2 = ecc_check[5:0] == 6'h3; // @[beh_lib.scala 255:39]
+ wire error_mask_3 = ecc_check[5:0] == 6'h4; // @[beh_lib.scala 255:39]
+ wire error_mask_4 = ecc_check[5:0] == 6'h5; // @[beh_lib.scala 255:39]
+ wire error_mask_5 = ecc_check[5:0] == 6'h6; // @[beh_lib.scala 255:39]
+ wire error_mask_6 = ecc_check[5:0] == 6'h7; // @[beh_lib.scala 255:39]
+ wire error_mask_7 = ecc_check[5:0] == 6'h8; // @[beh_lib.scala 255:39]
+ wire error_mask_8 = ecc_check[5:0] == 6'h9; // @[beh_lib.scala 255:39]
+ wire error_mask_9 = ecc_check[5:0] == 6'ha; // @[beh_lib.scala 255:39]
+ wire error_mask_10 = ecc_check[5:0] == 6'hb; // @[beh_lib.scala 255:39]
+ wire error_mask_11 = ecc_check[5:0] == 6'hc; // @[beh_lib.scala 255:39]
+ wire error_mask_12 = ecc_check[5:0] == 6'hd; // @[beh_lib.scala 255:39]
+ wire error_mask_13 = ecc_check[5:0] == 6'he; // @[beh_lib.scala 255:39]
+ wire error_mask_14 = ecc_check[5:0] == 6'hf; // @[beh_lib.scala 255:39]
+ wire error_mask_15 = ecc_check[5:0] == 6'h10; // @[beh_lib.scala 255:39]
+ wire error_mask_16 = ecc_check[5:0] == 6'h11; // @[beh_lib.scala 255:39]
+ wire error_mask_17 = ecc_check[5:0] == 6'h12; // @[beh_lib.scala 255:39]
+ wire error_mask_18 = ecc_check[5:0] == 6'h13; // @[beh_lib.scala 255:39]
+ wire error_mask_19 = ecc_check[5:0] == 6'h14; // @[beh_lib.scala 255:39]
+ wire error_mask_20 = ecc_check[5:0] == 6'h15; // @[beh_lib.scala 255:39]
+ wire error_mask_21 = ecc_check[5:0] == 6'h16; // @[beh_lib.scala 255:39]
+ wire error_mask_22 = ecc_check[5:0] == 6'h17; // @[beh_lib.scala 255:39]
+ wire error_mask_23 = ecc_check[5:0] == 6'h18; // @[beh_lib.scala 255:39]
+ wire error_mask_24 = ecc_check[5:0] == 6'h19; // @[beh_lib.scala 255:39]
+ wire error_mask_25 = ecc_check[5:0] == 6'h1a; // @[beh_lib.scala 255:39]
+ wire error_mask_26 = ecc_check[5:0] == 6'h1b; // @[beh_lib.scala 255:39]
+ wire error_mask_27 = ecc_check[5:0] == 6'h1c; // @[beh_lib.scala 255:39]
+ wire error_mask_28 = ecc_check[5:0] == 6'h1d; // @[beh_lib.scala 255:39]
+ wire error_mask_29 = ecc_check[5:0] == 6'h1e; // @[beh_lib.scala 255:39]
+ wire error_mask_30 = ecc_check[5:0] == 6'h1f; // @[beh_lib.scala 255:39]
+ wire error_mask_31 = ecc_check[5:0] == 6'h20; // @[beh_lib.scala 255:39]
+ wire error_mask_32 = ecc_check[5:0] == 6'h21; // @[beh_lib.scala 255:39]
+ wire error_mask_33 = ecc_check[5:0] == 6'h22; // @[beh_lib.scala 255:39]
+ wire error_mask_34 = ecc_check[5:0] == 6'h23; // @[beh_lib.scala 255:39]
+ wire error_mask_35 = ecc_check[5:0] == 6'h24; // @[beh_lib.scala 255:39]
+ wire error_mask_36 = ecc_check[5:0] == 6'h25; // @[beh_lib.scala 255:39]
+ wire error_mask_37 = ecc_check[5:0] == 6'h26; // @[beh_lib.scala 255:39]
+ wire error_mask_38 = ecc_check[5:0] == 6'h27; // @[beh_lib.scala 255:39]
+ wire [7:0] _T_310 = {io_ecc_in[3],io_din[3:1],io_ecc_in[2],w0_0,io_ecc_in[1:0]}; // @[Cat.scala 29:58]
+ wire [38:0] din_plus_parity = {io_ecc_in[6],io_din[31:26],io_ecc_in[5],io_din[25:11],io_ecc_in[4],io_din[10:4],_T_310}; // @[Cat.scala 29:58]
+ wire [9:0] _T_333 = {error_mask_18,error_mask_17,error_mask_16,error_mask_15,error_mask_14,error_mask_13,error_mask_12,error_mask_11,error_mask_10,error_mask_9}; // @[beh_lib.scala 258:70]
+ wire [18:0] _T_334 = {_T_333,error_mask_8,error_mask_7,error_mask_6,error_mask_5,error_mask_4,error_mask_3,error_mask_2,error_mask_1,error_mask_0}; // @[beh_lib.scala 258:70]
+ wire [9:0] _T_343 = {error_mask_28,error_mask_27,error_mask_26,error_mask_25,error_mask_24,error_mask_23,error_mask_22,error_mask_21,error_mask_20,error_mask_19}; // @[beh_lib.scala 258:70]
+ wire [9:0] _T_352 = {error_mask_38,error_mask_37,error_mask_36,error_mask_35,error_mask_34,error_mask_33,error_mask_32,error_mask_31,error_mask_30,error_mask_29}; // @[beh_lib.scala 258:70]
+ wire [38:0] _T_354 = {_T_352,_T_343,_T_334}; // @[beh_lib.scala 258:70]
+ wire [38:0] _T_355 = _T_354 ^ din_plus_parity; // @[beh_lib.scala 258:77]
+ wire [38:0] dout_plus_parity = io_single_ecc_error ? _T_355 : din_plus_parity; // @[beh_lib.scala 258:29]
+ wire [3:0] _T_361 = {dout_plus_parity[6:4],dout_plus_parity[2]}; // @[Cat.scala 29:58]
+ wire [27:0] _T_363 = {dout_plus_parity[37:32],dout_plus_parity[30:16],dout_plus_parity[14:8]}; // @[Cat.scala 29:58]
+ wire _T_367 = ecc_check == 7'h40; // @[beh_lib.scala 261:60]
+ wire _T_368 = dout_plus_parity[38] ^ _T_367; // @[beh_lib.scala 261:42]
+ wire [3:0] _T_375 = {dout_plus_parity[7],dout_plus_parity[3],dout_plus_parity[1:0]}; // @[Cat.scala 29:58]
+ wire [2:0] _T_377 = {_T_368,dout_plus_parity[31],dout_plus_parity[15]}; // @[Cat.scala 29:58]
+ assign io_ecc_out = {_T_377,_T_375}; // @[beh_lib.scala 248:14 beh_lib.scala 261:14]
+ assign io_dout = {_T_363,_T_361}; // @[beh_lib.scala 260:11]
+ assign io_single_ecc_error = 1'h0; // @[beh_lib.scala 250:23]
+endmodule
+module EL2_IC_TAG(
+ input clock,
+ input reset,
+ input io_clk,
+ input io_rst_l,
+ input io_clk_override,
+ input io_dec_tlu_core_ecc_disable,
+ input [31:0] io_ic_rw_addr,
+ input [1:0] io_ic_wr_en,
+ input [1:0] io_ic_tag_valid,
+ input io_ic_rd_en,
+ input [12:0] io_ic_debug_addr,
+ input io_ic_debug_rd_en,
+ input io_ic_debug_wr_en,
+ input io_ic_debug_tag_array,
+ input [1:0] io_ic_debug_way,
+ output [25:0] io_ictag_debug_rd_data,
+ input [70:0] io_ic_debug_wr_data,
+ output [1:0] io_ic_rd_hit,
+ output io_ic_tag_perr,
+ input io_scan_mode,
+ output [25:0] io_test,
+ output [31:0] io_test_ecc_data_out_0,
+ output [31:0] io_test_ecc_data_out_1,
+ output [6:0] io_test_ecc_out_0,
+ output [6:0] io_test_ecc_out_1,
+ output io_test_ecc_sb_out_0,
+ output io_test_ecc_sb_out_1,
+ output io_test_ecc_db_out_0,
+ output io_test_ecc_db_out_1
+);
+`ifdef RANDOMIZE_MEM_INIT
+ reg [31:0] _RAND_0;
+ reg [31:0] _RAND_2;
+`endif // RANDOMIZE_MEM_INIT
+`ifdef RANDOMIZE_REG_INIT
+ reg [31:0] _RAND_1;
+ reg [31:0] _RAND_3;
+ reg [31:0] _RAND_4;
+ reg [31:0] _RAND_5;
+`endif // RANDOMIZE_REG_INIT
+ reg [25:0] ic_way_tag_0 [0:127]; // @[el2_ifu_ic_mem.scala 125:46]
+ wire [25:0] ic_way_tag_0_ic_tag_data_raw_data; // @[el2_ifu_ic_mem.scala 125:46]
+ wire [6:0] ic_way_tag_0_ic_tag_data_raw_addr; // @[el2_ifu_ic_mem.scala 125:46]
+ wire [25:0] ic_way_tag_0__T_487_data; // @[el2_ifu_ic_mem.scala 125:46]
+ wire [6:0] ic_way_tag_0__T_487_addr; // @[el2_ifu_ic_mem.scala 125:46]
+ wire ic_way_tag_0__T_487_mask; // @[el2_ifu_ic_mem.scala 125:46]
+ wire ic_way_tag_0__T_487_en; // @[el2_ifu_ic_mem.scala 125:46]
+ reg [6:0] ic_way_tag_0_ic_tag_data_raw_addr_pipe_0;
+ reg [25:0] ic_way_tag_1 [0:127]; // @[el2_ifu_ic_mem.scala 125:46]
+ wire [25:0] ic_way_tag_1_ic_tag_data_raw_data; // @[el2_ifu_ic_mem.scala 125:46]
+ wire [6:0] ic_way_tag_1_ic_tag_data_raw_addr; // @[el2_ifu_ic_mem.scala 125:46]
+ wire [25:0] ic_way_tag_1__T_487_data; // @[el2_ifu_ic_mem.scala 125:46]
+ wire [6:0] ic_way_tag_1__T_487_addr; // @[el2_ifu_ic_mem.scala 125:46]
+ wire ic_way_tag_1__T_487_mask; // @[el2_ifu_ic_mem.scala 125:46]
+ wire ic_way_tag_1__T_487_en; // @[el2_ifu_ic_mem.scala 125:46]
+ reg [6:0] ic_way_tag_1_ic_tag_data_raw_addr_pipe_0;
+ wire [31:0] rvecc_decode_io_din; // @[el2_ifu_ic_mem.scala 149:27]
+ wire [6:0] rvecc_decode_io_ecc_in; // @[el2_ifu_ic_mem.scala 149:27]
+ wire [6:0] rvecc_decode_io_ecc_out; // @[el2_ifu_ic_mem.scala 149:27]
+ wire [31:0] rvecc_decode_io_dout; // @[el2_ifu_ic_mem.scala 149:27]
+ wire rvecc_decode_io_single_ecc_error; // @[el2_ifu_ic_mem.scala 149:27]
+ wire [31:0] rvecc_decode_1_io_din; // @[el2_ifu_ic_mem.scala 149:27]
+ wire [6:0] rvecc_decode_1_io_ecc_in; // @[el2_ifu_ic_mem.scala 149:27]
+ wire [6:0] rvecc_decode_1_io_ecc_out; // @[el2_ifu_ic_mem.scala 149:27]
+ wire [31:0] rvecc_decode_1_io_dout; // @[el2_ifu_ic_mem.scala 149:27]
+ wire rvecc_decode_1_io_single_ecc_error; // @[el2_ifu_ic_mem.scala 149:27]
+ wire _T_2 = io_ic_rw_addr[5:4] == 2'h1; // @[el2_ifu_ic_mem.scala 73:93]
+ wire [1:0] _T_4 = {_T_2,_T_2}; // @[Cat.scala 29:58]
+ wire [1:0] ic_tag_wren = io_ic_wr_en & _T_4; // @[el2_ifu_ic_mem.scala 73:33]
+ wire _T_5 = io_ic_debug_rd_en & io_ic_debug_tag_array; // @[el2_ifu_ic_mem.scala 75:68]
+ wire [1:0] _T_7 = {_T_5,_T_5}; // @[Cat.scala 29:58]
+ wire [1:0] ic_debug_rd_way_en = _T_7 & io_ic_debug_way; // @[el2_ifu_ic_mem.scala 75:93]
+ wire _T_8 = io_ic_debug_wr_en & io_ic_debug_tag_array; // @[el2_ifu_ic_mem.scala 76:68]
+ wire [1:0] _T_10 = {_T_8,_T_8}; // @[Cat.scala 29:58]
+ wire [1:0] ic_debug_wr_way_en = _T_10 & io_ic_debug_way; // @[el2_ifu_ic_mem.scala 76:93]
+ wire _T_11 = io_ic_rd_en | io_clk_override; // @[el2_ifu_ic_mem.scala 77:55]
+ wire [1:0] _T_13 = {_T_11,_T_11}; // @[Cat.scala 29:58]
+ wire [1:0] _T_14 = _T_13 | io_ic_wr_en; // @[el2_ifu_ic_mem.scala 77:74]
+ wire [1:0] _T_15 = _T_14 | ic_debug_wr_way_en; // @[el2_ifu_ic_mem.scala 77:88]
+ wire [1:0] ic_tag_clken = _T_15 | ic_debug_rd_way_en; // @[el2_ifu_ic_mem.scala 77:109]
+ reg [31:0] ic_rw_addr_ff; // @[el2_ifu_ic_mem.scala 80:30]
+ wire [1:0] ic_tag_wren_q = ic_tag_wren | ic_debug_wr_way_en; // @[el2_ifu_ic_mem.scala 82:35]
+ wire [31:0] _T_30 = {13'h0,io_ic_rw_addr[31:13]}; // @[Cat.scala 29:58]
+ wire [8:0] _T_134 = {_T_30[16],_T_30[14],_T_30[12],_T_30[10],_T_30[8],_T_30[6],_T_30[5],_T_30[3],_T_30[1]}; // @[el2_lib.scala 211:22]
+ wire [17:0] _T_143 = {_T_30[31],_T_30[30],_T_30[28],_T_30[27],_T_30[25],_T_30[23],_T_30[21],_T_30[20],_T_30[18],_T_134}; // @[el2_lib.scala 211:22]
+ wire _T_144 = ^_T_143; // @[el2_lib.scala 211:29]
+ wire [8:0] _T_152 = {_T_30[15],_T_30[14],_T_30[11],_T_30[10],_T_30[7],_T_30[6],_T_30[4],_T_30[3],_T_30[0]}; // @[el2_lib.scala 211:39]
+ wire [17:0] _T_161 = {_T_30[31],_T_30[29],_T_30[28],_T_30[26],_T_30[25],_T_30[22],_T_30[21],_T_30[19],_T_30[18],_T_152}; // @[el2_lib.scala 211:39]
+ wire _T_162 = ^_T_161; // @[el2_lib.scala 211:46]
+ wire [8:0] _T_170 = {_T_30[15],_T_30[14],_T_30[9],_T_30[8],_T_30[7],_T_30[6],_T_30[2],_T_30[1],_T_30[0]}; // @[el2_lib.scala 211:56]
+ wire [17:0] _T_179 = {_T_30[30],_T_30[29],_T_30[28],_T_30[24],_T_30[23],_T_30[22],_T_30[21],_T_30[17],_T_30[16],_T_170}; // @[el2_lib.scala 211:56]
+ wire _T_180 = ^_T_179; // @[el2_lib.scala 211:63]
+ wire [6:0] _T_186 = {_T_30[12],_T_30[11],_T_30[10],_T_30[9],_T_30[8],_T_30[7],_T_30[6]}; // @[el2_lib.scala 211:73]
+ wire [14:0] _T_194 = {_T_30[27],_T_30[26],_T_30[25],_T_30[24],_T_30[23],_T_30[22],_T_30[21],_T_30[13],_T_186}; // @[el2_lib.scala 211:73]
+ wire _T_195 = ^_T_194; // @[el2_lib.scala 211:80]
+ wire [14:0] _T_209 = {_T_30[20],_T_30[19],_T_30[18],_T_30[17],_T_30[16],_T_30[15],_T_30[14],_T_30[13],_T_186}; // @[el2_lib.scala 211:90]
+ wire _T_210 = ^_T_209; // @[el2_lib.scala 211:97]
+ wire [5:0] _T_215 = {_T_30[5],_T_30[4],_T_30[3],_T_30[2],_T_30[1],_T_30[0]}; // @[el2_lib.scala 211:107]
+ wire _T_216 = ^_T_215; // @[el2_lib.scala 211:114]
+ wire [5:0] _T_221 = {_T_144,_T_162,_T_180,_T_195,_T_210,_T_216}; // @[Cat.scala 29:58]
+ wire _T_222 = ^_T_30; // @[el2_lib.scala 212:13]
+ wire _T_223 = ^_T_221; // @[el2_lib.scala 212:23]
+ wire _T_224 = _T_222 ^ _T_223; // @[el2_lib.scala 212:18]
+ wire [6:0] _T_225 = {_T_224,_T_144,_T_162,_T_180,_T_195,_T_210,_T_216}; // @[Cat.scala 29:58]
+ wire [25:0] _T_229 = {io_ic_debug_wr_data[68:64],io_ic_debug_wr_data[31:11]}; // @[Cat.scala 29:58]
+ wire [25:0] _T_463 = {_T_225[4:0],2'h0,io_ic_rw_addr[31:13]}; // @[Cat.scala 29:58]
+ wire _T_478 = io_ic_debug_rd_en | io_ic_debug_wr_en; // @[el2_ifu_ic_mem.scala 119:44]
+ reg [1:0] ic_debug_rd_way_en_ff; // @[el2_ifu_ic_mem.scala 123:38]
+ wire [25:0] _GEN_17 = ic_way_tag_0_ic_tag_data_raw_data; // @[el2_ifu_ic_mem.scala 137:75]
+ wire [25:0] _GEN_18 = ic_way_tag_0_ic_tag_data_raw_data[0] ? ic_way_tag_1_ic_tag_data_raw_data : _GEN_17; // @[el2_ifu_ic_mem.scala 137:75]
+ wire [36:0] w_tout_0 = {_GEN_18[25:21],_GEN_18[18:0],13'h0}; // @[Cat.scala 29:58]
+ wire [25:0] _GEN_22 = ic_way_tag_1_ic_tag_data_raw_data[0] ? ic_way_tag_1_ic_tag_data_raw_data : _GEN_17; // @[el2_ifu_ic_mem.scala 137:75]
+ wire [36:0] w_tout_1 = {_GEN_22[25:21],_GEN_22[18:0],13'h0}; // @[Cat.scala 29:58]
+ wire ic_tag_way_perr_0 = io_test_ecc_sb_out_0 | io_test_ecc_db_out_0; // @[el2_ifu_ic_mem.scala 165:54]
+ wire ic_tag_way_perr_1 = io_test_ecc_sb_out_1 | io_test_ecc_db_out_1; // @[el2_ifu_ic_mem.scala 165:54]
+ wire [9:0] _T_533 = {ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0]}; // @[Cat.scala 29:58]
+ wire [18:0] _T_542 = {_T_533,ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0]}; // @[Cat.scala 29:58]
+ wire [25:0] _T_549 = {_T_542,ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0],ic_debug_rd_way_en_ff[0]}; // @[Cat.scala 29:58]
+ wire [25:0] _T_550 = _T_549 & ic_way_tag_0_ic_tag_data_raw_data; // @[el2_ifu_ic_mem.scala 168:75]
+ wire [9:0] _T_561 = {ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1]}; // @[Cat.scala 29:58]
+ wire [18:0] _T_570 = {_T_561,ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1]}; // @[Cat.scala 29:58]
+ wire [25:0] _T_577 = {_T_570,ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1],ic_debug_rd_way_en_ff[1]}; // @[Cat.scala 29:58]
+ wire [25:0] _T_578 = _T_577 & ic_way_tag_1_ic_tag_data_raw_data; // @[el2_ifu_ic_mem.scala 168:75]
+ wire [36:0] _T_636 = w_tout_0 & w_tout_1; // @[el2_ifu_ic_mem.scala 176:31]
+ wire [1:0] _T_637 = {ic_tag_way_perr_0,ic_tag_way_perr_1}; // @[Cat.scala 29:58]
+ wire [1:0] _T_638 = _T_637 & io_ic_tag_valid; // @[el2_ifu_ic_mem.scala 177:55]
+ wire _T_642 = w_tout_0[31:13] == ic_rw_addr_ff[31:13]; // @[el2_ifu_ic_mem.scala 179:88]
+ wire [1:0] _GEN_25 = {{1'd0}, _T_642}; // @[el2_ifu_ic_mem.scala 179:133]
+ wire [1:0] _T_643 = _GEN_25 & io_ic_tag_valid; // @[el2_ifu_ic_mem.scala 179:133]
+ wire _T_646 = w_tout_1[31:13] == ic_rw_addr_ff[31:13]; // @[el2_ifu_ic_mem.scala 179:88]
+ wire [1:0] _GEN_26 = {{1'd0}, _T_646}; // @[el2_ifu_ic_mem.scala 179:133]
+ wire [1:0] _T_647 = _GEN_26 & io_ic_tag_valid; // @[el2_ifu_ic_mem.scala 179:133]
+ wire [3:0] _T_649 = {_T_643,_T_647}; // @[Cat.scala 29:58]
+ rvecc_decode rvecc_decode ( // @[el2_ifu_ic_mem.scala 149:27]
+ .io_din(rvecc_decode_io_din),
+ .io_ecc_in(rvecc_decode_io_ecc_in),
+ .io_ecc_out(rvecc_decode_io_ecc_out),
+ .io_dout(rvecc_decode_io_dout),
+ .io_single_ecc_error(rvecc_decode_io_single_ecc_error)
+ );
+ rvecc_decode rvecc_decode_1 ( // @[el2_ifu_ic_mem.scala 149:27]
+ .io_din(rvecc_decode_1_io_din),
+ .io_ecc_in(rvecc_decode_1_io_ecc_in),
+ .io_ecc_out(rvecc_decode_1_io_ecc_out),
+ .io_dout(rvecc_decode_1_io_dout),
+ .io_single_ecc_error(rvecc_decode_1_io_single_ecc_error)
+ );
+ assign ic_way_tag_0_ic_tag_data_raw_addr = ic_way_tag_0_ic_tag_data_raw_addr_pipe_0;
+ assign ic_way_tag_0_ic_tag_data_raw_data = ic_way_tag_0[ic_way_tag_0_ic_tag_data_raw_addr]; // @[el2_ifu_ic_mem.scala 125:46]
+ assign ic_way_tag_0__T_487_data = _T_8 ? _T_229 : _T_463;
+ assign ic_way_tag_0__T_487_addr = _T_478 ? io_ic_debug_addr[12:6] : io_ic_rw_addr[12:6];
+ assign ic_way_tag_0__T_487_mask = ic_tag_wren_q[0] & ic_tag_clken[0];
+ assign ic_way_tag_0__T_487_en = 1'h1;
+ assign ic_way_tag_1_ic_tag_data_raw_addr = ic_way_tag_1_ic_tag_data_raw_addr_pipe_0;
+ assign ic_way_tag_1_ic_tag_data_raw_data = ic_way_tag_1[ic_way_tag_1_ic_tag_data_raw_addr]; // @[el2_ifu_ic_mem.scala 125:46]
+ assign ic_way_tag_1__T_487_data = _T_8 ? _T_229 : _T_463;
+ assign ic_way_tag_1__T_487_addr = _T_478 ? io_ic_debug_addr[12:6] : io_ic_rw_addr[12:6];
+ assign ic_way_tag_1__T_487_mask = ic_tag_wren_q[1] & ic_tag_clken[1];
+ assign ic_way_tag_1__T_487_en = 1'h1;
+ assign io_ictag_debug_rd_data = _T_550 | _T_578; // @[el2_ifu_ic_mem.scala 175:26]
+ assign io_ic_rd_hit = _T_649[1:0]; // @[el2_ifu_ic_mem.scala 179:16]
+ assign io_ic_tag_perr = |_T_638; // @[el2_ifu_ic_mem.scala 177:18]
+ assign io_test = _T_636[25:0]; // @[el2_ifu_ic_mem.scala 176:13]
+ assign io_test_ecc_data_out_0 = rvecc_decode_io_dout; // @[el2_ifu_ic_mem.scala 160:29]
+ assign io_test_ecc_data_out_1 = rvecc_decode_1_io_dout; // @[el2_ifu_ic_mem.scala 160:29]
+ assign io_test_ecc_out_0 = rvecc_decode_io_ecc_out; // @[el2_ifu_ic_mem.scala 161:24]
+ assign io_test_ecc_out_1 = rvecc_decode_1_io_ecc_out; // @[el2_ifu_ic_mem.scala 161:24]
+ assign io_test_ecc_sb_out_0 = 1'h0; // @[el2_ifu_ic_mem.scala 162:27]
+ assign io_test_ecc_sb_out_1 = 1'h0; // @[el2_ifu_ic_mem.scala 162:27]
+ assign io_test_ecc_db_out_0 = 1'h0; // @[el2_ifu_ic_mem.scala 163:27]
+ assign io_test_ecc_db_out_1 = 1'h0; // @[el2_ifu_ic_mem.scala 163:27]
+ assign rvecc_decode_io_din = {11'h0,ic_way_tag_0_ic_tag_data_raw_data[20:0]}; // @[el2_ifu_ic_mem.scala 152:26]
+ assign rvecc_decode_io_ecc_in = {2'h0,ic_way_tag_0_ic_tag_data_raw_data[25:21]}; // @[el2_ifu_ic_mem.scala 153:29]
+ assign rvecc_decode_1_io_din = {11'h0,ic_way_tag_1_ic_tag_data_raw_data[20:0]}; // @[el2_ifu_ic_mem.scala 152:26]
+ assign rvecc_decode_1_io_ecc_in = {2'h0,ic_way_tag_1_ic_tag_data_raw_data[25:21]}; // @[el2_ifu_ic_mem.scala 153:29]
+`ifdef RANDOMIZE_GARBAGE_ASSIGN
+`define RANDOMIZE
+`endif
+`ifdef RANDOMIZE_INVALID_ASSIGN
+`define RANDOMIZE
+`endif
+`ifdef RANDOMIZE_REG_INIT
+`define RANDOMIZE
+`endif
+`ifdef RANDOMIZE_MEM_INIT
+`define RANDOMIZE
+`endif
+`ifndef RANDOM
+`define RANDOM $random
+`endif
+`ifdef RANDOMIZE_MEM_INIT
+ integer initvar;
+`endif
+`ifndef SYNTHESIS
+`ifdef FIRRTL_BEFORE_INITIAL
+`FIRRTL_BEFORE_INITIAL
+`endif
+initial begin
+ `ifdef RANDOMIZE
+ `ifdef INIT_RANDOM
+ `INIT_RANDOM
+ `endif
+ `ifndef VERILATOR
+ `ifdef RANDOMIZE_DELAY
+ #`RANDOMIZE_DELAY begin end
+ `else
+ #0.002 begin end
+ `endif
+ `endif
+`ifdef RANDOMIZE_MEM_INIT
+ _RAND_0 = {1{`RANDOM}};
+ for (initvar = 0; initvar < 128; initvar = initvar+1)
+ ic_way_tag_0[initvar] = _RAND_0[25:0];
+ _RAND_2 = {1{`RANDOM}};
+ for (initvar = 0; initvar < 128; initvar = initvar+1)
+ ic_way_tag_1[initvar] = _RAND_2[25:0];
+`endif // RANDOMIZE_MEM_INIT
+`ifdef RANDOMIZE_REG_INIT
+ _RAND_1 = {1{`RANDOM}};
+ ic_way_tag_0_ic_tag_data_raw_addr_pipe_0 = _RAND_1[6:0];
+ _RAND_3 = {1{`RANDOM}};
+ ic_way_tag_1_ic_tag_data_raw_addr_pipe_0 = _RAND_3[6:0];
+ _RAND_4 = {1{`RANDOM}};
+ ic_rw_addr_ff = _RAND_4[31:0];
+ _RAND_5 = {1{`RANDOM}};
+ ic_debug_rd_way_en_ff = _RAND_5[1:0];
+`endif // RANDOMIZE_REG_INIT
+ `endif // RANDOMIZE
+end // initial
+`ifdef FIRRTL_AFTER_INITIAL
+`FIRRTL_AFTER_INITIAL
+`endif
+`endif // SYNTHESIS
+ always @(posedge clock) begin
+ if(ic_way_tag_0__T_487_en & ic_way_tag_0__T_487_mask) begin
+ ic_way_tag_0[ic_way_tag_0__T_487_addr] <= ic_way_tag_0__T_487_data; // @[el2_ifu_ic_mem.scala 125:46]
+ end
+ if (_T_478) begin
+ ic_way_tag_0_ic_tag_data_raw_addr_pipe_0 <= io_ic_debug_addr[12:6];
+ end else begin
+ ic_way_tag_0_ic_tag_data_raw_addr_pipe_0 <= io_ic_rw_addr[12:6];
+ end
+ if(ic_way_tag_1__T_487_en & ic_way_tag_1__T_487_mask) begin
+ ic_way_tag_1[ic_way_tag_1__T_487_addr] <= ic_way_tag_1__T_487_data; // @[el2_ifu_ic_mem.scala 125:46]
+ end
+ if (_T_478) begin
+ ic_way_tag_1_ic_tag_data_raw_addr_pipe_0 <= io_ic_debug_addr[12:6];
+ end else begin
+ ic_way_tag_1_ic_tag_data_raw_addr_pipe_0 <= io_ic_rw_addr[12:6];
+ end
+ if (reset) begin
+ ic_rw_addr_ff <= 32'h0;
+ end else begin
+ ic_rw_addr_ff <= io_ic_rw_addr;
+ end
+ if (reset) begin
+ ic_debug_rd_way_en_ff <= 2'h0;
+ end else begin
+ ic_debug_rd_way_en_ff <= ic_debug_rd_way_en;
+ end
+ end
+endmodule
diff --git a/README.md b/README.md
index 58d5d440..46b6d35c 100644
--- a/README.md
+++ b/README.md
@@ -1,136 +1,27 @@
-Chisel Project Template
-=======================
+# EL2 SweRV RISC-V Core Chiselified Version from <> LAMPRO MELLON
-You've done the Chisel [tutorials](https://github.com/ucb-bar/chisel-tutorial), and now you
-are ready to start your own chisel project. The following procedure should get you started
-with a clean running [Chisel3](https://github.com/freechipsproject/chisel3) project.
+This repository contains the SweRV EL2 Core design in CHISEL
-> More and more users are finding IntelliJ to be a powerful tool for Chisel coding. See the
-[IntelliJ Installation Guide](https://github.com/ucb-bar/chisel-template/wiki/IntelliJ-Installation-Guide) for how to install it.
+## Back ground
-## Make your own Chisel3 project
-### How to get started
-The first thing you want to do is clone this repo into a directory of your own. I'd recommend creating a chisel projects directory somewhere
-```sh
-mkdir ~/ChiselProjects
-cd ~/ChiselProjects
+The project is being made for learning purpose. Copy rights to the SweRV-EL2 belongs to Wrestern Digital
-git clone https://github.com/ucb-bar/chisel-template.git MyChiselProject
-cd MyChiselProject
-```
-### Make your project into a fresh git repo
-There may be more elegant way to do it, but the following works for me. **Note:** this project comes with a magnificent 339 line (at this writing) .gitignore file.
- You may want to edit that first in case we missed something, whack away at it, or start it from scratch.
-
-#### Clear out the old git stuff
-```sh
-rm -rf .git
-git init
-git add .gitignore *
-```
+## Directory Structure
-#### Rename project in build.sbt file
-Use your favorite text editor to change the first line of the **build.sbt** file
-(it ships as ```name := "chisel-module-template"```) to correspond
-to your project.
-Perhaps as ```name := "my-chisel-project"```
+ ├── configs # Configurations Dir
+ │  └── snapshots # Where generated configuration files are created
+ ├── design # Design root dir
+ │  ├── dbg # Debugger
+ │  ├── dec # Decode, Registers and Exceptions
+ │  ├── dmi # DMI block
+ │  ├── exu # EXU (ALU/MUL/DIV)
+ │  ├── ifu # Fetch & Branch Prediction
+ │  ├── include
+ │  ├── lib
+ │  └── lsu # Load/Store
+ ├── docs
+ ├── tools # Scripts/Makefiles
+ └── testbench # (Very) simple testbench
+   ├── asm # Example assembly files
+   └── hex # Canned demo hex files
-#### Clean up the README.md file
-Again use you editor of choice to make the README specific to your project.
-Be sure to update (or delete) the License section and add a LICENSE file of your own.
-
-#### Commit your changes
-```
-git commit -m 'Starting MyChiselProject'
-```
-Connecting this up to github or some other remote host is an exercise left to the reader.
-
-### Did it work?
-You should now have a project based on Chisel3 that can be run.
-So go for it, at the command line in the project root.
-```sh
-sbt 'testOnly gcd.GCDTester -- -z Basic'
-```
->This tells the test harness to only run the test in GCDTester that contains the word Basic
-There are a number of other examples of ways to run tests in there, but we just want to see that
-one works.
-
-You should see a whole bunch of output that ends with something like the following lines
-```
-[info] [0.001] SEED 1540570744913
-test GCD Success: 168 tests passed in 1107 cycles in 0.067751 seconds 16339.24 Hz
-[info] [0.050] RAN 1102 CYCLES PASSED
-[info] GCDTester:
-[info] GCD
-[info] Basic test using Driver.execute
-[info] - should be used as an alternative way to run specification
-[info] using --backend-name verilator
-[info] running with --is-verbose
-[info] running with --generate-vcd-output on
-[info] running with --generate-vcd-output off
-[info] ScalaTest
-[info] Run completed in 3 seconds, 184 milliseconds.
-[info] Total number of tests run: 1
-[info] Suites: completed 1, aborted 0
-[info] Tests: succeeded 1, failed 0, canceled 0, ignored 0, pending 0
-[info] All tests passed.
-[info] Passed: Total 1, Failed 0, Errors 0, Passed 1
-[success] Total time: 5 s, completed Oct 26, 2018 9:19:07 AM
-```
-If you see the above then...
-
-### It worked!
-You are ready to go. We have a few recommended practices and things to do.
-* Use packages and following conventions for [structure](http://www.scala-sbt.org/0.13/docs/Directories.html) and [naming](http://docs.scala-lang.org/style/naming-conventions.html)
-* Package names should be clearly reflected in the testing hierarchy
-* Build tests for all your work.
-* This template includes a dependency on the Chisel3 IOTesters, this is a reasonable starting point for most tests
-* You can remove this dependency in the build.sbt file if necessary
-* Change the name of your project in the build.sbt file
-* Change your README.md
-
-There are [instructions for generating Verilog](https://github.com/freechipsproject/chisel3/wiki/Frequently-Asked-Questions#get-me-verilog) on the Chisel wiki.
-
-Some backends (verilator for example) produce VCD files by default, while other backends (firrtl and treadle) do not.
-You can control the generation of VCD files with the `--generate-vcd-output` flag.
-
-To run the simulation and generate a VCD output file regardless of the backend:
-```bash
-sbt 'test:runMain gcd.GCDMain --generate-vcd-output on'
-```
-
-To run the simulation and suppress the generation of a VCD output file:
-```bash
-sbt 'test:runMain gcd.GCDMain --generate-vcd-output off'
-```
-
-## Development/Bug Fixes
-This is the release version of chisel-template. If you have bug fixes or
-changes you would like to see incorporated in this repo, please checkout
-the master branch and submit pull requests against it.
-
-## License
-This is free and unencumbered software released into the public domain.
-
-Anyone is free to copy, modify, publish, use, compile, sell, or
-distribute this software, either in source code form or as a compiled
-binary, for any purpose, commercial or non-commercial, and by any
-means.
-
-In jurisdictions that recognize copyright laws, the author or authors
-of this software dedicate any and all copyright interest in the
-software to the public domain. We make this dedication for the benefit
-of the public at large and to the detriment of our heirs and
-successors. We intend this dedication to be an overt act of
-relinquishment in perpetuity of all present and future rights to this
-software under copyright law.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR
-OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
-ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
-OTHER DEALINGS IN THE SOFTWARE.
-
-For more information, please refer to
diff --git a/el2_dec_dec_ctl.anno.json b/el2_dec_dec_ctl.anno.json
index f75b78b2..81329463 100644
--- a/el2_dec_dec_ctl.anno.json
+++ b/el2_dec_dec_ctl.anno.json
@@ -349,12 +349,6 @@
"~el2_dec_dec_ctl|el2_dec_dec_ctl>io_ins"
]
},
- {
- "class":"logger.LogLevelAnnotation",
- "globalLogLevel":{
-
- }
- },
{
"class":"firrtl.EmitCircuitAnnotation",
"emitter":"firrtl.VerilogEmitter"
diff --git a/el2_ifu_bp_ctl.anno.json b/el2_ifu_bp_ctl.anno.json
new file mode 100644
index 00000000..600dece6
--- /dev/null
+++ b/el2_ifu_bp_ctl.anno.json
@@ -0,0 +1,26 @@
+[
+ {
+ "class":"firrtl.transforms.CombinationalPath",
+ "sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_out",
+ "sources":[
+ "~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_in",
+ "~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_in2"
+ ]
+ },
+ {
+ "class":"firrtl.EmitCircuitAnnotation",
+ "emitter":"firrtl.VerilogEmitter"
+ },
+ {
+ "class":"firrtl.options.TargetDirAnnotation",
+ "directory":"."
+ },
+ {
+ "class":"firrtl.options.OutputAnnotationFileAnnotation",
+ "file":"el2_ifu_bp_ctl"
+ },
+ {
+ "class":"firrtl.transforms.BlackBoxTargetDirAnno",
+ "targetDir":"."
+ }
+]
\ No newline at end of file
diff --git a/el2_ifu_bp_ctl.fir b/el2_ifu_bp_ctl.fir
new file mode 100644
index 00000000..a2774c2f
--- /dev/null
+++ b/el2_ifu_bp_ctl.fir
@@ -0,0 +1,12 @@
+;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
+circuit el2_ifu_bp_ctl :
+ module el2_ifu_bp_ctl :
+ input clock : Clock
+ input reset : UInt<1>
+ output io : {flip in : UInt<32>, flip in2 : UInt<32>, out : UInt}
+
+ node _T = bits(io.in, 9, 2) @[el2_lib.scala 35:30]
+ node _T_1 = bits(io.in2, 7, 0) @[el2_lib.scala 35:53]
+ node _T_2 = xor(_T, _T_1) @[el2_lib.scala 35:48]
+ io.out <= _T_2 @[el2_ifu_bp_ctl.scala 13:10]
+
diff --git a/el2_ifu_bp_ctl.v b/el2_ifu_bp_ctl.v
new file mode 100644
index 00000000..0e75089f
--- /dev/null
+++ b/el2_ifu_bp_ctl.v
@@ -0,0 +1,9 @@
+module el2_ifu_bp_ctl(
+ input clock,
+ input reset,
+ input [31:0] io_in,
+ input [31:0] io_in2,
+ output [7:0] io_out
+);
+ assign io_out = io_in[9:2] ^ io_in2[7:0]; // @[el2_ifu_bp_ctl.scala 13:10]
+endmodule
diff --git a/el2_ifu_ic_mem.anno.json b/el2_ifu_ic_mem.anno.json
new file mode 100644
index 00000000..fb664b4d
--- /dev/null
+++ b/el2_ifu_ic_mem.anno.json
@@ -0,0 +1,18 @@
+[
+ {
+ "class":"firrtl.EmitCircuitAnnotation",
+ "emitter":"firrtl.VerilogEmitter"
+ },
+ {
+ "class":"firrtl.options.TargetDirAnnotation",
+ "directory":"."
+ },
+ {
+ "class":"firrtl.options.OutputAnnotationFileAnnotation",
+ "file":"el2_ifu_ic_mem"
+ },
+ {
+ "class":"firrtl.transforms.BlackBoxTargetDirAnno",
+ "targetDir":"."
+ }
+]
\ No newline at end of file
diff --git a/el2_ifu_ic_mem.fir b/el2_ifu_ic_mem.fir
new file mode 100644
index 00000000..f859420e
--- /dev/null
+++ b/el2_ifu_ic_mem.fir
@@ -0,0 +1,15 @@
+;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
+circuit el2_ifu_ic_mem :
+ module el2_ifu_ic_mem :
+ input clock : Clock
+ input reset : UInt<1>
+ output io : {flip clk : UInt<1>, flip rst_l : UInt<1>, flip clk_override : UInt<1>, flip dec_tlu_core_ecc_disable : UInt<1>, flip ic_rw_addr : UInt<31>, flip ic_wr_en : UInt<2>, flip ic_rd_en : UInt<1>, flip ic_debug_addr : UInt<9>, flip ic_debug_rd_en : UInt<1>, flip ic_debug_wr_en : UInt<1>, flip ic_debug_tag_array : UInt<1>, flip ic_debug_way : UInt<2>, flip ic_premux_data : UInt<64>, flip ic_sel_premux_data : UInt<1>, flip ic_wr_data : UInt<71>[2], ic_rd_data : UInt<64>, ic_debug_rd_data : UInt<71>, ictag_debug_rd_data : UInt<26>, flip ic_debug_wr_data : UInt<71>, ic_eccerr : UInt<2>, ic_parerr : UInt<2>, flip ic_tag_valid : UInt<2>, ic_rd_hit : UInt<2>, ic_tag_perr : UInt<1>, flip scan_mode : UInt<1>}
+
+ io.ic_tag_perr <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 34:18]
+ io.ic_rd_hit <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 35:16]
+ io.ic_parerr <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 36:16]
+ io.ic_eccerr <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 37:16]
+ io.ictag_debug_rd_data <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 38:26]
+ io.ic_debug_rd_data <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 39:23]
+ io.ic_rd_data <= UInt<1>("h00") @[el2_ifu_ic_mem.scala 40:17]
+
diff --git a/el2_ifu_ic_mem.v b/el2_ifu_ic_mem.v
new file mode 100644
index 00000000..6c5fcd82
--- /dev/null
+++ b/el2_ifu_ic_mem.v
@@ -0,0 +1,38 @@
+module el2_ifu_ic_mem(
+ input clock,
+ input reset,
+ input io_clk,
+ input io_rst_l,
+ input io_clk_override,
+ input io_dec_tlu_core_ecc_disable,
+ input [30:0] io_ic_rw_addr,
+ input [1:0] io_ic_wr_en,
+ input io_ic_rd_en,
+ input [8:0] io_ic_debug_addr,
+ input io_ic_debug_rd_en,
+ input io_ic_debug_wr_en,
+ input io_ic_debug_tag_array,
+ input [1:0] io_ic_debug_way,
+ input [63:0] io_ic_premux_data,
+ input io_ic_sel_premux_data,
+ input [70:0] io_ic_wr_data_0,
+ input [70:0] io_ic_wr_data_1,
+ output [63:0] io_ic_rd_data,
+ output [70:0] io_ic_debug_rd_data,
+ output [25:0] io_ictag_debug_rd_data,
+ input [70:0] io_ic_debug_wr_data,
+ output [1:0] io_ic_eccerr,
+ output [1:0] io_ic_parerr,
+ input [1:0] io_ic_tag_valid,
+ output [1:0] io_ic_rd_hit,
+ output io_ic_tag_perr,
+ input io_scan_mode
+);
+ assign io_ic_rd_data = 64'h0; // @[el2_ifu_ic_mem.scala 40:17]
+ assign io_ic_debug_rd_data = 71'h0; // @[el2_ifu_ic_mem.scala 39:23]
+ assign io_ictag_debug_rd_data = 26'h0; // @[el2_ifu_ic_mem.scala 38:26]
+ assign io_ic_eccerr = 2'h0; // @[el2_ifu_ic_mem.scala 37:16]
+ assign io_ic_parerr = 2'h0; // @[el2_ifu_ic_mem.scala 36:16]
+ assign io_ic_rd_hit = 2'h0; // @[el2_ifu_ic_mem.scala 35:16]
+ assign io_ic_tag_perr = 1'h0; // @[el2_ifu_ic_mem.scala 34:18]
+endmodule
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index 17dbdcf5..4e1c0489 100644
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index 20f7928e..61305f99 100644
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diff --git a/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp b/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp
index 6cc9b2e0..4d04d979 100644
--- a/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp
+++ b/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/input_dsp
@@ -1 +1 @@
--1413115869
\ No newline at end of file
+23355001
\ No newline at end of file
diff --git a/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp b/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp
index 2d4cf3d8..dba113a6 100644
--- a/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp
+++ b/project/target/streams/_global/dependencyPositions/_global/streams/update_cache_2.12/output_dsp
@@ -1 +1 @@
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\ No newline at end of file
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diff --git a/project/target/streams/_global/update/_global/streams/out b/project/target/streams/_global/update/_global/streams/out
index 68fc6c75..22a7b955 100644
--- a/project/target/streams/_global/update/_global/streams/out
+++ b/project/target/streams/_global/update/_global/streams/out
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-[debug] Updating ProjectRef(uri("file:/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/"), "swerv-chislified-master-build")...
-[debug] Done updating ProjectRef(uri("file:/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/"), "swerv-chislified-master-build")
+[0m[[0m[0mdebug[0m] [0m[0m"not up to date. inChanged = true, force = false[0m
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diff --git a/project/target/streams/compile/_global/_global/compileBinaryFileInputs/previous b/project/target/streams/compile/_global/_global/compileBinaryFileInputs/previous
index c3e14752..2c776575 100644
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diff --git a/project/target/streams/compile/_global/_global/dependencyClasspathFiles/previous b/project/target/streams/compile/_global/_global/dependencyClasspathFiles/previous
index aeb063f9..cb0933f2 100644
--- a/project/target/streams/compile/_global/_global/dependencyClasspathFiles/previous
+++ b/project/target/streams/compile/_global/_global/dependencyClasspathFiles/previous
@@ -1 +1 @@
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\ No newline at end of file
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\ No newline at end of file
diff --git a/project/target/streams/compile/dependencyClasspath/_global/streams/export b/project/target/streams/compile/dependencyClasspath/_global/streams/export
index f675617e..7a5c37b9 100644
--- a/project/target/streams/compile/dependencyClasspath/_global/streams/export
+++ b/project/target/streams/compile/dependencyClasspath/_global/streams/export
@@ -1 +1 @@
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diff --git a/project/target/streams/compile/externalDependencyClasspath/_global/streams/export b/project/target/streams/compile/externalDependencyClasspath/_global/streams/export
index b9ea789e..d4b92b6a 100644
--- a/project/target/streams/compile/externalDependencyClasspath/_global/streams/export
+++ b/project/target/streams/compile/externalDependencyClasspath/_global/streams/export
@@ -1 +1 @@
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diff --git a/project/target/streams/compile/managedClasspath/_global/streams/export b/project/target/streams/compile/managedClasspath/_global/streams/export
index b9ea789e..d4b92b6a 100644
--- a/project/target/streams/compile/managedClasspath/_global/streams/export
+++ b/project/target/streams/compile/managedClasspath/_global/streams/export
@@ -1 +1 @@
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diff --git a/project/target/streams/runtime/dependencyClasspath/_global/streams/export b/project/target/streams/runtime/dependencyClasspath/_global/streams/export
index 9327da1d..7b12b4ca 100644
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diff --git a/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export b/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export
index 8b137891..94a89648 100644
--- a/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export
+++ b/project/target/streams/runtime/externalDependencyClasspath/_global/streams/export
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diff --git a/project/target/streams/runtime/fullClasspath/_global/streams/export b/project/target/streams/runtime/fullClasspath/_global/streams/export
index 9327da1d..7b12b4ca 100644
--- a/project/target/streams/runtime/fullClasspath/_global/streams/export
+++ b/project/target/streams/runtime/fullClasspath/_global/streams/export
@@ -1 +1 @@
-/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/target/scala-2.12/sbt-1.0/classes:/home/waleedbinehsan/.sbt/1.0/plugins/target/scala-2.12/sbt-1.0/classes
+/home/waleedbinehsan/Desktop/SweRV-Chislified-master/project/target/scala-2.12/sbt-1.0/classes:/home/waleedbinehsan/.sbt/1.0/plugins/target/scala-2.12/sbt-1.0/classes:/home/waleedbinehsan/idea-IE-201.7846.105/plugins/Scala/repo/org.jetbrains/sbt-structure-extractor/scala_2.12/sbt_1.0/2018.2.1+4-88400d3f/jars/sbt-structure-extractor.jar:/home/waleedbinehsan/idea-IE-201.7846.105/plugins/Scala/repo/org.jetbrains/sbt-idea-shell/scala_2.12/sbt_1.0/2018.3/jars/sbt-idea-shell.jar:/home/waleedbinehsan/idea-IE-201.7846.105/plugins/Scala/repo/org.jetbrains/sbt-idea-compiler-indices/scala_2.12/sbt_1.0/0.1.3/jars/sbt-idea-compiler-indices.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/io/github/sugakandrey/scala-compiler-indices-protocol_2.12/0.1.1/scala-compiler-indices-protocol_2.12-0.1.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/io/spray/spray-json_2.12/1.3.4/spray-json_2.12-1.3.4.jar
diff --git a/project/target/streams/runtime/managedClasspath/_global/streams/export b/project/target/streams/runtime/managedClasspath/_global/streams/export
index 8b137891..94a89648 100644
--- a/project/target/streams/runtime/managedClasspath/_global/streams/export
+++ b/project/target/streams/runtime/managedClasspath/_global/streams/export
@@ -1 +1 @@
-
+/home/waleedbinehsan/idea-IE-201.7846.105/plugins/Scala/repo/org.jetbrains/sbt-structure-extractor/scala_2.12/sbt_1.0/2018.2.1+4-88400d3f/jars/sbt-structure-extractor.jar:/home/waleedbinehsan/idea-IE-201.7846.105/plugins/Scala/repo/org.jetbrains/sbt-idea-shell/scala_2.12/sbt_1.0/2018.3/jars/sbt-idea-shell.jar:/home/waleedbinehsan/idea-IE-201.7846.105/plugins/Scala/repo/org.jetbrains/sbt-idea-compiler-indices/scala_2.12/sbt_1.0/0.1.3/jars/sbt-idea-compiler-indices.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/io/github/sugakandrey/scala-compiler-indices-protocol_2.12/0.1.1/scala-compiler-indices-protocol_2.12-0.1.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/io/spray/spray-json_2.12/1.3.4/spray-json_2.12-1.3.4.jar
diff --git a/rvdffs.anno.json b/rvdffs.anno.json
new file mode 100644
index 00000000..658bbb95
--- /dev/null
+++ b/rvdffs.anno.json
@@ -0,0 +1,18 @@
+[
+ {
+ "class":"firrtl.EmitCircuitAnnotation",
+ "emitter":"firrtl.VerilogEmitter"
+ },
+ {
+ "class":"firrtl.options.TargetDirAnnotation",
+ "directory":"."
+ },
+ {
+ "class":"firrtl.options.OutputAnnotationFileAnnotation",
+ "file":"rvdffs"
+ },
+ {
+ "class":"firrtl.transforms.BlackBoxTargetDirAnno",
+ "targetDir":"."
+ }
+]
\ No newline at end of file
diff --git a/rvdffs.fir b/rvdffs.fir
new file mode 100644
index 00000000..396604c2
--- /dev/null
+++ b/rvdffs.fir
@@ -0,0 +1,78 @@
+;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
+circuit rvdffs :
+ module rvdffs :
+ input clock : Clock
+ input reset : UInt<1>
+ output io : {flip din : UInt<32>, flip en : UInt<1>, flip clear : UInt<1>, out : UInt}
+
+ wire _T : UInt<1>[32] @[el2_lib.scala 40:24]
+ _T[0] <= io.clear @[el2_lib.scala 40:24]
+ _T[1] <= io.clear @[el2_lib.scala 40:24]
+ _T[2] <= io.clear @[el2_lib.scala 40:24]
+ _T[3] <= io.clear @[el2_lib.scala 40:24]
+ _T[4] <= io.clear @[el2_lib.scala 40:24]
+ _T[5] <= io.clear @[el2_lib.scala 40:24]
+ _T[6] <= io.clear @[el2_lib.scala 40:24]
+ _T[7] <= io.clear @[el2_lib.scala 40:24]
+ _T[8] <= io.clear @[el2_lib.scala 40:24]
+ _T[9] <= io.clear @[el2_lib.scala 40:24]
+ _T[10] <= io.clear @[el2_lib.scala 40:24]
+ _T[11] <= io.clear @[el2_lib.scala 40:24]
+ _T[12] <= io.clear @[el2_lib.scala 40:24]
+ _T[13] <= io.clear @[el2_lib.scala 40:24]
+ _T[14] <= io.clear @[el2_lib.scala 40:24]
+ _T[15] <= io.clear @[el2_lib.scala 40:24]
+ _T[16] <= io.clear @[el2_lib.scala 40:24]
+ _T[17] <= io.clear @[el2_lib.scala 40:24]
+ _T[18] <= io.clear @[el2_lib.scala 40:24]
+ _T[19] <= io.clear @[el2_lib.scala 40:24]
+ _T[20] <= io.clear @[el2_lib.scala 40:24]
+ _T[21] <= io.clear @[el2_lib.scala 40:24]
+ _T[22] <= io.clear @[el2_lib.scala 40:24]
+ _T[23] <= io.clear @[el2_lib.scala 40:24]
+ _T[24] <= io.clear @[el2_lib.scala 40:24]
+ _T[25] <= io.clear @[el2_lib.scala 40:24]
+ _T[26] <= io.clear @[el2_lib.scala 40:24]
+ _T[27] <= io.clear @[el2_lib.scala 40:24]
+ _T[28] <= io.clear @[el2_lib.scala 40:24]
+ _T[29] <= io.clear @[el2_lib.scala 40:24]
+ _T[30] <= io.clear @[el2_lib.scala 40:24]
+ _T[31] <= io.clear @[el2_lib.scala 40:24]
+ node _T_1 = cat(_T[0], _T[1]) @[Cat.scala 29:58]
+ node _T_2 = cat(_T_1, _T[2]) @[Cat.scala 29:58]
+ node _T_3 = cat(_T_2, _T[3]) @[Cat.scala 29:58]
+ node _T_4 = cat(_T_3, _T[4]) @[Cat.scala 29:58]
+ node _T_5 = cat(_T_4, _T[5]) @[Cat.scala 29:58]
+ node _T_6 = cat(_T_5, _T[6]) @[Cat.scala 29:58]
+ node _T_7 = cat(_T_6, _T[7]) @[Cat.scala 29:58]
+ node _T_8 = cat(_T_7, _T[8]) @[Cat.scala 29:58]
+ node _T_9 = cat(_T_8, _T[9]) @[Cat.scala 29:58]
+ node _T_10 = cat(_T_9, _T[10]) @[Cat.scala 29:58]
+ node _T_11 = cat(_T_10, _T[11]) @[Cat.scala 29:58]
+ node _T_12 = cat(_T_11, _T[12]) @[Cat.scala 29:58]
+ node _T_13 = cat(_T_12, _T[13]) @[Cat.scala 29:58]
+ node _T_14 = cat(_T_13, _T[14]) @[Cat.scala 29:58]
+ node _T_15 = cat(_T_14, _T[15]) @[Cat.scala 29:58]
+ node _T_16 = cat(_T_15, _T[16]) @[Cat.scala 29:58]
+ node _T_17 = cat(_T_16, _T[17]) @[Cat.scala 29:58]
+ node _T_18 = cat(_T_17, _T[18]) @[Cat.scala 29:58]
+ node _T_19 = cat(_T_18, _T[19]) @[Cat.scala 29:58]
+ node _T_20 = cat(_T_19, _T[20]) @[Cat.scala 29:58]
+ node _T_21 = cat(_T_20, _T[21]) @[Cat.scala 29:58]
+ node _T_22 = cat(_T_21, _T[22]) @[Cat.scala 29:58]
+ node _T_23 = cat(_T_22, _T[23]) @[Cat.scala 29:58]
+ node _T_24 = cat(_T_23, _T[24]) @[Cat.scala 29:58]
+ node _T_25 = cat(_T_24, _T[25]) @[Cat.scala 29:58]
+ node _T_26 = cat(_T_25, _T[26]) @[Cat.scala 29:58]
+ node _T_27 = cat(_T_26, _T[27]) @[Cat.scala 29:58]
+ node _T_28 = cat(_T_27, _T[28]) @[Cat.scala 29:58]
+ node _T_29 = cat(_T_28, _T[29]) @[Cat.scala 29:58]
+ node _T_30 = cat(_T_29, _T[30]) @[Cat.scala 29:58]
+ node _T_31 = cat(_T_30, _T[31]) @[Cat.scala 29:58]
+ node _T_32 = and(io.din, _T_31) @[el2_ifu_ic_mem.scala 93:30]
+ reg _T_33 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+ when io.en : @[Reg.scala 28:19]
+ _T_33 <= _T_32 @[Reg.scala 28:23]
+ skip @[Reg.scala 28:19]
+ io.out <= _T_33 @[el2_ifu_ic_mem.scala 93:10]
+
diff --git a/rvdffs.v b/rvdffs.v
new file mode 100644
index 00000000..a4788128
--- /dev/null
+++ b/rvdffs.v
@@ -0,0 +1,70 @@
+module rvdffs(
+ input clock,
+ input reset,
+ input [31:0] io_din,
+ input io_en,
+ input io_clear,
+ output [31:0] io_out
+);
+`ifdef RANDOMIZE_REG_INIT
+ reg [31:0] _RAND_0;
+`endif // RANDOMIZE_REG_INIT
+ wire [9:0] _T_9 = {io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear}; // @[Cat.scala 29:58]
+ wire [18:0] _T_18 = {_T_9,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear}; // @[Cat.scala 29:58]
+ wire [27:0] _T_27 = {_T_18,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear,io_clear}; // @[Cat.scala 29:58]
+ wire [31:0] _T_31 = {_T_27,io_clear,io_clear,io_clear,io_clear}; // @[Cat.scala 29:58]
+ wire [31:0] _T_32 = io_din & _T_31; // @[el2_ifu_ic_mem.scala 93:30]
+ reg [31:0] _T_33; // @[Reg.scala 27:20]
+ assign io_out = _T_33; // @[el2_ifu_ic_mem.scala 93:10]
+`ifdef RANDOMIZE_GARBAGE_ASSIGN
+`define RANDOMIZE
+`endif
+`ifdef RANDOMIZE_INVALID_ASSIGN
+`define RANDOMIZE
+`endif
+`ifdef RANDOMIZE_REG_INIT
+`define RANDOMIZE
+`endif
+`ifdef RANDOMIZE_MEM_INIT
+`define RANDOMIZE
+`endif
+`ifndef RANDOM
+`define RANDOM $random
+`endif
+`ifdef RANDOMIZE_MEM_INIT
+ integer initvar;
+`endif
+`ifndef SYNTHESIS
+`ifdef FIRRTL_BEFORE_INITIAL
+`FIRRTL_BEFORE_INITIAL
+`endif
+initial begin
+ `ifdef RANDOMIZE
+ `ifdef INIT_RANDOM
+ `INIT_RANDOM
+ `endif
+ `ifndef VERILATOR
+ `ifdef RANDOMIZE_DELAY
+ #`RANDOMIZE_DELAY begin end
+ `else
+ #0.002 begin end
+ `endif
+ `endif
+`ifdef RANDOMIZE_REG_INIT
+ _RAND_0 = {1{`RANDOM}};
+ _T_33 = _RAND_0[31:0];
+`endif // RANDOMIZE_REG_INIT
+ `endif // RANDOMIZE
+end // initial
+`ifdef FIRRTL_AFTER_INITIAL
+`FIRRTL_AFTER_INITIAL
+`endif
+`endif // SYNTHESIS
+ always @(posedge clock) begin
+ if (reset) begin
+ _T_33 <= 32'h0;
+ end else if (io_en) begin
+ _T_33 <= _T_32;
+ end
+ end
+endmodule
diff --git a/src/main/scala/dec/el2_dec_dec_ctl.scala b/src/main/scala/dec/el2_dec_dec_ctl.scala
index 3407d605..0a0d95f4 100644
--- a/src/main/scala/dec/el2_dec_dec_ctl.scala
+++ b/src/main/scala/dec/el2_dec_dec_ctl.scala
@@ -168,6 +168,6 @@ class el2_dec_dec_ctl extends Module{
pattern(List(-6,4,-3,-2,1,0)).reduce(_&_)
}
-object dec extends App {
- println(chisel3.Driver.emitVerilog(new el2_dec_dec_ctl()))
-}
+//object dec extends App {
+// println((new chisel3.stage.ChiselStage).emitVerilog(new el2_dec_dec_ctl()))
+//}
diff --git a/src/main/scala/ifu/el2_ifu_bp_ctl.scala b/src/main/scala/ifu/el2_ifu_bp_ctl.scala
new file mode 100644
index 00000000..076052ae
--- /dev/null
+++ b/src/main/scala/ifu/el2_ifu_bp_ctl.scala
@@ -0,0 +1,19 @@
+package ifu
+
+import lib._
+import chisel3._
+import chisel3.util._
+
+class el2_ifu_bp_ctl extends Module with el2_lib {
+ val io = IO (new Bundle {
+ val in = Input(UInt(32.W))
+ val in2 = Input(UInt(32.W))
+ val out = Output(UInt())
+ })
+ io.out := el2_btb_ghr_hash(io.in,io.in2)
+}
+
+//object ifu_ic extends App {
+// println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_bp_ctl()))
+//}
+
diff --git a/src/main/scala/ifu/el2_ifu_ic_mem.scala b/src/main/scala/ifu/el2_ifu_ic_mem.scala
new file mode 100644
index 00000000..a4a12ea3
--- /dev/null
+++ b/src/main/scala/ifu/el2_ifu_ic_mem.scala
@@ -0,0 +1,226 @@
+package ifu
+import lib._
+import chisel3._
+import chisel3.util._
+
+class el2_ifu_ic_mem extends Module with param{
+ val io = IO(new Bundle{
+ val clk = Input(Bool())
+ val rst_l = Input(Bool())
+ val clk_override = Input(Bool())
+ val dec_tlu_core_ecc_disable = Input(Bool())
+ val ic_rw_addr = Input(UInt(31.W))
+ val ic_wr_en = Input(UInt(ICACHE_NUM_WAYS.W))
+ val ic_rd_en = Input(Bool())
+ val ic_debug_addr = Input(UInt((ICACHE_INDEX_HI-3).W))
+ val ic_debug_rd_en = Input(Bool())
+ val ic_debug_wr_en = Input(Bool())
+ val ic_debug_tag_array = Input(Bool())
+ val ic_debug_way = Input(UInt(ICACHE_NUM_WAYS.W))
+ val ic_premux_data = Input(UInt(64.W))
+ val ic_sel_premux_data = Input(Bool())
+ val ic_wr_data = Vec(ICACHE_BANKS_WAY, Input(UInt(71.W)))
+ val ic_rd_data = Output(UInt(64.W))
+ val ic_debug_rd_data = Output(UInt(71.W))
+ val ictag_debug_rd_data = Output(UInt(26.W))
+ val ic_debug_wr_data = Input(UInt(71.W))
+ val ic_eccerr = Output(UInt(ICACHE_BANKS_WAY.W))
+ val ic_parerr = Output(UInt(ICACHE_BANKS_WAY.W))
+ val ic_tag_valid = Input(UInt(ICACHE_NUM_WAYS.W))
+ val ic_rd_hit = Output(UInt(ICACHE_NUM_WAYS.W))
+ val ic_tag_perr = Output(Bool())
+ val scan_mode = Input(Bool())
+ })
+ io.ic_tag_perr := 0.U
+ io.ic_rd_hit := 0.U
+ io.ic_parerr := 0.U
+ io.ic_eccerr := 0.U
+ io.ictag_debug_rd_data := 0.U
+ io.ic_debug_rd_data := 0.U
+ io.ic_rd_data := 0.U
+ //val icache_tag = Module(new kncpa)
+}
+
+/////////// ICACHE TAG
+class EL2_IC_TAG extends Module with el2_lib with param {
+ val io = IO(new Bundle{
+ val clk = Input(Bool())
+ val rst_l = Input(Bool())
+ val clk_override = Input(Bool())
+ val dec_tlu_core_ecc_disable = Input(Bool())
+ val ic_rw_addr = Input(UInt(32.W)) // TODO : In SV we have 31:3 what should we do here
+ val ic_wr_en = Input(UInt(ICACHE_NUM_WAYS.W))
+ val ic_tag_valid = Input(UInt(ICACHE_NUM_WAYS.W))
+ val ic_rd_en = Input(Bool())
+ val ic_debug_addr = Input(UInt((ICACHE_INDEX_HI+1).W))
+ val ic_debug_rd_en = Input(Bool())
+ val ic_debug_wr_en = Input(Bool())
+ val ic_debug_tag_array = Input(Bool())
+ val ic_debug_way = Input(UInt(ICACHE_NUM_WAYS.W))
+ val ictag_debug_rd_data = Output(UInt(26.W))
+ val ic_debug_wr_data = Input(UInt(71.W))
+ val ic_rd_hit = Output(UInt(ICACHE_NUM_WAYS.W))
+ val ic_tag_perr = Output(Bool())
+ val scan_mode = Input(Bool())
+
+ val test = Output(UInt(26.W))
+ val test_ecc_data_out = Output(Vec(ICACHE_NUM_WAYS,UInt(32.W)))
+ val test_ecc_out = Output(Vec(ICACHE_NUM_WAYS,UInt(7.W)))
+ val test_ecc_sb_out = Output(Vec(ICACHE_NUM_WAYS,UInt(1.W)))
+ val test_ecc_db_out = Output(Vec(ICACHE_NUM_WAYS,UInt(1.W)))
+ })
+
+ val ic_tag_wren = io.ic_wr_en & repl(ICACHE_NUM_WAYS, io.ic_rw_addr(ICACHE_BEAT_ADDR_HI,4)===
+ repl(ICACHE_NUM_WAYS-1, 1.U))
+ val ic_debug_rd_way_en = repl(ICACHE_NUM_WAYS, io.ic_debug_rd_en & io.ic_debug_tag_array) & io.ic_debug_way
+ val ic_debug_wr_way_en = repl(ICACHE_NUM_WAYS, io.ic_debug_wr_en & io.ic_debug_tag_array) & io.ic_debug_way
+ val ic_tag_clken = repl(ICACHE_NUM_WAYS,io.ic_rd_en | io.clk_override) | io.ic_wr_en | ic_debug_wr_way_en |
+ ic_debug_rd_way_en
+ val ic_rd_en_ff = RegNext(io.ic_rd_en, init=0.U)
+ val ic_rw_addr_ff = RegNext(io.ic_rw_addr, init=0.U)
+ val PAD_BITS = 21 - (32 - ICACHE_TAG_LO)
+ val ic_tag_wren_q = ic_tag_wren | ic_debug_wr_way_en
+ val ic_tag_ecc = Wire(UInt(7.W))
+ val ic_tag_wr_data = Wire(UInt(26.W))
+ val ic_tag_parity = Wire(UInt(1.W))
+ ic_tag_ecc := 0.U
+ ic_tag_wr_data := 0.U
+ ic_tag_parity := 0.U
+ when((ICACHE_TAG_LO == 11).B){
+ when(ICACHE_ECC.B){
+ ic_tag_ecc := rvecc_encode(Cat(repl(ICACHE_TAG_LO,0.U) , io.ic_rw_addr(31,ICACHE_TAG_LO)))
+ ic_tag_wr_data := Mux(io.ic_debug_wr_en & io.ic_debug_tag_array,
+ Cat(io.ic_debug_wr_data(68,64), io.ic_debug_wr_data(31,11)) ,
+ Cat(ic_tag_ecc(4,0), io.ic_rw_addr(31,ICACHE_TAG_LO)))
+ }
+ .otherwise{
+ ic_tag_parity := rveven_paritygen(io.ic_rw_addr(31,ICACHE_TAG_LO))
+ ic_tag_wr_data := Mux(io.ic_debug_wr_en & io.ic_debug_tag_array,
+ Cat(io.ic_debug_wr_data(68,64), io.ic_debug_wr_data(31,11)) ,
+ Cat(ic_tag_ecc(4,0), io.ic_rw_addr(31,ICACHE_TAG_LO)))
+ }
+ }
+
+ .otherwise{
+ when(ICACHE_ECC.B){
+ ic_tag_ecc := rvecc_encode(Cat(repl(ICACHE_TAG_LO,0.U) , io.ic_rw_addr(31,ICACHE_TAG_LO)))
+ ic_tag_wr_data := Mux(io.ic_debug_wr_en & io.ic_debug_tag_array,
+ Cat(io.ic_debug_wr_data(68,64), io.ic_debug_wr_data(31,11)) ,
+ Cat(ic_tag_ecc(4,0), repl(PAD_BITS,0.U), io.ic_rw_addr(31,ICACHE_TAG_LO)))
+ }
+ .otherwise{
+ ic_tag_parity := rveven_paritygen(io.ic_rw_addr(31,ICACHE_TAG_LO))
+ ic_tag_wr_data := Mux(io.ic_debug_wr_en & io.ic_debug_tag_array,
+ Cat(io.ic_debug_wr_data(68,64), io.ic_debug_wr_data(31,11)) ,
+ Cat(ic_tag_ecc(4,0), repl(PAD_BITS,0.U), io.ic_rw_addr(31,ICACHE_TAG_LO)))
+ }
+ }
+
+ val ic_rw_addr_q = Mux(io.ic_debug_rd_en | io.ic_debug_wr_en,
+ io.ic_debug_addr(ICACHE_INDEX_HI, ICACHE_TAG_INDEX_LO),
+ io.ic_rw_addr(ICACHE_INDEX_HI, ICACHE_TAG_INDEX_LO))
+
+ val ic_debug_rd_way_en_ff = RegNext(ic_debug_rd_way_en, init = 0.U)
+
+ val ic_way_tag = if(ICACHE_ECC) SyncReadMem(ICACHE_TAG_DEPTH, Vec(ICACHE_NUM_WAYS, UInt(26.W)))
+ else SyncReadMem(ICACHE_TAG_DEPTH, Vec(ICACHE_NUM_WAYS, UInt(22.W)))
+ //val ic_tag_data_raw = if(ICACHE_ECC) Vec(ICACHE_NUM_WAYS, UInt(26.W)) else Vec(ICACHE_NUM_WAYS, UInt(22.W))
+
+ val write_data = VecInit.tabulate(ICACHE_NUM_WAYS)(i => ic_tag_wr_data)
+
+ val mem_mask = VecInit.tabulate(ICACHE_NUM_WAYS)(i => ic_tag_wren_q(i) & ic_tag_clken(i))
+
+ ic_way_tag.write(ic_rw_addr_q, write_data, mem_mask)
+
+ val ic_tag_data_raw = ic_way_tag.read(ic_rw_addr_q, 1.B)
+ //val w_tout = Wire(UInt(32.W))
+ val w_tout = if(ICACHE_ECC)ic_tag_data_raw.map(x=>Cat(ic_tag_data_raw(x)(25,21),ic_tag_data_raw(x)(31-ICACHE_TAG_LO,0),0.U(13.W)))
+ else ic_tag_data_raw.map(x=>Cat(0.U(4.W),ic_tag_data_raw(x)(32),ic_tag_data_raw(x)(31-ICACHE_TAG_LO,0),0.U(13.W)))
+
+ val ecc_decode = new Array[rvecc_decode](ICACHE_NUM_WAYS)
+ val parcheck = new Array[UInt](ICACHE_NUM_WAYS)
+ val ic_tag_corrected_data_unc = Wire(Vec(ICACHE_NUM_WAYS, UInt(32.W)))
+ val ic_tag_corrected_ecc_unc = Wire(Vec(ICACHE_NUM_WAYS, UInt(7.W)))
+ val ic_tag_single_ecc_error = Wire(Vec(ICACHE_NUM_WAYS, UInt(1.W)))
+ val ic_tag_double_ecc_error = Wire(Vec(ICACHE_NUM_WAYS, UInt(1.W)))
+
+ val ic_tag_way_perr = VecInit.tabulate(ICACHE_NUM_WAYS)(i => rveven_paritycheck(w_tout(i)(31,ICACHE_TAG_LO),w_tout(i)(31)))
+ for(i <- 0 until ICACHE_NUM_WAYS) {
+ ecc_decode(i) = Module(new rvecc_decode())
+ ecc_decode(i).io.en := ~io.dec_tlu_core_ecc_disable & ic_rd_en_ff
+ ecc_decode(i).io.sed_ded := 1.U
+ ecc_decode(i).io.din := Cat(0.U(11.W),ic_tag_data_raw(i)(20,0))
+ ecc_decode(i).io.ecc_in := Cat(0.U(2.W),ic_tag_data_raw(i)(25,21))
+
+ ic_tag_corrected_data_unc := io.test_ecc_data_out
+ ic_tag_corrected_ecc_unc := io.test_ecc_out
+ ic_tag_single_ecc_error := io.test_ecc_sb_out
+ ic_tag_double_ecc_error := io.test_ecc_db_out
+
+ io.test_ecc_data_out(i) := ecc_decode(i).io.dout
+ io.test_ecc_out(i) := ecc_decode(i).io.ecc_out
+ io.test_ecc_sb_out(i) := ecc_decode(i).io.single_ecc_error
+ io.test_ecc_db_out(i) := ecc_decode(i).io.double_ecc_error
+
+ ic_tag_way_perr(i) := ic_tag_single_ecc_error(i) | ic_tag_double_ecc_error(i)
+ }
+ val temp = if(ICACHE_ECC)
+ VecInit.tabulate(ICACHE_NUM_WAYS)(i=>repl(26,ic_debug_rd_way_en_ff(i))&ic_tag_data_raw(i)).reduce(_|_)
+ else
+ VecInit.tabulate(ICACHE_NUM_WAYS)(i=>Cat(0.U(4.W),repl(22,ic_debug_rd_way_en_ff(i))&ic_tag_data_raw(i))).reduce(_|_)
+
+ for(i <- 0 until ICACHE_NUM_WAYS){
+ repl(26,ic_debug_rd_way_en_ff(i))&ic_tag_data_raw(i)
+ }
+ io.ictag_debug_rd_data := temp
+ io.test := w_tout.reduce(_&_)
+ io.ic_tag_perr := (ic_tag_way_perr.reduce(Cat(_,_)) & io.ic_tag_valid).orR
+ val w_tout_Vec = VecInit.tabulate(ICACHE_NUM_WAYS)(i=> w_tout(i))
+ io.ic_rd_hit := VecInit.tabulate(ICACHE_NUM_WAYS)(i=>(w_tout_Vec(i)(31,ICACHE_TAG_LO)===ic_rw_addr_ff(31,ICACHE_TAG_LO)).asUInt() & io.ic_tag_valid).reduce(Cat(_,_))
+}
+
+
+
+class EL2_IC_DATA extends Module with param{
+ val io = IO (new Bundle{
+ val rst_l = Input(UInt(1.W))
+ val clk_override = Input(UInt(1.W))
+ val ic_rw_addr = Input(UInt(ICACHE_INDEX_HI.W))
+ val ic_wr_en = Input(UInt(ICACHE_NUM_WAYS.W))
+ val ic_rd_en = Input(UInt(1.W))
+ val ic_wr_data = Input(Vec(ICACHE_NUM_WAYS, UInt(71.W)))
+ val ic_rd_data = Output(UInt(64.W))
+ val ic_debug_wr_data = Input(UInt(71.W))
+ val ic_debug_rd_data = Output(UInt(71.W))
+ val ic_parerr = Output(UInt(ICACHE_NUM_WAYS.W))
+ val ic_eccerr = Output(UInt(ICACHE_BANKS_WAY.W))
+ val ic_debug_addr = Input(UInt((ICACHE_INDEX_HI+3).W))
+ val ic_debug_rd_en = Input(UInt(1.W))
+ val ic_debug_wr_en = Input(UInt(1.W))
+ val ic_debug_tag_array = Input(UInt(1.W))
+ val ic_debug_way = Input(UInt(ICACHE_NUM_WAYS.W))
+ val ic_premux_data = Input(UInt(64.W))
+ val ic_sel_premux_data = Input(UInt(1.W))
+ val ic_rd_hit = Input(UInt(ICACHE_NUM_WAYS.W))
+ val scan_mode = Input(UInt(1.W))
+ val mask = Input(Vec(2,Vec(2,Bool())))
+ })
+
+
+ // val data_memory = VecInit.tabulate(ICACHE_BANKS_WAY)(i => SyncReadMem(ICACHE_DATA_DEPTH, Vec(ICACHE_NUM_WAYS, UInt(26.W))))
+ // SyncReadMem(ICACHE_TAG_DEPTH, Vec(ICACHE_NUM_WAYS, UInt(22.W)))
+ val mask = VecInit.tabulate(ICACHE_NUM_WAYS)(i=>1.U)
+ val data_mem = (SyncReadMem(ICACHE_DATA_DEPTH, Vec(ICACHE_NUM_WAYS, UInt(26.W))), SyncReadMem(ICACHE_DATA_DEPTH, Vec(ICACHE_NUM_WAYS, UInt(26.W))))
+ data_mem(0).write(io.ic_rw_addr,io.ic_wr_data,mask)
+// ic_memory.write(io.ic_rw_addr, io.ic_wr_data, io.mask)
+ io.ic_debug_rd_data := 0.U
+ io.ic_rd_data := 0.U
+ io.ic_eccerr := 0.U
+ io.ic_parerr := 0.U
+
+
+}
+
+object ifu_ic extends App {
+ println((new chisel3.stage.ChiselStage).emitVerilog(new EL2_IC_DATA()))
+}
\ No newline at end of file
diff --git a/src/main/scala/ifu/test.sc b/src/main/scala/ifu/test.sc
new file mode 100644
index 00000000..f6633a75
--- /dev/null
+++ b/src/main/scala/ifu/test.sc
@@ -0,0 +1 @@
+val a = 5
\ No newline at end of file
diff --git a/src/main/scala/lib/GCD.scala b/src/main/scala/lib/GCD.scala
new file mode 100644
index 00000000..7cb03f12
--- /dev/null
+++ b/src/main/scala/lib/GCD.scala
@@ -0,0 +1,123 @@
+package lib
+
+import chisel3._
+import chisel3.util._
+/*
+///////////////////////////////////////////////////////////////
+class rvdff(val Width:Int = 1, val short:Int = 0) extends Module with RequireAsyncReset {
+ val io = IO(new Bundle {
+ val in = Input(UInt(Width.W))
+ val out = Output(UInt())
+ })
+ val inter = if(short==0) RegNext(io.in, init =0.U) else io.in
+ io.out := inter
+}
+
+/////////////////////////////////////////////////////////////
+class caller extends Module {
+ val io = IO(new Bundle {
+ val in = Input(UInt(32.W))
+ val out = Output(UInt())
+ })
+ val u0 = Module(new rvdff(32))
+ io <> u0.io
+}
+
+///////////////////////////////////////////////////////////////
+class reg1 extends Module with RequireAsyncReset{
+ val io = IO(new Bundle{
+ val in = Input(Bool())
+ val out = Output(Bool())
+ })
+
+ io.out := RegNext(io.in, init = 0.U)
+}
+
+class top extends Module with RequireAsyncReset{
+ val io = IO(new Bundle{
+ val in = Input(Bool())
+ val out = Output(Bool())
+ })
+ val negReset = (~reset.asBool).asAsyncReset
+ val r0 = Module(new reg1)
+ r0.io<>io
+ r0.reset := negReset
+}
+///////////////////////////////////////////////////////////////
+class rvbradder() extends Module {
+ val io = IO(new Bundle {
+ val pc = Input(UInt(31.W))
+ val offset = Input(UInt(12.W))
+ val dout = Output(UInt())
+ })
+ val inter = io.pc(11,0) +& io.offset
+ val cout = inter(inter.getWidth-1)
+ val pc_inc = io.pc(io.pc.getWidth-1, 12) + 1.U
+ val pc_dec = io.pc(io.pc.getWidth-1, 12) - 1.U
+ val sign = io.offset(io.offset.getWidth -1)
+
+ io.dout:= Cat(Fill(19,(sign ^(~cout))) & io.pc(io.pc.getWidth-1,12) |
+ (Fill(19,(~sign & cout)) & pc_inc) |
+ (Fill(19,(sign & ~cout)) & pc_dec) , inter(inter.getWidth-2,0))
+}
+
+///////////////////////////////////////////////////////////////
+class encoder_generator(val width:Int=4) extends Module {
+ val io = IO (new Bundle {
+ val in = Input (UInt(width.W))
+ val out = Output (UInt(log2Ceil(width).W))
+ })
+ var z:Array[UInt] = new Array[UInt](width)
+ for(i<- 0 until width){
+ z(i) = i.U
+ }
+ io.out := Mux1H(io.in , z)
+}
+
+///////////////////////////////////////////////////////////////
+class rvrangecheck(val CCM_SADR:Int = 0, val CCM_SIZE:Int = 128) extends Module {
+ val io = IO(new Bundle {
+ val addr = Input(UInt(32.W))
+ val in_range = Output(Bool())
+ val in_region = Output(Bool())
+ //val test = Output(UInt())
+ })
+ val start_addr = (CCM_SADR.U)(32.W)
+ val region = start_addr(31,28)
+ val MASK_BITS = 10+log2Ceil(CCM_SIZE)
+ io.in_region := io.addr(31,28) === region
+ val inter = if(CCM_SIZE == 48) io.addr(31, MASK_BITS) === start_addr(31, MASK_BITS) & ~(io.addr(MASK_BITS-1,MASK_BITS-2).andR)
+ else (io.addr(31,MASK_BITS)===start_addr(31,MASK_BITS))
+ io.in_range := inter
+}
+
+
+
+////////////////////////////////////////////////////////////////
+class tocopy extends Module{
+ val io = IO(new Bundle {
+ val in1 = Input(UInt(1.W))
+ val in2 = Input(UInt(1.W))
+ val out = Output(UInt())
+ })
+ io.out := io.in1 +& io.in2
+}
+class exp extends Module{
+ val io = IO(new Bundle{
+ val in1 = Input(UInt(1.W))
+ val in2 = Input(UInt(1.W))
+ val out = Output(UInt())
+ })
+
+ val mod_array= new Array[tocopy](2)
+ mod_array(0) = Module(new tocopy)
+ mod_array(0).io.in1:=io.in1
+ mod_array(0).io.in2:=io.in2
+ mod_array(1) = Module(new tocopy)
+ mod_array(1).io.in1:=io.in1
+ mod_array(1).io.in2:=io.in2
+ io.out:= mod_array(0).io.out +& mod_array(1).io.out
+}
+////////////////////////////////////////////////////////////////
+
+//println((new chisel3.stage.ChiselStage).emitVerilog(new exp))*/
\ No newline at end of file
diff --git a/src/main/scala/lib/beh_lib.scala b/src/main/scala/lib/beh_lib.scala
index a41e510e..24182ace 100644
--- a/src/main/scala/lib/beh_lib.scala
+++ b/src/main/scala/lib/beh_lib.scala
@@ -21,6 +21,42 @@ class rvdff(WIDTH:Int=1,SHORT:Int=0) extends Module{
class rvsyncss(WIDTH:Int = 251,SHORT:Int = 0) extends Module{ //Done for verification and testing
+
+class rvdff(WIDTH:Int=1,SHORT:Int=0) extends Module{
+ val io = IO(new Bundle{
+val din = Input(UInt(WIDTH.W))
+val dout = Output(UInt(WIDTH.W))
+})
+
+val flop = RegNext(io.din,0.U)
+
+if(SHORT == 1)
+{io.dout := io.din}
+else
+{io.dout := flop}
+}
+
+class rvdffsc extends Module with el2_lib {
+ val io = IO(new Bundle{
+ val din = Input(UInt(32.W))
+ val en = Input(Bool())
+ val clear = Input(Bool())
+ val out = Output(UInt())
+ })
+ io.out := RegEnable(io.din & repl(io.din.getWidth, io.clear), 0.U, io.en)
+}
+
+class rvdffs extends Module with el2_lib {
+ val io = IO(new Bundle{
+ val din = Input(UInt(32.W))
+ val en = Input(Bool())
+ val clear = Input(Bool())
+ val out = Output(UInt())
+ })
+ io.out := RegEnable(io.din, 0.U, io.en)
+}
+
+class rvsyncss(WIDTH:Int = 251,SHORT:Int = 0) extends Module with RequireAsyncReset{ //Done for verification and testing
val io = IO(new Bundle{
val din = Input(UInt(WIDTH.W))
val dout = Output(UInt(WIDTH.W))
@@ -31,6 +67,9 @@ class rvsyncss(WIDTH:Int = 251,SHORT:Int = 0) extends Module{ //Done for verifi
{io.dout := io.din }
else
{io.dout := sync_ff2 }
+ { io.dout := io.din }
+ else
+ { io.dout := sync_ff2 }
}
@@ -335,10 +374,239 @@ class rvbsadder extends Module{ //Done for verification and testing
cg.io.scan_mode := scan_mode
cg.io.l1clk
}
+
+
+class rvbsadder extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val pc = Input(UInt(32.W)) // lsb is not using in code
+ val offset = Input(UInt(13.W)) // lsb is not using in code
+ val dout = Output(UInt(31.W))
+ })
+ val w1 = Cat("b0".U,io.pc(12,1)) + Cat("b0".U,io.offset(12,1)) //w1[12] =cout offset[12]=sign
+
+ val dout_upper = ((Fill(19, ~(io.offset(12) ^ w1(12))))& io.pc(31,13)) |
+ ((Fill(19, ~io.offset(12) ^ w1(12))) & (io.pc(31,13)+1.U)) |
+ ((Fill(19, io.offset(12) ^ ~w1(12))) & (io.pc(31,13)-1.U))
+ io.dout := Cat(dout_upper,w1(11,0))
}
+
+class rvtwoscomp(WIDTH:Int=32) extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val din = Input(UInt(WIDTH.W))
+ val dout = Output(UInt(WIDTH.W))
+ })
+
+
+ val temp = Wire(Vec(WIDTH-1,UInt(1.W)))
+ val i:Int = 1
+
+ for(i <- 1 to WIDTH-1){
+ val done = io.din(i-1,0).orR
+ temp(i-1) := Mux(done ,~io.din(i),io.din(i))
+ }
+ io.dout := Cat(temp.asUInt,io.din(0))
+}
+
+
+class rvmaskandmatch(WIDTH:Int=32) extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val mask = Input(UInt(WIDTH.W))
+ val data = Input(UInt(WIDTH.W))
+ val masken = Input(UInt(1.W))
+ val match_out = Output(UInt(1.W))
+ })
+
+ val matchvec = Wire(Vec(WIDTH,UInt(1.W)))
+ val masken_or_fullmask = io.masken.asBool & ~io.mask(WIDTH-1,0).andR
+
+ matchvec(0) := masken_or_fullmask | (io.mask(0) === io.data(0)).asUInt
+
+ for(i <- 1 to WIDTH-1)
+ {matchvec(i) := Mux(io.mask(i-1,0).andR & masken_or_fullmask,"b1".U,(io.mask(i) === io.data(i)).asUInt)}
+ io.match_out := matchvec.asUInt
+}
+
+
+
+
+class rvrangecheck(CCM_SADR:Int=0, CCM_SIZE:Int=128) extends Module{
+ val io = IO(new Bundle{
+ val addr = Input(UInt(32.W))
+ val in_range = Output(UInt(1.W))
+ val in_region = Output(UInt(1.W))
+ })
+ val REGION_BITS = 4
+ val MASK_BITS = 10 + log2Ceil(CCM_SIZE)
+
+ val start_addr = Wire(UInt(32.W))
+ start_addr := CCM_SIZE.U
+ val region = start_addr(31,(32-REGION_BITS))
+
+ io.in_region := (io.addr(31,(32-REGION_BITS)) === region(REGION_BITS-1,0)).asUInt
+ if(CCM_SIZE == 48)
+ io.in_range := (io.addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt & ~(io.addr(MASK_BITS-1,MASK_BITS-2).andR.asUInt)
+ else
+ io.in_range := (io.addr(31,MASK_BITS) === start_addr(31,MASK_BITS)).asUInt
+}
+
+
+
+// DONE
+class rveven_paritygen(WIDTH:Int= 16) extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val data_in = Input (UInt(WIDTH.W))
+ val parity_out = Output(UInt(1.W))
+ })
+ io.parity_out := io.data_in.xorR.asUInt
+} // DONE
+
+
+// DONE
+class rveven_paritycheck(WIDTH:Int= 16) extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val data_in = Input (UInt(WIDTH.W))
+ val parity_in = Input (UInt(1.W))
+ val parity_err = Output(UInt(1.W))
+ })
+ io.parity_err := (io.data_in.xorR.asUInt) ^ io.parity_in
+} // DONE
+
+
+
+class rvecc_encode extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val din = Input(UInt(32.W))
+ val ecc_out = Output(UInt(7.W))
+ })
+ val mask0 = Array(0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,1,0,1,1)
+ val mask1 = Array(1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,1,1,0,1)
+ val mask2 = Array(1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,0)
+ val mask3 = Array(0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,0,0,0,0)
+ val mask4 = Array(0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0)
+ val mask5 = Array(1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0)
+ val w0 = Wire(Vec(18,UInt(1.W)))
+ val w1 = Wire(Vec(18,UInt(1.W)))
+ val w2 = Wire(Vec(18,UInt(1.W)))
+ val w3 = Wire(Vec(15,UInt(1.W)))
+ val w4 = Wire(Vec(15,UInt(1.W)))
+ val w5 = Wire(Vec(6, UInt(1.W)))
+ var j = 0;var k = 0;var m = 0;
+ var x = 0;var y = 0;var z = 0
+
+ for(i <- 0 to 31)
+ {
+ if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 }
+ if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 }
+ if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 }
+ if(mask3(i)==1) {w3(x) := io.din(i); x = x +1 }
+ if(mask4(i)==1) {w4(y) := io.din(i); y = y +1 }
+ if(mask5(i)==1) {w5(z) := io.din(i); z = z +1 }
+ }
+ val w6 = Cat((w0.asUInt.xorR),(w1.asUInt.xorR),(w2.asUInt.xorR),(w3.asUInt.xorR),(w4.asUInt.xorR),(w5.asUInt.xorR))
+ io.ecc_out := Cat(io.din.xorR ^ w6.xorR, w6)
+}
+
+
+// Make generator and then make it a method
+class rvecc_decode extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val en = Input(UInt(1.W))
+ val din = Input(UInt(32.W))
+ val ecc_in = Input(UInt(7.W))
+ val sed_ded = Input(UInt(1.W))
+ val ecc_out = Output(UInt(7.W))
+ val dout = Output(UInt(32.W))
+ val single_ecc_error = Output(UInt(1.W))
+ val double_ecc_error = Output(UInt(1.W))
+ })
+ val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0)
+ val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1)
+ val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1)
+ val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0)
+ val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0)
+ val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1)
+
+ val w0 = Wire(Vec(18,UInt(1.W)))
+ val w1 = Wire(Vec(18,UInt(1.W)))
+ val w2 = Wire(Vec(18,UInt(1.W)))
+ val w3 = Wire(Vec(15,UInt(1.W)))
+ val w4 = Wire(Vec(15,UInt(1.W)))
+ val w5 = Wire(Vec(6,UInt(1.W)))
+
+ var j = 0;var k = 0;var m = 0; var n =0;
+ var x = 0;var y = 0;
+
+ for(i <- 0 to 31)
+ {
+ if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 }
+ if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 }
+ if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 }
+ if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 }
+ if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 }
+ if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 }
+ }
+
+ val ecc_check = Cat((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded ,io.ecc_in(5)^(w5.asUInt.xorR),io.ecc_in(4)^(w4.asUInt.xorR),io.ecc_in(3)^(w3.asUInt.xorR),io.ecc_in(2)^(w2.asUInt.xorR),io.ecc_in(1)^(w1.asUInt.xorR),io.ecc_in(0)^(w0.asUInt.xorR))
+ io.ecc_out := ecc_check
+
+ io.single_ecc_error := io.en & (ecc_check!= 0.U) & ((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded)
+ io.double_ecc_error := io.en & (ecc_check!= 0.U) & ((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded)
+ val error_mask = Wire(Vec(39,UInt(1.W)))
+
+ for(i <- 1 until 40){
+ error_mask(i-1) := ecc_check(5,0) === i.asUInt
+ }
+ val din_plus_parity = Cat(io.ecc_in(6), io.din(31,26), io.ecc_in(5), io.din(25,11), io.ecc_in(4), io.din(10,4), io.ecc_in(3), io.din(3,1), io.ecc_in(2), io.din(0), io.ecc_in(1,0))
+ val dout_plus_parity = Mux(io.single_ecc_error.asBool, (error_mask.asUInt ^ din_plus_parity), din_plus_parity)
+
+ io.dout := Cat(dout_plus_parity(37,32),dout_plus_parity(30,16), dout_plus_parity(14,8), dout_plus_parity(6,4), dout_plus_parity(2))
+ io.ecc_out := Cat(dout_plus_parity(38) ^ (ecc_check(6,0) === "b1000000".U), dout_plus_parity(31), dout_plus_parity(15), dout_plus_parity(7), dout_plus_parity(3), dout_plus_parity(1,0))
+}
+
+
+
+
+
+
+class rvecc_encode_64 extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val din = Input(UInt(64.W))
+ val ecc_out = Output(UInt(7.W))
+ })
+ val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1)
+ val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1)
+ val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1)
+ val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
+ val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
+ val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
+ val mask6 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1)
+
+ val w0 = Wire(Vec(35,UInt(1.W)))
+ val w1 = Wire(Vec(35,UInt(1.W)))
+ val w2 = Wire(Vec(35,UInt(1.W)))
+ val w3 = Wire(Vec(31,UInt(1.W)))
+ val w4 = Wire(Vec(31,UInt(1.W)))
+ val w5 = Wire(Vec(31,UInt(1.W)))
+ val w6 = Wire(Vec(7, UInt(1.W)))
+
+ var j = 0;var k = 0;var m = 0; var n =0;
+ var x = 0;var y = 0;var z = 0
+
+ for(i <- 0 to 63)
+ {
+ if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 }
+ if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 }
+ if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 }
+ if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 }
+ if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 }
+ if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 }
+ if(mask6(i)==1) {w6(z) := io.din(i); z = z +1 }
+ }
+ io.ecc_out := Cat((w0.asUInt.xorR),(w1.asUInt.xorR),(w2.asUInt.xorR),(w3.asUInt.xorR),(w4.asUInt.xorR),(w5.asUInt.xorR),(w6.asUInt.xorR))
+}
////Instantiation example///////////////Can be use if using class instead of function rvdffe
class my_class extends Module{
val io = IO(new Bundle {
@@ -363,6 +631,46 @@ object main extends App{
+class rvecc_decode_64 extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val en = Input(UInt(1.W))
+ val din = Input(UInt(64.W))
+ val ecc_in = Input(UInt(7.W))
+ val ecc_error = Output(UInt(1.W))
+ })
+ val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1)
+ val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1)
+ val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1)
+ val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
+ val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
+ val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0)
+ val mask6 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1)
+
+ val w0 = Wire(Vec(35,UInt(1.W)))
+ val w1 = Wire(Vec(35,UInt(1.W)))
+ val w2 = Wire(Vec(35,UInt(1.W)))
+ val w3 = Wire(Vec(31,UInt(1.W)))
+ val w4 = Wire(Vec(31,UInt(1.W)))
+ val w5 = Wire(Vec(31,UInt(1.W)))
+ val w6 = Wire(Vec(7, UInt(1.W)))
+
+ var j = 0;var k = 0;var m = 0; var n =0;
+ var x = 0;var y = 0;var z = 0
+
+ for(i <- 0 to 63)
+ {
+ if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 }
+ if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 }
+ if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 }
+ if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 }
+ if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 }
+ if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 }
+ if(mask6(i)==1) {w6(z) := io.din(i); z = z +1 }
+ }
+
+ val ecc_check = Cat((io.ecc_in(6) ^ w5.asUInt.xorR) ,io.ecc_in(5)^(w5.asUInt.xorR),io.ecc_in(4)^(w4.asUInt.xorR),io.ecc_in(3)^(w3.asUInt.xorR),io.ecc_in(2)^(w2.asUInt.xorR),io.ecc_in(1)^(w1.asUInt.xorR),io.ecc_in(0)^(w0.asUInt.xorR))
+ io.ecc_error := io.en & (ecc_check(6,0) != 0.U)
+}
diff --git a/src/main/scala/lib/el2_lib.scala b/src/main/scala/lib/el2_lib.scala
new file mode 100644
index 00000000..abc77fa3
--- /dev/null
+++ b/src/main/scala/lib/el2_lib.scala
@@ -0,0 +1,278 @@
+package lib
+import chisel3._
+import chisel3.util._
+trait param {
+ val BHT_ADDR_HI = 9
+ val BHT_ADDR_LO = 2
+ val BHT_ARRAY_DEPTH = 256
+ val BHT_GHR_HASH_1 = false
+ val BHT_GHR_SIZE = 8
+ val BHT_SIZE = 512
+ val BTB_ADDR_HI = 9
+ val BTB_ADDR_LO = 2
+ val BTB_ARRAY_DEPTH = 256
+ val BTB_BTAG_FOLD = false
+ val BTB_BTAG_SIZE = 5
+ val BTB_FOLD2_INDEX_HASH = false
+ val BTB_INDEX1_HI = 9
+ val BTB_INDEX1_LO = 2
+ val BTB_INDEX2_HI = 17
+ val BTB_INDEX2_LO = 10
+ val BTB_INDEX3_HI = 25
+ val BTB_INDEX3_LO = 18
+ val BTB_SIZE = 512
+ val BUILD_AHB_LITE = false
+ val BUILD_AXI4 = true
+ val BUILD_AXI_NATIVE = true
+ val BUS_PRTY_DEFAULT = 3
+ val DATA_ACCESS_ADDR0 = 0x00000000 //.U(32.W)
+ val DATA_ACCESS_ADDR1 = 0xC0000000 //.U(32.W)
+ val DATA_ACCESS_ADDR2 = 0xA0000000 //.U(32.W)
+ val DATA_ACCESS_ADDR3 = 0x80000000 //.U(32.W)
+ val DATA_ACCESS_ADDR4 = 0x00000000 //.U(32.W)
+ val DATA_ACCESS_ADDR5 = 0x00000000 //.U(32.W)
+ val DATA_ACCESS_ADDR6 = 0x00000000 //.U(32.W)
+ val DATA_ACCESS_ADDR7 = 0x00000000 //.U(32.W)
+ val DATA_ACCESS_ENABLE0 = 0x1 //.U(1.W)
+ val DATA_ACCESS_ENABLE1 = 0x1 //.U(1.W)
+ val DATA_ACCESS_ENABLE2 = 0x1 //.U(1.W)
+ val DATA_ACCESS_ENABLE3 = 0x1 //.U(1.W)
+ val DATA_ACCESS_ENABLE4 = 0x0 //.U(1.W)
+ val DATA_ACCESS_ENABLE5 = 0x0 //.U(1.W)
+ val DATA_ACCESS_ENABLE6 = 0x0 //.U(1.W)
+ val DATA_ACCESS_ENABLE7 = 0x0 //.U(1.W)
+ val DATA_ACCESS_MASK0 = 0x7FFFFFFF //.U(32.W)
+ val DATA_ACCESS_MASK1 = 0x3FFFFFFF //.U(32.W)
+ val DATA_ACCESS_MASK2 = 0x1FFFFFFF //.U(32.W)
+ val DATA_ACCESS_MASK3 = 0x0FFFFFFF //.U(32.W)
+ val DATA_ACCESS_MASK4 = 0xFFFFFFFF //.U(32.W)
+ val DATA_ACCESS_MASK5 = 0xFFFFFFFF //.U(32.W)
+ val DATA_ACCESS_MASK6 = 0xFFFFFFFF //.U(32.W)
+ val DATA_ACCESS_MASK7 = 0xFFFFFFFF //.U(32.W)
+ val DCCM_BANK_BITS = 0x2 //.U(3.W)
+ val DCCM_BITS = 0x10 //.U(5.W)
+ val DCCM_BYTE_WIDTH = 0x4 //.U(3.W)
+ val DCCM_DATA_WIDTH = 0x20 //.U(6.W)
+ val DCCM_ECC_WIDTH = 0x7 //.U(3.W)
+ val DCCM_ENABLE = 0x1 //.U(1.W)
+ val DCCM_FDATA_WIDTH = 0x27 //.U(6.W)
+ val DCCM_INDEX_BITS = 0xC //.U(4.W)
+ val DCCM_NUM_BANKS = 0x04 //.U(5.W)
+ val DCCM_REGION = 0xF //.U(4.W)
+ val DCCM_SADR = 0xF0040000
+ val DCCM_SIZE = 0x040
+ val DCCM_WIDTH_BITS = 0x2 //.U(2.W)
+ val DMA_BUF_DEPTH = 0x5 //.U(3.W)
+ val DMA_BUS_ID = 0x1 //.U(1.W)
+ val DMA_BUS_PRTY = 0x2 //.U(2.W)
+ val DMA_BUS_TAG = 0x1 //.U(4.W)
+ val FAST_INTERRUPT_REDIRECT= 0x1 //.U(1.W)
+ val ICACHE_2BANKS = 1
+ val ICACHE_BANK_BITS = 1
+ val ICACHE_BANK_HI = 3
+ val ICACHE_BANK_LO = 3
+ val ICACHE_BANK_WIDTH = 8
+ val ICACHE_BANKS_WAY = 2
+ val ICACHE_BEAT_ADDR_HI = 5
+ val ICACHE_BEAT_BITS = 3
+ val ICACHE_DATA_DEPTH = 512
+ val ICACHE_DATA_INDEX_LO = 4
+ val ICACHE_DATA_WIDTH = 64
+ val ICACHE_ECC = true
+ val ICACHE_ENABLE = true
+ val ICACHE_FDATA_WIDTH = 71
+ val ICACHE_INDEX_HI = 12
+ val ICACHE_LN_SZ = 64
+ val ICACHE_NUM_BEATS = 8
+ val ICACHE_NUM_WAYS = 2
+ val ICACHE_ONLY = false
+ val ICACHE_SCND_LAST = 6
+ val ICACHE_SIZE = 16
+ val ICACHE_STATUS_BITS = 1
+ val ICACHE_TAG_DEPTH = 128
+ val ICACHE_TAG_INDEX_LO = 6
+ val ICACHE_TAG_LO = 13
+ val ICACHE_WAYPACK = false
+ val ICCM_BANK_BITS = 2
+ val ICCM_BANK_HI = 0x03 //.U(5.W)
+ val ICCM_BANK_INDEX_LO = 0x04 //.U(5.W)
+ val ICCM_BITS = 0x10 //.U(5.W)
+ val ICCM_ENABLE = 0x1 //.U(1.W)
+ val ICCM_ICACHE = 0x1 //.U(1.W)
+ val ICCM_INDEX_BITS = 0xC //.U(4.W)
+ val ICCM_NUM_BANKS = 0x04 //.U(5.W)
+ val ICCM_ONLY = 0x0 //.U(1.W)
+ val ICCM_REGION = 0xE //.U(4.W)
+ val ICCM_SADR = 0xEE000000 //.U(32.W)
+ val ICCM_SIZE = 0x040 //.U(10.W)
+ val IFU_BUS_ID = 0x1 //.U(1.W)
+ val IFU_BUS_PRTY = 0x2 //.U(2.W)
+ val IFU_BUS_TAG = 0x3 //.U(4.W)
+ val INST_ACCESS_ADDR0 = 0x00000000 //.U(32.W)
+ val INST_ACCESS_ADDR1 = 0xC0000000 //.U(32.W)
+ val INST_ACCESS_ADDR2 = 0xA0000000 //.U(32.W)
+ val INST_ACCESS_ADDR3 = 0x80000000 //.U(32.W)
+ val INST_ACCESS_ADDR4 = 0x00000000 //.U(32.W)
+ val INST_ACCESS_ADDR5 = 0x00000000 //.U(32.W)
+ val INST_ACCESS_ADDR6 = 0x00000000 //.U(32.W)
+ val INST_ACCESS_ADDR7 = 0x00000000 //.U(32.W)
+ val INST_ACCESS_ENABLE0 = 0x1 //.U(1.W)
+ val INST_ACCESS_ENABLE1 = 0x1 //.U(1.W)
+ val INST_ACCESS_ENABLE2 = 0x1 //.U(1.W)
+ val INST_ACCESS_ENABLE3 = 0x1 //.U(1.W)
+ val INST_ACCESS_ENABLE4 = 0x0 //.U(1.W)
+ val INST_ACCESS_ENABLE5 = 0x0 //.U(1.W)
+ val INST_ACCESS_ENABLE6 = 0x0 //.U(1.W)
+ val INST_ACCESS_ENABLE7 = 0x0 //.U(1.W)
+ val INST_ACCESS_MASK0 = 0x7FFFFFFF //.U(32.W)
+ val INST_ACCESS_MASK1 = 0x3FFFFFFF //.U(32.W)
+ val INST_ACCESS_MASK2 = 0x1FFFFFFF //.U(32.W)
+ val INST_ACCESS_MASK3 = 0x0FFFFFFF //.U(32.W)
+ val INST_ACCESS_MASK4 = 0xFFFFFFFF //.U(32.W)
+ val INST_ACCESS_MASK5 = 0xFFFFFFFF //.U(32.W)
+ val INST_ACCESS_MASK6 = 0xFFFFFFFF //.U(32.W)
+ val INST_ACCESS_MASK7 = 0xFFFFFFFF //.U(32.W)
+ val LOAD_TO_USE_PLUS1 = 0x0 //.U(1.W)
+ val LSU2DMA = 0x0 //.U(1.W)
+ val LSU_BUS_ID = 0x1 //.U(1.W)
+ val LSU_BUS_PRTY = 0x2 //.U(2.W)
+ val LSU_BUS_TAG = 0x3 //.U(4.W)
+ val LSU_NUM_NBLOAD = 0x04 //.U(5.W)
+ val LSU_NUM_NBLOAD_WIDTH = 0x2 //.U(3.W)
+ val LSU_SB_BITS = 0x10 //.U(5.W)
+ val LSU_STBUF_DEPTH = 0x4 //.U(4.W)
+ val NO_ICCM_NO_ICACHE = 0x0 //.U(1.W)
+ val PIC_2CYCLE = 0x0 //.U(1.W)
+ val PIC_BASE_ADDR = 0xF00C0000 //.U(32.W)
+ val PIC_BITS = 0x0F //.U(5.W)
+ val PIC_INT_WORDS = 0x1 //.U(4.W)
+ val PIC_REGION = 0xF //.U(4.W)
+ val PIC_SIZE = 0x020 //.U(9.W)
+ val PIC_TOTAL_INT = 0x1F //.U(8.W)
+ val PIC_TOTAL_INT_PLUS1 = 0x020 //.U(9.W)
+ val RET_STACK_SIZE = 0x8 //.U(4.W)
+ val SB_BUS_ID = 0x1 //.U(1.W)
+ val SB_BUS_PRTY = 0x2 //.U(2.W)
+ val SB_BUS_TAG = 0x1 //.U(4.W)
+ val TIMER_LEGAL_EN = 0x1 //.U(1.W)
+
+}
+
+trait el2_lib extends param{
+ def el2_btb_tag_hash(pc : UInt) =
+ (VecInit.tabulate(3)(i => pc(BTB_ADDR_HI+((i+1)*(BTB_BTAG_SIZE)),BTB_ADDR_HI+(i*BTB_BTAG_SIZE)+1))).reduce(_^_)
+
+ def el2_btb_tag_hash_fold(pc : UInt) =
+ pc(BTB_ADDR_HI+(2*BTB_BTAG_SIZE),BTB_ADDR_HI+BTB_BTAG_SIZE+1)^pc(BTB_ADDR_HI+BTB_BTAG_SIZE,BTB_ADDR_HI+1)
+
+ def el2_btb_addr_hash(pc : UInt) =
+ if(BTB_FOLD2_INDEX_HASH) pc(BTB_INDEX1_HI,BTB_INDEX1_LO) ^ pc(BTB_INDEX3_HI,BTB_INDEX3_LO)
+ else pc(BTB_INDEX1_HI,BTB_INDEX1_LO) ^ pc(BTB_INDEX2_HI,BTB_INDEX2_LO) ^ pc(BTB_INDEX3_HI,BTB_INDEX3_LO)
+
+ def el2_btb_ghr_hash(hashin : UInt, ghr :UInt) =
+ if(BHT_GHR_HASH_1) Cat(ghr(BHT_GHR_SIZE-1,BTB_INDEX1_HI-1), hashin(BTB_INDEX1_HI,2) ^ ghr(BTB_INDEX1_HI-2,0))
+ else hashin(BHT_GHR_SIZE+1,2) ^ ghr(BHT_GHR_SIZE-1,0)
+
+ def repl(b:Int, a:UInt) : UInt =
+ VecInit.tabulate(b)(i => a).reduce(Cat(_,_))
+
+ def rveven_paritycheck(data_in:UInt, parity_in:UInt) : UInt =
+ (data_in.xorR.asUInt) ^ parity_in
+
+ def rveven_paritygen(data_in : UInt) =
+ data_in.xorR.asUInt
+
+ def memory_cal =
+ (ICACHE_WAYPACK, ICACHE_ECC) match{
+ case(false,false) => 68
+ case(false,true) => 71
+ case(true,false) => 68*ICACHE_NUM_WAYS
+ case(true,true) => 71*ICACHE_NUM_WAYS
+ }
+
+ val data_mem_size : Int = memory_cal
+ // Move rvecc_encode to a proper trait
+ def rvecc_encode(din:UInt) = { //Done for verification and testing
+ val mask0 = Array(0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0,1,1,0,1,1)
+ val mask1 = Array(1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,1,1,0,1)
+ val mask2 = Array(1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,0)
+ val mask3 = Array(0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,0,0,0,0)
+ val mask4 = Array(0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0)
+ val mask5 = Array(1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0)
+ val w0 = Wire(Vec(18,UInt(1.W)))
+ val w1 = Wire(Vec(18,UInt(1.W)))
+ val w2 = Wire(Vec(18,UInt(1.W)))
+ val w3 = Wire(Vec(15,UInt(1.W)))
+ val w4 = Wire(Vec(15,UInt(1.W)))
+ val w5 = Wire(Vec(6, UInt(1.W)))
+ var j = 0;var k = 0;var m = 0;
+ var x = 0;var y = 0;var z = 0
+
+ for(i <- 0 to 31)
+ {
+ if(mask0(i)==1) {w0(j) := din(i); j = j +1 }
+ if(mask1(i)==1) {w1(k) := din(i); k = k +1 }
+ if(mask2(i)==1) {w2(m) := din(i); m = m +1 }
+ if(mask3(i)==1) {w3(x) := din(i); x = x +1 }
+ if(mask4(i)==1) {w4(y) := din(i); y = y +1 }
+ if(mask5(i)==1) {w5(z) := din(i); z = z +1 }
+ }
+ val w6 = Cat((w0.asUInt.xorR),(w1.asUInt.xorR),(w2.asUInt.xorR),(w3.asUInt.xorR),(w4.asUInt.xorR),(w5.asUInt.xorR))
+ Cat(din.xorR ^ w6.xorR, w6)
+ }
+
+
+ class rvecc_decode extends Module{ //Done for verification and testing
+ val io = IO(new Bundle{
+ val en = Input(UInt(1.W))
+ val din = Input(UInt(32.W))
+ val ecc_in = Input(UInt(7.W))
+ val sed_ded = Input(UInt(1.W))
+ val ecc_out = Output(UInt(7.W))
+ val dout = Output(UInt(32.W))
+ val single_ecc_error = Output(UInt(1.W))
+ val double_ecc_error = Output(UInt(1.W))
+ })
+ val mask0 = Array(1,1,0,1,1,0,1,0,1,0,1,1,0,1,0,1,0,1,0,1,0,1,0,1,0,1,1,0,1,0,1,0)
+ val mask1 = Array(1,0,1,1,0,1,1,0,0,1,1,0,1,1,0,0,1,1,0,0,1,1,0,0,1,1,0,1,1,0,0,1)
+ val mask2 = Array(0,1,1,1,0,0,0,1,1,1,1,0,0,0,1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,1,1,1)
+ val mask3 = Array(0,0,0,0,1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,0,0,0)
+ val mask4 = Array(0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0)
+ val mask5 = Array(0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1)
+
+ val w0 = Wire(Vec(18,UInt(1.W)))
+ val w1 = Wire(Vec(18,UInt(1.W)))
+ val w2 = Wire(Vec(18,UInt(1.W)))
+ val w3 = Wire(Vec(15,UInt(1.W)))
+ val w4 = Wire(Vec(15,UInt(1.W)))
+ val w5 = Wire(Vec(6,UInt(1.W)))
+
+ var j = 0;var k = 0;var m = 0; var n =0;
+ var x = 0;var y = 0;
+
+ for(i <- 0 to 31)
+ {
+ if(mask0(i)==1) {w0(j) := io.din(i); j = j +1 }
+ if(mask1(i)==1) {w1(k) := io.din(i); k = k +1 }
+ if(mask2(i)==1) {w2(m) := io.din(i); m = m +1 }
+ if(mask3(i)==1) {w3(n) := io.din(i); n = n +1 }
+ if(mask4(i)==1) {w4(x) := io.din(i); x = x +1 }
+ if(mask5(i)==1) {w5(y) := io.din(i); y = y +1 }
+ }
+
+ val ecc_check = Cat((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded ,io.ecc_in(5)^(w5.asUInt.xorR),io.ecc_in(4)^(w4.asUInt.xorR),io.ecc_in(3)^(w3.asUInt.xorR),io.ecc_in(2)^(w2.asUInt.xorR),io.ecc_in(1)^(w1.asUInt.xorR),io.ecc_in(0)^(w0.asUInt.xorR))
+
+ io.single_ecc_error := io.en & (ecc_check!= 0.U) & ((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded)
+ io.double_ecc_error := io.en & (ecc_check!= 0.U) & ((io.din.xorR ^ io.ecc_in.xorR) & ~io.sed_ded)
+ val error_mask = Wire(Vec(39,UInt(1.W)))
+
+ for(i <- 1 until 40){
+ error_mask(i-1) := ecc_check(5,0) === i.asUInt
+ }
+ val din_plus_parity = Cat(io.ecc_in(6), io.din(31,26), io.ecc_in(5), io.din(25,11), io.ecc_in(4), io.din(10,4), io.ecc_in(3), io.din(3,1), io.ecc_in(2), io.din(0), io.ecc_in(1,0))
+ val dout_plus_parity = Mux(io.single_ecc_error.asBool, (error_mask.asUInt ^ din_plus_parity), din_plus_parity)
+
+ io.dout := Cat(dout_plus_parity(37,32),dout_plus_parity(30,16), dout_plus_parity(14,8), dout_plus_parity(6,4), dout_plus_parity(2))
+ io.ecc_out := Cat(dout_plus_parity(38) ^ (ecc_check(6,0) === "b1000000".U), dout_plus_parity(31), dout_plus_parity(15), dout_plus_parity(7), dout_plus_parity(3), dout_plus_parity(1,0))
+ }
+}
diff --git a/src/test/scala/lib/Tester.scala b/src/test/scala/lib/Tester.scala
index dcf36414..227cde7e 100644
--- a/src/test/scala/lib/Tester.scala
+++ b/src/test/scala/lib/Tester.scala
@@ -3,7 +3,7 @@ import java.io.File
import chisel3.iotesters
import chisel3.iotesters.{ChiselFlatSpec, Driver, PeekPokeTester}
-
+/*
class Tester(c: encoder_generator) extends PeekPokeTester(c) {
poke(c.io.in, 1)
@@ -29,3 +29,4 @@ object GCDMain extends App {
c => new Tester(c)
}
}
+*/
\ No newline at end of file
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diff --git a/target/scala-2.12/classes/dec/dec.class b/target/scala-2.12/classes/ifu/ifu_ic.class
similarity index 50%
rename from target/scala-2.12/classes/dec/dec.class
rename to target/scala-2.12/classes/ifu/ifu_ic.class
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diff --git a/target/scala-2.12/classes/ifu/test.sc b/target/scala-2.12/classes/ifu/test.sc
new file mode 100644
index 00000000..f6633a75
--- /dev/null
+++ b/target/scala-2.12/classes/ifu/test.sc
@@ -0,0 +1 @@
+val a = 5
\ No newline at end of file
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index ef0d2540..113eb3d6 100644
--- a/target/streams/compile/_global/_global/compileOutputs/previous
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\ No newline at end of file
diff --git a/target/streams/compile/_global/_global/compileSourceFileInputs/previous b/target/streams/compile/_global/_global/compileSourceFileInputs/previous
index 7d7fd69c..bca8075c 100644
--- a/target/streams/compile/_global/_global/compileSourceFileInputs/previous
+++ b/target/streams/compile/_global/_global/compileSourceFileInputs/previous
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diff --git a/target/streams/compile/_global/_global/discoveredMainClasses/data b/target/streams/compile/_global/_global/discoveredMainClasses/data
index 313c2299..e73a9ca6 100644
--- a/target/streams/compile/_global/_global/discoveredMainClasses/data
+++ b/target/streams/compile/_global/_global/discoveredMainClasses/data
@@ -1 +1 @@
-["dec.dec"]
\ No newline at end of file
+["ifu.ifu_ic"]
\ No newline at end of file
diff --git a/target/streams/compile/compile/_global/streams/out b/target/streams/compile/compile/_global/streams/out
index 4f942e88..657500ec 100644
--- a/target/streams/compile/compile/_global/streams/out
+++ b/target/streams/compile/compile/_global/streams/out
@@ -1,5 +1,2 @@
-[0m[[0m[33mwarn[0m] [0m[0mthere was one deprecation warning (since 3.2.2)[0m
-[0m[[0m[33mwarn[0m] [0m[0mthere was one deprecation warning (since 3.2.4)[0m
-[0m[[0m[33mwarn[0m] [0m[0mthere were two deprecation warnings in total; re-run with -deprecation for details[0m
-[0m[[0m[33mwarn[0m] [0m[0mthere were 72 feature warnings; re-run with -feature for details[0m
-[0m[[0m[33mwarn[0m] [0m[0mfour warnings found[0m
+[0m[[0m[33mwarn[0m] [0m[0mthere were 266 feature warnings; re-run with -feature for details[0m
+[0m[[0m[33mwarn[0m] [0m[0mone warning found[0m
diff --git a/target/streams/compile/compileIncSetup/_global/streams/inc_compile_2.12.zip b/target/streams/compile/compileIncSetup/_global/streams/inc_compile_2.12.zip
index 39de65e9..10378b58 100644
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diff --git a/target/streams/compile/compileIncremental/_global/streams/export b/target/streams/compile/compileIncremental/_global/streams/export
index 994c5191..b767ba37 100644
--- a/target/streams/compile/compileIncremental/_global/streams/export
+++ b/target/streams/compile/compileIncremental/_global/streams/export
@@ -1 +1 @@
-scalac -bootclasspath /home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar -classpath /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar -Xplugin:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalamacros/paradise_2.12.10/2.1.0/paradise_2.12.10-2.1.0.jar -Xsource:2.11.0 /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dec/el2_dec_dec_ctl.scala
+scalac -bootclasspath /home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar -classpath /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar -Xplugin:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalamacros/paradise_2.12.10/2.1.0/paradise_2.12.10-2.1.0.jar -Xsource:2.11.0 /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu_bp_ctl.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu_ic_mem.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/snapshot/el2_param.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lsu/el2_lsu.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/exu/el2_exu.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dbg/el2_dbg.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/RVC.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/GCD.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/el2_lib.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/rvjtag_tap.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/dmi_jtag_to_core_sync.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/dmi_wrapper.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/include/el2_bundle.scala /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dec/el2_dec_dec_ctl.scala
diff --git a/target/streams/compile/compileIncremental/_global/streams/out b/target/streams/compile/compileIncremental/_global/streams/out
index ba75e332..fcffc860 100644
--- a/target/streams/compile/compileIncremental/_global/streams/out
+++ b/target/streams/compile/compileIncremental/_global/streams/out
@@ -1,24 +1,24 @@
[0m[[0m[0mdebug[0m] [0m[0m[0m
[0m[[0m[0mdebug[0m] [0m[0mInitial source changes: [0m
[0m[[0m[0mdebug[0m] [0m[0m removed:Set()[0m
-[0m[[0m[0mdebug[0m] [0m[0m added: Set()[0m
+[0m[[0m[0mdebug[0m] [0m[0m added: Set(/home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu_ic_mem.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu_bp_ctl.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/el2_lib.scala)[0m
[0m[[0m[0mdebug[0m] [0m[0m modified: Set(/home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dec/el2_dec_dec_ctl.scala)[0m
-[0m[[0m[0mdebug[0m] [0m[0mInvalidated products: Set()[0m
+[0m[[0m[0mdebug[0m] [0m[0mInvalidated products: Set(/home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/encoder_generator.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/RVCExpander$$anon$1.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dbg/el2_dbg.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/caller$$anon$2.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/dec$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/exp$$anon$9.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/RVCDecoder.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/RVCExpander.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvbradder.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/reg1.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi/dmi_jtag_to_core_sync.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/reg1$$anon$3.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/tocopy.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi/dmi_wrapper.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff$$anon$1.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/snapshot/pt.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/tocopy$$anon$8.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_dec_ctl.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_pkt_t.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/top$$anon$4.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/caller.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/encoder_generator$$anon$6.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/ExpandedInstruction.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck$$anon$7.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvbradder$$anon$5.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/exp.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/top.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/encoder_generator$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/snapshot/pt$.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/dec.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/dec$delayedInit$body.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/exu/el2_exu.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dmi/rvjtag_tap.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lsu/el2_lsu.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_dec_ctl$$anon$1.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu.class, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/include/el2_bundle.class)[0m
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[0m[[0m[0mdebug[0m] [0m[0mSources indirectly invalidated by:[0m
-[0m[[0m[0mdebug[0m] [0m[0m product: Set()[0m
+[0m[[0m[0mdebug[0m] [0m[0m product: Set(/home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/include/el2_bundle.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/rvjtag_tap.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/RVC.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/exu/el2_exu.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dbg/el2_dbg.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/dmi_jtag_to_core_sync.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dmi/dmi_wrapper.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dec/el2_dec_dec_ctl.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lsu/el2_lsu.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/ifu/el2_ifu.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/lib/GCD.scala, /home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/snapshot/el2_param.scala)[0m
[0m[[0m[0mdebug[0m] [0m[0m binary dep: Set()[0m
[0m[[0m[0mdebug[0m] [0m[0m external source: Set()[0m
-[0m[[0m[0mdebug[0m] [0m[0mAll initially invalidated classes: Set(dec.dec, dec.el2_dec_dec_ctl, dec.el2_dec_pkt_t)[0m
-[0m[[0m[0mdebug[0m] [0m[0mAll initially invalidated sources:Set(/home/waleedbinehsan/Desktop/SweRV-Chislified-master/src/main/scala/dec/el2_dec_dec_ctl.scala)[0m
+[0m[[0m[0mdebug[0m] [0m[0mAll sources are invalidated.[0m
[0m[[0m[0mdebug[0m] [0m[0mInitial set of included nodes: dec.dec, dec.el2_dec_dec_ctl, dec.el2_dec_pkt_t[0m
-[0m[[0m[0minfo[0m] [0m[0mCompiling 1 Scala source to /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes ...[0m
+[0m[[0m[0mdebug[0m] [0m[0mRecompiling all sources: number of invalidated sources > 50.0% of all sources[0m
+[0m[[0m[0minfo[0m] [0m[0mCompiling 15 Scala sources to /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes ...[0m
[0m[[0m[0mdebug[0m] [0m[0mGetting org.scala-sbt:compiler-bridge_2.12:1.3.5:compile for Scala 2.12.10[0m
[0m[[0m[0mdebug[0m] [0m[0mGetting org.scala-sbt:compiler-bridge_2.12:1.3.5:compile for Scala 2.12.10[0m
-[0m[[0m[0mdebug[0m] [0m[0m[zinc] Running cached compiler 3bb278c6 for Scala compiler version 2.12.10[0m
+[0m[[0m[0mdebug[0m] [0m[0m[zinc] Running cached compiler 69ba6af for Scala compiler version 2.12.10[0m
[0m[[0m[0mdebug[0m] [0m[0m[zinc] The Scala compiler is invoked with:[0m
[0m[[0m[0mdebug[0m] [0m[0m -Xsource:2.11[0m
[0m[[0m[0mdebug[0m] [0m[0m -Xplugin:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalamacros/paradise_2.12.10/2.1.0/paradise_2.12.10-2.1.0.jar[0m
@@ -26,11 +26,5 @@
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar[0m
[0m[[0m[0mdebug[0m] [0m[0m -classpath[0m
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-[0m[[0m[0mdebug[0m] [0m[0mScala compilation took 9.899922123 s[0m
+[0m[[0m[0mdebug[0m] [0m[0mScala compilation took 8.031658869 s[0m
[0m[[0m[0mdebug[0m] [0m[0mDone compiling.[0m
-[0m[[0m[0mdebug[0m] [0m[0mNew invalidations:[0m
-[0m[[0m[0mdebug[0m] [0m[0m Set()[0m
-[0m[[0m[0mdebug[0m] [0m[0mInitial set of included nodes: [0m
-[0m[[0m[0mdebug[0m] [0m[0mPreviously invalidated, but (transitively) depend on new invalidations:[0m
-[0m[[0m[0mdebug[0m] [0m[0m Set()[0m
-[0m[[0m[0mdebug[0m] [0m[0mNo classes were invalidated.[0m
diff --git a/target/streams/compile/packageBin/_global/streams/inputs b/target/streams/compile/packageBin/_global/streams/inputs
index 70dfd041..9566067d 100644
--- a/target/streams/compile/packageBin/_global/streams/inputs
+++ b/target/streams/compile/packageBin/_global/streams/inputs
@@ -1 +1 @@
-1668409227
\ No newline at end of file
+2112381394
\ No newline at end of file
diff --git a/target/streams/compile/packageBin/_global/streams/out b/target/streams/compile/packageBin/_global/streams/out
index 7f4f13e1..0a0b3cc5 100644
--- a/target/streams/compile/packageBin/_global/streams/out
+++ b/target/streams/compile/packageBin/_global/streams/out
@@ -2,8 +2,28 @@
[0m[[0m[0mdebug[0m] [0m[0mInput file mappings:[0m
[0m[[0m[0mdebug[0m] [0m[0m ifu[0m
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu[0m
+[0m[[0m[0mdebug[0m] [0m[0m ifu/ifu_ic.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu_ic.class[0m
[0m[[0m[0mdebug[0m] [0m[0m ifu/el2_ifu.class[0m
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m ifu/el2_ifu_ic_mem.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu_ic_mem.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m ifu/ifu_ic$.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu_ic$.class[0m
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+[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu$.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m ifu/el2_ifu_bp_ctl$$anon$1.class[0m
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+[0m[[0m[0mdebug[0m] [0m[0m ifu/ifu_ic$delayedInit$body.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu_ic$delayedInit$body.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m ifu/el2_ifu_ic_mem$$anon$1.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/el2_ifu_ic_mem$$anon$1.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m ifu/ifu$delayedInit$body.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/ifu/ifu$delayedInit$body.class[0m
[0m[[0m[0mdebug[0m] [0m[0m snapshot[0m
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/snapshot[0m
[0m[[0m[0mdebug[0m] [0m[0m snapshot/pt$.class[0m
@@ -34,6 +54,8 @@
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvrangecheck$.class[0m
[0m[[0m[0mdebug[0m] [0m[0m lib/exp.sc[0m
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/exp.sc[0m
+[0m[[0m[0mdebug[0m] [0m[0m lib/el2_lib.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/el2_lib.class[0m
[0m[[0m[0mdebug[0m] [0m[0m lib/exp.class[0m
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/exp.class[0m
[0m[[0m[0mdebug[0m] [0m[0m lib/top.class[0m
@@ -72,6 +94,8 @@
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[0m[[0m[0mdebug[0m] [0m[0m lib/caller.class[0m
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/caller.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m lib/param.class[0m
+[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/param.class[0m
[0m[[0m[0mdebug[0m] [0m[0m lib/rvdff.class[0m
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/lib/rvdff.class[0m
[0m[[0m[0mdebug[0m] [0m[0m lib/ExpandedInstruction.class[0m
@@ -96,10 +120,4 @@
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[0m[[0m[0mdebug[0m] [0m[0m dec/el2_dec_dec_ctl.class[0m
[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/el2_dec_dec_ctl.class[0m
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-[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/dec$.class[0m
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-[0m[[0m[0mdebug[0m] [0m[0m dec/dec$delayedInit$body.class[0m
-[0m[[0m[0mdebug[0m] [0m[0m /home/waleedbinehsan/Desktop/SweRV-Chislified-master/target/scala-2.12/classes/dec/dec$delayedInit$body.class[0m
[0m[[0m[0mdebug[0m] [0m[0mDone packaging.[0m