diff --git a/el2_ifu_aln_ctl.fir b/el2_ifu_aln_ctl.fir
index 185d214c..b55913aa 100644
--- a/el2_ifu_aln_ctl.fir
+++ b/el2_ifu_aln_ctl.fir
@@ -1,1272 +1,9 @@
 ;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
 circuit el2_ifu_aln_ctl : 
-  module el2_ifu_compress : 
-    input clock : Clock
-    input reset : Reset
-    output io : {flip in : UInt<32>, out : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>}, rvc : UInt<1>}
-    
-    node _T = bits(io.in, 1, 0) @[el2_ifu_compress.scala 193:20]
-    node _T_1 = neq(_T, UInt<2>("h03")) @[el2_ifu_compress.scala 193:26]
-    io.rvc <= _T_1 @[el2_ifu_compress.scala 193:12]
-    node _T_2 = bits(io.in, 12, 5) @[el2_ifu_compress.scala 49:22]
-    node _T_3 = orr(_T_2) @[el2_ifu_compress.scala 49:29]
-    node _T_4 = mux(_T_3, UInt<7>("h013"), UInt<7>("h01f")) @[el2_ifu_compress.scala 49:20]
-    node _T_5 = bits(io.in, 10, 7) @[el2_ifu_compress.scala 30:26]
-    node _T_6 = bits(io.in, 12, 11) @[el2_ifu_compress.scala 30:35]
-    node _T_7 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 30:45]
-    node _T_8 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 30:51]
-    node _T_9 = cat(_T_8, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_10 = cat(_T_5, _T_6) @[Cat.scala 29:58]
-    node _T_11 = cat(_T_10, _T_7) @[Cat.scala 29:58]
-    node _T_12 = cat(_T_11, _T_9) @[Cat.scala 29:58]
-    node _T_13 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_14 = cat(UInt<2>("h01"), _T_13) @[Cat.scala 29:58]
-    node _T_15 = cat(_T_14, _T_4) @[Cat.scala 29:58]
-    node _T_16 = cat(_T_12, UInt<5>("h02")) @[Cat.scala 29:58]
-    node _T_17 = cat(_T_16, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_18 = cat(_T_17, _T_15) @[Cat.scala 29:58]
-    node _T_19 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_20 = cat(UInt<2>("h01"), _T_19) @[Cat.scala 29:58]
-    node _T_21 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_22 = cat(UInt<2>("h01"), _T_21) @[Cat.scala 29:58]
-    node _T_23 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_24 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_24.bits <= _T_18 @[el2_ifu_compress.scala 18:14]
-    _T_24.rd <= _T_20 @[el2_ifu_compress.scala 19:12]
-    _T_24.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13]
-    _T_24.rs2 <= _T_22 @[el2_ifu_compress.scala 21:13]
-    _T_24.rs3 <= _T_23 @[el2_ifu_compress.scala 22:13]
-    node _T_25 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 32:20]
-    node _T_26 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 32:28]
-    node _T_27 = cat(_T_25, _T_26) @[Cat.scala 29:58]
-    node _T_28 = cat(_T_27, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_29 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_30 = cat(UInt<2>("h01"), _T_29) @[Cat.scala 29:58]
-    node _T_31 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_32 = cat(UInt<2>("h01"), _T_31) @[Cat.scala 29:58]
-    node _T_33 = cat(_T_32, UInt<7>("h07")) @[Cat.scala 29:58]
-    node _T_34 = cat(_T_28, _T_30) @[Cat.scala 29:58]
-    node _T_35 = cat(_T_34, UInt<3>("h03")) @[Cat.scala 29:58]
-    node _T_36 = cat(_T_35, _T_33) @[Cat.scala 29:58]
-    node _T_37 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_38 = cat(UInt<2>("h01"), _T_37) @[Cat.scala 29:58]
-    node _T_39 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_40 = cat(UInt<2>("h01"), _T_39) @[Cat.scala 29:58]
-    node _T_41 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_42 = cat(UInt<2>("h01"), _T_41) @[Cat.scala 29:58]
-    node _T_43 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_44 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_44.bits <= _T_36 @[el2_ifu_compress.scala 18:14]
-    _T_44.rd <= _T_38 @[el2_ifu_compress.scala 19:12]
-    _T_44.rs1 <= _T_40 @[el2_ifu_compress.scala 20:13]
-    _T_44.rs2 <= _T_42 @[el2_ifu_compress.scala 21:13]
-    _T_44.rs3 <= _T_43 @[el2_ifu_compress.scala 22:13]
-    node _T_45 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20]
-    node _T_46 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26]
-    node _T_47 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36]
-    node _T_48 = cat(_T_47, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_49 = cat(_T_45, _T_46) @[Cat.scala 29:58]
-    node _T_50 = cat(_T_49, _T_48) @[Cat.scala 29:58]
-    node _T_51 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_52 = cat(UInt<2>("h01"), _T_51) @[Cat.scala 29:58]
-    node _T_53 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_54 = cat(UInt<2>("h01"), _T_53) @[Cat.scala 29:58]
-    node _T_55 = cat(_T_54, UInt<7>("h03")) @[Cat.scala 29:58]
-    node _T_56 = cat(_T_50, _T_52) @[Cat.scala 29:58]
-    node _T_57 = cat(_T_56, UInt<3>("h02")) @[Cat.scala 29:58]
-    node _T_58 = cat(_T_57, _T_55) @[Cat.scala 29:58]
-    node _T_59 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_60 = cat(UInt<2>("h01"), _T_59) @[Cat.scala 29:58]
-    node _T_61 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_62 = cat(UInt<2>("h01"), _T_61) @[Cat.scala 29:58]
-    node _T_63 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_64 = cat(UInt<2>("h01"), _T_63) @[Cat.scala 29:58]
-    node _T_65 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_66 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_66.bits <= _T_58 @[el2_ifu_compress.scala 18:14]
-    _T_66.rd <= _T_60 @[el2_ifu_compress.scala 19:12]
-    _T_66.rs1 <= _T_62 @[el2_ifu_compress.scala 20:13]
-    _T_66.rs2 <= _T_64 @[el2_ifu_compress.scala 21:13]
-    _T_66.rs3 <= _T_65 @[el2_ifu_compress.scala 22:13]
-    node _T_67 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20]
-    node _T_68 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26]
-    node _T_69 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36]
-    node _T_70 = cat(_T_69, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_71 = cat(_T_67, _T_68) @[Cat.scala 29:58]
-    node _T_72 = cat(_T_71, _T_70) @[Cat.scala 29:58]
-    node _T_73 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_74 = cat(UInt<2>("h01"), _T_73) @[Cat.scala 29:58]
-    node _T_75 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_76 = cat(UInt<2>("h01"), _T_75) @[Cat.scala 29:58]
-    node _T_77 = cat(_T_76, UInt<7>("h07")) @[Cat.scala 29:58]
-    node _T_78 = cat(_T_72, _T_74) @[Cat.scala 29:58]
-    node _T_79 = cat(_T_78, UInt<3>("h02")) @[Cat.scala 29:58]
-    node _T_80 = cat(_T_79, _T_77) @[Cat.scala 29:58]
-    node _T_81 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_82 = cat(UInt<2>("h01"), _T_81) @[Cat.scala 29:58]
-    node _T_83 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_84 = cat(UInt<2>("h01"), _T_83) @[Cat.scala 29:58]
-    node _T_85 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_86 = cat(UInt<2>("h01"), _T_85) @[Cat.scala 29:58]
-    node _T_87 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_88 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_88.bits <= _T_80 @[el2_ifu_compress.scala 18:14]
-    _T_88.rd <= _T_82 @[el2_ifu_compress.scala 19:12]
-    _T_88.rs1 <= _T_84 @[el2_ifu_compress.scala 20:13]
-    _T_88.rs2 <= _T_86 @[el2_ifu_compress.scala 21:13]
-    _T_88.rs3 <= _T_87 @[el2_ifu_compress.scala 22:13]
-    node _T_89 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20]
-    node _T_90 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26]
-    node _T_91 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36]
-    node _T_92 = cat(_T_91, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_93 = cat(_T_89, _T_90) @[Cat.scala 29:58]
-    node _T_94 = cat(_T_93, _T_92) @[Cat.scala 29:58]
-    node _T_95 = shr(_T_94, 5) @[el2_ifu_compress.scala 59:32]
-    node _T_96 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_97 = cat(UInt<2>("h01"), _T_96) @[Cat.scala 29:58]
-    node _T_98 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_99 = cat(UInt<2>("h01"), _T_98) @[Cat.scala 29:58]
-    node _T_100 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20]
-    node _T_101 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26]
-    node _T_102 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36]
-    node _T_103 = cat(_T_102, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_104 = cat(_T_100, _T_101) @[Cat.scala 29:58]
-    node _T_105 = cat(_T_104, _T_103) @[Cat.scala 29:58]
-    node _T_106 = bits(_T_105, 4, 0) @[el2_ifu_compress.scala 59:65]
-    node _T_107 = cat(UInt<3>("h02"), _T_106) @[Cat.scala 29:58]
-    node _T_108 = cat(_T_107, UInt<7>("h03f")) @[Cat.scala 29:58]
-    node _T_109 = cat(_T_95, _T_97) @[Cat.scala 29:58]
-    node _T_110 = cat(_T_109, _T_99) @[Cat.scala 29:58]
-    node _T_111 = cat(_T_110, _T_108) @[Cat.scala 29:58]
-    node _T_112 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_113 = cat(UInt<2>("h01"), _T_112) @[Cat.scala 29:58]
-    node _T_114 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_115 = cat(UInt<2>("h01"), _T_114) @[Cat.scala 29:58]
-    node _T_116 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_117 = cat(UInt<2>("h01"), _T_116) @[Cat.scala 29:58]
-    node _T_118 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_119 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_119.bits <= _T_111 @[el2_ifu_compress.scala 18:14]
-    _T_119.rd <= _T_113 @[el2_ifu_compress.scala 19:12]
-    _T_119.rs1 <= _T_115 @[el2_ifu_compress.scala 20:13]
-    _T_119.rs2 <= _T_117 @[el2_ifu_compress.scala 21:13]
-    _T_119.rs3 <= _T_118 @[el2_ifu_compress.scala 22:13]
-    node _T_120 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 32:20]
-    node _T_121 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 32:28]
-    node _T_122 = cat(_T_120, _T_121) @[Cat.scala 29:58]
-    node _T_123 = cat(_T_122, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_124 = shr(_T_123, 5) @[el2_ifu_compress.scala 62:30]
-    node _T_125 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_126 = cat(UInt<2>("h01"), _T_125) @[Cat.scala 29:58]
-    node _T_127 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_128 = cat(UInt<2>("h01"), _T_127) @[Cat.scala 29:58]
-    node _T_129 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 32:20]
-    node _T_130 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 32:28]
-    node _T_131 = cat(_T_129, _T_130) @[Cat.scala 29:58]
-    node _T_132 = cat(_T_131, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_133 = bits(_T_132, 4, 0) @[el2_ifu_compress.scala 62:63]
-    node _T_134 = cat(UInt<3>("h03"), _T_133) @[Cat.scala 29:58]
-    node _T_135 = cat(_T_134, UInt<7>("h027")) @[Cat.scala 29:58]
-    node _T_136 = cat(_T_124, _T_126) @[Cat.scala 29:58]
-    node _T_137 = cat(_T_136, _T_128) @[Cat.scala 29:58]
-    node _T_138 = cat(_T_137, _T_135) @[Cat.scala 29:58]
-    node _T_139 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_140 = cat(UInt<2>("h01"), _T_139) @[Cat.scala 29:58]
-    node _T_141 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_142 = cat(UInt<2>("h01"), _T_141) @[Cat.scala 29:58]
-    node _T_143 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_144 = cat(UInt<2>("h01"), _T_143) @[Cat.scala 29:58]
-    node _T_145 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_146 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_146.bits <= _T_138 @[el2_ifu_compress.scala 18:14]
-    _T_146.rd <= _T_140 @[el2_ifu_compress.scala 19:12]
-    _T_146.rs1 <= _T_142 @[el2_ifu_compress.scala 20:13]
-    _T_146.rs2 <= _T_144 @[el2_ifu_compress.scala 21:13]
-    _T_146.rs3 <= _T_145 @[el2_ifu_compress.scala 22:13]
-    node _T_147 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20]
-    node _T_148 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26]
-    node _T_149 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36]
-    node _T_150 = cat(_T_149, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_151 = cat(_T_147, _T_148) @[Cat.scala 29:58]
-    node _T_152 = cat(_T_151, _T_150) @[Cat.scala 29:58]
-    node _T_153 = shr(_T_152, 5) @[el2_ifu_compress.scala 61:29]
-    node _T_154 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_155 = cat(UInt<2>("h01"), _T_154) @[Cat.scala 29:58]
-    node _T_156 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_157 = cat(UInt<2>("h01"), _T_156) @[Cat.scala 29:58]
-    node _T_158 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20]
-    node _T_159 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26]
-    node _T_160 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36]
-    node _T_161 = cat(_T_160, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_162 = cat(_T_158, _T_159) @[Cat.scala 29:58]
-    node _T_163 = cat(_T_162, _T_161) @[Cat.scala 29:58]
-    node _T_164 = bits(_T_163, 4, 0) @[el2_ifu_compress.scala 61:62]
-    node _T_165 = cat(UInt<3>("h02"), _T_164) @[Cat.scala 29:58]
-    node _T_166 = cat(_T_165, UInt<7>("h023")) @[Cat.scala 29:58]
-    node _T_167 = cat(_T_153, _T_155) @[Cat.scala 29:58]
-    node _T_168 = cat(_T_167, _T_157) @[Cat.scala 29:58]
-    node _T_169 = cat(_T_168, _T_166) @[Cat.scala 29:58]
-    node _T_170 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_171 = cat(UInt<2>("h01"), _T_170) @[Cat.scala 29:58]
-    node _T_172 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_173 = cat(UInt<2>("h01"), _T_172) @[Cat.scala 29:58]
-    node _T_174 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_175 = cat(UInt<2>("h01"), _T_174) @[Cat.scala 29:58]
-    node _T_176 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_177 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_177.bits <= _T_169 @[el2_ifu_compress.scala 18:14]
-    _T_177.rd <= _T_171 @[el2_ifu_compress.scala 19:12]
-    _T_177.rs1 <= _T_173 @[el2_ifu_compress.scala 20:13]
-    _T_177.rs2 <= _T_175 @[el2_ifu_compress.scala 21:13]
-    _T_177.rs3 <= _T_176 @[el2_ifu_compress.scala 22:13]
-    node _T_178 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20]
-    node _T_179 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26]
-    node _T_180 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36]
-    node _T_181 = cat(_T_180, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_182 = cat(_T_178, _T_179) @[Cat.scala 29:58]
-    node _T_183 = cat(_T_182, _T_181) @[Cat.scala 29:58]
-    node _T_184 = shr(_T_183, 5) @[el2_ifu_compress.scala 64:38]
-    node _T_185 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_186 = cat(UInt<2>("h01"), _T_185) @[Cat.scala 29:58]
-    node _T_187 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_188 = cat(UInt<2>("h01"), _T_187) @[Cat.scala 29:58]
-    node _T_189 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20]
-    node _T_190 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26]
-    node _T_191 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36]
-    node _T_192 = cat(_T_191, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_193 = cat(_T_189, _T_190) @[Cat.scala 29:58]
-    node _T_194 = cat(_T_193, _T_192) @[Cat.scala 29:58]
-    node _T_195 = bits(_T_194, 4, 0) @[el2_ifu_compress.scala 64:71]
-    node _T_196 = cat(UInt<3>("h02"), _T_195) @[Cat.scala 29:58]
-    node _T_197 = cat(_T_196, UInt<7>("h027")) @[Cat.scala 29:58]
-    node _T_198 = cat(_T_184, _T_186) @[Cat.scala 29:58]
-    node _T_199 = cat(_T_198, _T_188) @[Cat.scala 29:58]
-    node _T_200 = cat(_T_199, _T_197) @[Cat.scala 29:58]
-    node _T_201 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_202 = cat(UInt<2>("h01"), _T_201) @[Cat.scala 29:58]
-    node _T_203 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_204 = cat(UInt<2>("h01"), _T_203) @[Cat.scala 29:58]
-    node _T_205 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_206 = cat(UInt<2>("h01"), _T_205) @[Cat.scala 29:58]
-    node _T_207 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_208 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_208.bits <= _T_200 @[el2_ifu_compress.scala 18:14]
-    _T_208.rd <= _T_202 @[el2_ifu_compress.scala 19:12]
-    _T_208.rs1 <= _T_204 @[el2_ifu_compress.scala 20:13]
-    _T_208.rs2 <= _T_206 @[el2_ifu_compress.scala 21:13]
-    _T_208.rs3 <= _T_207 @[el2_ifu_compress.scala 22:13]
-    node _T_209 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30]
-    node _T_210 = bits(_T_209, 0, 0) @[Bitwise.scala 72:15]
-    node _T_211 = mux(_T_210, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
-    node _T_212 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38]
-    node _T_213 = cat(_T_211, _T_212) @[Cat.scala 29:58]
-    node _T_214 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_215 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_216 = cat(_T_215, UInt<7>("h013")) @[Cat.scala 29:58]
-    node _T_217 = cat(_T_213, _T_214) @[Cat.scala 29:58]
-    node _T_218 = cat(_T_217, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_219 = cat(_T_218, _T_216) @[Cat.scala 29:58]
-    node _T_220 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_221 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_222 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_223 = cat(UInt<2>("h01"), _T_222) @[Cat.scala 29:58]
-    node _T_224 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_225 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_225.bits <= _T_219 @[el2_ifu_compress.scala 18:14]
-    _T_225.rd <= _T_220 @[el2_ifu_compress.scala 19:12]
-    _T_225.rs1 <= _T_221 @[el2_ifu_compress.scala 20:13]
-    _T_225.rs2 <= _T_223 @[el2_ifu_compress.scala 21:13]
-    _T_225.rs3 <= _T_224 @[el2_ifu_compress.scala 22:13]
-    node _T_226 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28]
-    node _T_227 = bits(_T_226, 0, 0) @[Bitwise.scala 72:15]
-    node _T_228 = mux(_T_227, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
-    node _T_229 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36]
-    node _T_230 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42]
-    node _T_231 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51]
-    node _T_232 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57]
-    node _T_233 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63]
-    node _T_234 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69]
-    node _T_235 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76]
-    node _T_236 = cat(_T_235, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_237 = cat(_T_233, _T_234) @[Cat.scala 29:58]
-    node _T_238 = cat(_T_237, _T_236) @[Cat.scala 29:58]
-    node _T_239 = cat(_T_231, _T_232) @[Cat.scala 29:58]
-    node _T_240 = cat(_T_228, _T_229) @[Cat.scala 29:58]
-    node _T_241 = cat(_T_240, _T_230) @[Cat.scala 29:58]
-    node _T_242 = cat(_T_241, _T_239) @[Cat.scala 29:58]
-    node _T_243 = cat(_T_242, _T_238) @[Cat.scala 29:58]
-    node _T_244 = bits(_T_243, 20, 20) @[el2_ifu_compress.scala 77:36]
-    node _T_245 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28]
-    node _T_246 = bits(_T_245, 0, 0) @[Bitwise.scala 72:15]
-    node _T_247 = mux(_T_246, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
-    node _T_248 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36]
-    node _T_249 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42]
-    node _T_250 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51]
-    node _T_251 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57]
-    node _T_252 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63]
-    node _T_253 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69]
-    node _T_254 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76]
-    node _T_255 = cat(_T_254, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_256 = cat(_T_252, _T_253) @[Cat.scala 29:58]
-    node _T_257 = cat(_T_256, _T_255) @[Cat.scala 29:58]
-    node _T_258 = cat(_T_250, _T_251) @[Cat.scala 29:58]
-    node _T_259 = cat(_T_247, _T_248) @[Cat.scala 29:58]
-    node _T_260 = cat(_T_259, _T_249) @[Cat.scala 29:58]
-    node _T_261 = cat(_T_260, _T_258) @[Cat.scala 29:58]
-    node _T_262 = cat(_T_261, _T_257) @[Cat.scala 29:58]
-    node _T_263 = bits(_T_262, 10, 1) @[el2_ifu_compress.scala 77:46]
-    node _T_264 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28]
-    node _T_265 = bits(_T_264, 0, 0) @[Bitwise.scala 72:15]
-    node _T_266 = mux(_T_265, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
-    node _T_267 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36]
-    node _T_268 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42]
-    node _T_269 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51]
-    node _T_270 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57]
-    node _T_271 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63]
-    node _T_272 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69]
-    node _T_273 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76]
-    node _T_274 = cat(_T_273, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_275 = cat(_T_271, _T_272) @[Cat.scala 29:58]
-    node _T_276 = cat(_T_275, _T_274) @[Cat.scala 29:58]
-    node _T_277 = cat(_T_269, _T_270) @[Cat.scala 29:58]
-    node _T_278 = cat(_T_266, _T_267) @[Cat.scala 29:58]
-    node _T_279 = cat(_T_278, _T_268) @[Cat.scala 29:58]
-    node _T_280 = cat(_T_279, _T_277) @[Cat.scala 29:58]
-    node _T_281 = cat(_T_280, _T_276) @[Cat.scala 29:58]
-    node _T_282 = bits(_T_281, 11, 11) @[el2_ifu_compress.scala 77:58]
-    node _T_283 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28]
-    node _T_284 = bits(_T_283, 0, 0) @[Bitwise.scala 72:15]
-    node _T_285 = mux(_T_284, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
-    node _T_286 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36]
-    node _T_287 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42]
-    node _T_288 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51]
-    node _T_289 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57]
-    node _T_290 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63]
-    node _T_291 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69]
-    node _T_292 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76]
-    node _T_293 = cat(_T_292, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_294 = cat(_T_290, _T_291) @[Cat.scala 29:58]
-    node _T_295 = cat(_T_294, _T_293) @[Cat.scala 29:58]
-    node _T_296 = cat(_T_288, _T_289) @[Cat.scala 29:58]
-    node _T_297 = cat(_T_285, _T_286) @[Cat.scala 29:58]
-    node _T_298 = cat(_T_297, _T_287) @[Cat.scala 29:58]
-    node _T_299 = cat(_T_298, _T_296) @[Cat.scala 29:58]
-    node _T_300 = cat(_T_299, _T_295) @[Cat.scala 29:58]
-    node _T_301 = bits(_T_300, 19, 12) @[el2_ifu_compress.scala 77:68]
-    node _T_302 = cat(_T_301, UInt<5>("h01")) @[Cat.scala 29:58]
-    node _T_303 = cat(_T_302, UInt<7>("h06f")) @[Cat.scala 29:58]
-    node _T_304 = cat(_T_244, _T_263) @[Cat.scala 29:58]
-    node _T_305 = cat(_T_304, _T_282) @[Cat.scala 29:58]
-    node _T_306 = cat(_T_305, _T_303) @[Cat.scala 29:58]
-    node _T_307 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_308 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_309 = cat(UInt<2>("h01"), _T_308) @[Cat.scala 29:58]
-    node _T_310 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_311 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_311.bits <= _T_306 @[el2_ifu_compress.scala 18:14]
-    _T_311.rd <= UInt<5>("h01") @[el2_ifu_compress.scala 19:12]
-    _T_311.rs1 <= _T_307 @[el2_ifu_compress.scala 20:13]
-    _T_311.rs2 <= _T_309 @[el2_ifu_compress.scala 21:13]
-    _T_311.rs3 <= _T_310 @[el2_ifu_compress.scala 22:13]
-    node _T_312 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30]
-    node _T_313 = bits(_T_312, 0, 0) @[Bitwise.scala 72:15]
-    node _T_314 = mux(_T_313, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
-    node _T_315 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38]
-    node _T_316 = cat(_T_314, _T_315) @[Cat.scala 29:58]
-    node _T_317 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_318 = cat(_T_317, UInt<7>("h013")) @[Cat.scala 29:58]
-    node _T_319 = cat(_T_316, UInt<5>("h00")) @[Cat.scala 29:58]
-    node _T_320 = cat(_T_319, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_321 = cat(_T_320, _T_318) @[Cat.scala 29:58]
-    node _T_322 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_323 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_324 = cat(UInt<2>("h01"), _T_323) @[Cat.scala 29:58]
-    node _T_325 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_326 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_326.bits <= _T_321 @[el2_ifu_compress.scala 18:14]
-    _T_326.rd <= _T_322 @[el2_ifu_compress.scala 19:12]
-    _T_326.rs1 <= UInt<5>("h00") @[el2_ifu_compress.scala 20:13]
-    _T_326.rs2 <= _T_324 @[el2_ifu_compress.scala 21:13]
-    _T_326.rs3 <= _T_325 @[el2_ifu_compress.scala 22:13]
-    node _T_327 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30]
-    node _T_328 = bits(_T_327, 0, 0) @[Bitwise.scala 72:15]
-    node _T_329 = mux(_T_328, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
-    node _T_330 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38]
-    node _T_331 = cat(_T_329, _T_330) @[Cat.scala 29:58]
-    node _T_332 = orr(_T_331) @[el2_ifu_compress.scala 86:29]
-    node _T_333 = mux(_T_332, UInt<7>("h037"), UInt<7>("h03f")) @[el2_ifu_compress.scala 86:20]
-    node _T_334 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 37:30]
-    node _T_335 = bits(_T_334, 0, 0) @[Bitwise.scala 72:15]
-    node _T_336 = mux(_T_335, UInt<15>("h07fff"), UInt<15>("h00")) @[Bitwise.scala 72:12]
-    node _T_337 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 37:38]
-    node _T_338 = cat(_T_336, _T_337) @[Cat.scala 29:58]
-    node _T_339 = cat(_T_338, UInt<12>("h00")) @[Cat.scala 29:58]
-    node _T_340 = bits(_T_339, 31, 12) @[el2_ifu_compress.scala 87:31]
-    node _T_341 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_342 = cat(_T_340, _T_341) @[Cat.scala 29:58]
-    node _T_343 = cat(_T_342, _T_333) @[Cat.scala 29:58]
-    node _T_344 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_345 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_346 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_347 = cat(UInt<2>("h01"), _T_346) @[Cat.scala 29:58]
-    node _T_348 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_349 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_349.bits <= _T_343 @[el2_ifu_compress.scala 18:14]
-    _T_349.rd <= _T_344 @[el2_ifu_compress.scala 19:12]
-    _T_349.rs1 <= _T_345 @[el2_ifu_compress.scala 20:13]
-    _T_349.rs2 <= _T_347 @[el2_ifu_compress.scala 21:13]
-    _T_349.rs3 <= _T_348 @[el2_ifu_compress.scala 22:13]
-    node _T_350 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_351 = eq(_T_350, UInt<5>("h00")) @[el2_ifu_compress.scala 88:14]
-    node _T_352 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_353 = eq(_T_352, UInt<5>("h02")) @[el2_ifu_compress.scala 88:27]
-    node _T_354 = or(_T_351, _T_353) @[el2_ifu_compress.scala 88:21]
-    node _T_355 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30]
-    node _T_356 = bits(_T_355, 0, 0) @[Bitwise.scala 72:15]
-    node _T_357 = mux(_T_356, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
-    node _T_358 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38]
-    node _T_359 = cat(_T_357, _T_358) @[Cat.scala 29:58]
-    node _T_360 = orr(_T_359) @[el2_ifu_compress.scala 82:29]
-    node _T_361 = mux(_T_360, UInt<7>("h013"), UInt<7>("h01f")) @[el2_ifu_compress.scala 82:20]
-    node _T_362 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 38:34]
-    node _T_363 = bits(_T_362, 0, 0) @[Bitwise.scala 72:15]
-    node _T_364 = mux(_T_363, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12]
-    node _T_365 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 38:42]
-    node _T_366 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 38:50]
-    node _T_367 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 38:56]
-    node _T_368 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 38:62]
-    node _T_369 = cat(_T_367, _T_368) @[Cat.scala 29:58]
-    node _T_370 = cat(_T_369, UInt<4>("h00")) @[Cat.scala 29:58]
-    node _T_371 = cat(_T_364, _T_365) @[Cat.scala 29:58]
-    node _T_372 = cat(_T_371, _T_366) @[Cat.scala 29:58]
-    node _T_373 = cat(_T_372, _T_370) @[Cat.scala 29:58]
-    node _T_374 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_375 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_376 = cat(_T_375, _T_361) @[Cat.scala 29:58]
-    node _T_377 = cat(_T_373, _T_374) @[Cat.scala 29:58]
-    node _T_378 = cat(_T_377, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_379 = cat(_T_378, _T_376) @[Cat.scala 29:58]
-    node _T_380 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_381 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_382 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_383 = cat(UInt<2>("h01"), _T_382) @[Cat.scala 29:58]
-    node _T_384 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_385 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_385.bits <= _T_379 @[el2_ifu_compress.scala 18:14]
-    _T_385.rd <= _T_380 @[el2_ifu_compress.scala 19:12]
-    _T_385.rs1 <= _T_381 @[el2_ifu_compress.scala 20:13]
-    _T_385.rs2 <= _T_383 @[el2_ifu_compress.scala 21:13]
-    _T_385.rs3 <= _T_384 @[el2_ifu_compress.scala 22:13]
-    node _T_386 = mux(_T_354, _T_385, _T_349) @[el2_ifu_compress.scala 88:10]
-    node _T_387 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 42:20]
-    node _T_388 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 42:27]
-    node _T_389 = cat(_T_387, _T_388) @[Cat.scala 29:58]
-    node _T_390 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_391 = cat(UInt<2>("h01"), _T_390) @[Cat.scala 29:58]
-    node _T_392 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_393 = cat(UInt<2>("h01"), _T_392) @[Cat.scala 29:58]
-    node _T_394 = cat(_T_393, UInt<7>("h013")) @[Cat.scala 29:58]
-    node _T_395 = cat(_T_389, _T_391) @[Cat.scala 29:58]
-    node _T_396 = cat(_T_395, UInt<3>("h05")) @[Cat.scala 29:58]
-    node _T_397 = cat(_T_396, _T_394) @[Cat.scala 29:58]
-    node _T_398 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 42:20]
-    node _T_399 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 42:27]
-    node _T_400 = cat(_T_398, _T_399) @[Cat.scala 29:58]
-    node _T_401 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_402 = cat(UInt<2>("h01"), _T_401) @[Cat.scala 29:58]
-    node _T_403 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_404 = cat(UInt<2>("h01"), _T_403) @[Cat.scala 29:58]
-    node _T_405 = cat(_T_404, UInt<7>("h013")) @[Cat.scala 29:58]
-    node _T_406 = cat(_T_400, _T_402) @[Cat.scala 29:58]
-    node _T_407 = cat(_T_406, UInt<3>("h05")) @[Cat.scala 29:58]
-    node _T_408 = cat(_T_407, _T_405) @[Cat.scala 29:58]
-    node _T_409 = or(_T_408, UInt<31>("h040000000")) @[el2_ifu_compress.scala 95:23]
-    node _T_410 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30]
-    node _T_411 = bits(_T_410, 0, 0) @[Bitwise.scala 72:15]
-    node _T_412 = mux(_T_411, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
-    node _T_413 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38]
-    node _T_414 = cat(_T_412, _T_413) @[Cat.scala 29:58]
-    node _T_415 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_416 = cat(UInt<2>("h01"), _T_415) @[Cat.scala 29:58]
-    node _T_417 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_418 = cat(UInt<2>("h01"), _T_417) @[Cat.scala 29:58]
-    node _T_419 = cat(_T_418, UInt<7>("h013")) @[Cat.scala 29:58]
-    node _T_420 = cat(_T_414, _T_416) @[Cat.scala 29:58]
-    node _T_421 = cat(_T_420, UInt<3>("h07")) @[Cat.scala 29:58]
-    node _T_422 = cat(_T_421, _T_419) @[Cat.scala 29:58]
-    wire _T_423 : UInt<3>[8] @[el2_ifu_compress.scala 98:28]
-    _T_423[0] <= UInt<1>("h00") @[el2_ifu_compress.scala 98:28]
-    _T_423[1] <= UInt<3>("h04") @[el2_ifu_compress.scala 98:28]
-    _T_423[2] <= UInt<3>("h06") @[el2_ifu_compress.scala 98:28]
-    _T_423[3] <= UInt<3>("h07") @[el2_ifu_compress.scala 98:28]
-    _T_423[4] <= UInt<1>("h00") @[el2_ifu_compress.scala 98:28]
-    _T_423[5] <= UInt<1>("h00") @[el2_ifu_compress.scala 98:28]
-    _T_423[6] <= UInt<2>("h02") @[el2_ifu_compress.scala 98:28]
-    _T_423[7] <= UInt<2>("h03") @[el2_ifu_compress.scala 98:28]
-    node _T_424 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 98:74]
-    node _T_425 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 98:81]
-    node _T_426 = cat(_T_424, _T_425) @[Cat.scala 29:58]
-    node _T_427 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 99:24]
-    node _T_428 = eq(_T_427, UInt<1>("h00")) @[el2_ifu_compress.scala 99:30]
-    node _T_429 = mux(_T_428, UInt<31>("h040000000"), UInt<1>("h00")) @[el2_ifu_compress.scala 99:22]
-    node _T_430 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 100:24]
-    node _T_431 = mux(_T_430, UInt<7>("h03b"), UInt<7>("h033")) @[el2_ifu_compress.scala 100:22]
-    node _T_432 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_433 = cat(UInt<2>("h01"), _T_432) @[Cat.scala 29:58]
-    node _T_434 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_435 = cat(UInt<2>("h01"), _T_434) @[Cat.scala 29:58]
-    node _T_436 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_437 = cat(UInt<2>("h01"), _T_436) @[Cat.scala 29:58]
-    node _T_438 = cat(_T_437, _T_431) @[Cat.scala 29:58]
-    node _T_439 = cat(_T_433, _T_435) @[Cat.scala 29:58]
-    node _T_440 = cat(_T_439, _T_423[_T_426]) @[Cat.scala 29:58]
-    node _T_441 = cat(_T_440, _T_438) @[Cat.scala 29:58]
-    node _T_442 = or(_T_441, _T_429) @[el2_ifu_compress.scala 101:43]
-    wire _T_443 : UInt<32>[4] @[el2_ifu_compress.scala 103:19]
-    _T_443[0] <= _T_397 @[el2_ifu_compress.scala 103:19]
-    _T_443[1] <= _T_409 @[el2_ifu_compress.scala 103:19]
-    _T_443[2] <= _T_422 @[el2_ifu_compress.scala 103:19]
-    _T_443[3] <= _T_442 @[el2_ifu_compress.scala 103:19]
-    node _T_444 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 103:46]
-    node _T_445 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_446 = cat(UInt<2>("h01"), _T_445) @[Cat.scala 29:58]
-    node _T_447 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_448 = cat(UInt<2>("h01"), _T_447) @[Cat.scala 29:58]
-    node _T_449 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_450 = cat(UInt<2>("h01"), _T_449) @[Cat.scala 29:58]
-    node _T_451 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_452 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_452.bits <= _T_443[_T_444] @[el2_ifu_compress.scala 18:14]
-    _T_452.rd <= _T_446 @[el2_ifu_compress.scala 19:12]
-    _T_452.rs1 <= _T_448 @[el2_ifu_compress.scala 20:13]
-    _T_452.rs2 <= _T_450 @[el2_ifu_compress.scala 21:13]
-    _T_452.rs3 <= _T_451 @[el2_ifu_compress.scala 22:13]
-    node _T_453 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28]
-    node _T_454 = bits(_T_453, 0, 0) @[Bitwise.scala 72:15]
-    node _T_455 = mux(_T_454, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
-    node _T_456 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36]
-    node _T_457 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42]
-    node _T_458 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51]
-    node _T_459 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57]
-    node _T_460 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63]
-    node _T_461 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69]
-    node _T_462 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76]
-    node _T_463 = cat(_T_462, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_464 = cat(_T_460, _T_461) @[Cat.scala 29:58]
-    node _T_465 = cat(_T_464, _T_463) @[Cat.scala 29:58]
-    node _T_466 = cat(_T_458, _T_459) @[Cat.scala 29:58]
-    node _T_467 = cat(_T_455, _T_456) @[Cat.scala 29:58]
-    node _T_468 = cat(_T_467, _T_457) @[Cat.scala 29:58]
-    node _T_469 = cat(_T_468, _T_466) @[Cat.scala 29:58]
-    node _T_470 = cat(_T_469, _T_465) @[Cat.scala 29:58]
-    node _T_471 = bits(_T_470, 20, 20) @[el2_ifu_compress.scala 90:26]
-    node _T_472 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28]
-    node _T_473 = bits(_T_472, 0, 0) @[Bitwise.scala 72:15]
-    node _T_474 = mux(_T_473, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
-    node _T_475 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36]
-    node _T_476 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42]
-    node _T_477 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51]
-    node _T_478 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57]
-    node _T_479 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63]
-    node _T_480 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69]
-    node _T_481 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76]
-    node _T_482 = cat(_T_481, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_483 = cat(_T_479, _T_480) @[Cat.scala 29:58]
-    node _T_484 = cat(_T_483, _T_482) @[Cat.scala 29:58]
-    node _T_485 = cat(_T_477, _T_478) @[Cat.scala 29:58]
-    node _T_486 = cat(_T_474, _T_475) @[Cat.scala 29:58]
-    node _T_487 = cat(_T_486, _T_476) @[Cat.scala 29:58]
-    node _T_488 = cat(_T_487, _T_485) @[Cat.scala 29:58]
-    node _T_489 = cat(_T_488, _T_484) @[Cat.scala 29:58]
-    node _T_490 = bits(_T_489, 10, 1) @[el2_ifu_compress.scala 90:36]
-    node _T_491 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28]
-    node _T_492 = bits(_T_491, 0, 0) @[Bitwise.scala 72:15]
-    node _T_493 = mux(_T_492, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
-    node _T_494 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36]
-    node _T_495 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42]
-    node _T_496 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51]
-    node _T_497 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57]
-    node _T_498 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63]
-    node _T_499 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69]
-    node _T_500 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76]
-    node _T_501 = cat(_T_500, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_502 = cat(_T_498, _T_499) @[Cat.scala 29:58]
-    node _T_503 = cat(_T_502, _T_501) @[Cat.scala 29:58]
-    node _T_504 = cat(_T_496, _T_497) @[Cat.scala 29:58]
-    node _T_505 = cat(_T_493, _T_494) @[Cat.scala 29:58]
-    node _T_506 = cat(_T_505, _T_495) @[Cat.scala 29:58]
-    node _T_507 = cat(_T_506, _T_504) @[Cat.scala 29:58]
-    node _T_508 = cat(_T_507, _T_503) @[Cat.scala 29:58]
-    node _T_509 = bits(_T_508, 11, 11) @[el2_ifu_compress.scala 90:48]
-    node _T_510 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28]
-    node _T_511 = bits(_T_510, 0, 0) @[Bitwise.scala 72:15]
-    node _T_512 = mux(_T_511, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
-    node _T_513 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36]
-    node _T_514 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42]
-    node _T_515 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51]
-    node _T_516 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57]
-    node _T_517 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63]
-    node _T_518 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69]
-    node _T_519 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76]
-    node _T_520 = cat(_T_519, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_521 = cat(_T_517, _T_518) @[Cat.scala 29:58]
-    node _T_522 = cat(_T_521, _T_520) @[Cat.scala 29:58]
-    node _T_523 = cat(_T_515, _T_516) @[Cat.scala 29:58]
-    node _T_524 = cat(_T_512, _T_513) @[Cat.scala 29:58]
-    node _T_525 = cat(_T_524, _T_514) @[Cat.scala 29:58]
-    node _T_526 = cat(_T_525, _T_523) @[Cat.scala 29:58]
-    node _T_527 = cat(_T_526, _T_522) @[Cat.scala 29:58]
-    node _T_528 = bits(_T_527, 19, 12) @[el2_ifu_compress.scala 90:58]
-    node _T_529 = cat(_T_528, UInt<5>("h00")) @[Cat.scala 29:58]
-    node _T_530 = cat(_T_529, UInt<7>("h06f")) @[Cat.scala 29:58]
-    node _T_531 = cat(_T_471, _T_490) @[Cat.scala 29:58]
-    node _T_532 = cat(_T_531, _T_509) @[Cat.scala 29:58]
-    node _T_533 = cat(_T_532, _T_530) @[Cat.scala 29:58]
-    node _T_534 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_535 = cat(UInt<2>("h01"), _T_534) @[Cat.scala 29:58]
-    node _T_536 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29]
-    node _T_537 = cat(UInt<2>("h01"), _T_536) @[Cat.scala 29:58]
-    node _T_538 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_539 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_539.bits <= _T_533 @[el2_ifu_compress.scala 18:14]
-    _T_539.rd <= UInt<5>("h00") @[el2_ifu_compress.scala 19:12]
-    _T_539.rs1 <= _T_535 @[el2_ifu_compress.scala 20:13]
-    _T_539.rs2 <= _T_537 @[el2_ifu_compress.scala 21:13]
-    _T_539.rs3 <= _T_538 @[el2_ifu_compress.scala 22:13]
-    node _T_540 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27]
-    node _T_541 = bits(_T_540, 0, 0) @[Bitwise.scala 72:15]
-    node _T_542 = mux(_T_541, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
-    node _T_543 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35]
-    node _T_544 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43]
-    node _T_545 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49]
-    node _T_546 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59]
-    node _T_547 = cat(_T_545, _T_546) @[Cat.scala 29:58]
-    node _T_548 = cat(_T_547, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_549 = cat(_T_542, _T_543) @[Cat.scala 29:58]
-    node _T_550 = cat(_T_549, _T_544) @[Cat.scala 29:58]
-    node _T_551 = cat(_T_550, _T_548) @[Cat.scala 29:58]
-    node _T_552 = bits(_T_551, 12, 12) @[el2_ifu_compress.scala 91:29]
-    node _T_553 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27]
-    node _T_554 = bits(_T_553, 0, 0) @[Bitwise.scala 72:15]
-    node _T_555 = mux(_T_554, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
-    node _T_556 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35]
-    node _T_557 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43]
-    node _T_558 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49]
-    node _T_559 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59]
-    node _T_560 = cat(_T_558, _T_559) @[Cat.scala 29:58]
-    node _T_561 = cat(_T_560, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_562 = cat(_T_555, _T_556) @[Cat.scala 29:58]
-    node _T_563 = cat(_T_562, _T_557) @[Cat.scala 29:58]
-    node _T_564 = cat(_T_563, _T_561) @[Cat.scala 29:58]
-    node _T_565 = bits(_T_564, 10, 5) @[el2_ifu_compress.scala 91:39]
-    node _T_566 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_567 = cat(UInt<2>("h01"), _T_566) @[Cat.scala 29:58]
-    node _T_568 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27]
-    node _T_569 = bits(_T_568, 0, 0) @[Bitwise.scala 72:15]
-    node _T_570 = mux(_T_569, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
-    node _T_571 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35]
-    node _T_572 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43]
-    node _T_573 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49]
-    node _T_574 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59]
-    node _T_575 = cat(_T_573, _T_574) @[Cat.scala 29:58]
-    node _T_576 = cat(_T_575, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_577 = cat(_T_570, _T_571) @[Cat.scala 29:58]
-    node _T_578 = cat(_T_577, _T_572) @[Cat.scala 29:58]
-    node _T_579 = cat(_T_578, _T_576) @[Cat.scala 29:58]
-    node _T_580 = bits(_T_579, 4, 1) @[el2_ifu_compress.scala 91:71]
-    node _T_581 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27]
-    node _T_582 = bits(_T_581, 0, 0) @[Bitwise.scala 72:15]
-    node _T_583 = mux(_T_582, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
-    node _T_584 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35]
-    node _T_585 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43]
-    node _T_586 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49]
-    node _T_587 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59]
-    node _T_588 = cat(_T_586, _T_587) @[Cat.scala 29:58]
-    node _T_589 = cat(_T_588, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_590 = cat(_T_583, _T_584) @[Cat.scala 29:58]
-    node _T_591 = cat(_T_590, _T_585) @[Cat.scala 29:58]
-    node _T_592 = cat(_T_591, _T_589) @[Cat.scala 29:58]
-    node _T_593 = bits(_T_592, 11, 11) @[el2_ifu_compress.scala 91:82]
-    node _T_594 = cat(_T_593, UInt<7>("h063")) @[Cat.scala 29:58]
-    node _T_595 = cat(UInt<3>("h00"), _T_580) @[Cat.scala 29:58]
-    node _T_596 = cat(_T_595, _T_594) @[Cat.scala 29:58]
-    node _T_597 = cat(UInt<5>("h00"), _T_567) @[Cat.scala 29:58]
-    node _T_598 = cat(_T_552, _T_565) @[Cat.scala 29:58]
-    node _T_599 = cat(_T_598, _T_597) @[Cat.scala 29:58]
-    node _T_600 = cat(_T_599, _T_596) @[Cat.scala 29:58]
-    node _T_601 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_602 = cat(UInt<2>("h01"), _T_601) @[Cat.scala 29:58]
-    node _T_603 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_604 = cat(UInt<2>("h01"), _T_603) @[Cat.scala 29:58]
-    node _T_605 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_606 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_606.bits <= _T_600 @[el2_ifu_compress.scala 18:14]
-    _T_606.rd <= _T_602 @[el2_ifu_compress.scala 19:12]
-    _T_606.rs1 <= _T_604 @[el2_ifu_compress.scala 20:13]
-    _T_606.rs2 <= UInt<5>("h00") @[el2_ifu_compress.scala 21:13]
-    _T_606.rs3 <= _T_605 @[el2_ifu_compress.scala 22:13]
-    node _T_607 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27]
-    node _T_608 = bits(_T_607, 0, 0) @[Bitwise.scala 72:15]
-    node _T_609 = mux(_T_608, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
-    node _T_610 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35]
-    node _T_611 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43]
-    node _T_612 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49]
-    node _T_613 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59]
-    node _T_614 = cat(_T_612, _T_613) @[Cat.scala 29:58]
-    node _T_615 = cat(_T_614, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_616 = cat(_T_609, _T_610) @[Cat.scala 29:58]
-    node _T_617 = cat(_T_616, _T_611) @[Cat.scala 29:58]
-    node _T_618 = cat(_T_617, _T_615) @[Cat.scala 29:58]
-    node _T_619 = bits(_T_618, 12, 12) @[el2_ifu_compress.scala 92:29]
-    node _T_620 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27]
-    node _T_621 = bits(_T_620, 0, 0) @[Bitwise.scala 72:15]
-    node _T_622 = mux(_T_621, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
-    node _T_623 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35]
-    node _T_624 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43]
-    node _T_625 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49]
-    node _T_626 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59]
-    node _T_627 = cat(_T_625, _T_626) @[Cat.scala 29:58]
-    node _T_628 = cat(_T_627, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_629 = cat(_T_622, _T_623) @[Cat.scala 29:58]
-    node _T_630 = cat(_T_629, _T_624) @[Cat.scala 29:58]
-    node _T_631 = cat(_T_630, _T_628) @[Cat.scala 29:58]
-    node _T_632 = bits(_T_631, 10, 5) @[el2_ifu_compress.scala 92:39]
-    node _T_633 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_634 = cat(UInt<2>("h01"), _T_633) @[Cat.scala 29:58]
-    node _T_635 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27]
-    node _T_636 = bits(_T_635, 0, 0) @[Bitwise.scala 72:15]
-    node _T_637 = mux(_T_636, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
-    node _T_638 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35]
-    node _T_639 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43]
-    node _T_640 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49]
-    node _T_641 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59]
-    node _T_642 = cat(_T_640, _T_641) @[Cat.scala 29:58]
-    node _T_643 = cat(_T_642, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_644 = cat(_T_637, _T_638) @[Cat.scala 29:58]
-    node _T_645 = cat(_T_644, _T_639) @[Cat.scala 29:58]
-    node _T_646 = cat(_T_645, _T_643) @[Cat.scala 29:58]
-    node _T_647 = bits(_T_646, 4, 1) @[el2_ifu_compress.scala 92:71]
-    node _T_648 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27]
-    node _T_649 = bits(_T_648, 0, 0) @[Bitwise.scala 72:15]
-    node _T_650 = mux(_T_649, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
-    node _T_651 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35]
-    node _T_652 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43]
-    node _T_653 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49]
-    node _T_654 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59]
-    node _T_655 = cat(_T_653, _T_654) @[Cat.scala 29:58]
-    node _T_656 = cat(_T_655, UInt<1>("h00")) @[Cat.scala 29:58]
-    node _T_657 = cat(_T_650, _T_651) @[Cat.scala 29:58]
-    node _T_658 = cat(_T_657, _T_652) @[Cat.scala 29:58]
-    node _T_659 = cat(_T_658, _T_656) @[Cat.scala 29:58]
-    node _T_660 = bits(_T_659, 11, 11) @[el2_ifu_compress.scala 92:82]
-    node _T_661 = cat(_T_660, UInt<7>("h063")) @[Cat.scala 29:58]
-    node _T_662 = cat(UInt<3>("h01"), _T_647) @[Cat.scala 29:58]
-    node _T_663 = cat(_T_662, _T_661) @[Cat.scala 29:58]
-    node _T_664 = cat(UInt<5>("h00"), _T_634) @[Cat.scala 29:58]
-    node _T_665 = cat(_T_619, _T_632) @[Cat.scala 29:58]
-    node _T_666 = cat(_T_665, _T_664) @[Cat.scala 29:58]
-    node _T_667 = cat(_T_666, _T_663) @[Cat.scala 29:58]
-    node _T_668 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29]
-    node _T_669 = cat(UInt<2>("h01"), _T_668) @[Cat.scala 29:58]
-    node _T_670 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_671 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_671.bits <= _T_667 @[el2_ifu_compress.scala 18:14]
-    _T_671.rd <= UInt<5>("h00") @[el2_ifu_compress.scala 19:12]
-    _T_671.rs1 <= _T_669 @[el2_ifu_compress.scala 20:13]
-    _T_671.rs2 <= UInt<5>("h00") @[el2_ifu_compress.scala 21:13]
-    _T_671.rs3 <= _T_670 @[el2_ifu_compress.scala 22:13]
-    node _T_672 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_673 = orr(_T_672) @[el2_ifu_compress.scala 109:27]
-    node _T_674 = mux(_T_673, UInt<7>("h03"), UInt<7>("h01f")) @[el2_ifu_compress.scala 109:23]
-    node _T_675 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 42:20]
-    node _T_676 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 42:27]
-    node _T_677 = cat(_T_675, _T_676) @[Cat.scala 29:58]
-    node _T_678 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_679 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_680 = cat(_T_679, UInt<7>("h013")) @[Cat.scala 29:58]
-    node _T_681 = cat(_T_677, _T_678) @[Cat.scala 29:58]
-    node _T_682 = cat(_T_681, UInt<3>("h01")) @[Cat.scala 29:58]
-    node _T_683 = cat(_T_682, _T_680) @[Cat.scala 29:58]
-    node _T_684 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_685 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_686 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_687 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_688 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_688.bits <= _T_683 @[el2_ifu_compress.scala 18:14]
-    _T_688.rd <= _T_684 @[el2_ifu_compress.scala 19:12]
-    _T_688.rs1 <= _T_685 @[el2_ifu_compress.scala 20:13]
-    _T_688.rs2 <= _T_686 @[el2_ifu_compress.scala 21:13]
-    _T_688.rs3 <= _T_687 @[el2_ifu_compress.scala 22:13]
-    node _T_689 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 34:22]
-    node _T_690 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 34:30]
-    node _T_691 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 34:37]
-    node _T_692 = cat(_T_691, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_693 = cat(_T_689, _T_690) @[Cat.scala 29:58]
-    node _T_694 = cat(_T_693, _T_692) @[Cat.scala 29:58]
-    node _T_695 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_696 = cat(_T_695, UInt<7>("h07")) @[Cat.scala 29:58]
-    node _T_697 = cat(_T_694, UInt<5>("h02")) @[Cat.scala 29:58]
-    node _T_698 = cat(_T_697, UInt<3>("h03")) @[Cat.scala 29:58]
-    node _T_699 = cat(_T_698, _T_696) @[Cat.scala 29:58]
-    node _T_700 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_701 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_702 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_703 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_703.bits <= _T_699 @[el2_ifu_compress.scala 18:14]
-    _T_703.rd <= _T_700 @[el2_ifu_compress.scala 19:12]
-    _T_703.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13]
-    _T_703.rs2 <= _T_701 @[el2_ifu_compress.scala 21:13]
-    _T_703.rs3 <= _T_702 @[el2_ifu_compress.scala 22:13]
-    node _T_704 = bits(io.in, 3, 2) @[el2_ifu_compress.scala 33:22]
-    node _T_705 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 33:30]
-    node _T_706 = bits(io.in, 6, 4) @[el2_ifu_compress.scala 33:37]
-    node _T_707 = cat(_T_706, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_708 = cat(_T_704, _T_705) @[Cat.scala 29:58]
-    node _T_709 = cat(_T_708, _T_707) @[Cat.scala 29:58]
-    node _T_710 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_711 = cat(_T_710, _T_674) @[Cat.scala 29:58]
-    node _T_712 = cat(_T_709, UInt<5>("h02")) @[Cat.scala 29:58]
-    node _T_713 = cat(_T_712, UInt<3>("h02")) @[Cat.scala 29:58]
-    node _T_714 = cat(_T_713, _T_711) @[Cat.scala 29:58]
-    node _T_715 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_716 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_717 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_718 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_718.bits <= _T_714 @[el2_ifu_compress.scala 18:14]
-    _T_718.rd <= _T_715 @[el2_ifu_compress.scala 19:12]
-    _T_718.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13]
-    _T_718.rs2 <= _T_716 @[el2_ifu_compress.scala 21:13]
-    _T_718.rs3 <= _T_717 @[el2_ifu_compress.scala 22:13]
-    node _T_719 = bits(io.in, 3, 2) @[el2_ifu_compress.scala 33:22]
-    node _T_720 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 33:30]
-    node _T_721 = bits(io.in, 6, 4) @[el2_ifu_compress.scala 33:37]
-    node _T_722 = cat(_T_721, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_723 = cat(_T_719, _T_720) @[Cat.scala 29:58]
-    node _T_724 = cat(_T_723, _T_722) @[Cat.scala 29:58]
-    node _T_725 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_726 = cat(_T_725, UInt<7>("h07")) @[Cat.scala 29:58]
-    node _T_727 = cat(_T_724, UInt<5>("h02")) @[Cat.scala 29:58]
-    node _T_728 = cat(_T_727, UInt<3>("h02")) @[Cat.scala 29:58]
-    node _T_729 = cat(_T_728, _T_726) @[Cat.scala 29:58]
-    node _T_730 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_731 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_732 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_733 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_733.bits <= _T_729 @[el2_ifu_compress.scala 18:14]
-    _T_733.rd <= _T_730 @[el2_ifu_compress.scala 19:12]
-    _T_733.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13]
-    _T_733.rs2 <= _T_731 @[el2_ifu_compress.scala 21:13]
-    _T_733.rs3 <= _T_732 @[el2_ifu_compress.scala 22:13]
-    node _T_734 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_735 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_736 = cat(_T_735, UInt<7>("h033")) @[Cat.scala 29:58]
-    node _T_737 = cat(_T_734, UInt<5>("h00")) @[Cat.scala 29:58]
-    node _T_738 = cat(_T_737, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_739 = cat(_T_738, _T_736) @[Cat.scala 29:58]
-    node _T_740 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_741 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_742 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_743 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_743.bits <= _T_739 @[el2_ifu_compress.scala 18:14]
-    _T_743.rd <= _T_740 @[el2_ifu_compress.scala 19:12]
-    _T_743.rs1 <= UInt<5>("h00") @[el2_ifu_compress.scala 20:13]
-    _T_743.rs2 <= _T_741 @[el2_ifu_compress.scala 21:13]
-    _T_743.rs3 <= _T_742 @[el2_ifu_compress.scala 22:13]
-    node _T_744 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_745 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_746 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_747 = cat(_T_746, UInt<7>("h033")) @[Cat.scala 29:58]
-    node _T_748 = cat(_T_744, _T_745) @[Cat.scala 29:58]
-    node _T_749 = cat(_T_748, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_750 = cat(_T_749, _T_747) @[Cat.scala 29:58]
-    node _T_751 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_752 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_753 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_754 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_755 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_755.bits <= _T_750 @[el2_ifu_compress.scala 18:14]
-    _T_755.rd <= _T_751 @[el2_ifu_compress.scala 19:12]
-    _T_755.rs1 <= _T_752 @[el2_ifu_compress.scala 20:13]
-    _T_755.rs2 <= _T_753 @[el2_ifu_compress.scala 21:13]
-    _T_755.rs3 <= _T_754 @[el2_ifu_compress.scala 22:13]
-    node _T_756 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_757 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_758 = cat(UInt<5>("h00"), UInt<7>("h067")) @[Cat.scala 29:58]
-    node _T_759 = cat(_T_756, _T_757) @[Cat.scala 29:58]
-    node _T_760 = cat(_T_759, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_761 = cat(_T_760, _T_758) @[Cat.scala 29:58]
-    node _T_762 = shr(_T_761, 7) @[el2_ifu_compress.scala 129:29]
-    node _T_763 = cat(_T_762, UInt<7>("h01f")) @[Cat.scala 29:58]
-    node _T_764 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_765 = orr(_T_764) @[el2_ifu_compress.scala 130:37]
-    node _T_766 = mux(_T_765, _T_761, _T_763) @[el2_ifu_compress.scala 130:33]
-    node _T_767 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_768 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_769 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_770 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_770.bits <= _T_766 @[el2_ifu_compress.scala 18:14]
-    _T_770.rd <= UInt<5>("h00") @[el2_ifu_compress.scala 19:12]
-    _T_770.rs1 <= _T_767 @[el2_ifu_compress.scala 20:13]
-    _T_770.rs2 <= _T_768 @[el2_ifu_compress.scala 21:13]
-    _T_770.rs3 <= _T_769 @[el2_ifu_compress.scala 22:13]
-    node _T_771 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_772 = orr(_T_771) @[el2_ifu_compress.scala 131:27]
-    node _T_773 = mux(_T_772, _T_743, _T_770) @[el2_ifu_compress.scala 131:22]
-    node _T_774 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_775 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_776 = cat(UInt<5>("h01"), UInt<7>("h067")) @[Cat.scala 29:58]
-    node _T_777 = cat(_T_774, _T_775) @[Cat.scala 29:58]
-    node _T_778 = cat(_T_777, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_779 = cat(_T_778, _T_776) @[Cat.scala 29:58]
-    node _T_780 = shr(_T_761, 7) @[el2_ifu_compress.scala 133:27]
-    node _T_781 = cat(_T_780, UInt<7>("h073")) @[Cat.scala 29:58]
-    node _T_782 = or(_T_781, UInt<21>("h0100000")) @[el2_ifu_compress.scala 133:46]
-    node _T_783 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_784 = orr(_T_783) @[el2_ifu_compress.scala 134:37]
-    node _T_785 = mux(_T_784, _T_779, _T_782) @[el2_ifu_compress.scala 134:33]
-    node _T_786 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_787 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_788 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_789 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_789.bits <= _T_785 @[el2_ifu_compress.scala 18:14]
-    _T_789.rd <= UInt<5>("h01") @[el2_ifu_compress.scala 19:12]
-    _T_789.rs1 <= _T_786 @[el2_ifu_compress.scala 20:13]
-    _T_789.rs2 <= _T_787 @[el2_ifu_compress.scala 21:13]
-    _T_789.rs3 <= _T_788 @[el2_ifu_compress.scala 22:13]
-    node _T_790 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_791 = orr(_T_790) @[el2_ifu_compress.scala 135:30]
-    node _T_792 = mux(_T_791, _T_755, _T_789) @[el2_ifu_compress.scala 135:25]
-    node _T_793 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 136:12]
-    node _T_794 = mux(_T_793, _T_792, _T_773) @[el2_ifu_compress.scala 136:10]
-    node _T_795 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 36:22]
-    node _T_796 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 36:30]
-    node _T_797 = cat(_T_795, _T_796) @[Cat.scala 29:58]
-    node _T_798 = cat(_T_797, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_799 = shr(_T_798, 5) @[el2_ifu_compress.scala 120:34]
-    node _T_800 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_801 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 36:22]
-    node _T_802 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 36:30]
-    node _T_803 = cat(_T_801, _T_802) @[Cat.scala 29:58]
-    node _T_804 = cat(_T_803, UInt<3>("h00")) @[Cat.scala 29:58]
-    node _T_805 = bits(_T_804, 4, 0) @[el2_ifu_compress.scala 120:66]
-    node _T_806 = cat(UInt<3>("h03"), _T_805) @[Cat.scala 29:58]
-    node _T_807 = cat(_T_806, UInt<7>("h027")) @[Cat.scala 29:58]
-    node _T_808 = cat(_T_799, _T_800) @[Cat.scala 29:58]
-    node _T_809 = cat(_T_808, UInt<5>("h02")) @[Cat.scala 29:58]
-    node _T_810 = cat(_T_809, _T_807) @[Cat.scala 29:58]
-    node _T_811 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_812 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_813 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_814 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_814.bits <= _T_810 @[el2_ifu_compress.scala 18:14]
-    _T_814.rd <= _T_811 @[el2_ifu_compress.scala 19:12]
-    _T_814.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13]
-    _T_814.rs2 <= _T_812 @[el2_ifu_compress.scala 21:13]
-    _T_814.rs3 <= _T_813 @[el2_ifu_compress.scala 22:13]
-    node _T_815 = bits(io.in, 8, 7) @[el2_ifu_compress.scala 35:22]
-    node _T_816 = bits(io.in, 12, 9) @[el2_ifu_compress.scala 35:30]
-    node _T_817 = cat(_T_815, _T_816) @[Cat.scala 29:58]
-    node _T_818 = cat(_T_817, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_819 = shr(_T_818, 5) @[el2_ifu_compress.scala 119:33]
-    node _T_820 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_821 = bits(io.in, 8, 7) @[el2_ifu_compress.scala 35:22]
-    node _T_822 = bits(io.in, 12, 9) @[el2_ifu_compress.scala 35:30]
-    node _T_823 = cat(_T_821, _T_822) @[Cat.scala 29:58]
-    node _T_824 = cat(_T_823, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_825 = bits(_T_824, 4, 0) @[el2_ifu_compress.scala 119:65]
-    node _T_826 = cat(UInt<3>("h02"), _T_825) @[Cat.scala 29:58]
-    node _T_827 = cat(_T_826, UInt<7>("h023")) @[Cat.scala 29:58]
-    node _T_828 = cat(_T_819, _T_820) @[Cat.scala 29:58]
-    node _T_829 = cat(_T_828, UInt<5>("h02")) @[Cat.scala 29:58]
-    node _T_830 = cat(_T_829, _T_827) @[Cat.scala 29:58]
-    node _T_831 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_832 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_833 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_834 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_834.bits <= _T_830 @[el2_ifu_compress.scala 18:14]
-    _T_834.rd <= _T_831 @[el2_ifu_compress.scala 19:12]
-    _T_834.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13]
-    _T_834.rs2 <= _T_832 @[el2_ifu_compress.scala 21:13]
-    _T_834.rs3 <= _T_833 @[el2_ifu_compress.scala 22:13]
-    node _T_835 = bits(io.in, 8, 7) @[el2_ifu_compress.scala 35:22]
-    node _T_836 = bits(io.in, 12, 9) @[el2_ifu_compress.scala 35:30]
-    node _T_837 = cat(_T_835, _T_836) @[Cat.scala 29:58]
-    node _T_838 = cat(_T_837, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_839 = shr(_T_838, 5) @[el2_ifu_compress.scala 122:40]
-    node _T_840 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_841 = bits(io.in, 8, 7) @[el2_ifu_compress.scala 35:22]
-    node _T_842 = bits(io.in, 12, 9) @[el2_ifu_compress.scala 35:30]
-    node _T_843 = cat(_T_841, _T_842) @[Cat.scala 29:58]
-    node _T_844 = cat(_T_843, UInt<2>("h00")) @[Cat.scala 29:58]
-    node _T_845 = bits(_T_844, 4, 0) @[el2_ifu_compress.scala 122:72]
-    node _T_846 = cat(UInt<3>("h02"), _T_845) @[Cat.scala 29:58]
-    node _T_847 = cat(_T_846, UInt<7>("h027")) @[Cat.scala 29:58]
-    node _T_848 = cat(_T_839, _T_840) @[Cat.scala 29:58]
-    node _T_849 = cat(_T_848, UInt<5>("h02")) @[Cat.scala 29:58]
-    node _T_850 = cat(_T_849, _T_847) @[Cat.scala 29:58]
-    node _T_851 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13]
-    node _T_852 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14]
-    node _T_853 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_854 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_854.bits <= _T_850 @[el2_ifu_compress.scala 18:14]
-    _T_854.rd <= _T_851 @[el2_ifu_compress.scala 19:12]
-    _T_854.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13]
-    _T_854.rs2 <= _T_852 @[el2_ifu_compress.scala 21:13]
-    _T_854.rs3 <= _T_853 @[el2_ifu_compress.scala 22:13]
-    node _T_855 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36]
-    node _T_856 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57]
-    node _T_857 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79]
-    node _T_858 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_859 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_859.bits <= io.in @[el2_ifu_compress.scala 18:14]
-    _T_859.rd <= _T_855 @[el2_ifu_compress.scala 19:12]
-    _T_859.rs1 <= _T_856 @[el2_ifu_compress.scala 20:13]
-    _T_859.rs2 <= _T_857 @[el2_ifu_compress.scala 21:13]
-    _T_859.rs3 <= _T_858 @[el2_ifu_compress.scala 22:13]
-    node _T_860 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36]
-    node _T_861 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57]
-    node _T_862 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79]
-    node _T_863 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_864 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_864.bits <= io.in @[el2_ifu_compress.scala 18:14]
-    _T_864.rd <= _T_860 @[el2_ifu_compress.scala 19:12]
-    _T_864.rs1 <= _T_861 @[el2_ifu_compress.scala 20:13]
-    _T_864.rs2 <= _T_862 @[el2_ifu_compress.scala 21:13]
-    _T_864.rs3 <= _T_863 @[el2_ifu_compress.scala 22:13]
-    node _T_865 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36]
-    node _T_866 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57]
-    node _T_867 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79]
-    node _T_868 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_869 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_869.bits <= io.in @[el2_ifu_compress.scala 18:14]
-    _T_869.rd <= _T_865 @[el2_ifu_compress.scala 19:12]
-    _T_869.rs1 <= _T_866 @[el2_ifu_compress.scala 20:13]
-    _T_869.rs2 <= _T_867 @[el2_ifu_compress.scala 21:13]
-    _T_869.rs3 <= _T_868 @[el2_ifu_compress.scala 22:13]
-    node _T_870 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36]
-    node _T_871 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57]
-    node _T_872 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79]
-    node _T_873 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_874 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_874.bits <= io.in @[el2_ifu_compress.scala 18:14]
-    _T_874.rd <= _T_870 @[el2_ifu_compress.scala 19:12]
-    _T_874.rs1 <= _T_871 @[el2_ifu_compress.scala 20:13]
-    _T_874.rs2 <= _T_872 @[el2_ifu_compress.scala 21:13]
-    _T_874.rs3 <= _T_873 @[el2_ifu_compress.scala 22:13]
-    node _T_875 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36]
-    node _T_876 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57]
-    node _T_877 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79]
-    node _T_878 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_879 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_879.bits <= io.in @[el2_ifu_compress.scala 18:14]
-    _T_879.rd <= _T_875 @[el2_ifu_compress.scala 19:12]
-    _T_879.rs1 <= _T_876 @[el2_ifu_compress.scala 20:13]
-    _T_879.rs2 <= _T_877 @[el2_ifu_compress.scala 21:13]
-    _T_879.rs3 <= _T_878 @[el2_ifu_compress.scala 22:13]
-    node _T_880 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36]
-    node _T_881 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57]
-    node _T_882 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79]
-    node _T_883 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_884 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_884.bits <= io.in @[el2_ifu_compress.scala 18:14]
-    _T_884.rd <= _T_880 @[el2_ifu_compress.scala 19:12]
-    _T_884.rs1 <= _T_881 @[el2_ifu_compress.scala 20:13]
-    _T_884.rs2 <= _T_882 @[el2_ifu_compress.scala 21:13]
-    _T_884.rs3 <= _T_883 @[el2_ifu_compress.scala 22:13]
-    node _T_885 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36]
-    node _T_886 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57]
-    node _T_887 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79]
-    node _T_888 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_889 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_889.bits <= io.in @[el2_ifu_compress.scala 18:14]
-    _T_889.rd <= _T_885 @[el2_ifu_compress.scala 19:12]
-    _T_889.rs1 <= _T_886 @[el2_ifu_compress.scala 20:13]
-    _T_889.rs2 <= _T_887 @[el2_ifu_compress.scala 21:13]
-    _T_889.rs3 <= _T_888 @[el2_ifu_compress.scala 22:13]
-    node _T_890 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36]
-    node _T_891 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57]
-    node _T_892 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79]
-    node _T_893 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101]
-    wire _T_894 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19]
-    _T_894.bits <= io.in @[el2_ifu_compress.scala 18:14]
-    _T_894.rd <= _T_890 @[el2_ifu_compress.scala 19:12]
-    _T_894.rs1 <= _T_891 @[el2_ifu_compress.scala 20:13]
-    _T_894.rs2 <= _T_892 @[el2_ifu_compress.scala 21:13]
-    _T_894.rs3 <= _T_893 @[el2_ifu_compress.scala 22:13]
-    wire _T_895 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>}[32] @[el2_ifu_compress.scala 146:20]
-    _T_895[0].rs3 <= _T_24.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[0].rs2 <= _T_24.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[0].rs1 <= _T_24.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[0].rd <= _T_24.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[0].bits <= _T_24.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[1].rs3 <= _T_44.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[1].rs2 <= _T_44.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[1].rs1 <= _T_44.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[1].rd <= _T_44.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[1].bits <= _T_44.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[2].rs3 <= _T_66.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[2].rs2 <= _T_66.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[2].rs1 <= _T_66.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[2].rd <= _T_66.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[2].bits <= _T_66.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[3].rs3 <= _T_88.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[3].rs2 <= _T_88.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[3].rs1 <= _T_88.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[3].rd <= _T_88.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[3].bits <= _T_88.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[4].rs3 <= _T_119.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[4].rs2 <= _T_119.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[4].rs1 <= _T_119.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[4].rd <= _T_119.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[4].bits <= _T_119.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[5].rs3 <= _T_146.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[5].rs2 <= _T_146.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[5].rs1 <= _T_146.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[5].rd <= _T_146.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[5].bits <= _T_146.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[6].rs3 <= _T_177.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[6].rs2 <= _T_177.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[6].rs1 <= _T_177.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[6].rd <= _T_177.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[6].bits <= _T_177.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[7].rs3 <= _T_208.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[7].rs2 <= _T_208.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[7].rs1 <= _T_208.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[7].rd <= _T_208.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[7].bits <= _T_208.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[8].rs3 <= _T_225.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[8].rs2 <= _T_225.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[8].rs1 <= _T_225.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[8].rd <= _T_225.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[8].bits <= _T_225.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[9].rs3 <= _T_311.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[9].rs2 <= _T_311.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[9].rs1 <= _T_311.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[9].rd <= _T_311.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[9].bits <= _T_311.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[10].rs3 <= _T_326.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[10].rs2 <= _T_326.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[10].rs1 <= _T_326.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[10].rd <= _T_326.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[10].bits <= _T_326.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[11].rs3 <= _T_386.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[11].rs2 <= _T_386.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[11].rs1 <= _T_386.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[11].rd <= _T_386.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[11].bits <= _T_386.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[12].rs3 <= _T_452.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[12].rs2 <= _T_452.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[12].rs1 <= _T_452.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[12].rd <= _T_452.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[12].bits <= _T_452.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[13].rs3 <= _T_539.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[13].rs2 <= _T_539.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[13].rs1 <= _T_539.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[13].rd <= _T_539.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[13].bits <= _T_539.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[14].rs3 <= _T_606.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[14].rs2 <= _T_606.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[14].rs1 <= _T_606.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[14].rd <= _T_606.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[14].bits <= _T_606.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[15].rs3 <= _T_671.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[15].rs2 <= _T_671.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[15].rs1 <= _T_671.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[15].rd <= _T_671.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[15].bits <= _T_671.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[16].rs3 <= _T_688.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[16].rs2 <= _T_688.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[16].rs1 <= _T_688.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[16].rd <= _T_688.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[16].bits <= _T_688.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[17].rs3 <= _T_703.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[17].rs2 <= _T_703.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[17].rs1 <= _T_703.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[17].rd <= _T_703.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[17].bits <= _T_703.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[18].rs3 <= _T_718.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[18].rs2 <= _T_718.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[18].rs1 <= _T_718.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[18].rd <= _T_718.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[18].bits <= _T_718.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[19].rs3 <= _T_733.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[19].rs2 <= _T_733.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[19].rs1 <= _T_733.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[19].rd <= _T_733.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[19].bits <= _T_733.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[20].rs3 <= _T_794.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[20].rs2 <= _T_794.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[20].rs1 <= _T_794.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[20].rd <= _T_794.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[20].bits <= _T_794.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[21].rs3 <= _T_814.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[21].rs2 <= _T_814.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[21].rs1 <= _T_814.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[21].rd <= _T_814.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[21].bits <= _T_814.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[22].rs3 <= _T_834.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[22].rs2 <= _T_834.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[22].rs1 <= _T_834.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[22].rd <= _T_834.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[22].bits <= _T_834.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[23].rs3 <= _T_854.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[23].rs2 <= _T_854.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[23].rs1 <= _T_854.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[23].rd <= _T_854.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[23].bits <= _T_854.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[24].rs3 <= _T_859.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[24].rs2 <= _T_859.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[24].rs1 <= _T_859.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[24].rd <= _T_859.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[24].bits <= _T_859.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[25].rs3 <= _T_864.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[25].rs2 <= _T_864.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[25].rs1 <= _T_864.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[25].rd <= _T_864.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[25].bits <= _T_864.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[26].rs3 <= _T_869.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[26].rs2 <= _T_869.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[26].rs1 <= _T_869.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[26].rd <= _T_869.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[26].bits <= _T_869.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[27].rs3 <= _T_874.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[27].rs2 <= _T_874.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[27].rs1 <= _T_874.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[27].rd <= _T_874.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[27].bits <= _T_874.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[28].rs3 <= _T_879.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[28].rs2 <= _T_879.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[28].rs1 <= _T_879.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[28].rd <= _T_879.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[28].bits <= _T_879.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[29].rs3 <= _T_884.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[29].rs2 <= _T_884.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[29].rs1 <= _T_884.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[29].rd <= _T_884.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[29].bits <= _T_884.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[30].rs3 <= _T_889.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[30].rs2 <= _T_889.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[30].rs1 <= _T_889.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[30].rd <= _T_889.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[30].bits <= _T_889.bits @[el2_ifu_compress.scala 146:20]
-    _T_895[31].rs3 <= _T_894.rs3 @[el2_ifu_compress.scala 146:20]
-    _T_895[31].rs2 <= _T_894.rs2 @[el2_ifu_compress.scala 146:20]
-    _T_895[31].rs1 <= _T_894.rs1 @[el2_ifu_compress.scala 146:20]
-    _T_895[31].rd <= _T_894.rd @[el2_ifu_compress.scala 146:20]
-    _T_895[31].bits <= _T_894.bits @[el2_ifu_compress.scala 146:20]
-    node _T_896 = bits(io.in, 1, 0) @[el2_ifu_compress.scala 147:12]
-    node _T_897 = bits(io.in, 15, 13) @[el2_ifu_compress.scala 147:20]
-    node _T_898 = cat(_T_896, _T_897) @[Cat.scala 29:58]
-    io.out.rs3 <= _T_895[_T_898].rs3 @[el2_ifu_compress.scala 195:12]
-    io.out.rs2 <= _T_895[_T_898].rs2 @[el2_ifu_compress.scala 195:12]
-    io.out.rs1 <= _T_895[_T_898].rs1 @[el2_ifu_compress.scala 195:12]
-    io.out.rd <= _T_895[_T_898].rd @[el2_ifu_compress.scala 195:12]
-    io.out.bits <= _T_895[_T_898].bits @[el2_ifu_compress.scala 195:12]
-    
   module el2_ifu_aln_ctl : 
     input clock : Clock
     input reset : UInt<1>
-    output io : {flip scan_mode : UInt<1>, flip ifu_async_error_start : UInt<1>, flip iccm_rd_ecc_double_err : UInt<1>, flip ic_access_fault_f : UInt<1>, flip ic_access_fault_type_f : UInt<2>, flip ifu_bp_fghr_f : UInt<8>, flip ifu_bp_btb_target_f : UInt<32>, flip ifu_bp_poffset_f : UInt<12>, flip ifu_bp_hist0_f : UInt<2>, flip ifu_bp_hist1_f : UInt<2>, flip ifu_bp_pc4_f : UInt<2>, flip ifu_bp_way_f : UInt<2>, flip ifu_bp_valid_f : UInt<2>, flip ifu_bp_ret_f : UInt<2>, flip exu_flush_final : UInt<1>, flip dec_i0_decode_d : UInt<1>, flip ifu_fetch_data_f : UInt<32>, flip ifu_fetch_val : UInt<2>, flip ifu_fetch_pc : UInt<32>, ifu_i0_valid : UInt<1>, ifu_i0_icaf : UInt<1>, ifu_i0_icaf_type : UInt<2>, ifu_i0_icaf_f1 : UInt<1>, ifu_i0_dbecc : UInt<1>, ifu_i0_instr : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>}, ifu_i0_pc : UInt<32>, ifu_i0_pc4 : UInt<1>, ifu_fb_consume1 : UInt<1>, ifu_fb_consume2 : UInt<1>, ifu_i0_bp_index : UInt<7>, ifu_i0_bp_fghr : UInt<8>, ifu_i0_bp_btag : UInt<5>, ifu_pmu_instr_aligned : UInt<1>, ifu_i0_cinst : UInt<16>, i0_brp : {valid : UInt<1>, toffset : UInt<12>, hist : UInt<2>, br_error : UInt<1>, br_start_error : UInt<1>, bank : UInt<1>, prett : UInt<32>, way : UInt<1>, ret : UInt<1>}, test_out : UInt, flip test_in : UInt<32>}
+    output io : {flip scan_mode : UInt<1>, flip ifu_async_error_start : UInt<1>, flip iccm_rd_ecc_double_err : UInt<1>, flip ic_access_fault_f : UInt<1>, flip ic_access_fault_type_f : UInt<2>, flip ifu_bp_fghr_f : UInt<8>, flip ifu_bp_btb_target_f : UInt<32>, flip ifu_bp_poffset_f : UInt<12>, flip ifu_bp_hist0_f : UInt<2>, flip ifu_bp_hist1_f : UInt<2>, flip ifu_bp_pc4_f : UInt<2>, flip ifu_bp_way_f : UInt<2>, flip ifu_bp_valid_f : UInt<2>, flip ifu_bp_ret_f : UInt<2>, flip exu_flush_final : UInt<1>, flip dec_i0_decode_d : UInt<1>, flip ifu_fetch_data_f : UInt<32>, flip ifu_fetch_val : UInt<2>, flip ifu_fetch_pc : UInt<32>, ifu_i0_valid : UInt<1>, ifu_i0_icaf : UInt<1>, ifu_i0_icaf_type : UInt<2>, ifu_i0_icaf_f1 : UInt<1>, ifu_i0_dbecc : UInt<1>, ifu_i0_instr : UInt<32>, ifu_i0_pc : UInt<32>, ifu_i0_pc4 : UInt<1>, ifu_fb_consume1 : UInt<1>, ifu_fb_consume2 : UInt<1>, ifu_i0_bp_index : UInt<7>, ifu_i0_bp_fghr : UInt<8>, ifu_i0_bp_btag : UInt<5>, ifu_pmu_instr_aligned : UInt<1>, ifu_i0_cinst : UInt<16>, i0_brp : {valid : UInt<1>, toffset : UInt<12>, hist : UInt<2>, br_error : UInt<1>, br_start_error : UInt<1>, bank : UInt<1>, prett : UInt<32>, way : UInt<1>, ret : UInt<1>}}
     
     wire error_stall_in : UInt<1>
     error_stall_in <= UInt<1>("h00")
@@ -1326,42 +63,36 @@ circuit el2_ifu_aln_ctl :
     brdata0 <= UInt<1>("h00")
     wire brdata2 : UInt<12>
     brdata2 <= UInt<1>("h00")
-    reg error_stall : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_aln_ctl.scala 90:28]
-    error_stall <= error_stall_in @[el2_ifu_aln_ctl.scala 90:28]
-    reg f0val : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_aln_ctl.scala 91:22]
-    f0val <= f0val_in @[el2_ifu_aln_ctl.scala 91:22]
-    node _T = or(error_stall, io.ifu_async_error_start) @[el2_ifu_aln_ctl.scala 92:34]
-    node _T_1 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 92:64]
-    node _T_2 = and(_T, _T_1) @[el2_ifu_aln_ctl.scala 92:62]
-    error_stall_in <= _T_2 @[el2_ifu_aln_ctl.scala 92:18]
-    node _T_3 = not(error_stall) @[el2_ifu_aln_ctl.scala 94:39]
-    node i0_shift = and(io.dec_i0_decode_d, _T_3) @[el2_ifu_aln_ctl.scala 94:37]
-    io.ifu_pmu_instr_aligned <= i0_shift @[el2_ifu_aln_ctl.scala 96:28]
-    node _T_4 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 98:34]
-    node _T_5 = bits(_T_4, 0, 0) @[el2_ifu_aln_ctl.scala 98:38]
-    node _T_6 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 98:64]
-    node _T_7 = not(_T_6) @[el2_ifu_aln_ctl.scala 98:58]
-    node _T_8 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 98:75]
-    node _T_9 = and(_T_7, _T_8) @[el2_ifu_aln_ctl.scala 98:68]
-    node _T_10 = bits(_T_9, 0, 0) @[el2_ifu_aln_ctl.scala 98:80]
+    reg error_stall : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_aln_ctl.scala 88:28]
+    error_stall <= error_stall_in @[el2_ifu_aln_ctl.scala 88:28]
+    reg f0val : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_aln_ctl.scala 89:22]
+    f0val <= f0val_in @[el2_ifu_aln_ctl.scala 89:22]
+    node _T = or(error_stall, io.ifu_async_error_start) @[el2_ifu_aln_ctl.scala 90:34]
+    node _T_1 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 90:64]
+    node _T_2 = and(_T, _T_1) @[el2_ifu_aln_ctl.scala 90:62]
+    error_stall_in <= _T_2 @[el2_ifu_aln_ctl.scala 90:18]
+    node _T_3 = not(error_stall) @[el2_ifu_aln_ctl.scala 92:39]
+    node i0_shift = and(io.dec_i0_decode_d, _T_3) @[el2_ifu_aln_ctl.scala 92:37]
+    io.ifu_pmu_instr_aligned <= i0_shift @[el2_ifu_aln_ctl.scala 94:28]
+    node _T_4 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 96:34]
+    node _T_5 = bits(_T_4, 0, 0) @[el2_ifu_aln_ctl.scala 96:38]
+    node _T_6 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 96:64]
+    node _T_7 = not(_T_6) @[el2_ifu_aln_ctl.scala 96:58]
+    node _T_8 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 96:75]
+    node _T_9 = and(_T_7, _T_8) @[el2_ifu_aln_ctl.scala 96:68]
+    node _T_10 = bits(_T_9, 0, 0) @[el2_ifu_aln_ctl.scala 96:80]
     node _T_11 = cat(q1final, q0final) @[Cat.scala 29:58]
     node _T_12 = mux(_T_5, q0final, UInt<1>("h00")) @[Mux.scala 27:72]
     node _T_13 = mux(_T_10, _T_11, UInt<1>("h00")) @[Mux.scala 27:72]
     node _T_14 = or(_T_12, _T_13) @[Mux.scala 27:72]
     wire aligndata : UInt<32> @[Mux.scala 27:72]
     aligndata <= _T_14 @[Mux.scala 27:72]
-    inst decompressed of el2_ifu_compress @[el2_ifu_aln_ctl.scala 100:28]
-    decompressed.clock <= clock
-    decompressed.reset <= reset
-    decompressed.io.in <= aligndata @[el2_ifu_aln_ctl.scala 102:22]
-    io.ifu_i0_instr.rs3 <= decompressed.io.out.rs3 @[el2_ifu_aln_ctl.scala 104:23]
-    io.ifu_i0_instr.rs2 <= decompressed.io.out.rs2 @[el2_ifu_aln_ctl.scala 104:23]
-    io.ifu_i0_instr.rs1 <= decompressed.io.out.rs1 @[el2_ifu_aln_ctl.scala 104:23]
-    io.ifu_i0_instr.rd <= decompressed.io.out.rd @[el2_ifu_aln_ctl.scala 104:23]
-    io.ifu_i0_instr.bits <= decompressed.io.out.bits @[el2_ifu_aln_ctl.scala 104:23]
-    node _T_15 = bits(aligndata, 15, 0) @[el2_ifu_aln_ctl.scala 108:31]
-    io.ifu_i0_cinst <= _T_15 @[el2_ifu_aln_ctl.scala 108:19]
-    node first2B = not(decompressed.io.rvc) @[el2_ifu_aln_ctl.scala 112:17]
+    io.ifu_i0_instr <= UInt<1>("h00") @[el2_ifu_aln_ctl.scala 104:19]
+    node _T_15 = bits(aligndata, 15, 0) @[el2_ifu_aln_ctl.scala 107:31]
+    io.ifu_i0_cinst <= _T_15 @[el2_ifu_aln_ctl.scala 107:19]
+    wire first4B : UInt<1>
+    first4B <= UInt<1>("h00")
+    node first2B = not(first4B) @[el2_ifu_aln_ctl.scala 112:17]
     node _T_16 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 113:34]
     node _T_17 = bits(_T_16, 0, 0) @[el2_ifu_aln_ctl.scala 113:38]
     node _T_18 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 113:63]
@@ -1375,42 +106,46 @@ circuit el2_ifu_aln_ctl :
     node _T_26 = or(_T_24, _T_25) @[Mux.scala 27:72]
     wire alignicaf : UInt<2> @[Mux.scala 27:72]
     alignicaf <= _T_26 @[Mux.scala 27:72]
-    node _T_27 = orr(alignicaf) @[el2_ifu_aln_ctl.scala 115:52]
-    node _T_28 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 115:77]
-    node _T_29 = mux(decompressed.io.rvc, _T_27, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_30 = mux(first2B, _T_28, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_31 = or(_T_29, _T_30) @[Mux.scala 27:72]
-    wire _T_32 : UInt<1> @[Mux.scala 27:72]
-    _T_32 <= _T_31 @[Mux.scala 27:72]
-    io.ifu_i0_icaf <= _T_32 @[el2_ifu_aln_ctl.scala 115:18]
-    node _T_33 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 116:51]
-    node _T_34 = bits(alignval, 0, 0) @[el2_ifu_aln_ctl.scala 116:75]
-    node _T_35 = mux(decompressed.io.rvc, _T_33, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_36 = mux(first2B, _T_34, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_37 = or(_T_35, _T_36) @[Mux.scala 27:72]
-    wire _T_38 : UInt<1> @[Mux.scala 27:72]
-    _T_38 <= _T_37 @[Mux.scala 27:72]
-    io.ifu_i0_valid <= _T_38 @[el2_ifu_aln_ctl.scala 116:19]
-    io.ifu_i0_pc4 <= decompressed.io.rvc @[el2_ifu_aln_ctl.scala 117:17]
+    node _T_27 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 115:39]
+    node _T_28 = orr(alignicaf) @[el2_ifu_aln_ctl.scala 115:59]
+    node _T_29 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 115:72]
+    node _T_30 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 115:91]
+    node _T_31 = mux(_T_27, _T_28, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_32 = mux(_T_29, _T_30, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_33 = or(_T_31, _T_32) @[Mux.scala 27:72]
+    wire _T_34 : UInt<1> @[Mux.scala 27:72]
+    _T_34 <= _T_33 @[Mux.scala 27:72]
+    io.ifu_i0_icaf <= _T_34 @[el2_ifu_aln_ctl.scala 115:18]
+    node _T_35 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 116:40]
+    node _T_36 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 116:58]
+    node _T_37 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 116:71]
+    node _T_38 = bits(alignval, 0, 0) @[el2_ifu_aln_ctl.scala 116:89]
+    node _T_39 = mux(_T_35, _T_36, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_40 = mux(_T_37, _T_38, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_41 = or(_T_39, _T_40) @[Mux.scala 27:72]
+    wire _T_42 : UInt<1> @[Mux.scala 27:72]
+    _T_42 <= _T_41 @[Mux.scala 27:72]
+    io.ifu_i0_valid <= _T_42 @[el2_ifu_aln_ctl.scala 116:19]
+    io.ifu_i0_pc4 <= first4B @[el2_ifu_aln_ctl.scala 117:17]
     node shift_2B = and(i0_shift, first2B) @[el2_ifu_aln_ctl.scala 119:27]
-    node shift_4B = and(i0_shift, decompressed.io.rvc) @[el2_ifu_aln_ctl.scala 120:27]
-    node _T_39 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 121:40]
-    node _T_40 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 121:55]
-    node _T_41 = bits(shift_4B, 0, 0) @[el2_ifu_aln_ctl.scala 121:69]
-    node _T_42 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 121:86]
-    node _T_43 = not(_T_42) @[el2_ifu_aln_ctl.scala 121:80]
-    node _T_44 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 121:97]
-    node _T_45 = and(_T_43, _T_44) @[el2_ifu_aln_ctl.scala 121:90]
-    node _T_46 = mux(_T_39, _T_40, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_47 = mux(_T_41, _T_45, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_48 = or(_T_46, _T_47) @[Mux.scala 27:72]
+    node shift_4B = and(i0_shift, first4B) @[el2_ifu_aln_ctl.scala 120:27]
+    node _T_43 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 121:40]
+    node _T_44 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 121:55]
+    node _T_45 = bits(shift_4B, 0, 0) @[el2_ifu_aln_ctl.scala 121:69]
+    node _T_46 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 121:86]
+    node _T_47 = not(_T_46) @[el2_ifu_aln_ctl.scala 121:80]
+    node _T_48 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 121:97]
+    node _T_49 = and(_T_47, _T_48) @[el2_ifu_aln_ctl.scala 121:90]
+    node _T_50 = mux(_T_43, _T_44, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_51 = mux(_T_45, _T_49, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_52 = or(_T_50, _T_51) @[Mux.scala 27:72]
     wire f0_shift_2B : UInt<1> @[Mux.scala 27:72]
-    f0_shift_2B <= _T_48 @[Mux.scala 27:72]
-    node _T_49 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 122:27]
-    node _T_50 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 122:39]
-    node _T_51 = not(_T_50) @[el2_ifu_aln_ctl.scala 122:33]
-    node _T_52 = and(_T_49, _T_51) @[el2_ifu_aln_ctl.scala 122:31]
-    node f1_shift_2B = and(_T_52, shift_4B) @[el2_ifu_aln_ctl.scala 122:43]
+    f0_shift_2B <= _T_52 @[Mux.scala 27:72]
+    node _T_53 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 122:27]
+    node _T_54 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 122:39]
+    node _T_55 = not(_T_54) @[el2_ifu_aln_ctl.scala 122:33]
+    node _T_56 = and(_T_53, _T_55) @[el2_ifu_aln_ctl.scala 122:31]
+    node f1_shift_2B = and(_T_56, shift_4B) @[el2_ifu_aln_ctl.scala 122:43]
     reg wrptr : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_aln_ctl.scala 124:22]
     wrptr <= wrptr_in @[el2_ifu_aln_ctl.scala 124:22]
     reg rdptr : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_aln_ctl.scala 125:22]
@@ -1425,311 +160,311 @@ circuit el2_ifu_aln_ctl :
     q1off <= q1off_in @[el2_ifu_aln_ctl.scala 132:22]
     reg q0off : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_aln_ctl.scala 133:22]
     q0off <= q0off_in @[el2_ifu_aln_ctl.scala 133:22]
-    node _T_53 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 135:29]
-    node _T_54 = not(sf1_valid) @[el2_ifu_aln_ctl.scala 135:42]
-    node _T_55 = and(_T_53, _T_54) @[el2_ifu_aln_ctl.scala 135:40]
-    node _T_56 = not(f2_valid) @[el2_ifu_aln_ctl.scala 135:55]
-    node _T_57 = and(_T_55, _T_56) @[el2_ifu_aln_ctl.scala 135:53]
-    node fetch_to_f0 = and(_T_57, ifvalid) @[el2_ifu_aln_ctl.scala 135:65]
-    node _T_58 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 136:29]
-    node _T_59 = not(sf1_valid) @[el2_ifu_aln_ctl.scala 136:42]
-    node _T_60 = and(_T_58, _T_59) @[el2_ifu_aln_ctl.scala 136:40]
-    node _T_61 = and(_T_60, f2_valid) @[el2_ifu_aln_ctl.scala 136:53]
-    node _T_62 = and(_T_61, ifvalid) @[el2_ifu_aln_ctl.scala 136:65]
-    node _T_63 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 137:6]
-    node _T_64 = and(_T_63, sf1_valid) @[el2_ifu_aln_ctl.scala 137:17]
-    node _T_65 = not(f2_valid) @[el2_ifu_aln_ctl.scala 137:32]
-    node _T_66 = and(_T_64, _T_65) @[el2_ifu_aln_ctl.scala 137:30]
-    node _T_67 = and(_T_66, ifvalid) @[el2_ifu_aln_ctl.scala 137:42]
-    node _T_68 = or(_T_62, _T_67) @[el2_ifu_aln_ctl.scala 136:77]
-    node _T_69 = not(sf1_valid) @[el2_ifu_aln_ctl.scala 138:19]
-    node _T_70 = and(sf0_valid, _T_69) @[el2_ifu_aln_ctl.scala 138:17]
-    node _T_71 = not(f2_valid) @[el2_ifu_aln_ctl.scala 138:32]
-    node _T_72 = and(_T_70, _T_71) @[el2_ifu_aln_ctl.scala 138:30]
-    node _T_73 = and(_T_72, ifvalid) @[el2_ifu_aln_ctl.scala 138:42]
-    node fetch_to_f1 = or(_T_68, _T_73) @[el2_ifu_aln_ctl.scala 137:54]
-    node _T_74 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 139:29]
-    node _T_75 = and(_T_74, sf1_valid) @[el2_ifu_aln_ctl.scala 139:40]
-    node _T_76 = and(_T_75, f2_valid) @[el2_ifu_aln_ctl.scala 139:53]
-    node _T_77 = and(_T_76, ifvalid) @[el2_ifu_aln_ctl.scala 139:65]
-    node _T_78 = and(sf0_valid, sf1_valid) @[el2_ifu_aln_ctl.scala 140:17]
-    node _T_79 = not(f2_valid) @[el2_ifu_aln_ctl.scala 140:32]
-    node _T_80 = and(_T_78, _T_79) @[el2_ifu_aln_ctl.scala 140:30]
-    node _T_81 = and(_T_80, ifvalid) @[el2_ifu_aln_ctl.scala 140:42]
-    node f2_wr_en = or(_T_77, _T_81) @[el2_ifu_aln_ctl.scala 139:77]
-    node _T_82 = or(fetch_to_f1, shift_f2_f1) @[el2_ifu_aln_ctl.scala 143:36]
-    node f1_shift_wr_en = or(_T_82, f1_shift_2B) @[el2_ifu_aln_ctl.scala 143:50]
-    node _T_83 = or(fetch_to_f0, shift_f2_f0) @[el2_ifu_aln_ctl.scala 144:36]
-    node _T_84 = or(_T_83, shift_f1_f0) @[el2_ifu_aln_ctl.scala 144:50]
-    node _T_85 = or(_T_84, shift_2B) @[el2_ifu_aln_ctl.scala 144:64]
-    node f0_shift_wr_en = or(_T_85, shift_4B) @[el2_ifu_aln_ctl.scala 144:75]
-    node _T_86 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 146:24]
-    node _T_87 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 146:39]
-    node _T_88 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 146:54]
-    node _T_89 = cat(_T_86, _T_87) @[Cat.scala 29:58]
-    node qren = cat(_T_89, _T_88) @[Cat.scala 29:58]
-    node _T_90 = eq(wrptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 147:24]
-    node _T_91 = and(_T_90, ifvalid) @[el2_ifu_aln_ctl.scala 147:32]
-    node _T_92 = eq(wrptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 147:49]
-    node _T_93 = and(_T_92, ifvalid) @[el2_ifu_aln_ctl.scala 147:57]
-    node _T_94 = eq(wrptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 147:74]
-    node _T_95 = and(_T_94, ifvalid) @[el2_ifu_aln_ctl.scala 147:82]
-    node _T_96 = cat(_T_91, _T_93) @[Cat.scala 29:58]
-    node qwen = cat(_T_96, _T_95) @[Cat.scala 29:58]
-    node _T_97 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 149:30]
-    node _T_98 = and(_T_97, io.ifu_fb_consume1) @[el2_ifu_aln_ctl.scala 149:34]
-    node _T_99 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 149:57]
-    node _T_100 = and(_T_98, _T_99) @[el2_ifu_aln_ctl.scala 149:55]
-    node _T_101 = bits(_T_100, 0, 0) @[el2_ifu_aln_ctl.scala 149:78]
-    node _T_102 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 150:30]
-    node _T_103 = and(_T_102, io.ifu_fb_consume1) @[el2_ifu_aln_ctl.scala 150:34]
-    node _T_104 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 150:57]
-    node _T_105 = and(_T_103, _T_104) @[el2_ifu_aln_ctl.scala 150:55]
-    node _T_106 = bits(_T_105, 0, 0) @[el2_ifu_aln_ctl.scala 150:78]
-    node _T_107 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 151:30]
-    node _T_108 = and(_T_107, io.ifu_fb_consume1) @[el2_ifu_aln_ctl.scala 151:34]
-    node _T_109 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 151:57]
-    node _T_110 = and(_T_108, _T_109) @[el2_ifu_aln_ctl.scala 151:55]
-    node _T_111 = bits(_T_110, 0, 0) @[el2_ifu_aln_ctl.scala 151:78]
-    node _T_112 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 152:30]
-    node _T_113 = and(_T_112, io.ifu_fb_consume2) @[el2_ifu_aln_ctl.scala 152:34]
-    node _T_114 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 152:57]
-    node _T_115 = and(_T_113, _T_114) @[el2_ifu_aln_ctl.scala 152:55]
-    node _T_116 = bits(_T_115, 0, 0) @[el2_ifu_aln_ctl.scala 152:78]
-    node _T_117 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 153:30]
-    node _T_118 = and(_T_117, io.ifu_fb_consume2) @[el2_ifu_aln_ctl.scala 153:34]
-    node _T_119 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 153:57]
-    node _T_120 = and(_T_118, _T_119) @[el2_ifu_aln_ctl.scala 153:55]
-    node _T_121 = bits(_T_120, 0, 0) @[el2_ifu_aln_ctl.scala 153:78]
-    node _T_122 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 154:30]
-    node _T_123 = and(_T_122, io.ifu_fb_consume2) @[el2_ifu_aln_ctl.scala 154:34]
-    node _T_124 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 154:57]
-    node _T_125 = and(_T_123, _T_124) @[el2_ifu_aln_ctl.scala 154:55]
-    node _T_126 = bits(_T_125, 0, 0) @[el2_ifu_aln_ctl.scala 154:78]
-    node _T_127 = not(io.ifu_fb_consume1) @[el2_ifu_aln_ctl.scala 155:12]
-    node _T_128 = not(io.ifu_fb_consume2) @[el2_ifu_aln_ctl.scala 155:34]
-    node _T_129 = and(_T_127, _T_128) @[el2_ifu_aln_ctl.scala 155:32]
-    node _T_130 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 155:56]
-    node _T_131 = and(_T_129, _T_130) @[el2_ifu_aln_ctl.scala 155:54]
-    node _T_132 = bits(_T_131, 0, 0) @[el2_ifu_aln_ctl.scala 155:77]
-    node _T_133 = mux(_T_101, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_134 = mux(_T_106, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_135 = mux(_T_111, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_136 = mux(_T_116, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_137 = mux(_T_121, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_138 = mux(_T_126, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_139 = mux(_T_132, rdptr, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_140 = or(_T_133, _T_134) @[Mux.scala 27:72]
-    node _T_141 = or(_T_140, _T_135) @[Mux.scala 27:72]
-    node _T_142 = or(_T_141, _T_136) @[Mux.scala 27:72]
-    node _T_143 = or(_T_142, _T_137) @[Mux.scala 27:72]
-    node _T_144 = or(_T_143, _T_138) @[Mux.scala 27:72]
+    node _T_57 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 135:29]
+    node _T_58 = not(sf1_valid) @[el2_ifu_aln_ctl.scala 135:42]
+    node _T_59 = and(_T_57, _T_58) @[el2_ifu_aln_ctl.scala 135:40]
+    node _T_60 = not(f2_valid) @[el2_ifu_aln_ctl.scala 135:55]
+    node _T_61 = and(_T_59, _T_60) @[el2_ifu_aln_ctl.scala 135:53]
+    node fetch_to_f0 = and(_T_61, ifvalid) @[el2_ifu_aln_ctl.scala 135:65]
+    node _T_62 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 136:29]
+    node _T_63 = not(sf1_valid) @[el2_ifu_aln_ctl.scala 136:42]
+    node _T_64 = and(_T_62, _T_63) @[el2_ifu_aln_ctl.scala 136:40]
+    node _T_65 = and(_T_64, f2_valid) @[el2_ifu_aln_ctl.scala 136:53]
+    node _T_66 = and(_T_65, ifvalid) @[el2_ifu_aln_ctl.scala 136:65]
+    node _T_67 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 137:6]
+    node _T_68 = and(_T_67, sf1_valid) @[el2_ifu_aln_ctl.scala 137:17]
+    node _T_69 = not(f2_valid) @[el2_ifu_aln_ctl.scala 137:32]
+    node _T_70 = and(_T_68, _T_69) @[el2_ifu_aln_ctl.scala 137:30]
+    node _T_71 = and(_T_70, ifvalid) @[el2_ifu_aln_ctl.scala 137:42]
+    node _T_72 = or(_T_66, _T_71) @[el2_ifu_aln_ctl.scala 136:77]
+    node _T_73 = not(sf1_valid) @[el2_ifu_aln_ctl.scala 138:19]
+    node _T_74 = and(sf0_valid, _T_73) @[el2_ifu_aln_ctl.scala 138:17]
+    node _T_75 = not(f2_valid) @[el2_ifu_aln_ctl.scala 138:32]
+    node _T_76 = and(_T_74, _T_75) @[el2_ifu_aln_ctl.scala 138:30]
+    node _T_77 = and(_T_76, ifvalid) @[el2_ifu_aln_ctl.scala 138:42]
+    node fetch_to_f1 = or(_T_72, _T_77) @[el2_ifu_aln_ctl.scala 137:54]
+    node _T_78 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 139:29]
+    node _T_79 = and(_T_78, sf1_valid) @[el2_ifu_aln_ctl.scala 139:40]
+    node _T_80 = and(_T_79, f2_valid) @[el2_ifu_aln_ctl.scala 139:53]
+    node _T_81 = and(_T_80, ifvalid) @[el2_ifu_aln_ctl.scala 139:65]
+    node _T_82 = and(sf0_valid, sf1_valid) @[el2_ifu_aln_ctl.scala 140:17]
+    node _T_83 = not(f2_valid) @[el2_ifu_aln_ctl.scala 140:32]
+    node _T_84 = and(_T_82, _T_83) @[el2_ifu_aln_ctl.scala 140:30]
+    node _T_85 = and(_T_84, ifvalid) @[el2_ifu_aln_ctl.scala 140:42]
+    node f2_wr_en = or(_T_81, _T_85) @[el2_ifu_aln_ctl.scala 139:77]
+    node _T_86 = or(fetch_to_f1, shift_f2_f1) @[el2_ifu_aln_ctl.scala 143:36]
+    node f1_shift_wr_en = or(_T_86, f1_shift_2B) @[el2_ifu_aln_ctl.scala 143:50]
+    node _T_87 = or(fetch_to_f0, shift_f2_f0) @[el2_ifu_aln_ctl.scala 144:36]
+    node _T_88 = or(_T_87, shift_f1_f0) @[el2_ifu_aln_ctl.scala 144:50]
+    node _T_89 = or(_T_88, shift_2B) @[el2_ifu_aln_ctl.scala 144:64]
+    node f0_shift_wr_en = or(_T_89, shift_4B) @[el2_ifu_aln_ctl.scala 144:75]
+    node _T_90 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 146:24]
+    node _T_91 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 146:39]
+    node _T_92 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 146:54]
+    node _T_93 = cat(_T_90, _T_91) @[Cat.scala 29:58]
+    node qren = cat(_T_93, _T_92) @[Cat.scala 29:58]
+    node _T_94 = eq(wrptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 147:24]
+    node _T_95 = and(_T_94, ifvalid) @[el2_ifu_aln_ctl.scala 147:32]
+    node _T_96 = eq(wrptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 147:49]
+    node _T_97 = and(_T_96, ifvalid) @[el2_ifu_aln_ctl.scala 147:57]
+    node _T_98 = eq(wrptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 147:74]
+    node _T_99 = and(_T_98, ifvalid) @[el2_ifu_aln_ctl.scala 147:82]
+    node _T_100 = cat(_T_95, _T_97) @[Cat.scala 29:58]
+    node qwen = cat(_T_100, _T_99) @[Cat.scala 29:58]
+    node _T_101 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 149:30]
+    node _T_102 = and(_T_101, io.ifu_fb_consume1) @[el2_ifu_aln_ctl.scala 149:34]
+    node _T_103 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 149:57]
+    node _T_104 = and(_T_102, _T_103) @[el2_ifu_aln_ctl.scala 149:55]
+    node _T_105 = bits(_T_104, 0, 0) @[el2_ifu_aln_ctl.scala 149:78]
+    node _T_106 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 150:30]
+    node _T_107 = and(_T_106, io.ifu_fb_consume1) @[el2_ifu_aln_ctl.scala 150:34]
+    node _T_108 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 150:57]
+    node _T_109 = and(_T_107, _T_108) @[el2_ifu_aln_ctl.scala 150:55]
+    node _T_110 = bits(_T_109, 0, 0) @[el2_ifu_aln_ctl.scala 150:78]
+    node _T_111 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 151:30]
+    node _T_112 = and(_T_111, io.ifu_fb_consume1) @[el2_ifu_aln_ctl.scala 151:34]
+    node _T_113 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 151:57]
+    node _T_114 = and(_T_112, _T_113) @[el2_ifu_aln_ctl.scala 151:55]
+    node _T_115 = bits(_T_114, 0, 0) @[el2_ifu_aln_ctl.scala 151:78]
+    node _T_116 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 152:30]
+    node _T_117 = and(_T_116, io.ifu_fb_consume2) @[el2_ifu_aln_ctl.scala 152:34]
+    node _T_118 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 152:57]
+    node _T_119 = and(_T_117, _T_118) @[el2_ifu_aln_ctl.scala 152:55]
+    node _T_120 = bits(_T_119, 0, 0) @[el2_ifu_aln_ctl.scala 152:78]
+    node _T_121 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 153:30]
+    node _T_122 = and(_T_121, io.ifu_fb_consume2) @[el2_ifu_aln_ctl.scala 153:34]
+    node _T_123 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 153:57]
+    node _T_124 = and(_T_122, _T_123) @[el2_ifu_aln_ctl.scala 153:55]
+    node _T_125 = bits(_T_124, 0, 0) @[el2_ifu_aln_ctl.scala 153:78]
+    node _T_126 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 154:30]
+    node _T_127 = and(_T_126, io.ifu_fb_consume2) @[el2_ifu_aln_ctl.scala 154:34]
+    node _T_128 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 154:57]
+    node _T_129 = and(_T_127, _T_128) @[el2_ifu_aln_ctl.scala 154:55]
+    node _T_130 = bits(_T_129, 0, 0) @[el2_ifu_aln_ctl.scala 154:78]
+    node _T_131 = not(io.ifu_fb_consume1) @[el2_ifu_aln_ctl.scala 155:12]
+    node _T_132 = not(io.ifu_fb_consume2) @[el2_ifu_aln_ctl.scala 155:34]
+    node _T_133 = and(_T_131, _T_132) @[el2_ifu_aln_ctl.scala 155:32]
+    node _T_134 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 155:56]
+    node _T_135 = and(_T_133, _T_134) @[el2_ifu_aln_ctl.scala 155:54]
+    node _T_136 = bits(_T_135, 0, 0) @[el2_ifu_aln_ctl.scala 155:77]
+    node _T_137 = mux(_T_105, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_138 = mux(_T_110, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_139 = mux(_T_115, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_140 = mux(_T_120, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_141 = mux(_T_125, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_142 = mux(_T_130, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_143 = mux(_T_136, rdptr, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_144 = or(_T_137, _T_138) @[Mux.scala 27:72]
     node _T_145 = or(_T_144, _T_139) @[Mux.scala 27:72]
-    wire _T_146 : UInt @[Mux.scala 27:72]
-    _T_146 <= _T_145 @[Mux.scala 27:72]
-    rdptr_in <= _T_146 @[el2_ifu_aln_ctl.scala 149:12]
-    node _T_147 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 157:30]
-    node _T_148 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 157:36]
-    node _T_149 = and(_T_147, _T_148) @[el2_ifu_aln_ctl.scala 157:34]
-    node _T_150 = bits(_T_149, 0, 0) @[el2_ifu_aln_ctl.scala 157:57]
-    node _T_151 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 158:30]
-    node _T_152 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 158:36]
-    node _T_153 = and(_T_151, _T_152) @[el2_ifu_aln_ctl.scala 158:34]
-    node _T_154 = bits(_T_153, 0, 0) @[el2_ifu_aln_ctl.scala 158:57]
-    node _T_155 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 159:30]
-    node _T_156 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 159:36]
-    node _T_157 = and(_T_155, _T_156) @[el2_ifu_aln_ctl.scala 159:34]
-    node _T_158 = bits(_T_157, 0, 0) @[el2_ifu_aln_ctl.scala 159:57]
-    node _T_159 = not(ifvalid) @[el2_ifu_aln_ctl.scala 160:26]
-    node _T_160 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 160:37]
-    node _T_161 = and(_T_159, _T_160) @[el2_ifu_aln_ctl.scala 160:35]
-    node _T_162 = bits(_T_161, 0, 0) @[el2_ifu_aln_ctl.scala 160:58]
-    node _T_163 = mux(_T_150, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_164 = mux(_T_154, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_165 = mux(_T_158, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_166 = mux(_T_162, wrptr, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_167 = or(_T_163, _T_164) @[Mux.scala 27:72]
-    node _T_168 = or(_T_167, _T_165) @[Mux.scala 27:72]
-    node _T_169 = or(_T_168, _T_166) @[Mux.scala 27:72]
-    wire _T_170 : UInt @[Mux.scala 27:72]
-    _T_170 <= _T_169 @[Mux.scala 27:72]
-    wrptr_in <= _T_170 @[el2_ifu_aln_ctl.scala 157:12]
-    node _T_171 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 162:31]
-    node _T_172 = not(_T_171) @[el2_ifu_aln_ctl.scala 162:26]
-    node _T_173 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 162:43]
-    node _T_174 = and(_T_172, _T_173) @[el2_ifu_aln_ctl.scala 162:35]
-    node _T_175 = bits(_T_174, 0, 0) @[el2_ifu_aln_ctl.scala 162:52]
-    node _T_176 = or(q2off, f0_shift_2B) @[el2_ifu_aln_ctl.scala 162:74]
-    node _T_177 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 163:31]
-    node _T_178 = not(_T_177) @[el2_ifu_aln_ctl.scala 163:26]
-    node _T_179 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 163:43]
-    node _T_180 = and(_T_178, _T_179) @[el2_ifu_aln_ctl.scala 163:35]
-    node _T_181 = bits(_T_180, 0, 0) @[el2_ifu_aln_ctl.scala 163:52]
-    node _T_182 = or(q2off, f1_shift_2B) @[el2_ifu_aln_ctl.scala 163:74]
-    node _T_183 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 164:31]
-    node _T_184 = not(_T_183) @[el2_ifu_aln_ctl.scala 164:26]
-    node _T_185 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 164:43]
-    node _T_186 = and(_T_184, _T_185) @[el2_ifu_aln_ctl.scala 164:35]
-    node _T_187 = bits(_T_186, 0, 0) @[el2_ifu_aln_ctl.scala 164:52]
-    node _T_188 = mux(_T_175, _T_176, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_189 = mux(_T_181, _T_182, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_190 = mux(_T_187, q2off, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_191 = or(_T_188, _T_189) @[Mux.scala 27:72]
-    node _T_192 = or(_T_191, _T_190) @[Mux.scala 27:72]
-    wire _T_193 : UInt @[Mux.scala 27:72]
-    _T_193 <= _T_192 @[Mux.scala 27:72]
-    q2off_in <= _T_193 @[el2_ifu_aln_ctl.scala 162:12]
-    node _T_194 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 166:31]
-    node _T_195 = not(_T_194) @[el2_ifu_aln_ctl.scala 166:26]
-    node _T_196 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 166:43]
-    node _T_197 = and(_T_195, _T_196) @[el2_ifu_aln_ctl.scala 166:35]
-    node _T_198 = bits(_T_197, 0, 0) @[el2_ifu_aln_ctl.scala 166:52]
-    node _T_199 = or(q1off, f0_shift_2B) @[el2_ifu_aln_ctl.scala 166:74]
-    node _T_200 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 167:31]
-    node _T_201 = not(_T_200) @[el2_ifu_aln_ctl.scala 167:26]
-    node _T_202 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 167:43]
-    node _T_203 = and(_T_201, _T_202) @[el2_ifu_aln_ctl.scala 167:35]
-    node _T_204 = bits(_T_203, 0, 0) @[el2_ifu_aln_ctl.scala 167:52]
-    node _T_205 = or(q1off, f1_shift_2B) @[el2_ifu_aln_ctl.scala 167:74]
-    node _T_206 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 168:31]
-    node _T_207 = not(_T_206) @[el2_ifu_aln_ctl.scala 168:26]
-    node _T_208 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 168:43]
-    node _T_209 = and(_T_207, _T_208) @[el2_ifu_aln_ctl.scala 168:35]
-    node _T_210 = bits(_T_209, 0, 0) @[el2_ifu_aln_ctl.scala 168:52]
-    node _T_211 = mux(_T_198, _T_199, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_212 = mux(_T_204, _T_205, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_213 = mux(_T_210, q1off, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_214 = or(_T_211, _T_212) @[Mux.scala 27:72]
-    node _T_215 = or(_T_214, _T_213) @[Mux.scala 27:72]
-    wire _T_216 : UInt @[Mux.scala 27:72]
-    _T_216 <= _T_215 @[Mux.scala 27:72]
-    q1off_in <= _T_216 @[el2_ifu_aln_ctl.scala 166:12]
-    node _T_217 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 170:31]
-    node _T_218 = not(_T_217) @[el2_ifu_aln_ctl.scala 170:26]
-    node _T_219 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 170:43]
-    node _T_220 = and(_T_218, _T_219) @[el2_ifu_aln_ctl.scala 170:35]
-    node _T_221 = bits(_T_220, 0, 0) @[el2_ifu_aln_ctl.scala 170:52]
-    node _T_222 = or(q0off, f0_shift_2B) @[el2_ifu_aln_ctl.scala 170:76]
-    node _T_223 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 171:31]
-    node _T_224 = not(_T_223) @[el2_ifu_aln_ctl.scala 171:26]
-    node _T_225 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 171:43]
-    node _T_226 = and(_T_224, _T_225) @[el2_ifu_aln_ctl.scala 171:35]
-    node _T_227 = bits(_T_226, 0, 0) @[el2_ifu_aln_ctl.scala 171:52]
-    node _T_228 = or(q0off, f1_shift_2B) @[el2_ifu_aln_ctl.scala 171:76]
-    node _T_229 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 172:31]
-    node _T_230 = not(_T_229) @[el2_ifu_aln_ctl.scala 172:26]
-    node _T_231 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 172:43]
-    node _T_232 = and(_T_230, _T_231) @[el2_ifu_aln_ctl.scala 172:35]
-    node _T_233 = bits(_T_232, 0, 0) @[el2_ifu_aln_ctl.scala 172:52]
-    node _T_234 = mux(_T_221, _T_222, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_235 = mux(_T_227, _T_228, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_236 = mux(_T_233, q0off, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_237 = or(_T_234, _T_235) @[Mux.scala 27:72]
-    node _T_238 = or(_T_237, _T_236) @[Mux.scala 27:72]
-    wire _T_239 : UInt @[Mux.scala 27:72]
-    _T_239 <= _T_238 @[Mux.scala 27:72]
-    q0off_in <= _T_239 @[el2_ifu_aln_ctl.scala 170:12]
-    node _T_240 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 174:31]
-    node _T_241 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 175:31]
-    node _T_242 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 176:31]
-    node _T_243 = mux(_T_240, q0off, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_244 = mux(_T_241, q1off, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_245 = mux(_T_242, q2off, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_246 = or(_T_243, _T_244) @[Mux.scala 27:72]
-    node _T_247 = or(_T_246, _T_245) @[Mux.scala 27:72]
+    node _T_146 = or(_T_145, _T_140) @[Mux.scala 27:72]
+    node _T_147 = or(_T_146, _T_141) @[Mux.scala 27:72]
+    node _T_148 = or(_T_147, _T_142) @[Mux.scala 27:72]
+    node _T_149 = or(_T_148, _T_143) @[Mux.scala 27:72]
+    wire _T_150 : UInt @[Mux.scala 27:72]
+    _T_150 <= _T_149 @[Mux.scala 27:72]
+    rdptr_in <= _T_150 @[el2_ifu_aln_ctl.scala 149:12]
+    node _T_151 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 157:30]
+    node _T_152 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 157:36]
+    node _T_153 = and(_T_151, _T_152) @[el2_ifu_aln_ctl.scala 157:34]
+    node _T_154 = bits(_T_153, 0, 0) @[el2_ifu_aln_ctl.scala 157:57]
+    node _T_155 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 158:30]
+    node _T_156 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 158:36]
+    node _T_157 = and(_T_155, _T_156) @[el2_ifu_aln_ctl.scala 158:34]
+    node _T_158 = bits(_T_157, 0, 0) @[el2_ifu_aln_ctl.scala 158:57]
+    node _T_159 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 159:30]
+    node _T_160 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 159:36]
+    node _T_161 = and(_T_159, _T_160) @[el2_ifu_aln_ctl.scala 159:34]
+    node _T_162 = bits(_T_161, 0, 0) @[el2_ifu_aln_ctl.scala 159:57]
+    node _T_163 = not(ifvalid) @[el2_ifu_aln_ctl.scala 160:26]
+    node _T_164 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 160:37]
+    node _T_165 = and(_T_163, _T_164) @[el2_ifu_aln_ctl.scala 160:35]
+    node _T_166 = bits(_T_165, 0, 0) @[el2_ifu_aln_ctl.scala 160:58]
+    node _T_167 = mux(_T_154, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_168 = mux(_T_158, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_169 = mux(_T_162, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_170 = mux(_T_166, wrptr, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_171 = or(_T_167, _T_168) @[Mux.scala 27:72]
+    node _T_172 = or(_T_171, _T_169) @[Mux.scala 27:72]
+    node _T_173 = or(_T_172, _T_170) @[Mux.scala 27:72]
+    wire _T_174 : UInt @[Mux.scala 27:72]
+    _T_174 <= _T_173 @[Mux.scala 27:72]
+    wrptr_in <= _T_174 @[el2_ifu_aln_ctl.scala 157:12]
+    node _T_175 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 162:31]
+    node _T_176 = not(_T_175) @[el2_ifu_aln_ctl.scala 162:26]
+    node _T_177 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 162:43]
+    node _T_178 = and(_T_176, _T_177) @[el2_ifu_aln_ctl.scala 162:35]
+    node _T_179 = bits(_T_178, 0, 0) @[el2_ifu_aln_ctl.scala 162:52]
+    node _T_180 = or(q2off, f0_shift_2B) @[el2_ifu_aln_ctl.scala 162:74]
+    node _T_181 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 163:31]
+    node _T_182 = not(_T_181) @[el2_ifu_aln_ctl.scala 163:26]
+    node _T_183 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 163:43]
+    node _T_184 = and(_T_182, _T_183) @[el2_ifu_aln_ctl.scala 163:35]
+    node _T_185 = bits(_T_184, 0, 0) @[el2_ifu_aln_ctl.scala 163:52]
+    node _T_186 = or(q2off, f1_shift_2B) @[el2_ifu_aln_ctl.scala 163:74]
+    node _T_187 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 164:31]
+    node _T_188 = not(_T_187) @[el2_ifu_aln_ctl.scala 164:26]
+    node _T_189 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 164:43]
+    node _T_190 = and(_T_188, _T_189) @[el2_ifu_aln_ctl.scala 164:35]
+    node _T_191 = bits(_T_190, 0, 0) @[el2_ifu_aln_ctl.scala 164:52]
+    node _T_192 = mux(_T_179, _T_180, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_193 = mux(_T_185, _T_186, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_194 = mux(_T_191, q2off, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_195 = or(_T_192, _T_193) @[Mux.scala 27:72]
+    node _T_196 = or(_T_195, _T_194) @[Mux.scala 27:72]
+    wire _T_197 : UInt @[Mux.scala 27:72]
+    _T_197 <= _T_196 @[Mux.scala 27:72]
+    q2off_in <= _T_197 @[el2_ifu_aln_ctl.scala 162:12]
+    node _T_198 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 166:31]
+    node _T_199 = not(_T_198) @[el2_ifu_aln_ctl.scala 166:26]
+    node _T_200 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 166:43]
+    node _T_201 = and(_T_199, _T_200) @[el2_ifu_aln_ctl.scala 166:35]
+    node _T_202 = bits(_T_201, 0, 0) @[el2_ifu_aln_ctl.scala 166:52]
+    node _T_203 = or(q1off, f0_shift_2B) @[el2_ifu_aln_ctl.scala 166:74]
+    node _T_204 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 167:31]
+    node _T_205 = not(_T_204) @[el2_ifu_aln_ctl.scala 167:26]
+    node _T_206 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 167:43]
+    node _T_207 = and(_T_205, _T_206) @[el2_ifu_aln_ctl.scala 167:35]
+    node _T_208 = bits(_T_207, 0, 0) @[el2_ifu_aln_ctl.scala 167:52]
+    node _T_209 = or(q1off, f1_shift_2B) @[el2_ifu_aln_ctl.scala 167:74]
+    node _T_210 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 168:31]
+    node _T_211 = not(_T_210) @[el2_ifu_aln_ctl.scala 168:26]
+    node _T_212 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 168:43]
+    node _T_213 = and(_T_211, _T_212) @[el2_ifu_aln_ctl.scala 168:35]
+    node _T_214 = bits(_T_213, 0, 0) @[el2_ifu_aln_ctl.scala 168:52]
+    node _T_215 = mux(_T_202, _T_203, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_216 = mux(_T_208, _T_209, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_217 = mux(_T_214, q1off, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_218 = or(_T_215, _T_216) @[Mux.scala 27:72]
+    node _T_219 = or(_T_218, _T_217) @[Mux.scala 27:72]
+    wire _T_220 : UInt @[Mux.scala 27:72]
+    _T_220 <= _T_219 @[Mux.scala 27:72]
+    q1off_in <= _T_220 @[el2_ifu_aln_ctl.scala 166:12]
+    node _T_221 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 170:31]
+    node _T_222 = not(_T_221) @[el2_ifu_aln_ctl.scala 170:26]
+    node _T_223 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 170:43]
+    node _T_224 = and(_T_222, _T_223) @[el2_ifu_aln_ctl.scala 170:35]
+    node _T_225 = bits(_T_224, 0, 0) @[el2_ifu_aln_ctl.scala 170:52]
+    node _T_226 = or(q0off, f0_shift_2B) @[el2_ifu_aln_ctl.scala 170:76]
+    node _T_227 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 171:31]
+    node _T_228 = not(_T_227) @[el2_ifu_aln_ctl.scala 171:26]
+    node _T_229 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 171:43]
+    node _T_230 = and(_T_228, _T_229) @[el2_ifu_aln_ctl.scala 171:35]
+    node _T_231 = bits(_T_230, 0, 0) @[el2_ifu_aln_ctl.scala 171:52]
+    node _T_232 = or(q0off, f1_shift_2B) @[el2_ifu_aln_ctl.scala 171:76]
+    node _T_233 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 172:31]
+    node _T_234 = not(_T_233) @[el2_ifu_aln_ctl.scala 172:26]
+    node _T_235 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 172:43]
+    node _T_236 = and(_T_234, _T_235) @[el2_ifu_aln_ctl.scala 172:35]
+    node _T_237 = bits(_T_236, 0, 0) @[el2_ifu_aln_ctl.scala 172:52]
+    node _T_238 = mux(_T_225, _T_226, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_239 = mux(_T_231, _T_232, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_240 = mux(_T_237, q0off, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_241 = or(_T_238, _T_239) @[Mux.scala 27:72]
+    node _T_242 = or(_T_241, _T_240) @[Mux.scala 27:72]
+    wire _T_243 : UInt @[Mux.scala 27:72]
+    _T_243 <= _T_242 @[Mux.scala 27:72]
+    q0off_in <= _T_243 @[el2_ifu_aln_ctl.scala 170:12]
+    node _T_244 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 174:31]
+    node _T_245 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 175:31]
+    node _T_246 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 176:31]
+    node _T_247 = mux(_T_244, q0off, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_248 = mux(_T_245, q1off, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_249 = mux(_T_246, q2off, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_250 = or(_T_247, _T_248) @[Mux.scala 27:72]
+    node _T_251 = or(_T_250, _T_249) @[Mux.scala 27:72]
     wire q0ptr : UInt @[Mux.scala 27:72]
-    q0ptr <= _T_247 @[Mux.scala 27:72]
-    node _T_248 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 178:32]
-    node _T_249 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 178:57]
-    node _T_250 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 178:83]
-    node _T_251 = mux(_T_248, q1off, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_252 = mux(_T_249, q2off, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_253 = mux(_T_250, q0off, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_254 = or(_T_251, _T_252) @[Mux.scala 27:72]
-    node _T_255 = or(_T_254, _T_253) @[Mux.scala 27:72]
+    q0ptr <= _T_251 @[Mux.scala 27:72]
+    node _T_252 = eq(rdptr, UInt<1>("h00")) @[el2_ifu_aln_ctl.scala 178:32]
+    node _T_253 = eq(rdptr, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 178:57]
+    node _T_254 = eq(rdptr, UInt<2>("h02")) @[el2_ifu_aln_ctl.scala 178:83]
+    node _T_255 = mux(_T_252, q1off, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_256 = mux(_T_253, q2off, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_257 = mux(_T_254, q0off, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_258 = or(_T_255, _T_256) @[Mux.scala 27:72]
+    node _T_259 = or(_T_258, _T_257) @[Mux.scala 27:72]
     wire q1ptr : UInt @[Mux.scala 27:72]
-    q1ptr <= _T_255 @[Mux.scala 27:72]
-    node _T_256 = not(q0ptr) @[el2_ifu_aln_ctl.scala 180:26]
-    node q0sel = cat(q0ptr, _T_256) @[Cat.scala 29:58]
-    node _T_257 = not(q1ptr) @[el2_ifu_aln_ctl.scala 182:26]
-    node q1sel = cat(q1ptr, _T_257) @[Cat.scala 29:58]
-    node _T_258 = bits(io.ifu_bp_btb_target_f, 31, 1) @[el2_ifu_aln_ctl.scala 185:25]
-    node _T_259 = cat(_T_258, io.ifu_bp_poffset_f) @[Cat.scala 29:58]
-    node _T_260 = cat(_T_259, io.ifu_bp_fghr_f) @[Cat.scala 29:58]
-    node _T_261 = cat(io.iccm_rd_ecc_double_err, io.ic_access_fault_f) @[Cat.scala 29:58]
-    node _T_262 = cat(_T_261, io.ic_access_fault_type_f) @[Cat.scala 29:58]
-    node misc_data_in = cat(_T_262, _T_260) @[Cat.scala 29:58]
-    node _T_263 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 187:31]
-    node _T_264 = bits(_T_263, 0, 0) @[el2_ifu_aln_ctl.scala 187:41]
-    node _T_265 = cat(misc1, misc0) @[Cat.scala 29:58]
-    node _T_266 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 188:27]
-    node _T_267 = bits(_T_266, 0, 0) @[el2_ifu_aln_ctl.scala 188:37]
-    node _T_268 = cat(misc2, misc1) @[Cat.scala 29:58]
-    node _T_269 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 189:27]
-    node _T_270 = bits(_T_269, 0, 0) @[el2_ifu_aln_ctl.scala 189:37]
-    node _T_271 = cat(misc0, misc2) @[Cat.scala 29:58]
-    node _T_272 = mux(_T_264, _T_265, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_273 = mux(_T_267, _T_268, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_274 = mux(_T_270, _T_271, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_275 = or(_T_272, _T_273) @[Mux.scala 27:72]
-    node _T_276 = or(_T_275, _T_274) @[Mux.scala 27:72]
+    q1ptr <= _T_259 @[Mux.scala 27:72]
+    node _T_260 = not(q0ptr) @[el2_ifu_aln_ctl.scala 180:26]
+    node q0sel = cat(q0ptr, _T_260) @[Cat.scala 29:58]
+    node _T_261 = not(q1ptr) @[el2_ifu_aln_ctl.scala 182:26]
+    node q1sel = cat(q1ptr, _T_261) @[Cat.scala 29:58]
+    node _T_262 = bits(io.ifu_bp_btb_target_f, 31, 1) @[el2_ifu_aln_ctl.scala 185:25]
+    node _T_263 = cat(_T_262, io.ifu_bp_poffset_f) @[Cat.scala 29:58]
+    node _T_264 = cat(_T_263, io.ifu_bp_fghr_f) @[Cat.scala 29:58]
+    node _T_265 = cat(io.iccm_rd_ecc_double_err, io.ic_access_fault_f) @[Cat.scala 29:58]
+    node _T_266 = cat(_T_265, io.ic_access_fault_type_f) @[Cat.scala 29:58]
+    node misc_data_in = cat(_T_266, _T_264) @[Cat.scala 29:58]
+    node _T_267 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 187:31]
+    node _T_268 = bits(_T_267, 0, 0) @[el2_ifu_aln_ctl.scala 187:41]
+    node _T_269 = cat(misc1, misc0) @[Cat.scala 29:58]
+    node _T_270 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 188:27]
+    node _T_271 = bits(_T_270, 0, 0) @[el2_ifu_aln_ctl.scala 188:37]
+    node _T_272 = cat(misc2, misc1) @[Cat.scala 29:58]
+    node _T_273 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 189:27]
+    node _T_274 = bits(_T_273, 0, 0) @[el2_ifu_aln_ctl.scala 189:37]
+    node _T_275 = cat(misc0, misc2) @[Cat.scala 29:58]
+    node _T_276 = mux(_T_268, _T_269, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_277 = mux(_T_271, _T_272, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_278 = mux(_T_274, _T_275, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_279 = or(_T_276, _T_277) @[Mux.scala 27:72]
+    node _T_280 = or(_T_279, _T_278) @[Mux.scala 27:72]
     wire misceff : UInt<108> @[Mux.scala 27:72]
-    misceff <= _T_276 @[Mux.scala 27:72]
+    misceff <= _T_280 @[Mux.scala 27:72]
     node misc1eff = bits(misceff, 107, 55) @[el2_ifu_aln_ctl.scala 191:25]
     node misc0eff = bits(misceff, 54, 0) @[el2_ifu_aln_ctl.scala 192:25]
     node f1dbecc = bits(misc1eff, 52, 52) @[el2_ifu_aln_ctl.scala 194:25]
-    node _T_277 = bits(misc1eff, 51, 51) @[el2_ifu_aln_ctl.scala 195:21]
-    f1icaf <= _T_277 @[el2_ifu_aln_ctl.scala 195:10]
+    node _T_281 = bits(misc1eff, 51, 51) @[el2_ifu_aln_ctl.scala 195:21]
+    f1icaf <= _T_281 @[el2_ifu_aln_ctl.scala 195:10]
     node f1ictype = bits(misc1eff, 50, 49) @[el2_ifu_aln_ctl.scala 196:26]
     node f1prett = bits(misc1eff, 48, 18) @[el2_ifu_aln_ctl.scala 197:25]
     node f1poffset = bits(misc1eff, 19, 8) @[el2_ifu_aln_ctl.scala 198:27]
     node f1fghr = bits(misc1eff, 7, 0) @[el2_ifu_aln_ctl.scala 199:24]
     node f0dbecc = bits(misc0eff, 54, 54) @[el2_ifu_aln_ctl.scala 201:25]
-    node _T_278 = bits(misc0eff, 53, 53) @[el2_ifu_aln_ctl.scala 202:21]
-    f0icaf <= _T_278 @[el2_ifu_aln_ctl.scala 202:10]
+    node _T_282 = bits(misc0eff, 53, 53) @[el2_ifu_aln_ctl.scala 202:21]
+    f0icaf <= _T_282 @[el2_ifu_aln_ctl.scala 202:10]
     node f0ictype = bits(misc0eff, 52, 51) @[el2_ifu_aln_ctl.scala 203:26]
     node f0prett = bits(misc0eff, 50, 20) @[el2_ifu_aln_ctl.scala 204:25]
     node f0poffset = bits(misc0eff, 19, 8) @[el2_ifu_aln_ctl.scala 205:27]
     node f0fghr = bits(misc0eff, 7, 0) @[el2_ifu_aln_ctl.scala 206:24]
-    node _T_279 = bits(io.ifu_bp_hist1_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:40]
-    node _T_280 = bits(io.ifu_bp_hist0_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:61]
-    node _T_281 = bits(io.ifu_bp_pc4_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:80]
-    node _T_282 = bits(io.ifu_bp_way_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:99]
-    node _T_283 = bits(io.ifu_bp_valid_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:120]
-    node _T_284 = bits(io.ifu_bp_ret_f, 1, 1) @[el2_ifu_aln_ctl.scala 209:20]
-    node _T_285 = bits(io.ifu_bp_hist1_f, 0, 0) @[el2_ifu_aln_ctl.scala 209:42]
-    node _T_286 = bits(io.ifu_bp_hist0_f, 0, 0) @[el2_ifu_aln_ctl.scala 209:63]
-    node _T_287 = bits(io.ifu_bp_pc4_f, 0, 0) @[el2_ifu_aln_ctl.scala 209:82]
-    node _T_288 = bits(io.ifu_bp_way_f, 0, 0) @[el2_ifu_aln_ctl.scala 209:101]
-    node _T_289 = bits(io.ifu_bp_valid_f, 0, 0) @[el2_ifu_aln_ctl.scala 210:22]
-    node _T_290 = bits(io.ifu_bp_ret_f, 0, 0) @[el2_ifu_aln_ctl.scala 210:41]
-    node _T_291 = cat(_T_288, _T_289) @[Cat.scala 29:58]
-    node _T_292 = cat(_T_291, _T_290) @[Cat.scala 29:58]
-    node _T_293 = cat(_T_285, _T_286) @[Cat.scala 29:58]
-    node _T_294 = cat(_T_293, _T_287) @[Cat.scala 29:58]
-    node _T_295 = cat(_T_294, _T_292) @[Cat.scala 29:58]
-    node _T_296 = cat(_T_282, _T_283) @[Cat.scala 29:58]
-    node _T_297 = cat(_T_296, _T_284) @[Cat.scala 29:58]
-    node _T_298 = cat(_T_279, _T_280) @[Cat.scala 29:58]
-    node _T_299 = cat(_T_298, _T_281) @[Cat.scala 29:58]
-    node _T_300 = cat(_T_299, _T_297) @[Cat.scala 29:58]
-    node brdata_in = cat(_T_300, _T_295) @[Cat.scala 29:58]
-    node _T_301 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 212:33]
-    node _T_302 = bits(_T_301, 0, 0) @[el2_ifu_aln_ctl.scala 212:37]
-    node _T_303 = cat(brdata1, brdata0) @[Cat.scala 29:58]
-    node _T_304 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 213:33]
-    node _T_305 = bits(_T_304, 0, 0) @[el2_ifu_aln_ctl.scala 213:37]
-    node _T_306 = cat(brdata2, brdata1) @[Cat.scala 29:58]
-    node _T_307 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 214:33]
-    node _T_308 = bits(_T_307, 0, 0) @[el2_ifu_aln_ctl.scala 214:37]
-    node _T_309 = cat(brdata0, brdata2) @[Cat.scala 29:58]
-    node _T_310 = mux(_T_302, _T_303, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_311 = mux(_T_305, _T_306, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_312 = mux(_T_308, _T_309, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_313 = or(_T_310, _T_311) @[Mux.scala 27:72]
-    node _T_314 = or(_T_313, _T_312) @[Mux.scala 27:72]
+    node _T_283 = bits(io.ifu_bp_hist1_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:40]
+    node _T_284 = bits(io.ifu_bp_hist0_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:61]
+    node _T_285 = bits(io.ifu_bp_pc4_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:80]
+    node _T_286 = bits(io.ifu_bp_way_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:99]
+    node _T_287 = bits(io.ifu_bp_valid_f, 1, 1) @[el2_ifu_aln_ctl.scala 208:120]
+    node _T_288 = bits(io.ifu_bp_ret_f, 1, 1) @[el2_ifu_aln_ctl.scala 209:20]
+    node _T_289 = bits(io.ifu_bp_hist1_f, 0, 0) @[el2_ifu_aln_ctl.scala 209:42]
+    node _T_290 = bits(io.ifu_bp_hist0_f, 0, 0) @[el2_ifu_aln_ctl.scala 209:63]
+    node _T_291 = bits(io.ifu_bp_pc4_f, 0, 0) @[el2_ifu_aln_ctl.scala 209:82]
+    node _T_292 = bits(io.ifu_bp_way_f, 0, 0) @[el2_ifu_aln_ctl.scala 209:101]
+    node _T_293 = bits(io.ifu_bp_valid_f, 0, 0) @[el2_ifu_aln_ctl.scala 210:22]
+    node _T_294 = bits(io.ifu_bp_ret_f, 0, 0) @[el2_ifu_aln_ctl.scala 210:41]
+    node _T_295 = cat(_T_292, _T_293) @[Cat.scala 29:58]
+    node _T_296 = cat(_T_295, _T_294) @[Cat.scala 29:58]
+    node _T_297 = cat(_T_289, _T_290) @[Cat.scala 29:58]
+    node _T_298 = cat(_T_297, _T_291) @[Cat.scala 29:58]
+    node _T_299 = cat(_T_298, _T_296) @[Cat.scala 29:58]
+    node _T_300 = cat(_T_286, _T_287) @[Cat.scala 29:58]
+    node _T_301 = cat(_T_300, _T_288) @[Cat.scala 29:58]
+    node _T_302 = cat(_T_283, _T_284) @[Cat.scala 29:58]
+    node _T_303 = cat(_T_302, _T_285) @[Cat.scala 29:58]
+    node _T_304 = cat(_T_303, _T_301) @[Cat.scala 29:58]
+    node brdata_in = cat(_T_304, _T_299) @[Cat.scala 29:58]
+    node _T_305 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 212:33]
+    node _T_306 = bits(_T_305, 0, 0) @[el2_ifu_aln_ctl.scala 212:37]
+    node _T_307 = cat(brdata1, brdata0) @[Cat.scala 29:58]
+    node _T_308 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 213:33]
+    node _T_309 = bits(_T_308, 0, 0) @[el2_ifu_aln_ctl.scala 213:37]
+    node _T_310 = cat(brdata2, brdata1) @[Cat.scala 29:58]
+    node _T_311 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 214:33]
+    node _T_312 = bits(_T_311, 0, 0) @[el2_ifu_aln_ctl.scala 214:37]
+    node _T_313 = cat(brdata0, brdata2) @[Cat.scala 29:58]
+    node _T_314 = mux(_T_306, _T_307, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_315 = mux(_T_309, _T_310, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_316 = mux(_T_312, _T_313, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_317 = or(_T_314, _T_315) @[Mux.scala 27:72]
+    node _T_318 = or(_T_317, _T_316) @[Mux.scala 27:72]
     wire brdataeff : UInt<24> @[Mux.scala 27:72]
-    brdataeff <= _T_314 @[Mux.scala 27:72]
+    brdataeff <= _T_318 @[Mux.scala 27:72]
     node brdata0eff = bits(brdataeff, 11, 0) @[el2_ifu_aln_ctl.scala 216:43]
     node brdata1eff = bits(brdataeff, 23, 12) @[el2_ifu_aln_ctl.scala 216:61]
     wire q0 : UInt<32>
@@ -1738,620 +473,621 @@ circuit el2_ifu_aln_ctl :
     q1 <= UInt<1>("h00")
     wire q2 : UInt<32>
     q2 <= UInt<1>("h00")
-    node _T_315 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 222:28]
-    node _T_316 = bits(_T_315, 0, 0) @[el2_ifu_aln_ctl.scala 222:32]
-    node _T_317 = cat(q1, q0) @[Cat.scala 29:58]
-    node _T_318 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 223:27]
-    node _T_319 = bits(_T_318, 0, 0) @[el2_ifu_aln_ctl.scala 223:31]
-    node _T_320 = cat(q2, q1) @[Cat.scala 29:58]
-    node _T_321 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 224:27]
-    node _T_322 = bits(_T_321, 0, 0) @[el2_ifu_aln_ctl.scala 224:31]
-    node _T_323 = cat(q0, q2) @[Cat.scala 29:58]
-    node _T_324 = mux(_T_316, _T_317, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_325 = mux(_T_319, _T_320, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_326 = mux(_T_322, _T_323, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_327 = or(_T_324, _T_325) @[Mux.scala 27:72]
-    node _T_328 = or(_T_327, _T_326) @[Mux.scala 27:72]
+    node _T_319 = bits(qren, 0, 0) @[el2_ifu_aln_ctl.scala 222:28]
+    node _T_320 = bits(_T_319, 0, 0) @[el2_ifu_aln_ctl.scala 222:32]
+    node _T_321 = cat(q1, q0) @[Cat.scala 29:58]
+    node _T_322 = bits(qren, 1, 1) @[el2_ifu_aln_ctl.scala 223:27]
+    node _T_323 = bits(_T_322, 0, 0) @[el2_ifu_aln_ctl.scala 223:31]
+    node _T_324 = cat(q2, q1) @[Cat.scala 29:58]
+    node _T_325 = bits(qren, 2, 2) @[el2_ifu_aln_ctl.scala 224:27]
+    node _T_326 = bits(_T_325, 0, 0) @[el2_ifu_aln_ctl.scala 224:31]
+    node _T_327 = cat(q0, q2) @[Cat.scala 29:58]
+    node _T_328 = mux(_T_320, _T_321, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_329 = mux(_T_323, _T_324, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_330 = mux(_T_326, _T_327, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_331 = or(_T_328, _T_329) @[Mux.scala 27:72]
+    node _T_332 = or(_T_331, _T_330) @[Mux.scala 27:72]
     wire qeff : UInt<64> @[Mux.scala 27:72]
-    qeff <= _T_328 @[Mux.scala 27:72]
+    qeff <= _T_332 @[Mux.scala 27:72]
     node q1eff = bits(qeff, 63, 32) @[el2_ifu_aln_ctl.scala 225:29]
     node q0eff = bits(qeff, 31, 0) @[el2_ifu_aln_ctl.scala 225:42]
-    node _T_329 = bits(q0sel, 0, 0) @[el2_ifu_aln_ctl.scala 226:37]
-    node _T_330 = bits(_T_329, 0, 0) @[el2_ifu_aln_ctl.scala 226:41]
-    node _T_331 = bits(q0sel, 1, 1) @[el2_ifu_aln_ctl.scala 226:68]
-    node _T_332 = bits(_T_331, 0, 0) @[el2_ifu_aln_ctl.scala 226:72]
-    node _T_333 = bits(brdata0eff, 11, 6) @[el2_ifu_aln_ctl.scala 226:92]
-    node _T_334 = mux(_T_330, brdata0eff, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_335 = mux(_T_332, _T_333, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_336 = or(_T_334, _T_335) @[Mux.scala 27:72]
+    node _T_333 = bits(q0sel, 0, 0) @[el2_ifu_aln_ctl.scala 226:37]
+    node _T_334 = bits(_T_333, 0, 0) @[el2_ifu_aln_ctl.scala 226:41]
+    node _T_335 = bits(q0sel, 1, 1) @[el2_ifu_aln_ctl.scala 226:68]
+    node _T_336 = bits(_T_335, 0, 0) @[el2_ifu_aln_ctl.scala 226:72]
+    node _T_337 = bits(brdata0eff, 11, 6) @[el2_ifu_aln_ctl.scala 226:92]
+    node _T_338 = mux(_T_334, brdata0eff, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_339 = mux(_T_336, _T_337, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_340 = or(_T_338, _T_339) @[Mux.scala 27:72]
     wire brdata0final : UInt<12> @[Mux.scala 27:72]
-    brdata0final <= _T_336 @[Mux.scala 27:72]
-    node _T_337 = bits(q1sel, 0, 0) @[el2_ifu_aln_ctl.scala 228:37]
-    node _T_338 = bits(_T_337, 0, 0) @[el2_ifu_aln_ctl.scala 228:41]
-    node _T_339 = bits(q1sel, 1, 1) @[el2_ifu_aln_ctl.scala 228:68]
-    node _T_340 = bits(_T_339, 0, 0) @[el2_ifu_aln_ctl.scala 228:72]
-    node _T_341 = bits(brdata1eff, 11, 6) @[el2_ifu_aln_ctl.scala 228:92]
-    node _T_342 = mux(_T_338, brdata1eff, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_343 = mux(_T_340, _T_341, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_344 = or(_T_342, _T_343) @[Mux.scala 27:72]
+    brdata0final <= _T_340 @[Mux.scala 27:72]
+    node _T_341 = bits(q1sel, 0, 0) @[el2_ifu_aln_ctl.scala 228:37]
+    node _T_342 = bits(_T_341, 0, 0) @[el2_ifu_aln_ctl.scala 228:41]
+    node _T_343 = bits(q1sel, 1, 1) @[el2_ifu_aln_ctl.scala 228:68]
+    node _T_344 = bits(_T_343, 0, 0) @[el2_ifu_aln_ctl.scala 228:72]
+    node _T_345 = bits(brdata1eff, 11, 6) @[el2_ifu_aln_ctl.scala 228:92]
+    node _T_346 = mux(_T_342, brdata1eff, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_347 = mux(_T_344, _T_345, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_348 = or(_T_346, _T_347) @[Mux.scala 27:72]
     wire brdata1final : UInt<12> @[Mux.scala 27:72]
-    brdata1final <= _T_344 @[Mux.scala 27:72]
-    node _T_345 = bits(brdata0final, 6, 6) @[el2_ifu_aln_ctl.scala 230:31]
-    node _T_346 = bits(brdata0final, 0, 0) @[el2_ifu_aln_ctl.scala 230:47]
-    node f0ret = cat(_T_345, _T_346) @[Cat.scala 29:58]
-    node _T_347 = bits(brdata0final, 7, 7) @[el2_ifu_aln_ctl.scala 231:33]
-    node _T_348 = bits(brdata0final, 1, 1) @[el2_ifu_aln_ctl.scala 231:49]
-    node f0brend = cat(_T_347, _T_348) @[Cat.scala 29:58]
-    node _T_349 = bits(brdata0final, 8, 8) @[el2_ifu_aln_ctl.scala 232:31]
-    node _T_350 = bits(brdata0final, 2, 2) @[el2_ifu_aln_ctl.scala 232:47]
-    node f0way = cat(_T_349, _T_350) @[Cat.scala 29:58]
-    node _T_351 = bits(brdata0final, 9, 9) @[el2_ifu_aln_ctl.scala 233:31]
-    node _T_352 = bits(brdata0final, 3, 3) @[el2_ifu_aln_ctl.scala 233:47]
-    node f0pc4 = cat(_T_351, _T_352) @[Cat.scala 29:58]
-    node _T_353 = bits(brdata0final, 10, 10) @[el2_ifu_aln_ctl.scala 234:33]
-    node _T_354 = bits(brdata0final, 4, 4) @[el2_ifu_aln_ctl.scala 234:50]
-    node f0hist0 = cat(_T_353, _T_354) @[Cat.scala 29:58]
-    node _T_355 = bits(brdata0final, 11, 11) @[el2_ifu_aln_ctl.scala 235:33]
-    node _T_356 = bits(brdata0final, 5, 5) @[el2_ifu_aln_ctl.scala 235:50]
-    node f0hist1 = cat(_T_355, _T_356) @[Cat.scala 29:58]
-    node _T_357 = bits(brdata1final, 6, 6) @[el2_ifu_aln_ctl.scala 237:31]
-    node _T_358 = bits(brdata1final, 0, 0) @[el2_ifu_aln_ctl.scala 237:47]
-    node f1ret = cat(_T_357, _T_358) @[Cat.scala 29:58]
-    node _T_359 = bits(brdata1final, 7, 7) @[el2_ifu_aln_ctl.scala 238:33]
-    node _T_360 = bits(brdata1final, 1, 1) @[el2_ifu_aln_ctl.scala 238:49]
-    node f1brend = cat(_T_359, _T_360) @[Cat.scala 29:58]
-    node _T_361 = bits(brdata1final, 8, 8) @[el2_ifu_aln_ctl.scala 239:31]
-    node _T_362 = bits(brdata1final, 2, 2) @[el2_ifu_aln_ctl.scala 239:47]
-    node f1way = cat(_T_361, _T_362) @[Cat.scala 29:58]
-    node _T_363 = bits(brdata1final, 9, 9) @[el2_ifu_aln_ctl.scala 240:31]
-    node _T_364 = bits(brdata1final, 3, 3) @[el2_ifu_aln_ctl.scala 240:47]
-    node f1pc4 = cat(_T_363, _T_364) @[Cat.scala 29:58]
-    node _T_365 = bits(brdata1final, 10, 10) @[el2_ifu_aln_ctl.scala 241:33]
-    node _T_366 = bits(brdata1final, 4, 4) @[el2_ifu_aln_ctl.scala 241:50]
-    node f1hist0 = cat(_T_365, _T_366) @[Cat.scala 29:58]
-    node _T_367 = bits(brdata1final, 11, 11) @[el2_ifu_aln_ctl.scala 242:33]
-    node _T_368 = bits(brdata1final, 5, 5) @[el2_ifu_aln_ctl.scala 242:50]
-    node f1hist1 = cat(_T_367, _T_368) @[Cat.scala 29:58]
-    node _T_369 = bits(f2val, 0, 0) @[el2_ifu_aln_ctl.scala 246:20]
-    f2_valid <= _T_369 @[el2_ifu_aln_ctl.scala 246:12]
-    node _T_370 = bits(sf1val, 0, 0) @[el2_ifu_aln_ctl.scala 247:22]
-    sf1_valid <= _T_370 @[el2_ifu_aln_ctl.scala 247:13]
-    node _T_371 = bits(sf0val, 0, 0) @[el2_ifu_aln_ctl.scala 248:22]
-    sf0_valid <= _T_371 @[el2_ifu_aln_ctl.scala 248:13]
-    node _T_372 = bits(sf0val, 0, 0) @[el2_ifu_aln_ctl.scala 250:28]
-    node _T_373 = not(_T_372) @[el2_ifu_aln_ctl.scala 250:21]
-    node _T_374 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 250:39]
-    node consume_fb0 = and(_T_373, _T_374) @[el2_ifu_aln_ctl.scala 250:32]
-    node _T_375 = bits(sf1val, 0, 0) @[el2_ifu_aln_ctl.scala 251:28]
-    node _T_376 = not(_T_375) @[el2_ifu_aln_ctl.scala 251:21]
-    node _T_377 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 251:39]
-    node consume_fb1 = and(_T_376, _T_377) @[el2_ifu_aln_ctl.scala 251:32]
-    node _T_378 = not(consume_fb1) @[el2_ifu_aln_ctl.scala 253:39]
-    node _T_379 = and(consume_fb0, _T_378) @[el2_ifu_aln_ctl.scala 253:37]
-    node _T_380 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 253:54]
-    node _T_381 = and(_T_379, _T_380) @[el2_ifu_aln_ctl.scala 253:52]
-    io.ifu_fb_consume1 <= _T_381 @[el2_ifu_aln_ctl.scala 253:22]
-    node _T_382 = and(consume_fb0, consume_fb1) @[el2_ifu_aln_ctl.scala 254:37]
-    node _T_383 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 254:54]
-    node _T_384 = and(_T_382, _T_383) @[el2_ifu_aln_ctl.scala 254:52]
-    io.ifu_fb_consume2 <= _T_384 @[el2_ifu_aln_ctl.scala 254:22]
-    node _T_385 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_aln_ctl.scala 256:30]
-    ifvalid <= _T_385 @[el2_ifu_aln_ctl.scala 256:11]
-    node _T_386 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 258:18]
-    node _T_387 = and(_T_386, sf1_valid) @[el2_ifu_aln_ctl.scala 258:29]
-    shift_f1_f0 <= _T_387 @[el2_ifu_aln_ctl.scala 258:15]
-    node _T_388 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 259:18]
-    node _T_389 = not(sf1_valid) @[el2_ifu_aln_ctl.scala 259:31]
-    node _T_390 = and(_T_388, _T_389) @[el2_ifu_aln_ctl.scala 259:29]
-    node _T_391 = and(_T_390, f2_valid) @[el2_ifu_aln_ctl.scala 259:42]
-    shift_f2_f0 <= _T_391 @[el2_ifu_aln_ctl.scala 259:15]
-    node _T_392 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 260:18]
-    node _T_393 = and(_T_392, sf1_valid) @[el2_ifu_aln_ctl.scala 260:29]
-    node _T_394 = and(_T_393, f2_valid) @[el2_ifu_aln_ctl.scala 260:42]
-    shift_f2_f1 <= _T_394 @[el2_ifu_aln_ctl.scala 260:15]
+    brdata1final <= _T_348 @[Mux.scala 27:72]
+    node _T_349 = bits(brdata0final, 6, 6) @[el2_ifu_aln_ctl.scala 230:31]
+    node _T_350 = bits(brdata0final, 0, 0) @[el2_ifu_aln_ctl.scala 230:47]
+    node f0ret = cat(_T_349, _T_350) @[Cat.scala 29:58]
+    node _T_351 = bits(brdata0final, 7, 7) @[el2_ifu_aln_ctl.scala 231:33]
+    node _T_352 = bits(brdata0final, 1, 1) @[el2_ifu_aln_ctl.scala 231:49]
+    node f0brend = cat(_T_351, _T_352) @[Cat.scala 29:58]
+    node _T_353 = bits(brdata0final, 8, 8) @[el2_ifu_aln_ctl.scala 232:31]
+    node _T_354 = bits(brdata0final, 2, 2) @[el2_ifu_aln_ctl.scala 232:47]
+    node f0way = cat(_T_353, _T_354) @[Cat.scala 29:58]
+    node _T_355 = bits(brdata0final, 9, 9) @[el2_ifu_aln_ctl.scala 233:31]
+    node _T_356 = bits(brdata0final, 3, 3) @[el2_ifu_aln_ctl.scala 233:47]
+    node f0pc4 = cat(_T_355, _T_356) @[Cat.scala 29:58]
+    node _T_357 = bits(brdata0final, 10, 10) @[el2_ifu_aln_ctl.scala 234:33]
+    node _T_358 = bits(brdata0final, 4, 4) @[el2_ifu_aln_ctl.scala 234:50]
+    node f0hist0 = cat(_T_357, _T_358) @[Cat.scala 29:58]
+    node _T_359 = bits(brdata0final, 11, 11) @[el2_ifu_aln_ctl.scala 235:33]
+    node _T_360 = bits(brdata0final, 5, 5) @[el2_ifu_aln_ctl.scala 235:50]
+    node f0hist1 = cat(_T_359, _T_360) @[Cat.scala 29:58]
+    node _T_361 = bits(brdata1final, 6, 6) @[el2_ifu_aln_ctl.scala 237:31]
+    node _T_362 = bits(brdata1final, 0, 0) @[el2_ifu_aln_ctl.scala 237:47]
+    node f1ret = cat(_T_361, _T_362) @[Cat.scala 29:58]
+    node _T_363 = bits(brdata1final, 7, 7) @[el2_ifu_aln_ctl.scala 238:33]
+    node _T_364 = bits(brdata1final, 1, 1) @[el2_ifu_aln_ctl.scala 238:49]
+    node f1brend = cat(_T_363, _T_364) @[Cat.scala 29:58]
+    node _T_365 = bits(brdata1final, 8, 8) @[el2_ifu_aln_ctl.scala 239:31]
+    node _T_366 = bits(brdata1final, 2, 2) @[el2_ifu_aln_ctl.scala 239:47]
+    node f1way = cat(_T_365, _T_366) @[Cat.scala 29:58]
+    node _T_367 = bits(brdata1final, 9, 9) @[el2_ifu_aln_ctl.scala 240:31]
+    node _T_368 = bits(brdata1final, 3, 3) @[el2_ifu_aln_ctl.scala 240:47]
+    node f1pc4 = cat(_T_367, _T_368) @[Cat.scala 29:58]
+    node _T_369 = bits(brdata1final, 10, 10) @[el2_ifu_aln_ctl.scala 241:33]
+    node _T_370 = bits(brdata1final, 4, 4) @[el2_ifu_aln_ctl.scala 241:50]
+    node f1hist0 = cat(_T_369, _T_370) @[Cat.scala 29:58]
+    node _T_371 = bits(brdata1final, 11, 11) @[el2_ifu_aln_ctl.scala 242:33]
+    node _T_372 = bits(brdata1final, 5, 5) @[el2_ifu_aln_ctl.scala 242:50]
+    node f1hist1 = cat(_T_371, _T_372) @[Cat.scala 29:58]
+    node _T_373 = bits(f2val, 0, 0) @[el2_ifu_aln_ctl.scala 246:20]
+    f2_valid <= _T_373 @[el2_ifu_aln_ctl.scala 246:12]
+    node _T_374 = bits(sf1val, 0, 0) @[el2_ifu_aln_ctl.scala 247:22]
+    sf1_valid <= _T_374 @[el2_ifu_aln_ctl.scala 247:13]
+    node _T_375 = bits(sf0val, 0, 0) @[el2_ifu_aln_ctl.scala 248:22]
+    sf0_valid <= _T_375 @[el2_ifu_aln_ctl.scala 248:13]
+    node _T_376 = bits(sf0val, 0, 0) @[el2_ifu_aln_ctl.scala 250:28]
+    node _T_377 = not(_T_376) @[el2_ifu_aln_ctl.scala 250:21]
+    node _T_378 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 250:39]
+    node consume_fb0 = and(_T_377, _T_378) @[el2_ifu_aln_ctl.scala 250:32]
+    node _T_379 = bits(sf1val, 0, 0) @[el2_ifu_aln_ctl.scala 251:28]
+    node _T_380 = not(_T_379) @[el2_ifu_aln_ctl.scala 251:21]
+    node _T_381 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 251:39]
+    node consume_fb1 = and(_T_380, _T_381) @[el2_ifu_aln_ctl.scala 251:32]
+    node _T_382 = not(consume_fb1) @[el2_ifu_aln_ctl.scala 253:39]
+    node _T_383 = and(consume_fb0, _T_382) @[el2_ifu_aln_ctl.scala 253:37]
+    node _T_384 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 253:54]
+    node _T_385 = and(_T_383, _T_384) @[el2_ifu_aln_ctl.scala 253:52]
+    io.ifu_fb_consume1 <= _T_385 @[el2_ifu_aln_ctl.scala 253:22]
+    node _T_386 = and(consume_fb0, consume_fb1) @[el2_ifu_aln_ctl.scala 254:37]
+    node _T_387 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 254:54]
+    node _T_388 = and(_T_386, _T_387) @[el2_ifu_aln_ctl.scala 254:52]
+    io.ifu_fb_consume2 <= _T_388 @[el2_ifu_aln_ctl.scala 254:22]
+    node _T_389 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_aln_ctl.scala 256:30]
+    ifvalid <= _T_389 @[el2_ifu_aln_ctl.scala 256:11]
+    node _T_390 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 258:18]
+    node _T_391 = and(_T_390, sf1_valid) @[el2_ifu_aln_ctl.scala 258:29]
+    shift_f1_f0 <= _T_391 @[el2_ifu_aln_ctl.scala 258:15]
+    node _T_392 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 259:18]
+    node _T_393 = not(sf1_valid) @[el2_ifu_aln_ctl.scala 259:31]
+    node _T_394 = and(_T_392, _T_393) @[el2_ifu_aln_ctl.scala 259:29]
+    node _T_395 = and(_T_394, f2_valid) @[el2_ifu_aln_ctl.scala 259:42]
+    shift_f2_f0 <= _T_395 @[el2_ifu_aln_ctl.scala 259:15]
+    node _T_396 = not(sf0_valid) @[el2_ifu_aln_ctl.scala 260:18]
+    node _T_397 = and(_T_396, sf1_valid) @[el2_ifu_aln_ctl.scala 260:29]
+    node _T_398 = and(_T_397, f2_valid) @[el2_ifu_aln_ctl.scala 260:42]
+    shift_f2_f1 <= _T_398 @[el2_ifu_aln_ctl.scala 260:15]
     wire f0pc : UInt<31>
     f0pc <= UInt<1>("h00")
     wire f2pc : UInt<31>
     f2pc <= UInt<1>("h00")
-    node _T_395 = add(f0pc, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 265:25]
-    node f0pc_plus1 = tail(_T_395, 1) @[el2_ifu_aln_ctl.scala 265:25]
-    node _T_396 = bits(f1_shift_2B, 0, 0) @[Bitwise.scala 72:15]
-    node _T_397 = mux(_T_396, UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
-    node _T_398 = and(_T_397, f0pc_plus1) @[el2_ifu_aln_ctl.scala 267:38]
-    node _T_399 = not(f1_shift_2B) @[el2_ifu_aln_ctl.scala 267:64]
-    node _T_400 = bits(_T_399, 0, 0) @[Bitwise.scala 72:15]
+    node _T_399 = add(f0pc, UInt<1>("h01")) @[el2_ifu_aln_ctl.scala 265:25]
+    node f0pc_plus1 = tail(_T_399, 1) @[el2_ifu_aln_ctl.scala 265:25]
+    node _T_400 = bits(f1_shift_2B, 0, 0) @[Bitwise.scala 72:15]
     node _T_401 = mux(_T_400, UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
-    node _T_402 = and(_T_401, f0pc) @[el2_ifu_aln_ctl.scala 267:78]
-    node sf1pc = or(_T_398, _T_402) @[el2_ifu_aln_ctl.scala 267:52]
-    node _T_403 = bits(fetch_to_f1, 0, 0) @[el2_ifu_aln_ctl.scala 269:39]
-    node _T_404 = bits(shift_f2_f1, 0, 0) @[el2_ifu_aln_ctl.scala 270:39]
-    node _T_405 = not(fetch_to_f1) @[el2_ifu_aln_ctl.scala 271:28]
-    node _T_406 = not(shift_f2_f1) @[el2_ifu_aln_ctl.scala 271:43]
-    node _T_407 = and(_T_405, _T_406) @[el2_ifu_aln_ctl.scala 271:41]
-    node _T_408 = bits(_T_407, 0, 0) @[el2_ifu_aln_ctl.scala 271:57]
-    node _T_409 = mux(_T_403, io.ifu_fetch_pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_410 = mux(_T_404, f2pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_411 = mux(_T_408, sf1pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_412 = or(_T_409, _T_410) @[Mux.scala 27:72]
-    node _T_413 = or(_T_412, _T_411) @[Mux.scala 27:72]
+    node _T_402 = and(_T_401, f0pc_plus1) @[el2_ifu_aln_ctl.scala 267:38]
+    node _T_403 = not(f1_shift_2B) @[el2_ifu_aln_ctl.scala 267:64]
+    node _T_404 = bits(_T_403, 0, 0) @[Bitwise.scala 72:15]
+    node _T_405 = mux(_T_404, UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
+    node _T_406 = and(_T_405, f0pc) @[el2_ifu_aln_ctl.scala 267:78]
+    node sf1pc = or(_T_402, _T_406) @[el2_ifu_aln_ctl.scala 267:52]
+    node _T_407 = bits(fetch_to_f1, 0, 0) @[el2_ifu_aln_ctl.scala 269:39]
+    node _T_408 = bits(shift_f2_f1, 0, 0) @[el2_ifu_aln_ctl.scala 270:39]
+    node _T_409 = not(fetch_to_f1) @[el2_ifu_aln_ctl.scala 271:28]
+    node _T_410 = not(shift_f2_f1) @[el2_ifu_aln_ctl.scala 271:43]
+    node _T_411 = and(_T_409, _T_410) @[el2_ifu_aln_ctl.scala 271:41]
+    node _T_412 = bits(_T_411, 0, 0) @[el2_ifu_aln_ctl.scala 271:57]
+    node _T_413 = mux(_T_407, io.ifu_fetch_pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_414 = mux(_T_408, f2pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_415 = mux(_T_412, sf1pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_416 = or(_T_413, _T_414) @[Mux.scala 27:72]
+    node _T_417 = or(_T_416, _T_415) @[Mux.scala 27:72]
     wire f1pc_in : UInt<32> @[Mux.scala 27:72]
-    f1pc_in <= _T_413 @[Mux.scala 27:72]
-    node _T_414 = bits(fetch_to_f0, 0, 0) @[el2_ifu_aln_ctl.scala 273:39]
-    node _T_415 = bits(shift_f2_f0, 0, 0) @[el2_ifu_aln_ctl.scala 274:39]
-    node _T_416 = bits(shift_f1_f0, 0, 0) @[el2_ifu_aln_ctl.scala 275:39]
-    node _T_417 = not(fetch_to_f0) @[el2_ifu_aln_ctl.scala 276:28]
-    node _T_418 = not(shift_f2_f0) @[el2_ifu_aln_ctl.scala 276:43]
-    node _T_419 = and(_T_417, _T_418) @[el2_ifu_aln_ctl.scala 276:41]
-    node _T_420 = not(shift_f1_f0) @[el2_ifu_aln_ctl.scala 276:58]
-    node _T_421 = and(_T_419, _T_420) @[el2_ifu_aln_ctl.scala 276:56]
-    node _T_422 = bits(_T_421, 0, 0) @[el2_ifu_aln_ctl.scala 276:72]
-    node _T_423 = mux(_T_414, io.ifu_fetch_pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_424 = mux(_T_415, f2pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_425 = mux(_T_416, sf1pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_426 = mux(_T_422, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_427 = or(_T_423, _T_424) @[Mux.scala 27:72]
-    node _T_428 = or(_T_427, _T_425) @[Mux.scala 27:72]
-    node _T_429 = or(_T_428, _T_426) @[Mux.scala 27:72]
+    f1pc_in <= _T_417 @[Mux.scala 27:72]
+    node _T_418 = bits(fetch_to_f0, 0, 0) @[el2_ifu_aln_ctl.scala 273:39]
+    node _T_419 = bits(shift_f2_f0, 0, 0) @[el2_ifu_aln_ctl.scala 274:39]
+    node _T_420 = bits(shift_f1_f0, 0, 0) @[el2_ifu_aln_ctl.scala 275:39]
+    node _T_421 = not(fetch_to_f0) @[el2_ifu_aln_ctl.scala 276:28]
+    node _T_422 = not(shift_f2_f0) @[el2_ifu_aln_ctl.scala 276:43]
+    node _T_423 = and(_T_421, _T_422) @[el2_ifu_aln_ctl.scala 276:41]
+    node _T_424 = not(shift_f1_f0) @[el2_ifu_aln_ctl.scala 276:58]
+    node _T_425 = and(_T_423, _T_424) @[el2_ifu_aln_ctl.scala 276:56]
+    node _T_426 = bits(_T_425, 0, 0) @[el2_ifu_aln_ctl.scala 276:72]
+    node _T_427 = mux(_T_418, io.ifu_fetch_pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_428 = mux(_T_419, f2pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_429 = mux(_T_420, sf1pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_430 = mux(_T_426, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_431 = or(_T_427, _T_428) @[Mux.scala 27:72]
+    node _T_432 = or(_T_431, _T_429) @[Mux.scala 27:72]
+    node _T_433 = or(_T_432, _T_430) @[Mux.scala 27:72]
     wire f0pc_in : UInt<32> @[Mux.scala 27:72]
-    f0pc_in <= _T_429 @[Mux.scala 27:72]
-    node _T_430 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 278:40]
-    node _T_431 = and(f2_wr_en, _T_430) @[el2_ifu_aln_ctl.scala 278:38]
-    node _T_432 = bits(_T_431, 0, 0) @[el2_ifu_aln_ctl.scala 278:61]
-    node _T_433 = not(f2_wr_en) @[el2_ifu_aln_ctl.scala 279:6]
-    node _T_434 = not(shift_f2_f1) @[el2_ifu_aln_ctl.scala 279:21]
-    node _T_435 = and(_T_433, _T_434) @[el2_ifu_aln_ctl.scala 279:19]
-    node _T_436 = not(shift_f2_f0) @[el2_ifu_aln_ctl.scala 279:36]
-    node _T_437 = and(_T_435, _T_436) @[el2_ifu_aln_ctl.scala 279:34]
-    node _T_438 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 279:51]
-    node _T_439 = and(_T_437, _T_438) @[el2_ifu_aln_ctl.scala 279:49]
-    node _T_440 = bits(_T_439, 0, 0) @[el2_ifu_aln_ctl.scala 279:72]
-    node _T_441 = mux(_T_432, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_442 = mux(_T_440, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_443 = or(_T_441, _T_442) @[Mux.scala 27:72]
-    wire _T_444 : UInt @[Mux.scala 27:72]
-    _T_444 <= _T_443 @[Mux.scala 27:72]
-    f2val_in <= _T_444 @[el2_ifu_aln_ctl.scala 278:12]
-    node _T_445 = bits(f1_shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 281:35]
-    node _T_446 = bits(f1val, 1, 1) @[el2_ifu_aln_ctl.scala 281:48]
-    node _T_447 = bits(f1_shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 281:66]
-    node _T_448 = not(_T_447) @[el2_ifu_aln_ctl.scala 281:53]
-    node _T_449 = mux(_T_445, _T_446, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_450 = mux(_T_448, f1val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_451 = or(_T_449, _T_450) @[Mux.scala 27:72]
-    wire _T_452 : UInt @[Mux.scala 27:72]
-    _T_452 <= _T_451 @[Mux.scala 27:72]
-    sf1val <= _T_452 @[el2_ifu_aln_ctl.scala 281:10]
-    node _T_453 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 283:40]
-    node _T_454 = and(fetch_to_f1, _T_453) @[el2_ifu_aln_ctl.scala 283:38]
-    node _T_455 = bits(_T_454, 0, 0) @[el2_ifu_aln_ctl.scala 283:61]
-    node _T_456 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 284:40]
-    node _T_457 = and(shift_f2_f1, _T_456) @[el2_ifu_aln_ctl.scala 284:38]
-    node _T_458 = bits(_T_457, 0, 0) @[el2_ifu_aln_ctl.scala 284:61]
-    node _T_459 = not(fetch_to_f1) @[el2_ifu_aln_ctl.scala 285:26]
-    node _T_460 = not(shift_f2_f1) @[el2_ifu_aln_ctl.scala 285:41]
-    node _T_461 = and(_T_459, _T_460) @[el2_ifu_aln_ctl.scala 285:39]
-    node _T_462 = not(shift_f1_f0) @[el2_ifu_aln_ctl.scala 285:56]
-    node _T_463 = and(_T_461, _T_462) @[el2_ifu_aln_ctl.scala 285:54]
-    node _T_464 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 285:71]
-    node _T_465 = and(_T_463, _T_464) @[el2_ifu_aln_ctl.scala 285:69]
-    node _T_466 = bits(_T_465, 0, 0) @[el2_ifu_aln_ctl.scala 285:92]
-    node _T_467 = mux(_T_455, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_468 = mux(_T_458, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_469 = mux(_T_466, sf1val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_470 = or(_T_467, _T_468) @[Mux.scala 27:72]
-    node _T_471 = or(_T_470, _T_469) @[Mux.scala 27:72]
-    wire _T_472 : UInt @[Mux.scala 27:72]
-    _T_472 <= _T_471 @[Mux.scala 27:72]
-    f1val_in <= _T_472 @[el2_ifu_aln_ctl.scala 283:12]
-    node _T_473 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 287:31]
-    node _T_474 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 287:46]
-    node _T_475 = not(shift_2B) @[el2_ifu_aln_ctl.scala 287:52]
-    node _T_476 = not(shift_4B) @[el2_ifu_aln_ctl.scala 287:64]
-    node _T_477 = and(_T_475, _T_476) @[el2_ifu_aln_ctl.scala 287:62]
-    node _T_478 = bits(_T_477, 0, 0) @[el2_ifu_aln_ctl.scala 287:75]
-    node _T_479 = mux(_T_473, _T_474, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_480 = mux(_T_478, f0val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_481 = or(_T_479, _T_480) @[Mux.scala 27:72]
-    wire _T_482 : UInt @[Mux.scala 27:72]
-    _T_482 <= _T_481 @[Mux.scala 27:72]
-    f0val <= _T_482 @[el2_ifu_aln_ctl.scala 287:9]
-    node _T_483 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 289:40]
-    node _T_484 = and(fetch_to_f0, _T_483) @[el2_ifu_aln_ctl.scala 289:38]
-    node _T_485 = bits(_T_484, 0, 0) @[el2_ifu_aln_ctl.scala 289:61]
-    node _T_486 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 290:40]
-    node _T_487 = and(shift_f2_f0, _T_486) @[el2_ifu_aln_ctl.scala 290:38]
-    node _T_488 = bits(_T_487, 0, 0) @[el2_ifu_aln_ctl.scala 290:61]
-    node _T_489 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 291:40]
-    node _T_490 = and(shift_f1_f0, _T_489) @[el2_ifu_aln_ctl.scala 291:38]
-    node _T_491 = bits(_T_490, 0, 0) @[el2_ifu_aln_ctl.scala 291:67]
-    node _T_492 = not(fetch_to_f0) @[el2_ifu_aln_ctl.scala 292:26]
-    node _T_493 = not(shift_f2_f0) @[el2_ifu_aln_ctl.scala 292:41]
-    node _T_494 = and(_T_492, _T_493) @[el2_ifu_aln_ctl.scala 292:39]
-    node _T_495 = not(shift_f1_f0) @[el2_ifu_aln_ctl.scala 292:56]
-    node _T_496 = and(_T_494, _T_495) @[el2_ifu_aln_ctl.scala 292:54]
-    node _T_497 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 292:71]
-    node _T_498 = and(_T_496, _T_497) @[el2_ifu_aln_ctl.scala 292:69]
-    node _T_499 = bits(_T_498, 0, 0) @[el2_ifu_aln_ctl.scala 292:92]
-    node _T_500 = mux(_T_485, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_501 = mux(_T_488, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_502 = mux(_T_491, sf1val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_503 = mux(_T_499, sf0val, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_504 = or(_T_500, _T_501) @[Mux.scala 27:72]
-    node _T_505 = or(_T_504, _T_502) @[Mux.scala 27:72]
-    node _T_506 = or(_T_505, _T_503) @[Mux.scala 27:72]
-    wire _T_507 : UInt @[Mux.scala 27:72]
-    _T_507 <= _T_506 @[Mux.scala 27:72]
-    f0val_in <= _T_507 @[el2_ifu_aln_ctl.scala 289:12]
-    node _T_508 = bits(q0sel, 0, 0) @[el2_ifu_aln_ctl.scala 294:29]
-    node _T_509 = bits(_T_508, 0, 0) @[el2_ifu_aln_ctl.scala 294:33]
-    node _T_510 = bits(q0sel, 1, 1) @[el2_ifu_aln_ctl.scala 294:53]
-    node _T_511 = bits(_T_510, 0, 0) @[el2_ifu_aln_ctl.scala 294:57]
-    node _T_512 = bits(q0eff, 31, 16) @[el2_ifu_aln_ctl.scala 294:70]
-    node _T_513 = mux(_T_509, q0eff, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_514 = mux(_T_511, _T_512, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_515 = or(_T_513, _T_514) @[Mux.scala 27:72]
-    wire _T_516 : UInt<32> @[Mux.scala 27:72]
-    _T_516 <= _T_515 @[Mux.scala 27:72]
-    q0final <= _T_516 @[el2_ifu_aln_ctl.scala 294:11]
-    node _T_517 = bits(q1sel, 0, 0) @[el2_ifu_aln_ctl.scala 296:29]
-    node _T_518 = bits(_T_517, 0, 0) @[el2_ifu_aln_ctl.scala 296:33]
-    node _T_519 = bits(q1eff, 15, 0) @[el2_ifu_aln_ctl.scala 296:46]
-    node _T_520 = bits(q1sel, 1, 1) @[el2_ifu_aln_ctl.scala 296:59]
-    node _T_521 = bits(_T_520, 0, 0) @[el2_ifu_aln_ctl.scala 296:63]
-    node _T_522 = bits(q1eff, 31, 16) @[el2_ifu_aln_ctl.scala 296:76]
-    node _T_523 = mux(_T_518, _T_519, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_524 = mux(_T_521, _T_522, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_525 = or(_T_523, _T_524) @[Mux.scala 27:72]
-    wire _T_526 : UInt<16> @[Mux.scala 27:72]
-    _T_526 <= _T_525 @[Mux.scala 27:72]
-    q1final <= _T_526 @[el2_ifu_aln_ctl.scala 296:11]
-    node _T_527 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 298:30]
-    node _T_528 = bits(_T_527, 0, 0) @[el2_ifu_aln_ctl.scala 298:34]
-    node _T_529 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 298:54]
-    node _T_530 = not(_T_529) @[el2_ifu_aln_ctl.scala 298:48]
-    node _T_531 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 298:65]
-    node _T_532 = and(_T_530, _T_531) @[el2_ifu_aln_ctl.scala 298:58]
-    node _T_533 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 298:82]
-    node _T_534 = cat(_T_533, UInt<1>("h01")) @[Cat.scala 29:58]
-    node _T_535 = mux(_T_528, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_536 = mux(_T_532, _T_534, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_537 = or(_T_535, _T_536) @[Mux.scala 27:72]
-    wire _T_538 : UInt<2> @[Mux.scala 27:72]
-    _T_538 <= _T_537 @[Mux.scala 27:72]
-    alignval <= _T_538 @[el2_ifu_aln_ctl.scala 298:12]
-    node _T_539 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 300:35]
-    node _T_540 = bits(_T_539, 0, 0) @[el2_ifu_aln_ctl.scala 300:39]
-    node _T_541 = bits(f0dbecc, 0, 0) @[Bitwise.scala 72:15]
-    node _T_542 = mux(_T_541, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
-    node _T_543 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 300:73]
-    node _T_544 = not(_T_543) @[el2_ifu_aln_ctl.scala 300:67]
-    node _T_545 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 300:84]
-    node _T_546 = and(_T_544, _T_545) @[el2_ifu_aln_ctl.scala 300:77]
-    node _T_547 = bits(_T_546, 0, 0) @[el2_ifu_aln_ctl.scala 300:89]
-    node _T_548 = cat(f1dbecc, f0dbecc) @[Cat.scala 29:58]
-    node _T_549 = mux(_T_540, _T_542, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_550 = mux(_T_547, _T_548, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_551 = or(_T_549, _T_550) @[Mux.scala 27:72]
+    f0pc_in <= _T_433 @[Mux.scala 27:72]
+    node _T_434 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 278:40]
+    node _T_435 = and(f2_wr_en, _T_434) @[el2_ifu_aln_ctl.scala 278:38]
+    node _T_436 = bits(_T_435, 0, 0) @[el2_ifu_aln_ctl.scala 278:61]
+    node _T_437 = not(f2_wr_en) @[el2_ifu_aln_ctl.scala 279:6]
+    node _T_438 = not(shift_f2_f1) @[el2_ifu_aln_ctl.scala 279:21]
+    node _T_439 = and(_T_437, _T_438) @[el2_ifu_aln_ctl.scala 279:19]
+    node _T_440 = not(shift_f2_f0) @[el2_ifu_aln_ctl.scala 279:36]
+    node _T_441 = and(_T_439, _T_440) @[el2_ifu_aln_ctl.scala 279:34]
+    node _T_442 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 279:51]
+    node _T_443 = and(_T_441, _T_442) @[el2_ifu_aln_ctl.scala 279:49]
+    node _T_444 = bits(_T_443, 0, 0) @[el2_ifu_aln_ctl.scala 279:72]
+    node _T_445 = mux(_T_436, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_446 = mux(_T_444, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_447 = or(_T_445, _T_446) @[Mux.scala 27:72]
+    wire _T_448 : UInt @[Mux.scala 27:72]
+    _T_448 <= _T_447 @[Mux.scala 27:72]
+    f2val_in <= _T_448 @[el2_ifu_aln_ctl.scala 278:12]
+    node _T_449 = bits(f1_shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 281:35]
+    node _T_450 = bits(f1val, 1, 1) @[el2_ifu_aln_ctl.scala 281:48]
+    node _T_451 = bits(f1_shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 281:66]
+    node _T_452 = not(_T_451) @[el2_ifu_aln_ctl.scala 281:53]
+    node _T_453 = mux(_T_449, _T_450, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_454 = mux(_T_452, f1val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_455 = or(_T_453, _T_454) @[Mux.scala 27:72]
+    wire _T_456 : UInt @[Mux.scala 27:72]
+    _T_456 <= _T_455 @[Mux.scala 27:72]
+    sf1val <= _T_456 @[el2_ifu_aln_ctl.scala 281:10]
+    node _T_457 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 283:40]
+    node _T_458 = and(fetch_to_f1, _T_457) @[el2_ifu_aln_ctl.scala 283:38]
+    node _T_459 = bits(_T_458, 0, 0) @[el2_ifu_aln_ctl.scala 283:61]
+    node _T_460 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 284:40]
+    node _T_461 = and(shift_f2_f1, _T_460) @[el2_ifu_aln_ctl.scala 284:38]
+    node _T_462 = bits(_T_461, 0, 0) @[el2_ifu_aln_ctl.scala 284:61]
+    node _T_463 = not(fetch_to_f1) @[el2_ifu_aln_ctl.scala 285:26]
+    node _T_464 = not(shift_f2_f1) @[el2_ifu_aln_ctl.scala 285:41]
+    node _T_465 = and(_T_463, _T_464) @[el2_ifu_aln_ctl.scala 285:39]
+    node _T_466 = not(shift_f1_f0) @[el2_ifu_aln_ctl.scala 285:56]
+    node _T_467 = and(_T_465, _T_466) @[el2_ifu_aln_ctl.scala 285:54]
+    node _T_468 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 285:71]
+    node _T_469 = and(_T_467, _T_468) @[el2_ifu_aln_ctl.scala 285:69]
+    node _T_470 = bits(_T_469, 0, 0) @[el2_ifu_aln_ctl.scala 285:92]
+    node _T_471 = mux(_T_459, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_472 = mux(_T_462, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_473 = mux(_T_470, sf1val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_474 = or(_T_471, _T_472) @[Mux.scala 27:72]
+    node _T_475 = or(_T_474, _T_473) @[Mux.scala 27:72]
+    wire _T_476 : UInt @[Mux.scala 27:72]
+    _T_476 <= _T_475 @[Mux.scala 27:72]
+    f1val_in <= _T_476 @[el2_ifu_aln_ctl.scala 283:12]
+    node _T_477 = bits(shift_2B, 0, 0) @[el2_ifu_aln_ctl.scala 287:31]
+    node _T_478 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 287:46]
+    node _T_479 = not(shift_2B) @[el2_ifu_aln_ctl.scala 287:52]
+    node _T_480 = not(shift_4B) @[el2_ifu_aln_ctl.scala 287:64]
+    node _T_481 = and(_T_479, _T_480) @[el2_ifu_aln_ctl.scala 287:62]
+    node _T_482 = bits(_T_481, 0, 0) @[el2_ifu_aln_ctl.scala 287:75]
+    node _T_483 = mux(_T_477, _T_478, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_484 = mux(_T_482, f0val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_485 = or(_T_483, _T_484) @[Mux.scala 27:72]
+    wire _T_486 : UInt @[Mux.scala 27:72]
+    _T_486 <= _T_485 @[Mux.scala 27:72]
+    f0val <= _T_486 @[el2_ifu_aln_ctl.scala 287:9]
+    node _T_487 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 289:40]
+    node _T_488 = and(fetch_to_f0, _T_487) @[el2_ifu_aln_ctl.scala 289:38]
+    node _T_489 = bits(_T_488, 0, 0) @[el2_ifu_aln_ctl.scala 289:61]
+    node _T_490 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 290:40]
+    node _T_491 = and(shift_f2_f0, _T_490) @[el2_ifu_aln_ctl.scala 290:38]
+    node _T_492 = bits(_T_491, 0, 0) @[el2_ifu_aln_ctl.scala 290:61]
+    node _T_493 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 291:40]
+    node _T_494 = and(shift_f1_f0, _T_493) @[el2_ifu_aln_ctl.scala 291:38]
+    node _T_495 = bits(_T_494, 0, 0) @[el2_ifu_aln_ctl.scala 291:67]
+    node _T_496 = not(fetch_to_f0) @[el2_ifu_aln_ctl.scala 292:26]
+    node _T_497 = not(shift_f2_f0) @[el2_ifu_aln_ctl.scala 292:41]
+    node _T_498 = and(_T_496, _T_497) @[el2_ifu_aln_ctl.scala 292:39]
+    node _T_499 = not(shift_f1_f0) @[el2_ifu_aln_ctl.scala 292:56]
+    node _T_500 = and(_T_498, _T_499) @[el2_ifu_aln_ctl.scala 292:54]
+    node _T_501 = not(io.exu_flush_final) @[el2_ifu_aln_ctl.scala 292:71]
+    node _T_502 = and(_T_500, _T_501) @[el2_ifu_aln_ctl.scala 292:69]
+    node _T_503 = bits(_T_502, 0, 0) @[el2_ifu_aln_ctl.scala 292:92]
+    node _T_504 = mux(_T_489, io.ifu_fetch_val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_505 = mux(_T_492, f2val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_506 = mux(_T_495, sf1val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_507 = mux(_T_503, sf0val, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_508 = or(_T_504, _T_505) @[Mux.scala 27:72]
+    node _T_509 = or(_T_508, _T_506) @[Mux.scala 27:72]
+    node _T_510 = or(_T_509, _T_507) @[Mux.scala 27:72]
+    wire _T_511 : UInt @[Mux.scala 27:72]
+    _T_511 <= _T_510 @[Mux.scala 27:72]
+    f0val_in <= _T_511 @[el2_ifu_aln_ctl.scala 289:12]
+    node _T_512 = bits(q0sel, 0, 0) @[el2_ifu_aln_ctl.scala 294:29]
+    node _T_513 = bits(_T_512, 0, 0) @[el2_ifu_aln_ctl.scala 294:33]
+    node _T_514 = bits(q0sel, 1, 1) @[el2_ifu_aln_ctl.scala 294:53]
+    node _T_515 = bits(_T_514, 0, 0) @[el2_ifu_aln_ctl.scala 294:57]
+    node _T_516 = bits(q0eff, 31, 16) @[el2_ifu_aln_ctl.scala 294:70]
+    node _T_517 = mux(_T_513, q0eff, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_518 = mux(_T_515, _T_516, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_519 = or(_T_517, _T_518) @[Mux.scala 27:72]
+    wire _T_520 : UInt<32> @[Mux.scala 27:72]
+    _T_520 <= _T_519 @[Mux.scala 27:72]
+    q0final <= _T_520 @[el2_ifu_aln_ctl.scala 294:11]
+    node _T_521 = bits(q1sel, 0, 0) @[el2_ifu_aln_ctl.scala 296:29]
+    node _T_522 = bits(_T_521, 0, 0) @[el2_ifu_aln_ctl.scala 296:33]
+    node _T_523 = bits(q1eff, 15, 0) @[el2_ifu_aln_ctl.scala 296:46]
+    node _T_524 = bits(q1sel, 1, 1) @[el2_ifu_aln_ctl.scala 296:59]
+    node _T_525 = bits(_T_524, 0, 0) @[el2_ifu_aln_ctl.scala 296:63]
+    node _T_526 = bits(q1eff, 31, 16) @[el2_ifu_aln_ctl.scala 296:76]
+    node _T_527 = mux(_T_522, _T_523, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_528 = mux(_T_525, _T_526, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_529 = or(_T_527, _T_528) @[Mux.scala 27:72]
+    wire _T_530 : UInt<16> @[Mux.scala 27:72]
+    _T_530 <= _T_529 @[Mux.scala 27:72]
+    q1final <= _T_530 @[el2_ifu_aln_ctl.scala 296:11]
+    node _T_531 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 298:30]
+    node _T_532 = bits(_T_531, 0, 0) @[el2_ifu_aln_ctl.scala 298:34]
+    node _T_533 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 298:54]
+    node _T_534 = not(_T_533) @[el2_ifu_aln_ctl.scala 298:48]
+    node _T_535 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 298:65]
+    node _T_536 = and(_T_534, _T_535) @[el2_ifu_aln_ctl.scala 298:58]
+    node _T_537 = bits(f1val, 0, 0) @[el2_ifu_aln_ctl.scala 298:82]
+    node _T_538 = cat(_T_537, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_539 = mux(_T_532, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_540 = mux(_T_536, _T_538, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_541 = or(_T_539, _T_540) @[Mux.scala 27:72]
+    wire _T_542 : UInt<2> @[Mux.scala 27:72]
+    _T_542 <= _T_541 @[Mux.scala 27:72]
+    alignval <= _T_542 @[el2_ifu_aln_ctl.scala 298:12]
+    node _T_543 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 300:35]
+    node _T_544 = bits(_T_543, 0, 0) @[el2_ifu_aln_ctl.scala 300:39]
+    node _T_545 = bits(f0dbecc, 0, 0) @[Bitwise.scala 72:15]
+    node _T_546 = mux(_T_545, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
+    node _T_547 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 300:73]
+    node _T_548 = not(_T_547) @[el2_ifu_aln_ctl.scala 300:67]
+    node _T_549 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 300:84]
+    node _T_550 = and(_T_548, _T_549) @[el2_ifu_aln_ctl.scala 300:77]
+    node _T_551 = bits(_T_550, 0, 0) @[el2_ifu_aln_ctl.scala 300:89]
+    node _T_552 = cat(f1dbecc, f0dbecc) @[Cat.scala 29:58]
+    node _T_553 = mux(_T_544, _T_546, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_554 = mux(_T_551, _T_552, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_555 = or(_T_553, _T_554) @[Mux.scala 27:72]
     wire aligndbecc : UInt<2> @[Mux.scala 27:72]
-    aligndbecc <= _T_551 @[Mux.scala 27:72]
-    node _T_552 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 302:35]
-    node _T_553 = bits(_T_552, 0, 0) @[el2_ifu_aln_ctl.scala 302:45]
-    node _T_554 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 302:65]
-    node _T_555 = not(_T_554) @[el2_ifu_aln_ctl.scala 302:59]
-    node _T_556 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 302:76]
-    node _T_557 = and(_T_555, _T_556) @[el2_ifu_aln_ctl.scala 302:69]
-    node _T_558 = bits(_T_557, 0, 0) @[el2_ifu_aln_ctl.scala 302:81]
-    node _T_559 = bits(f1brend, 0, 0) @[el2_ifu_aln_ctl.scala 302:100]
-    node _T_560 = bits(f0brend, 0, 0) @[el2_ifu_aln_ctl.scala 302:111]
-    node _T_561 = cat(_T_559, _T_560) @[Cat.scala 29:58]
-    node _T_562 = mux(_T_553, f0brend, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_563 = mux(_T_558, _T_561, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_564 = or(_T_562, _T_563) @[Mux.scala 27:72]
+    aligndbecc <= _T_555 @[Mux.scala 27:72]
+    node _T_556 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 302:35]
+    node _T_557 = bits(_T_556, 0, 0) @[el2_ifu_aln_ctl.scala 302:45]
+    node _T_558 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 302:65]
+    node _T_559 = not(_T_558) @[el2_ifu_aln_ctl.scala 302:59]
+    node _T_560 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 302:76]
+    node _T_561 = and(_T_559, _T_560) @[el2_ifu_aln_ctl.scala 302:69]
+    node _T_562 = bits(_T_561, 0, 0) @[el2_ifu_aln_ctl.scala 302:81]
+    node _T_563 = bits(f1brend, 0, 0) @[el2_ifu_aln_ctl.scala 302:100]
+    node _T_564 = bits(f0brend, 0, 0) @[el2_ifu_aln_ctl.scala 302:111]
+    node _T_565 = cat(_T_563, _T_564) @[Cat.scala 29:58]
+    node _T_566 = mux(_T_557, f0brend, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_567 = mux(_T_562, _T_565, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_568 = or(_T_566, _T_567) @[Mux.scala 27:72]
     wire alignbrend : UInt<2> @[Mux.scala 27:72]
-    alignbrend <= _T_564 @[Mux.scala 27:72]
-    node _T_565 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 304:33]
-    node _T_566 = bits(_T_565, 0, 0) @[el2_ifu_aln_ctl.scala 304:43]
-    node _T_567 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 304:61]
-    node _T_568 = not(_T_567) @[el2_ifu_aln_ctl.scala 304:55]
-    node _T_569 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 304:72]
-    node _T_570 = and(_T_568, _T_569) @[el2_ifu_aln_ctl.scala 304:65]
-    node _T_571 = bits(_T_570, 0, 0) @[el2_ifu_aln_ctl.scala 304:77]
-    node _T_572 = bits(f1pc4, 0, 0) @[el2_ifu_aln_ctl.scala 304:94]
-    node _T_573 = bits(f0pc4, 0, 0) @[el2_ifu_aln_ctl.scala 304:103]
-    node _T_574 = cat(_T_572, _T_573) @[Cat.scala 29:58]
-    node _T_575 = mux(_T_566, f0pc4, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_576 = mux(_T_571, _T_574, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_577 = or(_T_575, _T_576) @[Mux.scala 27:72]
+    alignbrend <= _T_568 @[Mux.scala 27:72]
+    node _T_569 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 304:33]
+    node _T_570 = bits(_T_569, 0, 0) @[el2_ifu_aln_ctl.scala 304:43]
+    node _T_571 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 304:61]
+    node _T_572 = not(_T_571) @[el2_ifu_aln_ctl.scala 304:55]
+    node _T_573 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 304:72]
+    node _T_574 = and(_T_572, _T_573) @[el2_ifu_aln_ctl.scala 304:65]
+    node _T_575 = bits(_T_574, 0, 0) @[el2_ifu_aln_ctl.scala 304:77]
+    node _T_576 = bits(f1pc4, 0, 0) @[el2_ifu_aln_ctl.scala 304:94]
+    node _T_577 = bits(f0pc4, 0, 0) @[el2_ifu_aln_ctl.scala 304:103]
+    node _T_578 = cat(_T_576, _T_577) @[Cat.scala 29:58]
+    node _T_579 = mux(_T_570, f0pc4, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_580 = mux(_T_575, _T_578, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_581 = or(_T_579, _T_580) @[Mux.scala 27:72]
     wire alignpc4 : UInt<2> @[Mux.scala 27:72]
-    alignpc4 <= _T_577 @[Mux.scala 27:72]
-    node _T_578 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 306:33]
-    node _T_579 = bits(_T_578, 0, 0) @[el2_ifu_aln_ctl.scala 306:43]
-    node _T_580 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 306:61]
-    node _T_581 = not(_T_580) @[el2_ifu_aln_ctl.scala 306:55]
-    node _T_582 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 306:72]
-    node _T_583 = and(_T_581, _T_582) @[el2_ifu_aln_ctl.scala 306:65]
-    node _T_584 = bits(_T_583, 0, 0) @[el2_ifu_aln_ctl.scala 306:77]
-    node _T_585 = bits(f1ret, 0, 0) @[el2_ifu_aln_ctl.scala 306:94]
-    node _T_586 = bits(f0ret, 0, 0) @[el2_ifu_aln_ctl.scala 306:103]
-    node _T_587 = cat(_T_585, _T_586) @[Cat.scala 29:58]
-    node _T_588 = mux(_T_579, f0ret, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_589 = mux(_T_584, _T_587, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_590 = or(_T_588, _T_589) @[Mux.scala 27:72]
+    alignpc4 <= _T_581 @[Mux.scala 27:72]
+    node _T_582 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 306:33]
+    node _T_583 = bits(_T_582, 0, 0) @[el2_ifu_aln_ctl.scala 306:43]
+    node _T_584 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 306:61]
+    node _T_585 = not(_T_584) @[el2_ifu_aln_ctl.scala 306:55]
+    node _T_586 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 306:72]
+    node _T_587 = and(_T_585, _T_586) @[el2_ifu_aln_ctl.scala 306:65]
+    node _T_588 = bits(_T_587, 0, 0) @[el2_ifu_aln_ctl.scala 306:77]
+    node _T_589 = bits(f1ret, 0, 0) @[el2_ifu_aln_ctl.scala 306:94]
+    node _T_590 = bits(f0ret, 0, 0) @[el2_ifu_aln_ctl.scala 306:103]
+    node _T_591 = cat(_T_589, _T_590) @[Cat.scala 29:58]
+    node _T_592 = mux(_T_583, f0ret, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_593 = mux(_T_588, _T_591, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_594 = or(_T_592, _T_593) @[Mux.scala 27:72]
     wire alignret : UInt<2> @[Mux.scala 27:72]
-    alignret <= _T_590 @[Mux.scala 27:72]
-    node _T_591 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 308:33]
-    node _T_592 = bits(_T_591, 0, 0) @[el2_ifu_aln_ctl.scala 308:43]
-    node _T_593 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 308:61]
-    node _T_594 = not(_T_593) @[el2_ifu_aln_ctl.scala 308:55]
-    node _T_595 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 308:72]
-    node _T_596 = and(_T_594, _T_595) @[el2_ifu_aln_ctl.scala 308:65]
-    node _T_597 = bits(_T_596, 0, 0) @[el2_ifu_aln_ctl.scala 308:77]
-    node _T_598 = bits(f1way, 0, 0) @[el2_ifu_aln_ctl.scala 308:94]
-    node _T_599 = bits(f0way, 0, 0) @[el2_ifu_aln_ctl.scala 308:103]
-    node _T_600 = cat(_T_598, _T_599) @[Cat.scala 29:58]
-    node _T_601 = mux(_T_592, f0way, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_602 = mux(_T_597, _T_600, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_603 = or(_T_601, _T_602) @[Mux.scala 27:72]
+    alignret <= _T_594 @[Mux.scala 27:72]
+    node _T_595 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 308:33]
+    node _T_596 = bits(_T_595, 0, 0) @[el2_ifu_aln_ctl.scala 308:43]
+    node _T_597 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 308:61]
+    node _T_598 = not(_T_597) @[el2_ifu_aln_ctl.scala 308:55]
+    node _T_599 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 308:72]
+    node _T_600 = and(_T_598, _T_599) @[el2_ifu_aln_ctl.scala 308:65]
+    node _T_601 = bits(_T_600, 0, 0) @[el2_ifu_aln_ctl.scala 308:77]
+    node _T_602 = bits(f1way, 0, 0) @[el2_ifu_aln_ctl.scala 308:94]
+    node _T_603 = bits(f0way, 0, 0) @[el2_ifu_aln_ctl.scala 308:103]
+    node _T_604 = cat(_T_602, _T_603) @[Cat.scala 29:58]
+    node _T_605 = mux(_T_596, f0way, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_606 = mux(_T_601, _T_604, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_607 = or(_T_605, _T_606) @[Mux.scala 27:72]
     wire alignway : UInt<2> @[Mux.scala 27:72]
-    alignway <= _T_603 @[Mux.scala 27:72]
-    node _T_604 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 310:35]
-    node _T_605 = bits(_T_604, 0, 0) @[el2_ifu_aln_ctl.scala 310:45]
-    node _T_606 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 310:65]
-    node _T_607 = not(_T_606) @[el2_ifu_aln_ctl.scala 310:59]
-    node _T_608 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 310:76]
-    node _T_609 = and(_T_607, _T_608) @[el2_ifu_aln_ctl.scala 310:69]
-    node _T_610 = bits(_T_609, 0, 0) @[el2_ifu_aln_ctl.scala 310:81]
-    node _T_611 = bits(f1hist1, 0, 0) @[el2_ifu_aln_ctl.scala 310:100]
-    node _T_612 = bits(f0hist1, 0, 0) @[el2_ifu_aln_ctl.scala 310:111]
-    node _T_613 = cat(_T_611, _T_612) @[Cat.scala 29:58]
-    node _T_614 = mux(_T_605, f0hist1, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_615 = mux(_T_610, _T_613, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_616 = or(_T_614, _T_615) @[Mux.scala 27:72]
+    alignway <= _T_607 @[Mux.scala 27:72]
+    node _T_608 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 310:35]
+    node _T_609 = bits(_T_608, 0, 0) @[el2_ifu_aln_ctl.scala 310:45]
+    node _T_610 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 310:65]
+    node _T_611 = not(_T_610) @[el2_ifu_aln_ctl.scala 310:59]
+    node _T_612 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 310:76]
+    node _T_613 = and(_T_611, _T_612) @[el2_ifu_aln_ctl.scala 310:69]
+    node _T_614 = bits(_T_613, 0, 0) @[el2_ifu_aln_ctl.scala 310:81]
+    node _T_615 = bits(f1hist1, 0, 0) @[el2_ifu_aln_ctl.scala 310:100]
+    node _T_616 = bits(f0hist1, 0, 0) @[el2_ifu_aln_ctl.scala 310:111]
+    node _T_617 = cat(_T_615, _T_616) @[Cat.scala 29:58]
+    node _T_618 = mux(_T_609, f0hist1, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_619 = mux(_T_614, _T_617, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_620 = or(_T_618, _T_619) @[Mux.scala 27:72]
     wire alignhist1 : UInt<2> @[Mux.scala 27:72]
-    alignhist1 <= _T_616 @[Mux.scala 27:72]
-    node _T_617 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 312:35]
-    node _T_618 = bits(_T_617, 0, 0) @[el2_ifu_aln_ctl.scala 312:45]
-    node _T_619 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 312:65]
-    node _T_620 = not(_T_619) @[el2_ifu_aln_ctl.scala 312:59]
-    node _T_621 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 312:76]
-    node _T_622 = and(_T_620, _T_621) @[el2_ifu_aln_ctl.scala 312:69]
-    node _T_623 = bits(_T_622, 0, 0) @[el2_ifu_aln_ctl.scala 312:81]
-    node _T_624 = bits(f1hist0, 0, 0) @[el2_ifu_aln_ctl.scala 312:100]
-    node _T_625 = bits(f0hist0, 0, 0) @[el2_ifu_aln_ctl.scala 312:111]
-    node _T_626 = cat(_T_624, _T_625) @[Cat.scala 29:58]
-    node _T_627 = mux(_T_618, f0hist0, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_628 = mux(_T_623, _T_626, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_629 = or(_T_627, _T_628) @[Mux.scala 27:72]
+    alignhist1 <= _T_620 @[Mux.scala 27:72]
+    node _T_621 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 312:35]
+    node _T_622 = bits(_T_621, 0, 0) @[el2_ifu_aln_ctl.scala 312:45]
+    node _T_623 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 312:65]
+    node _T_624 = not(_T_623) @[el2_ifu_aln_ctl.scala 312:59]
+    node _T_625 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 312:76]
+    node _T_626 = and(_T_624, _T_625) @[el2_ifu_aln_ctl.scala 312:69]
+    node _T_627 = bits(_T_626, 0, 0) @[el2_ifu_aln_ctl.scala 312:81]
+    node _T_628 = bits(f1hist0, 0, 0) @[el2_ifu_aln_ctl.scala 312:100]
+    node _T_629 = bits(f0hist0, 0, 0) @[el2_ifu_aln_ctl.scala 312:111]
+    node _T_630 = cat(_T_628, _T_629) @[Cat.scala 29:58]
+    node _T_631 = mux(_T_622, f0hist0, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_632 = mux(_T_627, _T_630, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_633 = or(_T_631, _T_632) @[Mux.scala 27:72]
     wire alignhist0 : UInt<2> @[Mux.scala 27:72]
-    alignhist0 <= _T_629 @[Mux.scala 27:72]
-    node _T_630 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 314:27]
-    node _T_631 = not(_T_630) @[el2_ifu_aln_ctl.scala 314:21]
-    node _T_632 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 314:38]
-    node alignfromf1 = and(_T_631, _T_632) @[el2_ifu_aln_ctl.scala 314:31]
+    alignhist0 <= _T_633 @[Mux.scala 27:72]
+    node _T_634 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 314:27]
+    node _T_635 = not(_T_634) @[el2_ifu_aln_ctl.scala 314:21]
+    node _T_636 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 314:38]
+    node alignfromf1 = and(_T_635, _T_636) @[el2_ifu_aln_ctl.scala 314:31]
     wire f1pc : UInt<31>
     f1pc <= UInt<1>("h00")
-    node _T_633 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:33]
-    node _T_634 = bits(_T_633, 0, 0) @[el2_ifu_aln_ctl.scala 318:43]
-    node _T_635 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:67]
-    node _T_636 = not(_T_635) @[el2_ifu_aln_ctl.scala 318:61]
-    node _T_637 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 318:78]
-    node _T_638 = and(_T_636, _T_637) @[el2_ifu_aln_ctl.scala 318:71]
-    node _T_639 = bits(_T_638, 0, 0) @[el2_ifu_aln_ctl.scala 318:83]
-    node _T_640 = mux(_T_634, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_641 = mux(_T_639, f1pc, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_642 = or(_T_640, _T_641) @[Mux.scala 27:72]
+    node _T_637 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:33]
+    node _T_638 = bits(_T_637, 0, 0) @[el2_ifu_aln_ctl.scala 318:43]
+    node _T_639 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 318:67]
+    node _T_640 = not(_T_639) @[el2_ifu_aln_ctl.scala 318:61]
+    node _T_641 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 318:78]
+    node _T_642 = and(_T_640, _T_641) @[el2_ifu_aln_ctl.scala 318:71]
+    node _T_643 = bits(_T_642, 0, 0) @[el2_ifu_aln_ctl.scala 318:83]
+    node _T_644 = mux(_T_638, f0pc_plus1, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_645 = mux(_T_643, f1pc, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_646 = or(_T_644, _T_645) @[Mux.scala 27:72]
     wire secondpc : UInt<31> @[Mux.scala 27:72]
-    secondpc <= _T_642 @[Mux.scala 27:72]
+    secondpc <= _T_646 @[Mux.scala 27:72]
     io.ifu_i0_pc <= f0pc @[el2_ifu_aln_ctl.scala 320:16]
-    node _T_643 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:47]
-    node _T_644 = not(_T_643) @[el2_ifu_aln_ctl.scala 324:41]
-    node _T_645 = and(decompressed.io.rvc, _T_644) @[el2_ifu_aln_ctl.scala 324:39]
-    node _T_646 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 324:58]
-    node _T_647 = and(_T_645, _T_646) @[el2_ifu_aln_ctl.scala 324:51]
-    node _T_648 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 324:74]
-    node _T_649 = not(_T_648) @[el2_ifu_aln_ctl.scala 324:64]
-    node _T_650 = and(_T_647, _T_649) @[el2_ifu_aln_ctl.scala 324:62]
-    node _T_651 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 324:91]
-    node _T_652 = not(_T_651) @[el2_ifu_aln_ctl.scala 324:80]
-    node _T_653 = and(_T_650, _T_652) @[el2_ifu_aln_ctl.scala 324:78]
-    node _T_654 = bits(_T_653, 0, 0) @[el2_ifu_aln_ctl.scala 324:96]
-    node _T_655 = mux(_T_654, f1ictype, f0ictype) @[el2_ifu_aln_ctl.scala 324:29]
-    io.ifu_i0_icaf_type <= _T_655 @[el2_ifu_aln_ctl.scala 324:23]
-    node _T_656 = bits(alignicaf, 1, 1) @[el2_ifu_aln_ctl.scala 326:27]
-    node _T_657 = bits(aligndbecc, 1, 1) @[el2_ifu_aln_ctl.scala 326:43]
-    node icaf_eff = or(_T_656, _T_657) @[el2_ifu_aln_ctl.scala 326:31]
-    node _T_658 = and(decompressed.io.rvc, icaf_eff) @[el2_ifu_aln_ctl.scala 328:32]
-    node _T_659 = and(_T_658, alignfromf1) @[el2_ifu_aln_ctl.scala 328:43]
-    io.ifu_i0_icaf_f1 <= _T_659 @[el2_ifu_aln_ctl.scala 328:21]
-    node _T_660 = orr(aligndbecc) @[el2_ifu_aln_ctl.scala 330:52]
-    node _T_661 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 330:76]
-    node _T_662 = mux(decompressed.io.rvc, _T_660, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_663 = mux(first2B, _T_661, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_664 = or(_T_662, _T_663) @[Mux.scala 27:72]
-    wire _T_665 : UInt<1> @[Mux.scala 27:72]
-    _T_665 <= _T_664 @[Mux.scala 27:72]
-    io.ifu_i0_dbecc <= _T_665 @[el2_ifu_aln_ctl.scala 330:19]
-    node _T_666 = bits(f0pc, 9, 2) @[el2_lib.scala 182:12]
-    node _T_667 = bits(f0pc, 17, 10) @[el2_lib.scala 182:46]
-    node _T_668 = xor(_T_666, _T_667) @[el2_lib.scala 182:42]
-    node _T_669 = bits(f0pc, 25, 18) @[el2_lib.scala 182:80]
-    node firstpc_hash = xor(_T_668, _T_669) @[el2_lib.scala 182:76]
-    node _T_670 = bits(secondpc, 9, 2) @[el2_lib.scala 182:12]
-    node _T_671 = bits(secondpc, 17, 10) @[el2_lib.scala 182:46]
-    node _T_672 = xor(_T_670, _T_671) @[el2_lib.scala 182:42]
-    node _T_673 = bits(secondpc, 25, 18) @[el2_lib.scala 182:80]
-    node secondpc_hash = xor(_T_672, _T_673) @[el2_lib.scala 182:76]
-    node _T_674 = bits(f0pc, 14, 10) @[el2_lib.scala 175:32]
-    node _T_675 = bits(f0pc, 19, 15) @[el2_lib.scala 175:32]
-    node _T_676 = bits(f0pc, 24, 20) @[el2_lib.scala 175:32]
-    wire _T_677 : UInt<5>[3] @[el2_lib.scala 175:24]
-    _T_677[0] <= _T_674 @[el2_lib.scala 175:24]
-    _T_677[1] <= _T_675 @[el2_lib.scala 175:24]
-    _T_677[2] <= _T_676 @[el2_lib.scala 175:24]
-    node _T_678 = xor(_T_677[0], _T_677[1]) @[el2_lib.scala 175:111]
-    node firstbrtag_hash = xor(_T_678, _T_677[2]) @[el2_lib.scala 175:111]
-    node _T_679 = bits(secondpc, 14, 10) @[el2_lib.scala 175:32]
-    node _T_680 = bits(secondpc, 19, 15) @[el2_lib.scala 175:32]
-    node _T_681 = bits(secondpc, 24, 20) @[el2_lib.scala 175:32]
-    wire _T_682 : UInt<5>[3] @[el2_lib.scala 175:24]
-    _T_682[0] <= _T_679 @[el2_lib.scala 175:24]
-    _T_682[1] <= _T_680 @[el2_lib.scala 175:24]
-    _T_682[2] <= _T_681 @[el2_lib.scala 175:24]
-    node _T_683 = xor(_T_682[0], _T_682[1]) @[el2_lib.scala 175:111]
-    node secondbrtag_hash = xor(_T_683, _T_682[2]) @[el2_lib.scala 175:111]
-    node _T_684 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 340:42]
-    node _T_685 = and(first2B, _T_684) @[el2_ifu_aln_ctl.scala 340:30]
-    node _T_686 = bits(alignbrend, 1, 1) @[el2_ifu_aln_ctl.scala 340:70]
-    node _T_687 = and(decompressed.io.rvc, _T_686) @[el2_ifu_aln_ctl.scala 340:58]
-    node _T_688 = or(_T_685, _T_687) @[el2_ifu_aln_ctl.scala 340:47]
-    node _T_689 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 340:96]
-    node _T_690 = and(decompressed.io.rvc, _T_689) @[el2_ifu_aln_ctl.scala 340:86]
-    node _T_691 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 340:112]
-    node _T_692 = and(_T_690, _T_691) @[el2_ifu_aln_ctl.scala 340:100]
-    node _T_693 = or(_T_688, _T_692) @[el2_ifu_aln_ctl.scala 340:75]
-    io.i0_brp.valid <= _T_693 @[el2_ifu_aln_ctl.scala 340:19]
-    node _T_694 = bits(alignret, 0, 0) @[el2_ifu_aln_ctl.scala 342:39]
-    node _T_695 = and(first2B, _T_694) @[el2_ifu_aln_ctl.scala 342:29]
-    node _T_696 = bits(alignret, 1, 1) @[el2_ifu_aln_ctl.scala 342:65]
-    node _T_697 = and(decompressed.io.rvc, _T_696) @[el2_ifu_aln_ctl.scala 342:55]
-    node _T_698 = or(_T_695, _T_697) @[el2_ifu_aln_ctl.scala 342:44]
-    io.i0_brp.ret <= _T_698 @[el2_ifu_aln_ctl.scala 342:17]
-    node _T_699 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 344:45]
-    node _T_700 = or(first2B, _T_699) @[el2_ifu_aln_ctl.scala 344:33]
-    node _T_701 = bits(_T_700, 0, 0) @[el2_ifu_aln_ctl.scala 344:50]
-    node _T_702 = bits(alignway, 0, 0) @[el2_ifu_aln_ctl.scala 344:66]
-    node _T_703 = bits(alignway, 1, 1) @[el2_ifu_aln_ctl.scala 344:80]
-    node _T_704 = mux(_T_701, _T_702, _T_703) @[el2_ifu_aln_ctl.scala 344:23]
-    io.i0_brp.way <= _T_704 @[el2_ifu_aln_ctl.scala 344:17]
-    node _T_705 = bits(alignhist1, 0, 0) @[el2_ifu_aln_ctl.scala 345:46]
-    node _T_706 = and(first2B, _T_705) @[el2_ifu_aln_ctl.scala 345:34]
-    node _T_707 = bits(alignhist1, 1, 1) @[el2_ifu_aln_ctl.scala 345:74]
-    node _T_708 = and(decompressed.io.rvc, _T_707) @[el2_ifu_aln_ctl.scala 345:62]
-    node _T_709 = or(_T_706, _T_708) @[el2_ifu_aln_ctl.scala 345:51]
-    node _T_710 = bits(alignhist0, 0, 0) @[el2_ifu_aln_ctl.scala 346:26]
-    node _T_711 = and(first2B, _T_710) @[el2_ifu_aln_ctl.scala 346:14]
-    node _T_712 = bits(alignhist0, 1, 1) @[el2_ifu_aln_ctl.scala 346:54]
-    node _T_713 = and(decompressed.io.rvc, _T_712) @[el2_ifu_aln_ctl.scala 346:42]
-    node _T_714 = or(_T_711, _T_713) @[el2_ifu_aln_ctl.scala 346:31]
-    node _T_715 = cat(_T_709, _T_714) @[Cat.scala 29:58]
-    io.i0_brp.hist <= _T_715 @[el2_ifu_aln_ctl.scala 345:18]
-    node _T_716 = and(decompressed.io.rvc, alignfromf1) @[el2_ifu_aln_ctl.scala 348:37]
-    node _T_717 = bits(_T_716, 0, 0) @[el2_ifu_aln_ctl.scala 348:52]
-    node _T_718 = mux(_T_717, f1poffset, f0poffset) @[el2_ifu_aln_ctl.scala 348:27]
-    io.i0_brp.toffset <= _T_718 @[el2_ifu_aln_ctl.scala 348:21]
-    node _T_719 = and(decompressed.io.rvc, alignfromf1) @[el2_ifu_aln_ctl.scala 350:35]
-    node _T_720 = bits(_T_719, 0, 0) @[el2_ifu_aln_ctl.scala 350:50]
-    node _T_721 = mux(_T_720, f1prett, f0prett) @[el2_ifu_aln_ctl.scala 350:25]
-    io.i0_brp.prett <= _T_721 @[el2_ifu_aln_ctl.scala 350:19]
-    node _T_722 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 352:51]
-    node _T_723 = and(decompressed.io.rvc, _T_722) @[el2_ifu_aln_ctl.scala 352:41]
-    node _T_724 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 352:67]
-    node _T_725 = and(_T_723, _T_724) @[el2_ifu_aln_ctl.scala 352:55]
-    io.i0_brp.br_start_error <= _T_725 @[el2_ifu_aln_ctl.scala 352:29]
-    node _T_726 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 354:57]
-    node _T_727 = or(first2B, _T_726) @[el2_ifu_aln_ctl.scala 354:45]
-    node _T_728 = bits(_T_727, 0, 0) @[el2_ifu_aln_ctl.scala 354:62]
-    node _T_729 = bits(f0pc, 1, 1) @[el2_ifu_aln_ctl.scala 354:77]
-    node _T_730 = bits(secondpc, 1, 1) @[el2_ifu_aln_ctl.scala 354:90]
-    node _T_731 = mux(_T_728, _T_729, _T_730) @[el2_ifu_aln_ctl.scala 354:35]
-    io.i0_brp.bank <= _T_731 @[el2_ifu_aln_ctl.scala 354:29]
-    node _T_732 = bits(alignpc4, 0, 0) @[el2_ifu_aln_ctl.scala 356:39]
-    node _T_733 = and(first2B, _T_732) @[el2_ifu_aln_ctl.scala 356:29]
-    node _T_734 = bits(alignpc4, 1, 1) @[el2_ifu_aln_ctl.scala 356:65]
-    node _T_735 = and(decompressed.io.rvc, _T_734) @[el2_ifu_aln_ctl.scala 356:55]
-    node i0_brp_pc4 = or(_T_733, _T_735) @[el2_ifu_aln_ctl.scala 356:44]
-    node _T_736 = and(io.i0_brp.valid, i0_brp_pc4) @[el2_ifu_aln_ctl.scala 358:42]
-    node _T_737 = and(_T_736, first2B) @[el2_ifu_aln_ctl.scala 358:56]
-    node _T_738 = not(i0_brp_pc4) @[el2_ifu_aln_ctl.scala 358:89]
-    node _T_739 = and(io.i0_brp.valid, _T_738) @[el2_ifu_aln_ctl.scala 358:87]
-    node _T_740 = and(_T_739, decompressed.io.rvc) @[el2_ifu_aln_ctl.scala 358:101]
-    node _T_741 = or(_T_737, _T_740) @[el2_ifu_aln_ctl.scala 358:68]
-    io.i0_brp.br_error <= _T_741 @[el2_ifu_aln_ctl.scala 358:22]
-    node _T_742 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 361:50]
-    node _T_743 = or(first2B, _T_742) @[el2_ifu_aln_ctl.scala 361:38]
-    node _T_744 = bits(_T_743, 0, 0) @[el2_ifu_aln_ctl.scala 361:55]
-    node _T_745 = mux(_T_744, firstpc_hash, secondpc_hash) @[el2_ifu_aln_ctl.scala 361:28]
-    io.ifu_i0_bp_index <= _T_745 @[el2_ifu_aln_ctl.scala 361:22]
-    node _T_746 = and(decompressed.io.rvc, alignfromf1) @[el2_ifu_aln_ctl.scala 363:37]
-    node _T_747 = bits(_T_746, 0, 0) @[el2_ifu_aln_ctl.scala 363:52]
-    node _T_748 = mux(_T_747, f1fghr, f0fghr) @[el2_ifu_aln_ctl.scala 363:27]
-    io.ifu_i0_bp_fghr <= _T_748 @[el2_ifu_aln_ctl.scala 363:21]
-    node _T_749 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 365:49]
-    node _T_750 = or(first2B, _T_749) @[el2_ifu_aln_ctl.scala 365:37]
-    node _T_751 = bits(_T_750, 0, 0) @[el2_ifu_aln_ctl.scala 365:54]
-    node _T_752 = mux(_T_751, firstbrtag_hash, secondbrtag_hash) @[el2_ifu_aln_ctl.scala 365:27]
-    io.ifu_i0_bp_btag <= _T_752 @[el2_ifu_aln_ctl.scala 365:21]
-    io.test_out <= f0pc @[el2_ifu_aln_ctl.scala 368:15]
-    node _T_753 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 369:44]
-    reg _T_754 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_753 : @[Reg.scala 28:19]
-      _T_754 <= brdata_in @[Reg.scala 28:23]
-      skip @[Reg.scala 28:19]
-    brdata2 <= _T_754 @[el2_ifu_aln_ctl.scala 369:11]
-    node _T_755 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 370:44]
-    reg _T_756 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_755 : @[Reg.scala 28:19]
-      _T_756 <= brdata_in @[Reg.scala 28:23]
-      skip @[Reg.scala 28:19]
-    brdata1 <= _T_756 @[el2_ifu_aln_ctl.scala 370:11]
-    node _T_757 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 371:44]
-    reg _T_758 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_757 : @[Reg.scala 28:19]
-      _T_758 <= brdata_in @[Reg.scala 28:23]
-      skip @[Reg.scala 28:19]
-    brdata0 <= _T_758 @[el2_ifu_aln_ctl.scala 371:11]
-    node _T_759 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 373:45]
+    node _T_647 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 324:47]
+    node _T_648 = not(_T_647) @[el2_ifu_aln_ctl.scala 324:41]
+    node _T_649 = and(first4B, _T_648) @[el2_ifu_aln_ctl.scala 324:39]
+    node _T_650 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 324:58]
+    node _T_651 = and(_T_649, _T_650) @[el2_ifu_aln_ctl.scala 324:51]
+    node _T_652 = bits(alignicaf, 0, 0) @[el2_ifu_aln_ctl.scala 324:74]
+    node _T_653 = not(_T_652) @[el2_ifu_aln_ctl.scala 324:64]
+    node _T_654 = and(_T_651, _T_653) @[el2_ifu_aln_ctl.scala 324:62]
+    node _T_655 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 324:91]
+    node _T_656 = not(_T_655) @[el2_ifu_aln_ctl.scala 324:80]
+    node _T_657 = and(_T_654, _T_656) @[el2_ifu_aln_ctl.scala 324:78]
+    node _T_658 = bits(_T_657, 0, 0) @[el2_ifu_aln_ctl.scala 324:96]
+    node _T_659 = mux(_T_658, f1ictype, f0ictype) @[el2_ifu_aln_ctl.scala 324:29]
+    io.ifu_i0_icaf_type <= _T_659 @[el2_ifu_aln_ctl.scala 324:23]
+    node _T_660 = bits(alignicaf, 1, 1) @[el2_ifu_aln_ctl.scala 326:27]
+    node _T_661 = bits(aligndbecc, 1, 1) @[el2_ifu_aln_ctl.scala 326:43]
+    node icaf_eff = or(_T_660, _T_661) @[el2_ifu_aln_ctl.scala 326:31]
+    node _T_662 = and(first4B, icaf_eff) @[el2_ifu_aln_ctl.scala 328:32]
+    node _T_663 = and(_T_662, alignfromf1) @[el2_ifu_aln_ctl.scala 328:43]
+    io.ifu_i0_icaf_f1 <= _T_663 @[el2_ifu_aln_ctl.scala 328:21]
+    node _T_664 = bits(first4B, 0, 0) @[el2_ifu_aln_ctl.scala 330:40]
+    node _T_665 = orr(aligndbecc) @[el2_ifu_aln_ctl.scala 330:59]
+    node _T_666 = bits(first2B, 0, 0) @[el2_ifu_aln_ctl.scala 330:72]
+    node _T_667 = bits(aligndbecc, 0, 0) @[el2_ifu_aln_ctl.scala 330:90]
+    node _T_668 = mux(_T_664, _T_665, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_669 = mux(_T_666, _T_667, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_670 = or(_T_668, _T_669) @[Mux.scala 27:72]
+    wire _T_671 : UInt<1> @[Mux.scala 27:72]
+    _T_671 <= _T_670 @[Mux.scala 27:72]
+    io.ifu_i0_dbecc <= _T_671 @[el2_ifu_aln_ctl.scala 330:19]
+    node _T_672 = bits(f0pc, 9, 2) @[el2_lib.scala 182:12]
+    node _T_673 = bits(f0pc, 17, 10) @[el2_lib.scala 182:46]
+    node _T_674 = xor(_T_672, _T_673) @[el2_lib.scala 182:42]
+    node _T_675 = bits(f0pc, 25, 18) @[el2_lib.scala 182:80]
+    node firstpc_hash = xor(_T_674, _T_675) @[el2_lib.scala 182:76]
+    node _T_676 = bits(secondpc, 9, 2) @[el2_lib.scala 182:12]
+    node _T_677 = bits(secondpc, 17, 10) @[el2_lib.scala 182:46]
+    node _T_678 = xor(_T_676, _T_677) @[el2_lib.scala 182:42]
+    node _T_679 = bits(secondpc, 25, 18) @[el2_lib.scala 182:80]
+    node secondpc_hash = xor(_T_678, _T_679) @[el2_lib.scala 182:76]
+    node _T_680 = bits(f0pc, 14, 10) @[el2_lib.scala 175:32]
+    node _T_681 = bits(f0pc, 19, 15) @[el2_lib.scala 175:32]
+    node _T_682 = bits(f0pc, 24, 20) @[el2_lib.scala 175:32]
+    wire _T_683 : UInt<5>[3] @[el2_lib.scala 175:24]
+    _T_683[0] <= _T_680 @[el2_lib.scala 175:24]
+    _T_683[1] <= _T_681 @[el2_lib.scala 175:24]
+    _T_683[2] <= _T_682 @[el2_lib.scala 175:24]
+    node _T_684 = xor(_T_683[0], _T_683[1]) @[el2_lib.scala 175:111]
+    node firstbrtag_hash = xor(_T_684, _T_683[2]) @[el2_lib.scala 175:111]
+    node _T_685 = bits(secondpc, 14, 10) @[el2_lib.scala 175:32]
+    node _T_686 = bits(secondpc, 19, 15) @[el2_lib.scala 175:32]
+    node _T_687 = bits(secondpc, 24, 20) @[el2_lib.scala 175:32]
+    wire _T_688 : UInt<5>[3] @[el2_lib.scala 175:24]
+    _T_688[0] <= _T_685 @[el2_lib.scala 175:24]
+    _T_688[1] <= _T_686 @[el2_lib.scala 175:24]
+    _T_688[2] <= _T_687 @[el2_lib.scala 175:24]
+    node _T_689 = xor(_T_688[0], _T_688[1]) @[el2_lib.scala 175:111]
+    node secondbrtag_hash = xor(_T_689, _T_688[2]) @[el2_lib.scala 175:111]
+    node _T_690 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 340:42]
+    node _T_691 = and(first2B, _T_690) @[el2_ifu_aln_ctl.scala 340:30]
+    node _T_692 = bits(alignbrend, 1, 1) @[el2_ifu_aln_ctl.scala 340:70]
+    node _T_693 = and(first4B, _T_692) @[el2_ifu_aln_ctl.scala 340:58]
+    node _T_694 = or(_T_691, _T_693) @[el2_ifu_aln_ctl.scala 340:47]
+    node _T_695 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 340:96]
+    node _T_696 = and(first4B, _T_695) @[el2_ifu_aln_ctl.scala 340:86]
+    node _T_697 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 340:112]
+    node _T_698 = and(_T_696, _T_697) @[el2_ifu_aln_ctl.scala 340:100]
+    node _T_699 = or(_T_694, _T_698) @[el2_ifu_aln_ctl.scala 340:75]
+    io.i0_brp.valid <= _T_699 @[el2_ifu_aln_ctl.scala 340:19]
+    node _T_700 = bits(alignret, 0, 0) @[el2_ifu_aln_ctl.scala 342:39]
+    node _T_701 = and(first2B, _T_700) @[el2_ifu_aln_ctl.scala 342:29]
+    node _T_702 = bits(alignret, 1, 1) @[el2_ifu_aln_ctl.scala 342:65]
+    node _T_703 = and(first4B, _T_702) @[el2_ifu_aln_ctl.scala 342:55]
+    node _T_704 = or(_T_701, _T_703) @[el2_ifu_aln_ctl.scala 342:44]
+    io.i0_brp.ret <= _T_704 @[el2_ifu_aln_ctl.scala 342:17]
+    node _T_705 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 344:45]
+    node _T_706 = or(first2B, _T_705) @[el2_ifu_aln_ctl.scala 344:33]
+    node _T_707 = bits(_T_706, 0, 0) @[el2_ifu_aln_ctl.scala 344:50]
+    node _T_708 = bits(alignway, 0, 0) @[el2_ifu_aln_ctl.scala 344:66]
+    node _T_709 = bits(alignway, 1, 1) @[el2_ifu_aln_ctl.scala 344:80]
+    node _T_710 = mux(_T_707, _T_708, _T_709) @[el2_ifu_aln_ctl.scala 344:23]
+    io.i0_brp.way <= _T_710 @[el2_ifu_aln_ctl.scala 344:17]
+    node _T_711 = bits(alignhist1, 0, 0) @[el2_ifu_aln_ctl.scala 345:46]
+    node _T_712 = and(first2B, _T_711) @[el2_ifu_aln_ctl.scala 345:34]
+    node _T_713 = bits(alignhist1, 1, 1) @[el2_ifu_aln_ctl.scala 345:74]
+    node _T_714 = and(first4B, _T_713) @[el2_ifu_aln_ctl.scala 345:62]
+    node _T_715 = or(_T_712, _T_714) @[el2_ifu_aln_ctl.scala 345:51]
+    node _T_716 = bits(alignhist0, 0, 0) @[el2_ifu_aln_ctl.scala 346:26]
+    node _T_717 = and(first2B, _T_716) @[el2_ifu_aln_ctl.scala 346:14]
+    node _T_718 = bits(alignhist0, 1, 1) @[el2_ifu_aln_ctl.scala 346:54]
+    node _T_719 = and(first4B, _T_718) @[el2_ifu_aln_ctl.scala 346:42]
+    node _T_720 = or(_T_717, _T_719) @[el2_ifu_aln_ctl.scala 346:31]
+    node _T_721 = cat(_T_715, _T_720) @[Cat.scala 29:58]
+    io.i0_brp.hist <= _T_721 @[el2_ifu_aln_ctl.scala 345:18]
+    node _T_722 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 348:37]
+    node _T_723 = bits(_T_722, 0, 0) @[el2_ifu_aln_ctl.scala 348:52]
+    node _T_724 = mux(_T_723, f1poffset, f0poffset) @[el2_ifu_aln_ctl.scala 348:27]
+    io.i0_brp.toffset <= _T_724 @[el2_ifu_aln_ctl.scala 348:21]
+    node _T_725 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 350:35]
+    node _T_726 = bits(_T_725, 0, 0) @[el2_ifu_aln_ctl.scala 350:50]
+    node _T_727 = mux(_T_726, f1prett, f0prett) @[el2_ifu_aln_ctl.scala 350:25]
+    io.i0_brp.prett <= _T_727 @[el2_ifu_aln_ctl.scala 350:19]
+    node _T_728 = bits(alignval, 1, 1) @[el2_ifu_aln_ctl.scala 352:51]
+    node _T_729 = and(first4B, _T_728) @[el2_ifu_aln_ctl.scala 352:41]
+    node _T_730 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 352:67]
+    node _T_731 = and(_T_729, _T_730) @[el2_ifu_aln_ctl.scala 352:55]
+    io.i0_brp.br_start_error <= _T_731 @[el2_ifu_aln_ctl.scala 352:29]
+    node _T_732 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 354:57]
+    node _T_733 = or(first2B, _T_732) @[el2_ifu_aln_ctl.scala 354:45]
+    node _T_734 = bits(_T_733, 0, 0) @[el2_ifu_aln_ctl.scala 354:62]
+    node _T_735 = bits(f0pc, 1, 1) @[el2_ifu_aln_ctl.scala 354:77]
+    node _T_736 = bits(secondpc, 1, 1) @[el2_ifu_aln_ctl.scala 354:90]
+    node _T_737 = mux(_T_734, _T_735, _T_736) @[el2_ifu_aln_ctl.scala 354:35]
+    io.i0_brp.bank <= _T_737 @[el2_ifu_aln_ctl.scala 354:29]
+    node _T_738 = bits(alignpc4, 0, 0) @[el2_ifu_aln_ctl.scala 356:39]
+    node _T_739 = and(first2B, _T_738) @[el2_ifu_aln_ctl.scala 356:29]
+    node _T_740 = bits(alignpc4, 1, 1) @[el2_ifu_aln_ctl.scala 356:65]
+    node _T_741 = and(first4B, _T_740) @[el2_ifu_aln_ctl.scala 356:55]
+    node i0_brp_pc4 = or(_T_739, _T_741) @[el2_ifu_aln_ctl.scala 356:44]
+    node _T_742 = and(io.i0_brp.valid, i0_brp_pc4) @[el2_ifu_aln_ctl.scala 358:42]
+    node _T_743 = and(_T_742, first2B) @[el2_ifu_aln_ctl.scala 358:56]
+    node _T_744 = not(i0_brp_pc4) @[el2_ifu_aln_ctl.scala 358:89]
+    node _T_745 = and(io.i0_brp.valid, _T_744) @[el2_ifu_aln_ctl.scala 358:87]
+    node _T_746 = and(_T_745, first4B) @[el2_ifu_aln_ctl.scala 358:101]
+    node _T_747 = or(_T_743, _T_746) @[el2_ifu_aln_ctl.scala 358:68]
+    io.i0_brp.br_error <= _T_747 @[el2_ifu_aln_ctl.scala 358:22]
+    node _T_748 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 361:50]
+    node _T_749 = or(first2B, _T_748) @[el2_ifu_aln_ctl.scala 361:38]
+    node _T_750 = bits(_T_749, 0, 0) @[el2_ifu_aln_ctl.scala 361:55]
+    node _T_751 = mux(_T_750, firstpc_hash, secondpc_hash) @[el2_ifu_aln_ctl.scala 361:28]
+    io.ifu_i0_bp_index <= _T_751 @[el2_ifu_aln_ctl.scala 361:22]
+    node _T_752 = and(first4B, alignfromf1) @[el2_ifu_aln_ctl.scala 363:37]
+    node _T_753 = bits(_T_752, 0, 0) @[el2_ifu_aln_ctl.scala 363:52]
+    node _T_754 = mux(_T_753, f1fghr, f0fghr) @[el2_ifu_aln_ctl.scala 363:27]
+    io.ifu_i0_bp_fghr <= _T_754 @[el2_ifu_aln_ctl.scala 363:21]
+    node _T_755 = bits(alignbrend, 0, 0) @[el2_ifu_aln_ctl.scala 365:49]
+    node _T_756 = or(first2B, _T_755) @[el2_ifu_aln_ctl.scala 365:37]
+    node _T_757 = bits(_T_756, 0, 0) @[el2_ifu_aln_ctl.scala 365:54]
+    node _T_758 = mux(_T_757, firstbrtag_hash, secondbrtag_hash) @[el2_ifu_aln_ctl.scala 365:27]
+    io.ifu_i0_bp_btag <= _T_758 @[el2_ifu_aln_ctl.scala 365:21]
+    node _T_759 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 367:44]
     reg _T_760 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
     when _T_759 : @[Reg.scala 28:19]
-      _T_760 <= misc_data_in @[Reg.scala 28:23]
+      _T_760 <= brdata_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    misc2 <= _T_760 @[el2_ifu_aln_ctl.scala 373:9]
-    node _T_761 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 374:45]
+    brdata2 <= _T_760 @[el2_ifu_aln_ctl.scala 367:11]
+    node _T_761 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 368:44]
     reg _T_762 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
     when _T_761 : @[Reg.scala 28:19]
-      _T_762 <= misc_data_in @[Reg.scala 28:23]
+      _T_762 <= brdata_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    misc1 <= _T_762 @[el2_ifu_aln_ctl.scala 374:9]
-    node _T_763 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 375:45]
+    brdata1 <= _T_762 @[el2_ifu_aln_ctl.scala 368:11]
+    node _T_763 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 369:44]
     reg _T_764 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
     when _T_763 : @[Reg.scala 28:19]
-      _T_764 <= misc_data_in @[Reg.scala 28:23]
+      _T_764 <= brdata_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    misc0 <= _T_764 @[el2_ifu_aln_ctl.scala 375:9]
-    node _T_765 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 377:49]
+    brdata0 <= _T_764 @[el2_ifu_aln_ctl.scala 369:11]
+    node _T_765 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 371:45]
     reg _T_766 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
     when _T_765 : @[Reg.scala 28:19]
-      _T_766 <= io.ifu_fetch_data_f @[Reg.scala 28:23]
+      _T_766 <= misc_data_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    q2 <= _T_766 @[el2_ifu_aln_ctl.scala 377:6]
-    node _T_767 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 378:49]
+    misc2 <= _T_766 @[el2_ifu_aln_ctl.scala 371:9]
+    node _T_767 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 372:45]
     reg _T_768 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
     when _T_767 : @[Reg.scala 28:19]
-      _T_768 <= io.ifu_fetch_data_f @[Reg.scala 28:23]
+      _T_768 <= misc_data_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    q1 <= _T_768 @[el2_ifu_aln_ctl.scala 378:6]
-    node _T_769 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 379:49]
+    misc1 <= _T_768 @[el2_ifu_aln_ctl.scala 372:9]
+    node _T_769 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 373:45]
     reg _T_770 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
     when _T_769 : @[Reg.scala 28:19]
-      _T_770 <= io.ifu_fetch_data_f @[Reg.scala 28:23]
+      _T_770 <= misc_data_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    q0 <= _T_770 @[el2_ifu_aln_ctl.scala 379:6]
-    node _T_771 = bits(f2_wr_en, 0, 0) @[el2_ifu_aln_ctl.scala 381:52]
+    misc0 <= _T_770 @[el2_ifu_aln_ctl.scala 373:9]
+    node _T_771 = bits(qwen, 2, 2) @[el2_ifu_aln_ctl.scala 375:49]
     reg _T_772 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
     when _T_771 : @[Reg.scala 28:19]
-      _T_772 <= io.ifu_fetch_pc @[Reg.scala 28:23]
+      _T_772 <= io.ifu_fetch_data_f @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    f2pc <= _T_772 @[el2_ifu_aln_ctl.scala 381:8]
-    node _T_773 = bits(f1_shift_wr_en, 0, 0) @[el2_ifu_aln_ctl.scala 382:50]
+    q2 <= _T_772 @[el2_ifu_aln_ctl.scala 375:6]
+    node _T_773 = bits(qwen, 1, 1) @[el2_ifu_aln_ctl.scala 376:49]
     reg _T_774 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
     when _T_773 : @[Reg.scala 28:19]
-      _T_774 <= f1pc_in @[Reg.scala 28:23]
+      _T_774 <= io.ifu_fetch_data_f @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    f2pc <= _T_774 @[el2_ifu_aln_ctl.scala 382:8]
-    node _T_775 = bits(f0_shift_wr_en, 0, 0) @[el2_ifu_aln_ctl.scala 383:50]
+    q1 <= _T_774 @[el2_ifu_aln_ctl.scala 376:6]
+    node _T_775 = bits(qwen, 0, 0) @[el2_ifu_aln_ctl.scala 377:49]
     reg _T_776 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
     when _T_775 : @[Reg.scala 28:19]
-      _T_776 <= f0pc_in @[Reg.scala 28:23]
+      _T_776 <= io.ifu_fetch_data_f @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    f2pc <= _T_776 @[el2_ifu_aln_ctl.scala 383:8]
+    q0 <= _T_776 @[el2_ifu_aln_ctl.scala 377:6]
+    node _T_777 = bits(f2_wr_en, 0, 0) @[el2_ifu_aln_ctl.scala 379:52]
+    reg _T_778 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_777 : @[Reg.scala 28:19]
+      _T_778 <= io.ifu_fetch_pc @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    f2pc <= _T_778 @[el2_ifu_aln_ctl.scala 379:8]
+    node _T_779 = bits(f1_shift_wr_en, 0, 0) @[el2_ifu_aln_ctl.scala 380:50]
+    reg _T_780 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_779 : @[Reg.scala 28:19]
+      _T_780 <= f1pc_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    f2pc <= _T_780 @[el2_ifu_aln_ctl.scala 380:8]
+    node _T_781 = bits(f0_shift_wr_en, 0, 0) @[el2_ifu_aln_ctl.scala 381:50]
+    reg _T_782 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_781 : @[Reg.scala 28:19]
+      _T_782 <= f0pc_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    f2pc <= _T_782 @[el2_ifu_aln_ctl.scala 381:8]
     
diff --git a/el2_ifu_aln_ctl.v b/el2_ifu_aln_ctl.v
index 1fca6ca4..9aedf7e8 100644
--- a/el2_ifu_aln_ctl.v
+++ b/el2_ifu_aln_ctl.v
@@ -1,281 +1,3 @@
-module el2_ifu_compress(
-  input  [31:0] io_in,
-  output [31:0] io_out_bits,
-  output [4:0]  io_out_rd,
-  output [4:0]  io_out_rs1,
-  output [4:0]  io_out_rs2,
-  output [4:0]  io_out_rs3,
-  output        io_rvc
-);
-  wire  _T_3 = |io_in[12:5]; // @[el2_ifu_compress.scala 49:29]
-  wire [6:0] _T_4 = _T_3 ? 7'h13 : 7'h1f; // @[el2_ifu_compress.scala 49:20]
-  wire [4:0] _T_14 = {2'h1,io_in[4:2]}; // @[Cat.scala 29:58]
-  wire [29:0] _T_18 = {io_in[10:7],io_in[12:11],io_in[5],io_in[6],2'h0,5'h2,3'h0,2'h1,io_in[4:2],_T_4}; // @[Cat.scala 29:58]
-  wire [7:0] _T_28 = {io_in[6:5],io_in[12:10],3'h0}; // @[Cat.scala 29:58]
-  wire [4:0] _T_30 = {2'h1,io_in[9:7]}; // @[Cat.scala 29:58]
-  wire [27:0] _T_36 = {io_in[6:5],io_in[12:10],3'h0,2'h1,io_in[9:7],3'h3,2'h1,io_in[4:2],7'h7}; // @[Cat.scala 29:58]
-  wire [6:0] _T_50 = {io_in[5],io_in[12:10],io_in[6],2'h0}; // @[Cat.scala 29:58]
-  wire [26:0] _T_58 = {io_in[5],io_in[12:10],io_in[6],2'h0,2'h1,io_in[9:7],3'h2,2'h1,io_in[4:2],7'h3}; // @[Cat.scala 29:58]
-  wire [26:0] _T_80 = {io_in[5],io_in[12:10],io_in[6],2'h0,2'h1,io_in[9:7],3'h2,2'h1,io_in[4:2],7'h7}; // @[Cat.scala 29:58]
-  wire [26:0] _T_111 = {_T_50[6:5],2'h1,io_in[4:2],2'h1,io_in[9:7],3'h2,_T_50[4:0],7'h3f}; // @[Cat.scala 29:58]
-  wire [27:0] _T_138 = {_T_28[7:5],2'h1,io_in[4:2],2'h1,io_in[9:7],3'h3,_T_28[4:0],7'h27}; // @[Cat.scala 29:58]
-  wire [26:0] _T_169 = {_T_50[6:5],2'h1,io_in[4:2],2'h1,io_in[9:7],3'h2,_T_50[4:0],7'h23}; // @[Cat.scala 29:58]
-  wire [26:0] _T_200 = {_T_50[6:5],2'h1,io_in[4:2],2'h1,io_in[9:7],3'h2,_T_50[4:0],7'h27}; // @[Cat.scala 29:58]
-  wire [6:0] _T_211 = io_in[12] ? 7'h7f : 7'h0; // @[Bitwise.scala 72:12]
-  wire [11:0] _T_213 = {_T_211,io_in[6:2]}; // @[Cat.scala 29:58]
-  wire [31:0] _T_219 = {_T_211,io_in[6:2],io_in[11:7],3'h0,io_in[11:7],7'h13}; // @[Cat.scala 29:58]
-  wire [9:0] _T_228 = io_in[12] ? 10'h3ff : 10'h0; // @[Bitwise.scala 72:12]
-  wire [20:0] _T_243 = {_T_228,io_in[8],io_in[10:9],io_in[6],io_in[7],io_in[2],io_in[11],io_in[5:3],1'h0}; // @[Cat.scala 29:58]
-  wire [31:0] _T_306 = {_T_243[20],_T_243[10:1],_T_243[11],_T_243[19:12],5'h1,7'h6f}; // @[Cat.scala 29:58]
-  wire [31:0] _T_321 = {_T_211,io_in[6:2],5'h0,3'h0,io_in[11:7],7'h13}; // @[Cat.scala 29:58]
-  wire  _T_332 = |_T_213; // @[el2_ifu_compress.scala 86:29]
-  wire [6:0] _T_333 = _T_332 ? 7'h37 : 7'h3f; // @[el2_ifu_compress.scala 86:20]
-  wire [14:0] _T_336 = io_in[12] ? 15'h7fff : 15'h0; // @[Bitwise.scala 72:12]
-  wire [31:0] _T_339 = {_T_336,io_in[6:2],12'h0}; // @[Cat.scala 29:58]
-  wire [31:0] _T_343 = {_T_339[31:12],io_in[11:7],_T_333}; // @[Cat.scala 29:58]
-  wire  _T_351 = io_in[11:7] == 5'h0; // @[el2_ifu_compress.scala 88:14]
-  wire  _T_353 = io_in[11:7] == 5'h2; // @[el2_ifu_compress.scala 88:27]
-  wire  _T_354 = _T_351 | _T_353; // @[el2_ifu_compress.scala 88:21]
-  wire [6:0] _T_361 = _T_332 ? 7'h13 : 7'h1f; // @[el2_ifu_compress.scala 82:20]
-  wire [2:0] _T_364 = io_in[12] ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12]
-  wire [31:0] _T_379 = {_T_364,io_in[4:3],io_in[5],io_in[2],io_in[6],4'h0,io_in[11:7],3'h0,io_in[11:7],_T_361}; // @[Cat.scala 29:58]
-  wire [31:0] _T_386_bits = _T_354 ? _T_379 : _T_343; // @[el2_ifu_compress.scala 88:10]
-  wire [4:0] _T_386_rd = _T_354 ? io_in[11:7] : io_in[11:7]; // @[el2_ifu_compress.scala 88:10]
-  wire [4:0] _T_386_rs2 = _T_354 ? _T_14 : _T_14; // @[el2_ifu_compress.scala 88:10]
-  wire [4:0] _T_386_rs3 = _T_354 ? io_in[31:27] : io_in[31:27]; // @[el2_ifu_compress.scala 88:10]
-  wire [25:0] _T_397 = {io_in[12],io_in[6:2],2'h1,io_in[9:7],3'h5,2'h1,io_in[9:7],7'h13}; // @[Cat.scala 29:58]
-  wire [30:0] _GEN_172 = {{5'd0}, _T_397}; // @[el2_ifu_compress.scala 95:23]
-  wire [30:0] _T_409 = _GEN_172 | 31'h40000000; // @[el2_ifu_compress.scala 95:23]
-  wire [31:0] _T_422 = {_T_211,io_in[6:2],2'h1,io_in[9:7],3'h7,2'h1,io_in[9:7],7'h13}; // @[Cat.scala 29:58]
-  wire [2:0] _T_426 = {io_in[12],io_in[6:5]}; // @[Cat.scala 29:58]
-  wire  _T_428 = io_in[6:5] == 2'h0; // @[el2_ifu_compress.scala 99:30]
-  wire [30:0] _T_429 = _T_428 ? 31'h40000000 : 31'h0; // @[el2_ifu_compress.scala 99:22]
-  wire [6:0] _T_431 = io_in[12] ? 7'h3b : 7'h33; // @[el2_ifu_compress.scala 100:22]
-  wire [2:0] _GEN_1 = 3'h1 == _T_426 ? 3'h4 : 3'h0; // @[Cat.scala 29:58]
-  wire [2:0] _GEN_2 = 3'h2 == _T_426 ? 3'h6 : _GEN_1; // @[Cat.scala 29:58]
-  wire [2:0] _GEN_3 = 3'h3 == _T_426 ? 3'h7 : _GEN_2; // @[Cat.scala 29:58]
-  wire [2:0] _GEN_4 = 3'h4 == _T_426 ? 3'h0 : _GEN_3; // @[Cat.scala 29:58]
-  wire [2:0] _GEN_5 = 3'h5 == _T_426 ? 3'h0 : _GEN_4; // @[Cat.scala 29:58]
-  wire [2:0] _GEN_6 = 3'h6 == _T_426 ? 3'h2 : _GEN_5; // @[Cat.scala 29:58]
-  wire [2:0] _GEN_7 = 3'h7 == _T_426 ? 3'h3 : _GEN_6; // @[Cat.scala 29:58]
-  wire [24:0] _T_441 = {2'h1,io_in[4:2],2'h1,io_in[9:7],_GEN_7,2'h1,io_in[9:7],_T_431}; // @[Cat.scala 29:58]
-  wire [30:0] _GEN_173 = {{6'd0}, _T_441}; // @[el2_ifu_compress.scala 101:43]
-  wire [30:0] _T_442 = _GEN_173 | _T_429; // @[el2_ifu_compress.scala 101:43]
-  wire [31:0] _T_443_0 = {{6'd0}, _T_397}; // @[el2_ifu_compress.scala 103:19 el2_ifu_compress.scala 103:19]
-  wire [31:0] _T_443_1 = {{1'd0}, _T_409}; // @[el2_ifu_compress.scala 103:19 el2_ifu_compress.scala 103:19]
-  wire [31:0] _GEN_9 = 2'h1 == io_in[11:10] ? _T_443_1 : _T_443_0; // @[el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_10 = 2'h2 == io_in[11:10] ? _T_422 : _GEN_9; // @[el2_ifu_compress.scala 18:14]
-  wire [31:0] _T_443_3 = {{1'd0}, _T_442}; // @[el2_ifu_compress.scala 103:19 el2_ifu_compress.scala 103:19]
-  wire [31:0] _GEN_11 = 2'h3 == io_in[11:10] ? _T_443_3 : _GEN_10; // @[el2_ifu_compress.scala 18:14]
-  wire [31:0] _T_533 = {_T_243[20],_T_243[10:1],_T_243[11],_T_243[19:12],5'h0,7'h6f}; // @[Cat.scala 29:58]
-  wire [4:0] _T_542 = io_in[12] ? 5'h1f : 5'h0; // @[Bitwise.scala 72:12]
-  wire [12:0] _T_551 = {_T_542,io_in[6:5],io_in[2],io_in[11:10],io_in[4:3],1'h0}; // @[Cat.scala 29:58]
-  wire [31:0] _T_600 = {_T_551[12],_T_551[10:5],5'h0,2'h1,io_in[9:7],3'h0,_T_551[4:1],_T_551[11],7'h63}; // @[Cat.scala 29:58]
-  wire [31:0] _T_667 = {_T_551[12],_T_551[10:5],5'h0,2'h1,io_in[9:7],3'h1,_T_551[4:1],_T_551[11],7'h63}; // @[Cat.scala 29:58]
-  wire  _T_673 = |io_in[11:7]; // @[el2_ifu_compress.scala 109:27]
-  wire [6:0] _T_674 = _T_673 ? 7'h3 : 7'h1f; // @[el2_ifu_compress.scala 109:23]
-  wire [25:0] _T_683 = {io_in[12],io_in[6:2],io_in[11:7],3'h1,io_in[11:7],7'h13}; // @[Cat.scala 29:58]
-  wire [28:0] _T_699 = {io_in[4:2],io_in[12],io_in[6:5],3'h0,5'h2,3'h3,io_in[11:7],7'h7}; // @[Cat.scala 29:58]
-  wire [27:0] _T_714 = {io_in[3:2],io_in[12],io_in[6:4],2'h0,5'h2,3'h2,io_in[11:7],_T_674}; // @[Cat.scala 29:58]
-  wire [27:0] _T_729 = {io_in[3:2],io_in[12],io_in[6:4],2'h0,5'h2,3'h2,io_in[11:7],7'h7}; // @[Cat.scala 29:58]
-  wire [24:0] _T_739 = {io_in[6:2],5'h0,3'h0,io_in[11:7],7'h33}; // @[Cat.scala 29:58]
-  wire [24:0] _T_750 = {io_in[6:2],io_in[11:7],3'h0,io_in[11:7],7'h33}; // @[Cat.scala 29:58]
-  wire [24:0] _T_761 = {io_in[6:2],io_in[11:7],3'h0,12'h67}; // @[Cat.scala 29:58]
-  wire [24:0] _T_763 = {_T_761[24:7],7'h1f}; // @[Cat.scala 29:58]
-  wire [24:0] _T_766 = _T_673 ? _T_761 : _T_763; // @[el2_ifu_compress.scala 130:33]
-  wire  _T_772 = |io_in[6:2]; // @[el2_ifu_compress.scala 131:27]
-  wire [31:0] _T_743_bits = {{7'd0}, _T_739}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _T_770_bits = {{7'd0}, _T_766}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _T_773_bits = _T_772 ? _T_743_bits : _T_770_bits; // @[el2_ifu_compress.scala 131:22]
-  wire [4:0] _T_773_rd = _T_772 ? io_in[11:7] : 5'h0; // @[el2_ifu_compress.scala 131:22]
-  wire [4:0] _T_773_rs1 = _T_772 ? 5'h0 : io_in[11:7]; // @[el2_ifu_compress.scala 131:22]
-  wire [4:0] _T_773_rs2 = _T_772 ? io_in[6:2] : io_in[6:2]; // @[el2_ifu_compress.scala 131:22]
-  wire [4:0] _T_773_rs3 = _T_772 ? io_in[31:27] : io_in[31:27]; // @[el2_ifu_compress.scala 131:22]
-  wire [24:0] _T_779 = {io_in[6:2],io_in[11:7],3'h0,12'he7}; // @[Cat.scala 29:58]
-  wire [24:0] _T_781 = {_T_761[24:7],7'h73}; // @[Cat.scala 29:58]
-  wire [24:0] _T_782 = _T_781 | 25'h100000; // @[el2_ifu_compress.scala 133:46]
-  wire [24:0] _T_785 = _T_673 ? _T_779 : _T_782; // @[el2_ifu_compress.scala 134:33]
-  wire [31:0] _T_755_bits = {{7'd0}, _T_750}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _T_789_bits = {{7'd0}, _T_785}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _T_792_bits = _T_772 ? _T_755_bits : _T_789_bits; // @[el2_ifu_compress.scala 135:25]
-  wire [4:0] _T_792_rd = _T_772 ? io_in[11:7] : 5'h1; // @[el2_ifu_compress.scala 135:25]
-  wire [4:0] _T_792_rs1 = _T_772 ? io_in[11:7] : io_in[11:7]; // @[el2_ifu_compress.scala 135:25]
-  wire [31:0] _T_794_bits = io_in[12] ? _T_792_bits : _T_773_bits; // @[el2_ifu_compress.scala 136:10]
-  wire [4:0] _T_794_rd = io_in[12] ? _T_792_rd : _T_773_rd; // @[el2_ifu_compress.scala 136:10]
-  wire [4:0] _T_794_rs1 = io_in[12] ? _T_792_rs1 : _T_773_rs1; // @[el2_ifu_compress.scala 136:10]
-  wire [4:0] _T_794_rs2 = io_in[12] ? _T_773_rs2 : _T_773_rs2; // @[el2_ifu_compress.scala 136:10]
-  wire [4:0] _T_794_rs3 = io_in[12] ? _T_773_rs3 : _T_773_rs3; // @[el2_ifu_compress.scala 136:10]
-  wire [8:0] _T_798 = {io_in[9:7],io_in[12:10],3'h0}; // @[Cat.scala 29:58]
-  wire [28:0] _T_810 = {_T_798[8:5],io_in[6:2],5'h2,3'h3,_T_798[4:0],7'h27}; // @[Cat.scala 29:58]
-  wire [7:0] _T_818 = {io_in[8:7],io_in[12:9],2'h0}; // @[Cat.scala 29:58]
-  wire [27:0] _T_830 = {_T_818[7:5],io_in[6:2],5'h2,3'h2,_T_818[4:0],7'h23}; // @[Cat.scala 29:58]
-  wire [27:0] _T_850 = {_T_818[7:5],io_in[6:2],5'h2,3'h2,_T_818[4:0],7'h27}; // @[Cat.scala 29:58]
-  wire [4:0] _T_898 = {io_in[1:0],io_in[15:13]}; // @[Cat.scala 29:58]
-  wire [31:0] _T_24_bits = {{2'd0}, _T_18}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _T_44_bits = {{4'd0}, _T_36}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_17 = 5'h1 == _T_898 ? _T_44_bits : _T_24_bits; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_18 = 5'h1 == _T_898 ? _T_14 : _T_14; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_19 = 5'h1 == _T_898 ? _T_30 : 5'h2; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_21 = 5'h1 == _T_898 ? io_in[31:27] : io_in[31:27]; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_66_bits = {{5'd0}, _T_58}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_22 = 5'h2 == _T_898 ? _T_66_bits : _GEN_17; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_23 = 5'h2 == _T_898 ? _T_14 : _GEN_18; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_24 = 5'h2 == _T_898 ? _T_30 : _GEN_19; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_26 = 5'h2 == _T_898 ? io_in[31:27] : _GEN_21; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_88_bits = {{5'd0}, _T_80}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_27 = 5'h3 == _T_898 ? _T_88_bits : _GEN_22; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_28 = 5'h3 == _T_898 ? _T_14 : _GEN_23; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_29 = 5'h3 == _T_898 ? _T_30 : _GEN_24; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_31 = 5'h3 == _T_898 ? io_in[31:27] : _GEN_26; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_119_bits = {{5'd0}, _T_111}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_32 = 5'h4 == _T_898 ? _T_119_bits : _GEN_27; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_33 = 5'h4 == _T_898 ? _T_14 : _GEN_28; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_34 = 5'h4 == _T_898 ? _T_30 : _GEN_29; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_36 = 5'h4 == _T_898 ? io_in[31:27] : _GEN_31; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_146_bits = {{4'd0}, _T_138}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_37 = 5'h5 == _T_898 ? _T_146_bits : _GEN_32; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_38 = 5'h5 == _T_898 ? _T_14 : _GEN_33; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_39 = 5'h5 == _T_898 ? _T_30 : _GEN_34; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_41 = 5'h5 == _T_898 ? io_in[31:27] : _GEN_36; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_177_bits = {{5'd0}, _T_169}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_42 = 5'h6 == _T_898 ? _T_177_bits : _GEN_37; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_43 = 5'h6 == _T_898 ? _T_14 : _GEN_38; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_44 = 5'h6 == _T_898 ? _T_30 : _GEN_39; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_46 = 5'h6 == _T_898 ? io_in[31:27] : _GEN_41; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_208_bits = {{5'd0}, _T_200}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_47 = 5'h7 == _T_898 ? _T_208_bits : _GEN_42; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_48 = 5'h7 == _T_898 ? _T_14 : _GEN_43; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_49 = 5'h7 == _T_898 ? _T_30 : _GEN_44; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_51 = 5'h7 == _T_898 ? io_in[31:27] : _GEN_46; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_52 = 5'h8 == _T_898 ? _T_219 : _GEN_47; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_53 = 5'h8 == _T_898 ? io_in[11:7] : _GEN_48; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_54 = 5'h8 == _T_898 ? io_in[11:7] : _GEN_49; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_55 = 5'h8 == _T_898 ? _T_14 : _GEN_48; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_56 = 5'h8 == _T_898 ? io_in[31:27] : _GEN_51; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_57 = 5'h9 == _T_898 ? _T_306 : _GEN_52; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_58 = 5'h9 == _T_898 ? 5'h1 : _GEN_53; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_59 = 5'h9 == _T_898 ? io_in[11:7] : _GEN_54; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_60 = 5'h9 == _T_898 ? _T_14 : _GEN_55; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_61 = 5'h9 == _T_898 ? io_in[31:27] : _GEN_56; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_62 = 5'ha == _T_898 ? _T_321 : _GEN_57; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_63 = 5'ha == _T_898 ? io_in[11:7] : _GEN_58; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_64 = 5'ha == _T_898 ? 5'h0 : _GEN_59; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_65 = 5'ha == _T_898 ? _T_14 : _GEN_60; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_66 = 5'ha == _T_898 ? io_in[31:27] : _GEN_61; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_67 = 5'hb == _T_898 ? _T_386_bits : _GEN_62; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_68 = 5'hb == _T_898 ? _T_386_rd : _GEN_63; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_69 = 5'hb == _T_898 ? _T_386_rd : _GEN_64; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_70 = 5'hb == _T_898 ? _T_386_rs2 : _GEN_65; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_71 = 5'hb == _T_898 ? _T_386_rs3 : _GEN_66; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_72 = 5'hc == _T_898 ? _GEN_11 : _GEN_67; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_73 = 5'hc == _T_898 ? _T_30 : _GEN_68; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_74 = 5'hc == _T_898 ? _T_30 : _GEN_69; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_75 = 5'hc == _T_898 ? _T_14 : _GEN_70; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_76 = 5'hc == _T_898 ? io_in[31:27] : _GEN_71; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_77 = 5'hd == _T_898 ? _T_533 : _GEN_72; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_78 = 5'hd == _T_898 ? 5'h0 : _GEN_73; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_79 = 5'hd == _T_898 ? _T_30 : _GEN_74; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_80 = 5'hd == _T_898 ? _T_14 : _GEN_75; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_81 = 5'hd == _T_898 ? io_in[31:27] : _GEN_76; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_82 = 5'he == _T_898 ? _T_600 : _GEN_77; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_83 = 5'he == _T_898 ? _T_30 : _GEN_78; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_84 = 5'he == _T_898 ? _T_30 : _GEN_79; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_85 = 5'he == _T_898 ? 5'h0 : _GEN_80; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_86 = 5'he == _T_898 ? io_in[31:27] : _GEN_81; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_87 = 5'hf == _T_898 ? _T_667 : _GEN_82; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_88 = 5'hf == _T_898 ? 5'h0 : _GEN_83; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_89 = 5'hf == _T_898 ? _T_30 : _GEN_84; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_90 = 5'hf == _T_898 ? 5'h0 : _GEN_85; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_91 = 5'hf == _T_898 ? io_in[31:27] : _GEN_86; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_688_bits = {{6'd0}, _T_683}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_92 = 5'h10 == _T_898 ? _T_688_bits : _GEN_87; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_93 = 5'h10 == _T_898 ? io_in[11:7] : _GEN_88; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_94 = 5'h10 == _T_898 ? io_in[11:7] : _GEN_89; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_95 = 5'h10 == _T_898 ? io_in[6:2] : _GEN_90; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_96 = 5'h10 == _T_898 ? io_in[31:27] : _GEN_91; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_703_bits = {{3'd0}, _T_699}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_97 = 5'h11 == _T_898 ? _T_703_bits : _GEN_92; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_98 = 5'h11 == _T_898 ? io_in[11:7] : _GEN_93; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_99 = 5'h11 == _T_898 ? 5'h2 : _GEN_94; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_100 = 5'h11 == _T_898 ? io_in[6:2] : _GEN_95; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_101 = 5'h11 == _T_898 ? io_in[31:27] : _GEN_96; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_718_bits = {{4'd0}, _T_714}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_102 = 5'h12 == _T_898 ? _T_718_bits : _GEN_97; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_103 = 5'h12 == _T_898 ? io_in[11:7] : _GEN_98; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_104 = 5'h12 == _T_898 ? 5'h2 : _GEN_99; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_105 = 5'h12 == _T_898 ? io_in[6:2] : _GEN_100; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_106 = 5'h12 == _T_898 ? io_in[31:27] : _GEN_101; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_733_bits = {{4'd0}, _T_729}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_107 = 5'h13 == _T_898 ? _T_733_bits : _GEN_102; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_108 = 5'h13 == _T_898 ? io_in[11:7] : _GEN_103; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_109 = 5'h13 == _T_898 ? 5'h2 : _GEN_104; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_110 = 5'h13 == _T_898 ? io_in[6:2] : _GEN_105; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_111 = 5'h13 == _T_898 ? io_in[31:27] : _GEN_106; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_112 = 5'h14 == _T_898 ? _T_794_bits : _GEN_107; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_113 = 5'h14 == _T_898 ? _T_794_rd : _GEN_108; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_114 = 5'h14 == _T_898 ? _T_794_rs1 : _GEN_109; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_115 = 5'h14 == _T_898 ? _T_794_rs2 : _GEN_110; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_116 = 5'h14 == _T_898 ? _T_794_rs3 : _GEN_111; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_814_bits = {{3'd0}, _T_810}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_117 = 5'h15 == _T_898 ? _T_814_bits : _GEN_112; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_118 = 5'h15 == _T_898 ? io_in[11:7] : _GEN_113; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_119 = 5'h15 == _T_898 ? 5'h2 : _GEN_114; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_120 = 5'h15 == _T_898 ? io_in[6:2] : _GEN_115; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_121 = 5'h15 == _T_898 ? io_in[31:27] : _GEN_116; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_834_bits = {{4'd0}, _T_830}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_122 = 5'h16 == _T_898 ? _T_834_bits : _GEN_117; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_123 = 5'h16 == _T_898 ? io_in[11:7] : _GEN_118; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_124 = 5'h16 == _T_898 ? 5'h2 : _GEN_119; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_125 = 5'h16 == _T_898 ? io_in[6:2] : _GEN_120; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_126 = 5'h16 == _T_898 ? io_in[31:27] : _GEN_121; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _T_854_bits = {{4'd0}, _T_850}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14]
-  wire [31:0] _GEN_127 = 5'h17 == _T_898 ? _T_854_bits : _GEN_122; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_128 = 5'h17 == _T_898 ? io_in[11:7] : _GEN_123; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_129 = 5'h17 == _T_898 ? 5'h2 : _GEN_124; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_130 = 5'h17 == _T_898 ? io_in[6:2] : _GEN_125; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_131 = 5'h17 == _T_898 ? io_in[31:27] : _GEN_126; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_132 = 5'h18 == _T_898 ? io_in : _GEN_127; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_133 = 5'h18 == _T_898 ? io_in[11:7] : _GEN_128; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_134 = 5'h18 == _T_898 ? io_in[19:15] : _GEN_129; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_135 = 5'h18 == _T_898 ? io_in[24:20] : _GEN_130; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_136 = 5'h18 == _T_898 ? io_in[31:27] : _GEN_131; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_137 = 5'h19 == _T_898 ? io_in : _GEN_132; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_138 = 5'h19 == _T_898 ? io_in[11:7] : _GEN_133; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_139 = 5'h19 == _T_898 ? io_in[19:15] : _GEN_134; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_140 = 5'h19 == _T_898 ? io_in[24:20] : _GEN_135; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_141 = 5'h19 == _T_898 ? io_in[31:27] : _GEN_136; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_142 = 5'h1a == _T_898 ? io_in : _GEN_137; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_143 = 5'h1a == _T_898 ? io_in[11:7] : _GEN_138; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_144 = 5'h1a == _T_898 ? io_in[19:15] : _GEN_139; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_145 = 5'h1a == _T_898 ? io_in[24:20] : _GEN_140; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_146 = 5'h1a == _T_898 ? io_in[31:27] : _GEN_141; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_147 = 5'h1b == _T_898 ? io_in : _GEN_142; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_148 = 5'h1b == _T_898 ? io_in[11:7] : _GEN_143; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_149 = 5'h1b == _T_898 ? io_in[19:15] : _GEN_144; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_150 = 5'h1b == _T_898 ? io_in[24:20] : _GEN_145; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_151 = 5'h1b == _T_898 ? io_in[31:27] : _GEN_146; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_152 = 5'h1c == _T_898 ? io_in : _GEN_147; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_153 = 5'h1c == _T_898 ? io_in[11:7] : _GEN_148; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_154 = 5'h1c == _T_898 ? io_in[19:15] : _GEN_149; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_155 = 5'h1c == _T_898 ? io_in[24:20] : _GEN_150; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_156 = 5'h1c == _T_898 ? io_in[31:27] : _GEN_151; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_157 = 5'h1d == _T_898 ? io_in : _GEN_152; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_158 = 5'h1d == _T_898 ? io_in[11:7] : _GEN_153; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_159 = 5'h1d == _T_898 ? io_in[19:15] : _GEN_154; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_160 = 5'h1d == _T_898 ? io_in[24:20] : _GEN_155; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_161 = 5'h1d == _T_898 ? io_in[31:27] : _GEN_156; // @[el2_ifu_compress.scala 195:12]
-  wire [31:0] _GEN_162 = 5'h1e == _T_898 ? io_in : _GEN_157; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_163 = 5'h1e == _T_898 ? io_in[11:7] : _GEN_158; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_164 = 5'h1e == _T_898 ? io_in[19:15] : _GEN_159; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_165 = 5'h1e == _T_898 ? io_in[24:20] : _GEN_160; // @[el2_ifu_compress.scala 195:12]
-  wire [4:0] _GEN_166 = 5'h1e == _T_898 ? io_in[31:27] : _GEN_161; // @[el2_ifu_compress.scala 195:12]
-  assign io_out_bits = 5'h1f == _T_898 ? io_in : _GEN_162; // @[el2_ifu_compress.scala 195:12]
-  assign io_out_rd = 5'h1f == _T_898 ? io_in[11:7] : _GEN_163; // @[el2_ifu_compress.scala 195:12]
-  assign io_out_rs1 = 5'h1f == _T_898 ? io_in[19:15] : _GEN_164; // @[el2_ifu_compress.scala 195:12]
-  assign io_out_rs2 = 5'h1f == _T_898 ? io_in[24:20] : _GEN_165; // @[el2_ifu_compress.scala 195:12]
-  assign io_out_rs3 = 5'h1f == _T_898 ? io_in[31:27] : _GEN_166; // @[el2_ifu_compress.scala 195:12]
-  assign io_rvc = io_in[1:0] != 2'h3; // @[el2_ifu_compress.scala 193:12]
-endmodule
 module el2_ifu_aln_ctl(
   input         clock,
   input         reset,
@@ -303,11 +25,7 @@ module el2_ifu_aln_ctl(
   output [1:0]  io_ifu_i0_icaf_type,
   output        io_ifu_i0_icaf_f1,
   output        io_ifu_i0_dbecc,
-  output [31:0] io_ifu_i0_instr_bits,
-  output [4:0]  io_ifu_i0_instr_rd,
-  output [4:0]  io_ifu_i0_instr_rs1,
-  output [4:0]  io_ifu_i0_instr_rs2,
-  output [4:0]  io_ifu_i0_instr_rs3,
+  output [31:0] io_ifu_i0_instr,
   output [31:0] io_ifu_i0_pc,
   output        io_ifu_i0_pc4,
   output        io_ifu_fb_consume1,
@@ -325,9 +43,7 @@ module el2_ifu_aln_ctl(
   output        io_i0_brp_bank,
   output [31:0] io_i0_brp_prett,
   output        io_i0_brp_way,
-  output        io_i0_brp_ret,
-  output [30:0] io_test_out,
-  input  [31:0] io_test_in
+  output        io_i0_brp_ret
 );
 `ifdef RANDOMIZE_REG_INIT
   reg [31:0] _RAND_0;
@@ -349,85 +65,77 @@ module el2_ifu_aln_ctl(
   reg [31:0] _RAND_16;
   reg [31:0] _RAND_17;
 `endif // RANDOMIZE_REG_INIT
-  wire [31:0] decompressed_io_in; // @[el2_ifu_aln_ctl.scala 100:28]
-  wire [31:0] decompressed_io_out_bits; // @[el2_ifu_aln_ctl.scala 100:28]
-  wire [4:0] decompressed_io_out_rd; // @[el2_ifu_aln_ctl.scala 100:28]
-  wire [4:0] decompressed_io_out_rs1; // @[el2_ifu_aln_ctl.scala 100:28]
-  wire [4:0] decompressed_io_out_rs2; // @[el2_ifu_aln_ctl.scala 100:28]
-  wire [4:0] decompressed_io_out_rs3; // @[el2_ifu_aln_ctl.scala 100:28]
-  wire  decompressed_io_rvc; // @[el2_ifu_aln_ctl.scala 100:28]
-  reg  error_stall; // @[el2_ifu_aln_ctl.scala 90:28]
-  reg [1:0] f0val; // @[el2_ifu_aln_ctl.scala 91:22]
-  wire  _T = error_stall | io_ifu_async_error_start; // @[el2_ifu_aln_ctl.scala 92:34]
-  wire  _T_1 = ~io_exu_flush_final; // @[el2_ifu_aln_ctl.scala 92:64]
-  wire  error_stall_in = _T & _T_1; // @[el2_ifu_aln_ctl.scala 92:62]
-  wire  _T_3 = ~error_stall; // @[el2_ifu_aln_ctl.scala 94:39]
-  wire  i0_shift = io_dec_i0_decode_d & _T_3; // @[el2_ifu_aln_ctl.scala 94:37]
-  wire  _T_7 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 98:58]
-  wire  _T_9 = _T_7 & f0val[0]; // @[el2_ifu_aln_ctl.scala 98:68]
+  reg  error_stall; // @[el2_ifu_aln_ctl.scala 88:28]
+  reg [1:0] f0val; // @[el2_ifu_aln_ctl.scala 89:22]
+  wire  _T = error_stall | io_ifu_async_error_start; // @[el2_ifu_aln_ctl.scala 90:34]
+  wire  _T_1 = ~io_exu_flush_final; // @[el2_ifu_aln_ctl.scala 90:64]
+  wire  error_stall_in = _T & _T_1; // @[el2_ifu_aln_ctl.scala 90:62]
+  wire  _T_3 = ~error_stall; // @[el2_ifu_aln_ctl.scala 92:39]
+  wire  i0_shift = io_dec_i0_decode_d & _T_3; // @[el2_ifu_aln_ctl.scala 92:37]
+  wire  _T_7 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 96:58]
+  wire  _T_9 = _T_7 & f0val[0]; // @[el2_ifu_aln_ctl.scala 96:68]
   reg [1:0] rdptr; // @[el2_ifu_aln_ctl.scala 125:22]
-  wire  _T_248 = rdptr == 2'h0; // @[el2_ifu_aln_ctl.scala 178:32]
+  wire  _T_252 = rdptr == 2'h0; // @[el2_ifu_aln_ctl.scala 178:32]
   reg  q1off; // @[el2_ifu_aln_ctl.scala 132:22]
-  wire  _T_251 = _T_248 & q1off; // @[Mux.scala 27:72]
-  wire  _T_249 = rdptr == 2'h1; // @[el2_ifu_aln_ctl.scala 178:57]
+  wire  _T_255 = _T_252 & q1off; // @[Mux.scala 27:72]
+  wire  _T_253 = rdptr == 2'h1; // @[el2_ifu_aln_ctl.scala 178:57]
   reg  q2off; // @[el2_ifu_aln_ctl.scala 131:22]
-  wire  _T_252 = _T_249 & q2off; // @[Mux.scala 27:72]
-  wire  _T_254 = _T_251 | _T_252; // @[Mux.scala 27:72]
-  wire  _T_250 = rdptr == 2'h2; // @[el2_ifu_aln_ctl.scala 178:83]
+  wire  _T_256 = _T_253 & q2off; // @[Mux.scala 27:72]
+  wire  _T_258 = _T_255 | _T_256; // @[Mux.scala 27:72]
+  wire  _T_254 = rdptr == 2'h2; // @[el2_ifu_aln_ctl.scala 178:83]
   reg  q0off; // @[el2_ifu_aln_ctl.scala 133:22]
-  wire  _T_253 = _T_250 & q0off; // @[Mux.scala 27:72]
-  wire  q1ptr = _T_254 | _T_253; // @[Mux.scala 27:72]
-  wire  _T_257 = ~q1ptr; // @[el2_ifu_aln_ctl.scala 182:26]
-  wire [1:0] q1sel = {q1ptr,_T_257}; // @[Cat.scala 29:58]
-  wire [2:0] qren = {_T_250,_T_249,_T_248}; // @[Cat.scala 29:58]
+  wire  _T_257 = _T_254 & q0off; // @[Mux.scala 27:72]
+  wire  q1ptr = _T_258 | _T_257; // @[Mux.scala 27:72]
+  wire  _T_261 = ~q1ptr; // @[el2_ifu_aln_ctl.scala 182:26]
+  wire [1:0] q1sel = {q1ptr,_T_261}; // @[Cat.scala 29:58]
+  wire [2:0] qren = {_T_254,_T_253,_T_252}; // @[Cat.scala 29:58]
   reg [31:0] q1; // @[Reg.scala 27:20]
   reg [31:0] q0; // @[Reg.scala 27:20]
-  wire [63:0] _T_317 = {q1,q0}; // @[Cat.scala 29:58]
-  wire [63:0] _T_324 = qren[0] ? _T_317 : 64'h0; // @[Mux.scala 27:72]
+  wire [63:0] _T_321 = {q1,q0}; // @[Cat.scala 29:58]
+  wire [63:0] _T_328 = qren[0] ? _T_321 : 64'h0; // @[Mux.scala 27:72]
   reg [31:0] q2; // @[Reg.scala 27:20]
-  wire [63:0] _T_320 = {q2,q1}; // @[Cat.scala 29:58]
-  wire [63:0] _T_325 = qren[1] ? _T_320 : 64'h0; // @[Mux.scala 27:72]
-  wire [63:0] _T_327 = _T_324 | _T_325; // @[Mux.scala 27:72]
-  wire [63:0] _T_323 = {q0,q2}; // @[Cat.scala 29:58]
-  wire [63:0] _T_326 = qren[2] ? _T_323 : 64'h0; // @[Mux.scala 27:72]
-  wire [63:0] qeff = _T_327 | _T_326; // @[Mux.scala 27:72]
+  wire [63:0] _T_324 = {q2,q1}; // @[Cat.scala 29:58]
+  wire [63:0] _T_329 = qren[1] ? _T_324 : 64'h0; // @[Mux.scala 27:72]
+  wire [63:0] _T_331 = _T_328 | _T_329; // @[Mux.scala 27:72]
+  wire [63:0] _T_327 = {q0,q2}; // @[Cat.scala 29:58]
+  wire [63:0] _T_330 = qren[2] ? _T_327 : 64'h0; // @[Mux.scala 27:72]
+  wire [63:0] qeff = _T_331 | _T_330; // @[Mux.scala 27:72]
   wire [31:0] q1eff = qeff[63:32]; // @[el2_ifu_aln_ctl.scala 225:29]
-  wire [15:0] _T_523 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72]
-  wire [15:0] _T_524 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72]
-  wire [15:0] q1final = _T_523 | _T_524; // @[Mux.scala 27:72]
-  wire  _T_243 = _T_248 & q0off; // @[Mux.scala 27:72]
-  wire  _T_244 = _T_249 & q1off; // @[Mux.scala 27:72]
-  wire  _T_246 = _T_243 | _T_244; // @[Mux.scala 27:72]
-  wire  _T_245 = _T_250 & q2off; // @[Mux.scala 27:72]
-  wire  q0ptr = _T_246 | _T_245; // @[Mux.scala 27:72]
-  wire  _T_256 = ~q0ptr; // @[el2_ifu_aln_ctl.scala 180:26]
-  wire [1:0] q0sel = {q0ptr,_T_256}; // @[Cat.scala 29:58]
+  wire [15:0] _T_527 = q1sel[0] ? q1eff[15:0] : 16'h0; // @[Mux.scala 27:72]
+  wire [15:0] _T_528 = q1sel[1] ? q1eff[31:16] : 16'h0; // @[Mux.scala 27:72]
+  wire [15:0] q1final = _T_527 | _T_528; // @[Mux.scala 27:72]
+  wire  _T_247 = _T_252 & q0off; // @[Mux.scala 27:72]
+  wire  _T_248 = _T_253 & q1off; // @[Mux.scala 27:72]
+  wire  _T_250 = _T_247 | _T_248; // @[Mux.scala 27:72]
+  wire  _T_249 = _T_254 & q2off; // @[Mux.scala 27:72]
+  wire  q0ptr = _T_250 | _T_249; // @[Mux.scala 27:72]
+  wire  _T_260 = ~q0ptr; // @[el2_ifu_aln_ctl.scala 180:26]
+  wire [1:0] q0sel = {q0ptr,_T_260}; // @[Cat.scala 29:58]
   wire [31:0] q0eff = qeff[31:0]; // @[el2_ifu_aln_ctl.scala 225:42]
-  wire [31:0] _T_513 = q0sel[0] ? q0eff : 32'h0; // @[Mux.scala 27:72]
-  wire [15:0] _T_514 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
-  wire [31:0] _GEN_12 = {{16'd0}, _T_514}; // @[Mux.scala 27:72]
-  wire [31:0] _T_515 = _T_513 | _GEN_12; // @[Mux.scala 27:72]
-  wire [15:0] q0final = _T_515[15:0]; // @[el2_ifu_aln_ctl.scala 294:11]
+  wire [31:0] _T_517 = q0sel[0] ? q0eff : 32'h0; // @[Mux.scala 27:72]
+  wire [15:0] _T_518 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
+  wire [31:0] _GEN_12 = {{16'd0}, _T_518}; // @[Mux.scala 27:72]
+  wire [31:0] _T_519 = _T_517 | _GEN_12; // @[Mux.scala 27:72]
+  wire [15:0] q0final = _T_519[15:0]; // @[el2_ifu_aln_ctl.scala 294:11]
   wire [31:0] _T_11 = {q1final,q0final}; // @[Cat.scala 29:58]
   wire [15:0] _T_12 = f0val[0] ? q0final : 16'h0; // @[Mux.scala 27:72]
   wire [31:0] _T_13 = _T_9 ? _T_11 : 32'h0; // @[Mux.scala 27:72]
   wire [31:0] _GEN_13 = {{16'd0}, _T_12}; // @[Mux.scala 27:72]
   wire [31:0] aligndata = _GEN_13 | _T_13; // @[Mux.scala 27:72]
-  wire  first2B = ~decompressed_io_rvc; // @[el2_ifu_aln_ctl.scala 112:17]
-  reg [54:0] _T_762; // @[Reg.scala 27:20]
-  wire [53:0] misc1 = _T_762[53:0]; // @[el2_ifu_aln_ctl.scala 374:9]
-  reg [54:0] _T_764; // @[Reg.scala 27:20]
-  wire [53:0] misc0 = _T_764[53:0]; // @[el2_ifu_aln_ctl.scala 375:9]
-  wire [107:0] _T_265 = {misc1,misc0}; // @[Cat.scala 29:58]
-  wire [107:0] _T_272 = qren[0] ? _T_265 : 108'h0; // @[Mux.scala 27:72]
-  reg [54:0] _T_760; // @[Reg.scala 27:20]
-  wire [53:0] misc2 = _T_760[53:0]; // @[el2_ifu_aln_ctl.scala 373:9]
-  wire [107:0] _T_268 = {misc2,misc1}; // @[Cat.scala 29:58]
-  wire [107:0] _T_273 = qren[1] ? _T_268 : 108'h0; // @[Mux.scala 27:72]
-  wire [107:0] _T_275 = _T_272 | _T_273; // @[Mux.scala 27:72]
-  wire [107:0] _T_271 = {misc0,misc2}; // @[Cat.scala 29:58]
-  wire [107:0] _T_274 = qren[2] ? _T_271 : 108'h0; // @[Mux.scala 27:72]
-  wire [107:0] misceff = _T_275 | _T_274; // @[Mux.scala 27:72]
+  reg [54:0] _T_768; // @[Reg.scala 27:20]
+  wire [53:0] misc1 = _T_768[53:0]; // @[el2_ifu_aln_ctl.scala 372:9]
+  reg [54:0] _T_770; // @[Reg.scala 27:20]
+  wire [53:0] misc0 = _T_770[53:0]; // @[el2_ifu_aln_ctl.scala 373:9]
+  wire [107:0] _T_269 = {misc1,misc0}; // @[Cat.scala 29:58]
+  wire [107:0] _T_276 = qren[0] ? _T_269 : 108'h0; // @[Mux.scala 27:72]
+  reg [54:0] _T_766; // @[Reg.scala 27:20]
+  wire [53:0] misc2 = _T_766[53:0]; // @[el2_ifu_aln_ctl.scala 371:9]
+  wire [107:0] _T_272 = {misc2,misc1}; // @[Cat.scala 29:58]
+  wire [107:0] _T_277 = qren[1] ? _T_272 : 108'h0; // @[Mux.scala 27:72]
+  wire [107:0] _T_279 = _T_276 | _T_277; // @[Mux.scala 27:72]
+  wire [107:0] _T_275 = {misc0,misc2}; // @[Cat.scala 29:58]
+  wire [107:0] _T_278 = qren[2] ? _T_275 : 108'h0; // @[Mux.scala 27:72]
+  wire [107:0] misceff = _T_279 | _T_278; // @[Mux.scala 27:72]
   wire [52:0] misc1eff = misceff[107:55]; // @[el2_ifu_aln_ctl.scala 191:25]
   wire  f1icaf = misc1eff[51]; // @[el2_ifu_aln_ctl.scala 195:21]
   wire [54:0] misc0eff = misceff[54:0]; // @[el2_ifu_aln_ctl.scala 192:25]
@@ -437,127 +145,98 @@ module el2_ifu_aln_ctl(
   wire [1:0] _T_25 = _T_9 ? _T_23 : 2'h0; // @[Mux.scala 27:72]
   wire [1:0] _GEN_14 = {{1'd0}, _T_24}; // @[Mux.scala 27:72]
   wire [1:0] alignicaf = _GEN_14 | _T_25; // @[Mux.scala 27:72]
-  wire  _T_27 = |alignicaf; // @[el2_ifu_aln_ctl.scala 115:52]
-  wire  _T_29 = decompressed_io_rvc & _T_27; // @[Mux.scala 27:72]
-  wire  _T_30 = first2B & alignicaf[0]; // @[Mux.scala 27:72]
-  wire [1:0] _T_535 = f0val[1] ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_539 = f0val[1] ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
   reg [1:0] f1val; // @[el2_ifu_aln_ctl.scala 128:22]
-  wire [1:0] _T_534 = {f1val[0],1'h1}; // @[Cat.scala 29:58]
-  wire [1:0] _T_536 = _T_9 ? _T_534 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignval = _T_535 | _T_536; // @[Mux.scala 27:72]
-  wire  _T_35 = decompressed_io_rvc & alignval[1]; // @[Mux.scala 27:72]
-  wire  _T_36 = first2B & alignval[0]; // @[Mux.scala 27:72]
-  wire  shift_2B = i0_shift & first2B; // @[el2_ifu_aln_ctl.scala 119:27]
-  wire  shift_4B = i0_shift & decompressed_io_rvc; // @[el2_ifu_aln_ctl.scala 120:27]
-  wire  _T_43 = ~f0val[0]; // @[el2_ifu_aln_ctl.scala 121:80]
-  wire  _T_45 = _T_43 & f0val[0]; // @[el2_ifu_aln_ctl.scala 121:90]
-  wire  _T_46 = shift_2B & f0val[0]; // @[Mux.scala 27:72]
-  wire  _T_47 = shift_4B & _T_45; // @[Mux.scala 27:72]
-  wire  f0_shift_2B = _T_46 | _T_47; // @[Mux.scala 27:72]
-  wire  _T_52 = f0val[0] & _T_7; // @[el2_ifu_aln_ctl.scala 122:31]
-  wire  f1_shift_2B = _T_52 & shift_4B; // @[el2_ifu_aln_ctl.scala 122:43]
+  wire [1:0] _T_538 = {f1val[0],1'h1}; // @[Cat.scala 29:58]
+  wire [1:0] _T_540 = _T_9 ? _T_538 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignval = _T_539 | _T_540; // @[Mux.scala 27:72]
+  wire  f0_shift_2B = i0_shift & f0val[0]; // @[Mux.scala 27:72]
   reg [1:0] wrptr; // @[el2_ifu_aln_ctl.scala 124:22]
   reg [1:0] f2val; // @[el2_ifu_aln_ctl.scala 127:22]
-  wire  _T_449 = f1_shift_2B & f1val[1]; // @[Mux.scala 27:72]
-  wire  _T_448 = ~f1_shift_2B; // @[el2_ifu_aln_ctl.scala 281:53]
-  wire [1:0] _T_450 = _T_448 ? f1val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _GEN_15 = {{1'd0}, _T_449}; // @[Mux.scala 27:72]
-  wire [1:0] sf1val = _GEN_15 | _T_450; // @[Mux.scala 27:72]
-  wire  sf1_valid = sf1val[0]; // @[el2_ifu_aln_ctl.scala 247:22]
-  wire  _T_54 = ~sf1_valid; // @[el2_ifu_aln_ctl.scala 135:42]
+  wire  _T_58 = ~f1val[0]; // @[el2_ifu_aln_ctl.scala 135:42]
   wire  f2_valid = f2val[0]; // @[el2_ifu_aln_ctl.scala 246:20]
-  wire  _T_56 = ~f2_valid; // @[el2_ifu_aln_ctl.scala 135:55]
+  wire  _T_60 = ~f2_valid; // @[el2_ifu_aln_ctl.scala 135:55]
   wire  ifvalid = io_ifu_fetch_val[0]; // @[el2_ifu_aln_ctl.scala 256:30]
-  wire  _T_61 = _T_54 & f2_valid; // @[el2_ifu_aln_ctl.scala 136:53]
-  wire  _T_62 = _T_61 & ifvalid; // @[el2_ifu_aln_ctl.scala 136:65]
-  wire  _T_66 = sf1_valid & _T_56; // @[el2_ifu_aln_ctl.scala 137:30]
-  wire  _T_67 = _T_66 & ifvalid; // @[el2_ifu_aln_ctl.scala 137:42]
-  wire  fetch_to_f1 = _T_62 | _T_67; // @[el2_ifu_aln_ctl.scala 136:77]
-  wire  _T_76 = sf1_valid & f2_valid; // @[el2_ifu_aln_ctl.scala 139:53]
-  wire  f2_wr_en = _T_76 & ifvalid; // @[el2_ifu_aln_ctl.scala 139:65]
-  wire  _T_90 = wrptr == 2'h2; // @[el2_ifu_aln_ctl.scala 147:24]
-  wire  _T_91 = _T_90 & ifvalid; // @[el2_ifu_aln_ctl.scala 147:32]
-  wire  _T_92 = wrptr == 2'h1; // @[el2_ifu_aln_ctl.scala 147:49]
-  wire  _T_93 = _T_92 & ifvalid; // @[el2_ifu_aln_ctl.scala 147:57]
-  wire  _T_94 = wrptr == 2'h0; // @[el2_ifu_aln_ctl.scala 147:74]
-  wire  _T_95 = _T_94 & ifvalid; // @[el2_ifu_aln_ctl.scala 147:82]
-  wire [2:0] qwen = {_T_91,_T_93,_T_95}; // @[Cat.scala 29:58]
-  wire  _T_149 = qwen[0] & _T_1; // @[el2_ifu_aln_ctl.scala 157:34]
-  wire  _T_153 = qwen[1] & _T_1; // @[el2_ifu_aln_ctl.scala 158:34]
-  wire  _T_159 = ~ifvalid; // @[el2_ifu_aln_ctl.scala 160:26]
-  wire  _T_161 = _T_159 & _T_1; // @[el2_ifu_aln_ctl.scala 160:35]
-  wire [1:0] _T_164 = _T_153 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_166 = _T_161 ? wrptr : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _GEN_18 = {{1'd0}, _T_149}; // @[Mux.scala 27:72]
-  wire [1:0] _T_167 = _GEN_18 | _T_164; // @[Mux.scala 27:72]
-  wire [1:0] wrptr_in = _T_167 | _T_166; // @[Mux.scala 27:72]
-  wire  _T_172 = ~qwen[2]; // @[el2_ifu_aln_ctl.scala 162:26]
-  wire  _T_174 = _T_172 & _T_250; // @[el2_ifu_aln_ctl.scala 162:35]
-  wire  _T_176 = q2off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 162:74]
-  wire  _T_180 = _T_172 & _T_249; // @[el2_ifu_aln_ctl.scala 163:35]
-  wire  _T_182 = q2off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 163:74]
-  wire  _T_186 = _T_172 & _T_248; // @[el2_ifu_aln_ctl.scala 164:35]
-  wire  _T_188 = _T_174 & _T_176; // @[Mux.scala 27:72]
-  wire  _T_189 = _T_180 & _T_182; // @[Mux.scala 27:72]
-  wire  _T_190 = _T_186 & q2off; // @[Mux.scala 27:72]
-  wire  _T_191 = _T_188 | _T_189; // @[Mux.scala 27:72]
-  wire  q2off_in = _T_191 | _T_190; // @[Mux.scala 27:72]
-  wire  _T_195 = ~qwen[1]; // @[el2_ifu_aln_ctl.scala 166:26]
-  wire  _T_197 = _T_195 & _T_249; // @[el2_ifu_aln_ctl.scala 166:35]
-  wire  _T_199 = q1off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 166:74]
-  wire  _T_203 = _T_195 & _T_248; // @[el2_ifu_aln_ctl.scala 167:35]
-  wire  _T_205 = q1off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 167:74]
-  wire  _T_209 = _T_195 & _T_250; // @[el2_ifu_aln_ctl.scala 168:35]
-  wire  _T_211 = _T_197 & _T_199; // @[Mux.scala 27:72]
-  wire  _T_212 = _T_203 & _T_205; // @[Mux.scala 27:72]
-  wire  _T_213 = _T_209 & q1off; // @[Mux.scala 27:72]
-  wire  _T_214 = _T_211 | _T_212; // @[Mux.scala 27:72]
-  wire  q1off_in = _T_214 | _T_213; // @[Mux.scala 27:72]
-  wire  _T_218 = ~qwen[0]; // @[el2_ifu_aln_ctl.scala 170:26]
-  wire  _T_220 = _T_218 & _T_248; // @[el2_ifu_aln_ctl.scala 170:35]
-  wire  _T_222 = q0off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 170:76]
-  wire  _T_226 = _T_218 & _T_250; // @[el2_ifu_aln_ctl.scala 171:35]
-  wire  _T_228 = q0off | f1_shift_2B; // @[el2_ifu_aln_ctl.scala 171:76]
-  wire  _T_232 = _T_218 & _T_249; // @[el2_ifu_aln_ctl.scala 172:35]
-  wire  _T_234 = _T_220 & _T_222; // @[Mux.scala 27:72]
-  wire  _T_235 = _T_226 & _T_228; // @[Mux.scala 27:72]
-  wire  _T_236 = _T_232 & q0off; // @[Mux.scala 27:72]
-  wire  _T_237 = _T_234 | _T_235; // @[Mux.scala 27:72]
-  wire  q0off_in = _T_237 | _T_236; // @[Mux.scala 27:72]
+  wire  _T_65 = _T_58 & f2_valid; // @[el2_ifu_aln_ctl.scala 136:53]
+  wire  _T_66 = _T_65 & ifvalid; // @[el2_ifu_aln_ctl.scala 136:65]
+  wire  _T_70 = f1val[0] & _T_60; // @[el2_ifu_aln_ctl.scala 137:30]
+  wire  _T_71 = _T_70 & ifvalid; // @[el2_ifu_aln_ctl.scala 137:42]
+  wire  fetch_to_f1 = _T_66 | _T_71; // @[el2_ifu_aln_ctl.scala 136:77]
+  wire  _T_80 = f1val[0] & f2_valid; // @[el2_ifu_aln_ctl.scala 139:53]
+  wire  f2_wr_en = _T_80 & ifvalid; // @[el2_ifu_aln_ctl.scala 139:65]
+  wire  _T_94 = wrptr == 2'h2; // @[el2_ifu_aln_ctl.scala 147:24]
+  wire  _T_95 = _T_94 & ifvalid; // @[el2_ifu_aln_ctl.scala 147:32]
+  wire  _T_96 = wrptr == 2'h1; // @[el2_ifu_aln_ctl.scala 147:49]
+  wire  _T_97 = _T_96 & ifvalid; // @[el2_ifu_aln_ctl.scala 147:57]
+  wire  _T_98 = wrptr == 2'h0; // @[el2_ifu_aln_ctl.scala 147:74]
+  wire  _T_99 = _T_98 & ifvalid; // @[el2_ifu_aln_ctl.scala 147:82]
+  wire [2:0] qwen = {_T_95,_T_97,_T_99}; // @[Cat.scala 29:58]
+  wire  _T_153 = qwen[0] & _T_1; // @[el2_ifu_aln_ctl.scala 157:34]
+  wire  _T_157 = qwen[1] & _T_1; // @[el2_ifu_aln_ctl.scala 158:34]
+  wire  _T_163 = ~ifvalid; // @[el2_ifu_aln_ctl.scala 160:26]
+  wire  _T_165 = _T_163 & _T_1; // @[el2_ifu_aln_ctl.scala 160:35]
+  wire [1:0] _T_168 = _T_157 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_170 = _T_165 ? wrptr : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _GEN_17 = {{1'd0}, _T_153}; // @[Mux.scala 27:72]
+  wire [1:0] _T_171 = _GEN_17 | _T_168; // @[Mux.scala 27:72]
+  wire [1:0] wrptr_in = _T_171 | _T_170; // @[Mux.scala 27:72]
+  wire  _T_176 = ~qwen[2]; // @[el2_ifu_aln_ctl.scala 162:26]
+  wire  _T_178 = _T_176 & _T_254; // @[el2_ifu_aln_ctl.scala 162:35]
+  wire  _T_180 = q2off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 162:74]
+  wire  _T_184 = _T_176 & _T_253; // @[el2_ifu_aln_ctl.scala 163:35]
+  wire  _T_190 = _T_176 & _T_252; // @[el2_ifu_aln_ctl.scala 164:35]
+  wire  _T_192 = _T_178 & _T_180; // @[Mux.scala 27:72]
+  wire  _T_193 = _T_184 & q2off; // @[Mux.scala 27:72]
+  wire  _T_194 = _T_190 & q2off; // @[Mux.scala 27:72]
+  wire  _T_195 = _T_192 | _T_193; // @[Mux.scala 27:72]
+  wire  q2off_in = _T_195 | _T_194; // @[Mux.scala 27:72]
+  wire  _T_199 = ~qwen[1]; // @[el2_ifu_aln_ctl.scala 166:26]
+  wire  _T_201 = _T_199 & _T_253; // @[el2_ifu_aln_ctl.scala 166:35]
+  wire  _T_203 = q1off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 166:74]
+  wire  _T_207 = _T_199 & _T_252; // @[el2_ifu_aln_ctl.scala 167:35]
+  wire  _T_213 = _T_199 & _T_254; // @[el2_ifu_aln_ctl.scala 168:35]
+  wire  _T_215 = _T_201 & _T_203; // @[Mux.scala 27:72]
+  wire  _T_216 = _T_207 & q1off; // @[Mux.scala 27:72]
+  wire  _T_217 = _T_213 & q1off; // @[Mux.scala 27:72]
+  wire  _T_218 = _T_215 | _T_216; // @[Mux.scala 27:72]
+  wire  q1off_in = _T_218 | _T_217; // @[Mux.scala 27:72]
+  wire  _T_222 = ~qwen[0]; // @[el2_ifu_aln_ctl.scala 170:26]
+  wire  _T_224 = _T_222 & _T_252; // @[el2_ifu_aln_ctl.scala 170:35]
+  wire  _T_226 = q0off | f0_shift_2B; // @[el2_ifu_aln_ctl.scala 170:76]
+  wire  _T_230 = _T_222 & _T_254; // @[el2_ifu_aln_ctl.scala 171:35]
+  wire  _T_236 = _T_222 & _T_253; // @[el2_ifu_aln_ctl.scala 172:35]
+  wire  _T_238 = _T_224 & _T_226; // @[Mux.scala 27:72]
+  wire  _T_239 = _T_230 & q0off; // @[Mux.scala 27:72]
+  wire  _T_240 = _T_236 & q0off; // @[Mux.scala 27:72]
+  wire  _T_241 = _T_238 | _T_239; // @[Mux.scala 27:72]
+  wire  q0off_in = _T_241 | _T_240; // @[Mux.scala 27:72]
   wire [54:0] misc_data_in = {io_iccm_rd_ecc_double_err,io_ic_access_fault_f,io_ic_access_fault_type_f,io_ifu_bp_btb_target_f[31:1],io_ifu_bp_poffset_f,io_ifu_bp_fghr_f}; // @[Cat.scala 29:58]
   wire  f1dbecc = misc1eff[52]; // @[el2_ifu_aln_ctl.scala 194:25]
-  wire [1:0] f1ictype = misc1eff[50:49]; // @[el2_ifu_aln_ctl.scala 196:26]
-  wire [30:0] f1prett = misc1eff[48:18]; // @[el2_ifu_aln_ctl.scala 197:25]
-  wire [11:0] f1poffset = misc1eff[19:8]; // @[el2_ifu_aln_ctl.scala 198:27]
-  wire [7:0] f1fghr = misc1eff[7:0]; // @[el2_ifu_aln_ctl.scala 199:24]
   wire  f0dbecc = misc0eff[54]; // @[el2_ifu_aln_ctl.scala 201:25]
-  wire [1:0] f0ictype = misc0eff[52:51]; // @[el2_ifu_aln_ctl.scala 203:26]
   wire [30:0] f0prett = misc0eff[50:20]; // @[el2_ifu_aln_ctl.scala 204:25]
-  wire [11:0] f0poffset = misc0eff[19:8]; // @[el2_ifu_aln_ctl.scala 205:27]
-  wire [7:0] f0fghr = misc0eff[7:0]; // @[el2_ifu_aln_ctl.scala 206:24]
-  wire [5:0] _T_295 = {io_ifu_bp_hist1_f[0],io_ifu_bp_hist0_f[0],io_ifu_bp_pc4_f[0],io_ifu_bp_way_f[0],io_ifu_bp_valid_f[0],io_ifu_bp_ret_f[0]}; // @[Cat.scala 29:58]
-  wire [11:0] brdata_in = {io_ifu_bp_hist1_f[1],io_ifu_bp_hist0_f[1],io_ifu_bp_pc4_f[1],io_ifu_bp_way_f[1],io_ifu_bp_valid_f[1],io_ifu_bp_ret_f[1],_T_295}; // @[Cat.scala 29:58]
+  wire [5:0] _T_299 = {io_ifu_bp_hist1_f[0],io_ifu_bp_hist0_f[0],io_ifu_bp_pc4_f[0],io_ifu_bp_way_f[0],io_ifu_bp_valid_f[0],io_ifu_bp_ret_f[0]}; // @[Cat.scala 29:58]
+  wire [11:0] brdata_in = {io_ifu_bp_hist1_f[1],io_ifu_bp_hist0_f[1],io_ifu_bp_pc4_f[1],io_ifu_bp_way_f[1],io_ifu_bp_valid_f[1],io_ifu_bp_ret_f[1],_T_299}; // @[Cat.scala 29:58]
   reg [11:0] brdata1; // @[Reg.scala 27:20]
   reg [11:0] brdata0; // @[Reg.scala 27:20]
-  wire [23:0] _T_303 = {brdata1,brdata0}; // @[Cat.scala 29:58]
+  wire [23:0] _T_307 = {brdata1,brdata0}; // @[Cat.scala 29:58]
   reg [11:0] brdata2; // @[Reg.scala 27:20]
-  wire [23:0] _T_306 = {brdata2,brdata1}; // @[Cat.scala 29:58]
-  wire [23:0] _T_309 = {brdata0,brdata2}; // @[Cat.scala 29:58]
-  wire [23:0] _T_310 = qren[0] ? _T_303 : 24'h0; // @[Mux.scala 27:72]
-  wire [23:0] _T_311 = qren[1] ? _T_306 : 24'h0; // @[Mux.scala 27:72]
-  wire [23:0] _T_312 = qren[2] ? _T_309 : 24'h0; // @[Mux.scala 27:72]
-  wire [23:0] _T_313 = _T_310 | _T_311; // @[Mux.scala 27:72]
-  wire [23:0] brdataeff = _T_313 | _T_312; // @[Mux.scala 27:72]
+  wire [23:0] _T_310 = {brdata2,brdata1}; // @[Cat.scala 29:58]
+  wire [23:0] _T_313 = {brdata0,brdata2}; // @[Cat.scala 29:58]
+  wire [23:0] _T_314 = qren[0] ? _T_307 : 24'h0; // @[Mux.scala 27:72]
+  wire [23:0] _T_315 = qren[1] ? _T_310 : 24'h0; // @[Mux.scala 27:72]
+  wire [23:0] _T_316 = qren[2] ? _T_313 : 24'h0; // @[Mux.scala 27:72]
+  wire [23:0] _T_317 = _T_314 | _T_315; // @[Mux.scala 27:72]
+  wire [23:0] brdataeff = _T_317 | _T_316; // @[Mux.scala 27:72]
   wire [11:0] brdata0eff = brdataeff[11:0]; // @[el2_ifu_aln_ctl.scala 216:43]
   wire [11:0] brdata1eff = brdataeff[23:12]; // @[el2_ifu_aln_ctl.scala 216:61]
-  wire [11:0] _T_334 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72]
-  wire [5:0] _T_335 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72]
-  wire [11:0] _GEN_19 = {{6'd0}, _T_335}; // @[Mux.scala 27:72]
-  wire [11:0] brdata0final = _T_334 | _GEN_19; // @[Mux.scala 27:72]
-  wire [11:0] _T_342 = q1sel[0] ? brdata1eff : 12'h0; // @[Mux.scala 27:72]
-  wire [5:0] _T_343 = q1sel[1] ? brdata1eff[11:6] : 6'h0; // @[Mux.scala 27:72]
-  wire [11:0] _GEN_20 = {{6'd0}, _T_343}; // @[Mux.scala 27:72]
-  wire [11:0] brdata1final = _T_342 | _GEN_20; // @[Mux.scala 27:72]
+  wire [11:0] _T_338 = q0sel[0] ? brdata0eff : 12'h0; // @[Mux.scala 27:72]
+  wire [5:0] _T_339 = q0sel[1] ? brdata0eff[11:6] : 6'h0; // @[Mux.scala 27:72]
+  wire [11:0] _GEN_18 = {{6'd0}, _T_339}; // @[Mux.scala 27:72]
+  wire [11:0] brdata0final = _T_338 | _GEN_18; // @[Mux.scala 27:72]
+  wire [11:0] _T_346 = q1sel[0] ? brdata1eff : 12'h0; // @[Mux.scala 27:72]
+  wire [5:0] _T_347 = q1sel[1] ? brdata1eff[11:6] : 6'h0; // @[Mux.scala 27:72]
+  wire [11:0] _GEN_19 = {{6'd0}, _T_347}; // @[Mux.scala 27:72]
+  wire [11:0] brdata1final = _T_346 | _GEN_19; // @[Mux.scala 27:72]
   wire [1:0] f0ret = {brdata0final[6],brdata0final[0]}; // @[Cat.scala 29:58]
   wire [1:0] f0brend = {brdata0final[7],brdata0final[1]}; // @[Cat.scala 29:58]
   wire [1:0] f0way = {brdata0final[8],brdata0final[2]}; // @[Cat.scala 29:58]
@@ -570,146 +249,90 @@ module el2_ifu_aln_ctl(
   wire [1:0] f1pc4 = {brdata1final[9],brdata1final[3]}; // @[Cat.scala 29:58]
   wire [1:0] f1hist0 = {brdata1final[10],brdata1final[4]}; // @[Cat.scala 29:58]
   wire [1:0] f1hist1 = {brdata1final[11],brdata1final[5]}; // @[Cat.scala 29:58]
-  wire  consume_fb1 = _T_54 & f1val[0]; // @[el2_ifu_aln_ctl.scala 251:32]
-  wire  _T_378 = ~consume_fb1; // @[el2_ifu_aln_ctl.scala 253:39]
-  wire  _T_379 = f0val[0] & _T_378; // @[el2_ifu_aln_ctl.scala 253:37]
-  wire  _T_382 = f0val[0] & consume_fb1; // @[el2_ifu_aln_ctl.scala 254:37]
-  wire  _T_405 = ~fetch_to_f1; // @[el2_ifu_aln_ctl.scala 271:28]
-  wire  _T_406 = ~_T_76; // @[el2_ifu_aln_ctl.scala 271:43]
-  wire  _T_407 = _T_405 & _T_406; // @[el2_ifu_aln_ctl.scala 271:41]
-  wire  _T_418 = ~_T_61; // @[el2_ifu_aln_ctl.scala 276:43]
-  wire  _T_431 = f2_wr_en & _T_1; // @[el2_ifu_aln_ctl.scala 278:38]
-  wire  _T_433 = ~f2_wr_en; // @[el2_ifu_aln_ctl.scala 279:6]
-  wire  _T_435 = _T_433 & _T_406; // @[el2_ifu_aln_ctl.scala 279:19]
-  wire  _T_437 = _T_435 & _T_418; // @[el2_ifu_aln_ctl.scala 279:34]
-  wire  _T_439 = _T_437 & _T_1; // @[el2_ifu_aln_ctl.scala 279:49]
-  wire [1:0] _T_441 = _T_431 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_442 = _T_439 ? f2val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] f2val_in = _T_441 | _T_442; // @[Mux.scala 27:72]
-  wire  _T_454 = fetch_to_f1 & _T_1; // @[el2_ifu_aln_ctl.scala 283:38]
-  wire  _T_457 = _T_76 & _T_1; // @[el2_ifu_aln_ctl.scala 284:38]
-  wire  _T_463 = _T_407 & _T_54; // @[el2_ifu_aln_ctl.scala 285:54]
-  wire  _T_465 = _T_463 & _T_1; // @[el2_ifu_aln_ctl.scala 285:69]
-  wire [1:0] _T_467 = _T_454 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_468 = _T_457 ? f2val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_469 = _T_465 ? sf1val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_470 = _T_467 | _T_468; // @[Mux.scala 27:72]
-  wire [1:0] f1val_in = _T_470 | _T_469; // @[Mux.scala 27:72]
-  wire  _T_475 = ~shift_2B; // @[el2_ifu_aln_ctl.scala 287:52]
-  wire  _T_476 = ~shift_4B; // @[el2_ifu_aln_ctl.scala 287:64]
-  wire  _T_477 = _T_475 & _T_476; // @[el2_ifu_aln_ctl.scala 287:62]
-  wire  _T_479 = shift_2B & f0val[1]; // @[Mux.scala 27:72]
-  wire [1:0] _T_480 = _T_477 ? f0val : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _GEN_26 = {{1'd0}, _T_479}; // @[Mux.scala 27:72]
-  wire [1:0] _T_481 = _GEN_26 | _T_480; // @[Mux.scala 27:72]
-  wire [1:0] _T_542 = f0dbecc ? 2'h3 : 2'h0; // @[Bitwise.scala 72:12]
-  wire [1:0] _T_548 = {f1dbecc,f0dbecc}; // @[Cat.scala 29:58]
-  wire [1:0] _T_549 = f0val[1] ? _T_542 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_550 = _T_9 ? _T_548 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] aligndbecc = _T_549 | _T_550; // @[Mux.scala 27:72]
-  wire [1:0] _T_561 = {f1brend[0],f0brend[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_562 = f0val[1] ? f0brend : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_563 = _T_9 ? _T_561 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignbrend = _T_562 | _T_563; // @[Mux.scala 27:72]
-  wire [1:0] _T_574 = {f1pc4[0],f0pc4[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_575 = f0val[1] ? f0pc4 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_576 = _T_9 ? _T_574 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignpc4 = _T_575 | _T_576; // @[Mux.scala 27:72]
-  wire [1:0] _T_587 = {f1ret[0],f0ret[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_588 = f0val[1] ? f0ret : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_589 = _T_9 ? _T_587 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignret = _T_588 | _T_589; // @[Mux.scala 27:72]
-  wire [1:0] _T_600 = {f1way[0],f0way[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_601 = f0val[1] ? f0way : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_602 = _T_9 ? _T_600 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignway = _T_601 | _T_602; // @[Mux.scala 27:72]
-  wire [1:0] _T_613 = {f1hist1[0],f0hist1[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_614 = f0val[1] ? f0hist1 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_615 = _T_9 ? _T_613 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignhist1 = _T_614 | _T_615; // @[Mux.scala 27:72]
-  wire [1:0] _T_626 = {f1hist0[0],f0hist0[0]}; // @[Cat.scala 29:58]
-  wire [1:0] _T_627 = f0val[1] ? f0hist0 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] _T_628 = _T_9 ? _T_626 : 2'h0; // @[Mux.scala 27:72]
-  wire [1:0] alignhist0 = _T_627 | _T_628; // @[Mux.scala 27:72]
-  wire [30:0] secondpc = f0val[1] ? 31'h1 : 31'h0; // @[Mux.scala 27:72]
-  wire  _T_645 = decompressed_io_rvc & _T_7; // @[el2_ifu_aln_ctl.scala 324:39]
-  wire  _T_647 = _T_645 & f0val[0]; // @[el2_ifu_aln_ctl.scala 324:51]
-  wire  _T_649 = ~alignicaf[0]; // @[el2_ifu_aln_ctl.scala 324:64]
-  wire  _T_650 = _T_647 & _T_649; // @[el2_ifu_aln_ctl.scala 324:62]
-  wire  _T_652 = ~aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 324:80]
-  wire  _T_653 = _T_650 & _T_652; // @[el2_ifu_aln_ctl.scala 324:78]
-  wire  icaf_eff = alignicaf[1] | aligndbecc[1]; // @[el2_ifu_aln_ctl.scala 326:31]
-  wire  _T_658 = decompressed_io_rvc & icaf_eff; // @[el2_ifu_aln_ctl.scala 328:32]
-  wire  _T_660 = |aligndbecc; // @[el2_ifu_aln_ctl.scala 330:52]
-  wire  _T_662 = decompressed_io_rvc & _T_660; // @[Mux.scala 27:72]
-  wire  _T_663 = first2B & aligndbecc[0]; // @[Mux.scala 27:72]
-  wire [7:0] _T_672 = secondpc[9:2] ^ secondpc[17:10]; // @[el2_lib.scala 182:42]
-  wire [7:0] secondpc_hash = _T_672 ^ secondpc[25:18]; // @[el2_lib.scala 182:76]
-  wire [4:0] _T_683 = secondpc[14:10] ^ secondpc[19:15]; // @[el2_lib.scala 175:111]
-  wire [4:0] secondbrtag_hash = _T_683 ^ secondpc[24:20]; // @[el2_lib.scala 175:111]
-  wire  _T_685 = first2B & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 340:30]
-  wire  _T_687 = decompressed_io_rvc & alignbrend[1]; // @[el2_ifu_aln_ctl.scala 340:58]
-  wire  _T_688 = _T_685 | _T_687; // @[el2_ifu_aln_ctl.scala 340:47]
-  wire  _T_692 = _T_35 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 340:100]
-  wire  _T_695 = first2B & alignret[0]; // @[el2_ifu_aln_ctl.scala 342:29]
-  wire  _T_697 = decompressed_io_rvc & alignret[1]; // @[el2_ifu_aln_ctl.scala 342:55]
-  wire  _T_700 = first2B | alignbrend[0]; // @[el2_ifu_aln_ctl.scala 344:33]
-  wire  _T_706 = first2B & alignhist1[0]; // @[el2_ifu_aln_ctl.scala 345:34]
-  wire  _T_708 = decompressed_io_rvc & alignhist1[1]; // @[el2_ifu_aln_ctl.scala 345:62]
-  wire  _T_709 = _T_706 | _T_708; // @[el2_ifu_aln_ctl.scala 345:51]
-  wire  _T_711 = first2B & alignhist0[0]; // @[el2_ifu_aln_ctl.scala 346:14]
-  wire  _T_713 = decompressed_io_rvc & alignhist0[1]; // @[el2_ifu_aln_ctl.scala 346:42]
-  wire  _T_714 = _T_711 | _T_713; // @[el2_ifu_aln_ctl.scala 346:31]
-  wire  _T_716 = decompressed_io_rvc & _T_9; // @[el2_ifu_aln_ctl.scala 348:37]
-  wire [30:0] _T_721 = _T_716 ? f1prett : f0prett; // @[el2_ifu_aln_ctl.scala 350:25]
-  wire  _T_733 = first2B & alignpc4[0]; // @[el2_ifu_aln_ctl.scala 356:29]
-  wire  _T_735 = decompressed_io_rvc & alignpc4[1]; // @[el2_ifu_aln_ctl.scala 356:55]
-  wire  i0_brp_pc4 = _T_733 | _T_735; // @[el2_ifu_aln_ctl.scala 356:44]
-  wire  _T_736 = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 358:42]
-  wire  _T_737 = _T_736 & first2B; // @[el2_ifu_aln_ctl.scala 358:56]
-  wire  _T_738 = ~i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 358:89]
-  wire  _T_739 = io_i0_brp_valid & _T_738; // @[el2_ifu_aln_ctl.scala 358:87]
-  wire  _T_740 = _T_739 & decompressed_io_rvc; // @[el2_ifu_aln_ctl.scala 358:101]
-  wire [7:0] _T_745 = _T_700 ? 8'h0 : secondpc_hash; // @[el2_ifu_aln_ctl.scala 361:28]
-  el2_ifu_compress decompressed ( // @[el2_ifu_aln_ctl.scala 100:28]
-    .io_in(decompressed_io_in),
-    .io_out_bits(decompressed_io_out_bits),
-    .io_out_rd(decompressed_io_out_rd),
-    .io_out_rs1(decompressed_io_out_rs1),
-    .io_out_rs2(decompressed_io_out_rs2),
-    .io_out_rs3(decompressed_io_out_rs3),
-    .io_rvc(decompressed_io_rvc)
-  );
-  assign io_ifu_i0_valid = _T_35 | _T_36; // @[el2_ifu_aln_ctl.scala 116:19]
-  assign io_ifu_i0_icaf = _T_29 | _T_30; // @[el2_ifu_aln_ctl.scala 115:18]
-  assign io_ifu_i0_icaf_type = _T_653 ? f1ictype : f0ictype; // @[el2_ifu_aln_ctl.scala 324:23]
-  assign io_ifu_i0_icaf_f1 = _T_658 & _T_9; // @[el2_ifu_aln_ctl.scala 328:21]
-  assign io_ifu_i0_dbecc = _T_662 | _T_663; // @[el2_ifu_aln_ctl.scala 330:19]
-  assign io_ifu_i0_instr_bits = decompressed_io_out_bits; // @[el2_ifu_aln_ctl.scala 104:23]
-  assign io_ifu_i0_instr_rd = decompressed_io_out_rd; // @[el2_ifu_aln_ctl.scala 104:23]
-  assign io_ifu_i0_instr_rs1 = decompressed_io_out_rs1; // @[el2_ifu_aln_ctl.scala 104:23]
-  assign io_ifu_i0_instr_rs2 = decompressed_io_out_rs2; // @[el2_ifu_aln_ctl.scala 104:23]
-  assign io_ifu_i0_instr_rs3 = decompressed_io_out_rs3; // @[el2_ifu_aln_ctl.scala 104:23]
+  wire  consume_fb1 = _T_58 & f1val[0]; // @[el2_ifu_aln_ctl.scala 251:32]
+  wire  _T_382 = ~consume_fb1; // @[el2_ifu_aln_ctl.scala 253:39]
+  wire  _T_383 = f0val[0] & _T_382; // @[el2_ifu_aln_ctl.scala 253:37]
+  wire  _T_386 = f0val[0] & consume_fb1; // @[el2_ifu_aln_ctl.scala 254:37]
+  wire  _T_409 = ~fetch_to_f1; // @[el2_ifu_aln_ctl.scala 271:28]
+  wire  _T_410 = ~_T_80; // @[el2_ifu_aln_ctl.scala 271:43]
+  wire  _T_411 = _T_409 & _T_410; // @[el2_ifu_aln_ctl.scala 271:41]
+  wire  _T_422 = ~_T_65; // @[el2_ifu_aln_ctl.scala 276:43]
+  wire  _T_435 = f2_wr_en & _T_1; // @[el2_ifu_aln_ctl.scala 278:38]
+  wire  _T_437 = ~f2_wr_en; // @[el2_ifu_aln_ctl.scala 279:6]
+  wire  _T_439 = _T_437 & _T_410; // @[el2_ifu_aln_ctl.scala 279:19]
+  wire  _T_441 = _T_439 & _T_422; // @[el2_ifu_aln_ctl.scala 279:34]
+  wire  _T_443 = _T_441 & _T_1; // @[el2_ifu_aln_ctl.scala 279:49]
+  wire [1:0] _T_445 = _T_435 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_446 = _T_443 ? f2val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] f2val_in = _T_445 | _T_446; // @[Mux.scala 27:72]
+  wire  _T_458 = fetch_to_f1 & _T_1; // @[el2_ifu_aln_ctl.scala 283:38]
+  wire  _T_461 = _T_80 & _T_1; // @[el2_ifu_aln_ctl.scala 284:38]
+  wire  _T_467 = _T_411 & _T_58; // @[el2_ifu_aln_ctl.scala 285:54]
+  wire  _T_469 = _T_467 & _T_1; // @[el2_ifu_aln_ctl.scala 285:69]
+  wire [1:0] _T_471 = _T_458 ? io_ifu_fetch_val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_472 = _T_461 ? f2val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_473 = _T_469 ? f1val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_474 = _T_471 | _T_472; // @[Mux.scala 27:72]
+  wire [1:0] f1val_in = _T_474 | _T_473; // @[Mux.scala 27:72]
+  wire  _T_479 = ~i0_shift; // @[el2_ifu_aln_ctl.scala 287:52]
+  wire  _T_483 = i0_shift & f0val[1]; // @[Mux.scala 27:72]
+  wire [1:0] _T_484 = _T_479 ? f0val : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _GEN_23 = {{1'd0}, _T_483}; // @[Mux.scala 27:72]
+  wire [1:0] _T_485 = _GEN_23 | _T_484; // @[Mux.scala 27:72]
+  wire [1:0] _T_546 = f0dbecc ? 2'h3 : 2'h0; // @[Bitwise.scala 72:12]
+  wire [1:0] _T_552 = {f1dbecc,f0dbecc}; // @[Cat.scala 29:58]
+  wire [1:0] _T_553 = f0val[1] ? _T_546 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_554 = _T_9 ? _T_552 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] aligndbecc = _T_553 | _T_554; // @[Mux.scala 27:72]
+  wire [1:0] _T_565 = {f1brend[0],f0brend[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_566 = f0val[1] ? f0brend : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_567 = _T_9 ? _T_565 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignbrend = _T_566 | _T_567; // @[Mux.scala 27:72]
+  wire [1:0] _T_578 = {f1pc4[0],f0pc4[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_579 = f0val[1] ? f0pc4 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_580 = _T_9 ? _T_578 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignpc4 = _T_579 | _T_580; // @[Mux.scala 27:72]
+  wire [1:0] _T_591 = {f1ret[0],f0ret[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_592 = f0val[1] ? f0ret : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_593 = _T_9 ? _T_591 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignret = _T_592 | _T_593; // @[Mux.scala 27:72]
+  wire [1:0] _T_604 = {f1way[0],f0way[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_605 = f0val[1] ? f0way : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_606 = _T_9 ? _T_604 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignway = _T_605 | _T_606; // @[Mux.scala 27:72]
+  wire [1:0] _T_617 = {f1hist1[0],f0hist1[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_618 = f0val[1] ? f0hist1 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_619 = _T_9 ? _T_617 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignhist1 = _T_618 | _T_619; // @[Mux.scala 27:72]
+  wire [1:0] _T_630 = {f1hist0[0],f0hist0[0]}; // @[Cat.scala 29:58]
+  wire [1:0] _T_631 = f0val[1] ? f0hist0 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_632 = _T_9 ? _T_630 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] alignhist0 = _T_631 | _T_632; // @[Mux.scala 27:72]
+  wire  i0_brp_pc4 = alignpc4[0]; // @[el2_ifu_aln_ctl.scala 356:39]
+  assign io_ifu_i0_valid = alignval[0]; // @[el2_ifu_aln_ctl.scala 116:19]
+  assign io_ifu_i0_icaf = alignicaf[0]; // @[el2_ifu_aln_ctl.scala 115:18]
+  assign io_ifu_i0_icaf_type = misc0eff[52:51]; // @[el2_ifu_aln_ctl.scala 324:23]
+  assign io_ifu_i0_icaf_f1 = 1'h0; // @[el2_ifu_aln_ctl.scala 328:21]
+  assign io_ifu_i0_dbecc = aligndbecc[0]; // @[el2_ifu_aln_ctl.scala 330:19]
+  assign io_ifu_i0_instr = 32'h0; // @[el2_ifu_aln_ctl.scala 104:19]
   assign io_ifu_i0_pc = 32'h0; // @[el2_ifu_aln_ctl.scala 320:16]
-  assign io_ifu_i0_pc4 = decompressed_io_rvc; // @[el2_ifu_aln_ctl.scala 117:17]
-  assign io_ifu_fb_consume1 = _T_379 & _T_1; // @[el2_ifu_aln_ctl.scala 253:22]
-  assign io_ifu_fb_consume2 = _T_382 & _T_1; // @[el2_ifu_aln_ctl.scala 254:22]
-  assign io_ifu_i0_bp_index = _T_745[6:0]; // @[el2_ifu_aln_ctl.scala 361:22]
-  assign io_ifu_i0_bp_fghr = _T_716 ? f1fghr : f0fghr; // @[el2_ifu_aln_ctl.scala 363:21]
-  assign io_ifu_i0_bp_btag = _T_700 ? 5'h0 : secondbrtag_hash; // @[el2_ifu_aln_ctl.scala 365:21]
-  assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_3; // @[el2_ifu_aln_ctl.scala 96:28]
-  assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 108:19]
-  assign io_i0_brp_valid = _T_688 | _T_692; // @[el2_ifu_aln_ctl.scala 340:19]
-  assign io_i0_brp_toffset = _T_716 ? f1poffset : f0poffset; // @[el2_ifu_aln_ctl.scala 348:21]
-  assign io_i0_brp_hist = {_T_709,_T_714}; // @[el2_ifu_aln_ctl.scala 345:18]
-  assign io_i0_brp_br_error = _T_737 | _T_740; // @[el2_ifu_aln_ctl.scala 358:22]
-  assign io_i0_brp_br_start_error = _T_35 & alignbrend[0]; // @[el2_ifu_aln_ctl.scala 352:29]
-  assign io_i0_brp_bank = _T_700 ? 1'h0 : secondpc[1]; // @[el2_ifu_aln_ctl.scala 354:29]
-  assign io_i0_brp_prett = {{1'd0}, _T_721}; // @[el2_ifu_aln_ctl.scala 350:19]
-  assign io_i0_brp_way = _T_700 ? alignway[0] : alignway[1]; // @[el2_ifu_aln_ctl.scala 344:17]
-  assign io_i0_brp_ret = _T_695 | _T_697; // @[el2_ifu_aln_ctl.scala 342:17]
-  assign io_test_out = 31'h0; // @[el2_ifu_aln_ctl.scala 368:15]
-  assign decompressed_io_in = _GEN_13 | _T_13; // @[el2_ifu_aln_ctl.scala 102:22]
+  assign io_ifu_i0_pc4 = 1'h0; // @[el2_ifu_aln_ctl.scala 117:17]
+  assign io_ifu_fb_consume1 = _T_383 & _T_1; // @[el2_ifu_aln_ctl.scala 253:22]
+  assign io_ifu_fb_consume2 = _T_386 & _T_1; // @[el2_ifu_aln_ctl.scala 254:22]
+  assign io_ifu_i0_bp_index = 7'h0; // @[el2_ifu_aln_ctl.scala 361:22]
+  assign io_ifu_i0_bp_fghr = misc0eff[7:0]; // @[el2_ifu_aln_ctl.scala 363:21]
+  assign io_ifu_i0_bp_btag = 5'h0; // @[el2_ifu_aln_ctl.scala 365:21]
+  assign io_ifu_pmu_instr_aligned = io_dec_i0_decode_d & _T_3; // @[el2_ifu_aln_ctl.scala 94:28]
+  assign io_ifu_i0_cinst = aligndata[15:0]; // @[el2_ifu_aln_ctl.scala 107:19]
+  assign io_i0_brp_valid = alignbrend[0]; // @[el2_ifu_aln_ctl.scala 340:19]
+  assign io_i0_brp_toffset = misc0eff[19:8]; // @[el2_ifu_aln_ctl.scala 348:21]
+  assign io_i0_brp_hist = {alignhist1[0],alignhist0[0]}; // @[el2_ifu_aln_ctl.scala 345:18]
+  assign io_i0_brp_br_error = io_i0_brp_valid & i0_brp_pc4; // @[el2_ifu_aln_ctl.scala 358:22]
+  assign io_i0_brp_br_start_error = 1'h0; // @[el2_ifu_aln_ctl.scala 352:29]
+  assign io_i0_brp_bank = 1'h0; // @[el2_ifu_aln_ctl.scala 354:29]
+  assign io_i0_brp_prett = {{1'd0}, f0prett}; // @[el2_ifu_aln_ctl.scala 350:19]
+  assign io_i0_brp_way = alignway[0]; // @[el2_ifu_aln_ctl.scala 344:17]
+  assign io_i0_brp_ret = alignret[0]; // @[el2_ifu_aln_ctl.scala 342:17]
 `ifdef RANDOMIZE_GARBAGE_ASSIGN
 `define RANDOMIZE
 `endif
@@ -764,11 +387,11 @@ initial begin
   _RAND_8 = {1{`RANDOM}};
   q2 = _RAND_8[31:0];
   _RAND_9 = {2{`RANDOM}};
-  _T_762 = _RAND_9[54:0];
+  _T_768 = _RAND_9[54:0];
   _RAND_10 = {2{`RANDOM}};
-  _T_764 = _RAND_10[54:0];
+  _T_770 = _RAND_10[54:0];
   _RAND_11 = {2{`RANDOM}};
-  _T_760 = _RAND_11[54:0];
+  _T_766 = _RAND_11[54:0];
   _RAND_12 = {1{`RANDOM}};
   f1val = _RAND_12[1:0];
   _RAND_13 = {1{`RANDOM}};
@@ -797,7 +420,7 @@ end // initial
     if (reset) begin
       f0val <= 2'h0;
     end else begin
-      f0val <= _T_481;
+      f0val <= _T_485;
     end
     if (reset) begin
       rdptr <= 2'h0;
@@ -835,19 +458,19 @@ end // initial
       q2 <= io_ifu_fetch_data_f;
     end
     if (reset) begin
-      _T_762 <= 55'h0;
+      _T_768 <= 55'h0;
     end else if (qwen[1]) begin
-      _T_762 <= misc_data_in;
+      _T_768 <= misc_data_in;
     end
     if (reset) begin
-      _T_764 <= 55'h0;
+      _T_770 <= 55'h0;
     end else if (qwen[0]) begin
-      _T_764 <= misc_data_in;
+      _T_770 <= misc_data_in;
     end
     if (reset) begin
-      _T_760 <= 55'h0;
+      _T_766 <= 55'h0;
     end else if (qwen[2]) begin
-      _T_760 <= misc_data_in;
+      _T_766 <= misc_data_in;
     end
     if (reset) begin
       f1val <= 2'h0;
diff --git a/src/main/scala/ifu/el2_ifu_aln_ctl.scala b/src/main/scala/ifu/el2_ifu_aln_ctl.scala
index e529652d..0211d404 100644
--- a/src/main/scala/ifu/el2_ifu_aln_ctl.scala
+++ b/src/main/scala/ifu/el2_ifu_aln_ctl.scala
@@ -30,7 +30,7 @@ class el2_ifu_aln_ctl extends Module with el2_lib {
     val ifu_i0_icaf_type = Output(UInt(2.W))
     val ifu_i0_icaf_f1 = Output(Bool())
     val ifu_i0_dbecc = Output(Bool())
-    val ifu_i0_instr = Output(new ExpandedInstruction)
+    val ifu_i0_instr = Output(UInt(32.W))
     val ifu_i0_pc = Output(UInt(32.W))
     val ifu_i0_pc4 = Output(Bool())
     val ifu_fb_consume1 = Output(Bool())
@@ -101,6 +101,7 @@ class el2_ifu_aln_ctl extends Module with el2_lib {
 
   //decompressed.io.out <> io.ifu_i0_instr
 
+  io.ifu_i0_instr := 0.U
 
   // 16-bit compressed instruction from the aligner to the dec for tracer
   io.ifu_i0_cinst := aligndata(15,0)
diff --git a/src/main/scala/ifu/el2_ifu_bp_ctl.scala b/src/main/scala/ifu/el2_ifu_bp_ctl.scala
index 59729156..e5200029 100644
--- a/src/main/scala/ifu/el2_ifu_bp_ctl.scala
+++ b/src/main/scala/ifu/el2_ifu_bp_ctl.scala
@@ -317,8 +317,8 @@ class el2_ifu_bp_ctl extends Module with el2_lib {
 
 }
 
-
+/*
 object ifu_bp extends App {
   println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_bp_ctl()))
-}
+}*/
 
diff --git a/src/main/scala/ifu/el2_ifu_compress_ctl.scala b/src/main/scala/ifu/el2_ifu_compress_ctl.scala
index 4fabc70a..27b4d881 100644
--- a/src/main/scala/ifu/el2_ifu_compress_ctl.scala
+++ b/src/main/scala/ifu/el2_ifu_compress_ctl.scala
@@ -318,8 +318,8 @@ class RVCDecoder(x: UInt, xLen: Int) {
 
 class el2_ifu_compress_ctl( val XLen: Int, val usingCompressed: Boolean) extends Module  {
   val io = IO(new Bundle {
-    val in = Input(UInt(16.W))
-    val out = Output(UInt(32.W))
+    val din = Input(UInt(16.W))
+    val dout = Output(UInt(32.W))
     //val rvc = Output(Bool())
     //val legal = Output(Bool())
     //val waleed_out = Output(UInt(32.W))
@@ -328,10 +328,10 @@ class el2_ifu_compress_ctl( val XLen: Int, val usingCompressed: Boolean) extends
     //val q3_Out = Output(new ExpandedInstruction)
   })
   if (usingCompressed) {
-    val rvc = io.in(1,0) =/= 3.U
-    val inst = new RVCDecoder(Cat(Fill(16,0.U),io.in), XLen)
+    val rvc = io.din(1,0) =/= 3.U
+    val inst = new RVCDecoder(Cat(Fill(16,0.U),io.din), XLen)
     val decoded = inst.decode
-    io.out := Mux(rvc, 0.U, decoded.bits)
+    io.dout := Mux(rvc, 0.U, decoded.bits)
     //io.out.rd := 0.U
     //io.out.rs1 := 0.U
     //io.out.rs2 := 0.U
@@ -360,7 +360,7 @@ class el2_ifu_compress_ctl( val XLen: Int, val usingCompressed: Boolean) extends
     io.waleed_out := Mux(io.legal,io.out.bits,0.U)*/
   } else {
     //io.rvc := false.B
-    io.out := new RVCDecoder(io.in, XLen).passthrough
+    io.dout := new RVCDecoder(io.din, XLen).passthrough
   }
 }*/
 
diff --git a/src/main/scala/ifu/el2_ifu_ifc_ctrl.scala b/src/main/scala/ifu/el2_ifu_ifc_ctrl.scala
index f7f40e67..ca181602 100644
--- a/src/main/scala/ifu/el2_ifu_ifc_ctrl.scala
+++ b/src/main/scala/ifu/el2_ifu_ifc_ctrl.scala
@@ -154,7 +154,7 @@ val io = IO(new Bundle{
 
   io.ifc_fetch_addr_f := RegEnable(io.ifc_fetch_addr_bf, init = 0.U, io.exu_flush_final|io.ifc_fetch_req_f)
 }
-
+/*
 object ifu_ifc extends App {
   println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_ifc_ctrl()))
-}
\ No newline at end of file
+}*/
diff --git a/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl$$anon$1.class b/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl$$anon$1.class
index fb4521a5..4d865d8b 100644
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diff --git a/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class b/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl.class
index 74b6a1a4..9b69d0a0 100644
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diff --git a/target/scala-2.12/classes/ifu/ifu_aln$.class b/target/scala-2.12/classes/ifu/ifu_aln$.class
index cd501d09..10da7d7e 100644
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diff --git a/target/scala-2.12/classes/ifu/ifu_aln$delayedInit$body.class b/target/scala-2.12/classes/ifu/ifu_aln$delayedInit$body.class
index 1481442c..09e1fb3f 100644
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diff --git a/target/scala-2.12/classes/ifu/ifu_bp$.class b/target/scala-2.12/classes/ifu/ifu_bp$.class
deleted file mode 100644
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diff --git a/target/scala-2.12/classes/ifu/ifu_bp$delayedInit$body.class b/target/scala-2.12/classes/ifu/ifu_bp$delayedInit$body.class
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diff --git a/target/scala-2.12/classes/ifu/ifu_ifc$.class b/target/scala-2.12/classes/ifu/ifu_ifc$.class
deleted file mode 100644
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diff --git a/target/scala-2.12/classes/ifu/ifu_ifc$delayedInit$body.class b/target/scala-2.12/classes/ifu/ifu_ifc$delayedInit$body.class
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diff --git a/target/scala-2.12/classes/ifu/ifu_ifc.class b/target/scala-2.12/classes/ifu/ifu_ifc.class
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index 93d20a76..00000000
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