From ab68ee287d15a454bf3582b89620b0c179cc1cb0 Mon Sep 17 00:00:00 2001 From: waleed-lm Date: Thu, 24 Sep 2020 10:58:56 +0500 Subject: [PATCH] Compressed with obj --- el2_ifu_bp_ctl.anno.json | 8 - el2_ifu_bp_ctl.fir | 129 +- el2_ifu_bp_ctl.v | 62 +- el2_ifu_compress.anno.json | 60 + el2_ifu_compress.fir | 1193 +++++++++++++++++ el2_ifu_compress.v | 281 ++++ src/main/scala/ifu/el2_ifu_bp_ctl.scala | 146 +- src/main/scala/ifu/el2_ifu_compress.scala | 4 + .../classes/ifu/el2_ifu_aln_ctl$$anon$1.class | Bin 6928 -> 6660 bytes .../classes/ifu/el2_ifu_aln_ctl.class | Bin 164711 -> 163899 bytes .../classes/ifu/el2_ifu_bp_ctl$$anon$1.class | Bin 1837 -> 5868 bytes .../classes/ifu/el2_ifu_bp_ctl.class | Bin 42754 -> 84549 bytes target/scala-2.12/classes/ifu/ifu_aln$.class | Bin 3875 -> 3875 bytes .../ifu/ifu_aln$delayedInit$body.class | Bin 736 -> 736 bytes target/scala-2.12/classes/ifu/ifu_bp$.class | Bin 0 -> 3867 bytes .../classes/ifu/ifu_bp$delayedInit$body.class | Bin 0 -> 729 bytes target/scala-2.12/classes/ifu/ifu_bp.class | Bin 0 -> 774 bytes .../classes/ifu/ifu_compress$.class | Bin 0 -> 3919 bytes .../ifu/ifu_compress$delayedInit$body.class | Bin 0 -> 767 bytes .../scala-2.12/classes/ifu/ifu_compress.class | Bin 0 -> 808 bytes 20 files changed, 1858 insertions(+), 25 deletions(-) create mode 100644 el2_ifu_compress.anno.json create mode 100644 el2_ifu_compress.fir create mode 100644 el2_ifu_compress.v create mode 100644 target/scala-2.12/classes/ifu/ifu_bp$.class create mode 100644 target/scala-2.12/classes/ifu/ifu_bp$delayedInit$body.class create mode 100644 target/scala-2.12/classes/ifu/ifu_bp.class create mode 100644 target/scala-2.12/classes/ifu/ifu_compress$.class create mode 100644 target/scala-2.12/classes/ifu/ifu_compress$delayedInit$body.class create mode 100644 target/scala-2.12/classes/ifu/ifu_compress.class diff --git a/el2_ifu_bp_ctl.anno.json b/el2_ifu_bp_ctl.anno.json index 600dece6..472ead6c 100644 --- a/el2_ifu_bp_ctl.anno.json +++ b/el2_ifu_bp_ctl.anno.json @@ -1,12 +1,4 @@ [ - { - "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_out", - "sources":[ - "~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_in", - "~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_in2" - ] - }, { "class":"firrtl.EmitCircuitAnnotation", "emitter":"firrtl.VerilogEmitter" diff --git a/el2_ifu_bp_ctl.fir b/el2_ifu_bp_ctl.fir index a2774c2f..e6dccca7 100644 --- a/el2_ifu_bp_ctl.fir +++ b/el2_ifu_bp_ctl.fir @@ -3,10 +3,129 @@ circuit el2_ifu_bp_ctl : module el2_ifu_bp_ctl : input clock : Clock input reset : UInt<1> - output io : {flip in : UInt<32>, flip in2 : UInt<32>, out : UInt} + output io : {flip clk : UInt<1>, flip active_clk : UInt<1>, flip rst_l : UInt<1>, flip ic_hit_f : UInt<1>, flip ifc_fetch_addr_f : UInt<32>, flip ifc_fetch_req_f : UInt<1>, flip dec_tlu_br0_r_pkt : {valid : UInt<1>, hist : UInt<2>, br_error : UInt<1>, br_start_error : UInt<1>, way : UInt<1>, middle : UInt<1>}, flip exu_i0_br_fghr_r : UInt<8>, flip exu_i0_br_index_r : UInt<7>, flip dec_tlu_flush_lower_wb : UInt<1>, flip dec_tlu_flush_leak_one_wb : UInt<1>, flip dec_tlu_bpred_disable : UInt<1>, flip exu_mp_pkt : {misp : UInt<1>, ataken : UInt<1>, boffset : UInt<1>, pc4 : UInt<1>, hist : UInt<2>, toffset : UInt<12>, valid : UInt<1>, br_error : UInt<1>, br_start_error : UInt<1>, prett : UInt<32>, pcall : UInt<1>, pret : UInt<1>, pja : UInt<1>, way : UInt<1>}, flip exu_mp_eghr : UInt<8>, flip exu_mp_fghr : UInt<8>, flip exu_mp_index : UInt<7>, flip exu_mp_btag : UInt<5>, flip exu_flush_final : UInt<1>, ifu_bp_hit_taken_f : UInt<1>, ifu_bp_btb_target_f : UInt<31>, ifu_bp_inst_mask_f : UInt<1>, ifu_bp_fghr_f : UInt<8>, ifu_bp_way_f : UInt<2>, ifu_bp_ret_f : UInt<2>, ifu_bp_hist1_f : UInt<2>, ifu_bp_hist0_f : UInt<2>, ifu_bp_pc4_f : UInt<2>, ifu_bp_valid_f : UInt<2>, ifu_bp_poffset_f : UInt<12>} - node _T = bits(io.in, 9, 2) @[el2_lib.scala 35:30] - node _T_1 = bits(io.in2, 7, 0) @[el2_lib.scala 35:53] - node _T_2 = xor(_T, _T_1) @[el2_lib.scala 35:48] - io.out <= _T_2 @[el2_ifu_bp_ctl.scala 13:10] + io.ifu_bp_hit_taken_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 42:25] + io.ifu_bp_btb_target_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 43:26] + io.ifu_bp_inst_mask_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 44:25] + io.ifu_bp_fghr_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 45:20] + io.ifu_bp_way_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 46:19] + io.ifu_bp_ret_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 47:19] + io.ifu_bp_hist1_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 48:21] + io.ifu_bp_hist0_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 49:21] + io.ifu_bp_pc4_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 50:19] + io.ifu_bp_valid_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 51:21] + io.ifu_bp_poffset_f <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 52:23] + wire leak_one_f : UInt<1> + leak_one_f <= UInt<1>("h00") + node _T = not(leak_one_f) @[el2_ifu_bp_ctl.scala 67:43] + node exu_mp_valid = and(io.exu_mp_pkt.misp, _T) @[el2_ifu_bp_ctl.scala 67:41] + wire fetch_rd_tag_p1_f : UInt<5> + fetch_rd_tag_p1_f <= UInt<1>("h00") + wire fetch_rd_tag_f : UInt<5> + fetch_rd_tag_f <= UInt<1>("h00") + wire bht_dir_f : UInt<2> + bht_dir_f <= UInt<1>("h00") + wire dec_tlu_error_wb : UInt<1> + dec_tlu_error_wb <= UInt<1>("h00") + wire btb_error_addr_wb : UInt<7> + btb_error_addr_wb <= UInt<1>("h00") + wire btb_bank0_rd_data_way0_f : UInt<22> + btb_bank0_rd_data_way0_f <= UInt<1>("h00") + wire btb_bank0_rd_data_way1_f : UInt<22> + btb_bank0_rd_data_way1_f <= UInt<1>("h00") + wire btb_bank0_rd_data_way0_p1_f : UInt<22> + btb_bank0_rd_data_way0_p1_f <= UInt<1>("h00") + wire btb_bank0_rd_data_way1_p1_f : UInt<22> + btb_bank0_rd_data_way1_p1_f <= UInt<1>("h00") + wire dec_tlu_way_wb : UInt<1> + dec_tlu_way_wb <= UInt<1>("h00") + node _T_1 = bits(io.ifc_fetch_addr_f, 9, 2) @[el2_lib.scala 182:12] + node _T_2 = bits(io.ifc_fetch_addr_f, 17, 10) @[el2_lib.scala 182:46] + node _T_3 = xor(_T_1, _T_2) @[el2_lib.scala 182:42] + node _T_4 = bits(io.ifc_fetch_addr_f, 25, 18) @[el2_lib.scala 182:80] + node btb_rd_addr_f = xor(_T_3, _T_4) @[el2_lib.scala 182:76] + node _T_5 = add(io.ifc_fetch_addr_f, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 103:45] + node fetch_addr_p1_f = tail(_T_5, 1) @[el2_ifu_bp_ctl.scala 103:45] + node _T_6 = bits(fetch_addr_p1_f, 9, 2) @[el2_lib.scala 182:12] + node _T_7 = bits(fetch_addr_p1_f, 17, 10) @[el2_lib.scala 182:46] + node _T_8 = xor(_T_6, _T_7) @[el2_lib.scala 182:42] + node _T_9 = bits(fetch_addr_p1_f, 25, 18) @[el2_lib.scala 182:80] + node btb_rd_addr_p1_f = xor(_T_8, _T_9) @[el2_lib.scala 182:76] + node _T_10 = bits(bht_dir_f, 0, 0) @[el2_ifu_bp_ctl.scala 108:33] + node _T_11 = not(_T_10) @[el2_ifu_bp_ctl.scala 108:23] + node _T_12 = bits(bht_dir_f, 0, 0) @[el2_ifu_bp_ctl.scala 108:46] + node btb_sel_f = cat(_T_11, _T_12) @[Cat.scala 29:58] + node _T_13 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 111:46] + node _T_14 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 111:70] + node _T_15 = not(_T_14) @[el2_ifu_bp_ctl.scala 111:50] + node fetch_start_f = cat(_T_13, _T_15) @[Cat.scala 29:58] + node _T_16 = eq(btb_error_addr_wb, btb_rd_addr_f) @[el2_ifu_bp_ctl.scala 114:72] + node branch_error_collision_f = and(dec_tlu_error_wb, _T_16) @[el2_ifu_bp_ctl.scala 114:51] + node _T_17 = eq(btb_error_addr_wb, btb_rd_addr_p1_f) @[el2_ifu_bp_ctl.scala 115:75] + node branch_error_collision_p1_f = and(dec_tlu_error_wb, _T_17) @[el2_ifu_bp_ctl.scala 115:54] + node branch_error_bank_conflict_f = and(branch_error_collision_f, dec_tlu_error_wb) @[el2_ifu_bp_ctl.scala 118:63] + node branch_error_bank_conflict_p1_f = and(branch_error_collision_p1_f, dec_tlu_error_wb) @[el2_ifu_bp_ctl.scala 119:69] + node _T_18 = eq(io.exu_mp_btag, fetch_rd_tag_f) @[el2_ifu_bp_ctl.scala 122:46] + node _T_19 = and(_T_18, exu_mp_valid) @[el2_ifu_bp_ctl.scala 122:66] + node _T_20 = and(_T_19, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 122:81] + node _T_21 = eq(io.exu_mp_index, btb_rd_addr_f) @[el2_ifu_bp_ctl.scala 122:117] + node fetch_mp_collision_f = and(_T_20, _T_21) @[el2_ifu_bp_ctl.scala 122:102] + node _T_22 = eq(io.exu_mp_btag, fetch_rd_tag_p1_f) @[el2_ifu_bp_ctl.scala 123:49] + node _T_23 = and(_T_22, exu_mp_valid) @[el2_ifu_bp_ctl.scala 123:72] + node _T_24 = and(_T_23, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 123:87] + node _T_25 = eq(io.exu_mp_index, btb_rd_addr_p1_f) @[el2_ifu_bp_ctl.scala 123:123] + node fetch_mp_collision_p1_f = and(_T_24, _T_25) @[el2_ifu_bp_ctl.scala 123:108] + reg leak_one_f_d1 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_bp_ctl.scala 125:30] + leak_one_f_d1 <= leak_one_f @[el2_ifu_bp_ctl.scala 125:30] + reg dec_tlu_way_wb_f : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_bp_ctl.scala 126:33] + dec_tlu_way_wb_f <= dec_tlu_way_wb @[el2_ifu_bp_ctl.scala 126:33] + reg exu_mp_way_f : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_bp_ctl.scala 127:29] + exu_mp_way_f <= io.exu_mp_pkt.way @[el2_ifu_bp_ctl.scala 127:29] + reg exu_flush_final_d1 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_bp_ctl.scala 128:35] + exu_flush_final_d1 <= io.exu_flush_final @[el2_ifu_bp_ctl.scala 128:35] + node _T_26 = and(io.dec_tlu_flush_leak_one_wb, io.dec_tlu_flush_lower_wb) @[el2_ifu_bp_ctl.scala 130:47] + node _T_27 = and(leak_one_f_d1, io.dec_tlu_flush_lower_wb) @[el2_ifu_bp_ctl.scala 130:93] + node _T_28 = or(_T_26, _T_27) @[el2_ifu_bp_ctl.scala 130:76] + leak_one_f <= _T_28 @[el2_ifu_bp_ctl.scala 130:14] + node _T_29 = bits(btb_bank0_rd_data_way0_f, 0, 0) @[el2_ifu_bp_ctl.scala 133:50] + node _T_30 = bits(btb_bank0_rd_data_way0_f, 21, 17) @[el2_ifu_bp_ctl.scala 133:82] + node _T_31 = eq(_T_30, fetch_rd_tag_f) @[el2_ifu_bp_ctl.scala 133:97] + node _T_32 = and(_T_29, _T_31) @[el2_ifu_bp_ctl.scala 133:55] + node _T_33 = and(dec_tlu_way_wb_f, branch_error_bank_conflict_f) @[el2_ifu_bp_ctl.scala 134:22] + node _T_34 = not(_T_33) @[el2_ifu_bp_ctl.scala 134:3] + node _T_35 = and(_T_32, _T_34) @[el2_ifu_bp_ctl.scala 133:117] + node _T_36 = and(_T_35, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 134:54] + node _T_37 = not(leak_one_f) @[el2_ifu_bp_ctl.scala 134:77] + node tag_match_way0_f = and(_T_36, _T_37) @[el2_ifu_bp_ctl.scala 134:75] + node _T_38 = bits(btb_bank0_rd_data_way1_f, 0, 0) @[el2_ifu_bp_ctl.scala 136:50] + node _T_39 = bits(btb_bank0_rd_data_way1_f, 21, 17) @[el2_ifu_bp_ctl.scala 136:82] + node _T_40 = eq(_T_39, fetch_rd_tag_f) @[el2_ifu_bp_ctl.scala 136:97] + node _T_41 = and(_T_38, _T_40) @[el2_ifu_bp_ctl.scala 136:55] + node _T_42 = and(dec_tlu_way_wb_f, branch_error_bank_conflict_f) @[el2_ifu_bp_ctl.scala 137:22] + node _T_43 = not(_T_42) @[el2_ifu_bp_ctl.scala 137:3] + node _T_44 = and(_T_41, _T_43) @[el2_ifu_bp_ctl.scala 136:117] + node _T_45 = and(_T_44, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 137:54] + node _T_46 = not(leak_one_f) @[el2_ifu_bp_ctl.scala 137:77] + node tag_match_way1_f = and(_T_45, _T_46) @[el2_ifu_bp_ctl.scala 137:75] + node _T_47 = bits(btb_bank0_rd_data_way0_p1_f, 0, 0) @[el2_ifu_bp_ctl.scala 139:56] + node _T_48 = bits(btb_bank0_rd_data_way0_p1_f, 21, 17) @[el2_ifu_bp_ctl.scala 139:91] + node _T_49 = eq(_T_48, fetch_rd_tag_p1_f) @[el2_ifu_bp_ctl.scala 139:106] + node _T_50 = and(_T_47, _T_49) @[el2_ifu_bp_ctl.scala 139:61] + node _T_51 = and(dec_tlu_way_wb_f, branch_error_bank_conflict_f) @[el2_ifu_bp_ctl.scala 140:24] + node _T_52 = not(_T_51) @[el2_ifu_bp_ctl.scala 140:5] + node _T_53 = and(_T_50, _T_52) @[el2_ifu_bp_ctl.scala 139:129] + node _T_54 = and(_T_53, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 140:56] + node _T_55 = not(leak_one_f) @[el2_ifu_bp_ctl.scala 140:79] + node tag_match_way0_p1_f = and(_T_54, _T_55) @[el2_ifu_bp_ctl.scala 140:77] + node _T_56 = bits(btb_bank0_rd_data_way1_p1_f, 0, 0) @[el2_ifu_bp_ctl.scala 142:56] + node _T_57 = bits(btb_bank0_rd_data_way1_p1_f, 21, 17) @[el2_ifu_bp_ctl.scala 142:91] + node _T_58 = eq(_T_57, fetch_rd_tag_p1_f) @[el2_ifu_bp_ctl.scala 142:106] + node _T_59 = and(_T_56, _T_58) @[el2_ifu_bp_ctl.scala 142:61] + node _T_60 = and(dec_tlu_way_wb_f, branch_error_bank_conflict_f) @[el2_ifu_bp_ctl.scala 143:24] + node _T_61 = not(_T_60) @[el2_ifu_bp_ctl.scala 143:5] + node _T_62 = and(_T_59, _T_61) @[el2_ifu_bp_ctl.scala 142:129] + node _T_63 = and(_T_62, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 143:56] + node _T_64 = not(leak_one_f) @[el2_ifu_bp_ctl.scala 143:79] + node tag_match_way1_p1_f = and(_T_63, _T_64) @[el2_ifu_bp_ctl.scala 143:77] diff --git a/el2_ifu_bp_ctl.v b/el2_ifu_bp_ctl.v index 0e75089f..64cea8e3 100644 --- a/el2_ifu_bp_ctl.v +++ b/el2_ifu_bp_ctl.v @@ -1,9 +1,63 @@ module el2_ifu_bp_ctl( input clock, input reset, - input [31:0] io_in, - input [31:0] io_in2, - output [7:0] io_out + input io_clk, + input io_active_clk, + input io_rst_l, + input io_ic_hit_f, + input [31:0] io_ifc_fetch_addr_f, + input io_ifc_fetch_req_f, + input io_dec_tlu_br0_r_pkt_valid, + input [1:0] io_dec_tlu_br0_r_pkt_hist, + input io_dec_tlu_br0_r_pkt_br_error, + input io_dec_tlu_br0_r_pkt_br_start_error, + input io_dec_tlu_br0_r_pkt_way, + input io_dec_tlu_br0_r_pkt_middle, + input [7:0] io_exu_i0_br_fghr_r, + input [6:0] io_exu_i0_br_index_r, + input io_dec_tlu_flush_lower_wb, + input io_dec_tlu_flush_leak_one_wb, + input io_dec_tlu_bpred_disable, + input io_exu_mp_pkt_misp, + input io_exu_mp_pkt_ataken, + input io_exu_mp_pkt_boffset, + input io_exu_mp_pkt_pc4, + input [1:0] io_exu_mp_pkt_hist, + input [11:0] io_exu_mp_pkt_toffset, + input io_exu_mp_pkt_valid, + input io_exu_mp_pkt_br_error, + input io_exu_mp_pkt_br_start_error, + input [31:0] io_exu_mp_pkt_prett, + input io_exu_mp_pkt_pcall, + input io_exu_mp_pkt_pret, + input io_exu_mp_pkt_pja, + input io_exu_mp_pkt_way, + input [7:0] io_exu_mp_eghr, + input [7:0] io_exu_mp_fghr, + input [6:0] io_exu_mp_index, + input [4:0] io_exu_mp_btag, + input io_exu_flush_final, + output io_ifu_bp_hit_taken_f, + output [30:0] io_ifu_bp_btb_target_f, + output io_ifu_bp_inst_mask_f, + output [7:0] io_ifu_bp_fghr_f, + output [1:0] io_ifu_bp_way_f, + output [1:0] io_ifu_bp_ret_f, + output [1:0] io_ifu_bp_hist1_f, + output [1:0] io_ifu_bp_hist0_f, + output [1:0] io_ifu_bp_pc4_f, + output [1:0] io_ifu_bp_valid_f, + output [11:0] io_ifu_bp_poffset_f ); - assign io_out = io_in[9:2] ^ io_in2[7:0]; // @[el2_ifu_bp_ctl.scala 13:10] + assign io_ifu_bp_hit_taken_f = 1'h0; // @[el2_ifu_bp_ctl.scala 42:25] + assign io_ifu_bp_btb_target_f = 31'h0; // @[el2_ifu_bp_ctl.scala 43:26] + assign io_ifu_bp_inst_mask_f = 1'h0; // @[el2_ifu_bp_ctl.scala 44:25] + assign io_ifu_bp_fghr_f = 8'h0; // @[el2_ifu_bp_ctl.scala 45:20] + assign io_ifu_bp_way_f = 2'h0; // @[el2_ifu_bp_ctl.scala 46:19] + assign io_ifu_bp_ret_f = 2'h0; // @[el2_ifu_bp_ctl.scala 47:19] + assign io_ifu_bp_hist1_f = 2'h0; // @[el2_ifu_bp_ctl.scala 48:21] + assign io_ifu_bp_hist0_f = 2'h0; // @[el2_ifu_bp_ctl.scala 49:21] + assign io_ifu_bp_pc4_f = 2'h0; // @[el2_ifu_bp_ctl.scala 50:19] + assign io_ifu_bp_valid_f = 2'h0; // @[el2_ifu_bp_ctl.scala 51:21] + assign io_ifu_bp_poffset_f = 12'h0; // @[el2_ifu_bp_ctl.scala 52:23] endmodule diff --git a/el2_ifu_compress.anno.json b/el2_ifu_compress.anno.json new file mode 100644 index 00000000..bdfb6d1d --- /dev/null +++ b/el2_ifu_compress.anno.json @@ -0,0 +1,60 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_compress|el2_ifu_compress>io_out_rs2", + "sources":[ + "~el2_ifu_compress|el2_ifu_compress>io_in" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_compress|el2_ifu_compress>io_out_rd", + "sources":[ + "~el2_ifu_compress|el2_ifu_compress>io_in" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_compress|el2_ifu_compress>io_out_rs1", + "sources":[ + "~el2_ifu_compress|el2_ifu_compress>io_in" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_compress|el2_ifu_compress>io_out_bits", + "sources":[ + "~el2_ifu_compress|el2_ifu_compress>io_in" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_compress|el2_ifu_compress>io_rvc", + "sources":[ + "~el2_ifu_compress|el2_ifu_compress>io_in" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_compress|el2_ifu_compress>io_out_rs3", + "sources":[ + "~el2_ifu_compress|el2_ifu_compress>io_in" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_ifu_compress" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_ifu_compress.fir b/el2_ifu_compress.fir new file mode 100644 index 00000000..559d3b1e --- /dev/null +++ b/el2_ifu_compress.fir @@ -0,0 +1,1193 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_ifu_compress : + module el2_ifu_compress : + input clock : Clock + input reset : UInt<1> + output io : {flip in : UInt<32>, out : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>}, rvc : UInt<1>} + + node _T = bits(io.in, 1, 0) @[el2_ifu_compress.scala 193:20] + node _T_1 = neq(_T, UInt<2>("h03")) @[el2_ifu_compress.scala 193:26] + io.rvc <= _T_1 @[el2_ifu_compress.scala 193:12] + node _T_2 = bits(io.in, 12, 5) @[el2_ifu_compress.scala 49:22] + node _T_3 = orr(_T_2) @[el2_ifu_compress.scala 49:29] + node _T_4 = mux(_T_3, UInt<7>("h013"), UInt<7>("h01f")) @[el2_ifu_compress.scala 49:20] + node _T_5 = bits(io.in, 10, 7) @[el2_ifu_compress.scala 30:26] + node _T_6 = bits(io.in, 12, 11) @[el2_ifu_compress.scala 30:35] + node _T_7 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 30:45] + node _T_8 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 30:51] + node _T_9 = cat(_T_8, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_10 = cat(_T_5, _T_6) @[Cat.scala 29:58] + node _T_11 = cat(_T_10, _T_7) @[Cat.scala 29:58] + node _T_12 = cat(_T_11, _T_9) @[Cat.scala 29:58] + node _T_13 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_14 = cat(UInt<2>("h01"), _T_13) @[Cat.scala 29:58] + node _T_15 = cat(_T_14, _T_4) @[Cat.scala 29:58] + node _T_16 = cat(_T_12, UInt<5>("h02")) @[Cat.scala 29:58] + node _T_17 = cat(_T_16, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_18 = cat(_T_17, _T_15) @[Cat.scala 29:58] + node _T_19 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_20 = cat(UInt<2>("h01"), _T_19) @[Cat.scala 29:58] + node _T_21 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_22 = cat(UInt<2>("h01"), _T_21) @[Cat.scala 29:58] + node _T_23 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_24 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_24.bits <= _T_18 @[el2_ifu_compress.scala 18:14] + _T_24.rd <= _T_20 @[el2_ifu_compress.scala 19:12] + _T_24.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13] + _T_24.rs2 <= _T_22 @[el2_ifu_compress.scala 21:13] + _T_24.rs3 <= _T_23 @[el2_ifu_compress.scala 22:13] + node _T_25 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 32:20] + node _T_26 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 32:28] + node _T_27 = cat(_T_25, _T_26) @[Cat.scala 29:58] + node _T_28 = cat(_T_27, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_29 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_30 = cat(UInt<2>("h01"), _T_29) @[Cat.scala 29:58] + node _T_31 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_32 = cat(UInt<2>("h01"), _T_31) @[Cat.scala 29:58] + node _T_33 = cat(_T_32, UInt<7>("h07")) @[Cat.scala 29:58] + node _T_34 = cat(_T_28, _T_30) @[Cat.scala 29:58] + node _T_35 = cat(_T_34, UInt<3>("h03")) @[Cat.scala 29:58] + node _T_36 = cat(_T_35, _T_33) @[Cat.scala 29:58] + node _T_37 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_38 = cat(UInt<2>("h01"), _T_37) @[Cat.scala 29:58] + node _T_39 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_40 = cat(UInt<2>("h01"), _T_39) @[Cat.scala 29:58] + node _T_41 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_42 = cat(UInt<2>("h01"), _T_41) @[Cat.scala 29:58] + node _T_43 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_44 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_44.bits <= _T_36 @[el2_ifu_compress.scala 18:14] + _T_44.rd <= _T_38 @[el2_ifu_compress.scala 19:12] + _T_44.rs1 <= _T_40 @[el2_ifu_compress.scala 20:13] + _T_44.rs2 <= _T_42 @[el2_ifu_compress.scala 21:13] + _T_44.rs3 <= _T_43 @[el2_ifu_compress.scala 22:13] + node _T_45 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20] + node _T_46 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26] + node _T_47 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36] + node _T_48 = cat(_T_47, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_49 = cat(_T_45, _T_46) @[Cat.scala 29:58] + node _T_50 = cat(_T_49, _T_48) @[Cat.scala 29:58] + node _T_51 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_52 = cat(UInt<2>("h01"), _T_51) @[Cat.scala 29:58] + node _T_53 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_54 = cat(UInt<2>("h01"), _T_53) @[Cat.scala 29:58] + node _T_55 = cat(_T_54, UInt<7>("h03")) @[Cat.scala 29:58] + node _T_56 = cat(_T_50, _T_52) @[Cat.scala 29:58] + node _T_57 = cat(_T_56, UInt<3>("h02")) @[Cat.scala 29:58] + node _T_58 = cat(_T_57, _T_55) @[Cat.scala 29:58] + node _T_59 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_60 = cat(UInt<2>("h01"), _T_59) @[Cat.scala 29:58] + node _T_61 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_62 = cat(UInt<2>("h01"), _T_61) @[Cat.scala 29:58] + node _T_63 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_64 = cat(UInt<2>("h01"), _T_63) @[Cat.scala 29:58] + node _T_65 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_66 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_66.bits <= _T_58 @[el2_ifu_compress.scala 18:14] + _T_66.rd <= _T_60 @[el2_ifu_compress.scala 19:12] + _T_66.rs1 <= _T_62 @[el2_ifu_compress.scala 20:13] + _T_66.rs2 <= _T_64 @[el2_ifu_compress.scala 21:13] + _T_66.rs3 <= _T_65 @[el2_ifu_compress.scala 22:13] + node _T_67 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 32:20] + node _T_68 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 32:28] + node _T_69 = cat(_T_67, _T_68) @[Cat.scala 29:58] + node _T_70 = cat(_T_69, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_71 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_72 = cat(UInt<2>("h01"), _T_71) @[Cat.scala 29:58] + node _T_73 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_74 = cat(UInt<2>("h01"), _T_73) @[Cat.scala 29:58] + node _T_75 = cat(_T_74, UInt<7>("h03")) @[Cat.scala 29:58] + node _T_76 = cat(_T_70, _T_72) @[Cat.scala 29:58] + node _T_77 = cat(_T_76, UInt<3>("h03")) @[Cat.scala 29:58] + node _T_78 = cat(_T_77, _T_75) @[Cat.scala 29:58] + node _T_79 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_80 = cat(UInt<2>("h01"), _T_79) @[Cat.scala 29:58] + node _T_81 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_82 = cat(UInt<2>("h01"), _T_81) @[Cat.scala 29:58] + node _T_83 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_84 = cat(UInt<2>("h01"), _T_83) @[Cat.scala 29:58] + node _T_85 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_86 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_86.bits <= _T_78 @[el2_ifu_compress.scala 18:14] + _T_86.rd <= _T_80 @[el2_ifu_compress.scala 19:12] + _T_86.rs1 <= _T_82 @[el2_ifu_compress.scala 20:13] + _T_86.rs2 <= _T_84 @[el2_ifu_compress.scala 21:13] + _T_86.rs3 <= _T_85 @[el2_ifu_compress.scala 22:13] + node _T_87 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20] + node _T_88 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26] + node _T_89 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36] + node _T_90 = cat(_T_89, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_91 = cat(_T_87, _T_88) @[Cat.scala 29:58] + node _T_92 = cat(_T_91, _T_90) @[Cat.scala 29:58] + node _T_93 = shr(_T_92, 5) @[el2_ifu_compress.scala 59:32] + node _T_94 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_95 = cat(UInt<2>("h01"), _T_94) @[Cat.scala 29:58] + node _T_96 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_97 = cat(UInt<2>("h01"), _T_96) @[Cat.scala 29:58] + node _T_98 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20] + node _T_99 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26] + node _T_100 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36] + node _T_101 = cat(_T_100, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_102 = cat(_T_98, _T_99) @[Cat.scala 29:58] + node _T_103 = cat(_T_102, _T_101) @[Cat.scala 29:58] + node _T_104 = bits(_T_103, 4, 0) @[el2_ifu_compress.scala 59:65] + node _T_105 = cat(UInt<3>("h02"), _T_104) @[Cat.scala 29:58] + node _T_106 = cat(_T_105, UInt<7>("h03f")) @[Cat.scala 29:58] + node _T_107 = cat(_T_93, _T_95) @[Cat.scala 29:58] + node _T_108 = cat(_T_107, _T_97) @[Cat.scala 29:58] + node _T_109 = cat(_T_108, _T_106) @[Cat.scala 29:58] + node _T_110 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_111 = cat(UInt<2>("h01"), _T_110) @[Cat.scala 29:58] + node _T_112 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_113 = cat(UInt<2>("h01"), _T_112) @[Cat.scala 29:58] + node _T_114 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_115 = cat(UInt<2>("h01"), _T_114) @[Cat.scala 29:58] + node _T_116 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_117 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_117.bits <= _T_109 @[el2_ifu_compress.scala 18:14] + _T_117.rd <= _T_111 @[el2_ifu_compress.scala 19:12] + _T_117.rs1 <= _T_113 @[el2_ifu_compress.scala 20:13] + _T_117.rs2 <= _T_115 @[el2_ifu_compress.scala 21:13] + _T_117.rs3 <= _T_116 @[el2_ifu_compress.scala 22:13] + node _T_118 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 32:20] + node _T_119 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 32:28] + node _T_120 = cat(_T_118, _T_119) @[Cat.scala 29:58] + node _T_121 = cat(_T_120, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_122 = shr(_T_121, 5) @[el2_ifu_compress.scala 62:30] + node _T_123 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_124 = cat(UInt<2>("h01"), _T_123) @[Cat.scala 29:58] + node _T_125 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_126 = cat(UInt<2>("h01"), _T_125) @[Cat.scala 29:58] + node _T_127 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 32:20] + node _T_128 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 32:28] + node _T_129 = cat(_T_127, _T_128) @[Cat.scala 29:58] + node _T_130 = cat(_T_129, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_131 = bits(_T_130, 4, 0) @[el2_ifu_compress.scala 62:63] + node _T_132 = cat(UInt<3>("h03"), _T_131) @[Cat.scala 29:58] + node _T_133 = cat(_T_132, UInt<7>("h027")) @[Cat.scala 29:58] + node _T_134 = cat(_T_122, _T_124) @[Cat.scala 29:58] + node _T_135 = cat(_T_134, _T_126) @[Cat.scala 29:58] + node _T_136 = cat(_T_135, _T_133) @[Cat.scala 29:58] + node _T_137 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_138 = cat(UInt<2>("h01"), _T_137) @[Cat.scala 29:58] + node _T_139 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_140 = cat(UInt<2>("h01"), _T_139) @[Cat.scala 29:58] + node _T_141 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_142 = cat(UInt<2>("h01"), _T_141) @[Cat.scala 29:58] + node _T_143 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_144 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_144.bits <= _T_136 @[el2_ifu_compress.scala 18:14] + _T_144.rd <= _T_138 @[el2_ifu_compress.scala 19:12] + _T_144.rs1 <= _T_140 @[el2_ifu_compress.scala 20:13] + _T_144.rs2 <= _T_142 @[el2_ifu_compress.scala 21:13] + _T_144.rs3 <= _T_143 @[el2_ifu_compress.scala 22:13] + node _T_145 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20] + node _T_146 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26] + node _T_147 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36] + node _T_148 = cat(_T_147, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_149 = cat(_T_145, _T_146) @[Cat.scala 29:58] + node _T_150 = cat(_T_149, _T_148) @[Cat.scala 29:58] + node _T_151 = shr(_T_150, 5) @[el2_ifu_compress.scala 61:29] + node _T_152 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_153 = cat(UInt<2>("h01"), _T_152) @[Cat.scala 29:58] + node _T_154 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_155 = cat(UInt<2>("h01"), _T_154) @[Cat.scala 29:58] + node _T_156 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 31:20] + node _T_157 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 31:26] + node _T_158 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 31:36] + node _T_159 = cat(_T_158, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_160 = cat(_T_156, _T_157) @[Cat.scala 29:58] + node _T_161 = cat(_T_160, _T_159) @[Cat.scala 29:58] + node _T_162 = bits(_T_161, 4, 0) @[el2_ifu_compress.scala 61:62] + node _T_163 = cat(UInt<3>("h02"), _T_162) @[Cat.scala 29:58] + node _T_164 = cat(_T_163, UInt<7>("h023")) @[Cat.scala 29:58] + node _T_165 = cat(_T_151, _T_153) @[Cat.scala 29:58] + node _T_166 = cat(_T_165, _T_155) @[Cat.scala 29:58] + node _T_167 = cat(_T_166, _T_164) @[Cat.scala 29:58] + node _T_168 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_169 = cat(UInt<2>("h01"), _T_168) @[Cat.scala 29:58] + node _T_170 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_171 = cat(UInt<2>("h01"), _T_170) @[Cat.scala 29:58] + node _T_172 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_173 = cat(UInt<2>("h01"), _T_172) @[Cat.scala 29:58] + node _T_174 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_175 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_175.bits <= _T_167 @[el2_ifu_compress.scala 18:14] + _T_175.rd <= _T_169 @[el2_ifu_compress.scala 19:12] + _T_175.rs1 <= _T_171 @[el2_ifu_compress.scala 20:13] + _T_175.rs2 <= _T_173 @[el2_ifu_compress.scala 21:13] + _T_175.rs3 <= _T_174 @[el2_ifu_compress.scala 22:13] + node _T_176 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 32:20] + node _T_177 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 32:28] + node _T_178 = cat(_T_176, _T_177) @[Cat.scala 29:58] + node _T_179 = cat(_T_178, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_180 = shr(_T_179, 5) @[el2_ifu_compress.scala 60:29] + node _T_181 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_182 = cat(UInt<2>("h01"), _T_181) @[Cat.scala 29:58] + node _T_183 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_184 = cat(UInt<2>("h01"), _T_183) @[Cat.scala 29:58] + node _T_185 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 32:20] + node _T_186 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 32:28] + node _T_187 = cat(_T_185, _T_186) @[Cat.scala 29:58] + node _T_188 = cat(_T_187, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_189 = bits(_T_188, 4, 0) @[el2_ifu_compress.scala 60:62] + node _T_190 = cat(UInt<3>("h03"), _T_189) @[Cat.scala 29:58] + node _T_191 = cat(_T_190, UInt<7>("h023")) @[Cat.scala 29:58] + node _T_192 = cat(_T_180, _T_182) @[Cat.scala 29:58] + node _T_193 = cat(_T_192, _T_184) @[Cat.scala 29:58] + node _T_194 = cat(_T_193, _T_191) @[Cat.scala 29:58] + node _T_195 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_196 = cat(UInt<2>("h01"), _T_195) @[Cat.scala 29:58] + node _T_197 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_198 = cat(UInt<2>("h01"), _T_197) @[Cat.scala 29:58] + node _T_199 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_200 = cat(UInt<2>("h01"), _T_199) @[Cat.scala 29:58] + node _T_201 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_202 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_202.bits <= _T_194 @[el2_ifu_compress.scala 18:14] + _T_202.rd <= _T_196 @[el2_ifu_compress.scala 19:12] + _T_202.rs1 <= _T_198 @[el2_ifu_compress.scala 20:13] + _T_202.rs2 <= _T_200 @[el2_ifu_compress.scala 21:13] + _T_202.rs3 <= _T_201 @[el2_ifu_compress.scala 22:13] + node _T_203 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30] + node _T_204 = bits(_T_203, 0, 0) @[Bitwise.scala 72:15] + node _T_205 = mux(_T_204, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12] + node _T_206 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38] + node _T_207 = cat(_T_205, _T_206) @[Cat.scala 29:58] + node _T_208 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_209 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_210 = cat(_T_209, UInt<7>("h013")) @[Cat.scala 29:58] + node _T_211 = cat(_T_207, _T_208) @[Cat.scala 29:58] + node _T_212 = cat(_T_211, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_213 = cat(_T_212, _T_210) @[Cat.scala 29:58] + node _T_214 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_215 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_216 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_217 = cat(UInt<2>("h01"), _T_216) @[Cat.scala 29:58] + node _T_218 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_219 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_219.bits <= _T_213 @[el2_ifu_compress.scala 18:14] + _T_219.rd <= _T_214 @[el2_ifu_compress.scala 19:12] + _T_219.rs1 <= _T_215 @[el2_ifu_compress.scala 20:13] + _T_219.rs2 <= _T_217 @[el2_ifu_compress.scala 21:13] + _T_219.rs3 <= _T_218 @[el2_ifu_compress.scala 22:13] + node _T_220 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_221 = orr(_T_220) @[el2_ifu_compress.scala 73:24] + node _T_222 = mux(_T_221, UInt<7>("h01b"), UInt<7>("h01f")) @[el2_ifu_compress.scala 73:20] + node _T_223 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30] + node _T_224 = bits(_T_223, 0, 0) @[Bitwise.scala 72:15] + node _T_225 = mux(_T_224, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12] + node _T_226 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38] + node _T_227 = cat(_T_225, _T_226) @[Cat.scala 29:58] + node _T_228 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_229 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_230 = cat(_T_229, _T_222) @[Cat.scala 29:58] + node _T_231 = cat(_T_227, _T_228) @[Cat.scala 29:58] + node _T_232 = cat(_T_231, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_233 = cat(_T_232, _T_230) @[Cat.scala 29:58] + node _T_234 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_235 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_236 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_237 = cat(UInt<2>("h01"), _T_236) @[Cat.scala 29:58] + node _T_238 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_239 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_239.bits <= _T_233 @[el2_ifu_compress.scala 18:14] + _T_239.rd <= _T_234 @[el2_ifu_compress.scala 19:12] + _T_239.rs1 <= _T_235 @[el2_ifu_compress.scala 20:13] + _T_239.rs2 <= _T_237 @[el2_ifu_compress.scala 21:13] + _T_239.rs3 <= _T_238 @[el2_ifu_compress.scala 22:13] + node _T_240 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30] + node _T_241 = bits(_T_240, 0, 0) @[Bitwise.scala 72:15] + node _T_242 = mux(_T_241, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12] + node _T_243 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38] + node _T_244 = cat(_T_242, _T_243) @[Cat.scala 29:58] + node _T_245 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_246 = cat(_T_245, UInt<7>("h013")) @[Cat.scala 29:58] + node _T_247 = cat(_T_244, UInt<5>("h00")) @[Cat.scala 29:58] + node _T_248 = cat(_T_247, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_249 = cat(_T_248, _T_246) @[Cat.scala 29:58] + node _T_250 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_251 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_252 = cat(UInt<2>("h01"), _T_251) @[Cat.scala 29:58] + node _T_253 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_254 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_254.bits <= _T_249 @[el2_ifu_compress.scala 18:14] + _T_254.rd <= _T_250 @[el2_ifu_compress.scala 19:12] + _T_254.rs1 <= UInt<5>("h00") @[el2_ifu_compress.scala 20:13] + _T_254.rs2 <= _T_252 @[el2_ifu_compress.scala 21:13] + _T_254.rs3 <= _T_253 @[el2_ifu_compress.scala 22:13] + node _T_255 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30] + node _T_256 = bits(_T_255, 0, 0) @[Bitwise.scala 72:15] + node _T_257 = mux(_T_256, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12] + node _T_258 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38] + node _T_259 = cat(_T_257, _T_258) @[Cat.scala 29:58] + node _T_260 = orr(_T_259) @[el2_ifu_compress.scala 86:29] + node _T_261 = mux(_T_260, UInt<7>("h037"), UInt<7>("h03f")) @[el2_ifu_compress.scala 86:20] + node _T_262 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 37:30] + node _T_263 = bits(_T_262, 0, 0) @[Bitwise.scala 72:15] + node _T_264 = mux(_T_263, UInt<15>("h07fff"), UInt<15>("h00")) @[Bitwise.scala 72:12] + node _T_265 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 37:38] + node _T_266 = cat(_T_264, _T_265) @[Cat.scala 29:58] + node _T_267 = cat(_T_266, UInt<12>("h00")) @[Cat.scala 29:58] + node _T_268 = bits(_T_267, 31, 12) @[el2_ifu_compress.scala 87:31] + node _T_269 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_270 = cat(_T_268, _T_269) @[Cat.scala 29:58] + node _T_271 = cat(_T_270, _T_261) @[Cat.scala 29:58] + node _T_272 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_273 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_274 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_275 = cat(UInt<2>("h01"), _T_274) @[Cat.scala 29:58] + node _T_276 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_277 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_277.bits <= _T_271 @[el2_ifu_compress.scala 18:14] + _T_277.rd <= _T_272 @[el2_ifu_compress.scala 19:12] + _T_277.rs1 <= _T_273 @[el2_ifu_compress.scala 20:13] + _T_277.rs2 <= _T_275 @[el2_ifu_compress.scala 21:13] + _T_277.rs3 <= _T_276 @[el2_ifu_compress.scala 22:13] + node _T_278 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_279 = eq(_T_278, UInt<5>("h00")) @[el2_ifu_compress.scala 88:14] + node _T_280 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_281 = eq(_T_280, UInt<5>("h02")) @[el2_ifu_compress.scala 88:27] + node _T_282 = or(_T_279, _T_281) @[el2_ifu_compress.scala 88:21] + node _T_283 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30] + node _T_284 = bits(_T_283, 0, 0) @[Bitwise.scala 72:15] + node _T_285 = mux(_T_284, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12] + node _T_286 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38] + node _T_287 = cat(_T_285, _T_286) @[Cat.scala 29:58] + node _T_288 = orr(_T_287) @[el2_ifu_compress.scala 82:29] + node _T_289 = mux(_T_288, UInt<7>("h013"), UInt<7>("h01f")) @[el2_ifu_compress.scala 82:20] + node _T_290 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 38:34] + node _T_291 = bits(_T_290, 0, 0) @[Bitwise.scala 72:15] + node _T_292 = mux(_T_291, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_293 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 38:42] + node _T_294 = bits(io.in, 5, 5) @[el2_ifu_compress.scala 38:50] + node _T_295 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 38:56] + node _T_296 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 38:62] + node _T_297 = cat(_T_295, _T_296) @[Cat.scala 29:58] + node _T_298 = cat(_T_297, UInt<4>("h00")) @[Cat.scala 29:58] + node _T_299 = cat(_T_292, _T_293) @[Cat.scala 29:58] + node _T_300 = cat(_T_299, _T_294) @[Cat.scala 29:58] + node _T_301 = cat(_T_300, _T_298) @[Cat.scala 29:58] + node _T_302 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_303 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_304 = cat(_T_303, _T_289) @[Cat.scala 29:58] + node _T_305 = cat(_T_301, _T_302) @[Cat.scala 29:58] + node _T_306 = cat(_T_305, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_307 = cat(_T_306, _T_304) @[Cat.scala 29:58] + node _T_308 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_309 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_310 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_311 = cat(UInt<2>("h01"), _T_310) @[Cat.scala 29:58] + node _T_312 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_313 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_313.bits <= _T_307 @[el2_ifu_compress.scala 18:14] + _T_313.rd <= _T_308 @[el2_ifu_compress.scala 19:12] + _T_313.rs1 <= _T_309 @[el2_ifu_compress.scala 20:13] + _T_313.rs2 <= _T_311 @[el2_ifu_compress.scala 21:13] + _T_313.rs3 <= _T_312 @[el2_ifu_compress.scala 22:13] + node _T_314 = mux(_T_282, _T_313, _T_277) @[el2_ifu_compress.scala 88:10] + node _T_315 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 42:20] + node _T_316 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 42:27] + node _T_317 = cat(_T_315, _T_316) @[Cat.scala 29:58] + node _T_318 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_319 = cat(UInt<2>("h01"), _T_318) @[Cat.scala 29:58] + node _T_320 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_321 = cat(UInt<2>("h01"), _T_320) @[Cat.scala 29:58] + node _T_322 = cat(_T_321, UInt<7>("h013")) @[Cat.scala 29:58] + node _T_323 = cat(_T_317, _T_319) @[Cat.scala 29:58] + node _T_324 = cat(_T_323, UInt<3>("h05")) @[Cat.scala 29:58] + node _T_325 = cat(_T_324, _T_322) @[Cat.scala 29:58] + node _T_326 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 42:20] + node _T_327 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 42:27] + node _T_328 = cat(_T_326, _T_327) @[Cat.scala 29:58] + node _T_329 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_330 = cat(UInt<2>("h01"), _T_329) @[Cat.scala 29:58] + node _T_331 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_332 = cat(UInt<2>("h01"), _T_331) @[Cat.scala 29:58] + node _T_333 = cat(_T_332, UInt<7>("h013")) @[Cat.scala 29:58] + node _T_334 = cat(_T_328, _T_330) @[Cat.scala 29:58] + node _T_335 = cat(_T_334, UInt<3>("h05")) @[Cat.scala 29:58] + node _T_336 = cat(_T_335, _T_333) @[Cat.scala 29:58] + node _T_337 = or(_T_336, UInt<31>("h040000000")) @[el2_ifu_compress.scala 95:23] + node _T_338 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 39:30] + node _T_339 = bits(_T_338, 0, 0) @[Bitwise.scala 72:15] + node _T_340 = mux(_T_339, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12] + node _T_341 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 39:38] + node _T_342 = cat(_T_340, _T_341) @[Cat.scala 29:58] + node _T_343 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_344 = cat(UInt<2>("h01"), _T_343) @[Cat.scala 29:58] + node _T_345 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_346 = cat(UInt<2>("h01"), _T_345) @[Cat.scala 29:58] + node _T_347 = cat(_T_346, UInt<7>("h013")) @[Cat.scala 29:58] + node _T_348 = cat(_T_342, _T_344) @[Cat.scala 29:58] + node _T_349 = cat(_T_348, UInt<3>("h07")) @[Cat.scala 29:58] + node _T_350 = cat(_T_349, _T_347) @[Cat.scala 29:58] + wire _T_351 : UInt<3>[8] @[el2_ifu_compress.scala 98:28] + _T_351[0] <= UInt<1>("h00") @[el2_ifu_compress.scala 98:28] + _T_351[1] <= UInt<3>("h04") @[el2_ifu_compress.scala 98:28] + _T_351[2] <= UInt<3>("h06") @[el2_ifu_compress.scala 98:28] + _T_351[3] <= UInt<3>("h07") @[el2_ifu_compress.scala 98:28] + _T_351[4] <= UInt<1>("h00") @[el2_ifu_compress.scala 98:28] + _T_351[5] <= UInt<1>("h00") @[el2_ifu_compress.scala 98:28] + _T_351[6] <= UInt<2>("h02") @[el2_ifu_compress.scala 98:28] + _T_351[7] <= UInt<2>("h03") @[el2_ifu_compress.scala 98:28] + node _T_352 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 98:74] + node _T_353 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 98:81] + node _T_354 = cat(_T_352, _T_353) @[Cat.scala 29:58] + node _T_355 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 99:24] + node _T_356 = eq(_T_355, UInt<1>("h00")) @[el2_ifu_compress.scala 99:30] + node _T_357 = mux(_T_356, UInt<31>("h040000000"), UInt<1>("h00")) @[el2_ifu_compress.scala 99:22] + node _T_358 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 100:24] + node _T_359 = mux(_T_358, UInt<7>("h03b"), UInt<7>("h033")) @[el2_ifu_compress.scala 100:22] + node _T_360 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_361 = cat(UInt<2>("h01"), _T_360) @[Cat.scala 29:58] + node _T_362 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_363 = cat(UInt<2>("h01"), _T_362) @[Cat.scala 29:58] + node _T_364 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_365 = cat(UInt<2>("h01"), _T_364) @[Cat.scala 29:58] + node _T_366 = cat(_T_365, _T_359) @[Cat.scala 29:58] + node _T_367 = cat(_T_361, _T_363) @[Cat.scala 29:58] + node _T_368 = cat(_T_367, _T_351[_T_354]) @[Cat.scala 29:58] + node _T_369 = cat(_T_368, _T_366) @[Cat.scala 29:58] + node _T_370 = or(_T_369, _T_357) @[el2_ifu_compress.scala 101:43] + wire _T_371 : UInt<32>[4] @[el2_ifu_compress.scala 103:19] + _T_371[0] <= _T_325 @[el2_ifu_compress.scala 103:19] + _T_371[1] <= _T_337 @[el2_ifu_compress.scala 103:19] + _T_371[2] <= _T_350 @[el2_ifu_compress.scala 103:19] + _T_371[3] <= _T_370 @[el2_ifu_compress.scala 103:19] + node _T_372 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 103:46] + node _T_373 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_374 = cat(UInt<2>("h01"), _T_373) @[Cat.scala 29:58] + node _T_375 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_376 = cat(UInt<2>("h01"), _T_375) @[Cat.scala 29:58] + node _T_377 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_378 = cat(UInt<2>("h01"), _T_377) @[Cat.scala 29:58] + node _T_379 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_380 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_380.bits <= _T_371[_T_372] @[el2_ifu_compress.scala 18:14] + _T_380.rd <= _T_374 @[el2_ifu_compress.scala 19:12] + _T_380.rs1 <= _T_376 @[el2_ifu_compress.scala 20:13] + _T_380.rs2 <= _T_378 @[el2_ifu_compress.scala 21:13] + _T_380.rs3 <= _T_379 @[el2_ifu_compress.scala 22:13] + node _T_381 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28] + node _T_382 = bits(_T_381, 0, 0) @[Bitwise.scala 72:15] + node _T_383 = mux(_T_382, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12] + node _T_384 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36] + node _T_385 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42] + node _T_386 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51] + node _T_387 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57] + node _T_388 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63] + node _T_389 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69] + node _T_390 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76] + node _T_391 = cat(_T_390, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_392 = cat(_T_388, _T_389) @[Cat.scala 29:58] + node _T_393 = cat(_T_392, _T_391) @[Cat.scala 29:58] + node _T_394 = cat(_T_386, _T_387) @[Cat.scala 29:58] + node _T_395 = cat(_T_383, _T_384) @[Cat.scala 29:58] + node _T_396 = cat(_T_395, _T_385) @[Cat.scala 29:58] + node _T_397 = cat(_T_396, _T_394) @[Cat.scala 29:58] + node _T_398 = cat(_T_397, _T_393) @[Cat.scala 29:58] + node _T_399 = bits(_T_398, 20, 20) @[el2_ifu_compress.scala 90:26] + node _T_400 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28] + node _T_401 = bits(_T_400, 0, 0) @[Bitwise.scala 72:15] + node _T_402 = mux(_T_401, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12] + node _T_403 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36] + node _T_404 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42] + node _T_405 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51] + node _T_406 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57] + node _T_407 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63] + node _T_408 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69] + node _T_409 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76] + node _T_410 = cat(_T_409, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_411 = cat(_T_407, _T_408) @[Cat.scala 29:58] + node _T_412 = cat(_T_411, _T_410) @[Cat.scala 29:58] + node _T_413 = cat(_T_405, _T_406) @[Cat.scala 29:58] + node _T_414 = cat(_T_402, _T_403) @[Cat.scala 29:58] + node _T_415 = cat(_T_414, _T_404) @[Cat.scala 29:58] + node _T_416 = cat(_T_415, _T_413) @[Cat.scala 29:58] + node _T_417 = cat(_T_416, _T_412) @[Cat.scala 29:58] + node _T_418 = bits(_T_417, 10, 1) @[el2_ifu_compress.scala 90:36] + node _T_419 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28] + node _T_420 = bits(_T_419, 0, 0) @[Bitwise.scala 72:15] + node _T_421 = mux(_T_420, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12] + node _T_422 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36] + node _T_423 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42] + node _T_424 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51] + node _T_425 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57] + node _T_426 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63] + node _T_427 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69] + node _T_428 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76] + node _T_429 = cat(_T_428, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_430 = cat(_T_426, _T_427) @[Cat.scala 29:58] + node _T_431 = cat(_T_430, _T_429) @[Cat.scala 29:58] + node _T_432 = cat(_T_424, _T_425) @[Cat.scala 29:58] + node _T_433 = cat(_T_421, _T_422) @[Cat.scala 29:58] + node _T_434 = cat(_T_433, _T_423) @[Cat.scala 29:58] + node _T_435 = cat(_T_434, _T_432) @[Cat.scala 29:58] + node _T_436 = cat(_T_435, _T_431) @[Cat.scala 29:58] + node _T_437 = bits(_T_436, 11, 11) @[el2_ifu_compress.scala 90:48] + node _T_438 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 40:28] + node _T_439 = bits(_T_438, 0, 0) @[Bitwise.scala 72:15] + node _T_440 = mux(_T_439, UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12] + node _T_441 = bits(io.in, 8, 8) @[el2_ifu_compress.scala 40:36] + node _T_442 = bits(io.in, 10, 9) @[el2_ifu_compress.scala 40:42] + node _T_443 = bits(io.in, 6, 6) @[el2_ifu_compress.scala 40:51] + node _T_444 = bits(io.in, 7, 7) @[el2_ifu_compress.scala 40:57] + node _T_445 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 40:63] + node _T_446 = bits(io.in, 11, 11) @[el2_ifu_compress.scala 40:69] + node _T_447 = bits(io.in, 5, 3) @[el2_ifu_compress.scala 40:76] + node _T_448 = cat(_T_447, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_449 = cat(_T_445, _T_446) @[Cat.scala 29:58] + node _T_450 = cat(_T_449, _T_448) @[Cat.scala 29:58] + node _T_451 = cat(_T_443, _T_444) @[Cat.scala 29:58] + node _T_452 = cat(_T_440, _T_441) @[Cat.scala 29:58] + node _T_453 = cat(_T_452, _T_442) @[Cat.scala 29:58] + node _T_454 = cat(_T_453, _T_451) @[Cat.scala 29:58] + node _T_455 = cat(_T_454, _T_450) @[Cat.scala 29:58] + node _T_456 = bits(_T_455, 19, 12) @[el2_ifu_compress.scala 90:58] + node _T_457 = cat(_T_456, UInt<5>("h00")) @[Cat.scala 29:58] + node _T_458 = cat(_T_457, UInt<7>("h06f")) @[Cat.scala 29:58] + node _T_459 = cat(_T_399, _T_418) @[Cat.scala 29:58] + node _T_460 = cat(_T_459, _T_437) @[Cat.scala 29:58] + node _T_461 = cat(_T_460, _T_458) @[Cat.scala 29:58] + node _T_462 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_463 = cat(UInt<2>("h01"), _T_462) @[Cat.scala 29:58] + node _T_464 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 27:29] + node _T_465 = cat(UInt<2>("h01"), _T_464) @[Cat.scala 29:58] + node _T_466 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_467 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_467.bits <= _T_461 @[el2_ifu_compress.scala 18:14] + _T_467.rd <= UInt<5>("h00") @[el2_ifu_compress.scala 19:12] + _T_467.rs1 <= _T_463 @[el2_ifu_compress.scala 20:13] + _T_467.rs2 <= _T_465 @[el2_ifu_compress.scala 21:13] + _T_467.rs3 <= _T_466 @[el2_ifu_compress.scala 22:13] + node _T_468 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27] + node _T_469 = bits(_T_468, 0, 0) @[Bitwise.scala 72:15] + node _T_470 = mux(_T_469, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_471 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35] + node _T_472 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43] + node _T_473 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49] + node _T_474 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59] + node _T_475 = cat(_T_473, _T_474) @[Cat.scala 29:58] + node _T_476 = cat(_T_475, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_477 = cat(_T_470, _T_471) @[Cat.scala 29:58] + node _T_478 = cat(_T_477, _T_472) @[Cat.scala 29:58] + node _T_479 = cat(_T_478, _T_476) @[Cat.scala 29:58] + node _T_480 = bits(_T_479, 12, 12) @[el2_ifu_compress.scala 91:29] + node _T_481 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27] + node _T_482 = bits(_T_481, 0, 0) @[Bitwise.scala 72:15] + node _T_483 = mux(_T_482, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_484 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35] + node _T_485 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43] + node _T_486 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49] + node _T_487 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59] + node _T_488 = cat(_T_486, _T_487) @[Cat.scala 29:58] + node _T_489 = cat(_T_488, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_490 = cat(_T_483, _T_484) @[Cat.scala 29:58] + node _T_491 = cat(_T_490, _T_485) @[Cat.scala 29:58] + node _T_492 = cat(_T_491, _T_489) @[Cat.scala 29:58] + node _T_493 = bits(_T_492, 10, 5) @[el2_ifu_compress.scala 91:39] + node _T_494 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_495 = cat(UInt<2>("h01"), _T_494) @[Cat.scala 29:58] + node _T_496 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27] + node _T_497 = bits(_T_496, 0, 0) @[Bitwise.scala 72:15] + node _T_498 = mux(_T_497, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_499 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35] + node _T_500 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43] + node _T_501 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49] + node _T_502 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59] + node _T_503 = cat(_T_501, _T_502) @[Cat.scala 29:58] + node _T_504 = cat(_T_503, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_505 = cat(_T_498, _T_499) @[Cat.scala 29:58] + node _T_506 = cat(_T_505, _T_500) @[Cat.scala 29:58] + node _T_507 = cat(_T_506, _T_504) @[Cat.scala 29:58] + node _T_508 = bits(_T_507, 4, 1) @[el2_ifu_compress.scala 91:71] + node _T_509 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27] + node _T_510 = bits(_T_509, 0, 0) @[Bitwise.scala 72:15] + node _T_511 = mux(_T_510, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_512 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35] + node _T_513 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43] + node _T_514 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49] + node _T_515 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59] + node _T_516 = cat(_T_514, _T_515) @[Cat.scala 29:58] + node _T_517 = cat(_T_516, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_518 = cat(_T_511, _T_512) @[Cat.scala 29:58] + node _T_519 = cat(_T_518, _T_513) @[Cat.scala 29:58] + node _T_520 = cat(_T_519, _T_517) @[Cat.scala 29:58] + node _T_521 = bits(_T_520, 11, 11) @[el2_ifu_compress.scala 91:82] + node _T_522 = cat(_T_521, UInt<7>("h063")) @[Cat.scala 29:58] + node _T_523 = cat(UInt<3>("h00"), _T_508) @[Cat.scala 29:58] + node _T_524 = cat(_T_523, _T_522) @[Cat.scala 29:58] + node _T_525 = cat(UInt<5>("h00"), _T_495) @[Cat.scala 29:58] + node _T_526 = cat(_T_480, _T_493) @[Cat.scala 29:58] + node _T_527 = cat(_T_526, _T_525) @[Cat.scala 29:58] + node _T_528 = cat(_T_527, _T_524) @[Cat.scala 29:58] + node _T_529 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_530 = cat(UInt<2>("h01"), _T_529) @[Cat.scala 29:58] + node _T_531 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_532 = cat(UInt<2>("h01"), _T_531) @[Cat.scala 29:58] + node _T_533 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_534 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_534.bits <= _T_528 @[el2_ifu_compress.scala 18:14] + _T_534.rd <= _T_530 @[el2_ifu_compress.scala 19:12] + _T_534.rs1 <= _T_532 @[el2_ifu_compress.scala 20:13] + _T_534.rs2 <= UInt<5>("h00") @[el2_ifu_compress.scala 21:13] + _T_534.rs3 <= _T_533 @[el2_ifu_compress.scala 22:13] + node _T_535 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27] + node _T_536 = bits(_T_535, 0, 0) @[Bitwise.scala 72:15] + node _T_537 = mux(_T_536, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_538 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35] + node _T_539 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43] + node _T_540 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49] + node _T_541 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59] + node _T_542 = cat(_T_540, _T_541) @[Cat.scala 29:58] + node _T_543 = cat(_T_542, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_544 = cat(_T_537, _T_538) @[Cat.scala 29:58] + node _T_545 = cat(_T_544, _T_539) @[Cat.scala 29:58] + node _T_546 = cat(_T_545, _T_543) @[Cat.scala 29:58] + node _T_547 = bits(_T_546, 12, 12) @[el2_ifu_compress.scala 92:29] + node _T_548 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27] + node _T_549 = bits(_T_548, 0, 0) @[Bitwise.scala 72:15] + node _T_550 = mux(_T_549, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_551 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35] + node _T_552 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43] + node _T_553 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49] + node _T_554 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59] + node _T_555 = cat(_T_553, _T_554) @[Cat.scala 29:58] + node _T_556 = cat(_T_555, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_557 = cat(_T_550, _T_551) @[Cat.scala 29:58] + node _T_558 = cat(_T_557, _T_552) @[Cat.scala 29:58] + node _T_559 = cat(_T_558, _T_556) @[Cat.scala 29:58] + node _T_560 = bits(_T_559, 10, 5) @[el2_ifu_compress.scala 92:39] + node _T_561 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_562 = cat(UInt<2>("h01"), _T_561) @[Cat.scala 29:58] + node _T_563 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27] + node _T_564 = bits(_T_563, 0, 0) @[Bitwise.scala 72:15] + node _T_565 = mux(_T_564, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_566 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35] + node _T_567 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43] + node _T_568 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49] + node _T_569 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59] + node _T_570 = cat(_T_568, _T_569) @[Cat.scala 29:58] + node _T_571 = cat(_T_570, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_572 = cat(_T_565, _T_566) @[Cat.scala 29:58] + node _T_573 = cat(_T_572, _T_567) @[Cat.scala 29:58] + node _T_574 = cat(_T_573, _T_571) @[Cat.scala 29:58] + node _T_575 = bits(_T_574, 4, 1) @[el2_ifu_compress.scala 92:71] + node _T_576 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 41:27] + node _T_577 = bits(_T_576, 0, 0) @[Bitwise.scala 72:15] + node _T_578 = mux(_T_577, UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_579 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 41:35] + node _T_580 = bits(io.in, 2, 2) @[el2_ifu_compress.scala 41:43] + node _T_581 = bits(io.in, 11, 10) @[el2_ifu_compress.scala 41:49] + node _T_582 = bits(io.in, 4, 3) @[el2_ifu_compress.scala 41:59] + node _T_583 = cat(_T_581, _T_582) @[Cat.scala 29:58] + node _T_584 = cat(_T_583, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_585 = cat(_T_578, _T_579) @[Cat.scala 29:58] + node _T_586 = cat(_T_585, _T_580) @[Cat.scala 29:58] + node _T_587 = cat(_T_586, _T_584) @[Cat.scala 29:58] + node _T_588 = bits(_T_587, 11, 11) @[el2_ifu_compress.scala 92:82] + node _T_589 = cat(_T_588, UInt<7>("h063")) @[Cat.scala 29:58] + node _T_590 = cat(UInt<3>("h01"), _T_575) @[Cat.scala 29:58] + node _T_591 = cat(_T_590, _T_589) @[Cat.scala 29:58] + node _T_592 = cat(UInt<5>("h00"), _T_562) @[Cat.scala 29:58] + node _T_593 = cat(_T_547, _T_560) @[Cat.scala 29:58] + node _T_594 = cat(_T_593, _T_592) @[Cat.scala 29:58] + node _T_595 = cat(_T_594, _T_591) @[Cat.scala 29:58] + node _T_596 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 26:29] + node _T_597 = cat(UInt<2>("h01"), _T_596) @[Cat.scala 29:58] + node _T_598 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_599 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_599.bits <= _T_595 @[el2_ifu_compress.scala 18:14] + _T_599.rd <= UInt<5>("h00") @[el2_ifu_compress.scala 19:12] + _T_599.rs1 <= _T_597 @[el2_ifu_compress.scala 20:13] + _T_599.rs2 <= UInt<5>("h00") @[el2_ifu_compress.scala 21:13] + _T_599.rs3 <= _T_598 @[el2_ifu_compress.scala 22:13] + node _T_600 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_601 = orr(_T_600) @[el2_ifu_compress.scala 109:27] + node _T_602 = mux(_T_601, UInt<7>("h03"), UInt<7>("h01f")) @[el2_ifu_compress.scala 109:23] + node _T_603 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 42:20] + node _T_604 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 42:27] + node _T_605 = cat(_T_603, _T_604) @[Cat.scala 29:58] + node _T_606 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_607 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_608 = cat(_T_607, UInt<7>("h013")) @[Cat.scala 29:58] + node _T_609 = cat(_T_605, _T_606) @[Cat.scala 29:58] + node _T_610 = cat(_T_609, UInt<3>("h01")) @[Cat.scala 29:58] + node _T_611 = cat(_T_610, _T_608) @[Cat.scala 29:58] + node _T_612 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_613 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_614 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_615 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_616 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_616.bits <= _T_611 @[el2_ifu_compress.scala 18:14] + _T_616.rd <= _T_612 @[el2_ifu_compress.scala 19:12] + _T_616.rs1 <= _T_613 @[el2_ifu_compress.scala 20:13] + _T_616.rs2 <= _T_614 @[el2_ifu_compress.scala 21:13] + _T_616.rs3 <= _T_615 @[el2_ifu_compress.scala 22:13] + node _T_617 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 34:22] + node _T_618 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 34:30] + node _T_619 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 34:37] + node _T_620 = cat(_T_619, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_621 = cat(_T_617, _T_618) @[Cat.scala 29:58] + node _T_622 = cat(_T_621, _T_620) @[Cat.scala 29:58] + node _T_623 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_624 = cat(_T_623, UInt<7>("h07")) @[Cat.scala 29:58] + node _T_625 = cat(_T_622, UInt<5>("h02")) @[Cat.scala 29:58] + node _T_626 = cat(_T_625, UInt<3>("h03")) @[Cat.scala 29:58] + node _T_627 = cat(_T_626, _T_624) @[Cat.scala 29:58] + node _T_628 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_629 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_630 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_631 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_631.bits <= _T_627 @[el2_ifu_compress.scala 18:14] + _T_631.rd <= _T_628 @[el2_ifu_compress.scala 19:12] + _T_631.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13] + _T_631.rs2 <= _T_629 @[el2_ifu_compress.scala 21:13] + _T_631.rs3 <= _T_630 @[el2_ifu_compress.scala 22:13] + node _T_632 = bits(io.in, 3, 2) @[el2_ifu_compress.scala 33:22] + node _T_633 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 33:30] + node _T_634 = bits(io.in, 6, 4) @[el2_ifu_compress.scala 33:37] + node _T_635 = cat(_T_634, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_636 = cat(_T_632, _T_633) @[Cat.scala 29:58] + node _T_637 = cat(_T_636, _T_635) @[Cat.scala 29:58] + node _T_638 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_639 = cat(_T_638, _T_602) @[Cat.scala 29:58] + node _T_640 = cat(_T_637, UInt<5>("h02")) @[Cat.scala 29:58] + node _T_641 = cat(_T_640, UInt<3>("h02")) @[Cat.scala 29:58] + node _T_642 = cat(_T_641, _T_639) @[Cat.scala 29:58] + node _T_643 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_644 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_645 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_646 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_646.bits <= _T_642 @[el2_ifu_compress.scala 18:14] + _T_646.rd <= _T_643 @[el2_ifu_compress.scala 19:12] + _T_646.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13] + _T_646.rs2 <= _T_644 @[el2_ifu_compress.scala 21:13] + _T_646.rs3 <= _T_645 @[el2_ifu_compress.scala 22:13] + node _T_647 = bits(io.in, 4, 2) @[el2_ifu_compress.scala 34:22] + node _T_648 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 34:30] + node _T_649 = bits(io.in, 6, 5) @[el2_ifu_compress.scala 34:37] + node _T_650 = cat(_T_649, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_651 = cat(_T_647, _T_648) @[Cat.scala 29:58] + node _T_652 = cat(_T_651, _T_650) @[Cat.scala 29:58] + node _T_653 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_654 = cat(_T_653, _T_602) @[Cat.scala 29:58] + node _T_655 = cat(_T_652, UInt<5>("h02")) @[Cat.scala 29:58] + node _T_656 = cat(_T_655, UInt<3>("h03")) @[Cat.scala 29:58] + node _T_657 = cat(_T_656, _T_654) @[Cat.scala 29:58] + node _T_658 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_659 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_660 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_661 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_661.bits <= _T_657 @[el2_ifu_compress.scala 18:14] + _T_661.rd <= _T_658 @[el2_ifu_compress.scala 19:12] + _T_661.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13] + _T_661.rs2 <= _T_659 @[el2_ifu_compress.scala 21:13] + _T_661.rs3 <= _T_660 @[el2_ifu_compress.scala 22:13] + node _T_662 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_663 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_664 = cat(_T_663, UInt<7>("h033")) @[Cat.scala 29:58] + node _T_665 = cat(_T_662, UInt<5>("h00")) @[Cat.scala 29:58] + node _T_666 = cat(_T_665, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_667 = cat(_T_666, _T_664) @[Cat.scala 29:58] + node _T_668 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_669 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_670 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_671 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_671.bits <= _T_667 @[el2_ifu_compress.scala 18:14] + _T_671.rd <= _T_668 @[el2_ifu_compress.scala 19:12] + _T_671.rs1 <= UInt<5>("h00") @[el2_ifu_compress.scala 20:13] + _T_671.rs2 <= _T_669 @[el2_ifu_compress.scala 21:13] + _T_671.rs3 <= _T_670 @[el2_ifu_compress.scala 22:13] + node _T_672 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_673 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_674 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_675 = cat(_T_674, UInt<7>("h033")) @[Cat.scala 29:58] + node _T_676 = cat(_T_672, _T_673) @[Cat.scala 29:58] + node _T_677 = cat(_T_676, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_678 = cat(_T_677, _T_675) @[Cat.scala 29:58] + node _T_679 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_680 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_681 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_682 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_683 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_683.bits <= _T_678 @[el2_ifu_compress.scala 18:14] + _T_683.rd <= _T_679 @[el2_ifu_compress.scala 19:12] + _T_683.rs1 <= _T_680 @[el2_ifu_compress.scala 20:13] + _T_683.rs2 <= _T_681 @[el2_ifu_compress.scala 21:13] + _T_683.rs3 <= _T_682 @[el2_ifu_compress.scala 22:13] + node _T_684 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_685 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_686 = cat(UInt<5>("h00"), UInt<7>("h067")) @[Cat.scala 29:58] + node _T_687 = cat(_T_684, _T_685) @[Cat.scala 29:58] + node _T_688 = cat(_T_687, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_689 = cat(_T_688, _T_686) @[Cat.scala 29:58] + node _T_690 = shr(_T_689, 7) @[el2_ifu_compress.scala 129:29] + node _T_691 = cat(_T_690, UInt<7>("h01f")) @[Cat.scala 29:58] + node _T_692 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_693 = orr(_T_692) @[el2_ifu_compress.scala 130:37] + node _T_694 = mux(_T_693, _T_689, _T_691) @[el2_ifu_compress.scala 130:33] + node _T_695 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_696 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_697 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_698 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_698.bits <= _T_694 @[el2_ifu_compress.scala 18:14] + _T_698.rd <= UInt<5>("h00") @[el2_ifu_compress.scala 19:12] + _T_698.rs1 <= _T_695 @[el2_ifu_compress.scala 20:13] + _T_698.rs2 <= _T_696 @[el2_ifu_compress.scala 21:13] + _T_698.rs3 <= _T_697 @[el2_ifu_compress.scala 22:13] + node _T_699 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_700 = orr(_T_699) @[el2_ifu_compress.scala 131:27] + node _T_701 = mux(_T_700, _T_671, _T_698) @[el2_ifu_compress.scala 131:22] + node _T_702 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_703 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_704 = cat(UInt<5>("h01"), UInt<7>("h067")) @[Cat.scala 29:58] + node _T_705 = cat(_T_702, _T_703) @[Cat.scala 29:58] + node _T_706 = cat(_T_705, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_707 = cat(_T_706, _T_704) @[Cat.scala 29:58] + node _T_708 = shr(_T_689, 7) @[el2_ifu_compress.scala 133:27] + node _T_709 = cat(_T_708, UInt<7>("h073")) @[Cat.scala 29:58] + node _T_710 = or(_T_709, UInt<21>("h0100000")) @[el2_ifu_compress.scala 133:46] + node _T_711 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_712 = orr(_T_711) @[el2_ifu_compress.scala 134:37] + node _T_713 = mux(_T_712, _T_707, _T_710) @[el2_ifu_compress.scala 134:33] + node _T_714 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_715 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_716 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_717 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_717.bits <= _T_713 @[el2_ifu_compress.scala 18:14] + _T_717.rd <= UInt<5>("h01") @[el2_ifu_compress.scala 19:12] + _T_717.rs1 <= _T_714 @[el2_ifu_compress.scala 20:13] + _T_717.rs2 <= _T_715 @[el2_ifu_compress.scala 21:13] + _T_717.rs3 <= _T_716 @[el2_ifu_compress.scala 22:13] + node _T_718 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_719 = orr(_T_718) @[el2_ifu_compress.scala 135:30] + node _T_720 = mux(_T_719, _T_683, _T_717) @[el2_ifu_compress.scala 135:25] + node _T_721 = bits(io.in, 12, 12) @[el2_ifu_compress.scala 136:12] + node _T_722 = mux(_T_721, _T_720, _T_701) @[el2_ifu_compress.scala 136:10] + node _T_723 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 36:22] + node _T_724 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 36:30] + node _T_725 = cat(_T_723, _T_724) @[Cat.scala 29:58] + node _T_726 = cat(_T_725, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_727 = shr(_T_726, 5) @[el2_ifu_compress.scala 120:34] + node _T_728 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_729 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 36:22] + node _T_730 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 36:30] + node _T_731 = cat(_T_729, _T_730) @[Cat.scala 29:58] + node _T_732 = cat(_T_731, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_733 = bits(_T_732, 4, 0) @[el2_ifu_compress.scala 120:66] + node _T_734 = cat(UInt<3>("h03"), _T_733) @[Cat.scala 29:58] + node _T_735 = cat(_T_734, UInt<7>("h027")) @[Cat.scala 29:58] + node _T_736 = cat(_T_727, _T_728) @[Cat.scala 29:58] + node _T_737 = cat(_T_736, UInt<5>("h02")) @[Cat.scala 29:58] + node _T_738 = cat(_T_737, _T_735) @[Cat.scala 29:58] + node _T_739 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_740 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_741 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_742 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_742.bits <= _T_738 @[el2_ifu_compress.scala 18:14] + _T_742.rd <= _T_739 @[el2_ifu_compress.scala 19:12] + _T_742.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13] + _T_742.rs2 <= _T_740 @[el2_ifu_compress.scala 21:13] + _T_742.rs3 <= _T_741 @[el2_ifu_compress.scala 22:13] + node _T_743 = bits(io.in, 8, 7) @[el2_ifu_compress.scala 35:22] + node _T_744 = bits(io.in, 12, 9) @[el2_ifu_compress.scala 35:30] + node _T_745 = cat(_T_743, _T_744) @[Cat.scala 29:58] + node _T_746 = cat(_T_745, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_747 = shr(_T_746, 5) @[el2_ifu_compress.scala 119:33] + node _T_748 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_749 = bits(io.in, 8, 7) @[el2_ifu_compress.scala 35:22] + node _T_750 = bits(io.in, 12, 9) @[el2_ifu_compress.scala 35:30] + node _T_751 = cat(_T_749, _T_750) @[Cat.scala 29:58] + node _T_752 = cat(_T_751, UInt<2>("h00")) @[Cat.scala 29:58] + node _T_753 = bits(_T_752, 4, 0) @[el2_ifu_compress.scala 119:65] + node _T_754 = cat(UInt<3>("h02"), _T_753) @[Cat.scala 29:58] + node _T_755 = cat(_T_754, UInt<7>("h023")) @[Cat.scala 29:58] + node _T_756 = cat(_T_747, _T_748) @[Cat.scala 29:58] + node _T_757 = cat(_T_756, UInt<5>("h02")) @[Cat.scala 29:58] + node _T_758 = cat(_T_757, _T_755) @[Cat.scala 29:58] + node _T_759 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_760 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_761 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_762 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_762.bits <= _T_758 @[el2_ifu_compress.scala 18:14] + _T_762.rd <= _T_759 @[el2_ifu_compress.scala 19:12] + _T_762.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13] + _T_762.rs2 <= _T_760 @[el2_ifu_compress.scala 21:13] + _T_762.rs3 <= _T_761 @[el2_ifu_compress.scala 22:13] + node _T_763 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 36:22] + node _T_764 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 36:30] + node _T_765 = cat(_T_763, _T_764) @[Cat.scala 29:58] + node _T_766 = cat(_T_765, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_767 = shr(_T_766, 5) @[el2_ifu_compress.scala 118:33] + node _T_768 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_769 = bits(io.in, 9, 7) @[el2_ifu_compress.scala 36:22] + node _T_770 = bits(io.in, 12, 10) @[el2_ifu_compress.scala 36:30] + node _T_771 = cat(_T_769, _T_770) @[Cat.scala 29:58] + node _T_772 = cat(_T_771, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_773 = bits(_T_772, 4, 0) @[el2_ifu_compress.scala 118:65] + node _T_774 = cat(UInt<3>("h03"), _T_773) @[Cat.scala 29:58] + node _T_775 = cat(_T_774, UInt<7>("h023")) @[Cat.scala 29:58] + node _T_776 = cat(_T_767, _T_768) @[Cat.scala 29:58] + node _T_777 = cat(_T_776, UInt<5>("h02")) @[Cat.scala 29:58] + node _T_778 = cat(_T_777, _T_775) @[Cat.scala 29:58] + node _T_779 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 29:13] + node _T_780 = bits(io.in, 6, 2) @[el2_ifu_compress.scala 28:14] + node _T_781 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_782 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_782.bits <= _T_778 @[el2_ifu_compress.scala 18:14] + _T_782.rd <= _T_779 @[el2_ifu_compress.scala 19:12] + _T_782.rs1 <= UInt<5>("h02") @[el2_ifu_compress.scala 20:13] + _T_782.rs2 <= _T_780 @[el2_ifu_compress.scala 21:13] + _T_782.rs3 <= _T_781 @[el2_ifu_compress.scala 22:13] + node _T_783 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36] + node _T_784 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57] + node _T_785 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79] + node _T_786 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_787 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_787.bits <= io.in @[el2_ifu_compress.scala 18:14] + _T_787.rd <= _T_783 @[el2_ifu_compress.scala 19:12] + _T_787.rs1 <= _T_784 @[el2_ifu_compress.scala 20:13] + _T_787.rs2 <= _T_785 @[el2_ifu_compress.scala 21:13] + _T_787.rs3 <= _T_786 @[el2_ifu_compress.scala 22:13] + node _T_788 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36] + node _T_789 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57] + node _T_790 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79] + node _T_791 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_792 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_792.bits <= io.in @[el2_ifu_compress.scala 18:14] + _T_792.rd <= _T_788 @[el2_ifu_compress.scala 19:12] + _T_792.rs1 <= _T_789 @[el2_ifu_compress.scala 20:13] + _T_792.rs2 <= _T_790 @[el2_ifu_compress.scala 21:13] + _T_792.rs3 <= _T_791 @[el2_ifu_compress.scala 22:13] + node _T_793 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36] + node _T_794 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57] + node _T_795 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79] + node _T_796 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_797 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_797.bits <= io.in @[el2_ifu_compress.scala 18:14] + _T_797.rd <= _T_793 @[el2_ifu_compress.scala 19:12] + _T_797.rs1 <= _T_794 @[el2_ifu_compress.scala 20:13] + _T_797.rs2 <= _T_795 @[el2_ifu_compress.scala 21:13] + _T_797.rs3 <= _T_796 @[el2_ifu_compress.scala 22:13] + node _T_798 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36] + node _T_799 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57] + node _T_800 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79] + node _T_801 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_802 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_802.bits <= io.in @[el2_ifu_compress.scala 18:14] + _T_802.rd <= _T_798 @[el2_ifu_compress.scala 19:12] + _T_802.rs1 <= _T_799 @[el2_ifu_compress.scala 20:13] + _T_802.rs2 <= _T_800 @[el2_ifu_compress.scala 21:13] + _T_802.rs3 <= _T_801 @[el2_ifu_compress.scala 22:13] + node _T_803 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36] + node _T_804 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57] + node _T_805 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79] + node _T_806 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_807 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_807.bits <= io.in @[el2_ifu_compress.scala 18:14] + _T_807.rd <= _T_803 @[el2_ifu_compress.scala 19:12] + _T_807.rs1 <= _T_804 @[el2_ifu_compress.scala 20:13] + _T_807.rs2 <= _T_805 @[el2_ifu_compress.scala 21:13] + _T_807.rs3 <= _T_806 @[el2_ifu_compress.scala 22:13] + node _T_808 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36] + node _T_809 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57] + node _T_810 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79] + node _T_811 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_812 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_812.bits <= io.in @[el2_ifu_compress.scala 18:14] + _T_812.rd <= _T_808 @[el2_ifu_compress.scala 19:12] + _T_812.rs1 <= _T_809 @[el2_ifu_compress.scala 20:13] + _T_812.rs2 <= _T_810 @[el2_ifu_compress.scala 21:13] + _T_812.rs3 <= _T_811 @[el2_ifu_compress.scala 22:13] + node _T_813 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36] + node _T_814 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57] + node _T_815 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79] + node _T_816 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_817 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_817.bits <= io.in @[el2_ifu_compress.scala 18:14] + _T_817.rd <= _T_813 @[el2_ifu_compress.scala 19:12] + _T_817.rs1 <= _T_814 @[el2_ifu_compress.scala 20:13] + _T_817.rs2 <= _T_815 @[el2_ifu_compress.scala 21:13] + _T_817.rs3 <= _T_816 @[el2_ifu_compress.scala 22:13] + node _T_818 = bits(io.in, 11, 7) @[el2_ifu_compress.scala 16:36] + node _T_819 = bits(io.in, 19, 15) @[el2_ifu_compress.scala 16:57] + node _T_820 = bits(io.in, 24, 20) @[el2_ifu_compress.scala 16:79] + node _T_821 = bits(io.in, 31, 27) @[el2_ifu_compress.scala 16:101] + wire _T_822 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>} @[el2_ifu_compress.scala 17:19] + _T_822.bits <= io.in @[el2_ifu_compress.scala 18:14] + _T_822.rd <= _T_818 @[el2_ifu_compress.scala 19:12] + _T_822.rs1 <= _T_819 @[el2_ifu_compress.scala 20:13] + _T_822.rs2 <= _T_820 @[el2_ifu_compress.scala 21:13] + _T_822.rs3 <= _T_821 @[el2_ifu_compress.scala 22:13] + wire _T_823 : {bits : UInt<32>, rd : UInt<5>, rs1 : UInt<5>, rs2 : UInt<5>, rs3 : UInt<5>}[32] @[el2_ifu_compress.scala 146:20] + _T_823[0].rs3 <= _T_24.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[0].rs2 <= _T_24.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[0].rs1 <= _T_24.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[0].rd <= _T_24.rd @[el2_ifu_compress.scala 146:20] + _T_823[0].bits <= _T_24.bits @[el2_ifu_compress.scala 146:20] + _T_823[1].rs3 <= _T_44.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[1].rs2 <= _T_44.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[1].rs1 <= _T_44.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[1].rd <= _T_44.rd @[el2_ifu_compress.scala 146:20] + _T_823[1].bits <= _T_44.bits @[el2_ifu_compress.scala 146:20] + _T_823[2].rs3 <= _T_66.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[2].rs2 <= _T_66.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[2].rs1 <= _T_66.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[2].rd <= _T_66.rd @[el2_ifu_compress.scala 146:20] + _T_823[2].bits <= _T_66.bits @[el2_ifu_compress.scala 146:20] + _T_823[3].rs3 <= _T_86.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[3].rs2 <= _T_86.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[3].rs1 <= _T_86.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[3].rd <= _T_86.rd @[el2_ifu_compress.scala 146:20] + _T_823[3].bits <= _T_86.bits @[el2_ifu_compress.scala 146:20] + _T_823[4].rs3 <= _T_117.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[4].rs2 <= _T_117.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[4].rs1 <= _T_117.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[4].rd <= _T_117.rd @[el2_ifu_compress.scala 146:20] + _T_823[4].bits <= _T_117.bits @[el2_ifu_compress.scala 146:20] + _T_823[5].rs3 <= _T_144.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[5].rs2 <= _T_144.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[5].rs1 <= _T_144.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[5].rd <= _T_144.rd @[el2_ifu_compress.scala 146:20] + _T_823[5].bits <= _T_144.bits @[el2_ifu_compress.scala 146:20] + _T_823[6].rs3 <= _T_175.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[6].rs2 <= _T_175.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[6].rs1 <= _T_175.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[6].rd <= _T_175.rd @[el2_ifu_compress.scala 146:20] + _T_823[6].bits <= _T_175.bits @[el2_ifu_compress.scala 146:20] + _T_823[7].rs3 <= _T_202.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[7].rs2 <= _T_202.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[7].rs1 <= _T_202.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[7].rd <= _T_202.rd @[el2_ifu_compress.scala 146:20] + _T_823[7].bits <= _T_202.bits @[el2_ifu_compress.scala 146:20] + _T_823[8].rs3 <= _T_219.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[8].rs2 <= _T_219.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[8].rs1 <= _T_219.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[8].rd <= _T_219.rd @[el2_ifu_compress.scala 146:20] + _T_823[8].bits <= _T_219.bits @[el2_ifu_compress.scala 146:20] + _T_823[9].rs3 <= _T_239.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[9].rs2 <= _T_239.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[9].rs1 <= _T_239.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[9].rd <= _T_239.rd @[el2_ifu_compress.scala 146:20] + _T_823[9].bits <= _T_239.bits @[el2_ifu_compress.scala 146:20] + _T_823[10].rs3 <= _T_254.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[10].rs2 <= _T_254.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[10].rs1 <= _T_254.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[10].rd <= _T_254.rd @[el2_ifu_compress.scala 146:20] + _T_823[10].bits <= _T_254.bits @[el2_ifu_compress.scala 146:20] + _T_823[11].rs3 <= _T_314.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[11].rs2 <= _T_314.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[11].rs1 <= _T_314.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[11].rd <= _T_314.rd @[el2_ifu_compress.scala 146:20] + _T_823[11].bits <= _T_314.bits @[el2_ifu_compress.scala 146:20] + _T_823[12].rs3 <= _T_380.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[12].rs2 <= _T_380.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[12].rs1 <= _T_380.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[12].rd <= _T_380.rd @[el2_ifu_compress.scala 146:20] + _T_823[12].bits <= _T_380.bits @[el2_ifu_compress.scala 146:20] + _T_823[13].rs3 <= _T_467.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[13].rs2 <= _T_467.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[13].rs1 <= _T_467.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[13].rd <= _T_467.rd @[el2_ifu_compress.scala 146:20] + _T_823[13].bits <= _T_467.bits @[el2_ifu_compress.scala 146:20] + _T_823[14].rs3 <= _T_534.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[14].rs2 <= _T_534.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[14].rs1 <= _T_534.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[14].rd <= _T_534.rd @[el2_ifu_compress.scala 146:20] + _T_823[14].bits <= _T_534.bits @[el2_ifu_compress.scala 146:20] + _T_823[15].rs3 <= _T_599.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[15].rs2 <= _T_599.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[15].rs1 <= _T_599.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[15].rd <= _T_599.rd @[el2_ifu_compress.scala 146:20] + _T_823[15].bits <= _T_599.bits @[el2_ifu_compress.scala 146:20] + _T_823[16].rs3 <= _T_616.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[16].rs2 <= _T_616.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[16].rs1 <= _T_616.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[16].rd <= _T_616.rd @[el2_ifu_compress.scala 146:20] + _T_823[16].bits <= _T_616.bits @[el2_ifu_compress.scala 146:20] + _T_823[17].rs3 <= _T_631.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[17].rs2 <= _T_631.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[17].rs1 <= _T_631.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[17].rd <= _T_631.rd @[el2_ifu_compress.scala 146:20] + _T_823[17].bits <= _T_631.bits @[el2_ifu_compress.scala 146:20] + _T_823[18].rs3 <= _T_646.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[18].rs2 <= _T_646.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[18].rs1 <= _T_646.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[18].rd <= _T_646.rd @[el2_ifu_compress.scala 146:20] + _T_823[18].bits <= _T_646.bits @[el2_ifu_compress.scala 146:20] + _T_823[19].rs3 <= _T_661.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[19].rs2 <= _T_661.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[19].rs1 <= _T_661.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[19].rd <= _T_661.rd @[el2_ifu_compress.scala 146:20] + _T_823[19].bits <= _T_661.bits @[el2_ifu_compress.scala 146:20] + _T_823[20].rs3 <= _T_722.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[20].rs2 <= _T_722.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[20].rs1 <= _T_722.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[20].rd <= _T_722.rd @[el2_ifu_compress.scala 146:20] + _T_823[20].bits <= _T_722.bits @[el2_ifu_compress.scala 146:20] + _T_823[21].rs3 <= _T_742.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[21].rs2 <= _T_742.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[21].rs1 <= _T_742.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[21].rd <= _T_742.rd @[el2_ifu_compress.scala 146:20] + _T_823[21].bits <= _T_742.bits @[el2_ifu_compress.scala 146:20] + _T_823[22].rs3 <= _T_762.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[22].rs2 <= _T_762.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[22].rs1 <= _T_762.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[22].rd <= _T_762.rd @[el2_ifu_compress.scala 146:20] + _T_823[22].bits <= _T_762.bits @[el2_ifu_compress.scala 146:20] + _T_823[23].rs3 <= _T_782.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[23].rs2 <= _T_782.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[23].rs1 <= _T_782.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[23].rd <= _T_782.rd @[el2_ifu_compress.scala 146:20] + _T_823[23].bits <= _T_782.bits @[el2_ifu_compress.scala 146:20] + _T_823[24].rs3 <= _T_787.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[24].rs2 <= _T_787.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[24].rs1 <= _T_787.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[24].rd <= _T_787.rd @[el2_ifu_compress.scala 146:20] + _T_823[24].bits <= _T_787.bits @[el2_ifu_compress.scala 146:20] + _T_823[25].rs3 <= _T_792.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[25].rs2 <= _T_792.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[25].rs1 <= _T_792.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[25].rd <= _T_792.rd @[el2_ifu_compress.scala 146:20] + _T_823[25].bits <= _T_792.bits @[el2_ifu_compress.scala 146:20] + _T_823[26].rs3 <= _T_797.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[26].rs2 <= _T_797.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[26].rs1 <= _T_797.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[26].rd <= _T_797.rd @[el2_ifu_compress.scala 146:20] + _T_823[26].bits <= _T_797.bits @[el2_ifu_compress.scala 146:20] + _T_823[27].rs3 <= _T_802.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[27].rs2 <= _T_802.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[27].rs1 <= _T_802.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[27].rd <= _T_802.rd @[el2_ifu_compress.scala 146:20] + _T_823[27].bits <= _T_802.bits @[el2_ifu_compress.scala 146:20] + _T_823[28].rs3 <= _T_807.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[28].rs2 <= _T_807.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[28].rs1 <= _T_807.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[28].rd <= _T_807.rd @[el2_ifu_compress.scala 146:20] + _T_823[28].bits <= _T_807.bits @[el2_ifu_compress.scala 146:20] + _T_823[29].rs3 <= _T_812.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[29].rs2 <= _T_812.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[29].rs1 <= _T_812.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[29].rd <= _T_812.rd @[el2_ifu_compress.scala 146:20] + _T_823[29].bits <= _T_812.bits @[el2_ifu_compress.scala 146:20] + _T_823[30].rs3 <= _T_817.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[30].rs2 <= _T_817.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[30].rs1 <= _T_817.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[30].rd <= _T_817.rd @[el2_ifu_compress.scala 146:20] + _T_823[30].bits <= _T_817.bits @[el2_ifu_compress.scala 146:20] + _T_823[31].rs3 <= _T_822.rs3 @[el2_ifu_compress.scala 146:20] + _T_823[31].rs2 <= _T_822.rs2 @[el2_ifu_compress.scala 146:20] + _T_823[31].rs1 <= _T_822.rs1 @[el2_ifu_compress.scala 146:20] + _T_823[31].rd <= _T_822.rd @[el2_ifu_compress.scala 146:20] + _T_823[31].bits <= _T_822.bits @[el2_ifu_compress.scala 146:20] + node _T_824 = bits(io.in, 1, 0) @[el2_ifu_compress.scala 147:12] + node _T_825 = bits(io.in, 15, 13) @[el2_ifu_compress.scala 147:20] + node _T_826 = cat(_T_824, _T_825) @[Cat.scala 29:58] + io.out.rs3 <= _T_823[_T_826].rs3 @[el2_ifu_compress.scala 195:12] + io.out.rs2 <= _T_823[_T_826].rs2 @[el2_ifu_compress.scala 195:12] + io.out.rs1 <= _T_823[_T_826].rs1 @[el2_ifu_compress.scala 195:12] + io.out.rd <= _T_823[_T_826].rd @[el2_ifu_compress.scala 195:12] + io.out.bits <= _T_823[_T_826].bits @[el2_ifu_compress.scala 195:12] + diff --git a/el2_ifu_compress.v b/el2_ifu_compress.v new file mode 100644 index 00000000..47b3e6b0 --- /dev/null +++ b/el2_ifu_compress.v @@ -0,0 +1,281 @@ +module el2_ifu_compress( + input clock, + input reset, + input [31:0] io_in, + output [31:0] io_out_bits, + output [4:0] io_out_rd, + output [4:0] io_out_rs1, + output [4:0] io_out_rs2, + output [4:0] io_out_rs3, + output io_rvc +); + wire _T_3 = |io_in[12:5]; // @[el2_ifu_compress.scala 49:29] + wire [6:0] _T_4 = _T_3 ? 7'h13 : 7'h1f; // @[el2_ifu_compress.scala 49:20] + wire [4:0] _T_14 = {2'h1,io_in[4:2]}; // @[Cat.scala 29:58] + wire [29:0] _T_18 = {io_in[10:7],io_in[12:11],io_in[5],io_in[6],2'h0,5'h2,3'h0,2'h1,io_in[4:2],_T_4}; // @[Cat.scala 29:58] + wire [7:0] _T_28 = {io_in[6:5],io_in[12:10],3'h0}; // @[Cat.scala 29:58] + wire [4:0] _T_30 = {2'h1,io_in[9:7]}; // @[Cat.scala 29:58] + wire [27:0] _T_36 = {io_in[6:5],io_in[12:10],3'h0,2'h1,io_in[9:7],3'h3,2'h1,io_in[4:2],7'h7}; // @[Cat.scala 29:58] + wire [6:0] _T_50 = {io_in[5],io_in[12:10],io_in[6],2'h0}; // @[Cat.scala 29:58] + wire [26:0] _T_58 = {io_in[5],io_in[12:10],io_in[6],2'h0,2'h1,io_in[9:7],3'h2,2'h1,io_in[4:2],7'h3}; // @[Cat.scala 29:58] + wire [27:0] _T_78 = {io_in[6:5],io_in[12:10],3'h0,2'h1,io_in[9:7],3'h3,2'h1,io_in[4:2],7'h3}; // @[Cat.scala 29:58] + wire [26:0] _T_109 = {_T_50[6:5],2'h1,io_in[4:2],2'h1,io_in[9:7],3'h2,_T_50[4:0],7'h3f}; // @[Cat.scala 29:58] + wire [27:0] _T_136 = {_T_28[7:5],2'h1,io_in[4:2],2'h1,io_in[9:7],3'h3,_T_28[4:0],7'h27}; // @[Cat.scala 29:58] + wire [26:0] _T_167 = {_T_50[6:5],2'h1,io_in[4:2],2'h1,io_in[9:7],3'h2,_T_50[4:0],7'h23}; // @[Cat.scala 29:58] + wire [27:0] _T_194 = {_T_28[7:5],2'h1,io_in[4:2],2'h1,io_in[9:7],3'h3,_T_28[4:0],7'h23}; // @[Cat.scala 29:58] + wire [6:0] _T_205 = io_in[12] ? 7'h7f : 7'h0; // @[Bitwise.scala 72:12] + wire [11:0] _T_207 = {_T_205,io_in[6:2]}; // @[Cat.scala 29:58] + wire [31:0] _T_213 = {_T_205,io_in[6:2],io_in[11:7],3'h0,io_in[11:7],7'h13}; // @[Cat.scala 29:58] + wire _T_221 = |io_in[11:7]; // @[el2_ifu_compress.scala 73:24] + wire [6:0] _T_222 = _T_221 ? 7'h1b : 7'h1f; // @[el2_ifu_compress.scala 73:20] + wire [31:0] _T_233 = {_T_205,io_in[6:2],io_in[11:7],3'h0,io_in[11:7],_T_222}; // @[Cat.scala 29:58] + wire [31:0] _T_249 = {_T_205,io_in[6:2],5'h0,3'h0,io_in[11:7],7'h13}; // @[Cat.scala 29:58] + wire _T_260 = |_T_207; // @[el2_ifu_compress.scala 86:29] + wire [6:0] _T_261 = _T_260 ? 7'h37 : 7'h3f; // @[el2_ifu_compress.scala 86:20] + wire [14:0] _T_264 = io_in[12] ? 15'h7fff : 15'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_267 = {_T_264,io_in[6:2],12'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_271 = {_T_267[31:12],io_in[11:7],_T_261}; // @[Cat.scala 29:58] + wire _T_279 = io_in[11:7] == 5'h0; // @[el2_ifu_compress.scala 88:14] + wire _T_281 = io_in[11:7] == 5'h2; // @[el2_ifu_compress.scala 88:27] + wire _T_282 = _T_279 | _T_281; // @[el2_ifu_compress.scala 88:21] + wire [6:0] _T_289 = _T_260 ? 7'h13 : 7'h1f; // @[el2_ifu_compress.scala 82:20] + wire [2:0] _T_292 = io_in[12] ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_307 = {_T_292,io_in[4:3],io_in[5],io_in[2],io_in[6],4'h0,io_in[11:7],3'h0,io_in[11:7],_T_289}; // @[Cat.scala 29:58] + wire [31:0] _T_314_bits = _T_282 ? _T_307 : _T_271; // @[el2_ifu_compress.scala 88:10] + wire [4:0] _T_314_rd = _T_282 ? io_in[11:7] : io_in[11:7]; // @[el2_ifu_compress.scala 88:10] + wire [4:0] _T_314_rs2 = _T_282 ? _T_14 : _T_14; // @[el2_ifu_compress.scala 88:10] + wire [4:0] _T_314_rs3 = _T_282 ? io_in[31:27] : io_in[31:27]; // @[el2_ifu_compress.scala 88:10] + wire [25:0] _T_325 = {io_in[12],io_in[6:2],2'h1,io_in[9:7],3'h5,2'h1,io_in[9:7],7'h13}; // @[Cat.scala 29:58] + wire [30:0] _GEN_172 = {{5'd0}, _T_325}; // @[el2_ifu_compress.scala 95:23] + wire [30:0] _T_337 = _GEN_172 | 31'h40000000; // @[el2_ifu_compress.scala 95:23] + wire [31:0] _T_350 = {_T_205,io_in[6:2],2'h1,io_in[9:7],3'h7,2'h1,io_in[9:7],7'h13}; // @[Cat.scala 29:58] + wire [2:0] _T_354 = {io_in[12],io_in[6:5]}; // @[Cat.scala 29:58] + wire _T_356 = io_in[6:5] == 2'h0; // @[el2_ifu_compress.scala 99:30] + wire [30:0] _T_357 = _T_356 ? 31'h40000000 : 31'h0; // @[el2_ifu_compress.scala 99:22] + wire [6:0] _T_359 = io_in[12] ? 7'h3b : 7'h33; // @[el2_ifu_compress.scala 100:22] + wire [2:0] _GEN_1 = 3'h1 == _T_354 ? 3'h4 : 3'h0; // @[Cat.scala 29:58] + wire [2:0] _GEN_2 = 3'h2 == _T_354 ? 3'h6 : _GEN_1; // @[Cat.scala 29:58] + wire [2:0] _GEN_3 = 3'h3 == _T_354 ? 3'h7 : _GEN_2; // @[Cat.scala 29:58] + wire [2:0] _GEN_4 = 3'h4 == _T_354 ? 3'h0 : _GEN_3; // @[Cat.scala 29:58] + wire [2:0] _GEN_5 = 3'h5 == _T_354 ? 3'h0 : _GEN_4; // @[Cat.scala 29:58] + wire [2:0] _GEN_6 = 3'h6 == _T_354 ? 3'h2 : _GEN_5; // @[Cat.scala 29:58] + wire [2:0] _GEN_7 = 3'h7 == _T_354 ? 3'h3 : _GEN_6; // @[Cat.scala 29:58] + wire [24:0] _T_369 = {2'h1,io_in[4:2],2'h1,io_in[9:7],_GEN_7,2'h1,io_in[9:7],_T_359}; // @[Cat.scala 29:58] + wire [30:0] _GEN_173 = {{6'd0}, _T_369}; // @[el2_ifu_compress.scala 101:43] + wire [30:0] _T_370 = _GEN_173 | _T_357; // @[el2_ifu_compress.scala 101:43] + wire [31:0] _T_371_0 = {{6'd0}, _T_325}; // @[el2_ifu_compress.scala 103:19 el2_ifu_compress.scala 103:19] + wire [31:0] _T_371_1 = {{1'd0}, _T_337}; // @[el2_ifu_compress.scala 103:19 el2_ifu_compress.scala 103:19] + wire [31:0] _GEN_9 = 2'h1 == io_in[11:10] ? _T_371_1 : _T_371_0; // @[el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_10 = 2'h2 == io_in[11:10] ? _T_350 : _GEN_9; // @[el2_ifu_compress.scala 18:14] + wire [31:0] _T_371_3 = {{1'd0}, _T_370}; // @[el2_ifu_compress.scala 103:19 el2_ifu_compress.scala 103:19] + wire [31:0] _GEN_11 = 2'h3 == io_in[11:10] ? _T_371_3 : _GEN_10; // @[el2_ifu_compress.scala 18:14] + wire [9:0] _T_383 = io_in[12] ? 10'h3ff : 10'h0; // @[Bitwise.scala 72:12] + wire [20:0] _T_398 = {_T_383,io_in[8],io_in[10:9],io_in[6],io_in[7],io_in[2],io_in[11],io_in[5:3],1'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_461 = {_T_398[20],_T_398[10:1],_T_398[11],_T_398[19:12],5'h0,7'h6f}; // @[Cat.scala 29:58] + wire [4:0] _T_470 = io_in[12] ? 5'h1f : 5'h0; // @[Bitwise.scala 72:12] + wire [12:0] _T_479 = {_T_470,io_in[6:5],io_in[2],io_in[11:10],io_in[4:3],1'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_528 = {_T_479[12],_T_479[10:5],5'h0,2'h1,io_in[9:7],3'h0,_T_479[4:1],_T_479[11],7'h63}; // @[Cat.scala 29:58] + wire [31:0] _T_595 = {_T_479[12],_T_479[10:5],5'h0,2'h1,io_in[9:7],3'h1,_T_479[4:1],_T_479[11],7'h63}; // @[Cat.scala 29:58] + wire [6:0] _T_602 = _T_221 ? 7'h3 : 7'h1f; // @[el2_ifu_compress.scala 109:23] + wire [25:0] _T_611 = {io_in[12],io_in[6:2],io_in[11:7],3'h1,io_in[11:7],7'h13}; // @[Cat.scala 29:58] + wire [28:0] _T_627 = {io_in[4:2],io_in[12],io_in[6:5],3'h0,5'h2,3'h3,io_in[11:7],7'h7}; // @[Cat.scala 29:58] + wire [27:0] _T_642 = {io_in[3:2],io_in[12],io_in[6:4],2'h0,5'h2,3'h2,io_in[11:7],_T_602}; // @[Cat.scala 29:58] + wire [28:0] _T_657 = {io_in[4:2],io_in[12],io_in[6:5],3'h0,5'h2,3'h3,io_in[11:7],_T_602}; // @[Cat.scala 29:58] + wire [24:0] _T_667 = {io_in[6:2],5'h0,3'h0,io_in[11:7],7'h33}; // @[Cat.scala 29:58] + wire [24:0] _T_678 = {io_in[6:2],io_in[11:7],3'h0,io_in[11:7],7'h33}; // @[Cat.scala 29:58] + wire [24:0] _T_689 = {io_in[6:2],io_in[11:7],3'h0,12'h67}; // @[Cat.scala 29:58] + wire [24:0] _T_691 = {_T_689[24:7],7'h1f}; // @[Cat.scala 29:58] + wire [24:0] _T_694 = _T_221 ? _T_689 : _T_691; // @[el2_ifu_compress.scala 130:33] + wire _T_700 = |io_in[6:2]; // @[el2_ifu_compress.scala 131:27] + wire [31:0] _T_671_bits = {{7'd0}, _T_667}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _T_698_bits = {{7'd0}, _T_694}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _T_701_bits = _T_700 ? _T_671_bits : _T_698_bits; // @[el2_ifu_compress.scala 131:22] + wire [4:0] _T_701_rd = _T_700 ? io_in[11:7] : 5'h0; // @[el2_ifu_compress.scala 131:22] + wire [4:0] _T_701_rs1 = _T_700 ? 5'h0 : io_in[11:7]; // @[el2_ifu_compress.scala 131:22] + wire [4:0] _T_701_rs2 = _T_700 ? io_in[6:2] : io_in[6:2]; // @[el2_ifu_compress.scala 131:22] + wire [4:0] _T_701_rs3 = _T_700 ? io_in[31:27] : io_in[31:27]; // @[el2_ifu_compress.scala 131:22] + wire [24:0] _T_707 = {io_in[6:2],io_in[11:7],3'h0,12'he7}; // @[Cat.scala 29:58] + wire [24:0] _T_709 = {_T_689[24:7],7'h73}; // @[Cat.scala 29:58] + wire [24:0] _T_710 = _T_709 | 25'h100000; // @[el2_ifu_compress.scala 133:46] + wire [24:0] _T_713 = _T_221 ? _T_707 : _T_710; // @[el2_ifu_compress.scala 134:33] + wire [31:0] _T_683_bits = {{7'd0}, _T_678}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _T_717_bits = {{7'd0}, _T_713}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _T_720_bits = _T_700 ? _T_683_bits : _T_717_bits; // @[el2_ifu_compress.scala 135:25] + wire [4:0] _T_720_rd = _T_700 ? io_in[11:7] : 5'h1; // @[el2_ifu_compress.scala 135:25] + wire [4:0] _T_720_rs1 = _T_700 ? io_in[11:7] : io_in[11:7]; // @[el2_ifu_compress.scala 135:25] + wire [31:0] _T_722_bits = io_in[12] ? _T_720_bits : _T_701_bits; // @[el2_ifu_compress.scala 136:10] + wire [4:0] _T_722_rd = io_in[12] ? _T_720_rd : _T_701_rd; // @[el2_ifu_compress.scala 136:10] + wire [4:0] _T_722_rs1 = io_in[12] ? _T_720_rs1 : _T_701_rs1; // @[el2_ifu_compress.scala 136:10] + wire [4:0] _T_722_rs2 = io_in[12] ? _T_701_rs2 : _T_701_rs2; // @[el2_ifu_compress.scala 136:10] + wire [4:0] _T_722_rs3 = io_in[12] ? _T_701_rs3 : _T_701_rs3; // @[el2_ifu_compress.scala 136:10] + wire [8:0] _T_726 = {io_in[9:7],io_in[12:10],3'h0}; // @[Cat.scala 29:58] + wire [28:0] _T_738 = {_T_726[8:5],io_in[6:2],5'h2,3'h3,_T_726[4:0],7'h27}; // @[Cat.scala 29:58] + wire [7:0] _T_746 = {io_in[8:7],io_in[12:9],2'h0}; // @[Cat.scala 29:58] + wire [27:0] _T_758 = {_T_746[7:5],io_in[6:2],5'h2,3'h2,_T_746[4:0],7'h23}; // @[Cat.scala 29:58] + wire [28:0] _T_778 = {_T_726[8:5],io_in[6:2],5'h2,3'h3,_T_726[4:0],7'h23}; // @[Cat.scala 29:58] + wire [4:0] _T_826 = {io_in[1:0],io_in[15:13]}; // @[Cat.scala 29:58] + wire [31:0] _T_24_bits = {{2'd0}, _T_18}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _T_44_bits = {{4'd0}, _T_36}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_17 = 5'h1 == _T_826 ? _T_44_bits : _T_24_bits; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_18 = 5'h1 == _T_826 ? _T_14 : _T_14; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_19 = 5'h1 == _T_826 ? _T_30 : 5'h2; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_21 = 5'h1 == _T_826 ? io_in[31:27] : io_in[31:27]; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_66_bits = {{5'd0}, _T_58}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_22 = 5'h2 == _T_826 ? _T_66_bits : _GEN_17; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_23 = 5'h2 == _T_826 ? _T_14 : _GEN_18; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_24 = 5'h2 == _T_826 ? _T_30 : _GEN_19; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_26 = 5'h2 == _T_826 ? io_in[31:27] : _GEN_21; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_86_bits = {{4'd0}, _T_78}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_27 = 5'h3 == _T_826 ? _T_86_bits : _GEN_22; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_28 = 5'h3 == _T_826 ? _T_14 : _GEN_23; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_29 = 5'h3 == _T_826 ? _T_30 : _GEN_24; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_31 = 5'h3 == _T_826 ? io_in[31:27] : _GEN_26; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_117_bits = {{5'd0}, _T_109}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_32 = 5'h4 == _T_826 ? _T_117_bits : _GEN_27; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_33 = 5'h4 == _T_826 ? _T_14 : _GEN_28; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_34 = 5'h4 == _T_826 ? _T_30 : _GEN_29; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_36 = 5'h4 == _T_826 ? io_in[31:27] : _GEN_31; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_144_bits = {{4'd0}, _T_136}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_37 = 5'h5 == _T_826 ? _T_144_bits : _GEN_32; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_38 = 5'h5 == _T_826 ? _T_14 : _GEN_33; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_39 = 5'h5 == _T_826 ? _T_30 : _GEN_34; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_41 = 5'h5 == _T_826 ? io_in[31:27] : _GEN_36; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_175_bits = {{5'd0}, _T_167}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_42 = 5'h6 == _T_826 ? _T_175_bits : _GEN_37; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_43 = 5'h6 == _T_826 ? _T_14 : _GEN_38; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_44 = 5'h6 == _T_826 ? _T_30 : _GEN_39; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_46 = 5'h6 == _T_826 ? io_in[31:27] : _GEN_41; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_202_bits = {{4'd0}, _T_194}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_47 = 5'h7 == _T_826 ? _T_202_bits : _GEN_42; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_48 = 5'h7 == _T_826 ? _T_14 : _GEN_43; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_49 = 5'h7 == _T_826 ? _T_30 : _GEN_44; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_51 = 5'h7 == _T_826 ? io_in[31:27] : _GEN_46; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_52 = 5'h8 == _T_826 ? _T_213 : _GEN_47; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_53 = 5'h8 == _T_826 ? io_in[11:7] : _GEN_48; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_54 = 5'h8 == _T_826 ? io_in[11:7] : _GEN_49; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_55 = 5'h8 == _T_826 ? _T_14 : _GEN_48; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_56 = 5'h8 == _T_826 ? io_in[31:27] : _GEN_51; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_57 = 5'h9 == _T_826 ? _T_233 : _GEN_52; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_58 = 5'h9 == _T_826 ? io_in[11:7] : _GEN_53; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_59 = 5'h9 == _T_826 ? io_in[11:7] : _GEN_54; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_60 = 5'h9 == _T_826 ? _T_14 : _GEN_55; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_61 = 5'h9 == _T_826 ? io_in[31:27] : _GEN_56; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_62 = 5'ha == _T_826 ? _T_249 : _GEN_57; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_63 = 5'ha == _T_826 ? io_in[11:7] : _GEN_58; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_64 = 5'ha == _T_826 ? 5'h0 : _GEN_59; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_65 = 5'ha == _T_826 ? _T_14 : _GEN_60; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_66 = 5'ha == _T_826 ? io_in[31:27] : _GEN_61; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_67 = 5'hb == _T_826 ? _T_314_bits : _GEN_62; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_68 = 5'hb == _T_826 ? _T_314_rd : _GEN_63; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_69 = 5'hb == _T_826 ? _T_314_rd : _GEN_64; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_70 = 5'hb == _T_826 ? _T_314_rs2 : _GEN_65; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_71 = 5'hb == _T_826 ? _T_314_rs3 : _GEN_66; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_72 = 5'hc == _T_826 ? _GEN_11 : _GEN_67; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_73 = 5'hc == _T_826 ? _T_30 : _GEN_68; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_74 = 5'hc == _T_826 ? _T_30 : _GEN_69; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_75 = 5'hc == _T_826 ? _T_14 : _GEN_70; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_76 = 5'hc == _T_826 ? io_in[31:27] : _GEN_71; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_77 = 5'hd == _T_826 ? _T_461 : _GEN_72; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_78 = 5'hd == _T_826 ? 5'h0 : _GEN_73; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_79 = 5'hd == _T_826 ? _T_30 : _GEN_74; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_80 = 5'hd == _T_826 ? _T_14 : _GEN_75; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_81 = 5'hd == _T_826 ? io_in[31:27] : _GEN_76; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_82 = 5'he == _T_826 ? _T_528 : _GEN_77; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_83 = 5'he == _T_826 ? _T_30 : _GEN_78; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_84 = 5'he == _T_826 ? _T_30 : _GEN_79; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_85 = 5'he == _T_826 ? 5'h0 : _GEN_80; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_86 = 5'he == _T_826 ? io_in[31:27] : _GEN_81; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_87 = 5'hf == _T_826 ? _T_595 : _GEN_82; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_88 = 5'hf == _T_826 ? 5'h0 : _GEN_83; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_89 = 5'hf == _T_826 ? _T_30 : _GEN_84; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_90 = 5'hf == _T_826 ? 5'h0 : _GEN_85; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_91 = 5'hf == _T_826 ? io_in[31:27] : _GEN_86; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_616_bits = {{6'd0}, _T_611}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_92 = 5'h10 == _T_826 ? _T_616_bits : _GEN_87; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_93 = 5'h10 == _T_826 ? io_in[11:7] : _GEN_88; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_94 = 5'h10 == _T_826 ? io_in[11:7] : _GEN_89; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_95 = 5'h10 == _T_826 ? io_in[6:2] : _GEN_90; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_96 = 5'h10 == _T_826 ? io_in[31:27] : _GEN_91; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_631_bits = {{3'd0}, _T_627}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_97 = 5'h11 == _T_826 ? _T_631_bits : _GEN_92; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_98 = 5'h11 == _T_826 ? io_in[11:7] : _GEN_93; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_99 = 5'h11 == _T_826 ? 5'h2 : _GEN_94; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_100 = 5'h11 == _T_826 ? io_in[6:2] : _GEN_95; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_101 = 5'h11 == _T_826 ? io_in[31:27] : _GEN_96; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_646_bits = {{4'd0}, _T_642}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_102 = 5'h12 == _T_826 ? _T_646_bits : _GEN_97; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_103 = 5'h12 == _T_826 ? io_in[11:7] : _GEN_98; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_104 = 5'h12 == _T_826 ? 5'h2 : _GEN_99; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_105 = 5'h12 == _T_826 ? io_in[6:2] : _GEN_100; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_106 = 5'h12 == _T_826 ? io_in[31:27] : _GEN_101; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_661_bits = {{3'd0}, _T_657}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_107 = 5'h13 == _T_826 ? _T_661_bits : _GEN_102; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_108 = 5'h13 == _T_826 ? io_in[11:7] : _GEN_103; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_109 = 5'h13 == _T_826 ? 5'h2 : _GEN_104; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_110 = 5'h13 == _T_826 ? io_in[6:2] : _GEN_105; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_111 = 5'h13 == _T_826 ? io_in[31:27] : _GEN_106; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_112 = 5'h14 == _T_826 ? _T_722_bits : _GEN_107; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_113 = 5'h14 == _T_826 ? _T_722_rd : _GEN_108; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_114 = 5'h14 == _T_826 ? _T_722_rs1 : _GEN_109; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_115 = 5'h14 == _T_826 ? _T_722_rs2 : _GEN_110; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_116 = 5'h14 == _T_826 ? _T_722_rs3 : _GEN_111; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_742_bits = {{3'd0}, _T_738}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_117 = 5'h15 == _T_826 ? _T_742_bits : _GEN_112; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_118 = 5'h15 == _T_826 ? io_in[11:7] : _GEN_113; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_119 = 5'h15 == _T_826 ? 5'h2 : _GEN_114; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_120 = 5'h15 == _T_826 ? io_in[6:2] : _GEN_115; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_121 = 5'h15 == _T_826 ? io_in[31:27] : _GEN_116; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_762_bits = {{4'd0}, _T_758}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_122 = 5'h16 == _T_826 ? _T_762_bits : _GEN_117; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_123 = 5'h16 == _T_826 ? io_in[11:7] : _GEN_118; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_124 = 5'h16 == _T_826 ? 5'h2 : _GEN_119; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_125 = 5'h16 == _T_826 ? io_in[6:2] : _GEN_120; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_126 = 5'h16 == _T_826 ? io_in[31:27] : _GEN_121; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _T_782_bits = {{3'd0}, _T_778}; // @[el2_ifu_compress.scala 17:19 el2_ifu_compress.scala 18:14] + wire [31:0] _GEN_127 = 5'h17 == _T_826 ? _T_782_bits : _GEN_122; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_128 = 5'h17 == _T_826 ? io_in[11:7] : _GEN_123; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_129 = 5'h17 == _T_826 ? 5'h2 : _GEN_124; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_130 = 5'h17 == _T_826 ? io_in[6:2] : _GEN_125; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_131 = 5'h17 == _T_826 ? io_in[31:27] : _GEN_126; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_132 = 5'h18 == _T_826 ? io_in : _GEN_127; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_133 = 5'h18 == _T_826 ? io_in[11:7] : _GEN_128; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_134 = 5'h18 == _T_826 ? io_in[19:15] : _GEN_129; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_135 = 5'h18 == _T_826 ? io_in[24:20] : _GEN_130; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_136 = 5'h18 == _T_826 ? io_in[31:27] : _GEN_131; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_137 = 5'h19 == _T_826 ? io_in : _GEN_132; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_138 = 5'h19 == _T_826 ? io_in[11:7] : _GEN_133; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_139 = 5'h19 == _T_826 ? io_in[19:15] : _GEN_134; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_140 = 5'h19 == _T_826 ? io_in[24:20] : _GEN_135; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_141 = 5'h19 == _T_826 ? io_in[31:27] : _GEN_136; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_142 = 5'h1a == _T_826 ? io_in : _GEN_137; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_143 = 5'h1a == _T_826 ? io_in[11:7] : _GEN_138; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_144 = 5'h1a == _T_826 ? io_in[19:15] : _GEN_139; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_145 = 5'h1a == _T_826 ? io_in[24:20] : _GEN_140; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_146 = 5'h1a == _T_826 ? io_in[31:27] : _GEN_141; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_147 = 5'h1b == _T_826 ? io_in : _GEN_142; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_148 = 5'h1b == _T_826 ? io_in[11:7] : _GEN_143; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_149 = 5'h1b == _T_826 ? io_in[19:15] : _GEN_144; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_150 = 5'h1b == _T_826 ? io_in[24:20] : _GEN_145; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_151 = 5'h1b == _T_826 ? io_in[31:27] : _GEN_146; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_152 = 5'h1c == _T_826 ? io_in : _GEN_147; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_153 = 5'h1c == _T_826 ? io_in[11:7] : _GEN_148; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_154 = 5'h1c == _T_826 ? io_in[19:15] : _GEN_149; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_155 = 5'h1c == _T_826 ? io_in[24:20] : _GEN_150; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_156 = 5'h1c == _T_826 ? io_in[31:27] : _GEN_151; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_157 = 5'h1d == _T_826 ? io_in : _GEN_152; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_158 = 5'h1d == _T_826 ? io_in[11:7] : _GEN_153; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_159 = 5'h1d == _T_826 ? io_in[19:15] : _GEN_154; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_160 = 5'h1d == _T_826 ? io_in[24:20] : _GEN_155; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_161 = 5'h1d == _T_826 ? io_in[31:27] : _GEN_156; // @[el2_ifu_compress.scala 195:12] + wire [31:0] _GEN_162 = 5'h1e == _T_826 ? io_in : _GEN_157; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_163 = 5'h1e == _T_826 ? io_in[11:7] : _GEN_158; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_164 = 5'h1e == _T_826 ? io_in[19:15] : _GEN_159; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_165 = 5'h1e == _T_826 ? io_in[24:20] : _GEN_160; // @[el2_ifu_compress.scala 195:12] + wire [4:0] _GEN_166 = 5'h1e == _T_826 ? io_in[31:27] : _GEN_161; // @[el2_ifu_compress.scala 195:12] + assign io_out_bits = 5'h1f == _T_826 ? io_in : _GEN_162; // @[el2_ifu_compress.scala 195:12] + assign io_out_rd = 5'h1f == _T_826 ? io_in[11:7] : _GEN_163; // @[el2_ifu_compress.scala 195:12] + assign io_out_rs1 = 5'h1f == _T_826 ? io_in[19:15] : _GEN_164; // @[el2_ifu_compress.scala 195:12] + assign io_out_rs2 = 5'h1f == _T_826 ? io_in[24:20] : _GEN_165; // @[el2_ifu_compress.scala 195:12] + assign io_out_rs3 = 5'h1f == _T_826 ? io_in[31:27] : _GEN_166; // @[el2_ifu_compress.scala 195:12] + assign io_rvc = io_in[1:0] != 2'h3; // @[el2_ifu_compress.scala 193:12] +endmodule diff --git a/src/main/scala/ifu/el2_ifu_bp_ctl.scala b/src/main/scala/ifu/el2_ifu_bp_ctl.scala index 076052ae..fef6da21 100644 --- a/src/main/scala/ifu/el2_ifu_bp_ctl.scala +++ b/src/main/scala/ifu/el2_ifu_bp_ctl.scala @@ -1,19 +1,149 @@ package ifu - +import include._ import lib._ import chisel3._ import chisel3.util._ class el2_ifu_bp_ctl extends Module with el2_lib { val io = IO (new Bundle { - val in = Input(UInt(32.W)) - val in2 = Input(UInt(32.W)) - val out = Output(UInt()) + val clk = Input(Bool()) + val active_clk = Input(Bool()) + val rst_l = Input(Bool()) + val ic_hit_f = Input(Bool()) + val ifc_fetch_addr_f = Input(UInt(32.W)) + val ifc_fetch_req_f = Input(Bool()) // Fetch request generated by the IFC + // Decode packet containing information if its a brnach or not + val dec_tlu_br0_r_pkt = Input(new el2_br_tlu_pkt_t) + val exu_i0_br_fghr_r = Input(UInt(BHT_GHR_SIZE.W)) // Updated GHR from the exu + val exu_i0_br_index_r = Input(UInt((BTB_ADDR_HI-BTB_ADDR_LO).W)) // Way from where the btb got a hit + val dec_tlu_flush_lower_wb = Input(Bool()) + val dec_tlu_flush_leak_one_wb = Input(Bool()) + val dec_tlu_bpred_disable = Input(Bool()) + // Exu misprediction packet + val exu_mp_pkt = Input(new el2_predict_pkt_t) + val exu_mp_eghr = Input(UInt(BHT_GHR_SIZE.W)) + val exu_mp_fghr = Input(UInt(BHT_GHR_SIZE.W)) + val exu_mp_index = Input(UInt((BTB_ADDR_HI-BTB_ADDR_LO).W)) // Misprediction index + val exu_mp_btag = Input(UInt(BTB_BTAG_SIZE.W)) + val exu_flush_final = Input(Bool()) + + val ifu_bp_hit_taken_f = Output(Bool()) + val ifu_bp_btb_target_f = Output(UInt(31.W)) + val ifu_bp_inst_mask_f = Output(Bool()) + val ifu_bp_fghr_f = Output(UInt(BHT_GHR_SIZE.W)) + val ifu_bp_way_f = Output(UInt(2.W)) + val ifu_bp_ret_f = Output(UInt(2.W)) + val ifu_bp_hist1_f = Output(UInt(2.W)) + val ifu_bp_hist0_f = Output(UInt(2.W)) + val ifu_bp_pc4_f = Output(UInt(2.W)) + val ifu_bp_valid_f = Output(UInt(2.W)) + val ifu_bp_poffset_f = Output(UInt(12.W)) }) - io.out := el2_btb_ghr_hash(io.in,io.in2) + io.ifu_bp_hit_taken_f := 0.U + io.ifu_bp_btb_target_f := 0.U + io.ifu_bp_inst_mask_f := 0.U + io.ifu_bp_fghr_f := 0.U + io.ifu_bp_way_f := 0.U + io.ifu_bp_ret_f := 0.U + io.ifu_bp_hist1_f := 0.U + io.ifu_bp_hist0_f := 0.U + io.ifu_bp_pc4_f := 0.U + io.ifu_bp_valid_f := 0.U + io.ifu_bp_poffset_f := 0.U + + val TAG_START = 16+BTB_BTAG_SIZE + val PC4 = 4 + val BOFF = 3 + val CALL = 2 + val RET = 1 + val BV = 0 + val LRU_SIZE = BTB_ARRAY_DEPTH + val NUM_BHT_LOOP = if(BHT_ARRAY_DEPTH > 16) 16 else BHT_ARRAY_DEPTH + val NUM_BHT_LOOP_INNER_HI = if(BHT_ARRAY_DEPTH > 16) BHT_ADDR_LO+3 else BHT_ADDR_HI + val NUM_BHT_LOOP_OUTER_LO = if(BHT_ARRAY_DEPTH > 16) BHT_ADDR_LO+4 else BHT_ADDR_LO + val BHT_NO_ADDR_MATCH = BHT_ARRAY_DEPTH <= 16 + + val leak_one_f = WireInit(Bool(), 0.U) + val exu_mp_valid = io.exu_mp_pkt.misp & ~leak_one_f + val exu_mp_boffset = io.exu_mp_pkt.boffset + val exu_mp_pc4 = io.exu_mp_pkt.pc4 + val exu_mp_call = io.exu_mp_pkt.pcall + val exu_mp_ret = io.exu_mp_pkt.pret + val exu_mp_ja = io.exu_mp_pkt.pja + val exu_mp_way = io.exu_mp_pkt.way + val exu_mp_hist = io.exu_mp_pkt.hist + val exu_mp_tgt = io.exu_mp_pkt.toffset + val exu_mp_addr = io.exu_mp_index + val exu_mp_ataken = io.exu_mp_pkt.ataken + + // LM: Its a commit or update packet + val dec_tlu_br0_v_wb = io.dec_tlu_br0_r_pkt.valid + val dec_tlu_br0_hist_wb = io.dec_tlu_br0_r_pkt.hist + val dec_tlu_br0_addr_wb = io.exu_i0_br_index_r + val dec_tlu_br0_error_wb = io.dec_tlu_br0_r_pkt.br_error + val dec_tlu_br0_middle_wb = io.dec_tlu_br0_r_pkt.middle + val dec_tlu_br0_way_wb = io.dec_tlu_br0_r_pkt.way + val dec_tlu_br0_start_error_wb = io.dec_tlu_br0_r_pkt.br_start_error + val exu_i0_br_fghr_wb = io.exu_i0_br_fghr_r + + val fetch_rd_tag_p1_f = WireInit(UInt(BTB_BTAG_SIZE.W), 0.U) + val fetch_rd_tag_f = WireInit(UInt(BTB_BTAG_SIZE.W), 0.U) + val bht_dir_f = WireInit(UInt(2.W), 0.U) + val dec_tlu_error_wb = WireInit(Bool(), 0.U) + val btb_error_addr_wb = WireInit(UInt((BTB_ADDR_HI-BTB_ADDR_LO).W), 0.U) + val btb_bank0_rd_data_way0_f = WireInit(UInt((TAG_START+1).W), 0.U) + val btb_bank0_rd_data_way1_f = WireInit(UInt((TAG_START+1).W), 0.U) + val btb_bank0_rd_data_way0_p1_f = WireInit(UInt((TAG_START+1).W), 0.U) + val btb_bank0_rd_data_way1_p1_f = WireInit(UInt((TAG_START+1).W), 0.U) + + val dec_tlu_way_wb = WireInit(Bool(), 0.U) + // Hash the first PC + val btb_rd_addr_f = el2_btb_addr_hash(io.ifc_fetch_addr_f) + // Second pc = pc +4 + val fetch_addr_p1_f = io.ifc_fetch_addr_f + 4.U + // Hash the second pc + val btb_rd_addr_p1_f = el2_btb_addr_hash(fetch_addr_p1_f) + + // TODO + val btb_sel_f = Cat(~bht_dir_f(0),bht_dir_f(0)) + + // Checking of the pc is a multiple of 4, if it is fetch-start will be "01" + val fetch_start_f = Cat(io.ifc_fetch_addr_f(1),~io.ifc_fetch_addr_f(1)) + + // If there is an error write-back from the dec check if the current pc is equal to the write-bcak pc + val branch_error_collision_f = dec_tlu_error_wb & (btb_error_addr_wb === btb_rd_addr_f) + val branch_error_collision_p1_f = dec_tlu_error_wb & (btb_error_addr_wb === btb_rd_addr_p1_f) + + // If there is an error write back but the address are from different bank + val branch_error_bank_conflict_f = branch_error_collision_f & dec_tlu_error_wb + val branch_error_bank_conflict_p1_f = branch_error_collision_p1_f & dec_tlu_error_wb + + // There is a misprediction and the exu is writing back + val fetch_mp_collision_f = (io.exu_mp_btag === fetch_rd_tag_f) & exu_mp_valid & io.ifc_fetch_req_f & (exu_mp_addr === btb_rd_addr_f) + val fetch_mp_collision_p1_f = (io.exu_mp_btag === fetch_rd_tag_p1_f) & exu_mp_valid & io.ifc_fetch_req_f & (exu_mp_addr === btb_rd_addr_p1_f) + + val leak_one_f_d1 = RegNext(leak_one_f, init = 0.U) + val dec_tlu_way_wb_f = RegNext(dec_tlu_way_wb, init = 0.U) + val exu_mp_way_f = RegNext(exu_mp_way, init = 0.U) + val exu_flush_final_d1 = RegNext(io.exu_flush_final, init = 0.U) + // TODO + leak_one_f := (io.dec_tlu_flush_leak_one_wb & io.dec_tlu_flush_lower_wb) | (leak_one_f_d1 & io.dec_tlu_flush_lower_wb) + + // For a tag to match the branch should be valid tag should match and a fetch request should be generated + val tag_match_way0_f = btb_bank0_rd_data_way0_f(BV) & (btb_bank0_rd_data_way0_f(TAG_START,17) === fetch_rd_tag_f) & + ~(dec_tlu_way_wb_f & branch_error_bank_conflict_f) & io.ifc_fetch_req_f & ~leak_one_f + + val tag_match_way1_f = btb_bank0_rd_data_way1_f(BV) & (btb_bank0_rd_data_way1_f(TAG_START,17) === fetch_rd_tag_f) & + ~(dec_tlu_way_wb_f & branch_error_bank_conflict_f) & io.ifc_fetch_req_f & ~leak_one_f + + val tag_match_way0_p1_f = btb_bank0_rd_data_way0_p1_f(BV) & (btb_bank0_rd_data_way0_p1_f(TAG_START,17) === fetch_rd_tag_p1_f) & + ~(dec_tlu_way_wb_f & branch_error_bank_conflict_f) & io.ifc_fetch_req_f & ~leak_one_f + + val tag_match_way1_p1_f = btb_bank0_rd_data_way1_p1_f(BV) & (btb_bank0_rd_data_way1_p1_f(TAG_START,17) === fetch_rd_tag_p1_f) & + ~(dec_tlu_way_wb_f & branch_error_bank_conflict_f) & io.ifc_fetch_req_f & ~leak_one_f } -//object ifu_ic extends App { -// println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_bp_ctl())) -//} +object ifu_bp extends App { + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_bp_ctl())) +} diff --git a/src/main/scala/ifu/el2_ifu_compress.scala b/src/main/scala/ifu/el2_ifu_compress.scala index 04fe0ae3..70ad77d0 100644 --- a/src/main/scala/ifu/el2_ifu_compress.scala +++ b/src/main/scala/ifu/el2_ifu_compress.scala @@ -219,4 +219,8 @@ class el2_ifu_compress( val XLen: Int, val usingCompressed: Boolean) extends Mod io.rvc := false.B io.out := new RVCDecoder(io.in, XLen).passthrough } +} + +object ifu_compress extends App { + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_compress(64, true))) } \ No newline at end of file diff --git a/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl$$anon$1.class b/target/scala-2.12/classes/ifu/el2_ifu_aln_ctl$$anon$1.class index c2b54d653cbe675ed5374cc0f680e745020c60c6..69a590c67827b3bf18c1cda69f1dd59f94d27b6b 100644 GIT binary patch literal 6660 zcmai3d3+m375+xDqe|KM$YJMp4kfXjHcp&0J)AbgiJPc62Z@ukp>(@mt?X^&m5^3V zOzA}_frbL*C^rC{KfzM7x;EYvgFMy$?xZRZ)V;%@6F89 zH?xxq|9Soe09)`cfhBIP(&yy+O-j?sd#3H@(`m~qcz!d_^ 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