diff --git a/el2_ifu_mem_ctl.fir b/el2_ifu_mem_ctl.fir
index 72a3b2d2..f591ecfa 100644
--- a/el2_ifu_mem_ctl.fir
+++ b/el2_ifu_mem_ctl.fir
@@ -3342,7 +3342,7 @@ circuit el2_ifu_mem_ctl :
     node _T_2458 = eq(_T_2457, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 470:60]
     node _T_2459 = and(_T_2456, _T_2458) @[el2_ifu_mem_ctl.scala 470:58]
     ic_rd_parity_final_err <= _T_2459 @[el2_ifu_mem_ctl.scala 470:26]
-    wire ifu_ic_rw_int_addr_ff : UInt<6>
+    wire ifu_ic_rw_int_addr_ff : UInt<7>
     ifu_ic_rw_int_addr_ff <= UInt<1>("h00")
     wire perr_sb_write_status : UInt<1>
     perr_sb_write_status <= UInt<1>("h00")
diff --git a/el2_ifu_mem_ctl.v b/el2_ifu_mem_ctl.v
index 9ad2fb85..c2fb0be6 100644
--- a/el2_ifu_mem_ctl.v
+++ b/el2_ifu_mem_ctl.v
@@ -972,791 +972,789 @@ module el2_ifu_mem_ctl(
   wire  _T_191 = _T_19 | ic_miss_under_miss_f; // @[el2_ifu_mem_ctl.scala 260:57]
   wire  sel_hold_imb_scnd = _T_191 & _T_174; // @[el2_ifu_mem_ctl.scala 260:81]
   reg  way_status_mb_scnd_ff; // @[el2_ifu_mem_ctl.scala 268:35]
-  reg [6:0] _T_5166; // @[el2_ifu_mem_ctl.scala 728:14]
-  wire [5:0] ifu_ic_rw_int_addr_ff = _T_5166[5:0]; // @[el2_ifu_mem_ctl.scala 727:27]
-  wire [6:0] _GEN_473 = {{1'd0}, ifu_ic_rw_int_addr_ff}; // @[el2_ifu_mem_ctl.scala 724:121]
-  wire  _T_5031 = _GEN_473 == 7'h7f; // @[el2_ifu_mem_ctl.scala 724:121]
+  reg [6:0] ifu_ic_rw_int_addr_ff; // @[el2_ifu_mem_ctl.scala 728:14]
+  wire  _T_5031 = ifu_ic_rw_int_addr_ff == 7'h7f; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_5033 = _T_5031 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4522; // @[Reg.scala 27:20]
   wire  way_status_out_127 = _T_4522[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_474 = {{5'd0}, way_status_out_127}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_5034 = _T_5033 & _GEN_474; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_5027 = _GEN_473 == 7'h7e; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_473 = {{5'd0}, way_status_out_127}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_5034 = _T_5033 & _GEN_473; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_5027 = ifu_ic_rw_int_addr_ff == 7'h7e; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_5029 = _T_5027 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4518; // @[Reg.scala 27:20]
   wire  way_status_out_126 = _T_4518[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_476 = {{5'd0}, way_status_out_126}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_5030 = _T_5029 & _GEN_476; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_5023 = _GEN_473 == 7'h7d; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_474 = {{5'd0}, way_status_out_126}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_5030 = _T_5029 & _GEN_474; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_5023 = ifu_ic_rw_int_addr_ff == 7'h7d; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_5025 = _T_5023 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4514; // @[Reg.scala 27:20]
   wire  way_status_out_125 = _T_4514[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_478 = {{5'd0}, way_status_out_125}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_5026 = _T_5025 & _GEN_478; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_5019 = _GEN_473 == 7'h7c; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_475 = {{5'd0}, way_status_out_125}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_5026 = _T_5025 & _GEN_475; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_5019 = ifu_ic_rw_int_addr_ff == 7'h7c; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_5021 = _T_5019 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4510; // @[Reg.scala 27:20]
   wire  way_status_out_124 = _T_4510[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_480 = {{5'd0}, way_status_out_124}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_5022 = _T_5021 & _GEN_480; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_5015 = _GEN_473 == 7'h7b; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_476 = {{5'd0}, way_status_out_124}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_5022 = _T_5021 & _GEN_476; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_5015 = ifu_ic_rw_int_addr_ff == 7'h7b; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_5017 = _T_5015 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4506; // @[Reg.scala 27:20]
   wire  way_status_out_123 = _T_4506[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_482 = {{5'd0}, way_status_out_123}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_5018 = _T_5017 & _GEN_482; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_5011 = _GEN_473 == 7'h7a; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_477 = {{5'd0}, way_status_out_123}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_5018 = _T_5017 & _GEN_477; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_5011 = ifu_ic_rw_int_addr_ff == 7'h7a; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_5013 = _T_5011 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4502; // @[Reg.scala 27:20]
   wire  way_status_out_122 = _T_4502[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_484 = {{5'd0}, way_status_out_122}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_5014 = _T_5013 & _GEN_484; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_5007 = _GEN_473 == 7'h79; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_478 = {{5'd0}, way_status_out_122}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_5014 = _T_5013 & _GEN_478; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_5007 = ifu_ic_rw_int_addr_ff == 7'h79; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_5009 = _T_5007 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4498; // @[Reg.scala 27:20]
   wire  way_status_out_121 = _T_4498[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_486 = {{5'd0}, way_status_out_121}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_5010 = _T_5009 & _GEN_486; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_5003 = _GEN_473 == 7'h78; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_479 = {{5'd0}, way_status_out_121}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_5010 = _T_5009 & _GEN_479; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_5003 = ifu_ic_rw_int_addr_ff == 7'h78; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_5005 = _T_5003 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4494; // @[Reg.scala 27:20]
   wire  way_status_out_120 = _T_4494[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_488 = {{5'd0}, way_status_out_120}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_5006 = _T_5005 & _GEN_488; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4999 = _GEN_473 == 7'h77; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_480 = {{5'd0}, way_status_out_120}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_5006 = _T_5005 & _GEN_480; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4999 = ifu_ic_rw_int_addr_ff == 7'h77; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_5001 = _T_4999 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4490; // @[Reg.scala 27:20]
   wire  way_status_out_119 = _T_4490[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_490 = {{5'd0}, way_status_out_119}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_5002 = _T_5001 & _GEN_490; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4995 = _GEN_473 == 7'h76; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_481 = {{5'd0}, way_status_out_119}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_5002 = _T_5001 & _GEN_481; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4995 = ifu_ic_rw_int_addr_ff == 7'h76; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4997 = _T_4995 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4486; // @[Reg.scala 27:20]
   wire  way_status_out_118 = _T_4486[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_492 = {{5'd0}, way_status_out_118}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4998 = _T_4997 & _GEN_492; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_482 = {{5'd0}, way_status_out_118}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4998 = _T_4997 & _GEN_482; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [59:0] _T_5043 = {_T_5034,_T_5030,_T_5026,_T_5022,_T_5018,_T_5014,_T_5010,_T_5006,_T_5002,_T_4998}; // @[Cat.scala 29:58]
-  wire  _T_4991 = _GEN_473 == 7'h75; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4991 = ifu_ic_rw_int_addr_ff == 7'h75; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4993 = _T_4991 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4482; // @[Reg.scala 27:20]
   wire  way_status_out_117 = _T_4482[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_494 = {{5'd0}, way_status_out_117}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4994 = _T_4993 & _GEN_494; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4987 = _GEN_473 == 7'h74; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_483 = {{5'd0}, way_status_out_117}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4994 = _T_4993 & _GEN_483; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4987 = ifu_ic_rw_int_addr_ff == 7'h74; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4989 = _T_4987 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4478; // @[Reg.scala 27:20]
   wire  way_status_out_116 = _T_4478[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_496 = {{5'd0}, way_status_out_116}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4990 = _T_4989 & _GEN_496; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4983 = _GEN_473 == 7'h73; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_484 = {{5'd0}, way_status_out_116}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4990 = _T_4989 & _GEN_484; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4983 = ifu_ic_rw_int_addr_ff == 7'h73; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4985 = _T_4983 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4474; // @[Reg.scala 27:20]
   wire  way_status_out_115 = _T_4474[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_498 = {{5'd0}, way_status_out_115}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4986 = _T_4985 & _GEN_498; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4979 = _GEN_473 == 7'h72; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_485 = {{5'd0}, way_status_out_115}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4986 = _T_4985 & _GEN_485; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4979 = ifu_ic_rw_int_addr_ff == 7'h72; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4981 = _T_4979 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4470; // @[Reg.scala 27:20]
   wire  way_status_out_114 = _T_4470[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_500 = {{5'd0}, way_status_out_114}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4982 = _T_4981 & _GEN_500; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4975 = _GEN_473 == 7'h71; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_486 = {{5'd0}, way_status_out_114}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4982 = _T_4981 & _GEN_486; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4975 = ifu_ic_rw_int_addr_ff == 7'h71; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4977 = _T_4975 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4466; // @[Reg.scala 27:20]
   wire  way_status_out_113 = _T_4466[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_502 = {{5'd0}, way_status_out_113}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4978 = _T_4977 & _GEN_502; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4971 = _GEN_473 == 7'h70; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_487 = {{5'd0}, way_status_out_113}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4978 = _T_4977 & _GEN_487; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4971 = ifu_ic_rw_int_addr_ff == 7'h70; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4973 = _T_4971 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4462; // @[Reg.scala 27:20]
   wire  way_status_out_112 = _T_4462[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_504 = {{5'd0}, way_status_out_112}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4974 = _T_4973 & _GEN_504; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4967 = _GEN_473 == 7'h6f; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_488 = {{5'd0}, way_status_out_112}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4974 = _T_4973 & _GEN_488; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4967 = ifu_ic_rw_int_addr_ff == 7'h6f; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4969 = _T_4967 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4458; // @[Reg.scala 27:20]
   wire  way_status_out_111 = _T_4458[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_506 = {{5'd0}, way_status_out_111}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4970 = _T_4969 & _GEN_506; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4963 = _GEN_473 == 7'h6e; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_489 = {{5'd0}, way_status_out_111}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4970 = _T_4969 & _GEN_489; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4963 = ifu_ic_rw_int_addr_ff == 7'h6e; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4965 = _T_4963 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4454; // @[Reg.scala 27:20]
   wire  way_status_out_110 = _T_4454[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_508 = {{5'd0}, way_status_out_110}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4966 = _T_4965 & _GEN_508; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4959 = _GEN_473 == 7'h6d; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_490 = {{5'd0}, way_status_out_110}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4966 = _T_4965 & _GEN_490; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4959 = ifu_ic_rw_int_addr_ff == 7'h6d; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4961 = _T_4959 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4450; // @[Reg.scala 27:20]
   wire  way_status_out_109 = _T_4450[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_510 = {{5'd0}, way_status_out_109}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4962 = _T_4961 & _GEN_510; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_491 = {{5'd0}, way_status_out_109}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4962 = _T_4961 & _GEN_491; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [113:0] _T_5052 = {_T_5043,_T_4994,_T_4990,_T_4986,_T_4982,_T_4978,_T_4974,_T_4970,_T_4966,_T_4962}; // @[Cat.scala 29:58]
-  wire  _T_4955 = _GEN_473 == 7'h6c; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4955 = ifu_ic_rw_int_addr_ff == 7'h6c; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4957 = _T_4955 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4446; // @[Reg.scala 27:20]
   wire  way_status_out_108 = _T_4446[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_512 = {{5'd0}, way_status_out_108}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4958 = _T_4957 & _GEN_512; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4951 = _GEN_473 == 7'h6b; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_492 = {{5'd0}, way_status_out_108}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4958 = _T_4957 & _GEN_492; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4951 = ifu_ic_rw_int_addr_ff == 7'h6b; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4953 = _T_4951 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4442; // @[Reg.scala 27:20]
   wire  way_status_out_107 = _T_4442[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_514 = {{5'd0}, way_status_out_107}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4954 = _T_4953 & _GEN_514; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4947 = _GEN_473 == 7'h6a; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_493 = {{5'd0}, way_status_out_107}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4954 = _T_4953 & _GEN_493; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4947 = ifu_ic_rw_int_addr_ff == 7'h6a; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4949 = _T_4947 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4438; // @[Reg.scala 27:20]
   wire  way_status_out_106 = _T_4438[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_516 = {{5'd0}, way_status_out_106}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4950 = _T_4949 & _GEN_516; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4943 = _GEN_473 == 7'h69; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_494 = {{5'd0}, way_status_out_106}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4950 = _T_4949 & _GEN_494; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4943 = ifu_ic_rw_int_addr_ff == 7'h69; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4945 = _T_4943 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4434; // @[Reg.scala 27:20]
   wire  way_status_out_105 = _T_4434[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_518 = {{5'd0}, way_status_out_105}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4946 = _T_4945 & _GEN_518; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4939 = _GEN_473 == 7'h68; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_495 = {{5'd0}, way_status_out_105}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4946 = _T_4945 & _GEN_495; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4939 = ifu_ic_rw_int_addr_ff == 7'h68; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4941 = _T_4939 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4430; // @[Reg.scala 27:20]
   wire  way_status_out_104 = _T_4430[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_520 = {{5'd0}, way_status_out_104}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4942 = _T_4941 & _GEN_520; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4935 = _GEN_473 == 7'h67; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_496 = {{5'd0}, way_status_out_104}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4942 = _T_4941 & _GEN_496; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4935 = ifu_ic_rw_int_addr_ff == 7'h67; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4937 = _T_4935 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4426; // @[Reg.scala 27:20]
   wire  way_status_out_103 = _T_4426[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_522 = {{5'd0}, way_status_out_103}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4938 = _T_4937 & _GEN_522; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4931 = _GEN_473 == 7'h66; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_497 = {{5'd0}, way_status_out_103}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4938 = _T_4937 & _GEN_497; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4931 = ifu_ic_rw_int_addr_ff == 7'h66; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4933 = _T_4931 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4422; // @[Reg.scala 27:20]
   wire  way_status_out_102 = _T_4422[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_524 = {{5'd0}, way_status_out_102}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4934 = _T_4933 & _GEN_524; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4927 = _GEN_473 == 7'h65; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_498 = {{5'd0}, way_status_out_102}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4934 = _T_4933 & _GEN_498; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4927 = ifu_ic_rw_int_addr_ff == 7'h65; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4929 = _T_4927 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4418; // @[Reg.scala 27:20]
   wire  way_status_out_101 = _T_4418[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_526 = {{5'd0}, way_status_out_101}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4930 = _T_4929 & _GEN_526; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4923 = _GEN_473 == 7'h64; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_499 = {{5'd0}, way_status_out_101}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4930 = _T_4929 & _GEN_499; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4923 = ifu_ic_rw_int_addr_ff == 7'h64; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4925 = _T_4923 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4414; // @[Reg.scala 27:20]
   wire  way_status_out_100 = _T_4414[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_528 = {{5'd0}, way_status_out_100}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4926 = _T_4925 & _GEN_528; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_500 = {{5'd0}, way_status_out_100}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4926 = _T_4925 & _GEN_500; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [167:0] _T_5061 = {_T_5052,_T_4958,_T_4954,_T_4950,_T_4946,_T_4942,_T_4938,_T_4934,_T_4930,_T_4926}; // @[Cat.scala 29:58]
-  wire  _T_4919 = _GEN_473 == 7'h63; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4919 = ifu_ic_rw_int_addr_ff == 7'h63; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4921 = _T_4919 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4410; // @[Reg.scala 27:20]
   wire  way_status_out_99 = _T_4410[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_530 = {{5'd0}, way_status_out_99}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4922 = _T_4921 & _GEN_530; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4915 = _GEN_473 == 7'h62; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_501 = {{5'd0}, way_status_out_99}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4922 = _T_4921 & _GEN_501; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4915 = ifu_ic_rw_int_addr_ff == 7'h62; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4917 = _T_4915 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4406; // @[Reg.scala 27:20]
   wire  way_status_out_98 = _T_4406[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_532 = {{5'd0}, way_status_out_98}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4918 = _T_4917 & _GEN_532; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4911 = _GEN_473 == 7'h61; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_502 = {{5'd0}, way_status_out_98}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4918 = _T_4917 & _GEN_502; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4911 = ifu_ic_rw_int_addr_ff == 7'h61; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4913 = _T_4911 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4402; // @[Reg.scala 27:20]
   wire  way_status_out_97 = _T_4402[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_534 = {{5'd0}, way_status_out_97}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4914 = _T_4913 & _GEN_534; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4907 = _GEN_473 == 7'h60; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_503 = {{5'd0}, way_status_out_97}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4914 = _T_4913 & _GEN_503; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4907 = ifu_ic_rw_int_addr_ff == 7'h60; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4909 = _T_4907 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4398; // @[Reg.scala 27:20]
   wire  way_status_out_96 = _T_4398[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_536 = {{5'd0}, way_status_out_96}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4910 = _T_4909 & _GEN_536; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4903 = _GEN_473 == 7'h5f; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_504 = {{5'd0}, way_status_out_96}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4910 = _T_4909 & _GEN_504; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4903 = ifu_ic_rw_int_addr_ff == 7'h5f; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4905 = _T_4903 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4394; // @[Reg.scala 27:20]
   wire  way_status_out_95 = _T_4394[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_538 = {{5'd0}, way_status_out_95}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4906 = _T_4905 & _GEN_538; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4899 = _GEN_473 == 7'h5e; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_505 = {{5'd0}, way_status_out_95}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4906 = _T_4905 & _GEN_505; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4899 = ifu_ic_rw_int_addr_ff == 7'h5e; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4901 = _T_4899 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4390; // @[Reg.scala 27:20]
   wire  way_status_out_94 = _T_4390[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_540 = {{5'd0}, way_status_out_94}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4902 = _T_4901 & _GEN_540; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4895 = _GEN_473 == 7'h5d; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_506 = {{5'd0}, way_status_out_94}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4902 = _T_4901 & _GEN_506; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4895 = ifu_ic_rw_int_addr_ff == 7'h5d; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4897 = _T_4895 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4386; // @[Reg.scala 27:20]
   wire  way_status_out_93 = _T_4386[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_542 = {{5'd0}, way_status_out_93}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4898 = _T_4897 & _GEN_542; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4891 = _GEN_473 == 7'h5c; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_507 = {{5'd0}, way_status_out_93}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4898 = _T_4897 & _GEN_507; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4891 = ifu_ic_rw_int_addr_ff == 7'h5c; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4893 = _T_4891 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4382; // @[Reg.scala 27:20]
   wire  way_status_out_92 = _T_4382[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_544 = {{5'd0}, way_status_out_92}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4894 = _T_4893 & _GEN_544; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4887 = _GEN_473 == 7'h5b; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_508 = {{5'd0}, way_status_out_92}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4894 = _T_4893 & _GEN_508; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4887 = ifu_ic_rw_int_addr_ff == 7'h5b; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4889 = _T_4887 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4378; // @[Reg.scala 27:20]
   wire  way_status_out_91 = _T_4378[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_546 = {{5'd0}, way_status_out_91}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4890 = _T_4889 & _GEN_546; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_509 = {{5'd0}, way_status_out_91}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4890 = _T_4889 & _GEN_509; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [221:0] _T_5070 = {_T_5061,_T_4922,_T_4918,_T_4914,_T_4910,_T_4906,_T_4902,_T_4898,_T_4894,_T_4890}; // @[Cat.scala 29:58]
-  wire  _T_4883 = _GEN_473 == 7'h5a; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4883 = ifu_ic_rw_int_addr_ff == 7'h5a; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4885 = _T_4883 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4374; // @[Reg.scala 27:20]
   wire  way_status_out_90 = _T_4374[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_548 = {{5'd0}, way_status_out_90}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4886 = _T_4885 & _GEN_548; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4879 = _GEN_473 == 7'h59; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_510 = {{5'd0}, way_status_out_90}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4886 = _T_4885 & _GEN_510; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4879 = ifu_ic_rw_int_addr_ff == 7'h59; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4881 = _T_4879 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4370; // @[Reg.scala 27:20]
   wire  way_status_out_89 = _T_4370[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_550 = {{5'd0}, way_status_out_89}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4882 = _T_4881 & _GEN_550; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4875 = _GEN_473 == 7'h58; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_511 = {{5'd0}, way_status_out_89}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4882 = _T_4881 & _GEN_511; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4875 = ifu_ic_rw_int_addr_ff == 7'h58; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4877 = _T_4875 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4366; // @[Reg.scala 27:20]
   wire  way_status_out_88 = _T_4366[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_552 = {{5'd0}, way_status_out_88}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4878 = _T_4877 & _GEN_552; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4871 = _GEN_473 == 7'h57; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_512 = {{5'd0}, way_status_out_88}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4878 = _T_4877 & _GEN_512; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4871 = ifu_ic_rw_int_addr_ff == 7'h57; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4873 = _T_4871 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4362; // @[Reg.scala 27:20]
   wire  way_status_out_87 = _T_4362[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_554 = {{5'd0}, way_status_out_87}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4874 = _T_4873 & _GEN_554; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4867 = _GEN_473 == 7'h56; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_513 = {{5'd0}, way_status_out_87}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4874 = _T_4873 & _GEN_513; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4867 = ifu_ic_rw_int_addr_ff == 7'h56; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4869 = _T_4867 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4358; // @[Reg.scala 27:20]
   wire  way_status_out_86 = _T_4358[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_556 = {{5'd0}, way_status_out_86}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4870 = _T_4869 & _GEN_556; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4863 = _GEN_473 == 7'h55; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_514 = {{5'd0}, way_status_out_86}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4870 = _T_4869 & _GEN_514; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4863 = ifu_ic_rw_int_addr_ff == 7'h55; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4865 = _T_4863 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4354; // @[Reg.scala 27:20]
   wire  way_status_out_85 = _T_4354[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_558 = {{5'd0}, way_status_out_85}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4866 = _T_4865 & _GEN_558; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4859 = _GEN_473 == 7'h54; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_515 = {{5'd0}, way_status_out_85}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4866 = _T_4865 & _GEN_515; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4859 = ifu_ic_rw_int_addr_ff == 7'h54; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4861 = _T_4859 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4350; // @[Reg.scala 27:20]
   wire  way_status_out_84 = _T_4350[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_560 = {{5'd0}, way_status_out_84}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4862 = _T_4861 & _GEN_560; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4855 = _GEN_473 == 7'h53; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_516 = {{5'd0}, way_status_out_84}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4862 = _T_4861 & _GEN_516; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4855 = ifu_ic_rw_int_addr_ff == 7'h53; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4857 = _T_4855 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4346; // @[Reg.scala 27:20]
   wire  way_status_out_83 = _T_4346[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_562 = {{5'd0}, way_status_out_83}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4858 = _T_4857 & _GEN_562; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4851 = _GEN_473 == 7'h52; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_517 = {{5'd0}, way_status_out_83}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4858 = _T_4857 & _GEN_517; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4851 = ifu_ic_rw_int_addr_ff == 7'h52; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4853 = _T_4851 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4342; // @[Reg.scala 27:20]
   wire  way_status_out_82 = _T_4342[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_564 = {{5'd0}, way_status_out_82}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4854 = _T_4853 & _GEN_564; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_518 = {{5'd0}, way_status_out_82}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4854 = _T_4853 & _GEN_518; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [275:0] _T_5079 = {_T_5070,_T_4886,_T_4882,_T_4878,_T_4874,_T_4870,_T_4866,_T_4862,_T_4858,_T_4854}; // @[Cat.scala 29:58]
-  wire  _T_4847 = _GEN_473 == 7'h51; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4847 = ifu_ic_rw_int_addr_ff == 7'h51; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4849 = _T_4847 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4338; // @[Reg.scala 27:20]
   wire  way_status_out_81 = _T_4338[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_566 = {{5'd0}, way_status_out_81}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4850 = _T_4849 & _GEN_566; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4843 = _GEN_473 == 7'h50; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_519 = {{5'd0}, way_status_out_81}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4850 = _T_4849 & _GEN_519; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4843 = ifu_ic_rw_int_addr_ff == 7'h50; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4845 = _T_4843 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4334; // @[Reg.scala 27:20]
   wire  way_status_out_80 = _T_4334[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_568 = {{5'd0}, way_status_out_80}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4846 = _T_4845 & _GEN_568; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4839 = _GEN_473 == 7'h4f; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_520 = {{5'd0}, way_status_out_80}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4846 = _T_4845 & _GEN_520; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4839 = ifu_ic_rw_int_addr_ff == 7'h4f; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4841 = _T_4839 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4330; // @[Reg.scala 27:20]
   wire  way_status_out_79 = _T_4330[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_570 = {{5'd0}, way_status_out_79}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4842 = _T_4841 & _GEN_570; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4835 = _GEN_473 == 7'h4e; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_521 = {{5'd0}, way_status_out_79}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4842 = _T_4841 & _GEN_521; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4835 = ifu_ic_rw_int_addr_ff == 7'h4e; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4837 = _T_4835 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4326; // @[Reg.scala 27:20]
   wire  way_status_out_78 = _T_4326[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_572 = {{5'd0}, way_status_out_78}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4838 = _T_4837 & _GEN_572; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4831 = _GEN_473 == 7'h4d; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_522 = {{5'd0}, way_status_out_78}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4838 = _T_4837 & _GEN_522; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4831 = ifu_ic_rw_int_addr_ff == 7'h4d; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4833 = _T_4831 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4322; // @[Reg.scala 27:20]
   wire  way_status_out_77 = _T_4322[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_574 = {{5'd0}, way_status_out_77}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4834 = _T_4833 & _GEN_574; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4827 = _GEN_473 == 7'h4c; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_523 = {{5'd0}, way_status_out_77}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4834 = _T_4833 & _GEN_523; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4827 = ifu_ic_rw_int_addr_ff == 7'h4c; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4829 = _T_4827 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4318; // @[Reg.scala 27:20]
   wire  way_status_out_76 = _T_4318[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_576 = {{5'd0}, way_status_out_76}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4830 = _T_4829 & _GEN_576; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4823 = _GEN_473 == 7'h4b; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_524 = {{5'd0}, way_status_out_76}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4830 = _T_4829 & _GEN_524; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4823 = ifu_ic_rw_int_addr_ff == 7'h4b; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4825 = _T_4823 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4314; // @[Reg.scala 27:20]
   wire  way_status_out_75 = _T_4314[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_578 = {{5'd0}, way_status_out_75}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4826 = _T_4825 & _GEN_578; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4819 = _GEN_473 == 7'h4a; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_525 = {{5'd0}, way_status_out_75}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4826 = _T_4825 & _GEN_525; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4819 = ifu_ic_rw_int_addr_ff == 7'h4a; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4821 = _T_4819 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4310; // @[Reg.scala 27:20]
   wire  way_status_out_74 = _T_4310[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_580 = {{5'd0}, way_status_out_74}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4822 = _T_4821 & _GEN_580; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4815 = _GEN_473 == 7'h49; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_526 = {{5'd0}, way_status_out_74}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4822 = _T_4821 & _GEN_526; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4815 = ifu_ic_rw_int_addr_ff == 7'h49; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4817 = _T_4815 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4306; // @[Reg.scala 27:20]
   wire  way_status_out_73 = _T_4306[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_582 = {{5'd0}, way_status_out_73}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4818 = _T_4817 & _GEN_582; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_527 = {{5'd0}, way_status_out_73}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4818 = _T_4817 & _GEN_527; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [329:0] _T_5088 = {_T_5079,_T_4850,_T_4846,_T_4842,_T_4838,_T_4834,_T_4830,_T_4826,_T_4822,_T_4818}; // @[Cat.scala 29:58]
-  wire  _T_4811 = _GEN_473 == 7'h48; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4811 = ifu_ic_rw_int_addr_ff == 7'h48; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4813 = _T_4811 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4302; // @[Reg.scala 27:20]
   wire  way_status_out_72 = _T_4302[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_584 = {{5'd0}, way_status_out_72}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4814 = _T_4813 & _GEN_584; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4807 = _GEN_473 == 7'h47; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_528 = {{5'd0}, way_status_out_72}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4814 = _T_4813 & _GEN_528; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4807 = ifu_ic_rw_int_addr_ff == 7'h47; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4809 = _T_4807 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4298; // @[Reg.scala 27:20]
   wire  way_status_out_71 = _T_4298[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_586 = {{5'd0}, way_status_out_71}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4810 = _T_4809 & _GEN_586; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4803 = _GEN_473 == 7'h46; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_529 = {{5'd0}, way_status_out_71}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4810 = _T_4809 & _GEN_529; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4803 = ifu_ic_rw_int_addr_ff == 7'h46; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4805 = _T_4803 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4294; // @[Reg.scala 27:20]
   wire  way_status_out_70 = _T_4294[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_588 = {{5'd0}, way_status_out_70}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4806 = _T_4805 & _GEN_588; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4799 = _GEN_473 == 7'h45; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_530 = {{5'd0}, way_status_out_70}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4806 = _T_4805 & _GEN_530; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4799 = ifu_ic_rw_int_addr_ff == 7'h45; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4801 = _T_4799 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4290; // @[Reg.scala 27:20]
   wire  way_status_out_69 = _T_4290[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_590 = {{5'd0}, way_status_out_69}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4802 = _T_4801 & _GEN_590; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4795 = _GEN_473 == 7'h44; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_531 = {{5'd0}, way_status_out_69}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4802 = _T_4801 & _GEN_531; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4795 = ifu_ic_rw_int_addr_ff == 7'h44; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4797 = _T_4795 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4286; // @[Reg.scala 27:20]
   wire  way_status_out_68 = _T_4286[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_592 = {{5'd0}, way_status_out_68}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4798 = _T_4797 & _GEN_592; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4791 = _GEN_473 == 7'h43; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_532 = {{5'd0}, way_status_out_68}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4798 = _T_4797 & _GEN_532; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4791 = ifu_ic_rw_int_addr_ff == 7'h43; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4793 = _T_4791 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4282; // @[Reg.scala 27:20]
   wire  way_status_out_67 = _T_4282[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_594 = {{5'd0}, way_status_out_67}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4794 = _T_4793 & _GEN_594; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4787 = _GEN_473 == 7'h42; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_533 = {{5'd0}, way_status_out_67}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4794 = _T_4793 & _GEN_533; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4787 = ifu_ic_rw_int_addr_ff == 7'h42; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4789 = _T_4787 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4278; // @[Reg.scala 27:20]
   wire  way_status_out_66 = _T_4278[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_596 = {{5'd0}, way_status_out_66}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4790 = _T_4789 & _GEN_596; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4783 = _GEN_473 == 7'h41; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_534 = {{5'd0}, way_status_out_66}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4790 = _T_4789 & _GEN_534; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4783 = ifu_ic_rw_int_addr_ff == 7'h41; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4785 = _T_4783 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4274; // @[Reg.scala 27:20]
   wire  way_status_out_65 = _T_4274[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_598 = {{5'd0}, way_status_out_65}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4786 = _T_4785 & _GEN_598; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4779 = _GEN_473 == 7'h40; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_535 = {{5'd0}, way_status_out_65}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4786 = _T_4785 & _GEN_535; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4779 = ifu_ic_rw_int_addr_ff == 7'h40; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4781 = _T_4779 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4270; // @[Reg.scala 27:20]
   wire  way_status_out_64 = _T_4270[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_600 = {{5'd0}, way_status_out_64}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4782 = _T_4781 & _GEN_600; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_536 = {{5'd0}, way_status_out_64}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4782 = _T_4781 & _GEN_536; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [383:0] _T_5097 = {_T_5088,_T_4814,_T_4810,_T_4806,_T_4802,_T_4798,_T_4794,_T_4790,_T_4786,_T_4782}; // @[Cat.scala 29:58]
-  wire  _T_4775 = ifu_ic_rw_int_addr_ff == 6'h3f; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4775 = ifu_ic_rw_int_addr_ff == 7'h3f; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4777 = _T_4775 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4266; // @[Reg.scala 27:20]
   wire  way_status_out_63 = _T_4266[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_601 = {{5'd0}, way_status_out_63}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4778 = _T_4777 & _GEN_601; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4771 = ifu_ic_rw_int_addr_ff == 6'h3e; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_537 = {{5'd0}, way_status_out_63}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4778 = _T_4777 & _GEN_537; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4771 = ifu_ic_rw_int_addr_ff == 7'h3e; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4773 = _T_4771 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4262; // @[Reg.scala 27:20]
   wire  way_status_out_62 = _T_4262[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_602 = {{5'd0}, way_status_out_62}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4774 = _T_4773 & _GEN_602; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4767 = ifu_ic_rw_int_addr_ff == 6'h3d; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_538 = {{5'd0}, way_status_out_62}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4774 = _T_4773 & _GEN_538; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4767 = ifu_ic_rw_int_addr_ff == 7'h3d; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4769 = _T_4767 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4258; // @[Reg.scala 27:20]
   wire  way_status_out_61 = _T_4258[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_603 = {{5'd0}, way_status_out_61}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4770 = _T_4769 & _GEN_603; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4763 = ifu_ic_rw_int_addr_ff == 6'h3c; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_539 = {{5'd0}, way_status_out_61}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4770 = _T_4769 & _GEN_539; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4763 = ifu_ic_rw_int_addr_ff == 7'h3c; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4765 = _T_4763 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4254; // @[Reg.scala 27:20]
   wire  way_status_out_60 = _T_4254[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_604 = {{5'd0}, way_status_out_60}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4766 = _T_4765 & _GEN_604; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4759 = ifu_ic_rw_int_addr_ff == 6'h3b; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_540 = {{5'd0}, way_status_out_60}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4766 = _T_4765 & _GEN_540; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4759 = ifu_ic_rw_int_addr_ff == 7'h3b; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4761 = _T_4759 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4250; // @[Reg.scala 27:20]
   wire  way_status_out_59 = _T_4250[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_605 = {{5'd0}, way_status_out_59}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4762 = _T_4761 & _GEN_605; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4755 = ifu_ic_rw_int_addr_ff == 6'h3a; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_541 = {{5'd0}, way_status_out_59}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4762 = _T_4761 & _GEN_541; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4755 = ifu_ic_rw_int_addr_ff == 7'h3a; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4757 = _T_4755 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4246; // @[Reg.scala 27:20]
   wire  way_status_out_58 = _T_4246[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_606 = {{5'd0}, way_status_out_58}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4758 = _T_4757 & _GEN_606; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4751 = ifu_ic_rw_int_addr_ff == 6'h39; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_542 = {{5'd0}, way_status_out_58}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4758 = _T_4757 & _GEN_542; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4751 = ifu_ic_rw_int_addr_ff == 7'h39; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4753 = _T_4751 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4242; // @[Reg.scala 27:20]
   wire  way_status_out_57 = _T_4242[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_607 = {{5'd0}, way_status_out_57}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4754 = _T_4753 & _GEN_607; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4747 = ifu_ic_rw_int_addr_ff == 6'h38; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_543 = {{5'd0}, way_status_out_57}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4754 = _T_4753 & _GEN_543; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4747 = ifu_ic_rw_int_addr_ff == 7'h38; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4749 = _T_4747 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4238; // @[Reg.scala 27:20]
   wire  way_status_out_56 = _T_4238[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_608 = {{5'd0}, way_status_out_56}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4750 = _T_4749 & _GEN_608; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4743 = ifu_ic_rw_int_addr_ff == 6'h37; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_544 = {{5'd0}, way_status_out_56}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4750 = _T_4749 & _GEN_544; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4743 = ifu_ic_rw_int_addr_ff == 7'h37; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4745 = _T_4743 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4234; // @[Reg.scala 27:20]
   wire  way_status_out_55 = _T_4234[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_609 = {{5'd0}, way_status_out_55}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4746 = _T_4745 & _GEN_609; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_545 = {{5'd0}, way_status_out_55}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4746 = _T_4745 & _GEN_545; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [437:0] _T_5106 = {_T_5097,_T_4778,_T_4774,_T_4770,_T_4766,_T_4762,_T_4758,_T_4754,_T_4750,_T_4746}; // @[Cat.scala 29:58]
-  wire  _T_4739 = ifu_ic_rw_int_addr_ff == 6'h36; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4739 = ifu_ic_rw_int_addr_ff == 7'h36; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4741 = _T_4739 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4230; // @[Reg.scala 27:20]
   wire  way_status_out_54 = _T_4230[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_610 = {{5'd0}, way_status_out_54}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4742 = _T_4741 & _GEN_610; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4735 = ifu_ic_rw_int_addr_ff == 6'h35; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_546 = {{5'd0}, way_status_out_54}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4742 = _T_4741 & _GEN_546; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4735 = ifu_ic_rw_int_addr_ff == 7'h35; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4737 = _T_4735 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4226; // @[Reg.scala 27:20]
   wire  way_status_out_53 = _T_4226[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_611 = {{5'd0}, way_status_out_53}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4738 = _T_4737 & _GEN_611; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4731 = ifu_ic_rw_int_addr_ff == 6'h34; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_547 = {{5'd0}, way_status_out_53}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4738 = _T_4737 & _GEN_547; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4731 = ifu_ic_rw_int_addr_ff == 7'h34; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4733 = _T_4731 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4222; // @[Reg.scala 27:20]
   wire  way_status_out_52 = _T_4222[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_612 = {{5'd0}, way_status_out_52}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4734 = _T_4733 & _GEN_612; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4727 = ifu_ic_rw_int_addr_ff == 6'h33; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_548 = {{5'd0}, way_status_out_52}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4734 = _T_4733 & _GEN_548; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4727 = ifu_ic_rw_int_addr_ff == 7'h33; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4729 = _T_4727 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4218; // @[Reg.scala 27:20]
   wire  way_status_out_51 = _T_4218[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_613 = {{5'd0}, way_status_out_51}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4730 = _T_4729 & _GEN_613; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4723 = ifu_ic_rw_int_addr_ff == 6'h32; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_549 = {{5'd0}, way_status_out_51}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4730 = _T_4729 & _GEN_549; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4723 = ifu_ic_rw_int_addr_ff == 7'h32; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4725 = _T_4723 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4214; // @[Reg.scala 27:20]
   wire  way_status_out_50 = _T_4214[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_614 = {{5'd0}, way_status_out_50}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4726 = _T_4725 & _GEN_614; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4719 = ifu_ic_rw_int_addr_ff == 6'h31; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_550 = {{5'd0}, way_status_out_50}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4726 = _T_4725 & _GEN_550; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4719 = ifu_ic_rw_int_addr_ff == 7'h31; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4721 = _T_4719 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4210; // @[Reg.scala 27:20]
   wire  way_status_out_49 = _T_4210[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_615 = {{5'd0}, way_status_out_49}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4722 = _T_4721 & _GEN_615; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4715 = ifu_ic_rw_int_addr_ff == 6'h30; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_551 = {{5'd0}, way_status_out_49}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4722 = _T_4721 & _GEN_551; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4715 = ifu_ic_rw_int_addr_ff == 7'h30; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4717 = _T_4715 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4206; // @[Reg.scala 27:20]
   wire  way_status_out_48 = _T_4206[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_616 = {{5'd0}, way_status_out_48}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4718 = _T_4717 & _GEN_616; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4711 = ifu_ic_rw_int_addr_ff == 6'h2f; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_552 = {{5'd0}, way_status_out_48}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4718 = _T_4717 & _GEN_552; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4711 = ifu_ic_rw_int_addr_ff == 7'h2f; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4713 = _T_4711 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4202; // @[Reg.scala 27:20]
   wire  way_status_out_47 = _T_4202[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_617 = {{5'd0}, way_status_out_47}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4714 = _T_4713 & _GEN_617; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4707 = ifu_ic_rw_int_addr_ff == 6'h2e; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_553 = {{5'd0}, way_status_out_47}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4714 = _T_4713 & _GEN_553; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4707 = ifu_ic_rw_int_addr_ff == 7'h2e; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4709 = _T_4707 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4198; // @[Reg.scala 27:20]
   wire  way_status_out_46 = _T_4198[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_618 = {{5'd0}, way_status_out_46}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4710 = _T_4709 & _GEN_618; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_554 = {{5'd0}, way_status_out_46}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4710 = _T_4709 & _GEN_554; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [491:0] _T_5115 = {_T_5106,_T_4742,_T_4738,_T_4734,_T_4730,_T_4726,_T_4722,_T_4718,_T_4714,_T_4710}; // @[Cat.scala 29:58]
-  wire  _T_4703 = ifu_ic_rw_int_addr_ff == 6'h2d; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4703 = ifu_ic_rw_int_addr_ff == 7'h2d; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4705 = _T_4703 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4194; // @[Reg.scala 27:20]
   wire  way_status_out_45 = _T_4194[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_619 = {{5'd0}, way_status_out_45}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4706 = _T_4705 & _GEN_619; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4699 = ifu_ic_rw_int_addr_ff == 6'h2c; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_555 = {{5'd0}, way_status_out_45}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4706 = _T_4705 & _GEN_555; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4699 = ifu_ic_rw_int_addr_ff == 7'h2c; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4701 = _T_4699 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4190; // @[Reg.scala 27:20]
   wire  way_status_out_44 = _T_4190[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_620 = {{5'd0}, way_status_out_44}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4702 = _T_4701 & _GEN_620; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4695 = ifu_ic_rw_int_addr_ff == 6'h2b; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_556 = {{5'd0}, way_status_out_44}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4702 = _T_4701 & _GEN_556; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4695 = ifu_ic_rw_int_addr_ff == 7'h2b; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4697 = _T_4695 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4186; // @[Reg.scala 27:20]
   wire  way_status_out_43 = _T_4186[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_621 = {{5'd0}, way_status_out_43}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4698 = _T_4697 & _GEN_621; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4691 = ifu_ic_rw_int_addr_ff == 6'h2a; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_557 = {{5'd0}, way_status_out_43}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4698 = _T_4697 & _GEN_557; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4691 = ifu_ic_rw_int_addr_ff == 7'h2a; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4693 = _T_4691 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4182; // @[Reg.scala 27:20]
   wire  way_status_out_42 = _T_4182[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_622 = {{5'd0}, way_status_out_42}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4694 = _T_4693 & _GEN_622; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4687 = ifu_ic_rw_int_addr_ff == 6'h29; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_558 = {{5'd0}, way_status_out_42}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4694 = _T_4693 & _GEN_558; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4687 = ifu_ic_rw_int_addr_ff == 7'h29; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4689 = _T_4687 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4178; // @[Reg.scala 27:20]
   wire  way_status_out_41 = _T_4178[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_623 = {{5'd0}, way_status_out_41}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4690 = _T_4689 & _GEN_623; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4683 = ifu_ic_rw_int_addr_ff == 6'h28; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_559 = {{5'd0}, way_status_out_41}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4690 = _T_4689 & _GEN_559; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4683 = ifu_ic_rw_int_addr_ff == 7'h28; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4685 = _T_4683 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4174; // @[Reg.scala 27:20]
   wire  way_status_out_40 = _T_4174[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_624 = {{5'd0}, way_status_out_40}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4686 = _T_4685 & _GEN_624; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4679 = ifu_ic_rw_int_addr_ff == 6'h27; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_560 = {{5'd0}, way_status_out_40}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4686 = _T_4685 & _GEN_560; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4679 = ifu_ic_rw_int_addr_ff == 7'h27; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4681 = _T_4679 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4170; // @[Reg.scala 27:20]
   wire  way_status_out_39 = _T_4170[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_625 = {{5'd0}, way_status_out_39}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4682 = _T_4681 & _GEN_625; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4675 = ifu_ic_rw_int_addr_ff == 6'h26; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_561 = {{5'd0}, way_status_out_39}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4682 = _T_4681 & _GEN_561; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4675 = ifu_ic_rw_int_addr_ff == 7'h26; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4677 = _T_4675 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4166; // @[Reg.scala 27:20]
   wire  way_status_out_38 = _T_4166[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_626 = {{5'd0}, way_status_out_38}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4678 = _T_4677 & _GEN_626; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4671 = ifu_ic_rw_int_addr_ff == 6'h25; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_562 = {{5'd0}, way_status_out_38}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4678 = _T_4677 & _GEN_562; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4671 = ifu_ic_rw_int_addr_ff == 7'h25; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4673 = _T_4671 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4162; // @[Reg.scala 27:20]
   wire  way_status_out_37 = _T_4162[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_627 = {{5'd0}, way_status_out_37}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4674 = _T_4673 & _GEN_627; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_563 = {{5'd0}, way_status_out_37}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4674 = _T_4673 & _GEN_563; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [545:0] _T_5124 = {_T_5115,_T_4706,_T_4702,_T_4698,_T_4694,_T_4690,_T_4686,_T_4682,_T_4678,_T_4674}; // @[Cat.scala 29:58]
-  wire  _T_4667 = ifu_ic_rw_int_addr_ff == 6'h24; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4667 = ifu_ic_rw_int_addr_ff == 7'h24; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4669 = _T_4667 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4158; // @[Reg.scala 27:20]
   wire  way_status_out_36 = _T_4158[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_628 = {{5'd0}, way_status_out_36}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4670 = _T_4669 & _GEN_628; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4663 = ifu_ic_rw_int_addr_ff == 6'h23; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_564 = {{5'd0}, way_status_out_36}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4670 = _T_4669 & _GEN_564; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4663 = ifu_ic_rw_int_addr_ff == 7'h23; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4665 = _T_4663 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4154; // @[Reg.scala 27:20]
   wire  way_status_out_35 = _T_4154[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_629 = {{5'd0}, way_status_out_35}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4666 = _T_4665 & _GEN_629; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4659 = ifu_ic_rw_int_addr_ff == 6'h22; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_565 = {{5'd0}, way_status_out_35}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4666 = _T_4665 & _GEN_565; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4659 = ifu_ic_rw_int_addr_ff == 7'h22; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4661 = _T_4659 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4150; // @[Reg.scala 27:20]
   wire  way_status_out_34 = _T_4150[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_630 = {{5'd0}, way_status_out_34}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4662 = _T_4661 & _GEN_630; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4655 = ifu_ic_rw_int_addr_ff == 6'h21; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_566 = {{5'd0}, way_status_out_34}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4662 = _T_4661 & _GEN_566; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4655 = ifu_ic_rw_int_addr_ff == 7'h21; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4657 = _T_4655 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4146; // @[Reg.scala 27:20]
   wire  way_status_out_33 = _T_4146[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_631 = {{5'd0}, way_status_out_33}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4658 = _T_4657 & _GEN_631; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4651 = ifu_ic_rw_int_addr_ff == 6'h20; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_567 = {{5'd0}, way_status_out_33}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4658 = _T_4657 & _GEN_567; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4651 = ifu_ic_rw_int_addr_ff == 7'h20; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4653 = _T_4651 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4142; // @[Reg.scala 27:20]
   wire  way_status_out_32 = _T_4142[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_632 = {{5'd0}, way_status_out_32}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4654 = _T_4653 & _GEN_632; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4647 = ifu_ic_rw_int_addr_ff == 6'h1f; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_568 = {{5'd0}, way_status_out_32}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4654 = _T_4653 & _GEN_568; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4647 = ifu_ic_rw_int_addr_ff == 7'h1f; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4649 = _T_4647 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4138; // @[Reg.scala 27:20]
   wire  way_status_out_31 = _T_4138[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_633 = {{5'd0}, way_status_out_31}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4650 = _T_4649 & _GEN_633; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4643 = ifu_ic_rw_int_addr_ff == 6'h1e; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_569 = {{5'd0}, way_status_out_31}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4650 = _T_4649 & _GEN_569; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4643 = ifu_ic_rw_int_addr_ff == 7'h1e; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4645 = _T_4643 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4134; // @[Reg.scala 27:20]
   wire  way_status_out_30 = _T_4134[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_634 = {{5'd0}, way_status_out_30}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4646 = _T_4645 & _GEN_634; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4639 = ifu_ic_rw_int_addr_ff == 6'h1d; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_570 = {{5'd0}, way_status_out_30}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4646 = _T_4645 & _GEN_570; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4639 = ifu_ic_rw_int_addr_ff == 7'h1d; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4641 = _T_4639 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4130; // @[Reg.scala 27:20]
   wire  way_status_out_29 = _T_4130[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_635 = {{5'd0}, way_status_out_29}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4642 = _T_4641 & _GEN_635; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4635 = ifu_ic_rw_int_addr_ff == 6'h1c; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_571 = {{5'd0}, way_status_out_29}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4642 = _T_4641 & _GEN_571; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4635 = ifu_ic_rw_int_addr_ff == 7'h1c; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4637 = _T_4635 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4126; // @[Reg.scala 27:20]
   wire  way_status_out_28 = _T_4126[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_636 = {{5'd0}, way_status_out_28}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4638 = _T_4637 & _GEN_636; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_572 = {{5'd0}, way_status_out_28}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4638 = _T_4637 & _GEN_572; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [599:0] _T_5133 = {_T_5124,_T_4670,_T_4666,_T_4662,_T_4658,_T_4654,_T_4650,_T_4646,_T_4642,_T_4638}; // @[Cat.scala 29:58]
-  wire  _T_4631 = ifu_ic_rw_int_addr_ff == 6'h1b; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4631 = ifu_ic_rw_int_addr_ff == 7'h1b; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4633 = _T_4631 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4122; // @[Reg.scala 27:20]
   wire  way_status_out_27 = _T_4122[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_637 = {{5'd0}, way_status_out_27}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4634 = _T_4633 & _GEN_637; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4627 = ifu_ic_rw_int_addr_ff == 6'h1a; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_573 = {{5'd0}, way_status_out_27}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4634 = _T_4633 & _GEN_573; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4627 = ifu_ic_rw_int_addr_ff == 7'h1a; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4629 = _T_4627 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4118; // @[Reg.scala 27:20]
   wire  way_status_out_26 = _T_4118[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_638 = {{5'd0}, way_status_out_26}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4630 = _T_4629 & _GEN_638; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4623 = ifu_ic_rw_int_addr_ff == 6'h19; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_574 = {{5'd0}, way_status_out_26}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4630 = _T_4629 & _GEN_574; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4623 = ifu_ic_rw_int_addr_ff == 7'h19; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4625 = _T_4623 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4114; // @[Reg.scala 27:20]
   wire  way_status_out_25 = _T_4114[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_639 = {{5'd0}, way_status_out_25}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4626 = _T_4625 & _GEN_639; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4619 = ifu_ic_rw_int_addr_ff == 6'h18; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_575 = {{5'd0}, way_status_out_25}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4626 = _T_4625 & _GEN_575; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4619 = ifu_ic_rw_int_addr_ff == 7'h18; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4621 = _T_4619 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4110; // @[Reg.scala 27:20]
   wire  way_status_out_24 = _T_4110[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_640 = {{5'd0}, way_status_out_24}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4622 = _T_4621 & _GEN_640; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4615 = ifu_ic_rw_int_addr_ff == 6'h17; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_576 = {{5'd0}, way_status_out_24}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4622 = _T_4621 & _GEN_576; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4615 = ifu_ic_rw_int_addr_ff == 7'h17; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4617 = _T_4615 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4106; // @[Reg.scala 27:20]
   wire  way_status_out_23 = _T_4106[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_641 = {{5'd0}, way_status_out_23}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4618 = _T_4617 & _GEN_641; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4611 = ifu_ic_rw_int_addr_ff == 6'h16; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_577 = {{5'd0}, way_status_out_23}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4618 = _T_4617 & _GEN_577; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4611 = ifu_ic_rw_int_addr_ff == 7'h16; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4613 = _T_4611 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4102; // @[Reg.scala 27:20]
   wire  way_status_out_22 = _T_4102[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_642 = {{5'd0}, way_status_out_22}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4614 = _T_4613 & _GEN_642; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4607 = ifu_ic_rw_int_addr_ff == 6'h15; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_578 = {{5'd0}, way_status_out_22}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4614 = _T_4613 & _GEN_578; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4607 = ifu_ic_rw_int_addr_ff == 7'h15; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4609 = _T_4607 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4098; // @[Reg.scala 27:20]
   wire  way_status_out_21 = _T_4098[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_643 = {{5'd0}, way_status_out_21}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4610 = _T_4609 & _GEN_643; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4603 = ifu_ic_rw_int_addr_ff == 6'h14; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_579 = {{5'd0}, way_status_out_21}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4610 = _T_4609 & _GEN_579; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4603 = ifu_ic_rw_int_addr_ff == 7'h14; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4605 = _T_4603 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4094; // @[Reg.scala 27:20]
   wire  way_status_out_20 = _T_4094[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_644 = {{5'd0}, way_status_out_20}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4606 = _T_4605 & _GEN_644; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4599 = ifu_ic_rw_int_addr_ff == 6'h13; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_580 = {{5'd0}, way_status_out_20}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4606 = _T_4605 & _GEN_580; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4599 = ifu_ic_rw_int_addr_ff == 7'h13; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4601 = _T_4599 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4090; // @[Reg.scala 27:20]
   wire  way_status_out_19 = _T_4090[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_645 = {{5'd0}, way_status_out_19}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4602 = _T_4601 & _GEN_645; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_581 = {{5'd0}, way_status_out_19}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4602 = _T_4601 & _GEN_581; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [653:0] _T_5142 = {_T_5133,_T_4634,_T_4630,_T_4626,_T_4622,_T_4618,_T_4614,_T_4610,_T_4606,_T_4602}; // @[Cat.scala 29:58]
-  wire  _T_4595 = ifu_ic_rw_int_addr_ff == 6'h12; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4595 = ifu_ic_rw_int_addr_ff == 7'h12; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4597 = _T_4595 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4086; // @[Reg.scala 27:20]
   wire  way_status_out_18 = _T_4086[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_646 = {{5'd0}, way_status_out_18}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4598 = _T_4597 & _GEN_646; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4591 = ifu_ic_rw_int_addr_ff == 6'h11; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_582 = {{5'd0}, way_status_out_18}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4598 = _T_4597 & _GEN_582; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4591 = ifu_ic_rw_int_addr_ff == 7'h11; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4593 = _T_4591 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4082; // @[Reg.scala 27:20]
   wire  way_status_out_17 = _T_4082[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_647 = {{5'd0}, way_status_out_17}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4594 = _T_4593 & _GEN_647; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4587 = ifu_ic_rw_int_addr_ff == 6'h10; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_583 = {{5'd0}, way_status_out_17}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4594 = _T_4593 & _GEN_583; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4587 = ifu_ic_rw_int_addr_ff == 7'h10; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4589 = _T_4587 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4078; // @[Reg.scala 27:20]
   wire  way_status_out_16 = _T_4078[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_648 = {{5'd0}, way_status_out_16}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4590 = _T_4589 & _GEN_648; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4583 = ifu_ic_rw_int_addr_ff == 6'hf; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_584 = {{5'd0}, way_status_out_16}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4590 = _T_4589 & _GEN_584; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4583 = ifu_ic_rw_int_addr_ff == 7'hf; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4585 = _T_4583 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4074; // @[Reg.scala 27:20]
   wire  way_status_out_15 = _T_4074[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_649 = {{5'd0}, way_status_out_15}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4586 = _T_4585 & _GEN_649; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4579 = ifu_ic_rw_int_addr_ff == 6'he; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_585 = {{5'd0}, way_status_out_15}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4586 = _T_4585 & _GEN_585; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4579 = ifu_ic_rw_int_addr_ff == 7'he; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4581 = _T_4579 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4070; // @[Reg.scala 27:20]
   wire  way_status_out_14 = _T_4070[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_650 = {{5'd0}, way_status_out_14}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4582 = _T_4581 & _GEN_650; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4575 = ifu_ic_rw_int_addr_ff == 6'hd; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_586 = {{5'd0}, way_status_out_14}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4582 = _T_4581 & _GEN_586; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4575 = ifu_ic_rw_int_addr_ff == 7'hd; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4577 = _T_4575 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4066; // @[Reg.scala 27:20]
   wire  way_status_out_13 = _T_4066[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_651 = {{5'd0}, way_status_out_13}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4578 = _T_4577 & _GEN_651; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4571 = ifu_ic_rw_int_addr_ff == 6'hc; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_587 = {{5'd0}, way_status_out_13}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4578 = _T_4577 & _GEN_587; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4571 = ifu_ic_rw_int_addr_ff == 7'hc; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4573 = _T_4571 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4062; // @[Reg.scala 27:20]
   wire  way_status_out_12 = _T_4062[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_652 = {{5'd0}, way_status_out_12}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4574 = _T_4573 & _GEN_652; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4567 = ifu_ic_rw_int_addr_ff == 6'hb; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_588 = {{5'd0}, way_status_out_12}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4574 = _T_4573 & _GEN_588; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4567 = ifu_ic_rw_int_addr_ff == 7'hb; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4569 = _T_4567 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4058; // @[Reg.scala 27:20]
   wire  way_status_out_11 = _T_4058[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_653 = {{5'd0}, way_status_out_11}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4570 = _T_4569 & _GEN_653; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4563 = ifu_ic_rw_int_addr_ff == 6'ha; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_589 = {{5'd0}, way_status_out_11}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4570 = _T_4569 & _GEN_589; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4563 = ifu_ic_rw_int_addr_ff == 7'ha; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4565 = _T_4563 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4054; // @[Reg.scala 27:20]
   wire  way_status_out_10 = _T_4054[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_654 = {{5'd0}, way_status_out_10}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4566 = _T_4565 & _GEN_654; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_590 = {{5'd0}, way_status_out_10}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4566 = _T_4565 & _GEN_590; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [707:0] _T_5151 = {_T_5142,_T_4598,_T_4594,_T_4590,_T_4586,_T_4582,_T_4578,_T_4574,_T_4570,_T_4566}; // @[Cat.scala 29:58]
-  wire  _T_4559 = ifu_ic_rw_int_addr_ff == 6'h9; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4559 = ifu_ic_rw_int_addr_ff == 7'h9; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4561 = _T_4559 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4050; // @[Reg.scala 27:20]
   wire  way_status_out_9 = _T_4050[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_655 = {{5'd0}, way_status_out_9}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4562 = _T_4561 & _GEN_655; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4555 = ifu_ic_rw_int_addr_ff == 6'h8; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_591 = {{5'd0}, way_status_out_9}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4562 = _T_4561 & _GEN_591; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4555 = ifu_ic_rw_int_addr_ff == 7'h8; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4557 = _T_4555 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4046; // @[Reg.scala 27:20]
   wire  way_status_out_8 = _T_4046[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_656 = {{5'd0}, way_status_out_8}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4558 = _T_4557 & _GEN_656; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4551 = ifu_ic_rw_int_addr_ff == 6'h7; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_592 = {{5'd0}, way_status_out_8}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4558 = _T_4557 & _GEN_592; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4551 = ifu_ic_rw_int_addr_ff == 7'h7; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4553 = _T_4551 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4042; // @[Reg.scala 27:20]
   wire  way_status_out_7 = _T_4042[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_657 = {{5'd0}, way_status_out_7}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4554 = _T_4553 & _GEN_657; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4547 = ifu_ic_rw_int_addr_ff == 6'h6; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_593 = {{5'd0}, way_status_out_7}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4554 = _T_4553 & _GEN_593; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4547 = ifu_ic_rw_int_addr_ff == 7'h6; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4549 = _T_4547 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4038; // @[Reg.scala 27:20]
   wire  way_status_out_6 = _T_4038[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_658 = {{5'd0}, way_status_out_6}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4550 = _T_4549 & _GEN_658; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4543 = ifu_ic_rw_int_addr_ff == 6'h5; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_594 = {{5'd0}, way_status_out_6}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4550 = _T_4549 & _GEN_594; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4543 = ifu_ic_rw_int_addr_ff == 7'h5; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4545 = _T_4543 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4034; // @[Reg.scala 27:20]
   wire  way_status_out_5 = _T_4034[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_659 = {{5'd0}, way_status_out_5}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4546 = _T_4545 & _GEN_659; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4539 = ifu_ic_rw_int_addr_ff == 6'h4; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_595 = {{5'd0}, way_status_out_5}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4546 = _T_4545 & _GEN_595; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4539 = ifu_ic_rw_int_addr_ff == 7'h4; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4541 = _T_4539 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4030; // @[Reg.scala 27:20]
   wire  way_status_out_4 = _T_4030[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_660 = {{5'd0}, way_status_out_4}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4542 = _T_4541 & _GEN_660; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4535 = ifu_ic_rw_int_addr_ff == 6'h3; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_596 = {{5'd0}, way_status_out_4}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4542 = _T_4541 & _GEN_596; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4535 = ifu_ic_rw_int_addr_ff == 7'h3; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4537 = _T_4535 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4026; // @[Reg.scala 27:20]
   wire  way_status_out_3 = _T_4026[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_661 = {{5'd0}, way_status_out_3}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4538 = _T_4537 & _GEN_661; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4531 = ifu_ic_rw_int_addr_ff == 6'h2; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_597 = {{5'd0}, way_status_out_3}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4538 = _T_4537 & _GEN_597; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4531 = ifu_ic_rw_int_addr_ff == 7'h2; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4533 = _T_4531 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4022; // @[Reg.scala 27:20]
   wire  way_status_out_2 = _T_4022[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_662 = {{5'd0}, way_status_out_2}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4534 = _T_4533 & _GEN_662; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire  _T_4527 = ifu_ic_rw_int_addr_ff == 6'h1; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire [5:0] _GEN_598 = {{5'd0}, way_status_out_2}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4534 = _T_4533 & _GEN_598; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire  _T_4527 = ifu_ic_rw_int_addr_ff == 7'h1; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4529 = _T_4527 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4018; // @[Reg.scala 27:20]
   wire  way_status_out_1 = _T_4018[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_663 = {{5'd0}, way_status_out_1}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4530 = _T_4529 & _GEN_663; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_599 = {{5'd0}, way_status_out_1}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4530 = _T_4529 & _GEN_599; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [761:0] _T_5160 = {_T_5151,_T_4562,_T_4558,_T_4554,_T_4550,_T_4546,_T_4542,_T_4538,_T_4534,_T_4530}; // @[Cat.scala 29:58]
-  wire  _T_4523 = ifu_ic_rw_int_addr_ff == 6'h0; // @[el2_ifu_mem_ctl.scala 724:121]
+  wire  _T_4523 = ifu_ic_rw_int_addr_ff == 7'h0; // @[el2_ifu_mem_ctl.scala 724:121]
   wire [5:0] _T_4525 = _T_4523 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
   reg [2:0] _T_4014; // @[Reg.scala 27:20]
   wire  way_status_out_0 = _T_4014[0]; // @[el2_ifu_mem_ctl.scala 721:30 el2_ifu_mem_ctl.scala 723:33]
-  wire [5:0] _GEN_664 = {{5'd0}, way_status_out_0}; // @[el2_ifu_mem_ctl.scala 724:130]
-  wire [5:0] _T_4526 = _T_4525 & _GEN_664; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _GEN_600 = {{5'd0}, way_status_out_0}; // @[el2_ifu_mem_ctl.scala 724:130]
+  wire [5:0] _T_4526 = _T_4525 & _GEN_600; // @[el2_ifu_mem_ctl.scala 724:130]
   wire [767:0] _T_5161 = {_T_5160,_T_4526}; // @[Cat.scala 29:58]
   wire  way_status = _T_5161[0]; // @[el2_ifu_mem_ctl.scala 724:16]
   wire  _T_195 = ~reset_all_tags; // @[el2_ifu_mem_ctl.scala 263:96]
@@ -2151,8 +2149,8 @@ module el2_ifu_mem_ctl(
   wire  _T_1503 = _T_1502 | _T_1496; // @[Mux.scala 27:72]
   wire  _T_1505 = _T_1472 & _T_1503; // @[el2_ifu_mem_ctl.scala 418:69]
   wire  _T_1506 = _T_1468 | _T_1505; // @[el2_ifu_mem_ctl.scala 417:94]
-  wire [4:0] _GEN_665 = {{2'd0}, bypass_index[4:2]}; // @[el2_ifu_mem_ctl.scala 419:95]
-  wire  _T_1509 = _GEN_665 == 5'h1f; // @[el2_ifu_mem_ctl.scala 419:95]
+  wire [4:0] _GEN_601 = {{2'd0}, bypass_index[4:2]}; // @[el2_ifu_mem_ctl.scala 419:95]
+  wire  _T_1509 = _GEN_601 == 5'h1f; // @[el2_ifu_mem_ctl.scala 419:95]
   wire  _T_1510 = bypass_valid_value_check & _T_1509; // @[el2_ifu_mem_ctl.scala 419:56]
   wire  bypass_data_ready_in = _T_1506 | _T_1510; // @[el2_ifu_mem_ctl.scala 418:181]
   wire  _T_1511 = bypass_data_ready_in & crit_wd_byp_ok_ff; // @[el2_ifu_mem_ctl.scala 423:53]
@@ -3226,10 +3224,10 @@ module el2_ifu_mem_ctl(
   wire [79:0] ic_byp_data_only_pre_new = _T_1626 ? _T_1868 : _T_2110; // @[el2_ifu_mem_ctl.scala 441:37]
   wire [79:0] _T_2115 = {16'h0,ic_byp_data_only_pre_new[79:16]}; // @[Cat.scala 29:58]
   wire [79:0] ic_byp_data_only_new = _T_2113 ? ic_byp_data_only_pre_new : _T_2115; // @[el2_ifu_mem_ctl.scala 445:30]
-  wire [79:0] _GEN_794 = {{16'd0}, _T_1261}; // @[el2_ifu_mem_ctl.scala 377:109]
-  wire [79:0] _T_1262 = _GEN_794 & ic_byp_data_only_new; // @[el2_ifu_mem_ctl.scala 377:109]
-  wire [79:0] _GEN_795 = {{16'd0}, _T_1259}; // @[el2_ifu_mem_ctl.scala 377:83]
-  wire [79:0] ic_premux_data = _GEN_795 | _T_1262; // @[el2_ifu_mem_ctl.scala 377:83]
+  wire [79:0] _GEN_602 = {{16'd0}, _T_1261}; // @[el2_ifu_mem_ctl.scala 377:109]
+  wire [79:0] _T_1262 = _GEN_602 & ic_byp_data_only_new; // @[el2_ifu_mem_ctl.scala 377:109]
+  wire [79:0] _GEN_603 = {{16'd0}, _T_1259}; // @[el2_ifu_mem_ctl.scala 377:83]
+  wire [79:0] ic_premux_data = _GEN_603 | _T_1262; // @[el2_ifu_mem_ctl.scala 377:83]
   wire  fetch_req_f_qual = io_ic_hit_f & _T_317; // @[el2_ifu_mem_ctl.scala 384:38]
   wire [1:0] _T_1271 = ifc_region_acc_fault_f ? 2'h2 : 2'h0; // @[el2_ifu_mem_ctl.scala 388:8]
   wire  _T_1273 = fetch_req_f_qual & io_ifu_bp_inst_mask_f; // @[el2_ifu_mem_ctl.scala 390:45]
@@ -3259,7 +3257,7 @@ module el2_ifu_mem_ctl(
   wire  _T_1401 = ic_miss_buff_data_error[7] & _T_1339; // @[el2_ifu_mem_ctl.scala 408:32]
   wire  ic_miss_buff_data_error_in_7 = write_fill_data_7 ? bus_ifu_wr_data_error : _T_1401; // @[el2_ifu_mem_ctl.scala 407:72]
   wire [7:0] _T_1408 = {ic_miss_buff_data_error_in_7,ic_miss_buff_data_error_in_6,ic_miss_buff_data_error_in_5,ic_miss_buff_data_error_in_4,ic_miss_buff_data_error_in_3,ic_miss_buff_data_error_in_2,ic_miss_buff_data_error_in_1,ic_miss_buff_data_error_in_0}; // @[Cat.scala 29:58]
-  reg [5:0] perr_ic_index_ff; // @[Reg.scala 27:20]
+  reg [6:0] perr_ic_index_ff; // @[Reg.scala 27:20]
   wire  _T_2465 = 3'h0 == perr_state; // @[Conditional.scala 37:30]
   wire  _T_2473 = _T_6 & _T_317; // @[el2_ifu_mem_ctl.scala 490:65]
   wire  _T_2474 = _T_2473 | io_iccm_dma_sb_error; // @[el2_ifu_mem_ctl.scala 490:88]
@@ -3824,193 +3822,193 @@ module el2_ifu_mem_ctl(
   wire  _T_5252 = ~perr_sel_invalidate; // @[el2_ifu_mem_ctl.scala 748:91]
   wire  _T_5253 = _T_5251 & _T_5252; // @[el2_ifu_mem_ctl.scala 748:89]
   wire  _T_5256 = _T_4523 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5257 = perr_ic_index_ff == 6'h0; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5257 = perr_ic_index_ff == 7'h0; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5259 = _T_5257 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5260 = _T_5259 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5262 = _T_5260 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5263 = _T_5256 | _T_5262; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5273 = _T_4527 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5274 = perr_ic_index_ff == 6'h1; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5274 = perr_ic_index_ff == 7'h1; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5276 = _T_5274 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5277 = _T_5276 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5279 = _T_5277 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5280 = _T_5273 | _T_5279; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5290 = _T_4531 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5291 = perr_ic_index_ff == 6'h2; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5291 = perr_ic_index_ff == 7'h2; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5293 = _T_5291 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5294 = _T_5293 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5296 = _T_5294 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5297 = _T_5290 | _T_5296; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5307 = _T_4535 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5308 = perr_ic_index_ff == 6'h3; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5308 = perr_ic_index_ff == 7'h3; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5310 = _T_5308 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5311 = _T_5310 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5313 = _T_5311 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5314 = _T_5307 | _T_5313; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5324 = _T_4539 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5325 = perr_ic_index_ff == 6'h4; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5325 = perr_ic_index_ff == 7'h4; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5327 = _T_5325 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5328 = _T_5327 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5330 = _T_5328 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5331 = _T_5324 | _T_5330; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5341 = _T_4543 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5342 = perr_ic_index_ff == 6'h5; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5342 = perr_ic_index_ff == 7'h5; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5344 = _T_5342 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5345 = _T_5344 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5347 = _T_5345 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5348 = _T_5341 | _T_5347; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5358 = _T_4547 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5359 = perr_ic_index_ff == 6'h6; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5359 = perr_ic_index_ff == 7'h6; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5361 = _T_5359 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5362 = _T_5361 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5364 = _T_5362 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5365 = _T_5358 | _T_5364; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5375 = _T_4551 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5376 = perr_ic_index_ff == 6'h7; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5376 = perr_ic_index_ff == 7'h7; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5378 = _T_5376 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5379 = _T_5378 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5381 = _T_5379 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5382 = _T_5375 | _T_5381; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5392 = _T_4555 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5393 = perr_ic_index_ff == 6'h8; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5393 = perr_ic_index_ff == 7'h8; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5395 = _T_5393 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5396 = _T_5395 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5398 = _T_5396 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5399 = _T_5392 | _T_5398; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5409 = _T_4559 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5410 = perr_ic_index_ff == 6'h9; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5410 = perr_ic_index_ff == 7'h9; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5412 = _T_5410 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5413 = _T_5412 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5415 = _T_5413 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5416 = _T_5409 | _T_5415; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5426 = _T_4563 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5427 = perr_ic_index_ff == 6'ha; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5427 = perr_ic_index_ff == 7'ha; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5429 = _T_5427 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5430 = _T_5429 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5432 = _T_5430 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5433 = _T_5426 | _T_5432; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5443 = _T_4567 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5444 = perr_ic_index_ff == 6'hb; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5444 = perr_ic_index_ff == 7'hb; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5446 = _T_5444 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5447 = _T_5446 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5449 = _T_5447 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5450 = _T_5443 | _T_5449; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5460 = _T_4571 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5461 = perr_ic_index_ff == 6'hc; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5461 = perr_ic_index_ff == 7'hc; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5463 = _T_5461 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5464 = _T_5463 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5466 = _T_5464 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5467 = _T_5460 | _T_5466; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5477 = _T_4575 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5478 = perr_ic_index_ff == 6'hd; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5478 = perr_ic_index_ff == 7'hd; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5480 = _T_5478 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5481 = _T_5480 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5483 = _T_5481 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5484 = _T_5477 | _T_5483; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5494 = _T_4579 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5495 = perr_ic_index_ff == 6'he; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5495 = perr_ic_index_ff == 7'he; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5497 = _T_5495 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5498 = _T_5497 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5500 = _T_5498 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5501 = _T_5494 | _T_5500; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5511 = _T_4583 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5512 = perr_ic_index_ff == 6'hf; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5512 = perr_ic_index_ff == 7'hf; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5514 = _T_5512 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5515 = _T_5514 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5517 = _T_5515 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5518 = _T_5511 | _T_5517; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5528 = _T_4587 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5529 = perr_ic_index_ff == 6'h10; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5529 = perr_ic_index_ff == 7'h10; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5531 = _T_5529 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5532 = _T_5531 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5534 = _T_5532 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5535 = _T_5528 | _T_5534; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5545 = _T_4591 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5546 = perr_ic_index_ff == 6'h11; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5546 = perr_ic_index_ff == 7'h11; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5548 = _T_5546 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5549 = _T_5548 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5551 = _T_5549 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5552 = _T_5545 | _T_5551; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5562 = _T_4595 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5563 = perr_ic_index_ff == 6'h12; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5563 = perr_ic_index_ff == 7'h12; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5565 = _T_5563 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5566 = _T_5565 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5568 = _T_5566 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5569 = _T_5562 | _T_5568; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5579 = _T_4599 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5580 = perr_ic_index_ff == 6'h13; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5580 = perr_ic_index_ff == 7'h13; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5582 = _T_5580 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5583 = _T_5582 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5585 = _T_5583 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5586 = _T_5579 | _T_5585; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5596 = _T_4603 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5597 = perr_ic_index_ff == 6'h14; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5597 = perr_ic_index_ff == 7'h14; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5599 = _T_5597 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5600 = _T_5599 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5602 = _T_5600 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5603 = _T_5596 | _T_5602; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5613 = _T_4607 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5614 = perr_ic_index_ff == 6'h15; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5614 = perr_ic_index_ff == 7'h15; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5616 = _T_5614 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5617 = _T_5616 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5619 = _T_5617 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5620 = _T_5613 | _T_5619; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5630 = _T_4611 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5631 = perr_ic_index_ff == 6'h16; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5631 = perr_ic_index_ff == 7'h16; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5633 = _T_5631 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5634 = _T_5633 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5636 = _T_5634 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5637 = _T_5630 | _T_5636; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5647 = _T_4615 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5648 = perr_ic_index_ff == 6'h17; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5648 = perr_ic_index_ff == 7'h17; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5650 = _T_5648 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5651 = _T_5650 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5653 = _T_5651 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5654 = _T_5647 | _T_5653; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5664 = _T_4619 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5665 = perr_ic_index_ff == 6'h18; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5665 = perr_ic_index_ff == 7'h18; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5667 = _T_5665 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5668 = _T_5667 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5670 = _T_5668 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5671 = _T_5664 | _T_5670; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5681 = _T_4623 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5682 = perr_ic_index_ff == 6'h19; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5682 = perr_ic_index_ff == 7'h19; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5684 = _T_5682 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5685 = _T_5684 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5687 = _T_5685 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5688 = _T_5681 | _T_5687; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5698 = _T_4627 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5699 = perr_ic_index_ff == 6'h1a; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5699 = perr_ic_index_ff == 7'h1a; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5701 = _T_5699 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5702 = _T_5701 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5704 = _T_5702 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5705 = _T_5698 | _T_5704; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5715 = _T_4631 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5716 = perr_ic_index_ff == 6'h1b; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5716 = perr_ic_index_ff == 7'h1b; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5718 = _T_5716 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5719 = _T_5718 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5721 = _T_5719 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5722 = _T_5715 | _T_5721; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5732 = _T_4635 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5733 = perr_ic_index_ff == 6'h1c; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5733 = perr_ic_index_ff == 7'h1c; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5735 = _T_5733 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5736 = _T_5735 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5738 = _T_5736 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5739 = _T_5732 | _T_5738; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5749 = _T_4639 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5750 = perr_ic_index_ff == 6'h1d; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5750 = perr_ic_index_ff == 7'h1d; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5752 = _T_5750 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5753 = _T_5752 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5755 = _T_5753 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5756 = _T_5749 | _T_5755; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5766 = _T_4643 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5767 = perr_ic_index_ff == 6'h1e; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5767 = perr_ic_index_ff == 7'h1e; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5769 = _T_5767 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5770 = _T_5769 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5772 = _T_5770 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_5773 = _T_5766 | _T_5772; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_5783 = _T_4647 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_5784 = perr_ic_index_ff == 6'h1f; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_5784 = perr_ic_index_ff == 7'h1f; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_5786 = _T_5784 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_5787 = _T_5786 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_5789 = _T_5787 & tag_valid_clken_0[0]; // @[el2_ifu_mem_ctl.scala 749:163]
@@ -4176,193 +4174,193 @@ module el2_ifu_mem_ctl(
   wire  _T_6333 = _T_6331 & tag_valid_clken_0[1]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6334 = _T_6327 | _T_6333; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6344 = _T_4651 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6345 = perr_ic_index_ff == 6'h20; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6345 = perr_ic_index_ff == 7'h20; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6347 = _T_6345 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6348 = _T_6347 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6350 = _T_6348 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6351 = _T_6344 | _T_6350; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6361 = _T_4655 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6362 = perr_ic_index_ff == 6'h21; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6362 = perr_ic_index_ff == 7'h21; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6364 = _T_6362 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6365 = _T_6364 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6367 = _T_6365 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6368 = _T_6361 | _T_6367; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6378 = _T_4659 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6379 = perr_ic_index_ff == 6'h22; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6379 = perr_ic_index_ff == 7'h22; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6381 = _T_6379 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6382 = _T_6381 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6384 = _T_6382 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6385 = _T_6378 | _T_6384; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6395 = _T_4663 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6396 = perr_ic_index_ff == 6'h23; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6396 = perr_ic_index_ff == 7'h23; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6398 = _T_6396 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6399 = _T_6398 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6401 = _T_6399 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6402 = _T_6395 | _T_6401; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6412 = _T_4667 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6413 = perr_ic_index_ff == 6'h24; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6413 = perr_ic_index_ff == 7'h24; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6415 = _T_6413 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6416 = _T_6415 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6418 = _T_6416 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6419 = _T_6412 | _T_6418; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6429 = _T_4671 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6430 = perr_ic_index_ff == 6'h25; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6430 = perr_ic_index_ff == 7'h25; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6432 = _T_6430 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6433 = _T_6432 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6435 = _T_6433 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6436 = _T_6429 | _T_6435; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6446 = _T_4675 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6447 = perr_ic_index_ff == 6'h26; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6447 = perr_ic_index_ff == 7'h26; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6449 = _T_6447 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6450 = _T_6449 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6452 = _T_6450 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6453 = _T_6446 | _T_6452; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6463 = _T_4679 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6464 = perr_ic_index_ff == 6'h27; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6464 = perr_ic_index_ff == 7'h27; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6466 = _T_6464 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6467 = _T_6466 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6469 = _T_6467 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6470 = _T_6463 | _T_6469; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6480 = _T_4683 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6481 = perr_ic_index_ff == 6'h28; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6481 = perr_ic_index_ff == 7'h28; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6483 = _T_6481 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6484 = _T_6483 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6486 = _T_6484 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6487 = _T_6480 | _T_6486; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6497 = _T_4687 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6498 = perr_ic_index_ff == 6'h29; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6498 = perr_ic_index_ff == 7'h29; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6500 = _T_6498 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6501 = _T_6500 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6503 = _T_6501 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6504 = _T_6497 | _T_6503; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6514 = _T_4691 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6515 = perr_ic_index_ff == 6'h2a; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6515 = perr_ic_index_ff == 7'h2a; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6517 = _T_6515 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6518 = _T_6517 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6520 = _T_6518 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6521 = _T_6514 | _T_6520; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6531 = _T_4695 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6532 = perr_ic_index_ff == 6'h2b; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6532 = perr_ic_index_ff == 7'h2b; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6534 = _T_6532 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6535 = _T_6534 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6537 = _T_6535 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6538 = _T_6531 | _T_6537; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6548 = _T_4699 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6549 = perr_ic_index_ff == 6'h2c; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6549 = perr_ic_index_ff == 7'h2c; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6551 = _T_6549 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6552 = _T_6551 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6554 = _T_6552 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6555 = _T_6548 | _T_6554; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6565 = _T_4703 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6566 = perr_ic_index_ff == 6'h2d; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6566 = perr_ic_index_ff == 7'h2d; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6568 = _T_6566 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6569 = _T_6568 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6571 = _T_6569 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6572 = _T_6565 | _T_6571; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6582 = _T_4707 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6583 = perr_ic_index_ff == 6'h2e; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6583 = perr_ic_index_ff == 7'h2e; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6585 = _T_6583 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6586 = _T_6585 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6588 = _T_6586 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6589 = _T_6582 | _T_6588; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6599 = _T_4711 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6600 = perr_ic_index_ff == 6'h2f; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6600 = perr_ic_index_ff == 7'h2f; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6602 = _T_6600 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6603 = _T_6602 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6605 = _T_6603 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6606 = _T_6599 | _T_6605; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6616 = _T_4715 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6617 = perr_ic_index_ff == 6'h30; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6617 = perr_ic_index_ff == 7'h30; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6619 = _T_6617 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6620 = _T_6619 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6622 = _T_6620 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6623 = _T_6616 | _T_6622; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6633 = _T_4719 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6634 = perr_ic_index_ff == 6'h31; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6634 = perr_ic_index_ff == 7'h31; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6636 = _T_6634 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6637 = _T_6636 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6639 = _T_6637 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6640 = _T_6633 | _T_6639; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6650 = _T_4723 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6651 = perr_ic_index_ff == 6'h32; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6651 = perr_ic_index_ff == 7'h32; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6653 = _T_6651 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6654 = _T_6653 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6656 = _T_6654 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6657 = _T_6650 | _T_6656; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6667 = _T_4727 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6668 = perr_ic_index_ff == 6'h33; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6668 = perr_ic_index_ff == 7'h33; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6670 = _T_6668 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6671 = _T_6670 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6673 = _T_6671 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6674 = _T_6667 | _T_6673; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6684 = _T_4731 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6685 = perr_ic_index_ff == 6'h34; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6685 = perr_ic_index_ff == 7'h34; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6687 = _T_6685 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6688 = _T_6687 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6690 = _T_6688 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6691 = _T_6684 | _T_6690; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6701 = _T_4735 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6702 = perr_ic_index_ff == 6'h35; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6702 = perr_ic_index_ff == 7'h35; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6704 = _T_6702 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6705 = _T_6704 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6707 = _T_6705 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6708 = _T_6701 | _T_6707; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6718 = _T_4739 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6719 = perr_ic_index_ff == 6'h36; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6719 = perr_ic_index_ff == 7'h36; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6721 = _T_6719 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6722 = _T_6721 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6724 = _T_6722 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6725 = _T_6718 | _T_6724; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6735 = _T_4743 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6736 = perr_ic_index_ff == 6'h37; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6736 = perr_ic_index_ff == 7'h37; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6738 = _T_6736 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6739 = _T_6738 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6741 = _T_6739 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6742 = _T_6735 | _T_6741; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6752 = _T_4747 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6753 = perr_ic_index_ff == 6'h38; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6753 = perr_ic_index_ff == 7'h38; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6755 = _T_6753 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6756 = _T_6755 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6758 = _T_6756 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6759 = _T_6752 | _T_6758; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6769 = _T_4751 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6770 = perr_ic_index_ff == 6'h39; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6770 = perr_ic_index_ff == 7'h39; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6772 = _T_6770 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6773 = _T_6772 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6775 = _T_6773 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6776 = _T_6769 | _T_6775; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6786 = _T_4755 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6787 = perr_ic_index_ff == 6'h3a; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6787 = perr_ic_index_ff == 7'h3a; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6789 = _T_6787 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6790 = _T_6789 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6792 = _T_6790 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6793 = _T_6786 | _T_6792; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6803 = _T_4759 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6804 = perr_ic_index_ff == 6'h3b; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6804 = perr_ic_index_ff == 7'h3b; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6806 = _T_6804 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6807 = _T_6806 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6809 = _T_6807 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6810 = _T_6803 | _T_6809; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6820 = _T_4763 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6821 = perr_ic_index_ff == 6'h3c; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6821 = perr_ic_index_ff == 7'h3c; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6823 = _T_6821 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6824 = _T_6823 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6826 = _T_6824 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6827 = _T_6820 | _T_6826; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6837 = _T_4767 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6838 = perr_ic_index_ff == 6'h3d; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6838 = perr_ic_index_ff == 7'h3d; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6840 = _T_6838 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6841 = _T_6840 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6843 = _T_6841 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6844 = _T_6837 | _T_6843; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6854 = _T_4771 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6855 = perr_ic_index_ff == 6'h3e; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6855 = perr_ic_index_ff == 7'h3e; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6857 = _T_6855 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6858 = _T_6857 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6860 = _T_6858 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_6861 = _T_6854 | _T_6860; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_6871 = _T_4775 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_6872 = perr_ic_index_ff == 6'h3f; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_6872 = perr_ic_index_ff == 7'h3f; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_6874 = _T_6872 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_6875 = _T_6874 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_6877 = _T_6875 & tag_valid_clken_1[0]; // @[el2_ifu_mem_ctl.scala 749:163]
@@ -4528,194 +4526,193 @@ module el2_ifu_mem_ctl(
   wire  _T_7421 = _T_7419 & tag_valid_clken_1[1]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7422 = _T_7415 | _T_7421; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7432 = _T_4779 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire [6:0] _GEN_797 = {{1'd0}, perr_ic_index_ff}; // @[el2_ifu_mem_ctl.scala 749:101]
-  wire  _T_7433 = _GEN_797 == 7'h40; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7433 = perr_ic_index_ff == 7'h40; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7435 = _T_7433 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7436 = _T_7435 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7438 = _T_7436 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7439 = _T_7432 | _T_7438; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7449 = _T_4783 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7450 = _GEN_797 == 7'h41; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7450 = perr_ic_index_ff == 7'h41; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7452 = _T_7450 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7453 = _T_7452 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7455 = _T_7453 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7456 = _T_7449 | _T_7455; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7466 = _T_4787 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7467 = _GEN_797 == 7'h42; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7467 = perr_ic_index_ff == 7'h42; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7469 = _T_7467 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7470 = _T_7469 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7472 = _T_7470 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7473 = _T_7466 | _T_7472; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7483 = _T_4791 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7484 = _GEN_797 == 7'h43; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7484 = perr_ic_index_ff == 7'h43; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7486 = _T_7484 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7487 = _T_7486 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7489 = _T_7487 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7490 = _T_7483 | _T_7489; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7500 = _T_4795 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7501 = _GEN_797 == 7'h44; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7501 = perr_ic_index_ff == 7'h44; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7503 = _T_7501 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7504 = _T_7503 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7506 = _T_7504 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7507 = _T_7500 | _T_7506; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7517 = _T_4799 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7518 = _GEN_797 == 7'h45; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7518 = perr_ic_index_ff == 7'h45; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7520 = _T_7518 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7521 = _T_7520 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7523 = _T_7521 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7524 = _T_7517 | _T_7523; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7534 = _T_4803 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7535 = _GEN_797 == 7'h46; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7535 = perr_ic_index_ff == 7'h46; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7537 = _T_7535 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7538 = _T_7537 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7540 = _T_7538 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7541 = _T_7534 | _T_7540; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7551 = _T_4807 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7552 = _GEN_797 == 7'h47; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7552 = perr_ic_index_ff == 7'h47; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7554 = _T_7552 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7555 = _T_7554 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7557 = _T_7555 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7558 = _T_7551 | _T_7557; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7568 = _T_4811 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7569 = _GEN_797 == 7'h48; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7569 = perr_ic_index_ff == 7'h48; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7571 = _T_7569 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7572 = _T_7571 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7574 = _T_7572 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7575 = _T_7568 | _T_7574; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7585 = _T_4815 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7586 = _GEN_797 == 7'h49; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7586 = perr_ic_index_ff == 7'h49; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7588 = _T_7586 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7589 = _T_7588 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7591 = _T_7589 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7592 = _T_7585 | _T_7591; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7602 = _T_4819 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7603 = _GEN_797 == 7'h4a; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7603 = perr_ic_index_ff == 7'h4a; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7605 = _T_7603 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7606 = _T_7605 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7608 = _T_7606 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7609 = _T_7602 | _T_7608; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7619 = _T_4823 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7620 = _GEN_797 == 7'h4b; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7620 = perr_ic_index_ff == 7'h4b; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7622 = _T_7620 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7623 = _T_7622 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7625 = _T_7623 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7626 = _T_7619 | _T_7625; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7636 = _T_4827 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7637 = _GEN_797 == 7'h4c; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7637 = perr_ic_index_ff == 7'h4c; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7639 = _T_7637 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7640 = _T_7639 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7642 = _T_7640 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7643 = _T_7636 | _T_7642; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7653 = _T_4831 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7654 = _GEN_797 == 7'h4d; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7654 = perr_ic_index_ff == 7'h4d; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7656 = _T_7654 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7657 = _T_7656 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7659 = _T_7657 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7660 = _T_7653 | _T_7659; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7670 = _T_4835 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7671 = _GEN_797 == 7'h4e; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7671 = perr_ic_index_ff == 7'h4e; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7673 = _T_7671 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7674 = _T_7673 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7676 = _T_7674 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7677 = _T_7670 | _T_7676; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7687 = _T_4839 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7688 = _GEN_797 == 7'h4f; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7688 = perr_ic_index_ff == 7'h4f; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7690 = _T_7688 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7691 = _T_7690 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7693 = _T_7691 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7694 = _T_7687 | _T_7693; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7704 = _T_4843 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7705 = _GEN_797 == 7'h50; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7705 = perr_ic_index_ff == 7'h50; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7707 = _T_7705 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7708 = _T_7707 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7710 = _T_7708 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7711 = _T_7704 | _T_7710; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7721 = _T_4847 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7722 = _GEN_797 == 7'h51; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7722 = perr_ic_index_ff == 7'h51; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7724 = _T_7722 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7725 = _T_7724 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7727 = _T_7725 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7728 = _T_7721 | _T_7727; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7738 = _T_4851 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7739 = _GEN_797 == 7'h52; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7739 = perr_ic_index_ff == 7'h52; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7741 = _T_7739 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7742 = _T_7741 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7744 = _T_7742 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7745 = _T_7738 | _T_7744; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7755 = _T_4855 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7756 = _GEN_797 == 7'h53; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7756 = perr_ic_index_ff == 7'h53; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7758 = _T_7756 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7759 = _T_7758 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7761 = _T_7759 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7762 = _T_7755 | _T_7761; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7772 = _T_4859 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7773 = _GEN_797 == 7'h54; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7773 = perr_ic_index_ff == 7'h54; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7775 = _T_7773 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7776 = _T_7775 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7778 = _T_7776 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7779 = _T_7772 | _T_7778; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7789 = _T_4863 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7790 = _GEN_797 == 7'h55; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7790 = perr_ic_index_ff == 7'h55; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7792 = _T_7790 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7793 = _T_7792 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7795 = _T_7793 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7796 = _T_7789 | _T_7795; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7806 = _T_4867 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7807 = _GEN_797 == 7'h56; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7807 = perr_ic_index_ff == 7'h56; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7809 = _T_7807 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7810 = _T_7809 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7812 = _T_7810 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7813 = _T_7806 | _T_7812; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7823 = _T_4871 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7824 = _GEN_797 == 7'h57; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7824 = perr_ic_index_ff == 7'h57; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7826 = _T_7824 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7827 = _T_7826 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7829 = _T_7827 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7830 = _T_7823 | _T_7829; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7840 = _T_4875 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7841 = _GEN_797 == 7'h58; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7841 = perr_ic_index_ff == 7'h58; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7843 = _T_7841 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7844 = _T_7843 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7846 = _T_7844 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7847 = _T_7840 | _T_7846; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7857 = _T_4879 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7858 = _GEN_797 == 7'h59; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7858 = perr_ic_index_ff == 7'h59; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7860 = _T_7858 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7861 = _T_7860 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7863 = _T_7861 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7864 = _T_7857 | _T_7863; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7874 = _T_4883 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7875 = _GEN_797 == 7'h5a; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7875 = perr_ic_index_ff == 7'h5a; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7877 = _T_7875 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7878 = _T_7877 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7880 = _T_7878 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7881 = _T_7874 | _T_7880; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7891 = _T_4887 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7892 = _GEN_797 == 7'h5b; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7892 = perr_ic_index_ff == 7'h5b; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7894 = _T_7892 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7895 = _T_7894 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7897 = _T_7895 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7898 = _T_7891 | _T_7897; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7908 = _T_4891 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7909 = _GEN_797 == 7'h5c; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7909 = perr_ic_index_ff == 7'h5c; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7911 = _T_7909 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7912 = _T_7911 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7914 = _T_7912 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7915 = _T_7908 | _T_7914; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7925 = _T_4895 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7926 = _GEN_797 == 7'h5d; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7926 = perr_ic_index_ff == 7'h5d; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7928 = _T_7926 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7929 = _T_7928 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7931 = _T_7929 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7932 = _T_7925 | _T_7931; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7942 = _T_4899 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7943 = _GEN_797 == 7'h5e; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7943 = perr_ic_index_ff == 7'h5e; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7945 = _T_7943 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7946 = _T_7945 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7948 = _T_7946 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_7949 = _T_7942 | _T_7948; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_7959 = _T_4903 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_7960 = _GEN_797 == 7'h5f; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_7960 = perr_ic_index_ff == 7'h5f; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_7962 = _T_7960 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_7963 = _T_7962 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_7965 = _T_7963 & tag_valid_clken_2[0]; // @[el2_ifu_mem_ctl.scala 749:163]
@@ -4881,193 +4878,193 @@ module el2_ifu_mem_ctl(
   wire  _T_8509 = _T_8507 & tag_valid_clken_2[1]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8510 = _T_8503 | _T_8509; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8520 = _T_4907 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8521 = _GEN_797 == 7'h60; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8521 = perr_ic_index_ff == 7'h60; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8523 = _T_8521 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8524 = _T_8523 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8526 = _T_8524 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8527 = _T_8520 | _T_8526; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8537 = _T_4911 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8538 = _GEN_797 == 7'h61; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8538 = perr_ic_index_ff == 7'h61; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8540 = _T_8538 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8541 = _T_8540 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8543 = _T_8541 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8544 = _T_8537 | _T_8543; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8554 = _T_4915 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8555 = _GEN_797 == 7'h62; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8555 = perr_ic_index_ff == 7'h62; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8557 = _T_8555 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8558 = _T_8557 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8560 = _T_8558 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8561 = _T_8554 | _T_8560; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8571 = _T_4919 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8572 = _GEN_797 == 7'h63; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8572 = perr_ic_index_ff == 7'h63; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8574 = _T_8572 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8575 = _T_8574 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8577 = _T_8575 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8578 = _T_8571 | _T_8577; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8588 = _T_4923 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8589 = _GEN_797 == 7'h64; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8589 = perr_ic_index_ff == 7'h64; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8591 = _T_8589 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8592 = _T_8591 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8594 = _T_8592 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8595 = _T_8588 | _T_8594; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8605 = _T_4927 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8606 = _GEN_797 == 7'h65; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8606 = perr_ic_index_ff == 7'h65; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8608 = _T_8606 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8609 = _T_8608 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8611 = _T_8609 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8612 = _T_8605 | _T_8611; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8622 = _T_4931 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8623 = _GEN_797 == 7'h66; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8623 = perr_ic_index_ff == 7'h66; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8625 = _T_8623 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8626 = _T_8625 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8628 = _T_8626 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8629 = _T_8622 | _T_8628; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8639 = _T_4935 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8640 = _GEN_797 == 7'h67; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8640 = perr_ic_index_ff == 7'h67; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8642 = _T_8640 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8643 = _T_8642 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8645 = _T_8643 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8646 = _T_8639 | _T_8645; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8656 = _T_4939 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8657 = _GEN_797 == 7'h68; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8657 = perr_ic_index_ff == 7'h68; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8659 = _T_8657 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8660 = _T_8659 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8662 = _T_8660 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8663 = _T_8656 | _T_8662; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8673 = _T_4943 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8674 = _GEN_797 == 7'h69; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8674 = perr_ic_index_ff == 7'h69; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8676 = _T_8674 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8677 = _T_8676 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8679 = _T_8677 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8680 = _T_8673 | _T_8679; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8690 = _T_4947 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8691 = _GEN_797 == 7'h6a; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8691 = perr_ic_index_ff == 7'h6a; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8693 = _T_8691 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8694 = _T_8693 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8696 = _T_8694 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8697 = _T_8690 | _T_8696; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8707 = _T_4951 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8708 = _GEN_797 == 7'h6b; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8708 = perr_ic_index_ff == 7'h6b; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8710 = _T_8708 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8711 = _T_8710 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8713 = _T_8711 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8714 = _T_8707 | _T_8713; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8724 = _T_4955 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8725 = _GEN_797 == 7'h6c; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8725 = perr_ic_index_ff == 7'h6c; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8727 = _T_8725 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8728 = _T_8727 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8730 = _T_8728 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8731 = _T_8724 | _T_8730; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8741 = _T_4959 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8742 = _GEN_797 == 7'h6d; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8742 = perr_ic_index_ff == 7'h6d; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8744 = _T_8742 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8745 = _T_8744 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8747 = _T_8745 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8748 = _T_8741 | _T_8747; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8758 = _T_4963 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8759 = _GEN_797 == 7'h6e; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8759 = perr_ic_index_ff == 7'h6e; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8761 = _T_8759 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8762 = _T_8761 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8764 = _T_8762 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8765 = _T_8758 | _T_8764; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8775 = _T_4967 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8776 = _GEN_797 == 7'h6f; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8776 = perr_ic_index_ff == 7'h6f; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8778 = _T_8776 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8779 = _T_8778 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8781 = _T_8779 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8782 = _T_8775 | _T_8781; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8792 = _T_4971 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8793 = _GEN_797 == 7'h70; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8793 = perr_ic_index_ff == 7'h70; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8795 = _T_8793 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8796 = _T_8795 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8798 = _T_8796 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8799 = _T_8792 | _T_8798; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8809 = _T_4975 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8810 = _GEN_797 == 7'h71; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8810 = perr_ic_index_ff == 7'h71; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8812 = _T_8810 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8813 = _T_8812 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8815 = _T_8813 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8816 = _T_8809 | _T_8815; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8826 = _T_4979 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8827 = _GEN_797 == 7'h72; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8827 = perr_ic_index_ff == 7'h72; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8829 = _T_8827 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8830 = _T_8829 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8832 = _T_8830 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8833 = _T_8826 | _T_8832; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8843 = _T_4983 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8844 = _GEN_797 == 7'h73; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8844 = perr_ic_index_ff == 7'h73; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8846 = _T_8844 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8847 = _T_8846 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8849 = _T_8847 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8850 = _T_8843 | _T_8849; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8860 = _T_4987 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8861 = _GEN_797 == 7'h74; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8861 = perr_ic_index_ff == 7'h74; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8863 = _T_8861 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8864 = _T_8863 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8866 = _T_8864 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8867 = _T_8860 | _T_8866; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8877 = _T_4991 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8878 = _GEN_797 == 7'h75; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8878 = perr_ic_index_ff == 7'h75; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8880 = _T_8878 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8881 = _T_8880 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8883 = _T_8881 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8884 = _T_8877 | _T_8883; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8894 = _T_4995 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8895 = _GEN_797 == 7'h76; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8895 = perr_ic_index_ff == 7'h76; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8897 = _T_8895 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8898 = _T_8897 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8900 = _T_8898 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8901 = _T_8894 | _T_8900; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8911 = _T_4999 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8912 = _GEN_797 == 7'h77; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8912 = perr_ic_index_ff == 7'h77; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8914 = _T_8912 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8915 = _T_8914 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8917 = _T_8915 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8918 = _T_8911 | _T_8917; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8928 = _T_5003 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8929 = _GEN_797 == 7'h78; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8929 = perr_ic_index_ff == 7'h78; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8931 = _T_8929 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8932 = _T_8931 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8934 = _T_8932 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8935 = _T_8928 | _T_8934; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8945 = _T_5007 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8946 = _GEN_797 == 7'h79; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8946 = perr_ic_index_ff == 7'h79; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8948 = _T_8946 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8949 = _T_8948 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8951 = _T_8949 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8952 = _T_8945 | _T_8951; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8962 = _T_5011 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8963 = _GEN_797 == 7'h7a; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8963 = perr_ic_index_ff == 7'h7a; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8965 = _T_8963 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8966 = _T_8965 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8968 = _T_8966 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8969 = _T_8962 | _T_8968; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8979 = _T_5015 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8980 = _GEN_797 == 7'h7b; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8980 = perr_ic_index_ff == 7'h7b; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8982 = _T_8980 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_8983 = _T_8982 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_8985 = _T_8983 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_8986 = _T_8979 | _T_8985; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_8996 = _T_5019 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_8997 = _GEN_797 == 7'h7c; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_8997 = perr_ic_index_ff == 7'h7c; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_8999 = _T_8997 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_9000 = _T_8999 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_9002 = _T_9000 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_9003 = _T_8996 | _T_9002; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_9013 = _T_5023 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_9014 = _GEN_797 == 7'h7d; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_9014 = perr_ic_index_ff == 7'h7d; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_9016 = _T_9014 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_9017 = _T_9016 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_9019 = _T_9017 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_9020 = _T_9013 | _T_9019; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_9030 = _T_5027 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_9031 = _GEN_797 == 7'h7e; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_9031 = perr_ic_index_ff == 7'h7e; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_9033 = _T_9031 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_9034 = _T_9033 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_9036 = _T_9034 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
   wire  _T_9037 = _T_9030 | _T_9036; // @[el2_ifu_mem_ctl.scala 749:80]
   wire  _T_9047 = _T_5031 & ifu_tag_wren_ff[0]; // @[el2_ifu_mem_ctl.scala 749:58]
-  wire  _T_9048 = _GEN_797 == 7'h7f; // @[el2_ifu_mem_ctl.scala 749:101]
+  wire  _T_9048 = perr_ic_index_ff == 7'h7f; // @[el2_ifu_mem_ctl.scala 749:101]
   wire  _T_9050 = _T_9048 & perr_err_inv_way[0]; // @[el2_ifu_mem_ctl.scala 749:123]
   wire  _T_9051 = _T_9050 | reset_all_tags; // @[el2_ifu_mem_ctl.scala 749:145]
   wire  _T_9053 = _T_9051 & tag_valid_clken_3[0]; // @[el2_ifu_mem_ctl.scala 749:163]
@@ -5403,7 +5400,7 @@ initial begin
   _RAND_20 = {1{`RANDOM}};
   way_status_mb_scnd_ff = _RAND_20[0:0];
   _RAND_21 = {1{`RANDOM}};
-  _T_5166 = _RAND_21[6:0];
+  ifu_ic_rw_int_addr_ff = _RAND_21[6:0];
   _RAND_22 = {1{`RANDOM}};
   _T_4522 = _RAND_22[2:0];
   _RAND_23 = {1{`RANDOM}};
@@ -6245,7 +6242,7 @@ initial begin
   _RAND_441 = {3{`RANDOM}};
   _T_1209 = _RAND_441[70:0];
   _RAND_442 = {1{`RANDOM}};
-  perr_ic_index_ff = _RAND_442[5:0];
+  perr_ic_index_ff = _RAND_442[6:0];
   _RAND_443 = {1{`RANDOM}};
   dma_sb_err_state_ff = _RAND_443[0:0];
   _RAND_444 = {1{`RANDOM}};
@@ -8648,11 +8645,11 @@ end // initial
       sel_mb_addr_ff <= sel_mb_addr;
     end
     if (reset) begin
-      _T_5166 <= 7'h0;
+      ifu_ic_rw_int_addr_ff <= 7'h0;
     end else if (_T_3987) begin
-      _T_5166 <= io_ic_debug_addr[9:3];
+      ifu_ic_rw_int_addr_ff <= io_ic_debug_addr[9:3];
     end else begin
-      _T_5166 <= ifu_ic_rw_int_addr[11:5];
+      ifu_ic_rw_int_addr_ff <= ifu_ic_rw_int_addr[11:5];
     end
     if (reset) begin
       ifu_wr_data_comb_err_ff <= 1'h0;
@@ -8779,7 +8776,7 @@ end // initial
       reset_all_tags <= io_dec_tlu_fence_i_wb;
     end
     if (reset) begin
-      perr_ic_index_ff <= 6'h0;
+      perr_ic_index_ff <= 7'h0;
     end else if (perr_sb_write_status) begin
       perr_ic_index_ff <= ifu_ic_rw_int_addr_ff;
     end
diff --git a/src/main/scala/ifu/el2_ifu_mem_ctl.scala b/src/main/scala/ifu/el2_ifu_mem_ctl.scala
index facedb61..79242c44 100644
--- a/src/main/scala/ifu/el2_ifu_mem_ctl.scala
+++ b/src/main/scala/ifu/el2_ifu_mem_ctl.scala
@@ -468,7 +468,7 @@ class el2_ifu_mem_ctl extends Module with el2_lib {
 
 
   ic_rd_parity_final_err := io.ic_tag_perr & sel_ic_data & !(ifc_region_acc_fault_final_f | ifc_bus_acc_fault_f)
-  val ifu_ic_rw_int_addr_ff = WireInit(UInt((ICACHE_INDEX_HI-ICACHE_TAG_INDEX_LO).W), 0.U)
+  val ifu_ic_rw_int_addr_ff = WireInit(UInt((ICACHE_INDEX_HI-ICACHE_TAG_INDEX_LO+1).W), 0.U)
 
   val perr_sb_write_status = WireInit(Bool(), false.B)
   val perr_ic_index_ff = withClock(io.active_clk){RegEnable(ifu_ic_rw_int_addr_ff, 0.U, perr_sb_write_status)}
diff --git a/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class b/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class
index 9b02fc23..ea2a017e 100644
Binary files a/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class and b/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class differ