diff --git a/el2_lsu_bus_buffer.anno.json b/el2_lsu_bus_buffer.anno.json
new file mode 100644
index 00000000..faf1728b
--- /dev/null
+++ b/el2_lsu_bus_buffer.anno.json
@@ -0,0 +1,175 @@
+[
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ld_fwddata_buf_lo",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_busreq_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ldst_byteen_ext_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_addr_m"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ld_fwddata_buf_hi",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_busreq_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ldst_byteen_ext_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_end_addr_m"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_bus_buffer_full_any",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ldst_dual_d",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_dec_lsu_valid_raw_d"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_valid_m",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ld_full_hit_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pkt_m_load",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_flush_m_up",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_busreq_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pkt_m_valid"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pmu_bus_trxn",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_arvalid",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_arready",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_awvalid",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_awready",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_wvalid",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_wready"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ld_byte_hit_buf_hi",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_busreq_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ldst_byteen_ext_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_end_addr_m"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_imprecise_error_store_any",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_bus_clk_en_q"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_data_valid",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_data_error"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_imprecise_error_addr_any",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_imprecise_error_store_any",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_data_tag",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_bus_clk_en_q"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_inv_r",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_commit_r"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_imprecise_error_load_any",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_data_error",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_imprecise_error_store_any",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_bus_clk_en_q"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ld_byte_hit_buf_lo",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_busreq_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ldst_byteen_ext_m",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_addr_m"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pmu_bus_misaligned",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_commit_r",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_busreq_r",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ldst_dual_r"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pmu_bus_busy",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_arvalid",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_awvalid",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_wvalid",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_arready",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_awready",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_axi_wready"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_pmu_bus_error",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_imprecise_error_load_any",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_imprecise_error_store_any",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_data_error",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_bus_clk_en_q"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_data",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_data_tag"
+    ]
+  },
+  {
+    "class":"firrtl.transforms.CombinationalPath",
+    "sink":"~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_nonblock_load_tag_m",
+    "sources":[
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_ldst_dual_r",
+      "~el2_lsu_bus_buffer|el2_lsu_bus_buffer>io_lsu_busreq_m"
+    ]
+  },
+  {
+    "class":"firrtl.EmitCircuitAnnotation",
+    "emitter":"firrtl.VerilogEmitter"
+  },
+  {
+    "class":"firrtl.transforms.BlackBoxResourceAnno",
+    "target":"el2_lsu_bus_buffer.TEC_RV_ICG",
+    "resourceId":"/vsrc/TEC_RV_ICG.v"
+  },
+  {
+    "class":"firrtl.options.TargetDirAnnotation",
+    "directory":"."
+  },
+  {
+    "class":"firrtl.options.OutputAnnotationFileAnnotation",
+    "file":"el2_lsu_bus_buffer"
+  },
+  {
+    "class":"firrtl.transforms.BlackBoxTargetDirAnno",
+    "targetDir":"."
+  }
+]
\ No newline at end of file
diff --git a/el2_lsu_bus_buffer.fir b/el2_lsu_bus_buffer.fir
new file mode 100644
index 00000000..c30f2efb
--- /dev/null
+++ b/el2_lsu_bus_buffer.fir
@@ -0,0 +1,6364 @@
+;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
+circuit el2_lsu_bus_buffer : 
+  extmodule TEC_RV_ICG : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_1 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_1 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_1 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_2 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_2 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_2 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_3 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_3 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_3 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_4 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_4 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_4 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_5 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_5 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_5 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_6 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_6 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_6 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_7 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_7 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_7 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_8 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_8 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_8 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_9 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_9 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_9 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_10 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_10 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_10 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  extmodule TEC_RV_ICG_11 : 
+    output Q : Clock
+    input CK : Clock
+    input EN : UInt<1>
+    input SE : UInt<1>
+    
+    defname = TEC_RV_ICG
+    
+    
+  module rvclkhdr_11 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
+    
+    inst clkhdr of TEC_RV_ICG_11 @[el2_lib.scala 452:26]
+    clkhdr.SE is invalid
+    clkhdr.EN is invalid
+    clkhdr.CK is invalid
+    clkhdr.Q is invalid
+    io.l1clk <= clkhdr.Q @[el2_lib.scala 453:14]
+    clkhdr.CK <= io.clk @[el2_lib.scala 454:18]
+    clkhdr.EN <= io.en @[el2_lib.scala 455:18]
+    clkhdr.SE <= io.scan_mode @[el2_lib.scala 456:18]
+    
+  module el2_lsu_bus_buffer : 
+    input clock : Clock
+    input reset : AsyncReset
+    output io : {flip scan_mode : UInt<1>, flip dec_tlu_external_ldfwd_disable : UInt<1>, flip dec_tlu_wb_coalescing_disable : UInt<1>, flip dec_tlu_sideeffect_posted_disable : UInt<1>, flip dec_tlu_force_halt : UInt<1>, flip lsu_c2_r_clk : Clock, flip lsu_bus_ibuf_c1_clk : Clock, flip lsu_bus_obuf_c1_clk : Clock, flip lsu_bus_buf_c1_clk : Clock, flip lsu_free_c2_clk : Clock, flip lsu_busm_clk : Clock, flip dec_lsu_valid_raw_d : UInt<1>, flip lsu_pkt_m : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_pkt_r : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>, valid : UInt<1>}, flip lsu_addr_m : UInt<32>, flip end_addr_m : UInt<32>, flip lsu_addr_r : UInt<32>, flip end_addr_r : UInt<32>, flip store_data_r : UInt<32>, flip no_word_merge_r : UInt<1>, flip no_dword_merge_r : UInt<1>, flip lsu_busreq_m : UInt<1>, flip ld_full_hit_m : UInt<1>, flip flush_m_up : UInt<1>, flip flush_r : UInt<1>, flip lsu_commit_r : UInt<1>, flip is_sideeffects_r : UInt<1>, flip ldst_dual_d : UInt<1>, flip ldst_dual_m : UInt<1>, flip ldst_dual_r : UInt<1>, flip ldst_byteen_ext_m : UInt<8>, flip lsu_axi_awready : UInt<1>, flip lsu_axi_wready : UInt<1>, flip lsu_axi_bvalid : UInt<1>, flip lsu_axi_bresp : UInt<2>, flip lsu_axi_bid : UInt<3>, flip lsu_axi_arready : UInt<1>, flip lsu_axi_rvalid : UInt<1>, flip lsu_axi_rid : UInt<3>, flip lsu_axi_rdata : UInt<64>, flip lsu_axi_rresp : UInt<2>, flip lsu_bus_clk_en : UInt<1>, flip lsu_bus_clk_en_q : UInt<1>, lsu_busreq_r : UInt<1>, lsu_bus_buffer_pend_any : UInt<1>, lsu_bus_buffer_full_any : UInt<1>, lsu_bus_buffer_empty_any : UInt<1>, lsu_bus_idle_any : UInt<1>, ld_byte_hit_buf_lo : UInt<4>, ld_byte_hit_buf_hi : UInt<4>, ld_fwddata_buf_lo : UInt<32>, ld_fwddata_buf_hi : UInt<32>, lsu_imprecise_error_load_any : UInt<1>, lsu_imprecise_error_store_any : UInt<1>, lsu_imprecise_error_addr_any : UInt<32>, lsu_nonblock_load_valid_m : UInt<1>, lsu_nonblock_load_tag_m : UInt<2>, lsu_nonblock_load_inv_r : UInt<1>, lsu_nonblock_load_inv_tag_r : UInt<2>, lsu_nonblock_load_data_valid : UInt<1>, lsu_nonblock_load_data_error : UInt<1>, lsu_nonblock_load_data_tag : UInt<2>, lsu_nonblock_load_data : UInt<32>, lsu_pmu_bus_trxn : UInt<1>, lsu_pmu_bus_misaligned : UInt<1>, lsu_pmu_bus_error : UInt<1>, lsu_pmu_bus_busy : UInt<1>, lsu_axi_awvalid : UInt<1>, lsu_axi_awid : UInt<3>, lsu_axi_awaddr : UInt<32>, lsu_axi_awregion : UInt<4>, lsu_axi_awlen : UInt<8>, lsu_axi_awsize : UInt<3>, lsu_axi_awburst : UInt<2>, lsu_axi_awlock : UInt<1>, lsu_axi_awcache : UInt<4>, lsu_axi_awprot : UInt<3>, lsu_axi_awqos : UInt<4>, lsu_axi_wvalid : UInt<1>, lsu_axi_wdata : UInt<64>, lsu_axi_wstrb : UInt<8>, lsu_axi_wlast : UInt<1>, lsu_axi_bready : UInt<1>, lsu_axi_arvalid : UInt<1>, lsu_axi_arid : UInt<3>, lsu_axi_araddr : UInt<32>, lsu_axi_arregion : UInt<4>, lsu_axi_arlen : UInt<8>, lsu_axi_arsize : UInt<3>, lsu_axi_arburst : UInt<2>, lsu_axi_arlock : UInt<1>, lsu_axi_arcache : UInt<4>, lsu_axi_arprot : UInt<3>, lsu_axi_arqos : UInt<4>, lsu_axi_rready : UInt<1>}
+    
+    wire buf_addr : UInt<32>[4] @[el2_lsu_bus_buffer.scala 120:22]
+    wire buf_state : UInt<3>[4] @[el2_lsu_bus_buffer.scala 121:23]
+    wire buf_write : UInt<4>
+    buf_write <= UInt<1>("h00")
+    node ldst_byteen_hi_m = bits(io.ldst_byteen_ext_m, 7, 4) @[el2_lsu_bus_buffer.scala 125:46]
+    node ldst_byteen_lo_m = bits(io.ldst_byteen_ext_m, 3, 0) @[el2_lsu_bus_buffer.scala 126:46]
+    node _T = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66]
+    node _T_1 = bits(buf_addr[0], 31, 2) @[el2_lsu_bus_buffer.scala 128:89]
+    node _T_2 = eq(_T, _T_1) @[el2_lsu_bus_buffer.scala 128:74]
+    node _T_3 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 128:109]
+    node _T_4 = and(_T_2, _T_3) @[el2_lsu_bus_buffer.scala 128:98]
+    node _T_5 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129]
+    node _T_6 = and(_T_4, _T_5) @[el2_lsu_bus_buffer.scala 128:113]
+    node ld_addr_hitvec_lo_0 = and(_T_6, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141]
+    node _T_7 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66]
+    node _T_8 = bits(buf_addr[1], 31, 2) @[el2_lsu_bus_buffer.scala 128:89]
+    node _T_9 = eq(_T_7, _T_8) @[el2_lsu_bus_buffer.scala 128:74]
+    node _T_10 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 128:109]
+    node _T_11 = and(_T_9, _T_10) @[el2_lsu_bus_buffer.scala 128:98]
+    node _T_12 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129]
+    node _T_13 = and(_T_11, _T_12) @[el2_lsu_bus_buffer.scala 128:113]
+    node ld_addr_hitvec_lo_1 = and(_T_13, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141]
+    node _T_14 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66]
+    node _T_15 = bits(buf_addr[2], 31, 2) @[el2_lsu_bus_buffer.scala 128:89]
+    node _T_16 = eq(_T_14, _T_15) @[el2_lsu_bus_buffer.scala 128:74]
+    node _T_17 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 128:109]
+    node _T_18 = and(_T_16, _T_17) @[el2_lsu_bus_buffer.scala 128:98]
+    node _T_19 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129]
+    node _T_20 = and(_T_18, _T_19) @[el2_lsu_bus_buffer.scala 128:113]
+    node ld_addr_hitvec_lo_2 = and(_T_20, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141]
+    node _T_21 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 128:66]
+    node _T_22 = bits(buf_addr[3], 31, 2) @[el2_lsu_bus_buffer.scala 128:89]
+    node _T_23 = eq(_T_21, _T_22) @[el2_lsu_bus_buffer.scala 128:74]
+    node _T_24 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 128:109]
+    node _T_25 = and(_T_23, _T_24) @[el2_lsu_bus_buffer.scala 128:98]
+    node _T_26 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 128:129]
+    node _T_27 = and(_T_25, _T_26) @[el2_lsu_bus_buffer.scala 128:113]
+    node ld_addr_hitvec_lo_3 = and(_T_27, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 128:141]
+    node _T_28 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66]
+    node _T_29 = bits(buf_addr[0], 31, 2) @[el2_lsu_bus_buffer.scala 129:89]
+    node _T_30 = eq(_T_28, _T_29) @[el2_lsu_bus_buffer.scala 129:74]
+    node _T_31 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 129:109]
+    node _T_32 = and(_T_30, _T_31) @[el2_lsu_bus_buffer.scala 129:98]
+    node _T_33 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129]
+    node _T_34 = and(_T_32, _T_33) @[el2_lsu_bus_buffer.scala 129:113]
+    node ld_addr_hitvec_hi_0 = and(_T_34, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141]
+    node _T_35 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66]
+    node _T_36 = bits(buf_addr[1], 31, 2) @[el2_lsu_bus_buffer.scala 129:89]
+    node _T_37 = eq(_T_35, _T_36) @[el2_lsu_bus_buffer.scala 129:74]
+    node _T_38 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 129:109]
+    node _T_39 = and(_T_37, _T_38) @[el2_lsu_bus_buffer.scala 129:98]
+    node _T_40 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129]
+    node _T_41 = and(_T_39, _T_40) @[el2_lsu_bus_buffer.scala 129:113]
+    node ld_addr_hitvec_hi_1 = and(_T_41, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141]
+    node _T_42 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66]
+    node _T_43 = bits(buf_addr[2], 31, 2) @[el2_lsu_bus_buffer.scala 129:89]
+    node _T_44 = eq(_T_42, _T_43) @[el2_lsu_bus_buffer.scala 129:74]
+    node _T_45 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 129:109]
+    node _T_46 = and(_T_44, _T_45) @[el2_lsu_bus_buffer.scala 129:98]
+    node _T_47 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129]
+    node _T_48 = and(_T_46, _T_47) @[el2_lsu_bus_buffer.scala 129:113]
+    node ld_addr_hitvec_hi_2 = and(_T_48, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141]
+    node _T_49 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 129:66]
+    node _T_50 = bits(buf_addr[3], 31, 2) @[el2_lsu_bus_buffer.scala 129:89]
+    node _T_51 = eq(_T_49, _T_50) @[el2_lsu_bus_buffer.scala 129:74]
+    node _T_52 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 129:109]
+    node _T_53 = and(_T_51, _T_52) @[el2_lsu_bus_buffer.scala 129:98]
+    node _T_54 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 129:129]
+    node _T_55 = and(_T_53, _T_54) @[el2_lsu_bus_buffer.scala 129:113]
+    node ld_addr_hitvec_hi_3 = and(_T_55, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 129:141]
+    wire ld_byte_hitvecfn_lo : UInt<4>[4] @[el2_lsu_bus_buffer.scala 130:33]
+    wire ld_byte_ibuf_hit_lo : UInt<4>
+    ld_byte_ibuf_hit_lo <= UInt<1>("h00")
+    wire ld_byte_hitvecfn_hi : UInt<4>[4] @[el2_lsu_bus_buffer.scala 132:33]
+    wire ld_byte_ibuf_hit_hi : UInt<4>
+    ld_byte_ibuf_hit_hi <= UInt<1>("h00")
+    wire buf_byteen : UInt<4>[4] @[el2_lsu_bus_buffer.scala 134:24]
+    buf_byteen[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14]
+    buf_byteen[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14]
+    buf_byteen[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14]
+    buf_byteen[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 135:14]
+    wire buf_nxtstate : UInt<3>[4] @[el2_lsu_bus_buffer.scala 136:26]
+    buf_nxtstate[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16]
+    buf_nxtstate[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16]
+    buf_nxtstate[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16]
+    buf_nxtstate[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 137:16]
+    wire buf_wr_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 138:23]
+    buf_wr_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13]
+    buf_wr_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13]
+    buf_wr_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13]
+    buf_wr_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 139:13]
+    wire buf_data_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 140:25]
+    buf_data_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15]
+    buf_data_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15]
+    buf_data_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15]
+    buf_data_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 141:15]
+    wire buf_state_bus_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 142:30]
+    buf_state_bus_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20]
+    buf_state_bus_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20]
+    buf_state_bus_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20]
+    buf_state_bus_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 143:20]
+    wire buf_ldfwd_in : UInt<1>[4] @[el2_lsu_bus_buffer.scala 144:26]
+    buf_ldfwd_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16]
+    buf_ldfwd_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16]
+    buf_ldfwd_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16]
+    buf_ldfwd_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 145:16]
+    wire buf_ldfwd_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 146:26]
+    buf_ldfwd_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16]
+    buf_ldfwd_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16]
+    buf_ldfwd_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16]
+    buf_ldfwd_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 147:16]
+    wire buf_data_in : UInt<4>[4] @[el2_lsu_bus_buffer.scala 148:25]
+    buf_data_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15]
+    buf_data_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15]
+    buf_data_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15]
+    buf_data_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 149:15]
+    wire buf_ldfwdtag_in : UInt<2>[4] @[el2_lsu_bus_buffer.scala 150:29]
+    buf_ldfwdtag_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19]
+    buf_ldfwdtag_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19]
+    buf_ldfwdtag_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19]
+    buf_ldfwdtag_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 151:19]
+    wire buf_error_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 152:26]
+    buf_error_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16]
+    buf_error_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16]
+    buf_error_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16]
+    buf_error_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 153:16]
+    wire bus_rsp_read_error : UInt<1>
+    bus_rsp_read_error <= UInt<1>("h00")
+    wire bus_rsp_rdata : UInt<64>
+    bus_rsp_rdata <= UInt<1>("h00")
+    wire bus_rsp_write_error : UInt<1>
+    bus_rsp_write_error <= UInt<1>("h00")
+    wire buf_dualtag : UInt<2>[4] @[el2_lsu_bus_buffer.scala 157:25]
+    buf_dualtag[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15]
+    buf_dualtag[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15]
+    buf_dualtag[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15]
+    buf_dualtag[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 158:15]
+    wire buf_ldfwd : UInt<4>
+    buf_ldfwd <= UInt<1>("h00")
+    wire buf_resp_state_bus_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 160:35]
+    buf_resp_state_bus_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25]
+    buf_resp_state_bus_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25]
+    buf_resp_state_bus_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25]
+    buf_resp_state_bus_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 161:25]
+    wire any_done_wait_state : UInt<1>
+    any_done_wait_state <= UInt<1>("h00")
+    wire bus_rsp_write : UInt<1>
+    bus_rsp_write <= UInt<1>("h00")
+    wire bus_rsp_write_tag : UInt<3>
+    bus_rsp_write_tag <= UInt<1>("h00")
+    wire buf_ldfwdtag : UInt<2>[4] @[el2_lsu_bus_buffer.scala 165:26]
+    buf_ldfwdtag[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16]
+    buf_ldfwdtag[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16]
+    buf_ldfwdtag[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16]
+    buf_ldfwdtag[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 166:16]
+    wire buf_rst : UInt<1>[4] @[el2_lsu_bus_buffer.scala 167:21]
+    buf_rst[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11]
+    buf_rst[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11]
+    buf_rst[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11]
+    buf_rst[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 168:11]
+    wire ibuf_drainvec_vld : UInt<4>
+    ibuf_drainvec_vld <= UInt<1>("h00")
+    wire buf_byteen_in : UInt<3>[4] @[el2_lsu_bus_buffer.scala 170:27]
+    buf_byteen_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17]
+    buf_byteen_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17]
+    buf_byteen_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17]
+    buf_byteen_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 171:17]
+    wire buf_addr_in : UInt<32>[4] @[el2_lsu_bus_buffer.scala 172:25]
+    buf_addr_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15]
+    buf_addr_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15]
+    buf_addr_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15]
+    buf_addr_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 173:15]
+    wire buf_dual_in : UInt<4>
+    buf_dual_in <= UInt<1>("h00")
+    wire buf_samedw_in : UInt<4>
+    buf_samedw_in <= UInt<1>("h00")
+    wire buf_nomerge_in : UInt<4>
+    buf_nomerge_in <= UInt<1>("h00")
+    wire buf_dualhi_in : UInt<4>
+    buf_dualhi_in <= UInt<1>("h00")
+    wire buf_dualtag_in : UInt<2>[4] @[el2_lsu_bus_buffer.scala 178:28]
+    buf_dualtag_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18]
+    buf_dualtag_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18]
+    buf_dualtag_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18]
+    buf_dualtag_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 179:18]
+    wire buf_sideeffect_in : UInt<4>
+    buf_sideeffect_in <= UInt<1>("h00")
+    wire buf_unsign_in : UInt<4>
+    buf_unsign_in <= UInt<1>("h00")
+    wire buf_sz_in : UInt<2>[4] @[el2_lsu_bus_buffer.scala 182:23]
+    buf_sz_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13]
+    buf_sz_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13]
+    buf_sz_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13]
+    buf_sz_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 183:13]
+    wire buf_write_in : UInt<4>
+    buf_write_in <= UInt<1>("h00")
+    wire buf_unsign : UInt<4>
+    buf_unsign <= UInt<1>("h00")
+    wire buf_error : UInt<4>
+    buf_error <= UInt<1>("h00")
+    node _T_56 = orr(ld_byte_hitvecfn_lo[0]) @[el2_lsu_bus_buffer.scala 188:73]
+    node _T_57 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 188:98]
+    node _T_58 = or(_T_56, _T_57) @[el2_lsu_bus_buffer.scala 188:77]
+    node _T_59 = orr(ld_byte_hitvecfn_lo[1]) @[el2_lsu_bus_buffer.scala 188:73]
+    node _T_60 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 188:98]
+    node _T_61 = or(_T_59, _T_60) @[el2_lsu_bus_buffer.scala 188:77]
+    node _T_62 = orr(ld_byte_hitvecfn_lo[2]) @[el2_lsu_bus_buffer.scala 188:73]
+    node _T_63 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 188:98]
+    node _T_64 = or(_T_62, _T_63) @[el2_lsu_bus_buffer.scala 188:77]
+    node _T_65 = orr(ld_byte_hitvecfn_lo[3]) @[el2_lsu_bus_buffer.scala 188:73]
+    node _T_66 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 188:98]
+    node _T_67 = or(_T_65, _T_66) @[el2_lsu_bus_buffer.scala 188:77]
+    node _T_68 = cat(_T_67, _T_64) @[Cat.scala 29:58]
+    node _T_69 = cat(_T_68, _T_61) @[Cat.scala 29:58]
+    node _T_70 = cat(_T_69, _T_58) @[Cat.scala 29:58]
+    io.ld_byte_hit_buf_lo <= _T_70 @[el2_lsu_bus_buffer.scala 188:25]
+    node _T_71 = orr(ld_byte_hitvecfn_hi[0]) @[el2_lsu_bus_buffer.scala 189:73]
+    node _T_72 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 189:98]
+    node _T_73 = or(_T_71, _T_72) @[el2_lsu_bus_buffer.scala 189:77]
+    node _T_74 = orr(ld_byte_hitvecfn_hi[1]) @[el2_lsu_bus_buffer.scala 189:73]
+    node _T_75 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 189:98]
+    node _T_76 = or(_T_74, _T_75) @[el2_lsu_bus_buffer.scala 189:77]
+    node _T_77 = orr(ld_byte_hitvecfn_hi[2]) @[el2_lsu_bus_buffer.scala 189:73]
+    node _T_78 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 189:98]
+    node _T_79 = or(_T_77, _T_78) @[el2_lsu_bus_buffer.scala 189:77]
+    node _T_80 = orr(ld_byte_hitvecfn_hi[3]) @[el2_lsu_bus_buffer.scala 189:73]
+    node _T_81 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 189:98]
+    node _T_82 = or(_T_80, _T_81) @[el2_lsu_bus_buffer.scala 189:77]
+    node _T_83 = cat(_T_82, _T_79) @[Cat.scala 29:58]
+    node _T_84 = cat(_T_83, _T_76) @[Cat.scala 29:58]
+    node _T_85 = cat(_T_84, _T_73) @[Cat.scala 29:58]
+    io.ld_byte_hit_buf_hi <= _T_85 @[el2_lsu_bus_buffer.scala 189:25]
+    node _T_86 = bits(buf_byteen[0], 0, 0) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_87 = and(ld_addr_hitvec_lo_0, _T_86) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_88 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_89 = and(_T_87, _T_88) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_90 = bits(buf_byteen[1], 0, 0) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_91 = and(ld_addr_hitvec_lo_1, _T_90) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_92 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_93 = and(_T_91, _T_92) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_94 = bits(buf_byteen[2], 0, 0) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_95 = and(ld_addr_hitvec_lo_2, _T_94) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_96 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_97 = and(_T_95, _T_96) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_98 = bits(buf_byteen[3], 0, 0) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_99 = and(ld_addr_hitvec_lo_3, _T_98) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_100 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_101 = and(_T_99, _T_100) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_102 = cat(_T_101, _T_97) @[Cat.scala 29:58]
+    node _T_103 = cat(_T_102, _T_93) @[Cat.scala 29:58]
+    node ld_byte_hitvec_lo_0 = cat(_T_103, _T_89) @[Cat.scala 29:58]
+    node _T_104 = bits(buf_byteen[0], 1, 1) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_105 = and(ld_addr_hitvec_lo_0, _T_104) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_106 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_107 = and(_T_105, _T_106) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_108 = bits(buf_byteen[1], 1, 1) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_109 = and(ld_addr_hitvec_lo_1, _T_108) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_110 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_111 = and(_T_109, _T_110) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_112 = bits(buf_byteen[2], 1, 1) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_113 = and(ld_addr_hitvec_lo_2, _T_112) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_114 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_115 = and(_T_113, _T_114) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_116 = bits(buf_byteen[3], 1, 1) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_117 = and(ld_addr_hitvec_lo_3, _T_116) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_118 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_119 = and(_T_117, _T_118) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_120 = cat(_T_119, _T_115) @[Cat.scala 29:58]
+    node _T_121 = cat(_T_120, _T_111) @[Cat.scala 29:58]
+    node ld_byte_hitvec_lo_1 = cat(_T_121, _T_107) @[Cat.scala 29:58]
+    node _T_122 = bits(buf_byteen[0], 2, 2) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_123 = and(ld_addr_hitvec_lo_0, _T_122) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_124 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_125 = and(_T_123, _T_124) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_126 = bits(buf_byteen[1], 2, 2) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_127 = and(ld_addr_hitvec_lo_1, _T_126) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_128 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_129 = and(_T_127, _T_128) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_130 = bits(buf_byteen[2], 2, 2) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_131 = and(ld_addr_hitvec_lo_2, _T_130) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_132 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_133 = and(_T_131, _T_132) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_134 = bits(buf_byteen[3], 2, 2) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_135 = and(ld_addr_hitvec_lo_3, _T_134) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_136 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_137 = and(_T_135, _T_136) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_138 = cat(_T_137, _T_133) @[Cat.scala 29:58]
+    node _T_139 = cat(_T_138, _T_129) @[Cat.scala 29:58]
+    node ld_byte_hitvec_lo_2 = cat(_T_139, _T_125) @[Cat.scala 29:58]
+    node _T_140 = bits(buf_byteen[0], 3, 3) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_141 = and(ld_addr_hitvec_lo_0, _T_140) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_142 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_143 = and(_T_141, _T_142) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_144 = bits(buf_byteen[1], 3, 3) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_145 = and(ld_addr_hitvec_lo_1, _T_144) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_146 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_147 = and(_T_145, _T_146) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_148 = bits(buf_byteen[2], 3, 3) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_149 = and(ld_addr_hitvec_lo_2, _T_148) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_150 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_151 = and(_T_149, _T_150) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_152 = bits(buf_byteen[3], 3, 3) @[el2_lsu_bus_buffer.scala 191:110]
+    node _T_153 = and(ld_addr_hitvec_lo_3, _T_152) @[el2_lsu_bus_buffer.scala 191:95]
+    node _T_154 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 191:132]
+    node _T_155 = and(_T_153, _T_154) @[el2_lsu_bus_buffer.scala 191:114]
+    node _T_156 = cat(_T_155, _T_151) @[Cat.scala 29:58]
+    node _T_157 = cat(_T_156, _T_147) @[Cat.scala 29:58]
+    node ld_byte_hitvec_lo_3 = cat(_T_157, _T_143) @[Cat.scala 29:58]
+    node _T_158 = bits(buf_byteen[0], 0, 0) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_159 = and(ld_addr_hitvec_hi_0, _T_158) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_160 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_161 = and(_T_159, _T_160) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_162 = bits(buf_byteen[1], 0, 0) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_163 = and(ld_addr_hitvec_hi_1, _T_162) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_164 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_165 = and(_T_163, _T_164) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_166 = bits(buf_byteen[2], 0, 0) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_167 = and(ld_addr_hitvec_hi_2, _T_166) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_168 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_169 = and(_T_167, _T_168) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_170 = bits(buf_byteen[3], 0, 0) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_171 = and(ld_addr_hitvec_hi_3, _T_170) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_172 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_173 = and(_T_171, _T_172) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_174 = cat(_T_173, _T_169) @[Cat.scala 29:58]
+    node _T_175 = cat(_T_174, _T_165) @[Cat.scala 29:58]
+    node ld_byte_hitvec_hi_0 = cat(_T_175, _T_161) @[Cat.scala 29:58]
+    node _T_176 = bits(buf_byteen[0], 1, 1) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_177 = and(ld_addr_hitvec_hi_0, _T_176) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_178 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_179 = and(_T_177, _T_178) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_180 = bits(buf_byteen[1], 1, 1) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_181 = and(ld_addr_hitvec_hi_1, _T_180) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_182 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_183 = and(_T_181, _T_182) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_184 = bits(buf_byteen[2], 1, 1) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_185 = and(ld_addr_hitvec_hi_2, _T_184) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_186 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_187 = and(_T_185, _T_186) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_188 = bits(buf_byteen[3], 1, 1) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_189 = and(ld_addr_hitvec_hi_3, _T_188) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_190 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_191 = and(_T_189, _T_190) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_192 = cat(_T_191, _T_187) @[Cat.scala 29:58]
+    node _T_193 = cat(_T_192, _T_183) @[Cat.scala 29:58]
+    node ld_byte_hitvec_hi_1 = cat(_T_193, _T_179) @[Cat.scala 29:58]
+    node _T_194 = bits(buf_byteen[0], 2, 2) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_195 = and(ld_addr_hitvec_hi_0, _T_194) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_196 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_197 = and(_T_195, _T_196) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_198 = bits(buf_byteen[1], 2, 2) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_199 = and(ld_addr_hitvec_hi_1, _T_198) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_200 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_201 = and(_T_199, _T_200) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_202 = bits(buf_byteen[2], 2, 2) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_203 = and(ld_addr_hitvec_hi_2, _T_202) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_204 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_205 = and(_T_203, _T_204) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_206 = bits(buf_byteen[3], 2, 2) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_207 = and(ld_addr_hitvec_hi_3, _T_206) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_208 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_209 = and(_T_207, _T_208) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_210 = cat(_T_209, _T_205) @[Cat.scala 29:58]
+    node _T_211 = cat(_T_210, _T_201) @[Cat.scala 29:58]
+    node ld_byte_hitvec_hi_2 = cat(_T_211, _T_197) @[Cat.scala 29:58]
+    node _T_212 = bits(buf_byteen[0], 3, 3) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_213 = and(ld_addr_hitvec_hi_0, _T_212) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_214 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_215 = and(_T_213, _T_214) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_216 = bits(buf_byteen[1], 3, 3) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_217 = and(ld_addr_hitvec_hi_1, _T_216) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_218 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_219 = and(_T_217, _T_218) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_220 = bits(buf_byteen[2], 3, 3) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_221 = and(ld_addr_hitvec_hi_2, _T_220) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_222 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_223 = and(_T_221, _T_222) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_224 = bits(buf_byteen[3], 3, 3) @[el2_lsu_bus_buffer.scala 192:110]
+    node _T_225 = and(ld_addr_hitvec_hi_3, _T_224) @[el2_lsu_bus_buffer.scala 192:95]
+    node _T_226 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 192:132]
+    node _T_227 = and(_T_225, _T_226) @[el2_lsu_bus_buffer.scala 192:114]
+    node _T_228 = cat(_T_227, _T_223) @[Cat.scala 29:58]
+    node _T_229 = cat(_T_228, _T_219) @[Cat.scala 29:58]
+    node ld_byte_hitvec_hi_3 = cat(_T_229, _T_215) @[Cat.scala 29:58]
+    wire buf_age_younger : UInt<4>[4] @[el2_lsu_bus_buffer.scala 194:29]
+    buf_age_younger[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 195:19]
+    buf_age_younger[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 195:19]
+    buf_age_younger[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 195:19]
+    buf_age_younger[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 195:19]
+    node _T_230 = bits(ld_byte_hitvec_lo_0, 0, 0) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_231 = and(ld_byte_hitvec_lo_0, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_232 = orr(_T_231) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_233 = eq(_T_232, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_234 = and(_T_230, _T_233) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_235 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_236 = eq(_T_235, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_237 = and(_T_234, _T_236) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_238 = bits(ld_byte_hitvec_lo_0, 1, 1) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_239 = and(ld_byte_hitvec_lo_0, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_240 = orr(_T_239) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_241 = eq(_T_240, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_242 = and(_T_238, _T_241) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_243 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_244 = eq(_T_243, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_245 = and(_T_242, _T_244) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_246 = bits(ld_byte_hitvec_lo_0, 2, 2) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_247 = and(ld_byte_hitvec_lo_0, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_248 = orr(_T_247) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_249 = eq(_T_248, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_250 = and(_T_246, _T_249) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_251 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_252 = eq(_T_251, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_253 = and(_T_250, _T_252) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_254 = bits(ld_byte_hitvec_lo_0, 3, 3) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_255 = and(ld_byte_hitvec_lo_0, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_256 = orr(_T_255) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_257 = eq(_T_256, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_258 = and(_T_254, _T_257) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_259 = bits(ld_byte_ibuf_hit_lo, 0, 0) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_260 = eq(_T_259, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_261 = and(_T_258, _T_260) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_262 = cat(_T_261, _T_253) @[Cat.scala 29:58]
+    node _T_263 = cat(_T_262, _T_245) @[Cat.scala 29:58]
+    node _T_264 = cat(_T_263, _T_237) @[Cat.scala 29:58]
+    node _T_265 = bits(ld_byte_hitvec_lo_1, 0, 0) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_266 = and(ld_byte_hitvec_lo_1, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_267 = orr(_T_266) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_268 = eq(_T_267, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_269 = and(_T_265, _T_268) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_270 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_271 = eq(_T_270, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_272 = and(_T_269, _T_271) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_273 = bits(ld_byte_hitvec_lo_1, 1, 1) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_274 = and(ld_byte_hitvec_lo_1, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_275 = orr(_T_274) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_276 = eq(_T_275, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_277 = and(_T_273, _T_276) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_278 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_279 = eq(_T_278, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_280 = and(_T_277, _T_279) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_281 = bits(ld_byte_hitvec_lo_1, 2, 2) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_282 = and(ld_byte_hitvec_lo_1, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_283 = orr(_T_282) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_284 = eq(_T_283, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_285 = and(_T_281, _T_284) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_286 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_287 = eq(_T_286, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_288 = and(_T_285, _T_287) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_289 = bits(ld_byte_hitvec_lo_1, 3, 3) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_290 = and(ld_byte_hitvec_lo_1, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_291 = orr(_T_290) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_292 = eq(_T_291, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_293 = and(_T_289, _T_292) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_294 = bits(ld_byte_ibuf_hit_lo, 1, 1) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_295 = eq(_T_294, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_296 = and(_T_293, _T_295) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_297 = cat(_T_296, _T_288) @[Cat.scala 29:58]
+    node _T_298 = cat(_T_297, _T_280) @[Cat.scala 29:58]
+    node _T_299 = cat(_T_298, _T_272) @[Cat.scala 29:58]
+    node _T_300 = bits(ld_byte_hitvec_lo_2, 0, 0) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_301 = and(ld_byte_hitvec_lo_2, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_302 = orr(_T_301) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_303 = eq(_T_302, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_304 = and(_T_300, _T_303) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_305 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_306 = eq(_T_305, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_307 = and(_T_304, _T_306) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_308 = bits(ld_byte_hitvec_lo_2, 1, 1) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_309 = and(ld_byte_hitvec_lo_2, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_310 = orr(_T_309) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_311 = eq(_T_310, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_312 = and(_T_308, _T_311) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_313 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_314 = eq(_T_313, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_315 = and(_T_312, _T_314) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_316 = bits(ld_byte_hitvec_lo_2, 2, 2) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_317 = and(ld_byte_hitvec_lo_2, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_318 = orr(_T_317) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_319 = eq(_T_318, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_320 = and(_T_316, _T_319) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_321 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_322 = eq(_T_321, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_323 = and(_T_320, _T_322) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_324 = bits(ld_byte_hitvec_lo_2, 3, 3) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_325 = and(ld_byte_hitvec_lo_2, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_326 = orr(_T_325) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_327 = eq(_T_326, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_328 = and(_T_324, _T_327) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_329 = bits(ld_byte_ibuf_hit_lo, 2, 2) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_330 = eq(_T_329, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_331 = and(_T_328, _T_330) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_332 = cat(_T_331, _T_323) @[Cat.scala 29:58]
+    node _T_333 = cat(_T_332, _T_315) @[Cat.scala 29:58]
+    node _T_334 = cat(_T_333, _T_307) @[Cat.scala 29:58]
+    node _T_335 = bits(ld_byte_hitvec_lo_3, 0, 0) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_336 = and(ld_byte_hitvec_lo_3, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_337 = orr(_T_336) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_338 = eq(_T_337, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_339 = and(_T_335, _T_338) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_340 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_341 = eq(_T_340, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_342 = and(_T_339, _T_341) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_343 = bits(ld_byte_hitvec_lo_3, 1, 1) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_344 = and(ld_byte_hitvec_lo_3, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_345 = orr(_T_344) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_346 = eq(_T_345, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_347 = and(_T_343, _T_346) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_348 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_349 = eq(_T_348, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_350 = and(_T_347, _T_349) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_351 = bits(ld_byte_hitvec_lo_3, 2, 2) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_352 = and(ld_byte_hitvec_lo_3, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_353 = orr(_T_352) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_354 = eq(_T_353, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_355 = and(_T_351, _T_354) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_356 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_357 = eq(_T_356, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_358 = and(_T_355, _T_357) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_359 = bits(ld_byte_hitvec_lo_3, 3, 3) @[el2_lsu_bus_buffer.scala 196:93]
+    node _T_360 = and(ld_byte_hitvec_lo_3, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 196:122]
+    node _T_361 = orr(_T_360) @[el2_lsu_bus_buffer.scala 196:144]
+    node _T_362 = eq(_T_361, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:99]
+    node _T_363 = and(_T_359, _T_362) @[el2_lsu_bus_buffer.scala 196:97]
+    node _T_364 = bits(ld_byte_ibuf_hit_lo, 3, 3) @[el2_lsu_bus_buffer.scala 196:170]
+    node _T_365 = eq(_T_364, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 196:150]
+    node _T_366 = and(_T_363, _T_365) @[el2_lsu_bus_buffer.scala 196:148]
+    node _T_367 = cat(_T_366, _T_358) @[Cat.scala 29:58]
+    node _T_368 = cat(_T_367, _T_350) @[Cat.scala 29:58]
+    node _T_369 = cat(_T_368, _T_342) @[Cat.scala 29:58]
+    ld_byte_hitvecfn_lo[0] <= _T_264 @[el2_lsu_bus_buffer.scala 196:23]
+    ld_byte_hitvecfn_lo[1] <= _T_299 @[el2_lsu_bus_buffer.scala 196:23]
+    ld_byte_hitvecfn_lo[2] <= _T_334 @[el2_lsu_bus_buffer.scala 196:23]
+    ld_byte_hitvecfn_lo[3] <= _T_369 @[el2_lsu_bus_buffer.scala 196:23]
+    node _T_370 = bits(ld_byte_hitvec_hi_0, 0, 0) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_371 = and(ld_byte_hitvec_hi_0, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_372 = orr(_T_371) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_373 = eq(_T_372, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_374 = and(_T_370, _T_373) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_375 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_376 = eq(_T_375, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_377 = and(_T_374, _T_376) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_378 = bits(ld_byte_hitvec_hi_0, 1, 1) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_379 = and(ld_byte_hitvec_hi_0, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_380 = orr(_T_379) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_381 = eq(_T_380, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_382 = and(_T_378, _T_381) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_383 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_384 = eq(_T_383, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_385 = and(_T_382, _T_384) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_386 = bits(ld_byte_hitvec_hi_0, 2, 2) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_387 = and(ld_byte_hitvec_hi_0, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_388 = orr(_T_387) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_389 = eq(_T_388, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_390 = and(_T_386, _T_389) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_391 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_392 = eq(_T_391, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_393 = and(_T_390, _T_392) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_394 = bits(ld_byte_hitvec_hi_0, 3, 3) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_395 = and(ld_byte_hitvec_hi_0, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_396 = orr(_T_395) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_397 = eq(_T_396, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_398 = and(_T_394, _T_397) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_399 = bits(ld_byte_ibuf_hit_hi, 0, 0) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_400 = eq(_T_399, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_401 = and(_T_398, _T_400) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_402 = cat(_T_401, _T_393) @[Cat.scala 29:58]
+    node _T_403 = cat(_T_402, _T_385) @[Cat.scala 29:58]
+    node _T_404 = cat(_T_403, _T_377) @[Cat.scala 29:58]
+    node _T_405 = bits(ld_byte_hitvec_hi_1, 0, 0) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_406 = and(ld_byte_hitvec_hi_1, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_407 = orr(_T_406) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_408 = eq(_T_407, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_409 = and(_T_405, _T_408) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_410 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_411 = eq(_T_410, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_412 = and(_T_409, _T_411) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_413 = bits(ld_byte_hitvec_hi_1, 1, 1) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_414 = and(ld_byte_hitvec_hi_1, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_415 = orr(_T_414) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_416 = eq(_T_415, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_417 = and(_T_413, _T_416) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_418 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_419 = eq(_T_418, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_420 = and(_T_417, _T_419) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_421 = bits(ld_byte_hitvec_hi_1, 2, 2) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_422 = and(ld_byte_hitvec_hi_1, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_423 = orr(_T_422) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_424 = eq(_T_423, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_425 = and(_T_421, _T_424) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_426 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_427 = eq(_T_426, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_428 = and(_T_425, _T_427) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_429 = bits(ld_byte_hitvec_hi_1, 3, 3) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_430 = and(ld_byte_hitvec_hi_1, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_431 = orr(_T_430) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_432 = eq(_T_431, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_433 = and(_T_429, _T_432) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_434 = bits(ld_byte_ibuf_hit_hi, 1, 1) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_435 = eq(_T_434, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_436 = and(_T_433, _T_435) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_437 = cat(_T_436, _T_428) @[Cat.scala 29:58]
+    node _T_438 = cat(_T_437, _T_420) @[Cat.scala 29:58]
+    node _T_439 = cat(_T_438, _T_412) @[Cat.scala 29:58]
+    node _T_440 = bits(ld_byte_hitvec_hi_2, 0, 0) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_441 = and(ld_byte_hitvec_hi_2, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_442 = orr(_T_441) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_443 = eq(_T_442, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_444 = and(_T_440, _T_443) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_445 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_446 = eq(_T_445, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_447 = and(_T_444, _T_446) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_448 = bits(ld_byte_hitvec_hi_2, 1, 1) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_449 = and(ld_byte_hitvec_hi_2, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_450 = orr(_T_449) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_451 = eq(_T_450, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_452 = and(_T_448, _T_451) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_453 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_454 = eq(_T_453, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_455 = and(_T_452, _T_454) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_456 = bits(ld_byte_hitvec_hi_2, 2, 2) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_457 = and(ld_byte_hitvec_hi_2, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_458 = orr(_T_457) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_459 = eq(_T_458, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_460 = and(_T_456, _T_459) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_461 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_462 = eq(_T_461, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_463 = and(_T_460, _T_462) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_464 = bits(ld_byte_hitvec_hi_2, 3, 3) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_465 = and(ld_byte_hitvec_hi_2, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_466 = orr(_T_465) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_467 = eq(_T_466, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_468 = and(_T_464, _T_467) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_469 = bits(ld_byte_ibuf_hit_hi, 2, 2) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_470 = eq(_T_469, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_471 = and(_T_468, _T_470) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_472 = cat(_T_471, _T_463) @[Cat.scala 29:58]
+    node _T_473 = cat(_T_472, _T_455) @[Cat.scala 29:58]
+    node _T_474 = cat(_T_473, _T_447) @[Cat.scala 29:58]
+    node _T_475 = bits(ld_byte_hitvec_hi_3, 0, 0) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_476 = and(ld_byte_hitvec_hi_3, buf_age_younger[0]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_477 = orr(_T_476) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_478 = eq(_T_477, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_479 = and(_T_475, _T_478) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_480 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_481 = eq(_T_480, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_482 = and(_T_479, _T_481) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_483 = bits(ld_byte_hitvec_hi_3, 1, 1) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_484 = and(ld_byte_hitvec_hi_3, buf_age_younger[1]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_485 = orr(_T_484) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_486 = eq(_T_485, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_487 = and(_T_483, _T_486) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_488 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_489 = eq(_T_488, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_490 = and(_T_487, _T_489) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_491 = bits(ld_byte_hitvec_hi_3, 2, 2) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_492 = and(ld_byte_hitvec_hi_3, buf_age_younger[2]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_493 = orr(_T_492) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_494 = eq(_T_493, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_495 = and(_T_491, _T_494) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_496 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_497 = eq(_T_496, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_498 = and(_T_495, _T_497) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_499 = bits(ld_byte_hitvec_hi_3, 3, 3) @[el2_lsu_bus_buffer.scala 197:93]
+    node _T_500 = and(ld_byte_hitvec_hi_3, buf_age_younger[3]) @[el2_lsu_bus_buffer.scala 197:122]
+    node _T_501 = orr(_T_500) @[el2_lsu_bus_buffer.scala 197:144]
+    node _T_502 = eq(_T_501, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:99]
+    node _T_503 = and(_T_499, _T_502) @[el2_lsu_bus_buffer.scala 197:97]
+    node _T_504 = bits(ld_byte_ibuf_hit_hi, 3, 3) @[el2_lsu_bus_buffer.scala 197:170]
+    node _T_505 = eq(_T_504, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 197:150]
+    node _T_506 = and(_T_503, _T_505) @[el2_lsu_bus_buffer.scala 197:148]
+    node _T_507 = cat(_T_506, _T_498) @[Cat.scala 29:58]
+    node _T_508 = cat(_T_507, _T_490) @[Cat.scala 29:58]
+    node _T_509 = cat(_T_508, _T_482) @[Cat.scala 29:58]
+    ld_byte_hitvecfn_hi[0] <= _T_404 @[el2_lsu_bus_buffer.scala 197:23]
+    ld_byte_hitvecfn_hi[1] <= _T_439 @[el2_lsu_bus_buffer.scala 197:23]
+    ld_byte_hitvecfn_hi[2] <= _T_474 @[el2_lsu_bus_buffer.scala 197:23]
+    ld_byte_hitvecfn_hi[3] <= _T_509 @[el2_lsu_bus_buffer.scala 197:23]
+    wire ibuf_addr : UInt<32>
+    ibuf_addr <= UInt<1>("h00")
+    wire ibuf_write : UInt<1>
+    ibuf_write <= UInt<1>("h00")
+    wire ibuf_valid : UInt<1>
+    ibuf_valid <= UInt<1>("h00")
+    node _T_510 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 202:43]
+    node _T_511 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 202:64]
+    node _T_512 = eq(_T_510, _T_511) @[el2_lsu_bus_buffer.scala 202:51]
+    node _T_513 = and(_T_512, ibuf_write) @[el2_lsu_bus_buffer.scala 202:73]
+    node _T_514 = and(_T_513, ibuf_valid) @[el2_lsu_bus_buffer.scala 202:86]
+    node ld_addr_ibuf_hit_lo = and(_T_514, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 202:99]
+    node _T_515 = bits(io.end_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 203:43]
+    node _T_516 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 203:64]
+    node _T_517 = eq(_T_515, _T_516) @[el2_lsu_bus_buffer.scala 203:51]
+    node _T_518 = and(_T_517, ibuf_write) @[el2_lsu_bus_buffer.scala 203:73]
+    node _T_519 = and(_T_518, ibuf_valid) @[el2_lsu_bus_buffer.scala 203:86]
+    node ld_addr_ibuf_hit_hi = and(_T_519, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 203:99]
+    wire ibuf_byteen : UInt<4>
+    ibuf_byteen <= UInt<1>("h00")
+    node _T_520 = bits(ibuf_byteen, 0, 0) @[el2_lsu_bus_buffer.scala 207:61]
+    node _T_521 = and(ld_addr_ibuf_hit_lo, _T_520) @[el2_lsu_bus_buffer.scala 207:48]
+    node _T_522 = bits(ldst_byteen_lo_m, 0, 0) @[el2_lsu_bus_buffer.scala 207:83]
+    node _T_523 = and(_T_521, _T_522) @[el2_lsu_bus_buffer.scala 207:65]
+    ld_byte_ibuf_hit_lo <= _T_523 @[el2_lsu_bus_buffer.scala 207:25]
+    node _T_524 = bits(ibuf_byteen, 0, 0) @[el2_lsu_bus_buffer.scala 208:61]
+    node _T_525 = and(ld_addr_ibuf_hit_hi, _T_524) @[el2_lsu_bus_buffer.scala 208:48]
+    node _T_526 = bits(ldst_byteen_hi_m, 0, 0) @[el2_lsu_bus_buffer.scala 208:83]
+    node _T_527 = and(_T_525, _T_526) @[el2_lsu_bus_buffer.scala 208:65]
+    ld_byte_ibuf_hit_hi <= _T_527 @[el2_lsu_bus_buffer.scala 208:25]
+    node _T_528 = bits(ibuf_byteen, 1, 1) @[el2_lsu_bus_buffer.scala 207:61]
+    node _T_529 = and(ld_addr_ibuf_hit_lo, _T_528) @[el2_lsu_bus_buffer.scala 207:48]
+    node _T_530 = bits(ldst_byteen_lo_m, 1, 1) @[el2_lsu_bus_buffer.scala 207:83]
+    node _T_531 = and(_T_529, _T_530) @[el2_lsu_bus_buffer.scala 207:65]
+    ld_byte_ibuf_hit_lo <= _T_531 @[el2_lsu_bus_buffer.scala 207:25]
+    node _T_532 = bits(ibuf_byteen, 1, 1) @[el2_lsu_bus_buffer.scala 208:61]
+    node _T_533 = and(ld_addr_ibuf_hit_hi, _T_532) @[el2_lsu_bus_buffer.scala 208:48]
+    node _T_534 = bits(ldst_byteen_hi_m, 1, 1) @[el2_lsu_bus_buffer.scala 208:83]
+    node _T_535 = and(_T_533, _T_534) @[el2_lsu_bus_buffer.scala 208:65]
+    ld_byte_ibuf_hit_hi <= _T_535 @[el2_lsu_bus_buffer.scala 208:25]
+    node _T_536 = bits(ibuf_byteen, 2, 2) @[el2_lsu_bus_buffer.scala 207:61]
+    node _T_537 = and(ld_addr_ibuf_hit_lo, _T_536) @[el2_lsu_bus_buffer.scala 207:48]
+    node _T_538 = bits(ldst_byteen_lo_m, 2, 2) @[el2_lsu_bus_buffer.scala 207:83]
+    node _T_539 = and(_T_537, _T_538) @[el2_lsu_bus_buffer.scala 207:65]
+    ld_byte_ibuf_hit_lo <= _T_539 @[el2_lsu_bus_buffer.scala 207:25]
+    node _T_540 = bits(ibuf_byteen, 2, 2) @[el2_lsu_bus_buffer.scala 208:61]
+    node _T_541 = and(ld_addr_ibuf_hit_hi, _T_540) @[el2_lsu_bus_buffer.scala 208:48]
+    node _T_542 = bits(ldst_byteen_hi_m, 2, 2) @[el2_lsu_bus_buffer.scala 208:83]
+    node _T_543 = and(_T_541, _T_542) @[el2_lsu_bus_buffer.scala 208:65]
+    ld_byte_ibuf_hit_hi <= _T_543 @[el2_lsu_bus_buffer.scala 208:25]
+    node _T_544 = bits(ibuf_byteen, 3, 3) @[el2_lsu_bus_buffer.scala 207:61]
+    node _T_545 = and(ld_addr_ibuf_hit_lo, _T_544) @[el2_lsu_bus_buffer.scala 207:48]
+    node _T_546 = bits(ldst_byteen_lo_m, 3, 3) @[el2_lsu_bus_buffer.scala 207:83]
+    node _T_547 = and(_T_545, _T_546) @[el2_lsu_bus_buffer.scala 207:65]
+    ld_byte_ibuf_hit_lo <= _T_547 @[el2_lsu_bus_buffer.scala 207:25]
+    node _T_548 = bits(ibuf_byteen, 3, 3) @[el2_lsu_bus_buffer.scala 208:61]
+    node _T_549 = and(ld_addr_ibuf_hit_hi, _T_548) @[el2_lsu_bus_buffer.scala 208:48]
+    node _T_550 = bits(ldst_byteen_hi_m, 3, 3) @[el2_lsu_bus_buffer.scala 208:83]
+    node _T_551 = and(_T_549, _T_550) @[el2_lsu_bus_buffer.scala 208:65]
+    ld_byte_ibuf_hit_hi <= _T_551 @[el2_lsu_bus_buffer.scala 208:25]
+    wire buf_data : UInt<32>[4] @[el2_lsu_bus_buffer.scala 210:22]
+    buf_data[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 211:12]
+    buf_data[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 211:12]
+    buf_data[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 211:12]
+    buf_data[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 211:12]
+    wire fwd_data : UInt<32>
+    fwd_data <= UInt<1>("h00")
+    node _T_552 = bits(ld_byte_hitvecfn_lo[3], 0, 0) @[el2_lsu_bus_buffer.scala 214:86]
+    node _T_553 = bits(_T_552, 0, 0) @[Bitwise.scala 72:15]
+    node _T_554 = mux(_T_553, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_555 = bits(buf_data[0], 31, 23) @[el2_lsu_bus_buffer.scala 214:104]
+    node _T_556 = and(_T_554, _T_555) @[el2_lsu_bus_buffer.scala 214:91]
+    node _T_557 = bits(ld_byte_hitvecfn_lo[3], 1, 1) @[el2_lsu_bus_buffer.scala 214:86]
+    node _T_558 = bits(_T_557, 0, 0) @[Bitwise.scala 72:15]
+    node _T_559 = mux(_T_558, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_560 = bits(buf_data[1], 31, 23) @[el2_lsu_bus_buffer.scala 214:104]
+    node _T_561 = and(_T_559, _T_560) @[el2_lsu_bus_buffer.scala 214:91]
+    node _T_562 = bits(ld_byte_hitvecfn_lo[3], 2, 2) @[el2_lsu_bus_buffer.scala 214:86]
+    node _T_563 = bits(_T_562, 0, 0) @[Bitwise.scala 72:15]
+    node _T_564 = mux(_T_563, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_565 = bits(buf_data[2], 31, 23) @[el2_lsu_bus_buffer.scala 214:104]
+    node _T_566 = and(_T_564, _T_565) @[el2_lsu_bus_buffer.scala 214:91]
+    node _T_567 = bits(ld_byte_hitvecfn_lo[3], 3, 3) @[el2_lsu_bus_buffer.scala 214:86]
+    node _T_568 = bits(_T_567, 0, 0) @[Bitwise.scala 72:15]
+    node _T_569 = mux(_T_568, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_570 = bits(buf_data[3], 31, 23) @[el2_lsu_bus_buffer.scala 214:104]
+    node _T_571 = and(_T_569, _T_570) @[el2_lsu_bus_buffer.scala 214:91]
+    node _T_572 = or(_T_556, _T_561) @[el2_lsu_bus_buffer.scala 214:123]
+    node _T_573 = or(_T_572, _T_566) @[el2_lsu_bus_buffer.scala 214:123]
+    node _T_574 = or(_T_573, _T_571) @[el2_lsu_bus_buffer.scala 214:123]
+    node _T_575 = bits(ld_byte_hitvecfn_lo[2], 0, 0) @[el2_lsu_bus_buffer.scala 215:60]
+    node _T_576 = bits(_T_575, 0, 0) @[Bitwise.scala 72:15]
+    node _T_577 = mux(_T_576, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_578 = bits(buf_data[0], 23, 16) @[el2_lsu_bus_buffer.scala 215:78]
+    node _T_579 = and(_T_577, _T_578) @[el2_lsu_bus_buffer.scala 215:65]
+    node _T_580 = bits(ld_byte_hitvecfn_lo[2], 1, 1) @[el2_lsu_bus_buffer.scala 215:60]
+    node _T_581 = bits(_T_580, 0, 0) @[Bitwise.scala 72:15]
+    node _T_582 = mux(_T_581, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_583 = bits(buf_data[1], 23, 16) @[el2_lsu_bus_buffer.scala 215:78]
+    node _T_584 = and(_T_582, _T_583) @[el2_lsu_bus_buffer.scala 215:65]
+    node _T_585 = bits(ld_byte_hitvecfn_lo[2], 2, 2) @[el2_lsu_bus_buffer.scala 215:60]
+    node _T_586 = bits(_T_585, 0, 0) @[Bitwise.scala 72:15]
+    node _T_587 = mux(_T_586, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_588 = bits(buf_data[2], 23, 16) @[el2_lsu_bus_buffer.scala 215:78]
+    node _T_589 = and(_T_587, _T_588) @[el2_lsu_bus_buffer.scala 215:65]
+    node _T_590 = bits(ld_byte_hitvecfn_lo[2], 3, 3) @[el2_lsu_bus_buffer.scala 215:60]
+    node _T_591 = bits(_T_590, 0, 0) @[Bitwise.scala 72:15]
+    node _T_592 = mux(_T_591, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_593 = bits(buf_data[3], 23, 16) @[el2_lsu_bus_buffer.scala 215:78]
+    node _T_594 = and(_T_592, _T_593) @[el2_lsu_bus_buffer.scala 215:65]
+    node _T_595 = or(_T_579, _T_584) @[el2_lsu_bus_buffer.scala 215:97]
+    node _T_596 = or(_T_595, _T_589) @[el2_lsu_bus_buffer.scala 215:97]
+    node _T_597 = or(_T_596, _T_594) @[el2_lsu_bus_buffer.scala 215:97]
+    node _T_598 = bits(ld_byte_hitvecfn_lo[1], 0, 0) @[el2_lsu_bus_buffer.scala 216:60]
+    node _T_599 = bits(_T_598, 0, 0) @[Bitwise.scala 72:15]
+    node _T_600 = mux(_T_599, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_601 = bits(buf_data[0], 15, 8) @[el2_lsu_bus_buffer.scala 216:78]
+    node _T_602 = and(_T_600, _T_601) @[el2_lsu_bus_buffer.scala 216:65]
+    node _T_603 = bits(ld_byte_hitvecfn_lo[1], 1, 1) @[el2_lsu_bus_buffer.scala 216:60]
+    node _T_604 = bits(_T_603, 0, 0) @[Bitwise.scala 72:15]
+    node _T_605 = mux(_T_604, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_606 = bits(buf_data[1], 15, 8) @[el2_lsu_bus_buffer.scala 216:78]
+    node _T_607 = and(_T_605, _T_606) @[el2_lsu_bus_buffer.scala 216:65]
+    node _T_608 = bits(ld_byte_hitvecfn_lo[1], 2, 2) @[el2_lsu_bus_buffer.scala 216:60]
+    node _T_609 = bits(_T_608, 0, 0) @[Bitwise.scala 72:15]
+    node _T_610 = mux(_T_609, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_611 = bits(buf_data[2], 15, 8) @[el2_lsu_bus_buffer.scala 216:78]
+    node _T_612 = and(_T_610, _T_611) @[el2_lsu_bus_buffer.scala 216:65]
+    node _T_613 = bits(ld_byte_hitvecfn_lo[1], 3, 3) @[el2_lsu_bus_buffer.scala 216:60]
+    node _T_614 = bits(_T_613, 0, 0) @[Bitwise.scala 72:15]
+    node _T_615 = mux(_T_614, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_616 = bits(buf_data[3], 15, 8) @[el2_lsu_bus_buffer.scala 216:78]
+    node _T_617 = and(_T_615, _T_616) @[el2_lsu_bus_buffer.scala 216:65]
+    node _T_618 = or(_T_602, _T_607) @[el2_lsu_bus_buffer.scala 216:96]
+    node _T_619 = or(_T_618, _T_612) @[el2_lsu_bus_buffer.scala 216:96]
+    node _T_620 = or(_T_619, _T_617) @[el2_lsu_bus_buffer.scala 216:96]
+    node _T_621 = bits(ld_byte_hitvecfn_lo[0], 0, 0) @[el2_lsu_bus_buffer.scala 217:60]
+    node _T_622 = bits(_T_621, 0, 0) @[Bitwise.scala 72:15]
+    node _T_623 = mux(_T_622, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_624 = bits(buf_data[0], 7, 0) @[el2_lsu_bus_buffer.scala 217:78]
+    node _T_625 = and(_T_623, _T_624) @[el2_lsu_bus_buffer.scala 217:65]
+    node _T_626 = bits(ld_byte_hitvecfn_lo[0], 1, 1) @[el2_lsu_bus_buffer.scala 217:60]
+    node _T_627 = bits(_T_626, 0, 0) @[Bitwise.scala 72:15]
+    node _T_628 = mux(_T_627, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_629 = bits(buf_data[1], 7, 0) @[el2_lsu_bus_buffer.scala 217:78]
+    node _T_630 = and(_T_628, _T_629) @[el2_lsu_bus_buffer.scala 217:65]
+    node _T_631 = bits(ld_byte_hitvecfn_lo[0], 2, 2) @[el2_lsu_bus_buffer.scala 217:60]
+    node _T_632 = bits(_T_631, 0, 0) @[Bitwise.scala 72:15]
+    node _T_633 = mux(_T_632, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_634 = bits(buf_data[2], 7, 0) @[el2_lsu_bus_buffer.scala 217:78]
+    node _T_635 = and(_T_633, _T_634) @[el2_lsu_bus_buffer.scala 217:65]
+    node _T_636 = bits(ld_byte_hitvecfn_lo[0], 3, 3) @[el2_lsu_bus_buffer.scala 217:60]
+    node _T_637 = bits(_T_636, 0, 0) @[Bitwise.scala 72:15]
+    node _T_638 = mux(_T_637, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_639 = bits(buf_data[3], 7, 0) @[el2_lsu_bus_buffer.scala 217:78]
+    node _T_640 = and(_T_638, _T_639) @[el2_lsu_bus_buffer.scala 217:65]
+    node _T_641 = or(_T_625, _T_630) @[el2_lsu_bus_buffer.scala 217:95]
+    node _T_642 = or(_T_641, _T_635) @[el2_lsu_bus_buffer.scala 217:95]
+    node _T_643 = or(_T_642, _T_640) @[el2_lsu_bus_buffer.scala 217:95]
+    node _T_644 = cat(_T_620, _T_643) @[Cat.scala 29:58]
+    node _T_645 = cat(_T_574, _T_597) @[Cat.scala 29:58]
+    node _T_646 = cat(_T_645, _T_644) @[Cat.scala 29:58]
+    io.ld_fwddata_buf_lo <= _T_646 @[el2_lsu_bus_buffer.scala 214:24]
+    node _T_647 = bits(ld_byte_hitvecfn_hi[3], 0, 0) @[el2_lsu_bus_buffer.scala 219:86]
+    node _T_648 = bits(_T_647, 0, 0) @[Bitwise.scala 72:15]
+    node _T_649 = mux(_T_648, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_650 = bits(buf_data[0], 31, 23) @[el2_lsu_bus_buffer.scala 219:104]
+    node _T_651 = and(_T_649, _T_650) @[el2_lsu_bus_buffer.scala 219:91]
+    node _T_652 = bits(ld_byte_hitvecfn_hi[3], 1, 1) @[el2_lsu_bus_buffer.scala 219:86]
+    node _T_653 = bits(_T_652, 0, 0) @[Bitwise.scala 72:15]
+    node _T_654 = mux(_T_653, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_655 = bits(buf_data[1], 31, 23) @[el2_lsu_bus_buffer.scala 219:104]
+    node _T_656 = and(_T_654, _T_655) @[el2_lsu_bus_buffer.scala 219:91]
+    node _T_657 = bits(ld_byte_hitvecfn_hi[3], 2, 2) @[el2_lsu_bus_buffer.scala 219:86]
+    node _T_658 = bits(_T_657, 0, 0) @[Bitwise.scala 72:15]
+    node _T_659 = mux(_T_658, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_660 = bits(buf_data[2], 31, 23) @[el2_lsu_bus_buffer.scala 219:104]
+    node _T_661 = and(_T_659, _T_660) @[el2_lsu_bus_buffer.scala 219:91]
+    node _T_662 = bits(ld_byte_hitvecfn_hi[3], 3, 3) @[el2_lsu_bus_buffer.scala 219:86]
+    node _T_663 = bits(_T_662, 0, 0) @[Bitwise.scala 72:15]
+    node _T_664 = mux(_T_663, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_665 = bits(buf_data[3], 31, 23) @[el2_lsu_bus_buffer.scala 219:104]
+    node _T_666 = and(_T_664, _T_665) @[el2_lsu_bus_buffer.scala 219:91]
+    node _T_667 = or(_T_651, _T_656) @[el2_lsu_bus_buffer.scala 219:123]
+    node _T_668 = or(_T_667, _T_661) @[el2_lsu_bus_buffer.scala 219:123]
+    node _T_669 = or(_T_668, _T_666) @[el2_lsu_bus_buffer.scala 219:123]
+    node _T_670 = bits(ld_byte_hitvecfn_hi[2], 0, 0) @[el2_lsu_bus_buffer.scala 220:60]
+    node _T_671 = bits(_T_670, 0, 0) @[Bitwise.scala 72:15]
+    node _T_672 = mux(_T_671, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_673 = bits(buf_data[0], 23, 16) @[el2_lsu_bus_buffer.scala 220:78]
+    node _T_674 = and(_T_672, _T_673) @[el2_lsu_bus_buffer.scala 220:65]
+    node _T_675 = bits(ld_byte_hitvecfn_hi[2], 1, 1) @[el2_lsu_bus_buffer.scala 220:60]
+    node _T_676 = bits(_T_675, 0, 0) @[Bitwise.scala 72:15]
+    node _T_677 = mux(_T_676, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_678 = bits(buf_data[1], 23, 16) @[el2_lsu_bus_buffer.scala 220:78]
+    node _T_679 = and(_T_677, _T_678) @[el2_lsu_bus_buffer.scala 220:65]
+    node _T_680 = bits(ld_byte_hitvecfn_hi[2], 2, 2) @[el2_lsu_bus_buffer.scala 220:60]
+    node _T_681 = bits(_T_680, 0, 0) @[Bitwise.scala 72:15]
+    node _T_682 = mux(_T_681, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_683 = bits(buf_data[2], 23, 16) @[el2_lsu_bus_buffer.scala 220:78]
+    node _T_684 = and(_T_682, _T_683) @[el2_lsu_bus_buffer.scala 220:65]
+    node _T_685 = bits(ld_byte_hitvecfn_hi[2], 3, 3) @[el2_lsu_bus_buffer.scala 220:60]
+    node _T_686 = bits(_T_685, 0, 0) @[Bitwise.scala 72:15]
+    node _T_687 = mux(_T_686, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_688 = bits(buf_data[3], 23, 16) @[el2_lsu_bus_buffer.scala 220:78]
+    node _T_689 = and(_T_687, _T_688) @[el2_lsu_bus_buffer.scala 220:65]
+    node _T_690 = or(_T_674, _T_679) @[el2_lsu_bus_buffer.scala 220:97]
+    node _T_691 = or(_T_690, _T_684) @[el2_lsu_bus_buffer.scala 220:97]
+    node _T_692 = or(_T_691, _T_689) @[el2_lsu_bus_buffer.scala 220:97]
+    node _T_693 = bits(ld_byte_hitvecfn_hi[1], 0, 0) @[el2_lsu_bus_buffer.scala 221:60]
+    node _T_694 = bits(_T_693, 0, 0) @[Bitwise.scala 72:15]
+    node _T_695 = mux(_T_694, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_696 = bits(buf_data[0], 15, 8) @[el2_lsu_bus_buffer.scala 221:78]
+    node _T_697 = and(_T_695, _T_696) @[el2_lsu_bus_buffer.scala 221:65]
+    node _T_698 = bits(ld_byte_hitvecfn_hi[1], 1, 1) @[el2_lsu_bus_buffer.scala 221:60]
+    node _T_699 = bits(_T_698, 0, 0) @[Bitwise.scala 72:15]
+    node _T_700 = mux(_T_699, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_701 = bits(buf_data[1], 15, 8) @[el2_lsu_bus_buffer.scala 221:78]
+    node _T_702 = and(_T_700, _T_701) @[el2_lsu_bus_buffer.scala 221:65]
+    node _T_703 = bits(ld_byte_hitvecfn_hi[1], 2, 2) @[el2_lsu_bus_buffer.scala 221:60]
+    node _T_704 = bits(_T_703, 0, 0) @[Bitwise.scala 72:15]
+    node _T_705 = mux(_T_704, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_706 = bits(buf_data[2], 15, 8) @[el2_lsu_bus_buffer.scala 221:78]
+    node _T_707 = and(_T_705, _T_706) @[el2_lsu_bus_buffer.scala 221:65]
+    node _T_708 = bits(ld_byte_hitvecfn_hi[1], 3, 3) @[el2_lsu_bus_buffer.scala 221:60]
+    node _T_709 = bits(_T_708, 0, 0) @[Bitwise.scala 72:15]
+    node _T_710 = mux(_T_709, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_711 = bits(buf_data[3], 15, 8) @[el2_lsu_bus_buffer.scala 221:78]
+    node _T_712 = and(_T_710, _T_711) @[el2_lsu_bus_buffer.scala 221:65]
+    node _T_713 = or(_T_697, _T_702) @[el2_lsu_bus_buffer.scala 221:96]
+    node _T_714 = or(_T_713, _T_707) @[el2_lsu_bus_buffer.scala 221:96]
+    node _T_715 = or(_T_714, _T_712) @[el2_lsu_bus_buffer.scala 221:96]
+    node _T_716 = bits(ld_byte_hitvecfn_hi[0], 0, 0) @[el2_lsu_bus_buffer.scala 222:60]
+    node _T_717 = bits(_T_716, 0, 0) @[Bitwise.scala 72:15]
+    node _T_718 = mux(_T_717, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_719 = bits(buf_data[0], 7, 0) @[el2_lsu_bus_buffer.scala 222:78]
+    node _T_720 = and(_T_718, _T_719) @[el2_lsu_bus_buffer.scala 222:65]
+    node _T_721 = bits(ld_byte_hitvecfn_hi[0], 1, 1) @[el2_lsu_bus_buffer.scala 222:60]
+    node _T_722 = bits(_T_721, 0, 0) @[Bitwise.scala 72:15]
+    node _T_723 = mux(_T_722, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_724 = bits(buf_data[1], 7, 0) @[el2_lsu_bus_buffer.scala 222:78]
+    node _T_725 = and(_T_723, _T_724) @[el2_lsu_bus_buffer.scala 222:65]
+    node _T_726 = bits(ld_byte_hitvecfn_hi[0], 2, 2) @[el2_lsu_bus_buffer.scala 222:60]
+    node _T_727 = bits(_T_726, 0, 0) @[Bitwise.scala 72:15]
+    node _T_728 = mux(_T_727, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_729 = bits(buf_data[2], 7, 0) @[el2_lsu_bus_buffer.scala 222:78]
+    node _T_730 = and(_T_728, _T_729) @[el2_lsu_bus_buffer.scala 222:65]
+    node _T_731 = bits(ld_byte_hitvecfn_hi[0], 3, 3) @[el2_lsu_bus_buffer.scala 222:60]
+    node _T_732 = bits(_T_731, 0, 0) @[Bitwise.scala 72:15]
+    node _T_733 = mux(_T_732, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_734 = bits(buf_data[3], 7, 0) @[el2_lsu_bus_buffer.scala 222:78]
+    node _T_735 = and(_T_733, _T_734) @[el2_lsu_bus_buffer.scala 222:65]
+    node _T_736 = or(_T_720, _T_725) @[el2_lsu_bus_buffer.scala 222:95]
+    node _T_737 = or(_T_736, _T_730) @[el2_lsu_bus_buffer.scala 222:95]
+    node _T_738 = or(_T_737, _T_735) @[el2_lsu_bus_buffer.scala 222:95]
+    node _T_739 = cat(_T_715, _T_738) @[Cat.scala 29:58]
+    node _T_740 = cat(_T_669, _T_692) @[Cat.scala 29:58]
+    node _T_741 = cat(_T_740, _T_739) @[Cat.scala 29:58]
+    io.ld_fwddata_buf_hi <= _T_741 @[el2_lsu_bus_buffer.scala 219:24]
+    node bus_coalescing_disable = or(io.dec_tlu_wb_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 224:65]
+    node _T_742 = mux(io.lsu_pkt_r.by, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_743 = mux(io.lsu_pkt_r.half, UInt<4>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_744 = mux(io.lsu_pkt_r.word, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_745 = or(_T_742, _T_743) @[Mux.scala 27:72]
+    node _T_746 = or(_T_745, _T_744) @[Mux.scala 27:72]
+    wire ldst_byteen_r : UInt<4> @[Mux.scala 27:72]
+    ldst_byteen_r <= _T_746 @[Mux.scala 27:72]
+    node _T_747 = cat(UInt<4>("h00"), ldst_byteen_r) @[Cat.scala 29:58]
+    node _T_748 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 228:61]
+    node byteen = dshl(_T_747, _T_748) @[el2_lsu_bus_buffer.scala 228:45]
+    node ldst_byteen_hi_r = bits(byteen, 7, 4) @[el2_lsu_bus_buffer.scala 229:32]
+    node ldst_byteen_lo_r = bits(byteen, 3, 0) @[el2_lsu_bus_buffer.scala 230:32]
+    node _T_749 = cat(UInt<32>("h00"), io.store_data_r) @[Cat.scala 29:58]
+    node _T_750 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 231:73]
+    node _T_751 = mul(UInt<4>("h08"), _T_750) @[el2_lsu_bus_buffer.scala 231:58]
+    node store_data = dshl(_T_749, _T_751) @[el2_lsu_bus_buffer.scala 231:52]
+    node store_data_hi_r = bits(store_data, 63, 32) @[el2_lsu_bus_buffer.scala 232:35]
+    node store_data_lo_r = bits(store_data, 31, 0) @[el2_lsu_bus_buffer.scala 233:35]
+    node _T_752 = bits(io.lsu_addr_r, 3, 3) @[el2_lsu_bus_buffer.scala 234:36]
+    node _T_753 = bits(io.end_addr_r, 3, 3) @[el2_lsu_bus_buffer.scala 234:57]
+    node ldst_samedw_r = eq(_T_752, _T_753) @[el2_lsu_bus_buffer.scala 234:40]
+    node _T_754 = bits(io.lsu_addr_r, 1, 0) @[el2_lsu_bus_buffer.scala 235:67]
+    node _T_755 = eq(_T_754, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 235:74]
+    node _T_756 = bits(io.lsu_addr_r, 0, 0) @[el2_lsu_bus_buffer.scala 236:40]
+    node _T_757 = eq(_T_756, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 236:26]
+    node _T_758 = mux(io.lsu_pkt_r.word, _T_755, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_759 = mux(io.lsu_pkt_r.half, _T_757, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_760 = mux(io.lsu_pkt_r.by, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_761 = or(_T_758, _T_759) @[Mux.scala 27:72]
+    node _T_762 = or(_T_761, _T_760) @[Mux.scala 27:72]
+    wire is_aligned_r : UInt<1> @[Mux.scala 27:72]
+    is_aligned_r <= _T_762 @[Mux.scala 27:72]
+    node _T_763 = or(io.lsu_pkt_r.load, io.no_word_merge_r) @[el2_lsu_bus_buffer.scala 238:55]
+    node _T_764 = and(io.lsu_busreq_r, _T_763) @[el2_lsu_bus_buffer.scala 238:34]
+    node _T_765 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 238:79]
+    node ibuf_byp = and(_T_764, _T_765) @[el2_lsu_bus_buffer.scala 238:77]
+    node _T_766 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 239:36]
+    node _T_767 = eq(ibuf_byp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 239:56]
+    node ibuf_wr_en = and(_T_766, _T_767) @[el2_lsu_bus_buffer.scala 239:54]
+    wire ibuf_drain_vld : UInt<1>
+    ibuf_drain_vld <= UInt<1>("h00")
+    node _T_768 = eq(ibuf_wr_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 241:36]
+    node _T_769 = and(ibuf_drain_vld, _T_768) @[el2_lsu_bus_buffer.scala 241:34]
+    node ibuf_rst = or(_T_769, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 241:49]
+    node _T_770 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 242:44]
+    node _T_771 = and(io.lsu_busreq_m, _T_770) @[el2_lsu_bus_buffer.scala 242:42]
+    node _T_772 = and(_T_771, ibuf_valid) @[el2_lsu_bus_buffer.scala 242:61]
+    node _T_773 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 242:107]
+    node _T_774 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 242:132]
+    node _T_775 = neq(_T_773, _T_774) @[el2_lsu_bus_buffer.scala 242:115]
+    node _T_776 = or(io.lsu_pkt_m.load, _T_775) @[el2_lsu_bus_buffer.scala 242:95]
+    node ibuf_force_drain = and(_T_772, _T_776) @[el2_lsu_bus_buffer.scala 242:74]
+    wire ibuf_sideeffect : UInt<1>
+    ibuf_sideeffect <= UInt<1>("h00")
+    wire ibuf_timer : UInt<3>
+    ibuf_timer <= UInt<1>("h00")
+    wire ibuf_merge_en : UInt<1>
+    ibuf_merge_en <= UInt<1>("h00")
+    wire ibuf_merge_in : UInt<1>
+    ibuf_merge_in <= UInt<1>("h00")
+    node _T_777 = eq(ibuf_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 247:62]
+    node _T_778 = or(ibuf_wr_en, _T_777) @[el2_lsu_bus_buffer.scala 247:48]
+    node _T_779 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 247:98]
+    node _T_780 = eq(_T_779, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 247:82]
+    node _T_781 = and(_T_778, _T_780) @[el2_lsu_bus_buffer.scala 247:80]
+    node _T_782 = or(_T_781, ibuf_byp) @[el2_lsu_bus_buffer.scala 248:5]
+    node _T_783 = or(_T_782, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 248:16]
+    node _T_784 = or(_T_783, ibuf_sideeffect) @[el2_lsu_bus_buffer.scala 248:35]
+    node _T_785 = eq(ibuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 248:55]
+    node _T_786 = or(_T_784, _T_785) @[el2_lsu_bus_buffer.scala 248:53]
+    node _T_787 = or(_T_786, bus_coalescing_disable) @[el2_lsu_bus_buffer.scala 248:67]
+    node _T_788 = and(ibuf_valid, _T_787) @[el2_lsu_bus_buffer.scala 247:32]
+    ibuf_drain_vld <= _T_788 @[el2_lsu_bus_buffer.scala 247:18]
+    wire ibuf_tag : UInt<2>
+    ibuf_tag <= UInt<1>("h00")
+    wire WrPtr1_r : UInt<2>
+    WrPtr1_r <= UInt<1>("h00")
+    wire WrPtr0_r : UInt<2>
+    WrPtr0_r <= UInt<1>("h00")
+    node _T_789 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 253:39]
+    node _T_790 = mux(io.ldst_dual_r, WrPtr1_r, WrPtr0_r) @[el2_lsu_bus_buffer.scala 253:69]
+    node ibuf_tag_in = mux(_T_789, ibuf_tag, _T_790) @[el2_lsu_bus_buffer.scala 253:24]
+    node ibuf_sz_in = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58]
+    node ibuf_addr_in = mux(io.ldst_dual_r, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 256:25]
+    node _T_791 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 257:42]
+    node _T_792 = bits(ibuf_byteen, 3, 0) @[el2_lsu_bus_buffer.scala 257:70]
+    node _T_793 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 257:95]
+    node _T_794 = or(_T_792, _T_793) @[el2_lsu_bus_buffer.scala 257:77]
+    node _T_795 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 258:41]
+    node _T_796 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 258:65]
+    node _T_797 = mux(io.ldst_dual_r, _T_795, _T_796) @[el2_lsu_bus_buffer.scala 258:8]
+    node ibuf_byteen_in = mux(_T_791, _T_794, _T_797) @[el2_lsu_bus_buffer.scala 257:27]
+    wire ibuf_data : UInt<32>
+    ibuf_data <= UInt<1>("h00")
+    node _T_798 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 261:61]
+    node _T_799 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_buffer.scala 262:25]
+    node _T_800 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_buffer.scala 262:45]
+    node _T_801 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 262:76]
+    node _T_802 = mux(_T_799, _T_800, _T_801) @[el2_lsu_bus_buffer.scala 262:8]
+    node _T_803 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 262:108]
+    node _T_804 = mux(_T_798, _T_802, _T_803) @[el2_lsu_bus_buffer.scala 261:46]
+    node _T_805 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 261:61]
+    node _T_806 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_buffer.scala 262:25]
+    node _T_807 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_buffer.scala 262:45]
+    node _T_808 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 262:76]
+    node _T_809 = mux(_T_806, _T_807, _T_808) @[el2_lsu_bus_buffer.scala 262:8]
+    node _T_810 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 262:108]
+    node _T_811 = mux(_T_805, _T_809, _T_810) @[el2_lsu_bus_buffer.scala 261:46]
+    node _T_812 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 261:61]
+    node _T_813 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_buffer.scala 262:25]
+    node _T_814 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_buffer.scala 262:45]
+    node _T_815 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 262:76]
+    node _T_816 = mux(_T_813, _T_814, _T_815) @[el2_lsu_bus_buffer.scala 262:8]
+    node _T_817 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 262:108]
+    node _T_818 = mux(_T_812, _T_816, _T_817) @[el2_lsu_bus_buffer.scala 261:46]
+    node _T_819 = and(ibuf_merge_en, ibuf_merge_in) @[el2_lsu_bus_buffer.scala 261:61]
+    node _T_820 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_buffer.scala 262:25]
+    node _T_821 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_buffer.scala 262:45]
+    node _T_822 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 262:76]
+    node _T_823 = mux(_T_820, _T_821, _T_822) @[el2_lsu_bus_buffer.scala 262:8]
+    node _T_824 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 262:108]
+    node _T_825 = mux(_T_819, _T_823, _T_824) @[el2_lsu_bus_buffer.scala 261:46]
+    node _T_826 = cat(_T_825, _T_818) @[Cat.scala 29:58]
+    node _T_827 = cat(_T_826, _T_811) @[Cat.scala 29:58]
+    node ibuf_data_in = cat(_T_827, _T_804) @[Cat.scala 29:58]
+    node _T_828 = lt(ibuf_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 263:59]
+    node _T_829 = bits(_T_828, 0, 0) @[el2_lsu_bus_buffer.scala 263:79]
+    node _T_830 = add(ibuf_timer, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 263:93]
+    node _T_831 = tail(_T_830, 1) @[el2_lsu_bus_buffer.scala 263:93]
+    node _T_832 = mux(_T_829, _T_831, ibuf_timer) @[el2_lsu_bus_buffer.scala 263:47]
+    node ibuf_timer_in = mux(ibuf_wr_en, UInt<1>("h00"), _T_832) @[el2_lsu_bus_buffer.scala 263:26]
+    node _T_833 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 265:36]
+    node _T_834 = and(_T_833, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 265:54]
+    node _T_835 = and(_T_834, ibuf_valid) @[el2_lsu_bus_buffer.scala 265:75]
+    node _T_836 = and(_T_835, ibuf_write) @[el2_lsu_bus_buffer.scala 265:88]
+    node _T_837 = bits(io.lsu_addr_r, 31, 2) @[el2_lsu_bus_buffer.scala 265:117]
+    node _T_838 = bits(ibuf_addr, 31, 2) @[el2_lsu_bus_buffer.scala 265:137]
+    node _T_839 = eq(_T_837, _T_838) @[el2_lsu_bus_buffer.scala 265:124]
+    node _T_840 = and(_T_836, _T_839) @[el2_lsu_bus_buffer.scala 265:101]
+    node _T_841 = eq(io.is_sideeffects_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 265:147]
+    node _T_842 = and(_T_840, _T_841) @[el2_lsu_bus_buffer.scala 265:145]
+    node _T_843 = eq(bus_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 265:170]
+    node _T_844 = and(_T_842, _T_843) @[el2_lsu_bus_buffer.scala 265:168]
+    ibuf_merge_en <= _T_844 @[el2_lsu_bus_buffer.scala 265:17]
+    node _T_845 = eq(io.ldst_dual_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 266:20]
+    ibuf_merge_in <= _T_845 @[el2_lsu_bus_buffer.scala 266:17]
+    node _T_846 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 267:65]
+    node _T_847 = and(ibuf_merge_en, _T_846) @[el2_lsu_bus_buffer.scala 267:63]
+    node _T_848 = bits(ibuf_byteen, 0, 0) @[el2_lsu_bus_buffer.scala 267:92]
+    node _T_849 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_buffer.scala 267:114]
+    node _T_850 = or(_T_848, _T_849) @[el2_lsu_bus_buffer.scala 267:96]
+    node _T_851 = bits(ibuf_byteen, 0, 0) @[el2_lsu_bus_buffer.scala 267:130]
+    node _T_852 = mux(_T_847, _T_850, _T_851) @[el2_lsu_bus_buffer.scala 267:48]
+    node _T_853 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 267:65]
+    node _T_854 = and(ibuf_merge_en, _T_853) @[el2_lsu_bus_buffer.scala 267:63]
+    node _T_855 = bits(ibuf_byteen, 1, 1) @[el2_lsu_bus_buffer.scala 267:92]
+    node _T_856 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_buffer.scala 267:114]
+    node _T_857 = or(_T_855, _T_856) @[el2_lsu_bus_buffer.scala 267:96]
+    node _T_858 = bits(ibuf_byteen, 1, 1) @[el2_lsu_bus_buffer.scala 267:130]
+    node _T_859 = mux(_T_854, _T_857, _T_858) @[el2_lsu_bus_buffer.scala 267:48]
+    node _T_860 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 267:65]
+    node _T_861 = and(ibuf_merge_en, _T_860) @[el2_lsu_bus_buffer.scala 267:63]
+    node _T_862 = bits(ibuf_byteen, 2, 2) @[el2_lsu_bus_buffer.scala 267:92]
+    node _T_863 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_buffer.scala 267:114]
+    node _T_864 = or(_T_862, _T_863) @[el2_lsu_bus_buffer.scala 267:96]
+    node _T_865 = bits(ibuf_byteen, 2, 2) @[el2_lsu_bus_buffer.scala 267:130]
+    node _T_866 = mux(_T_861, _T_864, _T_865) @[el2_lsu_bus_buffer.scala 267:48]
+    node _T_867 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 267:65]
+    node _T_868 = and(ibuf_merge_en, _T_867) @[el2_lsu_bus_buffer.scala 267:63]
+    node _T_869 = bits(ibuf_byteen, 3, 3) @[el2_lsu_bus_buffer.scala 267:92]
+    node _T_870 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_buffer.scala 267:114]
+    node _T_871 = or(_T_869, _T_870) @[el2_lsu_bus_buffer.scala 267:96]
+    node _T_872 = bits(ibuf_byteen, 3, 3) @[el2_lsu_bus_buffer.scala 267:130]
+    node _T_873 = mux(_T_868, _T_871, _T_872) @[el2_lsu_bus_buffer.scala 267:48]
+    node _T_874 = cat(_T_873, _T_866) @[Cat.scala 29:58]
+    node _T_875 = cat(_T_874, _T_859) @[Cat.scala 29:58]
+    node ibuf_byteen_out = cat(_T_875, _T_852) @[Cat.scala 29:58]
+    node _T_876 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 268:62]
+    node _T_877 = and(ibuf_merge_en, _T_876) @[el2_lsu_bus_buffer.scala 268:60]
+    node _T_878 = bits(ldst_byteen_lo_r, 0, 0) @[el2_lsu_bus_buffer.scala 268:98]
+    node _T_879 = bits(store_data_lo_r, 7, 0) @[el2_lsu_bus_buffer.scala 268:118]
+    node _T_880 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 268:143]
+    node _T_881 = mux(_T_878, _T_879, _T_880) @[el2_lsu_bus_buffer.scala 268:81]
+    node _T_882 = bits(ibuf_data, 7, 0) @[el2_lsu_bus_buffer.scala 268:169]
+    node _T_883 = mux(_T_877, _T_881, _T_882) @[el2_lsu_bus_buffer.scala 268:45]
+    node _T_884 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 268:62]
+    node _T_885 = and(ibuf_merge_en, _T_884) @[el2_lsu_bus_buffer.scala 268:60]
+    node _T_886 = bits(ldst_byteen_lo_r, 1, 1) @[el2_lsu_bus_buffer.scala 268:98]
+    node _T_887 = bits(store_data_lo_r, 15, 8) @[el2_lsu_bus_buffer.scala 268:118]
+    node _T_888 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 268:143]
+    node _T_889 = mux(_T_886, _T_887, _T_888) @[el2_lsu_bus_buffer.scala 268:81]
+    node _T_890 = bits(ibuf_data, 15, 8) @[el2_lsu_bus_buffer.scala 268:169]
+    node _T_891 = mux(_T_885, _T_889, _T_890) @[el2_lsu_bus_buffer.scala 268:45]
+    node _T_892 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 268:62]
+    node _T_893 = and(ibuf_merge_en, _T_892) @[el2_lsu_bus_buffer.scala 268:60]
+    node _T_894 = bits(ldst_byteen_lo_r, 2, 2) @[el2_lsu_bus_buffer.scala 268:98]
+    node _T_895 = bits(store_data_lo_r, 23, 16) @[el2_lsu_bus_buffer.scala 268:118]
+    node _T_896 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 268:143]
+    node _T_897 = mux(_T_894, _T_895, _T_896) @[el2_lsu_bus_buffer.scala 268:81]
+    node _T_898 = bits(ibuf_data, 23, 16) @[el2_lsu_bus_buffer.scala 268:169]
+    node _T_899 = mux(_T_893, _T_897, _T_898) @[el2_lsu_bus_buffer.scala 268:45]
+    node _T_900 = eq(ibuf_merge_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 268:62]
+    node _T_901 = and(ibuf_merge_en, _T_900) @[el2_lsu_bus_buffer.scala 268:60]
+    node _T_902 = bits(ldst_byteen_lo_r, 3, 3) @[el2_lsu_bus_buffer.scala 268:98]
+    node _T_903 = bits(store_data_lo_r, 31, 24) @[el2_lsu_bus_buffer.scala 268:118]
+    node _T_904 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 268:143]
+    node _T_905 = mux(_T_902, _T_903, _T_904) @[el2_lsu_bus_buffer.scala 268:81]
+    node _T_906 = bits(ibuf_data, 31, 24) @[el2_lsu_bus_buffer.scala 268:169]
+    node _T_907 = mux(_T_901, _T_905, _T_906) @[el2_lsu_bus_buffer.scala 268:45]
+    node _T_908 = cat(_T_907, _T_899) @[Cat.scala 29:58]
+    node _T_909 = cat(_T_908, _T_891) @[Cat.scala 29:58]
+    node ibuf_data_out = cat(_T_909, _T_883) @[Cat.scala 29:58]
+    node _T_910 = mux(ibuf_wr_en, UInt<1>("h01"), ibuf_valid) @[el2_lsu_bus_buffer.scala 270:28]
+    node _T_911 = and(_T_910, ibuf_rst) @[el2_lsu_bus_buffer.scala 270:61]
+    reg _T_912 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 270:24]
+    _T_912 <= _T_911 @[el2_lsu_bus_buffer.scala 270:24]
+    ibuf_valid <= _T_912 @[el2_lsu_bus_buffer.scala 270:14]
+    node _T_913 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 271:120]
+    node _T_914 = bits(_T_913, 0, 0) @[el2_lsu_bus_buffer.scala 271:120]
+    node _T_915 = and(ibuf_wr_en, _T_914) @[el2_lsu_bus_buffer.scala 271:89]
+    reg _T_916 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_915 : @[Reg.scala 28:19]
+      _T_916 <= ibuf_tag_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    ibuf_tag <= _T_916 @[el2_lsu_bus_buffer.scala 271:12]
+    node _T_917 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 272:131]
+    node _T_918 = bits(_T_917, 0, 0) @[el2_lsu_bus_buffer.scala 272:131]
+    node _T_919 = and(ibuf_wr_en, _T_918) @[el2_lsu_bus_buffer.scala 272:100]
+    reg ibuf_dualtag : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_919 : @[Reg.scala 28:19]
+      ibuf_dualtag <= WrPtr0_r @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_920 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 273:127]
+    node _T_921 = bits(_T_920, 0, 0) @[el2_lsu_bus_buffer.scala 273:127]
+    node _T_922 = and(ibuf_wr_en, _T_921) @[el2_lsu_bus_buffer.scala 273:96]
+    reg ibuf_dual : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_922 : @[Reg.scala 28:19]
+      ibuf_dual <= io.ldst_dual_r @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_923 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 274:128]
+    node _T_924 = bits(_T_923, 0, 0) @[el2_lsu_bus_buffer.scala 274:128]
+    node _T_925 = and(ibuf_wr_en, _T_924) @[el2_lsu_bus_buffer.scala 274:97]
+    reg ibuf_samedw : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_925 : @[Reg.scala 28:19]
+      ibuf_samedw <= ldst_samedw_r @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_926 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 275:135]
+    node _T_927 = bits(_T_926, 0, 0) @[el2_lsu_bus_buffer.scala 275:135]
+    node _T_928 = and(ibuf_wr_en, _T_927) @[el2_lsu_bus_buffer.scala 275:104]
+    reg ibuf_nomerge : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_928 : @[Reg.scala 28:19]
+      ibuf_nomerge <= io.no_dword_merge_r @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_929 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 276:135]
+    node _T_930 = bits(_T_929, 0, 0) @[el2_lsu_bus_buffer.scala 276:135]
+    node _T_931 = and(ibuf_wr_en, _T_930) @[el2_lsu_bus_buffer.scala 276:104]
+    reg _T_932 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_931 : @[Reg.scala 28:19]
+      _T_932 <= io.is_sideeffects_r @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    ibuf_sideeffect <= _T_932 @[el2_lsu_bus_buffer.scala 276:19]
+    node _T_933 = asUInt(io.lsu_bus_ibuf_c1_clk) @[el2_lsu_bus_buffer.scala 277:134]
+    node _T_934 = bits(_T_933, 0, 0) @[el2_lsu_bus_buffer.scala 277:134]
+    node _T_935 = and(ibuf_wr_en, _T_934) @[el2_lsu_bus_buffer.scala 277:103]
+    reg ibuf_unsign : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_935 : @[Reg.scala 28:19]
+      ibuf_unsign <= io.lsu_pkt_r.unsign @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    reg _T_936 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when ibuf_wr_en : @[Reg.scala 28:19]
+      _T_936 <= io.lsu_pkt_r.store @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    ibuf_write <= _T_936 @[el2_lsu_bus_buffer.scala 278:14]
+    reg ibuf_sz : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when ibuf_wr_en : @[Reg.scala 28:19]
+      ibuf_sz <= ibuf_sz_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    inst rvclkhdr of rvclkhdr @[el2_lib.scala 472:23]
+    rvclkhdr.clock <= clock
+    rvclkhdr.reset <= reset
+    rvclkhdr.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr.io.en <= ibuf_wr_en @[el2_lib.scala 475:17]
+    rvclkhdr.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_937 : UInt, rvclkhdr.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_937 <= ibuf_addr_in @[el2_lib.scala 478:16]
+    ibuf_addr <= _T_937 @[el2_lsu_bus_buffer.scala 280:13]
+    reg _T_938 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when ibuf_wr_en : @[Reg.scala 28:19]
+      _T_938 <= ibuf_byteen_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    ibuf_byteen <= _T_938 @[el2_lsu_bus_buffer.scala 281:15]
+    inst rvclkhdr_1 of rvclkhdr_1 @[el2_lib.scala 472:23]
+    rvclkhdr_1.clock <= clock
+    rvclkhdr_1.reset <= reset
+    rvclkhdr_1.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr_1.io.en <= ibuf_wr_en @[el2_lib.scala 475:17]
+    rvclkhdr_1.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_939 : UInt, rvclkhdr_1.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_939 <= ibuf_data_in @[el2_lib.scala 478:16]
+    ibuf_data <= _T_939 @[el2_lsu_bus_buffer.scala 282:13]
+    reg _T_940 : UInt, io.lsu_bus_ibuf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 283:59]
+    _T_940 <= ibuf_timer_in @[el2_lsu_bus_buffer.scala 283:59]
+    ibuf_timer <= _T_940 @[el2_lsu_bus_buffer.scala 283:14]
+    wire buf_numvld_wrcmd_any : UInt<4>
+    buf_numvld_wrcmd_any <= UInt<1>("h00")
+    wire buf_numvld_cmd_any : UInt<4>
+    buf_numvld_cmd_any <= UInt<1>("h00")
+    wire obuf_wr_timer : UInt<3>
+    obuf_wr_timer <= UInt<1>("h00")
+    wire buf_nomerge : UInt<1>[4] @[el2_lsu_bus_buffer.scala 287:25]
+    buf_nomerge[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 288:15]
+    buf_nomerge[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 288:15]
+    buf_nomerge[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 288:15]
+    buf_nomerge[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 288:15]
+    wire Cmdptr0 : UInt<2>
+    Cmdptr0 <= UInt<1>("h00")
+    wire buf_sideeffect : UInt<4>
+    buf_sideeffect <= UInt<1>("h00")
+    wire obuf_force_wr_en : UInt<1>
+    obuf_force_wr_en <= UInt<1>("h00")
+    wire obuf_wr_en : UInt<1>
+    obuf_wr_en <= UInt<1>("h00")
+    node _T_941 = eq(buf_numvld_wrcmd_any, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 293:43]
+    node _T_942 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 293:72]
+    node _T_943 = and(_T_941, _T_942) @[el2_lsu_bus_buffer.scala 293:51]
+    node _T_944 = neq(obuf_wr_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 293:97]
+    node _T_945 = and(_T_943, _T_944) @[el2_lsu_bus_buffer.scala 293:80]
+    node _T_946 = eq(bus_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 294:5]
+    node _T_947 = and(_T_945, _T_946) @[el2_lsu_bus_buffer.scala 293:114]
+    node _T_948 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 294:114]
+    node _T_949 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 294:114]
+    node _T_950 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 294:114]
+    node _T_951 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 294:114]
+    node _T_952 = mux(_T_948, buf_nomerge[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_953 = mux(_T_949, buf_nomerge[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_954 = mux(_T_950, buf_nomerge[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_955 = mux(_T_951, buf_nomerge[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_956 = or(_T_952, _T_953) @[Mux.scala 27:72]
+    node _T_957 = or(_T_956, _T_954) @[Mux.scala 27:72]
+    node _T_958 = or(_T_957, _T_955) @[Mux.scala 27:72]
+    wire _T_959 : UInt<1> @[Mux.scala 27:72]
+    _T_959 <= _T_958 @[Mux.scala 27:72]
+    node _T_960 = eq(_T_959, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 294:31]
+    node _T_961 = and(_T_947, _T_960) @[el2_lsu_bus_buffer.scala 294:29]
+    node _T_962 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 295:88]
+    node _T_963 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 295:111]
+    node _T_964 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 295:88]
+    node _T_965 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 295:111]
+    node _T_966 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 295:88]
+    node _T_967 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 295:111]
+    node _T_968 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 295:88]
+    node _T_969 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 295:111]
+    node _T_970 = mux(_T_962, _T_963, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_971 = mux(_T_964, _T_965, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_972 = mux(_T_966, _T_967, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_973 = mux(_T_968, _T_969, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_974 = or(_T_970, _T_971) @[Mux.scala 27:72]
+    node _T_975 = or(_T_974, _T_972) @[Mux.scala 27:72]
+    node _T_976 = or(_T_975, _T_973) @[Mux.scala 27:72]
+    wire _T_977 : UInt<1> @[Mux.scala 27:72]
+    _T_977 <= _T_976 @[Mux.scala 27:72]
+    node _T_978 = eq(_T_977, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 295:5]
+    node _T_979 = and(_T_961, _T_978) @[el2_lsu_bus_buffer.scala 294:140]
+    node _T_980 = eq(obuf_force_wr_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 295:119]
+    node obuf_wr_wait = and(_T_979, _T_980) @[el2_lsu_bus_buffer.scala 295:117]
+    node _T_981 = orr(buf_numvld_cmd_any) @[el2_lsu_bus_buffer.scala 296:75]
+    node _T_982 = lt(obuf_wr_timer, UInt<3>("h07")) @[el2_lsu_bus_buffer.scala 296:95]
+    node _T_983 = and(_T_981, _T_982) @[el2_lsu_bus_buffer.scala 296:79]
+    node _T_984 = add(obuf_wr_timer, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 296:121]
+    node _T_985 = tail(_T_984, 1) @[el2_lsu_bus_buffer.scala 296:121]
+    node _T_986 = mux(_T_983, _T_985, obuf_wr_timer) @[el2_lsu_bus_buffer.scala 296:55]
+    node obuf_wr_timer_in = mux(obuf_wr_en, UInt<3>("h00"), _T_986) @[el2_lsu_bus_buffer.scala 296:29]
+    node _T_987 = eq(io.lsu_busreq_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 297:41]
+    node _T_988 = and(io.lsu_busreq_m, _T_987) @[el2_lsu_bus_buffer.scala 297:39]
+    node _T_989 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 297:60]
+    node _T_990 = and(_T_988, _T_989) @[el2_lsu_bus_buffer.scala 297:58]
+    node _T_991 = eq(buf_numvld_cmd_any, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 297:93]
+    node _T_992 = and(_T_990, _T_991) @[el2_lsu_bus_buffer.scala 297:72]
+    node _T_993 = bits(io.lsu_addr_m, 31, 2) @[el2_lsu_bus_buffer.scala 297:117]
+    node _T_994 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 297:208]
+    node _T_995 = bits(buf_addr[0], 31, 2) @[el2_lsu_bus_buffer.scala 297:228]
+    node _T_996 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 297:208]
+    node _T_997 = bits(buf_addr[1], 31, 2) @[el2_lsu_bus_buffer.scala 297:228]
+    node _T_998 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 297:208]
+    node _T_999 = bits(buf_addr[2], 31, 2) @[el2_lsu_bus_buffer.scala 297:228]
+    node _T_1000 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 297:208]
+    node _T_1001 = bits(buf_addr[3], 31, 2) @[el2_lsu_bus_buffer.scala 297:228]
+    node _T_1002 = mux(_T_994, _T_995, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1003 = mux(_T_996, _T_997, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1004 = mux(_T_998, _T_999, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1005 = mux(_T_1000, _T_1001, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1006 = or(_T_1002, _T_1003) @[Mux.scala 27:72]
+    node _T_1007 = or(_T_1006, _T_1004) @[Mux.scala 27:72]
+    node _T_1008 = or(_T_1007, _T_1005) @[Mux.scala 27:72]
+    wire _T_1009 : UInt<30> @[Mux.scala 27:72]
+    _T_1009 <= _T_1008 @[Mux.scala 27:72]
+    node _T_1010 = neq(_T_993, _T_1009) @[el2_lsu_bus_buffer.scala 297:123]
+    node _T_1011 = and(_T_992, _T_1010) @[el2_lsu_bus_buffer.scala 297:101]
+    obuf_force_wr_en <= _T_1011 @[el2_lsu_bus_buffer.scala 297:20]
+    wire buf_numvld_pend_any : UInt<4>
+    buf_numvld_pend_any <= UInt<1>("h00")
+    node _T_1012 = eq(buf_numvld_pend_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 299:53]
+    node _T_1013 = and(ibuf_byp, _T_1012) @[el2_lsu_bus_buffer.scala 299:31]
+    node _T_1014 = eq(io.lsu_pkt_r.store, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 299:64]
+    node _T_1015 = or(_T_1014, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 299:84]
+    node ibuf_buf_byp = and(_T_1013, _T_1015) @[el2_lsu_bus_buffer.scala 299:61]
+    wire bus_sideeffect_pend : UInt<1>
+    bus_sideeffect_pend <= UInt<1>("h00")
+    wire found_cmdptr0 : UInt<1>
+    found_cmdptr0 <= UInt<1>("h00")
+    wire buf_cmd_state_bus_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 302:34]
+    buf_cmd_state_bus_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 303:24]
+    buf_cmd_state_bus_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 303:24]
+    buf_cmd_state_bus_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 303:24]
+    buf_cmd_state_bus_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 303:24]
+    wire buf_dual : UInt<1>[4] @[el2_lsu_bus_buffer.scala 304:22]
+    buf_dual[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 305:12]
+    buf_dual[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 305:12]
+    buf_dual[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 305:12]
+    buf_dual[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 305:12]
+    wire buf_samedw : UInt<1>[4] @[el2_lsu_bus_buffer.scala 306:24]
+    buf_samedw[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 307:14]
+    buf_samedw[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 307:14]
+    buf_samedw[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 307:14]
+    buf_samedw[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 307:14]
+    wire found_cmdptr1 : UInt<1>
+    found_cmdptr1 <= UInt<1>("h00")
+    wire bus_cmd_ready : UInt<1>
+    bus_cmd_ready <= UInt<1>("h00")
+    wire obuf_valid : UInt<1>
+    obuf_valid <= UInt<1>("h00")
+    wire obuf_nosend : UInt<1>
+    obuf_nosend <= UInt<1>("h00")
+    wire lsu_bus_cntr_overflow : UInt<1>
+    lsu_bus_cntr_overflow <= UInt<1>("h00")
+    wire bus_addr_match_pending : UInt<1>
+    bus_addr_match_pending <= UInt<1>("h00")
+    node _T_1016 = and(ibuf_buf_byp, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 314:32]
+    node _T_1017 = and(io.is_sideeffects_r, bus_sideeffect_pend) @[el2_lsu_bus_buffer.scala 314:74]
+    node _T_1018 = eq(_T_1017, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 314:52]
+    node _T_1019 = and(_T_1016, _T_1018) @[el2_lsu_bus_buffer.scala 314:50]
+    node _T_1020 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 315:89]
+    node _T_1021 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 315:89]
+    node _T_1022 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 315:89]
+    node _T_1023 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 315:89]
+    node _T_1024 = mux(_T_1020, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1025 = mux(_T_1021, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1026 = mux(_T_1022, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1027 = mux(_T_1023, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1028 = or(_T_1024, _T_1025) @[Mux.scala 27:72]
+    node _T_1029 = or(_T_1028, _T_1026) @[Mux.scala 27:72]
+    node _T_1030 = or(_T_1029, _T_1027) @[Mux.scala 27:72]
+    wire _T_1031 : UInt<3> @[Mux.scala 27:72]
+    _T_1031 <= _T_1030 @[Mux.scala 27:72]
+    node _T_1032 = eq(_T_1031, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 315:113]
+    node _T_1033 = and(_T_1032, found_cmdptr0) @[el2_lsu_bus_buffer.scala 315:124]
+    node _T_1034 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58]
+    node _T_1035 = cat(_T_1034, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58]
+    node _T_1036 = cat(_T_1035, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58]
+    node _T_1037 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1038 = bits(_T_1036, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1039 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1040 = bits(_T_1036, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1041 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1042 = bits(_T_1036, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1043 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1044 = bits(_T_1036, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1045 = mux(_T_1037, _T_1038, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1046 = mux(_T_1039, _T_1040, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1047 = mux(_T_1041, _T_1042, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1048 = mux(_T_1043, _T_1044, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1049 = or(_T_1045, _T_1046) @[Mux.scala 27:72]
+    node _T_1050 = or(_T_1049, _T_1047) @[Mux.scala 27:72]
+    node _T_1051 = or(_T_1050, _T_1048) @[Mux.scala 27:72]
+    wire _T_1052 : UInt<1> @[Mux.scala 27:72]
+    _T_1052 <= _T_1051 @[Mux.scala 27:72]
+    node _T_1053 = eq(_T_1052, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 316:23]
+    node _T_1054 = and(_T_1033, _T_1053) @[el2_lsu_bus_buffer.scala 316:21]
+    node _T_1055 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1056 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1057 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1058 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1059 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1060 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1061 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1062 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1063 = mux(_T_1055, _T_1056, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1064 = mux(_T_1057, _T_1058, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1065 = mux(_T_1059, _T_1060, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1066 = mux(_T_1061, _T_1062, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1067 = or(_T_1063, _T_1064) @[Mux.scala 27:72]
+    node _T_1068 = or(_T_1067, _T_1065) @[Mux.scala 27:72]
+    node _T_1069 = or(_T_1068, _T_1066) @[Mux.scala 27:72]
+    wire _T_1070 : UInt<1> @[Mux.scala 27:72]
+    _T_1070 <= _T_1069 @[Mux.scala 27:72]
+    node _T_1071 = and(_T_1070, bus_sideeffect_pend) @[el2_lsu_bus_buffer.scala 316:141]
+    node _T_1072 = eq(_T_1071, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 316:105]
+    node _T_1073 = and(_T_1054, _T_1072) @[el2_lsu_bus_buffer.scala 316:103]
+    node _T_1074 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58]
+    node _T_1075 = cat(_T_1074, buf_dual[1]) @[Cat.scala 29:58]
+    node _T_1076 = cat(_T_1075, buf_dual[0]) @[Cat.scala 29:58]
+    node _T_1077 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1078 = bits(_T_1076, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1079 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1080 = bits(_T_1076, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1081 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1082 = bits(_T_1076, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1083 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1084 = bits(_T_1076, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1085 = mux(_T_1077, _T_1078, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1086 = mux(_T_1079, _T_1080, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1087 = mux(_T_1081, _T_1082, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1088 = mux(_T_1083, _T_1084, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1089 = or(_T_1085, _T_1086) @[Mux.scala 27:72]
+    node _T_1090 = or(_T_1089, _T_1087) @[Mux.scala 27:72]
+    node _T_1091 = or(_T_1090, _T_1088) @[Mux.scala 27:72]
+    wire _T_1092 : UInt<1> @[Mux.scala 27:72]
+    _T_1092 <= _T_1091 @[Mux.scala 27:72]
+    node _T_1093 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58]
+    node _T_1094 = cat(_T_1093, buf_samedw[1]) @[Cat.scala 29:58]
+    node _T_1095 = cat(_T_1094, buf_samedw[0]) @[Cat.scala 29:58]
+    node _T_1096 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1097 = bits(_T_1095, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1098 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1099 = bits(_T_1095, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1100 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1101 = bits(_T_1095, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1102 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1103 = bits(_T_1095, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1104 = mux(_T_1096, _T_1097, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1105 = mux(_T_1098, _T_1099, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1106 = mux(_T_1100, _T_1101, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1107 = mux(_T_1102, _T_1103, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1108 = or(_T_1104, _T_1105) @[Mux.scala 27:72]
+    node _T_1109 = or(_T_1108, _T_1106) @[Mux.scala 27:72]
+    node _T_1110 = or(_T_1109, _T_1107) @[Mux.scala 27:72]
+    wire _T_1111 : UInt<1> @[Mux.scala 27:72]
+    _T_1111 <= _T_1110 @[Mux.scala 27:72]
+    node _T_1112 = and(_T_1092, _T_1111) @[el2_lsu_bus_buffer.scala 317:77]
+    node _T_1113 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1114 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1115 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1116 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1117 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1118 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1119 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1120 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1121 = mux(_T_1113, _T_1114, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1122 = mux(_T_1115, _T_1116, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1123 = mux(_T_1117, _T_1118, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1124 = mux(_T_1119, _T_1120, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1125 = or(_T_1121, _T_1122) @[Mux.scala 27:72]
+    node _T_1126 = or(_T_1125, _T_1123) @[Mux.scala 27:72]
+    node _T_1127 = or(_T_1126, _T_1124) @[Mux.scala 27:72]
+    wire _T_1128 : UInt<1> @[Mux.scala 27:72]
+    _T_1128 <= _T_1127 @[Mux.scala 27:72]
+    node _T_1129 = eq(_T_1128, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 317:150]
+    node _T_1130 = and(_T_1112, _T_1129) @[el2_lsu_bus_buffer.scala 317:148]
+    node _T_1131 = eq(_T_1130, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 317:8]
+    node _T_1132 = or(_T_1131, found_cmdptr1) @[el2_lsu_bus_buffer.scala 317:181]
+    node _T_1133 = cat(buf_nomerge[3], buf_nomerge[2]) @[Cat.scala 29:58]
+    node _T_1134 = cat(_T_1133, buf_nomerge[1]) @[Cat.scala 29:58]
+    node _T_1135 = cat(_T_1134, buf_nomerge[0]) @[Cat.scala 29:58]
+    node _T_1136 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1137 = bits(_T_1135, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1138 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1139 = bits(_T_1135, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1140 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1141 = bits(_T_1135, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1142 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1143 = bits(_T_1135, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1144 = mux(_T_1136, _T_1137, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1145 = mux(_T_1138, _T_1139, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1146 = mux(_T_1140, _T_1141, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1147 = mux(_T_1142, _T_1143, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1148 = or(_T_1144, _T_1145) @[Mux.scala 27:72]
+    node _T_1149 = or(_T_1148, _T_1146) @[Mux.scala 27:72]
+    node _T_1150 = or(_T_1149, _T_1147) @[Mux.scala 27:72]
+    wire _T_1151 : UInt<1> @[Mux.scala 27:72]
+    _T_1151 <= _T_1150 @[Mux.scala 27:72]
+    node _T_1152 = or(_T_1132, _T_1151) @[el2_lsu_bus_buffer.scala 317:197]
+    node _T_1153 = or(_T_1152, obuf_force_wr_en) @[el2_lsu_bus_buffer.scala 317:269]
+    node _T_1154 = and(_T_1073, _T_1153) @[el2_lsu_bus_buffer.scala 316:164]
+    node _T_1155 = or(_T_1019, _T_1154) @[el2_lsu_bus_buffer.scala 314:98]
+    node _T_1156 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 318:48]
+    node _T_1157 = or(bus_cmd_ready, _T_1156) @[el2_lsu_bus_buffer.scala 318:46]
+    node _T_1158 = or(_T_1157, obuf_nosend) @[el2_lsu_bus_buffer.scala 318:60]
+    node _T_1159 = and(_T_1155, _T_1158) @[el2_lsu_bus_buffer.scala 318:29]
+    node _T_1160 = eq(obuf_wr_wait, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 318:77]
+    node _T_1161 = and(_T_1159, _T_1160) @[el2_lsu_bus_buffer.scala 318:75]
+    node _T_1162 = eq(lsu_bus_cntr_overflow, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 318:93]
+    node _T_1163 = and(_T_1161, _T_1162) @[el2_lsu_bus_buffer.scala 318:91]
+    node _T_1164 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 318:118]
+    node _T_1165 = and(_T_1163, _T_1164) @[el2_lsu_bus_buffer.scala 318:116]
+    node _T_1166 = and(_T_1165, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 318:142]
+    obuf_wr_en <= _T_1166 @[el2_lsu_bus_buffer.scala 314:14]
+    wire bus_cmd_sent : UInt<1>
+    bus_cmd_sent <= UInt<1>("h00")
+    node _T_1167 = and(obuf_valid, obuf_nosend) @[el2_lsu_bus_buffer.scala 320:47]
+    node _T_1168 = or(bus_cmd_sent, _T_1167) @[el2_lsu_bus_buffer.scala 320:33]
+    node _T_1169 = eq(obuf_wr_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 320:65]
+    node _T_1170 = and(_T_1168, _T_1169) @[el2_lsu_bus_buffer.scala 320:63]
+    node _T_1171 = and(_T_1170, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 320:77]
+    node obuf_rst = or(_T_1171, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 320:98]
+    node _T_1172 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1173 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1174 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1175 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1176 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1177 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1178 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1179 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1180 = mux(_T_1172, _T_1173, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1181 = mux(_T_1174, _T_1175, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1182 = mux(_T_1176, _T_1177, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1183 = mux(_T_1178, _T_1179, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1184 = or(_T_1180, _T_1181) @[Mux.scala 27:72]
+    node _T_1185 = or(_T_1184, _T_1182) @[Mux.scala 27:72]
+    node _T_1186 = or(_T_1185, _T_1183) @[Mux.scala 27:72]
+    wire _T_1187 : UInt<1> @[Mux.scala 27:72]
+    _T_1187 <= _T_1186 @[Mux.scala 27:72]
+    node obuf_write_in = mux(ibuf_buf_byp, io.lsu_pkt_r.store, _T_1187) @[el2_lsu_bus_buffer.scala 321:26]
+    node _T_1188 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1189 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1190 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1191 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1192 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1193 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1194 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1195 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1196 = mux(_T_1188, _T_1189, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1197 = mux(_T_1190, _T_1191, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1198 = mux(_T_1192, _T_1193, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1199 = mux(_T_1194, _T_1195, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1200 = or(_T_1196, _T_1197) @[Mux.scala 27:72]
+    node _T_1201 = or(_T_1200, _T_1198) @[Mux.scala 27:72]
+    node _T_1202 = or(_T_1201, _T_1199) @[Mux.scala 27:72]
+    wire _T_1203 : UInt<1> @[Mux.scala 27:72]
+    _T_1203 <= _T_1202 @[Mux.scala 27:72]
+    node obuf_sideeffect_in = mux(ibuf_buf_byp, io.is_sideeffects_r, _T_1203) @[el2_lsu_bus_buffer.scala 322:31]
+    node _T_1204 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1205 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1206 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1207 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1208 = mux(_T_1204, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1209 = mux(_T_1205, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1210 = mux(_T_1206, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1211 = mux(_T_1207, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1212 = or(_T_1208, _T_1209) @[Mux.scala 27:72]
+    node _T_1213 = or(_T_1212, _T_1210) @[Mux.scala 27:72]
+    node _T_1214 = or(_T_1213, _T_1211) @[Mux.scala 27:72]
+    wire _T_1215 : UInt<32> @[Mux.scala 27:72]
+    _T_1215 <= _T_1214 @[Mux.scala 27:72]
+    node obuf_addr_in = mux(ibuf_buf_byp, io.lsu_addr_r, _T_1215) @[el2_lsu_bus_buffer.scala 323:25]
+    wire buf_sz : UInt<2>[4] @[el2_lsu_bus_buffer.scala 324:20]
+    buf_sz[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:10]
+    buf_sz[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:10]
+    buf_sz[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:10]
+    buf_sz[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 325:10]
+    node _T_1216 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58]
+    node _T_1217 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1218 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1219 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1220 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1221 = mux(_T_1217, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1222 = mux(_T_1218, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1223 = mux(_T_1219, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1224 = mux(_T_1220, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1225 = or(_T_1221, _T_1222) @[Mux.scala 27:72]
+    node _T_1226 = or(_T_1225, _T_1223) @[Mux.scala 27:72]
+    node _T_1227 = or(_T_1226, _T_1224) @[Mux.scala 27:72]
+    wire _T_1228 : UInt<2> @[Mux.scala 27:72]
+    _T_1228 <= _T_1227 @[Mux.scala 27:72]
+    node obuf_sz_in = mux(ibuf_buf_byp, _T_1216, _T_1228) @[el2_lsu_bus_buffer.scala 326:23]
+    wire obuf_merge_en : UInt<1>
+    obuf_merge_en <= UInt<1>("h00")
+    node obuf_tag0_in = mux(ibuf_buf_byp, WrPtr0_r, Cmdptr0) @[el2_lsu_bus_buffer.scala 329:25]
+    wire Cmdptr1 : UInt<2>
+    Cmdptr1 <= UInt<1>("h00")
+    node obuf_tag1_in = mux(ibuf_buf_byp, WrPtr1_r, Cmdptr1) @[el2_lsu_bus_buffer.scala 331:25]
+    wire obuf_cmd_done : UInt<1>
+    obuf_cmd_done <= UInt<1>("h00")
+    wire bus_wcmd_sent : UInt<1>
+    bus_wcmd_sent <= UInt<1>("h00")
+    node _T_1229 = or(obuf_wr_en, obuf_rst) @[el2_lsu_bus_buffer.scala 334:39]
+    node _T_1230 = eq(_T_1229, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 334:26]
+    node _T_1231 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 334:68]
+    node obuf_cmd_done_in = and(_T_1230, _T_1231) @[el2_lsu_bus_buffer.scala 334:51]
+    wire obuf_data_done : UInt<1>
+    obuf_data_done <= UInt<1>("h00")
+    wire bus_wdata_sent : UInt<1>
+    bus_wdata_sent <= UInt<1>("h00")
+    node _T_1232 = or(obuf_wr_en, obuf_rst) @[el2_lsu_bus_buffer.scala 337:40]
+    node _T_1233 = eq(_T_1232, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 337:27]
+    node _T_1234 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 337:70]
+    node obuf_data_done_in = and(_T_1233, _T_1234) @[el2_lsu_bus_buffer.scala 337:52]
+    node _T_1235 = bits(obuf_sz_in, 1, 0) @[el2_lsu_bus_buffer.scala 338:67]
+    node _T_1236 = eq(_T_1235, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:72]
+    node _T_1237 = bits(obuf_sz_in, 0, 0) @[el2_lsu_bus_buffer.scala 338:92]
+    node _T_1238 = bits(obuf_addr_in, 0, 0) @[el2_lsu_bus_buffer.scala 338:111]
+    node _T_1239 = eq(_T_1238, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:98]
+    node _T_1240 = and(_T_1237, _T_1239) @[el2_lsu_bus_buffer.scala 338:96]
+    node _T_1241 = or(_T_1236, _T_1240) @[el2_lsu_bus_buffer.scala 338:79]
+    node _T_1242 = bits(obuf_sz_in, 1, 1) @[el2_lsu_bus_buffer.scala 338:129]
+    node _T_1243 = bits(obuf_addr_in, 1, 0) @[el2_lsu_bus_buffer.scala 338:147]
+    node _T_1244 = orr(_T_1243) @[el2_lsu_bus_buffer.scala 338:153]
+    node _T_1245 = eq(_T_1244, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 338:134]
+    node _T_1246 = and(_T_1242, _T_1245) @[el2_lsu_bus_buffer.scala 338:132]
+    node _T_1247 = or(_T_1241, _T_1246) @[el2_lsu_bus_buffer.scala 338:116]
+    node obuf_aligned_in = mux(ibuf_buf_byp, is_aligned_r, _T_1247) @[el2_lsu_bus_buffer.scala 338:28]
+    wire obuf_nosend_in : UInt<1>
+    obuf_nosend_in <= UInt<1>("h00")
+    wire obuf_rdrsp_pend : UInt<1>
+    obuf_rdrsp_pend <= UInt<1>("h00")
+    wire bus_rsp_read : UInt<1>
+    bus_rsp_read <= UInt<1>("h00")
+    wire bus_rsp_read_tag : UInt<3>
+    bus_rsp_read_tag <= UInt<1>("h00")
+    wire obuf_rdrsp_tag : UInt<3>
+    obuf_rdrsp_tag <= UInt<1>("h00")
+    wire obuf_write : UInt<1>
+    obuf_write <= UInt<1>("h00")
+    node _T_1248 = eq(obuf_nosend_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 346:44]
+    node _T_1249 = and(obuf_wr_en, _T_1248) @[el2_lsu_bus_buffer.scala 346:42]
+    node _T_1250 = eq(_T_1249, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 346:29]
+    node _T_1251 = and(_T_1250, obuf_rdrsp_pend) @[el2_lsu_bus_buffer.scala 346:61]
+    node _T_1252 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 346:116]
+    node _T_1253 = and(bus_rsp_read, _T_1252) @[el2_lsu_bus_buffer.scala 346:96]
+    node _T_1254 = eq(_T_1253, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 346:81]
+    node _T_1255 = and(_T_1251, _T_1254) @[el2_lsu_bus_buffer.scala 346:79]
+    node _T_1256 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 347:22]
+    node _T_1257 = and(bus_cmd_sent, _T_1256) @[el2_lsu_bus_buffer.scala 347:20]
+    node _T_1258 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 347:37]
+    node _T_1259 = and(_T_1257, _T_1258) @[el2_lsu_bus_buffer.scala 347:35]
+    node obuf_rdrsp_pend_in = or(_T_1255, _T_1259) @[el2_lsu_bus_buffer.scala 346:138]
+    wire obuf_tag0 : UInt<3>
+    obuf_tag0 <= UInt<1>("h00")
+    node _T_1260 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 349:46]
+    node _T_1261 = or(bus_cmd_sent, _T_1260) @[el2_lsu_bus_buffer.scala 349:44]
+    node obuf_rdrsp_tag_in = mux(_T_1261, obuf_tag0, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 349:30]
+    wire obuf_addr : UInt<32>
+    obuf_addr <= UInt<1>("h00")
+    wire obuf_sideeffect : UInt<1>
+    obuf_sideeffect <= UInt<1>("h00")
+    node _T_1262 = bits(obuf_addr_in, 31, 3) @[el2_lsu_bus_buffer.scala 352:34]
+    node _T_1263 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 352:52]
+    node _T_1264 = eq(_T_1262, _T_1263) @[el2_lsu_bus_buffer.scala 352:40]
+    node _T_1265 = and(_T_1264, obuf_aligned_in) @[el2_lsu_bus_buffer.scala 352:60]
+    node _T_1266 = eq(obuf_sideeffect, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 352:80]
+    node _T_1267 = and(_T_1265, _T_1266) @[el2_lsu_bus_buffer.scala 352:78]
+    node _T_1268 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 352:99]
+    node _T_1269 = and(_T_1267, _T_1268) @[el2_lsu_bus_buffer.scala 352:97]
+    node _T_1270 = eq(obuf_write_in, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 352:113]
+    node _T_1271 = and(_T_1269, _T_1270) @[el2_lsu_bus_buffer.scala 352:111]
+    node _T_1272 = eq(io.dec_tlu_external_ldfwd_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 352:130]
+    node _T_1273 = and(_T_1271, _T_1272) @[el2_lsu_bus_buffer.scala 352:128]
+    node _T_1274 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 353:20]
+    node _T_1275 = and(obuf_valid, _T_1274) @[el2_lsu_bus_buffer.scala 353:18]
+    node _T_1276 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 353:90]
+    node _T_1277 = and(bus_rsp_read, _T_1276) @[el2_lsu_bus_buffer.scala 353:70]
+    node _T_1278 = eq(_T_1277, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 353:55]
+    node _T_1279 = and(obuf_rdrsp_pend, _T_1278) @[el2_lsu_bus_buffer.scala 353:53]
+    node _T_1280 = or(_T_1275, _T_1279) @[el2_lsu_bus_buffer.scala 353:34]
+    node _T_1281 = and(_T_1273, _T_1280) @[el2_lsu_bus_buffer.scala 352:165]
+    obuf_nosend_in <= _T_1281 @[el2_lsu_bus_buffer.scala 352:18]
+    node _T_1282 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 354:60]
+    node _T_1283 = cat(ldst_byteen_lo_r, UInt<4>("h00")) @[Cat.scala 29:58]
+    node _T_1284 = cat(UInt<4>("h00"), ldst_byteen_lo_r) @[Cat.scala 29:58]
+    node _T_1285 = mux(_T_1282, _T_1283, _T_1284) @[el2_lsu_bus_buffer.scala 354:46]
+    node _T_1286 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1287 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1288 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1289 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1290 = mux(_T_1286, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1291 = mux(_T_1287, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1292 = mux(_T_1288, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1293 = mux(_T_1289, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1294 = or(_T_1290, _T_1291) @[Mux.scala 27:72]
+    node _T_1295 = or(_T_1294, _T_1292) @[Mux.scala 27:72]
+    node _T_1296 = or(_T_1295, _T_1293) @[Mux.scala 27:72]
+    wire _T_1297 : UInt<32> @[Mux.scala 27:72]
+    _T_1297 <= _T_1296 @[Mux.scala 27:72]
+    node _T_1298 = bits(_T_1297, 2, 2) @[el2_lsu_bus_buffer.scala 355:36]
+    node _T_1299 = bits(_T_1298, 0, 0) @[el2_lsu_bus_buffer.scala 355:46]
+    node _T_1300 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1301 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1302 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1303 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1304 = mux(_T_1300, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1305 = mux(_T_1301, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1306 = mux(_T_1302, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1307 = mux(_T_1303, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1308 = or(_T_1304, _T_1305) @[Mux.scala 27:72]
+    node _T_1309 = or(_T_1308, _T_1306) @[Mux.scala 27:72]
+    node _T_1310 = or(_T_1309, _T_1307) @[Mux.scala 27:72]
+    wire _T_1311 : UInt<4> @[Mux.scala 27:72]
+    _T_1311 <= _T_1310 @[Mux.scala 27:72]
+    node _T_1312 = cat(_T_1311, UInt<4>("h00")) @[Cat.scala 29:58]
+    node _T_1313 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1314 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1315 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1316 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1317 = mux(_T_1313, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1318 = mux(_T_1314, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1319 = mux(_T_1315, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1320 = mux(_T_1316, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1321 = or(_T_1317, _T_1318) @[Mux.scala 27:72]
+    node _T_1322 = or(_T_1321, _T_1319) @[Mux.scala 27:72]
+    node _T_1323 = or(_T_1322, _T_1320) @[Mux.scala 27:72]
+    wire _T_1324 : UInt<4> @[Mux.scala 27:72]
+    _T_1324 <= _T_1323 @[Mux.scala 27:72]
+    node _T_1325 = cat(UInt<4>("h00"), _T_1324) @[Cat.scala 29:58]
+    node _T_1326 = mux(_T_1299, _T_1312, _T_1325) @[el2_lsu_bus_buffer.scala 355:8]
+    node obuf_byteen0_in = mux(ibuf_buf_byp, _T_1285, _T_1326) @[el2_lsu_bus_buffer.scala 354:28]
+    node _T_1327 = bits(io.end_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 356:60]
+    node _T_1328 = cat(ldst_byteen_hi_r, UInt<4>("h00")) @[Cat.scala 29:58]
+    node _T_1329 = cat(UInt<4>("h00"), ldst_byteen_hi_r) @[Cat.scala 29:58]
+    node _T_1330 = mux(_T_1327, _T_1328, _T_1329) @[el2_lsu_bus_buffer.scala 356:46]
+    node _T_1331 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1332 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1333 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1334 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1335 = mux(_T_1331, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1336 = mux(_T_1332, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1337 = mux(_T_1333, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1338 = mux(_T_1334, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1339 = or(_T_1335, _T_1336) @[Mux.scala 27:72]
+    node _T_1340 = or(_T_1339, _T_1337) @[Mux.scala 27:72]
+    node _T_1341 = or(_T_1340, _T_1338) @[Mux.scala 27:72]
+    wire _T_1342 : UInt<32> @[Mux.scala 27:72]
+    _T_1342 <= _T_1341 @[Mux.scala 27:72]
+    node _T_1343 = bits(_T_1342, 2, 2) @[el2_lsu_bus_buffer.scala 357:36]
+    node _T_1344 = bits(_T_1343, 0, 0) @[el2_lsu_bus_buffer.scala 357:46]
+    node _T_1345 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1346 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1347 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1348 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1349 = mux(_T_1345, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1350 = mux(_T_1346, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1351 = mux(_T_1347, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1352 = mux(_T_1348, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1353 = or(_T_1349, _T_1350) @[Mux.scala 27:72]
+    node _T_1354 = or(_T_1353, _T_1351) @[Mux.scala 27:72]
+    node _T_1355 = or(_T_1354, _T_1352) @[Mux.scala 27:72]
+    wire _T_1356 : UInt<4> @[Mux.scala 27:72]
+    _T_1356 <= _T_1355 @[Mux.scala 27:72]
+    node _T_1357 = cat(_T_1356, UInt<4>("h00")) @[Cat.scala 29:58]
+    node _T_1358 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1359 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1360 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1361 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1362 = mux(_T_1358, buf_byteen[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1363 = mux(_T_1359, buf_byteen[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1364 = mux(_T_1360, buf_byteen[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1365 = mux(_T_1361, buf_byteen[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1366 = or(_T_1362, _T_1363) @[Mux.scala 27:72]
+    node _T_1367 = or(_T_1366, _T_1364) @[Mux.scala 27:72]
+    node _T_1368 = or(_T_1367, _T_1365) @[Mux.scala 27:72]
+    wire _T_1369 : UInt<4> @[Mux.scala 27:72]
+    _T_1369 <= _T_1368 @[Mux.scala 27:72]
+    node _T_1370 = cat(UInt<4>("h00"), _T_1369) @[Cat.scala 29:58]
+    node _T_1371 = mux(_T_1344, _T_1357, _T_1370) @[el2_lsu_bus_buffer.scala 357:8]
+    node obuf_byteen1_in = mux(ibuf_buf_byp, _T_1330, _T_1371) @[el2_lsu_bus_buffer.scala 356:28]
+    node _T_1372 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 359:58]
+    node _T_1373 = cat(store_data_lo_r, UInt<32>("h00")) @[Cat.scala 29:58]
+    node _T_1374 = cat(UInt<32>("h00"), store_data_lo_r) @[Cat.scala 29:58]
+    node _T_1375 = mux(_T_1372, _T_1373, _T_1374) @[el2_lsu_bus_buffer.scala 359:44]
+    node _T_1376 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1377 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1378 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1379 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1380 = mux(_T_1376, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1381 = mux(_T_1377, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1382 = mux(_T_1378, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1383 = mux(_T_1379, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1384 = or(_T_1380, _T_1381) @[Mux.scala 27:72]
+    node _T_1385 = or(_T_1384, _T_1382) @[Mux.scala 27:72]
+    node _T_1386 = or(_T_1385, _T_1383) @[Mux.scala 27:72]
+    wire _T_1387 : UInt<32> @[Mux.scala 27:72]
+    _T_1387 <= _T_1386 @[Mux.scala 27:72]
+    node _T_1388 = bits(_T_1387, 2, 2) @[el2_lsu_bus_buffer.scala 360:36]
+    node _T_1389 = bits(_T_1388, 0, 0) @[el2_lsu_bus_buffer.scala 360:46]
+    node _T_1390 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1391 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1392 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1393 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1394 = mux(_T_1390, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1395 = mux(_T_1391, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1396 = mux(_T_1392, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1397 = mux(_T_1393, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1398 = or(_T_1394, _T_1395) @[Mux.scala 27:72]
+    node _T_1399 = or(_T_1398, _T_1396) @[Mux.scala 27:72]
+    node _T_1400 = or(_T_1399, _T_1397) @[Mux.scala 27:72]
+    wire _T_1401 : UInt<32> @[Mux.scala 27:72]
+    _T_1401 <= _T_1400 @[Mux.scala 27:72]
+    node _T_1402 = cat(_T_1401, UInt<32>("h00")) @[Cat.scala 29:58]
+    node _T_1403 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1404 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1405 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1406 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1407 = mux(_T_1403, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1408 = mux(_T_1404, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1409 = mux(_T_1405, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1410 = mux(_T_1406, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1411 = or(_T_1407, _T_1408) @[Mux.scala 27:72]
+    node _T_1412 = or(_T_1411, _T_1409) @[Mux.scala 27:72]
+    node _T_1413 = or(_T_1412, _T_1410) @[Mux.scala 27:72]
+    wire _T_1414 : UInt<32> @[Mux.scala 27:72]
+    _T_1414 <= _T_1413 @[Mux.scala 27:72]
+    node _T_1415 = cat(UInt<32>("h00"), _T_1414) @[Cat.scala 29:58]
+    node _T_1416 = mux(_T_1389, _T_1402, _T_1415) @[el2_lsu_bus_buffer.scala 360:8]
+    node obuf_data0_in = mux(ibuf_buf_byp, _T_1375, _T_1416) @[el2_lsu_bus_buffer.scala 359:26]
+    node _T_1417 = bits(io.lsu_addr_r, 2, 2) @[el2_lsu_bus_buffer.scala 361:58]
+    node _T_1418 = cat(store_data_hi_r, UInt<32>("h00")) @[Cat.scala 29:58]
+    node _T_1419 = cat(UInt<32>("h00"), store_data_hi_r) @[Cat.scala 29:58]
+    node _T_1420 = mux(_T_1417, _T_1418, _T_1419) @[el2_lsu_bus_buffer.scala 361:44]
+    node _T_1421 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1422 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1423 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1424 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1425 = mux(_T_1421, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1426 = mux(_T_1422, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1427 = mux(_T_1423, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1428 = mux(_T_1424, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1429 = or(_T_1425, _T_1426) @[Mux.scala 27:72]
+    node _T_1430 = or(_T_1429, _T_1427) @[Mux.scala 27:72]
+    node _T_1431 = or(_T_1430, _T_1428) @[Mux.scala 27:72]
+    wire _T_1432 : UInt<32> @[Mux.scala 27:72]
+    _T_1432 <= _T_1431 @[Mux.scala 27:72]
+    node _T_1433 = bits(_T_1432, 2, 2) @[el2_lsu_bus_buffer.scala 362:36]
+    node _T_1434 = bits(_T_1433, 0, 0) @[el2_lsu_bus_buffer.scala 362:46]
+    node _T_1435 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1436 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1437 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1438 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1439 = mux(_T_1435, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1440 = mux(_T_1436, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1441 = mux(_T_1437, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1442 = mux(_T_1438, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1443 = or(_T_1439, _T_1440) @[Mux.scala 27:72]
+    node _T_1444 = or(_T_1443, _T_1441) @[Mux.scala 27:72]
+    node _T_1445 = or(_T_1444, _T_1442) @[Mux.scala 27:72]
+    wire _T_1446 : UInt<32> @[Mux.scala 27:72]
+    _T_1446 <= _T_1445 @[Mux.scala 27:72]
+    node _T_1447 = cat(_T_1446, UInt<32>("h00")) @[Cat.scala 29:58]
+    node _T_1448 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1449 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1450 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1451 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1452 = mux(_T_1448, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1453 = mux(_T_1449, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1454 = mux(_T_1450, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1455 = mux(_T_1451, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1456 = or(_T_1452, _T_1453) @[Mux.scala 27:72]
+    node _T_1457 = or(_T_1456, _T_1454) @[Mux.scala 27:72]
+    node _T_1458 = or(_T_1457, _T_1455) @[Mux.scala 27:72]
+    wire _T_1459 : UInt<32> @[Mux.scala 27:72]
+    _T_1459 <= _T_1458 @[Mux.scala 27:72]
+    node _T_1460 = cat(UInt<32>("h00"), _T_1459) @[Cat.scala 29:58]
+    node _T_1461 = mux(_T_1434, _T_1447, _T_1460) @[el2_lsu_bus_buffer.scala 362:8]
+    node obuf_data1_in = mux(ibuf_buf_byp, _T_1420, _T_1461) @[el2_lsu_bus_buffer.scala 361:26]
+    node _T_1462 = bits(obuf_byteen0_in, 0, 0) @[el2_lsu_bus_buffer.scala 363:59]
+    node _T_1463 = bits(obuf_byteen1_in, 0, 0) @[el2_lsu_bus_buffer.scala 363:97]
+    node _T_1464 = and(obuf_merge_en, _T_1463) @[el2_lsu_bus_buffer.scala 363:80]
+    node _T_1465 = or(_T_1462, _T_1464) @[el2_lsu_bus_buffer.scala 363:63]
+    node _T_1466 = bits(obuf_byteen0_in, 1, 1) @[el2_lsu_bus_buffer.scala 363:59]
+    node _T_1467 = bits(obuf_byteen1_in, 1, 1) @[el2_lsu_bus_buffer.scala 363:97]
+    node _T_1468 = and(obuf_merge_en, _T_1467) @[el2_lsu_bus_buffer.scala 363:80]
+    node _T_1469 = or(_T_1466, _T_1468) @[el2_lsu_bus_buffer.scala 363:63]
+    node _T_1470 = bits(obuf_byteen0_in, 2, 2) @[el2_lsu_bus_buffer.scala 363:59]
+    node _T_1471 = bits(obuf_byteen1_in, 2, 2) @[el2_lsu_bus_buffer.scala 363:97]
+    node _T_1472 = and(obuf_merge_en, _T_1471) @[el2_lsu_bus_buffer.scala 363:80]
+    node _T_1473 = or(_T_1470, _T_1472) @[el2_lsu_bus_buffer.scala 363:63]
+    node _T_1474 = bits(obuf_byteen0_in, 3, 3) @[el2_lsu_bus_buffer.scala 363:59]
+    node _T_1475 = bits(obuf_byteen1_in, 3, 3) @[el2_lsu_bus_buffer.scala 363:97]
+    node _T_1476 = and(obuf_merge_en, _T_1475) @[el2_lsu_bus_buffer.scala 363:80]
+    node _T_1477 = or(_T_1474, _T_1476) @[el2_lsu_bus_buffer.scala 363:63]
+    node _T_1478 = bits(obuf_byteen0_in, 4, 4) @[el2_lsu_bus_buffer.scala 363:59]
+    node _T_1479 = bits(obuf_byteen1_in, 4, 4) @[el2_lsu_bus_buffer.scala 363:97]
+    node _T_1480 = and(obuf_merge_en, _T_1479) @[el2_lsu_bus_buffer.scala 363:80]
+    node _T_1481 = or(_T_1478, _T_1480) @[el2_lsu_bus_buffer.scala 363:63]
+    node _T_1482 = bits(obuf_byteen0_in, 5, 5) @[el2_lsu_bus_buffer.scala 363:59]
+    node _T_1483 = bits(obuf_byteen1_in, 5, 5) @[el2_lsu_bus_buffer.scala 363:97]
+    node _T_1484 = and(obuf_merge_en, _T_1483) @[el2_lsu_bus_buffer.scala 363:80]
+    node _T_1485 = or(_T_1482, _T_1484) @[el2_lsu_bus_buffer.scala 363:63]
+    node _T_1486 = bits(obuf_byteen0_in, 6, 6) @[el2_lsu_bus_buffer.scala 363:59]
+    node _T_1487 = bits(obuf_byteen1_in, 6, 6) @[el2_lsu_bus_buffer.scala 363:97]
+    node _T_1488 = and(obuf_merge_en, _T_1487) @[el2_lsu_bus_buffer.scala 363:80]
+    node _T_1489 = or(_T_1486, _T_1488) @[el2_lsu_bus_buffer.scala 363:63]
+    node _T_1490 = bits(obuf_byteen0_in, 7, 7) @[el2_lsu_bus_buffer.scala 363:59]
+    node _T_1491 = bits(obuf_byteen1_in, 7, 7) @[el2_lsu_bus_buffer.scala 363:97]
+    node _T_1492 = and(obuf_merge_en, _T_1491) @[el2_lsu_bus_buffer.scala 363:80]
+    node _T_1493 = or(_T_1490, _T_1492) @[el2_lsu_bus_buffer.scala 363:63]
+    node _T_1494 = cat(_T_1493, _T_1489) @[Cat.scala 29:58]
+    node _T_1495 = cat(_T_1494, _T_1485) @[Cat.scala 29:58]
+    node _T_1496 = cat(_T_1495, _T_1481) @[Cat.scala 29:58]
+    node _T_1497 = cat(_T_1496, _T_1477) @[Cat.scala 29:58]
+    node _T_1498 = cat(_T_1497, _T_1473) @[Cat.scala 29:58]
+    node _T_1499 = cat(_T_1498, _T_1469) @[Cat.scala 29:58]
+    node obuf_byteen_in = cat(_T_1499, _T_1465) @[Cat.scala 29:58]
+    node _T_1500 = bits(obuf_byteen1_in, 0, 0) @[el2_lsu_bus_buffer.scala 364:76]
+    node _T_1501 = and(obuf_merge_en, _T_1500) @[el2_lsu_bus_buffer.scala 364:59]
+    node _T_1502 = bits(obuf_data1_in, 7, 0) @[el2_lsu_bus_buffer.scala 364:94]
+    node _T_1503 = bits(obuf_data1_in, 7, 0) @[el2_lsu_bus_buffer.scala 364:123]
+    node _T_1504 = mux(_T_1501, _T_1502, _T_1503) @[el2_lsu_bus_buffer.scala 364:44]
+    node _T_1505 = bits(obuf_byteen1_in, 1, 1) @[el2_lsu_bus_buffer.scala 364:76]
+    node _T_1506 = and(obuf_merge_en, _T_1505) @[el2_lsu_bus_buffer.scala 364:59]
+    node _T_1507 = bits(obuf_data1_in, 15, 8) @[el2_lsu_bus_buffer.scala 364:94]
+    node _T_1508 = bits(obuf_data1_in, 15, 8) @[el2_lsu_bus_buffer.scala 364:123]
+    node _T_1509 = mux(_T_1506, _T_1507, _T_1508) @[el2_lsu_bus_buffer.scala 364:44]
+    node _T_1510 = bits(obuf_byteen1_in, 2, 2) @[el2_lsu_bus_buffer.scala 364:76]
+    node _T_1511 = and(obuf_merge_en, _T_1510) @[el2_lsu_bus_buffer.scala 364:59]
+    node _T_1512 = bits(obuf_data1_in, 23, 16) @[el2_lsu_bus_buffer.scala 364:94]
+    node _T_1513 = bits(obuf_data1_in, 23, 16) @[el2_lsu_bus_buffer.scala 364:123]
+    node _T_1514 = mux(_T_1511, _T_1512, _T_1513) @[el2_lsu_bus_buffer.scala 364:44]
+    node _T_1515 = bits(obuf_byteen1_in, 3, 3) @[el2_lsu_bus_buffer.scala 364:76]
+    node _T_1516 = and(obuf_merge_en, _T_1515) @[el2_lsu_bus_buffer.scala 364:59]
+    node _T_1517 = bits(obuf_data1_in, 31, 24) @[el2_lsu_bus_buffer.scala 364:94]
+    node _T_1518 = bits(obuf_data1_in, 31, 24) @[el2_lsu_bus_buffer.scala 364:123]
+    node _T_1519 = mux(_T_1516, _T_1517, _T_1518) @[el2_lsu_bus_buffer.scala 364:44]
+    node _T_1520 = bits(obuf_byteen1_in, 4, 4) @[el2_lsu_bus_buffer.scala 364:76]
+    node _T_1521 = and(obuf_merge_en, _T_1520) @[el2_lsu_bus_buffer.scala 364:59]
+    node _T_1522 = bits(obuf_data1_in, 39, 32) @[el2_lsu_bus_buffer.scala 364:94]
+    node _T_1523 = bits(obuf_data1_in, 39, 32) @[el2_lsu_bus_buffer.scala 364:123]
+    node _T_1524 = mux(_T_1521, _T_1522, _T_1523) @[el2_lsu_bus_buffer.scala 364:44]
+    node _T_1525 = bits(obuf_byteen1_in, 5, 5) @[el2_lsu_bus_buffer.scala 364:76]
+    node _T_1526 = and(obuf_merge_en, _T_1525) @[el2_lsu_bus_buffer.scala 364:59]
+    node _T_1527 = bits(obuf_data1_in, 47, 40) @[el2_lsu_bus_buffer.scala 364:94]
+    node _T_1528 = bits(obuf_data1_in, 47, 40) @[el2_lsu_bus_buffer.scala 364:123]
+    node _T_1529 = mux(_T_1526, _T_1527, _T_1528) @[el2_lsu_bus_buffer.scala 364:44]
+    node _T_1530 = bits(obuf_byteen1_in, 6, 6) @[el2_lsu_bus_buffer.scala 364:76]
+    node _T_1531 = and(obuf_merge_en, _T_1530) @[el2_lsu_bus_buffer.scala 364:59]
+    node _T_1532 = bits(obuf_data1_in, 55, 48) @[el2_lsu_bus_buffer.scala 364:94]
+    node _T_1533 = bits(obuf_data1_in, 55, 48) @[el2_lsu_bus_buffer.scala 364:123]
+    node _T_1534 = mux(_T_1531, _T_1532, _T_1533) @[el2_lsu_bus_buffer.scala 364:44]
+    node _T_1535 = bits(obuf_byteen1_in, 7, 7) @[el2_lsu_bus_buffer.scala 364:76]
+    node _T_1536 = and(obuf_merge_en, _T_1535) @[el2_lsu_bus_buffer.scala 364:59]
+    node _T_1537 = bits(obuf_data1_in, 63, 56) @[el2_lsu_bus_buffer.scala 364:94]
+    node _T_1538 = bits(obuf_data1_in, 63, 56) @[el2_lsu_bus_buffer.scala 364:123]
+    node _T_1539 = mux(_T_1536, _T_1537, _T_1538) @[el2_lsu_bus_buffer.scala 364:44]
+    node _T_1540 = cat(_T_1539, _T_1534) @[Cat.scala 29:58]
+    node _T_1541 = cat(_T_1540, _T_1529) @[Cat.scala 29:58]
+    node _T_1542 = cat(_T_1541, _T_1524) @[Cat.scala 29:58]
+    node _T_1543 = cat(_T_1542, _T_1519) @[Cat.scala 29:58]
+    node _T_1544 = cat(_T_1543, _T_1514) @[Cat.scala 29:58]
+    node _T_1545 = cat(_T_1544, _T_1509) @[Cat.scala 29:58]
+    node obuf_data_in = cat(_T_1545, _T_1504) @[Cat.scala 29:58]
+    wire buf_dualhi : UInt<1>[4] @[el2_lsu_bus_buffer.scala 365:24]
+    buf_dualhi[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 366:14]
+    buf_dualhi[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 366:14]
+    buf_dualhi[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 366:14]
+    buf_dualhi[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 366:14]
+    node _T_1546 = neq(Cmdptr0, Cmdptr1) @[el2_lsu_bus_buffer.scala 367:30]
+    node _T_1547 = and(_T_1546, found_cmdptr0) @[el2_lsu_bus_buffer.scala 367:43]
+    node _T_1548 = and(_T_1547, found_cmdptr1) @[el2_lsu_bus_buffer.scala 367:59]
+    node _T_1549 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1550 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1551 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1552 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1553 = mux(_T_1549, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1554 = mux(_T_1550, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1555 = mux(_T_1551, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1556 = mux(_T_1552, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1557 = or(_T_1553, _T_1554) @[Mux.scala 27:72]
+    node _T_1558 = or(_T_1557, _T_1555) @[Mux.scala 27:72]
+    node _T_1559 = or(_T_1558, _T_1556) @[Mux.scala 27:72]
+    wire _T_1560 : UInt<3> @[Mux.scala 27:72]
+    _T_1560 <= _T_1559 @[Mux.scala 27:72]
+    node _T_1561 = eq(_T_1560, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 367:107]
+    node _T_1562 = and(_T_1548, _T_1561) @[el2_lsu_bus_buffer.scala 367:75]
+    node _T_1563 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1564 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1565 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1566 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1567 = mux(_T_1563, buf_state[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1568 = mux(_T_1564, buf_state[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1569 = mux(_T_1565, buf_state[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1570 = mux(_T_1566, buf_state[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1571 = or(_T_1567, _T_1568) @[Mux.scala 27:72]
+    node _T_1572 = or(_T_1571, _T_1569) @[Mux.scala 27:72]
+    node _T_1573 = or(_T_1572, _T_1570) @[Mux.scala 27:72]
+    wire _T_1574 : UInt<3> @[Mux.scala 27:72]
+    _T_1574 <= _T_1573 @[Mux.scala 27:72]
+    node _T_1575 = eq(_T_1574, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 367:150]
+    node _T_1576 = and(_T_1562, _T_1575) @[el2_lsu_bus_buffer.scala 367:118]
+    node _T_1577 = cat(buf_cmd_state_bus_en[3], buf_cmd_state_bus_en[2]) @[Cat.scala 29:58]
+    node _T_1578 = cat(_T_1577, buf_cmd_state_bus_en[1]) @[Cat.scala 29:58]
+    node _T_1579 = cat(_T_1578, buf_cmd_state_bus_en[0]) @[Cat.scala 29:58]
+    node _T_1580 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1581 = bits(_T_1579, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1582 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1583 = bits(_T_1579, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1584 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1585 = bits(_T_1579, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1586 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1587 = bits(_T_1579, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1588 = mux(_T_1580, _T_1581, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1589 = mux(_T_1582, _T_1583, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1590 = mux(_T_1584, _T_1585, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1591 = mux(_T_1586, _T_1587, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1592 = or(_T_1588, _T_1589) @[Mux.scala 27:72]
+    node _T_1593 = or(_T_1592, _T_1590) @[Mux.scala 27:72]
+    node _T_1594 = or(_T_1593, _T_1591) @[Mux.scala 27:72]
+    wire _T_1595 : UInt<1> @[Mux.scala 27:72]
+    _T_1595 <= _T_1594 @[Mux.scala 27:72]
+    node _T_1596 = eq(_T_1595, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 368:3]
+    node _T_1597 = and(_T_1576, _T_1596) @[el2_lsu_bus_buffer.scala 367:161]
+    node _T_1598 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1599 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1600 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1601 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1602 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1603 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1604 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1605 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1606 = mux(_T_1598, _T_1599, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1607 = mux(_T_1600, _T_1601, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1608 = mux(_T_1602, _T_1603, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1609 = mux(_T_1604, _T_1605, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1610 = or(_T_1606, _T_1607) @[Mux.scala 27:72]
+    node _T_1611 = or(_T_1610, _T_1608) @[Mux.scala 27:72]
+    node _T_1612 = or(_T_1611, _T_1609) @[Mux.scala 27:72]
+    wire _T_1613 : UInt<1> @[Mux.scala 27:72]
+    _T_1613 <= _T_1612 @[Mux.scala 27:72]
+    node _T_1614 = eq(_T_1613, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 368:85]
+    node _T_1615 = and(_T_1597, _T_1614) @[el2_lsu_bus_buffer.scala 368:83]
+    node _T_1616 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1617 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1618 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1619 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1620 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1621 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1622 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1623 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1624 = mux(_T_1616, _T_1617, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1625 = mux(_T_1618, _T_1619, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1626 = mux(_T_1620, _T_1621, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1627 = mux(_T_1622, _T_1623, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1628 = or(_T_1624, _T_1625) @[Mux.scala 27:72]
+    node _T_1629 = or(_T_1628, _T_1626) @[Mux.scala 27:72]
+    node _T_1630 = or(_T_1629, _T_1627) @[Mux.scala 27:72]
+    wire _T_1631 : UInt<1> @[Mux.scala 27:72]
+    _T_1631 <= _T_1630 @[Mux.scala 27:72]
+    node _T_1632 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1633 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1634 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1635 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1636 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1637 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1638 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1639 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1640 = mux(_T_1632, _T_1633, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1641 = mux(_T_1634, _T_1635, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1642 = mux(_T_1636, _T_1637, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1643 = mux(_T_1638, _T_1639, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1644 = or(_T_1640, _T_1641) @[Mux.scala 27:72]
+    node _T_1645 = or(_T_1644, _T_1642) @[Mux.scala 27:72]
+    node _T_1646 = or(_T_1645, _T_1643) @[Mux.scala 27:72]
+    wire _T_1647 : UInt<1> @[Mux.scala 27:72]
+    _T_1647 <= _T_1646 @[Mux.scala 27:72]
+    node _T_1648 = and(_T_1631, _T_1647) @[el2_lsu_bus_buffer.scala 369:36]
+    node _T_1649 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1650 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1651 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1652 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1653 = mux(_T_1649, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1654 = mux(_T_1650, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1655 = mux(_T_1651, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1656 = mux(_T_1652, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1657 = or(_T_1653, _T_1654) @[Mux.scala 27:72]
+    node _T_1658 = or(_T_1657, _T_1655) @[Mux.scala 27:72]
+    node _T_1659 = or(_T_1658, _T_1656) @[Mux.scala 27:72]
+    wire _T_1660 : UInt<32> @[Mux.scala 27:72]
+    _T_1660 <= _T_1659 @[Mux.scala 27:72]
+    node _T_1661 = bits(_T_1660, 31, 3) @[el2_lsu_bus_buffer.scala 370:33]
+    node _T_1662 = eq(Cmdptr1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1663 = eq(Cmdptr1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1664 = eq(Cmdptr1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1665 = eq(Cmdptr1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_1666 = mux(_T_1662, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1667 = mux(_T_1663, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1668 = mux(_T_1664, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1669 = mux(_T_1665, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1670 = or(_T_1666, _T_1667) @[Mux.scala 27:72]
+    node _T_1671 = or(_T_1670, _T_1668) @[Mux.scala 27:72]
+    node _T_1672 = or(_T_1671, _T_1669) @[Mux.scala 27:72]
+    wire _T_1673 : UInt<32> @[Mux.scala 27:72]
+    _T_1673 <= _T_1672 @[Mux.scala 27:72]
+    node _T_1674 = bits(_T_1673, 31, 3) @[el2_lsu_bus_buffer.scala 370:69]
+    node _T_1675 = eq(_T_1661, _T_1674) @[el2_lsu_bus_buffer.scala 370:39]
+    node _T_1676 = and(_T_1648, _T_1675) @[el2_lsu_bus_buffer.scala 369:67]
+    node _T_1677 = eq(bus_coalescing_disable, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 370:79]
+    node _T_1678 = and(_T_1676, _T_1677) @[el2_lsu_bus_buffer.scala 370:77]
+    node _T_1679 = eq(UInt<1>("h01"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 370:105]
+    node _T_1680 = and(_T_1678, _T_1679) @[el2_lsu_bus_buffer.scala 370:103]
+    node _T_1681 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1682 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1683 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1684 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1685 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1686 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1687 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1688 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1689 = mux(_T_1681, _T_1682, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1690 = mux(_T_1683, _T_1684, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1691 = mux(_T_1685, _T_1686, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1692 = mux(_T_1687, _T_1688, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1693 = or(_T_1689, _T_1690) @[Mux.scala 27:72]
+    node _T_1694 = or(_T_1693, _T_1691) @[Mux.scala 27:72]
+    node _T_1695 = or(_T_1694, _T_1692) @[Mux.scala 27:72]
+    wire _T_1696 : UInt<1> @[Mux.scala 27:72]
+    _T_1696 <= _T_1695 @[Mux.scala 27:72]
+    node _T_1697 = eq(_T_1696, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 371:6]
+    node _T_1698 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58]
+    node _T_1699 = cat(_T_1698, buf_dual[1]) @[Cat.scala 29:58]
+    node _T_1700 = cat(_T_1699, buf_dual[0]) @[Cat.scala 29:58]
+    node _T_1701 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1702 = bits(_T_1700, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1703 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1704 = bits(_T_1700, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1705 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1706 = bits(_T_1700, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1707 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1708 = bits(_T_1700, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1709 = mux(_T_1701, _T_1702, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1710 = mux(_T_1703, _T_1704, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1711 = mux(_T_1705, _T_1706, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1712 = mux(_T_1707, _T_1708, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1713 = or(_T_1709, _T_1710) @[Mux.scala 27:72]
+    node _T_1714 = or(_T_1713, _T_1711) @[Mux.scala 27:72]
+    node _T_1715 = or(_T_1714, _T_1712) @[Mux.scala 27:72]
+    wire _T_1716 : UInt<1> @[Mux.scala 27:72]
+    _T_1716 <= _T_1715 @[Mux.scala 27:72]
+    node _T_1717 = and(_T_1697, _T_1716) @[el2_lsu_bus_buffer.scala 371:36]
+    node _T_1718 = cat(buf_dualhi[3], buf_dualhi[2]) @[Cat.scala 29:58]
+    node _T_1719 = cat(_T_1718, buf_dualhi[1]) @[Cat.scala 29:58]
+    node _T_1720 = cat(_T_1719, buf_dualhi[0]) @[Cat.scala 29:58]
+    node _T_1721 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1722 = bits(_T_1720, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1723 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1724 = bits(_T_1720, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1725 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1726 = bits(_T_1720, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1727 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1728 = bits(_T_1720, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1729 = mux(_T_1721, _T_1722, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1730 = mux(_T_1723, _T_1724, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1731 = mux(_T_1725, _T_1726, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1732 = mux(_T_1727, _T_1728, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1733 = or(_T_1729, _T_1730) @[Mux.scala 27:72]
+    node _T_1734 = or(_T_1733, _T_1731) @[Mux.scala 27:72]
+    node _T_1735 = or(_T_1734, _T_1732) @[Mux.scala 27:72]
+    wire _T_1736 : UInt<1> @[Mux.scala 27:72]
+    _T_1736 <= _T_1735 @[Mux.scala 27:72]
+    node _T_1737 = eq(_T_1736, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 371:107]
+    node _T_1738 = and(_T_1717, _T_1737) @[el2_lsu_bus_buffer.scala 371:105]
+    node _T_1739 = cat(buf_samedw[3], buf_samedw[2]) @[Cat.scala 29:58]
+    node _T_1740 = cat(_T_1739, buf_samedw[1]) @[Cat.scala 29:58]
+    node _T_1741 = cat(_T_1740, buf_samedw[0]) @[Cat.scala 29:58]
+    node _T_1742 = eq(Cmdptr0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1743 = bits(_T_1741, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1744 = eq(Cmdptr0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1745 = bits(_T_1741, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1746 = eq(Cmdptr0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1747 = bits(_T_1741, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1748 = eq(Cmdptr0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_1749 = bits(_T_1741, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_1750 = mux(_T_1742, _T_1743, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1751 = mux(_T_1744, _T_1745, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1752 = mux(_T_1746, _T_1747, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1753 = mux(_T_1748, _T_1749, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1754 = or(_T_1750, _T_1751) @[Mux.scala 27:72]
+    node _T_1755 = or(_T_1754, _T_1752) @[Mux.scala 27:72]
+    node _T_1756 = or(_T_1755, _T_1753) @[Mux.scala 27:72]
+    wire _T_1757 : UInt<1> @[Mux.scala 27:72]
+    _T_1757 <= _T_1756 @[Mux.scala 27:72]
+    node _T_1758 = and(_T_1738, _T_1757) @[el2_lsu_bus_buffer.scala 371:177]
+    node _T_1759 = or(_T_1680, _T_1758) @[el2_lsu_bus_buffer.scala 370:126]
+    node _T_1760 = and(_T_1615, _T_1759) @[el2_lsu_bus_buffer.scala 368:120]
+    node _T_1761 = and(ibuf_buf_byp, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 372:19]
+    node _T_1762 = and(_T_1761, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 372:35]
+    node _T_1763 = or(_T_1760, _T_1762) @[el2_lsu_bus_buffer.scala 371:251]
+    obuf_merge_en <= _T_1763 @[el2_lsu_bus_buffer.scala 367:17]
+    reg obuf_wr_enQ : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 374:55]
+    obuf_wr_enQ <= obuf_wr_en @[el2_lsu_bus_buffer.scala 374:55]
+    node _T_1764 = mux(obuf_wr_en, UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 375:55]
+    node _T_1765 = and(_T_1764, obuf_rst) @[el2_lsu_bus_buffer.scala 375:88]
+    reg _T_1766 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 375:51]
+    _T_1766 <= _T_1765 @[el2_lsu_bus_buffer.scala 375:51]
+    obuf_valid <= _T_1766 @[el2_lsu_bus_buffer.scala 375:14]
+    reg _T_1767 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when obuf_wr_en : @[Reg.scala 28:19]
+      _T_1767 <= obuf_nosend_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    obuf_nosend <= _T_1767 @[el2_lsu_bus_buffer.scala 376:15]
+    reg _T_1768 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 377:54]
+    _T_1768 <= obuf_cmd_done_in @[el2_lsu_bus_buffer.scala 377:54]
+    obuf_cmd_done <= _T_1768 @[el2_lsu_bus_buffer.scala 377:17]
+    reg _T_1769 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 378:55]
+    _T_1769 <= obuf_data_done_in @[el2_lsu_bus_buffer.scala 378:55]
+    obuf_data_done <= _T_1769 @[el2_lsu_bus_buffer.scala 378:18]
+    reg _T_1770 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 379:56]
+    _T_1770 <= obuf_rdrsp_pend_in @[el2_lsu_bus_buffer.scala 379:56]
+    obuf_rdrsp_pend <= _T_1770 @[el2_lsu_bus_buffer.scala 379:19]
+    reg _T_1771 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 380:55]
+    _T_1771 <= obuf_rdrsp_tag_in @[el2_lsu_bus_buffer.scala 380:55]
+    obuf_rdrsp_tag <= _T_1771 @[el2_lsu_bus_buffer.scala 380:18]
+    reg _T_1772 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when obuf_wr_en : @[Reg.scala 28:19]
+      _T_1772 <= obuf_tag0_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    obuf_tag0 <= _T_1772 @[el2_lsu_bus_buffer.scala 381:13]
+    reg obuf_tag1 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when obuf_wr_en : @[Reg.scala 28:19]
+      obuf_tag1 <= obuf_tag1_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    reg obuf_merge : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when obuf_wr_en : @[Reg.scala 28:19]
+      obuf_merge <= obuf_merge_en @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    reg _T_1773 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when obuf_wr_en : @[Reg.scala 28:19]
+      _T_1773 <= obuf_write_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    obuf_write <= _T_1773 @[el2_lsu_bus_buffer.scala 384:14]
+    reg _T_1774 : UInt<1>, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when obuf_wr_en : @[Reg.scala 28:19]
+      _T_1774 <= obuf_sideeffect_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    obuf_sideeffect <= _T_1774 @[el2_lsu_bus_buffer.scala 385:19]
+    reg obuf_sz : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when obuf_wr_en : @[Reg.scala 28:19]
+      obuf_sz <= obuf_sz_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    inst rvclkhdr_2 of rvclkhdr_2 @[el2_lib.scala 472:23]
+    rvclkhdr_2.clock <= clock
+    rvclkhdr_2.reset <= reset
+    rvclkhdr_2.io.clk <= io.lsu_busm_clk @[el2_lib.scala 474:18]
+    rvclkhdr_2.io.en <= obuf_wr_en @[el2_lib.scala 475:17]
+    rvclkhdr_2.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_1775 : UInt, rvclkhdr_2.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_1775 <= obuf_addr_in @[el2_lib.scala 478:16]
+    obuf_addr <= _T_1775 @[el2_lsu_bus_buffer.scala 387:13]
+    reg obuf_byteen : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when obuf_wr_en : @[Reg.scala 28:19]
+      obuf_byteen <= obuf_byteen_in @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    inst rvclkhdr_3 of rvclkhdr_3 @[el2_lib.scala 472:23]
+    rvclkhdr_3.clock <= clock
+    rvclkhdr_3.reset <= reset
+    rvclkhdr_3.io.clk <= io.lsu_busm_clk @[el2_lib.scala 474:18]
+    rvclkhdr_3.io.en <= obuf_wr_en @[el2_lib.scala 475:17]
+    rvclkhdr_3.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg obuf_data : UInt, rvclkhdr_3.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    obuf_data <= obuf_data_in @[el2_lib.scala 478:16]
+    reg _T_1776 : UInt, io.lsu_busm_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 390:54]
+    _T_1776 <= obuf_wr_timer_in @[el2_lsu_bus_buffer.scala 390:54]
+    obuf_wr_timer <= _T_1776 @[el2_lsu_bus_buffer.scala 390:17]
+    wire WrPtr0_m : UInt<2>
+    WrPtr0_m <= UInt<1>("h00")
+    node _T_1777 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 392:59]
+    node _T_1778 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 392:97]
+    node _T_1779 = and(ibuf_valid, _T_1778) @[el2_lsu_bus_buffer.scala 392:86]
+    node _T_1780 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 393:33]
+    node _T_1781 = and(io.lsu_busreq_m, _T_1780) @[el2_lsu_bus_buffer.scala 393:22]
+    node _T_1782 = or(_T_1779, _T_1781) @[el2_lsu_bus_buffer.scala 392:106]
+    node _T_1783 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 393:72]
+    node _T_1784 = and(io.ldst_dual_r, _T_1783) @[el2_lsu_bus_buffer.scala 393:60]
+    node _T_1785 = or(_T_1782, _T_1784) @[el2_lsu_bus_buffer.scala 393:42]
+    node _T_1786 = eq(_T_1785, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 392:72]
+    node _T_1787 = and(_T_1777, _T_1786) @[el2_lsu_bus_buffer.scala 392:70]
+    node _T_1788 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 392:59]
+    node _T_1789 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 392:97]
+    node _T_1790 = and(ibuf_valid, _T_1789) @[el2_lsu_bus_buffer.scala 392:86]
+    node _T_1791 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 393:33]
+    node _T_1792 = and(io.lsu_busreq_m, _T_1791) @[el2_lsu_bus_buffer.scala 393:22]
+    node _T_1793 = or(_T_1790, _T_1792) @[el2_lsu_bus_buffer.scala 392:106]
+    node _T_1794 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 393:72]
+    node _T_1795 = and(io.ldst_dual_r, _T_1794) @[el2_lsu_bus_buffer.scala 393:60]
+    node _T_1796 = or(_T_1793, _T_1795) @[el2_lsu_bus_buffer.scala 393:42]
+    node _T_1797 = eq(_T_1796, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 392:72]
+    node _T_1798 = and(_T_1788, _T_1797) @[el2_lsu_bus_buffer.scala 392:70]
+    node _T_1799 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 392:59]
+    node _T_1800 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 392:97]
+    node _T_1801 = and(ibuf_valid, _T_1800) @[el2_lsu_bus_buffer.scala 392:86]
+    node _T_1802 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 393:33]
+    node _T_1803 = and(io.lsu_busreq_m, _T_1802) @[el2_lsu_bus_buffer.scala 393:22]
+    node _T_1804 = or(_T_1801, _T_1803) @[el2_lsu_bus_buffer.scala 392:106]
+    node _T_1805 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 393:72]
+    node _T_1806 = and(io.ldst_dual_r, _T_1805) @[el2_lsu_bus_buffer.scala 393:60]
+    node _T_1807 = or(_T_1804, _T_1806) @[el2_lsu_bus_buffer.scala 393:42]
+    node _T_1808 = eq(_T_1807, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 392:72]
+    node _T_1809 = and(_T_1799, _T_1808) @[el2_lsu_bus_buffer.scala 392:70]
+    node _T_1810 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 392:59]
+    node _T_1811 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 392:97]
+    node _T_1812 = and(ibuf_valid, _T_1811) @[el2_lsu_bus_buffer.scala 392:86]
+    node _T_1813 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 393:33]
+    node _T_1814 = and(io.lsu_busreq_m, _T_1813) @[el2_lsu_bus_buffer.scala 393:22]
+    node _T_1815 = or(_T_1812, _T_1814) @[el2_lsu_bus_buffer.scala 392:106]
+    node _T_1816 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 393:72]
+    node _T_1817 = and(io.ldst_dual_r, _T_1816) @[el2_lsu_bus_buffer.scala 393:60]
+    node _T_1818 = or(_T_1815, _T_1817) @[el2_lsu_bus_buffer.scala 393:42]
+    node _T_1819 = eq(_T_1818, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 392:72]
+    node _T_1820 = and(_T_1810, _T_1819) @[el2_lsu_bus_buffer.scala 392:70]
+    node _T_1821 = mux(_T_1820, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 98:16]
+    node _T_1822 = mux(_T_1809, UInt<2>("h02"), _T_1821) @[Mux.scala 98:16]
+    node _T_1823 = mux(_T_1798, UInt<1>("h01"), _T_1822) @[Mux.scala 98:16]
+    node _T_1824 = mux(_T_1787, UInt<1>("h00"), _T_1823) @[Mux.scala 98:16]
+    WrPtr0_m <= _T_1824 @[el2_lsu_bus_buffer.scala 394:12]
+    node _T_1825 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 395:59]
+    node _T_1826 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 395:97]
+    node _T_1827 = and(ibuf_valid, _T_1826) @[el2_lsu_bus_buffer.scala 395:86]
+    node _T_1828 = eq(WrPtr0_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 396:33]
+    node _T_1829 = and(io.lsu_busreq_m, _T_1828) @[el2_lsu_bus_buffer.scala 396:22]
+    node _T_1830 = or(_T_1827, _T_1829) @[el2_lsu_bus_buffer.scala 395:106]
+    node _T_1831 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 396:73]
+    node _T_1832 = and(io.lsu_busreq_r, _T_1831) @[el2_lsu_bus_buffer.scala 396:61]
+    node _T_1833 = or(_T_1830, _T_1832) @[el2_lsu_bus_buffer.scala 396:42]
+    node _T_1834 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 396:112]
+    node _T_1835 = and(io.ldst_dual_r, _T_1834) @[el2_lsu_bus_buffer.scala 396:101]
+    node _T_1836 = or(_T_1833, _T_1835) @[el2_lsu_bus_buffer.scala 396:83]
+    node _T_1837 = eq(_T_1836, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 395:72]
+    node _T_1838 = and(_T_1825, _T_1837) @[el2_lsu_bus_buffer.scala 395:70]
+    node _T_1839 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 395:59]
+    node _T_1840 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 395:97]
+    node _T_1841 = and(ibuf_valid, _T_1840) @[el2_lsu_bus_buffer.scala 395:86]
+    node _T_1842 = eq(WrPtr0_m, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 396:33]
+    node _T_1843 = and(io.lsu_busreq_m, _T_1842) @[el2_lsu_bus_buffer.scala 396:22]
+    node _T_1844 = or(_T_1841, _T_1843) @[el2_lsu_bus_buffer.scala 395:106]
+    node _T_1845 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 396:73]
+    node _T_1846 = and(io.lsu_busreq_r, _T_1845) @[el2_lsu_bus_buffer.scala 396:61]
+    node _T_1847 = or(_T_1844, _T_1846) @[el2_lsu_bus_buffer.scala 396:42]
+    node _T_1848 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 396:112]
+    node _T_1849 = and(io.ldst_dual_r, _T_1848) @[el2_lsu_bus_buffer.scala 396:101]
+    node _T_1850 = or(_T_1847, _T_1849) @[el2_lsu_bus_buffer.scala 396:83]
+    node _T_1851 = eq(_T_1850, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 395:72]
+    node _T_1852 = and(_T_1839, _T_1851) @[el2_lsu_bus_buffer.scala 395:70]
+    node _T_1853 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 395:59]
+    node _T_1854 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 395:97]
+    node _T_1855 = and(ibuf_valid, _T_1854) @[el2_lsu_bus_buffer.scala 395:86]
+    node _T_1856 = eq(WrPtr0_m, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 396:33]
+    node _T_1857 = and(io.lsu_busreq_m, _T_1856) @[el2_lsu_bus_buffer.scala 396:22]
+    node _T_1858 = or(_T_1855, _T_1857) @[el2_lsu_bus_buffer.scala 395:106]
+    node _T_1859 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 396:73]
+    node _T_1860 = and(io.lsu_busreq_r, _T_1859) @[el2_lsu_bus_buffer.scala 396:61]
+    node _T_1861 = or(_T_1858, _T_1860) @[el2_lsu_bus_buffer.scala 396:42]
+    node _T_1862 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 396:112]
+    node _T_1863 = and(io.ldst_dual_r, _T_1862) @[el2_lsu_bus_buffer.scala 396:101]
+    node _T_1864 = or(_T_1861, _T_1863) @[el2_lsu_bus_buffer.scala 396:83]
+    node _T_1865 = eq(_T_1864, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 395:72]
+    node _T_1866 = and(_T_1853, _T_1865) @[el2_lsu_bus_buffer.scala 395:70]
+    node _T_1867 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 395:59]
+    node _T_1868 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 395:97]
+    node _T_1869 = and(ibuf_valid, _T_1868) @[el2_lsu_bus_buffer.scala 395:86]
+    node _T_1870 = eq(WrPtr0_m, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 396:33]
+    node _T_1871 = and(io.lsu_busreq_m, _T_1870) @[el2_lsu_bus_buffer.scala 396:22]
+    node _T_1872 = or(_T_1869, _T_1871) @[el2_lsu_bus_buffer.scala 395:106]
+    node _T_1873 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 396:73]
+    node _T_1874 = and(io.lsu_busreq_r, _T_1873) @[el2_lsu_bus_buffer.scala 396:61]
+    node _T_1875 = or(_T_1872, _T_1874) @[el2_lsu_bus_buffer.scala 396:42]
+    node _T_1876 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 396:112]
+    node _T_1877 = and(io.ldst_dual_r, _T_1876) @[el2_lsu_bus_buffer.scala 396:101]
+    node _T_1878 = or(_T_1875, _T_1877) @[el2_lsu_bus_buffer.scala 396:83]
+    node _T_1879 = eq(_T_1878, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 395:72]
+    node _T_1880 = and(_T_1867, _T_1879) @[el2_lsu_bus_buffer.scala 395:70]
+    node _T_1881 = mux(_T_1880, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 98:16]
+    node _T_1882 = mux(_T_1866, UInt<2>("h02"), _T_1881) @[Mux.scala 98:16]
+    node _T_1883 = mux(_T_1852, UInt<1>("h01"), _T_1882) @[Mux.scala 98:16]
+    node WrPtr1_m = mux(_T_1838, UInt<1>("h00"), _T_1883) @[Mux.scala 98:16]
+    wire buf_age : UInt<4>[4] @[el2_lsu_bus_buffer.scala 398:21]
+    buf_age[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 399:11]
+    buf_age[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 399:11]
+    buf_age[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 399:11]
+    buf_age[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 399:11]
+    node _T_1884 = orr(buf_age[0]) @[el2_lsu_bus_buffer.scala 400:58]
+    node _T_1885 = eq(_T_1884, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 400:45]
+    node _T_1886 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 400:78]
+    node _T_1887 = and(_T_1885, _T_1886) @[el2_lsu_bus_buffer.scala 400:63]
+    node _T_1888 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 400:90]
+    node _T_1889 = and(_T_1887, _T_1888) @[el2_lsu_bus_buffer.scala 400:88]
+    node _T_1890 = orr(buf_age[1]) @[el2_lsu_bus_buffer.scala 400:58]
+    node _T_1891 = eq(_T_1890, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 400:45]
+    node _T_1892 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 400:78]
+    node _T_1893 = and(_T_1891, _T_1892) @[el2_lsu_bus_buffer.scala 400:63]
+    node _T_1894 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 400:90]
+    node _T_1895 = and(_T_1893, _T_1894) @[el2_lsu_bus_buffer.scala 400:88]
+    node _T_1896 = orr(buf_age[2]) @[el2_lsu_bus_buffer.scala 400:58]
+    node _T_1897 = eq(_T_1896, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 400:45]
+    node _T_1898 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 400:78]
+    node _T_1899 = and(_T_1897, _T_1898) @[el2_lsu_bus_buffer.scala 400:63]
+    node _T_1900 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 400:90]
+    node _T_1901 = and(_T_1899, _T_1900) @[el2_lsu_bus_buffer.scala 400:88]
+    node _T_1902 = orr(buf_age[3]) @[el2_lsu_bus_buffer.scala 400:58]
+    node _T_1903 = eq(_T_1902, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 400:45]
+    node _T_1904 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 400:78]
+    node _T_1905 = and(_T_1903, _T_1904) @[el2_lsu_bus_buffer.scala 400:63]
+    node _T_1906 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 400:90]
+    node _T_1907 = and(_T_1905, _T_1906) @[el2_lsu_bus_buffer.scala 400:88]
+    node _T_1908 = cat(_T_1907, _T_1901) @[Cat.scala 29:58]
+    node _T_1909 = cat(_T_1908, _T_1895) @[Cat.scala 29:58]
+    node CmdPtr0Dec = cat(_T_1909, _T_1889) @[Cat.scala 29:58]
+    node _T_1910 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 401:62]
+    node _T_1911 = and(buf_age[0], _T_1910) @[el2_lsu_bus_buffer.scala 401:59]
+    node _T_1912 = orr(_T_1911) @[el2_lsu_bus_buffer.scala 401:76]
+    node _T_1913 = eq(_T_1912, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:45]
+    node _T_1914 = bits(CmdPtr0Dec, 0, 0) @[el2_lsu_bus_buffer.scala 401:94]
+    node _T_1915 = eq(_T_1914, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:83]
+    node _T_1916 = and(_T_1913, _T_1915) @[el2_lsu_bus_buffer.scala 401:81]
+    node _T_1917 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 401:113]
+    node _T_1918 = and(_T_1916, _T_1917) @[el2_lsu_bus_buffer.scala 401:98]
+    node _T_1919 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:125]
+    node _T_1920 = and(_T_1918, _T_1919) @[el2_lsu_bus_buffer.scala 401:123]
+    node _T_1921 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 401:62]
+    node _T_1922 = and(buf_age[1], _T_1921) @[el2_lsu_bus_buffer.scala 401:59]
+    node _T_1923 = orr(_T_1922) @[el2_lsu_bus_buffer.scala 401:76]
+    node _T_1924 = eq(_T_1923, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:45]
+    node _T_1925 = bits(CmdPtr0Dec, 1, 1) @[el2_lsu_bus_buffer.scala 401:94]
+    node _T_1926 = eq(_T_1925, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:83]
+    node _T_1927 = and(_T_1924, _T_1926) @[el2_lsu_bus_buffer.scala 401:81]
+    node _T_1928 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 401:113]
+    node _T_1929 = and(_T_1927, _T_1928) @[el2_lsu_bus_buffer.scala 401:98]
+    node _T_1930 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:125]
+    node _T_1931 = and(_T_1929, _T_1930) @[el2_lsu_bus_buffer.scala 401:123]
+    node _T_1932 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 401:62]
+    node _T_1933 = and(buf_age[2], _T_1932) @[el2_lsu_bus_buffer.scala 401:59]
+    node _T_1934 = orr(_T_1933) @[el2_lsu_bus_buffer.scala 401:76]
+    node _T_1935 = eq(_T_1934, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:45]
+    node _T_1936 = bits(CmdPtr0Dec, 2, 2) @[el2_lsu_bus_buffer.scala 401:94]
+    node _T_1937 = eq(_T_1936, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:83]
+    node _T_1938 = and(_T_1935, _T_1937) @[el2_lsu_bus_buffer.scala 401:81]
+    node _T_1939 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 401:113]
+    node _T_1940 = and(_T_1938, _T_1939) @[el2_lsu_bus_buffer.scala 401:98]
+    node _T_1941 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:125]
+    node _T_1942 = and(_T_1940, _T_1941) @[el2_lsu_bus_buffer.scala 401:123]
+    node _T_1943 = not(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 401:62]
+    node _T_1944 = and(buf_age[3], _T_1943) @[el2_lsu_bus_buffer.scala 401:59]
+    node _T_1945 = orr(_T_1944) @[el2_lsu_bus_buffer.scala 401:76]
+    node _T_1946 = eq(_T_1945, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:45]
+    node _T_1947 = bits(CmdPtr0Dec, 3, 3) @[el2_lsu_bus_buffer.scala 401:94]
+    node _T_1948 = eq(_T_1947, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:83]
+    node _T_1949 = and(_T_1946, _T_1948) @[el2_lsu_bus_buffer.scala 401:81]
+    node _T_1950 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 401:113]
+    node _T_1951 = and(_T_1949, _T_1950) @[el2_lsu_bus_buffer.scala 401:98]
+    node _T_1952 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 401:125]
+    node _T_1953 = and(_T_1951, _T_1952) @[el2_lsu_bus_buffer.scala 401:123]
+    node _T_1954 = cat(_T_1953, _T_1942) @[Cat.scala 29:58]
+    node _T_1955 = cat(_T_1954, _T_1931) @[Cat.scala 29:58]
+    node CmdPtr1Dec = cat(_T_1955, _T_1920) @[Cat.scala 29:58]
+    wire buf_rsp_pickage : UInt<4>[4] @[el2_lsu_bus_buffer.scala 402:29]
+    buf_rsp_pickage[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 403:19]
+    buf_rsp_pickage[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 403:19]
+    buf_rsp_pickage[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 403:19]
+    buf_rsp_pickage[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 403:19]
+    node _T_1956 = orr(buf_rsp_pickage[0]) @[el2_lsu_bus_buffer.scala 404:65]
+    node _T_1957 = eq(_T_1956, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 404:44]
+    node _T_1958 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 404:85]
+    node _T_1959 = and(_T_1957, _T_1958) @[el2_lsu_bus_buffer.scala 404:70]
+    node _T_1960 = orr(buf_rsp_pickage[1]) @[el2_lsu_bus_buffer.scala 404:65]
+    node _T_1961 = eq(_T_1960, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 404:44]
+    node _T_1962 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 404:85]
+    node _T_1963 = and(_T_1961, _T_1962) @[el2_lsu_bus_buffer.scala 404:70]
+    node _T_1964 = orr(buf_rsp_pickage[2]) @[el2_lsu_bus_buffer.scala 404:65]
+    node _T_1965 = eq(_T_1964, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 404:44]
+    node _T_1966 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 404:85]
+    node _T_1967 = and(_T_1965, _T_1966) @[el2_lsu_bus_buffer.scala 404:70]
+    node _T_1968 = orr(buf_rsp_pickage[3]) @[el2_lsu_bus_buffer.scala 404:65]
+    node _T_1969 = eq(_T_1968, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 404:44]
+    node _T_1970 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 404:85]
+    node _T_1971 = and(_T_1969, _T_1970) @[el2_lsu_bus_buffer.scala 404:70]
+    node _T_1972 = cat(_T_1971, _T_1967) @[Cat.scala 29:58]
+    node _T_1973 = cat(_T_1972, _T_1963) @[Cat.scala 29:58]
+    node RspPtrDec = cat(_T_1973, _T_1959) @[Cat.scala 29:58]
+    node _T_1974 = orr(CmdPtr0Dec) @[el2_lsu_bus_buffer.scala 405:31]
+    found_cmdptr0 <= _T_1974 @[el2_lsu_bus_buffer.scala 405:17]
+    node _T_1975 = orr(CmdPtr1Dec) @[el2_lsu_bus_buffer.scala 406:31]
+    found_cmdptr1 <= _T_1975 @[el2_lsu_bus_buffer.scala 406:17]
+    node _T_1976 = bits(CmdPtr0Dec, 0, 0) @[OneHot.scala 47:40]
+    node _T_1977 = bits(CmdPtr0Dec, 1, 1) @[OneHot.scala 47:40]
+    node _T_1978 = bits(CmdPtr0Dec, 2, 2) @[OneHot.scala 47:40]
+    node _T_1979 = bits(CmdPtr0Dec, 3, 3) @[OneHot.scala 47:40]
+    node _T_1980 = mux(_T_1978, UInt<2>("h02"), UInt<2>("h03")) @[Mux.scala 47:69]
+    node _T_1981 = mux(_T_1977, UInt<1>("h01"), _T_1980) @[Mux.scala 47:69]
+    node CmdPtr0 = mux(_T_1976, UInt<1>("h00"), _T_1981) @[Mux.scala 47:69]
+    node _T_1982 = bits(CmdPtr1Dec, 0, 0) @[OneHot.scala 47:40]
+    node _T_1983 = bits(CmdPtr1Dec, 1, 1) @[OneHot.scala 47:40]
+    node _T_1984 = bits(CmdPtr1Dec, 2, 2) @[OneHot.scala 47:40]
+    node _T_1985 = bits(CmdPtr1Dec, 3, 3) @[OneHot.scala 47:40]
+    node _T_1986 = mux(_T_1984, UInt<2>("h02"), UInt<2>("h03")) @[Mux.scala 47:69]
+    node _T_1987 = mux(_T_1983, UInt<1>("h01"), _T_1986) @[Mux.scala 47:69]
+    node CmdPtr1 = mux(_T_1982, UInt<1>("h00"), _T_1987) @[Mux.scala 47:69]
+    node _T_1988 = bits(RspPtrDec, 0, 0) @[OneHot.scala 47:40]
+    node _T_1989 = bits(RspPtrDec, 1, 1) @[OneHot.scala 47:40]
+    node _T_1990 = bits(RspPtrDec, 2, 2) @[OneHot.scala 47:40]
+    node _T_1991 = bits(RspPtrDec, 3, 3) @[OneHot.scala 47:40]
+    node _T_1992 = mux(_T_1990, UInt<2>("h02"), UInt<2>("h03")) @[Mux.scala 47:69]
+    node _T_1993 = mux(_T_1989, UInt<1>("h01"), _T_1992) @[Mux.scala 47:69]
+    node RspPtr = mux(_T_1988, UInt<1>("h00"), _T_1993) @[Mux.scala 47:69]
+    wire buf_state_en : UInt<1>[4] @[el2_lsu_bus_buffer.scala 411:26]
+    buf_state_en[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 412:16]
+    buf_state_en[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 412:16]
+    buf_state_en[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 412:16]
+    buf_state_en[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 412:16]
+    wire buf_rspageQ : UInt<4>[4] @[el2_lsu_bus_buffer.scala 413:25]
+    buf_rspageQ[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 414:15]
+    buf_rspageQ[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 414:15]
+    buf_rspageQ[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 414:15]
+    buf_rspageQ[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 414:15]
+    wire buf_rspage_set : UInt<4>[4] @[el2_lsu_bus_buffer.scala 415:28]
+    buf_rspage_set[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 416:18]
+    buf_rspage_set[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 416:18]
+    buf_rspage_set[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 416:18]
+    buf_rspage_set[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 416:18]
+    wire buf_rspage_in : UInt<4>[4] @[el2_lsu_bus_buffer.scala 417:27]
+    buf_rspage_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 418:17]
+    buf_rspage_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 418:17]
+    buf_rspage_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 418:17]
+    buf_rspage_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 418:17]
+    wire buf_rspage : UInt<4>[4] @[el2_lsu_bus_buffer.scala 419:24]
+    buf_rspage[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 420:14]
+    buf_rspage[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 420:14]
+    buf_rspage[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 420:14]
+    buf_rspage[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 420:14]
+    node _T_1994 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_1995 = and(_T_1994, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_1996 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_1997 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_1998 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_1999 = and(_T_1997, _T_1998) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2000 = or(_T_1996, _T_1999) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2001 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2002 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2003 = and(_T_2001, _T_2002) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2004 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2005 = and(_T_2003, _T_2004) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2006 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2007 = and(_T_2005, _T_2006) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2008 = or(_T_2000, _T_2007) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2009 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2010 = and(_T_2009, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2011 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2012 = and(_T_2010, _T_2011) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2013 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2014 = and(_T_2012, _T_2013) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2015 = or(_T_2008, _T_2014) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2016 = and(_T_1995, _T_2015) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2017 = bits(buf_age[0], 0, 0) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2018 = or(_T_2016, _T_2017) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2019 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2020 = and(_T_2019, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2021 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2022 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2023 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2024 = and(_T_2022, _T_2023) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2025 = or(_T_2021, _T_2024) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2026 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2027 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2028 = and(_T_2026, _T_2027) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2029 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2030 = and(_T_2028, _T_2029) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2031 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2032 = and(_T_2030, _T_2031) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2033 = or(_T_2025, _T_2032) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2034 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2035 = and(_T_2034, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2036 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2037 = and(_T_2035, _T_2036) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2038 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2039 = and(_T_2037, _T_2038) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2040 = or(_T_2033, _T_2039) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2041 = and(_T_2020, _T_2040) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2042 = bits(buf_age[0], 1, 1) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2043 = or(_T_2041, _T_2042) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2044 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2045 = and(_T_2044, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2046 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2047 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2048 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2049 = and(_T_2047, _T_2048) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2050 = or(_T_2046, _T_2049) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2051 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2052 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2053 = and(_T_2051, _T_2052) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2054 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2055 = and(_T_2053, _T_2054) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2056 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2057 = and(_T_2055, _T_2056) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2058 = or(_T_2050, _T_2057) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2059 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2060 = and(_T_2059, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2061 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2062 = and(_T_2060, _T_2061) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2063 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2064 = and(_T_2062, _T_2063) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2065 = or(_T_2058, _T_2064) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2066 = and(_T_2045, _T_2065) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2067 = bits(buf_age[0], 2, 2) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2068 = or(_T_2066, _T_2067) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2069 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2070 = and(_T_2069, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2071 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2072 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2073 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2074 = and(_T_2072, _T_2073) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2075 = or(_T_2071, _T_2074) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2076 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2077 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2078 = and(_T_2076, _T_2077) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2079 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2080 = and(_T_2078, _T_2079) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2081 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2082 = and(_T_2080, _T_2081) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2083 = or(_T_2075, _T_2082) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2084 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2085 = and(_T_2084, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2086 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2087 = and(_T_2085, _T_2086) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2088 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2089 = and(_T_2087, _T_2088) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2090 = or(_T_2083, _T_2089) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2091 = and(_T_2070, _T_2090) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2092 = bits(buf_age[0], 3, 3) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2093 = or(_T_2091, _T_2092) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2094 = cat(_T_2093, _T_2068) @[Cat.scala 29:58]
+    node _T_2095 = cat(_T_2094, _T_2043) @[Cat.scala 29:58]
+    node buf_age_in_0 = cat(_T_2095, _T_2018) @[Cat.scala 29:58]
+    node _T_2096 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2097 = and(_T_2096, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2098 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2099 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2100 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2101 = and(_T_2099, _T_2100) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2102 = or(_T_2098, _T_2101) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2103 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2104 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2105 = and(_T_2103, _T_2104) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2106 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2107 = and(_T_2105, _T_2106) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2108 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2109 = and(_T_2107, _T_2108) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2110 = or(_T_2102, _T_2109) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2111 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2112 = and(_T_2111, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2113 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2114 = and(_T_2112, _T_2113) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2115 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2116 = and(_T_2114, _T_2115) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2117 = or(_T_2110, _T_2116) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2118 = and(_T_2097, _T_2117) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2119 = bits(buf_age[1], 0, 0) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2120 = or(_T_2118, _T_2119) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2121 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2122 = and(_T_2121, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2123 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2124 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2125 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2126 = and(_T_2124, _T_2125) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2127 = or(_T_2123, _T_2126) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2128 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2129 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2130 = and(_T_2128, _T_2129) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2131 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2132 = and(_T_2130, _T_2131) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2133 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2134 = and(_T_2132, _T_2133) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2135 = or(_T_2127, _T_2134) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2136 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2137 = and(_T_2136, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2138 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2139 = and(_T_2137, _T_2138) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2140 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2141 = and(_T_2139, _T_2140) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2142 = or(_T_2135, _T_2141) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2143 = and(_T_2122, _T_2142) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2144 = bits(buf_age[1], 1, 1) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2145 = or(_T_2143, _T_2144) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2146 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2147 = and(_T_2146, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2148 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2149 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2150 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2151 = and(_T_2149, _T_2150) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2152 = or(_T_2148, _T_2151) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2153 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2154 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2155 = and(_T_2153, _T_2154) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2156 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2157 = and(_T_2155, _T_2156) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2158 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2159 = and(_T_2157, _T_2158) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2160 = or(_T_2152, _T_2159) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2161 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2162 = and(_T_2161, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2163 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2164 = and(_T_2162, _T_2163) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2165 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2166 = and(_T_2164, _T_2165) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2167 = or(_T_2160, _T_2166) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2168 = and(_T_2147, _T_2167) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2169 = bits(buf_age[1], 2, 2) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2170 = or(_T_2168, _T_2169) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2171 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2172 = and(_T_2171, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2173 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2174 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2175 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2176 = and(_T_2174, _T_2175) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2177 = or(_T_2173, _T_2176) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2178 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2179 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2180 = and(_T_2178, _T_2179) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2181 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2182 = and(_T_2180, _T_2181) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2183 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2184 = and(_T_2182, _T_2183) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2185 = or(_T_2177, _T_2184) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2186 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2187 = and(_T_2186, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2188 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2189 = and(_T_2187, _T_2188) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2190 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2191 = and(_T_2189, _T_2190) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2192 = or(_T_2185, _T_2191) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2193 = and(_T_2172, _T_2192) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2194 = bits(buf_age[1], 3, 3) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2195 = or(_T_2193, _T_2194) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2196 = cat(_T_2195, _T_2170) @[Cat.scala 29:58]
+    node _T_2197 = cat(_T_2196, _T_2145) @[Cat.scala 29:58]
+    node buf_age_in_1 = cat(_T_2197, _T_2120) @[Cat.scala 29:58]
+    node _T_2198 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2199 = and(_T_2198, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2200 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2201 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2202 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2203 = and(_T_2201, _T_2202) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2204 = or(_T_2200, _T_2203) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2205 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2206 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2207 = and(_T_2205, _T_2206) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2208 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2209 = and(_T_2207, _T_2208) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2210 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2211 = and(_T_2209, _T_2210) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2212 = or(_T_2204, _T_2211) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2213 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2214 = and(_T_2213, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2215 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2216 = and(_T_2214, _T_2215) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2217 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2218 = and(_T_2216, _T_2217) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2219 = or(_T_2212, _T_2218) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2220 = and(_T_2199, _T_2219) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2221 = bits(buf_age[2], 0, 0) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2222 = or(_T_2220, _T_2221) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2223 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2224 = and(_T_2223, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2225 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2226 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2227 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2228 = and(_T_2226, _T_2227) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2229 = or(_T_2225, _T_2228) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2230 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2231 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2232 = and(_T_2230, _T_2231) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2233 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2234 = and(_T_2232, _T_2233) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2235 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2236 = and(_T_2234, _T_2235) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2237 = or(_T_2229, _T_2236) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2238 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2239 = and(_T_2238, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2240 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2241 = and(_T_2239, _T_2240) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2242 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2243 = and(_T_2241, _T_2242) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2244 = or(_T_2237, _T_2243) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2245 = and(_T_2224, _T_2244) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2246 = bits(buf_age[2], 1, 1) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2247 = or(_T_2245, _T_2246) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2248 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2249 = and(_T_2248, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2250 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2251 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2252 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2253 = and(_T_2251, _T_2252) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2254 = or(_T_2250, _T_2253) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2255 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2256 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2257 = and(_T_2255, _T_2256) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2258 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2259 = and(_T_2257, _T_2258) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2260 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2261 = and(_T_2259, _T_2260) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2262 = or(_T_2254, _T_2261) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2263 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2264 = and(_T_2263, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2265 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2266 = and(_T_2264, _T_2265) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2267 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2268 = and(_T_2266, _T_2267) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2269 = or(_T_2262, _T_2268) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2270 = and(_T_2249, _T_2269) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2271 = bits(buf_age[2], 2, 2) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2272 = or(_T_2270, _T_2271) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2273 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2274 = and(_T_2273, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2275 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2276 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2277 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2278 = and(_T_2276, _T_2277) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2279 = or(_T_2275, _T_2278) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2280 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2281 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2282 = and(_T_2280, _T_2281) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2283 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2284 = and(_T_2282, _T_2283) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2285 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2286 = and(_T_2284, _T_2285) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2287 = or(_T_2279, _T_2286) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2288 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2289 = and(_T_2288, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2290 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2291 = and(_T_2289, _T_2290) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2292 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2293 = and(_T_2291, _T_2292) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2294 = or(_T_2287, _T_2293) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2295 = and(_T_2274, _T_2294) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2296 = bits(buf_age[2], 3, 3) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2297 = or(_T_2295, _T_2296) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2298 = cat(_T_2297, _T_2272) @[Cat.scala 29:58]
+    node _T_2299 = cat(_T_2298, _T_2247) @[Cat.scala 29:58]
+    node buf_age_in_2 = cat(_T_2299, _T_2222) @[Cat.scala 29:58]
+    node _T_2300 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2301 = and(_T_2300, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2302 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2303 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2304 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2305 = and(_T_2303, _T_2304) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2306 = or(_T_2302, _T_2305) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2307 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2308 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2309 = and(_T_2307, _T_2308) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2310 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2311 = and(_T_2309, _T_2310) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2312 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2313 = and(_T_2311, _T_2312) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2314 = or(_T_2306, _T_2313) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2315 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2316 = and(_T_2315, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2317 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2318 = and(_T_2316, _T_2317) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2319 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2320 = and(_T_2318, _T_2319) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2321 = or(_T_2314, _T_2320) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2322 = and(_T_2301, _T_2321) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2323 = bits(buf_age[3], 0, 0) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2324 = or(_T_2322, _T_2323) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2325 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2326 = and(_T_2325, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2327 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2328 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2329 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2330 = and(_T_2328, _T_2329) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2331 = or(_T_2327, _T_2330) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2332 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2333 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2334 = and(_T_2332, _T_2333) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2335 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2336 = and(_T_2334, _T_2335) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2337 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2338 = and(_T_2336, _T_2337) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2339 = or(_T_2331, _T_2338) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2340 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2341 = and(_T_2340, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2342 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2343 = and(_T_2341, _T_2342) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2344 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2345 = and(_T_2343, _T_2344) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2346 = or(_T_2339, _T_2345) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2347 = and(_T_2326, _T_2346) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2348 = bits(buf_age[3], 1, 1) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2349 = or(_T_2347, _T_2348) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2350 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2351 = and(_T_2350, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2352 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2353 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2354 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2355 = and(_T_2353, _T_2354) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2356 = or(_T_2352, _T_2355) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2357 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2358 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2359 = and(_T_2357, _T_2358) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2360 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2361 = and(_T_2359, _T_2360) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2362 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2363 = and(_T_2361, _T_2362) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2364 = or(_T_2356, _T_2363) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2365 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2366 = and(_T_2365, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2367 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2368 = and(_T_2366, _T_2367) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2369 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2370 = and(_T_2368, _T_2369) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2371 = or(_T_2364, _T_2370) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2372 = and(_T_2351, _T_2371) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2373 = bits(buf_age[3], 2, 2) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2374 = or(_T_2372, _T_2373) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2375 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 422:83]
+    node _T_2376 = and(_T_2375, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 422:94]
+    node _T_2377 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 423:20]
+    node _T_2378 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 423:47]
+    node _T_2379 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 423:59]
+    node _T_2380 = and(_T_2378, _T_2379) @[el2_lsu_bus_buffer.scala 423:57]
+    node _T_2381 = or(_T_2377, _T_2380) @[el2_lsu_bus_buffer.scala 423:31]
+    node _T_2382 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 424:23]
+    node _T_2383 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 424:53]
+    node _T_2384 = and(_T_2382, _T_2383) @[el2_lsu_bus_buffer.scala 424:41]
+    node _T_2385 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:83]
+    node _T_2386 = and(_T_2384, _T_2385) @[el2_lsu_bus_buffer.scala 424:71]
+    node _T_2387 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 424:104]
+    node _T_2388 = and(_T_2386, _T_2387) @[el2_lsu_bus_buffer.scala 424:92]
+    node _T_2389 = or(_T_2381, _T_2388) @[el2_lsu_bus_buffer.scala 423:86]
+    node _T_2390 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 425:17]
+    node _T_2391 = and(_T_2390, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 425:35]
+    node _T_2392 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 425:64]
+    node _T_2393 = and(_T_2391, _T_2392) @[el2_lsu_bus_buffer.scala 425:52]
+    node _T_2394 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 425:85]
+    node _T_2395 = and(_T_2393, _T_2394) @[el2_lsu_bus_buffer.scala 425:73]
+    node _T_2396 = or(_T_2389, _T_2395) @[el2_lsu_bus_buffer.scala 424:114]
+    node _T_2397 = and(_T_2376, _T_2396) @[el2_lsu_bus_buffer.scala 422:113]
+    node _T_2398 = bits(buf_age[3], 3, 3) @[el2_lsu_bus_buffer.scala 425:109]
+    node _T_2399 = or(_T_2397, _T_2398) @[el2_lsu_bus_buffer.scala 425:97]
+    node _T_2400 = cat(_T_2399, _T_2374) @[Cat.scala 29:58]
+    node _T_2401 = cat(_T_2400, _T_2349) @[Cat.scala 29:58]
+    node buf_age_in_3 = cat(_T_2401, _T_2324) @[Cat.scala 29:58]
+    wire buf_ageQ : UInt<4>[4] @[el2_lsu_bus_buffer.scala 426:22]
+    buf_ageQ[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:12]
+    buf_ageQ[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:12]
+    buf_ageQ[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:12]
+    buf_ageQ[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 427:12]
+    node _T_2402 = bits(buf_ageQ[0], 0, 0) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2403 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2404 = and(_T_2403, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2405 = and(_T_2402, _T_2404) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2406 = bits(buf_ageQ[0], 1, 1) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2407 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2408 = and(_T_2407, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2409 = and(_T_2406, _T_2408) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2410 = bits(buf_ageQ[0], 2, 2) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2411 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2412 = and(_T_2411, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2413 = and(_T_2410, _T_2412) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2414 = bits(buf_ageQ[0], 3, 3) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2415 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2416 = and(_T_2415, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2417 = and(_T_2414, _T_2416) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2418 = cat(_T_2417, _T_2413) @[Cat.scala 29:58]
+    node _T_2419 = cat(_T_2418, _T_2409) @[Cat.scala 29:58]
+    node _T_2420 = cat(_T_2419, _T_2405) @[Cat.scala 29:58]
+    node _T_2421 = bits(buf_ageQ[1], 0, 0) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2422 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2423 = and(_T_2422, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2424 = and(_T_2421, _T_2423) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2425 = bits(buf_ageQ[1], 1, 1) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2426 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2427 = and(_T_2426, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2428 = and(_T_2425, _T_2427) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2429 = bits(buf_ageQ[1], 2, 2) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2430 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2431 = and(_T_2430, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2432 = and(_T_2429, _T_2431) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2433 = bits(buf_ageQ[1], 3, 3) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2434 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2435 = and(_T_2434, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2436 = and(_T_2433, _T_2435) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2437 = cat(_T_2436, _T_2432) @[Cat.scala 29:58]
+    node _T_2438 = cat(_T_2437, _T_2428) @[Cat.scala 29:58]
+    node _T_2439 = cat(_T_2438, _T_2424) @[Cat.scala 29:58]
+    node _T_2440 = bits(buf_ageQ[2], 0, 0) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2441 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2442 = and(_T_2441, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2443 = and(_T_2440, _T_2442) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2444 = bits(buf_ageQ[2], 1, 1) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2445 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2446 = and(_T_2445, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2447 = and(_T_2444, _T_2446) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2448 = bits(buf_ageQ[2], 2, 2) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2449 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2450 = and(_T_2449, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2451 = and(_T_2448, _T_2450) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2452 = bits(buf_ageQ[2], 3, 3) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2453 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2454 = and(_T_2453, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2455 = and(_T_2452, _T_2454) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2456 = cat(_T_2455, _T_2451) @[Cat.scala 29:58]
+    node _T_2457 = cat(_T_2456, _T_2447) @[Cat.scala 29:58]
+    node _T_2458 = cat(_T_2457, _T_2443) @[Cat.scala 29:58]
+    node _T_2459 = bits(buf_ageQ[3], 0, 0) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2460 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2461 = and(_T_2460, buf_cmd_state_bus_en[0]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2462 = and(_T_2459, _T_2461) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2463 = bits(buf_ageQ[3], 1, 1) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2464 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2465 = and(_T_2464, buf_cmd_state_bus_en[1]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2466 = and(_T_2463, _T_2465) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2467 = bits(buf_ageQ[3], 2, 2) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2468 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2469 = and(_T_2468, buf_cmd_state_bus_en[2]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2470 = and(_T_2467, _T_2469) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2471 = bits(buf_ageQ[3], 3, 3) @[el2_lsu_bus_buffer.scala 428:74]
+    node _T_2472 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 428:94]
+    node _T_2473 = and(_T_2472, buf_cmd_state_bus_en[3]) @[el2_lsu_bus_buffer.scala 428:104]
+    node _T_2474 = and(_T_2471, _T_2473) @[el2_lsu_bus_buffer.scala 428:78]
+    node _T_2475 = cat(_T_2474, _T_2470) @[Cat.scala 29:58]
+    node _T_2476 = cat(_T_2475, _T_2466) @[Cat.scala 29:58]
+    node _T_2477 = cat(_T_2476, _T_2462) @[Cat.scala 29:58]
+    buf_age[0] <= _T_2420 @[el2_lsu_bus_buffer.scala 428:13]
+    buf_age[1] <= _T_2439 @[el2_lsu_bus_buffer.scala 428:13]
+    buf_age[2] <= _T_2458 @[el2_lsu_bus_buffer.scala 428:13]
+    buf_age[3] <= _T_2477 @[el2_lsu_bus_buffer.scala 428:13]
+    node _T_2478 = eq(UInt<1>("h00"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2479 = bits(buf_age[0], 0, 0) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2480 = eq(_T_2479, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2481 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2482 = and(_T_2480, _T_2481) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2483 = mux(_T_2478, UInt<1>("h00"), _T_2482) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2484 = eq(UInt<1>("h00"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2485 = bits(buf_age[0], 1, 1) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2486 = eq(_T_2485, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2487 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2488 = and(_T_2486, _T_2487) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2489 = mux(_T_2484, UInt<1>("h00"), _T_2488) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2490 = eq(UInt<1>("h00"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2491 = bits(buf_age[0], 2, 2) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2492 = eq(_T_2491, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2493 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2494 = and(_T_2492, _T_2493) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2495 = mux(_T_2490, UInt<1>("h00"), _T_2494) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2496 = eq(UInt<1>("h00"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2497 = bits(buf_age[0], 3, 3) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2498 = eq(_T_2497, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2499 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2500 = and(_T_2498, _T_2499) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2501 = mux(_T_2496, UInt<1>("h00"), _T_2500) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2502 = cat(_T_2501, _T_2495) @[Cat.scala 29:58]
+    node _T_2503 = cat(_T_2502, _T_2489) @[Cat.scala 29:58]
+    node _T_2504 = cat(_T_2503, _T_2483) @[Cat.scala 29:58]
+    node _T_2505 = eq(UInt<1>("h01"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2506 = bits(buf_age[1], 0, 0) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2507 = eq(_T_2506, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2508 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2509 = and(_T_2507, _T_2508) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2510 = mux(_T_2505, UInt<1>("h00"), _T_2509) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2511 = eq(UInt<1>("h01"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2512 = bits(buf_age[1], 1, 1) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2513 = eq(_T_2512, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2514 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2515 = and(_T_2513, _T_2514) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2516 = mux(_T_2511, UInt<1>("h00"), _T_2515) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2517 = eq(UInt<1>("h01"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2518 = bits(buf_age[1], 2, 2) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2519 = eq(_T_2518, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2520 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2521 = and(_T_2519, _T_2520) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2522 = mux(_T_2517, UInt<1>("h00"), _T_2521) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2523 = eq(UInt<1>("h01"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2524 = bits(buf_age[1], 3, 3) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2525 = eq(_T_2524, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2526 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2527 = and(_T_2525, _T_2526) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2528 = mux(_T_2523, UInt<1>("h00"), _T_2527) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2529 = cat(_T_2528, _T_2522) @[Cat.scala 29:58]
+    node _T_2530 = cat(_T_2529, _T_2516) @[Cat.scala 29:58]
+    node _T_2531 = cat(_T_2530, _T_2510) @[Cat.scala 29:58]
+    node _T_2532 = eq(UInt<2>("h02"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2533 = bits(buf_age[2], 0, 0) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2534 = eq(_T_2533, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2535 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2536 = and(_T_2534, _T_2535) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2537 = mux(_T_2532, UInt<1>("h00"), _T_2536) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2538 = eq(UInt<2>("h02"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2539 = bits(buf_age[2], 1, 1) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2540 = eq(_T_2539, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2541 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2542 = and(_T_2540, _T_2541) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2543 = mux(_T_2538, UInt<1>("h00"), _T_2542) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2544 = eq(UInt<2>("h02"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2545 = bits(buf_age[2], 2, 2) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2546 = eq(_T_2545, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2547 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2548 = and(_T_2546, _T_2547) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2549 = mux(_T_2544, UInt<1>("h00"), _T_2548) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2550 = eq(UInt<2>("h02"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2551 = bits(buf_age[2], 3, 3) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2552 = eq(_T_2551, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2553 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2554 = and(_T_2552, _T_2553) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2555 = mux(_T_2550, UInt<1>("h00"), _T_2554) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2556 = cat(_T_2555, _T_2549) @[Cat.scala 29:58]
+    node _T_2557 = cat(_T_2556, _T_2543) @[Cat.scala 29:58]
+    node _T_2558 = cat(_T_2557, _T_2537) @[Cat.scala 29:58]
+    node _T_2559 = eq(UInt<2>("h03"), UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2560 = bits(buf_age[3], 0, 0) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2561 = eq(_T_2560, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2562 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2563 = and(_T_2561, _T_2562) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2564 = mux(_T_2559, UInt<1>("h00"), _T_2563) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2565 = eq(UInt<2>("h03"), UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2566 = bits(buf_age[3], 1, 1) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2567 = eq(_T_2566, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2568 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2569 = and(_T_2567, _T_2568) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2570 = mux(_T_2565, UInt<1>("h00"), _T_2569) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2571 = eq(UInt<2>("h03"), UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2572 = bits(buf_age[3], 2, 2) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2573 = eq(_T_2572, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2574 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2575 = and(_T_2573, _T_2574) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2576 = mux(_T_2571, UInt<1>("h00"), _T_2575) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2577 = eq(UInt<2>("h03"), UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 429:78]
+    node _T_2578 = bits(buf_age[3], 3, 3) @[el2_lsu_bus_buffer.scala 429:102]
+    node _T_2579 = eq(_T_2578, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 429:91]
+    node _T_2580 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 429:121]
+    node _T_2581 = and(_T_2579, _T_2580) @[el2_lsu_bus_buffer.scala 429:106]
+    node _T_2582 = mux(_T_2577, UInt<1>("h00"), _T_2581) @[el2_lsu_bus_buffer.scala 429:74]
+    node _T_2583 = cat(_T_2582, _T_2576) @[Cat.scala 29:58]
+    node _T_2584 = cat(_T_2583, _T_2570) @[Cat.scala 29:58]
+    node _T_2585 = cat(_T_2584, _T_2564) @[Cat.scala 29:58]
+    buf_age_younger[0] <= _T_2504 @[el2_lsu_bus_buffer.scala 429:21]
+    buf_age_younger[1] <= _T_2531 @[el2_lsu_bus_buffer.scala 429:21]
+    buf_age_younger[2] <= _T_2558 @[el2_lsu_bus_buffer.scala 429:21]
+    buf_age_younger[3] <= _T_2585 @[el2_lsu_bus_buffer.scala 429:21]
+    node _T_2586 = bits(buf_rspageQ[0], 0, 0) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2587 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2588 = and(_T_2586, _T_2587) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2589 = bits(buf_rspageQ[0], 1, 1) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2590 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2591 = and(_T_2589, _T_2590) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2592 = bits(buf_rspageQ[0], 2, 2) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2593 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2594 = and(_T_2592, _T_2593) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2595 = bits(buf_rspageQ[0], 3, 3) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2596 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2597 = and(_T_2595, _T_2596) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2598 = cat(_T_2597, _T_2594) @[Cat.scala 29:58]
+    node _T_2599 = cat(_T_2598, _T_2591) @[Cat.scala 29:58]
+    node _T_2600 = cat(_T_2599, _T_2588) @[Cat.scala 29:58]
+    node _T_2601 = bits(buf_rspageQ[1], 0, 0) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2602 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2603 = and(_T_2601, _T_2602) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2604 = bits(buf_rspageQ[1], 1, 1) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2605 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2606 = and(_T_2604, _T_2605) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2607 = bits(buf_rspageQ[1], 2, 2) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2608 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2609 = and(_T_2607, _T_2608) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2610 = bits(buf_rspageQ[1], 3, 3) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2611 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2612 = and(_T_2610, _T_2611) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2613 = cat(_T_2612, _T_2609) @[Cat.scala 29:58]
+    node _T_2614 = cat(_T_2613, _T_2606) @[Cat.scala 29:58]
+    node _T_2615 = cat(_T_2614, _T_2603) @[Cat.scala 29:58]
+    node _T_2616 = bits(buf_rspageQ[2], 0, 0) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2617 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2618 = and(_T_2616, _T_2617) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2619 = bits(buf_rspageQ[2], 1, 1) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2620 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2621 = and(_T_2619, _T_2620) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2622 = bits(buf_rspageQ[2], 2, 2) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2623 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2624 = and(_T_2622, _T_2623) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2625 = bits(buf_rspageQ[2], 3, 3) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2626 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2627 = and(_T_2625, _T_2626) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2628 = cat(_T_2627, _T_2624) @[Cat.scala 29:58]
+    node _T_2629 = cat(_T_2628, _T_2621) @[Cat.scala 29:58]
+    node _T_2630 = cat(_T_2629, _T_2618) @[Cat.scala 29:58]
+    node _T_2631 = bits(buf_rspageQ[3], 0, 0) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2632 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2633 = and(_T_2631, _T_2632) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2634 = bits(buf_rspageQ[3], 1, 1) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2635 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2636 = and(_T_2634, _T_2635) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2637 = bits(buf_rspageQ[3], 2, 2) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2638 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2639 = and(_T_2637, _T_2638) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2640 = bits(buf_rspageQ[3], 3, 3) @[el2_lsu_bus_buffer.scala 430:85]
+    node _T_2641 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 430:104]
+    node _T_2642 = and(_T_2640, _T_2641) @[el2_lsu_bus_buffer.scala 430:89]
+    node _T_2643 = cat(_T_2642, _T_2639) @[Cat.scala 29:58]
+    node _T_2644 = cat(_T_2643, _T_2636) @[Cat.scala 29:58]
+    node _T_2645 = cat(_T_2644, _T_2633) @[Cat.scala 29:58]
+    buf_rsp_pickage[0] <= _T_2600 @[el2_lsu_bus_buffer.scala 430:21]
+    buf_rsp_pickage[1] <= _T_2615 @[el2_lsu_bus_buffer.scala 430:21]
+    buf_rsp_pickage[2] <= _T_2630 @[el2_lsu_bus_buffer.scala 430:21]
+    buf_rsp_pickage[3] <= _T_2645 @[el2_lsu_bus_buffer.scala 430:21]
+    node _T_2646 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2647 = and(_T_2646, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2648 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2649 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2650 = or(_T_2648, _T_2649) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2651 = eq(_T_2650, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2652 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2653 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2654 = and(_T_2652, _T_2653) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2655 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2656 = and(_T_2654, _T_2655) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2657 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2658 = and(_T_2656, _T_2657) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2659 = or(_T_2651, _T_2658) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2660 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2661 = and(_T_2660, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2662 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2663 = and(_T_2661, _T_2662) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2664 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2665 = and(_T_2663, _T_2664) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2666 = or(_T_2659, _T_2665) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2667 = and(_T_2647, _T_2666) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2668 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2669 = and(_T_2668, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2670 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2671 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2672 = or(_T_2670, _T_2671) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2673 = eq(_T_2672, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2674 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2675 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2676 = and(_T_2674, _T_2675) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2677 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2678 = and(_T_2676, _T_2677) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2679 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2680 = and(_T_2678, _T_2679) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2681 = or(_T_2673, _T_2680) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2682 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2683 = and(_T_2682, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2684 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2685 = and(_T_2683, _T_2684) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2686 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2687 = and(_T_2685, _T_2686) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2688 = or(_T_2681, _T_2687) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2689 = and(_T_2669, _T_2688) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2690 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2691 = and(_T_2690, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2692 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2693 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2694 = or(_T_2692, _T_2693) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2695 = eq(_T_2694, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2696 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2697 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2698 = and(_T_2696, _T_2697) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2699 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2700 = and(_T_2698, _T_2699) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2701 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2702 = and(_T_2700, _T_2701) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2703 = or(_T_2695, _T_2702) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2704 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2705 = and(_T_2704, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2706 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2707 = and(_T_2705, _T_2706) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2708 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2709 = and(_T_2707, _T_2708) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2710 = or(_T_2703, _T_2709) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2711 = and(_T_2691, _T_2710) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2712 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2713 = and(_T_2712, buf_state_en[0]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2714 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2715 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2716 = or(_T_2714, _T_2715) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2717 = eq(_T_2716, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2718 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2719 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2720 = and(_T_2718, _T_2719) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2721 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2722 = and(_T_2720, _T_2721) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2723 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2724 = and(_T_2722, _T_2723) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2725 = or(_T_2717, _T_2724) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2726 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2727 = and(_T_2726, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2728 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2729 = and(_T_2727, _T_2728) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2730 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2731 = and(_T_2729, _T_2730) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2732 = or(_T_2725, _T_2731) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2733 = and(_T_2713, _T_2732) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2734 = cat(_T_2733, _T_2711) @[Cat.scala 29:58]
+    node _T_2735 = cat(_T_2734, _T_2689) @[Cat.scala 29:58]
+    node _T_2736 = cat(_T_2735, _T_2667) @[Cat.scala 29:58]
+    node _T_2737 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2738 = and(_T_2737, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2739 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2740 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2741 = or(_T_2739, _T_2740) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2742 = eq(_T_2741, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2743 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2744 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2745 = and(_T_2743, _T_2744) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2746 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2747 = and(_T_2745, _T_2746) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2748 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2749 = and(_T_2747, _T_2748) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2750 = or(_T_2742, _T_2749) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2751 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2752 = and(_T_2751, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2753 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2754 = and(_T_2752, _T_2753) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2755 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2756 = and(_T_2754, _T_2755) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2757 = or(_T_2750, _T_2756) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2758 = and(_T_2738, _T_2757) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2759 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2760 = and(_T_2759, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2761 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2762 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2763 = or(_T_2761, _T_2762) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2764 = eq(_T_2763, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2765 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2766 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2767 = and(_T_2765, _T_2766) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2768 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2769 = and(_T_2767, _T_2768) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2770 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2771 = and(_T_2769, _T_2770) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2772 = or(_T_2764, _T_2771) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2773 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2774 = and(_T_2773, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2775 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2776 = and(_T_2774, _T_2775) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2777 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2778 = and(_T_2776, _T_2777) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2779 = or(_T_2772, _T_2778) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2780 = and(_T_2760, _T_2779) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2781 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2782 = and(_T_2781, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2783 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2784 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2785 = or(_T_2783, _T_2784) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2786 = eq(_T_2785, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2787 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2788 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2789 = and(_T_2787, _T_2788) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2790 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2791 = and(_T_2789, _T_2790) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2792 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2793 = and(_T_2791, _T_2792) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2794 = or(_T_2786, _T_2793) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2795 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2796 = and(_T_2795, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2797 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2798 = and(_T_2796, _T_2797) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2799 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2800 = and(_T_2798, _T_2799) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2801 = or(_T_2794, _T_2800) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2802 = and(_T_2782, _T_2801) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2803 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2804 = and(_T_2803, buf_state_en[1]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2805 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2806 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2807 = or(_T_2805, _T_2806) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2808 = eq(_T_2807, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2809 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2810 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2811 = and(_T_2809, _T_2810) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2812 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2813 = and(_T_2811, _T_2812) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2814 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2815 = and(_T_2813, _T_2814) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2816 = or(_T_2808, _T_2815) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2817 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2818 = and(_T_2817, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2819 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2820 = and(_T_2818, _T_2819) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2821 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2822 = and(_T_2820, _T_2821) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2823 = or(_T_2816, _T_2822) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2824 = and(_T_2804, _T_2823) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2825 = cat(_T_2824, _T_2802) @[Cat.scala 29:58]
+    node _T_2826 = cat(_T_2825, _T_2780) @[Cat.scala 29:58]
+    node _T_2827 = cat(_T_2826, _T_2758) @[Cat.scala 29:58]
+    node _T_2828 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2829 = and(_T_2828, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2830 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2831 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2832 = or(_T_2830, _T_2831) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2833 = eq(_T_2832, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2834 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2835 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2836 = and(_T_2834, _T_2835) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2837 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2838 = and(_T_2836, _T_2837) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2839 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2840 = and(_T_2838, _T_2839) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2841 = or(_T_2833, _T_2840) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2842 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2843 = and(_T_2842, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2844 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2845 = and(_T_2843, _T_2844) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2846 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2847 = and(_T_2845, _T_2846) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2848 = or(_T_2841, _T_2847) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2849 = and(_T_2829, _T_2848) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2850 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2851 = and(_T_2850, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2852 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2853 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2854 = or(_T_2852, _T_2853) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2855 = eq(_T_2854, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2856 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2857 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2858 = and(_T_2856, _T_2857) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2859 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2860 = and(_T_2858, _T_2859) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2861 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2862 = and(_T_2860, _T_2861) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2863 = or(_T_2855, _T_2862) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2864 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2865 = and(_T_2864, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2866 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2867 = and(_T_2865, _T_2866) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2868 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2869 = and(_T_2867, _T_2868) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2870 = or(_T_2863, _T_2869) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2871 = and(_T_2851, _T_2870) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2872 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2873 = and(_T_2872, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2874 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2875 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2876 = or(_T_2874, _T_2875) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2877 = eq(_T_2876, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2878 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2879 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2880 = and(_T_2878, _T_2879) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2881 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2882 = and(_T_2880, _T_2881) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2883 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2884 = and(_T_2882, _T_2883) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2885 = or(_T_2877, _T_2884) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2886 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2887 = and(_T_2886, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2888 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2889 = and(_T_2887, _T_2888) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2890 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2891 = and(_T_2889, _T_2890) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2892 = or(_T_2885, _T_2891) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2893 = and(_T_2873, _T_2892) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2894 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2895 = and(_T_2894, buf_state_en[2]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2896 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2897 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2898 = or(_T_2896, _T_2897) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2899 = eq(_T_2898, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2900 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2901 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2902 = and(_T_2900, _T_2901) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2903 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2904 = and(_T_2902, _T_2903) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2905 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2906 = and(_T_2904, _T_2905) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2907 = or(_T_2899, _T_2906) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2908 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2909 = and(_T_2908, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2910 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2911 = and(_T_2909, _T_2910) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2912 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2913 = and(_T_2911, _T_2912) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2914 = or(_T_2907, _T_2913) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2915 = and(_T_2895, _T_2914) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2916 = cat(_T_2915, _T_2893) @[Cat.scala 29:58]
+    node _T_2917 = cat(_T_2916, _T_2871) @[Cat.scala 29:58]
+    node _T_2918 = cat(_T_2917, _T_2849) @[Cat.scala 29:58]
+    node _T_2919 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2920 = and(_T_2919, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2921 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2922 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2923 = or(_T_2921, _T_2922) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2924 = eq(_T_2923, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2925 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2926 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2927 = and(_T_2925, _T_2926) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2928 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2929 = and(_T_2927, _T_2928) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2930 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2931 = and(_T_2929, _T_2930) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2932 = or(_T_2924, _T_2931) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2933 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2934 = and(_T_2933, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2935 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2936 = and(_T_2934, _T_2935) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2937 = eq(WrPtr0_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2938 = and(_T_2936, _T_2937) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2939 = or(_T_2932, _T_2938) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2940 = and(_T_2920, _T_2939) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2941 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2942 = and(_T_2941, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2943 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2944 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2945 = or(_T_2943, _T_2944) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2946 = eq(_T_2945, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2947 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2948 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2949 = and(_T_2947, _T_2948) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2950 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2951 = and(_T_2949, _T_2950) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2952 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2953 = and(_T_2951, _T_2952) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2954 = or(_T_2946, _T_2953) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2955 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2956 = and(_T_2955, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2957 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2958 = and(_T_2956, _T_2957) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2959 = eq(WrPtr0_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2960 = and(_T_2958, _T_2959) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2961 = or(_T_2954, _T_2960) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2962 = and(_T_2942, _T_2961) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2963 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2964 = and(_T_2963, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2965 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2966 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2967 = or(_T_2965, _T_2966) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2968 = eq(_T_2967, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2969 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2970 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2971 = and(_T_2969, _T_2970) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2972 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2973 = and(_T_2971, _T_2972) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2974 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2975 = and(_T_2973, _T_2974) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2976 = or(_T_2968, _T_2975) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2977 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_2978 = and(_T_2977, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_2979 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_2980 = and(_T_2978, _T_2979) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_2981 = eq(WrPtr0_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_2982 = and(_T_2980, _T_2981) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_2983 = or(_T_2976, _T_2982) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_2984 = and(_T_2964, _T_2983) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_2985 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 432:84]
+    node _T_2986 = and(_T_2985, buf_state_en[3]) @[el2_lsu_bus_buffer.scala 432:95]
+    node _T_2987 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 433:23]
+    node _T_2988 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 433:49]
+    node _T_2989 = or(_T_2987, _T_2988) @[el2_lsu_bus_buffer.scala 433:34]
+    node _T_2990 = eq(_T_2989, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 433:8]
+    node _T_2991 = and(ibuf_drain_vld, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 434:25]
+    node _T_2992 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 434:55]
+    node _T_2993 = and(_T_2991, _T_2992) @[el2_lsu_bus_buffer.scala 434:43]
+    node _T_2994 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 434:84]
+    node _T_2995 = and(_T_2993, _T_2994) @[el2_lsu_bus_buffer.scala 434:73]
+    node _T_2996 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 434:103]
+    node _T_2997 = and(_T_2995, _T_2996) @[el2_lsu_bus_buffer.scala 434:92]
+    node _T_2998 = or(_T_2990, _T_2997) @[el2_lsu_bus_buffer.scala 433:61]
+    node _T_2999 = and(ibuf_byp, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 435:19]
+    node _T_3000 = and(_T_2999, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 435:37]
+    node _T_3001 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 435:65]
+    node _T_3002 = and(_T_3000, _T_3001) @[el2_lsu_bus_buffer.scala 435:54]
+    node _T_3003 = eq(WrPtr0_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 435:84]
+    node _T_3004 = and(_T_3002, _T_3003) @[el2_lsu_bus_buffer.scala 435:73]
+    node _T_3005 = or(_T_2998, _T_3004) @[el2_lsu_bus_buffer.scala 434:112]
+    node _T_3006 = and(_T_2986, _T_3005) @[el2_lsu_bus_buffer.scala 432:114]
+    node _T_3007 = cat(_T_3006, _T_2984) @[Cat.scala 29:58]
+    node _T_3008 = cat(_T_3007, _T_2962) @[Cat.scala 29:58]
+    node _T_3009 = cat(_T_3008, _T_2940) @[Cat.scala 29:58]
+    buf_rspage_set[0] <= _T_2736 @[el2_lsu_bus_buffer.scala 432:20]
+    buf_rspage_set[1] <= _T_2827 @[el2_lsu_bus_buffer.scala 432:20]
+    buf_rspage_set[2] <= _T_2918 @[el2_lsu_bus_buffer.scala 432:20]
+    buf_rspage_set[3] <= _T_3009 @[el2_lsu_bus_buffer.scala 432:20]
+    node _T_3010 = bits(buf_rspage_set[0], 0, 0) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3011 = bits(buf_rspage[0], 0, 0) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3012 = or(_T_3010, _T_3011) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3013 = bits(buf_rspage_set[0], 1, 1) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3014 = bits(buf_rspage[0], 1, 1) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3015 = or(_T_3013, _T_3014) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3016 = bits(buf_rspage_set[0], 2, 2) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3017 = bits(buf_rspage[0], 2, 2) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3018 = or(_T_3016, _T_3017) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3019 = bits(buf_rspage_set[0], 3, 3) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3020 = bits(buf_rspage[0], 3, 3) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3021 = or(_T_3019, _T_3020) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3022 = cat(_T_3021, _T_3018) @[Cat.scala 29:58]
+    node _T_3023 = cat(_T_3022, _T_3015) @[Cat.scala 29:58]
+    node _T_3024 = cat(_T_3023, _T_3012) @[Cat.scala 29:58]
+    node _T_3025 = bits(buf_rspage_set[1], 0, 0) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3026 = bits(buf_rspage[1], 0, 0) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3027 = or(_T_3025, _T_3026) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3028 = bits(buf_rspage_set[1], 1, 1) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3029 = bits(buf_rspage[1], 1, 1) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3030 = or(_T_3028, _T_3029) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3031 = bits(buf_rspage_set[1], 2, 2) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3032 = bits(buf_rspage[1], 2, 2) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3033 = or(_T_3031, _T_3032) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3034 = bits(buf_rspage_set[1], 3, 3) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3035 = bits(buf_rspage[1], 3, 3) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3036 = or(_T_3034, _T_3035) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3037 = cat(_T_3036, _T_3033) @[Cat.scala 29:58]
+    node _T_3038 = cat(_T_3037, _T_3030) @[Cat.scala 29:58]
+    node _T_3039 = cat(_T_3038, _T_3027) @[Cat.scala 29:58]
+    node _T_3040 = bits(buf_rspage_set[2], 0, 0) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3041 = bits(buf_rspage[2], 0, 0) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3042 = or(_T_3040, _T_3041) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3043 = bits(buf_rspage_set[2], 1, 1) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3044 = bits(buf_rspage[2], 1, 1) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3045 = or(_T_3043, _T_3044) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3046 = bits(buf_rspage_set[2], 2, 2) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3047 = bits(buf_rspage[2], 2, 2) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3048 = or(_T_3046, _T_3047) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3049 = bits(buf_rspage_set[2], 3, 3) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3050 = bits(buf_rspage[2], 3, 3) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3051 = or(_T_3049, _T_3050) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3052 = cat(_T_3051, _T_3048) @[Cat.scala 29:58]
+    node _T_3053 = cat(_T_3052, _T_3045) @[Cat.scala 29:58]
+    node _T_3054 = cat(_T_3053, _T_3042) @[Cat.scala 29:58]
+    node _T_3055 = bits(buf_rspage_set[3], 0, 0) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3056 = bits(buf_rspage[3], 0, 0) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3057 = or(_T_3055, _T_3056) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3058 = bits(buf_rspage_set[3], 1, 1) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3059 = bits(buf_rspage[3], 1, 1) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3060 = or(_T_3058, _T_3059) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3061 = bits(buf_rspage_set[3], 2, 2) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3062 = bits(buf_rspage[3], 2, 2) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3063 = or(_T_3061, _T_3062) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3064 = bits(buf_rspage_set[3], 3, 3) @[el2_lsu_bus_buffer.scala 436:86]
+    node _T_3065 = bits(buf_rspage[3], 3, 3) @[el2_lsu_bus_buffer.scala 436:105]
+    node _T_3066 = or(_T_3064, _T_3065) @[el2_lsu_bus_buffer.scala 436:90]
+    node _T_3067 = cat(_T_3066, _T_3063) @[Cat.scala 29:58]
+    node _T_3068 = cat(_T_3067, _T_3060) @[Cat.scala 29:58]
+    node _T_3069 = cat(_T_3068, _T_3057) @[Cat.scala 29:58]
+    buf_rspage_in[0] <= _T_3024 @[el2_lsu_bus_buffer.scala 436:19]
+    buf_rspage_in[1] <= _T_3039 @[el2_lsu_bus_buffer.scala 436:19]
+    buf_rspage_in[2] <= _T_3054 @[el2_lsu_bus_buffer.scala 436:19]
+    buf_rspage_in[3] <= _T_3069 @[el2_lsu_bus_buffer.scala 436:19]
+    node _T_3070 = bits(buf_rspageQ[0], 0, 0) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3071 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3072 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3073 = or(_T_3071, _T_3072) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3074 = eq(_T_3073, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3075 = and(_T_3070, _T_3074) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3076 = bits(buf_rspageQ[0], 1, 1) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3077 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3078 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3079 = or(_T_3077, _T_3078) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3080 = eq(_T_3079, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3081 = and(_T_3076, _T_3080) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3082 = bits(buf_rspageQ[0], 2, 2) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3083 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3084 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3085 = or(_T_3083, _T_3084) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3086 = eq(_T_3085, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3087 = and(_T_3082, _T_3086) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3088 = bits(buf_rspageQ[0], 3, 3) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3089 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3090 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3091 = or(_T_3089, _T_3090) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3092 = eq(_T_3091, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3093 = and(_T_3088, _T_3092) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3094 = cat(_T_3093, _T_3087) @[Cat.scala 29:58]
+    node _T_3095 = cat(_T_3094, _T_3081) @[Cat.scala 29:58]
+    node _T_3096 = cat(_T_3095, _T_3075) @[Cat.scala 29:58]
+    node _T_3097 = bits(buf_rspageQ[1], 0, 0) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3098 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3099 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3100 = or(_T_3098, _T_3099) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3101 = eq(_T_3100, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3102 = and(_T_3097, _T_3101) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3103 = bits(buf_rspageQ[1], 1, 1) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3104 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3105 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3106 = or(_T_3104, _T_3105) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3107 = eq(_T_3106, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3108 = and(_T_3103, _T_3107) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3109 = bits(buf_rspageQ[1], 2, 2) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3110 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3111 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3112 = or(_T_3110, _T_3111) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3113 = eq(_T_3112, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3114 = and(_T_3109, _T_3113) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3115 = bits(buf_rspageQ[1], 3, 3) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3116 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3117 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3118 = or(_T_3116, _T_3117) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3119 = eq(_T_3118, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3120 = and(_T_3115, _T_3119) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3121 = cat(_T_3120, _T_3114) @[Cat.scala 29:58]
+    node _T_3122 = cat(_T_3121, _T_3108) @[Cat.scala 29:58]
+    node _T_3123 = cat(_T_3122, _T_3102) @[Cat.scala 29:58]
+    node _T_3124 = bits(buf_rspageQ[2], 0, 0) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3125 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3126 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3127 = or(_T_3125, _T_3126) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3128 = eq(_T_3127, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3129 = and(_T_3124, _T_3128) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3130 = bits(buf_rspageQ[2], 1, 1) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3131 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3132 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3133 = or(_T_3131, _T_3132) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3134 = eq(_T_3133, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3135 = and(_T_3130, _T_3134) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3136 = bits(buf_rspageQ[2], 2, 2) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3137 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3138 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3139 = or(_T_3137, _T_3138) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3140 = eq(_T_3139, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3141 = and(_T_3136, _T_3140) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3142 = bits(buf_rspageQ[2], 3, 3) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3143 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3144 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3145 = or(_T_3143, _T_3144) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3146 = eq(_T_3145, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3147 = and(_T_3142, _T_3146) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3148 = cat(_T_3147, _T_3141) @[Cat.scala 29:58]
+    node _T_3149 = cat(_T_3148, _T_3135) @[Cat.scala 29:58]
+    node _T_3150 = cat(_T_3149, _T_3129) @[Cat.scala 29:58]
+    node _T_3151 = bits(buf_rspageQ[3], 0, 0) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3152 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3153 = eq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3154 = or(_T_3152, _T_3153) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3155 = eq(_T_3154, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3156 = and(_T_3151, _T_3155) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3157 = bits(buf_rspageQ[3], 1, 1) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3158 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3159 = eq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3160 = or(_T_3158, _T_3159) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3161 = eq(_T_3160, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3162 = and(_T_3157, _T_3161) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3163 = bits(buf_rspageQ[3], 2, 2) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3164 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3165 = eq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3166 = or(_T_3164, _T_3165) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3167 = eq(_T_3166, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3168 = and(_T_3163, _T_3167) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3169 = bits(buf_rspageQ[3], 3, 3) @[el2_lsu_bus_buffer.scala 437:80]
+    node _T_3170 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 437:101]
+    node _T_3171 = eq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 437:127]
+    node _T_3172 = or(_T_3170, _T_3171) @[el2_lsu_bus_buffer.scala 437:112]
+    node _T_3173 = eq(_T_3172, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 437:86]
+    node _T_3174 = and(_T_3169, _T_3173) @[el2_lsu_bus_buffer.scala 437:84]
+    node _T_3175 = cat(_T_3174, _T_3168) @[Cat.scala 29:58]
+    node _T_3176 = cat(_T_3175, _T_3162) @[Cat.scala 29:58]
+    node _T_3177 = cat(_T_3176, _T_3156) @[Cat.scala 29:58]
+    buf_rspage[0] <= _T_3096 @[el2_lsu_bus_buffer.scala 437:16]
+    buf_rspage[1] <= _T_3123 @[el2_lsu_bus_buffer.scala 437:16]
+    buf_rspage[2] <= _T_3150 @[el2_lsu_bus_buffer.scala 437:16]
+    buf_rspage[3] <= _T_3177 @[el2_lsu_bus_buffer.scala 437:16]
+    node _T_3178 = eq(ibuf_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 442:77]
+    node _T_3179 = and(ibuf_drain_vld, _T_3178) @[el2_lsu_bus_buffer.scala 442:65]
+    node _T_3180 = eq(ibuf_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 442:77]
+    node _T_3181 = and(ibuf_drain_vld, _T_3180) @[el2_lsu_bus_buffer.scala 442:65]
+    node _T_3182 = eq(ibuf_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 442:77]
+    node _T_3183 = and(ibuf_drain_vld, _T_3182) @[el2_lsu_bus_buffer.scala 442:65]
+    node _T_3184 = eq(ibuf_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 442:77]
+    node _T_3185 = and(ibuf_drain_vld, _T_3184) @[el2_lsu_bus_buffer.scala 442:65]
+    node _T_3186 = cat(_T_3185, _T_3183) @[Cat.scala 29:58]
+    node _T_3187 = cat(_T_3186, _T_3181) @[Cat.scala 29:58]
+    node _T_3188 = cat(_T_3187, _T_3179) @[Cat.scala 29:58]
+    ibuf_drainvec_vld <= _T_3188 @[el2_lsu_bus_buffer.scala 442:23]
+    node _T_3189 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 443:66]
+    node _T_3190 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 443:86]
+    node _T_3191 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 443:106]
+    node _T_3192 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 443:134]
+    node _T_3193 = and(_T_3191, _T_3192) @[el2_lsu_bus_buffer.scala 443:123]
+    node _T_3194 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 443:159]
+    node _T_3195 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 443:182]
+    node _T_3196 = mux(_T_3193, _T_3194, _T_3195) @[el2_lsu_bus_buffer.scala 443:96]
+    node _T_3197 = mux(_T_3189, _T_3190, _T_3196) @[el2_lsu_bus_buffer.scala 443:48]
+    node _T_3198 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 443:66]
+    node _T_3199 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 443:86]
+    node _T_3200 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 443:106]
+    node _T_3201 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 443:134]
+    node _T_3202 = and(_T_3200, _T_3201) @[el2_lsu_bus_buffer.scala 443:123]
+    node _T_3203 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 443:159]
+    node _T_3204 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 443:182]
+    node _T_3205 = mux(_T_3202, _T_3203, _T_3204) @[el2_lsu_bus_buffer.scala 443:96]
+    node _T_3206 = mux(_T_3198, _T_3199, _T_3205) @[el2_lsu_bus_buffer.scala 443:48]
+    node _T_3207 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 443:66]
+    node _T_3208 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 443:86]
+    node _T_3209 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 443:106]
+    node _T_3210 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 443:134]
+    node _T_3211 = and(_T_3209, _T_3210) @[el2_lsu_bus_buffer.scala 443:123]
+    node _T_3212 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 443:159]
+    node _T_3213 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 443:182]
+    node _T_3214 = mux(_T_3211, _T_3212, _T_3213) @[el2_lsu_bus_buffer.scala 443:96]
+    node _T_3215 = mux(_T_3207, _T_3208, _T_3214) @[el2_lsu_bus_buffer.scala 443:48]
+    node _T_3216 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 443:66]
+    node _T_3217 = bits(ibuf_byteen_out, 3, 0) @[el2_lsu_bus_buffer.scala 443:86]
+    node _T_3218 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 443:106]
+    node _T_3219 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 443:134]
+    node _T_3220 = and(_T_3218, _T_3219) @[el2_lsu_bus_buffer.scala 443:123]
+    node _T_3221 = bits(ldst_byteen_hi_r, 3, 0) @[el2_lsu_bus_buffer.scala 443:159]
+    node _T_3222 = bits(ldst_byteen_lo_r, 3, 0) @[el2_lsu_bus_buffer.scala 443:182]
+    node _T_3223 = mux(_T_3220, _T_3221, _T_3222) @[el2_lsu_bus_buffer.scala 443:96]
+    node _T_3224 = mux(_T_3216, _T_3217, _T_3223) @[el2_lsu_bus_buffer.scala 443:48]
+    buf_byteen_in[0] <= _T_3197 @[el2_lsu_bus_buffer.scala 443:19]
+    buf_byteen_in[1] <= _T_3206 @[el2_lsu_bus_buffer.scala 443:19]
+    buf_byteen_in[2] <= _T_3215 @[el2_lsu_bus_buffer.scala 443:19]
+    buf_byteen_in[3] <= _T_3224 @[el2_lsu_bus_buffer.scala 443:19]
+    node _T_3225 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 444:64]
+    node _T_3226 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 444:93]
+    node _T_3227 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 444:121]
+    node _T_3228 = and(_T_3226, _T_3227) @[el2_lsu_bus_buffer.scala 444:110]
+    node _T_3229 = mux(_T_3228, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 444:83]
+    node _T_3230 = mux(_T_3225, ibuf_addr, _T_3229) @[el2_lsu_bus_buffer.scala 444:46]
+    node _T_3231 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 444:64]
+    node _T_3232 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 444:93]
+    node _T_3233 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 444:121]
+    node _T_3234 = and(_T_3232, _T_3233) @[el2_lsu_bus_buffer.scala 444:110]
+    node _T_3235 = mux(_T_3234, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 444:83]
+    node _T_3236 = mux(_T_3231, ibuf_addr, _T_3235) @[el2_lsu_bus_buffer.scala 444:46]
+    node _T_3237 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 444:64]
+    node _T_3238 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 444:93]
+    node _T_3239 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 444:121]
+    node _T_3240 = and(_T_3238, _T_3239) @[el2_lsu_bus_buffer.scala 444:110]
+    node _T_3241 = mux(_T_3240, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 444:83]
+    node _T_3242 = mux(_T_3237, ibuf_addr, _T_3241) @[el2_lsu_bus_buffer.scala 444:46]
+    node _T_3243 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 444:64]
+    node _T_3244 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 444:93]
+    node _T_3245 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 444:121]
+    node _T_3246 = and(_T_3244, _T_3245) @[el2_lsu_bus_buffer.scala 444:110]
+    node _T_3247 = mux(_T_3246, io.end_addr_r, io.lsu_addr_r) @[el2_lsu_bus_buffer.scala 444:83]
+    node _T_3248 = mux(_T_3243, ibuf_addr, _T_3247) @[el2_lsu_bus_buffer.scala 444:46]
+    buf_addr_in[0] <= _T_3230 @[el2_lsu_bus_buffer.scala 444:17]
+    buf_addr_in[1] <= _T_3236 @[el2_lsu_bus_buffer.scala 444:17]
+    buf_addr_in[2] <= _T_3242 @[el2_lsu_bus_buffer.scala 444:17]
+    buf_addr_in[3] <= _T_3248 @[el2_lsu_bus_buffer.scala 444:17]
+    node _T_3249 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 445:65]
+    node _T_3250 = mux(_T_3249, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 445:47]
+    node _T_3251 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 445:65]
+    node _T_3252 = mux(_T_3251, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 445:47]
+    node _T_3253 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 445:65]
+    node _T_3254 = mux(_T_3253, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 445:47]
+    node _T_3255 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 445:65]
+    node _T_3256 = mux(_T_3255, ibuf_dual, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 445:47]
+    node _T_3257 = cat(_T_3256, _T_3254) @[Cat.scala 29:58]
+    node _T_3258 = cat(_T_3257, _T_3252) @[Cat.scala 29:58]
+    node _T_3259 = cat(_T_3258, _T_3250) @[Cat.scala 29:58]
+    buf_dual_in <= _T_3259 @[el2_lsu_bus_buffer.scala 445:17]
+    node _T_3260 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 446:67]
+    node _T_3261 = mux(_T_3260, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 446:49]
+    node _T_3262 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 446:67]
+    node _T_3263 = mux(_T_3262, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 446:49]
+    node _T_3264 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 446:67]
+    node _T_3265 = mux(_T_3264, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 446:49]
+    node _T_3266 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 446:67]
+    node _T_3267 = mux(_T_3266, ibuf_samedw, ldst_samedw_r) @[el2_lsu_bus_buffer.scala 446:49]
+    node _T_3268 = cat(_T_3267, _T_3265) @[Cat.scala 29:58]
+    node _T_3269 = cat(_T_3268, _T_3263) @[Cat.scala 29:58]
+    node _T_3270 = cat(_T_3269, _T_3261) @[Cat.scala 29:58]
+    buf_samedw_in <= _T_3270 @[el2_lsu_bus_buffer.scala 446:19]
+    node _T_3271 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 447:68]
+    node _T_3272 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 447:86]
+    node _T_3273 = mux(_T_3271, _T_3272, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 447:50]
+    node _T_3274 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 447:68]
+    node _T_3275 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 447:86]
+    node _T_3276 = mux(_T_3274, _T_3275, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 447:50]
+    node _T_3277 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 447:68]
+    node _T_3278 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 447:86]
+    node _T_3279 = mux(_T_3277, _T_3278, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 447:50]
+    node _T_3280 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 447:68]
+    node _T_3281 = or(ibuf_nomerge, ibuf_force_drain) @[el2_lsu_bus_buffer.scala 447:86]
+    node _T_3282 = mux(_T_3280, _T_3281, io.no_dword_merge_r) @[el2_lsu_bus_buffer.scala 447:50]
+    node _T_3283 = cat(_T_3282, _T_3279) @[Cat.scala 29:58]
+    node _T_3284 = cat(_T_3283, _T_3276) @[Cat.scala 29:58]
+    node _T_3285 = cat(_T_3284, _T_3273) @[Cat.scala 29:58]
+    buf_nomerge_in <= _T_3285 @[el2_lsu_bus_buffer.scala 447:20]
+    node _T_3286 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 448:67]
+    node _T_3287 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 448:92]
+    node _T_3288 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 448:120]
+    node _T_3289 = and(_T_3287, _T_3288) @[el2_lsu_bus_buffer.scala 448:109]
+    node _T_3290 = mux(_T_3286, ibuf_dual, _T_3289) @[el2_lsu_bus_buffer.scala 448:49]
+    node _T_3291 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 448:67]
+    node _T_3292 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 448:92]
+    node _T_3293 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 448:120]
+    node _T_3294 = and(_T_3292, _T_3293) @[el2_lsu_bus_buffer.scala 448:109]
+    node _T_3295 = mux(_T_3291, ibuf_dual, _T_3294) @[el2_lsu_bus_buffer.scala 448:49]
+    node _T_3296 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 448:67]
+    node _T_3297 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 448:92]
+    node _T_3298 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 448:120]
+    node _T_3299 = and(_T_3297, _T_3298) @[el2_lsu_bus_buffer.scala 448:109]
+    node _T_3300 = mux(_T_3296, ibuf_dual, _T_3299) @[el2_lsu_bus_buffer.scala 448:49]
+    node _T_3301 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 448:67]
+    node _T_3302 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 448:92]
+    node _T_3303 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 448:120]
+    node _T_3304 = and(_T_3302, _T_3303) @[el2_lsu_bus_buffer.scala 448:109]
+    node _T_3305 = mux(_T_3301, ibuf_dual, _T_3304) @[el2_lsu_bus_buffer.scala 448:49]
+    node _T_3306 = cat(_T_3305, _T_3300) @[Cat.scala 29:58]
+    node _T_3307 = cat(_T_3306, _T_3295) @[Cat.scala 29:58]
+    node _T_3308 = cat(_T_3307, _T_3290) @[Cat.scala 29:58]
+    buf_dualhi_in <= _T_3308 @[el2_lsu_bus_buffer.scala 448:19]
+    node _T_3309 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 449:67]
+    node _T_3310 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 449:99]
+    node _T_3311 = eq(WrPtr1_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 449:127]
+    node _T_3312 = and(_T_3310, _T_3311) @[el2_lsu_bus_buffer.scala 449:116]
+    node _T_3313 = mux(_T_3312, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 449:89]
+    node _T_3314 = mux(_T_3309, ibuf_dualtag, _T_3313) @[el2_lsu_bus_buffer.scala 449:49]
+    node _T_3315 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 449:67]
+    node _T_3316 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 449:99]
+    node _T_3317 = eq(WrPtr1_r, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 449:127]
+    node _T_3318 = and(_T_3316, _T_3317) @[el2_lsu_bus_buffer.scala 449:116]
+    node _T_3319 = mux(_T_3318, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 449:89]
+    node _T_3320 = mux(_T_3315, ibuf_dualtag, _T_3319) @[el2_lsu_bus_buffer.scala 449:49]
+    node _T_3321 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 449:67]
+    node _T_3322 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 449:99]
+    node _T_3323 = eq(WrPtr1_r, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 449:127]
+    node _T_3324 = and(_T_3322, _T_3323) @[el2_lsu_bus_buffer.scala 449:116]
+    node _T_3325 = mux(_T_3324, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 449:89]
+    node _T_3326 = mux(_T_3321, ibuf_dualtag, _T_3325) @[el2_lsu_bus_buffer.scala 449:49]
+    node _T_3327 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 449:67]
+    node _T_3328 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 449:99]
+    node _T_3329 = eq(WrPtr1_r, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 449:127]
+    node _T_3330 = and(_T_3328, _T_3329) @[el2_lsu_bus_buffer.scala 449:116]
+    node _T_3331 = mux(_T_3330, WrPtr0_r, WrPtr1_r) @[el2_lsu_bus_buffer.scala 449:89]
+    node _T_3332 = mux(_T_3327, ibuf_dualtag, _T_3331) @[el2_lsu_bus_buffer.scala 449:49]
+    buf_dualtag_in[0] <= _T_3314 @[el2_lsu_bus_buffer.scala 449:20]
+    buf_dualtag_in[1] <= _T_3320 @[el2_lsu_bus_buffer.scala 449:20]
+    buf_dualtag_in[2] <= _T_3326 @[el2_lsu_bus_buffer.scala 449:20]
+    buf_dualtag_in[3] <= _T_3332 @[el2_lsu_bus_buffer.scala 449:20]
+    node _T_3333 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 450:71]
+    node _T_3334 = mux(_T_3333, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 450:53]
+    node _T_3335 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 450:71]
+    node _T_3336 = mux(_T_3335, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 450:53]
+    node _T_3337 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 450:71]
+    node _T_3338 = mux(_T_3337, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 450:53]
+    node _T_3339 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 450:71]
+    node _T_3340 = mux(_T_3339, ibuf_sideeffect, io.is_sideeffects_r) @[el2_lsu_bus_buffer.scala 450:53]
+    node _T_3341 = cat(_T_3340, _T_3338) @[Cat.scala 29:58]
+    node _T_3342 = cat(_T_3341, _T_3336) @[Cat.scala 29:58]
+    node _T_3343 = cat(_T_3342, _T_3334) @[Cat.scala 29:58]
+    buf_sideeffect_in <= _T_3343 @[el2_lsu_bus_buffer.scala 450:23]
+    node _T_3344 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 451:67]
+    node _T_3345 = mux(_T_3344, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 451:49]
+    node _T_3346 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 451:67]
+    node _T_3347 = mux(_T_3346, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 451:49]
+    node _T_3348 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 451:67]
+    node _T_3349 = mux(_T_3348, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 451:49]
+    node _T_3350 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 451:67]
+    node _T_3351 = mux(_T_3350, ibuf_unsign, io.lsu_pkt_r.unsign) @[el2_lsu_bus_buffer.scala 451:49]
+    node _T_3352 = cat(_T_3351, _T_3349) @[Cat.scala 29:58]
+    node _T_3353 = cat(_T_3352, _T_3347) @[Cat.scala 29:58]
+    node _T_3354 = cat(_T_3353, _T_3345) @[Cat.scala 29:58]
+    buf_unsign_in <= _T_3354 @[el2_lsu_bus_buffer.scala 451:19]
+    node _T_3355 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 452:62]
+    node _T_3356 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58]
+    node _T_3357 = mux(_T_3355, ibuf_sz, _T_3356) @[el2_lsu_bus_buffer.scala 452:44]
+    node _T_3358 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 452:62]
+    node _T_3359 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58]
+    node _T_3360 = mux(_T_3358, ibuf_sz, _T_3359) @[el2_lsu_bus_buffer.scala 452:44]
+    node _T_3361 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 452:62]
+    node _T_3362 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58]
+    node _T_3363 = mux(_T_3361, ibuf_sz, _T_3362) @[el2_lsu_bus_buffer.scala 452:44]
+    node _T_3364 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 452:62]
+    node _T_3365 = cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half) @[Cat.scala 29:58]
+    node _T_3366 = mux(_T_3364, ibuf_sz, _T_3365) @[el2_lsu_bus_buffer.scala 452:44]
+    buf_sz_in[0] <= _T_3357 @[el2_lsu_bus_buffer.scala 452:15]
+    buf_sz_in[1] <= _T_3360 @[el2_lsu_bus_buffer.scala 452:15]
+    buf_sz_in[2] <= _T_3363 @[el2_lsu_bus_buffer.scala 452:15]
+    buf_sz_in[3] <= _T_3366 @[el2_lsu_bus_buffer.scala 452:15]
+    node _T_3367 = bits(ibuf_drainvec_vld, 0, 0) @[el2_lsu_bus_buffer.scala 453:66]
+    node _T_3368 = mux(_T_3367, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 453:48]
+    node _T_3369 = bits(ibuf_drainvec_vld, 1, 1) @[el2_lsu_bus_buffer.scala 453:66]
+    node _T_3370 = mux(_T_3369, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 453:48]
+    node _T_3371 = bits(ibuf_drainvec_vld, 2, 2) @[el2_lsu_bus_buffer.scala 453:66]
+    node _T_3372 = mux(_T_3371, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 453:48]
+    node _T_3373 = bits(ibuf_drainvec_vld, 3, 3) @[el2_lsu_bus_buffer.scala 453:66]
+    node _T_3374 = mux(_T_3373, ibuf_write, io.lsu_pkt_r.store) @[el2_lsu_bus_buffer.scala 453:48]
+    node _T_3375 = cat(_T_3374, _T_3372) @[Cat.scala 29:58]
+    node _T_3376 = cat(_T_3375, _T_3370) @[Cat.scala 29:58]
+    node _T_3377 = cat(_T_3376, _T_3368) @[Cat.scala 29:58]
+    buf_write_in <= _T_3377 @[el2_lsu_bus_buffer.scala 453:18]
+    node _T_3378 = eq(UInt<3>("h00"), buf_state[0]) @[Conditional.scala 37:30]
+    when _T_3378 : @[Conditional.scala 40:58]
+      node _T_3379 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 458:56]
+      node _T_3380 = mux(_T_3379, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:31]
+      buf_nxtstate[0] <= _T_3380 @[el2_lsu_bus_buffer.scala 458:25]
+      node _T_3381 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 459:45]
+      node _T_3382 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:77]
+      node _T_3383 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:97]
+      node _T_3384 = and(_T_3382, _T_3383) @[el2_lsu_bus_buffer.scala 459:95]
+      node _T_3385 = eq(UInt<1>("h00"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 459:117]
+      node _T_3386 = and(_T_3384, _T_3385) @[el2_lsu_bus_buffer.scala 459:112]
+      node _T_3387 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:144]
+      node _T_3388 = eq(UInt<1>("h00"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 459:166]
+      node _T_3389 = and(_T_3387, _T_3388) @[el2_lsu_bus_buffer.scala 459:161]
+      node _T_3390 = or(_T_3386, _T_3389) @[el2_lsu_bus_buffer.scala 459:132]
+      node _T_3391 = and(_T_3381, _T_3390) @[el2_lsu_bus_buffer.scala 459:63]
+      node _T_3392 = eq(UInt<1>("h00"), ibuf_tag) @[el2_lsu_bus_buffer.scala 459:206]
+      node _T_3393 = and(ibuf_drain_vld, _T_3392) @[el2_lsu_bus_buffer.scala 459:201]
+      node _T_3394 = or(_T_3391, _T_3393) @[el2_lsu_bus_buffer.scala 459:183]
+      buf_state_en[0] <= _T_3394 @[el2_lsu_bus_buffer.scala 459:25]
+      buf_wr_en[0] <= buf_state_en[0] @[el2_lsu_bus_buffer.scala 460:22]
+      buf_data_en[0] <= buf_state_en[0] @[el2_lsu_bus_buffer.scala 461:24]
+      node _T_3395 = eq(UInt<1>("h00"), ibuf_tag) @[el2_lsu_bus_buffer.scala 462:52]
+      node _T_3396 = and(ibuf_drain_vld, _T_3395) @[el2_lsu_bus_buffer.scala 462:47]
+      node _T_3397 = bits(_T_3396, 0, 0) @[el2_lsu_bus_buffer.scala 462:73]
+      node _T_3398 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 462:90]
+      node _T_3399 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 462:114]
+      node _T_3400 = mux(_T_3397, _T_3398, _T_3399) @[el2_lsu_bus_buffer.scala 462:30]
+      buf_data_in[0] <= _T_3400 @[el2_lsu_bus_buffer.scala 462:24]
+      skip @[Conditional.scala 40:58]
+    else : @[Conditional.scala 39:67]
+      node _T_3401 = eq(UInt<3>("h01"), buf_state[0]) @[Conditional.scala 37:30]
+      when _T_3401 : @[Conditional.scala 39:67]
+        node _T_3402 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 465:60]
+        node _T_3403 = mux(_T_3402, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 465:31]
+        buf_nxtstate[0] <= _T_3403 @[el2_lsu_bus_buffer.scala 465:25]
+        node _T_3404 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 466:46]
+        buf_state_en[0] <= _T_3404 @[el2_lsu_bus_buffer.scala 466:25]
+        skip @[Conditional.scala 39:67]
+      else : @[Conditional.scala 39:67]
+        node _T_3405 = eq(UInt<3>("h02"), buf_state[0]) @[Conditional.scala 37:30]
+        when _T_3405 : @[Conditional.scala 39:67]
+          node _T_3406 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 469:60]
+          node _T_3407 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 469:89]
+          node _T_3408 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 469:124]
+          node _T_3409 = and(_T_3407, _T_3408) @[el2_lsu_bus_buffer.scala 469:104]
+          node _T_3410 = mux(_T_3409, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 469:75]
+          node _T_3411 = mux(_T_3406, UInt<3>("h00"), _T_3410) @[el2_lsu_bus_buffer.scala 469:31]
+          buf_nxtstate[0] <= _T_3411 @[el2_lsu_bus_buffer.scala 469:25]
+          node _T_3412 = eq(obuf_tag0, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 470:48]
+          node _T_3413 = eq(obuf_tag1, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 470:104]
+          node _T_3414 = and(obuf_merge, _T_3413) @[el2_lsu_bus_buffer.scala 470:91]
+          node _T_3415 = or(_T_3412, _T_3414) @[el2_lsu_bus_buffer.scala 470:77]
+          node _T_3416 = and(_T_3415, obuf_valid) @[el2_lsu_bus_buffer.scala 470:135]
+          node _T_3417 = and(_T_3416, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 470:148]
+          buf_cmd_state_bus_en[0] <= _T_3417 @[el2_lsu_bus_buffer.scala 470:33]
+          buf_state_bus_en[0] <= buf_cmd_state_bus_en[0] @[el2_lsu_bus_buffer.scala 471:29]
+          node _T_3418 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 472:49]
+          node _T_3419 = or(_T_3418, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 472:70]
+          buf_state_en[0] <= _T_3419 @[el2_lsu_bus_buffer.scala 472:25]
+          buf_ldfwd_in[0] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 473:25]
+          node _T_3420 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 474:56]
+          node _T_3421 = eq(_T_3420, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 474:46]
+          node _T_3422 = and(buf_state_en[0], _T_3421) @[el2_lsu_bus_buffer.scala 474:44]
+          node _T_3423 = and(_T_3422, obuf_nosend) @[el2_lsu_bus_buffer.scala 474:60]
+          node _T_3424 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 474:76]
+          node _T_3425 = and(_T_3423, _T_3424) @[el2_lsu_bus_buffer.scala 474:74]
+          buf_ldfwd_en[0] <= _T_3425 @[el2_lsu_bus_buffer.scala 474:25]
+          node _T_3426 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 475:46]
+          buf_ldfwdtag_in[0] <= _T_3426 @[el2_lsu_bus_buffer.scala 475:28]
+          node _T_3427 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 476:47]
+          node _T_3428 = and(_T_3427, obuf_nosend) @[el2_lsu_bus_buffer.scala 476:67]
+          node _T_3429 = and(_T_3428, bus_rsp_read) @[el2_lsu_bus_buffer.scala 476:81]
+          buf_data_en[0] <= _T_3429 @[el2_lsu_bus_buffer.scala 476:24]
+          node _T_3430 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 477:48]
+          node _T_3431 = and(_T_3430, obuf_nosend) @[el2_lsu_bus_buffer.scala 477:68]
+          node _T_3432 = and(_T_3431, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 477:82]
+          buf_error_en[0] <= _T_3432 @[el2_lsu_bus_buffer.scala 477:25]
+          node _T_3433 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 478:61]
+          node _T_3434 = bits(buf_addr[0], 2, 2) @[el2_lsu_bus_buffer.scala 478:85]
+          node _T_3435 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 478:103]
+          node _T_3436 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 478:126]
+          node _T_3437 = mux(_T_3434, _T_3435, _T_3436) @[el2_lsu_bus_buffer.scala 478:73]
+          node _T_3438 = mux(buf_error_en[0], _T_3433, _T_3437) @[el2_lsu_bus_buffer.scala 478:30]
+          buf_data_in[0] <= _T_3438 @[el2_lsu_bus_buffer.scala 478:24]
+          skip @[Conditional.scala 39:67]
+        else : @[Conditional.scala 39:67]
+          node _T_3439 = eq(UInt<3>("h03"), buf_state[0]) @[Conditional.scala 37:30]
+          when _T_3439 : @[Conditional.scala 39:67]
+            node _T_3440 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 481:67]
+            node _T_3441 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 481:94]
+            node _T_3442 = eq(_T_3441, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 481:73]
+            node _T_3443 = and(_T_3440, _T_3442) @[el2_lsu_bus_buffer.scala 481:71]
+            node _T_3444 = or(io.dec_tlu_force_halt, _T_3443) @[el2_lsu_bus_buffer.scala 481:55]
+            node _T_3445 = bits(_T_3444, 0, 0) @[el2_lsu_bus_buffer.scala 481:125]
+            node _T_3446 = eq(buf_samedw[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 482:30]
+            node _T_3447 = and(buf_dual[0], _T_3446) @[el2_lsu_bus_buffer.scala 482:28]
+            node _T_3448 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 482:57]
+            node _T_3449 = eq(_T_3448, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 482:47]
+            node _T_3450 = and(_T_3447, _T_3449) @[el2_lsu_bus_buffer.scala 482:45]
+            node _T_3451 = neq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 482:90]
+            node _T_3452 = and(_T_3450, _T_3451) @[el2_lsu_bus_buffer.scala 482:61]
+            node _T_3453 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 483:27]
+            node _T_3454 = or(_T_3453, any_done_wait_state) @[el2_lsu_bus_buffer.scala 483:31]
+            node _T_3455 = eq(buf_samedw[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 483:70]
+            node _T_3456 = and(buf_dual[0], _T_3455) @[el2_lsu_bus_buffer.scala 483:68]
+            node _T_3457 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 483:97]
+            node _T_3458 = eq(_T_3457, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 483:87]
+            node _T_3459 = and(_T_3456, _T_3458) @[el2_lsu_bus_buffer.scala 483:85]
+            node _T_3460 = eq(buf_dualtag[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3461 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3462 = eq(buf_dualtag[0], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3463 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3464 = eq(buf_dualtag[0], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3465 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3466 = eq(buf_dualtag[0], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3467 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3468 = mux(_T_3460, _T_3461, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3469 = mux(_T_3462, _T_3463, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3470 = mux(_T_3464, _T_3465, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3471 = mux(_T_3466, _T_3467, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3472 = or(_T_3468, _T_3469) @[Mux.scala 27:72]
+            node _T_3473 = or(_T_3472, _T_3470) @[Mux.scala 27:72]
+            node _T_3474 = or(_T_3473, _T_3471) @[Mux.scala 27:72]
+            wire _T_3475 : UInt<1> @[Mux.scala 27:72]
+            _T_3475 <= _T_3474 @[Mux.scala 27:72]
+            node _T_3476 = and(_T_3459, _T_3475) @[el2_lsu_bus_buffer.scala 483:101]
+            node _T_3477 = eq(buf_state[buf_dualtag[0]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 483:167]
+            node _T_3478 = and(_T_3476, _T_3477) @[el2_lsu_bus_buffer.scala 483:138]
+            node _T_3479 = and(_T_3478, any_done_wait_state) @[el2_lsu_bus_buffer.scala 483:187]
+            node _T_3480 = or(_T_3454, _T_3479) @[el2_lsu_bus_buffer.scala 483:53]
+            node _T_3481 = mux(_T_3480, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 483:16]
+            node _T_3482 = mux(_T_3452, UInt<3>("h04"), _T_3481) @[el2_lsu_bus_buffer.scala 482:14]
+            node _T_3483 = mux(_T_3445, UInt<3>("h00"), _T_3482) @[el2_lsu_bus_buffer.scala 481:31]
+            buf_nxtstate[0] <= _T_3483 @[el2_lsu_bus_buffer.scala 481:25]
+            node _T_3484 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 484:73]
+            node _T_3485 = and(bus_rsp_write, _T_3484) @[el2_lsu_bus_buffer.scala 484:52]
+            node _T_3486 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 485:46]
+            node _T_3487 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 486:23]
+            node _T_3488 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[el2_lsu_bus_buffer.scala 486:47]
+            node _T_3489 = and(_T_3487, _T_3488) @[el2_lsu_bus_buffer.scala 486:27]
+            node _T_3490 = or(_T_3486, _T_3489) @[el2_lsu_bus_buffer.scala 485:77]
+            node _T_3491 = and(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 487:26]
+            node _T_3492 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 487:54]
+            node _T_3493 = not(_T_3492) @[el2_lsu_bus_buffer.scala 487:44]
+            node _T_3494 = and(_T_3491, _T_3493) @[el2_lsu_bus_buffer.scala 487:42]
+            node _T_3495 = and(_T_3494, buf_samedw[0]) @[el2_lsu_bus_buffer.scala 487:58]
+            node _T_3496 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 487:94]
+            node _T_3497 = and(_T_3495, _T_3496) @[el2_lsu_bus_buffer.scala 487:74]
+            node _T_3498 = or(_T_3490, _T_3497) @[el2_lsu_bus_buffer.scala 486:71]
+            node _T_3499 = and(bus_rsp_read, _T_3498) @[el2_lsu_bus_buffer.scala 485:25]
+            node _T_3500 = or(_T_3485, _T_3499) @[el2_lsu_bus_buffer.scala 484:105]
+            buf_resp_state_bus_en[0] <= _T_3500 @[el2_lsu_bus_buffer.scala 484:34]
+            buf_state_bus_en[0] <= buf_resp_state_bus_en[0] @[el2_lsu_bus_buffer.scala 488:29]
+            node _T_3501 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 489:49]
+            node _T_3502 = or(_T_3501, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 489:70]
+            buf_state_en[0] <= _T_3502 @[el2_lsu_bus_buffer.scala 489:25]
+            node _T_3503 = and(buf_state_bus_en[0], bus_rsp_read) @[el2_lsu_bus_buffer.scala 490:47]
+            node _T_3504 = and(_T_3503, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 490:62]
+            buf_data_en[0] <= _T_3504 @[el2_lsu_bus_buffer.scala 490:24]
+            node _T_3505 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 491:48]
+            node _T_3506 = eq(bus_rsp_read_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 491:111]
+            node _T_3507 = and(bus_rsp_read_error, _T_3506) @[el2_lsu_bus_buffer.scala 491:91]
+            node _T_3508 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 492:42]
+            node _T_3509 = and(bus_rsp_read_error, _T_3508) @[el2_lsu_bus_buffer.scala 492:31]
+            node _T_3510 = eq(bus_rsp_read_tag, buf_ldfwdtag[0]) @[el2_lsu_bus_buffer.scala 492:66]
+            node _T_3511 = and(_T_3509, _T_3510) @[el2_lsu_bus_buffer.scala 492:46]
+            node _T_3512 = or(_T_3507, _T_3511) @[el2_lsu_bus_buffer.scala 491:143]
+            node _T_3513 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 493:32]
+            node _T_3514 = eq(bus_rsp_write_tag, UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 493:74]
+            node _T_3515 = and(_T_3513, _T_3514) @[el2_lsu_bus_buffer.scala 493:53]
+            node _T_3516 = or(_T_3512, _T_3515) @[el2_lsu_bus_buffer.scala 492:88]
+            node _T_3517 = and(_T_3505, _T_3516) @[el2_lsu_bus_buffer.scala 491:68]
+            buf_error_en[0] <= _T_3517 @[el2_lsu_bus_buffer.scala 491:25]
+            node _T_3518 = eq(buf_error_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 494:50]
+            node _T_3519 = and(buf_state_en[0], _T_3518) @[el2_lsu_bus_buffer.scala 494:48]
+            node _T_3520 = bits(buf_addr[0], 2, 2) @[el2_lsu_bus_buffer.scala 494:84]
+            node _T_3521 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 494:102]
+            node _T_3522 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 494:125]
+            node _T_3523 = mux(_T_3520, _T_3521, _T_3522) @[el2_lsu_bus_buffer.scala 494:72]
+            node _T_3524 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 494:148]
+            node _T_3525 = mux(_T_3519, _T_3523, _T_3524) @[el2_lsu_bus_buffer.scala 494:30]
+            buf_data_in[0] <= _T_3525 @[el2_lsu_bus_buffer.scala 494:24]
+            skip @[Conditional.scala 39:67]
+          else : @[Conditional.scala 39:67]
+            node _T_3526 = eq(UInt<3>("h04"), buf_state[0]) @[Conditional.scala 37:30]
+            when _T_3526 : @[Conditional.scala 39:67]
+              node _T_3527 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 497:60]
+              node _T_3528 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 497:86]
+              node _T_3529 = dshr(buf_ldfwd, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 497:101]
+              node _T_3530 = bits(_T_3529, 0, 0) @[el2_lsu_bus_buffer.scala 497:101]
+              node _T_3531 = or(_T_3528, _T_3530) @[el2_lsu_bus_buffer.scala 497:90]
+              node _T_3532 = or(_T_3531, any_done_wait_state) @[el2_lsu_bus_buffer.scala 497:118]
+              node _T_3533 = mux(_T_3532, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 497:75]
+              node _T_3534 = mux(_T_3527, UInt<3>("h00"), _T_3533) @[el2_lsu_bus_buffer.scala 497:31]
+              buf_nxtstate[0] <= _T_3534 @[el2_lsu_bus_buffer.scala 497:25]
+              node _T_3535 = eq(bus_rsp_read_tag, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 498:66]
+              node _T_3536 = dshr(buf_ldfwd, buf_dualtag[0]) @[el2_lsu_bus_buffer.scala 499:21]
+              node _T_3537 = bits(_T_3536, 0, 0) @[el2_lsu_bus_buffer.scala 499:21]
+              node _T_3538 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[0]]) @[el2_lsu_bus_buffer.scala 499:58]
+              node _T_3539 = and(_T_3537, _T_3538) @[el2_lsu_bus_buffer.scala 499:38]
+              node _T_3540 = or(_T_3535, _T_3539) @[el2_lsu_bus_buffer.scala 498:95]
+              node _T_3541 = and(bus_rsp_read, _T_3540) @[el2_lsu_bus_buffer.scala 498:45]
+              buf_state_bus_en[0] <= _T_3541 @[el2_lsu_bus_buffer.scala 498:29]
+              node _T_3542 = and(buf_state_bus_en[0], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 500:49]
+              node _T_3543 = or(_T_3542, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 500:70]
+              buf_state_en[0] <= _T_3543 @[el2_lsu_bus_buffer.scala 500:25]
+              skip @[Conditional.scala 39:67]
+            else : @[Conditional.scala 39:67]
+              node _T_3544 = eq(UInt<3>("h05"), buf_state[0]) @[Conditional.scala 37:30]
+              when _T_3544 : @[Conditional.scala 39:67]
+                node _T_3545 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 503:60]
+                node _T_3546 = mux(_T_3545, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 503:31]
+                buf_nxtstate[0] <= _T_3546 @[el2_lsu_bus_buffer.scala 503:25]
+                node _T_3547 = eq(RspPtr, UInt<2>("h00")) @[el2_lsu_bus_buffer.scala 504:37]
+                node _T_3548 = eq(buf_dualtag[0], RspPtr) @[el2_lsu_bus_buffer.scala 504:98]
+                node _T_3549 = and(buf_dual[0], _T_3548) @[el2_lsu_bus_buffer.scala 504:80]
+                node _T_3550 = or(_T_3547, _T_3549) @[el2_lsu_bus_buffer.scala 504:65]
+                node _T_3551 = or(_T_3550, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 504:112]
+                buf_state_en[0] <= _T_3551 @[el2_lsu_bus_buffer.scala 504:25]
+                skip @[Conditional.scala 39:67]
+              else : @[Conditional.scala 39:67]
+                node _T_3552 = eq(UInt<3>("h06"), buf_state[0]) @[Conditional.scala 37:30]
+                when _T_3552 : @[Conditional.scala 39:67]
+                  buf_nxtstate[0] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 507:25]
+                  buf_rst[0] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 508:20]
+                  buf_state_en[0] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25]
+                  buf_ldfwd_in[0] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 510:25]
+                  buf_ldfwd_en[0] <= buf_state_en[0] @[el2_lsu_bus_buffer.scala 511:25]
+                  skip @[Conditional.scala 39:67]
+    node _T_3553 = bits(buf_state_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 514:108]
+    reg _T_3554 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3553 : @[Reg.scala 28:19]
+      _T_3554 <= buf_nxtstate[0] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_state[0] <= _T_3554 @[el2_lsu_bus_buffer.scala 514:18]
+    reg _T_3555 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 515:60]
+    _T_3555 <= buf_age_in_0 @[el2_lsu_bus_buffer.scala 515:60]
+    buf_ageQ[0] <= _T_3555 @[el2_lsu_bus_buffer.scala 515:17]
+    reg _T_3556 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 516:63]
+    _T_3556 <= buf_rspage_in[0] @[el2_lsu_bus_buffer.scala 516:63]
+    buf_rspageQ[0] <= _T_3556 @[el2_lsu_bus_buffer.scala 516:20]
+    node _T_3557 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 517:109]
+    reg _T_3558 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3557 : @[Reg.scala 28:19]
+      _T_3558 <= buf_dualtag_in[0] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dualtag[0] <= _T_3558 @[el2_lsu_bus_buffer.scala 517:20]
+    node _T_3559 = bits(buf_dual_in, 0, 0) @[el2_lsu_bus_buffer.scala 518:74]
+    node _T_3560 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 518:107]
+    reg _T_3561 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3560 : @[Reg.scala 28:19]
+      _T_3561 <= _T_3559 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dual[0] <= _T_3561 @[el2_lsu_bus_buffer.scala 518:17]
+    node _T_3562 = bits(buf_samedw_in, 0, 0) @[el2_lsu_bus_buffer.scala 519:78]
+    node _T_3563 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 519:111]
+    reg _T_3564 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3563 : @[Reg.scala 28:19]
+      _T_3564 <= _T_3562 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_samedw[0] <= _T_3564 @[el2_lsu_bus_buffer.scala 519:19]
+    node _T_3565 = bits(buf_nomerge_in, 0, 0) @[el2_lsu_bus_buffer.scala 520:80]
+    node _T_3566 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 520:113]
+    reg _T_3567 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3566 : @[Reg.scala 28:19]
+      _T_3567 <= _T_3565 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_nomerge[0] <= _T_3567 @[el2_lsu_bus_buffer.scala 520:20]
+    node _T_3568 = bits(buf_dualhi_in, 0, 0) @[el2_lsu_bus_buffer.scala 521:78]
+    node _T_3569 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 521:111]
+    reg _T_3570 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3569 : @[Reg.scala 28:19]
+      _T_3570 <= _T_3568 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dualhi[0] <= _T_3570 @[el2_lsu_bus_buffer.scala 521:19]
+    node _T_3571 = eq(UInt<3>("h00"), buf_state[1]) @[Conditional.scala 37:30]
+    when _T_3571 : @[Conditional.scala 40:58]
+      node _T_3572 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 458:56]
+      node _T_3573 = mux(_T_3572, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:31]
+      buf_nxtstate[1] <= _T_3573 @[el2_lsu_bus_buffer.scala 458:25]
+      node _T_3574 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 459:45]
+      node _T_3575 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:77]
+      node _T_3576 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:97]
+      node _T_3577 = and(_T_3575, _T_3576) @[el2_lsu_bus_buffer.scala 459:95]
+      node _T_3578 = eq(UInt<1>("h01"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 459:117]
+      node _T_3579 = and(_T_3577, _T_3578) @[el2_lsu_bus_buffer.scala 459:112]
+      node _T_3580 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:144]
+      node _T_3581 = eq(UInt<1>("h01"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 459:166]
+      node _T_3582 = and(_T_3580, _T_3581) @[el2_lsu_bus_buffer.scala 459:161]
+      node _T_3583 = or(_T_3579, _T_3582) @[el2_lsu_bus_buffer.scala 459:132]
+      node _T_3584 = and(_T_3574, _T_3583) @[el2_lsu_bus_buffer.scala 459:63]
+      node _T_3585 = eq(UInt<1>("h01"), ibuf_tag) @[el2_lsu_bus_buffer.scala 459:206]
+      node _T_3586 = and(ibuf_drain_vld, _T_3585) @[el2_lsu_bus_buffer.scala 459:201]
+      node _T_3587 = or(_T_3584, _T_3586) @[el2_lsu_bus_buffer.scala 459:183]
+      buf_state_en[1] <= _T_3587 @[el2_lsu_bus_buffer.scala 459:25]
+      buf_wr_en[1] <= buf_state_en[1] @[el2_lsu_bus_buffer.scala 460:22]
+      buf_data_en[1] <= buf_state_en[1] @[el2_lsu_bus_buffer.scala 461:24]
+      node _T_3588 = eq(UInt<1>("h01"), ibuf_tag) @[el2_lsu_bus_buffer.scala 462:52]
+      node _T_3589 = and(ibuf_drain_vld, _T_3588) @[el2_lsu_bus_buffer.scala 462:47]
+      node _T_3590 = bits(_T_3589, 0, 0) @[el2_lsu_bus_buffer.scala 462:73]
+      node _T_3591 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 462:90]
+      node _T_3592 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 462:114]
+      node _T_3593 = mux(_T_3590, _T_3591, _T_3592) @[el2_lsu_bus_buffer.scala 462:30]
+      buf_data_in[1] <= _T_3593 @[el2_lsu_bus_buffer.scala 462:24]
+      skip @[Conditional.scala 40:58]
+    else : @[Conditional.scala 39:67]
+      node _T_3594 = eq(UInt<3>("h01"), buf_state[1]) @[Conditional.scala 37:30]
+      when _T_3594 : @[Conditional.scala 39:67]
+        node _T_3595 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 465:60]
+        node _T_3596 = mux(_T_3595, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 465:31]
+        buf_nxtstate[1] <= _T_3596 @[el2_lsu_bus_buffer.scala 465:25]
+        node _T_3597 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 466:46]
+        buf_state_en[1] <= _T_3597 @[el2_lsu_bus_buffer.scala 466:25]
+        skip @[Conditional.scala 39:67]
+      else : @[Conditional.scala 39:67]
+        node _T_3598 = eq(UInt<3>("h02"), buf_state[1]) @[Conditional.scala 37:30]
+        when _T_3598 : @[Conditional.scala 39:67]
+          node _T_3599 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 469:60]
+          node _T_3600 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 469:89]
+          node _T_3601 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 469:124]
+          node _T_3602 = and(_T_3600, _T_3601) @[el2_lsu_bus_buffer.scala 469:104]
+          node _T_3603 = mux(_T_3602, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 469:75]
+          node _T_3604 = mux(_T_3599, UInt<3>("h00"), _T_3603) @[el2_lsu_bus_buffer.scala 469:31]
+          buf_nxtstate[1] <= _T_3604 @[el2_lsu_bus_buffer.scala 469:25]
+          node _T_3605 = eq(obuf_tag0, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 470:48]
+          node _T_3606 = eq(obuf_tag1, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 470:104]
+          node _T_3607 = and(obuf_merge, _T_3606) @[el2_lsu_bus_buffer.scala 470:91]
+          node _T_3608 = or(_T_3605, _T_3607) @[el2_lsu_bus_buffer.scala 470:77]
+          node _T_3609 = and(_T_3608, obuf_valid) @[el2_lsu_bus_buffer.scala 470:135]
+          node _T_3610 = and(_T_3609, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 470:148]
+          buf_cmd_state_bus_en[1] <= _T_3610 @[el2_lsu_bus_buffer.scala 470:33]
+          buf_state_bus_en[1] <= buf_cmd_state_bus_en[1] @[el2_lsu_bus_buffer.scala 471:29]
+          node _T_3611 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 472:49]
+          node _T_3612 = or(_T_3611, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 472:70]
+          buf_state_en[1] <= _T_3612 @[el2_lsu_bus_buffer.scala 472:25]
+          buf_ldfwd_in[1] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 473:25]
+          node _T_3613 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 474:56]
+          node _T_3614 = eq(_T_3613, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 474:46]
+          node _T_3615 = and(buf_state_en[1], _T_3614) @[el2_lsu_bus_buffer.scala 474:44]
+          node _T_3616 = and(_T_3615, obuf_nosend) @[el2_lsu_bus_buffer.scala 474:60]
+          node _T_3617 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 474:76]
+          node _T_3618 = and(_T_3616, _T_3617) @[el2_lsu_bus_buffer.scala 474:74]
+          buf_ldfwd_en[1] <= _T_3618 @[el2_lsu_bus_buffer.scala 474:25]
+          node _T_3619 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 475:46]
+          buf_ldfwdtag_in[1] <= _T_3619 @[el2_lsu_bus_buffer.scala 475:28]
+          node _T_3620 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 476:47]
+          node _T_3621 = and(_T_3620, obuf_nosend) @[el2_lsu_bus_buffer.scala 476:67]
+          node _T_3622 = and(_T_3621, bus_rsp_read) @[el2_lsu_bus_buffer.scala 476:81]
+          buf_data_en[1] <= _T_3622 @[el2_lsu_bus_buffer.scala 476:24]
+          node _T_3623 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 477:48]
+          node _T_3624 = and(_T_3623, obuf_nosend) @[el2_lsu_bus_buffer.scala 477:68]
+          node _T_3625 = and(_T_3624, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 477:82]
+          buf_error_en[1] <= _T_3625 @[el2_lsu_bus_buffer.scala 477:25]
+          node _T_3626 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 478:61]
+          node _T_3627 = bits(buf_addr[1], 2, 2) @[el2_lsu_bus_buffer.scala 478:85]
+          node _T_3628 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 478:103]
+          node _T_3629 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 478:126]
+          node _T_3630 = mux(_T_3627, _T_3628, _T_3629) @[el2_lsu_bus_buffer.scala 478:73]
+          node _T_3631 = mux(buf_error_en[1], _T_3626, _T_3630) @[el2_lsu_bus_buffer.scala 478:30]
+          buf_data_in[1] <= _T_3631 @[el2_lsu_bus_buffer.scala 478:24]
+          skip @[Conditional.scala 39:67]
+        else : @[Conditional.scala 39:67]
+          node _T_3632 = eq(UInt<3>("h03"), buf_state[1]) @[Conditional.scala 37:30]
+          when _T_3632 : @[Conditional.scala 39:67]
+            node _T_3633 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 481:67]
+            node _T_3634 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 481:94]
+            node _T_3635 = eq(_T_3634, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 481:73]
+            node _T_3636 = and(_T_3633, _T_3635) @[el2_lsu_bus_buffer.scala 481:71]
+            node _T_3637 = or(io.dec_tlu_force_halt, _T_3636) @[el2_lsu_bus_buffer.scala 481:55]
+            node _T_3638 = bits(_T_3637, 0, 0) @[el2_lsu_bus_buffer.scala 481:125]
+            node _T_3639 = eq(buf_samedw[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 482:30]
+            node _T_3640 = and(buf_dual[1], _T_3639) @[el2_lsu_bus_buffer.scala 482:28]
+            node _T_3641 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 482:57]
+            node _T_3642 = eq(_T_3641, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 482:47]
+            node _T_3643 = and(_T_3640, _T_3642) @[el2_lsu_bus_buffer.scala 482:45]
+            node _T_3644 = neq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 482:90]
+            node _T_3645 = and(_T_3643, _T_3644) @[el2_lsu_bus_buffer.scala 482:61]
+            node _T_3646 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 483:27]
+            node _T_3647 = or(_T_3646, any_done_wait_state) @[el2_lsu_bus_buffer.scala 483:31]
+            node _T_3648 = eq(buf_samedw[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 483:70]
+            node _T_3649 = and(buf_dual[1], _T_3648) @[el2_lsu_bus_buffer.scala 483:68]
+            node _T_3650 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 483:97]
+            node _T_3651 = eq(_T_3650, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 483:87]
+            node _T_3652 = and(_T_3649, _T_3651) @[el2_lsu_bus_buffer.scala 483:85]
+            node _T_3653 = eq(buf_dualtag[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3654 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3655 = eq(buf_dualtag[1], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3656 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3657 = eq(buf_dualtag[1], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3658 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3659 = eq(buf_dualtag[1], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3660 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3661 = mux(_T_3653, _T_3654, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3662 = mux(_T_3655, _T_3656, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3663 = mux(_T_3657, _T_3658, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3664 = mux(_T_3659, _T_3660, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3665 = or(_T_3661, _T_3662) @[Mux.scala 27:72]
+            node _T_3666 = or(_T_3665, _T_3663) @[Mux.scala 27:72]
+            node _T_3667 = or(_T_3666, _T_3664) @[Mux.scala 27:72]
+            wire _T_3668 : UInt<1> @[Mux.scala 27:72]
+            _T_3668 <= _T_3667 @[Mux.scala 27:72]
+            node _T_3669 = and(_T_3652, _T_3668) @[el2_lsu_bus_buffer.scala 483:101]
+            node _T_3670 = eq(buf_state[buf_dualtag[1]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 483:167]
+            node _T_3671 = and(_T_3669, _T_3670) @[el2_lsu_bus_buffer.scala 483:138]
+            node _T_3672 = and(_T_3671, any_done_wait_state) @[el2_lsu_bus_buffer.scala 483:187]
+            node _T_3673 = or(_T_3647, _T_3672) @[el2_lsu_bus_buffer.scala 483:53]
+            node _T_3674 = mux(_T_3673, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 483:16]
+            node _T_3675 = mux(_T_3645, UInt<3>("h04"), _T_3674) @[el2_lsu_bus_buffer.scala 482:14]
+            node _T_3676 = mux(_T_3638, UInt<3>("h00"), _T_3675) @[el2_lsu_bus_buffer.scala 481:31]
+            buf_nxtstate[1] <= _T_3676 @[el2_lsu_bus_buffer.scala 481:25]
+            node _T_3677 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 484:73]
+            node _T_3678 = and(bus_rsp_write, _T_3677) @[el2_lsu_bus_buffer.scala 484:52]
+            node _T_3679 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 485:46]
+            node _T_3680 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 486:23]
+            node _T_3681 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[el2_lsu_bus_buffer.scala 486:47]
+            node _T_3682 = and(_T_3680, _T_3681) @[el2_lsu_bus_buffer.scala 486:27]
+            node _T_3683 = or(_T_3679, _T_3682) @[el2_lsu_bus_buffer.scala 485:77]
+            node _T_3684 = and(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 487:26]
+            node _T_3685 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 487:54]
+            node _T_3686 = not(_T_3685) @[el2_lsu_bus_buffer.scala 487:44]
+            node _T_3687 = and(_T_3684, _T_3686) @[el2_lsu_bus_buffer.scala 487:42]
+            node _T_3688 = and(_T_3687, buf_samedw[1]) @[el2_lsu_bus_buffer.scala 487:58]
+            node _T_3689 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 487:94]
+            node _T_3690 = and(_T_3688, _T_3689) @[el2_lsu_bus_buffer.scala 487:74]
+            node _T_3691 = or(_T_3683, _T_3690) @[el2_lsu_bus_buffer.scala 486:71]
+            node _T_3692 = and(bus_rsp_read, _T_3691) @[el2_lsu_bus_buffer.scala 485:25]
+            node _T_3693 = or(_T_3678, _T_3692) @[el2_lsu_bus_buffer.scala 484:105]
+            buf_resp_state_bus_en[1] <= _T_3693 @[el2_lsu_bus_buffer.scala 484:34]
+            buf_state_bus_en[1] <= buf_resp_state_bus_en[1] @[el2_lsu_bus_buffer.scala 488:29]
+            node _T_3694 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 489:49]
+            node _T_3695 = or(_T_3694, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 489:70]
+            buf_state_en[1] <= _T_3695 @[el2_lsu_bus_buffer.scala 489:25]
+            node _T_3696 = and(buf_state_bus_en[1], bus_rsp_read) @[el2_lsu_bus_buffer.scala 490:47]
+            node _T_3697 = and(_T_3696, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 490:62]
+            buf_data_en[1] <= _T_3697 @[el2_lsu_bus_buffer.scala 490:24]
+            node _T_3698 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 491:48]
+            node _T_3699 = eq(bus_rsp_read_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 491:111]
+            node _T_3700 = and(bus_rsp_read_error, _T_3699) @[el2_lsu_bus_buffer.scala 491:91]
+            node _T_3701 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 492:42]
+            node _T_3702 = and(bus_rsp_read_error, _T_3701) @[el2_lsu_bus_buffer.scala 492:31]
+            node _T_3703 = eq(bus_rsp_read_tag, buf_ldfwdtag[1]) @[el2_lsu_bus_buffer.scala 492:66]
+            node _T_3704 = and(_T_3702, _T_3703) @[el2_lsu_bus_buffer.scala 492:46]
+            node _T_3705 = or(_T_3700, _T_3704) @[el2_lsu_bus_buffer.scala 491:143]
+            node _T_3706 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 493:32]
+            node _T_3707 = eq(bus_rsp_write_tag, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 493:74]
+            node _T_3708 = and(_T_3706, _T_3707) @[el2_lsu_bus_buffer.scala 493:53]
+            node _T_3709 = or(_T_3705, _T_3708) @[el2_lsu_bus_buffer.scala 492:88]
+            node _T_3710 = and(_T_3698, _T_3709) @[el2_lsu_bus_buffer.scala 491:68]
+            buf_error_en[1] <= _T_3710 @[el2_lsu_bus_buffer.scala 491:25]
+            node _T_3711 = eq(buf_error_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 494:50]
+            node _T_3712 = and(buf_state_en[1], _T_3711) @[el2_lsu_bus_buffer.scala 494:48]
+            node _T_3713 = bits(buf_addr[1], 2, 2) @[el2_lsu_bus_buffer.scala 494:84]
+            node _T_3714 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 494:102]
+            node _T_3715 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 494:125]
+            node _T_3716 = mux(_T_3713, _T_3714, _T_3715) @[el2_lsu_bus_buffer.scala 494:72]
+            node _T_3717 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 494:148]
+            node _T_3718 = mux(_T_3712, _T_3716, _T_3717) @[el2_lsu_bus_buffer.scala 494:30]
+            buf_data_in[1] <= _T_3718 @[el2_lsu_bus_buffer.scala 494:24]
+            skip @[Conditional.scala 39:67]
+          else : @[Conditional.scala 39:67]
+            node _T_3719 = eq(UInt<3>("h04"), buf_state[1]) @[Conditional.scala 37:30]
+            when _T_3719 : @[Conditional.scala 39:67]
+              node _T_3720 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 497:60]
+              node _T_3721 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 497:86]
+              node _T_3722 = dshr(buf_ldfwd, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 497:101]
+              node _T_3723 = bits(_T_3722, 0, 0) @[el2_lsu_bus_buffer.scala 497:101]
+              node _T_3724 = or(_T_3721, _T_3723) @[el2_lsu_bus_buffer.scala 497:90]
+              node _T_3725 = or(_T_3724, any_done_wait_state) @[el2_lsu_bus_buffer.scala 497:118]
+              node _T_3726 = mux(_T_3725, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 497:75]
+              node _T_3727 = mux(_T_3720, UInt<3>("h00"), _T_3726) @[el2_lsu_bus_buffer.scala 497:31]
+              buf_nxtstate[1] <= _T_3727 @[el2_lsu_bus_buffer.scala 497:25]
+              node _T_3728 = eq(bus_rsp_read_tag, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 498:66]
+              node _T_3729 = dshr(buf_ldfwd, buf_dualtag[1]) @[el2_lsu_bus_buffer.scala 499:21]
+              node _T_3730 = bits(_T_3729, 0, 0) @[el2_lsu_bus_buffer.scala 499:21]
+              node _T_3731 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[1]]) @[el2_lsu_bus_buffer.scala 499:58]
+              node _T_3732 = and(_T_3730, _T_3731) @[el2_lsu_bus_buffer.scala 499:38]
+              node _T_3733 = or(_T_3728, _T_3732) @[el2_lsu_bus_buffer.scala 498:95]
+              node _T_3734 = and(bus_rsp_read, _T_3733) @[el2_lsu_bus_buffer.scala 498:45]
+              buf_state_bus_en[1] <= _T_3734 @[el2_lsu_bus_buffer.scala 498:29]
+              node _T_3735 = and(buf_state_bus_en[1], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 500:49]
+              node _T_3736 = or(_T_3735, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 500:70]
+              buf_state_en[1] <= _T_3736 @[el2_lsu_bus_buffer.scala 500:25]
+              skip @[Conditional.scala 39:67]
+            else : @[Conditional.scala 39:67]
+              node _T_3737 = eq(UInt<3>("h05"), buf_state[1]) @[Conditional.scala 37:30]
+              when _T_3737 : @[Conditional.scala 39:67]
+                node _T_3738 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 503:60]
+                node _T_3739 = mux(_T_3738, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 503:31]
+                buf_nxtstate[1] <= _T_3739 @[el2_lsu_bus_buffer.scala 503:25]
+                node _T_3740 = eq(RspPtr, UInt<2>("h01")) @[el2_lsu_bus_buffer.scala 504:37]
+                node _T_3741 = eq(buf_dualtag[1], RspPtr) @[el2_lsu_bus_buffer.scala 504:98]
+                node _T_3742 = and(buf_dual[1], _T_3741) @[el2_lsu_bus_buffer.scala 504:80]
+                node _T_3743 = or(_T_3740, _T_3742) @[el2_lsu_bus_buffer.scala 504:65]
+                node _T_3744 = or(_T_3743, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 504:112]
+                buf_state_en[1] <= _T_3744 @[el2_lsu_bus_buffer.scala 504:25]
+                skip @[Conditional.scala 39:67]
+              else : @[Conditional.scala 39:67]
+                node _T_3745 = eq(UInt<3>("h06"), buf_state[1]) @[Conditional.scala 37:30]
+                when _T_3745 : @[Conditional.scala 39:67]
+                  buf_nxtstate[1] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 507:25]
+                  buf_rst[1] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 508:20]
+                  buf_state_en[1] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25]
+                  buf_ldfwd_in[1] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 510:25]
+                  buf_ldfwd_en[1] <= buf_state_en[1] @[el2_lsu_bus_buffer.scala 511:25]
+                  skip @[Conditional.scala 39:67]
+    node _T_3746 = bits(buf_state_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 514:108]
+    reg _T_3747 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3746 : @[Reg.scala 28:19]
+      _T_3747 <= buf_nxtstate[1] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_state[1] <= _T_3747 @[el2_lsu_bus_buffer.scala 514:18]
+    reg _T_3748 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 515:60]
+    _T_3748 <= buf_age_in_1 @[el2_lsu_bus_buffer.scala 515:60]
+    buf_ageQ[1] <= _T_3748 @[el2_lsu_bus_buffer.scala 515:17]
+    reg _T_3749 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 516:63]
+    _T_3749 <= buf_rspage_in[1] @[el2_lsu_bus_buffer.scala 516:63]
+    buf_rspageQ[1] <= _T_3749 @[el2_lsu_bus_buffer.scala 516:20]
+    node _T_3750 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 517:109]
+    reg _T_3751 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3750 : @[Reg.scala 28:19]
+      _T_3751 <= buf_dualtag_in[1] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dualtag[1] <= _T_3751 @[el2_lsu_bus_buffer.scala 517:20]
+    node _T_3752 = bits(buf_dual_in, 1, 1) @[el2_lsu_bus_buffer.scala 518:74]
+    node _T_3753 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 518:107]
+    reg _T_3754 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3753 : @[Reg.scala 28:19]
+      _T_3754 <= _T_3752 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dual[1] <= _T_3754 @[el2_lsu_bus_buffer.scala 518:17]
+    node _T_3755 = bits(buf_samedw_in, 1, 1) @[el2_lsu_bus_buffer.scala 519:78]
+    node _T_3756 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 519:111]
+    reg _T_3757 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3756 : @[Reg.scala 28:19]
+      _T_3757 <= _T_3755 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_samedw[1] <= _T_3757 @[el2_lsu_bus_buffer.scala 519:19]
+    node _T_3758 = bits(buf_nomerge_in, 1, 1) @[el2_lsu_bus_buffer.scala 520:80]
+    node _T_3759 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 520:113]
+    reg _T_3760 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3759 : @[Reg.scala 28:19]
+      _T_3760 <= _T_3758 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_nomerge[1] <= _T_3760 @[el2_lsu_bus_buffer.scala 520:20]
+    node _T_3761 = bits(buf_dualhi_in, 1, 1) @[el2_lsu_bus_buffer.scala 521:78]
+    node _T_3762 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 521:111]
+    reg _T_3763 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3762 : @[Reg.scala 28:19]
+      _T_3763 <= _T_3761 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dualhi[1] <= _T_3763 @[el2_lsu_bus_buffer.scala 521:19]
+    node _T_3764 = eq(UInt<3>("h00"), buf_state[2]) @[Conditional.scala 37:30]
+    when _T_3764 : @[Conditional.scala 40:58]
+      node _T_3765 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 458:56]
+      node _T_3766 = mux(_T_3765, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:31]
+      buf_nxtstate[2] <= _T_3766 @[el2_lsu_bus_buffer.scala 458:25]
+      node _T_3767 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 459:45]
+      node _T_3768 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:77]
+      node _T_3769 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:97]
+      node _T_3770 = and(_T_3768, _T_3769) @[el2_lsu_bus_buffer.scala 459:95]
+      node _T_3771 = eq(UInt<2>("h02"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 459:117]
+      node _T_3772 = and(_T_3770, _T_3771) @[el2_lsu_bus_buffer.scala 459:112]
+      node _T_3773 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:144]
+      node _T_3774 = eq(UInt<2>("h02"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 459:166]
+      node _T_3775 = and(_T_3773, _T_3774) @[el2_lsu_bus_buffer.scala 459:161]
+      node _T_3776 = or(_T_3772, _T_3775) @[el2_lsu_bus_buffer.scala 459:132]
+      node _T_3777 = and(_T_3767, _T_3776) @[el2_lsu_bus_buffer.scala 459:63]
+      node _T_3778 = eq(UInt<2>("h02"), ibuf_tag) @[el2_lsu_bus_buffer.scala 459:206]
+      node _T_3779 = and(ibuf_drain_vld, _T_3778) @[el2_lsu_bus_buffer.scala 459:201]
+      node _T_3780 = or(_T_3777, _T_3779) @[el2_lsu_bus_buffer.scala 459:183]
+      buf_state_en[2] <= _T_3780 @[el2_lsu_bus_buffer.scala 459:25]
+      buf_wr_en[2] <= buf_state_en[2] @[el2_lsu_bus_buffer.scala 460:22]
+      buf_data_en[2] <= buf_state_en[2] @[el2_lsu_bus_buffer.scala 461:24]
+      node _T_3781 = eq(UInt<2>("h02"), ibuf_tag) @[el2_lsu_bus_buffer.scala 462:52]
+      node _T_3782 = and(ibuf_drain_vld, _T_3781) @[el2_lsu_bus_buffer.scala 462:47]
+      node _T_3783 = bits(_T_3782, 0, 0) @[el2_lsu_bus_buffer.scala 462:73]
+      node _T_3784 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 462:90]
+      node _T_3785 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 462:114]
+      node _T_3786 = mux(_T_3783, _T_3784, _T_3785) @[el2_lsu_bus_buffer.scala 462:30]
+      buf_data_in[2] <= _T_3786 @[el2_lsu_bus_buffer.scala 462:24]
+      skip @[Conditional.scala 40:58]
+    else : @[Conditional.scala 39:67]
+      node _T_3787 = eq(UInt<3>("h01"), buf_state[2]) @[Conditional.scala 37:30]
+      when _T_3787 : @[Conditional.scala 39:67]
+        node _T_3788 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 465:60]
+        node _T_3789 = mux(_T_3788, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 465:31]
+        buf_nxtstate[2] <= _T_3789 @[el2_lsu_bus_buffer.scala 465:25]
+        node _T_3790 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 466:46]
+        buf_state_en[2] <= _T_3790 @[el2_lsu_bus_buffer.scala 466:25]
+        skip @[Conditional.scala 39:67]
+      else : @[Conditional.scala 39:67]
+        node _T_3791 = eq(UInt<3>("h02"), buf_state[2]) @[Conditional.scala 37:30]
+        when _T_3791 : @[Conditional.scala 39:67]
+          node _T_3792 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 469:60]
+          node _T_3793 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 469:89]
+          node _T_3794 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 469:124]
+          node _T_3795 = and(_T_3793, _T_3794) @[el2_lsu_bus_buffer.scala 469:104]
+          node _T_3796 = mux(_T_3795, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 469:75]
+          node _T_3797 = mux(_T_3792, UInt<3>("h00"), _T_3796) @[el2_lsu_bus_buffer.scala 469:31]
+          buf_nxtstate[2] <= _T_3797 @[el2_lsu_bus_buffer.scala 469:25]
+          node _T_3798 = eq(obuf_tag0, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 470:48]
+          node _T_3799 = eq(obuf_tag1, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 470:104]
+          node _T_3800 = and(obuf_merge, _T_3799) @[el2_lsu_bus_buffer.scala 470:91]
+          node _T_3801 = or(_T_3798, _T_3800) @[el2_lsu_bus_buffer.scala 470:77]
+          node _T_3802 = and(_T_3801, obuf_valid) @[el2_lsu_bus_buffer.scala 470:135]
+          node _T_3803 = and(_T_3802, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 470:148]
+          buf_cmd_state_bus_en[2] <= _T_3803 @[el2_lsu_bus_buffer.scala 470:33]
+          buf_state_bus_en[2] <= buf_cmd_state_bus_en[2] @[el2_lsu_bus_buffer.scala 471:29]
+          node _T_3804 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 472:49]
+          node _T_3805 = or(_T_3804, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 472:70]
+          buf_state_en[2] <= _T_3805 @[el2_lsu_bus_buffer.scala 472:25]
+          buf_ldfwd_in[2] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 473:25]
+          node _T_3806 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 474:56]
+          node _T_3807 = eq(_T_3806, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 474:46]
+          node _T_3808 = and(buf_state_en[2], _T_3807) @[el2_lsu_bus_buffer.scala 474:44]
+          node _T_3809 = and(_T_3808, obuf_nosend) @[el2_lsu_bus_buffer.scala 474:60]
+          node _T_3810 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 474:76]
+          node _T_3811 = and(_T_3809, _T_3810) @[el2_lsu_bus_buffer.scala 474:74]
+          buf_ldfwd_en[2] <= _T_3811 @[el2_lsu_bus_buffer.scala 474:25]
+          node _T_3812 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 475:46]
+          buf_ldfwdtag_in[2] <= _T_3812 @[el2_lsu_bus_buffer.scala 475:28]
+          node _T_3813 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 476:47]
+          node _T_3814 = and(_T_3813, obuf_nosend) @[el2_lsu_bus_buffer.scala 476:67]
+          node _T_3815 = and(_T_3814, bus_rsp_read) @[el2_lsu_bus_buffer.scala 476:81]
+          buf_data_en[2] <= _T_3815 @[el2_lsu_bus_buffer.scala 476:24]
+          node _T_3816 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 477:48]
+          node _T_3817 = and(_T_3816, obuf_nosend) @[el2_lsu_bus_buffer.scala 477:68]
+          node _T_3818 = and(_T_3817, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 477:82]
+          buf_error_en[2] <= _T_3818 @[el2_lsu_bus_buffer.scala 477:25]
+          node _T_3819 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 478:61]
+          node _T_3820 = bits(buf_addr[2], 2, 2) @[el2_lsu_bus_buffer.scala 478:85]
+          node _T_3821 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 478:103]
+          node _T_3822 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 478:126]
+          node _T_3823 = mux(_T_3820, _T_3821, _T_3822) @[el2_lsu_bus_buffer.scala 478:73]
+          node _T_3824 = mux(buf_error_en[2], _T_3819, _T_3823) @[el2_lsu_bus_buffer.scala 478:30]
+          buf_data_in[2] <= _T_3824 @[el2_lsu_bus_buffer.scala 478:24]
+          skip @[Conditional.scala 39:67]
+        else : @[Conditional.scala 39:67]
+          node _T_3825 = eq(UInt<3>("h03"), buf_state[2]) @[Conditional.scala 37:30]
+          when _T_3825 : @[Conditional.scala 39:67]
+            node _T_3826 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 481:67]
+            node _T_3827 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 481:94]
+            node _T_3828 = eq(_T_3827, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 481:73]
+            node _T_3829 = and(_T_3826, _T_3828) @[el2_lsu_bus_buffer.scala 481:71]
+            node _T_3830 = or(io.dec_tlu_force_halt, _T_3829) @[el2_lsu_bus_buffer.scala 481:55]
+            node _T_3831 = bits(_T_3830, 0, 0) @[el2_lsu_bus_buffer.scala 481:125]
+            node _T_3832 = eq(buf_samedw[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 482:30]
+            node _T_3833 = and(buf_dual[2], _T_3832) @[el2_lsu_bus_buffer.scala 482:28]
+            node _T_3834 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 482:57]
+            node _T_3835 = eq(_T_3834, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 482:47]
+            node _T_3836 = and(_T_3833, _T_3835) @[el2_lsu_bus_buffer.scala 482:45]
+            node _T_3837 = neq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 482:90]
+            node _T_3838 = and(_T_3836, _T_3837) @[el2_lsu_bus_buffer.scala 482:61]
+            node _T_3839 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 483:27]
+            node _T_3840 = or(_T_3839, any_done_wait_state) @[el2_lsu_bus_buffer.scala 483:31]
+            node _T_3841 = eq(buf_samedw[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 483:70]
+            node _T_3842 = and(buf_dual[2], _T_3841) @[el2_lsu_bus_buffer.scala 483:68]
+            node _T_3843 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 483:97]
+            node _T_3844 = eq(_T_3843, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 483:87]
+            node _T_3845 = and(_T_3842, _T_3844) @[el2_lsu_bus_buffer.scala 483:85]
+            node _T_3846 = eq(buf_dualtag[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3847 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3848 = eq(buf_dualtag[2], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3849 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3850 = eq(buf_dualtag[2], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3851 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3852 = eq(buf_dualtag[2], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_3853 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_3854 = mux(_T_3846, _T_3847, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3855 = mux(_T_3848, _T_3849, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3856 = mux(_T_3850, _T_3851, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3857 = mux(_T_3852, _T_3853, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_3858 = or(_T_3854, _T_3855) @[Mux.scala 27:72]
+            node _T_3859 = or(_T_3858, _T_3856) @[Mux.scala 27:72]
+            node _T_3860 = or(_T_3859, _T_3857) @[Mux.scala 27:72]
+            wire _T_3861 : UInt<1> @[Mux.scala 27:72]
+            _T_3861 <= _T_3860 @[Mux.scala 27:72]
+            node _T_3862 = and(_T_3845, _T_3861) @[el2_lsu_bus_buffer.scala 483:101]
+            node _T_3863 = eq(buf_state[buf_dualtag[2]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 483:167]
+            node _T_3864 = and(_T_3862, _T_3863) @[el2_lsu_bus_buffer.scala 483:138]
+            node _T_3865 = and(_T_3864, any_done_wait_state) @[el2_lsu_bus_buffer.scala 483:187]
+            node _T_3866 = or(_T_3840, _T_3865) @[el2_lsu_bus_buffer.scala 483:53]
+            node _T_3867 = mux(_T_3866, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 483:16]
+            node _T_3868 = mux(_T_3838, UInt<3>("h04"), _T_3867) @[el2_lsu_bus_buffer.scala 482:14]
+            node _T_3869 = mux(_T_3831, UInt<3>("h00"), _T_3868) @[el2_lsu_bus_buffer.scala 481:31]
+            buf_nxtstate[2] <= _T_3869 @[el2_lsu_bus_buffer.scala 481:25]
+            node _T_3870 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 484:73]
+            node _T_3871 = and(bus_rsp_write, _T_3870) @[el2_lsu_bus_buffer.scala 484:52]
+            node _T_3872 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 485:46]
+            node _T_3873 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 486:23]
+            node _T_3874 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[el2_lsu_bus_buffer.scala 486:47]
+            node _T_3875 = and(_T_3873, _T_3874) @[el2_lsu_bus_buffer.scala 486:27]
+            node _T_3876 = or(_T_3872, _T_3875) @[el2_lsu_bus_buffer.scala 485:77]
+            node _T_3877 = and(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 487:26]
+            node _T_3878 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 487:54]
+            node _T_3879 = not(_T_3878) @[el2_lsu_bus_buffer.scala 487:44]
+            node _T_3880 = and(_T_3877, _T_3879) @[el2_lsu_bus_buffer.scala 487:42]
+            node _T_3881 = and(_T_3880, buf_samedw[2]) @[el2_lsu_bus_buffer.scala 487:58]
+            node _T_3882 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 487:94]
+            node _T_3883 = and(_T_3881, _T_3882) @[el2_lsu_bus_buffer.scala 487:74]
+            node _T_3884 = or(_T_3876, _T_3883) @[el2_lsu_bus_buffer.scala 486:71]
+            node _T_3885 = and(bus_rsp_read, _T_3884) @[el2_lsu_bus_buffer.scala 485:25]
+            node _T_3886 = or(_T_3871, _T_3885) @[el2_lsu_bus_buffer.scala 484:105]
+            buf_resp_state_bus_en[2] <= _T_3886 @[el2_lsu_bus_buffer.scala 484:34]
+            buf_state_bus_en[2] <= buf_resp_state_bus_en[2] @[el2_lsu_bus_buffer.scala 488:29]
+            node _T_3887 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 489:49]
+            node _T_3888 = or(_T_3887, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 489:70]
+            buf_state_en[2] <= _T_3888 @[el2_lsu_bus_buffer.scala 489:25]
+            node _T_3889 = and(buf_state_bus_en[2], bus_rsp_read) @[el2_lsu_bus_buffer.scala 490:47]
+            node _T_3890 = and(_T_3889, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 490:62]
+            buf_data_en[2] <= _T_3890 @[el2_lsu_bus_buffer.scala 490:24]
+            node _T_3891 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 491:48]
+            node _T_3892 = eq(bus_rsp_read_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 491:111]
+            node _T_3893 = and(bus_rsp_read_error, _T_3892) @[el2_lsu_bus_buffer.scala 491:91]
+            node _T_3894 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 492:42]
+            node _T_3895 = and(bus_rsp_read_error, _T_3894) @[el2_lsu_bus_buffer.scala 492:31]
+            node _T_3896 = eq(bus_rsp_read_tag, buf_ldfwdtag[2]) @[el2_lsu_bus_buffer.scala 492:66]
+            node _T_3897 = and(_T_3895, _T_3896) @[el2_lsu_bus_buffer.scala 492:46]
+            node _T_3898 = or(_T_3893, _T_3897) @[el2_lsu_bus_buffer.scala 491:143]
+            node _T_3899 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 493:32]
+            node _T_3900 = eq(bus_rsp_write_tag, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 493:74]
+            node _T_3901 = and(_T_3899, _T_3900) @[el2_lsu_bus_buffer.scala 493:53]
+            node _T_3902 = or(_T_3898, _T_3901) @[el2_lsu_bus_buffer.scala 492:88]
+            node _T_3903 = and(_T_3891, _T_3902) @[el2_lsu_bus_buffer.scala 491:68]
+            buf_error_en[2] <= _T_3903 @[el2_lsu_bus_buffer.scala 491:25]
+            node _T_3904 = eq(buf_error_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 494:50]
+            node _T_3905 = and(buf_state_en[2], _T_3904) @[el2_lsu_bus_buffer.scala 494:48]
+            node _T_3906 = bits(buf_addr[2], 2, 2) @[el2_lsu_bus_buffer.scala 494:84]
+            node _T_3907 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 494:102]
+            node _T_3908 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 494:125]
+            node _T_3909 = mux(_T_3906, _T_3907, _T_3908) @[el2_lsu_bus_buffer.scala 494:72]
+            node _T_3910 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 494:148]
+            node _T_3911 = mux(_T_3905, _T_3909, _T_3910) @[el2_lsu_bus_buffer.scala 494:30]
+            buf_data_in[2] <= _T_3911 @[el2_lsu_bus_buffer.scala 494:24]
+            skip @[Conditional.scala 39:67]
+          else : @[Conditional.scala 39:67]
+            node _T_3912 = eq(UInt<3>("h04"), buf_state[2]) @[Conditional.scala 37:30]
+            when _T_3912 : @[Conditional.scala 39:67]
+              node _T_3913 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 497:60]
+              node _T_3914 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 497:86]
+              node _T_3915 = dshr(buf_ldfwd, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 497:101]
+              node _T_3916 = bits(_T_3915, 0, 0) @[el2_lsu_bus_buffer.scala 497:101]
+              node _T_3917 = or(_T_3914, _T_3916) @[el2_lsu_bus_buffer.scala 497:90]
+              node _T_3918 = or(_T_3917, any_done_wait_state) @[el2_lsu_bus_buffer.scala 497:118]
+              node _T_3919 = mux(_T_3918, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 497:75]
+              node _T_3920 = mux(_T_3913, UInt<3>("h00"), _T_3919) @[el2_lsu_bus_buffer.scala 497:31]
+              buf_nxtstate[2] <= _T_3920 @[el2_lsu_bus_buffer.scala 497:25]
+              node _T_3921 = eq(bus_rsp_read_tag, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 498:66]
+              node _T_3922 = dshr(buf_ldfwd, buf_dualtag[2]) @[el2_lsu_bus_buffer.scala 499:21]
+              node _T_3923 = bits(_T_3922, 0, 0) @[el2_lsu_bus_buffer.scala 499:21]
+              node _T_3924 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[2]]) @[el2_lsu_bus_buffer.scala 499:58]
+              node _T_3925 = and(_T_3923, _T_3924) @[el2_lsu_bus_buffer.scala 499:38]
+              node _T_3926 = or(_T_3921, _T_3925) @[el2_lsu_bus_buffer.scala 498:95]
+              node _T_3927 = and(bus_rsp_read, _T_3926) @[el2_lsu_bus_buffer.scala 498:45]
+              buf_state_bus_en[2] <= _T_3927 @[el2_lsu_bus_buffer.scala 498:29]
+              node _T_3928 = and(buf_state_bus_en[2], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 500:49]
+              node _T_3929 = or(_T_3928, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 500:70]
+              buf_state_en[2] <= _T_3929 @[el2_lsu_bus_buffer.scala 500:25]
+              skip @[Conditional.scala 39:67]
+            else : @[Conditional.scala 39:67]
+              node _T_3930 = eq(UInt<3>("h05"), buf_state[2]) @[Conditional.scala 37:30]
+              when _T_3930 : @[Conditional.scala 39:67]
+                node _T_3931 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 503:60]
+                node _T_3932 = mux(_T_3931, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 503:31]
+                buf_nxtstate[2] <= _T_3932 @[el2_lsu_bus_buffer.scala 503:25]
+                node _T_3933 = eq(RspPtr, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 504:37]
+                node _T_3934 = eq(buf_dualtag[2], RspPtr) @[el2_lsu_bus_buffer.scala 504:98]
+                node _T_3935 = and(buf_dual[2], _T_3934) @[el2_lsu_bus_buffer.scala 504:80]
+                node _T_3936 = or(_T_3933, _T_3935) @[el2_lsu_bus_buffer.scala 504:65]
+                node _T_3937 = or(_T_3936, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 504:112]
+                buf_state_en[2] <= _T_3937 @[el2_lsu_bus_buffer.scala 504:25]
+                skip @[Conditional.scala 39:67]
+              else : @[Conditional.scala 39:67]
+                node _T_3938 = eq(UInt<3>("h06"), buf_state[2]) @[Conditional.scala 37:30]
+                when _T_3938 : @[Conditional.scala 39:67]
+                  buf_nxtstate[2] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 507:25]
+                  buf_rst[2] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 508:20]
+                  buf_state_en[2] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25]
+                  buf_ldfwd_in[2] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 510:25]
+                  buf_ldfwd_en[2] <= buf_state_en[2] @[el2_lsu_bus_buffer.scala 511:25]
+                  skip @[Conditional.scala 39:67]
+    node _T_3939 = bits(buf_state_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 514:108]
+    reg _T_3940 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3939 : @[Reg.scala 28:19]
+      _T_3940 <= buf_nxtstate[2] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_state[2] <= _T_3940 @[el2_lsu_bus_buffer.scala 514:18]
+    reg _T_3941 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 515:60]
+    _T_3941 <= buf_age_in_2 @[el2_lsu_bus_buffer.scala 515:60]
+    buf_ageQ[2] <= _T_3941 @[el2_lsu_bus_buffer.scala 515:17]
+    reg _T_3942 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 516:63]
+    _T_3942 <= buf_rspage_in[2] @[el2_lsu_bus_buffer.scala 516:63]
+    buf_rspageQ[2] <= _T_3942 @[el2_lsu_bus_buffer.scala 516:20]
+    node _T_3943 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 517:109]
+    reg _T_3944 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3943 : @[Reg.scala 28:19]
+      _T_3944 <= buf_dualtag_in[2] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dualtag[2] <= _T_3944 @[el2_lsu_bus_buffer.scala 517:20]
+    node _T_3945 = bits(buf_dual_in, 2, 2) @[el2_lsu_bus_buffer.scala 518:74]
+    node _T_3946 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 518:107]
+    reg _T_3947 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3946 : @[Reg.scala 28:19]
+      _T_3947 <= _T_3945 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dual[2] <= _T_3947 @[el2_lsu_bus_buffer.scala 518:17]
+    node _T_3948 = bits(buf_samedw_in, 2, 2) @[el2_lsu_bus_buffer.scala 519:78]
+    node _T_3949 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 519:111]
+    reg _T_3950 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3949 : @[Reg.scala 28:19]
+      _T_3950 <= _T_3948 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_samedw[2] <= _T_3950 @[el2_lsu_bus_buffer.scala 519:19]
+    node _T_3951 = bits(buf_nomerge_in, 2, 2) @[el2_lsu_bus_buffer.scala 520:80]
+    node _T_3952 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 520:113]
+    reg _T_3953 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3952 : @[Reg.scala 28:19]
+      _T_3953 <= _T_3951 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_nomerge[2] <= _T_3953 @[el2_lsu_bus_buffer.scala 520:20]
+    node _T_3954 = bits(buf_dualhi_in, 2, 2) @[el2_lsu_bus_buffer.scala 521:78]
+    node _T_3955 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 521:111]
+    reg _T_3956 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_3955 : @[Reg.scala 28:19]
+      _T_3956 <= _T_3954 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dualhi[2] <= _T_3956 @[el2_lsu_bus_buffer.scala 521:19]
+    node _T_3957 = eq(UInt<3>("h00"), buf_state[3]) @[Conditional.scala 37:30]
+    when _T_3957 : @[Conditional.scala 40:58]
+      node _T_3958 = bits(io.lsu_bus_clk_en, 0, 0) @[el2_lsu_bus_buffer.scala 458:56]
+      node _T_3959 = mux(_T_3958, UInt<3>("h02"), UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 458:31]
+      buf_nxtstate[3] <= _T_3959 @[el2_lsu_bus_buffer.scala 458:25]
+      node _T_3960 = and(io.lsu_busreq_r, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 459:45]
+      node _T_3961 = or(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:77]
+      node _T_3962 = eq(ibuf_merge_en, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 459:97]
+      node _T_3963 = and(_T_3961, _T_3962) @[el2_lsu_bus_buffer.scala 459:95]
+      node _T_3964 = eq(UInt<2>("h03"), WrPtr0_r) @[el2_lsu_bus_buffer.scala 459:117]
+      node _T_3965 = and(_T_3963, _T_3964) @[el2_lsu_bus_buffer.scala 459:112]
+      node _T_3966 = and(ibuf_byp, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 459:144]
+      node _T_3967 = eq(UInt<2>("h03"), WrPtr1_r) @[el2_lsu_bus_buffer.scala 459:166]
+      node _T_3968 = and(_T_3966, _T_3967) @[el2_lsu_bus_buffer.scala 459:161]
+      node _T_3969 = or(_T_3965, _T_3968) @[el2_lsu_bus_buffer.scala 459:132]
+      node _T_3970 = and(_T_3960, _T_3969) @[el2_lsu_bus_buffer.scala 459:63]
+      node _T_3971 = eq(UInt<2>("h03"), ibuf_tag) @[el2_lsu_bus_buffer.scala 459:206]
+      node _T_3972 = and(ibuf_drain_vld, _T_3971) @[el2_lsu_bus_buffer.scala 459:201]
+      node _T_3973 = or(_T_3970, _T_3972) @[el2_lsu_bus_buffer.scala 459:183]
+      buf_state_en[3] <= _T_3973 @[el2_lsu_bus_buffer.scala 459:25]
+      buf_wr_en[3] <= buf_state_en[3] @[el2_lsu_bus_buffer.scala 460:22]
+      buf_data_en[3] <= buf_state_en[3] @[el2_lsu_bus_buffer.scala 461:24]
+      node _T_3974 = eq(UInt<2>("h03"), ibuf_tag) @[el2_lsu_bus_buffer.scala 462:52]
+      node _T_3975 = and(ibuf_drain_vld, _T_3974) @[el2_lsu_bus_buffer.scala 462:47]
+      node _T_3976 = bits(_T_3975, 0, 0) @[el2_lsu_bus_buffer.scala 462:73]
+      node _T_3977 = bits(ibuf_data_out, 31, 0) @[el2_lsu_bus_buffer.scala 462:90]
+      node _T_3978 = bits(store_data_lo_r, 31, 0) @[el2_lsu_bus_buffer.scala 462:114]
+      node _T_3979 = mux(_T_3976, _T_3977, _T_3978) @[el2_lsu_bus_buffer.scala 462:30]
+      buf_data_in[3] <= _T_3979 @[el2_lsu_bus_buffer.scala 462:24]
+      skip @[Conditional.scala 40:58]
+    else : @[Conditional.scala 39:67]
+      node _T_3980 = eq(UInt<3>("h01"), buf_state[3]) @[Conditional.scala 37:30]
+      when _T_3980 : @[Conditional.scala 39:67]
+        node _T_3981 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 465:60]
+        node _T_3982 = mux(_T_3981, UInt<3>("h00"), UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 465:31]
+        buf_nxtstate[3] <= _T_3982 @[el2_lsu_bus_buffer.scala 465:25]
+        node _T_3983 = or(io.lsu_bus_clk_en, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 466:46]
+        buf_state_en[3] <= _T_3983 @[el2_lsu_bus_buffer.scala 466:25]
+        skip @[Conditional.scala 39:67]
+      else : @[Conditional.scala 39:67]
+        node _T_3984 = eq(UInt<3>("h02"), buf_state[3]) @[Conditional.scala 37:30]
+        when _T_3984 : @[Conditional.scala 39:67]
+          node _T_3985 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 469:60]
+          node _T_3986 = and(obuf_nosend, bus_rsp_read) @[el2_lsu_bus_buffer.scala 469:89]
+          node _T_3987 = eq(bus_rsp_read_tag, obuf_rdrsp_tag) @[el2_lsu_bus_buffer.scala 469:124]
+          node _T_3988 = and(_T_3986, _T_3987) @[el2_lsu_bus_buffer.scala 469:104]
+          node _T_3989 = mux(_T_3988, UInt<3>("h05"), UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 469:75]
+          node _T_3990 = mux(_T_3985, UInt<3>("h00"), _T_3989) @[el2_lsu_bus_buffer.scala 469:31]
+          buf_nxtstate[3] <= _T_3990 @[el2_lsu_bus_buffer.scala 469:25]
+          node _T_3991 = eq(obuf_tag0, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 470:48]
+          node _T_3992 = eq(obuf_tag1, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 470:104]
+          node _T_3993 = and(obuf_merge, _T_3992) @[el2_lsu_bus_buffer.scala 470:91]
+          node _T_3994 = or(_T_3991, _T_3993) @[el2_lsu_bus_buffer.scala 470:77]
+          node _T_3995 = and(_T_3994, obuf_valid) @[el2_lsu_bus_buffer.scala 470:135]
+          node _T_3996 = and(_T_3995, obuf_wr_enQ) @[el2_lsu_bus_buffer.scala 470:148]
+          buf_cmd_state_bus_en[3] <= _T_3996 @[el2_lsu_bus_buffer.scala 470:33]
+          buf_state_bus_en[3] <= buf_cmd_state_bus_en[3] @[el2_lsu_bus_buffer.scala 471:29]
+          node _T_3997 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 472:49]
+          node _T_3998 = or(_T_3997, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 472:70]
+          buf_state_en[3] <= _T_3998 @[el2_lsu_bus_buffer.scala 472:25]
+          buf_ldfwd_in[3] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 473:25]
+          node _T_3999 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 474:56]
+          node _T_4000 = eq(_T_3999, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 474:46]
+          node _T_4001 = and(buf_state_en[3], _T_4000) @[el2_lsu_bus_buffer.scala 474:44]
+          node _T_4002 = and(_T_4001, obuf_nosend) @[el2_lsu_bus_buffer.scala 474:60]
+          node _T_4003 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 474:76]
+          node _T_4004 = and(_T_4002, _T_4003) @[el2_lsu_bus_buffer.scala 474:74]
+          buf_ldfwd_en[3] <= _T_4004 @[el2_lsu_bus_buffer.scala 474:25]
+          node _T_4005 = bits(obuf_rdrsp_tag, 1, 0) @[el2_lsu_bus_buffer.scala 475:46]
+          buf_ldfwdtag_in[3] <= _T_4005 @[el2_lsu_bus_buffer.scala 475:28]
+          node _T_4006 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 476:47]
+          node _T_4007 = and(_T_4006, obuf_nosend) @[el2_lsu_bus_buffer.scala 476:67]
+          node _T_4008 = and(_T_4007, bus_rsp_read) @[el2_lsu_bus_buffer.scala 476:81]
+          buf_data_en[3] <= _T_4008 @[el2_lsu_bus_buffer.scala 476:24]
+          node _T_4009 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 477:48]
+          node _T_4010 = and(_T_4009, obuf_nosend) @[el2_lsu_bus_buffer.scala 477:68]
+          node _T_4011 = and(_T_4010, bus_rsp_read_error) @[el2_lsu_bus_buffer.scala 477:82]
+          buf_error_en[3] <= _T_4011 @[el2_lsu_bus_buffer.scala 477:25]
+          node _T_4012 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 478:61]
+          node _T_4013 = bits(buf_addr[3], 2, 2) @[el2_lsu_bus_buffer.scala 478:85]
+          node _T_4014 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 478:103]
+          node _T_4015 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 478:126]
+          node _T_4016 = mux(_T_4013, _T_4014, _T_4015) @[el2_lsu_bus_buffer.scala 478:73]
+          node _T_4017 = mux(buf_error_en[3], _T_4012, _T_4016) @[el2_lsu_bus_buffer.scala 478:30]
+          buf_data_in[3] <= _T_4017 @[el2_lsu_bus_buffer.scala 478:24]
+          skip @[Conditional.scala 39:67]
+        else : @[Conditional.scala 39:67]
+          node _T_4018 = eq(UInt<3>("h03"), buf_state[3]) @[Conditional.scala 37:30]
+          when _T_4018 : @[Conditional.scala 39:67]
+            node _T_4019 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 481:67]
+            node _T_4020 = and(UInt<1>("h01"), bus_rsp_write_error) @[el2_lsu_bus_buffer.scala 481:94]
+            node _T_4021 = eq(_T_4020, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 481:73]
+            node _T_4022 = and(_T_4019, _T_4021) @[el2_lsu_bus_buffer.scala 481:71]
+            node _T_4023 = or(io.dec_tlu_force_halt, _T_4022) @[el2_lsu_bus_buffer.scala 481:55]
+            node _T_4024 = bits(_T_4023, 0, 0) @[el2_lsu_bus_buffer.scala 481:125]
+            node _T_4025 = eq(buf_samedw[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 482:30]
+            node _T_4026 = and(buf_dual[3], _T_4025) @[el2_lsu_bus_buffer.scala 482:28]
+            node _T_4027 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 482:57]
+            node _T_4028 = eq(_T_4027, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 482:47]
+            node _T_4029 = and(_T_4026, _T_4028) @[el2_lsu_bus_buffer.scala 482:45]
+            node _T_4030 = neq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 482:90]
+            node _T_4031 = and(_T_4029, _T_4030) @[el2_lsu_bus_buffer.scala 482:61]
+            node _T_4032 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 483:27]
+            node _T_4033 = or(_T_4032, any_done_wait_state) @[el2_lsu_bus_buffer.scala 483:31]
+            node _T_4034 = eq(buf_samedw[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 483:70]
+            node _T_4035 = and(buf_dual[3], _T_4034) @[el2_lsu_bus_buffer.scala 483:68]
+            node _T_4036 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 483:97]
+            node _T_4037 = eq(_T_4036, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 483:87]
+            node _T_4038 = and(_T_4035, _T_4037) @[el2_lsu_bus_buffer.scala 483:85]
+            node _T_4039 = eq(buf_dualtag[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_4040 = bits(buf_ldfwd, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_4041 = eq(buf_dualtag[3], UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_4042 = bits(buf_ldfwd, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_4043 = eq(buf_dualtag[3], UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_4044 = bits(buf_ldfwd, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_4045 = eq(buf_dualtag[3], UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+            node _T_4046 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+            node _T_4047 = mux(_T_4039, _T_4040, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_4048 = mux(_T_4041, _T_4042, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_4049 = mux(_T_4043, _T_4044, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_4050 = mux(_T_4045, _T_4046, UInt<1>("h00")) @[Mux.scala 27:72]
+            node _T_4051 = or(_T_4047, _T_4048) @[Mux.scala 27:72]
+            node _T_4052 = or(_T_4051, _T_4049) @[Mux.scala 27:72]
+            node _T_4053 = or(_T_4052, _T_4050) @[Mux.scala 27:72]
+            wire _T_4054 : UInt<1> @[Mux.scala 27:72]
+            _T_4054 <= _T_4053 @[Mux.scala 27:72]
+            node _T_4055 = and(_T_4038, _T_4054) @[el2_lsu_bus_buffer.scala 483:101]
+            node _T_4056 = eq(buf_state[buf_dualtag[3]], UInt<3>("h04")) @[el2_lsu_bus_buffer.scala 483:167]
+            node _T_4057 = and(_T_4055, _T_4056) @[el2_lsu_bus_buffer.scala 483:138]
+            node _T_4058 = and(_T_4057, any_done_wait_state) @[el2_lsu_bus_buffer.scala 483:187]
+            node _T_4059 = or(_T_4033, _T_4058) @[el2_lsu_bus_buffer.scala 483:53]
+            node _T_4060 = mux(_T_4059, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 483:16]
+            node _T_4061 = mux(_T_4031, UInt<3>("h04"), _T_4060) @[el2_lsu_bus_buffer.scala 482:14]
+            node _T_4062 = mux(_T_4024, UInt<3>("h00"), _T_4061) @[el2_lsu_bus_buffer.scala 481:31]
+            buf_nxtstate[3] <= _T_4062 @[el2_lsu_bus_buffer.scala 481:25]
+            node _T_4063 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 484:73]
+            node _T_4064 = and(bus_rsp_write, _T_4063) @[el2_lsu_bus_buffer.scala 484:52]
+            node _T_4065 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 485:46]
+            node _T_4066 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 486:23]
+            node _T_4067 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[el2_lsu_bus_buffer.scala 486:47]
+            node _T_4068 = and(_T_4066, _T_4067) @[el2_lsu_bus_buffer.scala 486:27]
+            node _T_4069 = or(_T_4065, _T_4068) @[el2_lsu_bus_buffer.scala 485:77]
+            node _T_4070 = and(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 487:26]
+            node _T_4071 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 487:54]
+            node _T_4072 = not(_T_4071) @[el2_lsu_bus_buffer.scala 487:44]
+            node _T_4073 = and(_T_4070, _T_4072) @[el2_lsu_bus_buffer.scala 487:42]
+            node _T_4074 = and(_T_4073, buf_samedw[3]) @[el2_lsu_bus_buffer.scala 487:58]
+            node _T_4075 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 487:94]
+            node _T_4076 = and(_T_4074, _T_4075) @[el2_lsu_bus_buffer.scala 487:74]
+            node _T_4077 = or(_T_4069, _T_4076) @[el2_lsu_bus_buffer.scala 486:71]
+            node _T_4078 = and(bus_rsp_read, _T_4077) @[el2_lsu_bus_buffer.scala 485:25]
+            node _T_4079 = or(_T_4064, _T_4078) @[el2_lsu_bus_buffer.scala 484:105]
+            buf_resp_state_bus_en[3] <= _T_4079 @[el2_lsu_bus_buffer.scala 484:34]
+            buf_state_bus_en[3] <= buf_resp_state_bus_en[3] @[el2_lsu_bus_buffer.scala 488:29]
+            node _T_4080 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 489:49]
+            node _T_4081 = or(_T_4080, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 489:70]
+            buf_state_en[3] <= _T_4081 @[el2_lsu_bus_buffer.scala 489:25]
+            node _T_4082 = and(buf_state_bus_en[3], bus_rsp_read) @[el2_lsu_bus_buffer.scala 490:47]
+            node _T_4083 = and(_T_4082, io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 490:62]
+            buf_data_en[3] <= _T_4083 @[el2_lsu_bus_buffer.scala 490:24]
+            node _T_4084 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 491:48]
+            node _T_4085 = eq(bus_rsp_read_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 491:111]
+            node _T_4086 = and(bus_rsp_read_error, _T_4085) @[el2_lsu_bus_buffer.scala 491:91]
+            node _T_4087 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 492:42]
+            node _T_4088 = and(bus_rsp_read_error, _T_4087) @[el2_lsu_bus_buffer.scala 492:31]
+            node _T_4089 = eq(bus_rsp_read_tag, buf_ldfwdtag[3]) @[el2_lsu_bus_buffer.scala 492:66]
+            node _T_4090 = and(_T_4088, _T_4089) @[el2_lsu_bus_buffer.scala 492:46]
+            node _T_4091 = or(_T_4086, _T_4090) @[el2_lsu_bus_buffer.scala 491:143]
+            node _T_4092 = and(bus_rsp_write_error, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 493:32]
+            node _T_4093 = eq(bus_rsp_write_tag, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 493:74]
+            node _T_4094 = and(_T_4092, _T_4093) @[el2_lsu_bus_buffer.scala 493:53]
+            node _T_4095 = or(_T_4091, _T_4094) @[el2_lsu_bus_buffer.scala 492:88]
+            node _T_4096 = and(_T_4084, _T_4095) @[el2_lsu_bus_buffer.scala 491:68]
+            buf_error_en[3] <= _T_4096 @[el2_lsu_bus_buffer.scala 491:25]
+            node _T_4097 = eq(buf_error_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 494:50]
+            node _T_4098 = and(buf_state_en[3], _T_4097) @[el2_lsu_bus_buffer.scala 494:48]
+            node _T_4099 = bits(buf_addr[3], 2, 2) @[el2_lsu_bus_buffer.scala 494:84]
+            node _T_4100 = bits(bus_rsp_rdata, 63, 32) @[el2_lsu_bus_buffer.scala 494:102]
+            node _T_4101 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 494:125]
+            node _T_4102 = mux(_T_4099, _T_4100, _T_4101) @[el2_lsu_bus_buffer.scala 494:72]
+            node _T_4103 = bits(bus_rsp_rdata, 31, 0) @[el2_lsu_bus_buffer.scala 494:148]
+            node _T_4104 = mux(_T_4098, _T_4102, _T_4103) @[el2_lsu_bus_buffer.scala 494:30]
+            buf_data_in[3] <= _T_4104 @[el2_lsu_bus_buffer.scala 494:24]
+            skip @[Conditional.scala 39:67]
+          else : @[Conditional.scala 39:67]
+            node _T_4105 = eq(UInt<3>("h04"), buf_state[3]) @[Conditional.scala 37:30]
+            when _T_4105 : @[Conditional.scala 39:67]
+              node _T_4106 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 497:60]
+              node _T_4107 = bits(buf_ldfwd, 3, 3) @[el2_lsu_bus_buffer.scala 497:86]
+              node _T_4108 = dshr(buf_ldfwd, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 497:101]
+              node _T_4109 = bits(_T_4108, 0, 0) @[el2_lsu_bus_buffer.scala 497:101]
+              node _T_4110 = or(_T_4107, _T_4109) @[el2_lsu_bus_buffer.scala 497:90]
+              node _T_4111 = or(_T_4110, any_done_wait_state) @[el2_lsu_bus_buffer.scala 497:118]
+              node _T_4112 = mux(_T_4111, UInt<3>("h05"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 497:75]
+              node _T_4113 = mux(_T_4106, UInt<3>("h00"), _T_4112) @[el2_lsu_bus_buffer.scala 497:31]
+              buf_nxtstate[3] <= _T_4113 @[el2_lsu_bus_buffer.scala 497:25]
+              node _T_4114 = eq(bus_rsp_read_tag, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 498:66]
+              node _T_4115 = dshr(buf_ldfwd, buf_dualtag[3]) @[el2_lsu_bus_buffer.scala 499:21]
+              node _T_4116 = bits(_T_4115, 0, 0) @[el2_lsu_bus_buffer.scala 499:21]
+              node _T_4117 = eq(bus_rsp_read_tag, buf_ldfwdtag[buf_dualtag[3]]) @[el2_lsu_bus_buffer.scala 499:58]
+              node _T_4118 = and(_T_4116, _T_4117) @[el2_lsu_bus_buffer.scala 499:38]
+              node _T_4119 = or(_T_4114, _T_4118) @[el2_lsu_bus_buffer.scala 498:95]
+              node _T_4120 = and(bus_rsp_read, _T_4119) @[el2_lsu_bus_buffer.scala 498:45]
+              buf_state_bus_en[3] <= _T_4120 @[el2_lsu_bus_buffer.scala 498:29]
+              node _T_4121 = and(buf_state_bus_en[3], io.lsu_bus_clk_en) @[el2_lsu_bus_buffer.scala 500:49]
+              node _T_4122 = or(_T_4121, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 500:70]
+              buf_state_en[3] <= _T_4122 @[el2_lsu_bus_buffer.scala 500:25]
+              skip @[Conditional.scala 39:67]
+            else : @[Conditional.scala 39:67]
+              node _T_4123 = eq(UInt<3>("h05"), buf_state[3]) @[Conditional.scala 37:30]
+              when _T_4123 : @[Conditional.scala 39:67]
+                node _T_4124 = bits(io.dec_tlu_force_halt, 0, 0) @[el2_lsu_bus_buffer.scala 503:60]
+                node _T_4125 = mux(_T_4124, UInt<3>("h00"), UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 503:31]
+                buf_nxtstate[3] <= _T_4125 @[el2_lsu_bus_buffer.scala 503:25]
+                node _T_4126 = eq(RspPtr, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 504:37]
+                node _T_4127 = eq(buf_dualtag[3], RspPtr) @[el2_lsu_bus_buffer.scala 504:98]
+                node _T_4128 = and(buf_dual[3], _T_4127) @[el2_lsu_bus_buffer.scala 504:80]
+                node _T_4129 = or(_T_4126, _T_4128) @[el2_lsu_bus_buffer.scala 504:65]
+                node _T_4130 = or(_T_4129, io.dec_tlu_force_halt) @[el2_lsu_bus_buffer.scala 504:112]
+                buf_state_en[3] <= _T_4130 @[el2_lsu_bus_buffer.scala 504:25]
+                skip @[Conditional.scala 39:67]
+              else : @[Conditional.scala 39:67]
+                node _T_4131 = eq(UInt<3>("h06"), buf_state[3]) @[Conditional.scala 37:30]
+                when _T_4131 : @[Conditional.scala 39:67]
+                  buf_nxtstate[3] <= UInt<3>("h00") @[el2_lsu_bus_buffer.scala 507:25]
+                  buf_rst[3] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 508:20]
+                  buf_state_en[3] <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 509:25]
+                  buf_ldfwd_in[3] <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 510:25]
+                  buf_ldfwd_en[3] <= buf_state_en[3] @[el2_lsu_bus_buffer.scala 511:25]
+                  skip @[Conditional.scala 39:67]
+    node _T_4132 = bits(buf_state_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 514:108]
+    reg _T_4133 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4132 : @[Reg.scala 28:19]
+      _T_4133 <= buf_nxtstate[3] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_state[3] <= _T_4133 @[el2_lsu_bus_buffer.scala 514:18]
+    reg _T_4134 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 515:60]
+    _T_4134 <= buf_age_in_3 @[el2_lsu_bus_buffer.scala 515:60]
+    buf_ageQ[3] <= _T_4134 @[el2_lsu_bus_buffer.scala 515:17]
+    reg _T_4135 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 516:63]
+    _T_4135 <= buf_rspage_in[3] @[el2_lsu_bus_buffer.scala 516:63]
+    buf_rspageQ[3] <= _T_4135 @[el2_lsu_bus_buffer.scala 516:20]
+    node _T_4136 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 517:109]
+    reg _T_4137 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4136 : @[Reg.scala 28:19]
+      _T_4137 <= buf_dualtag_in[3] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dualtag[3] <= _T_4137 @[el2_lsu_bus_buffer.scala 517:20]
+    node _T_4138 = bits(buf_dual_in, 3, 3) @[el2_lsu_bus_buffer.scala 518:74]
+    node _T_4139 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 518:107]
+    reg _T_4140 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4139 : @[Reg.scala 28:19]
+      _T_4140 <= _T_4138 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dual[3] <= _T_4140 @[el2_lsu_bus_buffer.scala 518:17]
+    node _T_4141 = bits(buf_samedw_in, 3, 3) @[el2_lsu_bus_buffer.scala 519:78]
+    node _T_4142 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 519:111]
+    reg _T_4143 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4142 : @[Reg.scala 28:19]
+      _T_4143 <= _T_4141 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_samedw[3] <= _T_4143 @[el2_lsu_bus_buffer.scala 519:19]
+    node _T_4144 = bits(buf_nomerge_in, 3, 3) @[el2_lsu_bus_buffer.scala 520:80]
+    node _T_4145 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 520:113]
+    reg _T_4146 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4145 : @[Reg.scala 28:19]
+      _T_4146 <= _T_4144 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_nomerge[3] <= _T_4146 @[el2_lsu_bus_buffer.scala 520:20]
+    node _T_4147 = bits(buf_dualhi_in, 3, 3) @[el2_lsu_bus_buffer.scala 521:78]
+    node _T_4148 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 521:111]
+    reg _T_4149 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4148 : @[Reg.scala 28:19]
+      _T_4149 <= _T_4147 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_dualhi[3] <= _T_4149 @[el2_lsu_bus_buffer.scala 521:19]
+    node _T_4150 = bits(buf_ldfwd_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 524:133]
+    reg _T_4151 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4150 : @[Reg.scala 28:19]
+      _T_4151 <= buf_ldfwd_in[0] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4152 = bits(buf_ldfwd_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 524:133]
+    reg _T_4153 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4152 : @[Reg.scala 28:19]
+      _T_4153 <= buf_ldfwd_in[1] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4154 = bits(buf_ldfwd_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 524:133]
+    reg _T_4155 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4154 : @[Reg.scala 28:19]
+      _T_4155 <= buf_ldfwd_in[2] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4156 = bits(buf_ldfwd_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 524:133]
+    reg _T_4157 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4156 : @[Reg.scala 28:19]
+      _T_4157 <= buf_ldfwd_in[3] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4158 = cat(_T_4157, _T_4155) @[Cat.scala 29:58]
+    node _T_4159 = cat(_T_4158, _T_4153) @[Cat.scala 29:58]
+    node _T_4160 = cat(_T_4159, _T_4151) @[Cat.scala 29:58]
+    buf_ldfwd <= _T_4160 @[el2_lsu_bus_buffer.scala 524:15]
+    node _T_4161 = bits(buf_ldfwd_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 525:134]
+    reg _T_4162 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4161 : @[Reg.scala 28:19]
+      _T_4162 <= buf_ldfwdtag_in[0] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4163 = bits(buf_ldfwd_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 525:134]
+    reg _T_4164 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4163 : @[Reg.scala 28:19]
+      _T_4164 <= buf_ldfwdtag_in[1] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4165 = bits(buf_ldfwd_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 525:134]
+    reg _T_4166 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4165 : @[Reg.scala 28:19]
+      _T_4166 <= buf_ldfwdtag_in[2] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4167 = bits(buf_ldfwd_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 525:134]
+    reg _T_4168 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4167 : @[Reg.scala 28:19]
+      _T_4168 <= buf_ldfwdtag_in[3] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_ldfwdtag[0] <= _T_4162 @[el2_lsu_bus_buffer.scala 525:18]
+    buf_ldfwdtag[1] <= _T_4164 @[el2_lsu_bus_buffer.scala 525:18]
+    buf_ldfwdtag[2] <= _T_4166 @[el2_lsu_bus_buffer.scala 525:18]
+    buf_ldfwdtag[3] <= _T_4168 @[el2_lsu_bus_buffer.scala 525:18]
+    node _T_4169 = bits(buf_sideeffect_in, 0, 0) @[el2_lsu_bus_buffer.scala 526:107]
+    node _T_4170 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 526:140]
+    reg _T_4171 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4170 : @[Reg.scala 28:19]
+      _T_4171 <= _T_4169 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4172 = bits(buf_sideeffect_in, 1, 1) @[el2_lsu_bus_buffer.scala 526:107]
+    node _T_4173 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 526:140]
+    reg _T_4174 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4173 : @[Reg.scala 28:19]
+      _T_4174 <= _T_4172 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4175 = bits(buf_sideeffect_in, 2, 2) @[el2_lsu_bus_buffer.scala 526:107]
+    node _T_4176 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 526:140]
+    reg _T_4177 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4176 : @[Reg.scala 28:19]
+      _T_4177 <= _T_4175 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4178 = bits(buf_sideeffect_in, 3, 3) @[el2_lsu_bus_buffer.scala 526:107]
+    node _T_4179 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 526:140]
+    reg _T_4180 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4179 : @[Reg.scala 28:19]
+      _T_4180 <= _T_4178 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4181 = cat(_T_4180, _T_4177) @[Cat.scala 29:58]
+    node _T_4182 = cat(_T_4181, _T_4174) @[Cat.scala 29:58]
+    node _T_4183 = cat(_T_4182, _T_4171) @[Cat.scala 29:58]
+    buf_sideeffect <= _T_4183 @[el2_lsu_bus_buffer.scala 526:20]
+    node _T_4184 = bits(buf_unsign_in, 0, 0) @[el2_lsu_bus_buffer.scala 527:99]
+    node _T_4185 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 527:132]
+    reg _T_4186 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4185 : @[Reg.scala 28:19]
+      _T_4186 <= _T_4184 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4187 = bits(buf_unsign_in, 1, 1) @[el2_lsu_bus_buffer.scala 527:99]
+    node _T_4188 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 527:132]
+    reg _T_4189 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4188 : @[Reg.scala 28:19]
+      _T_4189 <= _T_4187 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4190 = bits(buf_unsign_in, 2, 2) @[el2_lsu_bus_buffer.scala 527:99]
+    node _T_4191 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 527:132]
+    reg _T_4192 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4191 : @[Reg.scala 28:19]
+      _T_4192 <= _T_4190 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4193 = bits(buf_unsign_in, 3, 3) @[el2_lsu_bus_buffer.scala 527:99]
+    node _T_4194 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 527:132]
+    reg _T_4195 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4194 : @[Reg.scala 28:19]
+      _T_4195 <= _T_4193 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4196 = cat(_T_4195, _T_4192) @[Cat.scala 29:58]
+    node _T_4197 = cat(_T_4196, _T_4189) @[Cat.scala 29:58]
+    node _T_4198 = cat(_T_4197, _T_4186) @[Cat.scala 29:58]
+    buf_unsign <= _T_4198 @[el2_lsu_bus_buffer.scala 527:16]
+    node _T_4199 = bits(buf_write_in, 0, 0) @[el2_lsu_bus_buffer.scala 528:97]
+    node _T_4200 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 528:130]
+    reg _T_4201 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4200 : @[Reg.scala 28:19]
+      _T_4201 <= _T_4199 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4202 = bits(buf_write_in, 1, 1) @[el2_lsu_bus_buffer.scala 528:97]
+    node _T_4203 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 528:130]
+    reg _T_4204 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4203 : @[Reg.scala 28:19]
+      _T_4204 <= _T_4202 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4205 = bits(buf_write_in, 2, 2) @[el2_lsu_bus_buffer.scala 528:97]
+    node _T_4206 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 528:130]
+    reg _T_4207 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4206 : @[Reg.scala 28:19]
+      _T_4207 <= _T_4205 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4208 = bits(buf_write_in, 3, 3) @[el2_lsu_bus_buffer.scala 528:97]
+    node _T_4209 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 528:130]
+    reg _T_4210 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4209 : @[Reg.scala 28:19]
+      _T_4210 <= _T_4208 @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4211 = cat(_T_4210, _T_4207) @[Cat.scala 29:58]
+    node _T_4212 = cat(_T_4211, _T_4204) @[Cat.scala 29:58]
+    node _T_4213 = cat(_T_4212, _T_4201) @[Cat.scala 29:58]
+    buf_write <= _T_4213 @[el2_lsu_bus_buffer.scala 528:15]
+    node _T_4214 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 529:119]
+    reg _T_4215 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4214 : @[Reg.scala 28:19]
+      _T_4215 <= buf_sz_in[0] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4216 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 529:119]
+    reg _T_4217 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4216 : @[Reg.scala 28:19]
+      _T_4217 <= buf_sz_in[1] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4218 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 529:119]
+    reg _T_4219 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4218 : @[Reg.scala 28:19]
+      _T_4219 <= buf_sz_in[2] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4220 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 529:119]
+    reg _T_4221 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4220 : @[Reg.scala 28:19]
+      _T_4221 <= buf_sz_in[3] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_sz[0] <= _T_4215 @[el2_lsu_bus_buffer.scala 529:12]
+    buf_sz[1] <= _T_4217 @[el2_lsu_bus_buffer.scala 529:12]
+    buf_sz[2] <= _T_4219 @[el2_lsu_bus_buffer.scala 529:12]
+    buf_sz[3] <= _T_4221 @[el2_lsu_bus_buffer.scala 529:12]
+    node _T_4222 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 530:82]
+    inst rvclkhdr_4 of rvclkhdr_4 @[el2_lib.scala 472:23]
+    rvclkhdr_4.clock <= clock
+    rvclkhdr_4.reset <= reset
+    rvclkhdr_4.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr_4.io.en <= _T_4222 @[el2_lib.scala 475:17]
+    rvclkhdr_4.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_4223 : UInt, rvclkhdr_4.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_4223 <= buf_addr_in[0] @[el2_lib.scala 478:16]
+    node _T_4224 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 530:82]
+    inst rvclkhdr_5 of rvclkhdr_5 @[el2_lib.scala 472:23]
+    rvclkhdr_5.clock <= clock
+    rvclkhdr_5.reset <= reset
+    rvclkhdr_5.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr_5.io.en <= _T_4224 @[el2_lib.scala 475:17]
+    rvclkhdr_5.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_4225 : UInt, rvclkhdr_5.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_4225 <= buf_addr_in[1] @[el2_lib.scala 478:16]
+    node _T_4226 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 530:82]
+    inst rvclkhdr_6 of rvclkhdr_6 @[el2_lib.scala 472:23]
+    rvclkhdr_6.clock <= clock
+    rvclkhdr_6.reset <= reset
+    rvclkhdr_6.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr_6.io.en <= _T_4226 @[el2_lib.scala 475:17]
+    rvclkhdr_6.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_4227 : UInt, rvclkhdr_6.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_4227 <= buf_addr_in[2] @[el2_lib.scala 478:16]
+    node _T_4228 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 530:82]
+    inst rvclkhdr_7 of rvclkhdr_7 @[el2_lib.scala 472:23]
+    rvclkhdr_7.clock <= clock
+    rvclkhdr_7.reset <= reset
+    rvclkhdr_7.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr_7.io.en <= _T_4228 @[el2_lib.scala 475:17]
+    rvclkhdr_7.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_4229 : UInt, rvclkhdr_7.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_4229 <= buf_addr_in[3] @[el2_lib.scala 478:16]
+    buf_addr[0] <= _T_4223 @[el2_lsu_bus_buffer.scala 530:14]
+    buf_addr[1] <= _T_4225 @[el2_lsu_bus_buffer.scala 530:14]
+    buf_addr[2] <= _T_4227 @[el2_lsu_bus_buffer.scala 530:14]
+    buf_addr[3] <= _T_4229 @[el2_lsu_bus_buffer.scala 530:14]
+    node _T_4230 = bits(buf_wr_en[0], 0, 0) @[el2_lsu_bus_buffer.scala 531:127]
+    reg _T_4231 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4230 : @[Reg.scala 28:19]
+      _T_4231 <= buf_byteen_in[0] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4232 = bits(buf_wr_en[1], 0, 0) @[el2_lsu_bus_buffer.scala 531:127]
+    reg _T_4233 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4232 : @[Reg.scala 28:19]
+      _T_4233 <= buf_byteen_in[1] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4234 = bits(buf_wr_en[2], 0, 0) @[el2_lsu_bus_buffer.scala 531:127]
+    reg _T_4235 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4234 : @[Reg.scala 28:19]
+      _T_4235 <= buf_byteen_in[2] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    node _T_4236 = bits(buf_wr_en[3], 0, 0) @[el2_lsu_bus_buffer.scala 531:127]
+    reg _T_4237 : UInt, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when _T_4236 : @[Reg.scala 28:19]
+      _T_4237 <= buf_byteen_in[3] @[Reg.scala 28:23]
+      skip @[Reg.scala 28:19]
+    buf_byteen[0] <= _T_4231 @[el2_lsu_bus_buffer.scala 531:16]
+    buf_byteen[1] <= _T_4233 @[el2_lsu_bus_buffer.scala 531:16]
+    buf_byteen[2] <= _T_4235 @[el2_lsu_bus_buffer.scala 531:16]
+    buf_byteen[3] <= _T_4237 @[el2_lsu_bus_buffer.scala 531:16]
+    inst rvclkhdr_8 of rvclkhdr_8 @[el2_lib.scala 472:23]
+    rvclkhdr_8.clock <= clock
+    rvclkhdr_8.reset <= reset
+    rvclkhdr_8.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr_8.io.en <= buf_data_en[0] @[el2_lib.scala 475:17]
+    rvclkhdr_8.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_4238 : UInt, rvclkhdr_8.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_4238 <= buf_data_in[0] @[el2_lib.scala 478:16]
+    inst rvclkhdr_9 of rvclkhdr_9 @[el2_lib.scala 472:23]
+    rvclkhdr_9.clock <= clock
+    rvclkhdr_9.reset <= reset
+    rvclkhdr_9.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr_9.io.en <= buf_data_en[1] @[el2_lib.scala 475:17]
+    rvclkhdr_9.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_4239 : UInt, rvclkhdr_9.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_4239 <= buf_data_in[1] @[el2_lib.scala 478:16]
+    inst rvclkhdr_10 of rvclkhdr_10 @[el2_lib.scala 472:23]
+    rvclkhdr_10.clock <= clock
+    rvclkhdr_10.reset <= reset
+    rvclkhdr_10.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr_10.io.en <= buf_data_en[2] @[el2_lib.scala 475:17]
+    rvclkhdr_10.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_4240 : UInt, rvclkhdr_10.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_4240 <= buf_data_in[2] @[el2_lib.scala 478:16]
+    inst rvclkhdr_11 of rvclkhdr_11 @[el2_lib.scala 472:23]
+    rvclkhdr_11.clock <= clock
+    rvclkhdr_11.reset <= reset
+    rvclkhdr_11.io.clk <= clock @[el2_lib.scala 474:18]
+    rvclkhdr_11.io.en <= buf_data_en[3] @[el2_lib.scala 475:17]
+    rvclkhdr_11.io.scan_mode <= io.scan_mode @[el2_lib.scala 476:24]
+    reg _T_4241 : UInt, rvclkhdr_11.io.l1clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lib.scala 478:16]
+    _T_4241 <= buf_data_in[3] @[el2_lib.scala 478:16]
+    buf_data[0] <= _T_4238 @[el2_lsu_bus_buffer.scala 532:14]
+    buf_data[1] <= _T_4239 @[el2_lsu_bus_buffer.scala 532:14]
+    buf_data[2] <= _T_4240 @[el2_lsu_bus_buffer.scala 532:14]
+    buf_data[3] <= _T_4241 @[el2_lsu_bus_buffer.scala 532:14]
+    node _T_4242 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 533:121]
+    node _T_4243 = mux(buf_error_en[0], UInt<1>("h01"), _T_4242) @[el2_lsu_bus_buffer.scala 533:86]
+    node _T_4244 = and(_T_4243, buf_rst[0]) @[el2_lsu_bus_buffer.scala 533:126]
+    reg _T_4245 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 533:82]
+    _T_4245 <= _T_4244 @[el2_lsu_bus_buffer.scala 533:82]
+    node _T_4246 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 533:121]
+    node _T_4247 = mux(buf_error_en[1], UInt<1>("h01"), _T_4246) @[el2_lsu_bus_buffer.scala 533:86]
+    node _T_4248 = and(_T_4247, buf_rst[1]) @[el2_lsu_bus_buffer.scala 533:126]
+    reg _T_4249 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 533:82]
+    _T_4249 <= _T_4248 @[el2_lsu_bus_buffer.scala 533:82]
+    node _T_4250 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 533:121]
+    node _T_4251 = mux(buf_error_en[2], UInt<1>("h01"), _T_4250) @[el2_lsu_bus_buffer.scala 533:86]
+    node _T_4252 = and(_T_4251, buf_rst[2]) @[el2_lsu_bus_buffer.scala 533:126]
+    reg _T_4253 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 533:82]
+    _T_4253 <= _T_4252 @[el2_lsu_bus_buffer.scala 533:82]
+    node _T_4254 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 533:121]
+    node _T_4255 = mux(buf_error_en[3], UInt<1>("h01"), _T_4254) @[el2_lsu_bus_buffer.scala 533:86]
+    node _T_4256 = and(_T_4255, buf_rst[3]) @[el2_lsu_bus_buffer.scala 533:126]
+    reg _T_4257 : UInt<1>, io.lsu_bus_buf_c1_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 533:82]
+    _T_4257 <= _T_4256 @[el2_lsu_bus_buffer.scala 533:82]
+    node _T_4258 = cat(_T_4257, _T_4253) @[Cat.scala 29:58]
+    node _T_4259 = cat(_T_4258, _T_4249) @[Cat.scala 29:58]
+    node _T_4260 = cat(_T_4259, _T_4245) @[Cat.scala 29:58]
+    buf_error <= _T_4260 @[el2_lsu_bus_buffer.scala 533:15]
+    node _T_4261 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 535:60]
+    node _T_4262 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 535:60]
+    node _T_4263 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 535:60]
+    node _T_4264 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 535:60]
+    node _T_4265 = add(_T_4264, _T_4263) @[el2_lsu_bus_buffer.scala 535:96]
+    node _T_4266 = add(_T_4265, _T_4262) @[el2_lsu_bus_buffer.scala 535:96]
+    node buf_numvld_any = add(_T_4266, _T_4261) @[el2_lsu_bus_buffer.scala 535:96]
+    node _T_4267 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 536:60]
+    node _T_4268 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 536:76]
+    node _T_4269 = eq(_T_4268, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 536:79]
+    node _T_4270 = and(_T_4267, _T_4269) @[el2_lsu_bus_buffer.scala 536:64]
+    node _T_4271 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 536:91]
+    node _T_4272 = and(_T_4270, _T_4271) @[el2_lsu_bus_buffer.scala 536:89]
+    node _T_4273 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 536:60]
+    node _T_4274 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 536:76]
+    node _T_4275 = eq(_T_4274, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 536:79]
+    node _T_4276 = and(_T_4273, _T_4275) @[el2_lsu_bus_buffer.scala 536:64]
+    node _T_4277 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 536:91]
+    node _T_4278 = and(_T_4276, _T_4277) @[el2_lsu_bus_buffer.scala 536:89]
+    node _T_4279 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 536:60]
+    node _T_4280 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 536:76]
+    node _T_4281 = eq(_T_4280, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 536:79]
+    node _T_4282 = and(_T_4279, _T_4281) @[el2_lsu_bus_buffer.scala 536:64]
+    node _T_4283 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 536:91]
+    node _T_4284 = and(_T_4282, _T_4283) @[el2_lsu_bus_buffer.scala 536:89]
+    node _T_4285 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 536:60]
+    node _T_4286 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 536:76]
+    node _T_4287 = eq(_T_4286, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 536:79]
+    node _T_4288 = and(_T_4285, _T_4287) @[el2_lsu_bus_buffer.scala 536:64]
+    node _T_4289 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 536:91]
+    node _T_4290 = and(_T_4288, _T_4289) @[el2_lsu_bus_buffer.scala 536:89]
+    node _T_4291 = add(_T_4290, _T_4284) @[el2_lsu_bus_buffer.scala 536:142]
+    node _T_4292 = add(_T_4291, _T_4278) @[el2_lsu_bus_buffer.scala 536:142]
+    node _T_4293 = add(_T_4292, _T_4272) @[el2_lsu_bus_buffer.scala 536:142]
+    buf_numvld_wrcmd_any <= _T_4293 @[el2_lsu_bus_buffer.scala 536:24]
+    node _T_4294 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 537:60]
+    node _T_4295 = eq(_T_4294, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 537:63]
+    node _T_4296 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 537:75]
+    node _T_4297 = and(_T_4295, _T_4296) @[el2_lsu_bus_buffer.scala 537:73]
+    node _T_4298 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 537:60]
+    node _T_4299 = eq(_T_4298, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 537:63]
+    node _T_4300 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 537:75]
+    node _T_4301 = and(_T_4299, _T_4300) @[el2_lsu_bus_buffer.scala 537:73]
+    node _T_4302 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 537:60]
+    node _T_4303 = eq(_T_4302, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 537:63]
+    node _T_4304 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 537:75]
+    node _T_4305 = and(_T_4303, _T_4304) @[el2_lsu_bus_buffer.scala 537:73]
+    node _T_4306 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 537:60]
+    node _T_4307 = eq(_T_4306, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 537:63]
+    node _T_4308 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 537:75]
+    node _T_4309 = and(_T_4307, _T_4308) @[el2_lsu_bus_buffer.scala 537:73]
+    node _T_4310 = add(_T_4309, _T_4305) @[el2_lsu_bus_buffer.scala 537:126]
+    node _T_4311 = add(_T_4310, _T_4301) @[el2_lsu_bus_buffer.scala 537:126]
+    node _T_4312 = add(_T_4311, _T_4297) @[el2_lsu_bus_buffer.scala 537:126]
+    buf_numvld_cmd_any <= _T_4312 @[el2_lsu_bus_buffer.scala 537:22]
+    node _T_4313 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 538:61]
+    node _T_4314 = eq(_T_4313, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 538:64]
+    node _T_4315 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 538:85]
+    node _T_4316 = eq(_T_4315, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 538:88]
+    node _T_4317 = or(_T_4314, _T_4316) @[el2_lsu_bus_buffer.scala 538:74]
+    node _T_4318 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 538:102]
+    node _T_4319 = and(_T_4317, _T_4318) @[el2_lsu_bus_buffer.scala 538:100]
+    node _T_4320 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 538:61]
+    node _T_4321 = eq(_T_4320, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 538:64]
+    node _T_4322 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 538:85]
+    node _T_4323 = eq(_T_4322, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 538:88]
+    node _T_4324 = or(_T_4321, _T_4323) @[el2_lsu_bus_buffer.scala 538:74]
+    node _T_4325 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 538:102]
+    node _T_4326 = and(_T_4324, _T_4325) @[el2_lsu_bus_buffer.scala 538:100]
+    node _T_4327 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 538:61]
+    node _T_4328 = eq(_T_4327, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 538:64]
+    node _T_4329 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 538:85]
+    node _T_4330 = eq(_T_4329, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 538:88]
+    node _T_4331 = or(_T_4328, _T_4330) @[el2_lsu_bus_buffer.scala 538:74]
+    node _T_4332 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 538:102]
+    node _T_4333 = and(_T_4331, _T_4332) @[el2_lsu_bus_buffer.scala 538:100]
+    node _T_4334 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 538:61]
+    node _T_4335 = eq(_T_4334, UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 538:64]
+    node _T_4336 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 538:85]
+    node _T_4337 = eq(_T_4336, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 538:88]
+    node _T_4338 = or(_T_4335, _T_4337) @[el2_lsu_bus_buffer.scala 538:74]
+    node _T_4339 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 538:102]
+    node _T_4340 = and(_T_4338, _T_4339) @[el2_lsu_bus_buffer.scala 538:100]
+    node _T_4341 = add(_T_4340, _T_4333) @[el2_lsu_bus_buffer.scala 538:153]
+    node _T_4342 = add(_T_4341, _T_4326) @[el2_lsu_bus_buffer.scala 538:153]
+    node _T_4343 = add(_T_4342, _T_4319) @[el2_lsu_bus_buffer.scala 538:153]
+    buf_numvld_pend_any <= _T_4343 @[el2_lsu_bus_buffer.scala 538:23]
+    node _T_4344 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 539:61]
+    node _T_4345 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 539:61]
+    node _T_4346 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 539:61]
+    node _T_4347 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 539:61]
+    node _T_4348 = or(_T_4347, _T_4346) @[el2_lsu_bus_buffer.scala 539:93]
+    node _T_4349 = or(_T_4348, _T_4345) @[el2_lsu_bus_buffer.scala 539:93]
+    node _T_4350 = or(_T_4349, _T_4344) @[el2_lsu_bus_buffer.scala 539:93]
+    any_done_wait_state <= _T_4350 @[el2_lsu_bus_buffer.scala 539:23]
+    node _T_4351 = orr(buf_numvld_pend_any) @[el2_lsu_bus_buffer.scala 540:53]
+    io.lsu_bus_buffer_pend_any <= _T_4351 @[el2_lsu_bus_buffer.scala 540:30]
+    node _T_4352 = and(io.ldst_dual_d, io.dec_lsu_valid_raw_d) @[el2_lsu_bus_buffer.scala 541:52]
+    node _T_4353 = geq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 541:92]
+    node _T_4354 = eq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 541:119]
+    node _T_4355 = mux(_T_4352, _T_4353, _T_4354) @[el2_lsu_bus_buffer.scala 541:36]
+    io.lsu_bus_buffer_full_any <= _T_4355 @[el2_lsu_bus_buffer.scala 541:30]
+    node _T_4356 = orr(buf_state[0]) @[el2_lsu_bus_buffer.scala 542:52]
+    node _T_4357 = orr(buf_state[1]) @[el2_lsu_bus_buffer.scala 542:52]
+    node _T_4358 = orr(buf_state[2]) @[el2_lsu_bus_buffer.scala 542:52]
+    node _T_4359 = orr(buf_state[3]) @[el2_lsu_bus_buffer.scala 542:52]
+    node _T_4360 = or(_T_4356, _T_4357) @[el2_lsu_bus_buffer.scala 542:65]
+    node _T_4361 = or(_T_4360, _T_4358) @[el2_lsu_bus_buffer.scala 542:65]
+    node _T_4362 = or(_T_4361, _T_4359) @[el2_lsu_bus_buffer.scala 542:65]
+    node _T_4363 = eq(_T_4362, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 542:34]
+    node _T_4364 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 542:72]
+    node _T_4365 = and(_T_4363, _T_4364) @[el2_lsu_bus_buffer.scala 542:70]
+    node _T_4366 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 542:86]
+    node _T_4367 = and(_T_4365, _T_4366) @[el2_lsu_bus_buffer.scala 542:84]
+    io.lsu_bus_buffer_empty_any <= _T_4367 @[el2_lsu_bus_buffer.scala 542:31]
+    node _T_4368 = and(io.lsu_busreq_m, io.lsu_pkt_m.valid) @[el2_lsu_bus_buffer.scala 544:51]
+    node _T_4369 = and(_T_4368, io.lsu_pkt_m.load) @[el2_lsu_bus_buffer.scala 544:72]
+    node _T_4370 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 544:94]
+    node _T_4371 = and(_T_4369, _T_4370) @[el2_lsu_bus_buffer.scala 544:92]
+    node _T_4372 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 544:111]
+    node _T_4373 = and(_T_4371, _T_4372) @[el2_lsu_bus_buffer.scala 544:109]
+    io.lsu_nonblock_load_valid_m <= _T_4373 @[el2_lsu_bus_buffer.scala 544:32]
+    io.lsu_nonblock_load_tag_m <= WrPtr0_m @[el2_lsu_bus_buffer.scala 545:30]
+    wire lsu_nonblock_load_valid_r : UInt<1>
+    lsu_nonblock_load_valid_r <= UInt<1>("h00")
+    node _T_4374 = eq(io.lsu_commit_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 547:61]
+    node _T_4375 = and(lsu_nonblock_load_valid_r, _T_4374) @[el2_lsu_bus_buffer.scala 547:59]
+    io.lsu_nonblock_load_inv_r <= _T_4375 @[el2_lsu_bus_buffer.scala 547:30]
+    io.lsu_nonblock_load_inv_tag_r <= WrPtr0_r @[el2_lsu_bus_buffer.scala 548:34]
+    node _T_4376 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 549:80]
+    node _T_4377 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 549:127]
+    node _T_4378 = and(UInt<1>("h01"), _T_4377) @[el2_lsu_bus_buffer.scala 549:116]
+    node _T_4379 = eq(_T_4378, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:95]
+    node _T_4380 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 549:80]
+    node _T_4381 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 549:127]
+    node _T_4382 = and(UInt<1>("h01"), _T_4381) @[el2_lsu_bus_buffer.scala 549:116]
+    node _T_4383 = eq(_T_4382, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:95]
+    node _T_4384 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 549:80]
+    node _T_4385 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 549:127]
+    node _T_4386 = and(UInt<1>("h01"), _T_4385) @[el2_lsu_bus_buffer.scala 549:116]
+    node _T_4387 = eq(_T_4386, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:95]
+    node _T_4388 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 549:80]
+    node _T_4389 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 549:127]
+    node _T_4390 = and(UInt<1>("h01"), _T_4389) @[el2_lsu_bus_buffer.scala 549:116]
+    node _T_4391 = eq(_T_4390, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 549:95]
+    node _T_4392 = mux(_T_4376, _T_4379, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4393 = mux(_T_4380, _T_4383, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4394 = mux(_T_4384, _T_4387, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4395 = mux(_T_4388, _T_4391, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4396 = or(_T_4392, _T_4393) @[Mux.scala 27:72]
+    node _T_4397 = or(_T_4396, _T_4394) @[Mux.scala 27:72]
+    node _T_4398 = or(_T_4397, _T_4395) @[Mux.scala 27:72]
+    wire lsu_nonblock_load_data_ready : UInt<1> @[Mux.scala 27:72]
+    lsu_nonblock_load_data_ready <= _T_4398 @[Mux.scala 27:72]
+    node _T_4399 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 550:80]
+    node _T_4400 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 550:104]
+    node _T_4401 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 550:120]
+    node _T_4402 = eq(_T_4401, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 550:110]
+    node _T_4403 = and(_T_4400, _T_4402) @[el2_lsu_bus_buffer.scala 550:108]
+    node _T_4404 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 550:80]
+    node _T_4405 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 550:104]
+    node _T_4406 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 550:120]
+    node _T_4407 = eq(_T_4406, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 550:110]
+    node _T_4408 = and(_T_4405, _T_4407) @[el2_lsu_bus_buffer.scala 550:108]
+    node _T_4409 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 550:80]
+    node _T_4410 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 550:104]
+    node _T_4411 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 550:120]
+    node _T_4412 = eq(_T_4411, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 550:110]
+    node _T_4413 = and(_T_4410, _T_4412) @[el2_lsu_bus_buffer.scala 550:108]
+    node _T_4414 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 550:80]
+    node _T_4415 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 550:104]
+    node _T_4416 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 550:120]
+    node _T_4417 = eq(_T_4416, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 550:110]
+    node _T_4418 = and(_T_4415, _T_4417) @[el2_lsu_bus_buffer.scala 550:108]
+    node _T_4419 = mux(_T_4399, _T_4403, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4420 = mux(_T_4404, _T_4408, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4421 = mux(_T_4409, _T_4413, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4422 = mux(_T_4414, _T_4418, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4423 = or(_T_4419, _T_4420) @[Mux.scala 27:72]
+    node _T_4424 = or(_T_4423, _T_4421) @[Mux.scala 27:72]
+    node _T_4425 = or(_T_4424, _T_4422) @[Mux.scala 27:72]
+    wire _T_4426 : UInt<1> @[Mux.scala 27:72]
+    _T_4426 <= _T_4425 @[Mux.scala 27:72]
+    io.lsu_nonblock_load_data_error <= _T_4426 @[el2_lsu_bus_buffer.scala 550:35]
+    node _T_4427 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 551:79]
+    node _T_4428 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 551:102]
+    node _T_4429 = eq(_T_4428, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:92]
+    node _T_4430 = and(_T_4427, _T_4429) @[el2_lsu_bus_buffer.scala 551:90]
+    node _T_4431 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:109]
+    node _T_4432 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:124]
+    node _T_4433 = or(_T_4431, _T_4432) @[el2_lsu_bus_buffer.scala 551:122]
+    node _T_4434 = and(_T_4430, _T_4433) @[el2_lsu_bus_buffer.scala 551:106]
+    node _T_4435 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 551:79]
+    node _T_4436 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 551:102]
+    node _T_4437 = eq(_T_4436, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:92]
+    node _T_4438 = and(_T_4435, _T_4437) @[el2_lsu_bus_buffer.scala 551:90]
+    node _T_4439 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:109]
+    node _T_4440 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:124]
+    node _T_4441 = or(_T_4439, _T_4440) @[el2_lsu_bus_buffer.scala 551:122]
+    node _T_4442 = and(_T_4438, _T_4441) @[el2_lsu_bus_buffer.scala 551:106]
+    node _T_4443 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 551:79]
+    node _T_4444 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 551:102]
+    node _T_4445 = eq(_T_4444, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:92]
+    node _T_4446 = and(_T_4443, _T_4445) @[el2_lsu_bus_buffer.scala 551:90]
+    node _T_4447 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:109]
+    node _T_4448 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:124]
+    node _T_4449 = or(_T_4447, _T_4448) @[el2_lsu_bus_buffer.scala 551:122]
+    node _T_4450 = and(_T_4446, _T_4449) @[el2_lsu_bus_buffer.scala 551:106]
+    node _T_4451 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 551:79]
+    node _T_4452 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 551:102]
+    node _T_4453 = eq(_T_4452, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:92]
+    node _T_4454 = and(_T_4451, _T_4453) @[el2_lsu_bus_buffer.scala 551:90]
+    node _T_4455 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:109]
+    node _T_4456 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 551:124]
+    node _T_4457 = or(_T_4455, _T_4456) @[el2_lsu_bus_buffer.scala 551:122]
+    node _T_4458 = and(_T_4454, _T_4457) @[el2_lsu_bus_buffer.scala 551:106]
+    node _T_4459 = mux(_T_4434, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4460 = mux(_T_4442, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4461 = mux(_T_4450, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4462 = mux(_T_4458, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4463 = or(_T_4459, _T_4460) @[Mux.scala 27:72]
+    node _T_4464 = or(_T_4463, _T_4461) @[Mux.scala 27:72]
+    node _T_4465 = or(_T_4464, _T_4462) @[Mux.scala 27:72]
+    wire _T_4466 : UInt<2> @[Mux.scala 27:72]
+    _T_4466 <= _T_4465 @[Mux.scala 27:72]
+    io.lsu_nonblock_load_data_tag <= _T_4466 @[el2_lsu_bus_buffer.scala 551:33]
+    node _T_4467 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 552:78]
+    node _T_4468 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 552:101]
+    node _T_4469 = eq(_T_4468, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:91]
+    node _T_4470 = and(_T_4467, _T_4469) @[el2_lsu_bus_buffer.scala 552:89]
+    node _T_4471 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:108]
+    node _T_4472 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:123]
+    node _T_4473 = or(_T_4471, _T_4472) @[el2_lsu_bus_buffer.scala 552:121]
+    node _T_4474 = and(_T_4470, _T_4473) @[el2_lsu_bus_buffer.scala 552:105]
+    node _T_4475 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 552:78]
+    node _T_4476 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 552:101]
+    node _T_4477 = eq(_T_4476, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:91]
+    node _T_4478 = and(_T_4475, _T_4477) @[el2_lsu_bus_buffer.scala 552:89]
+    node _T_4479 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:108]
+    node _T_4480 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:123]
+    node _T_4481 = or(_T_4479, _T_4480) @[el2_lsu_bus_buffer.scala 552:121]
+    node _T_4482 = and(_T_4478, _T_4481) @[el2_lsu_bus_buffer.scala 552:105]
+    node _T_4483 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 552:78]
+    node _T_4484 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 552:101]
+    node _T_4485 = eq(_T_4484, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:91]
+    node _T_4486 = and(_T_4483, _T_4485) @[el2_lsu_bus_buffer.scala 552:89]
+    node _T_4487 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:108]
+    node _T_4488 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:123]
+    node _T_4489 = or(_T_4487, _T_4488) @[el2_lsu_bus_buffer.scala 552:121]
+    node _T_4490 = and(_T_4486, _T_4489) @[el2_lsu_bus_buffer.scala 552:105]
+    node _T_4491 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 552:78]
+    node _T_4492 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 552:101]
+    node _T_4493 = eq(_T_4492, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:91]
+    node _T_4494 = and(_T_4491, _T_4493) @[el2_lsu_bus_buffer.scala 552:89]
+    node _T_4495 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:108]
+    node _T_4496 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 552:123]
+    node _T_4497 = or(_T_4495, _T_4496) @[el2_lsu_bus_buffer.scala 552:121]
+    node _T_4498 = and(_T_4494, _T_4497) @[el2_lsu_bus_buffer.scala 552:105]
+    node _T_4499 = mux(_T_4474, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4500 = mux(_T_4482, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4501 = mux(_T_4490, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4502 = mux(_T_4498, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4503 = or(_T_4499, _T_4500) @[Mux.scala 27:72]
+    node _T_4504 = or(_T_4503, _T_4501) @[Mux.scala 27:72]
+    node _T_4505 = or(_T_4504, _T_4502) @[Mux.scala 27:72]
+    wire lsu_nonblock_load_data_lo : UInt<32> @[Mux.scala 27:72]
+    lsu_nonblock_load_data_lo <= _T_4505 @[Mux.scala 27:72]
+    node _T_4506 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 553:78]
+    node _T_4507 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 553:101]
+    node _T_4508 = eq(_T_4507, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 553:91]
+    node _T_4509 = and(_T_4506, _T_4508) @[el2_lsu_bus_buffer.scala 553:89]
+    node _T_4510 = or(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 553:120]
+    node _T_4511 = and(_T_4509, _T_4510) @[el2_lsu_bus_buffer.scala 553:105]
+    node _T_4512 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 553:78]
+    node _T_4513 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 553:101]
+    node _T_4514 = eq(_T_4513, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 553:91]
+    node _T_4515 = and(_T_4512, _T_4514) @[el2_lsu_bus_buffer.scala 553:89]
+    node _T_4516 = or(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 553:120]
+    node _T_4517 = and(_T_4515, _T_4516) @[el2_lsu_bus_buffer.scala 553:105]
+    node _T_4518 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 553:78]
+    node _T_4519 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 553:101]
+    node _T_4520 = eq(_T_4519, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 553:91]
+    node _T_4521 = and(_T_4518, _T_4520) @[el2_lsu_bus_buffer.scala 553:89]
+    node _T_4522 = or(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 553:120]
+    node _T_4523 = and(_T_4521, _T_4522) @[el2_lsu_bus_buffer.scala 553:105]
+    node _T_4524 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 553:78]
+    node _T_4525 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 553:101]
+    node _T_4526 = eq(_T_4525, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 553:91]
+    node _T_4527 = and(_T_4524, _T_4526) @[el2_lsu_bus_buffer.scala 553:89]
+    node _T_4528 = or(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 553:120]
+    node _T_4529 = and(_T_4527, _T_4528) @[el2_lsu_bus_buffer.scala 553:105]
+    node _T_4530 = mux(_T_4511, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4531 = mux(_T_4517, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4532 = mux(_T_4523, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4533 = mux(_T_4529, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4534 = or(_T_4530, _T_4531) @[Mux.scala 27:72]
+    node _T_4535 = or(_T_4534, _T_4532) @[Mux.scala 27:72]
+    node _T_4536 = or(_T_4535, _T_4533) @[Mux.scala 27:72]
+    wire lsu_nonblock_load_data_hi : UInt<32> @[Mux.scala 27:72]
+    lsu_nonblock_load_data_hi <= _T_4536 @[Mux.scala 27:72]
+    node _T_4537 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4538 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4539 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4540 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4541 = mux(_T_4537, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4542 = mux(_T_4538, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4543 = mux(_T_4539, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4544 = mux(_T_4540, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4545 = or(_T_4541, _T_4542) @[Mux.scala 27:72]
+    node _T_4546 = or(_T_4545, _T_4543) @[Mux.scala 27:72]
+    node _T_4547 = or(_T_4546, _T_4544) @[Mux.scala 27:72]
+    wire lsu_nonblock_addr_offset : UInt<32> @[Mux.scala 27:72]
+    lsu_nonblock_addr_offset <= _T_4547 @[Mux.scala 27:72]
+    node _T_4548 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4549 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4550 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4551 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4552 = mux(_T_4548, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4553 = mux(_T_4549, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4554 = mux(_T_4550, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4555 = mux(_T_4551, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4556 = or(_T_4552, _T_4553) @[Mux.scala 27:72]
+    node _T_4557 = or(_T_4556, _T_4554) @[Mux.scala 27:72]
+    node _T_4558 = or(_T_4557, _T_4555) @[Mux.scala 27:72]
+    wire lsu_nonblock_sz : UInt<2> @[Mux.scala 27:72]
+    lsu_nonblock_sz <= _T_4558 @[Mux.scala 27:72]
+    node _T_4559 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4560 = bits(buf_unsign, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4561 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4562 = bits(buf_unsign, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4563 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4564 = bits(buf_unsign, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4565 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4566 = bits(buf_unsign, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4567 = mux(_T_4559, _T_4560, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4568 = mux(_T_4561, _T_4562, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4569 = mux(_T_4563, _T_4564, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4570 = mux(_T_4565, _T_4566, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4571 = or(_T_4567, _T_4568) @[Mux.scala 27:72]
+    node _T_4572 = or(_T_4571, _T_4569) @[Mux.scala 27:72]
+    node _T_4573 = or(_T_4572, _T_4570) @[Mux.scala 27:72]
+    wire lsu_nonblock_unsign : UInt<1> @[Mux.scala 27:72]
+    lsu_nonblock_unsign <= _T_4573 @[Mux.scala 27:72]
+    node _T_4574 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58]
+    node _T_4575 = cat(_T_4574, buf_dual[1]) @[Cat.scala 29:58]
+    node _T_4576 = cat(_T_4575, buf_dual[0]) @[Cat.scala 29:58]
+    node _T_4577 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4578 = bits(_T_4576, 0, 0) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4579 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4580 = bits(_T_4576, 1, 1) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4581 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4582 = bits(_T_4576, 2, 2) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4583 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 110:118]
+    node _T_4584 = bits(_T_4576, 3, 3) @[el2_lsu_bus_buffer.scala 110:129]
+    node _T_4585 = mux(_T_4577, _T_4578, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4586 = mux(_T_4579, _T_4580, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4587 = mux(_T_4581, _T_4582, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4588 = mux(_T_4583, _T_4584, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4589 = or(_T_4585, _T_4586) @[Mux.scala 27:72]
+    node _T_4590 = or(_T_4589, _T_4587) @[Mux.scala 27:72]
+    node _T_4591 = or(_T_4590, _T_4588) @[Mux.scala 27:72]
+    wire lsu_nonblock_dual : UInt<1> @[Mux.scala 27:72]
+    lsu_nonblock_dual <= _T_4591 @[Mux.scala 27:72]
+    node _T_4592 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58]
+    node _T_4593 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[el2_lsu_bus_buffer.scala 558:121]
+    node lsu_nonblock_data_unalgn = dshr(_T_4592, _T_4593) @[el2_lsu_bus_buffer.scala 558:92]
+    node _T_4594 = eq(io.lsu_nonblock_load_data_error, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 559:69]
+    node _T_4595 = and(lsu_nonblock_load_data_ready, _T_4594) @[el2_lsu_bus_buffer.scala 559:67]
+    io.lsu_nonblock_load_data_valid <= _T_4595 @[el2_lsu_bus_buffer.scala 559:35]
+    node _T_4596 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 560:81]
+    node _T_4597 = and(lsu_nonblock_unsign, _T_4596) @[el2_lsu_bus_buffer.scala 560:63]
+    node _T_4598 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 560:131]
+    node _T_4599 = cat(UInt<24>("h00"), _T_4598) @[Cat.scala 29:58]
+    node _T_4600 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 561:45]
+    node _T_4601 = and(lsu_nonblock_unsign, _T_4600) @[el2_lsu_bus_buffer.scala 561:26]
+    node _T_4602 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 561:95]
+    node _T_4603 = cat(UInt<16>("h00"), _T_4602) @[Cat.scala 29:58]
+    node _T_4604 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:6]
+    node _T_4605 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 562:45]
+    node _T_4606 = and(_T_4604, _T_4605) @[el2_lsu_bus_buffer.scala 562:27]
+    node _T_4607 = bits(lsu_nonblock_data_unalgn, 7, 7) @[el2_lsu_bus_buffer.scala 562:93]
+    node _T_4608 = bits(_T_4607, 0, 0) @[Bitwise.scala 72:15]
+    node _T_4609 = mux(_T_4608, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
+    node _T_4610 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 562:123]
+    node _T_4611 = cat(_T_4609, _T_4610) @[Cat.scala 29:58]
+    node _T_4612 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 563:6]
+    node _T_4613 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 563:45]
+    node _T_4614 = and(_T_4612, _T_4613) @[el2_lsu_bus_buffer.scala 563:27]
+    node _T_4615 = bits(lsu_nonblock_data_unalgn, 15, 15) @[el2_lsu_bus_buffer.scala 563:93]
+    node _T_4616 = bits(_T_4615, 0, 0) @[Bitwise.scala 72:15]
+    node _T_4617 = mux(_T_4616, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
+    node _T_4618 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 563:124]
+    node _T_4619 = cat(_T_4617, _T_4618) @[Cat.scala 29:58]
+    node _T_4620 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 564:21]
+    node _T_4621 = mux(_T_4597, _T_4599, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4622 = mux(_T_4601, _T_4603, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4623 = mux(_T_4606, _T_4611, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4624 = mux(_T_4614, _T_4619, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4625 = mux(_T_4620, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4626 = or(_T_4621, _T_4622) @[Mux.scala 27:72]
+    node _T_4627 = or(_T_4626, _T_4623) @[Mux.scala 27:72]
+    node _T_4628 = or(_T_4627, _T_4624) @[Mux.scala 27:72]
+    node _T_4629 = or(_T_4628, _T_4625) @[Mux.scala 27:72]
+    wire _T_4630 : UInt<64> @[Mux.scala 27:72]
+    _T_4630 <= _T_4629 @[Mux.scala 27:72]
+    io.lsu_nonblock_load_data <= _T_4630 @[el2_lsu_bus_buffer.scala 560:29]
+    node _T_4631 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 565:68]
+    node _T_4632 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 565:95]
+    node _T_4633 = and(_T_4632, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 565:99]
+    node _T_4634 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 565:68]
+    node _T_4635 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 565:95]
+    node _T_4636 = and(_T_4635, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 565:99]
+    node _T_4637 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 565:68]
+    node _T_4638 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 565:95]
+    node _T_4639 = and(_T_4638, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 565:99]
+    node _T_4640 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 565:68]
+    node _T_4641 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 565:95]
+    node _T_4642 = and(_T_4641, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 565:99]
+    node _T_4643 = mux(_T_4631, _T_4633, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4644 = mux(_T_4634, _T_4636, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4645 = mux(_T_4637, _T_4639, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4646 = mux(_T_4640, _T_4642, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4647 = or(_T_4643, _T_4644) @[Mux.scala 27:72]
+    node _T_4648 = or(_T_4647, _T_4645) @[Mux.scala 27:72]
+    node _T_4649 = or(_T_4648, _T_4646) @[Mux.scala 27:72]
+    wire _T_4650 : UInt<1> @[Mux.scala 27:72]
+    _T_4650 <= _T_4649 @[Mux.scala 27:72]
+    bus_sideeffect_pend <= _T_4650 @[el2_lsu_bus_buffer.scala 565:23]
+    node _T_4651 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 566:71]
+    node _T_4652 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 567:25]
+    node _T_4653 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 567:50]
+    node _T_4654 = bits(buf_addr[0], 31, 3) @[el2_lsu_bus_buffer.scala 567:70]
+    node _T_4655 = eq(_T_4653, _T_4654) @[el2_lsu_bus_buffer.scala 567:56]
+    node _T_4656 = and(_T_4652, _T_4655) @[el2_lsu_bus_buffer.scala 567:38]
+    node _T_4657 = eq(obuf_tag0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 567:92]
+    node _T_4658 = eq(obuf_tag1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 567:126]
+    node _T_4659 = and(obuf_merge, _T_4658) @[el2_lsu_bus_buffer.scala 567:114]
+    node _T_4660 = or(_T_4657, _T_4659) @[el2_lsu_bus_buffer.scala 567:100]
+    node _T_4661 = eq(_T_4660, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 567:80]
+    node _T_4662 = and(_T_4656, _T_4661) @[el2_lsu_bus_buffer.scala 567:78]
+    node _T_4663 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 566:71]
+    node _T_4664 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 567:25]
+    node _T_4665 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 567:50]
+    node _T_4666 = bits(buf_addr[1], 31, 3) @[el2_lsu_bus_buffer.scala 567:70]
+    node _T_4667 = eq(_T_4665, _T_4666) @[el2_lsu_bus_buffer.scala 567:56]
+    node _T_4668 = and(_T_4664, _T_4667) @[el2_lsu_bus_buffer.scala 567:38]
+    node _T_4669 = eq(obuf_tag0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 567:92]
+    node _T_4670 = eq(obuf_tag1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 567:126]
+    node _T_4671 = and(obuf_merge, _T_4670) @[el2_lsu_bus_buffer.scala 567:114]
+    node _T_4672 = or(_T_4669, _T_4671) @[el2_lsu_bus_buffer.scala 567:100]
+    node _T_4673 = eq(_T_4672, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 567:80]
+    node _T_4674 = and(_T_4668, _T_4673) @[el2_lsu_bus_buffer.scala 567:78]
+    node _T_4675 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 566:71]
+    node _T_4676 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 567:25]
+    node _T_4677 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 567:50]
+    node _T_4678 = bits(buf_addr[2], 31, 3) @[el2_lsu_bus_buffer.scala 567:70]
+    node _T_4679 = eq(_T_4677, _T_4678) @[el2_lsu_bus_buffer.scala 567:56]
+    node _T_4680 = and(_T_4676, _T_4679) @[el2_lsu_bus_buffer.scala 567:38]
+    node _T_4681 = eq(obuf_tag0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 567:92]
+    node _T_4682 = eq(obuf_tag1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 567:126]
+    node _T_4683 = and(obuf_merge, _T_4682) @[el2_lsu_bus_buffer.scala 567:114]
+    node _T_4684 = or(_T_4681, _T_4683) @[el2_lsu_bus_buffer.scala 567:100]
+    node _T_4685 = eq(_T_4684, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 567:80]
+    node _T_4686 = and(_T_4680, _T_4685) @[el2_lsu_bus_buffer.scala 567:78]
+    node _T_4687 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 566:71]
+    node _T_4688 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 567:25]
+    node _T_4689 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 567:50]
+    node _T_4690 = bits(buf_addr[3], 31, 3) @[el2_lsu_bus_buffer.scala 567:70]
+    node _T_4691 = eq(_T_4689, _T_4690) @[el2_lsu_bus_buffer.scala 567:56]
+    node _T_4692 = and(_T_4688, _T_4691) @[el2_lsu_bus_buffer.scala 567:38]
+    node _T_4693 = eq(obuf_tag0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 567:92]
+    node _T_4694 = eq(obuf_tag1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 567:126]
+    node _T_4695 = and(obuf_merge, _T_4694) @[el2_lsu_bus_buffer.scala 567:114]
+    node _T_4696 = or(_T_4693, _T_4695) @[el2_lsu_bus_buffer.scala 567:100]
+    node _T_4697 = eq(_T_4696, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 567:80]
+    node _T_4698 = and(_T_4692, _T_4697) @[el2_lsu_bus_buffer.scala 567:78]
+    node _T_4699 = mux(_T_4651, _T_4662, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4700 = mux(_T_4663, _T_4674, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4701 = mux(_T_4675, _T_4686, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4702 = mux(_T_4687, _T_4698, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4703 = or(_T_4699, _T_4700) @[Mux.scala 27:72]
+    node _T_4704 = or(_T_4703, _T_4701) @[Mux.scala 27:72]
+    node _T_4705 = or(_T_4704, _T_4702) @[Mux.scala 27:72]
+    wire _T_4706 : UInt<1> @[Mux.scala 27:72]
+    _T_4706 <= _T_4705 @[Mux.scala 27:72]
+    bus_addr_match_pending <= _T_4706 @[el2_lsu_bus_buffer.scala 566:26]
+    node _T_4707 = or(obuf_cmd_done, obuf_data_done) @[el2_lsu_bus_buffer.scala 569:54]
+    node _T_4708 = mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 569:75]
+    node _T_4709 = and(io.lsu_axi_awready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 569:150]
+    node _T_4710 = mux(_T_4707, _T_4708, _T_4709) @[el2_lsu_bus_buffer.scala 569:39]
+    node _T_4711 = mux(obuf_write, _T_4710, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 569:23]
+    bus_cmd_ready <= _T_4711 @[el2_lsu_bus_buffer.scala 569:17]
+    node _T_4712 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 570:39]
+    bus_wcmd_sent <= _T_4712 @[el2_lsu_bus_buffer.scala 570:17]
+    node _T_4713 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 571:39]
+    bus_wdata_sent <= _T_4713 @[el2_lsu_bus_buffer.scala 571:18]
+    node _T_4714 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 572:35]
+    node _T_4715 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 572:70]
+    node _T_4716 = and(_T_4714, _T_4715) @[el2_lsu_bus_buffer.scala 572:52]
+    node _T_4717 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 572:111]
+    node _T_4718 = or(_T_4716, _T_4717) @[el2_lsu_bus_buffer.scala 572:89]
+    bus_cmd_sent <= _T_4718 @[el2_lsu_bus_buffer.scala 572:16]
+    node _T_4719 = and(io.lsu_axi_rvalid, io.lsu_axi_rready) @[el2_lsu_bus_buffer.scala 573:37]
+    bus_rsp_read <= _T_4719 @[el2_lsu_bus_buffer.scala 573:16]
+    node _T_4720 = and(io.lsu_axi_bvalid, io.lsu_axi_bready) @[el2_lsu_bus_buffer.scala 574:38]
+    bus_rsp_write <= _T_4720 @[el2_lsu_bus_buffer.scala 574:17]
+    bus_rsp_read_tag <= io.lsu_axi_rid @[el2_lsu_bus_buffer.scala 575:20]
+    bus_rsp_write_tag <= io.lsu_axi_bid @[el2_lsu_bus_buffer.scala 576:21]
+    node _T_4721 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 577:60]
+    node _T_4722 = and(bus_rsp_write, _T_4721) @[el2_lsu_bus_buffer.scala 577:40]
+    bus_rsp_write_error <= _T_4722 @[el2_lsu_bus_buffer.scala 577:23]
+    node _T_4723 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 578:58]
+    node _T_4724 = and(bus_rsp_read, _T_4723) @[el2_lsu_bus_buffer.scala 578:38]
+    bus_rsp_read_error <= _T_4724 @[el2_lsu_bus_buffer.scala 578:22]
+    bus_rsp_rdata <= io.lsu_axi_rdata @[el2_lsu_bus_buffer.scala 579:17]
+    node _T_4725 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 582:36]
+    node _T_4726 = eq(obuf_cmd_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:51]
+    node _T_4727 = and(_T_4725, _T_4726) @[el2_lsu_bus_buffer.scala 582:49]
+    node _T_4728 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:68]
+    node _T_4729 = and(_T_4727, _T_4728) @[el2_lsu_bus_buffer.scala 582:66]
+    io.lsu_axi_awvalid <= _T_4729 @[el2_lsu_bus_buffer.scala 582:22]
+    io.lsu_axi_awid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 583:19]
+    node _T_4730 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 584:69]
+    node _T_4731 = cat(_T_4730, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_4732 = mux(obuf_sideeffect, obuf_addr, _T_4731) @[el2_lsu_bus_buffer.scala 584:27]
+    io.lsu_axi_awaddr <= _T_4732 @[el2_lsu_bus_buffer.scala 584:21]
+    node _T_4733 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58]
+    node _T_4734 = mux(obuf_sideeffect, _T_4733, UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 585:27]
+    io.lsu_axi_awsize <= _T_4734 @[el2_lsu_bus_buffer.scala 585:21]
+    io.lsu_axi_awprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 586:21]
+    node _T_4735 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 587:28]
+    io.lsu_axi_awcache <= _T_4735 @[el2_lsu_bus_buffer.scala 587:22]
+    node _T_4736 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 588:35]
+    io.lsu_axi_awregion <= _T_4736 @[el2_lsu_bus_buffer.scala 588:23]
+    io.lsu_axi_awlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 589:20]
+    io.lsu_axi_awburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 590:22]
+    io.lsu_axi_awqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 591:20]
+    io.lsu_axi_awlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 592:21]
+    node _T_4737 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 594:35]
+    node _T_4738 = eq(obuf_data_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:50]
+    node _T_4739 = and(_T_4737, _T_4738) @[el2_lsu_bus_buffer.scala 594:48]
+    node _T_4740 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:68]
+    node _T_4741 = and(_T_4739, _T_4740) @[el2_lsu_bus_buffer.scala 594:66]
+    io.lsu_axi_wvalid <= _T_4741 @[el2_lsu_bus_buffer.scala 594:21]
+    node _T_4742 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15]
+    node _T_4743 = mux(_T_4742, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_4744 = and(obuf_byteen, _T_4743) @[el2_lsu_bus_buffer.scala 595:35]
+    io.lsu_axi_wstrb <= _T_4744 @[el2_lsu_bus_buffer.scala 595:20]
+    io.lsu_axi_wdata <= obuf_data @[el2_lsu_bus_buffer.scala 596:20]
+    io.lsu_axi_wlast <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 597:20]
+    node _T_4745 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 599:38]
+    node _T_4746 = and(obuf_valid, _T_4745) @[el2_lsu_bus_buffer.scala 599:36]
+    node _T_4747 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 599:52]
+    node _T_4748 = and(_T_4746, _T_4747) @[el2_lsu_bus_buffer.scala 599:50]
+    node _T_4749 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 599:67]
+    node _T_4750 = and(_T_4748, _T_4749) @[el2_lsu_bus_buffer.scala 599:65]
+    io.lsu_axi_arvalid <= _T_4750 @[el2_lsu_bus_buffer.scala 599:22]
+    io.lsu_axi_arid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 600:19]
+    node _T_4751 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 601:69]
+    node _T_4752 = cat(_T_4751, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_4753 = mux(obuf_sideeffect, obuf_addr, _T_4752) @[el2_lsu_bus_buffer.scala 601:27]
+    io.lsu_axi_araddr <= _T_4753 @[el2_lsu_bus_buffer.scala 601:21]
+    node _T_4754 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58]
+    node _T_4755 = mux(obuf_sideeffect, _T_4754, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 602:27]
+    io.lsu_axi_arsize <= _T_4755 @[el2_lsu_bus_buffer.scala 602:21]
+    io.lsu_axi_arprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 603:21]
+    node _T_4756 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 604:28]
+    io.lsu_axi_arcache <= _T_4756 @[el2_lsu_bus_buffer.scala 604:22]
+    node _T_4757 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 605:35]
+    io.lsu_axi_arregion <= _T_4757 @[el2_lsu_bus_buffer.scala 605:23]
+    io.lsu_axi_arlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 606:20]
+    io.lsu_axi_arburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 607:22]
+    io.lsu_axi_arqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 608:20]
+    io.lsu_axi_arlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 609:21]
+    io.lsu_axi_bready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 610:21]
+    io.lsu_axi_rready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 611:21]
+    node _T_4758 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 612:81]
+    node _T_4759 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 612:125]
+    node _T_4760 = and(io.lsu_bus_clk_en_q, _T_4759) @[el2_lsu_bus_buffer.scala 612:114]
+    node _T_4761 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 612:140]
+    node _T_4762 = and(_T_4760, _T_4761) @[el2_lsu_bus_buffer.scala 612:129]
+    node _T_4763 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 612:81]
+    node _T_4764 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 612:125]
+    node _T_4765 = and(io.lsu_bus_clk_en_q, _T_4764) @[el2_lsu_bus_buffer.scala 612:114]
+    node _T_4766 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 612:140]
+    node _T_4767 = and(_T_4765, _T_4766) @[el2_lsu_bus_buffer.scala 612:129]
+    node _T_4768 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 612:81]
+    node _T_4769 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 612:125]
+    node _T_4770 = and(io.lsu_bus_clk_en_q, _T_4769) @[el2_lsu_bus_buffer.scala 612:114]
+    node _T_4771 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 612:140]
+    node _T_4772 = and(_T_4770, _T_4771) @[el2_lsu_bus_buffer.scala 612:129]
+    node _T_4773 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 612:81]
+    node _T_4774 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 612:125]
+    node _T_4775 = and(io.lsu_bus_clk_en_q, _T_4774) @[el2_lsu_bus_buffer.scala 612:114]
+    node _T_4776 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 612:140]
+    node _T_4777 = and(_T_4775, _T_4776) @[el2_lsu_bus_buffer.scala 612:129]
+    node _T_4778 = mux(_T_4758, _T_4762, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4779 = mux(_T_4763, _T_4767, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4780 = mux(_T_4768, _T_4772, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4781 = mux(_T_4773, _T_4777, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4782 = or(_T_4778, _T_4779) @[Mux.scala 27:72]
+    node _T_4783 = or(_T_4782, _T_4780) @[Mux.scala 27:72]
+    node _T_4784 = or(_T_4783, _T_4781) @[Mux.scala 27:72]
+    wire _T_4785 : UInt<1> @[Mux.scala 27:72]
+    _T_4785 <= _T_4784 @[Mux.scala 27:72]
+    io.lsu_imprecise_error_store_any <= _T_4785 @[el2_lsu_bus_buffer.scala 612:36]
+    node _T_4786 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 613:87]
+    node _T_4787 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 613:109]
+    node _T_4788 = and(_T_4786, _T_4787) @[el2_lsu_bus_buffer.scala 613:98]
+    node _T_4789 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 613:124]
+    node _T_4790 = and(_T_4788, _T_4789) @[el2_lsu_bus_buffer.scala 613:113]
+    node _T_4791 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 613:87]
+    node _T_4792 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 613:109]
+    node _T_4793 = and(_T_4791, _T_4792) @[el2_lsu_bus_buffer.scala 613:98]
+    node _T_4794 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 613:124]
+    node _T_4795 = and(_T_4793, _T_4794) @[el2_lsu_bus_buffer.scala 613:113]
+    node _T_4796 = mux(_T_4790, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4797 = mux(_T_4795, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4798 = or(_T_4796, _T_4797) @[Mux.scala 27:72]
+    wire lsu_imprecise_error_store_tag : UInt<1> @[Mux.scala 27:72]
+    lsu_imprecise_error_store_tag <= _T_4798 @[Mux.scala 27:72]
+    node _T_4799 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 615:72]
+    node _T_4800 = and(io.lsu_nonblock_load_data_error, _T_4799) @[el2_lsu_bus_buffer.scala 615:70]
+    io.lsu_imprecise_error_load_any <= _T_4800 @[el2_lsu_bus_buffer.scala 615:35]
+    node _T_4801 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4802 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4803 = mux(_T_4801, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4804 = mux(_T_4802, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4805 = or(_T_4803, _T_4804) @[Mux.scala 27:72]
+    wire _T_4806 : UInt<32> @[Mux.scala 27:72]
+    _T_4806 <= _T_4805 @[Mux.scala 27:72]
+    node _T_4807 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4808 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4809 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4810 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 111:123]
+    node _T_4811 = mux(_T_4807, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4812 = mux(_T_4808, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4813 = mux(_T_4809, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4814 = mux(_T_4810, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_4815 = or(_T_4811, _T_4812) @[Mux.scala 27:72]
+    node _T_4816 = or(_T_4815, _T_4813) @[Mux.scala 27:72]
+    node _T_4817 = or(_T_4816, _T_4814) @[Mux.scala 27:72]
+    wire _T_4818 : UInt<32> @[Mux.scala 27:72]
+    _T_4818 <= _T_4817 @[Mux.scala 27:72]
+    node _T_4819 = mux(io.lsu_imprecise_error_store_any, _T_4806, _T_4818) @[el2_lsu_bus_buffer.scala 616:41]
+    io.lsu_imprecise_error_addr_any <= _T_4819 @[el2_lsu_bus_buffer.scala 616:35]
+    lsu_bus_cntr_overflow <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 617:25]
+    io.lsu_bus_idle_any <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 619:23]
+    node _T_4820 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 622:46]
+    node _T_4821 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 622:89]
+    node _T_4822 = or(_T_4820, _T_4821) @[el2_lsu_bus_buffer.scala 622:68]
+    node _T_4823 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 622:132]
+    node _T_4824 = or(_T_4822, _T_4823) @[el2_lsu_bus_buffer.scala 622:110]
+    io.lsu_pmu_bus_trxn <= _T_4824 @[el2_lsu_bus_buffer.scala 622:23]
+    node _T_4825 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 623:48]
+    node _T_4826 = and(_T_4825, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 623:65]
+    io.lsu_pmu_bus_misaligned <= _T_4826 @[el2_lsu_bus_buffer.scala 623:29]
+    node _T_4827 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 624:59]
+    io.lsu_pmu_bus_error <= _T_4827 @[el2_lsu_bus_buffer.scala 624:24]
+    node _T_4828 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 626:48]
+    node _T_4829 = and(io.lsu_axi_awvalid, _T_4828) @[el2_lsu_bus_buffer.scala 626:46]
+    node _T_4830 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 626:92]
+    node _T_4831 = and(io.lsu_axi_wvalid, _T_4830) @[el2_lsu_bus_buffer.scala 626:90]
+    node _T_4832 = or(_T_4829, _T_4831) @[el2_lsu_bus_buffer.scala 626:69]
+    node _T_4833 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 626:136]
+    node _T_4834 = and(io.lsu_axi_arvalid, _T_4833) @[el2_lsu_bus_buffer.scala 626:134]
+    node _T_4835 = or(_T_4832, _T_4834) @[el2_lsu_bus_buffer.scala 626:112]
+    io.lsu_pmu_bus_busy <= _T_4835 @[el2_lsu_bus_buffer.scala 626:23]
+    reg _T_4836 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 628:49]
+    _T_4836 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 628:49]
+    WrPtr0_r <= _T_4836 @[el2_lsu_bus_buffer.scala 628:12]
+    reg _T_4837 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 629:49]
+    _T_4837 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 629:49]
+    WrPtr1_r <= _T_4837 @[el2_lsu_bus_buffer.scala 629:12]
+    node _T_4838 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 630:75]
+    node _T_4839 = and(io.lsu_busreq_m, _T_4838) @[el2_lsu_bus_buffer.scala 630:73]
+    node _T_4840 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 630:89]
+    node _T_4841 = and(_T_4839, _T_4840) @[el2_lsu_bus_buffer.scala 630:87]
+    reg _T_4842 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 630:56]
+    _T_4842 <= _T_4841 @[el2_lsu_bus_buffer.scala 630:56]
+    io.lsu_busreq_r <= _T_4842 @[el2_lsu_bus_buffer.scala 630:19]
+    reg _T_4843 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 631:66]
+    _T_4843 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 631:66]
+    lsu_nonblock_load_valid_r <= _T_4843 @[el2_lsu_bus_buffer.scala 631:29]
+    
diff --git a/el2_lsu_bus_buffer.v b/el2_lsu_bus_buffer.v
new file mode 100644
index 00000000..f077c3ed
--- /dev/null
+++ b/el2_lsu_bus_buffer.v
@@ -0,0 +1,4235 @@
+module rvclkhdr(
+  output  io_l1clk,
+  input   io_clk,
+  input   io_en,
+  input   io_scan_mode
+);
+  wire  clkhdr_Q; // @[el2_lib.scala 452:26]
+  wire  clkhdr_CK; // @[el2_lib.scala 452:26]
+  wire  clkhdr_EN; // @[el2_lib.scala 452:26]
+  wire  clkhdr_SE; // @[el2_lib.scala 452:26]
+  TEC_RV_ICG clkhdr ( // @[el2_lib.scala 452:26]
+    .Q(clkhdr_Q),
+    .CK(clkhdr_CK),
+    .EN(clkhdr_EN),
+    .SE(clkhdr_SE)
+  );
+  assign io_l1clk = clkhdr_Q; // @[el2_lib.scala 453:14]
+  assign clkhdr_CK = io_clk; // @[el2_lib.scala 454:18]
+  assign clkhdr_EN = io_en; // @[el2_lib.scala 455:18]
+  assign clkhdr_SE = io_scan_mode; // @[el2_lib.scala 456:18]
+endmodule
+module el2_lsu_bus_buffer(
+  input         clock,
+  input         reset,
+  input         io_scan_mode,
+  input         io_dec_tlu_external_ldfwd_disable,
+  input         io_dec_tlu_wb_coalescing_disable,
+  input         io_dec_tlu_sideeffect_posted_disable,
+  input         io_dec_tlu_force_halt,
+  input         io_lsu_c2_r_clk,
+  input         io_lsu_bus_ibuf_c1_clk,
+  input         io_lsu_bus_obuf_c1_clk,
+  input         io_lsu_bus_buf_c1_clk,
+  input         io_lsu_free_c2_clk,
+  input         io_lsu_busm_clk,
+  input         io_dec_lsu_valid_raw_d,
+  input         io_lsu_pkt_m_fast_int,
+  input         io_lsu_pkt_m_by,
+  input         io_lsu_pkt_m_half,
+  input         io_lsu_pkt_m_word,
+  input         io_lsu_pkt_m_dword,
+  input         io_lsu_pkt_m_load,
+  input         io_lsu_pkt_m_store,
+  input         io_lsu_pkt_m_unsign,
+  input         io_lsu_pkt_m_dma,
+  input         io_lsu_pkt_m_store_data_bypass_d,
+  input         io_lsu_pkt_m_load_ldst_bypass_d,
+  input         io_lsu_pkt_m_store_data_bypass_m,
+  input         io_lsu_pkt_m_valid,
+  input         io_lsu_pkt_r_fast_int,
+  input         io_lsu_pkt_r_by,
+  input         io_lsu_pkt_r_half,
+  input         io_lsu_pkt_r_word,
+  input         io_lsu_pkt_r_dword,
+  input         io_lsu_pkt_r_load,
+  input         io_lsu_pkt_r_store,
+  input         io_lsu_pkt_r_unsign,
+  input         io_lsu_pkt_r_dma,
+  input         io_lsu_pkt_r_store_data_bypass_d,
+  input         io_lsu_pkt_r_load_ldst_bypass_d,
+  input         io_lsu_pkt_r_store_data_bypass_m,
+  input         io_lsu_pkt_r_valid,
+  input  [31:0] io_lsu_addr_m,
+  input  [31:0] io_end_addr_m,
+  input  [31:0] io_lsu_addr_r,
+  input  [31:0] io_end_addr_r,
+  input  [31:0] io_store_data_r,
+  input         io_no_word_merge_r,
+  input         io_no_dword_merge_r,
+  input         io_lsu_busreq_m,
+  input         io_ld_full_hit_m,
+  input         io_flush_m_up,
+  input         io_flush_r,
+  input         io_lsu_commit_r,
+  input         io_is_sideeffects_r,
+  input         io_ldst_dual_d,
+  input         io_ldst_dual_m,
+  input         io_ldst_dual_r,
+  input  [7:0]  io_ldst_byteen_ext_m,
+  input         io_lsu_axi_awready,
+  input         io_lsu_axi_wready,
+  input         io_lsu_axi_bvalid,
+  input  [1:0]  io_lsu_axi_bresp,
+  input  [2:0]  io_lsu_axi_bid,
+  input         io_lsu_axi_arready,
+  input         io_lsu_axi_rvalid,
+  input  [2:0]  io_lsu_axi_rid,
+  input  [63:0] io_lsu_axi_rdata,
+  input  [1:0]  io_lsu_axi_rresp,
+  input         io_lsu_bus_clk_en,
+  input         io_lsu_bus_clk_en_q,
+  output        io_lsu_busreq_r,
+  output        io_lsu_bus_buffer_pend_any,
+  output        io_lsu_bus_buffer_full_any,
+  output        io_lsu_bus_buffer_empty_any,
+  output        io_lsu_bus_idle_any,
+  output [3:0]  io_ld_byte_hit_buf_lo,
+  output [3:0]  io_ld_byte_hit_buf_hi,
+  output [31:0] io_ld_fwddata_buf_lo,
+  output [31:0] io_ld_fwddata_buf_hi,
+  output        io_lsu_imprecise_error_load_any,
+  output        io_lsu_imprecise_error_store_any,
+  output [31:0] io_lsu_imprecise_error_addr_any,
+  output        io_lsu_nonblock_load_valid_m,
+  output [1:0]  io_lsu_nonblock_load_tag_m,
+  output        io_lsu_nonblock_load_inv_r,
+  output [1:0]  io_lsu_nonblock_load_inv_tag_r,
+  output        io_lsu_nonblock_load_data_valid,
+  output        io_lsu_nonblock_load_data_error,
+  output [1:0]  io_lsu_nonblock_load_data_tag,
+  output [31:0] io_lsu_nonblock_load_data,
+  output        io_lsu_pmu_bus_trxn,
+  output        io_lsu_pmu_bus_misaligned,
+  output        io_lsu_pmu_bus_error,
+  output        io_lsu_pmu_bus_busy,
+  output        io_lsu_axi_awvalid,
+  output [2:0]  io_lsu_axi_awid,
+  output [31:0] io_lsu_axi_awaddr,
+  output [3:0]  io_lsu_axi_awregion,
+  output [7:0]  io_lsu_axi_awlen,
+  output [2:0]  io_lsu_axi_awsize,
+  output [1:0]  io_lsu_axi_awburst,
+  output        io_lsu_axi_awlock,
+  output [3:0]  io_lsu_axi_awcache,
+  output [2:0]  io_lsu_axi_awprot,
+  output [3:0]  io_lsu_axi_awqos,
+  output        io_lsu_axi_wvalid,
+  output [63:0] io_lsu_axi_wdata,
+  output [7:0]  io_lsu_axi_wstrb,
+  output        io_lsu_axi_wlast,
+  output        io_lsu_axi_bready,
+  output        io_lsu_axi_arvalid,
+  output [2:0]  io_lsu_axi_arid,
+  output [31:0] io_lsu_axi_araddr,
+  output [3:0]  io_lsu_axi_arregion,
+  output [7:0]  io_lsu_axi_arlen,
+  output [2:0]  io_lsu_axi_arsize,
+  output [1:0]  io_lsu_axi_arburst,
+  output        io_lsu_axi_arlock,
+  output [3:0]  io_lsu_axi_arcache,
+  output [2:0]  io_lsu_axi_arprot,
+  output [3:0]  io_lsu_axi_arqos,
+  output        io_lsu_axi_rready
+);
+`ifdef RANDOMIZE_REG_INIT
+  reg [31:0] _RAND_0;
+  reg [31:0] _RAND_1;
+  reg [31:0] _RAND_2;
+  reg [31:0] _RAND_3;
+  reg [31:0] _RAND_4;
+  reg [31:0] _RAND_5;
+  reg [31:0] _RAND_6;
+  reg [31:0] _RAND_7;
+  reg [31:0] _RAND_8;
+  reg [31:0] _RAND_9;
+  reg [31:0] _RAND_10;
+  reg [31:0] _RAND_11;
+  reg [31:0] _RAND_12;
+  reg [31:0] _RAND_13;
+  reg [31:0] _RAND_14;
+  reg [31:0] _RAND_15;
+  reg [31:0] _RAND_16;
+  reg [31:0] _RAND_17;
+  reg [31:0] _RAND_18;
+  reg [31:0] _RAND_19;
+  reg [31:0] _RAND_20;
+  reg [31:0] _RAND_21;
+  reg [31:0] _RAND_22;
+  reg [31:0] _RAND_23;
+  reg [31:0] _RAND_24;
+  reg [31:0] _RAND_25;
+  reg [31:0] _RAND_26;
+  reg [31:0] _RAND_27;
+  reg [31:0] _RAND_28;
+  reg [31:0] _RAND_29;
+  reg [31:0] _RAND_30;
+  reg [31:0] _RAND_31;
+  reg [31:0] _RAND_32;
+  reg [31:0] _RAND_33;
+  reg [31:0] _RAND_34;
+  reg [31:0] _RAND_35;
+  reg [31:0] _RAND_36;
+  reg [31:0] _RAND_37;
+  reg [31:0] _RAND_38;
+  reg [31:0] _RAND_39;
+  reg [31:0] _RAND_40;
+  reg [31:0] _RAND_41;
+  reg [31:0] _RAND_42;
+  reg [31:0] _RAND_43;
+  reg [31:0] _RAND_44;
+  reg [31:0] _RAND_45;
+  reg [31:0] _RAND_46;
+  reg [31:0] _RAND_47;
+  reg [31:0] _RAND_48;
+  reg [31:0] _RAND_49;
+  reg [31:0] _RAND_50;
+  reg [31:0] _RAND_51;
+  reg [31:0] _RAND_52;
+  reg [31:0] _RAND_53;
+  reg [31:0] _RAND_54;
+  reg [31:0] _RAND_55;
+  reg [31:0] _RAND_56;
+  reg [31:0] _RAND_57;
+  reg [31:0] _RAND_58;
+  reg [31:0] _RAND_59;
+  reg [31:0] _RAND_60;
+  reg [31:0] _RAND_61;
+  reg [31:0] _RAND_62;
+  reg [31:0] _RAND_63;
+  reg [31:0] _RAND_64;
+  reg [31:0] _RAND_65;
+  reg [31:0] _RAND_66;
+  reg [31:0] _RAND_67;
+  reg [31:0] _RAND_68;
+  reg [31:0] _RAND_69;
+  reg [31:0] _RAND_70;
+  reg [31:0] _RAND_71;
+  reg [31:0] _RAND_72;
+  reg [31:0] _RAND_73;
+  reg [31:0] _RAND_74;
+  reg [31:0] _RAND_75;
+  reg [31:0] _RAND_76;
+  reg [63:0] _RAND_77;
+  reg [31:0] _RAND_78;
+  reg [31:0] _RAND_79;
+  reg [31:0] _RAND_80;
+  reg [31:0] _RAND_81;
+  reg [31:0] _RAND_82;
+  reg [31:0] _RAND_83;
+  reg [31:0] _RAND_84;
+  reg [31:0] _RAND_85;
+  reg [31:0] _RAND_86;
+  reg [31:0] _RAND_87;
+  reg [31:0] _RAND_88;
+  reg [31:0] _RAND_89;
+  reg [31:0] _RAND_90;
+  reg [31:0] _RAND_91;
+  reg [31:0] _RAND_92;
+  reg [31:0] _RAND_93;
+  reg [31:0] _RAND_94;
+  reg [31:0] _RAND_95;
+  reg [31:0] _RAND_96;
+  reg [31:0] _RAND_97;
+  reg [31:0] _RAND_98;
+  reg [31:0] _RAND_99;
+  reg [31:0] _RAND_100;
+  reg [31:0] _RAND_101;
+  reg [31:0] _RAND_102;
+  reg [31:0] _RAND_103;
+`endif // RANDOMIZE_REG_INIT
+  wire  rvclkhdr_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_1_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_1_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_1_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_1_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_2_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_2_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_2_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_2_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_3_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_3_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_3_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_3_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_4_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_4_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_4_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_4_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_5_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_5_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_5_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_5_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_6_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_6_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_6_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_6_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_7_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_7_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_7_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_7_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_8_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_8_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_8_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_8_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_9_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_9_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_9_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_9_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_10_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_10_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_10_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_10_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_11_io_l1clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_11_io_clk; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_11_io_en; // @[el2_lib.scala 472:23]
+  wire  rvclkhdr_11_io_scan_mode; // @[el2_lib.scala 472:23]
+  wire [3:0] ldst_byteen_hi_m = io_ldst_byteen_ext_m[7:4]; // @[el2_lsu_bus_buffer.scala 125:46]
+  wire [3:0] ldst_byteen_lo_m = io_ldst_byteen_ext_m[3:0]; // @[el2_lsu_bus_buffer.scala 126:46]
+  reg [31:0] buf_addr_0; // @[el2_lib.scala 478:16]
+  wire  _T_2 = io_lsu_addr_m[31:2] == buf_addr_0[31:2]; // @[el2_lsu_bus_buffer.scala 128:74]
+  reg  _T_4210; // @[Reg.scala 27:20]
+  reg  _T_4207; // @[Reg.scala 27:20]
+  reg  _T_4204; // @[Reg.scala 27:20]
+  reg  _T_4201; // @[Reg.scala 27:20]
+  wire [3:0] buf_write = {_T_4210,_T_4207,_T_4204,_T_4201}; // @[Cat.scala 29:58]
+  wire  _T_4 = _T_2 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 128:98]
+  reg [2:0] buf_state_0; // @[Reg.scala 27:20]
+  wire  _T_5 = buf_state_0 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129]
+  wire  _T_6 = _T_4 & _T_5; // @[el2_lsu_bus_buffer.scala 128:113]
+  wire  ld_addr_hitvec_lo_0 = _T_6 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141]
+  reg [31:0] buf_addr_1; // @[el2_lib.scala 478:16]
+  wire  _T_9 = io_lsu_addr_m[31:2] == buf_addr_1[31:2]; // @[el2_lsu_bus_buffer.scala 128:74]
+  wire  _T_11 = _T_9 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 128:98]
+  reg [2:0] buf_state_1; // @[Reg.scala 27:20]
+  wire  _T_12 = buf_state_1 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129]
+  wire  _T_13 = _T_11 & _T_12; // @[el2_lsu_bus_buffer.scala 128:113]
+  wire  ld_addr_hitvec_lo_1 = _T_13 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141]
+  reg [31:0] buf_addr_2; // @[el2_lib.scala 478:16]
+  wire  _T_16 = io_lsu_addr_m[31:2] == buf_addr_2[31:2]; // @[el2_lsu_bus_buffer.scala 128:74]
+  wire  _T_18 = _T_16 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 128:98]
+  reg [2:0] buf_state_2; // @[Reg.scala 27:20]
+  wire  _T_19 = buf_state_2 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129]
+  wire  _T_20 = _T_18 & _T_19; // @[el2_lsu_bus_buffer.scala 128:113]
+  wire  ld_addr_hitvec_lo_2 = _T_20 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141]
+  reg [31:0] buf_addr_3; // @[el2_lib.scala 478:16]
+  wire  _T_23 = io_lsu_addr_m[31:2] == buf_addr_3[31:2]; // @[el2_lsu_bus_buffer.scala 128:74]
+  wire  _T_25 = _T_23 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 128:98]
+  reg [2:0] buf_state_3; // @[Reg.scala 27:20]
+  wire  _T_26 = buf_state_3 != 3'h0; // @[el2_lsu_bus_buffer.scala 128:129]
+  wire  _T_27 = _T_25 & _T_26; // @[el2_lsu_bus_buffer.scala 128:113]
+  wire  ld_addr_hitvec_lo_3 = _T_27 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 128:141]
+  wire  _T_30 = io_end_addr_m[31:2] == buf_addr_0[31:2]; // @[el2_lsu_bus_buffer.scala 129:74]
+  wire  _T_32 = _T_30 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 129:98]
+  wire  _T_34 = _T_32 & _T_5; // @[el2_lsu_bus_buffer.scala 129:113]
+  wire  ld_addr_hitvec_hi_0 = _T_34 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141]
+  wire  _T_37 = io_end_addr_m[31:2] == buf_addr_1[31:2]; // @[el2_lsu_bus_buffer.scala 129:74]
+  wire  _T_39 = _T_37 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 129:98]
+  wire  _T_41 = _T_39 & _T_12; // @[el2_lsu_bus_buffer.scala 129:113]
+  wire  ld_addr_hitvec_hi_1 = _T_41 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141]
+  wire  _T_44 = io_end_addr_m[31:2] == buf_addr_2[31:2]; // @[el2_lsu_bus_buffer.scala 129:74]
+  wire  _T_46 = _T_44 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 129:98]
+  wire  _T_48 = _T_46 & _T_19; // @[el2_lsu_bus_buffer.scala 129:113]
+  wire  ld_addr_hitvec_hi_2 = _T_48 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141]
+  wire  _T_51 = io_end_addr_m[31:2] == buf_addr_3[31:2]; // @[el2_lsu_bus_buffer.scala 129:74]
+  wire  _T_53 = _T_51 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 129:98]
+  wire  _T_55 = _T_53 & _T_26; // @[el2_lsu_bus_buffer.scala 129:113]
+  wire  ld_addr_hitvec_hi_3 = _T_55 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 129:141]
+  reg [2:0] _T_4237; // @[Reg.scala 27:20]
+  wire [3:0] buf_byteen_3 = {{1'd0}, _T_4237}; // @[el2_lsu_bus_buffer.scala 134:24 el2_lsu_bus_buffer.scala 135:14 el2_lsu_bus_buffer.scala 531:16]
+  wire  _T_99 = ld_addr_hitvec_lo_3 & buf_byteen_3[0]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_101 = _T_99 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 191:114]
+  reg [2:0] _T_4235; // @[Reg.scala 27:20]
+  wire [3:0] buf_byteen_2 = {{1'd0}, _T_4235}; // @[el2_lsu_bus_buffer.scala 134:24 el2_lsu_bus_buffer.scala 135:14 el2_lsu_bus_buffer.scala 531:16]
+  wire  _T_95 = ld_addr_hitvec_lo_2 & buf_byteen_2[0]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_97 = _T_95 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 191:114]
+  reg [2:0] _T_4233; // @[Reg.scala 27:20]
+  wire [3:0] buf_byteen_1 = {{1'd0}, _T_4233}; // @[el2_lsu_bus_buffer.scala 134:24 el2_lsu_bus_buffer.scala 135:14 el2_lsu_bus_buffer.scala 531:16]
+  wire  _T_91 = ld_addr_hitvec_lo_1 & buf_byteen_1[0]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_93 = _T_91 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 191:114]
+  reg [2:0] _T_4231; // @[Reg.scala 27:20]
+  wire [3:0] buf_byteen_0 = {{1'd0}, _T_4231}; // @[el2_lsu_bus_buffer.scala 134:24 el2_lsu_bus_buffer.scala 135:14 el2_lsu_bus_buffer.scala 531:16]
+  wire  _T_87 = ld_addr_hitvec_lo_0 & buf_byteen_0[0]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_89 = _T_87 & ldst_byteen_lo_m[0]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire [3:0] ld_byte_hitvec_lo_0 = {_T_101,_T_97,_T_93,_T_89}; // @[Cat.scala 29:58]
+  reg [3:0] buf_ageQ_3; // @[el2_lsu_bus_buffer.scala 515:60]
+  wire  _T_2472 = buf_state_3 == 3'h2; // @[el2_lsu_bus_buffer.scala 428:94]
+  wire  _T_3957 = 3'h0 == buf_state_3; // @[Conditional.scala 37:30]
+  wire  _T_3980 = 3'h1 == buf_state_3; // @[Conditional.scala 37:30]
+  wire  _T_3984 = 3'h2 == buf_state_3; // @[Conditional.scala 37:30]
+  reg [1:0] _T_1772; // @[Reg.scala 27:20]
+  wire [2:0] obuf_tag0 = {{1'd0}, _T_1772}; // @[el2_lsu_bus_buffer.scala 381:13]
+  wire  _T_3991 = obuf_tag0 == 3'h3; // @[el2_lsu_bus_buffer.scala 470:48]
+  reg  obuf_merge; // @[Reg.scala 27:20]
+  reg [1:0] obuf_tag1; // @[Reg.scala 27:20]
+  wire [2:0] _GEN_350 = {{1'd0}, obuf_tag1}; // @[el2_lsu_bus_buffer.scala 470:104]
+  wire  _T_3992 = _GEN_350 == 3'h3; // @[el2_lsu_bus_buffer.scala 470:104]
+  wire  _T_3993 = obuf_merge & _T_3992; // @[el2_lsu_bus_buffer.scala 470:91]
+  wire  _T_3994 = _T_3991 | _T_3993; // @[el2_lsu_bus_buffer.scala 470:77]
+  reg  obuf_valid; // @[el2_lsu_bus_buffer.scala 375:51]
+  wire  _T_3995 = _T_3994 & obuf_valid; // @[el2_lsu_bus_buffer.scala 470:135]
+  reg  obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 374:55]
+  wire  _T_3996 = _T_3995 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 470:148]
+  wire  _GEN_280 = _T_3984 & _T_3996; // @[Conditional.scala 39:67]
+  wire  _GEN_293 = _T_3980 ? 1'h0 : _GEN_280; // @[Conditional.scala 39:67]
+  wire  buf_cmd_state_bus_en_3 = _T_3957 ? 1'h0 : _GEN_293; // @[Conditional.scala 40:58]
+  wire  _T_2473 = _T_2472 & buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 428:104]
+  wire  _T_2474 = buf_ageQ_3[3] & _T_2473; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2468 = buf_state_2 == 3'h2; // @[el2_lsu_bus_buffer.scala 428:94]
+  wire  _T_3764 = 3'h0 == buf_state_2; // @[Conditional.scala 37:30]
+  wire  _T_3787 = 3'h1 == buf_state_2; // @[Conditional.scala 37:30]
+  wire  _T_3791 = 3'h2 == buf_state_2; // @[Conditional.scala 37:30]
+  wire  _T_3798 = obuf_tag0 == 3'h2; // @[el2_lsu_bus_buffer.scala 470:48]
+  wire  _T_3799 = _GEN_350 == 3'h2; // @[el2_lsu_bus_buffer.scala 470:104]
+  wire  _T_3800 = obuf_merge & _T_3799; // @[el2_lsu_bus_buffer.scala 470:91]
+  wire  _T_3801 = _T_3798 | _T_3800; // @[el2_lsu_bus_buffer.scala 470:77]
+  wire  _T_3802 = _T_3801 & obuf_valid; // @[el2_lsu_bus_buffer.scala 470:135]
+  wire  _T_3803 = _T_3802 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 470:148]
+  wire  _GEN_204 = _T_3791 & _T_3803; // @[Conditional.scala 39:67]
+  wire  _GEN_217 = _T_3787 ? 1'h0 : _GEN_204; // @[Conditional.scala 39:67]
+  wire  buf_cmd_state_bus_en_2 = _T_3764 ? 1'h0 : _GEN_217; // @[Conditional.scala 40:58]
+  wire  _T_2469 = _T_2468 & buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 428:104]
+  wire  _T_2470 = buf_ageQ_3[2] & _T_2469; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2464 = buf_state_1 == 3'h2; // @[el2_lsu_bus_buffer.scala 428:94]
+  wire  _T_3571 = 3'h0 == buf_state_1; // @[Conditional.scala 37:30]
+  wire  _T_3594 = 3'h1 == buf_state_1; // @[Conditional.scala 37:30]
+  wire  _T_3598 = 3'h2 == buf_state_1; // @[Conditional.scala 37:30]
+  wire  _T_3605 = obuf_tag0 == 3'h1; // @[el2_lsu_bus_buffer.scala 470:48]
+  wire  _T_3606 = _GEN_350 == 3'h1; // @[el2_lsu_bus_buffer.scala 470:104]
+  wire  _T_3607 = obuf_merge & _T_3606; // @[el2_lsu_bus_buffer.scala 470:91]
+  wire  _T_3608 = _T_3605 | _T_3607; // @[el2_lsu_bus_buffer.scala 470:77]
+  wire  _T_3609 = _T_3608 & obuf_valid; // @[el2_lsu_bus_buffer.scala 470:135]
+  wire  _T_3610 = _T_3609 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 470:148]
+  wire  _GEN_128 = _T_3598 & _T_3610; // @[Conditional.scala 39:67]
+  wire  _GEN_141 = _T_3594 ? 1'h0 : _GEN_128; // @[Conditional.scala 39:67]
+  wire  buf_cmd_state_bus_en_1 = _T_3571 ? 1'h0 : _GEN_141; // @[Conditional.scala 40:58]
+  wire  _T_2465 = _T_2464 & buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 428:104]
+  wire  _T_2466 = buf_ageQ_3[1] & _T_2465; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2460 = buf_state_0 == 3'h2; // @[el2_lsu_bus_buffer.scala 428:94]
+  wire  _T_3378 = 3'h0 == buf_state_0; // @[Conditional.scala 37:30]
+  wire  _T_3401 = 3'h1 == buf_state_0; // @[Conditional.scala 37:30]
+  wire  _T_3405 = 3'h2 == buf_state_0; // @[Conditional.scala 37:30]
+  wire  _T_3412 = obuf_tag0 == 3'h0; // @[el2_lsu_bus_buffer.scala 470:48]
+  wire  _T_3413 = _GEN_350 == 3'h0; // @[el2_lsu_bus_buffer.scala 470:104]
+  wire  _T_3414 = obuf_merge & _T_3413; // @[el2_lsu_bus_buffer.scala 470:91]
+  wire  _T_3415 = _T_3412 | _T_3414; // @[el2_lsu_bus_buffer.scala 470:77]
+  wire  _T_3416 = _T_3415 & obuf_valid; // @[el2_lsu_bus_buffer.scala 470:135]
+  wire  _T_3417 = _T_3416 & obuf_wr_enQ; // @[el2_lsu_bus_buffer.scala 470:148]
+  wire  _GEN_52 = _T_3405 & _T_3417; // @[Conditional.scala 39:67]
+  wire  _GEN_65 = _T_3401 ? 1'h0 : _GEN_52; // @[Conditional.scala 39:67]
+  wire  buf_cmd_state_bus_en_0 = _T_3378 ? 1'h0 : _GEN_65; // @[Conditional.scala 40:58]
+  wire  _T_2461 = _T_2460 & buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 428:104]
+  wire  _T_2462 = buf_ageQ_3[0] & _T_2461; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire [3:0] buf_age_3 = {_T_2474,_T_2470,_T_2466,_T_2462}; // @[Cat.scala 29:58]
+  wire  _T_2573 = ~buf_age_3[2]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2575 = _T_2573 & _T_19; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire  _T_2567 = ~buf_age_3[1]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2569 = _T_2567 & _T_12; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire  _T_2561 = ~buf_age_3[0]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2563 = _T_2561 & _T_5; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire [3:0] buf_age_younger_3 = {1'h0,_T_2575,_T_2569,_T_2563}; // @[Cat.scala 29:58]
+  wire [3:0] _T_255 = ld_byte_hitvec_lo_0 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_256 = |_T_255; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_257 = ~_T_256; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_258 = ld_byte_hitvec_lo_0[3] & _T_257; // @[el2_lsu_bus_buffer.scala 196:97]
+  reg [31:0] ibuf_addr; // @[el2_lib.scala 478:16]
+  wire  _T_512 = io_lsu_addr_m[31:2] == ibuf_addr[31:2]; // @[el2_lsu_bus_buffer.scala 202:51]
+  reg  ibuf_write; // @[Reg.scala 27:20]
+  wire  _T_513 = _T_512 & ibuf_write; // @[el2_lsu_bus_buffer.scala 202:73]
+  reg  ibuf_valid; // @[el2_lsu_bus_buffer.scala 270:24]
+  wire  _T_514 = _T_513 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 202:86]
+  wire  ld_addr_ibuf_hit_lo = _T_514 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 202:99]
+  reg [3:0] ibuf_byteen; // @[Reg.scala 27:20]
+  wire  _T_545 = ld_addr_ibuf_hit_lo & ibuf_byteen[3]; // @[el2_lsu_bus_buffer.scala 207:48]
+  wire  _T_547 = _T_545 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 207:65]
+  wire [3:0] ld_byte_ibuf_hit_lo = {{3'd0}, _T_547}; // @[el2_lsu_bus_buffer.scala 207:25 el2_lsu_bus_buffer.scala 207:25 el2_lsu_bus_buffer.scala 207:25 el2_lsu_bus_buffer.scala 207:25]
+  wire  _T_260 = ~ld_byte_ibuf_hit_lo[0]; // @[el2_lsu_bus_buffer.scala 196:150]
+  wire  _T_261 = _T_258 & _T_260; // @[el2_lsu_bus_buffer.scala 196:148]
+  reg [3:0] buf_ageQ_2; // @[el2_lsu_bus_buffer.scala 515:60]
+  wire  _T_2455 = buf_ageQ_2[3] & _T_2473; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2451 = buf_ageQ_2[2] & _T_2469; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2447 = buf_ageQ_2[1] & _T_2465; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2443 = buf_ageQ_2[0] & _T_2461; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire [3:0] buf_age_2 = {_T_2455,_T_2451,_T_2447,_T_2443}; // @[Cat.scala 29:58]
+  wire  _T_2552 = ~buf_age_2[3]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2554 = _T_2552 & _T_26; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire  _T_2540 = ~buf_age_2[1]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2542 = _T_2540 & _T_12; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire  _T_2534 = ~buf_age_2[0]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2536 = _T_2534 & _T_5; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire [3:0] buf_age_younger_2 = {_T_2554,1'h0,_T_2542,_T_2536}; // @[Cat.scala 29:58]
+  wire [3:0] _T_247 = ld_byte_hitvec_lo_0 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_248 = |_T_247; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_249 = ~_T_248; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_250 = ld_byte_hitvec_lo_0[2] & _T_249; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_253 = _T_250 & _T_260; // @[el2_lsu_bus_buffer.scala 196:148]
+  reg [3:0] buf_ageQ_1; // @[el2_lsu_bus_buffer.scala 515:60]
+  wire  _T_2436 = buf_ageQ_1[3] & _T_2473; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2432 = buf_ageQ_1[2] & _T_2469; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2428 = buf_ageQ_1[1] & _T_2465; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2424 = buf_ageQ_1[0] & _T_2461; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire [3:0] buf_age_1 = {_T_2436,_T_2432,_T_2428,_T_2424}; // @[Cat.scala 29:58]
+  wire  _T_2525 = ~buf_age_1[3]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2527 = _T_2525 & _T_26; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire  _T_2519 = ~buf_age_1[2]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2521 = _T_2519 & _T_19; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire  _T_2507 = ~buf_age_1[0]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2509 = _T_2507 & _T_5; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire [3:0] buf_age_younger_1 = {_T_2527,_T_2521,1'h0,_T_2509}; // @[Cat.scala 29:58]
+  wire [3:0] _T_239 = ld_byte_hitvec_lo_0 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_240 = |_T_239; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_241 = ~_T_240; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_242 = ld_byte_hitvec_lo_0[1] & _T_241; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_245 = _T_242 & _T_260; // @[el2_lsu_bus_buffer.scala 196:148]
+  reg [3:0] buf_ageQ_0; // @[el2_lsu_bus_buffer.scala 515:60]
+  wire  _T_2417 = buf_ageQ_0[3] & _T_2473; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2413 = buf_ageQ_0[2] & _T_2469; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2409 = buf_ageQ_0[1] & _T_2465; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire  _T_2405 = buf_ageQ_0[0] & _T_2461; // @[el2_lsu_bus_buffer.scala 428:78]
+  wire [3:0] buf_age_0 = {_T_2417,_T_2413,_T_2409,_T_2405}; // @[Cat.scala 29:58]
+  wire  _T_2498 = ~buf_age_0[3]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2500 = _T_2498 & _T_26; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire  _T_2492 = ~buf_age_0[2]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2494 = _T_2492 & _T_19; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire  _T_2486 = ~buf_age_0[1]; // @[el2_lsu_bus_buffer.scala 429:91]
+  wire  _T_2488 = _T_2486 & _T_12; // @[el2_lsu_bus_buffer.scala 429:106]
+  wire [3:0] buf_age_younger_0 = {_T_2500,_T_2494,_T_2488,1'h0}; // @[Cat.scala 29:58]
+  wire [3:0] _T_231 = ld_byte_hitvec_lo_0 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_232 = |_T_231; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_233 = ~_T_232; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_234 = ld_byte_hitvec_lo_0[0] & _T_233; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_237 = _T_234 & _T_260; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] ld_byte_hitvecfn_lo_0 = {_T_261,_T_253,_T_245,_T_237}; // @[Cat.scala 29:58]
+  wire  _T_56 = |ld_byte_hitvecfn_lo_0; // @[el2_lsu_bus_buffer.scala 188:73]
+  wire  _T_58 = _T_56 | ld_byte_ibuf_hit_lo[0]; // @[el2_lsu_bus_buffer.scala 188:77]
+  wire  _T_117 = ld_addr_hitvec_lo_3 & buf_byteen_3[1]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_119 = _T_117 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire  _T_113 = ld_addr_hitvec_lo_2 & buf_byteen_2[1]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_115 = _T_113 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire  _T_109 = ld_addr_hitvec_lo_1 & buf_byteen_1[1]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_111 = _T_109 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire  _T_105 = ld_addr_hitvec_lo_0 & buf_byteen_0[1]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_107 = _T_105 & ldst_byteen_lo_m[1]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire [3:0] ld_byte_hitvec_lo_1 = {_T_119,_T_115,_T_111,_T_107}; // @[Cat.scala 29:58]
+  wire [3:0] _T_290 = ld_byte_hitvec_lo_1 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_291 = |_T_290; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_292 = ~_T_291; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_293 = ld_byte_hitvec_lo_1[3] & _T_292; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_295 = ~ld_byte_ibuf_hit_lo[1]; // @[el2_lsu_bus_buffer.scala 196:150]
+  wire  _T_296 = _T_293 & _T_295; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] _T_282 = ld_byte_hitvec_lo_1 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_283 = |_T_282; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_284 = ~_T_283; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_285 = ld_byte_hitvec_lo_1[2] & _T_284; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_288 = _T_285 & _T_295; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] _T_274 = ld_byte_hitvec_lo_1 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_275 = |_T_274; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_276 = ~_T_275; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_277 = ld_byte_hitvec_lo_1[1] & _T_276; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_280 = _T_277 & _T_295; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] _T_266 = ld_byte_hitvec_lo_1 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_267 = |_T_266; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_268 = ~_T_267; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_269 = ld_byte_hitvec_lo_1[0] & _T_268; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_272 = _T_269 & _T_295; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] ld_byte_hitvecfn_lo_1 = {_T_296,_T_288,_T_280,_T_272}; // @[Cat.scala 29:58]
+  wire  _T_59 = |ld_byte_hitvecfn_lo_1; // @[el2_lsu_bus_buffer.scala 188:73]
+  wire  _T_61 = _T_59 | ld_byte_ibuf_hit_lo[1]; // @[el2_lsu_bus_buffer.scala 188:77]
+  wire  _T_135 = ld_addr_hitvec_lo_3 & buf_byteen_3[2]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_137 = _T_135 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire  _T_131 = ld_addr_hitvec_lo_2 & buf_byteen_2[2]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_133 = _T_131 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire  _T_127 = ld_addr_hitvec_lo_1 & buf_byteen_1[2]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_129 = _T_127 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire  _T_123 = ld_addr_hitvec_lo_0 & buf_byteen_0[2]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_125 = _T_123 & ldst_byteen_lo_m[2]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire [3:0] ld_byte_hitvec_lo_2 = {_T_137,_T_133,_T_129,_T_125}; // @[Cat.scala 29:58]
+  wire [3:0] _T_325 = ld_byte_hitvec_lo_2 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_326 = |_T_325; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_327 = ~_T_326; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_328 = ld_byte_hitvec_lo_2[3] & _T_327; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_330 = ~ld_byte_ibuf_hit_lo[2]; // @[el2_lsu_bus_buffer.scala 196:150]
+  wire  _T_331 = _T_328 & _T_330; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] _T_317 = ld_byte_hitvec_lo_2 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_318 = |_T_317; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_319 = ~_T_318; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_320 = ld_byte_hitvec_lo_2[2] & _T_319; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_323 = _T_320 & _T_330; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] _T_309 = ld_byte_hitvec_lo_2 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_310 = |_T_309; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_311 = ~_T_310; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_312 = ld_byte_hitvec_lo_2[1] & _T_311; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_315 = _T_312 & _T_330; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] _T_301 = ld_byte_hitvec_lo_2 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_302 = |_T_301; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_303 = ~_T_302; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_304 = ld_byte_hitvec_lo_2[0] & _T_303; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_307 = _T_304 & _T_330; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] ld_byte_hitvecfn_lo_2 = {_T_331,_T_323,_T_315,_T_307}; // @[Cat.scala 29:58]
+  wire  _T_62 = |ld_byte_hitvecfn_lo_2; // @[el2_lsu_bus_buffer.scala 188:73]
+  wire  _T_64 = _T_62 | ld_byte_ibuf_hit_lo[2]; // @[el2_lsu_bus_buffer.scala 188:77]
+  wire  _T_153 = ld_addr_hitvec_lo_3 & buf_byteen_3[3]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_155 = _T_153 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire  _T_149 = ld_addr_hitvec_lo_2 & buf_byteen_2[3]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_151 = _T_149 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire  _T_145 = ld_addr_hitvec_lo_1 & buf_byteen_1[3]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_147 = _T_145 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire  _T_141 = ld_addr_hitvec_lo_0 & buf_byteen_0[3]; // @[el2_lsu_bus_buffer.scala 191:95]
+  wire  _T_143 = _T_141 & ldst_byteen_lo_m[3]; // @[el2_lsu_bus_buffer.scala 191:114]
+  wire [3:0] ld_byte_hitvec_lo_3 = {_T_155,_T_151,_T_147,_T_143}; // @[Cat.scala 29:58]
+  wire [3:0] _T_360 = ld_byte_hitvec_lo_3 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_361 = |_T_360; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_362 = ~_T_361; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_363 = ld_byte_hitvec_lo_3[3] & _T_362; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_365 = ~ld_byte_ibuf_hit_lo[3]; // @[el2_lsu_bus_buffer.scala 196:150]
+  wire  _T_366 = _T_363 & _T_365; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] _T_352 = ld_byte_hitvec_lo_3 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_353 = |_T_352; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_354 = ~_T_353; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_355 = ld_byte_hitvec_lo_3[2] & _T_354; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_358 = _T_355 & _T_365; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] _T_344 = ld_byte_hitvec_lo_3 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_345 = |_T_344; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_346 = ~_T_345; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_347 = ld_byte_hitvec_lo_3[1] & _T_346; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_350 = _T_347 & _T_365; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] _T_336 = ld_byte_hitvec_lo_3 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 196:122]
+  wire  _T_337 = |_T_336; // @[el2_lsu_bus_buffer.scala 196:144]
+  wire  _T_338 = ~_T_337; // @[el2_lsu_bus_buffer.scala 196:99]
+  wire  _T_339 = ld_byte_hitvec_lo_3[0] & _T_338; // @[el2_lsu_bus_buffer.scala 196:97]
+  wire  _T_342 = _T_339 & _T_365; // @[el2_lsu_bus_buffer.scala 196:148]
+  wire [3:0] ld_byte_hitvecfn_lo_3 = {_T_366,_T_358,_T_350,_T_342}; // @[Cat.scala 29:58]
+  wire  _T_65 = |ld_byte_hitvecfn_lo_3; // @[el2_lsu_bus_buffer.scala 188:73]
+  wire  _T_67 = _T_65 | ld_byte_ibuf_hit_lo[3]; // @[el2_lsu_bus_buffer.scala 188:77]
+  wire [2:0] _T_69 = {_T_67,_T_64,_T_61}; // @[Cat.scala 29:58]
+  wire  _T_171 = ld_addr_hitvec_hi_3 & buf_byteen_3[0]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_173 = _T_171 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_167 = ld_addr_hitvec_hi_2 & buf_byteen_2[0]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_169 = _T_167 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_163 = ld_addr_hitvec_hi_1 & buf_byteen_1[0]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_165 = _T_163 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_159 = ld_addr_hitvec_hi_0 & buf_byteen_0[0]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_161 = _T_159 & ldst_byteen_hi_m[0]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire [3:0] ld_byte_hitvec_hi_0 = {_T_173,_T_169,_T_165,_T_161}; // @[Cat.scala 29:58]
+  wire [3:0] _T_395 = ld_byte_hitvec_hi_0 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_396 = |_T_395; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_397 = ~_T_396; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_398 = ld_byte_hitvec_hi_0[3] & _T_397; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_517 = io_end_addr_m[31:2] == ibuf_addr[31:2]; // @[el2_lsu_bus_buffer.scala 203:51]
+  wire  _T_518 = _T_517 & ibuf_write; // @[el2_lsu_bus_buffer.scala 203:73]
+  wire  _T_519 = _T_518 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 203:86]
+  wire  ld_addr_ibuf_hit_hi = _T_519 & io_lsu_busreq_m; // @[el2_lsu_bus_buffer.scala 203:99]
+  wire  _T_549 = ld_addr_ibuf_hit_hi & ibuf_byteen[3]; // @[el2_lsu_bus_buffer.scala 208:48]
+  wire  _T_551 = _T_549 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 208:65]
+  wire [3:0] ld_byte_ibuf_hit_hi = {{3'd0}, _T_551}; // @[el2_lsu_bus_buffer.scala 208:25 el2_lsu_bus_buffer.scala 208:25 el2_lsu_bus_buffer.scala 208:25 el2_lsu_bus_buffer.scala 208:25]
+  wire  _T_400 = ~ld_byte_ibuf_hit_hi[0]; // @[el2_lsu_bus_buffer.scala 197:150]
+  wire  _T_401 = _T_398 & _T_400; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_387 = ld_byte_hitvec_hi_0 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_388 = |_T_387; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_389 = ~_T_388; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_390 = ld_byte_hitvec_hi_0[2] & _T_389; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_393 = _T_390 & _T_400; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_379 = ld_byte_hitvec_hi_0 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_380 = |_T_379; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_381 = ~_T_380; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_382 = ld_byte_hitvec_hi_0[1] & _T_381; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_385 = _T_382 & _T_400; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_371 = ld_byte_hitvec_hi_0 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_372 = |_T_371; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_373 = ~_T_372; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_374 = ld_byte_hitvec_hi_0[0] & _T_373; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_377 = _T_374 & _T_400; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] ld_byte_hitvecfn_hi_0 = {_T_401,_T_393,_T_385,_T_377}; // @[Cat.scala 29:58]
+  wire  _T_71 = |ld_byte_hitvecfn_hi_0; // @[el2_lsu_bus_buffer.scala 189:73]
+  wire  _T_73 = _T_71 | ld_byte_ibuf_hit_hi[0]; // @[el2_lsu_bus_buffer.scala 189:77]
+  wire  _T_189 = ld_addr_hitvec_hi_3 & buf_byteen_3[1]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_191 = _T_189 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_185 = ld_addr_hitvec_hi_2 & buf_byteen_2[1]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_187 = _T_185 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_181 = ld_addr_hitvec_hi_1 & buf_byteen_1[1]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_183 = _T_181 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_177 = ld_addr_hitvec_hi_0 & buf_byteen_0[1]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_179 = _T_177 & ldst_byteen_hi_m[1]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire [3:0] ld_byte_hitvec_hi_1 = {_T_191,_T_187,_T_183,_T_179}; // @[Cat.scala 29:58]
+  wire [3:0] _T_430 = ld_byte_hitvec_hi_1 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_431 = |_T_430; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_432 = ~_T_431; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_433 = ld_byte_hitvec_hi_1[3] & _T_432; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_435 = ~ld_byte_ibuf_hit_hi[1]; // @[el2_lsu_bus_buffer.scala 197:150]
+  wire  _T_436 = _T_433 & _T_435; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_422 = ld_byte_hitvec_hi_1 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_423 = |_T_422; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_424 = ~_T_423; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_425 = ld_byte_hitvec_hi_1[2] & _T_424; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_428 = _T_425 & _T_435; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_414 = ld_byte_hitvec_hi_1 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_415 = |_T_414; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_416 = ~_T_415; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_417 = ld_byte_hitvec_hi_1[1] & _T_416; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_420 = _T_417 & _T_435; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_406 = ld_byte_hitvec_hi_1 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_407 = |_T_406; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_408 = ~_T_407; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_409 = ld_byte_hitvec_hi_1[0] & _T_408; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_412 = _T_409 & _T_435; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] ld_byte_hitvecfn_hi_1 = {_T_436,_T_428,_T_420,_T_412}; // @[Cat.scala 29:58]
+  wire  _T_74 = |ld_byte_hitvecfn_hi_1; // @[el2_lsu_bus_buffer.scala 189:73]
+  wire  _T_76 = _T_74 | ld_byte_ibuf_hit_hi[1]; // @[el2_lsu_bus_buffer.scala 189:77]
+  wire  _T_207 = ld_addr_hitvec_hi_3 & buf_byteen_3[2]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_209 = _T_207 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_203 = ld_addr_hitvec_hi_2 & buf_byteen_2[2]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_205 = _T_203 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_199 = ld_addr_hitvec_hi_1 & buf_byteen_1[2]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_201 = _T_199 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_195 = ld_addr_hitvec_hi_0 & buf_byteen_0[2]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_197 = _T_195 & ldst_byteen_hi_m[2]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire [3:0] ld_byte_hitvec_hi_2 = {_T_209,_T_205,_T_201,_T_197}; // @[Cat.scala 29:58]
+  wire [3:0] _T_465 = ld_byte_hitvec_hi_2 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_466 = |_T_465; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_467 = ~_T_466; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_468 = ld_byte_hitvec_hi_2[3] & _T_467; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_470 = ~ld_byte_ibuf_hit_hi[2]; // @[el2_lsu_bus_buffer.scala 197:150]
+  wire  _T_471 = _T_468 & _T_470; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_457 = ld_byte_hitvec_hi_2 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_458 = |_T_457; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_459 = ~_T_458; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_460 = ld_byte_hitvec_hi_2[2] & _T_459; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_463 = _T_460 & _T_470; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_449 = ld_byte_hitvec_hi_2 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_450 = |_T_449; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_451 = ~_T_450; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_452 = ld_byte_hitvec_hi_2[1] & _T_451; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_455 = _T_452 & _T_470; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_441 = ld_byte_hitvec_hi_2 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_442 = |_T_441; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_443 = ~_T_442; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_444 = ld_byte_hitvec_hi_2[0] & _T_443; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_447 = _T_444 & _T_470; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] ld_byte_hitvecfn_hi_2 = {_T_471,_T_463,_T_455,_T_447}; // @[Cat.scala 29:58]
+  wire  _T_77 = |ld_byte_hitvecfn_hi_2; // @[el2_lsu_bus_buffer.scala 189:73]
+  wire  _T_79 = _T_77 | ld_byte_ibuf_hit_hi[2]; // @[el2_lsu_bus_buffer.scala 189:77]
+  wire  _T_225 = ld_addr_hitvec_hi_3 & buf_byteen_3[3]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_227 = _T_225 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_221 = ld_addr_hitvec_hi_2 & buf_byteen_2[3]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_223 = _T_221 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_217 = ld_addr_hitvec_hi_1 & buf_byteen_1[3]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_219 = _T_217 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire  _T_213 = ld_addr_hitvec_hi_0 & buf_byteen_0[3]; // @[el2_lsu_bus_buffer.scala 192:95]
+  wire  _T_215 = _T_213 & ldst_byteen_hi_m[3]; // @[el2_lsu_bus_buffer.scala 192:114]
+  wire [3:0] ld_byte_hitvec_hi_3 = {_T_227,_T_223,_T_219,_T_215}; // @[Cat.scala 29:58]
+  wire [3:0] _T_500 = ld_byte_hitvec_hi_3 & buf_age_younger_3; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_501 = |_T_500; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_502 = ~_T_501; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_503 = ld_byte_hitvec_hi_3[3] & _T_502; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_505 = ~ld_byte_ibuf_hit_hi[3]; // @[el2_lsu_bus_buffer.scala 197:150]
+  wire  _T_506 = _T_503 & _T_505; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_492 = ld_byte_hitvec_hi_3 & buf_age_younger_2; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_493 = |_T_492; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_494 = ~_T_493; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_495 = ld_byte_hitvec_hi_3[2] & _T_494; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_498 = _T_495 & _T_505; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_484 = ld_byte_hitvec_hi_3 & buf_age_younger_1; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_485 = |_T_484; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_486 = ~_T_485; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_487 = ld_byte_hitvec_hi_3[1] & _T_486; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_490 = _T_487 & _T_505; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] _T_476 = ld_byte_hitvec_hi_3 & buf_age_younger_0; // @[el2_lsu_bus_buffer.scala 197:122]
+  wire  _T_477 = |_T_476; // @[el2_lsu_bus_buffer.scala 197:144]
+  wire  _T_478 = ~_T_477; // @[el2_lsu_bus_buffer.scala 197:99]
+  wire  _T_479 = ld_byte_hitvec_hi_3[0] & _T_478; // @[el2_lsu_bus_buffer.scala 197:97]
+  wire  _T_482 = _T_479 & _T_505; // @[el2_lsu_bus_buffer.scala 197:148]
+  wire [3:0] ld_byte_hitvecfn_hi_3 = {_T_506,_T_498,_T_490,_T_482}; // @[Cat.scala 29:58]
+  wire  _T_80 = |ld_byte_hitvecfn_hi_3; // @[el2_lsu_bus_buffer.scala 189:73]
+  wire  _T_82 = _T_80 | ld_byte_ibuf_hit_hi[3]; // @[el2_lsu_bus_buffer.scala 189:77]
+  wire [2:0] _T_84 = {_T_82,_T_79,_T_76}; // @[Cat.scala 29:58]
+  wire [7:0] _T_554 = ld_byte_hitvecfn_lo_3[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  reg [3:0] _T_4238; // @[el2_lib.scala 478:16]
+  wire [31:0] buf_data_0 = {{28'd0}, _T_4238}; // @[el2_lsu_bus_buffer.scala 210:22 el2_lsu_bus_buffer.scala 211:12 el2_lsu_bus_buffer.scala 532:14]
+  wire [8:0] _GEN_354 = {{1'd0}, _T_554}; // @[el2_lsu_bus_buffer.scala 214:91]
+  wire [8:0] _T_556 = _GEN_354 & buf_data_0[31:23]; // @[el2_lsu_bus_buffer.scala 214:91]
+  wire [7:0] _T_559 = ld_byte_hitvecfn_lo_3[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  reg [3:0] _T_4239; // @[el2_lib.scala 478:16]
+  wire [31:0] buf_data_1 = {{28'd0}, _T_4239}; // @[el2_lsu_bus_buffer.scala 210:22 el2_lsu_bus_buffer.scala 211:12 el2_lsu_bus_buffer.scala 532:14]
+  wire [8:0] _GEN_355 = {{1'd0}, _T_559}; // @[el2_lsu_bus_buffer.scala 214:91]
+  wire [8:0] _T_561 = _GEN_355 & buf_data_1[31:23]; // @[el2_lsu_bus_buffer.scala 214:91]
+  wire [7:0] _T_564 = ld_byte_hitvecfn_lo_3[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  reg [3:0] _T_4240; // @[el2_lib.scala 478:16]
+  wire [31:0] buf_data_2 = {{28'd0}, _T_4240}; // @[el2_lsu_bus_buffer.scala 210:22 el2_lsu_bus_buffer.scala 211:12 el2_lsu_bus_buffer.scala 532:14]
+  wire [8:0] _GEN_356 = {{1'd0}, _T_564}; // @[el2_lsu_bus_buffer.scala 214:91]
+  wire [8:0] _T_566 = _GEN_356 & buf_data_2[31:23]; // @[el2_lsu_bus_buffer.scala 214:91]
+  wire [7:0] _T_569 = ld_byte_hitvecfn_lo_3[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  reg [3:0] _T_4241; // @[el2_lib.scala 478:16]
+  wire [31:0] buf_data_3 = {{28'd0}, _T_4241}; // @[el2_lsu_bus_buffer.scala 210:22 el2_lsu_bus_buffer.scala 211:12 el2_lsu_bus_buffer.scala 532:14]
+  wire [8:0] _GEN_357 = {{1'd0}, _T_569}; // @[el2_lsu_bus_buffer.scala 214:91]
+  wire [8:0] _T_571 = _GEN_357 & buf_data_3[31:23]; // @[el2_lsu_bus_buffer.scala 214:91]
+  wire [8:0] _T_572 = _T_556 | _T_561; // @[el2_lsu_bus_buffer.scala 214:123]
+  wire [8:0] _T_573 = _T_572 | _T_566; // @[el2_lsu_bus_buffer.scala 214:123]
+  wire [8:0] _T_574 = _T_573 | _T_571; // @[el2_lsu_bus_buffer.scala 214:123]
+  wire [7:0] _T_577 = ld_byte_hitvecfn_lo_2[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_579 = _T_577 & buf_data_0[23:16]; // @[el2_lsu_bus_buffer.scala 215:65]
+  wire [7:0] _T_582 = ld_byte_hitvecfn_lo_2[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_584 = _T_582 & buf_data_1[23:16]; // @[el2_lsu_bus_buffer.scala 215:65]
+  wire [7:0] _T_587 = ld_byte_hitvecfn_lo_2[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_589 = _T_587 & buf_data_2[23:16]; // @[el2_lsu_bus_buffer.scala 215:65]
+  wire [7:0] _T_592 = ld_byte_hitvecfn_lo_2[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_594 = _T_592 & buf_data_3[23:16]; // @[el2_lsu_bus_buffer.scala 215:65]
+  wire [7:0] _T_595 = _T_579 | _T_584; // @[el2_lsu_bus_buffer.scala 215:97]
+  wire [7:0] _T_596 = _T_595 | _T_589; // @[el2_lsu_bus_buffer.scala 215:97]
+  wire [7:0] _T_597 = _T_596 | _T_594; // @[el2_lsu_bus_buffer.scala 215:97]
+  wire [7:0] _T_600 = ld_byte_hitvecfn_lo_1[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_602 = _T_600 & buf_data_0[15:8]; // @[el2_lsu_bus_buffer.scala 216:65]
+  wire [7:0] _T_605 = ld_byte_hitvecfn_lo_1[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_607 = _T_605 & buf_data_1[15:8]; // @[el2_lsu_bus_buffer.scala 216:65]
+  wire [7:0] _T_610 = ld_byte_hitvecfn_lo_1[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_612 = _T_610 & buf_data_2[15:8]; // @[el2_lsu_bus_buffer.scala 216:65]
+  wire [7:0] _T_615 = ld_byte_hitvecfn_lo_1[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_617 = _T_615 & buf_data_3[15:8]; // @[el2_lsu_bus_buffer.scala 216:65]
+  wire [7:0] _T_618 = _T_602 | _T_607; // @[el2_lsu_bus_buffer.scala 216:96]
+  wire [7:0] _T_619 = _T_618 | _T_612; // @[el2_lsu_bus_buffer.scala 216:96]
+  wire [7:0] _T_620 = _T_619 | _T_617; // @[el2_lsu_bus_buffer.scala 216:96]
+  wire [7:0] _T_623 = ld_byte_hitvecfn_lo_0[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_625 = _T_623 & buf_data_0[7:0]; // @[el2_lsu_bus_buffer.scala 217:65]
+  wire [7:0] _T_628 = ld_byte_hitvecfn_lo_0[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_630 = _T_628 & buf_data_1[7:0]; // @[el2_lsu_bus_buffer.scala 217:65]
+  wire [7:0] _T_633 = ld_byte_hitvecfn_lo_0[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_635 = _T_633 & buf_data_2[7:0]; // @[el2_lsu_bus_buffer.scala 217:65]
+  wire [7:0] _T_638 = ld_byte_hitvecfn_lo_0[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_640 = _T_638 & buf_data_3[7:0]; // @[el2_lsu_bus_buffer.scala 217:65]
+  wire [7:0] _T_641 = _T_625 | _T_630; // @[el2_lsu_bus_buffer.scala 217:95]
+  wire [7:0] _T_642 = _T_641 | _T_635; // @[el2_lsu_bus_buffer.scala 217:95]
+  wire [7:0] _T_643 = _T_642 | _T_640; // @[el2_lsu_bus_buffer.scala 217:95]
+  wire [32:0] _T_646 = {_T_574,_T_597,_T_620,_T_643}; // @[Cat.scala 29:58]
+  wire [7:0] _T_649 = ld_byte_hitvecfn_hi_3[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [8:0] _GEN_358 = {{1'd0}, _T_649}; // @[el2_lsu_bus_buffer.scala 219:91]
+  wire [8:0] _T_651 = _GEN_358 & buf_data_0[31:23]; // @[el2_lsu_bus_buffer.scala 219:91]
+  wire [7:0] _T_654 = ld_byte_hitvecfn_hi_3[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [8:0] _GEN_359 = {{1'd0}, _T_654}; // @[el2_lsu_bus_buffer.scala 219:91]
+  wire [8:0] _T_656 = _GEN_359 & buf_data_1[31:23]; // @[el2_lsu_bus_buffer.scala 219:91]
+  wire [7:0] _T_659 = ld_byte_hitvecfn_hi_3[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [8:0] _GEN_360 = {{1'd0}, _T_659}; // @[el2_lsu_bus_buffer.scala 219:91]
+  wire [8:0] _T_661 = _GEN_360 & buf_data_2[31:23]; // @[el2_lsu_bus_buffer.scala 219:91]
+  wire [7:0] _T_664 = ld_byte_hitvecfn_hi_3[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [8:0] _GEN_361 = {{1'd0}, _T_664}; // @[el2_lsu_bus_buffer.scala 219:91]
+  wire [8:0] _T_666 = _GEN_361 & buf_data_3[31:23]; // @[el2_lsu_bus_buffer.scala 219:91]
+  wire [8:0] _T_667 = _T_651 | _T_656; // @[el2_lsu_bus_buffer.scala 219:123]
+  wire [8:0] _T_668 = _T_667 | _T_661; // @[el2_lsu_bus_buffer.scala 219:123]
+  wire [8:0] _T_669 = _T_668 | _T_666; // @[el2_lsu_bus_buffer.scala 219:123]
+  wire [7:0] _T_672 = ld_byte_hitvecfn_hi_2[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_674 = _T_672 & buf_data_0[23:16]; // @[el2_lsu_bus_buffer.scala 220:65]
+  wire [7:0] _T_677 = ld_byte_hitvecfn_hi_2[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_679 = _T_677 & buf_data_1[23:16]; // @[el2_lsu_bus_buffer.scala 220:65]
+  wire [7:0] _T_682 = ld_byte_hitvecfn_hi_2[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_684 = _T_682 & buf_data_2[23:16]; // @[el2_lsu_bus_buffer.scala 220:65]
+  wire [7:0] _T_687 = ld_byte_hitvecfn_hi_2[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_689 = _T_687 & buf_data_3[23:16]; // @[el2_lsu_bus_buffer.scala 220:65]
+  wire [7:0] _T_690 = _T_674 | _T_679; // @[el2_lsu_bus_buffer.scala 220:97]
+  wire [7:0] _T_691 = _T_690 | _T_684; // @[el2_lsu_bus_buffer.scala 220:97]
+  wire [7:0] _T_692 = _T_691 | _T_689; // @[el2_lsu_bus_buffer.scala 220:97]
+  wire [7:0] _T_695 = ld_byte_hitvecfn_hi_1[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_697 = _T_695 & buf_data_0[15:8]; // @[el2_lsu_bus_buffer.scala 221:65]
+  wire [7:0] _T_700 = ld_byte_hitvecfn_hi_1[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_702 = _T_700 & buf_data_1[15:8]; // @[el2_lsu_bus_buffer.scala 221:65]
+  wire [7:0] _T_705 = ld_byte_hitvecfn_hi_1[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_707 = _T_705 & buf_data_2[15:8]; // @[el2_lsu_bus_buffer.scala 221:65]
+  wire [7:0] _T_710 = ld_byte_hitvecfn_hi_1[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_712 = _T_710 & buf_data_3[15:8]; // @[el2_lsu_bus_buffer.scala 221:65]
+  wire [7:0] _T_713 = _T_697 | _T_702; // @[el2_lsu_bus_buffer.scala 221:96]
+  wire [7:0] _T_714 = _T_713 | _T_707; // @[el2_lsu_bus_buffer.scala 221:96]
+  wire [7:0] _T_715 = _T_714 | _T_712; // @[el2_lsu_bus_buffer.scala 221:96]
+  wire [7:0] _T_718 = ld_byte_hitvecfn_hi_0[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_720 = _T_718 & buf_data_0[7:0]; // @[el2_lsu_bus_buffer.scala 222:65]
+  wire [7:0] _T_723 = ld_byte_hitvecfn_hi_0[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_725 = _T_723 & buf_data_1[7:0]; // @[el2_lsu_bus_buffer.scala 222:65]
+  wire [7:0] _T_728 = ld_byte_hitvecfn_hi_0[2] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_730 = _T_728 & buf_data_2[7:0]; // @[el2_lsu_bus_buffer.scala 222:65]
+  wire [7:0] _T_733 = ld_byte_hitvecfn_hi_0[3] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire [7:0] _T_735 = _T_733 & buf_data_3[7:0]; // @[el2_lsu_bus_buffer.scala 222:65]
+  wire [7:0] _T_736 = _T_720 | _T_725; // @[el2_lsu_bus_buffer.scala 222:95]
+  wire [7:0] _T_737 = _T_736 | _T_730; // @[el2_lsu_bus_buffer.scala 222:95]
+  wire [7:0] _T_738 = _T_737 | _T_735; // @[el2_lsu_bus_buffer.scala 222:95]
+  wire [32:0] _T_741 = {_T_669,_T_692,_T_715,_T_738}; // @[Cat.scala 29:58]
+  wire [3:0] _T_742 = io_lsu_pkt_r_by ? 4'h1 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_743 = io_lsu_pkt_r_half ? 4'h3 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_744 = io_lsu_pkt_r_word ? 4'hf : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_745 = _T_742 | _T_743; // @[Mux.scala 27:72]
+  wire [3:0] ldst_byteen_r = _T_745 | _T_744; // @[Mux.scala 27:72]
+  wire [7:0] _T_747 = {4'h0,ldst_byteen_r}; // @[Cat.scala 29:58]
+  wire [10:0] _GEN_362 = {{3'd0}, _T_747}; // @[el2_lsu_bus_buffer.scala 228:45]
+  wire [10:0] byteen = _GEN_362 << io_lsu_addr_r[1:0]; // @[el2_lsu_bus_buffer.scala 228:45]
+  wire [3:0] ldst_byteen_hi_r = byteen[7:4]; // @[el2_lsu_bus_buffer.scala 229:32]
+  wire [3:0] ldst_byteen_lo_r = byteen[3:0]; // @[el2_lsu_bus_buffer.scala 230:32]
+  wire [63:0] _T_749 = {32'h0,io_store_data_r}; // @[Cat.scala 29:58]
+  wire [3:0] _GEN_363 = {{2'd0}, io_lsu_addr_r[1:0]}; // @[el2_lsu_bus_buffer.scala 231:58]
+  wire [5:0] _T_751 = 4'h8 * _GEN_363; // @[el2_lsu_bus_buffer.scala 231:58]
+  wire [126:0] _GEN_364 = {{63'd0}, _T_749}; // @[el2_lsu_bus_buffer.scala 231:52]
+  wire [126:0] store_data = _GEN_364 << _T_751; // @[el2_lsu_bus_buffer.scala 231:52]
+  wire [31:0] store_data_hi_r = store_data[63:32]; // @[el2_lsu_bus_buffer.scala 232:35]
+  wire [31:0] store_data_lo_r = store_data[31:0]; // @[el2_lsu_bus_buffer.scala 233:35]
+  wire  ldst_samedw_r = io_lsu_addr_r[3] == io_end_addr_r[3]; // @[el2_lsu_bus_buffer.scala 234:40]
+  wire  _T_755 = io_lsu_addr_r[1:0] == 2'h0; // @[el2_lsu_bus_buffer.scala 235:74]
+  wire  _T_757 = ~io_lsu_addr_r[0]; // @[el2_lsu_bus_buffer.scala 236:26]
+  wire  _T_758 = io_lsu_pkt_r_word & _T_755; // @[Mux.scala 27:72]
+  wire  _T_759 = io_lsu_pkt_r_half & _T_757; // @[Mux.scala 27:72]
+  wire  _T_761 = _T_758 | _T_759; // @[Mux.scala 27:72]
+  wire  is_aligned_r = _T_761 | io_lsu_pkt_r_by; // @[Mux.scala 27:72]
+  wire  _T_763 = io_lsu_pkt_r_load | io_no_word_merge_r; // @[el2_lsu_bus_buffer.scala 238:55]
+  wire  _T_764 = io_lsu_busreq_r & _T_763; // @[el2_lsu_bus_buffer.scala 238:34]
+  wire  _T_765 = ~ibuf_valid; // @[el2_lsu_bus_buffer.scala 238:79]
+  wire  ibuf_byp = _T_764 & _T_765; // @[el2_lsu_bus_buffer.scala 238:77]
+  wire  _T_766 = io_lsu_busreq_r & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 239:36]
+  wire  _T_767 = ~ibuf_byp; // @[el2_lsu_bus_buffer.scala 239:56]
+  wire  ibuf_wr_en = _T_766 & _T_767; // @[el2_lsu_bus_buffer.scala 239:54]
+  wire  _T_768 = ~ibuf_wr_en; // @[el2_lsu_bus_buffer.scala 241:36]
+  reg [2:0] ibuf_timer; // @[el2_lsu_bus_buffer.scala 283:59]
+  wire  _T_777 = ibuf_timer == 3'h7; // @[el2_lsu_bus_buffer.scala 247:62]
+  wire  _T_778 = ibuf_wr_en | _T_777; // @[el2_lsu_bus_buffer.scala 247:48]
+  wire  _T_834 = _T_766 & io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 265:54]
+  wire  _T_835 = _T_834 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 265:75]
+  wire  _T_836 = _T_835 & ibuf_write; // @[el2_lsu_bus_buffer.scala 265:88]
+  wire  _T_839 = io_lsu_addr_r[31:2] == ibuf_addr[31:2]; // @[el2_lsu_bus_buffer.scala 265:124]
+  wire  _T_840 = _T_836 & _T_839; // @[el2_lsu_bus_buffer.scala 265:101]
+  wire  _T_841 = ~io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 265:147]
+  wire  _T_842 = _T_840 & _T_841; // @[el2_lsu_bus_buffer.scala 265:145]
+  wire  _T_843 = ~io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_buffer.scala 265:170]
+  wire  ibuf_merge_en = _T_842 & _T_843; // @[el2_lsu_bus_buffer.scala 265:168]
+  wire  ibuf_merge_in = ~io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 266:20]
+  wire  _T_779 = ibuf_merge_en & ibuf_merge_in; // @[el2_lsu_bus_buffer.scala 247:98]
+  wire  _T_780 = ~_T_779; // @[el2_lsu_bus_buffer.scala 247:82]
+  wire  _T_781 = _T_778 & _T_780; // @[el2_lsu_bus_buffer.scala 247:80]
+  wire  _T_782 = _T_781 | ibuf_byp; // @[el2_lsu_bus_buffer.scala 248:5]
+  wire  _T_770 = ~io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 242:44]
+  wire  _T_771 = io_lsu_busreq_m & _T_770; // @[el2_lsu_bus_buffer.scala 242:42]
+  wire  _T_772 = _T_771 & ibuf_valid; // @[el2_lsu_bus_buffer.scala 242:61]
+  wire  _T_775 = ibuf_addr[31:2] != io_lsu_addr_m[31:2]; // @[el2_lsu_bus_buffer.scala 242:115]
+  wire  _T_776 = io_lsu_pkt_m_load | _T_775; // @[el2_lsu_bus_buffer.scala 242:95]
+  wire  ibuf_force_drain = _T_772 & _T_776; // @[el2_lsu_bus_buffer.scala 242:74]
+  wire  _T_783 = _T_782 | ibuf_force_drain; // @[el2_lsu_bus_buffer.scala 248:16]
+  reg  ibuf_sideeffect; // @[Reg.scala 27:20]
+  wire  _T_784 = _T_783 | ibuf_sideeffect; // @[el2_lsu_bus_buffer.scala 248:35]
+  wire  _T_785 = ~ibuf_write; // @[el2_lsu_bus_buffer.scala 248:55]
+  wire  _T_786 = _T_784 | _T_785; // @[el2_lsu_bus_buffer.scala 248:53]
+  wire  _T_787 = _T_786 | io_dec_tlu_wb_coalescing_disable; // @[el2_lsu_bus_buffer.scala 248:67]
+  wire  ibuf_drain_vld = ibuf_valid & _T_787; // @[el2_lsu_bus_buffer.scala 247:32]
+  wire  _T_769 = ibuf_drain_vld & _T_768; // @[el2_lsu_bus_buffer.scala 241:34]
+  wire  ibuf_rst = _T_769 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 241:49]
+  reg [1:0] WrPtr1_r; // @[el2_lsu_bus_buffer.scala 629:49]
+  reg [1:0] WrPtr0_r; // @[el2_lsu_bus_buffer.scala 628:49]
+  reg [1:0] ibuf_tag; // @[Reg.scala 27:20]
+  wire [1:0] ibuf_sz_in = {io_lsu_pkt_r_word,io_lsu_pkt_r_half}; // @[Cat.scala 29:58]
+  wire [3:0] _T_794 = ibuf_byteen | ldst_byteen_lo_r; // @[el2_lsu_bus_buffer.scala 257:77]
+  reg [31:0] ibuf_data; // @[el2_lib.scala 478:16]
+  wire [7:0] _T_802 = ldst_byteen_lo_r[0] ? store_data_lo_r[7:0] : ibuf_data[7:0]; // @[el2_lsu_bus_buffer.scala 262:8]
+  wire [7:0] _T_804 = _T_779 ? _T_802 : ibuf_data[7:0]; // @[el2_lsu_bus_buffer.scala 261:46]
+  wire [7:0] _T_809 = ldst_byteen_lo_r[1] ? store_data_lo_r[15:8] : ibuf_data[15:8]; // @[el2_lsu_bus_buffer.scala 262:8]
+  wire [7:0] _T_811 = _T_779 ? _T_809 : ibuf_data[15:8]; // @[el2_lsu_bus_buffer.scala 261:46]
+  wire [7:0] _T_816 = ldst_byteen_lo_r[2] ? store_data_lo_r[23:16] : ibuf_data[23:16]; // @[el2_lsu_bus_buffer.scala 262:8]
+  wire [7:0] _T_818 = _T_779 ? _T_816 : ibuf_data[23:16]; // @[el2_lsu_bus_buffer.scala 261:46]
+  wire [7:0] _T_823 = ldst_byteen_lo_r[3] ? store_data_lo_r[31:24] : ibuf_data[31:24]; // @[el2_lsu_bus_buffer.scala 262:8]
+  wire [7:0] _T_825 = _T_779 ? _T_823 : ibuf_data[31:24]; // @[el2_lsu_bus_buffer.scala 261:46]
+  wire [23:0] _T_827 = {_T_825,_T_818,_T_811}; // @[Cat.scala 29:58]
+  wire  _T_828 = ibuf_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 263:59]
+  wire [2:0] _T_831 = ibuf_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 263:93]
+  wire  _T_846 = ~ibuf_merge_in; // @[el2_lsu_bus_buffer.scala 267:65]
+  wire  _T_847 = ibuf_merge_en & _T_846; // @[el2_lsu_bus_buffer.scala 267:63]
+  wire  _T_850 = ibuf_byteen[0] | ldst_byteen_lo_r[0]; // @[el2_lsu_bus_buffer.scala 267:96]
+  wire  _T_852 = _T_847 ? _T_850 : ibuf_byteen[0]; // @[el2_lsu_bus_buffer.scala 267:48]
+  wire  _T_857 = ibuf_byteen[1] | ldst_byteen_lo_r[1]; // @[el2_lsu_bus_buffer.scala 267:96]
+  wire  _T_859 = _T_847 ? _T_857 : ibuf_byteen[1]; // @[el2_lsu_bus_buffer.scala 267:48]
+  wire  _T_864 = ibuf_byteen[2] | ldst_byteen_lo_r[2]; // @[el2_lsu_bus_buffer.scala 267:96]
+  wire  _T_866 = _T_847 ? _T_864 : ibuf_byteen[2]; // @[el2_lsu_bus_buffer.scala 267:48]
+  wire  _T_871 = ibuf_byteen[3] | ldst_byteen_lo_r[3]; // @[el2_lsu_bus_buffer.scala 267:96]
+  wire  _T_873 = _T_847 ? _T_871 : ibuf_byteen[3]; // @[el2_lsu_bus_buffer.scala 267:48]
+  wire [3:0] ibuf_byteen_out = {_T_873,_T_866,_T_859,_T_852}; // @[Cat.scala 29:58]
+  wire [7:0] _T_883 = _T_847 ? _T_802 : ibuf_data[7:0]; // @[el2_lsu_bus_buffer.scala 268:45]
+  wire [7:0] _T_891 = _T_847 ? _T_809 : ibuf_data[15:8]; // @[el2_lsu_bus_buffer.scala 268:45]
+  wire [7:0] _T_899 = _T_847 ? _T_816 : ibuf_data[23:16]; // @[el2_lsu_bus_buffer.scala 268:45]
+  wire [7:0] _T_907 = _T_847 ? _T_823 : ibuf_data[31:24]; // @[el2_lsu_bus_buffer.scala 268:45]
+  wire [31:0] ibuf_data_out = {_T_907,_T_899,_T_891,_T_883}; // @[Cat.scala 29:58]
+  wire  _T_910 = ibuf_wr_en | ibuf_valid; // @[el2_lsu_bus_buffer.scala 270:28]
+  wire  _T_915 = ibuf_wr_en & io_lsu_bus_ibuf_c1_clk; // @[el2_lsu_bus_buffer.scala 271:89]
+  reg [1:0] ibuf_dualtag; // @[Reg.scala 27:20]
+  reg  ibuf_dual; // @[Reg.scala 27:20]
+  reg  ibuf_samedw; // @[Reg.scala 27:20]
+  reg  ibuf_nomerge; // @[Reg.scala 27:20]
+  reg  ibuf_unsign; // @[Reg.scala 27:20]
+  reg [1:0] ibuf_sz; // @[Reg.scala 27:20]
+  wire [2:0] _GEN_365 = {{2'd0}, buf_write[3]}; // @[el2_lsu_bus_buffer.scala 536:79]
+  wire  _T_4287 = _GEN_365 == 3'h2; // @[el2_lsu_bus_buffer.scala 536:79]
+  wire  _T_4288 = buf_write[3] & _T_4287; // @[el2_lsu_bus_buffer.scala 536:64]
+  wire  _T_4289 = ~buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 536:91]
+  wire  _T_4290 = _T_4288 & _T_4289; // @[el2_lsu_bus_buffer.scala 536:89]
+  wire [2:0] _GEN_366 = {{2'd0}, buf_write[2]}; // @[el2_lsu_bus_buffer.scala 536:79]
+  wire  _T_4281 = _GEN_366 == 3'h2; // @[el2_lsu_bus_buffer.scala 536:79]
+  wire  _T_4282 = buf_write[2] & _T_4281; // @[el2_lsu_bus_buffer.scala 536:64]
+  wire  _T_4283 = ~buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 536:91]
+  wire  _T_4284 = _T_4282 & _T_4283; // @[el2_lsu_bus_buffer.scala 536:89]
+  wire [1:0] _T_4291 = _T_4290 + _T_4284; // @[el2_lsu_bus_buffer.scala 536:142]
+  wire [2:0] _GEN_367 = {{2'd0}, buf_write[1]}; // @[el2_lsu_bus_buffer.scala 536:79]
+  wire  _T_4275 = _GEN_367 == 3'h2; // @[el2_lsu_bus_buffer.scala 536:79]
+  wire  _T_4276 = buf_write[1] & _T_4275; // @[el2_lsu_bus_buffer.scala 536:64]
+  wire  _T_4277 = ~buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 536:91]
+  wire  _T_4278 = _T_4276 & _T_4277; // @[el2_lsu_bus_buffer.scala 536:89]
+  wire [1:0] _GEN_368 = {{1'd0}, _T_4278}; // @[el2_lsu_bus_buffer.scala 536:142]
+  wire [2:0] _T_4292 = _T_4291 + _GEN_368; // @[el2_lsu_bus_buffer.scala 536:142]
+  wire [2:0] _GEN_369 = {{2'd0}, buf_write[0]}; // @[el2_lsu_bus_buffer.scala 536:79]
+  wire  _T_4269 = _GEN_369 == 3'h2; // @[el2_lsu_bus_buffer.scala 536:79]
+  wire  _T_4270 = buf_write[0] & _T_4269; // @[el2_lsu_bus_buffer.scala 536:64]
+  wire  _T_4271 = ~buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 536:91]
+  wire  _T_4272 = _T_4270 & _T_4271; // @[el2_lsu_bus_buffer.scala 536:89]
+  wire [2:0] _GEN_370 = {{2'd0}, _T_4272}; // @[el2_lsu_bus_buffer.scala 536:142]
+  wire [3:0] buf_numvld_wrcmd_any = _T_4292 + _GEN_370; // @[el2_lsu_bus_buffer.scala 536:142]
+  wire  _T_941 = buf_numvld_wrcmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 293:43]
+  wire  _T_4309 = _T_4287 & _T_4289; // @[el2_lsu_bus_buffer.scala 537:73]
+  wire  _T_4305 = _T_4281 & _T_4283; // @[el2_lsu_bus_buffer.scala 537:73]
+  wire [1:0] _T_4310 = _T_4309 + _T_4305; // @[el2_lsu_bus_buffer.scala 537:126]
+  wire  _T_4301 = _T_4275 & _T_4277; // @[el2_lsu_bus_buffer.scala 537:73]
+  wire [1:0] _GEN_374 = {{1'd0}, _T_4301}; // @[el2_lsu_bus_buffer.scala 537:126]
+  wire [2:0] _T_4311 = _T_4310 + _GEN_374; // @[el2_lsu_bus_buffer.scala 537:126]
+  wire  _T_4297 = _T_4269 & _T_4271; // @[el2_lsu_bus_buffer.scala 537:73]
+  wire [2:0] _GEN_376 = {{2'd0}, _T_4297}; // @[el2_lsu_bus_buffer.scala 537:126]
+  wire [3:0] buf_numvld_cmd_any = _T_4311 + _GEN_376; // @[el2_lsu_bus_buffer.scala 537:126]
+  wire  _T_942 = buf_numvld_cmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 293:72]
+  wire  _T_943 = _T_941 & _T_942; // @[el2_lsu_bus_buffer.scala 293:51]
+  reg [2:0] obuf_wr_timer; // @[el2_lsu_bus_buffer.scala 390:54]
+  wire  _T_944 = obuf_wr_timer != 3'h7; // @[el2_lsu_bus_buffer.scala 293:97]
+  wire  _T_945 = _T_943 & _T_944; // @[el2_lsu_bus_buffer.scala 293:80]
+  wire  _T_947 = _T_945 & _T_843; // @[el2_lsu_bus_buffer.scala 293:114]
+  reg  buf_nomerge_0; // @[Reg.scala 27:20]
+  wire  _T_960 = ~buf_nomerge_0; // @[el2_lsu_bus_buffer.scala 294:31]
+  wire  _T_961 = _T_947 & _T_960; // @[el2_lsu_bus_buffer.scala 294:29]
+  reg  _T_4180; // @[Reg.scala 27:20]
+  reg  _T_4177; // @[Reg.scala 27:20]
+  reg  _T_4174; // @[Reg.scala 27:20]
+  reg  _T_4171; // @[Reg.scala 27:20]
+  wire [3:0] buf_sideeffect = {_T_4180,_T_4177,_T_4174,_T_4171}; // @[Cat.scala 29:58]
+  wire  _T_978 = ~buf_sideeffect[0]; // @[el2_lsu_bus_buffer.scala 295:5]
+  wire  _T_979 = _T_961 & _T_978; // @[el2_lsu_bus_buffer.scala 294:140]
+  wire  _T_990 = _T_771 & _T_765; // @[el2_lsu_bus_buffer.scala 297:58]
+  wire  _T_992 = _T_990 & _T_942; // @[el2_lsu_bus_buffer.scala 297:72]
+  wire  _T_1010 = io_lsu_addr_m[31:2] != buf_addr_0[31:2]; // @[el2_lsu_bus_buffer.scala 297:123]
+  wire  obuf_force_wr_en = _T_992 & _T_1010; // @[el2_lsu_bus_buffer.scala 297:101]
+  wire  _T_980 = ~obuf_force_wr_en; // @[el2_lsu_bus_buffer.scala 295:119]
+  wire  obuf_wr_wait = _T_979 & _T_980; // @[el2_lsu_bus_buffer.scala 295:117]
+  wire  _T_981 = |buf_numvld_cmd_any; // @[el2_lsu_bus_buffer.scala 296:75]
+  wire  _T_982 = obuf_wr_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 296:95]
+  wire  _T_983 = _T_981 & _T_982; // @[el2_lsu_bus_buffer.scala 296:79]
+  wire [2:0] _T_985 = obuf_wr_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 296:121]
+  wire  _T_4335 = _GEN_365 == 3'h1; // @[el2_lsu_bus_buffer.scala 538:64]
+  wire  _T_4338 = _T_4335 | _T_4287; // @[el2_lsu_bus_buffer.scala 538:74]
+  wire  _T_4340 = _T_4338 & _T_4289; // @[el2_lsu_bus_buffer.scala 538:100]
+  wire  _T_4328 = _GEN_366 == 3'h1; // @[el2_lsu_bus_buffer.scala 538:64]
+  wire  _T_4331 = _T_4328 | _T_4281; // @[el2_lsu_bus_buffer.scala 538:74]
+  wire  _T_4333 = _T_4331 & _T_4283; // @[el2_lsu_bus_buffer.scala 538:100]
+  wire [1:0] _T_4341 = _T_4340 + _T_4333; // @[el2_lsu_bus_buffer.scala 538:153]
+  wire  _T_4321 = _GEN_367 == 3'h1; // @[el2_lsu_bus_buffer.scala 538:64]
+  wire  _T_4324 = _T_4321 | _T_4275; // @[el2_lsu_bus_buffer.scala 538:74]
+  wire  _T_4326 = _T_4324 & _T_4277; // @[el2_lsu_bus_buffer.scala 538:100]
+  wire [1:0] _GEN_383 = {{1'd0}, _T_4326}; // @[el2_lsu_bus_buffer.scala 538:153]
+  wire [2:0] _T_4342 = _T_4341 + _GEN_383; // @[el2_lsu_bus_buffer.scala 538:153]
+  wire  _T_4314 = _GEN_369 == 3'h1; // @[el2_lsu_bus_buffer.scala 538:64]
+  wire  _T_4317 = _T_4314 | _T_4269; // @[el2_lsu_bus_buffer.scala 538:74]
+  wire  _T_4319 = _T_4317 & _T_4271; // @[el2_lsu_bus_buffer.scala 538:100]
+  wire [2:0] _GEN_386 = {{2'd0}, _T_4319}; // @[el2_lsu_bus_buffer.scala 538:153]
+  wire [3:0] buf_numvld_pend_any = _T_4342 + _GEN_386; // @[el2_lsu_bus_buffer.scala 538:153]
+  wire  _T_1012 = buf_numvld_pend_any == 4'h0; // @[el2_lsu_bus_buffer.scala 299:53]
+  wire  _T_1013 = ibuf_byp & _T_1012; // @[el2_lsu_bus_buffer.scala 299:31]
+  wire  _T_1014 = ~io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 299:64]
+  wire  _T_1015 = _T_1014 | io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 299:84]
+  wire  ibuf_buf_byp = _T_1013 & _T_1015; // @[el2_lsu_bus_buffer.scala 299:61]
+  wire  _T_1016 = ibuf_buf_byp & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 314:32]
+  wire  _T_4631 = buf_state_0 == 3'h3; // @[el2_lsu_bus_buffer.scala 565:68]
+  wire  _T_4633 = buf_sideeffect[0] & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 565:99]
+  wire  _T_4643 = _T_4631 & _T_4633; // @[Mux.scala 27:72]
+  wire  _T_4634 = buf_state_1 == 3'h3; // @[el2_lsu_bus_buffer.scala 565:68]
+  wire  _T_4636 = buf_sideeffect[1] & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 565:99]
+  wire  _T_4644 = _T_4634 & _T_4636; // @[Mux.scala 27:72]
+  wire  _T_4647 = _T_4643 | _T_4644; // @[Mux.scala 27:72]
+  wire  _T_4637 = buf_state_2 == 3'h3; // @[el2_lsu_bus_buffer.scala 565:68]
+  wire  _T_4639 = buf_sideeffect[2] & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 565:99]
+  wire  _T_4645 = _T_4637 & _T_4639; // @[Mux.scala 27:72]
+  wire  _T_4648 = _T_4647 | _T_4645; // @[Mux.scala 27:72]
+  wire  _T_4640 = buf_state_3 == 3'h3; // @[el2_lsu_bus_buffer.scala 565:68]
+  wire  _T_4642 = buf_sideeffect[3] & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 565:99]
+  wire  _T_4646 = _T_4640 & _T_4642; // @[Mux.scala 27:72]
+  wire  bus_sideeffect_pend = _T_4648 | _T_4646; // @[Mux.scala 27:72]
+  wire  _T_1017 = io_is_sideeffects_r & bus_sideeffect_pend; // @[el2_lsu_bus_buffer.scala 314:74]
+  wire  _T_1018 = ~_T_1017; // @[el2_lsu_bus_buffer.scala 314:52]
+  wire  _T_1019 = _T_1016 & _T_1018; // @[el2_lsu_bus_buffer.scala 314:50]
+  reg  buf_dual_3; // @[Reg.scala 27:20]
+  reg  buf_dual_2; // @[Reg.scala 27:20]
+  reg  buf_dual_1; // @[Reg.scala 27:20]
+  reg  buf_dual_0; // @[Reg.scala 27:20]
+  reg  buf_samedw_3; // @[Reg.scala 27:20]
+  reg  buf_samedw_2; // @[Reg.scala 27:20]
+  reg  buf_samedw_1; // @[Reg.scala 27:20]
+  reg  buf_samedw_0; // @[Reg.scala 27:20]
+  wire  _T_1129 = ~buf_write[0]; // @[el2_lsu_bus_buffer.scala 317:150]
+  reg  obuf_write; // @[Reg.scala 27:20]
+  reg  obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 377:54]
+  reg  obuf_data_done; // @[el2_lsu_bus_buffer.scala 378:55]
+  wire  _T_4707 = obuf_cmd_done | obuf_data_done; // @[el2_lsu_bus_buffer.scala 569:54]
+  wire  _T_4708 = obuf_cmd_done ? io_lsu_axi_wready : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 569:75]
+  wire  _T_4710 = _T_4707 ? _T_4708 : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 569:39]
+  wire  bus_cmd_ready = obuf_write ? _T_4710 : io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 569:23]
+  wire  _T_1156 = ~obuf_valid; // @[el2_lsu_bus_buffer.scala 318:48]
+  wire  _T_1157 = bus_cmd_ready | _T_1156; // @[el2_lsu_bus_buffer.scala 318:46]
+  reg  obuf_nosend; // @[Reg.scala 27:20]
+  wire  _T_1158 = _T_1157 | obuf_nosend; // @[el2_lsu_bus_buffer.scala 318:60]
+  wire  _T_1159 = _T_1019 & _T_1158; // @[el2_lsu_bus_buffer.scala 318:29]
+  wire  _T_1160 = ~obuf_wr_wait; // @[el2_lsu_bus_buffer.scala 318:77]
+  wire  _T_1161 = _T_1159 & _T_1160; // @[el2_lsu_bus_buffer.scala 318:75]
+  reg [31:0] obuf_addr; // @[el2_lib.scala 478:16]
+  wire  _T_4655 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[el2_lsu_bus_buffer.scala 567:56]
+  wire  _T_4656 = obuf_valid & _T_4655; // @[el2_lsu_bus_buffer.scala 567:38]
+  wire  _T_4658 = obuf_tag1 == 2'h0; // @[el2_lsu_bus_buffer.scala 567:126]
+  wire  _T_4659 = obuf_merge & _T_4658; // @[el2_lsu_bus_buffer.scala 567:114]
+  wire  _T_4660 = _T_3412 | _T_4659; // @[el2_lsu_bus_buffer.scala 567:100]
+  wire  _T_4661 = ~_T_4660; // @[el2_lsu_bus_buffer.scala 567:80]
+  wire  _T_4662 = _T_4656 & _T_4661; // @[el2_lsu_bus_buffer.scala 567:78]
+  wire  _T_4699 = _T_4631 & _T_4662; // @[Mux.scala 27:72]
+  wire  _T_4667 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[el2_lsu_bus_buffer.scala 567:56]
+  wire  _T_4668 = obuf_valid & _T_4667; // @[el2_lsu_bus_buffer.scala 567:38]
+  wire  _T_4670 = obuf_tag1 == 2'h1; // @[el2_lsu_bus_buffer.scala 567:126]
+  wire  _T_4671 = obuf_merge & _T_4670; // @[el2_lsu_bus_buffer.scala 567:114]
+  wire  _T_4672 = _T_3605 | _T_4671; // @[el2_lsu_bus_buffer.scala 567:100]
+  wire  _T_4673 = ~_T_4672; // @[el2_lsu_bus_buffer.scala 567:80]
+  wire  _T_4674 = _T_4668 & _T_4673; // @[el2_lsu_bus_buffer.scala 567:78]
+  wire  _T_4700 = _T_4634 & _T_4674; // @[Mux.scala 27:72]
+  wire  _T_4703 = _T_4699 | _T_4700; // @[Mux.scala 27:72]
+  wire  _T_4679 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[el2_lsu_bus_buffer.scala 567:56]
+  wire  _T_4680 = obuf_valid & _T_4679; // @[el2_lsu_bus_buffer.scala 567:38]
+  wire  _T_4682 = obuf_tag1 == 2'h2; // @[el2_lsu_bus_buffer.scala 567:126]
+  wire  _T_4683 = obuf_merge & _T_4682; // @[el2_lsu_bus_buffer.scala 567:114]
+  wire  _T_4684 = _T_3798 | _T_4683; // @[el2_lsu_bus_buffer.scala 567:100]
+  wire  _T_4685 = ~_T_4684; // @[el2_lsu_bus_buffer.scala 567:80]
+  wire  _T_4686 = _T_4680 & _T_4685; // @[el2_lsu_bus_buffer.scala 567:78]
+  wire  _T_4701 = _T_4637 & _T_4686; // @[Mux.scala 27:72]
+  wire  _T_4704 = _T_4703 | _T_4701; // @[Mux.scala 27:72]
+  wire  _T_4691 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[el2_lsu_bus_buffer.scala 567:56]
+  wire  _T_4692 = obuf_valid & _T_4691; // @[el2_lsu_bus_buffer.scala 567:38]
+  wire  _T_4694 = obuf_tag1 == 2'h3; // @[el2_lsu_bus_buffer.scala 567:126]
+  wire  _T_4695 = obuf_merge & _T_4694; // @[el2_lsu_bus_buffer.scala 567:114]
+  wire  _T_4696 = _T_3991 | _T_4695; // @[el2_lsu_bus_buffer.scala 567:100]
+  wire  _T_4697 = ~_T_4696; // @[el2_lsu_bus_buffer.scala 567:80]
+  wire  _T_4698 = _T_4692 & _T_4697; // @[el2_lsu_bus_buffer.scala 567:78]
+  wire  _T_4702 = _T_4640 & _T_4698; // @[Mux.scala 27:72]
+  wire  bus_addr_match_pending = _T_4704 | _T_4702; // @[Mux.scala 27:72]
+  wire  _T_1164 = ~bus_addr_match_pending; // @[el2_lsu_bus_buffer.scala 318:118]
+  wire  _T_1165 = _T_1161 & _T_1164; // @[el2_lsu_bus_buffer.scala 318:116]
+  wire  obuf_wr_en = _T_1165 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 318:142]
+  wire  _T_1167 = obuf_valid & obuf_nosend; // @[el2_lsu_bus_buffer.scala 320:47]
+  wire  bus_wcmd_sent = io_lsu_axi_awvalid & io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 570:39]
+  wire  _T_4714 = obuf_cmd_done | bus_wcmd_sent; // @[el2_lsu_bus_buffer.scala 572:35]
+  wire  bus_wdata_sent = io_lsu_axi_wvalid & io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 571:39]
+  wire  _T_4715 = obuf_data_done | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 572:70]
+  wire  _T_4716 = _T_4714 & _T_4715; // @[el2_lsu_bus_buffer.scala 572:52]
+  wire  _T_4717 = io_lsu_axi_arvalid & io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 572:111]
+  wire  bus_cmd_sent = _T_4716 | _T_4717; // @[el2_lsu_bus_buffer.scala 572:89]
+  wire  _T_1168 = bus_cmd_sent | _T_1167; // @[el2_lsu_bus_buffer.scala 320:33]
+  wire  _T_1169 = ~obuf_wr_en; // @[el2_lsu_bus_buffer.scala 320:65]
+  wire  _T_1170 = _T_1168 & _T_1169; // @[el2_lsu_bus_buffer.scala 320:63]
+  wire  _T_1171 = _T_1170 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 320:77]
+  wire  obuf_rst = _T_1171 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 320:98]
+  wire  obuf_write_in = ibuf_buf_byp ? io_lsu_pkt_r_store : buf_write[0]; // @[el2_lsu_bus_buffer.scala 321:26]
+  wire [31:0] obuf_addr_in = ibuf_buf_byp ? io_lsu_addr_r : buf_addr_0; // @[el2_lsu_bus_buffer.scala 323:25]
+  reg [1:0] buf_sz_0; // @[Reg.scala 27:20]
+  reg [1:0] buf_sz_1; // @[Reg.scala 27:20]
+  reg [1:0] buf_sz_2; // @[Reg.scala 27:20]
+  reg [1:0] buf_sz_3; // @[Reg.scala 27:20]
+  wire [1:0] obuf_sz_in = ibuf_buf_byp ? ibuf_sz_in : buf_sz_0; // @[el2_lsu_bus_buffer.scala 326:23]
+  wire  _T_1229 = obuf_wr_en | obuf_rst; // @[el2_lsu_bus_buffer.scala 334:39]
+  wire  _T_1230 = ~_T_1229; // @[el2_lsu_bus_buffer.scala 334:26]
+  wire  _T_1236 = obuf_sz_in == 2'h0; // @[el2_lsu_bus_buffer.scala 338:72]
+  wire  _T_1239 = ~obuf_addr_in[0]; // @[el2_lsu_bus_buffer.scala 338:98]
+  wire  _T_1240 = obuf_sz_in[0] & _T_1239; // @[el2_lsu_bus_buffer.scala 338:96]
+  wire  _T_1241 = _T_1236 | _T_1240; // @[el2_lsu_bus_buffer.scala 338:79]
+  wire  _T_1244 = |obuf_addr_in[1:0]; // @[el2_lsu_bus_buffer.scala 338:153]
+  wire  _T_1245 = ~_T_1244; // @[el2_lsu_bus_buffer.scala 338:134]
+  wire  _T_1246 = obuf_sz_in[1] & _T_1245; // @[el2_lsu_bus_buffer.scala 338:132]
+  wire  _T_1247 = _T_1241 | _T_1246; // @[el2_lsu_bus_buffer.scala 338:116]
+  wire  obuf_aligned_in = ibuf_buf_byp ? is_aligned_r : _T_1247; // @[el2_lsu_bus_buffer.scala 338:28]
+  wire  _T_1264 = obuf_addr_in[31:3] == obuf_addr[31:3]; // @[el2_lsu_bus_buffer.scala 352:40]
+  wire  _T_1265 = _T_1264 & obuf_aligned_in; // @[el2_lsu_bus_buffer.scala 352:60]
+  reg  obuf_sideeffect; // @[Reg.scala 27:20]
+  wire  _T_1266 = ~obuf_sideeffect; // @[el2_lsu_bus_buffer.scala 352:80]
+  wire  _T_1267 = _T_1265 & _T_1266; // @[el2_lsu_bus_buffer.scala 352:78]
+  wire  _T_1268 = ~obuf_write; // @[el2_lsu_bus_buffer.scala 352:99]
+  wire  _T_1269 = _T_1267 & _T_1268; // @[el2_lsu_bus_buffer.scala 352:97]
+  wire  _T_1270 = ~obuf_write_in; // @[el2_lsu_bus_buffer.scala 352:113]
+  wire  _T_1271 = _T_1269 & _T_1270; // @[el2_lsu_bus_buffer.scala 352:111]
+  wire  _T_1272 = ~io_dec_tlu_external_ldfwd_disable; // @[el2_lsu_bus_buffer.scala 352:130]
+  wire  _T_1273 = _T_1271 & _T_1272; // @[el2_lsu_bus_buffer.scala 352:128]
+  wire  _T_1274 = ~obuf_nosend; // @[el2_lsu_bus_buffer.scala 353:20]
+  wire  _T_1275 = obuf_valid & _T_1274; // @[el2_lsu_bus_buffer.scala 353:18]
+  reg  obuf_rdrsp_pend; // @[el2_lsu_bus_buffer.scala 379:56]
+  wire  bus_rsp_read = io_lsu_axi_rvalid & io_lsu_axi_rready; // @[el2_lsu_bus_buffer.scala 573:37]
+  reg [2:0] obuf_rdrsp_tag; // @[el2_lsu_bus_buffer.scala 380:55]
+  wire  _T_1276 = io_lsu_axi_rid == obuf_rdrsp_tag; // @[el2_lsu_bus_buffer.scala 353:90]
+  wire  _T_1277 = bus_rsp_read & _T_1276; // @[el2_lsu_bus_buffer.scala 353:70]
+  wire  _T_1278 = ~_T_1277; // @[el2_lsu_bus_buffer.scala 353:55]
+  wire  _T_1279 = obuf_rdrsp_pend & _T_1278; // @[el2_lsu_bus_buffer.scala 353:53]
+  wire  _T_1280 = _T_1275 | _T_1279; // @[el2_lsu_bus_buffer.scala 353:34]
+  wire  obuf_nosend_in = _T_1273 & _T_1280; // @[el2_lsu_bus_buffer.scala 352:165]
+  wire  _T_1248 = ~obuf_nosend_in; // @[el2_lsu_bus_buffer.scala 346:44]
+  wire  _T_1249 = obuf_wr_en & _T_1248; // @[el2_lsu_bus_buffer.scala 346:42]
+  wire  _T_1250 = ~_T_1249; // @[el2_lsu_bus_buffer.scala 346:29]
+  wire  _T_1251 = _T_1250 & obuf_rdrsp_pend; // @[el2_lsu_bus_buffer.scala 346:61]
+  wire  _T_1255 = _T_1251 & _T_1278; // @[el2_lsu_bus_buffer.scala 346:79]
+  wire  _T_1257 = bus_cmd_sent & _T_1268; // @[el2_lsu_bus_buffer.scala 347:20]
+  wire  _T_1258 = ~io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 347:37]
+  wire  _T_1259 = _T_1257 & _T_1258; // @[el2_lsu_bus_buffer.scala 347:35]
+  wire  _T_1261 = bus_cmd_sent | _T_1268; // @[el2_lsu_bus_buffer.scala 349:44]
+  wire [7:0] _T_1283 = {ldst_byteen_lo_r,4'h0}; // @[Cat.scala 29:58]
+  wire [7:0] _T_1284 = {4'h0,ldst_byteen_lo_r}; // @[Cat.scala 29:58]
+  wire [7:0] _T_1285 = io_lsu_addr_r[2] ? _T_1283 : _T_1284; // @[el2_lsu_bus_buffer.scala 354:46]
+  wire [7:0] _T_1312 = {buf_byteen_0,4'h0}; // @[Cat.scala 29:58]
+  wire [7:0] _T_1325 = {4'h0,buf_byteen_0}; // @[Cat.scala 29:58]
+  wire [7:0] _T_1326 = buf_addr_0[2] ? _T_1312 : _T_1325; // @[el2_lsu_bus_buffer.scala 355:8]
+  wire [7:0] obuf_byteen0_in = ibuf_buf_byp ? _T_1285 : _T_1326; // @[el2_lsu_bus_buffer.scala 354:28]
+  wire [7:0] _T_1328 = {ldst_byteen_hi_r,4'h0}; // @[Cat.scala 29:58]
+  wire [7:0] _T_1329 = {4'h0,ldst_byteen_hi_r}; // @[Cat.scala 29:58]
+  wire [7:0] _T_1330 = io_end_addr_r[2] ? _T_1328 : _T_1329; // @[el2_lsu_bus_buffer.scala 356:46]
+  wire [7:0] obuf_byteen1_in = ibuf_buf_byp ? _T_1330 : _T_1326; // @[el2_lsu_bus_buffer.scala 356:28]
+  wire [63:0] _T_1402 = {buf_data_0,32'h0}; // @[Cat.scala 29:58]
+  wire [63:0] _T_1415 = {32'h0,buf_data_0}; // @[Cat.scala 29:58]
+  wire [63:0] _T_1416 = buf_addr_0[2] ? _T_1402 : _T_1415; // @[el2_lsu_bus_buffer.scala 360:8]
+  wire [63:0] _T_1418 = {store_data_hi_r,32'h0}; // @[Cat.scala 29:58]
+  wire [63:0] _T_1419 = {32'h0,store_data_hi_r}; // @[Cat.scala 29:58]
+  wire [63:0] _T_1420 = io_lsu_addr_r[2] ? _T_1418 : _T_1419; // @[el2_lsu_bus_buffer.scala 361:44]
+  wire [63:0] obuf_data1_in = ibuf_buf_byp ? _T_1420 : _T_1416; // @[el2_lsu_bus_buffer.scala 361:26]
+  reg  buf_dualhi_3; // @[Reg.scala 27:20]
+  reg  buf_dualhi_2; // @[Reg.scala 27:20]
+  reg  buf_dualhi_1; // @[Reg.scala 27:20]
+  reg  buf_dualhi_0; // @[Reg.scala 27:20]
+  wire  _T_1761 = ibuf_buf_byp & ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 372:19]
+  wire  obuf_merge_en = _T_1761 & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 372:35]
+  wire  _T_1464 = obuf_merge_en & obuf_byteen1_in[0]; // @[el2_lsu_bus_buffer.scala 363:80]
+  wire  _T_1465 = obuf_byteen0_in[0] | _T_1464; // @[el2_lsu_bus_buffer.scala 363:63]
+  wire  _T_1468 = obuf_merge_en & obuf_byteen1_in[1]; // @[el2_lsu_bus_buffer.scala 363:80]
+  wire  _T_1469 = obuf_byteen0_in[1] | _T_1468; // @[el2_lsu_bus_buffer.scala 363:63]
+  wire  _T_1472 = obuf_merge_en & obuf_byteen1_in[2]; // @[el2_lsu_bus_buffer.scala 363:80]
+  wire  _T_1473 = obuf_byteen0_in[2] | _T_1472; // @[el2_lsu_bus_buffer.scala 363:63]
+  wire  _T_1476 = obuf_merge_en & obuf_byteen1_in[3]; // @[el2_lsu_bus_buffer.scala 363:80]
+  wire  _T_1477 = obuf_byteen0_in[3] | _T_1476; // @[el2_lsu_bus_buffer.scala 363:63]
+  wire  _T_1480 = obuf_merge_en & obuf_byteen1_in[4]; // @[el2_lsu_bus_buffer.scala 363:80]
+  wire  _T_1481 = obuf_byteen0_in[4] | _T_1480; // @[el2_lsu_bus_buffer.scala 363:63]
+  wire  _T_1484 = obuf_merge_en & obuf_byteen1_in[5]; // @[el2_lsu_bus_buffer.scala 363:80]
+  wire  _T_1485 = obuf_byteen0_in[5] | _T_1484; // @[el2_lsu_bus_buffer.scala 363:63]
+  wire  _T_1488 = obuf_merge_en & obuf_byteen1_in[6]; // @[el2_lsu_bus_buffer.scala 363:80]
+  wire  _T_1489 = obuf_byteen0_in[6] | _T_1488; // @[el2_lsu_bus_buffer.scala 363:63]
+  wire  _T_1492 = obuf_merge_en & obuf_byteen1_in[7]; // @[el2_lsu_bus_buffer.scala 363:80]
+  wire  _T_1493 = obuf_byteen0_in[7] | _T_1492; // @[el2_lsu_bus_buffer.scala 363:63]
+  wire [7:0] obuf_byteen_in = {_T_1493,_T_1489,_T_1485,_T_1481,_T_1477,_T_1473,_T_1469,_T_1465}; // @[Cat.scala 29:58]
+  wire [7:0] _T_1504 = _T_1464 ? obuf_data1_in[7:0] : obuf_data1_in[7:0]; // @[el2_lsu_bus_buffer.scala 364:44]
+  wire [7:0] _T_1509 = _T_1468 ? obuf_data1_in[15:8] : obuf_data1_in[15:8]; // @[el2_lsu_bus_buffer.scala 364:44]
+  wire [7:0] _T_1514 = _T_1472 ? obuf_data1_in[23:16] : obuf_data1_in[23:16]; // @[el2_lsu_bus_buffer.scala 364:44]
+  wire [7:0] _T_1519 = _T_1476 ? obuf_data1_in[31:24] : obuf_data1_in[31:24]; // @[el2_lsu_bus_buffer.scala 364:44]
+  wire [7:0] _T_1524 = _T_1480 ? obuf_data1_in[39:32] : obuf_data1_in[39:32]; // @[el2_lsu_bus_buffer.scala 364:44]
+  wire [7:0] _T_1529 = _T_1484 ? obuf_data1_in[47:40] : obuf_data1_in[47:40]; // @[el2_lsu_bus_buffer.scala 364:44]
+  wire [7:0] _T_1534 = _T_1488 ? obuf_data1_in[55:48] : obuf_data1_in[55:48]; // @[el2_lsu_bus_buffer.scala 364:44]
+  wire [7:0] _T_1539 = _T_1492 ? obuf_data1_in[63:56] : obuf_data1_in[63:56]; // @[el2_lsu_bus_buffer.scala 364:44]
+  wire [55:0] _T_1545 = {_T_1539,_T_1534,_T_1529,_T_1524,_T_1519,_T_1514,_T_1509}; // @[Cat.scala 29:58]
+  wire  _T_1764 = obuf_wr_en | obuf_valid; // @[el2_lsu_bus_buffer.scala 375:55]
+  reg [1:0] obuf_sz; // @[Reg.scala 27:20]
+  reg [7:0] obuf_byteen; // @[Reg.scala 27:20]
+  reg [63:0] obuf_data; // @[el2_lib.scala 478:16]
+  wire  _T_1777 = buf_state_0 == 3'h0; // @[el2_lsu_bus_buffer.scala 392:59]
+  wire  _T_1778 = ibuf_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 392:97]
+  wire  _T_1779 = ibuf_valid & _T_1778; // @[el2_lsu_bus_buffer.scala 392:86]
+  wire  _T_1780 = WrPtr0_r == 2'h0; // @[el2_lsu_bus_buffer.scala 393:33]
+  wire  _T_1781 = io_lsu_busreq_m & _T_1780; // @[el2_lsu_bus_buffer.scala 393:22]
+  wire  _T_1782 = _T_1779 | _T_1781; // @[el2_lsu_bus_buffer.scala 392:106]
+  wire  _T_1783 = WrPtr1_r == 2'h0; // @[el2_lsu_bus_buffer.scala 393:72]
+  wire  _T_1784 = io_ldst_dual_r & _T_1783; // @[el2_lsu_bus_buffer.scala 393:60]
+  wire  _T_1785 = _T_1782 | _T_1784; // @[el2_lsu_bus_buffer.scala 393:42]
+  wire  _T_1786 = ~_T_1785; // @[el2_lsu_bus_buffer.scala 392:72]
+  wire  _T_1787 = _T_1777 & _T_1786; // @[el2_lsu_bus_buffer.scala 392:70]
+  wire  _T_1788 = buf_state_1 == 3'h0; // @[el2_lsu_bus_buffer.scala 392:59]
+  wire  _T_1789 = ibuf_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 392:97]
+  wire  _T_1790 = ibuf_valid & _T_1789; // @[el2_lsu_bus_buffer.scala 392:86]
+  wire  _T_1791 = WrPtr0_r == 2'h1; // @[el2_lsu_bus_buffer.scala 393:33]
+  wire  _T_1792 = io_lsu_busreq_m & _T_1791; // @[el2_lsu_bus_buffer.scala 393:22]
+  wire  _T_1793 = _T_1790 | _T_1792; // @[el2_lsu_bus_buffer.scala 392:106]
+  wire  _T_1794 = WrPtr1_r == 2'h1; // @[el2_lsu_bus_buffer.scala 393:72]
+  wire  _T_1795 = io_ldst_dual_r & _T_1794; // @[el2_lsu_bus_buffer.scala 393:60]
+  wire  _T_1796 = _T_1793 | _T_1795; // @[el2_lsu_bus_buffer.scala 393:42]
+  wire  _T_1797 = ~_T_1796; // @[el2_lsu_bus_buffer.scala 392:72]
+  wire  _T_1798 = _T_1788 & _T_1797; // @[el2_lsu_bus_buffer.scala 392:70]
+  wire  _T_1799 = buf_state_2 == 3'h0; // @[el2_lsu_bus_buffer.scala 392:59]
+  wire  _T_1800 = ibuf_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 392:97]
+  wire  _T_1801 = ibuf_valid & _T_1800; // @[el2_lsu_bus_buffer.scala 392:86]
+  wire  _T_1802 = WrPtr0_r == 2'h2; // @[el2_lsu_bus_buffer.scala 393:33]
+  wire  _T_1803 = io_lsu_busreq_m & _T_1802; // @[el2_lsu_bus_buffer.scala 393:22]
+  wire  _T_1804 = _T_1801 | _T_1803; // @[el2_lsu_bus_buffer.scala 392:106]
+  wire  _T_1805 = WrPtr1_r == 2'h2; // @[el2_lsu_bus_buffer.scala 393:72]
+  wire  _T_1806 = io_ldst_dual_r & _T_1805; // @[el2_lsu_bus_buffer.scala 393:60]
+  wire  _T_1807 = _T_1804 | _T_1806; // @[el2_lsu_bus_buffer.scala 393:42]
+  wire  _T_1808 = ~_T_1807; // @[el2_lsu_bus_buffer.scala 392:72]
+  wire  _T_1809 = _T_1799 & _T_1808; // @[el2_lsu_bus_buffer.scala 392:70]
+  wire  _T_1810 = buf_state_3 == 3'h0; // @[el2_lsu_bus_buffer.scala 392:59]
+  wire  _T_1811 = ibuf_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 392:97]
+  wire  _T_1812 = ibuf_valid & _T_1811; // @[el2_lsu_bus_buffer.scala 392:86]
+  wire  _T_1813 = WrPtr0_r == 2'h3; // @[el2_lsu_bus_buffer.scala 393:33]
+  wire  _T_1814 = io_lsu_busreq_m & _T_1813; // @[el2_lsu_bus_buffer.scala 393:22]
+  wire  _T_1815 = _T_1812 | _T_1814; // @[el2_lsu_bus_buffer.scala 392:106]
+  wire  _T_1816 = WrPtr1_r == 2'h3; // @[el2_lsu_bus_buffer.scala 393:72]
+  wire  _T_1817 = io_ldst_dual_r & _T_1816; // @[el2_lsu_bus_buffer.scala 393:60]
+  wire  _T_1818 = _T_1815 | _T_1817; // @[el2_lsu_bus_buffer.scala 393:42]
+  wire  _T_1819 = ~_T_1818; // @[el2_lsu_bus_buffer.scala 392:72]
+  wire  _T_1820 = _T_1810 & _T_1819; // @[el2_lsu_bus_buffer.scala 392:70]
+  wire [1:0] _T_1821 = _T_1820 ? 2'h3 : 2'h0; // @[Mux.scala 98:16]
+  wire [1:0] _T_1822 = _T_1809 ? 2'h2 : _T_1821; // @[Mux.scala 98:16]
+  wire [1:0] _T_1823 = _T_1798 ? 2'h1 : _T_1822; // @[Mux.scala 98:16]
+  wire [1:0] WrPtr0_m = _T_1787 ? 2'h0 : _T_1823; // @[Mux.scala 98:16]
+  wire  _T_1828 = WrPtr0_m == 2'h0; // @[el2_lsu_bus_buffer.scala 396:33]
+  wire  _T_1829 = io_lsu_busreq_m & _T_1828; // @[el2_lsu_bus_buffer.scala 396:22]
+  wire  _T_1830 = _T_1779 | _T_1829; // @[el2_lsu_bus_buffer.scala 395:106]
+  wire  _T_1832 = io_lsu_busreq_r & _T_1780; // @[el2_lsu_bus_buffer.scala 396:61]
+  wire  _T_1833 = _T_1830 | _T_1832; // @[el2_lsu_bus_buffer.scala 396:42]
+  wire  _T_1836 = _T_1833 | _T_1784; // @[el2_lsu_bus_buffer.scala 396:83]
+  wire  _T_1837 = ~_T_1836; // @[el2_lsu_bus_buffer.scala 395:72]
+  wire  _T_1838 = _T_1777 & _T_1837; // @[el2_lsu_bus_buffer.scala 395:70]
+  wire  _T_1842 = WrPtr0_m == 2'h1; // @[el2_lsu_bus_buffer.scala 396:33]
+  wire  _T_1843 = io_lsu_busreq_m & _T_1842; // @[el2_lsu_bus_buffer.scala 396:22]
+  wire  _T_1844 = _T_1790 | _T_1843; // @[el2_lsu_bus_buffer.scala 395:106]
+  wire  _T_1846 = io_lsu_busreq_r & _T_1791; // @[el2_lsu_bus_buffer.scala 396:61]
+  wire  _T_1847 = _T_1844 | _T_1846; // @[el2_lsu_bus_buffer.scala 396:42]
+  wire  _T_1850 = _T_1847 | _T_1795; // @[el2_lsu_bus_buffer.scala 396:83]
+  wire  _T_1851 = ~_T_1850; // @[el2_lsu_bus_buffer.scala 395:72]
+  wire  _T_1852 = _T_1788 & _T_1851; // @[el2_lsu_bus_buffer.scala 395:70]
+  wire  _T_1856 = WrPtr0_m == 2'h2; // @[el2_lsu_bus_buffer.scala 396:33]
+  wire  _T_1857 = io_lsu_busreq_m & _T_1856; // @[el2_lsu_bus_buffer.scala 396:22]
+  wire  _T_1858 = _T_1801 | _T_1857; // @[el2_lsu_bus_buffer.scala 395:106]
+  wire  _T_1860 = io_lsu_busreq_r & _T_1802; // @[el2_lsu_bus_buffer.scala 396:61]
+  wire  _T_1861 = _T_1858 | _T_1860; // @[el2_lsu_bus_buffer.scala 396:42]
+  wire  _T_1864 = _T_1861 | _T_1806; // @[el2_lsu_bus_buffer.scala 396:83]
+  wire  _T_1865 = ~_T_1864; // @[el2_lsu_bus_buffer.scala 395:72]
+  wire  _T_1866 = _T_1799 & _T_1865; // @[el2_lsu_bus_buffer.scala 395:70]
+  wire  _T_1870 = WrPtr0_m == 2'h3; // @[el2_lsu_bus_buffer.scala 396:33]
+  wire  _T_1871 = io_lsu_busreq_m & _T_1870; // @[el2_lsu_bus_buffer.scala 396:22]
+  wire  _T_1872 = _T_1812 | _T_1871; // @[el2_lsu_bus_buffer.scala 395:106]
+  wire  _T_1874 = io_lsu_busreq_r & _T_1813; // @[el2_lsu_bus_buffer.scala 396:61]
+  wire  _T_1875 = _T_1872 | _T_1874; // @[el2_lsu_bus_buffer.scala 396:42]
+  wire  _T_1878 = _T_1875 | _T_1817; // @[el2_lsu_bus_buffer.scala 396:83]
+  wire  _T_1879 = ~_T_1878; // @[el2_lsu_bus_buffer.scala 395:72]
+  wire  _T_1880 = _T_1810 & _T_1879; // @[el2_lsu_bus_buffer.scala 395:70]
+  reg [3:0] buf_rspageQ_0; // @[el2_lsu_bus_buffer.scala 516:63]
+  wire  _T_2596 = buf_state_3 == 3'h5; // @[el2_lsu_bus_buffer.scala 430:104]
+  wire  _T_2597 = buf_rspageQ_0[3] & _T_2596; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2593 = buf_state_2 == 3'h5; // @[el2_lsu_bus_buffer.scala 430:104]
+  wire  _T_2594 = buf_rspageQ_0[2] & _T_2593; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2590 = buf_state_1 == 3'h5; // @[el2_lsu_bus_buffer.scala 430:104]
+  wire  _T_2591 = buf_rspageQ_0[1] & _T_2590; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2587 = buf_state_0 == 3'h5; // @[el2_lsu_bus_buffer.scala 430:104]
+  wire  _T_2588 = buf_rspageQ_0[0] & _T_2587; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire [3:0] buf_rsp_pickage_0 = {_T_2597,_T_2594,_T_2591,_T_2588}; // @[Cat.scala 29:58]
+  wire  _T_1956 = |buf_rsp_pickage_0; // @[el2_lsu_bus_buffer.scala 404:65]
+  wire  _T_1957 = ~_T_1956; // @[el2_lsu_bus_buffer.scala 404:44]
+  wire  _T_1959 = _T_1957 & _T_2587; // @[el2_lsu_bus_buffer.scala 404:70]
+  reg [3:0] buf_rspageQ_1; // @[el2_lsu_bus_buffer.scala 516:63]
+  wire  _T_2612 = buf_rspageQ_1[3] & _T_2596; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2609 = buf_rspageQ_1[2] & _T_2593; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2606 = buf_rspageQ_1[1] & _T_2590; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2603 = buf_rspageQ_1[0] & _T_2587; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire [3:0] buf_rsp_pickage_1 = {_T_2612,_T_2609,_T_2606,_T_2603}; // @[Cat.scala 29:58]
+  wire  _T_1960 = |buf_rsp_pickage_1; // @[el2_lsu_bus_buffer.scala 404:65]
+  wire  _T_1961 = ~_T_1960; // @[el2_lsu_bus_buffer.scala 404:44]
+  wire  _T_1963 = _T_1961 & _T_2590; // @[el2_lsu_bus_buffer.scala 404:70]
+  reg [3:0] buf_rspageQ_2; // @[el2_lsu_bus_buffer.scala 516:63]
+  wire  _T_2627 = buf_rspageQ_2[3] & _T_2596; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2624 = buf_rspageQ_2[2] & _T_2593; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2621 = buf_rspageQ_2[1] & _T_2590; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2618 = buf_rspageQ_2[0] & _T_2587; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire [3:0] buf_rsp_pickage_2 = {_T_2627,_T_2624,_T_2621,_T_2618}; // @[Cat.scala 29:58]
+  wire  _T_1964 = |buf_rsp_pickage_2; // @[el2_lsu_bus_buffer.scala 404:65]
+  wire  _T_1965 = ~_T_1964; // @[el2_lsu_bus_buffer.scala 404:44]
+  wire  _T_1967 = _T_1965 & _T_2593; // @[el2_lsu_bus_buffer.scala 404:70]
+  reg [3:0] buf_rspageQ_3; // @[el2_lsu_bus_buffer.scala 516:63]
+  wire  _T_2642 = buf_rspageQ_3[3] & _T_2596; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2639 = buf_rspageQ_3[2] & _T_2593; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2636 = buf_rspageQ_3[1] & _T_2590; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire  _T_2633 = buf_rspageQ_3[0] & _T_2587; // @[el2_lsu_bus_buffer.scala 430:89]
+  wire [3:0] buf_rsp_pickage_3 = {_T_2642,_T_2639,_T_2636,_T_2633}; // @[Cat.scala 29:58]
+  wire  _T_1968 = |buf_rsp_pickage_3; // @[el2_lsu_bus_buffer.scala 404:65]
+  wire  _T_1969 = ~_T_1968; // @[el2_lsu_bus_buffer.scala 404:44]
+  wire  _T_1971 = _T_1969 & _T_2596; // @[el2_lsu_bus_buffer.scala 404:70]
+  wire [3:0] RspPtrDec = {_T_1971,_T_1967,_T_1963,_T_1959}; // @[Cat.scala 29:58]
+  wire [1:0] _T_1992 = RspPtrDec[2] ? 2'h2 : 2'h3; // @[Mux.scala 47:69]
+  wire [1:0] _T_1993 = RspPtrDec[1] ? 2'h1 : _T_1992; // @[Mux.scala 47:69]
+  wire [1:0] RspPtr = RspPtrDec[0] ? 2'h0 : _T_1993; // @[Mux.scala 47:69]
+  wire  _T_3382 = ibuf_byp | io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 459:77]
+  wire  _T_3383 = ~ibuf_merge_en; // @[el2_lsu_bus_buffer.scala 459:97]
+  wire  _T_3384 = _T_3382 & _T_3383; // @[el2_lsu_bus_buffer.scala 459:95]
+  wire  _T_3385 = 2'h0 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 459:117]
+  wire  _T_3386 = _T_3384 & _T_3385; // @[el2_lsu_bus_buffer.scala 459:112]
+  wire  _T_3387 = ibuf_byp & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 459:144]
+  wire  _T_3388 = 2'h0 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 459:166]
+  wire  _T_3389 = _T_3387 & _T_3388; // @[el2_lsu_bus_buffer.scala 459:161]
+  wire  _T_3390 = _T_3386 | _T_3389; // @[el2_lsu_bus_buffer.scala 459:132]
+  wire  _T_3391 = _T_766 & _T_3390; // @[el2_lsu_bus_buffer.scala 459:63]
+  wire  _T_3392 = 2'h0 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 459:206]
+  wire  _T_3393 = ibuf_drain_vld & _T_3392; // @[el2_lsu_bus_buffer.scala 459:201]
+  wire  _T_3394 = _T_3391 | _T_3393; // @[el2_lsu_bus_buffer.scala 459:183]
+  wire  _T_3404 = io_lsu_bus_clk_en | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 466:46]
+  wire  _T_3439 = 3'h3 == buf_state_0; // @[Conditional.scala 37:30]
+  wire  bus_rsp_write = io_lsu_axi_bvalid & io_lsu_axi_bready; // @[el2_lsu_bus_buffer.scala 574:38]
+  wire  _T_3484 = io_lsu_axi_bid == 3'h0; // @[el2_lsu_bus_buffer.scala 484:73]
+  wire  _T_3485 = bus_rsp_write & _T_3484; // @[el2_lsu_bus_buffer.scala 484:52]
+  wire  _T_3486 = io_lsu_axi_rid == 3'h0; // @[el2_lsu_bus_buffer.scala 485:46]
+  reg  _T_4157; // @[Reg.scala 27:20]
+  reg  _T_4155; // @[Reg.scala 27:20]
+  reg  _T_4153; // @[Reg.scala 27:20]
+  reg  _T_4151; // @[Reg.scala 27:20]
+  wire [3:0] buf_ldfwd = {_T_4157,_T_4155,_T_4153,_T_4151}; // @[Cat.scala 29:58]
+  reg [1:0] buf_ldfwdtag_0; // @[Reg.scala 27:20]
+  wire [2:0] _GEN_387 = {{1'd0}, buf_ldfwdtag_0}; // @[el2_lsu_bus_buffer.scala 486:47]
+  wire  _T_3488 = io_lsu_axi_rid == _GEN_387; // @[el2_lsu_bus_buffer.scala 486:47]
+  wire  _T_3489 = buf_ldfwd[0] & _T_3488; // @[el2_lsu_bus_buffer.scala 486:27]
+  wire  _T_3490 = _T_3486 | _T_3489; // @[el2_lsu_bus_buffer.scala 485:77]
+  wire  _T_3491 = buf_dual_0 & buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 487:26]
+  wire  _T_3494 = _T_3491 & _T_1129; // @[el2_lsu_bus_buffer.scala 487:42]
+  wire  _T_3495 = _T_3494 & buf_samedw_0; // @[el2_lsu_bus_buffer.scala 487:58]
+  reg [1:0] buf_dualtag_0; // @[Reg.scala 27:20]
+  wire [2:0] _GEN_388 = {{1'd0}, buf_dualtag_0}; // @[el2_lsu_bus_buffer.scala 487:94]
+  wire  _T_3496 = io_lsu_axi_rid == _GEN_388; // @[el2_lsu_bus_buffer.scala 487:94]
+  wire  _T_3497 = _T_3495 & _T_3496; // @[el2_lsu_bus_buffer.scala 487:74]
+  wire  _T_3498 = _T_3490 | _T_3497; // @[el2_lsu_bus_buffer.scala 486:71]
+  wire  _T_3499 = bus_rsp_read & _T_3498; // @[el2_lsu_bus_buffer.scala 485:25]
+  wire  _T_3500 = _T_3485 | _T_3499; // @[el2_lsu_bus_buffer.scala 484:105]
+  wire  _GEN_42 = _T_3439 & _T_3500; // @[Conditional.scala 39:67]
+  wire  _GEN_61 = _T_3405 ? 1'h0 : _GEN_42; // @[Conditional.scala 39:67]
+  wire  _GEN_73 = _T_3401 ? 1'h0 : _GEN_61; // @[Conditional.scala 39:67]
+  wire  buf_resp_state_bus_en_0 = _T_3378 ? 1'h0 : _GEN_73; // @[Conditional.scala 40:58]
+  wire  _T_3526 = 3'h4 == buf_state_0; // @[Conditional.scala 37:30]
+  wire [3:0] _T_3536 = buf_ldfwd >> buf_dualtag_0; // @[el2_lsu_bus_buffer.scala 499:21]
+  reg [1:0] buf_ldfwdtag_3; // @[Reg.scala 27:20]
+  reg [1:0] buf_ldfwdtag_2; // @[Reg.scala 27:20]
+  reg [1:0] buf_ldfwdtag_1; // @[Reg.scala 27:20]
+  wire [1:0] _GEN_23 = 2'h1 == buf_dualtag_0 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [1:0] _GEN_24 = 2'h2 == buf_dualtag_0 ? buf_ldfwdtag_2 : _GEN_23; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [1:0] _GEN_25 = 2'h3 == buf_dualtag_0 ? buf_ldfwdtag_3 : _GEN_24; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [2:0] _GEN_390 = {{1'd0}, _GEN_25}; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire  _T_3538 = io_lsu_axi_rid == _GEN_390; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire  _T_3539 = _T_3536[0] & _T_3538; // @[el2_lsu_bus_buffer.scala 499:38]
+  wire  _T_3540 = _T_3496 | _T_3539; // @[el2_lsu_bus_buffer.scala 498:95]
+  wire  _T_3541 = bus_rsp_read & _T_3540; // @[el2_lsu_bus_buffer.scala 498:45]
+  wire  _GEN_36 = _T_3526 & _T_3541; // @[Conditional.scala 39:67]
+  wire  _GEN_43 = _T_3439 ? buf_resp_state_bus_en_0 : _GEN_36; // @[Conditional.scala 39:67]
+  wire  _GEN_53 = _T_3405 ? buf_cmd_state_bus_en_0 : _GEN_43; // @[Conditional.scala 39:67]
+  wire  _GEN_66 = _T_3401 ? 1'h0 : _GEN_53; // @[Conditional.scala 39:67]
+  wire  buf_state_bus_en_0 = _T_3378 ? 1'h0 : _GEN_66; // @[Conditional.scala 40:58]
+  wire  _T_3418 = buf_state_bus_en_0 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 472:49]
+  wire  _T_3419 = _T_3418 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 472:70]
+  wire  _T_3544 = 3'h5 == buf_state_0; // @[Conditional.scala 37:30]
+  wire  _T_3547 = RspPtr == 2'h0; // @[el2_lsu_bus_buffer.scala 504:37]
+  wire  _T_3548 = buf_dualtag_0 == RspPtr; // @[el2_lsu_bus_buffer.scala 504:98]
+  wire  _T_3549 = buf_dual_0 & _T_3548; // @[el2_lsu_bus_buffer.scala 504:80]
+  wire  _T_3550 = _T_3547 | _T_3549; // @[el2_lsu_bus_buffer.scala 504:65]
+  wire  _T_3551 = _T_3550 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 504:112]
+  wire  _T_3552 = 3'h6 == buf_state_0; // @[Conditional.scala 37:30]
+  wire  _GEN_31 = _T_3544 ? _T_3551 : _T_3552; // @[Conditional.scala 39:67]
+  wire  _GEN_37 = _T_3526 ? _T_3419 : _GEN_31; // @[Conditional.scala 39:67]
+  wire  _GEN_44 = _T_3439 ? _T_3419 : _GEN_37; // @[Conditional.scala 39:67]
+  wire  _GEN_54 = _T_3405 ? _T_3419 : _GEN_44; // @[Conditional.scala 39:67]
+  wire  _GEN_64 = _T_3401 ? _T_3404 : _GEN_54; // @[Conditional.scala 39:67]
+  wire  buf_state_en_0 = _T_3378 ? _T_3394 : _GEN_64; // @[Conditional.scala 40:58]
+  wire  _T_1995 = _T_1777 & buf_state_en_0; // @[el2_lsu_bus_buffer.scala 422:94]
+  wire  _T_1996 = buf_state_0 == 3'h1; // @[el2_lsu_bus_buffer.scala 423:20]
+  wire  _T_1999 = _T_2460 & _T_4271; // @[el2_lsu_bus_buffer.scala 423:57]
+  wire  _T_2000 = _T_1996 | _T_1999; // @[el2_lsu_bus_buffer.scala 423:31]
+  wire  _T_2001 = ibuf_drain_vld & io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 424:23]
+  wire  _T_2003 = _T_2001 & _T_3382; // @[el2_lsu_bus_buffer.scala 424:41]
+  wire  _T_2005 = _T_2003 & _T_1780; // @[el2_lsu_bus_buffer.scala 424:71]
+  wire  _T_2007 = _T_2005 & _T_1778; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2008 = _T_2000 | _T_2007; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2009 = ibuf_byp & io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 425:17]
+  wire  _T_2010 = _T_2009 & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 425:35]
+  wire  _T_2012 = _T_2010 & _T_1783; // @[el2_lsu_bus_buffer.scala 425:52]
+  wire  _T_2014 = _T_2012 & _T_1780; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2015 = _T_2008 | _T_2014; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2016 = _T_1995 & _T_2015; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2018 = _T_2016 | buf_age_0[0]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2021 = buf_state_1 == 3'h1; // @[el2_lsu_bus_buffer.scala 423:20]
+  wire  _T_2024 = _T_2464 & _T_4277; // @[el2_lsu_bus_buffer.scala 423:57]
+  wire  _T_2025 = _T_2021 | _T_2024; // @[el2_lsu_bus_buffer.scala 423:31]
+  wire  _T_2032 = _T_2005 & _T_1789; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2033 = _T_2025 | _T_2032; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2039 = _T_2012 & _T_1791; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2040 = _T_2033 | _T_2039; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2041 = _T_1995 & _T_2040; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2043 = _T_2041 | buf_age_0[1]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2046 = buf_state_2 == 3'h1; // @[el2_lsu_bus_buffer.scala 423:20]
+  wire  _T_2049 = _T_2468 & _T_4283; // @[el2_lsu_bus_buffer.scala 423:57]
+  wire  _T_2050 = _T_2046 | _T_2049; // @[el2_lsu_bus_buffer.scala 423:31]
+  wire  _T_2057 = _T_2005 & _T_1800; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2058 = _T_2050 | _T_2057; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2064 = _T_2012 & _T_1802; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2065 = _T_2058 | _T_2064; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2066 = _T_1995 & _T_2065; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2068 = _T_2066 | buf_age_0[2]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2071 = buf_state_3 == 3'h1; // @[el2_lsu_bus_buffer.scala 423:20]
+  wire  _T_2074 = _T_2472 & _T_4289; // @[el2_lsu_bus_buffer.scala 423:57]
+  wire  _T_2075 = _T_2071 | _T_2074; // @[el2_lsu_bus_buffer.scala 423:31]
+  wire  _T_2082 = _T_2005 & _T_1811; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2083 = _T_2075 | _T_2082; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2089 = _T_2012 & _T_1813; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2090 = _T_2083 | _T_2089; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2091 = _T_1995 & _T_2090; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2093 = _T_2091 | buf_age_0[3]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire [2:0] _T_2095 = {_T_2093,_T_2068,_T_2043}; // @[Cat.scala 29:58]
+  wire  _T_3578 = 2'h1 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 459:117]
+  wire  _T_3579 = _T_3384 & _T_3578; // @[el2_lsu_bus_buffer.scala 459:112]
+  wire  _T_3581 = 2'h1 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 459:166]
+  wire  _T_3582 = _T_3387 & _T_3581; // @[el2_lsu_bus_buffer.scala 459:161]
+  wire  _T_3583 = _T_3579 | _T_3582; // @[el2_lsu_bus_buffer.scala 459:132]
+  wire  _T_3584 = _T_766 & _T_3583; // @[el2_lsu_bus_buffer.scala 459:63]
+  wire  _T_3585 = 2'h1 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 459:206]
+  wire  _T_3586 = ibuf_drain_vld & _T_3585; // @[el2_lsu_bus_buffer.scala 459:201]
+  wire  _T_3587 = _T_3584 | _T_3586; // @[el2_lsu_bus_buffer.scala 459:183]
+  wire  _T_3632 = 3'h3 == buf_state_1; // @[Conditional.scala 37:30]
+  wire  _T_3677 = io_lsu_axi_bid == 3'h1; // @[el2_lsu_bus_buffer.scala 484:73]
+  wire  _T_3678 = bus_rsp_write & _T_3677; // @[el2_lsu_bus_buffer.scala 484:52]
+  wire  _T_3679 = io_lsu_axi_rid == 3'h1; // @[el2_lsu_bus_buffer.scala 485:46]
+  wire [2:0] _GEN_391 = {{1'd0}, buf_ldfwdtag_1}; // @[el2_lsu_bus_buffer.scala 486:47]
+  wire  _T_3681 = io_lsu_axi_rid == _GEN_391; // @[el2_lsu_bus_buffer.scala 486:47]
+  wire  _T_3682 = buf_ldfwd[1] & _T_3681; // @[el2_lsu_bus_buffer.scala 486:27]
+  wire  _T_3683 = _T_3679 | _T_3682; // @[el2_lsu_bus_buffer.scala 485:77]
+  wire  _T_3684 = buf_dual_1 & buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 487:26]
+  wire  _T_3686 = ~buf_write[1]; // @[el2_lsu_bus_buffer.scala 487:44]
+  wire  _T_3687 = _T_3684 & _T_3686; // @[el2_lsu_bus_buffer.scala 487:42]
+  wire  _T_3688 = _T_3687 & buf_samedw_1; // @[el2_lsu_bus_buffer.scala 487:58]
+  reg [1:0] buf_dualtag_1; // @[Reg.scala 27:20]
+  wire [2:0] _GEN_392 = {{1'd0}, buf_dualtag_1}; // @[el2_lsu_bus_buffer.scala 487:94]
+  wire  _T_3689 = io_lsu_axi_rid == _GEN_392; // @[el2_lsu_bus_buffer.scala 487:94]
+  wire  _T_3690 = _T_3688 & _T_3689; // @[el2_lsu_bus_buffer.scala 487:74]
+  wire  _T_3691 = _T_3683 | _T_3690; // @[el2_lsu_bus_buffer.scala 486:71]
+  wire  _T_3692 = bus_rsp_read & _T_3691; // @[el2_lsu_bus_buffer.scala 485:25]
+  wire  _T_3693 = _T_3678 | _T_3692; // @[el2_lsu_bus_buffer.scala 484:105]
+  wire  _GEN_118 = _T_3632 & _T_3693; // @[Conditional.scala 39:67]
+  wire  _GEN_137 = _T_3598 ? 1'h0 : _GEN_118; // @[Conditional.scala 39:67]
+  wire  _GEN_149 = _T_3594 ? 1'h0 : _GEN_137; // @[Conditional.scala 39:67]
+  wire  buf_resp_state_bus_en_1 = _T_3571 ? 1'h0 : _GEN_149; // @[Conditional.scala 40:58]
+  wire  _T_3719 = 3'h4 == buf_state_1; // @[Conditional.scala 37:30]
+  wire [3:0] _T_3729 = buf_ldfwd >> buf_dualtag_1; // @[el2_lsu_bus_buffer.scala 499:21]
+  wire [1:0] _GEN_99 = 2'h1 == buf_dualtag_1 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [1:0] _GEN_100 = 2'h2 == buf_dualtag_1 ? buf_ldfwdtag_2 : _GEN_99; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [1:0] _GEN_101 = 2'h3 == buf_dualtag_1 ? buf_ldfwdtag_3 : _GEN_100; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [2:0] _GEN_394 = {{1'd0}, _GEN_101}; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire  _T_3731 = io_lsu_axi_rid == _GEN_394; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire  _T_3732 = _T_3729[0] & _T_3731; // @[el2_lsu_bus_buffer.scala 499:38]
+  wire  _T_3733 = _T_3689 | _T_3732; // @[el2_lsu_bus_buffer.scala 498:95]
+  wire  _T_3734 = bus_rsp_read & _T_3733; // @[el2_lsu_bus_buffer.scala 498:45]
+  wire  _GEN_112 = _T_3719 & _T_3734; // @[Conditional.scala 39:67]
+  wire  _GEN_119 = _T_3632 ? buf_resp_state_bus_en_1 : _GEN_112; // @[Conditional.scala 39:67]
+  wire  _GEN_129 = _T_3598 ? buf_cmd_state_bus_en_1 : _GEN_119; // @[Conditional.scala 39:67]
+  wire  _GEN_142 = _T_3594 ? 1'h0 : _GEN_129; // @[Conditional.scala 39:67]
+  wire  buf_state_bus_en_1 = _T_3571 ? 1'h0 : _GEN_142; // @[Conditional.scala 40:58]
+  wire  _T_3611 = buf_state_bus_en_1 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 472:49]
+  wire  _T_3612 = _T_3611 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 472:70]
+  wire  _T_3737 = 3'h5 == buf_state_1; // @[Conditional.scala 37:30]
+  wire  _T_3740 = RspPtr == 2'h1; // @[el2_lsu_bus_buffer.scala 504:37]
+  wire  _T_3741 = buf_dualtag_1 == RspPtr; // @[el2_lsu_bus_buffer.scala 504:98]
+  wire  _T_3742 = buf_dual_1 & _T_3741; // @[el2_lsu_bus_buffer.scala 504:80]
+  wire  _T_3743 = _T_3740 | _T_3742; // @[el2_lsu_bus_buffer.scala 504:65]
+  wire  _T_3744 = _T_3743 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 504:112]
+  wire  _T_3745 = 3'h6 == buf_state_1; // @[Conditional.scala 37:30]
+  wire  _GEN_107 = _T_3737 ? _T_3744 : _T_3745; // @[Conditional.scala 39:67]
+  wire  _GEN_113 = _T_3719 ? _T_3612 : _GEN_107; // @[Conditional.scala 39:67]
+  wire  _GEN_120 = _T_3632 ? _T_3612 : _GEN_113; // @[Conditional.scala 39:67]
+  wire  _GEN_130 = _T_3598 ? _T_3612 : _GEN_120; // @[Conditional.scala 39:67]
+  wire  _GEN_140 = _T_3594 ? _T_3404 : _GEN_130; // @[Conditional.scala 39:67]
+  wire  buf_state_en_1 = _T_3571 ? _T_3587 : _GEN_140; // @[Conditional.scala 40:58]
+  wire  _T_2097 = _T_1788 & buf_state_en_1; // @[el2_lsu_bus_buffer.scala 422:94]
+  wire  _T_2107 = _T_2003 & _T_1791; // @[el2_lsu_bus_buffer.scala 424:71]
+  wire  _T_2109 = _T_2107 & _T_1778; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2110 = _T_2000 | _T_2109; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2114 = _T_2010 & _T_1794; // @[el2_lsu_bus_buffer.scala 425:52]
+  wire  _T_2116 = _T_2114 & _T_1780; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2117 = _T_2110 | _T_2116; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2118 = _T_2097 & _T_2117; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2120 = _T_2118 | buf_age_1[0]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2134 = _T_2107 & _T_1789; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2135 = _T_2025 | _T_2134; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2141 = _T_2114 & _T_1791; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2142 = _T_2135 | _T_2141; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2143 = _T_2097 & _T_2142; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2145 = _T_2143 | buf_age_1[1]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2159 = _T_2107 & _T_1800; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2160 = _T_2050 | _T_2159; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2166 = _T_2114 & _T_1802; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2167 = _T_2160 | _T_2166; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2168 = _T_2097 & _T_2167; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2170 = _T_2168 | buf_age_1[2]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2184 = _T_2107 & _T_1811; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2185 = _T_2075 | _T_2184; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2191 = _T_2114 & _T_1813; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2192 = _T_2185 | _T_2191; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2193 = _T_2097 & _T_2192; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2195 = _T_2193 | buf_age_1[3]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire [2:0] _T_2197 = {_T_2195,_T_2170,_T_2145}; // @[Cat.scala 29:58]
+  wire  _T_3771 = 2'h2 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 459:117]
+  wire  _T_3772 = _T_3384 & _T_3771; // @[el2_lsu_bus_buffer.scala 459:112]
+  wire  _T_3774 = 2'h2 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 459:166]
+  wire  _T_3775 = _T_3387 & _T_3774; // @[el2_lsu_bus_buffer.scala 459:161]
+  wire  _T_3776 = _T_3772 | _T_3775; // @[el2_lsu_bus_buffer.scala 459:132]
+  wire  _T_3777 = _T_766 & _T_3776; // @[el2_lsu_bus_buffer.scala 459:63]
+  wire  _T_3778 = 2'h2 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 459:206]
+  wire  _T_3779 = ibuf_drain_vld & _T_3778; // @[el2_lsu_bus_buffer.scala 459:201]
+  wire  _T_3780 = _T_3777 | _T_3779; // @[el2_lsu_bus_buffer.scala 459:183]
+  wire  _T_3825 = 3'h3 == buf_state_2; // @[Conditional.scala 37:30]
+  wire  _T_3870 = io_lsu_axi_bid == 3'h2; // @[el2_lsu_bus_buffer.scala 484:73]
+  wire  _T_3871 = bus_rsp_write & _T_3870; // @[el2_lsu_bus_buffer.scala 484:52]
+  wire  _T_3872 = io_lsu_axi_rid == 3'h2; // @[el2_lsu_bus_buffer.scala 485:46]
+  wire [2:0] _GEN_395 = {{1'd0}, buf_ldfwdtag_2}; // @[el2_lsu_bus_buffer.scala 486:47]
+  wire  _T_3874 = io_lsu_axi_rid == _GEN_395; // @[el2_lsu_bus_buffer.scala 486:47]
+  wire  _T_3875 = buf_ldfwd[2] & _T_3874; // @[el2_lsu_bus_buffer.scala 486:27]
+  wire  _T_3876 = _T_3872 | _T_3875; // @[el2_lsu_bus_buffer.scala 485:77]
+  wire  _T_3877 = buf_dual_2 & buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 487:26]
+  wire  _T_3879 = ~buf_write[2]; // @[el2_lsu_bus_buffer.scala 487:44]
+  wire  _T_3880 = _T_3877 & _T_3879; // @[el2_lsu_bus_buffer.scala 487:42]
+  wire  _T_3881 = _T_3880 & buf_samedw_2; // @[el2_lsu_bus_buffer.scala 487:58]
+  reg [1:0] buf_dualtag_2; // @[Reg.scala 27:20]
+  wire [2:0] _GEN_396 = {{1'd0}, buf_dualtag_2}; // @[el2_lsu_bus_buffer.scala 487:94]
+  wire  _T_3882 = io_lsu_axi_rid == _GEN_396; // @[el2_lsu_bus_buffer.scala 487:94]
+  wire  _T_3883 = _T_3881 & _T_3882; // @[el2_lsu_bus_buffer.scala 487:74]
+  wire  _T_3884 = _T_3876 | _T_3883; // @[el2_lsu_bus_buffer.scala 486:71]
+  wire  _T_3885 = bus_rsp_read & _T_3884; // @[el2_lsu_bus_buffer.scala 485:25]
+  wire  _T_3886 = _T_3871 | _T_3885; // @[el2_lsu_bus_buffer.scala 484:105]
+  wire  _GEN_194 = _T_3825 & _T_3886; // @[Conditional.scala 39:67]
+  wire  _GEN_213 = _T_3791 ? 1'h0 : _GEN_194; // @[Conditional.scala 39:67]
+  wire  _GEN_225 = _T_3787 ? 1'h0 : _GEN_213; // @[Conditional.scala 39:67]
+  wire  buf_resp_state_bus_en_2 = _T_3764 ? 1'h0 : _GEN_225; // @[Conditional.scala 40:58]
+  wire  _T_3912 = 3'h4 == buf_state_2; // @[Conditional.scala 37:30]
+  wire [3:0] _T_3922 = buf_ldfwd >> buf_dualtag_2; // @[el2_lsu_bus_buffer.scala 499:21]
+  wire [1:0] _GEN_175 = 2'h1 == buf_dualtag_2 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [1:0] _GEN_176 = 2'h2 == buf_dualtag_2 ? buf_ldfwdtag_2 : _GEN_175; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [1:0] _GEN_177 = 2'h3 == buf_dualtag_2 ? buf_ldfwdtag_3 : _GEN_176; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [2:0] _GEN_398 = {{1'd0}, _GEN_177}; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire  _T_3924 = io_lsu_axi_rid == _GEN_398; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire  _T_3925 = _T_3922[0] & _T_3924; // @[el2_lsu_bus_buffer.scala 499:38]
+  wire  _T_3926 = _T_3882 | _T_3925; // @[el2_lsu_bus_buffer.scala 498:95]
+  wire  _T_3927 = bus_rsp_read & _T_3926; // @[el2_lsu_bus_buffer.scala 498:45]
+  wire  _GEN_188 = _T_3912 & _T_3927; // @[Conditional.scala 39:67]
+  wire  _GEN_195 = _T_3825 ? buf_resp_state_bus_en_2 : _GEN_188; // @[Conditional.scala 39:67]
+  wire  _GEN_205 = _T_3791 ? buf_cmd_state_bus_en_2 : _GEN_195; // @[Conditional.scala 39:67]
+  wire  _GEN_218 = _T_3787 ? 1'h0 : _GEN_205; // @[Conditional.scala 39:67]
+  wire  buf_state_bus_en_2 = _T_3764 ? 1'h0 : _GEN_218; // @[Conditional.scala 40:58]
+  wire  _T_3804 = buf_state_bus_en_2 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 472:49]
+  wire  _T_3805 = _T_3804 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 472:70]
+  wire  _T_3930 = 3'h5 == buf_state_2; // @[Conditional.scala 37:30]
+  wire  _T_3933 = RspPtr == 2'h2; // @[el2_lsu_bus_buffer.scala 504:37]
+  wire  _T_3934 = buf_dualtag_2 == RspPtr; // @[el2_lsu_bus_buffer.scala 504:98]
+  wire  _T_3935 = buf_dual_2 & _T_3934; // @[el2_lsu_bus_buffer.scala 504:80]
+  wire  _T_3936 = _T_3933 | _T_3935; // @[el2_lsu_bus_buffer.scala 504:65]
+  wire  _T_3937 = _T_3936 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 504:112]
+  wire  _T_3938 = 3'h6 == buf_state_2; // @[Conditional.scala 37:30]
+  wire  _GEN_183 = _T_3930 ? _T_3937 : _T_3938; // @[Conditional.scala 39:67]
+  wire  _GEN_189 = _T_3912 ? _T_3805 : _GEN_183; // @[Conditional.scala 39:67]
+  wire  _GEN_196 = _T_3825 ? _T_3805 : _GEN_189; // @[Conditional.scala 39:67]
+  wire  _GEN_206 = _T_3791 ? _T_3805 : _GEN_196; // @[Conditional.scala 39:67]
+  wire  _GEN_216 = _T_3787 ? _T_3404 : _GEN_206; // @[Conditional.scala 39:67]
+  wire  buf_state_en_2 = _T_3764 ? _T_3780 : _GEN_216; // @[Conditional.scala 40:58]
+  wire  _T_2199 = _T_1799 & buf_state_en_2; // @[el2_lsu_bus_buffer.scala 422:94]
+  wire  _T_2209 = _T_2003 & _T_1802; // @[el2_lsu_bus_buffer.scala 424:71]
+  wire  _T_2211 = _T_2209 & _T_1778; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2212 = _T_2000 | _T_2211; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2216 = _T_2010 & _T_1805; // @[el2_lsu_bus_buffer.scala 425:52]
+  wire  _T_2218 = _T_2216 & _T_1780; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2219 = _T_2212 | _T_2218; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2220 = _T_2199 & _T_2219; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2222 = _T_2220 | buf_age_2[0]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2236 = _T_2209 & _T_1789; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2237 = _T_2025 | _T_2236; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2243 = _T_2216 & _T_1791; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2244 = _T_2237 | _T_2243; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2245 = _T_2199 & _T_2244; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2247 = _T_2245 | buf_age_2[1]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2261 = _T_2209 & _T_1800; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2262 = _T_2050 | _T_2261; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2268 = _T_2216 & _T_1802; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2269 = _T_2262 | _T_2268; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2270 = _T_2199 & _T_2269; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2272 = _T_2270 | buf_age_2[2]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2286 = _T_2209 & _T_1811; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2287 = _T_2075 | _T_2286; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2293 = _T_2216 & _T_1813; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2294 = _T_2287 | _T_2293; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2295 = _T_2199 & _T_2294; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2297 = _T_2295 | buf_age_2[3]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire [2:0] _T_2299 = {_T_2297,_T_2272,_T_2247}; // @[Cat.scala 29:58]
+  wire  _T_3964 = 2'h3 == WrPtr0_r; // @[el2_lsu_bus_buffer.scala 459:117]
+  wire  _T_3965 = _T_3384 & _T_3964; // @[el2_lsu_bus_buffer.scala 459:112]
+  wire  _T_3967 = 2'h3 == WrPtr1_r; // @[el2_lsu_bus_buffer.scala 459:166]
+  wire  _T_3968 = _T_3387 & _T_3967; // @[el2_lsu_bus_buffer.scala 459:161]
+  wire  _T_3969 = _T_3965 | _T_3968; // @[el2_lsu_bus_buffer.scala 459:132]
+  wire  _T_3970 = _T_766 & _T_3969; // @[el2_lsu_bus_buffer.scala 459:63]
+  wire  _T_3971 = 2'h3 == ibuf_tag; // @[el2_lsu_bus_buffer.scala 459:206]
+  wire  _T_3972 = ibuf_drain_vld & _T_3971; // @[el2_lsu_bus_buffer.scala 459:201]
+  wire  _T_3973 = _T_3970 | _T_3972; // @[el2_lsu_bus_buffer.scala 459:183]
+  wire  _T_4018 = 3'h3 == buf_state_3; // @[Conditional.scala 37:30]
+  wire  _T_4063 = io_lsu_axi_bid == 3'h3; // @[el2_lsu_bus_buffer.scala 484:73]
+  wire  _T_4064 = bus_rsp_write & _T_4063; // @[el2_lsu_bus_buffer.scala 484:52]
+  wire  _T_4065 = io_lsu_axi_rid == 3'h3; // @[el2_lsu_bus_buffer.scala 485:46]
+  wire [2:0] _GEN_399 = {{1'd0}, buf_ldfwdtag_3}; // @[el2_lsu_bus_buffer.scala 486:47]
+  wire  _T_4067 = io_lsu_axi_rid == _GEN_399; // @[el2_lsu_bus_buffer.scala 486:47]
+  wire  _T_4068 = buf_ldfwd[3] & _T_4067; // @[el2_lsu_bus_buffer.scala 486:27]
+  wire  _T_4069 = _T_4065 | _T_4068; // @[el2_lsu_bus_buffer.scala 485:77]
+  wire  _T_4070 = buf_dual_3 & buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 487:26]
+  wire  _T_4072 = ~buf_write[3]; // @[el2_lsu_bus_buffer.scala 487:44]
+  wire  _T_4073 = _T_4070 & _T_4072; // @[el2_lsu_bus_buffer.scala 487:42]
+  wire  _T_4074 = _T_4073 & buf_samedw_3; // @[el2_lsu_bus_buffer.scala 487:58]
+  reg [1:0] buf_dualtag_3; // @[Reg.scala 27:20]
+  wire [2:0] _GEN_400 = {{1'd0}, buf_dualtag_3}; // @[el2_lsu_bus_buffer.scala 487:94]
+  wire  _T_4075 = io_lsu_axi_rid == _GEN_400; // @[el2_lsu_bus_buffer.scala 487:94]
+  wire  _T_4076 = _T_4074 & _T_4075; // @[el2_lsu_bus_buffer.scala 487:74]
+  wire  _T_4077 = _T_4069 | _T_4076; // @[el2_lsu_bus_buffer.scala 486:71]
+  wire  _T_4078 = bus_rsp_read & _T_4077; // @[el2_lsu_bus_buffer.scala 485:25]
+  wire  _T_4079 = _T_4064 | _T_4078; // @[el2_lsu_bus_buffer.scala 484:105]
+  wire  _GEN_270 = _T_4018 & _T_4079; // @[Conditional.scala 39:67]
+  wire  _GEN_289 = _T_3984 ? 1'h0 : _GEN_270; // @[Conditional.scala 39:67]
+  wire  _GEN_301 = _T_3980 ? 1'h0 : _GEN_289; // @[Conditional.scala 39:67]
+  wire  buf_resp_state_bus_en_3 = _T_3957 ? 1'h0 : _GEN_301; // @[Conditional.scala 40:58]
+  wire  _T_4105 = 3'h4 == buf_state_3; // @[Conditional.scala 37:30]
+  wire [3:0] _T_4115 = buf_ldfwd >> buf_dualtag_3; // @[el2_lsu_bus_buffer.scala 499:21]
+  wire [1:0] _GEN_251 = 2'h1 == buf_dualtag_3 ? buf_ldfwdtag_1 : buf_ldfwdtag_0; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [1:0] _GEN_252 = 2'h2 == buf_dualtag_3 ? buf_ldfwdtag_2 : _GEN_251; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [1:0] _GEN_253 = 2'h3 == buf_dualtag_3 ? buf_ldfwdtag_3 : _GEN_252; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire [2:0] _GEN_402 = {{1'd0}, _GEN_253}; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire  _T_4117 = io_lsu_axi_rid == _GEN_402; // @[el2_lsu_bus_buffer.scala 499:58]
+  wire  _T_4118 = _T_4115[0] & _T_4117; // @[el2_lsu_bus_buffer.scala 499:38]
+  wire  _T_4119 = _T_4075 | _T_4118; // @[el2_lsu_bus_buffer.scala 498:95]
+  wire  _T_4120 = bus_rsp_read & _T_4119; // @[el2_lsu_bus_buffer.scala 498:45]
+  wire  _GEN_264 = _T_4105 & _T_4120; // @[Conditional.scala 39:67]
+  wire  _GEN_271 = _T_4018 ? buf_resp_state_bus_en_3 : _GEN_264; // @[Conditional.scala 39:67]
+  wire  _GEN_281 = _T_3984 ? buf_cmd_state_bus_en_3 : _GEN_271; // @[Conditional.scala 39:67]
+  wire  _GEN_294 = _T_3980 ? 1'h0 : _GEN_281; // @[Conditional.scala 39:67]
+  wire  buf_state_bus_en_3 = _T_3957 ? 1'h0 : _GEN_294; // @[Conditional.scala 40:58]
+  wire  _T_3997 = buf_state_bus_en_3 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 472:49]
+  wire  _T_3998 = _T_3997 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 472:70]
+  wire  _T_4123 = 3'h5 == buf_state_3; // @[Conditional.scala 37:30]
+  wire  _T_4126 = RspPtr == 2'h3; // @[el2_lsu_bus_buffer.scala 504:37]
+  wire  _T_4127 = buf_dualtag_3 == RspPtr; // @[el2_lsu_bus_buffer.scala 504:98]
+  wire  _T_4128 = buf_dual_3 & _T_4127; // @[el2_lsu_bus_buffer.scala 504:80]
+  wire  _T_4129 = _T_4126 | _T_4128; // @[el2_lsu_bus_buffer.scala 504:65]
+  wire  _T_4130 = _T_4129 | io_dec_tlu_force_halt; // @[el2_lsu_bus_buffer.scala 504:112]
+  wire  _T_4131 = 3'h6 == buf_state_3; // @[Conditional.scala 37:30]
+  wire  _GEN_259 = _T_4123 ? _T_4130 : _T_4131; // @[Conditional.scala 39:67]
+  wire  _GEN_265 = _T_4105 ? _T_3998 : _GEN_259; // @[Conditional.scala 39:67]
+  wire  _GEN_272 = _T_4018 ? _T_3998 : _GEN_265; // @[Conditional.scala 39:67]
+  wire  _GEN_282 = _T_3984 ? _T_3998 : _GEN_272; // @[Conditional.scala 39:67]
+  wire  _GEN_292 = _T_3980 ? _T_3404 : _GEN_282; // @[Conditional.scala 39:67]
+  wire  buf_state_en_3 = _T_3957 ? _T_3973 : _GEN_292; // @[Conditional.scala 40:58]
+  wire  _T_2301 = _T_1810 & buf_state_en_3; // @[el2_lsu_bus_buffer.scala 422:94]
+  wire  _T_2311 = _T_2003 & _T_1813; // @[el2_lsu_bus_buffer.scala 424:71]
+  wire  _T_2313 = _T_2311 & _T_1778; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2314 = _T_2000 | _T_2313; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2318 = _T_2010 & _T_1816; // @[el2_lsu_bus_buffer.scala 425:52]
+  wire  _T_2320 = _T_2318 & _T_1780; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2321 = _T_2314 | _T_2320; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2322 = _T_2301 & _T_2321; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2324 = _T_2322 | buf_age_3[0]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2338 = _T_2311 & _T_1789; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2339 = _T_2025 | _T_2338; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2345 = _T_2318 & _T_1791; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2346 = _T_2339 | _T_2345; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2347 = _T_2301 & _T_2346; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2349 = _T_2347 | buf_age_3[1]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2363 = _T_2311 & _T_1800; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2364 = _T_2050 | _T_2363; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2370 = _T_2318 & _T_1802; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2371 = _T_2364 | _T_2370; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2372 = _T_2301 & _T_2371; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2374 = _T_2372 | buf_age_3[2]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire  _T_2388 = _T_2311 & _T_1811; // @[el2_lsu_bus_buffer.scala 424:92]
+  wire  _T_2389 = _T_2075 | _T_2388; // @[el2_lsu_bus_buffer.scala 423:86]
+  wire  _T_2395 = _T_2318 & _T_1813; // @[el2_lsu_bus_buffer.scala 425:73]
+  wire  _T_2396 = _T_2389 | _T_2395; // @[el2_lsu_bus_buffer.scala 424:114]
+  wire  _T_2397 = _T_2301 & _T_2396; // @[el2_lsu_bus_buffer.scala 422:113]
+  wire  _T_2399 = _T_2397 | buf_age_3[3]; // @[el2_lsu_bus_buffer.scala 425:97]
+  wire [2:0] _T_2401 = {_T_2399,_T_2374,_T_2349}; // @[Cat.scala 29:58]
+  wire  _T_2649 = buf_state_0 == 3'h6; // @[el2_lsu_bus_buffer.scala 433:49]
+  wire  _T_2650 = _T_1777 | _T_2649; // @[el2_lsu_bus_buffer.scala 433:34]
+  wire  _T_2651 = ~_T_2650; // @[el2_lsu_bus_buffer.scala 433:8]
+  wire  _T_2659 = _T_2651 | _T_2007; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2666 = _T_2659 | _T_2014; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2667 = _T_1995 & _T_2666; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2671 = buf_state_1 == 3'h6; // @[el2_lsu_bus_buffer.scala 433:49]
+  wire  _T_2672 = _T_1788 | _T_2671; // @[el2_lsu_bus_buffer.scala 433:34]
+  wire  _T_2673 = ~_T_2672; // @[el2_lsu_bus_buffer.scala 433:8]
+  wire  _T_2681 = _T_2673 | _T_2032; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2688 = _T_2681 | _T_2039; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2689 = _T_1995 & _T_2688; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2693 = buf_state_2 == 3'h6; // @[el2_lsu_bus_buffer.scala 433:49]
+  wire  _T_2694 = _T_1799 | _T_2693; // @[el2_lsu_bus_buffer.scala 433:34]
+  wire  _T_2695 = ~_T_2694; // @[el2_lsu_bus_buffer.scala 433:8]
+  wire  _T_2703 = _T_2695 | _T_2057; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2710 = _T_2703 | _T_2064; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2711 = _T_1995 & _T_2710; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2715 = buf_state_3 == 3'h6; // @[el2_lsu_bus_buffer.scala 433:49]
+  wire  _T_2716 = _T_1810 | _T_2715; // @[el2_lsu_bus_buffer.scala 433:34]
+  wire  _T_2717 = ~_T_2716; // @[el2_lsu_bus_buffer.scala 433:8]
+  wire  _T_2725 = _T_2717 | _T_2082; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2732 = _T_2725 | _T_2089; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2733 = _T_1995 & _T_2732; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire [3:0] buf_rspage_set_0 = {_T_2733,_T_2711,_T_2689,_T_2667}; // @[Cat.scala 29:58]
+  wire  _T_2750 = _T_2651 | _T_2109; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2757 = _T_2750 | _T_2116; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2758 = _T_2097 & _T_2757; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2772 = _T_2673 | _T_2134; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2779 = _T_2772 | _T_2141; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2780 = _T_2097 & _T_2779; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2794 = _T_2695 | _T_2159; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2801 = _T_2794 | _T_2166; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2802 = _T_2097 & _T_2801; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2816 = _T_2717 | _T_2184; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2823 = _T_2816 | _T_2191; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2824 = _T_2097 & _T_2823; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire [3:0] buf_rspage_set_1 = {_T_2824,_T_2802,_T_2780,_T_2758}; // @[Cat.scala 29:58]
+  wire  _T_2841 = _T_2651 | _T_2211; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2848 = _T_2841 | _T_2218; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2849 = _T_2199 & _T_2848; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2863 = _T_2673 | _T_2236; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2870 = _T_2863 | _T_2243; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2871 = _T_2199 & _T_2870; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2885 = _T_2695 | _T_2261; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2892 = _T_2885 | _T_2268; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2893 = _T_2199 & _T_2892; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2907 = _T_2717 | _T_2286; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2914 = _T_2907 | _T_2293; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2915 = _T_2199 & _T_2914; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire [3:0] buf_rspage_set_2 = {_T_2915,_T_2893,_T_2871,_T_2849}; // @[Cat.scala 29:58]
+  wire  _T_2932 = _T_2651 | _T_2313; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2939 = _T_2932 | _T_2320; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2940 = _T_2301 & _T_2939; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2954 = _T_2673 | _T_2338; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2961 = _T_2954 | _T_2345; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2962 = _T_2301 & _T_2961; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2976 = _T_2695 | _T_2363; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_2983 = _T_2976 | _T_2370; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_2984 = _T_2301 & _T_2983; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire  _T_2998 = _T_2717 | _T_2388; // @[el2_lsu_bus_buffer.scala 433:61]
+  wire  _T_3005 = _T_2998 | _T_2395; // @[el2_lsu_bus_buffer.scala 434:112]
+  wire  _T_3006 = _T_2301 & _T_3005; // @[el2_lsu_bus_buffer.scala 432:114]
+  wire [3:0] buf_rspage_set_3 = {_T_3006,_T_2984,_T_2962,_T_2940}; // @[Cat.scala 29:58]
+  wire  _T_3091 = _T_2715 | _T_1810; // @[el2_lsu_bus_buffer.scala 437:112]
+  wire  _T_3092 = ~_T_3091; // @[el2_lsu_bus_buffer.scala 437:86]
+  wire  _T_3093 = buf_rspageQ_0[3] & _T_3092; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3085 = _T_2693 | _T_1799; // @[el2_lsu_bus_buffer.scala 437:112]
+  wire  _T_3086 = ~_T_3085; // @[el2_lsu_bus_buffer.scala 437:86]
+  wire  _T_3087 = buf_rspageQ_0[2] & _T_3086; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3079 = _T_2671 | _T_1788; // @[el2_lsu_bus_buffer.scala 437:112]
+  wire  _T_3080 = ~_T_3079; // @[el2_lsu_bus_buffer.scala 437:86]
+  wire  _T_3081 = buf_rspageQ_0[1] & _T_3080; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3073 = _T_2649 | _T_1777; // @[el2_lsu_bus_buffer.scala 437:112]
+  wire  _T_3074 = ~_T_3073; // @[el2_lsu_bus_buffer.scala 437:86]
+  wire  _T_3075 = buf_rspageQ_0[0] & _T_3074; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire [3:0] buf_rspage_0 = {_T_3093,_T_3087,_T_3081,_T_3075}; // @[Cat.scala 29:58]
+  wire  _T_3012 = buf_rspage_set_0[0] | buf_rspage_0[0]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3015 = buf_rspage_set_0[1] | buf_rspage_0[1]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3018 = buf_rspage_set_0[2] | buf_rspage_0[2]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3021 = buf_rspage_set_0[3] | buf_rspage_0[3]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire [2:0] _T_3023 = {_T_3021,_T_3018,_T_3015}; // @[Cat.scala 29:58]
+  wire  _T_3120 = buf_rspageQ_1[3] & _T_3092; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3114 = buf_rspageQ_1[2] & _T_3086; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3108 = buf_rspageQ_1[1] & _T_3080; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3102 = buf_rspageQ_1[0] & _T_3074; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire [3:0] buf_rspage_1 = {_T_3120,_T_3114,_T_3108,_T_3102}; // @[Cat.scala 29:58]
+  wire  _T_3027 = buf_rspage_set_1[0] | buf_rspage_1[0]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3030 = buf_rspage_set_1[1] | buf_rspage_1[1]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3033 = buf_rspage_set_1[2] | buf_rspage_1[2]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3036 = buf_rspage_set_1[3] | buf_rspage_1[3]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire [2:0] _T_3038 = {_T_3036,_T_3033,_T_3030}; // @[Cat.scala 29:58]
+  wire  _T_3147 = buf_rspageQ_2[3] & _T_3092; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3141 = buf_rspageQ_2[2] & _T_3086; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3135 = buf_rspageQ_2[1] & _T_3080; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3129 = buf_rspageQ_2[0] & _T_3074; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire [3:0] buf_rspage_2 = {_T_3147,_T_3141,_T_3135,_T_3129}; // @[Cat.scala 29:58]
+  wire  _T_3042 = buf_rspage_set_2[0] | buf_rspage_2[0]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3045 = buf_rspage_set_2[1] | buf_rspage_2[1]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3048 = buf_rspage_set_2[2] | buf_rspage_2[2]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3051 = buf_rspage_set_2[3] | buf_rspage_2[3]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire [2:0] _T_3053 = {_T_3051,_T_3048,_T_3045}; // @[Cat.scala 29:58]
+  wire  _T_3174 = buf_rspageQ_3[3] & _T_3092; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3168 = buf_rspageQ_3[2] & _T_3086; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3162 = buf_rspageQ_3[1] & _T_3080; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire  _T_3156 = buf_rspageQ_3[0] & _T_3074; // @[el2_lsu_bus_buffer.scala 437:84]
+  wire [3:0] buf_rspage_3 = {_T_3174,_T_3168,_T_3162,_T_3156}; // @[Cat.scala 29:58]
+  wire  _T_3057 = buf_rspage_set_3[0] | buf_rspage_3[0]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3060 = buf_rspage_set_3[1] | buf_rspage_3[1]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3063 = buf_rspage_set_3[2] | buf_rspage_3[2]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire  _T_3066 = buf_rspage_set_3[3] | buf_rspage_3[3]; // @[el2_lsu_bus_buffer.scala 436:90]
+  wire [2:0] _T_3068 = {_T_3066,_T_3063,_T_3060}; // @[Cat.scala 29:58]
+  wire  _T_3179 = ibuf_drain_vld & _T_1778; // @[el2_lsu_bus_buffer.scala 442:65]
+  wire  _T_3181 = ibuf_drain_vld & _T_1789; // @[el2_lsu_bus_buffer.scala 442:65]
+  wire  _T_3183 = ibuf_drain_vld & _T_1800; // @[el2_lsu_bus_buffer.scala 442:65]
+  wire  _T_3185 = ibuf_drain_vld & _T_1811; // @[el2_lsu_bus_buffer.scala 442:65]
+  wire [3:0] ibuf_drainvec_vld = {_T_3185,_T_3183,_T_3181,_T_3179}; // @[Cat.scala 29:58]
+  wire  _T_3193 = _T_3387 & _T_1783; // @[el2_lsu_bus_buffer.scala 443:123]
+  wire [3:0] _T_3196 = _T_3193 ? ldst_byteen_hi_r : ldst_byteen_lo_r; // @[el2_lsu_bus_buffer.scala 443:96]
+  wire [3:0] _T_3197 = ibuf_drainvec_vld[0] ? ibuf_byteen_out : _T_3196; // @[el2_lsu_bus_buffer.scala 443:48]
+  wire  _T_3202 = _T_3387 & _T_1794; // @[el2_lsu_bus_buffer.scala 443:123]
+  wire [3:0] _T_3205 = _T_3202 ? ldst_byteen_hi_r : ldst_byteen_lo_r; // @[el2_lsu_bus_buffer.scala 443:96]
+  wire [3:0] _T_3206 = ibuf_drainvec_vld[1] ? ibuf_byteen_out : _T_3205; // @[el2_lsu_bus_buffer.scala 443:48]
+  wire  _T_3211 = _T_3387 & _T_1805; // @[el2_lsu_bus_buffer.scala 443:123]
+  wire [3:0] _T_3214 = _T_3211 ? ldst_byteen_hi_r : ldst_byteen_lo_r; // @[el2_lsu_bus_buffer.scala 443:96]
+  wire [3:0] _T_3215 = ibuf_drainvec_vld[2] ? ibuf_byteen_out : _T_3214; // @[el2_lsu_bus_buffer.scala 443:48]
+  wire  _T_3220 = _T_3387 & _T_1816; // @[el2_lsu_bus_buffer.scala 443:123]
+  wire [3:0] _T_3223 = _T_3220 ? ldst_byteen_hi_r : ldst_byteen_lo_r; // @[el2_lsu_bus_buffer.scala 443:96]
+  wire [3:0] _T_3224 = ibuf_drainvec_vld[3] ? ibuf_byteen_out : _T_3223; // @[el2_lsu_bus_buffer.scala 443:48]
+  wire  _T_3250 = ibuf_drainvec_vld[0] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 445:47]
+  wire  _T_3252 = ibuf_drainvec_vld[1] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 445:47]
+  wire  _T_3254 = ibuf_drainvec_vld[2] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 445:47]
+  wire  _T_3256 = ibuf_drainvec_vld[3] ? ibuf_dual : io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 445:47]
+  wire [3:0] buf_dual_in = {_T_3256,_T_3254,_T_3252,_T_3250}; // @[Cat.scala 29:58]
+  wire  _T_3261 = ibuf_drainvec_vld[0] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 446:49]
+  wire  _T_3263 = ibuf_drainvec_vld[1] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 446:49]
+  wire  _T_3265 = ibuf_drainvec_vld[2] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 446:49]
+  wire  _T_3267 = ibuf_drainvec_vld[3] ? ibuf_samedw : ldst_samedw_r; // @[el2_lsu_bus_buffer.scala 446:49]
+  wire [3:0] buf_samedw_in = {_T_3267,_T_3265,_T_3263,_T_3261}; // @[Cat.scala 29:58]
+  wire  _T_3272 = ibuf_nomerge | ibuf_force_drain; // @[el2_lsu_bus_buffer.scala 447:86]
+  wire  _T_3273 = ibuf_drainvec_vld[0] ? _T_3272 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 447:50]
+  wire  _T_3276 = ibuf_drainvec_vld[1] ? _T_3272 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 447:50]
+  wire  _T_3279 = ibuf_drainvec_vld[2] ? _T_3272 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 447:50]
+  wire  _T_3282 = ibuf_drainvec_vld[3] ? _T_3272 : io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 447:50]
+  wire [3:0] buf_nomerge_in = {_T_3282,_T_3279,_T_3276,_T_3273}; // @[Cat.scala 29:58]
+  wire  _T_3290 = ibuf_drainvec_vld[0] ? ibuf_dual : _T_3193; // @[el2_lsu_bus_buffer.scala 448:49]
+  wire  _T_3295 = ibuf_drainvec_vld[1] ? ibuf_dual : _T_3202; // @[el2_lsu_bus_buffer.scala 448:49]
+  wire  _T_3300 = ibuf_drainvec_vld[2] ? ibuf_dual : _T_3211; // @[el2_lsu_bus_buffer.scala 448:49]
+  wire  _T_3305 = ibuf_drainvec_vld[3] ? ibuf_dual : _T_3220; // @[el2_lsu_bus_buffer.scala 448:49]
+  wire [3:0] buf_dualhi_in = {_T_3305,_T_3300,_T_3295,_T_3290}; // @[Cat.scala 29:58]
+  wire  _T_3334 = ibuf_drainvec_vld[0] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 450:53]
+  wire  _T_3336 = ibuf_drainvec_vld[1] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 450:53]
+  wire  _T_3338 = ibuf_drainvec_vld[2] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 450:53]
+  wire  _T_3340 = ibuf_drainvec_vld[3] ? ibuf_sideeffect : io_is_sideeffects_r; // @[el2_lsu_bus_buffer.scala 450:53]
+  wire [3:0] buf_sideeffect_in = {_T_3340,_T_3338,_T_3336,_T_3334}; // @[Cat.scala 29:58]
+  wire  _T_3345 = ibuf_drainvec_vld[0] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 451:49]
+  wire  _T_3347 = ibuf_drainvec_vld[1] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 451:49]
+  wire  _T_3349 = ibuf_drainvec_vld[2] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 451:49]
+  wire  _T_3351 = ibuf_drainvec_vld[3] ? ibuf_unsign : io_lsu_pkt_r_unsign; // @[el2_lsu_bus_buffer.scala 451:49]
+  wire [3:0] buf_unsign_in = {_T_3351,_T_3349,_T_3347,_T_3345}; // @[Cat.scala 29:58]
+  wire  _T_3368 = ibuf_drainvec_vld[0] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 453:48]
+  wire  _T_3370 = ibuf_drainvec_vld[1] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 453:48]
+  wire  _T_3372 = ibuf_drainvec_vld[2] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 453:48]
+  wire  _T_3374 = ibuf_drainvec_vld[3] ? ibuf_write : io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 453:48]
+  wire [3:0] buf_write_in = {_T_3374,_T_3372,_T_3370,_T_3368}; // @[Cat.scala 29:58]
+  wire [31:0] _T_3400 = _T_3393 ? ibuf_data_out : store_data_lo_r; // @[el2_lsu_bus_buffer.scala 462:30]
+  wire  _T_3407 = obuf_nosend & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 469:89]
+  wire  _T_3409 = _T_3407 & _T_1276; // @[el2_lsu_bus_buffer.scala 469:104]
+  wire  _T_3422 = buf_state_en_0 & _T_1129; // @[el2_lsu_bus_buffer.scala 474:44]
+  wire  _T_3423 = _T_3422 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 474:60]
+  wire  _T_3425 = _T_3423 & _T_1258; // @[el2_lsu_bus_buffer.scala 474:74]
+  wire  _T_3428 = _T_3418 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 476:67]
+  wire  _T_3429 = _T_3428 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 476:81]
+  wire  _T_4723 = io_lsu_axi_bresp != 2'h0; // @[el2_lsu_bus_buffer.scala 578:58]
+  wire  bus_rsp_read_error = bus_rsp_read & _T_4723; // @[el2_lsu_bus_buffer.scala 578:38]
+  wire  _T_3432 = _T_3428 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 477:82]
+  wire [31:0] _T_3437 = buf_addr_0[2] ? io_lsu_axi_rdata[63:32] : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 478:73]
+  wire  _T_3507 = bus_rsp_read_error & _T_3486; // @[el2_lsu_bus_buffer.scala 491:91]
+  wire  _T_3509 = bus_rsp_read_error & buf_ldfwd[0]; // @[el2_lsu_bus_buffer.scala 492:31]
+  wire  _T_3511 = _T_3509 & _T_3488; // @[el2_lsu_bus_buffer.scala 492:46]
+  wire  _T_3512 = _T_3507 | _T_3511; // @[el2_lsu_bus_buffer.scala 491:143]
+  wire  bus_rsp_write_error = bus_rsp_write & _T_4723; // @[el2_lsu_bus_buffer.scala 577:40]
+  wire  _T_3515 = bus_rsp_write_error & _T_3484; // @[el2_lsu_bus_buffer.scala 493:53]
+  wire  _T_3516 = _T_3512 | _T_3515; // @[el2_lsu_bus_buffer.scala 492:88]
+  wire  _T_3517 = _T_3418 & _T_3516; // @[el2_lsu_bus_buffer.scala 491:68]
+  wire  _GEN_46 = _T_3439 & _T_3517; // @[Conditional.scala 39:67]
+  wire  _GEN_59 = _T_3405 ? _T_3432 : _GEN_46; // @[Conditional.scala 39:67]
+  wire  _GEN_71 = _T_3401 ? 1'h0 : _GEN_59; // @[Conditional.scala 39:67]
+  wire  buf_error_en_0 = _T_3378 ? 1'h0 : _GEN_71; // @[Conditional.scala 40:58]
+  wire [31:0] _T_3438 = buf_error_en_0 ? io_lsu_axi_rdata[31:0] : _T_3437; // @[el2_lsu_bus_buffer.scala 478:30]
+  wire  _T_3442 = ~bus_rsp_write_error; // @[el2_lsu_bus_buffer.scala 481:73]
+  wire  _T_3443 = buf_write[0] & _T_3442; // @[el2_lsu_bus_buffer.scala 481:71]
+  wire  _T_3444 = io_dec_tlu_force_halt | _T_3443; // @[el2_lsu_bus_buffer.scala 481:55]
+  wire  _T_3446 = ~buf_samedw_0; // @[el2_lsu_bus_buffer.scala 482:30]
+  wire  _T_3447 = buf_dual_0 & _T_3446; // @[el2_lsu_bus_buffer.scala 482:28]
+  wire  _T_3450 = _T_3447 & _T_1129; // @[el2_lsu_bus_buffer.scala 482:45]
+  wire [2:0] _GEN_19 = 2'h1 == buf_dualtag_0 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire [2:0] _GEN_20 = 2'h2 == buf_dualtag_0 ? buf_state_2 : _GEN_19; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire [2:0] _GEN_21 = 2'h3 == buf_dualtag_0 ? buf_state_3 : _GEN_20; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire  _T_3451 = _GEN_21 != 3'h4; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire  _T_3452 = _T_3450 & _T_3451; // @[el2_lsu_bus_buffer.scala 482:61]
+  wire  _T_4348 = _T_2596 | _T_2593; // @[el2_lsu_bus_buffer.scala 539:93]
+  wire  _T_4349 = _T_4348 | _T_2590; // @[el2_lsu_bus_buffer.scala 539:93]
+  wire  any_done_wait_state = _T_4349 | _T_2587; // @[el2_lsu_bus_buffer.scala 539:93]
+  wire  _T_3454 = buf_ldfwd[0] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 483:31]
+  wire  _T_3460 = buf_dualtag_0 == 2'h0; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3462 = buf_dualtag_0 == 2'h1; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3464 = buf_dualtag_0 == 2'h2; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3466 = buf_dualtag_0 == 2'h3; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3468 = _T_3460 & buf_ldfwd[0]; // @[Mux.scala 27:72]
+  wire  _T_3469 = _T_3462 & buf_ldfwd[1]; // @[Mux.scala 27:72]
+  wire  _T_3470 = _T_3464 & buf_ldfwd[2]; // @[Mux.scala 27:72]
+  wire  _T_3471 = _T_3466 & buf_ldfwd[3]; // @[Mux.scala 27:72]
+  wire  _T_3472 = _T_3468 | _T_3469; // @[Mux.scala 27:72]
+  wire  _T_3473 = _T_3472 | _T_3470; // @[Mux.scala 27:72]
+  wire  _T_3474 = _T_3473 | _T_3471; // @[Mux.scala 27:72]
+  wire  _T_3476 = _T_3450 & _T_3474; // @[el2_lsu_bus_buffer.scala 483:101]
+  wire  _T_3477 = _GEN_21 == 3'h4; // @[el2_lsu_bus_buffer.scala 483:167]
+  wire  _T_3478 = _T_3476 & _T_3477; // @[el2_lsu_bus_buffer.scala 483:138]
+  wire  _T_3479 = _T_3478 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 483:187]
+  wire  _T_3480 = _T_3454 | _T_3479; // @[el2_lsu_bus_buffer.scala 483:53]
+  wire  _T_3503 = buf_state_bus_en_0 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 490:47]
+  wire  _T_3504 = _T_3503 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 490:62]
+  wire  _T_3518 = ~buf_error_en_0; // @[el2_lsu_bus_buffer.scala 494:50]
+  wire  _T_3519 = buf_state_en_0 & _T_3518; // @[el2_lsu_bus_buffer.scala 494:48]
+  wire [31:0] _T_3525 = _T_3519 ? _T_3437 : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 494:30]
+  wire  _T_3531 = buf_ldfwd[0] | _T_3536[0]; // @[el2_lsu_bus_buffer.scala 497:90]
+  wire  _T_3532 = _T_3531 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 497:118]
+  wire  _GEN_29 = _T_3552 & buf_state_en_0; // @[Conditional.scala 39:67]
+  wire  _GEN_32 = _T_3544 ? 1'h0 : _T_3552; // @[Conditional.scala 39:67]
+  wire  _GEN_34 = _T_3544 ? 1'h0 : _GEN_29; // @[Conditional.scala 39:67]
+  wire  _GEN_38 = _T_3526 ? 1'h0 : _GEN_32; // @[Conditional.scala 39:67]
+  wire  _GEN_40 = _T_3526 ? 1'h0 : _GEN_34; // @[Conditional.scala 39:67]
+  wire  _GEN_45 = _T_3439 & _T_3504; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_47 = _T_3439 ? _T_3525 : 32'h0; // @[Conditional.scala 39:67]
+  wire  _GEN_48 = _T_3439 ? 1'h0 : _GEN_38; // @[Conditional.scala 39:67]
+  wire  _GEN_50 = _T_3439 ? 1'h0 : _GEN_40; // @[Conditional.scala 39:67]
+  wire  _GEN_56 = _T_3405 ? _T_3425 : _GEN_50; // @[Conditional.scala 39:67]
+  wire  _GEN_58 = _T_3405 ? _T_3429 : _GEN_45; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_60 = _T_3405 ? _T_3438 : _GEN_47; // @[Conditional.scala 39:67]
+  wire  _GEN_62 = _T_3405 ? 1'h0 : _GEN_48; // @[Conditional.scala 39:67]
+  wire  _GEN_68 = _T_3401 ? 1'h0 : _GEN_56; // @[Conditional.scala 39:67]
+  wire  _GEN_70 = _T_3401 ? 1'h0 : _GEN_58; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_72 = _T_3401 ? 32'h0 : _GEN_60; // @[Conditional.scala 39:67]
+  wire  _GEN_74 = _T_3401 ? 1'h0 : _GEN_62; // @[Conditional.scala 39:67]
+  wire  buf_wr_en_0 = _T_3378 & buf_state_en_0; // @[Conditional.scala 40:58]
+  wire [31:0] _GEN_79 = _T_3378 ? _T_3400 : _GEN_72; // @[Conditional.scala 40:58]
+  wire  buf_ldfwd_en_0 = _T_3378 ? 1'h0 : _GEN_68; // @[Conditional.scala 40:58]
+  wire  buf_rst_0 = _T_3378 ? 1'h0 : _GEN_74; // @[Conditional.scala 40:58]
+  wire [31:0] _T_3593 = _T_3586 ? ibuf_data_out : store_data_lo_r; // @[el2_lsu_bus_buffer.scala 462:30]
+  wire  _T_3615 = buf_state_en_1 & _T_3686; // @[el2_lsu_bus_buffer.scala 474:44]
+  wire  _T_3616 = _T_3615 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 474:60]
+  wire  _T_3618 = _T_3616 & _T_1258; // @[el2_lsu_bus_buffer.scala 474:74]
+  wire  _T_3621 = _T_3611 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 476:67]
+  wire  _T_3622 = _T_3621 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 476:81]
+  wire  _T_3625 = _T_3621 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 477:82]
+  wire [31:0] _T_3630 = buf_addr_1[2] ? io_lsu_axi_rdata[63:32] : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 478:73]
+  wire  _T_3700 = bus_rsp_read_error & _T_3679; // @[el2_lsu_bus_buffer.scala 491:91]
+  wire  _T_3702 = bus_rsp_read_error & buf_ldfwd[1]; // @[el2_lsu_bus_buffer.scala 492:31]
+  wire  _T_3704 = _T_3702 & _T_3681; // @[el2_lsu_bus_buffer.scala 492:46]
+  wire  _T_3705 = _T_3700 | _T_3704; // @[el2_lsu_bus_buffer.scala 491:143]
+  wire  _T_3708 = bus_rsp_write_error & _T_3677; // @[el2_lsu_bus_buffer.scala 493:53]
+  wire  _T_3709 = _T_3705 | _T_3708; // @[el2_lsu_bus_buffer.scala 492:88]
+  wire  _T_3710 = _T_3611 & _T_3709; // @[el2_lsu_bus_buffer.scala 491:68]
+  wire  _GEN_122 = _T_3632 & _T_3710; // @[Conditional.scala 39:67]
+  wire  _GEN_135 = _T_3598 ? _T_3625 : _GEN_122; // @[Conditional.scala 39:67]
+  wire  _GEN_147 = _T_3594 ? 1'h0 : _GEN_135; // @[Conditional.scala 39:67]
+  wire  buf_error_en_1 = _T_3571 ? 1'h0 : _GEN_147; // @[Conditional.scala 40:58]
+  wire [31:0] _T_3631 = buf_error_en_1 ? io_lsu_axi_rdata[31:0] : _T_3630; // @[el2_lsu_bus_buffer.scala 478:30]
+  wire  _T_3636 = buf_write[1] & _T_3442; // @[el2_lsu_bus_buffer.scala 481:71]
+  wire  _T_3637 = io_dec_tlu_force_halt | _T_3636; // @[el2_lsu_bus_buffer.scala 481:55]
+  wire  _T_3639 = ~buf_samedw_1; // @[el2_lsu_bus_buffer.scala 482:30]
+  wire  _T_3640 = buf_dual_1 & _T_3639; // @[el2_lsu_bus_buffer.scala 482:28]
+  wire  _T_3643 = _T_3640 & _T_3686; // @[el2_lsu_bus_buffer.scala 482:45]
+  wire [2:0] _GEN_95 = 2'h1 == buf_dualtag_1 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire [2:0] _GEN_96 = 2'h2 == buf_dualtag_1 ? buf_state_2 : _GEN_95; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire [2:0] _GEN_97 = 2'h3 == buf_dualtag_1 ? buf_state_3 : _GEN_96; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire  _T_3644 = _GEN_97 != 3'h4; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire  _T_3645 = _T_3643 & _T_3644; // @[el2_lsu_bus_buffer.scala 482:61]
+  wire  _T_3647 = buf_ldfwd[1] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 483:31]
+  wire  _T_3653 = buf_dualtag_1 == 2'h0; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3655 = buf_dualtag_1 == 2'h1; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3657 = buf_dualtag_1 == 2'h2; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3659 = buf_dualtag_1 == 2'h3; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3661 = _T_3653 & buf_ldfwd[0]; // @[Mux.scala 27:72]
+  wire  _T_3662 = _T_3655 & buf_ldfwd[1]; // @[Mux.scala 27:72]
+  wire  _T_3663 = _T_3657 & buf_ldfwd[2]; // @[Mux.scala 27:72]
+  wire  _T_3664 = _T_3659 & buf_ldfwd[3]; // @[Mux.scala 27:72]
+  wire  _T_3665 = _T_3661 | _T_3662; // @[Mux.scala 27:72]
+  wire  _T_3666 = _T_3665 | _T_3663; // @[Mux.scala 27:72]
+  wire  _T_3667 = _T_3666 | _T_3664; // @[Mux.scala 27:72]
+  wire  _T_3669 = _T_3643 & _T_3667; // @[el2_lsu_bus_buffer.scala 483:101]
+  wire  _T_3670 = _GEN_97 == 3'h4; // @[el2_lsu_bus_buffer.scala 483:167]
+  wire  _T_3671 = _T_3669 & _T_3670; // @[el2_lsu_bus_buffer.scala 483:138]
+  wire  _T_3672 = _T_3671 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 483:187]
+  wire  _T_3673 = _T_3647 | _T_3672; // @[el2_lsu_bus_buffer.scala 483:53]
+  wire  _T_3696 = buf_state_bus_en_1 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 490:47]
+  wire  _T_3697 = _T_3696 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 490:62]
+  wire  _T_3711 = ~buf_error_en_1; // @[el2_lsu_bus_buffer.scala 494:50]
+  wire  _T_3712 = buf_state_en_1 & _T_3711; // @[el2_lsu_bus_buffer.scala 494:48]
+  wire [31:0] _T_3718 = _T_3712 ? _T_3630 : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 494:30]
+  wire  _T_3724 = buf_ldfwd[1] | _T_3729[0]; // @[el2_lsu_bus_buffer.scala 497:90]
+  wire  _T_3725 = _T_3724 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 497:118]
+  wire  _GEN_105 = _T_3745 & buf_state_en_1; // @[Conditional.scala 39:67]
+  wire  _GEN_108 = _T_3737 ? 1'h0 : _T_3745; // @[Conditional.scala 39:67]
+  wire  _GEN_110 = _T_3737 ? 1'h0 : _GEN_105; // @[Conditional.scala 39:67]
+  wire  _GEN_114 = _T_3719 ? 1'h0 : _GEN_108; // @[Conditional.scala 39:67]
+  wire  _GEN_116 = _T_3719 ? 1'h0 : _GEN_110; // @[Conditional.scala 39:67]
+  wire  _GEN_121 = _T_3632 & _T_3697; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_123 = _T_3632 ? _T_3718 : 32'h0; // @[Conditional.scala 39:67]
+  wire  _GEN_124 = _T_3632 ? 1'h0 : _GEN_114; // @[Conditional.scala 39:67]
+  wire  _GEN_126 = _T_3632 ? 1'h0 : _GEN_116; // @[Conditional.scala 39:67]
+  wire  _GEN_132 = _T_3598 ? _T_3618 : _GEN_126; // @[Conditional.scala 39:67]
+  wire  _GEN_134 = _T_3598 ? _T_3622 : _GEN_121; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_136 = _T_3598 ? _T_3631 : _GEN_123; // @[Conditional.scala 39:67]
+  wire  _GEN_138 = _T_3598 ? 1'h0 : _GEN_124; // @[Conditional.scala 39:67]
+  wire  _GEN_144 = _T_3594 ? 1'h0 : _GEN_132; // @[Conditional.scala 39:67]
+  wire  _GEN_146 = _T_3594 ? 1'h0 : _GEN_134; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_148 = _T_3594 ? 32'h0 : _GEN_136; // @[Conditional.scala 39:67]
+  wire  _GEN_150 = _T_3594 ? 1'h0 : _GEN_138; // @[Conditional.scala 39:67]
+  wire  buf_wr_en_1 = _T_3571 & buf_state_en_1; // @[Conditional.scala 40:58]
+  wire [31:0] _GEN_155 = _T_3571 ? _T_3593 : _GEN_148; // @[Conditional.scala 40:58]
+  wire  buf_ldfwd_en_1 = _T_3571 ? 1'h0 : _GEN_144; // @[Conditional.scala 40:58]
+  wire  buf_rst_1 = _T_3571 ? 1'h0 : _GEN_150; // @[Conditional.scala 40:58]
+  wire [31:0] _T_3786 = _T_3779 ? ibuf_data_out : store_data_lo_r; // @[el2_lsu_bus_buffer.scala 462:30]
+  wire  _T_3808 = buf_state_en_2 & _T_3879; // @[el2_lsu_bus_buffer.scala 474:44]
+  wire  _T_3809 = _T_3808 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 474:60]
+  wire  _T_3811 = _T_3809 & _T_1258; // @[el2_lsu_bus_buffer.scala 474:74]
+  wire  _T_3814 = _T_3804 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 476:67]
+  wire  _T_3815 = _T_3814 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 476:81]
+  wire  _T_3818 = _T_3814 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 477:82]
+  wire [31:0] _T_3823 = buf_addr_2[2] ? io_lsu_axi_rdata[63:32] : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 478:73]
+  wire  _T_3893 = bus_rsp_read_error & _T_3872; // @[el2_lsu_bus_buffer.scala 491:91]
+  wire  _T_3895 = bus_rsp_read_error & buf_ldfwd[2]; // @[el2_lsu_bus_buffer.scala 492:31]
+  wire  _T_3897 = _T_3895 & _T_3874; // @[el2_lsu_bus_buffer.scala 492:46]
+  wire  _T_3898 = _T_3893 | _T_3897; // @[el2_lsu_bus_buffer.scala 491:143]
+  wire  _T_3901 = bus_rsp_write_error & _T_3870; // @[el2_lsu_bus_buffer.scala 493:53]
+  wire  _T_3902 = _T_3898 | _T_3901; // @[el2_lsu_bus_buffer.scala 492:88]
+  wire  _T_3903 = _T_3804 & _T_3902; // @[el2_lsu_bus_buffer.scala 491:68]
+  wire  _GEN_198 = _T_3825 & _T_3903; // @[Conditional.scala 39:67]
+  wire  _GEN_211 = _T_3791 ? _T_3818 : _GEN_198; // @[Conditional.scala 39:67]
+  wire  _GEN_223 = _T_3787 ? 1'h0 : _GEN_211; // @[Conditional.scala 39:67]
+  wire  buf_error_en_2 = _T_3764 ? 1'h0 : _GEN_223; // @[Conditional.scala 40:58]
+  wire [31:0] _T_3824 = buf_error_en_2 ? io_lsu_axi_rdata[31:0] : _T_3823; // @[el2_lsu_bus_buffer.scala 478:30]
+  wire  _T_3829 = buf_write[2] & _T_3442; // @[el2_lsu_bus_buffer.scala 481:71]
+  wire  _T_3830 = io_dec_tlu_force_halt | _T_3829; // @[el2_lsu_bus_buffer.scala 481:55]
+  wire  _T_3832 = ~buf_samedw_2; // @[el2_lsu_bus_buffer.scala 482:30]
+  wire  _T_3833 = buf_dual_2 & _T_3832; // @[el2_lsu_bus_buffer.scala 482:28]
+  wire  _T_3836 = _T_3833 & _T_3879; // @[el2_lsu_bus_buffer.scala 482:45]
+  wire [2:0] _GEN_171 = 2'h1 == buf_dualtag_2 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire [2:0] _GEN_172 = 2'h2 == buf_dualtag_2 ? buf_state_2 : _GEN_171; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire [2:0] _GEN_173 = 2'h3 == buf_dualtag_2 ? buf_state_3 : _GEN_172; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire  _T_3837 = _GEN_173 != 3'h4; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire  _T_3838 = _T_3836 & _T_3837; // @[el2_lsu_bus_buffer.scala 482:61]
+  wire  _T_3840 = buf_ldfwd[2] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 483:31]
+  wire  _T_3846 = buf_dualtag_2 == 2'h0; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3848 = buf_dualtag_2 == 2'h1; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3850 = buf_dualtag_2 == 2'h2; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3852 = buf_dualtag_2 == 2'h3; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_3854 = _T_3846 & buf_ldfwd[0]; // @[Mux.scala 27:72]
+  wire  _T_3855 = _T_3848 & buf_ldfwd[1]; // @[Mux.scala 27:72]
+  wire  _T_3856 = _T_3850 & buf_ldfwd[2]; // @[Mux.scala 27:72]
+  wire  _T_3857 = _T_3852 & buf_ldfwd[3]; // @[Mux.scala 27:72]
+  wire  _T_3858 = _T_3854 | _T_3855; // @[Mux.scala 27:72]
+  wire  _T_3859 = _T_3858 | _T_3856; // @[Mux.scala 27:72]
+  wire  _T_3860 = _T_3859 | _T_3857; // @[Mux.scala 27:72]
+  wire  _T_3862 = _T_3836 & _T_3860; // @[el2_lsu_bus_buffer.scala 483:101]
+  wire  _T_3863 = _GEN_173 == 3'h4; // @[el2_lsu_bus_buffer.scala 483:167]
+  wire  _T_3864 = _T_3862 & _T_3863; // @[el2_lsu_bus_buffer.scala 483:138]
+  wire  _T_3865 = _T_3864 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 483:187]
+  wire  _T_3866 = _T_3840 | _T_3865; // @[el2_lsu_bus_buffer.scala 483:53]
+  wire  _T_3889 = buf_state_bus_en_2 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 490:47]
+  wire  _T_3890 = _T_3889 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 490:62]
+  wire  _T_3904 = ~buf_error_en_2; // @[el2_lsu_bus_buffer.scala 494:50]
+  wire  _T_3905 = buf_state_en_2 & _T_3904; // @[el2_lsu_bus_buffer.scala 494:48]
+  wire [31:0] _T_3911 = _T_3905 ? _T_3823 : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 494:30]
+  wire  _T_3917 = buf_ldfwd[2] | _T_3922[0]; // @[el2_lsu_bus_buffer.scala 497:90]
+  wire  _T_3918 = _T_3917 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 497:118]
+  wire  _GEN_181 = _T_3938 & buf_state_en_2; // @[Conditional.scala 39:67]
+  wire  _GEN_184 = _T_3930 ? 1'h0 : _T_3938; // @[Conditional.scala 39:67]
+  wire  _GEN_186 = _T_3930 ? 1'h0 : _GEN_181; // @[Conditional.scala 39:67]
+  wire  _GEN_190 = _T_3912 ? 1'h0 : _GEN_184; // @[Conditional.scala 39:67]
+  wire  _GEN_192 = _T_3912 ? 1'h0 : _GEN_186; // @[Conditional.scala 39:67]
+  wire  _GEN_197 = _T_3825 & _T_3890; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_199 = _T_3825 ? _T_3911 : 32'h0; // @[Conditional.scala 39:67]
+  wire  _GEN_200 = _T_3825 ? 1'h0 : _GEN_190; // @[Conditional.scala 39:67]
+  wire  _GEN_202 = _T_3825 ? 1'h0 : _GEN_192; // @[Conditional.scala 39:67]
+  wire  _GEN_208 = _T_3791 ? _T_3811 : _GEN_202; // @[Conditional.scala 39:67]
+  wire  _GEN_210 = _T_3791 ? _T_3815 : _GEN_197; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_212 = _T_3791 ? _T_3824 : _GEN_199; // @[Conditional.scala 39:67]
+  wire  _GEN_214 = _T_3791 ? 1'h0 : _GEN_200; // @[Conditional.scala 39:67]
+  wire  _GEN_220 = _T_3787 ? 1'h0 : _GEN_208; // @[Conditional.scala 39:67]
+  wire  _GEN_222 = _T_3787 ? 1'h0 : _GEN_210; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_224 = _T_3787 ? 32'h0 : _GEN_212; // @[Conditional.scala 39:67]
+  wire  _GEN_226 = _T_3787 ? 1'h0 : _GEN_214; // @[Conditional.scala 39:67]
+  wire  buf_wr_en_2 = _T_3764 & buf_state_en_2; // @[Conditional.scala 40:58]
+  wire [31:0] _GEN_231 = _T_3764 ? _T_3786 : _GEN_224; // @[Conditional.scala 40:58]
+  wire  buf_ldfwd_en_2 = _T_3764 ? 1'h0 : _GEN_220; // @[Conditional.scala 40:58]
+  wire  buf_rst_2 = _T_3764 ? 1'h0 : _GEN_226; // @[Conditional.scala 40:58]
+  wire [31:0] _T_3979 = _T_3972 ? ibuf_data_out : store_data_lo_r; // @[el2_lsu_bus_buffer.scala 462:30]
+  wire  _T_4001 = buf_state_en_3 & _T_4072; // @[el2_lsu_bus_buffer.scala 474:44]
+  wire  _T_4002 = _T_4001 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 474:60]
+  wire  _T_4004 = _T_4002 & _T_1258; // @[el2_lsu_bus_buffer.scala 474:74]
+  wire  _T_4007 = _T_3997 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 476:67]
+  wire  _T_4008 = _T_4007 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 476:81]
+  wire  _T_4011 = _T_4007 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 477:82]
+  wire [31:0] _T_4016 = buf_addr_3[2] ? io_lsu_axi_rdata[63:32] : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 478:73]
+  wire  _T_4086 = bus_rsp_read_error & _T_4065; // @[el2_lsu_bus_buffer.scala 491:91]
+  wire  _T_4088 = bus_rsp_read_error & buf_ldfwd[3]; // @[el2_lsu_bus_buffer.scala 492:31]
+  wire  _T_4090 = _T_4088 & _T_4067; // @[el2_lsu_bus_buffer.scala 492:46]
+  wire  _T_4091 = _T_4086 | _T_4090; // @[el2_lsu_bus_buffer.scala 491:143]
+  wire  _T_4094 = bus_rsp_write_error & _T_4063; // @[el2_lsu_bus_buffer.scala 493:53]
+  wire  _T_4095 = _T_4091 | _T_4094; // @[el2_lsu_bus_buffer.scala 492:88]
+  wire  _T_4096 = _T_3997 & _T_4095; // @[el2_lsu_bus_buffer.scala 491:68]
+  wire  _GEN_274 = _T_4018 & _T_4096; // @[Conditional.scala 39:67]
+  wire  _GEN_287 = _T_3984 ? _T_4011 : _GEN_274; // @[Conditional.scala 39:67]
+  wire  _GEN_299 = _T_3980 ? 1'h0 : _GEN_287; // @[Conditional.scala 39:67]
+  wire  buf_error_en_3 = _T_3957 ? 1'h0 : _GEN_299; // @[Conditional.scala 40:58]
+  wire [31:0] _T_4017 = buf_error_en_3 ? io_lsu_axi_rdata[31:0] : _T_4016; // @[el2_lsu_bus_buffer.scala 478:30]
+  wire  _T_4022 = buf_write[3] & _T_3442; // @[el2_lsu_bus_buffer.scala 481:71]
+  wire  _T_4023 = io_dec_tlu_force_halt | _T_4022; // @[el2_lsu_bus_buffer.scala 481:55]
+  wire  _T_4025 = ~buf_samedw_3; // @[el2_lsu_bus_buffer.scala 482:30]
+  wire  _T_4026 = buf_dual_3 & _T_4025; // @[el2_lsu_bus_buffer.scala 482:28]
+  wire  _T_4029 = _T_4026 & _T_4072; // @[el2_lsu_bus_buffer.scala 482:45]
+  wire [2:0] _GEN_247 = 2'h1 == buf_dualtag_3 ? buf_state_1 : buf_state_0; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire [2:0] _GEN_248 = 2'h2 == buf_dualtag_3 ? buf_state_2 : _GEN_247; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire [2:0] _GEN_249 = 2'h3 == buf_dualtag_3 ? buf_state_3 : _GEN_248; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire  _T_4030 = _GEN_249 != 3'h4; // @[el2_lsu_bus_buffer.scala 482:90]
+  wire  _T_4031 = _T_4029 & _T_4030; // @[el2_lsu_bus_buffer.scala 482:61]
+  wire  _T_4033 = buf_ldfwd[3] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 483:31]
+  wire  _T_4039 = buf_dualtag_3 == 2'h0; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_4041 = buf_dualtag_3 == 2'h1; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_4043 = buf_dualtag_3 == 2'h2; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_4045 = buf_dualtag_3 == 2'h3; // @[el2_lsu_bus_buffer.scala 110:118]
+  wire  _T_4047 = _T_4039 & buf_ldfwd[0]; // @[Mux.scala 27:72]
+  wire  _T_4048 = _T_4041 & buf_ldfwd[1]; // @[Mux.scala 27:72]
+  wire  _T_4049 = _T_4043 & buf_ldfwd[2]; // @[Mux.scala 27:72]
+  wire  _T_4050 = _T_4045 & buf_ldfwd[3]; // @[Mux.scala 27:72]
+  wire  _T_4051 = _T_4047 | _T_4048; // @[Mux.scala 27:72]
+  wire  _T_4052 = _T_4051 | _T_4049; // @[Mux.scala 27:72]
+  wire  _T_4053 = _T_4052 | _T_4050; // @[Mux.scala 27:72]
+  wire  _T_4055 = _T_4029 & _T_4053; // @[el2_lsu_bus_buffer.scala 483:101]
+  wire  _T_4056 = _GEN_249 == 3'h4; // @[el2_lsu_bus_buffer.scala 483:167]
+  wire  _T_4057 = _T_4055 & _T_4056; // @[el2_lsu_bus_buffer.scala 483:138]
+  wire  _T_4058 = _T_4057 & any_done_wait_state; // @[el2_lsu_bus_buffer.scala 483:187]
+  wire  _T_4059 = _T_4033 | _T_4058; // @[el2_lsu_bus_buffer.scala 483:53]
+  wire  _T_4082 = buf_state_bus_en_3 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 490:47]
+  wire  _T_4083 = _T_4082 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 490:62]
+  wire  _T_4097 = ~buf_error_en_3; // @[el2_lsu_bus_buffer.scala 494:50]
+  wire  _T_4098 = buf_state_en_3 & _T_4097; // @[el2_lsu_bus_buffer.scala 494:48]
+  wire [31:0] _T_4104 = _T_4098 ? _T_4016 : io_lsu_axi_rdata[31:0]; // @[el2_lsu_bus_buffer.scala 494:30]
+  wire  _T_4110 = buf_ldfwd[3] | _T_4115[0]; // @[el2_lsu_bus_buffer.scala 497:90]
+  wire  _T_4111 = _T_4110 | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 497:118]
+  wire  _GEN_257 = _T_4131 & buf_state_en_3; // @[Conditional.scala 39:67]
+  wire  _GEN_260 = _T_4123 ? 1'h0 : _T_4131; // @[Conditional.scala 39:67]
+  wire  _GEN_262 = _T_4123 ? 1'h0 : _GEN_257; // @[Conditional.scala 39:67]
+  wire  _GEN_266 = _T_4105 ? 1'h0 : _GEN_260; // @[Conditional.scala 39:67]
+  wire  _GEN_268 = _T_4105 ? 1'h0 : _GEN_262; // @[Conditional.scala 39:67]
+  wire  _GEN_273 = _T_4018 & _T_4083; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_275 = _T_4018 ? _T_4104 : 32'h0; // @[Conditional.scala 39:67]
+  wire  _GEN_276 = _T_4018 ? 1'h0 : _GEN_266; // @[Conditional.scala 39:67]
+  wire  _GEN_278 = _T_4018 ? 1'h0 : _GEN_268; // @[Conditional.scala 39:67]
+  wire  _GEN_284 = _T_3984 ? _T_4004 : _GEN_278; // @[Conditional.scala 39:67]
+  wire  _GEN_286 = _T_3984 ? _T_4008 : _GEN_273; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_288 = _T_3984 ? _T_4017 : _GEN_275; // @[Conditional.scala 39:67]
+  wire  _GEN_290 = _T_3984 ? 1'h0 : _GEN_276; // @[Conditional.scala 39:67]
+  wire  _GEN_296 = _T_3980 ? 1'h0 : _GEN_284; // @[Conditional.scala 39:67]
+  wire  _GEN_298 = _T_3980 ? 1'h0 : _GEN_286; // @[Conditional.scala 39:67]
+  wire [31:0] _GEN_300 = _T_3980 ? 32'h0 : _GEN_288; // @[Conditional.scala 39:67]
+  wire  _GEN_302 = _T_3980 ? 1'h0 : _GEN_290; // @[Conditional.scala 39:67]
+  wire  buf_wr_en_3 = _T_3957 & buf_state_en_3; // @[Conditional.scala 40:58]
+  wire [31:0] _GEN_307 = _T_3957 ? _T_3979 : _GEN_300; // @[Conditional.scala 40:58]
+  wire  buf_ldfwd_en_3 = _T_3957 ? 1'h0 : _GEN_296; // @[Conditional.scala 40:58]
+  wire  buf_rst_3 = _T_3957 ? 1'h0 : _GEN_302; // @[Conditional.scala 40:58]
+  reg  _T_4186; // @[Reg.scala 27:20]
+  reg  _T_4189; // @[Reg.scala 27:20]
+  reg  _T_4192; // @[Reg.scala 27:20]
+  reg  _T_4195; // @[Reg.scala 27:20]
+  wire [3:0] buf_unsign = {_T_4195,_T_4192,_T_4189,_T_4186}; // @[Cat.scala 29:58]
+  wire [2:0] buf_byteen_in_0 = _T_3197[2:0]; // @[el2_lsu_bus_buffer.scala 170:27 el2_lsu_bus_buffer.scala 171:17 el2_lsu_bus_buffer.scala 443:19]
+  wire [2:0] buf_byteen_in_1 = _T_3206[2:0]; // @[el2_lsu_bus_buffer.scala 170:27 el2_lsu_bus_buffer.scala 171:17 el2_lsu_bus_buffer.scala 443:19]
+  wire [2:0] buf_byteen_in_2 = _T_3215[2:0]; // @[el2_lsu_bus_buffer.scala 170:27 el2_lsu_bus_buffer.scala 171:17 el2_lsu_bus_buffer.scala 443:19]
+  wire [2:0] buf_byteen_in_3 = _T_3224[2:0]; // @[el2_lsu_bus_buffer.scala 170:27 el2_lsu_bus_buffer.scala 171:17 el2_lsu_bus_buffer.scala 443:19]
+  reg  _T_4257; // @[el2_lsu_bus_buffer.scala 533:82]
+  reg  _T_4253; // @[el2_lsu_bus_buffer.scala 533:82]
+  reg  _T_4249; // @[el2_lsu_bus_buffer.scala 533:82]
+  reg  _T_4245; // @[el2_lsu_bus_buffer.scala 533:82]
+  wire [3:0] buf_error = {_T_4257,_T_4253,_T_4249,_T_4245}; // @[Cat.scala 29:58]
+  wire  _T_4243 = buf_error_en_0 | buf_error[0]; // @[el2_lsu_bus_buffer.scala 533:86]
+  wire  _T_4247 = buf_error_en_1 | buf_error[1]; // @[el2_lsu_bus_buffer.scala 533:86]
+  wire  _T_4251 = buf_error_en_2 | buf_error[2]; // @[el2_lsu_bus_buffer.scala 533:86]
+  wire  _T_4255 = buf_error_en_3 | buf_error[3]; // @[el2_lsu_bus_buffer.scala 533:86]
+  wire [1:0] _T_4265 = _T_26 + _T_19; // @[el2_lsu_bus_buffer.scala 535:96]
+  wire [1:0] _GEN_407 = {{1'd0}, _T_12}; // @[el2_lsu_bus_buffer.scala 535:96]
+  wire [2:0] _T_4266 = _T_4265 + _GEN_407; // @[el2_lsu_bus_buffer.scala 535:96]
+  wire [2:0] _GEN_408 = {{2'd0}, _T_5}; // @[el2_lsu_bus_buffer.scala 535:96]
+  wire [3:0] buf_numvld_any = _T_4266 + _GEN_408; // @[el2_lsu_bus_buffer.scala 535:96]
+  wire  _T_4352 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_buffer.scala 541:52]
+  wire  _T_4353 = buf_numvld_any >= 4'h3; // @[el2_lsu_bus_buffer.scala 541:92]
+  wire  _T_4354 = buf_numvld_any == 4'h3; // @[el2_lsu_bus_buffer.scala 541:119]
+  wire  _T_4356 = |buf_state_0; // @[el2_lsu_bus_buffer.scala 542:52]
+  wire  _T_4357 = |buf_state_1; // @[el2_lsu_bus_buffer.scala 542:52]
+  wire  _T_4358 = |buf_state_2; // @[el2_lsu_bus_buffer.scala 542:52]
+  wire  _T_4359 = |buf_state_3; // @[el2_lsu_bus_buffer.scala 542:52]
+  wire  _T_4360 = _T_4356 | _T_4357; // @[el2_lsu_bus_buffer.scala 542:65]
+  wire  _T_4361 = _T_4360 | _T_4358; // @[el2_lsu_bus_buffer.scala 542:65]
+  wire  _T_4362 = _T_4361 | _T_4359; // @[el2_lsu_bus_buffer.scala 542:65]
+  wire  _T_4363 = ~_T_4362; // @[el2_lsu_bus_buffer.scala 542:34]
+  wire  _T_4365 = _T_4363 & _T_765; // @[el2_lsu_bus_buffer.scala 542:70]
+  wire  _T_4368 = io_lsu_busreq_m & io_lsu_pkt_m_valid; // @[el2_lsu_bus_buffer.scala 544:51]
+  wire  _T_4369 = _T_4368 & io_lsu_pkt_m_load; // @[el2_lsu_bus_buffer.scala 544:72]
+  wire  _T_4370 = ~io_flush_m_up; // @[el2_lsu_bus_buffer.scala 544:94]
+  wire  _T_4371 = _T_4369 & _T_4370; // @[el2_lsu_bus_buffer.scala 544:92]
+  wire  _T_4372 = ~io_ld_full_hit_m; // @[el2_lsu_bus_buffer.scala 544:111]
+  wire  _T_4374 = ~io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 547:61]
+  reg  lsu_nonblock_load_valid_r; // @[el2_lsu_bus_buffer.scala 631:66]
+  wire  _T_4392 = _T_2649 & _T_1129; // @[Mux.scala 27:72]
+  wire  _T_4393 = _T_2671 & _T_3686; // @[Mux.scala 27:72]
+  wire  _T_4394 = _T_2693 & _T_3879; // @[Mux.scala 27:72]
+  wire  _T_4395 = _T_2715 & _T_4072; // @[Mux.scala 27:72]
+  wire  _T_4396 = _T_4392 | _T_4393; // @[Mux.scala 27:72]
+  wire  _T_4397 = _T_4396 | _T_4394; // @[Mux.scala 27:72]
+  wire  lsu_nonblock_load_data_ready = _T_4397 | _T_4395; // @[Mux.scala 27:72]
+  wire  _T_4403 = buf_error[0] & _T_1129; // @[el2_lsu_bus_buffer.scala 550:108]
+  wire  _T_4408 = buf_error[1] & _T_3686; // @[el2_lsu_bus_buffer.scala 550:108]
+  wire  _T_4413 = buf_error[2] & _T_3879; // @[el2_lsu_bus_buffer.scala 550:108]
+  wire  _T_4418 = buf_error[3] & _T_4072; // @[el2_lsu_bus_buffer.scala 550:108]
+  wire  _T_4419 = _T_2649 & _T_4403; // @[Mux.scala 27:72]
+  wire  _T_4420 = _T_2671 & _T_4408; // @[Mux.scala 27:72]
+  wire  _T_4421 = _T_2693 & _T_4413; // @[Mux.scala 27:72]
+  wire  _T_4422 = _T_2715 & _T_4418; // @[Mux.scala 27:72]
+  wire  _T_4423 = _T_4419 | _T_4420; // @[Mux.scala 27:72]
+  wire  _T_4424 = _T_4423 | _T_4421; // @[Mux.scala 27:72]
+  wire  _T_4431 = ~buf_dual_0; // @[el2_lsu_bus_buffer.scala 551:109]
+  wire  _T_4432 = ~buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 551:124]
+  wire  _T_4433 = _T_4431 | _T_4432; // @[el2_lsu_bus_buffer.scala 551:122]
+  wire  _T_4434 = _T_4392 & _T_4433; // @[el2_lsu_bus_buffer.scala 551:106]
+  wire  _T_4439 = ~buf_dual_1; // @[el2_lsu_bus_buffer.scala 551:109]
+  wire  _T_4440 = ~buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 551:124]
+  wire  _T_4441 = _T_4439 | _T_4440; // @[el2_lsu_bus_buffer.scala 551:122]
+  wire  _T_4442 = _T_4393 & _T_4441; // @[el2_lsu_bus_buffer.scala 551:106]
+  wire  _T_4447 = ~buf_dual_2; // @[el2_lsu_bus_buffer.scala 551:109]
+  wire  _T_4448 = ~buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 551:124]
+  wire  _T_4449 = _T_4447 | _T_4448; // @[el2_lsu_bus_buffer.scala 551:122]
+  wire  _T_4450 = _T_4394 & _T_4449; // @[el2_lsu_bus_buffer.scala 551:106]
+  wire  _T_4455 = ~buf_dual_3; // @[el2_lsu_bus_buffer.scala 551:109]
+  wire  _T_4456 = ~buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 551:124]
+  wire  _T_4457 = _T_4455 | _T_4456; // @[el2_lsu_bus_buffer.scala 551:122]
+  wire  _T_4458 = _T_4395 & _T_4457; // @[el2_lsu_bus_buffer.scala 551:106]
+  wire [1:0] _T_4461 = _T_4450 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_4462 = _T_4458 ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _GEN_409 = {{1'd0}, _T_4442}; // @[Mux.scala 27:72]
+  wire [1:0] _T_4464 = _GEN_409 | _T_4461; // @[Mux.scala 27:72]
+  wire [31:0] _T_4499 = _T_4434 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4500 = _T_4442 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4501 = _T_4450 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4502 = _T_4458 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4503 = _T_4499 | _T_4500; // @[Mux.scala 27:72]
+  wire [31:0] _T_4504 = _T_4503 | _T_4501; // @[Mux.scala 27:72]
+  wire [31:0] lsu_nonblock_load_data_lo = _T_4504 | _T_4502; // @[Mux.scala 27:72]
+  wire  _T_4510 = buf_dual_0 | buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 553:120]
+  wire  _T_4511 = _T_4392 & _T_4510; // @[el2_lsu_bus_buffer.scala 553:105]
+  wire  _T_4516 = buf_dual_1 | buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 553:120]
+  wire  _T_4517 = _T_4393 & _T_4516; // @[el2_lsu_bus_buffer.scala 553:105]
+  wire  _T_4522 = buf_dual_2 | buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 553:120]
+  wire  _T_4523 = _T_4394 & _T_4522; // @[el2_lsu_bus_buffer.scala 553:105]
+  wire  _T_4528 = buf_dual_3 | buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 553:120]
+  wire  _T_4529 = _T_4395 & _T_4528; // @[el2_lsu_bus_buffer.scala 553:105]
+  wire [31:0] _T_4530 = _T_4511 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4531 = _T_4517 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4532 = _T_4523 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4533 = _T_4529 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4534 = _T_4530 | _T_4531; // @[Mux.scala 27:72]
+  wire [31:0] _T_4535 = _T_4534 | _T_4532; // @[Mux.scala 27:72]
+  wire [31:0] lsu_nonblock_load_data_hi = _T_4535 | _T_4533; // @[Mux.scala 27:72]
+  wire  _T_4537 = io_lsu_nonblock_load_data_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 111:123]
+  wire  _T_4538 = io_lsu_nonblock_load_data_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 111:123]
+  wire  _T_4539 = io_lsu_nonblock_load_data_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 111:123]
+  wire  _T_4540 = io_lsu_nonblock_load_data_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 111:123]
+  wire [31:0] _T_4541 = _T_4537 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4542 = _T_4538 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4543 = _T_4539 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4544 = _T_4540 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4545 = _T_4541 | _T_4542; // @[Mux.scala 27:72]
+  wire [31:0] _T_4546 = _T_4545 | _T_4543; // @[Mux.scala 27:72]
+  wire [31:0] lsu_nonblock_addr_offset = _T_4546 | _T_4544; // @[Mux.scala 27:72]
+  wire [1:0] _T_4552 = _T_4537 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_4553 = _T_4538 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_4554 = _T_4539 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_4555 = _T_4540 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_4556 = _T_4552 | _T_4553; // @[Mux.scala 27:72]
+  wire [1:0] _T_4557 = _T_4556 | _T_4554; // @[Mux.scala 27:72]
+  wire [1:0] lsu_nonblock_sz = _T_4557 | _T_4555; // @[Mux.scala 27:72]
+  wire  _T_4567 = _T_4537 & buf_unsign[0]; // @[Mux.scala 27:72]
+  wire  _T_4568 = _T_4538 & buf_unsign[1]; // @[Mux.scala 27:72]
+  wire  _T_4569 = _T_4539 & buf_unsign[2]; // @[Mux.scala 27:72]
+  wire  _T_4570 = _T_4540 & buf_unsign[3]; // @[Mux.scala 27:72]
+  wire  _T_4571 = _T_4567 | _T_4568; // @[Mux.scala 27:72]
+  wire  _T_4572 = _T_4571 | _T_4569; // @[Mux.scala 27:72]
+  wire  lsu_nonblock_unsign = _T_4572 | _T_4570; // @[Mux.scala 27:72]
+  wire [63:0] _T_4592 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58]
+  wire [35:0] _T_4593 = lsu_nonblock_addr_offset * 32'h8; // @[el2_lsu_bus_buffer.scala 558:121]
+  wire [63:0] lsu_nonblock_data_unalgn = _T_4592 >> _T_4593; // @[el2_lsu_bus_buffer.scala 558:92]
+  wire  _T_4594 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 559:69]
+  wire  _T_4596 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 560:81]
+  wire  _T_4597 = lsu_nonblock_unsign & _T_4596; // @[el2_lsu_bus_buffer.scala 560:63]
+  wire [31:0] _T_4599 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58]
+  wire  _T_4600 = lsu_nonblock_sz == 2'h1; // @[el2_lsu_bus_buffer.scala 561:45]
+  wire  _T_4601 = lsu_nonblock_unsign & _T_4600; // @[el2_lsu_bus_buffer.scala 561:26]
+  wire [31:0] _T_4603 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58]
+  wire  _T_4604 = ~lsu_nonblock_unsign; // @[el2_lsu_bus_buffer.scala 562:6]
+  wire  _T_4606 = _T_4604 & _T_4596; // @[el2_lsu_bus_buffer.scala 562:27]
+  wire [23:0] _T_4609 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12]
+  wire [31:0] _T_4611 = {_T_4609,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58]
+  wire  _T_4614 = _T_4604 & _T_4600; // @[el2_lsu_bus_buffer.scala 563:27]
+  wire [15:0] _T_4617 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12]
+  wire [31:0] _T_4619 = {_T_4617,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58]
+  wire  _T_4620 = lsu_nonblock_sz == 2'h2; // @[el2_lsu_bus_buffer.scala 564:21]
+  wire [31:0] _T_4621 = _T_4597 ? _T_4599 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4622 = _T_4601 ? _T_4603 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4623 = _T_4606 ? _T_4611 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4624 = _T_4614 ? _T_4619 : 32'h0; // @[Mux.scala 27:72]
+  wire [63:0] _T_4625 = _T_4620 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4626 = _T_4621 | _T_4622; // @[Mux.scala 27:72]
+  wire [31:0] _T_4627 = _T_4626 | _T_4623; // @[Mux.scala 27:72]
+  wire [31:0] _T_4628 = _T_4627 | _T_4624; // @[Mux.scala 27:72]
+  wire [63:0] _GEN_410 = {{32'd0}, _T_4628}; // @[Mux.scala 27:72]
+  wire [63:0] _T_4629 = _GEN_410 | _T_4625; // @[Mux.scala 27:72]
+  wire  _T_4725 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 582:36]
+  wire  _T_4726 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 582:51]
+  wire  _T_4727 = _T_4725 & _T_4726; // @[el2_lsu_bus_buffer.scala 582:49]
+  wire [31:0] _T_4731 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58]
+  wire [2:0] _T_4733 = {1'h0,obuf_sz}; // @[Cat.scala 29:58]
+  wire  _T_4738 = ~obuf_data_done; // @[el2_lsu_bus_buffer.scala 594:50]
+  wire  _T_4739 = _T_4725 & _T_4738; // @[el2_lsu_bus_buffer.scala 594:48]
+  wire [7:0] _T_4743 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
+  wire  _T_4746 = obuf_valid & _T_1268; // @[el2_lsu_bus_buffer.scala 599:36]
+  wire  _T_4748 = _T_4746 & _T_1274; // @[el2_lsu_bus_buffer.scala 599:50]
+  wire  _T_4760 = io_lsu_bus_clk_en_q & buf_error[0]; // @[el2_lsu_bus_buffer.scala 612:114]
+  wire  _T_4762 = _T_4760 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 612:129]
+  wire  _T_4765 = io_lsu_bus_clk_en_q & buf_error[1]; // @[el2_lsu_bus_buffer.scala 612:114]
+  wire  _T_4767 = _T_4765 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 612:129]
+  wire  _T_4770 = io_lsu_bus_clk_en_q & buf_error[2]; // @[el2_lsu_bus_buffer.scala 612:114]
+  wire  _T_4772 = _T_4770 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 612:129]
+  wire  _T_4775 = io_lsu_bus_clk_en_q & buf_error[3]; // @[el2_lsu_bus_buffer.scala 612:114]
+  wire  _T_4777 = _T_4775 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 612:129]
+  wire  _T_4778 = _T_2649 & _T_4762; // @[Mux.scala 27:72]
+  wire  _T_4779 = _T_2671 & _T_4767; // @[Mux.scala 27:72]
+  wire  _T_4780 = _T_2693 & _T_4772; // @[Mux.scala 27:72]
+  wire  _T_4781 = _T_2715 & _T_4777; // @[Mux.scala 27:72]
+  wire  _T_4782 = _T_4778 | _T_4779; // @[Mux.scala 27:72]
+  wire  _T_4783 = _T_4782 | _T_4780; // @[Mux.scala 27:72]
+  wire  _T_4793 = _T_2671 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 613:98]
+  wire  lsu_imprecise_error_store_tag = _T_4793 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 613:113]
+  wire  _T_4799 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 615:72]
+  wire  _T_4801 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 111:123]
+  wire [31:0] _T_4803 = _T_4801 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4804 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_4805 = _T_4803 | _T_4804; // @[Mux.scala 27:72]
+  wire  _T_4822 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 622:68]
+  wire  _T_4825 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 623:48]
+  wire  _T_4828 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 626:48]
+  wire  _T_4829 = io_lsu_axi_awvalid & _T_4828; // @[el2_lsu_bus_buffer.scala 626:46]
+  wire  _T_4830 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 626:92]
+  wire  _T_4831 = io_lsu_axi_wvalid & _T_4830; // @[el2_lsu_bus_buffer.scala 626:90]
+  wire  _T_4832 = _T_4829 | _T_4831; // @[el2_lsu_bus_buffer.scala 626:69]
+  wire  _T_4833 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 626:136]
+  wire  _T_4834 = io_lsu_axi_arvalid & _T_4833; // @[el2_lsu_bus_buffer.scala 626:134]
+  wire  _T_4838 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 630:75]
+  wire  _T_4839 = io_lsu_busreq_m & _T_4838; // @[el2_lsu_bus_buffer.scala 630:73]
+  reg  _T_4842; // @[el2_lsu_bus_buffer.scala 630:56]
+  rvclkhdr rvclkhdr ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_io_l1clk),
+    .io_clk(rvclkhdr_io_clk),
+    .io_en(rvclkhdr_io_en),
+    .io_scan_mode(rvclkhdr_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_1 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_1_io_l1clk),
+    .io_clk(rvclkhdr_1_io_clk),
+    .io_en(rvclkhdr_1_io_en),
+    .io_scan_mode(rvclkhdr_1_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_2 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_2_io_l1clk),
+    .io_clk(rvclkhdr_2_io_clk),
+    .io_en(rvclkhdr_2_io_en),
+    .io_scan_mode(rvclkhdr_2_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_3 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_3_io_l1clk),
+    .io_clk(rvclkhdr_3_io_clk),
+    .io_en(rvclkhdr_3_io_en),
+    .io_scan_mode(rvclkhdr_3_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_4 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_4_io_l1clk),
+    .io_clk(rvclkhdr_4_io_clk),
+    .io_en(rvclkhdr_4_io_en),
+    .io_scan_mode(rvclkhdr_4_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_5 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_5_io_l1clk),
+    .io_clk(rvclkhdr_5_io_clk),
+    .io_en(rvclkhdr_5_io_en),
+    .io_scan_mode(rvclkhdr_5_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_6 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_6_io_l1clk),
+    .io_clk(rvclkhdr_6_io_clk),
+    .io_en(rvclkhdr_6_io_en),
+    .io_scan_mode(rvclkhdr_6_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_7 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_7_io_l1clk),
+    .io_clk(rvclkhdr_7_io_clk),
+    .io_en(rvclkhdr_7_io_en),
+    .io_scan_mode(rvclkhdr_7_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_8 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_8_io_l1clk),
+    .io_clk(rvclkhdr_8_io_clk),
+    .io_en(rvclkhdr_8_io_en),
+    .io_scan_mode(rvclkhdr_8_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_9 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_9_io_l1clk),
+    .io_clk(rvclkhdr_9_io_clk),
+    .io_en(rvclkhdr_9_io_en),
+    .io_scan_mode(rvclkhdr_9_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_10 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_10_io_l1clk),
+    .io_clk(rvclkhdr_10_io_clk),
+    .io_en(rvclkhdr_10_io_en),
+    .io_scan_mode(rvclkhdr_10_io_scan_mode)
+  );
+  rvclkhdr rvclkhdr_11 ( // @[el2_lib.scala 472:23]
+    .io_l1clk(rvclkhdr_11_io_l1clk),
+    .io_clk(rvclkhdr_11_io_clk),
+    .io_en(rvclkhdr_11_io_en),
+    .io_scan_mode(rvclkhdr_11_io_scan_mode)
+  );
+  assign io_lsu_busreq_r = _T_4842; // @[el2_lsu_bus_buffer.scala 630:19]
+  assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[el2_lsu_bus_buffer.scala 540:30]
+  assign io_lsu_bus_buffer_full_any = _T_4352 ? _T_4353 : _T_4354; // @[el2_lsu_bus_buffer.scala 541:30]
+  assign io_lsu_bus_buffer_empty_any = _T_4365 & _T_1156; // @[el2_lsu_bus_buffer.scala 542:31]
+  assign io_lsu_bus_idle_any = 1'h1; // @[el2_lsu_bus_buffer.scala 619:23]
+  assign io_ld_byte_hit_buf_lo = {_T_69,_T_58}; // @[el2_lsu_bus_buffer.scala 188:25]
+  assign io_ld_byte_hit_buf_hi = {_T_84,_T_73}; // @[el2_lsu_bus_buffer.scala 189:25]
+  assign io_ld_fwddata_buf_lo = _T_646[31:0]; // @[el2_lsu_bus_buffer.scala 214:24]
+  assign io_ld_fwddata_buf_hi = _T_741[31:0]; // @[el2_lsu_bus_buffer.scala 219:24]
+  assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4799; // @[el2_lsu_bus_buffer.scala 615:35]
+  assign io_lsu_imprecise_error_store_any = _T_4783 | _T_4781; // @[el2_lsu_bus_buffer.scala 612:36]
+  assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4805 : lsu_nonblock_addr_offset; // @[el2_lsu_bus_buffer.scala 616:35]
+  assign io_lsu_nonblock_load_valid_m = _T_4371 & _T_4372; // @[el2_lsu_bus_buffer.scala 544:32]
+  assign io_lsu_nonblock_load_tag_m = _T_1787 ? 2'h0 : _T_1823; // @[el2_lsu_bus_buffer.scala 545:30]
+  assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4374; // @[el2_lsu_bus_buffer.scala 547:30]
+  assign io_lsu_nonblock_load_inv_tag_r = WrPtr0_r; // @[el2_lsu_bus_buffer.scala 548:34]
+  assign io_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4594; // @[el2_lsu_bus_buffer.scala 559:35]
+  assign io_lsu_nonblock_load_data_error = _T_4424 | _T_4422; // @[el2_lsu_bus_buffer.scala 550:35]
+  assign io_lsu_nonblock_load_data_tag = _T_4464 | _T_4462; // @[el2_lsu_bus_buffer.scala 551:33]
+  assign io_lsu_nonblock_load_data = _T_4629[31:0]; // @[el2_lsu_bus_buffer.scala 560:29]
+  assign io_lsu_pmu_bus_trxn = _T_4822 | _T_4717; // @[el2_lsu_bus_buffer.scala 622:23]
+  assign io_lsu_pmu_bus_misaligned = _T_4825 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 623:29]
+  assign io_lsu_pmu_bus_error = io_lsu_imprecise_error_load_any | io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 624:24]
+  assign io_lsu_pmu_bus_busy = _T_4832 | _T_4834; // @[el2_lsu_bus_buffer.scala 626:23]
+  assign io_lsu_axi_awvalid = _T_4727 & _T_1164; // @[el2_lsu_bus_buffer.scala 582:22]
+  assign io_lsu_axi_awid = {{1'd0}, _T_1772}; // @[el2_lsu_bus_buffer.scala 583:19]
+  assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4731; // @[el2_lsu_bus_buffer.scala 584:21]
+  assign io_lsu_axi_awregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 588:23]
+  assign io_lsu_axi_awlen = 8'h0; // @[el2_lsu_bus_buffer.scala 589:20]
+  assign io_lsu_axi_awsize = obuf_sideeffect ? _T_4733 : 3'h2; // @[el2_lsu_bus_buffer.scala 585:21]
+  assign io_lsu_axi_awburst = 2'h1; // @[el2_lsu_bus_buffer.scala 590:22]
+  assign io_lsu_axi_awlock = 1'h0; // @[el2_lsu_bus_buffer.scala 592:21]
+  assign io_lsu_axi_awcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 587:22]
+  assign io_lsu_axi_awprot = 3'h0; // @[el2_lsu_bus_buffer.scala 586:21]
+  assign io_lsu_axi_awqos = 4'h0; // @[el2_lsu_bus_buffer.scala 591:20]
+  assign io_lsu_axi_wvalid = _T_4739 & _T_1164; // @[el2_lsu_bus_buffer.scala 594:21]
+  assign io_lsu_axi_wdata = obuf_data; // @[el2_lsu_bus_buffer.scala 596:20]
+  assign io_lsu_axi_wstrb = obuf_byteen & _T_4743; // @[el2_lsu_bus_buffer.scala 595:20]
+  assign io_lsu_axi_wlast = 1'h1; // @[el2_lsu_bus_buffer.scala 597:20]
+  assign io_lsu_axi_bready = 1'h1; // @[el2_lsu_bus_buffer.scala 610:21]
+  assign io_lsu_axi_arvalid = _T_4748 & _T_1164; // @[el2_lsu_bus_buffer.scala 599:22]
+  assign io_lsu_axi_arid = {{1'd0}, _T_1772}; // @[el2_lsu_bus_buffer.scala 600:19]
+  assign io_lsu_axi_araddr = obuf_sideeffect ? obuf_addr : _T_4731; // @[el2_lsu_bus_buffer.scala 601:21]
+  assign io_lsu_axi_arregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 605:23]
+  assign io_lsu_axi_arlen = 8'h0; // @[el2_lsu_bus_buffer.scala 606:20]
+  assign io_lsu_axi_arsize = obuf_sideeffect ? _T_4733 : 3'h3; // @[el2_lsu_bus_buffer.scala 602:21]
+  assign io_lsu_axi_arburst = 2'h1; // @[el2_lsu_bus_buffer.scala 607:22]
+  assign io_lsu_axi_arlock = 1'h0; // @[el2_lsu_bus_buffer.scala 609:21]
+  assign io_lsu_axi_arcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 604:22]
+  assign io_lsu_axi_arprot = 3'h0; // @[el2_lsu_bus_buffer.scala 603:21]
+  assign io_lsu_axi_arqos = 4'h0; // @[el2_lsu_bus_buffer.scala 608:20]
+  assign io_lsu_axi_rready = 1'h1; // @[el2_lsu_bus_buffer.scala 611:21]
+  assign rvclkhdr_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_io_en = _T_766 & _T_767; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_1_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_1_io_en = _T_766 & _T_767; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_2_io_clk = io_lsu_busm_clk; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_2_io_en = _T_1165 & io_lsu_bus_clk_en; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_2_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_3_io_clk = io_lsu_busm_clk; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_3_io_en = _T_1165 & io_lsu_bus_clk_en; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_3_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_4_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_4_io_en = _T_3378 & buf_state_en_0; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_4_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_5_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_5_io_en = _T_3571 & buf_state_en_1; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_5_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_6_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_6_io_en = _T_3764 & buf_state_en_2; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_6_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_7_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_7_io_en = _T_3957 & buf_state_en_3; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_7_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_8_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_8_io_en = _T_3378 ? buf_state_en_0 : _GEN_70; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_8_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_9_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_9_io_en = _T_3571 ? buf_state_en_1 : _GEN_146; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_9_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_10_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_10_io_en = _T_3764 ? buf_state_en_2 : _GEN_222; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_10_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+  assign rvclkhdr_11_io_clk = clock; // @[el2_lib.scala 474:18]
+  assign rvclkhdr_11_io_en = _T_3957 ? buf_state_en_3 : _GEN_298; // @[el2_lib.scala 475:17]
+  assign rvclkhdr_11_io_scan_mode = io_scan_mode; // @[el2_lib.scala 476:24]
+`ifdef RANDOMIZE_GARBAGE_ASSIGN
+`define RANDOMIZE
+`endif
+`ifdef RANDOMIZE_INVALID_ASSIGN
+`define RANDOMIZE
+`endif
+`ifdef RANDOMIZE_REG_INIT
+`define RANDOMIZE
+`endif
+`ifdef RANDOMIZE_MEM_INIT
+`define RANDOMIZE
+`endif
+`ifndef RANDOM
+`define RANDOM $random
+`endif
+`ifdef RANDOMIZE_MEM_INIT
+  integer initvar;
+`endif
+`ifndef SYNTHESIS
+`ifdef FIRRTL_BEFORE_INITIAL
+`FIRRTL_BEFORE_INITIAL
+`endif
+initial begin
+  `ifdef RANDOMIZE
+    `ifdef INIT_RANDOM
+      `INIT_RANDOM
+    `endif
+    `ifndef VERILATOR
+      `ifdef RANDOMIZE_DELAY
+        #`RANDOMIZE_DELAY begin end
+      `else
+        #0.002 begin end
+      `endif
+    `endif
+`ifdef RANDOMIZE_REG_INIT
+  _RAND_0 = {1{`RANDOM}};
+  buf_addr_0 = _RAND_0[31:0];
+  _RAND_1 = {1{`RANDOM}};
+  _T_4210 = _RAND_1[0:0];
+  _RAND_2 = {1{`RANDOM}};
+  _T_4207 = _RAND_2[0:0];
+  _RAND_3 = {1{`RANDOM}};
+  _T_4204 = _RAND_3[0:0];
+  _RAND_4 = {1{`RANDOM}};
+  _T_4201 = _RAND_4[0:0];
+  _RAND_5 = {1{`RANDOM}};
+  buf_state_0 = _RAND_5[2:0];
+  _RAND_6 = {1{`RANDOM}};
+  buf_addr_1 = _RAND_6[31:0];
+  _RAND_7 = {1{`RANDOM}};
+  buf_state_1 = _RAND_7[2:0];
+  _RAND_8 = {1{`RANDOM}};
+  buf_addr_2 = _RAND_8[31:0];
+  _RAND_9 = {1{`RANDOM}};
+  buf_state_2 = _RAND_9[2:0];
+  _RAND_10 = {1{`RANDOM}};
+  buf_addr_3 = _RAND_10[31:0];
+  _RAND_11 = {1{`RANDOM}};
+  buf_state_3 = _RAND_11[2:0];
+  _RAND_12 = {1{`RANDOM}};
+  _T_4237 = _RAND_12[2:0];
+  _RAND_13 = {1{`RANDOM}};
+  _T_4235 = _RAND_13[2:0];
+  _RAND_14 = {1{`RANDOM}};
+  _T_4233 = _RAND_14[2:0];
+  _RAND_15 = {1{`RANDOM}};
+  _T_4231 = _RAND_15[2:0];
+  _RAND_16 = {1{`RANDOM}};
+  buf_ageQ_3 = _RAND_16[3:0];
+  _RAND_17 = {1{`RANDOM}};
+  _T_1772 = _RAND_17[1:0];
+  _RAND_18 = {1{`RANDOM}};
+  obuf_merge = _RAND_18[0:0];
+  _RAND_19 = {1{`RANDOM}};
+  obuf_tag1 = _RAND_19[1:0];
+  _RAND_20 = {1{`RANDOM}};
+  obuf_valid = _RAND_20[0:0];
+  _RAND_21 = {1{`RANDOM}};
+  obuf_wr_enQ = _RAND_21[0:0];
+  _RAND_22 = {1{`RANDOM}};
+  ibuf_addr = _RAND_22[31:0];
+  _RAND_23 = {1{`RANDOM}};
+  ibuf_write = _RAND_23[0:0];
+  _RAND_24 = {1{`RANDOM}};
+  ibuf_valid = _RAND_24[0:0];
+  _RAND_25 = {1{`RANDOM}};
+  ibuf_byteen = _RAND_25[3:0];
+  _RAND_26 = {1{`RANDOM}};
+  buf_ageQ_2 = _RAND_26[3:0];
+  _RAND_27 = {1{`RANDOM}};
+  buf_ageQ_1 = _RAND_27[3:0];
+  _RAND_28 = {1{`RANDOM}};
+  buf_ageQ_0 = _RAND_28[3:0];
+  _RAND_29 = {1{`RANDOM}};
+  _T_4238 = _RAND_29[3:0];
+  _RAND_30 = {1{`RANDOM}};
+  _T_4239 = _RAND_30[3:0];
+  _RAND_31 = {1{`RANDOM}};
+  _T_4240 = _RAND_31[3:0];
+  _RAND_32 = {1{`RANDOM}};
+  _T_4241 = _RAND_32[3:0];
+  _RAND_33 = {1{`RANDOM}};
+  ibuf_timer = _RAND_33[2:0];
+  _RAND_34 = {1{`RANDOM}};
+  ibuf_sideeffect = _RAND_34[0:0];
+  _RAND_35 = {1{`RANDOM}};
+  WrPtr1_r = _RAND_35[1:0];
+  _RAND_36 = {1{`RANDOM}};
+  WrPtr0_r = _RAND_36[1:0];
+  _RAND_37 = {1{`RANDOM}};
+  ibuf_tag = _RAND_37[1:0];
+  _RAND_38 = {1{`RANDOM}};
+  ibuf_data = _RAND_38[31:0];
+  _RAND_39 = {1{`RANDOM}};
+  ibuf_dualtag = _RAND_39[1:0];
+  _RAND_40 = {1{`RANDOM}};
+  ibuf_dual = _RAND_40[0:0];
+  _RAND_41 = {1{`RANDOM}};
+  ibuf_samedw = _RAND_41[0:0];
+  _RAND_42 = {1{`RANDOM}};
+  ibuf_nomerge = _RAND_42[0:0];
+  _RAND_43 = {1{`RANDOM}};
+  ibuf_unsign = _RAND_43[0:0];
+  _RAND_44 = {1{`RANDOM}};
+  ibuf_sz = _RAND_44[1:0];
+  _RAND_45 = {1{`RANDOM}};
+  obuf_wr_timer = _RAND_45[2:0];
+  _RAND_46 = {1{`RANDOM}};
+  buf_nomerge_0 = _RAND_46[0:0];
+  _RAND_47 = {1{`RANDOM}};
+  _T_4180 = _RAND_47[0:0];
+  _RAND_48 = {1{`RANDOM}};
+  _T_4177 = _RAND_48[0:0];
+  _RAND_49 = {1{`RANDOM}};
+  _T_4174 = _RAND_49[0:0];
+  _RAND_50 = {1{`RANDOM}};
+  _T_4171 = _RAND_50[0:0];
+  _RAND_51 = {1{`RANDOM}};
+  buf_dual_3 = _RAND_51[0:0];
+  _RAND_52 = {1{`RANDOM}};
+  buf_dual_2 = _RAND_52[0:0];
+  _RAND_53 = {1{`RANDOM}};
+  buf_dual_1 = _RAND_53[0:0];
+  _RAND_54 = {1{`RANDOM}};
+  buf_dual_0 = _RAND_54[0:0];
+  _RAND_55 = {1{`RANDOM}};
+  buf_samedw_3 = _RAND_55[0:0];
+  _RAND_56 = {1{`RANDOM}};
+  buf_samedw_2 = _RAND_56[0:0];
+  _RAND_57 = {1{`RANDOM}};
+  buf_samedw_1 = _RAND_57[0:0];
+  _RAND_58 = {1{`RANDOM}};
+  buf_samedw_0 = _RAND_58[0:0];
+  _RAND_59 = {1{`RANDOM}};
+  obuf_write = _RAND_59[0:0];
+  _RAND_60 = {1{`RANDOM}};
+  obuf_cmd_done = _RAND_60[0:0];
+  _RAND_61 = {1{`RANDOM}};
+  obuf_data_done = _RAND_61[0:0];
+  _RAND_62 = {1{`RANDOM}};
+  obuf_nosend = _RAND_62[0:0];
+  _RAND_63 = {1{`RANDOM}};
+  obuf_addr = _RAND_63[31:0];
+  _RAND_64 = {1{`RANDOM}};
+  buf_sz_0 = _RAND_64[1:0];
+  _RAND_65 = {1{`RANDOM}};
+  buf_sz_1 = _RAND_65[1:0];
+  _RAND_66 = {1{`RANDOM}};
+  buf_sz_2 = _RAND_66[1:0];
+  _RAND_67 = {1{`RANDOM}};
+  buf_sz_3 = _RAND_67[1:0];
+  _RAND_68 = {1{`RANDOM}};
+  obuf_sideeffect = _RAND_68[0:0];
+  _RAND_69 = {1{`RANDOM}};
+  obuf_rdrsp_pend = _RAND_69[0:0];
+  _RAND_70 = {1{`RANDOM}};
+  obuf_rdrsp_tag = _RAND_70[2:0];
+  _RAND_71 = {1{`RANDOM}};
+  buf_dualhi_3 = _RAND_71[0:0];
+  _RAND_72 = {1{`RANDOM}};
+  buf_dualhi_2 = _RAND_72[0:0];
+  _RAND_73 = {1{`RANDOM}};
+  buf_dualhi_1 = _RAND_73[0:0];
+  _RAND_74 = {1{`RANDOM}};
+  buf_dualhi_0 = _RAND_74[0:0];
+  _RAND_75 = {1{`RANDOM}};
+  obuf_sz = _RAND_75[1:0];
+  _RAND_76 = {1{`RANDOM}};
+  obuf_byteen = _RAND_76[7:0];
+  _RAND_77 = {2{`RANDOM}};
+  obuf_data = _RAND_77[63:0];
+  _RAND_78 = {1{`RANDOM}};
+  buf_rspageQ_0 = _RAND_78[3:0];
+  _RAND_79 = {1{`RANDOM}};
+  buf_rspageQ_1 = _RAND_79[3:0];
+  _RAND_80 = {1{`RANDOM}};
+  buf_rspageQ_2 = _RAND_80[3:0];
+  _RAND_81 = {1{`RANDOM}};
+  buf_rspageQ_3 = _RAND_81[3:0];
+  _RAND_82 = {1{`RANDOM}};
+  _T_4157 = _RAND_82[0:0];
+  _RAND_83 = {1{`RANDOM}};
+  _T_4155 = _RAND_83[0:0];
+  _RAND_84 = {1{`RANDOM}};
+  _T_4153 = _RAND_84[0:0];
+  _RAND_85 = {1{`RANDOM}};
+  _T_4151 = _RAND_85[0:0];
+  _RAND_86 = {1{`RANDOM}};
+  buf_ldfwdtag_0 = _RAND_86[1:0];
+  _RAND_87 = {1{`RANDOM}};
+  buf_dualtag_0 = _RAND_87[1:0];
+  _RAND_88 = {1{`RANDOM}};
+  buf_ldfwdtag_3 = _RAND_88[1:0];
+  _RAND_89 = {1{`RANDOM}};
+  buf_ldfwdtag_2 = _RAND_89[1:0];
+  _RAND_90 = {1{`RANDOM}};
+  buf_ldfwdtag_1 = _RAND_90[1:0];
+  _RAND_91 = {1{`RANDOM}};
+  buf_dualtag_1 = _RAND_91[1:0];
+  _RAND_92 = {1{`RANDOM}};
+  buf_dualtag_2 = _RAND_92[1:0];
+  _RAND_93 = {1{`RANDOM}};
+  buf_dualtag_3 = _RAND_93[1:0];
+  _RAND_94 = {1{`RANDOM}};
+  _T_4186 = _RAND_94[0:0];
+  _RAND_95 = {1{`RANDOM}};
+  _T_4189 = _RAND_95[0:0];
+  _RAND_96 = {1{`RANDOM}};
+  _T_4192 = _RAND_96[0:0];
+  _RAND_97 = {1{`RANDOM}};
+  _T_4195 = _RAND_97[0:0];
+  _RAND_98 = {1{`RANDOM}};
+  _T_4257 = _RAND_98[0:0];
+  _RAND_99 = {1{`RANDOM}};
+  _T_4253 = _RAND_99[0:0];
+  _RAND_100 = {1{`RANDOM}};
+  _T_4249 = _RAND_100[0:0];
+  _RAND_101 = {1{`RANDOM}};
+  _T_4245 = _RAND_101[0:0];
+  _RAND_102 = {1{`RANDOM}};
+  lsu_nonblock_load_valid_r = _RAND_102[0:0];
+  _RAND_103 = {1{`RANDOM}};
+  _T_4842 = _RAND_103[0:0];
+`endif // RANDOMIZE_REG_INIT
+  if (reset) begin
+    buf_addr_0 = 32'h0;
+  end
+  if (reset) begin
+    _T_4210 = 1'h0;
+  end
+  if (reset) begin
+    _T_4207 = 1'h0;
+  end
+  if (reset) begin
+    _T_4204 = 1'h0;
+  end
+  if (reset) begin
+    _T_4201 = 1'h0;
+  end
+  if (reset) begin
+    buf_state_0 = 3'h0;
+  end
+  if (reset) begin
+    buf_addr_1 = 32'h0;
+  end
+  if (reset) begin
+    buf_state_1 = 3'h0;
+  end
+  if (reset) begin
+    buf_addr_2 = 32'h0;
+  end
+  if (reset) begin
+    buf_state_2 = 3'h0;
+  end
+  if (reset) begin
+    buf_addr_3 = 32'h0;
+  end
+  if (reset) begin
+    buf_state_3 = 3'h0;
+  end
+  if (reset) begin
+    _T_4237 = 3'h0;
+  end
+  if (reset) begin
+    _T_4235 = 3'h0;
+  end
+  if (reset) begin
+    _T_4233 = 3'h0;
+  end
+  if (reset) begin
+    _T_4231 = 3'h0;
+  end
+  if (reset) begin
+    buf_ageQ_3 = 4'h0;
+  end
+  if (reset) begin
+    _T_1772 = 2'h0;
+  end
+  if (reset) begin
+    obuf_merge = 1'h0;
+  end
+  if (reset) begin
+    obuf_tag1 = 2'h0;
+  end
+  if (reset) begin
+    obuf_valid = 1'h0;
+  end
+  if (reset) begin
+    obuf_wr_enQ = 1'h0;
+  end
+  if (reset) begin
+    ibuf_addr = 32'h0;
+  end
+  if (reset) begin
+    ibuf_write = 1'h0;
+  end
+  if (reset) begin
+    ibuf_valid = 1'h0;
+  end
+  if (reset) begin
+    ibuf_byteen = 4'h0;
+  end
+  if (reset) begin
+    buf_ageQ_2 = 4'h0;
+  end
+  if (reset) begin
+    buf_ageQ_1 = 4'h0;
+  end
+  if (reset) begin
+    buf_ageQ_0 = 4'h0;
+  end
+  if (reset) begin
+    _T_4238 = 4'h0;
+  end
+  if (reset) begin
+    _T_4239 = 4'h0;
+  end
+  if (reset) begin
+    _T_4240 = 4'h0;
+  end
+  if (reset) begin
+    _T_4241 = 4'h0;
+  end
+  if (reset) begin
+    ibuf_timer = 3'h0;
+  end
+  if (reset) begin
+    ibuf_sideeffect = 1'h0;
+  end
+  if (reset) begin
+    WrPtr1_r = 2'h0;
+  end
+  if (reset) begin
+    WrPtr0_r = 2'h0;
+  end
+  if (reset) begin
+    ibuf_tag = 2'h0;
+  end
+  if (reset) begin
+    ibuf_data = 32'h0;
+  end
+  if (reset) begin
+    ibuf_dualtag = 2'h0;
+  end
+  if (reset) begin
+    ibuf_dual = 1'h0;
+  end
+  if (reset) begin
+    ibuf_samedw = 1'h0;
+  end
+  if (reset) begin
+    ibuf_nomerge = 1'h0;
+  end
+  if (reset) begin
+    ibuf_unsign = 1'h0;
+  end
+  if (reset) begin
+    ibuf_sz = 2'h0;
+  end
+  if (reset) begin
+    obuf_wr_timer = 3'h0;
+  end
+  if (reset) begin
+    buf_nomerge_0 = 1'h0;
+  end
+  if (reset) begin
+    _T_4180 = 1'h0;
+  end
+  if (reset) begin
+    _T_4177 = 1'h0;
+  end
+  if (reset) begin
+    _T_4174 = 1'h0;
+  end
+  if (reset) begin
+    _T_4171 = 1'h0;
+  end
+  if (reset) begin
+    buf_dual_3 = 1'h0;
+  end
+  if (reset) begin
+    buf_dual_2 = 1'h0;
+  end
+  if (reset) begin
+    buf_dual_1 = 1'h0;
+  end
+  if (reset) begin
+    buf_dual_0 = 1'h0;
+  end
+  if (reset) begin
+    buf_samedw_3 = 1'h0;
+  end
+  if (reset) begin
+    buf_samedw_2 = 1'h0;
+  end
+  if (reset) begin
+    buf_samedw_1 = 1'h0;
+  end
+  if (reset) begin
+    buf_samedw_0 = 1'h0;
+  end
+  if (reset) begin
+    obuf_write = 1'h0;
+  end
+  if (reset) begin
+    obuf_cmd_done = 1'h0;
+  end
+  if (reset) begin
+    obuf_data_done = 1'h0;
+  end
+  if (reset) begin
+    obuf_nosend = 1'h0;
+  end
+  if (reset) begin
+    obuf_addr = 32'h0;
+  end
+  if (reset) begin
+    buf_sz_0 = 2'h0;
+  end
+  if (reset) begin
+    buf_sz_1 = 2'h0;
+  end
+  if (reset) begin
+    buf_sz_2 = 2'h0;
+  end
+  if (reset) begin
+    buf_sz_3 = 2'h0;
+  end
+  if (reset) begin
+    obuf_sideeffect = 1'h0;
+  end
+  if (reset) begin
+    obuf_rdrsp_pend = 1'h0;
+  end
+  if (reset) begin
+    obuf_rdrsp_tag = 3'h0;
+  end
+  if (reset) begin
+    buf_dualhi_3 = 1'h0;
+  end
+  if (reset) begin
+    buf_dualhi_2 = 1'h0;
+  end
+  if (reset) begin
+    buf_dualhi_1 = 1'h0;
+  end
+  if (reset) begin
+    buf_dualhi_0 = 1'h0;
+  end
+  if (reset) begin
+    obuf_sz = 2'h0;
+  end
+  if (reset) begin
+    obuf_byteen = 8'h0;
+  end
+  if (reset) begin
+    obuf_data = 64'h0;
+  end
+  if (reset) begin
+    buf_rspageQ_0 = 4'h0;
+  end
+  if (reset) begin
+    buf_rspageQ_1 = 4'h0;
+  end
+  if (reset) begin
+    buf_rspageQ_2 = 4'h0;
+  end
+  if (reset) begin
+    buf_rspageQ_3 = 4'h0;
+  end
+  if (reset) begin
+    _T_4157 = 1'h0;
+  end
+  if (reset) begin
+    _T_4155 = 1'h0;
+  end
+  if (reset) begin
+    _T_4153 = 1'h0;
+  end
+  if (reset) begin
+    _T_4151 = 1'h0;
+  end
+  if (reset) begin
+    buf_ldfwdtag_0 = 2'h0;
+  end
+  if (reset) begin
+    buf_dualtag_0 = 2'h0;
+  end
+  if (reset) begin
+    buf_ldfwdtag_3 = 2'h0;
+  end
+  if (reset) begin
+    buf_ldfwdtag_2 = 2'h0;
+  end
+  if (reset) begin
+    buf_ldfwdtag_1 = 2'h0;
+  end
+  if (reset) begin
+    buf_dualtag_1 = 2'h0;
+  end
+  if (reset) begin
+    buf_dualtag_2 = 2'h0;
+  end
+  if (reset) begin
+    buf_dualtag_3 = 2'h0;
+  end
+  if (reset) begin
+    _T_4186 = 1'h0;
+  end
+  if (reset) begin
+    _T_4189 = 1'h0;
+  end
+  if (reset) begin
+    _T_4192 = 1'h0;
+  end
+  if (reset) begin
+    _T_4195 = 1'h0;
+  end
+  if (reset) begin
+    _T_4257 = 1'h0;
+  end
+  if (reset) begin
+    _T_4253 = 1'h0;
+  end
+  if (reset) begin
+    _T_4249 = 1'h0;
+  end
+  if (reset) begin
+    _T_4245 = 1'h0;
+  end
+  if (reset) begin
+    lsu_nonblock_load_valid_r = 1'h0;
+  end
+  if (reset) begin
+    _T_4842 = 1'h0;
+  end
+  `endif // RANDOMIZE
+end // initial
+`ifdef FIRRTL_AFTER_INITIAL
+`FIRRTL_AFTER_INITIAL
+`endif
+`endif // SYNTHESIS
+  always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin
+    if (reset) begin
+      buf_addr_0 <= 32'h0;
+    end else if (ibuf_drainvec_vld[0]) begin
+      buf_addr_0 <= ibuf_addr;
+    end else if (_T_3193) begin
+      buf_addr_0 <= io_end_addr_r;
+    end else begin
+      buf_addr_0 <= io_lsu_addr_r;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4210 <= 1'h0;
+    end else if (buf_wr_en_3) begin
+      _T_4210 <= buf_write_in[3];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4207 <= 1'h0;
+    end else if (buf_wr_en_2) begin
+      _T_4207 <= buf_write_in[2];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4204 <= 1'h0;
+    end else if (buf_wr_en_1) begin
+      _T_4204 <= buf_write_in[1];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4201 <= 1'h0;
+    end else if (buf_wr_en_0) begin
+      _T_4201 <= buf_write_in[0];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_state_0 <= 3'h0;
+    end else if (buf_state_en_0) begin
+      if (_T_3378) begin
+        if (io_lsu_bus_clk_en) begin
+          buf_state_0 <= 3'h2;
+        end else begin
+          buf_state_0 <= 3'h1;
+        end
+      end else if (_T_3401) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_0 <= 3'h0;
+        end else begin
+          buf_state_0 <= 3'h2;
+        end
+      end else if (_T_3405) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_0 <= 3'h0;
+        end else if (_T_3409) begin
+          buf_state_0 <= 3'h5;
+        end else begin
+          buf_state_0 <= 3'h3;
+        end
+      end else if (_T_3439) begin
+        if (_T_3444) begin
+          buf_state_0 <= 3'h0;
+        end else if (_T_3452) begin
+          buf_state_0 <= 3'h4;
+        end else if (_T_3480) begin
+          buf_state_0 <= 3'h5;
+        end else begin
+          buf_state_0 <= 3'h6;
+        end
+      end else if (_T_3526) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_0 <= 3'h0;
+        end else if (_T_3532) begin
+          buf_state_0 <= 3'h5;
+        end else begin
+          buf_state_0 <= 3'h6;
+        end
+      end else if (_T_3544) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_0 <= 3'h0;
+        end else begin
+          buf_state_0 <= 3'h6;
+        end
+      end else begin
+        buf_state_0 <= 3'h0;
+      end
+    end
+  end
+  always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin
+    if (reset) begin
+      buf_addr_1 <= 32'h0;
+    end else if (ibuf_drainvec_vld[1]) begin
+      buf_addr_1 <= ibuf_addr;
+    end else if (_T_3202) begin
+      buf_addr_1 <= io_end_addr_r;
+    end else begin
+      buf_addr_1 <= io_lsu_addr_r;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_state_1 <= 3'h0;
+    end else if (buf_state_en_1) begin
+      if (_T_3571) begin
+        if (io_lsu_bus_clk_en) begin
+          buf_state_1 <= 3'h2;
+        end else begin
+          buf_state_1 <= 3'h1;
+        end
+      end else if (_T_3594) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_1 <= 3'h0;
+        end else begin
+          buf_state_1 <= 3'h2;
+        end
+      end else if (_T_3598) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_1 <= 3'h0;
+        end else if (_T_3409) begin
+          buf_state_1 <= 3'h5;
+        end else begin
+          buf_state_1 <= 3'h3;
+        end
+      end else if (_T_3632) begin
+        if (_T_3637) begin
+          buf_state_1 <= 3'h0;
+        end else if (_T_3645) begin
+          buf_state_1 <= 3'h4;
+        end else if (_T_3673) begin
+          buf_state_1 <= 3'h5;
+        end else begin
+          buf_state_1 <= 3'h6;
+        end
+      end else if (_T_3719) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_1 <= 3'h0;
+        end else if (_T_3725) begin
+          buf_state_1 <= 3'h5;
+        end else begin
+          buf_state_1 <= 3'h6;
+        end
+      end else if (_T_3737) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_1 <= 3'h0;
+        end else begin
+          buf_state_1 <= 3'h6;
+        end
+      end else begin
+        buf_state_1 <= 3'h0;
+      end
+    end
+  end
+  always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin
+    if (reset) begin
+      buf_addr_2 <= 32'h0;
+    end else if (ibuf_drainvec_vld[2]) begin
+      buf_addr_2 <= ibuf_addr;
+    end else if (_T_3211) begin
+      buf_addr_2 <= io_end_addr_r;
+    end else begin
+      buf_addr_2 <= io_lsu_addr_r;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_state_2 <= 3'h0;
+    end else if (buf_state_en_2) begin
+      if (_T_3764) begin
+        if (io_lsu_bus_clk_en) begin
+          buf_state_2 <= 3'h2;
+        end else begin
+          buf_state_2 <= 3'h1;
+        end
+      end else if (_T_3787) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_2 <= 3'h0;
+        end else begin
+          buf_state_2 <= 3'h2;
+        end
+      end else if (_T_3791) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_2 <= 3'h0;
+        end else if (_T_3409) begin
+          buf_state_2 <= 3'h5;
+        end else begin
+          buf_state_2 <= 3'h3;
+        end
+      end else if (_T_3825) begin
+        if (_T_3830) begin
+          buf_state_2 <= 3'h0;
+        end else if (_T_3838) begin
+          buf_state_2 <= 3'h4;
+        end else if (_T_3866) begin
+          buf_state_2 <= 3'h5;
+        end else begin
+          buf_state_2 <= 3'h6;
+        end
+      end else if (_T_3912) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_2 <= 3'h0;
+        end else if (_T_3918) begin
+          buf_state_2 <= 3'h5;
+        end else begin
+          buf_state_2 <= 3'h6;
+        end
+      end else if (_T_3930) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_2 <= 3'h0;
+        end else begin
+          buf_state_2 <= 3'h6;
+        end
+      end else begin
+        buf_state_2 <= 3'h0;
+      end
+    end
+  end
+  always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin
+    if (reset) begin
+      buf_addr_3 <= 32'h0;
+    end else if (ibuf_drainvec_vld[3]) begin
+      buf_addr_3 <= ibuf_addr;
+    end else if (_T_3220) begin
+      buf_addr_3 <= io_end_addr_r;
+    end else begin
+      buf_addr_3 <= io_lsu_addr_r;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_state_3 <= 3'h0;
+    end else if (buf_state_en_3) begin
+      if (_T_3957) begin
+        if (io_lsu_bus_clk_en) begin
+          buf_state_3 <= 3'h2;
+        end else begin
+          buf_state_3 <= 3'h1;
+        end
+      end else if (_T_3980) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_3 <= 3'h0;
+        end else begin
+          buf_state_3 <= 3'h2;
+        end
+      end else if (_T_3984) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_3 <= 3'h0;
+        end else if (_T_3409) begin
+          buf_state_3 <= 3'h5;
+        end else begin
+          buf_state_3 <= 3'h3;
+        end
+      end else if (_T_4018) begin
+        if (_T_4023) begin
+          buf_state_3 <= 3'h0;
+        end else if (_T_4031) begin
+          buf_state_3 <= 3'h4;
+        end else if (_T_4059) begin
+          buf_state_3 <= 3'h5;
+        end else begin
+          buf_state_3 <= 3'h6;
+        end
+      end else if (_T_4105) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_3 <= 3'h0;
+        end else if (_T_4111) begin
+          buf_state_3 <= 3'h5;
+        end else begin
+          buf_state_3 <= 3'h6;
+        end
+      end else if (_T_4123) begin
+        if (io_dec_tlu_force_halt) begin
+          buf_state_3 <= 3'h0;
+        end else begin
+          buf_state_3 <= 3'h6;
+        end
+      end else begin
+        buf_state_3 <= 3'h0;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4237 <= 3'h0;
+    end else if (buf_wr_en_3) begin
+      _T_4237 <= buf_byteen_in_3;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4235 <= 3'h0;
+    end else if (buf_wr_en_2) begin
+      _T_4235 <= buf_byteen_in_2;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4233 <= 3'h0;
+    end else if (buf_wr_en_1) begin
+      _T_4233 <= buf_byteen_in_1;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4231 <= 3'h0;
+    end else if (buf_wr_en_0) begin
+      _T_4231 <= buf_byteen_in_0;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_ageQ_3 <= 4'h0;
+    end else begin
+      buf_ageQ_3 <= {_T_2401,_T_2324};
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      _T_1772 <= 2'h0;
+    end else if (obuf_wr_en) begin
+      if (ibuf_buf_byp) begin
+        _T_1772 <= WrPtr0_r;
+      end else begin
+        _T_1772 <= 2'h0;
+      end
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_merge <= 1'h0;
+    end else if (obuf_wr_en) begin
+      obuf_merge <= obuf_merge_en;
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_tag1 <= 2'h0;
+    end else if (obuf_wr_en) begin
+      if (ibuf_buf_byp) begin
+        obuf_tag1 <= WrPtr1_r;
+      end else begin
+        obuf_tag1 <= 2'h0;
+      end
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_valid <= 1'h0;
+    end else begin
+      obuf_valid <= _T_1764 & obuf_rst;
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_wr_enQ <= 1'h0;
+    end else begin
+      obuf_wr_enQ <= _T_1165 & io_lsu_bus_clk_en;
+    end
+  end
+  always @(posedge rvclkhdr_io_l1clk or posedge reset) begin
+    if (reset) begin
+      ibuf_addr <= 32'h0;
+    end else if (io_ldst_dual_r) begin
+      ibuf_addr <= io_end_addr_r;
+    end else begin
+      ibuf_addr <= io_lsu_addr_r;
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_write <= 1'h0;
+    end else if (ibuf_wr_en) begin
+      ibuf_write <= io_lsu_pkt_r_store;
+    end
+  end
+  always @(posedge clock or posedge reset) begin
+    if (reset) begin
+      ibuf_valid <= 1'h0;
+    end else begin
+      ibuf_valid <= _T_910 & ibuf_rst;
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_byteen <= 4'h0;
+    end else if (ibuf_wr_en) begin
+      if (_T_779) begin
+        ibuf_byteen <= _T_794;
+      end else if (io_ldst_dual_r) begin
+        ibuf_byteen <= ldst_byteen_hi_r;
+      end else begin
+        ibuf_byteen <= ldst_byteen_lo_r;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_ageQ_2 <= 4'h0;
+    end else begin
+      buf_ageQ_2 <= {_T_2299,_T_2222};
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_ageQ_1 <= 4'h0;
+    end else begin
+      buf_ageQ_1 <= {_T_2197,_T_2120};
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_ageQ_0 <= 4'h0;
+    end else begin
+      buf_ageQ_0 <= {_T_2095,_T_2018};
+    end
+  end
+  always @(posedge rvclkhdr_8_io_l1clk or posedge reset) begin
+    if (reset) begin
+      _T_4238 <= 4'h0;
+    end else begin
+      _T_4238 <= _GEN_79[3:0];
+    end
+  end
+  always @(posedge rvclkhdr_9_io_l1clk or posedge reset) begin
+    if (reset) begin
+      _T_4239 <= 4'h0;
+    end else begin
+      _T_4239 <= _GEN_155[3:0];
+    end
+  end
+  always @(posedge rvclkhdr_10_io_l1clk or posedge reset) begin
+    if (reset) begin
+      _T_4240 <= 4'h0;
+    end else begin
+      _T_4240 <= _GEN_231[3:0];
+    end
+  end
+  always @(posedge rvclkhdr_11_io_l1clk or posedge reset) begin
+    if (reset) begin
+      _T_4241 <= 4'h0;
+    end else begin
+      _T_4241 <= _GEN_307[3:0];
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_timer <= 3'h0;
+    end else if (ibuf_wr_en) begin
+      ibuf_timer <= 3'h0;
+    end else if (_T_828) begin
+      ibuf_timer <= _T_831;
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_sideeffect <= 1'h0;
+    end else if (_T_915) begin
+      ibuf_sideeffect <= io_is_sideeffects_r;
+    end
+  end
+  always @(posedge io_lsu_c2_r_clk or posedge reset) begin
+    if (reset) begin
+      WrPtr1_r <= 2'h0;
+    end else if (_T_1838) begin
+      WrPtr1_r <= 2'h0;
+    end else if (_T_1852) begin
+      WrPtr1_r <= 2'h1;
+    end else if (_T_1866) begin
+      WrPtr1_r <= 2'h2;
+    end else if (_T_1880) begin
+      WrPtr1_r <= 2'h3;
+    end else begin
+      WrPtr1_r <= 2'h0;
+    end
+  end
+  always @(posedge io_lsu_c2_r_clk or posedge reset) begin
+    if (reset) begin
+      WrPtr0_r <= 2'h0;
+    end else if (_T_1787) begin
+      WrPtr0_r <= 2'h0;
+    end else if (_T_1798) begin
+      WrPtr0_r <= 2'h1;
+    end else if (_T_1809) begin
+      WrPtr0_r <= 2'h2;
+    end else if (_T_1820) begin
+      WrPtr0_r <= 2'h3;
+    end else begin
+      WrPtr0_r <= 2'h0;
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_tag <= 2'h0;
+    end else if (_T_915) begin
+      if (!(_T_779)) begin
+        if (io_ldst_dual_r) begin
+          ibuf_tag <= WrPtr1_r;
+        end else begin
+          ibuf_tag <= WrPtr0_r;
+        end
+      end
+    end
+  end
+  always @(posedge rvclkhdr_1_io_l1clk or posedge reset) begin
+    if (reset) begin
+      ibuf_data <= 32'h0;
+    end else begin
+      ibuf_data <= {_T_827,_T_804};
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_dualtag <= 2'h0;
+    end else if (_T_915) begin
+      ibuf_dualtag <= WrPtr0_r;
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_dual <= 1'h0;
+    end else if (_T_915) begin
+      ibuf_dual <= io_ldst_dual_r;
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_samedw <= 1'h0;
+    end else if (_T_915) begin
+      ibuf_samedw <= ldst_samedw_r;
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_nomerge <= 1'h0;
+    end else if (_T_915) begin
+      ibuf_nomerge <= io_no_dword_merge_r;
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_unsign <= 1'h0;
+    end else if (_T_915) begin
+      ibuf_unsign <= io_lsu_pkt_r_unsign;
+    end
+  end
+  always @(posedge io_lsu_bus_ibuf_c1_clk or posedge reset) begin
+    if (reset) begin
+      ibuf_sz <= 2'h0;
+    end else if (ibuf_wr_en) begin
+      ibuf_sz <= ibuf_sz_in;
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_wr_timer <= 3'h0;
+    end else if (obuf_wr_en) begin
+      obuf_wr_timer <= 3'h0;
+    end else if (_T_983) begin
+      obuf_wr_timer <= _T_985;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_nomerge_0 <= 1'h0;
+    end else if (buf_wr_en_0) begin
+      buf_nomerge_0 <= buf_nomerge_in[0];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4180 <= 1'h0;
+    end else if (buf_wr_en_3) begin
+      _T_4180 <= buf_sideeffect_in[3];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4177 <= 1'h0;
+    end else if (buf_wr_en_2) begin
+      _T_4177 <= buf_sideeffect_in[2];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4174 <= 1'h0;
+    end else if (buf_wr_en_1) begin
+      _T_4174 <= buf_sideeffect_in[1];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4171 <= 1'h0;
+    end else if (buf_wr_en_0) begin
+      _T_4171 <= buf_sideeffect_in[0];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dual_3 <= 1'h0;
+    end else if (buf_wr_en_3) begin
+      buf_dual_3 <= buf_dual_in[3];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dual_2 <= 1'h0;
+    end else if (buf_wr_en_2) begin
+      buf_dual_2 <= buf_dual_in[2];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dual_1 <= 1'h0;
+    end else if (buf_wr_en_1) begin
+      buf_dual_1 <= buf_dual_in[1];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dual_0 <= 1'h0;
+    end else if (buf_wr_en_0) begin
+      buf_dual_0 <= buf_dual_in[0];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_samedw_3 <= 1'h0;
+    end else if (buf_wr_en_3) begin
+      buf_samedw_3 <= buf_samedw_in[3];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_samedw_2 <= 1'h0;
+    end else if (buf_wr_en_2) begin
+      buf_samedw_2 <= buf_samedw_in[2];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_samedw_1 <= 1'h0;
+    end else if (buf_wr_en_1) begin
+      buf_samedw_1 <= buf_samedw_in[1];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_samedw_0 <= 1'h0;
+    end else if (buf_wr_en_0) begin
+      buf_samedw_0 <= buf_samedw_in[0];
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_write <= 1'h0;
+    end else if (obuf_wr_en) begin
+      if (ibuf_buf_byp) begin
+        obuf_write <= io_lsu_pkt_r_store;
+      end else begin
+        obuf_write <= buf_write[0];
+      end
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_cmd_done <= 1'h0;
+    end else begin
+      obuf_cmd_done <= _T_1230 & _T_4714;
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_data_done <= 1'h0;
+    end else begin
+      obuf_data_done <= _T_1230 & _T_4715;
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_nosend <= 1'h0;
+    end else if (obuf_wr_en) begin
+      obuf_nosend <= obuf_nosend_in;
+    end
+  end
+  always @(posedge rvclkhdr_2_io_l1clk or posedge reset) begin
+    if (reset) begin
+      obuf_addr <= 32'h0;
+    end else if (ibuf_buf_byp) begin
+      obuf_addr <= io_lsu_addr_r;
+    end else begin
+      obuf_addr <= buf_addr_0;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_sz_0 <= 2'h0;
+    end else if (buf_wr_en_0) begin
+      if (ibuf_drainvec_vld[0]) begin
+        buf_sz_0 <= ibuf_sz;
+      end else begin
+        buf_sz_0 <= ibuf_sz_in;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_sz_1 <= 2'h0;
+    end else if (buf_wr_en_1) begin
+      if (ibuf_drainvec_vld[1]) begin
+        buf_sz_1 <= ibuf_sz;
+      end else begin
+        buf_sz_1 <= ibuf_sz_in;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_sz_2 <= 2'h0;
+    end else if (buf_wr_en_2) begin
+      if (ibuf_drainvec_vld[2]) begin
+        buf_sz_2 <= ibuf_sz;
+      end else begin
+        buf_sz_2 <= ibuf_sz_in;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_sz_3 <= 2'h0;
+    end else if (buf_wr_en_3) begin
+      if (ibuf_drainvec_vld[3]) begin
+        buf_sz_3 <= ibuf_sz;
+      end else begin
+        buf_sz_3 <= ibuf_sz_in;
+      end
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_sideeffect <= 1'h0;
+    end else if (obuf_wr_en) begin
+      if (ibuf_buf_byp) begin
+        obuf_sideeffect <= io_is_sideeffects_r;
+      end else begin
+        obuf_sideeffect <= buf_sideeffect[0];
+      end
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_rdrsp_pend <= 1'h0;
+    end else begin
+      obuf_rdrsp_pend <= _T_1255 | _T_1259;
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_rdrsp_tag <= 3'h0;
+    end else if (_T_1261) begin
+      obuf_rdrsp_tag <= obuf_tag0;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dualhi_3 <= 1'h0;
+    end else if (buf_wr_en_3) begin
+      buf_dualhi_3 <= buf_dualhi_in[3];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dualhi_2 <= 1'h0;
+    end else if (buf_wr_en_2) begin
+      buf_dualhi_2 <= buf_dualhi_in[2];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dualhi_1 <= 1'h0;
+    end else if (buf_wr_en_1) begin
+      buf_dualhi_1 <= buf_dualhi_in[1];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dualhi_0 <= 1'h0;
+    end else if (buf_wr_en_0) begin
+      buf_dualhi_0 <= buf_dualhi_in[0];
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_sz <= 2'h0;
+    end else if (obuf_wr_en) begin
+      if (ibuf_buf_byp) begin
+        obuf_sz <= ibuf_sz_in;
+      end else begin
+        obuf_sz <= buf_sz_0;
+      end
+    end
+  end
+  always @(posedge io_lsu_busm_clk or posedge reset) begin
+    if (reset) begin
+      obuf_byteen <= 8'h0;
+    end else if (obuf_wr_en) begin
+      obuf_byteen <= obuf_byteen_in;
+    end
+  end
+  always @(posedge rvclkhdr_3_io_l1clk or posedge reset) begin
+    if (reset) begin
+      obuf_data <= 64'h0;
+    end else begin
+      obuf_data <= {_T_1545,_T_1504};
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_rspageQ_0 <= 4'h0;
+    end else begin
+      buf_rspageQ_0 <= {_T_3023,_T_3012};
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_rspageQ_1 <= 4'h0;
+    end else begin
+      buf_rspageQ_1 <= {_T_3038,_T_3027};
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_rspageQ_2 <= 4'h0;
+    end else begin
+      buf_rspageQ_2 <= {_T_3053,_T_3042};
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_rspageQ_3 <= 4'h0;
+    end else begin
+      buf_rspageQ_3 <= {_T_3068,_T_3057};
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4157 <= 1'h0;
+    end else if (buf_ldfwd_en_3) begin
+      if (_T_3957) begin
+        _T_4157 <= 1'h0;
+      end else if (_T_3980) begin
+        _T_4157 <= 1'h0;
+      end else begin
+        _T_4157 <= _T_3984;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4155 <= 1'h0;
+    end else if (buf_ldfwd_en_2) begin
+      if (_T_3764) begin
+        _T_4155 <= 1'h0;
+      end else if (_T_3787) begin
+        _T_4155 <= 1'h0;
+      end else begin
+        _T_4155 <= _T_3791;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4153 <= 1'h0;
+    end else if (buf_ldfwd_en_1) begin
+      if (_T_3571) begin
+        _T_4153 <= 1'h0;
+      end else if (_T_3594) begin
+        _T_4153 <= 1'h0;
+      end else begin
+        _T_4153 <= _T_3598;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4151 <= 1'h0;
+    end else if (buf_ldfwd_en_0) begin
+      if (_T_3378) begin
+        _T_4151 <= 1'h0;
+      end else if (_T_3401) begin
+        _T_4151 <= 1'h0;
+      end else begin
+        _T_4151 <= _T_3405;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_ldfwdtag_0 <= 2'h0;
+    end else if (buf_ldfwd_en_0) begin
+      if (_T_3378) begin
+        buf_ldfwdtag_0 <= 2'h0;
+      end else if (_T_3401) begin
+        buf_ldfwdtag_0 <= 2'h0;
+      end else if (_T_3405) begin
+        buf_ldfwdtag_0 <= obuf_rdrsp_tag[1:0];
+      end else begin
+        buf_ldfwdtag_0 <= 2'h0;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dualtag_0 <= 2'h0;
+    end else if (buf_wr_en_0) begin
+      if (ibuf_drainvec_vld[0]) begin
+        buf_dualtag_0 <= ibuf_dualtag;
+      end else if (_T_3193) begin
+        buf_dualtag_0 <= WrPtr0_r;
+      end else begin
+        buf_dualtag_0 <= WrPtr1_r;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_ldfwdtag_3 <= 2'h0;
+    end else if (buf_ldfwd_en_3) begin
+      if (_T_3957) begin
+        buf_ldfwdtag_3 <= 2'h0;
+      end else if (_T_3980) begin
+        buf_ldfwdtag_3 <= 2'h0;
+      end else if (_T_3984) begin
+        buf_ldfwdtag_3 <= obuf_rdrsp_tag[1:0];
+      end else begin
+        buf_ldfwdtag_3 <= 2'h0;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_ldfwdtag_2 <= 2'h0;
+    end else if (buf_ldfwd_en_2) begin
+      if (_T_3764) begin
+        buf_ldfwdtag_2 <= 2'h0;
+      end else if (_T_3787) begin
+        buf_ldfwdtag_2 <= 2'h0;
+      end else if (_T_3791) begin
+        buf_ldfwdtag_2 <= obuf_rdrsp_tag[1:0];
+      end else begin
+        buf_ldfwdtag_2 <= 2'h0;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_ldfwdtag_1 <= 2'h0;
+    end else if (buf_ldfwd_en_1) begin
+      if (_T_3571) begin
+        buf_ldfwdtag_1 <= 2'h0;
+      end else if (_T_3594) begin
+        buf_ldfwdtag_1 <= 2'h0;
+      end else if (_T_3598) begin
+        buf_ldfwdtag_1 <= obuf_rdrsp_tag[1:0];
+      end else begin
+        buf_ldfwdtag_1 <= 2'h0;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dualtag_1 <= 2'h0;
+    end else if (buf_wr_en_1) begin
+      if (ibuf_drainvec_vld[1]) begin
+        buf_dualtag_1 <= ibuf_dualtag;
+      end else if (_T_3202) begin
+        buf_dualtag_1 <= WrPtr0_r;
+      end else begin
+        buf_dualtag_1 <= WrPtr1_r;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dualtag_2 <= 2'h0;
+    end else if (buf_wr_en_2) begin
+      if (ibuf_drainvec_vld[2]) begin
+        buf_dualtag_2 <= ibuf_dualtag;
+      end else if (_T_3211) begin
+        buf_dualtag_2 <= WrPtr0_r;
+      end else begin
+        buf_dualtag_2 <= WrPtr1_r;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      buf_dualtag_3 <= 2'h0;
+    end else if (buf_wr_en_3) begin
+      if (ibuf_drainvec_vld[3]) begin
+        buf_dualtag_3 <= ibuf_dualtag;
+      end else if (_T_3220) begin
+        buf_dualtag_3 <= WrPtr0_r;
+      end else begin
+        buf_dualtag_3 <= WrPtr1_r;
+      end
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4186 <= 1'h0;
+    end else if (buf_wr_en_0) begin
+      _T_4186 <= buf_unsign_in[0];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4189 <= 1'h0;
+    end else if (buf_wr_en_1) begin
+      _T_4189 <= buf_unsign_in[1];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4192 <= 1'h0;
+    end else if (buf_wr_en_2) begin
+      _T_4192 <= buf_unsign_in[2];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4195 <= 1'h0;
+    end else if (buf_wr_en_3) begin
+      _T_4195 <= buf_unsign_in[3];
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4257 <= 1'h0;
+    end else begin
+      _T_4257 <= _T_4255 & buf_rst_3;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4253 <= 1'h0;
+    end else begin
+      _T_4253 <= _T_4251 & buf_rst_2;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4249 <= 1'h0;
+    end else begin
+      _T_4249 <= _T_4247 & buf_rst_1;
+    end
+  end
+  always @(posedge io_lsu_bus_buf_c1_clk or posedge reset) begin
+    if (reset) begin
+      _T_4245 <= 1'h0;
+    end else begin
+      _T_4245 <= _T_4243 & buf_rst_0;
+    end
+  end
+  always @(posedge io_lsu_c2_r_clk or posedge reset) begin
+    if (reset) begin
+      lsu_nonblock_load_valid_r <= 1'h0;
+    end else begin
+      lsu_nonblock_load_valid_r <= io_lsu_nonblock_load_valid_m;
+    end
+  end
+  always @(posedge io_lsu_c2_r_clk or posedge reset) begin
+    if (reset) begin
+      _T_4842 <= 1'h0;
+    end else begin
+      _T_4842 <= _T_4839 & _T_4372;
+    end
+  end
+endmodule
diff --git a/src/main/scala/include/el2_bundle.scala b/src/main/scala/include/el2_bundle.scala
index 0fca8cec..ce98a498 100644
--- a/src/main/scala/include/el2_bundle.scala
+++ b/src/main/scala/include/el2_bundle.scala
@@ -169,19 +169,19 @@ class el2_alu_pkt_t extends Bundle {
 }
 
 class el2_lsu_pkt_t extends Bundle {
-  val fast_int   = UInt(1.W)
-  val by         = UInt(1.W)
-  val half       = UInt(1.W)
-  val word       = UInt(1.W)
-  val dword      = UInt(1.W)    // for dma
-  val load       = UInt(1.W)
-  val store      = UInt(1.W)
-  val unsign     = UInt(1.W)
-  val dma        = UInt(1.W)    // dma pkt
-  val store_data_bypass_d  = UInt(1.W)
-  val load_ldst_bypass_d   = UInt(1.W)
-  val store_data_bypass_m  = UInt(1.W)
-  val valid      = UInt(1.W)
+  val fast_int   = Bool()
+  val by         = Bool()
+  val half       = Bool()
+  val word       = Bool()
+  val dword      = Bool()    // for dma
+  val load       = Bool()
+  val store      = Bool()
+  val unsign     = Bool()
+  val dma        = Bool()    // dma pkt
+  val store_data_bypass_d  = Bool()
+  val load_ldst_bypass_d   = Bool()
+  val store_data_bypass_m  = Bool()
+  val valid      = Bool()
 }
 
 class el2_lsu_error_pkt_t extends Bundle {
diff --git a/src/main/scala/lsu/el2_lsu_bus_buffer.scala b/src/main/scala/lsu/el2_lsu_bus_buffer.scala
index f90e33ca..e2ee3ebf 100644
--- a/src/main/scala/lsu/el2_lsu_bus_buffer.scala
+++ b/src/main/scala/lsu/el2_lsu_bus_buffer.scala
@@ -1,9 +1,8 @@
-/* package lsu
+package lsu
 import chisel3._
 import chisel3.util._
 import lib._
 import include._
-import snapshot._
 import chisel3.experimental.{ChiselEnum, chiselName}
 import chisel3.util.ImplicitConversions.intToUInt
 
@@ -108,6 +107,8 @@ class  el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib {
     val lsu_axi_rready = Output(Bool())
 
   })
+  def indexing(in : UInt, index : UInt) = Mux1H((0 until math.pow(2, index.getWidth).asInstanceOf[Int]).map(i=>(index===i.U)->in(i)))
+  def indexing(in : Vec[UInt], index : UInt) = Mux1H((0 until math.pow(2, index.getWidth).asInstanceOf[Int]).map(i=>(index===i.U)->in(i)))
 
   val DEPTH = LSU_NUM_NBLOAD
   val DEPTH_LOG2 = LSU_NUM_NBLOAD_WIDTH
@@ -127,20 +128,73 @@ class  el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib {
   val ld_addr_hitvec_lo = (0 until DEPTH).map(i => (io.lsu_addr_m(31, 2) === buf_addr(i)(31, 2)) & buf_write(i) & (buf_state(i) =/= idle_C) & io.lsu_busreq_m)
   val ld_addr_hitvec_hi = (0 until DEPTH).map(i => (io.end_addr_m(31, 2) === buf_addr(i)(31, 2)) & buf_write(i) & (buf_state(i) =/= idle_C) & io.lsu_busreq_m)
   val ld_byte_hitvecfn_lo = Wire(Vec(4, UInt(DEPTH.W)))
-  val ld_byte_ibuf_hit_lo = WireInit(UInt(4.W))
+  val ld_byte_ibuf_hit_lo = WireInit(UInt(4.W), 0.U)
   val ld_byte_hitvecfn_hi = Wire(Vec(4, UInt(DEPTH.W)))
-  val ld_byte_ibuf_hit_hi = WireInit(UInt(4.W))
+  val ld_byte_ibuf_hit_hi = WireInit(UInt(4.W), 0.U)
   val buf_byteen = Wire(Vec(DEPTH, UInt(4.W)))
+  buf_byteen := buf_byteen.map(i=>0.U)
+  val buf_nxtstate = Wire(Vec(DEPTH, UInt(3.W)))
+  buf_nxtstate := buf_nxtstate.map(i=>0.U)
+  val buf_wr_en = Wire(Vec(DEPTH, Bool()))
+  buf_wr_en := buf_wr_en.map(i=> false.B)
+  val buf_data_en = Wire(Vec(DEPTH, Bool()))
+  buf_data_en := buf_data_en.map(i=> false.B)
+  val buf_state_bus_en = Wire(Vec(DEPTH, Bool()))
+  buf_state_bus_en := buf_state_bus_en.map(i=> false.B)
+  val buf_ldfwd_in = Wire(Vec(DEPTH, Bool()))
+  buf_ldfwd_in := buf_ldfwd_in.map(i=> false.B)
+  val buf_ldfwd_en = Wire(Vec(DEPTH, Bool()))
+  buf_ldfwd_en := buf_ldfwd_en.map(i=> false.B)
+  val buf_data_in = Wire(Vec(DEPTH, UInt(DEPTH.W)))
+  buf_data_in := buf_data_in.map(i=> 0.U)
+  val buf_ldfwdtag_in = Wire(Vec(DEPTH, UInt(DEPTH_LOG2.W)))
+  buf_ldfwdtag_in := buf_ldfwdtag_in.map(i=> 0.U)
+  val buf_error_en = Wire(Vec(DEPTH, Bool()))
+  buf_error_en := buf_error_en.map(i=> false.B)
+  val bus_rsp_read_error = WireInit(Bool(), false.B)
+  val bus_rsp_rdata = WireInit(UInt(64.W), 0.U)
+  val bus_rsp_write_error = WireInit(Bool(), false.B)
+  val buf_dualtag = Wire(Vec(DEPTH, UInt(DEPTH_LOG2.W)))
+  buf_dualtag := buf_dualtag.map(i=> 0.U)
+  val buf_ldfwd = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_resp_state_bus_en = Wire(Vec(DEPTH, Bool()))
+  buf_resp_state_bus_en := buf_resp_state_bus_en.map(i=> false.B)
+  val any_done_wait_state = WireInit(Bool(), false.B)
+  val bus_rsp_write = WireInit(Bool(), false.B)
+  val bus_rsp_write_tag = WireInit(UInt(LSU_BUS_TAG.W), 0.U)
+  val buf_ldfwdtag = Wire(Vec(DEPTH, UInt(DEPTH_LOG2.W)))
+  buf_ldfwdtag := buf_ldfwdtag.map(i=> 0.U)
+  val buf_rst = Wire(Vec(DEPTH, Bool()))
+  buf_rst := buf_rst.map(i=> false.B)
+  val ibuf_drainvec_vld = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_byteen_in = Wire(Vec(DEPTH, UInt(3.W)))
+  buf_byteen_in := buf_byteen_in.map(i=> 0.U)
+  val buf_addr_in = Wire(Vec(DEPTH, UInt(32.W)))
+  buf_addr_in := buf_addr_in.map(i=> 0.U)
+  val buf_dual_in = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_samedw_in = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_nomerge_in = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_dualhi_in = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_dualtag_in = Wire(Vec(DEPTH, UInt(DEPTH_LOG2.W)))
+  buf_dualtag_in := buf_dualtag_in.map(i=> 0.U)
+  val buf_sideeffect_in = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_unsign_in = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_sz_in = Wire(Vec(DEPTH, UInt(2.W)))
+  buf_sz_in := buf_sz_in.map(i=> 0.U)
+  val buf_write_in = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_unsign = WireInit(UInt(DEPTH.W), 0.U)
+  val buf_error = WireInit(UInt(DEPTH.W), 0.U)
 
-  io.ld_byte_hit_buf_lo := (0 until 4).map(i => ld_byte_hitvecfn_lo(i).orR | ld_byte_ibuf_hit_lo(i)).reverse.reduce(Cat(_, _))
-  io.ld_byte_hit_buf_hi := (0 until 4).map(i => ld_byte_hitvecfn_hi(i).orR | ld_byte_ibuf_hit_hi(i)).reverse.reduce(Cat(_, _))
+  io.ld_byte_hit_buf_lo := (0 until 4).map(i => (ld_byte_hitvecfn_lo(i).orR | ld_byte_ibuf_hit_lo(i)).asUInt).reverse.reduce(Cat(_, _))
+  io.ld_byte_hit_buf_hi := (0 until 4).map(i => (ld_byte_hitvecfn_hi(i).orR | ld_byte_ibuf_hit_hi(i)).asUInt).reverse.reduce(Cat(_, _))
 
-  val ld_byte_hitvec_lo = (0 until 4).map(j => (0 until DEPTH).map(i => ld_addr_hitvec_lo(i) & buf_byteen(i)(j) & ldst_byteen_lo_m(j)).reverse.reduce(Cat(_, _)))
-  val ld_byte_hitvec_hi = (0 until 4).map(j => (0 until DEPTH).map(i => ld_addr_hitvec_hi(i) & buf_byteen(i)(j) & ldst_byteen_hi_m(j)).reverse.reduce(Cat(_, _)))
+  val ld_byte_hitvec_lo = (0 until 4).map(j => (0 until DEPTH).map(i => (ld_addr_hitvec_lo(i) & buf_byteen(i)(j) & ldst_byteen_lo_m(j)).asUInt).reverse.reduce(Cat(_, _)))
+  val ld_byte_hitvec_hi = (0 until 4).map(j => (0 until DEPTH).map(i => (ld_addr_hitvec_hi(i) & buf_byteen(i)(j) & ldst_byteen_hi_m(j)).asUInt).reverse.reduce(Cat(_, _)))
 
   val buf_age_younger = Wire(Vec(DEPTH, UInt(DEPTH.W)))
-  ld_byte_hitvecfn_lo := (0 until 4).map(j => (0 until DEPTH).map(i => ld_byte_hitvec_lo(j)(i) & !(ld_byte_hitvec_lo(j) & buf_age_younger(i)).orR & !ld_byte_ibuf_hit_lo(j)).reverse.reduce(Cat(_, _)))
-  ld_byte_hitvecfn_hi := (0 until 4).map(j => (0 until DEPTH).map(i => ld_byte_hitvec_hi(j)(i) & !(ld_byte_hitvec_hi(j) & buf_age_younger(i)).orR & !ld_byte_ibuf_hit_hi(j)).reverse.reduce(Cat(_, _)))
+  buf_age_younger := buf_age_younger.map(i=> 0.U)
+  ld_byte_hitvecfn_lo := (0 until 4).map(j => (0 until DEPTH).map(i => (ld_byte_hitvec_lo(j)(i) & !(ld_byte_hitvec_lo(j) & buf_age_younger(i)).orR & !ld_byte_ibuf_hit_lo(j)).asUInt).reverse.reduce(Cat(_, _)))
+  ld_byte_hitvecfn_hi := (0 until 4).map(j => (0 until DEPTH).map(i => (ld_byte_hitvec_hi(j)(i) & !(ld_byte_hitvec_hi(j) & buf_age_younger(i)).orR & !ld_byte_ibuf_hit_hi(j)).asUInt).reverse.reduce(Cat(_, _)))
 
   val ibuf_addr = WireInit(UInt(32.W), 0.U)
   val ibuf_write = WireInit(Bool(), false.B)
@@ -154,8 +208,8 @@ class  el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib {
     ld_byte_ibuf_hit_hi := ld_addr_ibuf_hit_hi & ibuf_byteen(i) & ldst_byteen_hi_m(i)
   }
   val buf_data = Wire(Vec(DEPTH, UInt(32.W)))
-
-  val fwd_data = WireInit(UInt(32.W))
+  buf_data := buf_data.map(i=> 0.U)
+  val fwd_data = WireInit(UInt(32.W), 0.U)
 
   io.ld_fwddata_buf_lo := Cat((0 until DEPTH).map(i => Fill(8, ld_byte_hitvecfn_lo(3)(i)) & buf_data(i)(31, 23)).reduce(_ | _),
     (0 until DEPTH).map(i => Fill(8, ld_byte_hitvecfn_lo(2)(i)) & buf_data(i)(23, 16)).reduce(_ | _),
@@ -190,7 +244,7 @@ class  el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib {
   val ibuf_timer = WireInit(UInt(TIMER_LOG2.W), 0.U)
   val ibuf_merge_en = WireInit(Bool(), false.B)
   val ibuf_merge_in = WireInit(Bool(), false.B)
-  val ibuf_drain_vld = ibuf_valid & (((ibuf_wr_en | (ibuf_timer === TIMER_MAX.U)) & !(ibuf_merge_en & ibuf_merge_in))
+  ibuf_drain_vld := ibuf_valid & (((ibuf_wr_en | (ibuf_timer === TIMER_MAX.U)) & !(ibuf_merge_en & ibuf_merge_in))
     | ibuf_byp | ibuf_force_drain | ibuf_sideeffect | !ibuf_write | bus_coalescing_disable)
   val ibuf_tag = WireInit(UInt(DEPTH_LOG2.W), 0.U)
   val WrPtr1_r = WireInit(UInt(DEPTH_LOG2.W), 0.U)
@@ -206,430 +260,378 @@ class  el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib {
 
   val ibuf_data_in = (0 until 4).map(i => Mux(ibuf_merge_en & ibuf_merge_in,
     Mux(ldst_byteen_lo_r(i), store_data_lo_r((8 * i) + 7, 8 * i), ibuf_data((8 * i) + 7, 8 * i)), ibuf_data((8 * i) + 7, 8 * i))).reverse.reduce(Cat(_, _))
+  val ibuf_timer_in = Mux(ibuf_wr_en, 0.U, Mux((ibuf_timer<TIMER_MAX.U).asBool(), ibuf_timer+1.U, ibuf_timer))
 
-  //ibuf_valid := RegEnable(true.B, false.B, )
-  ibuf_tag := RegEnable(ibuf_tag_in, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())
-  val ibuf_dualtag = RegEnable(ibuf_dualtag_in, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())
-  val ibuf_dual = RegEnable(io.ldst_dual_r, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())
-  val ibuf_samedw = RegEnable(ldst_samedw_r, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())
-  val ibuf_nomerge = RegEnable(io.no_dword_merge_r, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())
-  ibuf_sideeffect := RegEnable(io.is_sideeffects_r, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())
-  val ibuf_unsign = RegEnable(io.lsu_pkt_r.unsign, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())
-  ibuf_write := rvdffe(btb_lru_b0_ns, 0.U, io.ifc_fetch_req_f | io.exu_mp_valid)
-}*/
-////
-////
-////
-////
-////
-////
-////
-////
-////  //Forwarding MUX
-////  io.ld_fwddata_buf_lo    := (0 until 4).map(i =>(Mux(ld_byte_ibuf_hit_lo(i),ibuf_data(i*8+7,i*8),Mux1H((0 until DEPTH).map(j =>(ld_byte_hitvecfn_lo(i)(j)) -> buf_data(j)(i*8+7,i*8)))))).reverse.reduce(Cat(_,_))
-////  io.ld_fwddata_buf_hi    := (0 until 4).map(i =>(Mux(ld_byte_ibuf_hit_hi(i),ibuf_data(i*8+7,i*8),Mux1H((0 until DEPTH).map(j =>(ld_byte_hitvecfn_hi(i)(j)) -> buf_data(j)(i*8+7,i*8)))))).reverse.reduce(Cat(_,_))
-////
-////  /////////////////////////////////////////////////////////////////////////////
-////  bus_coalescing_disable  := io.dec_tlu_wb_coalescing_disable | pt.BUILD_AHB_LITE
-////  ldst_byteen_r           := Mux1H(Seq(
-////    io.lsu_pkt_r.word.asBool -> 15.U(4.W),
-////    io.lsu_pkt_r.half.asBool -> 3.U(4.W),
-////    io.lsu_pkt_r.by.asBool   -> 1.U(4.W)
-////  ))
-////  val ldst_byteen_extended_r   = Cat(Fill(4,0.U),ldst_byteen_r(3,0)) << io.lsu_addr_r(1,0)
-////  val store_data_extended_r    = Cat(Fill(32,0.U),io.store_data_r(31,0)) << (8.U*io.lsu_addr_r(1,0))
-////  ldst_byteen_hi_r             := ldst_byteen_extended_r(7,4)
-////  ldst_byteen_lo_r             := ldst_byteen_extended_r(3,0)
-////  store_data_hi_r              := store_data_extended_r(63,32)
-////  store_data_lo_r              := store_data_extended_r(31, 0)
-////  ldst_samedw_r                := io.lsu_addr_r(3) === io.end_addr_r(3)
-////  is_aligned_r                 := Mux1H(Seq(
-////    io.lsu_pkt_r.by.asBool   -> true.B,
-////    io.lsu_pkt_r.half.asBool -> (io.lsu_addr_r(0).asUInt === 0.U),
-////    io.lsu_pkt_r.word.asBool -> (io.lsu_addr_r(1,0).asUInt === 0.U)
-////  ))
-////  ////////////////////////////////////////////////////////////////////////////
-////  ibuf_byp                  := (io.lsu_busreq_r & (io.lsu_pkt_r.load | io.no_word_merge_r) & !ibuf_valid).asBool
-////  ibuf_wr_en                := (io.lsu_busreq_r & io.lsu_commit_r & !ibuf_byp).asBool
-////  ibuf_rst                  := ((ibuf_drain_vld & !ibuf_wr_en) | io.dec_tlu_force_halt).asBool
-////  ibuf_force_drain          := (io.lsu_busreq_m & !io.lsu_busreq_r & ibuf_valid & (io.lsu_pkt_m.load | (ibuf_addr(31,2) =/= io.lsu_addr_m(31,2)))).asBool
-////  ibuf_drain_vld            := ibuf_valid & (((ibuf_wr_en | (ibuf_timer === (TIMER_MAX.asUInt(TIMER_LOG2.W)))) & !(ibuf_merge_en & ibuf_merge_in)) |
-////    ibuf_byp | ibuf_force_drain | ibuf_sideeffect | !ibuf_write | bus_coalescing_disable)
-////  ibuf_tag_in               := Mux((ibuf_merge_en & ibuf_merge_in), ibuf_tag(DEPTH_LOG2-1,0),Mux(io.ldst_dual_r,WrPtr1_r,WrPtr0_r))
-////  ibuf_dualtag_in           := WrPtr0_r(DEPTH_LOG2-1,0)
-////  ibuf_sz_in                := Cat(io.lsu_pkt_r.word,io.lsu_pkt_r.half)
-////  ibuf_addr_in              := Mux(io.ldst_dual_r,io.end_addr_r,io.lsu_addr_r)
-////  ibuf_byteen_in            := Mux(ibuf_merge_en & ibuf_merge_in, ibuf_byteen(3,0) | ldst_byteen_lo_r(3,0), Mux(io.ldst_dual_r, ldst_byteen_hi_r(3,0), ldst_byteen_lo_r(3,0)))
-////  ibuf_data_in              := (0 until 4).map(i =>(Mux((ibuf_merge_en & ibuf_merge_in),Mux(ldst_byteen_lo_r(i),store_data_lo_r((8*i)+7,(8*i)) , ibuf_data((8*i)+7,(8*i))),Mux(io.ldst_dual_r, store_data_hi_r((8*i)+7,(8*i)), store_data_lo_r((8*i)+7,(8*i)))))).reverse.reduce(Cat(_,_))
-////  ibuf_timer_in             := Mux(ibuf_wr_en, 0.U, Mux(ibuf_timer < (TIMER_MAX.asUInt(TIMER_LOG2.W)), ibuf_timer+1.U, ibuf_timer))
-////  ibuf_byteen_out           := (0 until 4).map(i =>(Mux((ibuf_merge_en & ~ibuf_merge_in),ibuf_byteen(i) | ldst_byteen_lo_r(i), ibuf_byteen(i))).asUInt).reverse.reduce(Cat(_,_))
-////  ibuf_data_out             := (0 until 4).map(i =>(Mux((ibuf_merge_en & ~ibuf_merge_in),Mux(ldst_byteen_lo_r(i),store_data_lo_r((8*i)+7,(8*i)) , ibuf_data((8*i)+7,(8*i))),ibuf_data(i*8+7,i*8)))).reverse.reduce(Cat(_,_))
-////  ibuf_merge_en             := io.lsu_busreq_r & io.lsu_commit_r & io.lsu_pkt_r.store & ibuf_valid & ibuf_write & io.lsu_addr_r(31,2)===ibuf_addr(31,2) & ~io.is_sideeffects_r & ~bus_coalescing_disable
-////  ibuf_merge_in             := ~io.ldst_dual_r.asUInt()
-////
-////  withClock(io.lsu_free_c2_clk){
-////    ibuf_valid := RegNext(Mux(ibuf_wr_en.asBool(),1.U ,ibuf_valid) & !ibuf_rst, false.B)
-////    ibuf_timer        := RegNext(ibuf_timer_in            ,init = 0.U)
-////  }
-////  withClock(io.lsu_bus_ibuf_c1_clk) {
-////    ibuf_dual         := RegEnable(io.ldst_dual_r         ,init = 0.U, ibuf_wr_en)
-////    ibuf_samedw       := RegEnable(ldst_samedw_r          ,init = 0.U, ibuf_wr_en)
-////    ibuf_nomerge      := RegEnable(io.no_dword_merge_r    ,init = 0.U, ibuf_wr_en)
-////    ibuf_sideeffect   := RegEnable(io.is_sideeffects_r    ,init = 0.U, ibuf_wr_en)
-////    ibuf_unsign       := RegEnable(io.lsu_pkt_r.unsign    ,init = 0.U, ibuf_wr_en)
-////    ibuf_write        := RegEnable(io.lsu_pkt_r.store     ,init = 0.U, ibuf_wr_en)
-////    ibuf_sz           := RegEnable(ibuf_sz_in(1, 0)       ,init = 0.U, ibuf_wr_en)
-////    ibuf_byteen       := RegEnable(ibuf_byteen_in         ,init = 0.U, ibuf_wr_en)
-////    ibuf_addr         := RegEnable(ibuf_addr_in(31, 0)    ,init = 0.U, ibuf_wr_en)
-////    ibuf_data         := RegEnable(ibuf_data_in(31, 0)    ,init = 0.U, ibuf_wr_en)
-////    ibuf_tag          := RegEnable(ibuf_tag_in            ,init = 0.U, ibuf_wr_en)
-////    ibuf_dualtag      := RegEnable(ibuf_dualtag_in        ,init = 0.U, ibuf_wr_en)
-////  }
-////  ///////////////////////////////////////////////////////////////////////////////////////
-////
-////  ibuf_buf_byp          := (ibuf_byp & (buf_numvld_pend_any(3,0) === 0.U) & (~io.lsu_pkt_r.store | io.no_dword_merge_r))
-////  obuf_force_wr_en      := io.lsu_busreq_m & ~io.lsu_busreq_r & ~ibuf_valid & (buf_numvld_cmd_any(3,0) === 1.U(4.W)) & (io.lsu_addr_m(31,2) =/= buf_addr(CmdPtr0)(31,2))
-////  obuf_wr_wait          := (buf_numvld_wrcmd_any(3,0) === 1.U(4.W)) & (buf_numvld_cmd_any(3,0) === 1.U(4.W)) & (obuf_wr_timer =/= (TIMER_MAX.asUInt(TIMER_LOG2.W))) &
-////    ~bus_coalescing_disable & ~buf_nomerge(CmdPtr0) & ~buf_sideeffect(CmdPtr0) & ~obuf_force_wr_en
-////  obuf_wr_en            := ((ibuf_buf_byp & io.lsu_commit_r & ~(io.is_sideeffects_r & bus_sideeffect_pend)) |
-////    ((buf_state(CmdPtr0) === cmd_C) & found_cmdptr0 & ~buf_cmd_state_bus_en(CmdPtr0) & ~(buf_sideeffect(CmdPtr0) & bus_sideeffect_pend) &
-////      (~(buf_dual(CmdPtr0) & buf_samedw(CmdPtr0) & ~buf_write(CmdPtr0)) | found_cmdptr1 | buf_nomerge(CmdPtr0) | obuf_force_wr_en))) &
-////    (bus_cmd_ready | ~obuf_valid | obuf_nosend) & ~obuf_wr_wait & ~lsu_bus_cntr_overflow & ~bus_addr_match_pending & io.lsu_bus_clk_en
-////  obuf_rst              := ((bus_cmd_sent | (obuf_valid & obuf_nosend)) & ~obuf_wr_en & io.lsu_bus_clk_en) | io.dec_tlu_force_halt
-////  obuf_write_in         := Mux(ibuf_buf_byp, io.lsu_pkt_r.store, buf_write(CmdPtr0))
-////  obuf_nosend_in        := (obuf_addr_in(31,3) === obuf_addr(31,3)) & obuf_aligned_in & ~obuf_sideeffect & ~obuf_write & ~obuf_write_in & ~io.dec_tlu_external_ldfwd_disable &
-////    ((obuf_valid & ~obuf_nosend) | (obuf_rdrsp_pend & ~(bus_rsp_read & (bus_rsp_read_tag === obuf_rdrsp_tag))))
-////  obuf_rdrsp_pend_in    := (~(obuf_wr_en & ~obuf_nosend_in) & obuf_rdrsp_pend & ~(bus_rsp_read & (bus_rsp_read_tag === obuf_rdrsp_tag))) | ((bus_cmd_sent & ~obuf_write) & ~io.dec_tlu_force_halt)
-////  obuf_sideeffect_in    := Mux(ibuf_buf_byp, io.is_sideeffects_r, buf_sideeffect(CmdPtr0))
-////  obuf_aligned_in       := Mux(ibuf_buf_byp, is_aligned_r, (obuf_sz_in(1,0) === 0.U(2.W) | (obuf_sz_in(0) & ~obuf_addr_in(0)) | (obuf_sz_in(1) & ~(obuf_addr_in(1,0).orR))))
-////  obuf_addr_in          := Mux(ibuf_buf_byp, io.lsu_addr_r, buf_addr(CmdPtr0))
-////  obuf_data_in          := (0 until 8).map(i =>(Mux((obuf_merge_en & obuf_byteen1_in(i)),obuf_data1_in((8*i)+7,(8*i)), obuf_data0_in((8*i)+7,(8*i)))).asUInt).reverse.reduce(Cat(_,_))
-////  obuf_sz_in            := Mux(ibuf_buf_byp, Cat(io.lsu_pkt_r.word,io.lsu_pkt_r.half), buf_sz(CmdPtr0))
-////  obuf_byteen_in        := (0 until 8).map(i =>(obuf_byteen0_in(i) | (obuf_merge_en & obuf_byteen1_in(i))).asUInt).reverse.reduce(Cat(_,_))
-////  obuf_merge_in         := obuf_merge_en
-////  obuf_cmd_done_in      := ~(obuf_wr_en | obuf_rst) & (obuf_cmd_done  | bus_wcmd_sent )
-////  obuf_data_done_in     := ~(obuf_wr_en | obuf_rst) & (obuf_data_done | bus_wdata_sent)
-////  obuf_tag0_in          := Mux(ibuf_buf_byp, WrPtr0_r, CmdPtr0)
-////  obuf_tag1_in          := Mux(ibuf_buf_byp, WrPtr1_r, CmdPtr0)
-////  obuf_rdrsp_tag_in     := Mux((bus_cmd_sent & ~obuf_write), obuf_tag0(pt1.LSU_BUS_TAG-1,0), obuf_rdrsp_tag(pt1.LSU_BUS_TAG-1,0))
-////
-////  obuf_merge_en         := ((CmdPtr0 =/= CmdPtr1) & found_cmdptr0 & found_cmdptr1 & (buf_state(CmdPtr0) === cmd_C) & (buf_state(CmdPtr1) === cmd_C) &
-////    ~buf_cmd_state_bus_en(CmdPtr0) & ~buf_sideeffect(CmdPtr0) &
-////    ((buf_write(CmdPtr0) & buf_write(CmdPtr1) & (buf_addr(CmdPtr0)(31,3) === buf_addr(CmdPtr1)(31,3)) & ~bus_coalescing_disable & ~pt.BUILD_AXI_NATIVE) |
-////      (~buf_write(CmdPtr0) & buf_dual(CmdPtr0) & ~buf_dualhi(CmdPtr0) & buf_samedw(CmdPtr0)))) |
-////    (ibuf_buf_byp & ldst_samedw_r & io.ldst_dual_r)
-////  obuf_wr_timer_in     := Mux(obuf_wr_en, 0.U, Mux(((buf_numvld_cmd_any > 0.U(4.W)) & (obuf_wr_timer < TIMER_MAX.asUInt(TIMER_LOG2.W))), (obuf_wr_timer + 1.U), obuf_wr_timer))
-////  obuf_byteen0_in      := Mux(ibuf_buf_byp, Mux(io.lsu_addr_r(2), Cat(ldst_byteen_lo_r(3,0),0.U(4.W)),  Cat(0.U(4.W),ldst_byteen_lo_r(3,0))),    Mux(buf_addr(CmdPtr0)(2), Cat(buf_byteen(CmdPtr0),0.U(4.W)), Cat(0.U(4.W),buf_byteen(CmdPtr0))))
-////  obuf_byteen1_in      := Mux(ibuf_buf_byp, Mux(io.end_addr_r(2), Cat(ldst_byteen_hi_r(3,0),0.U(4.W)),  Cat(0.U(4.W),ldst_byteen_hi_r(3,0))),    Mux(buf_addr(CmdPtr1)(2), Cat(buf_byteen(CmdPtr1),0.U(4.W)), Cat(0.U(4.W),buf_byteen(CmdPtr1))))
-////  obuf_data0_in        := Mux(ibuf_buf_byp, Mux(io.lsu_addr_r(2), Cat(store_data_lo_r(31,0),0.U(32.W)), Cat(0.U(32.W),store_data_lo_r(31,0))),   Mux(buf_addr(CmdPtr0)(2), Cat(buf_data(CmdPtr0), 0.U(32.W)), Cat(0.U(32.W), buf_data(CmdPtr0))))
-////  obuf_data1_in        := Mux(ibuf_buf_byp, Mux(io.lsu_addr_r(2), Cat(store_data_hi_r(31,0),0.U(32.W)), Cat(0.U(32.W),store_data_hi_r(31,0))),   Mux(buf_addr(CmdPtr1)(2), Cat(buf_data(CmdPtr1), 0.U(32.W)), Cat(0.U(32.W), buf_data(CmdPtr1))))
-////
-////  obuf_addr            := RegEnable(obuf_addr_in        , init = 0.U, obuf_wr_en)
-////  obuf_data            := RegEnable(obuf_data_in        , init = 0.U, obuf_wr_en)
-////  withClock(io.lsu_busm_clk){
-////    obuf_rdrsp_pend   := RegNext(obuf_rdrsp_pend_in    , init = 0.U)
-////    obuf_rdrsp_tag    := RegNext(obuf_rdrsp_tag_in     , init = 0.U)
-////    obuf_cmd_done     := RegNext(obuf_cmd_done_in      , init = 0.U)
-////    obuf_data_done    := RegNext(obuf_data_done_in     , init = 0.U)
-////    obuf_wr_timer     := RegNext(obuf_wr_timer_in      , init = 0.U)
-////    obuf_wr_enQ       := RegNext(obuf_wr_en            , init = 0.U)
-////  }
-////  withClock(io.lsu_free_c2_clk){
-////    obuf_valid := RegNext(Mux(obuf_wr_en.asBool(),1.U ,obuf_valid) & !obuf_rst, false.B)
-////    obuf_nosend       := RegEnable(obuf_nosend_in      , init = 0.U, obuf_wr_en)
-////  }
-////  withClock(io.lsu_bus_obuf_c1_clk){
-////    obuf_write        := RegEnable(obuf_write_in       , init = 0.U, obuf_wr_en)
-////    obuf_sideeffect   := RegEnable(obuf_sideeffect_in  , init = 0.U, obuf_wr_en)
-////    obuf_sz           := RegEnable(obuf_sz_in          , init = 0.U, obuf_wr_en)
-////    obuf_byteen       := RegEnable(obuf_byteen_in      , init = 0.U, obuf_wr_en)
-////    obuf_merge        := RegEnable(obuf_merge_in       , init = 0.U, obuf_wr_en)
-////    obuf_tag0         := RegEnable(obuf_tag0_in        , init = 0.U, obuf_wr_en)
-////    obuf_tag1         := RegEnable(obuf_tag1_in        , init = 0.U, obuf_wr_en)
-////  }
-////  ////////////////////////////////////////////////////////////////////////////////////
-////
-////  // WrPtr0_m := PriorityMux((0 until DEPTH).map(i =>(((buf_state(i)===IDLE.U) & !((ibuf_valid & (ibuf_tag====i.U)) | (io.lsu_busreq_r & ((WrPtr0_r === i) | (io.ldst_dual_r & (WrPtr1_r === i)))))).asBool -> i.asUInt(DEPTH_LOG2.W))))
-////  val test_seq = (0 until DEPTH).map(i=>((buf_state(i)===idle_C) & !((ibuf_valid & ibuf_tag===i.U) |
-////    (io.lsu_busreq_r & ((WrPtr0_r===i.U) | (io.ldst_dual_r & (WrPtr1_r===i.U)))))).asBool() -> i.U)
-////  WrPtr0_m := MuxCase(0.U, test_seq)
-////  val test_seq2 = (0 until DEPTH).map(i=>((buf_state(i) === idle_C) & !((ibuf_valid & (ibuf_tag === i.U)) |
-////    (io.lsu_busreq_m & (WrPtr0_m === i.U)) | (io.lsu_busreq_r & (WrPtr0_r === i.U) |
-////    (io.ldst_dual_r & (WrPtr1_r === i.U))))).asBool -> i.U)
-////  WrPtr1_m             := MuxCase(0.U, test_seq2)
-////
-////  for {
-////    i <- 0 until DEPTH
-////    j <- 0 until DEPTH
-////  }{
-////    CmdPtr0Dec(i)           := ~(buf_age(i).asUInt.orR()) & (buf_state(i) === cmd_C) & ~buf_cmd_state_bus_en(i)
-////    CmdPtr1Dec(i)           := ~((buf_age(i).asUInt & ~CmdPtr0Dec.asUInt).orR()) & ~CmdPtr0Dec(i) & (buf_state(i) === cmd_C) & ~buf_cmd_state_bus_en(i)
-////    RspPtrDec(i)            := ~(buf_rsp_pickage(i).asUInt.orR()) & (buf_state(i) === done_wait_C)
-////
-////    buf_age_in(i)(j)        := (((buf_state(i) === idle_C) & buf_state_en(i)) &
-////      (((buf_state(j) === wait_C) | ((buf_state(j) === cmd_C) & ~buf_cmd_state_bus_en(j)))  |
-////        (ibuf_drain_vld & io.lsu_busreq_r & (ibuf_byp | io.ldst_dual_r) & (i === WrPtr0_r) & (j === ibuf_tag))  |
-////        (ibuf_byp & io.lsu_busreq_r & io.ldst_dual_r & (i === WrPtr1_r) & (j === WrPtr0_r))))  | buf_age(i)(j)
-////
-////    buf_age(i)(j)           := buf_ageQ(i)(j) & ~((buf_state(j) === cmd_C) & buf_cmd_state_bus_en(j))
-////    buf_age_younger(i)(j)   := Mux(i.asUInt(DEPTH_LOG2.W) === j.asUInt(DEPTH_LOG2.W), 0.U, (~buf_age(i)(j) & (buf_state(j) =/= idle_C)))
-////
-////    buf_rspage_set(i)(j)    := ((buf_state(i) === idle_C) & buf_state_en(i)) & (~((buf_state(j) === idle_C) | (buf_state(j) === done_C))  |
-////      (ibuf_drain_vld & io.lsu_busreq_r & (ibuf_byp | io.ldst_dual_r) & (i === WrPtr0_r) & (j === ibuf_tag)) |
-////      (ibuf_byp & io.lsu_busreq_r & io.ldst_dual_r & (i === WrPtr1_r) & (j === WrPtr0_r)))
-////    buf_rspage_in(i)(j)     := buf_rspage_set(i)(j) | buf_rspage(i)(j)
-////    buf_rspage(i)(j)        := buf_rspageQ(i)(j) & ~((buf_state(j) === done_C) | (buf_state(j) === idle_C))
-////    buf_rsp_pickage(i)(j)   := buf_rspageQ(i)(j) & (buf_state(j) === done_wait_C)
-////  }
-////
-////  CmdPtr0                 := PriorityEncoderOH(CmdPtr0Dec.asUInt)
-////  CmdPtr1                 := PriorityEncoderOH(CmdPtr1Dec.asUInt)
-////  RspPtr                  := PriorityEncoderOH(RspPtrDec.asUInt)
-////  found_cmdptr0           := CmdPtr0Dec.reduce(_|_)
-////  found_cmdptr1           := CmdPtr1Dec.reduce(_|_)
-////
-////  //////////////////////////       FSM       ///////////////////////////////////////
-////  for (i <- 0 until DEPTH){
-////    buf_nxtstate(i)            := idle_C
-////    buf_state_en(i)            := 0.U
-////    buf_cmd_state_bus_en(i)    := 0.U
-////    buf_resp_state_bus_en(i)   := 0.U
-////    buf_state_bus_en(i)        := 0.U
-////    buf_wr_en(i)               := 0.U
-////    buf_data_in(i)             := 0.U
-////    buf_data_en(i)             := 0.U
-////    buf_error_en(i)            := 0.U
-////    buf_rst(i)                 := 0.U
-////    buf_ldfwd_en(i)            := 0.U
-////    buf_ldfwd_in(i)            := 0.U
-////    buf_ldfwdtag_in(i)         := 0.U
-////
-////    ibuf_drainvec_vld(i)       := (ibuf_drain_vld & (i === ibuf_tag))
-////    buf_byteen_in(i)           := Mux(ibuf_drainvec_vld(i), ibuf_byteen_out(3,0), Mux((ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)).asBool(), ldst_byteen_hi_r(3, 0), ldst_byteen_lo_r(3, 0)))
-////    buf_addr_in(i)             := Mux(ibuf_drainvec_vld(i), ibuf_addr(31,0), Mux((ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)).asBool(), io.end_addr_r(31, 0), io.lsu_addr_r(31, 0)))
-////    buf_dual_in(i)             := Mux(ibuf_drainvec_vld(i), ibuf_dual, io.ldst_dual_r)
-////    buf_samedw_in(i)           := Mux(ibuf_drainvec_vld(i), ibuf_samedw, ldst_samedw_r)
-////    buf_nomerge_in(i)          := Mux(ibuf_drainvec_vld(i), (ibuf_nomerge | ibuf_force_drain), io.no_dword_merge_r)
-////    buf_dualhi_in(i)           := Mux(ibuf_drainvec_vld(i), ibuf_dual, (ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)))
-////    buf_dualtag_in(i)          := Mux(ibuf_drainvec_vld(i), ibuf_dualtag, Mux((ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)).asBool(), WrPtr0_r, WrPtr1_r))
-////    buf_sideeffect_in(i)       := Mux(ibuf_drainvec_vld(i), ibuf_sideeffect, io.is_sideeffects_r)
-////    buf_unsign_in(i)           := Mux(ibuf_drainvec_vld(i), ibuf_unsign, io.lsu_pkt_r.unsign)
-////    buf_sz_in(i)               := Mux(ibuf_drainvec_vld(i), ibuf_sz, Cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half))
-////    buf_write_in(i)            := Mux(ibuf_drainvec_vld(i), ibuf_write, io.lsu_pkt_r.store)
-////
-////    // Buffer entry state machine
-////    switch (buf_state(i)){
-////      is (idle_C) {
-////        buf_nxtstate(i)   := Mux(io.lsu_bus_clk_en.asBool(), cmd_C, wait_C)
-////        buf_state_en(i)   := (io.lsu_busreq_r & io.lsu_commit_r & (((ibuf_byp | io.ldst_dual_r) & !ibuf_merge_en & (i === WrPtr0_r)) | (ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)))) | (ibuf_drain_vld & (i === ibuf_tag))
-////        buf_wr_en(i)      := buf_state_en(i)
-////        buf_data_en(i)    := buf_state_en(i)
-////        buf_data_in(i)    := Mux((ibuf_drain_vld & (i === ibuf_tag)).asBool(), ibuf_data_out(31, 0), store_data_lo_r(31, 0))
-////      }
-////      is (wait_C) {
-////        buf_nxtstate(i)   := Mux(io.dec_tlu_force_halt.asBool(), idle_C, cmd_C)
-////        buf_state_en(i)   := io.lsu_bus_clk_en | io.dec_tlu_force_halt
-////      }
-////      is (cmd_C) {
-////        buf_nxtstate(i)         := Mux(io.dec_tlu_force_halt.asBool(), idle_C, Mux((obuf_nosend & bus_rsp_read & (bus_rsp_read_tag === obuf_rdrsp_tag)), done_wait_C, resp_C))
-////        buf_cmd_state_bus_en(i) := ((obuf_tag0 === i.asUInt(pt1.LSU_BUS_TAG.W)) | (obuf_merge & (obuf_tag1 === i.asUInt(pt1.LSU_BUS_TAG.W)))) & obuf_valid & obuf_wr_enQ
-////        buf_state_bus_en(i)     := buf_cmd_state_bus_en(i)
-////        buf_state_en(i)         := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt
-////        buf_ldfwd_in(i)         := 1.U(1.W)
-////        buf_ldfwd_en(i)         := buf_state_en(i) & !buf_write(i) & obuf_nosend & !io.dec_tlu_force_halt
-////        buf_ldfwdtag_in(i)      := (obuf_rdrsp_tag(pt1.LSU_BUS_TAG - 2,0)).asUInt
-////        buf_data_en(i)          := buf_state_bus_en(i) & io.lsu_bus_clk_en & obuf_nosend & bus_rsp_read
-////        buf_error_en(i)         := buf_state_bus_en(i) & io.lsu_bus_clk_en & obuf_nosend & bus_rsp_read_error
-////        buf_data_in(i)          := Mux(buf_error_en(i), bus_rsp_rdata(31,0), Mux(buf_addr(i)(2), bus_rsp_rdata(63, 32), bus_rsp_rdata(31, 0)))
-////      }
-////      is (resp_C){
-////        buf_nxtstate(i)         := Mux((io.dec_tlu_force_halt | (buf_write(i) & ~(pt.BUILD_AXI_NATIVE & bus_rsp_write_error))).asBool(), idle_C,
-////          Mux((buf_dual(i) & ~ buf_samedw(i) & ~ buf_write(i) &(buf_state(buf_dualtag(i)) =/= done_partial_C)), done_partial_C,
-////            Mux((buf_ldfwd(i) | any_done_wait_state | (buf_dual(i) & ~ buf_samedw(i) & ~ buf_write(i) & buf_ldfwd(buf_dualtag(i)) & (buf_state(buf_dualtag(i)) === done_partial_C) & any_done_wait_state)), done_wait_C, done_C)))
-////        buf_resp_state_bus_en(i):= (bus_rsp_write & (bus_rsp_write_tag === (i.asUInt(pt1.LSU_BUS_TAG.W)))) |
-////          (bus_rsp_read & ((bus_rsp_read_tag === (i.asUInt(pt1.LSU_BUS_TAG.W))) |
-////            (buf_ldfwd(i) & (bus_rsp_read_tag === (buf_ldfwdtag(i)))) |
-////            (buf_dual(i) & buf_dualhi(i) & ~buf_write(i) & buf_samedw(i) & (bus_rsp_read_tag === (buf_dualtag(i))))))
-////        buf_state_bus_en(i)     := buf_resp_state_bus_en(i)
-////        buf_state_en(i)         := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt
-////        buf_data_en(i)          := buf_state_bus_en(i) & bus_rsp_read & io.lsu_bus_clk_en
-////        buf_error_en(i)         := buf_state_bus_en(i) & io.lsu_bus_clk_en & ((bus_rsp_read_error & (bus_rsp_read_tag === (i.asUInt(pt1.LSU_BUS_TAG.W))) ) |
-////          (bus_rsp_read_error & buf_ldfwd(i) & (bus_rsp_read_tag === buf_ldfwdtag(i))) |
-////          (bus_rsp_write_error & pt.BUILD_AXI_NATIVE & (bus_rsp_write_tag ===  i.asUInt(pt1.LSU_BUS_TAG.W))))
-////        buf_data_in(i)          := Mux((buf_state_en(i) & !buf_error_en(i)), Mux(buf_addr(i)(2), bus_rsp_rdata(63, 32), bus_rsp_rdata(31, 0)), bus_rsp_rdata(31, 0))
-////      }
-////      is (done_partial_C){ // Other part of dual load hasn't returned
-////        buf_nxtstate(i)      := Mux(io.dec_tlu_force_halt.asBool(), idle_C, Mux((buf_ldfwd(i) | buf_ldfwd(buf_dualtag(i)) | any_done_wait_state), done_wait_C, done_C))
-////        buf_state_bus_en(i)  := bus_rsp_read & ((bus_rsp_read_tag === buf_dualtag(i).asUInt()) |
-////          (buf_ldfwd(buf_dualtag(i)) & (bus_rsp_read_tag === buf_ldfwdtag(buf_dualtag(i)).asUInt())))
-////        buf_state_en(i)      := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt
-////      }
-////      is (done_wait_C) { // WAIT state if there are multiple outstanding nb returns
-////        buf_nxtstate(i)   := Mux(io.dec_tlu_force_halt.asBool(), idle_C, done_C)
-////        buf_state_en(i)   := ((RspPtr === i.asUInt(DEPTH_LOG2.W)) |(buf_dual(i) & (buf_dualtag(i) === RspPtr))) | io.dec_tlu_force_halt
-////      }
-////      is (done_C) {
-////        buf_nxtstate(i)   := idle_C
-////        buf_rst(i)        := 1.U
-////        buf_state_en(i)   := 1.U
-////        buf_ldfwd_in(i)   := 0.U
-////        buf_ldfwd_en(i)   := buf_state_en(i)
-////      }
-////    }
-////
-////    buf_byteen(i)           := RegEnable(buf_byteen_in(i)       , init = 0.U   ,buf_wr_en(i))
-////    buf_data(i)             := RegEnable(buf_data_in(i)         , init = 0.U   ,buf_data_en(i))
-////    withClock(io.lsu_bus_buf_c1_clk){
-////      buf_state(i)         := RegEnable(buf_nxtstate(i)        , init = idle_C  ,buf_state_en(i))
-////      buf_dualtag(i)       := RegEnable(buf_dualtag_in(i)      , init = 0.U   ,buf_wr_en(i))
-////      buf_dual(i)          := RegEnable(buf_dual_in(i)         , init = 0.U   ,buf_wr_en(i))
-////      buf_samedw(i)        := RegEnable(buf_samedw_in(i)       , init = 0.U   ,buf_wr_en(i))
-////      buf_nomerge(i)       := RegEnable(buf_nomerge_in(i)      , init = 0.U   ,buf_wr_en(i))
-////      buf_dualhi(i)        := RegEnable(buf_dualhi_in(i)       , init = 0.U   ,buf_wr_en(i))
-////      buf_sideeffect(i)    := RegEnable(buf_sideeffect_in(i)   , init = 0.U   ,buf_wr_en(i))
-////      buf_unsign(i)        := RegEnable(buf_unsign_in(i)       , init = 0.U   ,buf_wr_en(i))
-////      buf_write(i)         := RegEnable(buf_write_in(i)        , init = 0.U   ,buf_wr_en(i))
-////      buf_sz(i)            := RegEnable(buf_sz_in(i)           , init = 0.U   ,buf_wr_en(i))
-////      buf_addr(i)          := RegEnable(buf_addr_in(i)         , init = 0.U   ,buf_wr_en(i))
-////      buf_ldfwd(i)         := RegEnable(buf_ldfwd_in(i)        , init = 0.U   ,buf_ldfwd_en(i))
-////      buf_ldfwdtag(i)      := RegEnable(buf_ldfwdtag_in(i)     , init = 0.U   ,buf_ldfwd_en(i))
-////      buf_error(i)         := RegEnable(~buf_rst(i)            , init = 0.U   ,(buf_error_en(i)|buf_rst(i)).asBool)
-////      buf_ageQ(i)          := RegNext(buf_age_in(i)            , init = VecInit((0 until 4).map(i=>false.B)))
-////      buf_rspageQ(i)       := RegNext(buf_rspage_in(i)         , init = VecInit((0 until 4).map(i=>false.B)))
-////    }
-////  }
-////
-////  //////////////////////////////////////////////////////////////////////////////////
-////  buf_numvld_any       := (io.lsu_busreq_m << io.ldst_dual_m) + (io.lsu_busreq_r << io.ldst_dual_r) + ibuf_valid +
-////    {for(i <- 0 until DEPTH) yield (  buf_state(i) =/= idle_C).asUInt                                                       }.reduce(_+_)
-////  buf_numvld_wrcmd_any := {for(i <- 0 until DEPTH) yield (( buf_state(i) === cmd_C) & ~buf_cmd_state_bus_en(i) & buf_write(i)).asUInt             }.reduce(_+_)
-////  buf_numvld_cmd_any   := {for(i <- 0 until DEPTH) yield (( buf_state(i) === cmd_C) & ~buf_cmd_state_bus_en(i)).asUInt                            }.reduce(_+_)
-////  buf_numvld_pend_any  := {for(i <- 0 until DEPTH) yield (((buf_state(i) === cmd_C) & ~buf_cmd_state_bus_en(i)) | (buf_state(i) === wait_C)).asUInt }.reduce(_+_)
-////  any_done_wait_state  := {for(i <- 0 until DEPTH) yield    buf_state(i) === done_wait_C                                                          }.reduce(_|_)
-////
-////  io.lsu_bus_buffer_pend_any       := buf_numvld_pend_any =/= 0.U
-////  io.lsu_bus_buffer_full_any       := Mux((io.ldst_dual_d & io.dec_lsu_valid_raw_d),buf_numvld_any(3,0) >= (DEPTH-1).asUInt(4.W), buf_numvld_any(3,0) === DEPTH.asUInt(4.W))
-////  io.lsu_bus_buffer_empty_any      := ~((0 until DEPTH).map(i =>(buf_state(i)).asUInt).reduce(_|_)) & ~ibuf_valid & ~obuf_valid
-////
-////  io.lsu_nonblock_load_valid_m     := io.lsu_busreq_m & io.lsu_pkt_m.valid & io.lsu_pkt_m.load & ~io.flush_m_up & ~ io.ld_full_hit_m
-////  io.lsu_nonblock_load_tag_m       := WrPtr0_m(DEPTH_LOG2-1,0)
-////  io.lsu_nonblock_load_inv_r       := lsu_nonblock_load_valid_r & ~io.lsu_commit_r
-////  io.lsu_nonblock_load_inv_tag_r   := WrPtr0_r(DEPTH_LOG2-1,0)
-////
-////  lsu_nonblock_load_data_ready     := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === done_C)  -> ~(pt.BUILD_AXI_NATIVE & buf_write(i))))
-////  io.lsu_nonblock_load_data_error  := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === done_C & ~buf_write(i))  -> (buf_error(i))))
-////  io.lsu_nonblock_load_data_tag    := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === done_C & (~buf_dual(i) | ~buf_dualhi(i)) & ~buf_write(i)) -> intToUInt(i)))
-////  lsu_nonblock_load_data_lo        := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === done_C & ~buf_write(i) & (~buf_dual(i) | ~buf_dualhi(i))) -> buf_data(i)))
-////  lsu_nonblock_load_data_hi        := Mux1H((0 until DEPTH).map(i =>(buf_state(i) === done_C & ~buf_write(i) & ( buf_dual(i) &  buf_dualhi(i))) -> buf_data(i)))
-////
-////  lsu_nonblock_addr_offset          := buf_addr(io.lsu_nonblock_load_data_tag)(1,0)
-////  lsu_nonblock_sz                   := buf_sz(io.lsu_nonblock_load_data_tag)(1,0)
-////  lsu_nonblock_unsign               := buf_unsign(io.lsu_nonblock_load_data_tag)
-////  lsu_nonblock_dual                 := buf_dual(io.lsu_nonblock_load_data_tag)
-////  lsu_nonblock_data_unalgn          := (Cat(lsu_nonblock_load_data_hi(31,0), lsu_nonblock_load_data_lo(31,0)) >> 8*lsu_nonblock_addr_offset(1,0))(31,0)
-////  io.lsu_nonblock_load_data_valid   := lsu_nonblock_load_data_ready & ~io.lsu_nonblock_load_data_error
-////  io.lsu_nonblock_load_data         := Mux1H(Seq(
-////    (lsu_nonblock_unsign  & lsu_nonblock_sz === 0.U) -> Cat(Fill(24,0.U(1.W)),lsu_nonblock_data_unalgn(7,0)),
-////    (lsu_nonblock_unsign  & lsu_nonblock_sz === 1.U) -> Cat(Fill(16,0.U(1.W)),lsu_nonblock_data_unalgn(15,0)),
-////    (~lsu_nonblock_unsign & lsu_nonblock_sz === 0.U) -> Cat(Fill(24,lsu_nonblock_data_unalgn(7)),lsu_nonblock_data_unalgn(7,0)),
-////    (~lsu_nonblock_unsign & lsu_nonblock_sz === 1.U) -> Cat(Fill(16,lsu_nonblock_data_unalgn(15)),lsu_nonblock_data_unalgn(15,0)),
-////    (lsu_nonblock_unsign  & lsu_nonblock_sz === 2.U) -> lsu_nonblock_data_unalgn(31,0)
-////  ))
-////  bus_sideeffect_pend      := Mux(obuf_valid,obuf_sideeffect & io.dec_tlu_sideeffect_posted_disable,Mux1H((0 until DEPTH).map(i =>(buf_state(i) === resp_C) -> (buf_sideeffect(i) & io.dec_tlu_sideeffect_posted_disable))))
-////  bus_addr_match_pending   := Mux1H((0 until DEPTH).map(i =>(pt.BUILD_AXI_NATIVE & obuf_valid & (obuf_addr(31,3) === buf_addr(i)(31,3))).asBool -> ((buf_state(i) === resp_C) & ~((obuf_tag0 === intToUInt(i)) | (obuf_merge & (obuf_tag1 === intToUInt(i)))))))
-////
-////  bus_cmd_ready            := Mux(obuf_write, Mux((obuf_cmd_done | obuf_data_done), Mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready), (io.lsu_axi_awready & io.lsu_axi_wready)), io.lsu_axi_arready)
-////  bus_wcmd_sent            := io.lsu_axi_awvalid & io.lsu_axi_awready
-////  bus_wdata_sent           := io.lsu_axi_wvalid & io.lsu_axi_wready
-////  bus_cmd_sent             := ((obuf_cmd_done | bus_wcmd_sent) & (obuf_data_done | bus_wdata_sent)) | (io.lsu_axi_arvalid & io.lsu_axi_arready)
-////
-////  bus_rsp_read             := io.lsu_axi_rvalid & io.lsu_axi_rready
-////  bus_rsp_write            := io.lsu_axi_bvalid & io.lsu_axi_bready
-////  bus_rsp_read_tag         := io.lsu_axi_rid(pt1.LSU_BUS_TAG-1,0)
-////  bus_rsp_write_tag        := io.lsu_axi_bid(pt1.LSU_BUS_TAG-1,0)
-////  bus_rsp_write_error      := bus_rsp_write & (io.lsu_axi_bresp(1,0) =/= 0.U(2.W))
-////  bus_rsp_read_error       := bus_rsp_read  & (io.lsu_axi_rresp(1,0) =/= 0.U(2.W))
-////  bus_rsp_rdata            := io.lsu_axi_rdata(63,0)
-////  //////////////////////////////////////////////////////////////////////////////////
-////  lsu_axi_rdata_q               := RegEnable(io.lsu_axi_rdata, init = 0.U, io.lsu_axi_rvalid&io.lsu_bus_clk_en)
-////  withClock(io.lsu_c2_r_clk){
-////    io.lsu_busreq_r            := RegNext((io.lsu_busreq_m & !io.flush_r & !io.ld_full_hit_m),  0.U)
-////    WrPtr0_r                   := RegNext(WrPtr0_m, init = 0.U)
-////    WrPtr1_r                   := RegNext(WrPtr1_m, init = 0.U)
-////    lsu_nonblock_load_valid_r  := RegNext(io.lsu_nonblock_load_valid_m, init = 0.U)
-////  }
-////  withClock(io.lsu_busm_clk){
-////    lsu_axi_awvalid_q          := RegNext(io.lsu_axi_awvalid,   init = 0.U)
-////    lsu_axi_awready_q          := RegNext(io.lsu_axi_awready,   init = 0.U)
-////    lsu_axi_wvalid_q           := RegNext(io.lsu_axi_wvalid,    init = 0.U)
-////    lsu_axi_wready_q           := RegNext(io.lsu_axi_wready,    init = 0.U)
-////    lsu_axi_arvalid_q          := RegNext(io.lsu_axi_arvalid,   init = 0.U)
-////    lsu_axi_arready_q          := RegNext(io.lsu_axi_arready,   init = 0.U)
-////    lsu_axi_bvalid_q           := RegNext(io.lsu_axi_bvalid,    init = 0.U)
-////    lsu_axi_bready_q           := RegNext(io.lsu_axi_bready,    init = 0.U)
-////    lsu_axi_rvalid_q           := RegNext(io.lsu_axi_rvalid,    init = 0.U)
-////    lsu_axi_rready_q           := RegNext(io.lsu_axi_rready,    init = 0.U)
-////    lsu_axi_bid_q              := RegNext(io.lsu_axi_bid,       init = 0.U)
-////    lsu_axi_rid_q              := RegNext(io.lsu_axi_rid,       init = 0.U)
-////    lsu_axi_bresp_q            := RegNext(io.lsu_axi_bresp,     init = 0.U)
-////    lsu_axi_rresp_q            := RegNext(io.lsu_axi_rresp,     init = 0.U)
-////  }
-////  ///////////////////////////////////////////////////////////////////////////////////
-////
-////  io.ld_fwddata_buf_lo              := 0.U
-////  io.ld_fwddata_buf_hi              := 0.U
-////
-////  lsu_imprecise_error_store_tag     :=  Mux1H((0 until DEPTH).map(i =>(((buf_state(i) === done_C) & buf_error(i) & buf_write(i))  -> intToUInt(i))))
-////  io.lsu_imprecise_error_load_any   := io.lsu_nonblock_load_data_error & ~io.lsu_imprecise_error_store_any
-////  io.lsu_imprecise_error_store_any  := {for(i <- 0 until DEPTH) yield io.lsu_bus_clk_en_q & (buf_state(i) === done_C) & buf_error(i) & buf_write(i)}.reduce(_|_)
-////  io.lsu_imprecise_error_addr_any   := Mux(io.lsu_imprecise_error_store_any, buf_addr(lsu_imprecise_error_store_tag), buf_addr(io.lsu_nonblock_load_data_tag))
-////
-////  bus_pend_trxnQ                    := 0.U(8.W)
-////  bus_pend_trxn                     := 0.U(8.W)
-////  bus_pend_trxn_ns                  := 0.U(8.W)
-////  lsu_bus_cntr_overflow             := 0.U(1.W)
-////  io.lsu_bus_idle_any               := true.B
-////
-////  io.lsu_pmu_bus_trxn               := (io.lsu_axi_awvalid & io.lsu_axi_awready) | (io.lsu_axi_wvalid & io.lsu_axi_wready) | (io.lsu_axi_arvalid & io.lsu_axi_arready)
-////  io.lsu_pmu_bus_misaligned         := io.lsu_busreq_r & io.ldst_dual_r & io.lsu_commit_r
-////  io.lsu_pmu_bus_error              := io.lsu_imprecise_error_load_any | io.lsu_imprecise_error_store_any
-////  io.lsu_pmu_bus_busy               := (io.lsu_axi_awvalid & ~io.lsu_axi_awready | (io.lsu_axi_wvalid & ~io.lsu_axi_wready) | (io.lsu_axi_arvalid & ~io.lsu_axi_arready))
-////
-////  io.lsu_axi_awvalid                := obuf_valid & obuf_write & ~obuf_cmd_done & ~bus_addr_match_pending
-////  io.lsu_axi_awid                   := obuf_tag0.asUInt
-////  io.lsu_axi_awaddr                 := Mux(obuf_sideeffect, obuf_addr,Cat(obuf_addr(31,3),0.U(3.W)))
-////  io.lsu_axi_awregion               := obuf_addr(31,28)
-////  io.lsu_axi_awlen                  := 0.U(8.W)
-////  io.lsu_axi_awsize                 := Mux(obuf_sideeffect, Cat(false.B,obuf_sz),3.U(3.W))
-////  io.lsu_axi_awburst                := 1.U(2.W)
-////  io.lsu_axi_awlock                 := 0.U
-////  io.lsu_axi_awcache                := Mux(obuf_sideeffect, 0.U(4.W),15.U(4.W))
-////  io.lsu_axi_awprot                 := 0.U(3.W)
-////  io.lsu_axi_awqos                  := 0.U(4.W)
-////
-////  io.lsu_axi_wvalid                 := obuf_valid & obuf_write & ~obuf_data_done & ~bus_addr_match_pending
-////  io.lsu_axi_wdata                  := obuf_data
-////  io.lsu_axi_wstrb                  := obuf_byteen & Fill(8,obuf_write)
-////  io.lsu_axi_wlast                  := 1.U
-////
-////  io.lsu_axi_arvalid                := obuf_valid & ~obuf_write & ~obuf_nosend & ~bus_addr_match_pending
-////  io.lsu_axi_arid                   := obuf_tag0.asUInt
-////  io.lsu_axi_araddr                 := io.lsu_axi_awaddr
-////  io.lsu_axi_arregion               := obuf_addr(31,28)
-////  io.lsu_axi_arlen                  := 0.U(8.W)
-////  io.lsu_axi_arsize                 := io.lsu_axi_awsize
-////  io.lsu_axi_arburst                := 1.U(2.W)
-////  io.lsu_axi_arlock                 := 0.U
-////  io.lsu_axi_arcache                := io.lsu_axi_awcache
-////  io.lsu_axi_arprot                 := 0.U
-////  io.lsu_axi_arqos                  := 0.U
-////
-////  io.lsu_axi_bready                 := 1.U
-////  io.lsu_axi_rready                 := 1.U
-////
-////
-////}
-////object BusBufmain extends App{
-////  println("Generate Verilog")
-////  println((new chisel3.stage.ChiselStage).emitVerilog((new el2_lsu_bus_buffer())))
-////}
+  ibuf_merge_en := io.lsu_busreq_r & io.lsu_commit_r & io.lsu_pkt_r.store & ibuf_valid & ibuf_write & (io.lsu_addr_r(31,2) === ibuf_addr(31,2)) & !io.is_sideeffects_r & !bus_coalescing_disable
+  ibuf_merge_in := !io.ldst_dual_r
+  val ibuf_byteen_out = (0 until 4).map(i=>(Mux(ibuf_merge_en & !ibuf_merge_in, ibuf_byteen(i) | ldst_byteen_lo_r(i), ibuf_byteen(i))).asUInt).reverse.reduce(Cat(_,_))
+  val ibuf_data_out = (0 until 4).map(i=>Mux(ibuf_merge_en & !ibuf_merge_in, Mux(ldst_byteen_lo_r(i), store_data_lo_r((8*i)+7, 8*i), ibuf_data((8*i)+7, 8*i)), ibuf_data((8*i)+7, 8*i))).reverse.reduce(Cat(_,_))
+
+  ibuf_valid := RegNext(Mux(ibuf_wr_en, true.B, ibuf_valid) & ibuf_rst, false.B)
+  ibuf_tag := withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(ibuf_tag_in, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())}
+  val ibuf_dualtag = withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(ibuf_dualtag_in, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())}
+  val ibuf_dual = withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(io.ldst_dual_r, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())}
+  val ibuf_samedw = withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(ldst_samedw_r, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())}
+  val ibuf_nomerge = withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(io.no_dword_merge_r, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())}
+  ibuf_sideeffect := withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(io.is_sideeffects_r, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())}
+  val ibuf_unsign = withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(io.lsu_pkt_r.unsign, 0.U, ibuf_wr_en & io.lsu_bus_ibuf_c1_clk.asBool())}
+  ibuf_write := withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(io.lsu_pkt_r.store, 0.U, ibuf_wr_en)}
+  val ibuf_sz = withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(ibuf_sz_in, 0.U, ibuf_wr_en)}
+  ibuf_addr := rvdffe(ibuf_addr_in, ibuf_wr_en, clock, io.scan_mode)
+  ibuf_byteen := withClock(io.lsu_bus_ibuf_c1_clk) {RegEnable(ibuf_byteen_in, 0.U, ibuf_wr_en)}
+  ibuf_data := rvdffe(ibuf_data_in, ibuf_wr_en, clock, io.scan_mode)
+  ibuf_timer := withClock(io.lsu_bus_ibuf_c1_clk) {RegNext(ibuf_timer_in, 0.U)}
+  val buf_numvld_wrcmd_any = WireInit(UInt(4.W), 0.U)
+  val buf_numvld_cmd_any = WireInit(UInt(4.W), 0.U)
+  val obuf_wr_timer = WireInit(UInt(TIMER_LOG2.W), 0.U)
+  val buf_nomerge = Wire(Vec(DEPTH, Bool()))
+  buf_nomerge := buf_nomerge.map(i=> false.B)
+  val Cmdptr0 = WireInit(UInt(LSU_NUM_NBLOAD_WIDTH.W), 0.U)
+  val buf_sideeffect = WireInit(UInt(LSU_NUM_NBLOAD.W), 0.U)
+  val obuf_force_wr_en = WireInit(Bool(), false.B)
+  val obuf_wr_en = WireInit(Bool(), false.B)
+  val obuf_wr_wait = (buf_numvld_wrcmd_any===1.U) & (buf_numvld_cmd_any===1.U) & (obuf_wr_timer =/= TIMER_MAX.U) &
+    !bus_coalescing_disable & !Mux1H((0 until math.pow(2,LSU_NUM_NBLOAD_WIDTH).asInstanceOf[Int]).map(i=>(Cmdptr0===i.U)->buf_nomerge(i))) &
+    !Mux1H((0 until math.pow(2,LSU_NUM_NBLOAD_WIDTH).asInstanceOf[Int]).map(i=>(Cmdptr0===i.U)->buf_sideeffect(i))) & !obuf_force_wr_en
+  val obuf_wr_timer_in = Mux(obuf_wr_en, 0.U(3.W), Mux(buf_numvld_cmd_any.orR & (obuf_wr_timer<TIMER_MAX), obuf_wr_timer+1.U, obuf_wr_timer))
+  obuf_force_wr_en := io.lsu_busreq_m & !io.lsu_busreq_r & !ibuf_valid & (buf_numvld_cmd_any===1.U) & (io.lsu_addr_m(31,2)=/=Mux1H((0 until math.pow(2,LSU_NUM_NBLOAD_WIDTH).asInstanceOf[Int]).map(i=>(Cmdptr0===i.U)->buf_addr(i)(31,2))))
+  val buf_numvld_pend_any = WireInit(UInt(4.W), 0.U)
+  val ibuf_buf_byp = ibuf_byp & (buf_numvld_pend_any===0.U) & (!io.lsu_pkt_r.store | io.no_dword_merge_r)
+  val bus_sideeffect_pend = WireInit(Bool(), false.B)
+  val found_cmdptr0 = WireInit(Bool(), false.B)
+  val buf_cmd_state_bus_en = Wire(Vec(DEPTH, Bool()))
+  buf_cmd_state_bus_en := buf_cmd_state_bus_en.map(i=> false.B)
+  val buf_dual = Wire(Vec(DEPTH, Bool()))
+  buf_dual := buf_dual.map(i=> false.B)
+  val buf_samedw = Wire(Vec(DEPTH, Bool()))
+  buf_samedw := buf_samedw.map(i=> false.B)
+  val found_cmdptr1 = WireInit(Bool(), false.B)
+  val bus_cmd_ready = WireInit(Bool(), false.B)
+  val obuf_valid = WireInit(Bool(), false.B)
+  val obuf_nosend = WireInit(Bool(), false.B)
+  val lsu_bus_cntr_overflow = WireInit(Bool(), false.B)
+  val bus_addr_match_pending = WireInit(Bool(), false.B)
+  obuf_wr_en := ((ibuf_buf_byp & io.lsu_commit_r & !(io.is_sideeffects_r & bus_sideeffect_pend)) |
+    ((Mux1H((0 until math.pow(2,LSU_NUM_NBLOAD_WIDTH).asInstanceOf[Int]).map(i=>(Cmdptr0===1.U)->buf_state(i))) === cmd_C) &
+      found_cmdptr0 & !indexing(buf_cmd_state_bus_en.map(_.asUInt).reverse.reduce(Cat(_,_)), Cmdptr0) & !(indexing(buf_sideeffect, Cmdptr0) & bus_sideeffect_pend) &
+      (!(indexing(buf_dual.map(_.asUInt).reverse.reduce(Cat(_,_)), Cmdptr0) & indexing(buf_samedw.map(_.asUInt).reverse.reduce(Cat(_,_)), Cmdptr0) & !indexing(buf_write, Cmdptr0)) | found_cmdptr1 | indexing(buf_nomerge.map(_.asUInt).reverse.reduce(Cat(_,_)), Cmdptr0) |
+        obuf_force_wr_en))) & (bus_cmd_ready | !obuf_valid | obuf_nosend) & !obuf_wr_wait & !lsu_bus_cntr_overflow & !bus_addr_match_pending & io.lsu_bus_clk_en
+  val bus_cmd_sent = WireInit(Bool(), false.B)
+  val obuf_rst = ((bus_cmd_sent | (obuf_valid & obuf_nosend)) & !obuf_wr_en & io.lsu_bus_clk_en) | io.dec_tlu_force_halt
+  val obuf_write_in = Mux(ibuf_buf_byp, io.lsu_pkt_r.store, indexing(buf_write, Cmdptr0))
+  val obuf_sideeffect_in = Mux(ibuf_buf_byp, io.is_sideeffects_r, indexing(buf_sideeffect, Cmdptr0))
+  val obuf_addr_in = Mux(ibuf_buf_byp, io.lsu_addr_r, indexing(buf_addr, Cmdptr0))
+  val buf_sz = Wire(Vec(DEPTH, UInt(2.W)))
+  buf_sz := buf_sz.map(i=> 0.U)
+  val obuf_sz_in = Mux(ibuf_buf_byp, Cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half), indexing(buf_sz, Cmdptr0))
+  val obuf_merge_en = WireInit(Bool(), false.B)
+  val obuf_merge_in = obuf_merge_en
+  val obuf_tag0_in = Mux(ibuf_buf_byp, WrPtr0_r, Cmdptr0)
+  val Cmdptr1 = WireInit(UInt(DEPTH_LOG2.W), 0.U)
+  val obuf_tag1_in = Mux(ibuf_buf_byp, WrPtr1_r, Cmdptr1)
+  val obuf_cmd_done = WireInit(Bool(), false.B)
+  val bus_wcmd_sent = WireInit(Bool(), false.B)
+  val obuf_cmd_done_in = !(obuf_wr_en | obuf_rst) & (obuf_cmd_done | bus_wcmd_sent)
+  val obuf_data_done = WireInit(Bool(), false.B)
+  val bus_wdata_sent = WireInit(Bool(), false.B)
+  val obuf_data_done_in = !(obuf_wr_en | obuf_rst) & (obuf_data_done | bus_wdata_sent)
+  val obuf_aligned_in = Mux(ibuf_buf_byp, is_aligned_r, obuf_sz_in(1,0)===0.U | (obuf_sz_in(0) & !obuf_addr_in(0)) | (obuf_sz_in(1)&(!obuf_addr_in(1,0).orR)))
+
+  val obuf_nosend_in = WireInit(Bool(), false.B)
+  val obuf_rdrsp_pend = WireInit(Bool(), false.B)
+  val bus_rsp_read = WireInit(Bool(), false.B)
+  val bus_rsp_read_tag = WireInit(UInt(LSU_BUS_TAG.W), 0.U)
+  val obuf_rdrsp_tag = WireInit(UInt(LSU_BUS_TAG.W), 0.U)
+  val obuf_write = WireInit(Bool(), false.B)
+  val obuf_rdrsp_pend_in = (!(obuf_wr_en & !obuf_nosend_in) & obuf_rdrsp_pend & !(bus_rsp_read & (bus_rsp_read_tag === obuf_rdrsp_tag))) |
+    ((bus_cmd_sent & !obuf_write) & !io.dec_tlu_force_halt)
+  val obuf_tag0 = WireInit(UInt(LSU_BUS_TAG.W), 0.U)
+  val obuf_rdrsp_tag_in = Mux(bus_cmd_sent | !obuf_write, obuf_tag0, obuf_rdrsp_tag)
+  val obuf_addr = WireInit(UInt(32.W), 0.U)
+  val obuf_sideeffect = WireInit(Bool(), false.B)
+  obuf_nosend_in := (obuf_addr_in(31,3)===obuf_addr(31,3)) & obuf_aligned_in & !obuf_sideeffect & !obuf_write & !obuf_write_in & !io.dec_tlu_external_ldfwd_disable &
+    ((obuf_valid & !obuf_nosend) | (obuf_rdrsp_pend & !(bus_rsp_read & (bus_rsp_read_tag === obuf_rdrsp_tag))))
+  val obuf_byteen0_in = Mux(ibuf_buf_byp, Mux(io.lsu_addr_r(2), Cat(ldst_byteen_lo_r, 0.U(4.W)), Cat(0.U(4.W), ldst_byteen_lo_r)),
+    Mux(indexing(buf_addr, Cmdptr0)(2).asBool(), Cat(indexing(buf_byteen, Cmdptr0), 0.U(4.W)), Cat(0.U(4.W),indexing(buf_byteen, Cmdptr0))))
+  val obuf_byteen1_in = Mux(ibuf_buf_byp, Mux(io.end_addr_r(2), Cat(ldst_byteen_hi_r, 0.U(4.W)), Cat(0.U(4.W), ldst_byteen_hi_r)),
+    Mux(indexing(buf_addr, Cmdptr1)(2).asBool(), Cat(indexing(buf_byteen, Cmdptr1), 0.U(4.W)), Cat(0.U(4.W),indexing(buf_byteen, Cmdptr1))))
+
+  val obuf_data0_in = Mux(ibuf_buf_byp, Mux(io.lsu_addr_r(2), Cat(store_data_lo_r, 0.U(32.W)), Cat(0.U(32.W), store_data_lo_r)),
+    Mux(indexing(buf_addr, Cmdptr0)(2).asBool(), Cat(indexing(buf_data, Cmdptr0), 0.U(32.W)), Cat(0.U(32.W),indexing(buf_data, Cmdptr0))))
+  val obuf_data1_in = Mux(ibuf_buf_byp, Mux(io.lsu_addr_r(2), Cat(store_data_hi_r, 0.U(32.W)), Cat(0.U(32.W), store_data_hi_r)),
+    Mux(indexing(buf_addr, Cmdptr1)(2).asBool(), Cat(indexing(buf_data, Cmdptr1), 0.U(32.W)), Cat(0.U(32.W),indexing(buf_data, Cmdptr1))))
+  val obuf_byteen_in = (0 until 8).map(i=>(obuf_byteen0_in(i) | (obuf_merge_en & obuf_byteen1_in(i))).asUInt).reverse.reduce(Cat(_,_))
+  val obuf_data_in = (0 until 8).map(i=>Mux(obuf_merge_en & obuf_byteen1_in(i), obuf_data1_in((8*i)+7, 8*i), obuf_data1_in((8*i)+7, 8*i))).reverse.reduce(Cat(_,_))
+  val buf_dualhi = Wire(Vec(DEPTH, Bool()))
+  buf_dualhi := buf_dualhi.map(i=> false.B)
+  obuf_merge_en := ((Cmdptr0 =/= Cmdptr1) & found_cmdptr0 & found_cmdptr1 & (indexing(buf_state, Cmdptr0) === cmd_C) & (indexing(buf_state, Cmdptr1) === cmd_C) &
+  !indexing(buf_cmd_state_bus_en.map(_.asUInt).reverse.reduce(Cat(_,_)), Cmdptr0) & !indexing(buf_sideeffect, Cmdptr0) &
+    ((indexing(buf_write, Cmdptr0) & indexing(buf_write, Cmdptr1) &
+    (indexing(buf_addr, Cmdptr0)(31,3)===indexing(buf_addr, Cmdptr1)(31,3)) & !bus_coalescing_disable & !BUILD_AXI_NATIVE.B) |
+    (!indexing(buf_write, Cmdptr0) & indexing(buf_dual.map(_.asUInt).reverse.reduce(Cat(_,_)), Cmdptr0) & !indexing(buf_dualhi.map(_.asUInt).reverse.reduce(Cat(_,_)), Cmdptr0) & indexing(buf_samedw.map(_.asUInt).reverse.reduce(Cat(_,_)), Cmdptr0)))) |
+    (ibuf_buf_byp & ldst_samedw_r & io.ldst_dual_r)
+
+  val obuf_wr_enQ = withClock(io.lsu_busm_clk){RegNext(obuf_wr_en, false.B)}
+  obuf_valid := withClock(io.lsu_busm_clk){RegNext(Mux(obuf_wr_en, true.B, obuf_valid) & obuf_rst, false.B)}
+  obuf_nosend := withClock(io.lsu_busm_clk){RegEnable(obuf_nosend_in, false.B, obuf_wr_en)}
+  obuf_cmd_done := withClock(io.lsu_busm_clk){RegNext(obuf_cmd_done_in, false.B)}
+  obuf_data_done := withClock(io.lsu_busm_clk){RegNext(obuf_data_done_in, false.B)}
+  obuf_rdrsp_pend := withClock(io.lsu_busm_clk){RegNext(obuf_rdrsp_pend_in, false.B)}
+  obuf_rdrsp_tag := withClock(io.lsu_busm_clk){RegNext(obuf_rdrsp_tag_in, 0.U)}
+  obuf_tag0 := withClock(io.lsu_busm_clk){RegEnable(obuf_tag0_in, 0.U, obuf_wr_en)}
+  val obuf_tag1 = withClock(io.lsu_busm_clk){RegEnable(obuf_tag1_in, 0.U, obuf_wr_en)}
+  val obuf_merge = withClock(io.lsu_busm_clk){RegEnable(obuf_merge_in, false.B, obuf_wr_en)}
+  obuf_write := withClock(io.lsu_busm_clk){RegEnable(obuf_write_in, false.B, obuf_wr_en)}
+  obuf_sideeffect := withClock(io.lsu_busm_clk){RegEnable(obuf_sideeffect_in, false.B, obuf_wr_en)}
+  val obuf_sz = withClock(io.lsu_busm_clk){RegEnable(obuf_sz_in, 0.U, obuf_wr_en)}
+  obuf_addr := rvdffe(obuf_addr_in, obuf_wr_en, io.lsu_busm_clk, io.scan_mode)
+  val obuf_byteen = withClock(io.lsu_busm_clk){RegEnable(obuf_byteen_in, 0.U, obuf_wr_en)}
+  val obuf_data = rvdffe(obuf_data_in, obuf_wr_en, io.lsu_busm_clk, io.scan_mode)
+  obuf_wr_timer := withClock(io.lsu_busm_clk){RegNext(obuf_wr_timer_in, 0.U)}
+  val WrPtr0_m = WireInit(UInt(DEPTH_LOG2.W), 0.U)
+  val found_array1 = (0 until DEPTH).map(i=>((buf_state(i)===idle_C) & !((ibuf_valid & (ibuf_tag===i.U)) |
+    (io.lsu_busreq_m & (WrPtr0_r===i.U)) | (io.ldst_dual_r & (WrPtr1_r === i.U))))->i.U)
+  WrPtr0_m := MuxCase(0.U, found_array1)
+  val found_array2 = (0 until DEPTH).map(i=>((buf_state(i)===idle_C) & !((ibuf_valid & (ibuf_tag===i.U)) |
+    (io.lsu_busreq_m & (WrPtr0_m===i.U)) | (io.lsu_busreq_r & (WrPtr0_r === i.U)) | (io.ldst_dual_r & (WrPtr1_r===i.U))))->i.U)
+  val WrPtr1_m = MuxCase(0.U, found_array2)
+  val buf_age = Wire(Vec(DEPTH, UInt(DEPTH.W)))
+  buf_age := buf_age.map(i=> 0.U)
+  val CmdPtr0Dec = (0 until DEPTH).map(i=> (!(buf_age(i).orR) & (buf_state(i)===cmd_C) & !buf_cmd_state_bus_en(i)).asUInt).reverse.reduce(Cat(_,_))
+  val CmdPtr1Dec = (0 until DEPTH).map(i=> (!((buf_age(i) & (~CmdPtr0Dec)).orR) & !CmdPtr0Dec(i) & (buf_state(i)===cmd_C) & !buf_cmd_state_bus_en(i)).asUInt).reverse.reduce(Cat(_,_))
+  val buf_rsp_pickage = Wire(Vec(DEPTH, UInt(DEPTH.W)))
+  buf_rsp_pickage := buf_rsp_pickage.map(i=> 0.U)
+  val RspPtrDec = (0 until DEPTH).map(i=> (!(buf_rsp_pickage(i).orR) & (buf_state(i)===done_wait_C)).asUInt).reverse.reduce(Cat(_,_))
+  found_cmdptr0 := CmdPtr0Dec.orR
+  found_cmdptr1 := CmdPtr1Dec.orR
+
+  val CmdPtr0 = PriorityEncoder(CmdPtr0Dec)
+  val CmdPtr1 = PriorityEncoder(CmdPtr1Dec)
+  val RspPtr = PriorityEncoder(RspPtrDec)
+  val buf_state_en = Wire(Vec(DEPTH, Bool()))
+  buf_state_en := buf_state_en.map(i=> false.B)
+  val buf_rspageQ = Wire(Vec(DEPTH, UInt(DEPTH.W)))
+  buf_rspageQ := buf_rspageQ.map(i=> 0.U)
+  val buf_rspage_set = Wire(Vec(DEPTH, UInt(DEPTH.W)))
+  buf_rspage_set := buf_rspage_set.map(i=> 0.U)
+  val buf_rspage_in = Wire(Vec(DEPTH, UInt(DEPTH.W)))
+  buf_rspage_in := buf_rspage_in.map(i=> 0.U)
+  val buf_rspage = Wire(Vec(DEPTH, UInt(DEPTH.W)))
+  buf_rspage := buf_rspage.map(i=> 0.U)
+
+  val buf_age_in = (0 until DEPTH).map(i=>(0 until DEPTH).map(j=> ((((buf_state(i)===idle_C) & buf_state_en(i)) &
+    (((buf_state(j)===wait_C) | ((buf_state(j)===cmd_C) & !buf_cmd_state_bus_en(j))) |
+      (ibuf_drain_vld & io.lsu_busreq_r & (ibuf_byp | io.ldst_dual_r) & (WrPtr0_r === i.U) & (ibuf_tag === j.U)) |
+      (ibuf_byp & io.lsu_busreq_r & io.ldst_dual_r & (WrPtr1_r === i.U) & (WrPtr0_r === j.U)))) | buf_age(i)(j)).asUInt).reverse.reduce(Cat(_,_)))
+  val buf_ageQ = Wire(Vec(DEPTH, UInt(DEPTH.W)))
+  buf_ageQ := buf_ageQ.map(i=> 0.U)
+    buf_age := (0 until DEPTH).map(i=>(0 until DEPTH).map(j=>(buf_ageQ(i)(j) & ((buf_state(j)===cmd_C) & buf_cmd_state_bus_en(j))).asUInt).reverse.reduce(Cat(_,_)))
+    buf_age_younger := (0 until DEPTH).map(i=>(0 until DEPTH).map(j=>(Mux(i.U===j.U, 0.U, !buf_age(i)(j) & (buf_state(j)=/=idle_C))).asUInt).reverse.reduce(Cat(_,_)))
+    buf_rsp_pickage := (0 until DEPTH).map(i=>(0 until DEPTH).map(j=>(buf_rspageQ(i)(j) & (buf_state(j)===done_wait_C)).asUInt).reverse.reduce(Cat(_,_)))
+
+    buf_rspage_set := (0 until DEPTH).map(i=>(0 until DEPTH).map(j=>(((buf_state(i)===idle_C) & buf_state_en(i)) &
+      (!((buf_state(j)===idle_C) | (buf_state(j)===done_C)) |
+        (ibuf_drain_vld & io.lsu_busreq_r & (ibuf_byp | io.ldst_dual_r) & (WrPtr0_r===i.U) & (ibuf_tag===j.U)) |
+        (ibuf_byp & io.lsu_busreq_r & io.ldst_dual_r & (WrPtr1_r===i.U) & (WrPtr0_r===j.U)))).asUInt).reverse.reduce(Cat(_,_)))
+    buf_rspage_in := (0 until DEPTH).map(i=>(0 until DEPTH).map(j=>(buf_rspage_set(i)(j) | buf_rspage(i)(j)).asUInt).reverse.reduce(Cat(_,_)))
+    buf_rspage := (0 until DEPTH).map(i=>(0 until DEPTH).map(j=>(buf_rspageQ(i)(j) & !((buf_state(j)===done_C) | (buf_state(j)===idle_C))).asUInt).reverse.reduce(Cat(_,_)))
+
+
+
+
+    ibuf_drainvec_vld := (0 until DEPTH).map(i=>(ibuf_drain_vld & (ibuf_tag === i.U)).asUInt).reverse.reduce(Cat(_,_))
+    buf_byteen_in := (0 until DEPTH).map(i=>Mux(ibuf_drainvec_vld(i), ibuf_byteen_out(3,0), Mux(ibuf_byp & io.ldst_dual_r & (WrPtr1_r===i.U), ldst_byteen_hi_r(3,0), ldst_byteen_lo_r(3,0))))
+    buf_addr_in := (0 until DEPTH).map(i=>Mux(ibuf_drainvec_vld(i), ibuf_addr, Mux(ibuf_byp & io.ldst_dual_r & (WrPtr1_r===i.U), io.end_addr_r, io.lsu_addr_r)))
+    buf_dual_in := (0 until DEPTH).map(i=>(Mux(ibuf_drainvec_vld(i), ibuf_dual, io.ldst_dual_r)).asUInt).reverse.reduce(Cat(_,_))
+    buf_samedw_in := (0 until DEPTH).map(i=>(Mux(ibuf_drainvec_vld(i), ibuf_samedw, ldst_samedw_r)).asUInt).reverse.reduce(Cat(_,_))
+    buf_nomerge_in := (0 until DEPTH).map(i=>(Mux(ibuf_drainvec_vld(i), ibuf_nomerge | ibuf_force_drain, io.no_dword_merge_r)).asUInt).reverse.reduce(Cat(_,_))
+    buf_dualhi_in := (0 until DEPTH).map(i=>(Mux(ibuf_drainvec_vld(i), ibuf_dual ,ibuf_byp & io.ldst_dual_r & (WrPtr1_r===i.U))).asUInt).reverse.reduce(Cat(_,_))
+    buf_dualtag_in := (0 until DEPTH).map(i=>Mux(ibuf_drainvec_vld(i), ibuf_dualtag, Mux(ibuf_byp & io.ldst_dual_r & (WrPtr1_r===i.U), WrPtr0_r, WrPtr1_r)))
+    buf_sideeffect_in := (0 until DEPTH).map(i=>(Mux(ibuf_drainvec_vld(i), ibuf_sideeffect, io.is_sideeffects_r)).asUInt).reverse.reduce(Cat(_,_))
+    buf_unsign_in := (0 until DEPTH).map(i=>(Mux(ibuf_drainvec_vld(i), ibuf_unsign, io.lsu_pkt_r.unsign)).asUInt).reverse.reduce(Cat(_,_))
+    buf_sz_in := (0 until DEPTH).map(i=>Mux(ibuf_drainvec_vld(i), ibuf_sz, Cat(io.lsu_pkt_r.word, io.lsu_pkt_r.half)))
+    buf_write_in := (0 until DEPTH).map(i=>(Mux(ibuf_drainvec_vld(i), ibuf_write, io.lsu_pkt_r.store)).asUInt).reverse.reduce(Cat(_,_))
+
+  for(i<- 0 until DEPTH) {
+    switch(buf_state(i)) {
+      is(idle_C) {
+        buf_nxtstate(i) := Mux(io.lsu_bus_clk_en.asBool(), cmd_C, wait_C)
+        buf_state_en(i) := (io.lsu_busreq_r & io.lsu_commit_r & (((ibuf_byp | io.ldst_dual_r) & !ibuf_merge_en & (i === WrPtr0_r)) | (ibuf_byp & io.ldst_dual_r & (i === WrPtr1_r)))) | (ibuf_drain_vld & (i === ibuf_tag))
+        buf_wr_en(i) := buf_state_en(i)
+        buf_data_en(i) := buf_state_en(i)
+        buf_data_in(i) := Mux((ibuf_drain_vld & (i === ibuf_tag)).asBool(), ibuf_data_out(31, 0), store_data_lo_r(31, 0))
+      }
+      is(wait_C) {
+        buf_nxtstate(i) := Mux(io.dec_tlu_force_halt.asBool(), idle_C, cmd_C)
+        buf_state_en(i) := io.lsu_bus_clk_en | io.dec_tlu_force_halt
+      }
+      is(cmd_C) {
+        buf_nxtstate(i) := Mux(io.dec_tlu_force_halt.asBool(), idle_C, Mux((obuf_nosend & bus_rsp_read & (bus_rsp_read_tag === obuf_rdrsp_tag)), done_wait_C, resp_C))
+        buf_cmd_state_bus_en(i) := ((obuf_tag0 === i.asUInt(LSU_BUS_TAG.W)) | (obuf_merge & (obuf_tag1 === i.asUInt(LSU_BUS_TAG.W)))) & obuf_valid & obuf_wr_enQ
+        buf_state_bus_en(i) := buf_cmd_state_bus_en(i)
+        buf_state_en(i) := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt
+        buf_ldfwd_in(i) := true.B
+        buf_ldfwd_en(i) := buf_state_en(i) & !buf_write(i) & obuf_nosend & !io.dec_tlu_force_halt
+        buf_ldfwdtag_in(i) := (obuf_rdrsp_tag(LSU_BUS_TAG - 2, 0)).asUInt
+        buf_data_en(i) := buf_state_bus_en(i) & io.lsu_bus_clk_en & obuf_nosend & bus_rsp_read
+        buf_error_en(i) := buf_state_bus_en(i) & io.lsu_bus_clk_en & obuf_nosend & bus_rsp_read_error
+        buf_data_in(i) := Mux(buf_error_en(i), bus_rsp_rdata(31, 0), Mux(buf_addr(i)(2), bus_rsp_rdata(63, 32), bus_rsp_rdata(31, 0)))
+      }
+      is(resp_C) {
+        buf_nxtstate(i) := Mux((io.dec_tlu_force_halt | (buf_write(i) & !(BUILD_AXI_NATIVE.B & bus_rsp_write_error))).asBool(), idle_C,
+          Mux((buf_dual(i) & !buf_samedw(i) & !buf_write(i) & (buf_state(buf_dualtag(i)) =/= done_partial_C)), done_partial_C,
+            Mux((buf_ldfwd(i) | any_done_wait_state | (buf_dual(i) & !buf_samedw(i) & !buf_write(i) & indexing(buf_ldfwd,buf_dualtag(i)) & (buf_state(buf_dualtag(i)) === done_partial_C) & any_done_wait_state)), done_wait_C, done_C)))
+        buf_resp_state_bus_en(i) := (bus_rsp_write & (bus_rsp_write_tag === (i.asUInt(LSU_BUS_TAG.W)))) |
+          (bus_rsp_read & ((bus_rsp_read_tag === (i.asUInt(LSU_BUS_TAG.W))) |
+            (buf_ldfwd(i) & (bus_rsp_read_tag === (buf_ldfwdtag(i)))) |
+            (buf_dual(i) & buf_dualhi(i) & ~buf_write(i) & buf_samedw(i) & (bus_rsp_read_tag === (buf_dualtag(i))))))
+        buf_state_bus_en(i) := buf_resp_state_bus_en(i)
+        buf_state_en(i) := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt
+        buf_data_en(i) := buf_state_bus_en(i) & bus_rsp_read & io.lsu_bus_clk_en
+        buf_error_en(i) := buf_state_bus_en(i) & io.lsu_bus_clk_en & ((bus_rsp_read_error & (bus_rsp_read_tag === (i.asUInt(LSU_BUS_TAG.W)))) |
+          (bus_rsp_read_error & buf_ldfwd(i) & (bus_rsp_read_tag === buf_ldfwdtag(i))) |
+          (bus_rsp_write_error & BUILD_AXI_NATIVE.B & (bus_rsp_write_tag === i.asUInt(LSU_BUS_TAG.W))))
+        buf_data_in(i) := Mux((buf_state_en(i) & !buf_error_en(i)), Mux(buf_addr(i)(2), bus_rsp_rdata(63, 32), bus_rsp_rdata(31, 0)), bus_rsp_rdata(31, 0))
+      }
+      is(done_partial_C) { // Other part of dual load hasn't returned
+        buf_nxtstate(i) := Mux(io.dec_tlu_force_halt.asBool(), idle_C, Mux((buf_ldfwd(i) | buf_ldfwd(buf_dualtag(i)) | any_done_wait_state), done_wait_C, done_C))
+        buf_state_bus_en(i) := bus_rsp_read & ((bus_rsp_read_tag === buf_dualtag(i).asUInt()) |
+          (buf_ldfwd(buf_dualtag(i)) & (bus_rsp_read_tag === buf_ldfwdtag(buf_dualtag(i)).asUInt())))
+        buf_state_en(i) := (buf_state_bus_en(i) & io.lsu_bus_clk_en) | io.dec_tlu_force_halt
+      }
+      is(done_wait_C) { // WAIT state if there are multiple outstanding nb returns
+        buf_nxtstate(i) := Mux(io.dec_tlu_force_halt.asBool(), idle_C, done_C)
+        buf_state_en(i) := ((RspPtr === i.asUInt(DEPTH_LOG2.W)) | (buf_dual(i) & (buf_dualtag(i) === RspPtr))) | io.dec_tlu_force_halt
+      }
+      is(done_C) {
+        buf_nxtstate(i) := idle_C
+        buf_rst(i) := 1.U
+        buf_state_en(i) := 1.U
+        buf_ldfwd_in(i) := false.B
+        buf_ldfwd_en(i) := buf_state_en(i)
+      }
+    }
+    buf_state(i) := withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_nxtstate(i), 0.U, buf_state_en(i).asBool())}
+    buf_ageQ(i) := withClock(io.lsu_bus_buf_c1_clk){RegNext(buf_age_in(i), 0.U)}
+    buf_rspageQ(i) := withClock(io.lsu_bus_buf_c1_clk){RegNext(buf_rspage_in(i), 0.U)}
+    buf_dualtag(i) := withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_dualtag_in(i), 0.U, buf_wr_en(i).asBool())}
+    buf_dual(i) := withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_dual_in(i), false.B, buf_wr_en(i).asBool())}
+    buf_samedw(i) := withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_samedw_in(i), false.B, buf_wr_en(i).asBool())}
+    buf_nomerge(i) := withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_nomerge_in(i), false.B, buf_wr_en(i).asBool())}
+    buf_dualhi(i) := withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_dualhi_in(i), false.B, buf_wr_en(i).asBool())}
+    }
+
+    buf_ldfwd := (0 until DEPTH).map(i=>(withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_ldfwd_in(i), false.B, buf_ldfwd_en(i).asBool())}).asUInt()).reverse.reduce(Cat(_,_))
+    buf_ldfwdtag := (0 until DEPTH).map(i=>withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_ldfwdtag_in(i), 0.U, buf_ldfwd_en(i).asBool())})
+    buf_sideeffect := (0 until DEPTH).map(i=>(withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_sideeffect_in(i), false.B, buf_wr_en(i).asBool())}).asUInt()).reverse.reduce(Cat(_,_))
+    buf_unsign := (0 until DEPTH).map(i=>(withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_unsign_in(i), false.B, buf_wr_en(i).asBool())}).asUInt()).reverse.reduce(Cat(_,_))
+    buf_write := (0 until DEPTH).map(i=>(withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_write_in(i), false.B, buf_wr_en(i).asBool())}).asUInt()).reverse.reduce(Cat(_,_))
+    buf_sz := (0 until DEPTH).map(i=>withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_sz_in(i), 0.U, buf_wr_en(i).asBool())})
+    buf_addr := (0 until DEPTH).map(i=>rvdffe(buf_addr_in(i), buf_wr_en(i).asBool(), clock, io.scan_mode))
+    buf_byteen := (0 until DEPTH).map(i=>withClock(io.lsu_bus_buf_c1_clk){RegEnable(buf_byteen_in(i), 0.U, buf_wr_en(i).asBool())})
+    buf_data := (0 until DEPTH).map(i=>rvdffe(buf_data_in(i), buf_data_en(i), clock, io.scan_mode))
+    buf_error := (0 until DEPTH).map(i=>(withClock(io.lsu_bus_buf_c1_clk){RegNext(Mux(buf_error_en(i), true.B, buf_error(i)) & buf_rst(i), false.B)}).asUInt()).reverse.reduce(Cat(_,_))
+
+  val buf_numvld_any = (0 until DEPTH).map(i=>(buf_state(i)=/=idle_C).asUInt).reverse.reduce(_ +& _)
+  buf_numvld_wrcmd_any := (0 until DEPTH).map(i=>(buf_write(i) & (buf_write(i)===cmd_C) & !buf_cmd_state_bus_en(i)).asUInt).reverse.reduce(_ +& _)
+  buf_numvld_cmd_any :=  (0 until DEPTH).map(i=>((buf_write(i)===cmd_C) & !buf_cmd_state_bus_en(i)).asUInt).reverse.reduce(_ +& _)
+  buf_numvld_pend_any := (0 until DEPTH).map(i=>(((buf_write(i)===wait_C)|(buf_write(i)===cmd_C))  & !buf_cmd_state_bus_en(i)).asUInt).reverse.reduce(_ +& _)
+  any_done_wait_state := (0 until DEPTH).map(i=>buf_state(i)===done_wait_C).reverse.reduce(_|_)
+  io.lsu_bus_buffer_pend_any := buf_numvld_pend_any.orR
+  io.lsu_bus_buffer_full_any := Mux(io.ldst_dual_d & io.dec_lsu_valid_raw_d, buf_numvld_any>=(DEPTH-1), buf_numvld_any===(DEPTH-1))
+  io.lsu_bus_buffer_empty_any := !(buf_state.map(_.orR).reduce(_|_)) & !ibuf_valid & !obuf_valid
+
+  io.lsu_nonblock_load_valid_m := io.lsu_busreq_m & io.lsu_pkt_m.valid & io.lsu_pkt_m.load & !io.flush_m_up & !io.ld_full_hit_m
+  io.lsu_nonblock_load_tag_m := WrPtr0_m
+  val lsu_nonblock_load_valid_r = WireInit(Bool(), false.B)
+  io.lsu_nonblock_load_inv_r := lsu_nonblock_load_valid_r & !io.lsu_commit_r
+  io.lsu_nonblock_load_inv_tag_r := WrPtr0_r
+  val lsu_nonblock_load_data_ready = Mux1H((0 until DEPTH).map(i=>(buf_state(i)===done_C) -> (!(BUILD_AXI_NATIVE.B & buf_write(i)))))
+  io.lsu_nonblock_load_data_error := Mux1H((0 until DEPTH).map(i=>(buf_state(i)===done_C) -> (buf_error(i) & !buf_write(i))))
+  io.lsu_nonblock_load_data_tag := Mux1H((0 until DEPTH).map(i=>((buf_state(i)===done_C) & !buf_write(i) & (!buf_dual(i) | !buf_dualhi(i))) -> i.U))
+  val lsu_nonblock_load_data_lo = Mux1H((0 until DEPTH).map(i=>((buf_state(i)===done_C) & !buf_write(i) & (!buf_dual(i) | !buf_dualhi(i))) -> buf_data(i)))
+  val lsu_nonblock_load_data_hi = Mux1H((0 until DEPTH).map(i=>((buf_state(i)===done_C) & !buf_write(i) & (buf_dual(i) | buf_dualhi(i))) -> buf_data(i)))
+  val lsu_nonblock_addr_offset = indexing(buf_addr, io.lsu_nonblock_load_data_tag)
+  val lsu_nonblock_sz = indexing(buf_sz, io.lsu_nonblock_load_data_tag)
+  val lsu_nonblock_unsign = indexing(buf_unsign, io.lsu_nonblock_load_data_tag)
+  val lsu_nonblock_dual = indexing(buf_dual.map(_.asUInt).reverse.reduce(Cat(_,_)), io.lsu_nonblock_load_data_tag)
+  val lsu_nonblock_data_unalgn = Cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) >> (lsu_nonblock_addr_offset * 8.U)
+  io.lsu_nonblock_load_data_valid := lsu_nonblock_load_data_ready & !io.lsu_nonblock_load_data_error
+  io.lsu_nonblock_load_data := Mux1H(Seq((lsu_nonblock_unsign & (lsu_nonblock_sz===0.U)) -> Cat(0.U(24.W),lsu_nonblock_data_unalgn(7,0)),
+    (lsu_nonblock_unsign &  (lsu_nonblock_sz===1.U)) -> Cat(0.U(16.W),lsu_nonblock_data_unalgn(15,0)),
+    (!lsu_nonblock_unsign & (lsu_nonblock_sz===0.U)) -> Cat(Fill(24,lsu_nonblock_data_unalgn(7)), lsu_nonblock_data_unalgn(7,0)),
+    (!lsu_nonblock_unsign & (lsu_nonblock_sz===1.U)) -> Cat(Fill(16,lsu_nonblock_data_unalgn(15)), lsu_nonblock_data_unalgn(15,0)),
+    (lsu_nonblock_sz===2.U)                          -> lsu_nonblock_data_unalgn))
+  bus_sideeffect_pend := Mux1H((0 until DEPTH).map(i=>(buf_state(i)===resp_C)->(buf_sideeffect(i) & io.dec_tlu_sideeffect_posted_disable)))
+  bus_addr_match_pending := Mux1H((0 until DEPTH).map(i=>(buf_state(i)===resp_C)->
+    (BUILD_AXI_NATIVE.B & obuf_valid & (obuf_addr(31,3)===buf_addr(i)(31,3)) & !((obuf_tag0===i.U) | (obuf_merge & (obuf_tag1===i.U))))))
+
+  bus_cmd_ready := Mux(obuf_write, Mux(obuf_cmd_done | obuf_data_done, Mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready), io.lsu_axi_awready & io.lsu_axi_awready), io.lsu_axi_arready)
+  bus_wcmd_sent := io.lsu_axi_awvalid & io.lsu_axi_awready
+  bus_wdata_sent := io.lsu_axi_wvalid & io.lsu_axi_wready
+  bus_cmd_sent := ((obuf_cmd_done | bus_wcmd_sent) & (obuf_data_done | bus_wdata_sent)) | (io.lsu_axi_arvalid & io.lsu_axi_arready)
+  bus_rsp_read := io.lsu_axi_rvalid & io.lsu_axi_rready
+  bus_rsp_write := io.lsu_axi_bvalid & io.lsu_axi_bready
+  bus_rsp_read_tag := io.lsu_axi_rid
+  bus_rsp_write_tag := io.lsu_axi_bid
+  bus_rsp_write_error := bus_rsp_write & (io.lsu_axi_bresp =/= 0.U)
+  bus_rsp_read_error := bus_rsp_read & (io.lsu_axi_bresp =/= 0.U)
+  bus_rsp_rdata := io.lsu_axi_rdata
+
+  // AXI Command signals
+  io.lsu_axi_awvalid := obuf_valid & obuf_write & !obuf_cmd_done & !bus_addr_match_pending
+  io.lsu_axi_awid := obuf_tag0
+  io.lsu_axi_awaddr := Mux(obuf_sideeffect, obuf_addr, Cat(obuf_addr(31,3), 0.U(3.W)))
+  io.lsu_axi_awsize := Mux(obuf_sideeffect, Cat(0.U, obuf_sz), 2.U(3.W))
+  io.lsu_axi_awprot := 0.U
+  io.lsu_axi_awcache := Mux(obuf_sideeffect, 0.U, 15.U)
+  io.lsu_axi_awregion := obuf_addr(31,28)
+  io.lsu_axi_awlen := 0.U
+  io.lsu_axi_awburst := 1.U(2.W)
+  io.lsu_axi_awqos := 0.U
+  io.lsu_axi_awlock := 0.U
+
+  io.lsu_axi_wvalid := obuf_valid & obuf_write & !obuf_data_done & !bus_addr_match_pending
+  io.lsu_axi_wstrb := obuf_byteen & Fill(8, obuf_write)
+  io.lsu_axi_wdata := obuf_data
+  io.lsu_axi_wlast := 1.U
+
+  io.lsu_axi_arvalid := obuf_valid & !obuf_write & !obuf_nosend & !bus_addr_match_pending
+  io.lsu_axi_arid := obuf_tag0
+  io.lsu_axi_araddr := Mux(obuf_sideeffect, obuf_addr, Cat(obuf_addr(31,3),0.U(3.W)))
+  io.lsu_axi_arsize := Mux(obuf_sideeffect, Cat(0.U, obuf_sz), 3.U(3.W))
+  io.lsu_axi_arprot := 0.U
+  io.lsu_axi_arcache := Mux(obuf_sideeffect, 0.U(4.W), 15.U)
+  io.lsu_axi_arregion := obuf_addr(31,28)
+  io.lsu_axi_arlen := 0.U
+  io.lsu_axi_arburst := 1.U(2.W)
+  io.lsu_axi_arqos := 0.U
+  io.lsu_axi_arlock := 0.U
+  io.lsu_axi_bready := 1.U
+  io.lsu_axi_rready := 1.U
+  io.lsu_imprecise_error_store_any := Mux1H((0 until DEPTH).map(i=>(buf_state(i)===done_C)->(io.lsu_bus_clk_en_q & buf_error(i) & buf_write(i))))
+  val lsu_imprecise_error_store_tag = Mux1H((0 until DEPTH_LOG2).map(i=>((buf_state(i)===done_C) & buf_error(i) & buf_write(i))->i.U))
+
+  io.lsu_imprecise_error_load_any := io.lsu_nonblock_load_data_error & !io.lsu_imprecise_error_store_any
+  io.lsu_imprecise_error_addr_any := Mux(io.lsu_imprecise_error_store_any, indexing(buf_addr, lsu_imprecise_error_store_tag), indexing(buf_addr, io.lsu_nonblock_load_data_tag))
+  lsu_bus_cntr_overflow := 0.U
+
+  io.lsu_bus_idle_any := 1.U
+
+  // PMU signals
+  io.lsu_pmu_bus_trxn := (io.lsu_axi_awvalid & io.lsu_axi_awready) | (io.lsu_axi_wvalid & io.lsu_axi_wready) | (io.lsu_axi_arvalid & io.lsu_axi_arready)
+  io.lsu_pmu_bus_misaligned := io.lsu_busreq_r & io.ldst_dual_r & io.lsu_commit_r
+  io.lsu_pmu_bus_error := io.lsu_imprecise_error_load_any | io.lsu_imprecise_error_store_any
+
+  io.lsu_pmu_bus_busy := (io.lsu_axi_awvalid & !io.lsu_axi_awready) | (io.lsu_axi_wvalid & !io.lsu_axi_wready) | (io.lsu_axi_arvalid & !io.lsu_axi_arready)
+
+  WrPtr0_r := withClock(io.lsu_c2_r_clk){RegNext(WrPtr0_m, 0.U)}
+  WrPtr1_r := withClock(io.lsu_c2_r_clk){RegNext(WrPtr1_m, 0.U)}
+  io.lsu_busreq_r := withClock(io.lsu_c2_r_clk){RegNext(io.lsu_busreq_m & !io.flush_r & !io.ld_full_hit_m, false.B)}
+  lsu_nonblock_load_valid_r := withClock(io.lsu_c2_r_clk){RegNext(io.lsu_nonblock_load_valid_m, false.B)}
+}
+
+object BusBufmain extends App{
+  println("Generate Verilog")
+  println((new chisel3.stage.ChiselStage).emitVerilog((new el2_lsu_bus_buffer())))
+}
diff --git a/src/main/scala/lsu/w.scala b/src/main/scala/lsu/w.scala
deleted file mode 100644
index 161cbc7f..00000000
--- a/src/main/scala/lsu/w.scala
+++ /dev/null
@@ -1,163 +0,0 @@
-package lsu
-
-import include._
-import lib._
-import snapshot._
-
-import chisel3._
-import chisel3.util._
-import chisel3.iotesters.{ChiselFlatSpec, Driver, PeekPokeTester}
-import chisel3.experimental.ChiselEnum
-import chisel3.experimental.{withClock, withReset, withClockAndReset}
-import chisel3.experimental.BundleLiterals._
-import chisel3.tester._
-import chisel3.tester.RawTester.test
-import chisel3.util.HasBlackBoxResource
-import chisel3.experimental.chiselName
-@chiselName
-class el2_lsu_addrcheck extends Module with RequireAsyncReset with el2_lib {
-  val io = IO(new Bundle{
-  val lsu_c2_m_clk        = Input(Clock())
-
-  val start_addr_d        = Input(UInt(32.W))
-  val end_addr_d          = Input(UInt(32.W))
-  val lsu_pkt_d           = Input(new el2_lsu_pkt_t)
-  val dec_tlu_mrac_ff     = Input(UInt(32.W))
-  val rs1_region_d        = Input(UInt(4.W))
-  val rs1_d               = Input(UInt(32.W))
-
-
-  val is_sideeffects_m    = Output(UInt(1.W))
-  val addr_in_dccm_d      = Output(UInt(1.W))
-  val addr_in_pic_d       = Output(UInt(1.W))
-  val addr_external_d     = Output(UInt(1.W))
-  val access_fault_d      = Output(UInt(1.W))
-  val misaligned_fault_d  = Output(UInt(1.W))
-  val exc_mscause_d       = Output(UInt(4.W))
-  val fir_dccm_access_error_d     = Output(UInt(1.W))
-  val fir_nondccm_access_error_d  = Output(UInt(1.W))
-  val scan_mode                   = Input(UInt(1.W))})
-
-  val start_addr_in_dccm_d         = WireInit(0.U(1.W))
-  val start_addr_in_dccm_region_d  = WireInit(0.U(1.W))
-  val end_addr_in_dccm_d           = WireInit(0.U(1.W))
-  val end_addr_in_dccm_region_d    = WireInit(0.U(1.W))
-
-  //DCCM check
-  // Start address check
-  if(DCCM_ENABLE==1){  // Gen_dccm_enable
-    val start_addr_dccm_rangecheck = Module(new rvrangecheck(DCCM_SADR,DCCM_SIZE))
-    start_addr_dccm_rangecheck.io.addr  := io.start_addr_d
-    start_addr_in_dccm_d                := start_addr_dccm_rangecheck.io.in_range
-    start_addr_in_dccm_region_d         := start_addr_dccm_rangecheck.io.in_region
-
-    // End address check
-    val end_addr_dccm_rangecheck   = Module(new rvrangecheck(DCCM_SADR,DCCM_SIZE))
-    end_addr_dccm_rangecheck.io.addr    := io.end_addr_d
-    end_addr_in_dccm_d                  := end_addr_dccm_rangecheck.io.in_range
-    end_addr_in_dccm_region_d           := end_addr_dccm_rangecheck.io.in_region
-  }
-  else{  //Gen_dccm_disable
-    start_addr_in_dccm_d           := 0.U
-    start_addr_in_dccm_region_d    := 0.U
-    end_addr_in_dccm_d             := 0.U
-    end_addr_in_dccm_region_d      := 0.U
-  }
-
-  val addr_in_iccm  = WireInit(0.U(1.W))
-  if(ICCM_ENABLE == 1){  //check_iccm
-    addr_in_iccm := (io.start_addr_d(31,28) === pt.ICCM_REGION)
-  }
-  else{
-    addr_in_iccm := 1.U
-  }
-
-
-  //PIC memory check
-  //start address check
-  val start_addr_pic_rangecheck = Module(new rvrangecheck(PIC_BASE_ADDR,PIC_SIZE))
-  start_addr_pic_rangecheck.io.addr := io.start_addr_d(31,0)
-  val start_addr_in_pic_d            = start_addr_pic_rangecheck.io.in_range
-  val start_addr_in_pic_region_d     = start_addr_pic_rangecheck.io.in_region
-
-  //End address check
-  val end_addr_pic_rangecheck = Module(new rvrangecheck(PIC_BASE_ADDR,PIC_SIZE))
-  end_addr_pic_rangecheck.io.addr := io.end_addr_d(31,0)
-  val end_addr_in_pic_d            = end_addr_pic_rangecheck.io.in_range
-  val end_addr_in_pic_region_d     = end_addr_pic_rangecheck.io.in_region
-
-  val start_addr_dccm_or_pic = start_addr_in_dccm_region_d | start_addr_in_pic_region_d
-  val base_reg_dccm_or_pic   = (io.rs1_region_d(3,0) === DCCM_REGION.U) | (io.rs1_region_d(3,0) === PIC_REGION.U) //base region
-  io.addr_in_dccm_d            := (start_addr_in_dccm_d & end_addr_in_dccm_d)
-  io.addr_in_pic_d             := (start_addr_in_pic_d & end_addr_in_pic_d)
-
-  io.addr_external_d         := ~(start_addr_in_dccm_region_d | start_addr_in_pic_region_d); //if start address does not belong to dccm/pic
-  val csr_idx                = Cat(io.start_addr_d(31,28),1.U)
-  val is_sideeffects_d       = io.dec_tlu_mrac_ff(csr_idx) & ~(start_addr_in_dccm_region_d | start_addr_in_pic_region_d | addr_in_iccm) & io.lsu_pkt_d.valid & (io.lsu_pkt_d.store | io.lsu_pkt_d.load)  //every region has the 2 LSB indicating ( 1: sideeffects/no_side effects, and 0: cacheable ). Ignored in internal regions
-  val is_aligned_d           = (io.lsu_pkt_d.word & (io.start_addr_d(1,0) === 0.U)) | (io.lsu_pkt_d.half & (io.start_addr_d(0) === 0.U)) | io.lsu_pkt_d.by
-
-
-  val non_dccm_access_ok     = (~(Cat(DATA_ACCESS_ENABLE0.B, DATA_ACCESS_ENABLE1.B, DATA_ACCESS_ENABLE2.B, DATA_ACCESS_ENABLE3.B,
-    DATA_ACCESS_ENABLE4.B, DATA_ACCESS_ENABLE5.B, DATA_ACCESS_ENABLE6.B, DATA_ACCESS_ENABLE7.B)).orR) |
-    (((DATA_ACCESS_ENABLE0.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK0.U)) === (DATA_ACCESS_ADDR0.U | DATA_ACCESS_MASK0.U)) | //0111
-      (DATA_ACCESS_ENABLE1.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK1.U)) === (DATA_ACCESS_ADDR1.U | DATA_ACCESS_MASK1.U)) | //1111
-      (DATA_ACCESS_ENABLE2.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK2.U)) === (DATA_ACCESS_ADDR2.U | DATA_ACCESS_MASK2.U)) | //1011
-      (DATA_ACCESS_ENABLE3.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK3.U)) === (DATA_ACCESS_ADDR3.U | DATA_ACCESS_MASK3.U)) | //1000
-      (DATA_ACCESS_ENABLE4.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK4.U)) === (DATA_ACCESS_ADDR4.U | DATA_ACCESS_MASK4.U)) |
-      (DATA_ACCESS_ENABLE5.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK5.U)) === (DATA_ACCESS_ADDR5.U | DATA_ACCESS_MASK5.U)) |
-      (DATA_ACCESS_ENABLE6.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK6.U)) === (DATA_ACCESS_ADDR6.U | DATA_ACCESS_MASK6.U)) |
-      (DATA_ACCESS_ENABLE7.B & ((io.start_addr_d(31,0) | DATA_ACCESS_MASK7.U)) === (DATA_ACCESS_ADDR7.U | DATA_ACCESS_MASK7.U)))
-      &
-      ((DATA_ACCESS_ENABLE0.B & ((io.end_addr_d(31,0)   | DATA_ACCESS_MASK0.U)) === (DATA_ACCESS_ADDR0.U | DATA_ACCESS_MASK0.U)) |
-        (DATA_ACCESS_ENABLE1.B & ((io.end_addr_d(31,0)   | DATA_ACCESS_MASK1.U)) === (DATA_ACCESS_ADDR1.U | DATA_ACCESS_MASK1.U)) |
-        (DATA_ACCESS_ENABLE2.B & ((io.end_addr_d(31,0)   | DATA_ACCESS_MASK2.U)) === (DATA_ACCESS_ADDR2.U | DATA_ACCESS_MASK2.U)) |
-        (DATA_ACCESS_ENABLE3.B & ((io.end_addr_d(31,0)   | DATA_ACCESS_MASK3.U)) === (DATA_ACCESS_ADDR3.U | DATA_ACCESS_MASK3.U)) |
-        (DATA_ACCESS_ENABLE4.B & ((io.end_addr_d(31,0)   | DATA_ACCESS_MASK4.U)) === (DATA_ACCESS_ADDR4.U | DATA_ACCESS_MASK4.U)) |
-        (DATA_ACCESS_ENABLE5.B & ((io.end_addr_d(31,0)   | DATA_ACCESS_MASK5.U)) === (DATA_ACCESS_ADDR5.U | DATA_ACCESS_MASK5.U)) |
-        (DATA_ACCESS_ENABLE6.B & ((io.end_addr_d(31,0)   | DATA_ACCESS_MASK6.U)) === (DATA_ACCESS_ADDR6.U | DATA_ACCESS_MASK6.U)) |
-        (DATA_ACCESS_ENABLE7.B & ((io.end_addr_d(31,0)   | DATA_ACCESS_MASK7.U)) === (DATA_ACCESS_ADDR7.U | DATA_ACCESS_MASK7.U))))
-
-  val regpred_access_fault_d  = (start_addr_dccm_or_pic ^ base_reg_dccm_or_pic)
-  val picm_access_fault_d     = (io.addr_in_pic_d & ((io.start_addr_d(1,0) =/= 0.U(2.W)) | ~io.lsu_pkt_d.word))
-
-  val unmapped_access_fault_d = WireInit(1.U(1.W))
-  val mpu_access_fault_d      = WireInit(1.U(1.W))
-  if(DCCM_REGION == PIC_REGION){
-    unmapped_access_fault_d := ((start_addr_in_dccm_region_d & ~(start_addr_in_dccm_d | start_addr_in_pic_d))  |
-      // 0. Addr in dccm/pic region but not in dccm/pic offset
-      (end_addr_in_dccm_region_d & ~(end_addr_in_dccm_d | end_addr_in_pic_d))       |
-      // 0. Addr in dccm/pic region but not in dccm/pic offset
-      (start_addr_in_dccm_d & end_addr_in_pic_d)                                    |
-      // 0. DCCM -> PIC cross when DCCM/PIC in same region
-      (start_addr_in_pic_d  & end_addr_in_dccm_d))
-    // 0. DCCM -> PIC cross when DCCM/PIC in same region
-    mpu_access_fault_d      := (~start_addr_in_dccm_region_d & ~non_dccm_access_ok)
-    // 3. Address is not in a populated non-dccm region
-  }
-
-  else{
-    unmapped_access_fault_d := ((start_addr_in_dccm_region_d & ~start_addr_in_dccm_d) | (end_addr_in_dccm_region_d & ~end_addr_in_dccm_d)   |
-      (start_addr_in_pic_region_d  & ~start_addr_in_pic_d)  | (end_addr_in_pic_region_d & ~end_addr_in_pic_d))
-    mpu_access_fault_d      := (~start_addr_in_pic_region_d & ~start_addr_in_dccm_region_d & ~non_dccm_access_ok);
-    // 3. Address is not in a populated non-dccm region
-  }
-
-  //check width of  access_fault_mscause_d
-  io.access_fault_d := (unmapped_access_fault_d | mpu_access_fault_d | picm_access_fault_d | regpred_access_fault_d) & io.lsu_pkt_d.valid & ~io.lsu_pkt_d.dma
-  val access_fault_mscause_d = Mux(unmapped_access_fault_d.asBool,2.U(4.W), Mux(mpu_access_fault_d.asBool,3.U(4.W), Mux(regpred_access_fault_d.asBool,5.U(4.W), Mux(picm_access_fault_d.asBool,6.U(4.W),0.U(4.W)))))
-  val regcross_misaligned_fault_d = (io.start_addr_d(31,28) =/= io.end_addr_d(31,28))
-  val sideeffect_misaligned_fault_d = (is_sideeffects_d & ~ is_aligned_d)
-  io.misaligned_fault_d := (regcross_misaligned_fault_d | (sideeffect_misaligned_fault_d & io.addr_external_d)) & io.lsu_pkt_d.valid & ~io.lsu_pkt_d.dma
-  val misaligned_fault_mscause_d = Mux(regcross_misaligned_fault_d,2.U(4.W),Mux(sideeffect_misaligned_fault_d.asBool,1.U(4.W),0.U(4.W)))
-  io.exc_mscause_d  := Mux(io.misaligned_fault_d.asBool, misaligned_fault_mscause_d(3,0), access_fault_mscause_d(3,0))
-  io.fir_dccm_access_error_d  := ((start_addr_in_dccm_region_d & ~start_addr_in_dccm_d)|(end_addr_in_dccm_region_d   & ~end_addr_in_dccm_d)) & io.lsu_pkt_d.valid & io.lsu_pkt_d.fast_int
-  io.fir_nondccm_access_error_d := ~(start_addr_in_dccm_region_d & end_addr_in_dccm_region_d) & io.lsu_pkt_d.valid & io.lsu_pkt_d.fast_int
-
-  withClock(io.lsu_c2_m_clk){io.is_sideeffects_m := RegNext(is_sideeffects_d,0.U)} //TBD for clock and reset
-}
-//println(chisel3.Driver.emitVerilog(new el2_lsu_addrcheck))
-
-object address_checker extends App{
-  println("Generate Verilog")
-  chisel3.Driver.execute(args, ()=> new el2_lsu_addrcheck)
-}
diff --git a/target/scala-2.12/classes/META-INF/chisel-module-template.kotlin_module b/target/scala-2.12/classes/META-INF/chisel-module-template.kotlin_module
new file mode 100644
index 00000000..a49347af
Binary files /dev/null and b/target/scala-2.12/classes/META-INF/chisel-module-template.kotlin_module differ
diff --git a/target/scala-2.12/classes/include/el2_lsu_pkt_t.class b/target/scala-2.12/classes/include/el2_lsu_pkt_t.class
index fe470766..dc50cae8 100644
Binary files a/target/scala-2.12/classes/include/el2_lsu_pkt_t.class and b/target/scala-2.12/classes/include/el2_lsu_pkt_t.class differ
diff --git a/target/scala-2.12/classes/lsu/BusBufmain$.class b/target/scala-2.12/classes/lsu/BusBufmain$.class
new file mode 100644
index 00000000..9d831a82
Binary files /dev/null and b/target/scala-2.12/classes/lsu/BusBufmain$.class differ
diff --git a/target/scala-2.12/classes/lsu/BusBufmain$delayedInit$body.class b/target/scala-2.12/classes/lsu/BusBufmain$delayedInit$body.class
new file mode 100644
index 00000000..b0b013a3
Binary files /dev/null and b/target/scala-2.12/classes/lsu/BusBufmain$delayedInit$body.class differ
diff --git a/target/scala-2.12/classes/lsu/BusBufmain.class b/target/scala-2.12/classes/lsu/BusBufmain.class
new file mode 100644
index 00000000..ef4d5cd1
Binary files /dev/null and b/target/scala-2.12/classes/lsu/BusBufmain.class differ
diff --git a/target/scala-2.12/classes/lsu/address_checker$.class b/target/scala-2.12/classes/lsu/address_checker$.class
deleted file mode 100644
index fddeed12..00000000
Binary files a/target/scala-2.12/classes/lsu/address_checker$.class and /dev/null differ
diff --git a/target/scala-2.12/classes/lsu/address_checker$delayedInit$body.class b/target/scala-2.12/classes/lsu/address_checker$delayedInit$body.class
deleted file mode 100644
index 217cee43..00000000
Binary files a/target/scala-2.12/classes/lsu/address_checker$delayedInit$body.class and /dev/null differ
diff --git a/target/scala-2.12/classes/lsu/address_checker.class b/target/scala-2.12/classes/lsu/address_checker.class
deleted file mode 100644
index 93193574..00000000
Binary files a/target/scala-2.12/classes/lsu/address_checker.class and /dev/null differ
diff --git a/target/scala-2.12/classes/lsu/el2_lsu_addrcheck$$anon$1.class b/target/scala-2.12/classes/lsu/el2_lsu_addrcheck$$anon$1.class
deleted file mode 100644
index f22084f5..00000000
Binary files a/target/scala-2.12/classes/lsu/el2_lsu_addrcheck$$anon$1.class and /dev/null differ
diff --git a/target/scala-2.12/classes/lsu/el2_lsu_addrcheck.class b/target/scala-2.12/classes/lsu/el2_lsu_addrcheck.class
deleted file mode 100644
index f3404663..00000000
Binary files a/target/scala-2.12/classes/lsu/el2_lsu_addrcheck.class and /dev/null differ
diff --git a/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer$$anon$1.class b/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer$$anon$1.class
new file mode 100644
index 00000000..17dfed87
Binary files /dev/null and b/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer$$anon$1.class differ
diff --git a/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class b/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class
new file mode 100644
index 00000000..48a5b9d5
Binary files /dev/null and b/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class differ