Predictor Updated
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el2_ifu_bp_ctl.fir
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el2_ifu_bp_ctl.fir
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5754
el2_ifu_bp_ctl.v
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el2_ifu_bp_ctl.v
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@ -38,7 +38,7 @@ class el2_ifu_bp_ctl extends Module with el2_lib with RequireAsyncReset {
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val ifu_bp_pc4_f = Output(UInt(2.W))
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val ifu_bp_pc4_f = Output(UInt(2.W))
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val ifu_bp_valid_f = Output(UInt(2.W))
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val ifu_bp_valid_f = Output(UInt(2.W))
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val ifu_bp_poffset_f = Output(UInt(12.W))
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val ifu_bp_poffset_f = Output(UInt(12.W))
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//val test = Output(UInt())
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// val test = Output(UInt())
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})
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})
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val TAG_START = 16+BTB_BTAG_SIZE
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val TAG_START = 16+BTB_BTAG_SIZE
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@ -389,13 +389,13 @@ class el2_ifu_bp_ctl extends Module with el2_lib with RequireAsyncReset {
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val bht_bank_rd_data_out = Wire(Vec(2, Vec(BHT_ARRAY_DEPTH, UInt(2.W))))
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val bht_bank_rd_data_out = Wire(Vec(2, Vec(BHT_ARRAY_DEPTH, UInt(2.W))))
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for(i<-0 until 2; k<-0 until BHT_ARRAY_DEPTH/NUM_BHT_LOOP; j<-0 until NUM_BHT_LOOP){
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for(i<-0 until 2; k<-0 until BHT_ARRAY_DEPTH/NUM_BHT_LOOP; j<-0 until NUM_BHT_LOOP){
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bht_bank_rd_data_out(i)((16*k)+j) := RegEnable(bht_bank_wr_data(i)(k)(j), 0.U, bht_bank_sel(i)(k)(j))
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bht_bank_rd_data_out(i)((16*k)+j) := RegEnable(bht_bank_wr_data(i)(k)(j), 0.U, bht_bank_sel(i)(k)(j)&bht_bank_clken(i)(k))
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}
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}
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bht_bank0_rd_data_f := Mux1H((0 until BHT_ARRAY_DEPTH).map(i=>(bht_rd_addr_f(BHT_ADDR_HI-BHT_ADDR_LO,0)===i.U).asBool->bht_bank_rd_data_out(0)(i)))
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bht_bank0_rd_data_f := Mux1H((0 until BHT_ARRAY_DEPTH).map(i=>(bht_rd_addr_f(BHT_ADDR_HI-BHT_ADDR_LO,0)===i.U).asBool->bht_bank_rd_data_out(0)(i)))
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bht_bank1_rd_data_f := Mux1H((0 until BHT_ARRAY_DEPTH).map(i=>(bht_rd_addr_f(BHT_ADDR_HI-BHT_ADDR_LO,0)===i.U).asBool->bht_bank_rd_data_out(1)(i)))
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bht_bank1_rd_data_f := Mux1H((0 until BHT_ARRAY_DEPTH).map(i=>(bht_rd_addr_f(BHT_ADDR_HI-BHT_ADDR_LO,0)===i.U).asBool->bht_bank_rd_data_out(1)(i)))
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bht_bank0_rd_data_p1_f := Mux1H((0 until BHT_ARRAY_DEPTH).map(i=>(bht_rd_addr_p1_f(BHT_ADDR_HI-BHT_ADDR_LO,0)===i.U).asBool->bht_bank_rd_data_out(1)(i)))
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bht_bank0_rd_data_p1_f := Mux1H((0 until BHT_ARRAY_DEPTH).map(i=>(bht_rd_addr_p1_f(BHT_ADDR_HI-BHT_ADDR_LO,0)===i.U).asBool->bht_bank_rd_data_out(1)(i)))
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// io.test := bht_rd_addr_f
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//io.test := bht_rd_addr_f
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}
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}
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object ifu_bp extends App {
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object ifu_bp extends App {
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