From b6a916aca4a7e68e245abff43c7abdad996198f5 Mon Sep 17 00:00:00 2001
From: colin <lianghongkey@gmail.com>
Date: Sun, 20 Mar 2022 09:04:32 +0000
Subject: [PATCH] Modify RAM and ROM to WIDTH=12 4K Byte.

---
 demo/link.ld     | 4 ++--
 demo/link_pro.ld | 4 ++--
 soc/ahb_sif.sv   | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/demo/link.ld b/demo/link.ld
index 468c21d9..02a68699 100644
--- a/demo/link.ld
+++ b/demo/link.ld
@@ -8,8 +8,8 @@ SECTIONS
   .text_init   : { *(.text_init*) }
   .text   : { *(.text*) }
   _end = .;
-  . = 0x80004000;
-  .data  :  ALIGN(0x800) { *(.*data) *(.rodata*) STACK = ALIGN(16) + 0x2000; }
+  . = 0xf0040000;
+  .data  :  ALIGN(0x800) { *(.*data) *(.rodata*) STACK = ALIGN(16) + 0x8000; }
   .bss : { *(.bss) }
   . = 0xd0580000;
   .data.io   : { *(.data.io) }
diff --git a/demo/link_pro.ld b/demo/link_pro.ld
index 5adbb402..c7120c6d 100644
--- a/demo/link_pro.ld
+++ b/demo/link_pro.ld
@@ -8,8 +8,8 @@ SECTIONS
   .text_init   : { *(.text_init*) }
   .text   : { *(.text*) }
   _end = .;
-  . = 0x4000;
-  .data  :  ALIGN(0x800) { *(.*data) *(.rodata*) STACK = ALIGN(16) + 0x2000; }
+  . = 0x800;
+  .data  :  ALIGN(0x800) { *(.*data) *(.rodata*) STACK = ALIGN(16) + 0x8000; }
   .bss : { *(.bss) }
   . = 0xd0580000;
   .data.io   : { *(.data.io) }
diff --git a/soc/ahb_sif.sv b/soc/ahb_sif.sv
index a80b50c4..56b3c696 100644
--- a/soc/ahb_sif.sv
+++ b/soc/ahb_sif.sv
@@ -53,7 +53,7 @@ module axi_slv #(
     output reg [TAGW-1:0] bid
 );
 
-  parameter MEM_DEPTH = 15;  // memory size = 0x8000 = 32k
+  parameter MEM_DEPTH = 12;  // memory size = 0x8000 = 32k WIDTH=15
 
   bit [7:0] mem[(1<<MEM_DEPTH)-1:0];