From bf4de4dc91f81bf193d66d81696537678845244e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E2=80=8BLaraib=20Khan?= <​laraib.khan@lampromellon.com>
Date: Thu, 7 Jan 2021 16:28:05 +0500
Subject: [PATCH] All 5 dividers added with LEC

---
 exu_div_ctl.fir                               | 4377 +++++++++--------
 exu_div_ctl.v                                 | 1751 ++++---
 src/main/scala/exu/exu_div_ctl.scala          |   13 +-
 .../exu/{div_main5$.class => div_main$.class} |  Bin 3906 -> 3868 bytes
 .../exu/div_main$delayedInit$body.class       |  Bin 0 -> 738 bytes
 target/scala-2.12/classes/exu/div_main.class  |  Bin 0 -> 781 bytes
 .../exu/div_main5$delayedInit$body.class      |  Bin 744 -> 0 bytes
 target/scala-2.12/classes/exu/div_main5.class |  Bin 787 -> 0 bytes
 .../classes/exu/exu_div_cls$$anon$7.class     |  Bin 1694 -> 1694 bytes
 .../scala-2.12/classes/exu/exu_div_cls.class  |  Bin 11057 -> 11057 bytes
 ...iv_existing_1bit_cheapshortq$$anon$2.class |  Bin 2847 -> 2847 bytes
 .../exu_div_existing_1bit_cheapshortq.class   |  Bin 112188 -> 112188 bytes
 .../exu_div_new_1bit_fullshortq$$anon$3.class |  Bin 2817 -> 2817 bytes
 .../exu/exu_div_new_1bit_fullshortq.class     |  Bin 104405 -> 104405 bytes
 .../exu_div_new_2bit_fullshortq$$anon$4.class |  Bin 2817 -> 2817 bytes
 .../exu/exu_div_new_2bit_fullshortq.class     |  Bin 108459 -> 108459 bytes
 .../exu_div_new_3bit_fullshortq$$anon$5.class |  Bin 2817 -> 2817 bytes
 .../exu/exu_div_new_3bit_fullshortq.class     |  Bin 116620 -> 116620 bytes
 .../exu_div_new_4bit_fullshortq$$anon$6.class |  Bin 2817 -> 2817 bytes
 .../exu/exu_div_new_4bit_fullshortq.class     |  Bin 126211 -> 126213 bytes
 20 files changed, 3471 insertions(+), 2670 deletions(-)
 rename target/scala-2.12/classes/exu/{div_main5$.class => div_main$.class} (63%)
 create mode 100644 target/scala-2.12/classes/exu/div_main$delayedInit$body.class
 create mode 100644 target/scala-2.12/classes/exu/div_main.class
 delete mode 100644 target/scala-2.12/classes/exu/div_main5$delayedInit$body.class
 delete mode 100644 target/scala-2.12/classes/exu/div_main5.class

diff --git a/exu_div_ctl.fir b/exu_div_ctl.fir
index 12846221..ef8c60a8 100644
--- a/exu_div_ctl.fir
+++ b/exu_div_ctl.fir
@@ -1,5 +1,741 @@
 ;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
 circuit exu_div_ctl : 
+  module exu_div_cls : 
+    input clock : Clock
+    input reset : Reset
+    output io : {flip operand : UInt<33>, cls : UInt<5>}
+    
+    wire cls_zeros : UInt<5>
+    cls_zeros <= UInt<5>("h00")
+    wire cls_ones : UInt<5>
+    cls_ones <= UInt<5>("h00")
+    node _T = bits(io.operand, 31, 31) @[exu_div_ctl.scala 956:54]
+    node _T_1 = eq(_T, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_2 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 956:54]
+    node _T_3 = eq(_T_2, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_4 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 956:54]
+    node _T_5 = eq(_T_4, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_6 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 956:54]
+    node _T_7 = eq(_T_6, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_8 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 956:54]
+    node _T_9 = eq(_T_8, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_10 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 956:54]
+    node _T_11 = eq(_T_10, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_12 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 956:54]
+    node _T_13 = eq(_T_12, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_14 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 956:54]
+    node _T_15 = eq(_T_14, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_16 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 956:54]
+    node _T_17 = eq(_T_16, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_18 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 956:54]
+    node _T_19 = eq(_T_18, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_20 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 956:54]
+    node _T_21 = eq(_T_20, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_22 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 956:54]
+    node _T_23 = eq(_T_22, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_24 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 956:54]
+    node _T_25 = eq(_T_24, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_26 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 956:54]
+    node _T_27 = eq(_T_26, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_28 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 956:54]
+    node _T_29 = eq(_T_28, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_30 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 956:54]
+    node _T_31 = eq(_T_30, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_32 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 956:54]
+    node _T_33 = eq(_T_32, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_34 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 956:54]
+    node _T_35 = eq(_T_34, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_36 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 956:54]
+    node _T_37 = eq(_T_36, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_38 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 956:54]
+    node _T_39 = eq(_T_38, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_40 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 956:54]
+    node _T_41 = eq(_T_40, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_42 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 956:54]
+    node _T_43 = eq(_T_42, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_44 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 956:54]
+    node _T_45 = eq(_T_44, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_46 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 956:54]
+    node _T_47 = eq(_T_46, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_48 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 956:54]
+    node _T_49 = eq(_T_48, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_50 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 956:54]
+    node _T_51 = eq(_T_50, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_52 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 956:54]
+    node _T_53 = eq(_T_52, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_54 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 956:54]
+    node _T_55 = eq(_T_54, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_56 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 956:54]
+    node _T_57 = eq(_T_56, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_58 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 956:54]
+    node _T_59 = eq(_T_58, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_60 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 956:54]
+    node _T_61 = eq(_T_60, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_62 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 956:54]
+    node _T_63 = eq(_T_62, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_64 = mux(_T_1, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_65 = mux(_T_3, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_66 = mux(_T_5, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_67 = mux(_T_7, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_68 = mux(_T_9, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_69 = mux(_T_11, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_70 = mux(_T_13, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_71 = mux(_T_15, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_72 = mux(_T_17, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_73 = mux(_T_19, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_74 = mux(_T_21, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_75 = mux(_T_23, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_76 = mux(_T_25, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_77 = mux(_T_27, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_78 = mux(_T_29, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_79 = mux(_T_31, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_80 = mux(_T_33, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_81 = mux(_T_35, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_82 = mux(_T_37, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_83 = mux(_T_39, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_84 = mux(_T_41, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_85 = mux(_T_43, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_86 = mux(_T_45, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_87 = mux(_T_47, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_88 = mux(_T_49, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_89 = mux(_T_51, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_90 = mux(_T_53, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_91 = mux(_T_55, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_92 = mux(_T_57, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_93 = mux(_T_59, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_94 = mux(_T_61, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_95 = mux(_T_63, UInt<5>("h01f"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_96 = or(_T_64, _T_65) @[Mux.scala 27:72]
+    node _T_97 = or(_T_96, _T_66) @[Mux.scala 27:72]
+    node _T_98 = or(_T_97, _T_67) @[Mux.scala 27:72]
+    node _T_99 = or(_T_98, _T_68) @[Mux.scala 27:72]
+    node _T_100 = or(_T_99, _T_69) @[Mux.scala 27:72]
+    node _T_101 = or(_T_100, _T_70) @[Mux.scala 27:72]
+    node _T_102 = or(_T_101, _T_71) @[Mux.scala 27:72]
+    node _T_103 = or(_T_102, _T_72) @[Mux.scala 27:72]
+    node _T_104 = or(_T_103, _T_73) @[Mux.scala 27:72]
+    node _T_105 = or(_T_104, _T_74) @[Mux.scala 27:72]
+    node _T_106 = or(_T_105, _T_75) @[Mux.scala 27:72]
+    node _T_107 = or(_T_106, _T_76) @[Mux.scala 27:72]
+    node _T_108 = or(_T_107, _T_77) @[Mux.scala 27:72]
+    node _T_109 = or(_T_108, _T_78) @[Mux.scala 27:72]
+    node _T_110 = or(_T_109, _T_79) @[Mux.scala 27:72]
+    node _T_111 = or(_T_110, _T_80) @[Mux.scala 27:72]
+    node _T_112 = or(_T_111, _T_81) @[Mux.scala 27:72]
+    node _T_113 = or(_T_112, _T_82) @[Mux.scala 27:72]
+    node _T_114 = or(_T_113, _T_83) @[Mux.scala 27:72]
+    node _T_115 = or(_T_114, _T_84) @[Mux.scala 27:72]
+    node _T_116 = or(_T_115, _T_85) @[Mux.scala 27:72]
+    node _T_117 = or(_T_116, _T_86) @[Mux.scala 27:72]
+    node _T_118 = or(_T_117, _T_87) @[Mux.scala 27:72]
+    node _T_119 = or(_T_118, _T_88) @[Mux.scala 27:72]
+    node _T_120 = or(_T_119, _T_89) @[Mux.scala 27:72]
+    node _T_121 = or(_T_120, _T_90) @[Mux.scala 27:72]
+    node _T_122 = or(_T_121, _T_91) @[Mux.scala 27:72]
+    node _T_123 = or(_T_122, _T_92) @[Mux.scala 27:72]
+    node _T_124 = or(_T_123, _T_93) @[Mux.scala 27:72]
+    node _T_125 = or(_T_124, _T_94) @[Mux.scala 27:72]
+    node _T_126 = or(_T_125, _T_95) @[Mux.scala 27:72]
+    wire _T_127 : UInt<5> @[Mux.scala 27:72]
+    _T_127 <= _T_126 @[Mux.scala 27:72]
+    cls_zeros <= _T_127 @[exu_div_ctl.scala 956:13]
+    node _T_128 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 958:18]
+    node _T_129 = eq(_T_128, UInt<32>("h0ffffffff")) @[exu_div_ctl.scala 958:25]
+    when _T_129 : @[exu_div_ctl.scala 958:44]
+      cls_ones <= UInt<5>("h01f") @[exu_div_ctl.scala 958:55]
+      skip @[exu_div_ctl.scala 958:44]
+    else : @[exu_div_ctl.scala 959:15]
+      node _T_130 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 959:66]
+      node _T_131 = cat(UInt<1>("h01"), UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_132 = eq(_T_130, _T_131) @[exu_div_ctl.scala 959:76]
+      node _T_133 = bits(_T_132, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_134 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 959:66]
+      node _T_135 = mux(UInt<1>("h01"), UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
+      node _T_136 = cat(_T_135, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_137 = eq(_T_134, _T_136) @[exu_div_ctl.scala 959:76]
+      node _T_138 = bits(_T_137, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_139 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 959:66]
+      node _T_140 = mux(UInt<1>("h01"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12]
+      node _T_141 = cat(_T_140, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_142 = eq(_T_139, _T_141) @[exu_div_ctl.scala 959:76]
+      node _T_143 = bits(_T_142, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_144 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 959:66]
+      node _T_145 = mux(UInt<1>("h01"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
+      node _T_146 = cat(_T_145, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_147 = eq(_T_144, _T_146) @[exu_div_ctl.scala 959:76]
+      node _T_148 = bits(_T_147, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_149 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 959:66]
+      node _T_150 = mux(UInt<1>("h01"), UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
+      node _T_151 = cat(_T_150, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_152 = eq(_T_149, _T_151) @[exu_div_ctl.scala 959:76]
+      node _T_153 = bits(_T_152, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_154 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 959:66]
+      node _T_155 = mux(UInt<1>("h01"), UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
+      node _T_156 = cat(_T_155, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_157 = eq(_T_154, _T_156) @[exu_div_ctl.scala 959:76]
+      node _T_158 = bits(_T_157, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_159 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 959:66]
+      node _T_160 = mux(UInt<1>("h01"), UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
+      node _T_161 = cat(_T_160, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_162 = eq(_T_159, _T_161) @[exu_div_ctl.scala 959:76]
+      node _T_163 = bits(_T_162, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_164 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 959:66]
+      node _T_165 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+      node _T_166 = cat(_T_165, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_167 = eq(_T_164, _T_166) @[exu_div_ctl.scala 959:76]
+      node _T_168 = bits(_T_167, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_169 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 959:66]
+      node _T_170 = mux(UInt<1>("h01"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12]
+      node _T_171 = cat(_T_170, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_172 = eq(_T_169, _T_171) @[exu_div_ctl.scala 959:76]
+      node _T_173 = bits(_T_172, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_174 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 959:66]
+      node _T_175 = mux(UInt<1>("h01"), UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
+      node _T_176 = cat(_T_175, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_177 = eq(_T_174, _T_176) @[exu_div_ctl.scala 959:76]
+      node _T_178 = bits(_T_177, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_179 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 959:66]
+      node _T_180 = mux(UInt<1>("h01"), UInt<11>("h07ff"), UInt<11>("h00")) @[Bitwise.scala 72:12]
+      node _T_181 = cat(_T_180, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_182 = eq(_T_179, _T_181) @[exu_div_ctl.scala 959:76]
+      node _T_183 = bits(_T_182, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_184 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 959:66]
+      node _T_185 = mux(UInt<1>("h01"), UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12]
+      node _T_186 = cat(_T_185, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_187 = eq(_T_184, _T_186) @[exu_div_ctl.scala 959:76]
+      node _T_188 = bits(_T_187, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_189 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 959:66]
+      node _T_190 = mux(UInt<1>("h01"), UInt<13>("h01fff"), UInt<13>("h00")) @[Bitwise.scala 72:12]
+      node _T_191 = cat(_T_190, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_192 = eq(_T_189, _T_191) @[exu_div_ctl.scala 959:76]
+      node _T_193 = bits(_T_192, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_194 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 959:66]
+      node _T_195 = mux(UInt<1>("h01"), UInt<14>("h03fff"), UInt<14>("h00")) @[Bitwise.scala 72:12]
+      node _T_196 = cat(_T_195, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_197 = eq(_T_194, _T_196) @[exu_div_ctl.scala 959:76]
+      node _T_198 = bits(_T_197, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_199 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 959:66]
+      node _T_200 = mux(UInt<1>("h01"), UInt<15>("h07fff"), UInt<15>("h00")) @[Bitwise.scala 72:12]
+      node _T_201 = cat(_T_200, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_202 = eq(_T_199, _T_201) @[exu_div_ctl.scala 959:76]
+      node _T_203 = bits(_T_202, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_204 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 959:66]
+      node _T_205 = mux(UInt<1>("h01"), UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
+      node _T_206 = cat(_T_205, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_207 = eq(_T_204, _T_206) @[exu_div_ctl.scala 959:76]
+      node _T_208 = bits(_T_207, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_209 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 959:66]
+      node _T_210 = mux(UInt<1>("h01"), UInt<17>("h01ffff"), UInt<17>("h00")) @[Bitwise.scala 72:12]
+      node _T_211 = cat(_T_210, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_212 = eq(_T_209, _T_211) @[exu_div_ctl.scala 959:76]
+      node _T_213 = bits(_T_212, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_214 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 959:66]
+      node _T_215 = mux(UInt<1>("h01"), UInt<18>("h03ffff"), UInt<18>("h00")) @[Bitwise.scala 72:12]
+      node _T_216 = cat(_T_215, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_217 = eq(_T_214, _T_216) @[exu_div_ctl.scala 959:76]
+      node _T_218 = bits(_T_217, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_219 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 959:66]
+      node _T_220 = mux(UInt<1>("h01"), UInt<19>("h07ffff"), UInt<19>("h00")) @[Bitwise.scala 72:12]
+      node _T_221 = cat(_T_220, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_222 = eq(_T_219, _T_221) @[exu_div_ctl.scala 959:76]
+      node _T_223 = bits(_T_222, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_224 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 959:66]
+      node _T_225 = mux(UInt<1>("h01"), UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12]
+      node _T_226 = cat(_T_225, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_227 = eq(_T_224, _T_226) @[exu_div_ctl.scala 959:76]
+      node _T_228 = bits(_T_227, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_229 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 959:66]
+      node _T_230 = mux(UInt<1>("h01"), UInt<21>("h01fffff"), UInt<21>("h00")) @[Bitwise.scala 72:12]
+      node _T_231 = cat(_T_230, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_232 = eq(_T_229, _T_231) @[exu_div_ctl.scala 959:76]
+      node _T_233 = bits(_T_232, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_234 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 959:66]
+      node _T_235 = mux(UInt<1>("h01"), UInt<22>("h03fffff"), UInt<22>("h00")) @[Bitwise.scala 72:12]
+      node _T_236 = cat(_T_235, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_237 = eq(_T_234, _T_236) @[exu_div_ctl.scala 959:76]
+      node _T_238 = bits(_T_237, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_239 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 959:66]
+      node _T_240 = mux(UInt<1>("h01"), UInt<23>("h07fffff"), UInt<23>("h00")) @[Bitwise.scala 72:12]
+      node _T_241 = cat(_T_240, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_242 = eq(_T_239, _T_241) @[exu_div_ctl.scala 959:76]
+      node _T_243 = bits(_T_242, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_244 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 959:66]
+      node _T_245 = mux(UInt<1>("h01"), UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
+      node _T_246 = cat(_T_245, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_247 = eq(_T_244, _T_246) @[exu_div_ctl.scala 959:76]
+      node _T_248 = bits(_T_247, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_249 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 959:66]
+      node _T_250 = mux(UInt<1>("h01"), UInt<25>("h01ffffff"), UInt<25>("h00")) @[Bitwise.scala 72:12]
+      node _T_251 = cat(_T_250, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_252 = eq(_T_249, _T_251) @[exu_div_ctl.scala 959:76]
+      node _T_253 = bits(_T_252, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_254 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 959:66]
+      node _T_255 = mux(UInt<1>("h01"), UInt<26>("h03ffffff"), UInt<26>("h00")) @[Bitwise.scala 72:12]
+      node _T_256 = cat(_T_255, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_257 = eq(_T_254, _T_256) @[exu_div_ctl.scala 959:76]
+      node _T_258 = bits(_T_257, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_259 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 959:66]
+      node _T_260 = mux(UInt<1>("h01"), UInt<27>("h07ffffff"), UInt<27>("h00")) @[Bitwise.scala 72:12]
+      node _T_261 = cat(_T_260, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_262 = eq(_T_259, _T_261) @[exu_div_ctl.scala 959:76]
+      node _T_263 = bits(_T_262, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_264 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 959:66]
+      node _T_265 = mux(UInt<1>("h01"), UInt<28>("h0fffffff"), UInt<28>("h00")) @[Bitwise.scala 72:12]
+      node _T_266 = cat(_T_265, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_267 = eq(_T_264, _T_266) @[exu_div_ctl.scala 959:76]
+      node _T_268 = bits(_T_267, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_269 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 959:66]
+      node _T_270 = mux(UInt<1>("h01"), UInt<29>("h01fffffff"), UInt<29>("h00")) @[Bitwise.scala 72:12]
+      node _T_271 = cat(_T_270, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_272 = eq(_T_269, _T_271) @[exu_div_ctl.scala 959:76]
+      node _T_273 = bits(_T_272, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_274 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 959:66]
+      node _T_275 = mux(UInt<1>("h01"), UInt<30>("h03fffffff"), UInt<30>("h00")) @[Bitwise.scala 72:12]
+      node _T_276 = cat(_T_275, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_277 = eq(_T_274, _T_276) @[exu_div_ctl.scala 959:76]
+      node _T_278 = bits(_T_277, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_279 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 959:66]
+      node _T_280 = mux(UInt<1>("h01"), UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
+      node _T_281 = cat(_T_280, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_282 = eq(_T_279, _T_281) @[exu_div_ctl.scala 959:76]
+      node _T_283 = bits(_T_282, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_284 = mux(_T_133, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_285 = mux(_T_138, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_286 = mux(_T_143, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_287 = mux(_T_148, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_288 = mux(_T_153, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_289 = mux(_T_158, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_290 = mux(_T_163, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_291 = mux(_T_168, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_292 = mux(_T_173, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_293 = mux(_T_178, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_294 = mux(_T_183, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_295 = mux(_T_188, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_296 = mux(_T_193, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_297 = mux(_T_198, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_298 = mux(_T_203, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_299 = mux(_T_208, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_300 = mux(_T_213, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_301 = mux(_T_218, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_302 = mux(_T_223, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_303 = mux(_T_228, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_304 = mux(_T_233, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_305 = mux(_T_238, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_306 = mux(_T_243, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_307 = mux(_T_248, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_308 = mux(_T_253, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_309 = mux(_T_258, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_310 = mux(_T_263, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_311 = mux(_T_268, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_312 = mux(_T_273, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_313 = mux(_T_278, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_314 = mux(_T_283, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_315 = or(_T_284, _T_285) @[Mux.scala 27:72]
+      node _T_316 = or(_T_315, _T_286) @[Mux.scala 27:72]
+      node _T_317 = or(_T_316, _T_287) @[Mux.scala 27:72]
+      node _T_318 = or(_T_317, _T_288) @[Mux.scala 27:72]
+      node _T_319 = or(_T_318, _T_289) @[Mux.scala 27:72]
+      node _T_320 = or(_T_319, _T_290) @[Mux.scala 27:72]
+      node _T_321 = or(_T_320, _T_291) @[Mux.scala 27:72]
+      node _T_322 = or(_T_321, _T_292) @[Mux.scala 27:72]
+      node _T_323 = or(_T_322, _T_293) @[Mux.scala 27:72]
+      node _T_324 = or(_T_323, _T_294) @[Mux.scala 27:72]
+      node _T_325 = or(_T_324, _T_295) @[Mux.scala 27:72]
+      node _T_326 = or(_T_325, _T_296) @[Mux.scala 27:72]
+      node _T_327 = or(_T_326, _T_297) @[Mux.scala 27:72]
+      node _T_328 = or(_T_327, _T_298) @[Mux.scala 27:72]
+      node _T_329 = or(_T_328, _T_299) @[Mux.scala 27:72]
+      node _T_330 = or(_T_329, _T_300) @[Mux.scala 27:72]
+      node _T_331 = or(_T_330, _T_301) @[Mux.scala 27:72]
+      node _T_332 = or(_T_331, _T_302) @[Mux.scala 27:72]
+      node _T_333 = or(_T_332, _T_303) @[Mux.scala 27:72]
+      node _T_334 = or(_T_333, _T_304) @[Mux.scala 27:72]
+      node _T_335 = or(_T_334, _T_305) @[Mux.scala 27:72]
+      node _T_336 = or(_T_335, _T_306) @[Mux.scala 27:72]
+      node _T_337 = or(_T_336, _T_307) @[Mux.scala 27:72]
+      node _T_338 = or(_T_337, _T_308) @[Mux.scala 27:72]
+      node _T_339 = or(_T_338, _T_309) @[Mux.scala 27:72]
+      node _T_340 = or(_T_339, _T_310) @[Mux.scala 27:72]
+      node _T_341 = or(_T_340, _T_311) @[Mux.scala 27:72]
+      node _T_342 = or(_T_341, _T_312) @[Mux.scala 27:72]
+      node _T_343 = or(_T_342, _T_313) @[Mux.scala 27:72]
+      node _T_344 = or(_T_343, _T_314) @[Mux.scala 27:72]
+      wire _T_345 : UInt<5> @[Mux.scala 27:72]
+      _T_345 <= _T_344 @[Mux.scala 27:72]
+      cls_ones <= _T_345 @[exu_div_ctl.scala 959:25]
+      skip @[exu_div_ctl.scala 959:15]
+    node _T_346 = bits(io.operand, 32, 32) @[exu_div_ctl.scala 960:27]
+    node _T_347 = mux(_T_346, cls_ones, cls_zeros) @[exu_div_ctl.scala 960:16]
+    io.cls <= _T_347 @[exu_div_ctl.scala 960:10]
+    
+  module exu_div_cls_1 : 
+    input clock : Clock
+    input reset : Reset
+    output io : {flip operand : UInt<33>, cls : UInt<5>}
+    
+    wire cls_zeros : UInt<5>
+    cls_zeros <= UInt<5>("h00")
+    wire cls_ones : UInt<5>
+    cls_ones <= UInt<5>("h00")
+    node _T = bits(io.operand, 31, 31) @[exu_div_ctl.scala 956:54]
+    node _T_1 = eq(_T, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_2 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 956:54]
+    node _T_3 = eq(_T_2, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_4 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 956:54]
+    node _T_5 = eq(_T_4, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_6 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 956:54]
+    node _T_7 = eq(_T_6, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_8 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 956:54]
+    node _T_9 = eq(_T_8, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_10 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 956:54]
+    node _T_11 = eq(_T_10, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_12 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 956:54]
+    node _T_13 = eq(_T_12, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_14 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 956:54]
+    node _T_15 = eq(_T_14, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_16 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 956:54]
+    node _T_17 = eq(_T_16, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_18 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 956:54]
+    node _T_19 = eq(_T_18, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_20 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 956:54]
+    node _T_21 = eq(_T_20, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_22 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 956:54]
+    node _T_23 = eq(_T_22, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_24 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 956:54]
+    node _T_25 = eq(_T_24, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_26 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 956:54]
+    node _T_27 = eq(_T_26, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_28 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 956:54]
+    node _T_29 = eq(_T_28, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_30 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 956:54]
+    node _T_31 = eq(_T_30, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_32 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 956:54]
+    node _T_33 = eq(_T_32, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_34 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 956:54]
+    node _T_35 = eq(_T_34, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_36 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 956:54]
+    node _T_37 = eq(_T_36, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_38 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 956:54]
+    node _T_39 = eq(_T_38, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_40 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 956:54]
+    node _T_41 = eq(_T_40, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_42 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 956:54]
+    node _T_43 = eq(_T_42, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_44 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 956:54]
+    node _T_45 = eq(_T_44, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_46 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 956:54]
+    node _T_47 = eq(_T_46, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_48 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 956:54]
+    node _T_49 = eq(_T_48, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_50 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 956:54]
+    node _T_51 = eq(_T_50, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_52 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 956:54]
+    node _T_53 = eq(_T_52, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_54 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 956:54]
+    node _T_55 = eq(_T_54, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_56 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 956:54]
+    node _T_57 = eq(_T_56, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_58 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 956:54]
+    node _T_59 = eq(_T_58, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_60 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 956:54]
+    node _T_61 = eq(_T_60, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_62 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 956:54]
+    node _T_63 = eq(_T_62, UInt<1>("h01")) @[exu_div_ctl.scala 956:63]
+    node _T_64 = mux(_T_1, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_65 = mux(_T_3, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_66 = mux(_T_5, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_67 = mux(_T_7, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_68 = mux(_T_9, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_69 = mux(_T_11, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_70 = mux(_T_13, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_71 = mux(_T_15, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_72 = mux(_T_17, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_73 = mux(_T_19, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_74 = mux(_T_21, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_75 = mux(_T_23, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_76 = mux(_T_25, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_77 = mux(_T_27, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_78 = mux(_T_29, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_79 = mux(_T_31, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_80 = mux(_T_33, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_81 = mux(_T_35, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_82 = mux(_T_37, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_83 = mux(_T_39, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_84 = mux(_T_41, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_85 = mux(_T_43, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_86 = mux(_T_45, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_87 = mux(_T_47, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_88 = mux(_T_49, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_89 = mux(_T_51, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_90 = mux(_T_53, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_91 = mux(_T_55, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_92 = mux(_T_57, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_93 = mux(_T_59, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_94 = mux(_T_61, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_95 = mux(_T_63, UInt<5>("h01f"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_96 = or(_T_64, _T_65) @[Mux.scala 27:72]
+    node _T_97 = or(_T_96, _T_66) @[Mux.scala 27:72]
+    node _T_98 = or(_T_97, _T_67) @[Mux.scala 27:72]
+    node _T_99 = or(_T_98, _T_68) @[Mux.scala 27:72]
+    node _T_100 = or(_T_99, _T_69) @[Mux.scala 27:72]
+    node _T_101 = or(_T_100, _T_70) @[Mux.scala 27:72]
+    node _T_102 = or(_T_101, _T_71) @[Mux.scala 27:72]
+    node _T_103 = or(_T_102, _T_72) @[Mux.scala 27:72]
+    node _T_104 = or(_T_103, _T_73) @[Mux.scala 27:72]
+    node _T_105 = or(_T_104, _T_74) @[Mux.scala 27:72]
+    node _T_106 = or(_T_105, _T_75) @[Mux.scala 27:72]
+    node _T_107 = or(_T_106, _T_76) @[Mux.scala 27:72]
+    node _T_108 = or(_T_107, _T_77) @[Mux.scala 27:72]
+    node _T_109 = or(_T_108, _T_78) @[Mux.scala 27:72]
+    node _T_110 = or(_T_109, _T_79) @[Mux.scala 27:72]
+    node _T_111 = or(_T_110, _T_80) @[Mux.scala 27:72]
+    node _T_112 = or(_T_111, _T_81) @[Mux.scala 27:72]
+    node _T_113 = or(_T_112, _T_82) @[Mux.scala 27:72]
+    node _T_114 = or(_T_113, _T_83) @[Mux.scala 27:72]
+    node _T_115 = or(_T_114, _T_84) @[Mux.scala 27:72]
+    node _T_116 = or(_T_115, _T_85) @[Mux.scala 27:72]
+    node _T_117 = or(_T_116, _T_86) @[Mux.scala 27:72]
+    node _T_118 = or(_T_117, _T_87) @[Mux.scala 27:72]
+    node _T_119 = or(_T_118, _T_88) @[Mux.scala 27:72]
+    node _T_120 = or(_T_119, _T_89) @[Mux.scala 27:72]
+    node _T_121 = or(_T_120, _T_90) @[Mux.scala 27:72]
+    node _T_122 = or(_T_121, _T_91) @[Mux.scala 27:72]
+    node _T_123 = or(_T_122, _T_92) @[Mux.scala 27:72]
+    node _T_124 = or(_T_123, _T_93) @[Mux.scala 27:72]
+    node _T_125 = or(_T_124, _T_94) @[Mux.scala 27:72]
+    node _T_126 = or(_T_125, _T_95) @[Mux.scala 27:72]
+    wire _T_127 : UInt<5> @[Mux.scala 27:72]
+    _T_127 <= _T_126 @[Mux.scala 27:72]
+    cls_zeros <= _T_127 @[exu_div_ctl.scala 956:13]
+    node _T_128 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 958:18]
+    node _T_129 = eq(_T_128, UInt<32>("h0ffffffff")) @[exu_div_ctl.scala 958:25]
+    when _T_129 : @[exu_div_ctl.scala 958:44]
+      cls_ones <= UInt<5>("h01f") @[exu_div_ctl.scala 958:55]
+      skip @[exu_div_ctl.scala 958:44]
+    else : @[exu_div_ctl.scala 959:15]
+      node _T_130 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 959:66]
+      node _T_131 = cat(UInt<1>("h01"), UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_132 = eq(_T_130, _T_131) @[exu_div_ctl.scala 959:76]
+      node _T_133 = bits(_T_132, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_134 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 959:66]
+      node _T_135 = mux(UInt<1>("h01"), UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
+      node _T_136 = cat(_T_135, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_137 = eq(_T_134, _T_136) @[exu_div_ctl.scala 959:76]
+      node _T_138 = bits(_T_137, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_139 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 959:66]
+      node _T_140 = mux(UInt<1>("h01"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12]
+      node _T_141 = cat(_T_140, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_142 = eq(_T_139, _T_141) @[exu_div_ctl.scala 959:76]
+      node _T_143 = bits(_T_142, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_144 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 959:66]
+      node _T_145 = mux(UInt<1>("h01"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
+      node _T_146 = cat(_T_145, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_147 = eq(_T_144, _T_146) @[exu_div_ctl.scala 959:76]
+      node _T_148 = bits(_T_147, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_149 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 959:66]
+      node _T_150 = mux(UInt<1>("h01"), UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
+      node _T_151 = cat(_T_150, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_152 = eq(_T_149, _T_151) @[exu_div_ctl.scala 959:76]
+      node _T_153 = bits(_T_152, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_154 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 959:66]
+      node _T_155 = mux(UInt<1>("h01"), UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
+      node _T_156 = cat(_T_155, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_157 = eq(_T_154, _T_156) @[exu_div_ctl.scala 959:76]
+      node _T_158 = bits(_T_157, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_159 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 959:66]
+      node _T_160 = mux(UInt<1>("h01"), UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
+      node _T_161 = cat(_T_160, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_162 = eq(_T_159, _T_161) @[exu_div_ctl.scala 959:76]
+      node _T_163 = bits(_T_162, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_164 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 959:66]
+      node _T_165 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+      node _T_166 = cat(_T_165, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_167 = eq(_T_164, _T_166) @[exu_div_ctl.scala 959:76]
+      node _T_168 = bits(_T_167, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_169 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 959:66]
+      node _T_170 = mux(UInt<1>("h01"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12]
+      node _T_171 = cat(_T_170, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_172 = eq(_T_169, _T_171) @[exu_div_ctl.scala 959:76]
+      node _T_173 = bits(_T_172, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_174 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 959:66]
+      node _T_175 = mux(UInt<1>("h01"), UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
+      node _T_176 = cat(_T_175, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_177 = eq(_T_174, _T_176) @[exu_div_ctl.scala 959:76]
+      node _T_178 = bits(_T_177, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_179 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 959:66]
+      node _T_180 = mux(UInt<1>("h01"), UInt<11>("h07ff"), UInt<11>("h00")) @[Bitwise.scala 72:12]
+      node _T_181 = cat(_T_180, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_182 = eq(_T_179, _T_181) @[exu_div_ctl.scala 959:76]
+      node _T_183 = bits(_T_182, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_184 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 959:66]
+      node _T_185 = mux(UInt<1>("h01"), UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12]
+      node _T_186 = cat(_T_185, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_187 = eq(_T_184, _T_186) @[exu_div_ctl.scala 959:76]
+      node _T_188 = bits(_T_187, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_189 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 959:66]
+      node _T_190 = mux(UInt<1>("h01"), UInt<13>("h01fff"), UInt<13>("h00")) @[Bitwise.scala 72:12]
+      node _T_191 = cat(_T_190, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_192 = eq(_T_189, _T_191) @[exu_div_ctl.scala 959:76]
+      node _T_193 = bits(_T_192, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_194 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 959:66]
+      node _T_195 = mux(UInt<1>("h01"), UInt<14>("h03fff"), UInt<14>("h00")) @[Bitwise.scala 72:12]
+      node _T_196 = cat(_T_195, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_197 = eq(_T_194, _T_196) @[exu_div_ctl.scala 959:76]
+      node _T_198 = bits(_T_197, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_199 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 959:66]
+      node _T_200 = mux(UInt<1>("h01"), UInt<15>("h07fff"), UInt<15>("h00")) @[Bitwise.scala 72:12]
+      node _T_201 = cat(_T_200, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_202 = eq(_T_199, _T_201) @[exu_div_ctl.scala 959:76]
+      node _T_203 = bits(_T_202, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_204 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 959:66]
+      node _T_205 = mux(UInt<1>("h01"), UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
+      node _T_206 = cat(_T_205, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_207 = eq(_T_204, _T_206) @[exu_div_ctl.scala 959:76]
+      node _T_208 = bits(_T_207, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_209 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 959:66]
+      node _T_210 = mux(UInt<1>("h01"), UInt<17>("h01ffff"), UInt<17>("h00")) @[Bitwise.scala 72:12]
+      node _T_211 = cat(_T_210, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_212 = eq(_T_209, _T_211) @[exu_div_ctl.scala 959:76]
+      node _T_213 = bits(_T_212, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_214 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 959:66]
+      node _T_215 = mux(UInt<1>("h01"), UInt<18>("h03ffff"), UInt<18>("h00")) @[Bitwise.scala 72:12]
+      node _T_216 = cat(_T_215, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_217 = eq(_T_214, _T_216) @[exu_div_ctl.scala 959:76]
+      node _T_218 = bits(_T_217, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_219 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 959:66]
+      node _T_220 = mux(UInt<1>("h01"), UInt<19>("h07ffff"), UInt<19>("h00")) @[Bitwise.scala 72:12]
+      node _T_221 = cat(_T_220, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_222 = eq(_T_219, _T_221) @[exu_div_ctl.scala 959:76]
+      node _T_223 = bits(_T_222, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_224 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 959:66]
+      node _T_225 = mux(UInt<1>("h01"), UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12]
+      node _T_226 = cat(_T_225, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_227 = eq(_T_224, _T_226) @[exu_div_ctl.scala 959:76]
+      node _T_228 = bits(_T_227, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_229 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 959:66]
+      node _T_230 = mux(UInt<1>("h01"), UInt<21>("h01fffff"), UInt<21>("h00")) @[Bitwise.scala 72:12]
+      node _T_231 = cat(_T_230, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_232 = eq(_T_229, _T_231) @[exu_div_ctl.scala 959:76]
+      node _T_233 = bits(_T_232, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_234 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 959:66]
+      node _T_235 = mux(UInt<1>("h01"), UInt<22>("h03fffff"), UInt<22>("h00")) @[Bitwise.scala 72:12]
+      node _T_236 = cat(_T_235, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_237 = eq(_T_234, _T_236) @[exu_div_ctl.scala 959:76]
+      node _T_238 = bits(_T_237, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_239 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 959:66]
+      node _T_240 = mux(UInt<1>("h01"), UInt<23>("h07fffff"), UInt<23>("h00")) @[Bitwise.scala 72:12]
+      node _T_241 = cat(_T_240, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_242 = eq(_T_239, _T_241) @[exu_div_ctl.scala 959:76]
+      node _T_243 = bits(_T_242, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_244 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 959:66]
+      node _T_245 = mux(UInt<1>("h01"), UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
+      node _T_246 = cat(_T_245, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_247 = eq(_T_244, _T_246) @[exu_div_ctl.scala 959:76]
+      node _T_248 = bits(_T_247, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_249 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 959:66]
+      node _T_250 = mux(UInt<1>("h01"), UInt<25>("h01ffffff"), UInt<25>("h00")) @[Bitwise.scala 72:12]
+      node _T_251 = cat(_T_250, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_252 = eq(_T_249, _T_251) @[exu_div_ctl.scala 959:76]
+      node _T_253 = bits(_T_252, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_254 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 959:66]
+      node _T_255 = mux(UInt<1>("h01"), UInt<26>("h03ffffff"), UInt<26>("h00")) @[Bitwise.scala 72:12]
+      node _T_256 = cat(_T_255, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_257 = eq(_T_254, _T_256) @[exu_div_ctl.scala 959:76]
+      node _T_258 = bits(_T_257, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_259 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 959:66]
+      node _T_260 = mux(UInt<1>("h01"), UInt<27>("h07ffffff"), UInt<27>("h00")) @[Bitwise.scala 72:12]
+      node _T_261 = cat(_T_260, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_262 = eq(_T_259, _T_261) @[exu_div_ctl.scala 959:76]
+      node _T_263 = bits(_T_262, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_264 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 959:66]
+      node _T_265 = mux(UInt<1>("h01"), UInt<28>("h0fffffff"), UInt<28>("h00")) @[Bitwise.scala 72:12]
+      node _T_266 = cat(_T_265, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_267 = eq(_T_264, _T_266) @[exu_div_ctl.scala 959:76]
+      node _T_268 = bits(_T_267, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_269 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 959:66]
+      node _T_270 = mux(UInt<1>("h01"), UInt<29>("h01fffffff"), UInt<29>("h00")) @[Bitwise.scala 72:12]
+      node _T_271 = cat(_T_270, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_272 = eq(_T_269, _T_271) @[exu_div_ctl.scala 959:76]
+      node _T_273 = bits(_T_272, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_274 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 959:66]
+      node _T_275 = mux(UInt<1>("h01"), UInt<30>("h03fffffff"), UInt<30>("h00")) @[Bitwise.scala 72:12]
+      node _T_276 = cat(_T_275, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_277 = eq(_T_274, _T_276) @[exu_div_ctl.scala 959:76]
+      node _T_278 = bits(_T_277, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_279 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 959:66]
+      node _T_280 = mux(UInt<1>("h01"), UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
+      node _T_281 = cat(_T_280, UInt<1>("h00")) @[Cat.scala 29:58]
+      node _T_282 = eq(_T_279, _T_281) @[exu_div_ctl.scala 959:76]
+      node _T_283 = bits(_T_282, 0, 0) @[exu_div_ctl.scala 959:102]
+      node _T_284 = mux(_T_133, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_285 = mux(_T_138, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_286 = mux(_T_143, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_287 = mux(_T_148, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_288 = mux(_T_153, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_289 = mux(_T_158, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_290 = mux(_T_163, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_291 = mux(_T_168, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_292 = mux(_T_173, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_293 = mux(_T_178, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_294 = mux(_T_183, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_295 = mux(_T_188, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_296 = mux(_T_193, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_297 = mux(_T_198, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_298 = mux(_T_203, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_299 = mux(_T_208, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_300 = mux(_T_213, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_301 = mux(_T_218, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_302 = mux(_T_223, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_303 = mux(_T_228, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_304 = mux(_T_233, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_305 = mux(_T_238, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_306 = mux(_T_243, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_307 = mux(_T_248, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_308 = mux(_T_253, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_309 = mux(_T_258, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_310 = mux(_T_263, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_311 = mux(_T_268, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_312 = mux(_T_273, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_313 = mux(_T_278, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_314 = mux(_T_283, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
+      node _T_315 = or(_T_284, _T_285) @[Mux.scala 27:72]
+      node _T_316 = or(_T_315, _T_286) @[Mux.scala 27:72]
+      node _T_317 = or(_T_316, _T_287) @[Mux.scala 27:72]
+      node _T_318 = or(_T_317, _T_288) @[Mux.scala 27:72]
+      node _T_319 = or(_T_318, _T_289) @[Mux.scala 27:72]
+      node _T_320 = or(_T_319, _T_290) @[Mux.scala 27:72]
+      node _T_321 = or(_T_320, _T_291) @[Mux.scala 27:72]
+      node _T_322 = or(_T_321, _T_292) @[Mux.scala 27:72]
+      node _T_323 = or(_T_322, _T_293) @[Mux.scala 27:72]
+      node _T_324 = or(_T_323, _T_294) @[Mux.scala 27:72]
+      node _T_325 = or(_T_324, _T_295) @[Mux.scala 27:72]
+      node _T_326 = or(_T_325, _T_296) @[Mux.scala 27:72]
+      node _T_327 = or(_T_326, _T_297) @[Mux.scala 27:72]
+      node _T_328 = or(_T_327, _T_298) @[Mux.scala 27:72]
+      node _T_329 = or(_T_328, _T_299) @[Mux.scala 27:72]
+      node _T_330 = or(_T_329, _T_300) @[Mux.scala 27:72]
+      node _T_331 = or(_T_330, _T_301) @[Mux.scala 27:72]
+      node _T_332 = or(_T_331, _T_302) @[Mux.scala 27:72]
+      node _T_333 = or(_T_332, _T_303) @[Mux.scala 27:72]
+      node _T_334 = or(_T_333, _T_304) @[Mux.scala 27:72]
+      node _T_335 = or(_T_334, _T_305) @[Mux.scala 27:72]
+      node _T_336 = or(_T_335, _T_306) @[Mux.scala 27:72]
+      node _T_337 = or(_T_336, _T_307) @[Mux.scala 27:72]
+      node _T_338 = or(_T_337, _T_308) @[Mux.scala 27:72]
+      node _T_339 = or(_T_338, _T_309) @[Mux.scala 27:72]
+      node _T_340 = or(_T_339, _T_310) @[Mux.scala 27:72]
+      node _T_341 = or(_T_340, _T_311) @[Mux.scala 27:72]
+      node _T_342 = or(_T_341, _T_312) @[Mux.scala 27:72]
+      node _T_343 = or(_T_342, _T_313) @[Mux.scala 27:72]
+      node _T_344 = or(_T_343, _T_314) @[Mux.scala 27:72]
+      wire _T_345 : UInt<5> @[Mux.scala 27:72]
+      _T_345 <= _T_344 @[Mux.scala 27:72]
+      cls_ones <= _T_345 @[exu_div_ctl.scala 959:25]
+      skip @[exu_div_ctl.scala 959:15]
+    node _T_346 = bits(io.operand, 32, 32) @[exu_div_ctl.scala 960:27]
+    node _T_347 = mux(_T_346, cls_ones, cls_zeros) @[exu_div_ctl.scala 960:16]
+    io.cls <= _T_347 @[exu_div_ctl.scala 960:10]
+    
   extmodule gated_latch : 
     output Q : Clock
     input CK : Clock
@@ -264,1984 +1000,1793 @@ circuit exu_div_ctl :
     clkhdr.EN <= io.en @[lib.scala 337:18]
     clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
     
-  extmodule gated_latch_11 : 
-    output Q : Clock
-    input CK : Clock
-    input EN : UInt<1>
-    input SE : UInt<1>
-    
-    defname = gated_latch
-    
-    
-  module rvclkhdr_11 : 
-    input clock : Clock
-    input reset : Reset
-    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
-    
-    inst clkhdr of gated_latch_11 @[lib.scala 334:26]
-    clkhdr.SE is invalid
-    clkhdr.EN is invalid
-    clkhdr.CK is invalid
-    clkhdr.Q is invalid
-    io.l1clk <= clkhdr.Q @[lib.scala 335:14]
-    clkhdr.CK <= io.clk @[lib.scala 336:18]
-    clkhdr.EN <= io.en @[lib.scala 337:18]
-    clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
-    
-  extmodule gated_latch_12 : 
-    output Q : Clock
-    input CK : Clock
-    input EN : UInt<1>
-    input SE : UInt<1>
-    
-    defname = gated_latch
-    
-    
-  module rvclkhdr_12 : 
-    input clock : Clock
-    input reset : Reset
-    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
-    
-    inst clkhdr of gated_latch_12 @[lib.scala 334:26]
-    clkhdr.SE is invalid
-    clkhdr.EN is invalid
-    clkhdr.CK is invalid
-    clkhdr.Q is invalid
-    io.l1clk <= clkhdr.Q @[lib.scala 335:14]
-    clkhdr.CK <= io.clk @[lib.scala 336:18]
-    clkhdr.EN <= io.en @[lib.scala 337:18]
-    clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
-    
-  extmodule gated_latch_13 : 
-    output Q : Clock
-    input CK : Clock
-    input EN : UInt<1>
-    input SE : UInt<1>
-    
-    defname = gated_latch
-    
-    
-  module rvclkhdr_13 : 
-    input clock : Clock
-    input reset : Reset
-    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
-    
-    inst clkhdr of gated_latch_13 @[lib.scala 334:26]
-    clkhdr.SE is invalid
-    clkhdr.EN is invalid
-    clkhdr.CK is invalid
-    clkhdr.Q is invalid
-    io.l1clk <= clkhdr.Q @[lib.scala 335:14]
-    clkhdr.CK <= io.clk @[lib.scala 336:18]
-    clkhdr.EN <= io.en @[lib.scala 337:18]
-    clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
-    
-  extmodule gated_latch_14 : 
-    output Q : Clock
-    input CK : Clock
-    input EN : UInt<1>
-    input SE : UInt<1>
-    
-    defname = gated_latch
-    
-    
-  module rvclkhdr_14 : 
-    input clock : Clock
-    input reset : Reset
-    output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
-    
-    inst clkhdr of gated_latch_14 @[lib.scala 334:26]
-    clkhdr.SE is invalid
-    clkhdr.EN is invalid
-    clkhdr.CK is invalid
-    clkhdr.Q is invalid
-    io.l1clk <= clkhdr.Q @[lib.scala 335:14]
-    clkhdr.CK <= io.clk @[lib.scala 336:18]
-    clkhdr.EN <= io.en @[lib.scala 337:18]
-    clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
-    
-  module el2_exu_div_existing_1bit_cheapshortq : 
+  module exu_div_new_4bit_fullshortq : 
     input clock : Clock
     input reset : AsyncReset
     output io : {flip scan_mode : UInt<1>, flip cancel : UInt<1>, flip valid_in : UInt<1>, flip signed_in : UInt<1>, flip rem_in : UInt<1>, flip dividend_in : UInt<32>, flip divisor_in : UInt<32>, data_out : UInt<32>, valid_out : UInt<1>}
     
-    wire run_state : UInt<1>
-    run_state <= UInt<1>("h00")
-    wire count : UInt<6>
-    count <= UInt<6>("h00")
-    wire m_ff : UInt<33>
-    m_ff <= UInt<33>("h00")
-    wire q_in : UInt<33>
-    q_in <= UInt<33>("h00")
-    wire q_ff : UInt<33>
-    q_ff <= UInt<33>("h00")
-    wire a_in : UInt<33>
-    a_in <= UInt<33>("h00")
-    wire a_ff : UInt<33>
-    a_ff <= UInt<33>("h00")
-    wire m_eff : UInt<33>
-    m_eff <= UInt<33>("h00")
-    wire dividend_neg_ff : UInt<1>
-    dividend_neg_ff <= UInt<1>("h00")
-    wire divisor_neg_ff : UInt<1>
-    divisor_neg_ff <= UInt<1>("h00")
-    wire dividend_comp : UInt<32>
-    dividend_comp <= UInt<32>("h00")
-    wire q_ff_comp : UInt<32>
-    q_ff_comp <= UInt<32>("h00")
-    wire a_ff_comp : UInt<32>
-    a_ff_comp <= UInt<32>("h00")
-    wire sign_ff : UInt<1>
-    sign_ff <= UInt<1>("h00")
-    wire rem_ff : UInt<1>
-    rem_ff <= UInt<1>("h00")
-    wire add : UInt<1>
-    add <= UInt<1>("h00")
-    wire a_eff : UInt<33>
-    a_eff <= UInt<33>("h00")
-    wire a_eff_shift : UInt<65>
-    a_eff_shift <= UInt<65>("h00")
-    wire rem_correct : UInt<1>
-    rem_correct <= UInt<1>("h00")
-    wire valid_ff_x : UInt<1>
-    valid_ff_x <= UInt<1>("h00")
+    wire valid_ff : UInt<1>
+    valid_ff <= UInt<1>("h00")
     wire finish_ff : UInt<1>
     finish_ff <= UInt<1>("h00")
-    wire smallnum_case_ff : UInt<1>
-    smallnum_case_ff <= UInt<1>("h00")
-    wire smallnum_ff : UInt<4>
-    smallnum_ff <= UInt<4>("h00")
-    wire smallnum_case : UInt<1>
-    smallnum_case <= UInt<1>("h00")
-    wire count_in : UInt<6>
-    count_in <= UInt<6>("h00")
-    wire dividend_eff : UInt<32>
-    dividend_eff <= UInt<32>("h00")
-    wire a_shift : UInt<33>
-    a_shift <= UInt<33>("h00")
-    wire shortq : UInt<6>
-    shortq <= UInt<6>("h00")
-    node _T = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 127:30]
-    node valid_x = and(valid_ff_x, _T) @[exu_div_ctl.scala 127:28]
-    node _T_1 = bits(q_ff, 31, 4) @[exu_div_ctl.scala 133:27]
-    node _T_2 = eq(_T_1, UInt<1>("h00")) @[exu_div_ctl.scala 133:34]
-    node _T_3 = bits(m_ff, 31, 4) @[exu_div_ctl.scala 133:50]
-    node _T_4 = eq(_T_3, UInt<1>("h00")) @[exu_div_ctl.scala 133:57]
-    node _T_5 = and(_T_2, _T_4) @[exu_div_ctl.scala 133:43]
-    node _T_6 = bits(m_ff, 31, 0) @[exu_div_ctl.scala 133:73]
-    node _T_7 = neq(_T_6, UInt<1>("h00")) @[exu_div_ctl.scala 133:80]
-    node _T_8 = and(_T_5, _T_7) @[exu_div_ctl.scala 133:66]
-    node _T_9 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 133:91]
-    node _T_10 = and(_T_8, _T_9) @[exu_div_ctl.scala 133:89]
-    node _T_11 = and(_T_10, valid_x) @[exu_div_ctl.scala 133:99]
-    node _T_12 = bits(q_ff, 31, 0) @[exu_div_ctl.scala 134:11]
-    node _T_13 = eq(_T_12, UInt<1>("h00")) @[exu_div_ctl.scala 134:18]
-    node _T_14 = bits(m_ff, 31, 0) @[exu_div_ctl.scala 134:34]
-    node _T_15 = neq(_T_14, UInt<1>("h00")) @[exu_div_ctl.scala 134:41]
-    node _T_16 = and(_T_13, _T_15) @[exu_div_ctl.scala 134:27]
-    node _T_17 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 134:52]
-    node _T_18 = and(_T_16, _T_17) @[exu_div_ctl.scala 134:50]
-    node _T_19 = and(_T_18, valid_x) @[exu_div_ctl.scala 134:60]
-    node _T_20 = or(_T_11, _T_19) @[exu_div_ctl.scala 133:110]
-    smallnum_case <= _T_20 @[exu_div_ctl.scala 133:17]
-    node _T_21 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_22 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_23 = eq(_T_22, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_24 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_25 = eq(_T_24, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_26 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_27 = eq(_T_26, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_28 = and(_T_23, _T_25) @[exu_div_ctl.scala 138:94]
-    node _T_29 = and(_T_28, _T_27) @[exu_div_ctl.scala 138:94]
-    node _T_30 = and(_T_21, _T_29) @[exu_div_ctl.scala 139:10]
-    node _T_31 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_32 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_33 = eq(_T_32, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_34 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_35 = eq(_T_34, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_36 = and(_T_33, _T_35) @[exu_div_ctl.scala 138:94]
-    node _T_37 = and(_T_31, _T_36) @[exu_div_ctl.scala 139:10]
-    node _T_38 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 145:37]
-    node _T_39 = eq(_T_38, UInt<1>("h00")) @[exu_div_ctl.scala 145:32]
-    node _T_40 = and(_T_37, _T_39) @[exu_div_ctl.scala 145:30]
-    node _T_41 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_42 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_43 = eq(_T_42, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_44 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_45 = eq(_T_44, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_46 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_47 = eq(_T_46, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_48 = and(_T_43, _T_45) @[exu_div_ctl.scala 138:94]
-    node _T_49 = and(_T_48, _T_47) @[exu_div_ctl.scala 138:94]
-    node _T_50 = and(_T_41, _T_49) @[exu_div_ctl.scala 139:10]
-    node _T_51 = or(_T_40, _T_50) @[exu_div_ctl.scala 145:41]
-    node _T_52 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_53 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_54 = and(_T_52, _T_53) @[exu_div_ctl.scala 137:94]
-    node _T_55 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_56 = eq(_T_55, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_57 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_58 = eq(_T_57, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_59 = and(_T_56, _T_58) @[exu_div_ctl.scala 138:94]
-    node _T_60 = and(_T_54, _T_59) @[exu_div_ctl.scala 139:10]
-    node _T_61 = or(_T_51, _T_60) @[exu_div_ctl.scala 145:73]
-    node _T_62 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_63 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_64 = eq(_T_63, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_65 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_66 = eq(_T_65, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_67 = and(_T_64, _T_66) @[exu_div_ctl.scala 138:94]
-    node _T_68 = and(_T_62, _T_67) @[exu_div_ctl.scala 139:10]
-    node _T_69 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 147:37]
-    node _T_70 = eq(_T_69, UInt<1>("h00")) @[exu_div_ctl.scala 147:32]
-    node _T_71 = and(_T_68, _T_70) @[exu_div_ctl.scala 147:30]
-    node _T_72 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_73 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_74 = eq(_T_73, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_75 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_76 = eq(_T_75, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_77 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_78 = eq(_T_77, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_79 = and(_T_74, _T_76) @[exu_div_ctl.scala 138:94]
-    node _T_80 = and(_T_79, _T_78) @[exu_div_ctl.scala 138:94]
-    node _T_81 = and(_T_72, _T_80) @[exu_div_ctl.scala 139:10]
-    node _T_82 = or(_T_71, _T_81) @[exu_div_ctl.scala 147:41]
-    node _T_83 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_84 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_85 = eq(_T_84, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_86 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_87 = eq(_T_86, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_88 = and(_T_85, _T_87) @[exu_div_ctl.scala 138:94]
-    node _T_89 = and(_T_83, _T_88) @[exu_div_ctl.scala 139:10]
-    node _T_90 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 147:110]
-    node _T_91 = eq(_T_90, UInt<1>("h00")) @[exu_div_ctl.scala 147:105]
-    node _T_92 = and(_T_89, _T_91) @[exu_div_ctl.scala 147:103]
-    node _T_93 = or(_T_82, _T_92) @[exu_div_ctl.scala 147:76]
-    node _T_94 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_95 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:74]
-    node _T_96 = eq(_T_95, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_97 = and(_T_94, _T_96) @[exu_div_ctl.scala 137:94]
-    node _T_98 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_99 = eq(_T_98, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_100 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_101 = eq(_T_100, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_102 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:57]
-    node _T_103 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 138:57]
-    node _T_104 = and(_T_99, _T_101) @[exu_div_ctl.scala 138:94]
-    node _T_105 = and(_T_104, _T_102) @[exu_div_ctl.scala 138:94]
-    node _T_106 = and(_T_105, _T_103) @[exu_div_ctl.scala 138:94]
-    node _T_107 = and(_T_97, _T_106) @[exu_div_ctl.scala 139:10]
-    node _T_108 = or(_T_93, _T_107) @[exu_div_ctl.scala 147:114]
-    node _T_109 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:74]
-    node _T_110 = eq(_T_109, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_111 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_112 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_113 = and(_T_110, _T_111) @[exu_div_ctl.scala 137:94]
-    node _T_114 = and(_T_113, _T_112) @[exu_div_ctl.scala 137:94]
-    node _T_115 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_116 = eq(_T_115, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_117 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_118 = eq(_T_117, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_119 = and(_T_116, _T_118) @[exu_div_ctl.scala 138:94]
-    node _T_120 = and(_T_114, _T_119) @[exu_div_ctl.scala 139:10]
-    node _T_121 = or(_T_108, _T_120) @[exu_div_ctl.scala 148:43]
-    node _T_122 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_123 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_124 = and(_T_122, _T_123) @[exu_div_ctl.scala 137:94]
-    node _T_125 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_126 = eq(_T_125, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_127 = and(_T_124, _T_126) @[exu_div_ctl.scala 139:10]
-    node _T_128 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 148:111]
-    node _T_129 = eq(_T_128, UInt<1>("h00")) @[exu_div_ctl.scala 148:106]
-    node _T_130 = and(_T_127, _T_129) @[exu_div_ctl.scala 148:104]
-    node _T_131 = or(_T_121, _T_130) @[exu_div_ctl.scala 148:78]
-    node _T_132 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_133 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_134 = and(_T_132, _T_133) @[exu_div_ctl.scala 137:94]
-    node _T_135 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_136 = eq(_T_135, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_137 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:57]
-    node _T_138 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_139 = eq(_T_138, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_140 = and(_T_136, _T_137) @[exu_div_ctl.scala 138:94]
-    node _T_141 = and(_T_140, _T_139) @[exu_div_ctl.scala 138:94]
-    node _T_142 = and(_T_134, _T_141) @[exu_div_ctl.scala 139:10]
-    node _T_143 = or(_T_131, _T_142) @[exu_div_ctl.scala 148:116]
-    node _T_144 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_145 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_146 = and(_T_144, _T_145) @[exu_div_ctl.scala 137:94]
-    node _T_147 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_148 = eq(_T_147, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_149 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_150 = eq(_T_149, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_151 = and(_T_148, _T_150) @[exu_div_ctl.scala 138:94]
-    node _T_152 = and(_T_146, _T_151) @[exu_div_ctl.scala 139:10]
-    node _T_153 = or(_T_143, _T_152) @[exu_div_ctl.scala 149:43]
-    node _T_154 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_155 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_156 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_157 = and(_T_154, _T_155) @[exu_div_ctl.scala 137:94]
-    node _T_158 = and(_T_157, _T_156) @[exu_div_ctl.scala 137:94]
-    node _T_159 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_160 = eq(_T_159, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_161 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:57]
-    node _T_162 = and(_T_160, _T_161) @[exu_div_ctl.scala 138:94]
-    node _T_163 = and(_T_158, _T_162) @[exu_div_ctl.scala 139:10]
-    node _T_164 = or(_T_153, _T_163) @[exu_div_ctl.scala 149:77]
-    node _T_165 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_166 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_167 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_168 = and(_T_165, _T_166) @[exu_div_ctl.scala 137:94]
-    node _T_169 = and(_T_168, _T_167) @[exu_div_ctl.scala 137:94]
-    node _T_170 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_171 = eq(_T_170, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_172 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_173 = eq(_T_172, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_174 = and(_T_171, _T_173) @[exu_div_ctl.scala 138:94]
-    node _T_175 = and(_T_169, _T_174) @[exu_div_ctl.scala 139:10]
-    node _T_176 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_177 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:74]
-    node _T_178 = eq(_T_177, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_179 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_180 = and(_T_176, _T_178) @[exu_div_ctl.scala 137:94]
-    node _T_181 = and(_T_180, _T_179) @[exu_div_ctl.scala 137:94]
-    node _T_182 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_183 = eq(_T_182, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_184 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:57]
-    node _T_185 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 138:57]
-    node _T_186 = and(_T_183, _T_184) @[exu_div_ctl.scala 138:94]
-    node _T_187 = and(_T_186, _T_185) @[exu_div_ctl.scala 138:94]
-    node _T_188 = and(_T_181, _T_187) @[exu_div_ctl.scala 139:10]
-    node _T_189 = or(_T_175, _T_188) @[exu_div_ctl.scala 151:44]
-    node _T_190 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_191 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_192 = eq(_T_191, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_193 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_194 = eq(_T_193, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_195 = and(_T_192, _T_194) @[exu_div_ctl.scala 138:94]
-    node _T_196 = and(_T_190, _T_195) @[exu_div_ctl.scala 139:10]
-    node _T_197 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 151:118]
-    node _T_198 = eq(_T_197, UInt<1>("h00")) @[exu_div_ctl.scala 151:113]
-    node _T_199 = and(_T_196, _T_198) @[exu_div_ctl.scala 151:111]
-    node _T_200 = or(_T_189, _T_199) @[exu_div_ctl.scala 151:84]
-    node _T_201 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_202 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_203 = eq(_T_202, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_204 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_205 = eq(_T_204, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_206 = and(_T_203, _T_205) @[exu_div_ctl.scala 138:94]
-    node _T_207 = and(_T_201, _T_206) @[exu_div_ctl.scala 139:10]
-    node _T_208 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 152:39]
-    node _T_209 = eq(_T_208, UInt<1>("h00")) @[exu_div_ctl.scala 152:34]
-    node _T_210 = and(_T_207, _T_209) @[exu_div_ctl.scala 152:32]
-    node _T_211 = or(_T_200, _T_210) @[exu_div_ctl.scala 151:126]
-    node _T_212 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_213 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_214 = eq(_T_213, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_215 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_216 = eq(_T_215, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_217 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_218 = eq(_T_217, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_219 = and(_T_214, _T_216) @[exu_div_ctl.scala 138:94]
-    node _T_220 = and(_T_219, _T_218) @[exu_div_ctl.scala 138:94]
-    node _T_221 = and(_T_212, _T_220) @[exu_div_ctl.scala 139:10]
-    node _T_222 = or(_T_211, _T_221) @[exu_div_ctl.scala 152:46]
-    node _T_223 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:74]
-    node _T_224 = eq(_T_223, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_225 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_226 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:74]
-    node _T_227 = eq(_T_226, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_228 = and(_T_224, _T_225) @[exu_div_ctl.scala 137:94]
-    node _T_229 = and(_T_228, _T_227) @[exu_div_ctl.scala 137:94]
-    node _T_230 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_231 = eq(_T_230, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_232 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_233 = eq(_T_232, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_234 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:57]
-    node _T_235 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 138:57]
-    node _T_236 = and(_T_231, _T_233) @[exu_div_ctl.scala 138:94]
-    node _T_237 = and(_T_236, _T_234) @[exu_div_ctl.scala 138:94]
-    node _T_238 = and(_T_237, _T_235) @[exu_div_ctl.scala 138:94]
-    node _T_239 = and(_T_229, _T_238) @[exu_div_ctl.scala 139:10]
-    node _T_240 = or(_T_222, _T_239) @[exu_div_ctl.scala 152:86]
-    node _T_241 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:74]
-    node _T_242 = eq(_T_241, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_243 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_244 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_245 = and(_T_242, _T_243) @[exu_div_ctl.scala 137:94]
-    node _T_246 = and(_T_245, _T_244) @[exu_div_ctl.scala 137:94]
-    node _T_247 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_248 = eq(_T_247, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_249 = and(_T_246, _T_248) @[exu_div_ctl.scala 139:10]
-    node _T_250 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 153:42]
-    node _T_251 = eq(_T_250, UInt<1>("h00")) @[exu_div_ctl.scala 153:37]
-    node _T_252 = and(_T_249, _T_251) @[exu_div_ctl.scala 153:35]
-    node _T_253 = or(_T_240, _T_252) @[exu_div_ctl.scala 152:128]
-    node _T_254 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_255 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_256 = eq(_T_255, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_257 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_258 = eq(_T_257, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_259 = and(_T_256, _T_258) @[exu_div_ctl.scala 138:94]
-    node _T_260 = and(_T_254, _T_259) @[exu_div_ctl.scala 139:10]
-    node _T_261 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 153:81]
-    node _T_262 = eq(_T_261, UInt<1>("h00")) @[exu_div_ctl.scala 153:76]
-    node _T_263 = and(_T_260, _T_262) @[exu_div_ctl.scala 153:74]
-    node _T_264 = or(_T_253, _T_263) @[exu_div_ctl.scala 153:46]
-    node _T_265 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_266 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:74]
-    node _T_267 = eq(_T_266, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_268 = and(_T_265, _T_267) @[exu_div_ctl.scala 137:94]
-    node _T_269 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_270 = eq(_T_269, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_271 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:57]
-    node _T_272 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:57]
-    node _T_273 = and(_T_270, _T_271) @[exu_div_ctl.scala 138:94]
-    node _T_274 = and(_T_273, _T_272) @[exu_div_ctl.scala 138:94]
-    node _T_275 = and(_T_268, _T_274) @[exu_div_ctl.scala 139:10]
-    node _T_276 = or(_T_264, _T_275) @[exu_div_ctl.scala 153:86]
-    node _T_277 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:74]
-    node _T_278 = eq(_T_277, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_279 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_280 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_281 = and(_T_278, _T_279) @[exu_div_ctl.scala 137:94]
-    node _T_282 = and(_T_281, _T_280) @[exu_div_ctl.scala 137:94]
-    node _T_283 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_284 = eq(_T_283, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_285 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:57]
-    node _T_286 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_287 = eq(_T_286, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_288 = and(_T_284, _T_285) @[exu_div_ctl.scala 138:94]
-    node _T_289 = and(_T_288, _T_287) @[exu_div_ctl.scala 138:94]
-    node _T_290 = and(_T_282, _T_289) @[exu_div_ctl.scala 139:10]
-    node _T_291 = or(_T_276, _T_290) @[exu_div_ctl.scala 153:128]
-    node _T_292 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:74]
-    node _T_293 = eq(_T_292, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_294 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_295 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_296 = and(_T_293, _T_294) @[exu_div_ctl.scala 137:94]
-    node _T_297 = and(_T_296, _T_295) @[exu_div_ctl.scala 137:94]
-    node _T_298 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_299 = eq(_T_298, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_300 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_301 = eq(_T_300, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_302 = and(_T_299, _T_301) @[exu_div_ctl.scala 138:94]
-    node _T_303 = and(_T_297, _T_302) @[exu_div_ctl.scala 139:10]
-    node _T_304 = or(_T_291, _T_303) @[exu_div_ctl.scala 154:46]
-    node _T_305 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_306 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:74]
-    node _T_307 = eq(_T_306, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_308 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:74]
-    node _T_309 = eq(_T_308, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_310 = and(_T_305, _T_307) @[exu_div_ctl.scala 137:94]
-    node _T_311 = and(_T_310, _T_309) @[exu_div_ctl.scala 137:94]
-    node _T_312 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_313 = eq(_T_312, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_314 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:57]
-    node _T_315 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 138:57]
-    node _T_316 = and(_T_313, _T_314) @[exu_div_ctl.scala 138:94]
-    node _T_317 = and(_T_316, _T_315) @[exu_div_ctl.scala 138:94]
-    node _T_318 = and(_T_311, _T_317) @[exu_div_ctl.scala 139:10]
-    node _T_319 = or(_T_304, _T_318) @[exu_div_ctl.scala 154:86]
-    node _T_320 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:74]
-    node _T_321 = eq(_T_320, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_322 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_323 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_324 = and(_T_321, _T_322) @[exu_div_ctl.scala 137:94]
-    node _T_325 = and(_T_324, _T_323) @[exu_div_ctl.scala 137:94]
-    node _T_326 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_327 = eq(_T_326, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_328 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_329 = eq(_T_328, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_330 = and(_T_327, _T_329) @[exu_div_ctl.scala 138:94]
-    node _T_331 = and(_T_325, _T_330) @[exu_div_ctl.scala 139:10]
-    node _T_332 = or(_T_319, _T_331) @[exu_div_ctl.scala 154:128]
-    node _T_333 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_334 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_335 = and(_T_333, _T_334) @[exu_div_ctl.scala 137:94]
-    node _T_336 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_337 = eq(_T_336, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_338 = and(_T_335, _T_337) @[exu_div_ctl.scala 139:10]
-    node _T_339 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 155:80]
-    node _T_340 = eq(_T_339, UInt<1>("h00")) @[exu_div_ctl.scala 155:75]
-    node _T_341 = and(_T_338, _T_340) @[exu_div_ctl.scala 155:73]
-    node _T_342 = or(_T_332, _T_341) @[exu_div_ctl.scala 155:46]
-    node _T_343 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:74]
-    node _T_344 = eq(_T_343, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_345 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_346 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_347 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_348 = and(_T_344, _T_345) @[exu_div_ctl.scala 137:94]
-    node _T_349 = and(_T_348, _T_346) @[exu_div_ctl.scala 137:94]
-    node _T_350 = and(_T_349, _T_347) @[exu_div_ctl.scala 137:94]
-    node _T_351 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_352 = eq(_T_351, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_353 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:57]
-    node _T_354 = and(_T_352, _T_353) @[exu_div_ctl.scala 138:94]
-    node _T_355 = and(_T_350, _T_354) @[exu_div_ctl.scala 139:10]
-    node _T_356 = or(_T_342, _T_355) @[exu_div_ctl.scala 155:86]
-    node _T_357 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_358 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_359 = and(_T_357, _T_358) @[exu_div_ctl.scala 137:94]
-    node _T_360 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:57]
-    node _T_361 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_362 = eq(_T_361, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_363 = and(_T_360, _T_362) @[exu_div_ctl.scala 138:94]
-    node _T_364 = and(_T_359, _T_363) @[exu_div_ctl.scala 139:10]
-    node _T_365 = or(_T_356, _T_364) @[exu_div_ctl.scala 155:128]
-    node _T_366 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_367 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_368 = and(_T_366, _T_367) @[exu_div_ctl.scala 137:94]
-    node _T_369 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:57]
-    node _T_370 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_371 = eq(_T_370, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_372 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_373 = eq(_T_372, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_374 = and(_T_369, _T_371) @[exu_div_ctl.scala 138:94]
-    node _T_375 = and(_T_374, _T_373) @[exu_div_ctl.scala 138:94]
-    node _T_376 = and(_T_368, _T_375) @[exu_div_ctl.scala 139:10]
-    node _T_377 = or(_T_365, _T_376) @[exu_div_ctl.scala 156:46]
-    node _T_378 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_379 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_380 = and(_T_378, _T_379) @[exu_div_ctl.scala 137:94]
-    node _T_381 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_382 = eq(_T_381, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_383 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_384 = eq(_T_383, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_385 = and(_T_382, _T_384) @[exu_div_ctl.scala 138:94]
-    node _T_386 = and(_T_380, _T_385) @[exu_div_ctl.scala 139:10]
-    node _T_387 = or(_T_377, _T_386) @[exu_div_ctl.scala 156:86]
-    node _T_388 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_389 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:74]
-    node _T_390 = eq(_T_389, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_391 = and(_T_388, _T_390) @[exu_div_ctl.scala 137:94]
-    node _T_392 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_393 = eq(_T_392, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_394 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:57]
-    node _T_395 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:57]
-    node _T_396 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 138:57]
-    node _T_397 = and(_T_393, _T_394) @[exu_div_ctl.scala 138:94]
-    node _T_398 = and(_T_397, _T_395) @[exu_div_ctl.scala 138:94]
-    node _T_399 = and(_T_398, _T_396) @[exu_div_ctl.scala 138:94]
-    node _T_400 = and(_T_391, _T_399) @[exu_div_ctl.scala 139:10]
-    node _T_401 = or(_T_387, _T_400) @[exu_div_ctl.scala 156:128]
-    node _T_402 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_403 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_404 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_405 = and(_T_402, _T_403) @[exu_div_ctl.scala 137:94]
-    node _T_406 = and(_T_405, _T_404) @[exu_div_ctl.scala 137:94]
-    node _T_407 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:57]
-    node _T_408 = and(_T_406, _T_407) @[exu_div_ctl.scala 139:10]
-    node _T_409 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 157:82]
-    node _T_410 = eq(_T_409, UInt<1>("h00")) @[exu_div_ctl.scala 157:77]
-    node _T_411 = and(_T_408, _T_410) @[exu_div_ctl.scala 157:75]
-    node _T_412 = or(_T_401, _T_411) @[exu_div_ctl.scala 157:46]
-    node _T_413 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_414 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_415 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_416 = and(_T_413, _T_414) @[exu_div_ctl.scala 137:94]
-    node _T_417 = and(_T_416, _T_415) @[exu_div_ctl.scala 137:94]
-    node _T_418 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:57]
-    node _T_419 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_420 = eq(_T_419, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_421 = and(_T_418, _T_420) @[exu_div_ctl.scala 138:94]
-    node _T_422 = and(_T_417, _T_421) @[exu_div_ctl.scala 139:10]
-    node _T_423 = or(_T_412, _T_422) @[exu_div_ctl.scala 157:86]
-    node _T_424 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_425 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_426 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_427 = and(_T_424, _T_425) @[exu_div_ctl.scala 137:94]
-    node _T_428 = and(_T_427, _T_426) @[exu_div_ctl.scala 137:94]
-    node _T_429 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:57]
-    node _T_430 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:74]
-    node _T_431 = eq(_T_430, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_432 = and(_T_429, _T_431) @[exu_div_ctl.scala 138:94]
-    node _T_433 = and(_T_428, _T_432) @[exu_div_ctl.scala 139:10]
-    node _T_434 = or(_T_423, _T_433) @[exu_div_ctl.scala 157:128]
-    node _T_435 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_436 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:74]
-    node _T_437 = eq(_T_436, UInt<1>("h00")) @[exu_div_ctl.scala 137:69]
-    node _T_438 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_439 = and(_T_435, _T_437) @[exu_div_ctl.scala 137:94]
-    node _T_440 = and(_T_439, _T_438) @[exu_div_ctl.scala 137:94]
-    node _T_441 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:74]
-    node _T_442 = eq(_T_441, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_443 = bits(m_ff, 1, 1) @[exu_div_ctl.scala 138:57]
-    node _T_444 = and(_T_442, _T_443) @[exu_div_ctl.scala 138:94]
-    node _T_445 = and(_T_440, _T_444) @[exu_div_ctl.scala 139:10]
-    node _T_446 = or(_T_434, _T_445) @[exu_div_ctl.scala 158:46]
-    node _T_447 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_448 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_449 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_450 = and(_T_447, _T_448) @[exu_div_ctl.scala 137:94]
-    node _T_451 = and(_T_450, _T_449) @[exu_div_ctl.scala 137:94]
-    node _T_452 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_453 = eq(_T_452, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_454 = and(_T_451, _T_453) @[exu_div_ctl.scala 139:10]
-    node _T_455 = or(_T_446, _T_454) @[exu_div_ctl.scala 158:86]
-    node _T_456 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_457 = bits(q_ff, 2, 2) @[exu_div_ctl.scala 137:57]
-    node _T_458 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_459 = bits(q_ff, 0, 0) @[exu_div_ctl.scala 137:57]
-    node _T_460 = and(_T_456, _T_457) @[exu_div_ctl.scala 137:94]
-    node _T_461 = and(_T_460, _T_458) @[exu_div_ctl.scala 137:94]
-    node _T_462 = and(_T_461, _T_459) @[exu_div_ctl.scala 137:94]
-    node _T_463 = bits(m_ff, 3, 3) @[exu_div_ctl.scala 138:57]
-    node _T_464 = and(_T_462, _T_463) @[exu_div_ctl.scala 139:10]
-    node _T_465 = or(_T_455, _T_464) @[exu_div_ctl.scala 158:128]
-    node _T_466 = bits(q_ff, 3, 3) @[exu_div_ctl.scala 137:57]
-    node _T_467 = bits(q_ff, 1, 1) @[exu_div_ctl.scala 137:57]
-    node _T_468 = and(_T_466, _T_467) @[exu_div_ctl.scala 137:94]
-    node _T_469 = bits(m_ff, 2, 2) @[exu_div_ctl.scala 138:74]
-    node _T_470 = eq(_T_469, UInt<1>("h00")) @[exu_div_ctl.scala 138:69]
-    node _T_471 = and(_T_468, _T_470) @[exu_div_ctl.scala 139:10]
-    node _T_472 = bits(m_ff, 0, 0) @[exu_div_ctl.scala 159:79]
-    node _T_473 = eq(_T_472, UInt<1>("h00")) @[exu_div_ctl.scala 159:74]
-    node _T_474 = and(_T_471, _T_473) @[exu_div_ctl.scala 159:72]
-    node _T_475 = or(_T_465, _T_474) @[exu_div_ctl.scala 159:46]
-    node _T_476 = cat(_T_164, _T_475) @[Cat.scala 29:58]
-    node _T_477 = cat(_T_30, _T_61) @[Cat.scala 29:58]
-    node smallnum = cat(_T_477, _T_476) @[Cat.scala 29:58]
+    wire control_ff : UInt<3>
+    control_ff <= UInt<3>("h00")
+    wire count_ff : UInt<7>
+    count_ff <= UInt<7>("h00")
+    wire smallnum : UInt<4>
+    smallnum <= UInt<4>("h00")
+    wire a_ff : UInt<32>
+    a_ff <= UInt<32>("h00")
+    wire b_ff1 : UInt<33>
+    b_ff1 <= UInt<33>("h00")
+    wire b_ff : UInt<38>
+    b_ff <= UInt<38>("h00")
+    wire q_ff : UInt<32>
+    q_ff <= UInt<32>("h00")
+    wire r_ff : UInt<33>
+    r_ff <= UInt<33>("h00")
+    wire quotient_raw : UInt<16>
+    quotient_raw <= UInt<16>("h00")
+    wire quotient_new : UInt<4>
+    quotient_new <= UInt<4>("h00")
+    wire shortq_enable : UInt<1>
+    shortq_enable <= UInt<1>("h00")
     wire shortq_enable_ff : UInt<1>
     shortq_enable_ff <= UInt<1>("h00")
-    wire short_dividend : UInt<33>
-    short_dividend <= UInt<33>("h00")
-    wire shortq_shift_xx : UInt<4>
-    shortq_shift_xx <= UInt<4>("h00")
-    node _T_478 = bits(q_ff, 31, 31) @[exu_div_ctl.scala 168:40]
-    node _T_479 = and(sign_ff, _T_478) @[exu_div_ctl.scala 168:34]
-    node _T_480 = bits(q_ff, 31, 0) @[exu_div_ctl.scala 168:49]
-    node _T_481 = cat(_T_479, _T_480) @[Cat.scala 29:58]
-    short_dividend <= _T_481 @[exu_div_ctl.scala 168:18]
-    node _T_482 = bits(short_dividend, 32, 32) @[exu_div_ctl.scala 173:22]
-    node _T_483 = bits(_T_482, 0, 0) @[exu_div_ctl.scala 173:27]
-    node _T_484 = eq(_T_483, UInt<1>("h00")) @[exu_div_ctl.scala 173:7]
-    node _T_485 = bits(short_dividend, 31, 24) @[exu_div_ctl.scala 173:52]
-    node _T_486 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_487 = neq(_T_485, _T_486) @[exu_div_ctl.scala 173:60]
-    node _T_488 = bits(short_dividend, 32, 32) @[exu_div_ctl.scala 174:21]
-    node _T_489 = bits(_T_488, 0, 0) @[exu_div_ctl.scala 174:26]
-    node _T_490 = bits(short_dividend, 31, 23) @[exu_div_ctl.scala 174:51]
-    node _T_491 = mux(UInt<1>("h01"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12]
-    node _T_492 = neq(_T_490, _T_491) @[exu_div_ctl.scala 174:59]
-    node _T_493 = mux(_T_484, _T_487, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_494 = mux(_T_489, _T_492, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_495 = or(_T_493, _T_494) @[Mux.scala 27:72]
-    wire _T_496 : UInt<1> @[Mux.scala 27:72]
-    _T_496 <= _T_495 @[Mux.scala 27:72]
-    node _T_497 = bits(short_dividend, 32, 32) @[exu_div_ctl.scala 177:22]
-    node _T_498 = bits(_T_497, 0, 0) @[exu_div_ctl.scala 177:27]
-    node _T_499 = eq(_T_498, UInt<1>("h00")) @[exu_div_ctl.scala 177:7]
-    node _T_500 = bits(short_dividend, 23, 16) @[exu_div_ctl.scala 177:52]
-    node _T_501 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_502 = neq(_T_500, _T_501) @[exu_div_ctl.scala 177:60]
-    node _T_503 = bits(short_dividend, 32, 32) @[exu_div_ctl.scala 178:21]
-    node _T_504 = bits(_T_503, 0, 0) @[exu_div_ctl.scala 178:26]
-    node _T_505 = bits(short_dividend, 22, 15) @[exu_div_ctl.scala 178:51]
-    node _T_506 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_507 = neq(_T_505, _T_506) @[exu_div_ctl.scala 178:59]
-    node _T_508 = mux(_T_499, _T_502, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_509 = mux(_T_504, _T_507, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_510 = or(_T_508, _T_509) @[Mux.scala 27:72]
-    wire _T_511 : UInt<1> @[Mux.scala 27:72]
-    _T_511 <= _T_510 @[Mux.scala 27:72]
-    node _T_512 = bits(short_dividend, 32, 32) @[exu_div_ctl.scala 181:22]
-    node _T_513 = bits(_T_512, 0, 0) @[exu_div_ctl.scala 181:27]
-    node _T_514 = eq(_T_513, UInt<1>("h00")) @[exu_div_ctl.scala 181:7]
-    node _T_515 = bits(short_dividend, 15, 8) @[exu_div_ctl.scala 181:52]
-    node _T_516 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_517 = neq(_T_515, _T_516) @[exu_div_ctl.scala 181:59]
-    node _T_518 = bits(short_dividend, 32, 32) @[exu_div_ctl.scala 182:21]
-    node _T_519 = bits(_T_518, 0, 0) @[exu_div_ctl.scala 182:26]
-    node _T_520 = bits(short_dividend, 14, 7) @[exu_div_ctl.scala 182:51]
-    node _T_521 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_522 = neq(_T_520, _T_521) @[exu_div_ctl.scala 182:58]
-    node _T_523 = mux(_T_514, _T_517, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_524 = mux(_T_519, _T_522, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_525 = or(_T_523, _T_524) @[Mux.scala 27:72]
-    wire _T_526 : UInt<1> @[Mux.scala 27:72]
-    _T_526 <= _T_525 @[Mux.scala 27:72]
-    node _T_527 = cat(_T_511, _T_526) @[Cat.scala 29:58]
-    node _T_528 = cat(UInt<2>("h00"), _T_496) @[Cat.scala 29:58]
-    node a_cls = cat(_T_528, _T_527) @[Cat.scala 29:58]
-    node _T_529 = bits(m_ff, 32, 32) @[exu_div_ctl.scala 187:12]
-    node _T_530 = bits(_T_529, 0, 0) @[exu_div_ctl.scala 187:17]
-    node _T_531 = eq(_T_530, UInt<1>("h00")) @[exu_div_ctl.scala 187:7]
-    node _T_532 = bits(m_ff, 31, 24) @[exu_div_ctl.scala 187:32]
-    node _T_533 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_534 = neq(_T_532, _T_533) @[exu_div_ctl.scala 187:40]
-    node _T_535 = bits(m_ff, 32, 32) @[exu_div_ctl.scala 188:11]
-    node _T_536 = bits(_T_535, 0, 0) @[exu_div_ctl.scala 188:16]
-    node _T_537 = bits(m_ff, 31, 24) @[exu_div_ctl.scala 188:31]
-    node _T_538 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_539 = neq(_T_537, _T_538) @[exu_div_ctl.scala 188:39]
-    node _T_540 = mux(_T_531, _T_534, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_541 = mux(_T_536, _T_539, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_542 = or(_T_540, _T_541) @[Mux.scala 27:72]
-    wire _T_543 : UInt<1> @[Mux.scala 27:72]
-    _T_543 <= _T_542 @[Mux.scala 27:72]
-    node _T_544 = bits(m_ff, 32, 32) @[exu_div_ctl.scala 191:12]
-    node _T_545 = bits(_T_544, 0, 0) @[exu_div_ctl.scala 191:17]
-    node _T_546 = eq(_T_545, UInt<1>("h00")) @[exu_div_ctl.scala 191:7]
-    node _T_547 = bits(m_ff, 23, 16) @[exu_div_ctl.scala 191:32]
-    node _T_548 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_549 = neq(_T_547, _T_548) @[exu_div_ctl.scala 191:40]
-    node _T_550 = bits(m_ff, 32, 32) @[exu_div_ctl.scala 192:11]
-    node _T_551 = bits(_T_550, 0, 0) @[exu_div_ctl.scala 192:16]
-    node _T_552 = bits(m_ff, 23, 16) @[exu_div_ctl.scala 192:31]
-    node _T_553 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_554 = neq(_T_552, _T_553) @[exu_div_ctl.scala 192:39]
-    node _T_555 = mux(_T_546, _T_549, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_556 = mux(_T_551, _T_554, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_557 = or(_T_555, _T_556) @[Mux.scala 27:72]
-    wire _T_558 : UInt<1> @[Mux.scala 27:72]
-    _T_558 <= _T_557 @[Mux.scala 27:72]
-    node _T_559 = bits(m_ff, 32, 32) @[exu_div_ctl.scala 195:12]
-    node _T_560 = bits(_T_559, 0, 0) @[exu_div_ctl.scala 195:17]
-    node _T_561 = eq(_T_560, UInt<1>("h00")) @[exu_div_ctl.scala 195:7]
-    node _T_562 = bits(m_ff, 15, 8) @[exu_div_ctl.scala 195:32]
-    node _T_563 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_564 = neq(_T_562, _T_563) @[exu_div_ctl.scala 195:39]
-    node _T_565 = bits(m_ff, 32, 32) @[exu_div_ctl.scala 196:11]
-    node _T_566 = bits(_T_565, 0, 0) @[exu_div_ctl.scala 196:16]
-    node _T_567 = bits(m_ff, 15, 8) @[exu_div_ctl.scala 196:31]
-    node _T_568 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
-    node _T_569 = neq(_T_567, _T_568) @[exu_div_ctl.scala 196:38]
-    node _T_570 = mux(_T_561, _T_564, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_571 = mux(_T_566, _T_569, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_572 = or(_T_570, _T_571) @[Mux.scala 27:72]
-    wire _T_573 : UInt<1> @[Mux.scala 27:72]
-    _T_573 <= _T_572 @[Mux.scala 27:72]
-    node _T_574 = cat(_T_558, _T_573) @[Cat.scala 29:58]
-    node _T_575 = cat(UInt<2>("h00"), _T_543) @[Cat.scala 29:58]
-    node b_cls = cat(_T_575, _T_574) @[Cat.scala 29:58]
-    node _T_576 = bits(a_cls, 2, 1) @[exu_div_ctl.scala 200:13]
-    node _T_577 = eq(_T_576, UInt<1>("h01")) @[exu_div_ctl.scala 200:19]
-    node _T_578 = bits(b_cls, 2, 2) @[exu_div_ctl.scala 200:42]
-    node _T_579 = eq(_T_578, UInt<1>("h01")) @[exu_div_ctl.scala 200:48]
-    node _T_580 = and(_T_577, _T_579) @[exu_div_ctl.scala 200:34]
-    node _T_581 = bits(a_cls, 2, 0) @[exu_div_ctl.scala 201:15]
-    node _T_582 = eq(_T_581, UInt<1>("h01")) @[exu_div_ctl.scala 201:21]
-    node _T_583 = bits(b_cls, 2, 2) @[exu_div_ctl.scala 201:44]
-    node _T_584 = eq(_T_583, UInt<1>("h01")) @[exu_div_ctl.scala 201:50]
-    node _T_585 = and(_T_582, _T_584) @[exu_div_ctl.scala 201:36]
-    node _T_586 = or(_T_580, _T_585) @[exu_div_ctl.scala 200:65]
-    node _T_587 = bits(a_cls, 2, 0) @[exu_div_ctl.scala 202:15]
-    node _T_588 = eq(_T_587, UInt<1>("h00")) @[exu_div_ctl.scala 202:21]
-    node _T_589 = bits(b_cls, 2, 2) @[exu_div_ctl.scala 202:44]
-    node _T_590 = eq(_T_589, UInt<1>("h01")) @[exu_div_ctl.scala 202:50]
-    node _T_591 = and(_T_588, _T_590) @[exu_div_ctl.scala 202:36]
-    node _T_592 = or(_T_586, _T_591) @[exu_div_ctl.scala 201:67]
-    node _T_593 = bits(a_cls, 2, 0) @[exu_div_ctl.scala 203:15]
-    node _T_594 = eq(_T_593, UInt<1>("h01")) @[exu_div_ctl.scala 203:21]
-    node _T_595 = bits(b_cls, 2, 1) @[exu_div_ctl.scala 203:44]
-    node _T_596 = eq(_T_595, UInt<1>("h01")) @[exu_div_ctl.scala 203:50]
-    node _T_597 = and(_T_594, _T_596) @[exu_div_ctl.scala 203:36]
-    node _T_598 = or(_T_592, _T_597) @[exu_div_ctl.scala 202:67]
-    node _T_599 = bits(a_cls, 2, 0) @[exu_div_ctl.scala 204:15]
-    node _T_600 = eq(_T_599, UInt<1>("h00")) @[exu_div_ctl.scala 204:21]
-    node _T_601 = bits(b_cls, 2, 1) @[exu_div_ctl.scala 204:44]
-    node _T_602 = eq(_T_601, UInt<1>("h01")) @[exu_div_ctl.scala 204:50]
-    node _T_603 = and(_T_600, _T_602) @[exu_div_ctl.scala 204:36]
-    node _T_604 = or(_T_598, _T_603) @[exu_div_ctl.scala 203:67]
-    node _T_605 = bits(a_cls, 2, 0) @[exu_div_ctl.scala 205:15]
-    node _T_606 = eq(_T_605, UInt<1>("h00")) @[exu_div_ctl.scala 205:21]
-    node _T_607 = bits(b_cls, 2, 0) @[exu_div_ctl.scala 205:44]
-    node _T_608 = eq(_T_607, UInt<1>("h01")) @[exu_div_ctl.scala 205:50]
-    node _T_609 = and(_T_606, _T_608) @[exu_div_ctl.scala 205:36]
-    node _T_610 = or(_T_604, _T_609) @[exu_div_ctl.scala 204:67]
-    node _T_611 = bits(a_cls, 2, 2) @[exu_div_ctl.scala 207:13]
-    node _T_612 = eq(_T_611, UInt<1>("h01")) @[exu_div_ctl.scala 207:19]
-    node _T_613 = bits(b_cls, 2, 2) @[exu_div_ctl.scala 207:42]
-    node _T_614 = eq(_T_613, UInt<1>("h01")) @[exu_div_ctl.scala 207:48]
-    node _T_615 = and(_T_612, _T_614) @[exu_div_ctl.scala 207:34]
-    node _T_616 = bits(a_cls, 2, 1) @[exu_div_ctl.scala 208:15]
-    node _T_617 = eq(_T_616, UInt<1>("h01")) @[exu_div_ctl.scala 208:21]
-    node _T_618 = bits(b_cls, 2, 1) @[exu_div_ctl.scala 208:44]
-    node _T_619 = eq(_T_618, UInt<1>("h01")) @[exu_div_ctl.scala 208:50]
-    node _T_620 = and(_T_617, _T_619) @[exu_div_ctl.scala 208:36]
-    node _T_621 = or(_T_615, _T_620) @[exu_div_ctl.scala 207:65]
-    node _T_622 = bits(a_cls, 2, 0) @[exu_div_ctl.scala 209:15]
-    node _T_623 = eq(_T_622, UInt<1>("h01")) @[exu_div_ctl.scala 209:21]
-    node _T_624 = bits(b_cls, 2, 0) @[exu_div_ctl.scala 209:44]
-    node _T_625 = eq(_T_624, UInt<1>("h01")) @[exu_div_ctl.scala 209:50]
-    node _T_626 = and(_T_623, _T_625) @[exu_div_ctl.scala 209:36]
-    node _T_627 = or(_T_621, _T_626) @[exu_div_ctl.scala 208:67]
-    node _T_628 = bits(a_cls, 2, 0) @[exu_div_ctl.scala 210:15]
-    node _T_629 = eq(_T_628, UInt<1>("h00")) @[exu_div_ctl.scala 210:21]
-    node _T_630 = bits(b_cls, 2, 0) @[exu_div_ctl.scala 210:44]
-    node _T_631 = eq(_T_630, UInt<1>("h00")) @[exu_div_ctl.scala 210:50]
-    node _T_632 = and(_T_629, _T_631) @[exu_div_ctl.scala 210:36]
-    node _T_633 = or(_T_627, _T_632) @[exu_div_ctl.scala 209:67]
-    node _T_634 = bits(a_cls, 2, 2) @[exu_div_ctl.scala 212:13]
-    node _T_635 = eq(_T_634, UInt<1>("h01")) @[exu_div_ctl.scala 212:19]
-    node _T_636 = bits(b_cls, 2, 1) @[exu_div_ctl.scala 212:42]
-    node _T_637 = eq(_T_636, UInt<1>("h01")) @[exu_div_ctl.scala 212:48]
-    node _T_638 = and(_T_635, _T_637) @[exu_div_ctl.scala 212:34]
-    node _T_639 = bits(a_cls, 2, 1) @[exu_div_ctl.scala 213:15]
-    node _T_640 = eq(_T_639, UInt<1>("h01")) @[exu_div_ctl.scala 213:21]
-    node _T_641 = bits(b_cls, 2, 0) @[exu_div_ctl.scala 213:44]
-    node _T_642 = eq(_T_641, UInt<1>("h01")) @[exu_div_ctl.scala 213:50]
-    node _T_643 = and(_T_640, _T_642) @[exu_div_ctl.scala 213:36]
-    node _T_644 = or(_T_638, _T_643) @[exu_div_ctl.scala 212:65]
-    node _T_645 = bits(a_cls, 2, 0) @[exu_div_ctl.scala 214:15]
-    node _T_646 = eq(_T_645, UInt<1>("h01")) @[exu_div_ctl.scala 214:21]
-    node _T_647 = bits(b_cls, 2, 0) @[exu_div_ctl.scala 214:44]
-    node _T_648 = eq(_T_647, UInt<1>("h00")) @[exu_div_ctl.scala 214:50]
-    node _T_649 = and(_T_646, _T_648) @[exu_div_ctl.scala 214:36]
-    node _T_650 = or(_T_644, _T_649) @[exu_div_ctl.scala 213:67]
-    node _T_651 = bits(a_cls, 2, 2) @[exu_div_ctl.scala 216:13]
-    node _T_652 = eq(_T_651, UInt<1>("h01")) @[exu_div_ctl.scala 216:19]
-    node _T_653 = bits(b_cls, 2, 0) @[exu_div_ctl.scala 216:42]
-    node _T_654 = eq(_T_653, UInt<1>("h01")) @[exu_div_ctl.scala 216:48]
-    node _T_655 = and(_T_652, _T_654) @[exu_div_ctl.scala 216:34]
-    node _T_656 = bits(a_cls, 2, 1) @[exu_div_ctl.scala 217:15]
-    node _T_657 = eq(_T_656, UInt<1>("h01")) @[exu_div_ctl.scala 217:21]
-    node _T_658 = bits(b_cls, 2, 0) @[exu_div_ctl.scala 217:44]
-    node _T_659 = eq(_T_658, UInt<1>("h00")) @[exu_div_ctl.scala 217:50]
-    node _T_660 = and(_T_657, _T_659) @[exu_div_ctl.scala 217:36]
-    node _T_661 = or(_T_655, _T_660) @[exu_div_ctl.scala 216:65]
-    node _T_662 = cat(_T_650, _T_661) @[Cat.scala 29:58]
-    node _T_663 = cat(_T_610, _T_633) @[Cat.scala 29:58]
-    node shortq_raw = cat(_T_663, _T_662) @[Cat.scala 29:58]
-    node _T_664 = bits(m_ff, 31, 0) @[exu_div_ctl.scala 220:42]
-    node _T_665 = neq(_T_664, UInt<32>("h00")) @[exu_div_ctl.scala 220:49]
-    node _T_666 = and(valid_ff_x, _T_665) @[exu_div_ctl.scala 220:35]
-    node _T_667 = neq(shortq_raw, UInt<4>("h00")) @[exu_div_ctl.scala 220:78]
-    node shortq_enable = and(_T_666, _T_667) @[exu_div_ctl.scala 220:64]
-    node _T_668 = bits(shortq_enable, 0, 0) @[Bitwise.scala 72:15]
-    node _T_669 = mux(_T_668, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
-    node _T_670 = and(_T_669, shortq_raw) @[exu_div_ctl.scala 221:57]
-    node shortq_shift = cat(UInt<2>("h00"), _T_670) @[Cat.scala 29:58]
-    node _T_671 = bits(shortq_shift_xx, 3, 3) @[exu_div_ctl.scala 223:20]
-    node _T_672 = bits(_T_671, 0, 0) @[exu_div_ctl.scala 223:24]
-    node _T_673 = bits(shortq_shift_xx, 2, 2) @[exu_div_ctl.scala 224:20]
-    node _T_674 = bits(_T_673, 0, 0) @[exu_div_ctl.scala 224:24]
-    node _T_675 = bits(shortq_shift_xx, 1, 1) @[exu_div_ctl.scala 225:20]
-    node _T_676 = bits(_T_675, 0, 0) @[exu_div_ctl.scala 225:24]
-    node _T_677 = bits(shortq_shift_xx, 0, 0) @[exu_div_ctl.scala 226:20]
-    node _T_678 = bits(_T_677, 0, 0) @[exu_div_ctl.scala 226:24]
-    node _T_679 = mux(_T_672, UInt<5>("h01f"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_680 = mux(_T_674, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_681 = mux(_T_676, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_682 = mux(_T_678, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_683 = or(_T_679, _T_680) @[Mux.scala 27:72]
-    node _T_684 = or(_T_683, _T_681) @[Mux.scala 27:72]
-    node _T_685 = or(_T_684, _T_682) @[Mux.scala 27:72]
-    wire _T_686 : UInt<5> @[Mux.scala 27:72]
-    _T_686 <= _T_685 @[Mux.scala 27:72]
-    node shortq_shift_ff = cat(UInt<1>("h00"), _T_686) @[Cat.scala 29:58]
-    node _T_687 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 230:40]
-    node _T_688 = eq(count, UInt<6>("h020")) @[exu_div_ctl.scala 230:55]
-    node _T_689 = eq(count, UInt<6>("h021")) @[exu_div_ctl.scala 230:76]
-    node _T_690 = mux(_T_687, _T_688, _T_689) @[exu_div_ctl.scala 230:39]
-    node finish = or(smallnum_case, _T_690) @[exu_div_ctl.scala 230:34]
-    node _T_691 = or(io.valid_in, run_state) @[exu_div_ctl.scala 231:32]
-    node _T_692 = or(_T_691, finish) @[exu_div_ctl.scala 231:44]
-    node div_clken = or(_T_692, finish_ff) @[exu_div_ctl.scala 231:53]
-    node _T_693 = or(io.valid_in, run_state) @[exu_div_ctl.scala 232:33]
-    node _T_694 = eq(finish, UInt<1>("h00")) @[exu_div_ctl.scala 232:48]
-    node _T_695 = and(_T_693, _T_694) @[exu_div_ctl.scala 232:46]
-    node _T_696 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 232:58]
-    node run_in = and(_T_695, _T_696) @[exu_div_ctl.scala 232:56]
-    node _T_697 = eq(finish, UInt<1>("h00")) @[exu_div_ctl.scala 233:37]
-    node _T_698 = and(run_state, _T_697) @[exu_div_ctl.scala 233:35]
-    node _T_699 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 233:47]
-    node _T_700 = and(_T_698, _T_699) @[exu_div_ctl.scala 233:45]
-    node _T_701 = eq(shortq_enable, UInt<1>("h00")) @[exu_div_ctl.scala 233:60]
-    node _T_702 = and(_T_700, _T_701) @[exu_div_ctl.scala 233:58]
-    node _T_703 = bits(_T_702, 0, 0) @[Bitwise.scala 72:15]
-    node _T_704 = mux(_T_703, UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
-    node _T_705 = bits(shortq_shift_ff, 4, 0) @[exu_div_ctl.scala 233:111]
-    node _T_706 = cat(UInt<1>("h00"), _T_705) @[Cat.scala 29:58]
-    node _T_707 = add(count, _T_706) @[exu_div_ctl.scala 233:86]
-    node _T_708 = tail(_T_707, 1) @[exu_div_ctl.scala 233:86]
-    node _T_709 = add(_T_708, UInt<6>("h01")) @[exu_div_ctl.scala 233:118]
-    node _T_710 = tail(_T_709, 1) @[exu_div_ctl.scala 233:118]
-    node _T_711 = and(_T_704, _T_710) @[exu_div_ctl.scala 233:77]
-    count_in <= _T_711 @[exu_div_ctl.scala 233:14]
-    node _T_712 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 234:33]
-    node _T_713 = and(finish_ff, _T_712) @[exu_div_ctl.scala 234:31]
-    io.valid_out <= _T_713 @[exu_div_ctl.scala 234:17]
-    node _T_714 = eq(io.signed_in, UInt<1>("h00")) @[exu_div_ctl.scala 235:20]
-    node _T_715 = neq(io.divisor_in, UInt<32>("h00")) @[exu_div_ctl.scala 235:51]
-    node sign_eff = and(_T_714, _T_715) @[exu_div_ctl.scala 235:34]
-    node _T_716 = eq(run_state, UInt<1>("h00")) @[exu_div_ctl.scala 238:6]
-    node _T_717 = bits(_T_716, 0, 0) @[exu_div_ctl.scala 238:18]
-    node _T_718 = cat(UInt<1>("h00"), io.dividend_in) @[Cat.scala 29:58]
-    node _T_719 = or(valid_ff_x, shortq_enable_ff) @[exu_div_ctl.scala 239:30]
-    node _T_720 = and(run_state, _T_719) @[exu_div_ctl.scala 239:16]
-    node _T_721 = bits(_T_720, 0, 0) @[exu_div_ctl.scala 239:51]
-    node _T_722 = bits(dividend_eff, 31, 0) @[exu_div_ctl.scala 239:78]
-    node _T_723 = bits(a_in, 32, 32) @[exu_div_ctl.scala 239:90]
-    node _T_724 = eq(_T_723, UInt<1>("h00")) @[exu_div_ctl.scala 239:85]
-    node _T_725 = cat(_T_722, _T_724) @[Cat.scala 29:58]
-    node _T_726 = bits(shortq_shift_ff, 4, 0) @[exu_div_ctl.scala 239:114]
-    node _T_727 = dshl(_T_725, _T_726) @[exu_div_ctl.scala 239:96]
-    node _T_728 = or(valid_ff_x, shortq_enable_ff) @[exu_div_ctl.scala 240:31]
-    node _T_729 = eq(_T_728, UInt<1>("h00")) @[exu_div_ctl.scala 240:18]
-    node _T_730 = and(run_state, _T_729) @[exu_div_ctl.scala 240:16]
-    node _T_731 = bits(_T_730, 0, 0) @[exu_div_ctl.scala 240:52]
-    node _T_732 = bits(q_ff, 31, 0) @[exu_div_ctl.scala 240:70]
-    node _T_733 = bits(a_in, 32, 32) @[exu_div_ctl.scala 240:82]
-    node _T_734 = eq(_T_733, UInt<1>("h00")) @[exu_div_ctl.scala 240:77]
-    node _T_735 = cat(_T_732, _T_734) @[Cat.scala 29:58]
-    node _T_736 = mux(_T_717, _T_718, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_737 = mux(_T_721, _T_727, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_738 = mux(_T_731, _T_735, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_739 = or(_T_736, _T_737) @[Mux.scala 27:72]
-    node _T_740 = or(_T_739, _T_738) @[Mux.scala 27:72]
-    wire _T_741 : UInt<64> @[Mux.scala 27:72]
-    _T_741 <= _T_740 @[Mux.scala 27:72]
-    q_in <= _T_741 @[exu_div_ctl.scala 237:8]
-    node _T_742 = eq(shortq_enable, UInt<1>("h00")) @[exu_div_ctl.scala 242:50]
-    node _T_743 = and(run_state, _T_742) @[exu_div_ctl.scala 242:48]
-    node qff_enable = or(io.valid_in, _T_743) @[exu_div_ctl.scala 242:35]
-    node _T_744 = and(sign_ff, dividend_neg_ff) @[exu_div_ctl.scala 243:32]
-    node _T_745 = bits(_T_744, 0, 0) @[exu_div_ctl.scala 243:51]
-    node _T_746 = bits(q_ff, 31, 0) @[exu_div_ctl.scala 243:74]
-    wire _T_747 : UInt<1>[31] @[lib.scala 426:20]
-    node _T_748 = bits(_T_746, 0, 0) @[lib.scala 428:27]
-    node _T_749 = orr(_T_748) @[lib.scala 428:35]
-    node _T_750 = bits(_T_746, 1, 1) @[lib.scala 428:44]
-    node _T_751 = not(_T_750) @[lib.scala 428:40]
-    node _T_752 = bits(_T_746, 1, 1) @[lib.scala 428:51]
-    node _T_753 = mux(_T_749, _T_751, _T_752) @[lib.scala 428:23]
-    _T_747[0] <= _T_753 @[lib.scala 428:17]
-    node _T_754 = bits(_T_746, 1, 0) @[lib.scala 428:27]
-    node _T_755 = orr(_T_754) @[lib.scala 428:35]
-    node _T_756 = bits(_T_746, 2, 2) @[lib.scala 428:44]
-    node _T_757 = not(_T_756) @[lib.scala 428:40]
-    node _T_758 = bits(_T_746, 2, 2) @[lib.scala 428:51]
-    node _T_759 = mux(_T_755, _T_757, _T_758) @[lib.scala 428:23]
-    _T_747[1] <= _T_759 @[lib.scala 428:17]
-    node _T_760 = bits(_T_746, 2, 0) @[lib.scala 428:27]
-    node _T_761 = orr(_T_760) @[lib.scala 428:35]
-    node _T_762 = bits(_T_746, 3, 3) @[lib.scala 428:44]
-    node _T_763 = not(_T_762) @[lib.scala 428:40]
-    node _T_764 = bits(_T_746, 3, 3) @[lib.scala 428:51]
-    node _T_765 = mux(_T_761, _T_763, _T_764) @[lib.scala 428:23]
-    _T_747[2] <= _T_765 @[lib.scala 428:17]
-    node _T_766 = bits(_T_746, 3, 0) @[lib.scala 428:27]
-    node _T_767 = orr(_T_766) @[lib.scala 428:35]
-    node _T_768 = bits(_T_746, 4, 4) @[lib.scala 428:44]
-    node _T_769 = not(_T_768) @[lib.scala 428:40]
-    node _T_770 = bits(_T_746, 4, 4) @[lib.scala 428:51]
-    node _T_771 = mux(_T_767, _T_769, _T_770) @[lib.scala 428:23]
-    _T_747[3] <= _T_771 @[lib.scala 428:17]
-    node _T_772 = bits(_T_746, 4, 0) @[lib.scala 428:27]
-    node _T_773 = orr(_T_772) @[lib.scala 428:35]
-    node _T_774 = bits(_T_746, 5, 5) @[lib.scala 428:44]
-    node _T_775 = not(_T_774) @[lib.scala 428:40]
-    node _T_776 = bits(_T_746, 5, 5) @[lib.scala 428:51]
-    node _T_777 = mux(_T_773, _T_775, _T_776) @[lib.scala 428:23]
-    _T_747[4] <= _T_777 @[lib.scala 428:17]
-    node _T_778 = bits(_T_746, 5, 0) @[lib.scala 428:27]
-    node _T_779 = orr(_T_778) @[lib.scala 428:35]
-    node _T_780 = bits(_T_746, 6, 6) @[lib.scala 428:44]
-    node _T_781 = not(_T_780) @[lib.scala 428:40]
-    node _T_782 = bits(_T_746, 6, 6) @[lib.scala 428:51]
-    node _T_783 = mux(_T_779, _T_781, _T_782) @[lib.scala 428:23]
-    _T_747[5] <= _T_783 @[lib.scala 428:17]
-    node _T_784 = bits(_T_746, 6, 0) @[lib.scala 428:27]
-    node _T_785 = orr(_T_784) @[lib.scala 428:35]
-    node _T_786 = bits(_T_746, 7, 7) @[lib.scala 428:44]
-    node _T_787 = not(_T_786) @[lib.scala 428:40]
-    node _T_788 = bits(_T_746, 7, 7) @[lib.scala 428:51]
-    node _T_789 = mux(_T_785, _T_787, _T_788) @[lib.scala 428:23]
-    _T_747[6] <= _T_789 @[lib.scala 428:17]
-    node _T_790 = bits(_T_746, 7, 0) @[lib.scala 428:27]
-    node _T_791 = orr(_T_790) @[lib.scala 428:35]
-    node _T_792 = bits(_T_746, 8, 8) @[lib.scala 428:44]
-    node _T_793 = not(_T_792) @[lib.scala 428:40]
-    node _T_794 = bits(_T_746, 8, 8) @[lib.scala 428:51]
-    node _T_795 = mux(_T_791, _T_793, _T_794) @[lib.scala 428:23]
-    _T_747[7] <= _T_795 @[lib.scala 428:17]
-    node _T_796 = bits(_T_746, 8, 0) @[lib.scala 428:27]
-    node _T_797 = orr(_T_796) @[lib.scala 428:35]
-    node _T_798 = bits(_T_746, 9, 9) @[lib.scala 428:44]
-    node _T_799 = not(_T_798) @[lib.scala 428:40]
-    node _T_800 = bits(_T_746, 9, 9) @[lib.scala 428:51]
-    node _T_801 = mux(_T_797, _T_799, _T_800) @[lib.scala 428:23]
-    _T_747[8] <= _T_801 @[lib.scala 428:17]
-    node _T_802 = bits(_T_746, 9, 0) @[lib.scala 428:27]
-    node _T_803 = orr(_T_802) @[lib.scala 428:35]
-    node _T_804 = bits(_T_746, 10, 10) @[lib.scala 428:44]
-    node _T_805 = not(_T_804) @[lib.scala 428:40]
-    node _T_806 = bits(_T_746, 10, 10) @[lib.scala 428:51]
-    node _T_807 = mux(_T_803, _T_805, _T_806) @[lib.scala 428:23]
-    _T_747[9] <= _T_807 @[lib.scala 428:17]
-    node _T_808 = bits(_T_746, 10, 0) @[lib.scala 428:27]
-    node _T_809 = orr(_T_808) @[lib.scala 428:35]
-    node _T_810 = bits(_T_746, 11, 11) @[lib.scala 428:44]
-    node _T_811 = not(_T_810) @[lib.scala 428:40]
-    node _T_812 = bits(_T_746, 11, 11) @[lib.scala 428:51]
-    node _T_813 = mux(_T_809, _T_811, _T_812) @[lib.scala 428:23]
-    _T_747[10] <= _T_813 @[lib.scala 428:17]
-    node _T_814 = bits(_T_746, 11, 0) @[lib.scala 428:27]
-    node _T_815 = orr(_T_814) @[lib.scala 428:35]
-    node _T_816 = bits(_T_746, 12, 12) @[lib.scala 428:44]
-    node _T_817 = not(_T_816) @[lib.scala 428:40]
-    node _T_818 = bits(_T_746, 12, 12) @[lib.scala 428:51]
-    node _T_819 = mux(_T_815, _T_817, _T_818) @[lib.scala 428:23]
-    _T_747[11] <= _T_819 @[lib.scala 428:17]
-    node _T_820 = bits(_T_746, 12, 0) @[lib.scala 428:27]
-    node _T_821 = orr(_T_820) @[lib.scala 428:35]
-    node _T_822 = bits(_T_746, 13, 13) @[lib.scala 428:44]
-    node _T_823 = not(_T_822) @[lib.scala 428:40]
-    node _T_824 = bits(_T_746, 13, 13) @[lib.scala 428:51]
-    node _T_825 = mux(_T_821, _T_823, _T_824) @[lib.scala 428:23]
-    _T_747[12] <= _T_825 @[lib.scala 428:17]
-    node _T_826 = bits(_T_746, 13, 0) @[lib.scala 428:27]
-    node _T_827 = orr(_T_826) @[lib.scala 428:35]
-    node _T_828 = bits(_T_746, 14, 14) @[lib.scala 428:44]
-    node _T_829 = not(_T_828) @[lib.scala 428:40]
-    node _T_830 = bits(_T_746, 14, 14) @[lib.scala 428:51]
-    node _T_831 = mux(_T_827, _T_829, _T_830) @[lib.scala 428:23]
-    _T_747[13] <= _T_831 @[lib.scala 428:17]
-    node _T_832 = bits(_T_746, 14, 0) @[lib.scala 428:27]
-    node _T_833 = orr(_T_832) @[lib.scala 428:35]
-    node _T_834 = bits(_T_746, 15, 15) @[lib.scala 428:44]
-    node _T_835 = not(_T_834) @[lib.scala 428:40]
-    node _T_836 = bits(_T_746, 15, 15) @[lib.scala 428:51]
-    node _T_837 = mux(_T_833, _T_835, _T_836) @[lib.scala 428:23]
-    _T_747[14] <= _T_837 @[lib.scala 428:17]
-    node _T_838 = bits(_T_746, 15, 0) @[lib.scala 428:27]
-    node _T_839 = orr(_T_838) @[lib.scala 428:35]
-    node _T_840 = bits(_T_746, 16, 16) @[lib.scala 428:44]
-    node _T_841 = not(_T_840) @[lib.scala 428:40]
-    node _T_842 = bits(_T_746, 16, 16) @[lib.scala 428:51]
-    node _T_843 = mux(_T_839, _T_841, _T_842) @[lib.scala 428:23]
-    _T_747[15] <= _T_843 @[lib.scala 428:17]
-    node _T_844 = bits(_T_746, 16, 0) @[lib.scala 428:27]
-    node _T_845 = orr(_T_844) @[lib.scala 428:35]
-    node _T_846 = bits(_T_746, 17, 17) @[lib.scala 428:44]
-    node _T_847 = not(_T_846) @[lib.scala 428:40]
-    node _T_848 = bits(_T_746, 17, 17) @[lib.scala 428:51]
-    node _T_849 = mux(_T_845, _T_847, _T_848) @[lib.scala 428:23]
-    _T_747[16] <= _T_849 @[lib.scala 428:17]
-    node _T_850 = bits(_T_746, 17, 0) @[lib.scala 428:27]
-    node _T_851 = orr(_T_850) @[lib.scala 428:35]
-    node _T_852 = bits(_T_746, 18, 18) @[lib.scala 428:44]
-    node _T_853 = not(_T_852) @[lib.scala 428:40]
-    node _T_854 = bits(_T_746, 18, 18) @[lib.scala 428:51]
-    node _T_855 = mux(_T_851, _T_853, _T_854) @[lib.scala 428:23]
-    _T_747[17] <= _T_855 @[lib.scala 428:17]
-    node _T_856 = bits(_T_746, 18, 0) @[lib.scala 428:27]
-    node _T_857 = orr(_T_856) @[lib.scala 428:35]
-    node _T_858 = bits(_T_746, 19, 19) @[lib.scala 428:44]
-    node _T_859 = not(_T_858) @[lib.scala 428:40]
-    node _T_860 = bits(_T_746, 19, 19) @[lib.scala 428:51]
-    node _T_861 = mux(_T_857, _T_859, _T_860) @[lib.scala 428:23]
-    _T_747[18] <= _T_861 @[lib.scala 428:17]
-    node _T_862 = bits(_T_746, 19, 0) @[lib.scala 428:27]
-    node _T_863 = orr(_T_862) @[lib.scala 428:35]
-    node _T_864 = bits(_T_746, 20, 20) @[lib.scala 428:44]
-    node _T_865 = not(_T_864) @[lib.scala 428:40]
-    node _T_866 = bits(_T_746, 20, 20) @[lib.scala 428:51]
-    node _T_867 = mux(_T_863, _T_865, _T_866) @[lib.scala 428:23]
-    _T_747[19] <= _T_867 @[lib.scala 428:17]
-    node _T_868 = bits(_T_746, 20, 0) @[lib.scala 428:27]
-    node _T_869 = orr(_T_868) @[lib.scala 428:35]
-    node _T_870 = bits(_T_746, 21, 21) @[lib.scala 428:44]
-    node _T_871 = not(_T_870) @[lib.scala 428:40]
-    node _T_872 = bits(_T_746, 21, 21) @[lib.scala 428:51]
-    node _T_873 = mux(_T_869, _T_871, _T_872) @[lib.scala 428:23]
-    _T_747[20] <= _T_873 @[lib.scala 428:17]
-    node _T_874 = bits(_T_746, 21, 0) @[lib.scala 428:27]
-    node _T_875 = orr(_T_874) @[lib.scala 428:35]
-    node _T_876 = bits(_T_746, 22, 22) @[lib.scala 428:44]
-    node _T_877 = not(_T_876) @[lib.scala 428:40]
-    node _T_878 = bits(_T_746, 22, 22) @[lib.scala 428:51]
-    node _T_879 = mux(_T_875, _T_877, _T_878) @[lib.scala 428:23]
-    _T_747[21] <= _T_879 @[lib.scala 428:17]
-    node _T_880 = bits(_T_746, 22, 0) @[lib.scala 428:27]
-    node _T_881 = orr(_T_880) @[lib.scala 428:35]
-    node _T_882 = bits(_T_746, 23, 23) @[lib.scala 428:44]
-    node _T_883 = not(_T_882) @[lib.scala 428:40]
-    node _T_884 = bits(_T_746, 23, 23) @[lib.scala 428:51]
-    node _T_885 = mux(_T_881, _T_883, _T_884) @[lib.scala 428:23]
-    _T_747[22] <= _T_885 @[lib.scala 428:17]
-    node _T_886 = bits(_T_746, 23, 0) @[lib.scala 428:27]
-    node _T_887 = orr(_T_886) @[lib.scala 428:35]
-    node _T_888 = bits(_T_746, 24, 24) @[lib.scala 428:44]
-    node _T_889 = not(_T_888) @[lib.scala 428:40]
-    node _T_890 = bits(_T_746, 24, 24) @[lib.scala 428:51]
-    node _T_891 = mux(_T_887, _T_889, _T_890) @[lib.scala 428:23]
-    _T_747[23] <= _T_891 @[lib.scala 428:17]
-    node _T_892 = bits(_T_746, 24, 0) @[lib.scala 428:27]
-    node _T_893 = orr(_T_892) @[lib.scala 428:35]
-    node _T_894 = bits(_T_746, 25, 25) @[lib.scala 428:44]
-    node _T_895 = not(_T_894) @[lib.scala 428:40]
-    node _T_896 = bits(_T_746, 25, 25) @[lib.scala 428:51]
-    node _T_897 = mux(_T_893, _T_895, _T_896) @[lib.scala 428:23]
-    _T_747[24] <= _T_897 @[lib.scala 428:17]
-    node _T_898 = bits(_T_746, 25, 0) @[lib.scala 428:27]
-    node _T_899 = orr(_T_898) @[lib.scala 428:35]
-    node _T_900 = bits(_T_746, 26, 26) @[lib.scala 428:44]
-    node _T_901 = not(_T_900) @[lib.scala 428:40]
-    node _T_902 = bits(_T_746, 26, 26) @[lib.scala 428:51]
-    node _T_903 = mux(_T_899, _T_901, _T_902) @[lib.scala 428:23]
-    _T_747[25] <= _T_903 @[lib.scala 428:17]
-    node _T_904 = bits(_T_746, 26, 0) @[lib.scala 428:27]
-    node _T_905 = orr(_T_904) @[lib.scala 428:35]
-    node _T_906 = bits(_T_746, 27, 27) @[lib.scala 428:44]
-    node _T_907 = not(_T_906) @[lib.scala 428:40]
-    node _T_908 = bits(_T_746, 27, 27) @[lib.scala 428:51]
-    node _T_909 = mux(_T_905, _T_907, _T_908) @[lib.scala 428:23]
-    _T_747[26] <= _T_909 @[lib.scala 428:17]
-    node _T_910 = bits(_T_746, 27, 0) @[lib.scala 428:27]
-    node _T_911 = orr(_T_910) @[lib.scala 428:35]
-    node _T_912 = bits(_T_746, 28, 28) @[lib.scala 428:44]
-    node _T_913 = not(_T_912) @[lib.scala 428:40]
-    node _T_914 = bits(_T_746, 28, 28) @[lib.scala 428:51]
-    node _T_915 = mux(_T_911, _T_913, _T_914) @[lib.scala 428:23]
-    _T_747[27] <= _T_915 @[lib.scala 428:17]
-    node _T_916 = bits(_T_746, 28, 0) @[lib.scala 428:27]
-    node _T_917 = orr(_T_916) @[lib.scala 428:35]
-    node _T_918 = bits(_T_746, 29, 29) @[lib.scala 428:44]
-    node _T_919 = not(_T_918) @[lib.scala 428:40]
-    node _T_920 = bits(_T_746, 29, 29) @[lib.scala 428:51]
-    node _T_921 = mux(_T_917, _T_919, _T_920) @[lib.scala 428:23]
-    _T_747[28] <= _T_921 @[lib.scala 428:17]
-    node _T_922 = bits(_T_746, 29, 0) @[lib.scala 428:27]
-    node _T_923 = orr(_T_922) @[lib.scala 428:35]
-    node _T_924 = bits(_T_746, 30, 30) @[lib.scala 428:44]
-    node _T_925 = not(_T_924) @[lib.scala 428:40]
-    node _T_926 = bits(_T_746, 30, 30) @[lib.scala 428:51]
-    node _T_927 = mux(_T_923, _T_925, _T_926) @[lib.scala 428:23]
-    _T_747[29] <= _T_927 @[lib.scala 428:17]
-    node _T_928 = bits(_T_746, 30, 0) @[lib.scala 428:27]
-    node _T_929 = orr(_T_928) @[lib.scala 428:35]
-    node _T_930 = bits(_T_746, 31, 31) @[lib.scala 428:44]
-    node _T_931 = not(_T_930) @[lib.scala 428:40]
-    node _T_932 = bits(_T_746, 31, 31) @[lib.scala 428:51]
-    node _T_933 = mux(_T_929, _T_931, _T_932) @[lib.scala 428:23]
-    _T_747[30] <= _T_933 @[lib.scala 428:17]
-    node _T_934 = cat(_T_747[2], _T_747[1]) @[lib.scala 430:14]
-    node _T_935 = cat(_T_934, _T_747[0]) @[lib.scala 430:14]
-    node _T_936 = cat(_T_747[4], _T_747[3]) @[lib.scala 430:14]
-    node _T_937 = cat(_T_747[6], _T_747[5]) @[lib.scala 430:14]
-    node _T_938 = cat(_T_937, _T_936) @[lib.scala 430:14]
-    node _T_939 = cat(_T_938, _T_935) @[lib.scala 430:14]
-    node _T_940 = cat(_T_747[8], _T_747[7]) @[lib.scala 430:14]
-    node _T_941 = cat(_T_747[10], _T_747[9]) @[lib.scala 430:14]
-    node _T_942 = cat(_T_941, _T_940) @[lib.scala 430:14]
-    node _T_943 = cat(_T_747[12], _T_747[11]) @[lib.scala 430:14]
-    node _T_944 = cat(_T_747[14], _T_747[13]) @[lib.scala 430:14]
-    node _T_945 = cat(_T_944, _T_943) @[lib.scala 430:14]
-    node _T_946 = cat(_T_945, _T_942) @[lib.scala 430:14]
-    node _T_947 = cat(_T_946, _T_939) @[lib.scala 430:14]
-    node _T_948 = cat(_T_747[16], _T_747[15]) @[lib.scala 430:14]
-    node _T_949 = cat(_T_747[18], _T_747[17]) @[lib.scala 430:14]
-    node _T_950 = cat(_T_949, _T_948) @[lib.scala 430:14]
-    node _T_951 = cat(_T_747[20], _T_747[19]) @[lib.scala 430:14]
-    node _T_952 = cat(_T_747[22], _T_747[21]) @[lib.scala 430:14]
-    node _T_953 = cat(_T_952, _T_951) @[lib.scala 430:14]
-    node _T_954 = cat(_T_953, _T_950) @[lib.scala 430:14]
-    node _T_955 = cat(_T_747[24], _T_747[23]) @[lib.scala 430:14]
-    node _T_956 = cat(_T_747[26], _T_747[25]) @[lib.scala 430:14]
-    node _T_957 = cat(_T_956, _T_955) @[lib.scala 430:14]
-    node _T_958 = cat(_T_747[28], _T_747[27]) @[lib.scala 430:14]
-    node _T_959 = cat(_T_747[30], _T_747[29]) @[lib.scala 430:14]
-    node _T_960 = cat(_T_959, _T_958) @[lib.scala 430:14]
-    node _T_961 = cat(_T_960, _T_957) @[lib.scala 430:14]
-    node _T_962 = cat(_T_961, _T_954) @[lib.scala 430:14]
-    node _T_963 = cat(_T_962, _T_947) @[lib.scala 430:14]
-    node _T_964 = bits(_T_746, 0, 0) @[lib.scala 430:24]
-    node _T_965 = cat(_T_963, _T_964) @[Cat.scala 29:58]
-    node _T_966 = bits(q_ff, 31, 0) @[exu_div_ctl.scala 243:86]
-    node _T_967 = mux(_T_745, _T_965, _T_966) @[exu_div_ctl.scala 243:22]
-    dividend_eff <= _T_967 @[exu_div_ctl.scala 243:16]
-    node _T_968 = bits(add, 0, 0) @[exu_div_ctl.scala 244:20]
-    node _T_969 = not(m_ff) @[exu_div_ctl.scala 244:35]
-    node _T_970 = mux(_T_968, m_ff, _T_969) @[exu_div_ctl.scala 244:15]
-    m_eff <= _T_970 @[exu_div_ctl.scala 244:9]
-    node _T_971 = cat(UInt<33>("h00"), dividend_eff) @[Cat.scala 29:58]
-    node _T_972 = bits(shortq_shift_ff, 4, 0) @[exu_div_ctl.scala 245:65]
-    node _T_973 = dshl(_T_971, _T_972) @[exu_div_ctl.scala 245:47]
-    a_eff_shift <= _T_973 @[exu_div_ctl.scala 245:15]
-    node _T_974 = bits(rem_correct, 0, 0) @[exu_div_ctl.scala 247:17]
-    node _T_975 = eq(rem_correct, UInt<1>("h00")) @[exu_div_ctl.scala 248:6]
-    node _T_976 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 248:21]
-    node _T_977 = and(_T_975, _T_976) @[exu_div_ctl.scala 248:19]
-    node _T_978 = bits(_T_977, 0, 0) @[exu_div_ctl.scala 248:40]
-    node _T_979 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 248:58]
-    node _T_980 = bits(q_ff, 32, 32) @[exu_div_ctl.scala 248:70]
-    node _T_981 = cat(_T_979, _T_980) @[Cat.scala 29:58]
-    node _T_982 = eq(rem_correct, UInt<1>("h00")) @[exu_div_ctl.scala 249:6]
-    node _T_983 = and(_T_982, shortq_enable_ff) @[exu_div_ctl.scala 249:19]
-    node _T_984 = bits(_T_983, 0, 0) @[exu_div_ctl.scala 249:40]
-    node _T_985 = bits(a_eff_shift, 64, 32) @[exu_div_ctl.scala 249:61]
-    node _T_986 = mux(_T_974, a_ff, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_987 = mux(_T_978, _T_981, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_988 = mux(_T_984, _T_985, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_989 = or(_T_986, _T_987) @[Mux.scala 27:72]
-    node _T_990 = or(_T_989, _T_988) @[Mux.scala 27:72]
-    wire _T_991 : UInt<33> @[Mux.scala 27:72]
-    _T_991 <= _T_990 @[Mux.scala 27:72]
-    a_eff <= _T_991 @[exu_div_ctl.scala 246:9]
-    node _T_992 = eq(shortq_enable, UInt<1>("h00")) @[exu_div_ctl.scala 251:49]
-    node _T_993 = and(run_state, _T_992) @[exu_div_ctl.scala 251:47]
-    node _T_994 = neq(count, UInt<6>("h021")) @[exu_div_ctl.scala 251:73]
-    node _T_995 = and(_T_993, _T_994) @[exu_div_ctl.scala 251:64]
-    node _T_996 = or(io.valid_in, _T_995) @[exu_div_ctl.scala 251:34]
-    node aff_enable = or(_T_996, rem_correct) @[exu_div_ctl.scala 251:89]
-    node _T_997 = bits(run_state, 0, 0) @[Bitwise.scala 72:15]
-    node _T_998 = mux(_T_997, UInt<33>("h01ffffffff"), UInt<33>("h00")) @[Bitwise.scala 72:12]
-    node _T_999 = and(_T_998, a_eff) @[exu_div_ctl.scala 252:33]
-    a_shift <= _T_999 @[exu_div_ctl.scala 252:11]
-    node _T_1000 = bits(run_state, 0, 0) @[Bitwise.scala 72:15]
-    node _T_1001 = mux(_T_1000, UInt<33>("h01ffffffff"), UInt<33>("h00")) @[Bitwise.scala 72:12]
-    node _T_1002 = add(a_shift, m_eff) @[exu_div_ctl.scala 253:41]
-    node _T_1003 = tail(_T_1002, 1) @[exu_div_ctl.scala 253:41]
-    node _T_1004 = eq(add, UInt<1>("h00")) @[exu_div_ctl.scala 253:65]
-    node _T_1005 = cat(UInt<32>("h00"), _T_1004) @[Cat.scala 29:58]
-    node _T_1006 = add(_T_1003, _T_1005) @[exu_div_ctl.scala 253:49]
-    node _T_1007 = tail(_T_1006, 1) @[exu_div_ctl.scala 253:49]
-    node _T_1008 = and(_T_1001, _T_1007) @[exu_div_ctl.scala 253:30]
-    a_in <= _T_1008 @[exu_div_ctl.scala 253:8]
-    node m_already_comp = and(divisor_neg_ff, sign_ff) @[exu_div_ctl.scala 254:48]
-    node _T_1009 = bits(a_ff, 32, 32) @[exu_div_ctl.scala 256:16]
-    node _T_1010 = or(_T_1009, rem_correct) @[exu_div_ctl.scala 256:21]
-    node _T_1011 = xor(_T_1010, m_already_comp) @[exu_div_ctl.scala 256:36]
-    add <= _T_1011 @[exu_div_ctl.scala 256:8]
-    node _T_1012 = eq(count, UInt<6>("h021")) @[exu_div_ctl.scala 257:26]
-    node _T_1013 = and(_T_1012, rem_ff) @[exu_div_ctl.scala 257:41]
-    node _T_1014 = bits(a_ff, 32, 32) @[exu_div_ctl.scala 257:56]
-    node _T_1015 = and(_T_1013, _T_1014) @[exu_div_ctl.scala 257:50]
-    rem_correct <= _T_1015 @[exu_div_ctl.scala 257:16]
-    node _T_1016 = xor(dividend_neg_ff, divisor_neg_ff) @[exu_div_ctl.scala 258:50]
-    node _T_1017 = and(sign_ff, _T_1016) @[exu_div_ctl.scala 258:31]
-    node _T_1018 = bits(_T_1017, 0, 0) @[exu_div_ctl.scala 258:69]
-    node _T_1019 = bits(q_ff, 31, 0) @[exu_div_ctl.scala 258:91]
-    wire _T_1020 : UInt<1>[31] @[lib.scala 426:20]
-    node _T_1021 = bits(_T_1019, 0, 0) @[lib.scala 428:27]
-    node _T_1022 = orr(_T_1021) @[lib.scala 428:35]
-    node _T_1023 = bits(_T_1019, 1, 1) @[lib.scala 428:44]
-    node _T_1024 = not(_T_1023) @[lib.scala 428:40]
-    node _T_1025 = bits(_T_1019, 1, 1) @[lib.scala 428:51]
-    node _T_1026 = mux(_T_1022, _T_1024, _T_1025) @[lib.scala 428:23]
-    _T_1020[0] <= _T_1026 @[lib.scala 428:17]
-    node _T_1027 = bits(_T_1019, 1, 0) @[lib.scala 428:27]
-    node _T_1028 = orr(_T_1027) @[lib.scala 428:35]
-    node _T_1029 = bits(_T_1019, 2, 2) @[lib.scala 428:44]
-    node _T_1030 = not(_T_1029) @[lib.scala 428:40]
-    node _T_1031 = bits(_T_1019, 2, 2) @[lib.scala 428:51]
-    node _T_1032 = mux(_T_1028, _T_1030, _T_1031) @[lib.scala 428:23]
-    _T_1020[1] <= _T_1032 @[lib.scala 428:17]
-    node _T_1033 = bits(_T_1019, 2, 0) @[lib.scala 428:27]
-    node _T_1034 = orr(_T_1033) @[lib.scala 428:35]
-    node _T_1035 = bits(_T_1019, 3, 3) @[lib.scala 428:44]
-    node _T_1036 = not(_T_1035) @[lib.scala 428:40]
-    node _T_1037 = bits(_T_1019, 3, 3) @[lib.scala 428:51]
-    node _T_1038 = mux(_T_1034, _T_1036, _T_1037) @[lib.scala 428:23]
-    _T_1020[2] <= _T_1038 @[lib.scala 428:17]
-    node _T_1039 = bits(_T_1019, 3, 0) @[lib.scala 428:27]
-    node _T_1040 = orr(_T_1039) @[lib.scala 428:35]
-    node _T_1041 = bits(_T_1019, 4, 4) @[lib.scala 428:44]
-    node _T_1042 = not(_T_1041) @[lib.scala 428:40]
-    node _T_1043 = bits(_T_1019, 4, 4) @[lib.scala 428:51]
-    node _T_1044 = mux(_T_1040, _T_1042, _T_1043) @[lib.scala 428:23]
-    _T_1020[3] <= _T_1044 @[lib.scala 428:17]
-    node _T_1045 = bits(_T_1019, 4, 0) @[lib.scala 428:27]
-    node _T_1046 = orr(_T_1045) @[lib.scala 428:35]
-    node _T_1047 = bits(_T_1019, 5, 5) @[lib.scala 428:44]
-    node _T_1048 = not(_T_1047) @[lib.scala 428:40]
-    node _T_1049 = bits(_T_1019, 5, 5) @[lib.scala 428:51]
-    node _T_1050 = mux(_T_1046, _T_1048, _T_1049) @[lib.scala 428:23]
-    _T_1020[4] <= _T_1050 @[lib.scala 428:17]
-    node _T_1051 = bits(_T_1019, 5, 0) @[lib.scala 428:27]
-    node _T_1052 = orr(_T_1051) @[lib.scala 428:35]
-    node _T_1053 = bits(_T_1019, 6, 6) @[lib.scala 428:44]
-    node _T_1054 = not(_T_1053) @[lib.scala 428:40]
-    node _T_1055 = bits(_T_1019, 6, 6) @[lib.scala 428:51]
-    node _T_1056 = mux(_T_1052, _T_1054, _T_1055) @[lib.scala 428:23]
-    _T_1020[5] <= _T_1056 @[lib.scala 428:17]
-    node _T_1057 = bits(_T_1019, 6, 0) @[lib.scala 428:27]
-    node _T_1058 = orr(_T_1057) @[lib.scala 428:35]
-    node _T_1059 = bits(_T_1019, 7, 7) @[lib.scala 428:44]
-    node _T_1060 = not(_T_1059) @[lib.scala 428:40]
-    node _T_1061 = bits(_T_1019, 7, 7) @[lib.scala 428:51]
-    node _T_1062 = mux(_T_1058, _T_1060, _T_1061) @[lib.scala 428:23]
-    _T_1020[6] <= _T_1062 @[lib.scala 428:17]
-    node _T_1063 = bits(_T_1019, 7, 0) @[lib.scala 428:27]
-    node _T_1064 = orr(_T_1063) @[lib.scala 428:35]
-    node _T_1065 = bits(_T_1019, 8, 8) @[lib.scala 428:44]
-    node _T_1066 = not(_T_1065) @[lib.scala 428:40]
-    node _T_1067 = bits(_T_1019, 8, 8) @[lib.scala 428:51]
-    node _T_1068 = mux(_T_1064, _T_1066, _T_1067) @[lib.scala 428:23]
-    _T_1020[7] <= _T_1068 @[lib.scala 428:17]
-    node _T_1069 = bits(_T_1019, 8, 0) @[lib.scala 428:27]
-    node _T_1070 = orr(_T_1069) @[lib.scala 428:35]
-    node _T_1071 = bits(_T_1019, 9, 9) @[lib.scala 428:44]
-    node _T_1072 = not(_T_1071) @[lib.scala 428:40]
-    node _T_1073 = bits(_T_1019, 9, 9) @[lib.scala 428:51]
-    node _T_1074 = mux(_T_1070, _T_1072, _T_1073) @[lib.scala 428:23]
-    _T_1020[8] <= _T_1074 @[lib.scala 428:17]
-    node _T_1075 = bits(_T_1019, 9, 0) @[lib.scala 428:27]
-    node _T_1076 = orr(_T_1075) @[lib.scala 428:35]
-    node _T_1077 = bits(_T_1019, 10, 10) @[lib.scala 428:44]
-    node _T_1078 = not(_T_1077) @[lib.scala 428:40]
-    node _T_1079 = bits(_T_1019, 10, 10) @[lib.scala 428:51]
-    node _T_1080 = mux(_T_1076, _T_1078, _T_1079) @[lib.scala 428:23]
-    _T_1020[9] <= _T_1080 @[lib.scala 428:17]
-    node _T_1081 = bits(_T_1019, 10, 0) @[lib.scala 428:27]
-    node _T_1082 = orr(_T_1081) @[lib.scala 428:35]
-    node _T_1083 = bits(_T_1019, 11, 11) @[lib.scala 428:44]
-    node _T_1084 = not(_T_1083) @[lib.scala 428:40]
-    node _T_1085 = bits(_T_1019, 11, 11) @[lib.scala 428:51]
-    node _T_1086 = mux(_T_1082, _T_1084, _T_1085) @[lib.scala 428:23]
-    _T_1020[10] <= _T_1086 @[lib.scala 428:17]
-    node _T_1087 = bits(_T_1019, 11, 0) @[lib.scala 428:27]
-    node _T_1088 = orr(_T_1087) @[lib.scala 428:35]
-    node _T_1089 = bits(_T_1019, 12, 12) @[lib.scala 428:44]
-    node _T_1090 = not(_T_1089) @[lib.scala 428:40]
-    node _T_1091 = bits(_T_1019, 12, 12) @[lib.scala 428:51]
-    node _T_1092 = mux(_T_1088, _T_1090, _T_1091) @[lib.scala 428:23]
-    _T_1020[11] <= _T_1092 @[lib.scala 428:17]
-    node _T_1093 = bits(_T_1019, 12, 0) @[lib.scala 428:27]
-    node _T_1094 = orr(_T_1093) @[lib.scala 428:35]
-    node _T_1095 = bits(_T_1019, 13, 13) @[lib.scala 428:44]
-    node _T_1096 = not(_T_1095) @[lib.scala 428:40]
-    node _T_1097 = bits(_T_1019, 13, 13) @[lib.scala 428:51]
-    node _T_1098 = mux(_T_1094, _T_1096, _T_1097) @[lib.scala 428:23]
-    _T_1020[12] <= _T_1098 @[lib.scala 428:17]
-    node _T_1099 = bits(_T_1019, 13, 0) @[lib.scala 428:27]
-    node _T_1100 = orr(_T_1099) @[lib.scala 428:35]
-    node _T_1101 = bits(_T_1019, 14, 14) @[lib.scala 428:44]
-    node _T_1102 = not(_T_1101) @[lib.scala 428:40]
-    node _T_1103 = bits(_T_1019, 14, 14) @[lib.scala 428:51]
-    node _T_1104 = mux(_T_1100, _T_1102, _T_1103) @[lib.scala 428:23]
-    _T_1020[13] <= _T_1104 @[lib.scala 428:17]
-    node _T_1105 = bits(_T_1019, 14, 0) @[lib.scala 428:27]
-    node _T_1106 = orr(_T_1105) @[lib.scala 428:35]
-    node _T_1107 = bits(_T_1019, 15, 15) @[lib.scala 428:44]
-    node _T_1108 = not(_T_1107) @[lib.scala 428:40]
-    node _T_1109 = bits(_T_1019, 15, 15) @[lib.scala 428:51]
-    node _T_1110 = mux(_T_1106, _T_1108, _T_1109) @[lib.scala 428:23]
-    _T_1020[14] <= _T_1110 @[lib.scala 428:17]
-    node _T_1111 = bits(_T_1019, 15, 0) @[lib.scala 428:27]
-    node _T_1112 = orr(_T_1111) @[lib.scala 428:35]
-    node _T_1113 = bits(_T_1019, 16, 16) @[lib.scala 428:44]
-    node _T_1114 = not(_T_1113) @[lib.scala 428:40]
-    node _T_1115 = bits(_T_1019, 16, 16) @[lib.scala 428:51]
-    node _T_1116 = mux(_T_1112, _T_1114, _T_1115) @[lib.scala 428:23]
-    _T_1020[15] <= _T_1116 @[lib.scala 428:17]
-    node _T_1117 = bits(_T_1019, 16, 0) @[lib.scala 428:27]
-    node _T_1118 = orr(_T_1117) @[lib.scala 428:35]
-    node _T_1119 = bits(_T_1019, 17, 17) @[lib.scala 428:44]
-    node _T_1120 = not(_T_1119) @[lib.scala 428:40]
-    node _T_1121 = bits(_T_1019, 17, 17) @[lib.scala 428:51]
-    node _T_1122 = mux(_T_1118, _T_1120, _T_1121) @[lib.scala 428:23]
-    _T_1020[16] <= _T_1122 @[lib.scala 428:17]
-    node _T_1123 = bits(_T_1019, 17, 0) @[lib.scala 428:27]
-    node _T_1124 = orr(_T_1123) @[lib.scala 428:35]
-    node _T_1125 = bits(_T_1019, 18, 18) @[lib.scala 428:44]
-    node _T_1126 = not(_T_1125) @[lib.scala 428:40]
-    node _T_1127 = bits(_T_1019, 18, 18) @[lib.scala 428:51]
-    node _T_1128 = mux(_T_1124, _T_1126, _T_1127) @[lib.scala 428:23]
-    _T_1020[17] <= _T_1128 @[lib.scala 428:17]
-    node _T_1129 = bits(_T_1019, 18, 0) @[lib.scala 428:27]
-    node _T_1130 = orr(_T_1129) @[lib.scala 428:35]
-    node _T_1131 = bits(_T_1019, 19, 19) @[lib.scala 428:44]
-    node _T_1132 = not(_T_1131) @[lib.scala 428:40]
-    node _T_1133 = bits(_T_1019, 19, 19) @[lib.scala 428:51]
-    node _T_1134 = mux(_T_1130, _T_1132, _T_1133) @[lib.scala 428:23]
-    _T_1020[18] <= _T_1134 @[lib.scala 428:17]
-    node _T_1135 = bits(_T_1019, 19, 0) @[lib.scala 428:27]
-    node _T_1136 = orr(_T_1135) @[lib.scala 428:35]
-    node _T_1137 = bits(_T_1019, 20, 20) @[lib.scala 428:44]
-    node _T_1138 = not(_T_1137) @[lib.scala 428:40]
-    node _T_1139 = bits(_T_1019, 20, 20) @[lib.scala 428:51]
-    node _T_1140 = mux(_T_1136, _T_1138, _T_1139) @[lib.scala 428:23]
-    _T_1020[19] <= _T_1140 @[lib.scala 428:17]
-    node _T_1141 = bits(_T_1019, 20, 0) @[lib.scala 428:27]
-    node _T_1142 = orr(_T_1141) @[lib.scala 428:35]
-    node _T_1143 = bits(_T_1019, 21, 21) @[lib.scala 428:44]
-    node _T_1144 = not(_T_1143) @[lib.scala 428:40]
-    node _T_1145 = bits(_T_1019, 21, 21) @[lib.scala 428:51]
-    node _T_1146 = mux(_T_1142, _T_1144, _T_1145) @[lib.scala 428:23]
-    _T_1020[20] <= _T_1146 @[lib.scala 428:17]
-    node _T_1147 = bits(_T_1019, 21, 0) @[lib.scala 428:27]
-    node _T_1148 = orr(_T_1147) @[lib.scala 428:35]
-    node _T_1149 = bits(_T_1019, 22, 22) @[lib.scala 428:44]
-    node _T_1150 = not(_T_1149) @[lib.scala 428:40]
-    node _T_1151 = bits(_T_1019, 22, 22) @[lib.scala 428:51]
-    node _T_1152 = mux(_T_1148, _T_1150, _T_1151) @[lib.scala 428:23]
-    _T_1020[21] <= _T_1152 @[lib.scala 428:17]
-    node _T_1153 = bits(_T_1019, 22, 0) @[lib.scala 428:27]
-    node _T_1154 = orr(_T_1153) @[lib.scala 428:35]
-    node _T_1155 = bits(_T_1019, 23, 23) @[lib.scala 428:44]
-    node _T_1156 = not(_T_1155) @[lib.scala 428:40]
-    node _T_1157 = bits(_T_1019, 23, 23) @[lib.scala 428:51]
-    node _T_1158 = mux(_T_1154, _T_1156, _T_1157) @[lib.scala 428:23]
-    _T_1020[22] <= _T_1158 @[lib.scala 428:17]
-    node _T_1159 = bits(_T_1019, 23, 0) @[lib.scala 428:27]
-    node _T_1160 = orr(_T_1159) @[lib.scala 428:35]
-    node _T_1161 = bits(_T_1019, 24, 24) @[lib.scala 428:44]
-    node _T_1162 = not(_T_1161) @[lib.scala 428:40]
-    node _T_1163 = bits(_T_1019, 24, 24) @[lib.scala 428:51]
-    node _T_1164 = mux(_T_1160, _T_1162, _T_1163) @[lib.scala 428:23]
-    _T_1020[23] <= _T_1164 @[lib.scala 428:17]
-    node _T_1165 = bits(_T_1019, 24, 0) @[lib.scala 428:27]
-    node _T_1166 = orr(_T_1165) @[lib.scala 428:35]
-    node _T_1167 = bits(_T_1019, 25, 25) @[lib.scala 428:44]
-    node _T_1168 = not(_T_1167) @[lib.scala 428:40]
-    node _T_1169 = bits(_T_1019, 25, 25) @[lib.scala 428:51]
-    node _T_1170 = mux(_T_1166, _T_1168, _T_1169) @[lib.scala 428:23]
-    _T_1020[24] <= _T_1170 @[lib.scala 428:17]
-    node _T_1171 = bits(_T_1019, 25, 0) @[lib.scala 428:27]
-    node _T_1172 = orr(_T_1171) @[lib.scala 428:35]
-    node _T_1173 = bits(_T_1019, 26, 26) @[lib.scala 428:44]
-    node _T_1174 = not(_T_1173) @[lib.scala 428:40]
-    node _T_1175 = bits(_T_1019, 26, 26) @[lib.scala 428:51]
-    node _T_1176 = mux(_T_1172, _T_1174, _T_1175) @[lib.scala 428:23]
-    _T_1020[25] <= _T_1176 @[lib.scala 428:17]
-    node _T_1177 = bits(_T_1019, 26, 0) @[lib.scala 428:27]
-    node _T_1178 = orr(_T_1177) @[lib.scala 428:35]
-    node _T_1179 = bits(_T_1019, 27, 27) @[lib.scala 428:44]
-    node _T_1180 = not(_T_1179) @[lib.scala 428:40]
-    node _T_1181 = bits(_T_1019, 27, 27) @[lib.scala 428:51]
-    node _T_1182 = mux(_T_1178, _T_1180, _T_1181) @[lib.scala 428:23]
-    _T_1020[26] <= _T_1182 @[lib.scala 428:17]
-    node _T_1183 = bits(_T_1019, 27, 0) @[lib.scala 428:27]
-    node _T_1184 = orr(_T_1183) @[lib.scala 428:35]
-    node _T_1185 = bits(_T_1019, 28, 28) @[lib.scala 428:44]
-    node _T_1186 = not(_T_1185) @[lib.scala 428:40]
-    node _T_1187 = bits(_T_1019, 28, 28) @[lib.scala 428:51]
-    node _T_1188 = mux(_T_1184, _T_1186, _T_1187) @[lib.scala 428:23]
-    _T_1020[27] <= _T_1188 @[lib.scala 428:17]
-    node _T_1189 = bits(_T_1019, 28, 0) @[lib.scala 428:27]
-    node _T_1190 = orr(_T_1189) @[lib.scala 428:35]
-    node _T_1191 = bits(_T_1019, 29, 29) @[lib.scala 428:44]
-    node _T_1192 = not(_T_1191) @[lib.scala 428:40]
-    node _T_1193 = bits(_T_1019, 29, 29) @[lib.scala 428:51]
-    node _T_1194 = mux(_T_1190, _T_1192, _T_1193) @[lib.scala 428:23]
-    _T_1020[28] <= _T_1194 @[lib.scala 428:17]
-    node _T_1195 = bits(_T_1019, 29, 0) @[lib.scala 428:27]
-    node _T_1196 = orr(_T_1195) @[lib.scala 428:35]
-    node _T_1197 = bits(_T_1019, 30, 30) @[lib.scala 428:44]
-    node _T_1198 = not(_T_1197) @[lib.scala 428:40]
-    node _T_1199 = bits(_T_1019, 30, 30) @[lib.scala 428:51]
-    node _T_1200 = mux(_T_1196, _T_1198, _T_1199) @[lib.scala 428:23]
-    _T_1020[29] <= _T_1200 @[lib.scala 428:17]
-    node _T_1201 = bits(_T_1019, 30, 0) @[lib.scala 428:27]
-    node _T_1202 = orr(_T_1201) @[lib.scala 428:35]
-    node _T_1203 = bits(_T_1019, 31, 31) @[lib.scala 428:44]
-    node _T_1204 = not(_T_1203) @[lib.scala 428:40]
-    node _T_1205 = bits(_T_1019, 31, 31) @[lib.scala 428:51]
-    node _T_1206 = mux(_T_1202, _T_1204, _T_1205) @[lib.scala 428:23]
-    _T_1020[30] <= _T_1206 @[lib.scala 428:17]
-    node _T_1207 = cat(_T_1020[2], _T_1020[1]) @[lib.scala 430:14]
-    node _T_1208 = cat(_T_1207, _T_1020[0]) @[lib.scala 430:14]
-    node _T_1209 = cat(_T_1020[4], _T_1020[3]) @[lib.scala 430:14]
-    node _T_1210 = cat(_T_1020[6], _T_1020[5]) @[lib.scala 430:14]
-    node _T_1211 = cat(_T_1210, _T_1209) @[lib.scala 430:14]
-    node _T_1212 = cat(_T_1211, _T_1208) @[lib.scala 430:14]
-    node _T_1213 = cat(_T_1020[8], _T_1020[7]) @[lib.scala 430:14]
-    node _T_1214 = cat(_T_1020[10], _T_1020[9]) @[lib.scala 430:14]
-    node _T_1215 = cat(_T_1214, _T_1213) @[lib.scala 430:14]
-    node _T_1216 = cat(_T_1020[12], _T_1020[11]) @[lib.scala 430:14]
-    node _T_1217 = cat(_T_1020[14], _T_1020[13]) @[lib.scala 430:14]
-    node _T_1218 = cat(_T_1217, _T_1216) @[lib.scala 430:14]
-    node _T_1219 = cat(_T_1218, _T_1215) @[lib.scala 430:14]
-    node _T_1220 = cat(_T_1219, _T_1212) @[lib.scala 430:14]
-    node _T_1221 = cat(_T_1020[16], _T_1020[15]) @[lib.scala 430:14]
-    node _T_1222 = cat(_T_1020[18], _T_1020[17]) @[lib.scala 430:14]
-    node _T_1223 = cat(_T_1222, _T_1221) @[lib.scala 430:14]
-    node _T_1224 = cat(_T_1020[20], _T_1020[19]) @[lib.scala 430:14]
-    node _T_1225 = cat(_T_1020[22], _T_1020[21]) @[lib.scala 430:14]
-    node _T_1226 = cat(_T_1225, _T_1224) @[lib.scala 430:14]
-    node _T_1227 = cat(_T_1226, _T_1223) @[lib.scala 430:14]
-    node _T_1228 = cat(_T_1020[24], _T_1020[23]) @[lib.scala 430:14]
-    node _T_1229 = cat(_T_1020[26], _T_1020[25]) @[lib.scala 430:14]
-    node _T_1230 = cat(_T_1229, _T_1228) @[lib.scala 430:14]
-    node _T_1231 = cat(_T_1020[28], _T_1020[27]) @[lib.scala 430:14]
-    node _T_1232 = cat(_T_1020[30], _T_1020[29]) @[lib.scala 430:14]
-    node _T_1233 = cat(_T_1232, _T_1231) @[lib.scala 430:14]
-    node _T_1234 = cat(_T_1233, _T_1230) @[lib.scala 430:14]
-    node _T_1235 = cat(_T_1234, _T_1227) @[lib.scala 430:14]
-    node _T_1236 = cat(_T_1235, _T_1220) @[lib.scala 430:14]
-    node _T_1237 = bits(_T_1019, 0, 0) @[lib.scala 430:24]
-    node _T_1238 = cat(_T_1236, _T_1237) @[Cat.scala 29:58]
-    node _T_1239 = bits(q_ff, 31, 0) @[exu_div_ctl.scala 258:104]
-    node q_ff_eff = mux(_T_1018, _T_1238, _T_1239) @[exu_div_ctl.scala 258:21]
-    node _T_1240 = and(sign_ff, dividend_neg_ff) @[exu_div_ctl.scala 259:31]
-    node _T_1241 = bits(_T_1240, 0, 0) @[exu_div_ctl.scala 259:51]
-    node _T_1242 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 259:74]
-    wire _T_1243 : UInt<1>[31] @[lib.scala 426:20]
-    node _T_1244 = bits(_T_1242, 0, 0) @[lib.scala 428:27]
-    node _T_1245 = orr(_T_1244) @[lib.scala 428:35]
-    node _T_1246 = bits(_T_1242, 1, 1) @[lib.scala 428:44]
-    node _T_1247 = not(_T_1246) @[lib.scala 428:40]
-    node _T_1248 = bits(_T_1242, 1, 1) @[lib.scala 428:51]
-    node _T_1249 = mux(_T_1245, _T_1247, _T_1248) @[lib.scala 428:23]
-    _T_1243[0] <= _T_1249 @[lib.scala 428:17]
-    node _T_1250 = bits(_T_1242, 1, 0) @[lib.scala 428:27]
-    node _T_1251 = orr(_T_1250) @[lib.scala 428:35]
-    node _T_1252 = bits(_T_1242, 2, 2) @[lib.scala 428:44]
-    node _T_1253 = not(_T_1252) @[lib.scala 428:40]
-    node _T_1254 = bits(_T_1242, 2, 2) @[lib.scala 428:51]
-    node _T_1255 = mux(_T_1251, _T_1253, _T_1254) @[lib.scala 428:23]
-    _T_1243[1] <= _T_1255 @[lib.scala 428:17]
-    node _T_1256 = bits(_T_1242, 2, 0) @[lib.scala 428:27]
-    node _T_1257 = orr(_T_1256) @[lib.scala 428:35]
-    node _T_1258 = bits(_T_1242, 3, 3) @[lib.scala 428:44]
-    node _T_1259 = not(_T_1258) @[lib.scala 428:40]
-    node _T_1260 = bits(_T_1242, 3, 3) @[lib.scala 428:51]
-    node _T_1261 = mux(_T_1257, _T_1259, _T_1260) @[lib.scala 428:23]
-    _T_1243[2] <= _T_1261 @[lib.scala 428:17]
-    node _T_1262 = bits(_T_1242, 3, 0) @[lib.scala 428:27]
-    node _T_1263 = orr(_T_1262) @[lib.scala 428:35]
-    node _T_1264 = bits(_T_1242, 4, 4) @[lib.scala 428:44]
-    node _T_1265 = not(_T_1264) @[lib.scala 428:40]
-    node _T_1266 = bits(_T_1242, 4, 4) @[lib.scala 428:51]
-    node _T_1267 = mux(_T_1263, _T_1265, _T_1266) @[lib.scala 428:23]
-    _T_1243[3] <= _T_1267 @[lib.scala 428:17]
-    node _T_1268 = bits(_T_1242, 4, 0) @[lib.scala 428:27]
-    node _T_1269 = orr(_T_1268) @[lib.scala 428:35]
-    node _T_1270 = bits(_T_1242, 5, 5) @[lib.scala 428:44]
-    node _T_1271 = not(_T_1270) @[lib.scala 428:40]
-    node _T_1272 = bits(_T_1242, 5, 5) @[lib.scala 428:51]
-    node _T_1273 = mux(_T_1269, _T_1271, _T_1272) @[lib.scala 428:23]
-    _T_1243[4] <= _T_1273 @[lib.scala 428:17]
-    node _T_1274 = bits(_T_1242, 5, 0) @[lib.scala 428:27]
-    node _T_1275 = orr(_T_1274) @[lib.scala 428:35]
-    node _T_1276 = bits(_T_1242, 6, 6) @[lib.scala 428:44]
-    node _T_1277 = not(_T_1276) @[lib.scala 428:40]
-    node _T_1278 = bits(_T_1242, 6, 6) @[lib.scala 428:51]
-    node _T_1279 = mux(_T_1275, _T_1277, _T_1278) @[lib.scala 428:23]
-    _T_1243[5] <= _T_1279 @[lib.scala 428:17]
-    node _T_1280 = bits(_T_1242, 6, 0) @[lib.scala 428:27]
-    node _T_1281 = orr(_T_1280) @[lib.scala 428:35]
-    node _T_1282 = bits(_T_1242, 7, 7) @[lib.scala 428:44]
-    node _T_1283 = not(_T_1282) @[lib.scala 428:40]
-    node _T_1284 = bits(_T_1242, 7, 7) @[lib.scala 428:51]
-    node _T_1285 = mux(_T_1281, _T_1283, _T_1284) @[lib.scala 428:23]
-    _T_1243[6] <= _T_1285 @[lib.scala 428:17]
-    node _T_1286 = bits(_T_1242, 7, 0) @[lib.scala 428:27]
-    node _T_1287 = orr(_T_1286) @[lib.scala 428:35]
-    node _T_1288 = bits(_T_1242, 8, 8) @[lib.scala 428:44]
-    node _T_1289 = not(_T_1288) @[lib.scala 428:40]
-    node _T_1290 = bits(_T_1242, 8, 8) @[lib.scala 428:51]
-    node _T_1291 = mux(_T_1287, _T_1289, _T_1290) @[lib.scala 428:23]
-    _T_1243[7] <= _T_1291 @[lib.scala 428:17]
-    node _T_1292 = bits(_T_1242, 8, 0) @[lib.scala 428:27]
-    node _T_1293 = orr(_T_1292) @[lib.scala 428:35]
-    node _T_1294 = bits(_T_1242, 9, 9) @[lib.scala 428:44]
-    node _T_1295 = not(_T_1294) @[lib.scala 428:40]
-    node _T_1296 = bits(_T_1242, 9, 9) @[lib.scala 428:51]
-    node _T_1297 = mux(_T_1293, _T_1295, _T_1296) @[lib.scala 428:23]
-    _T_1243[8] <= _T_1297 @[lib.scala 428:17]
-    node _T_1298 = bits(_T_1242, 9, 0) @[lib.scala 428:27]
-    node _T_1299 = orr(_T_1298) @[lib.scala 428:35]
-    node _T_1300 = bits(_T_1242, 10, 10) @[lib.scala 428:44]
-    node _T_1301 = not(_T_1300) @[lib.scala 428:40]
-    node _T_1302 = bits(_T_1242, 10, 10) @[lib.scala 428:51]
-    node _T_1303 = mux(_T_1299, _T_1301, _T_1302) @[lib.scala 428:23]
-    _T_1243[9] <= _T_1303 @[lib.scala 428:17]
-    node _T_1304 = bits(_T_1242, 10, 0) @[lib.scala 428:27]
-    node _T_1305 = orr(_T_1304) @[lib.scala 428:35]
-    node _T_1306 = bits(_T_1242, 11, 11) @[lib.scala 428:44]
-    node _T_1307 = not(_T_1306) @[lib.scala 428:40]
-    node _T_1308 = bits(_T_1242, 11, 11) @[lib.scala 428:51]
-    node _T_1309 = mux(_T_1305, _T_1307, _T_1308) @[lib.scala 428:23]
-    _T_1243[10] <= _T_1309 @[lib.scala 428:17]
-    node _T_1310 = bits(_T_1242, 11, 0) @[lib.scala 428:27]
-    node _T_1311 = orr(_T_1310) @[lib.scala 428:35]
-    node _T_1312 = bits(_T_1242, 12, 12) @[lib.scala 428:44]
-    node _T_1313 = not(_T_1312) @[lib.scala 428:40]
-    node _T_1314 = bits(_T_1242, 12, 12) @[lib.scala 428:51]
-    node _T_1315 = mux(_T_1311, _T_1313, _T_1314) @[lib.scala 428:23]
-    _T_1243[11] <= _T_1315 @[lib.scala 428:17]
-    node _T_1316 = bits(_T_1242, 12, 0) @[lib.scala 428:27]
-    node _T_1317 = orr(_T_1316) @[lib.scala 428:35]
-    node _T_1318 = bits(_T_1242, 13, 13) @[lib.scala 428:44]
-    node _T_1319 = not(_T_1318) @[lib.scala 428:40]
-    node _T_1320 = bits(_T_1242, 13, 13) @[lib.scala 428:51]
-    node _T_1321 = mux(_T_1317, _T_1319, _T_1320) @[lib.scala 428:23]
-    _T_1243[12] <= _T_1321 @[lib.scala 428:17]
-    node _T_1322 = bits(_T_1242, 13, 0) @[lib.scala 428:27]
-    node _T_1323 = orr(_T_1322) @[lib.scala 428:35]
-    node _T_1324 = bits(_T_1242, 14, 14) @[lib.scala 428:44]
-    node _T_1325 = not(_T_1324) @[lib.scala 428:40]
-    node _T_1326 = bits(_T_1242, 14, 14) @[lib.scala 428:51]
-    node _T_1327 = mux(_T_1323, _T_1325, _T_1326) @[lib.scala 428:23]
-    _T_1243[13] <= _T_1327 @[lib.scala 428:17]
-    node _T_1328 = bits(_T_1242, 14, 0) @[lib.scala 428:27]
-    node _T_1329 = orr(_T_1328) @[lib.scala 428:35]
-    node _T_1330 = bits(_T_1242, 15, 15) @[lib.scala 428:44]
-    node _T_1331 = not(_T_1330) @[lib.scala 428:40]
-    node _T_1332 = bits(_T_1242, 15, 15) @[lib.scala 428:51]
-    node _T_1333 = mux(_T_1329, _T_1331, _T_1332) @[lib.scala 428:23]
-    _T_1243[14] <= _T_1333 @[lib.scala 428:17]
-    node _T_1334 = bits(_T_1242, 15, 0) @[lib.scala 428:27]
-    node _T_1335 = orr(_T_1334) @[lib.scala 428:35]
-    node _T_1336 = bits(_T_1242, 16, 16) @[lib.scala 428:44]
-    node _T_1337 = not(_T_1336) @[lib.scala 428:40]
-    node _T_1338 = bits(_T_1242, 16, 16) @[lib.scala 428:51]
-    node _T_1339 = mux(_T_1335, _T_1337, _T_1338) @[lib.scala 428:23]
-    _T_1243[15] <= _T_1339 @[lib.scala 428:17]
-    node _T_1340 = bits(_T_1242, 16, 0) @[lib.scala 428:27]
-    node _T_1341 = orr(_T_1340) @[lib.scala 428:35]
-    node _T_1342 = bits(_T_1242, 17, 17) @[lib.scala 428:44]
-    node _T_1343 = not(_T_1342) @[lib.scala 428:40]
-    node _T_1344 = bits(_T_1242, 17, 17) @[lib.scala 428:51]
-    node _T_1345 = mux(_T_1341, _T_1343, _T_1344) @[lib.scala 428:23]
-    _T_1243[16] <= _T_1345 @[lib.scala 428:17]
-    node _T_1346 = bits(_T_1242, 17, 0) @[lib.scala 428:27]
-    node _T_1347 = orr(_T_1346) @[lib.scala 428:35]
-    node _T_1348 = bits(_T_1242, 18, 18) @[lib.scala 428:44]
-    node _T_1349 = not(_T_1348) @[lib.scala 428:40]
-    node _T_1350 = bits(_T_1242, 18, 18) @[lib.scala 428:51]
-    node _T_1351 = mux(_T_1347, _T_1349, _T_1350) @[lib.scala 428:23]
-    _T_1243[17] <= _T_1351 @[lib.scala 428:17]
-    node _T_1352 = bits(_T_1242, 18, 0) @[lib.scala 428:27]
-    node _T_1353 = orr(_T_1352) @[lib.scala 428:35]
-    node _T_1354 = bits(_T_1242, 19, 19) @[lib.scala 428:44]
-    node _T_1355 = not(_T_1354) @[lib.scala 428:40]
-    node _T_1356 = bits(_T_1242, 19, 19) @[lib.scala 428:51]
-    node _T_1357 = mux(_T_1353, _T_1355, _T_1356) @[lib.scala 428:23]
-    _T_1243[18] <= _T_1357 @[lib.scala 428:17]
-    node _T_1358 = bits(_T_1242, 19, 0) @[lib.scala 428:27]
-    node _T_1359 = orr(_T_1358) @[lib.scala 428:35]
-    node _T_1360 = bits(_T_1242, 20, 20) @[lib.scala 428:44]
-    node _T_1361 = not(_T_1360) @[lib.scala 428:40]
-    node _T_1362 = bits(_T_1242, 20, 20) @[lib.scala 428:51]
-    node _T_1363 = mux(_T_1359, _T_1361, _T_1362) @[lib.scala 428:23]
-    _T_1243[19] <= _T_1363 @[lib.scala 428:17]
-    node _T_1364 = bits(_T_1242, 20, 0) @[lib.scala 428:27]
-    node _T_1365 = orr(_T_1364) @[lib.scala 428:35]
-    node _T_1366 = bits(_T_1242, 21, 21) @[lib.scala 428:44]
-    node _T_1367 = not(_T_1366) @[lib.scala 428:40]
-    node _T_1368 = bits(_T_1242, 21, 21) @[lib.scala 428:51]
-    node _T_1369 = mux(_T_1365, _T_1367, _T_1368) @[lib.scala 428:23]
-    _T_1243[20] <= _T_1369 @[lib.scala 428:17]
-    node _T_1370 = bits(_T_1242, 21, 0) @[lib.scala 428:27]
-    node _T_1371 = orr(_T_1370) @[lib.scala 428:35]
-    node _T_1372 = bits(_T_1242, 22, 22) @[lib.scala 428:44]
-    node _T_1373 = not(_T_1372) @[lib.scala 428:40]
-    node _T_1374 = bits(_T_1242, 22, 22) @[lib.scala 428:51]
-    node _T_1375 = mux(_T_1371, _T_1373, _T_1374) @[lib.scala 428:23]
-    _T_1243[21] <= _T_1375 @[lib.scala 428:17]
-    node _T_1376 = bits(_T_1242, 22, 0) @[lib.scala 428:27]
-    node _T_1377 = orr(_T_1376) @[lib.scala 428:35]
-    node _T_1378 = bits(_T_1242, 23, 23) @[lib.scala 428:44]
-    node _T_1379 = not(_T_1378) @[lib.scala 428:40]
-    node _T_1380 = bits(_T_1242, 23, 23) @[lib.scala 428:51]
-    node _T_1381 = mux(_T_1377, _T_1379, _T_1380) @[lib.scala 428:23]
-    _T_1243[22] <= _T_1381 @[lib.scala 428:17]
-    node _T_1382 = bits(_T_1242, 23, 0) @[lib.scala 428:27]
-    node _T_1383 = orr(_T_1382) @[lib.scala 428:35]
-    node _T_1384 = bits(_T_1242, 24, 24) @[lib.scala 428:44]
-    node _T_1385 = not(_T_1384) @[lib.scala 428:40]
-    node _T_1386 = bits(_T_1242, 24, 24) @[lib.scala 428:51]
-    node _T_1387 = mux(_T_1383, _T_1385, _T_1386) @[lib.scala 428:23]
-    _T_1243[23] <= _T_1387 @[lib.scala 428:17]
-    node _T_1388 = bits(_T_1242, 24, 0) @[lib.scala 428:27]
-    node _T_1389 = orr(_T_1388) @[lib.scala 428:35]
-    node _T_1390 = bits(_T_1242, 25, 25) @[lib.scala 428:44]
-    node _T_1391 = not(_T_1390) @[lib.scala 428:40]
-    node _T_1392 = bits(_T_1242, 25, 25) @[lib.scala 428:51]
-    node _T_1393 = mux(_T_1389, _T_1391, _T_1392) @[lib.scala 428:23]
-    _T_1243[24] <= _T_1393 @[lib.scala 428:17]
-    node _T_1394 = bits(_T_1242, 25, 0) @[lib.scala 428:27]
-    node _T_1395 = orr(_T_1394) @[lib.scala 428:35]
-    node _T_1396 = bits(_T_1242, 26, 26) @[lib.scala 428:44]
-    node _T_1397 = not(_T_1396) @[lib.scala 428:40]
-    node _T_1398 = bits(_T_1242, 26, 26) @[lib.scala 428:51]
-    node _T_1399 = mux(_T_1395, _T_1397, _T_1398) @[lib.scala 428:23]
-    _T_1243[25] <= _T_1399 @[lib.scala 428:17]
-    node _T_1400 = bits(_T_1242, 26, 0) @[lib.scala 428:27]
-    node _T_1401 = orr(_T_1400) @[lib.scala 428:35]
-    node _T_1402 = bits(_T_1242, 27, 27) @[lib.scala 428:44]
-    node _T_1403 = not(_T_1402) @[lib.scala 428:40]
-    node _T_1404 = bits(_T_1242, 27, 27) @[lib.scala 428:51]
-    node _T_1405 = mux(_T_1401, _T_1403, _T_1404) @[lib.scala 428:23]
-    _T_1243[26] <= _T_1405 @[lib.scala 428:17]
-    node _T_1406 = bits(_T_1242, 27, 0) @[lib.scala 428:27]
-    node _T_1407 = orr(_T_1406) @[lib.scala 428:35]
-    node _T_1408 = bits(_T_1242, 28, 28) @[lib.scala 428:44]
-    node _T_1409 = not(_T_1408) @[lib.scala 428:40]
-    node _T_1410 = bits(_T_1242, 28, 28) @[lib.scala 428:51]
-    node _T_1411 = mux(_T_1407, _T_1409, _T_1410) @[lib.scala 428:23]
-    _T_1243[27] <= _T_1411 @[lib.scala 428:17]
-    node _T_1412 = bits(_T_1242, 28, 0) @[lib.scala 428:27]
-    node _T_1413 = orr(_T_1412) @[lib.scala 428:35]
-    node _T_1414 = bits(_T_1242, 29, 29) @[lib.scala 428:44]
-    node _T_1415 = not(_T_1414) @[lib.scala 428:40]
-    node _T_1416 = bits(_T_1242, 29, 29) @[lib.scala 428:51]
-    node _T_1417 = mux(_T_1413, _T_1415, _T_1416) @[lib.scala 428:23]
-    _T_1243[28] <= _T_1417 @[lib.scala 428:17]
-    node _T_1418 = bits(_T_1242, 29, 0) @[lib.scala 428:27]
-    node _T_1419 = orr(_T_1418) @[lib.scala 428:35]
-    node _T_1420 = bits(_T_1242, 30, 30) @[lib.scala 428:44]
-    node _T_1421 = not(_T_1420) @[lib.scala 428:40]
-    node _T_1422 = bits(_T_1242, 30, 30) @[lib.scala 428:51]
-    node _T_1423 = mux(_T_1419, _T_1421, _T_1422) @[lib.scala 428:23]
-    _T_1243[29] <= _T_1423 @[lib.scala 428:17]
-    node _T_1424 = bits(_T_1242, 30, 0) @[lib.scala 428:27]
-    node _T_1425 = orr(_T_1424) @[lib.scala 428:35]
-    node _T_1426 = bits(_T_1242, 31, 31) @[lib.scala 428:44]
-    node _T_1427 = not(_T_1426) @[lib.scala 428:40]
-    node _T_1428 = bits(_T_1242, 31, 31) @[lib.scala 428:51]
-    node _T_1429 = mux(_T_1425, _T_1427, _T_1428) @[lib.scala 428:23]
-    _T_1243[30] <= _T_1429 @[lib.scala 428:17]
-    node _T_1430 = cat(_T_1243[2], _T_1243[1]) @[lib.scala 430:14]
-    node _T_1431 = cat(_T_1430, _T_1243[0]) @[lib.scala 430:14]
-    node _T_1432 = cat(_T_1243[4], _T_1243[3]) @[lib.scala 430:14]
-    node _T_1433 = cat(_T_1243[6], _T_1243[5]) @[lib.scala 430:14]
-    node _T_1434 = cat(_T_1433, _T_1432) @[lib.scala 430:14]
-    node _T_1435 = cat(_T_1434, _T_1431) @[lib.scala 430:14]
-    node _T_1436 = cat(_T_1243[8], _T_1243[7]) @[lib.scala 430:14]
-    node _T_1437 = cat(_T_1243[10], _T_1243[9]) @[lib.scala 430:14]
-    node _T_1438 = cat(_T_1437, _T_1436) @[lib.scala 430:14]
-    node _T_1439 = cat(_T_1243[12], _T_1243[11]) @[lib.scala 430:14]
-    node _T_1440 = cat(_T_1243[14], _T_1243[13]) @[lib.scala 430:14]
-    node _T_1441 = cat(_T_1440, _T_1439) @[lib.scala 430:14]
-    node _T_1442 = cat(_T_1441, _T_1438) @[lib.scala 430:14]
-    node _T_1443 = cat(_T_1442, _T_1435) @[lib.scala 430:14]
-    node _T_1444 = cat(_T_1243[16], _T_1243[15]) @[lib.scala 430:14]
-    node _T_1445 = cat(_T_1243[18], _T_1243[17]) @[lib.scala 430:14]
-    node _T_1446 = cat(_T_1445, _T_1444) @[lib.scala 430:14]
-    node _T_1447 = cat(_T_1243[20], _T_1243[19]) @[lib.scala 430:14]
-    node _T_1448 = cat(_T_1243[22], _T_1243[21]) @[lib.scala 430:14]
-    node _T_1449 = cat(_T_1448, _T_1447) @[lib.scala 430:14]
-    node _T_1450 = cat(_T_1449, _T_1446) @[lib.scala 430:14]
-    node _T_1451 = cat(_T_1243[24], _T_1243[23]) @[lib.scala 430:14]
-    node _T_1452 = cat(_T_1243[26], _T_1243[25]) @[lib.scala 430:14]
-    node _T_1453 = cat(_T_1452, _T_1451) @[lib.scala 430:14]
-    node _T_1454 = cat(_T_1243[28], _T_1243[27]) @[lib.scala 430:14]
-    node _T_1455 = cat(_T_1243[30], _T_1243[29]) @[lib.scala 430:14]
-    node _T_1456 = cat(_T_1455, _T_1454) @[lib.scala 430:14]
-    node _T_1457 = cat(_T_1456, _T_1453) @[lib.scala 430:14]
-    node _T_1458 = cat(_T_1457, _T_1450) @[lib.scala 430:14]
-    node _T_1459 = cat(_T_1458, _T_1443) @[lib.scala 430:14]
-    node _T_1460 = bits(_T_1242, 0, 0) @[lib.scala 430:24]
-    node _T_1461 = cat(_T_1459, _T_1460) @[Cat.scala 29:58]
-    node _T_1462 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 259:87]
-    node a_ff_eff = mux(_T_1241, _T_1461, _T_1462) @[exu_div_ctl.scala 259:21]
-    node _T_1463 = bits(smallnum_case_ff, 0, 0) @[exu_div_ctl.scala 262:22]
-    node _T_1464 = cat(UInt<28>("h00"), smallnum_ff) @[Cat.scala 29:58]
-    node _T_1465 = bits(rem_ff, 0, 0) @[exu_div_ctl.scala 263:12]
-    node _T_1466 = eq(smallnum_case_ff, UInt<1>("h00")) @[exu_div_ctl.scala 264:6]
-    node _T_1467 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 264:26]
-    node _T_1468 = and(_T_1466, _T_1467) @[exu_div_ctl.scala 264:24]
-    node _T_1469 = bits(_T_1468, 0, 0) @[exu_div_ctl.scala 264:35]
-    node _T_1470 = mux(_T_1463, _T_1464, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_1471 = mux(_T_1465, a_ff_eff, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_1472 = mux(_T_1469, q_ff_eff, UInt<1>("h00")) @[Mux.scala 27:72]
-    node _T_1473 = or(_T_1470, _T_1471) @[Mux.scala 27:72]
-    node _T_1474 = or(_T_1473, _T_1472) @[Mux.scala 27:72]
-    wire _T_1475 : UInt<32> @[Mux.scala 27:72]
-    _T_1475 <= _T_1474 @[Mux.scala 27:72]
-    io.data_out <= _T_1475 @[exu_div_ctl.scala 261:15]
-    node _T_1476 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 266:40]
-    node _T_1477 = and(io.valid_in, _T_1476) @[exu_div_ctl.scala 266:38]
-    node _T_1478 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    wire by_zero_case_ff : UInt<1>
+    by_zero_case_ff <= UInt<1>("h00")
+    wire ar_shifted : UInt<65>
+    ar_shifted <= UInt<65>("h00")
+    wire shortq_shift : UInt<5>
+    shortq_shift <= UInt<5>("h00")
+    wire shortq_decode : UInt<5>
+    shortq_decode <= UInt<5>("h00")
+    wire shortq_shift_ff : UInt<5>
+    shortq_shift_ff <= UInt<5>("h00")
+    node _T = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 777:35]
+    node valid_ff_in = and(io.valid_in, _T) @[exu_div_ctl.scala 777:33]
+    node _T_1 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 778:35]
+    node _T_2 = bits(control_ff, 2, 2) @[exu_div_ctl.scala 778:60]
+    node _T_3 = and(_T_1, _T_2) @[exu_div_ctl.scala 778:48]
+    node _T_4 = and(io.valid_in, io.signed_in) @[exu_div_ctl.scala 778:80]
+    node _T_5 = bits(io.dividend_in, 31, 31) @[exu_div_ctl.scala 778:112]
+    node _T_6 = and(_T_4, _T_5) @[exu_div_ctl.scala 778:96]
+    node _T_7 = or(_T_3, _T_6) @[exu_div_ctl.scala 778:65]
+    node _T_8 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 778:120]
+    node _T_9 = bits(control_ff, 1, 1) @[exu_div_ctl.scala 778:145]
+    node _T_10 = and(_T_8, _T_9) @[exu_div_ctl.scala 778:133]
+    node _T_11 = and(io.valid_in, io.signed_in) @[exu_div_ctl.scala 778:165]
+    node _T_12 = bits(io.divisor_in, 31, 31) @[exu_div_ctl.scala 778:197]
+    node _T_13 = and(_T_11, _T_12) @[exu_div_ctl.scala 778:181]
+    node _T_14 = or(_T_10, _T_13) @[exu_div_ctl.scala 778:150]
+    node _T_15 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 778:205]
+    node _T_16 = bits(control_ff, 0, 0) @[exu_div_ctl.scala 778:230]
+    node _T_17 = and(_T_15, _T_16) @[exu_div_ctl.scala 778:218]
+    node _T_18 = and(io.valid_in, io.rem_in) @[exu_div_ctl.scala 778:250]
+    node _T_19 = or(_T_17, _T_18) @[exu_div_ctl.scala 778:235]
+    node _T_20 = cat(_T_7, _T_14) @[Cat.scala 29:58]
+    node control_in = cat(_T_20, _T_19) @[Cat.scala 29:58]
+    node dividend_sign_ff = bits(control_ff, 2, 2) @[exu_div_ctl.scala 779:40]
+    node divisor_sign_ff = bits(control_ff, 1, 1) @[exu_div_ctl.scala 780:40]
+    node rem_ff = bits(control_ff, 0, 0) @[exu_div_ctl.scala 781:40]
+    node _T_21 = bits(b_ff, 31, 0) @[exu_div_ctl.scala 782:47]
+    node _T_22 = eq(_T_21, UInt<1>("h00")) @[exu_div_ctl.scala 782:54]
+    node by_zero_case = and(valid_ff, _T_22) @[exu_div_ctl.scala 782:40]
+    node _T_23 = bits(a_ff, 31, 4) @[exu_div_ctl.scala 784:30]
+    node _T_24 = eq(_T_23, UInt<1>("h00")) @[exu_div_ctl.scala 784:37]
+    node _T_25 = bits(b_ff, 31, 4) @[exu_div_ctl.scala 784:53]
+    node _T_26 = eq(_T_25, UInt<1>("h00")) @[exu_div_ctl.scala 784:60]
+    node _T_27 = and(_T_24, _T_26) @[exu_div_ctl.scala 784:46]
+    node _T_28 = eq(by_zero_case, UInt<1>("h00")) @[exu_div_ctl.scala 784:71]
+    node _T_29 = and(_T_27, _T_28) @[exu_div_ctl.scala 784:69]
+    node _T_30 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 784:87]
+    node _T_31 = and(_T_29, _T_30) @[exu_div_ctl.scala 784:85]
+    node _T_32 = and(_T_31, valid_ff) @[exu_div_ctl.scala 784:95]
+    node _T_33 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 784:108]
+    node _T_34 = and(_T_32, _T_33) @[exu_div_ctl.scala 784:106]
+    node _T_35 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 785:11]
+    node _T_36 = eq(_T_35, UInt<1>("h00")) @[exu_div_ctl.scala 785:18]
+    node _T_37 = eq(by_zero_case, UInt<1>("h00")) @[exu_div_ctl.scala 785:29]
+    node _T_38 = and(_T_36, _T_37) @[exu_div_ctl.scala 785:27]
+    node _T_39 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 785:45]
+    node _T_40 = and(_T_38, _T_39) @[exu_div_ctl.scala 785:43]
+    node _T_41 = and(_T_40, valid_ff) @[exu_div_ctl.scala 785:53]
+    node _T_42 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 785:66]
+    node _T_43 = and(_T_41, _T_42) @[exu_div_ctl.scala 785:64]
+    node smallnum_case = or(_T_34, _T_43) @[exu_div_ctl.scala 784:120]
+    node _T_44 = orr(count_ff) @[exu_div_ctl.scala 786:42]
+    node running_state = or(_T_44, shortq_enable_ff) @[exu_div_ctl.scala 786:45]
+    node _T_45 = or(io.valid_in, valid_ff) @[exu_div_ctl.scala 787:43]
+    node _T_46 = or(_T_45, io.cancel) @[exu_div_ctl.scala 787:54]
+    node _T_47 = or(_T_46, running_state) @[exu_div_ctl.scala 787:66]
+    node misc_enable = or(_T_47, finish_ff) @[exu_div_ctl.scala 787:82]
+    node _T_48 = or(smallnum_case, by_zero_case) @[exu_div_ctl.scala 788:45]
+    node _T_49 = eq(count_ff, UInt<6>("h020")) @[exu_div_ctl.scala 788:72]
+    node finish_raw = or(_T_48, _T_49) @[exu_div_ctl.scala 788:60]
+    node _T_50 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 789:43]
+    node finish = and(finish_raw, _T_50) @[exu_div_ctl.scala 789:41]
+    node _T_51 = or(valid_ff, running_state) @[exu_div_ctl.scala 790:40]
+    node _T_52 = eq(finish, UInt<1>("h00")) @[exu_div_ctl.scala 790:59]
+    node _T_53 = and(_T_51, _T_52) @[exu_div_ctl.scala 790:57]
+    node _T_54 = eq(finish_ff, UInt<1>("h00")) @[exu_div_ctl.scala 790:69]
+    node _T_55 = and(_T_53, _T_54) @[exu_div_ctl.scala 790:67]
+    node _T_56 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 790:82]
+    node _T_57 = and(_T_55, _T_56) @[exu_div_ctl.scala 790:80]
+    node _T_58 = eq(shortq_enable, UInt<1>("h00")) @[exu_div_ctl.scala 790:95]
+    node count_enable = and(_T_57, _T_58) @[exu_div_ctl.scala 790:93]
+    node _T_59 = bits(count_enable, 0, 0) @[Bitwise.scala 72:15]
+    node _T_60 = mux(_T_59, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
+    node _T_61 = add(count_ff, UInt<7>("h04")) @[exu_div_ctl.scala 791:63]
+    node _T_62 = tail(_T_61, 1) @[exu_div_ctl.scala 791:63]
+    node _T_63 = cat(UInt<2>("h00"), shortq_shift_ff) @[Cat.scala 29:58]
+    node _T_64 = add(_T_62, _T_63) @[exu_div_ctl.scala 791:74]
+    node _T_65 = tail(_T_64, 1) @[exu_div_ctl.scala 791:74]
+    node count_in = and(_T_60, _T_65) @[exu_div_ctl.scala 791:51]
+    node a_enable = or(io.valid_in, running_state) @[exu_div_ctl.scala 792:43]
+    node _T_66 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 793:47]
+    node a_shift = and(running_state, _T_66) @[exu_div_ctl.scala 793:45]
+    node _T_67 = bits(dividend_sign_ff, 0, 0) @[Bitwise.scala 72:15]
+    node _T_68 = mux(_T_67, UInt<33>("h01ffffffff"), UInt<33>("h00")) @[Bitwise.scala 72:12]
+    node _T_69 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 794:66]
+    node _T_70 = cat(_T_68, _T_69) @[Cat.scala 29:58]
+    node _T_71 = dshl(_T_70, shortq_shift_ff) @[exu_div_ctl.scala 794:74]
+    ar_shifted <= _T_71 @[exu_div_ctl.scala 794:28]
+    node _T_72 = xor(dividend_sign_ff, divisor_sign_ff) @[exu_div_ctl.scala 795:61]
+    node _T_73 = eq(_T_72, UInt<1>("h00")) @[exu_div_ctl.scala 795:42]
+    node b_twos_comp = and(valid_ff, _T_73) @[exu_div_ctl.scala 795:40]
+    node _T_74 = xor(dividend_sign_ff, divisor_sign_ff) @[exu_div_ctl.scala 796:62]
+    node _T_75 = eq(_T_74, UInt<1>("h00")) @[exu_div_ctl.scala 796:43]
+    node twos_comp_b_sel = and(valid_ff, _T_75) @[exu_div_ctl.scala 796:41]
+    node _T_76 = eq(valid_ff, UInt<1>("h00")) @[exu_div_ctl.scala 797:30]
+    node _T_77 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 797:42]
+    node _T_78 = and(_T_76, _T_77) @[exu_div_ctl.scala 797:40]
+    node _T_79 = xor(dividend_sign_ff, divisor_sign_ff) @[exu_div_ctl.scala 797:71]
+    node _T_80 = and(_T_78, _T_79) @[exu_div_ctl.scala 797:50]
+    node _T_81 = eq(by_zero_case_ff, UInt<1>("h00")) @[exu_div_ctl.scala 797:92]
+    node twos_comp_q_sel = and(_T_80, _T_81) @[exu_div_ctl.scala 797:90]
+    node b_enable = or(io.valid_in, b_twos_comp) @[exu_div_ctl.scala 798:43]
+    node _T_82 = or(io.valid_in, valid_ff) @[exu_div_ctl.scala 799:43]
+    node rq_enable = or(_T_82, running_state) @[exu_div_ctl.scala 799:54]
+    node _T_83 = and(valid_ff, dividend_sign_ff) @[exu_div_ctl.scala 800:40]
+    node _T_84 = eq(by_zero_case, UInt<1>("h00")) @[exu_div_ctl.scala 800:61]
+    node r_sign_sel = and(_T_83, _T_84) @[exu_div_ctl.scala 800:59]
+    node _T_85 = eq(quotient_new, UInt<1>("h00")) @[exu_div_ctl.scala 801:71]
+    node _T_86 = and(running_state, _T_85) @[exu_div_ctl.scala 801:55]
+    node _T_87 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_0 = and(_T_86, _T_87) @[exu_div_ctl.scala 801:85]
+    node _T_88 = eq(quotient_new, UInt<1>("h01")) @[exu_div_ctl.scala 801:71]
+    node _T_89 = and(running_state, _T_88) @[exu_div_ctl.scala 801:55]
+    node _T_90 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_1 = and(_T_89, _T_90) @[exu_div_ctl.scala 801:85]
+    node _T_91 = eq(quotient_new, UInt<2>("h02")) @[exu_div_ctl.scala 801:71]
+    node _T_92 = and(running_state, _T_91) @[exu_div_ctl.scala 801:55]
+    node _T_93 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_2 = and(_T_92, _T_93) @[exu_div_ctl.scala 801:85]
+    node _T_94 = eq(quotient_new, UInt<2>("h03")) @[exu_div_ctl.scala 801:71]
+    node _T_95 = and(running_state, _T_94) @[exu_div_ctl.scala 801:55]
+    node _T_96 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_3 = and(_T_95, _T_96) @[exu_div_ctl.scala 801:85]
+    node _T_97 = eq(quotient_new, UInt<3>("h04")) @[exu_div_ctl.scala 801:71]
+    node _T_98 = and(running_state, _T_97) @[exu_div_ctl.scala 801:55]
+    node _T_99 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_4 = and(_T_98, _T_99) @[exu_div_ctl.scala 801:85]
+    node _T_100 = eq(quotient_new, UInt<3>("h05")) @[exu_div_ctl.scala 801:71]
+    node _T_101 = and(running_state, _T_100) @[exu_div_ctl.scala 801:55]
+    node _T_102 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_5 = and(_T_101, _T_102) @[exu_div_ctl.scala 801:85]
+    node _T_103 = eq(quotient_new, UInt<3>("h06")) @[exu_div_ctl.scala 801:71]
+    node _T_104 = and(running_state, _T_103) @[exu_div_ctl.scala 801:55]
+    node _T_105 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_6 = and(_T_104, _T_105) @[exu_div_ctl.scala 801:85]
+    node _T_106 = eq(quotient_new, UInt<3>("h07")) @[exu_div_ctl.scala 801:71]
+    node _T_107 = and(running_state, _T_106) @[exu_div_ctl.scala 801:55]
+    node _T_108 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_7 = and(_T_107, _T_108) @[exu_div_ctl.scala 801:85]
+    node _T_109 = eq(quotient_new, UInt<4>("h08")) @[exu_div_ctl.scala 801:71]
+    node _T_110 = and(running_state, _T_109) @[exu_div_ctl.scala 801:55]
+    node _T_111 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_8 = and(_T_110, _T_111) @[exu_div_ctl.scala 801:85]
+    node _T_112 = eq(quotient_new, UInt<4>("h09")) @[exu_div_ctl.scala 801:71]
+    node _T_113 = and(running_state, _T_112) @[exu_div_ctl.scala 801:55]
+    node _T_114 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_9 = and(_T_113, _T_114) @[exu_div_ctl.scala 801:85]
+    node _T_115 = eq(quotient_new, UInt<4>("h0a")) @[exu_div_ctl.scala 801:71]
+    node _T_116 = and(running_state, _T_115) @[exu_div_ctl.scala 801:55]
+    node _T_117 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_10 = and(_T_116, _T_117) @[exu_div_ctl.scala 801:85]
+    node _T_118 = eq(quotient_new, UInt<4>("h0b")) @[exu_div_ctl.scala 801:71]
+    node _T_119 = and(running_state, _T_118) @[exu_div_ctl.scala 801:55]
+    node _T_120 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_11 = and(_T_119, _T_120) @[exu_div_ctl.scala 801:85]
+    node _T_121 = eq(quotient_new, UInt<4>("h0c")) @[exu_div_ctl.scala 801:71]
+    node _T_122 = and(running_state, _T_121) @[exu_div_ctl.scala 801:55]
+    node _T_123 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_12 = and(_T_122, _T_123) @[exu_div_ctl.scala 801:85]
+    node _T_124 = eq(quotient_new, UInt<4>("h0d")) @[exu_div_ctl.scala 801:71]
+    node _T_125 = and(running_state, _T_124) @[exu_div_ctl.scala 801:55]
+    node _T_126 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_13 = and(_T_125, _T_126) @[exu_div_ctl.scala 801:85]
+    node _T_127 = eq(quotient_new, UInt<4>("h0e")) @[exu_div_ctl.scala 801:71]
+    node _T_128 = and(running_state, _T_127) @[exu_div_ctl.scala 801:55]
+    node _T_129 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_14 = and(_T_128, _T_129) @[exu_div_ctl.scala 801:85]
+    node _T_130 = eq(quotient_new, UInt<4>("h0f")) @[exu_div_ctl.scala 801:71]
+    node _T_131 = and(running_state, _T_130) @[exu_div_ctl.scala 801:55]
+    node _T_132 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 801:87]
+    node r_adder_sel_15 = and(_T_131, _T_132) @[exu_div_ctl.scala 801:85]
+    node _T_133 = bits(r_ff, 30, 0) @[exu_div_ctl.scala 802:28]
+    node _T_134 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 802:39]
+    node _T_135 = cat(_T_133, _T_134) @[Cat.scala 29:58]
+    node _T_136 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 802:54]
+    node _T_137 = add(_T_135, _T_136) @[exu_div_ctl.scala 802:48]
+    node adder1_out = tail(_T_137, 1) @[exu_div_ctl.scala 802:48]
+    node _T_138 = bits(r_ff, 31, 0) @[exu_div_ctl.scala 803:28]
+    node _T_139 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 803:39]
+    node _T_140 = cat(_T_138, _T_139) @[Cat.scala 29:58]
+    node _T_141 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 803:58]
+    node _T_142 = cat(_T_141, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_143 = add(_T_140, _T_142) @[exu_div_ctl.scala 803:48]
+    node adder2_out = tail(_T_143, 1) @[exu_div_ctl.scala 803:48]
+    node _T_144 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 804:28]
+    node _T_145 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 804:39]
+    node _T_146 = cat(_T_144, _T_145) @[Cat.scala 29:58]
+    node _T_147 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 804:58]
+    node _T_148 = cat(_T_147, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_149 = add(_T_146, _T_148) @[exu_div_ctl.scala 804:48]
+    node _T_150 = tail(_T_149, 1) @[exu_div_ctl.scala 804:48]
+    node _T_151 = bits(b_ff, 36, 0) @[exu_div_ctl.scala 804:76]
+    node _T_152 = add(_T_150, _T_151) @[exu_div_ctl.scala 804:70]
+    node adder3_out = tail(_T_152, 1) @[exu_div_ctl.scala 804:70]
+    node _T_153 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 805:29]
+    node _T_154 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 805:38]
+    node _T_155 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 805:49]
+    node _T_156 = cat(_T_153, _T_154) @[Cat.scala 29:58]
+    node _T_157 = cat(_T_156, _T_155) @[Cat.scala 29:58]
+    node _T_158 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 805:68]
+    node _T_159 = cat(_T_158, UInt<2>("h00")) @[Cat.scala 29:58]
+    node _T_160 = add(_T_157, _T_159) @[exu_div_ctl.scala 805:58]
+    node adder4_out = tail(_T_160, 1) @[exu_div_ctl.scala 805:58]
+    node _T_161 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 806:29]
+    node _T_162 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 806:38]
+    node _T_163 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 806:49]
+    node _T_164 = cat(_T_161, _T_162) @[Cat.scala 29:58]
+    node _T_165 = cat(_T_164, _T_163) @[Cat.scala 29:58]
+    node _T_166 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 806:68]
+    node _T_167 = cat(_T_166, UInt<2>("h00")) @[Cat.scala 29:58]
+    node _T_168 = add(_T_165, _T_167) @[exu_div_ctl.scala 806:58]
+    node _T_169 = tail(_T_168, 1) @[exu_div_ctl.scala 806:58]
+    node _T_170 = add(_T_169, b_ff) @[exu_div_ctl.scala 806:85]
+    node adder5_out = tail(_T_170, 1) @[exu_div_ctl.scala 806:85]
+    node _T_171 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 807:29]
+    node _T_172 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 807:38]
+    node _T_173 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 807:49]
+    node _T_174 = cat(_T_171, _T_172) @[Cat.scala 29:58]
+    node _T_175 = cat(_T_174, _T_173) @[Cat.scala 29:58]
+    node _T_176 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 807:68]
+    node _T_177 = cat(_T_176, UInt<2>("h00")) @[Cat.scala 29:58]
+    node _T_178 = add(_T_175, _T_177) @[exu_div_ctl.scala 807:58]
+    node _T_179 = tail(_T_178, 1) @[exu_div_ctl.scala 807:58]
+    node _T_180 = bits(b_ff, 36, 0) @[exu_div_ctl.scala 807:95]
+    node _T_181 = cat(_T_180, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_182 = add(_T_179, _T_181) @[exu_div_ctl.scala 807:85]
+    node adder6_out = tail(_T_182, 1) @[exu_div_ctl.scala 807:85]
+    node _T_183 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 808:29]
+    node _T_184 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 808:38]
+    node _T_185 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 808:49]
+    node _T_186 = cat(_T_183, _T_184) @[Cat.scala 29:58]
+    node _T_187 = cat(_T_186, _T_185) @[Cat.scala 29:58]
+    node _T_188 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 808:68]
+    node _T_189 = cat(_T_188, UInt<2>("h00")) @[Cat.scala 29:58]
+    node _T_190 = add(_T_187, _T_189) @[exu_div_ctl.scala 808:58]
+    node _T_191 = tail(_T_190, 1) @[exu_div_ctl.scala 808:58]
+    node _T_192 = bits(b_ff, 36, 0) @[exu_div_ctl.scala 808:95]
+    node _T_193 = cat(_T_192, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_194 = add(_T_191, _T_193) @[exu_div_ctl.scala 808:85]
+    node _T_195 = tail(_T_194, 1) @[exu_div_ctl.scala 808:85]
+    node _T_196 = add(_T_195, b_ff) @[exu_div_ctl.scala 808:107]
+    node adder7_out = tail(_T_196, 1) @[exu_div_ctl.scala 808:107]
+    node _T_197 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 809:29]
+    node _T_198 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 809:38]
+    node _T_199 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 809:49]
+    node _T_200 = cat(_T_197, _T_198) @[Cat.scala 29:58]
+    node _T_201 = cat(_T_200, _T_199) @[Cat.scala 29:58]
+    node _T_202 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 809:68]
+    node _T_203 = cat(_T_202, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_204 = add(_T_201, _T_203) @[exu_div_ctl.scala 809:58]
+    node adder8_out = tail(_T_204, 1) @[exu_div_ctl.scala 809:58]
+    node _T_205 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 810:29]
+    node _T_206 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 810:38]
+    node _T_207 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 810:49]
+    node _T_208 = cat(_T_205, _T_206) @[Cat.scala 29:58]
+    node _T_209 = cat(_T_208, _T_207) @[Cat.scala 29:58]
+    node _T_210 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 810:68]
+    node _T_211 = cat(_T_210, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_212 = add(_T_209, _T_211) @[exu_div_ctl.scala 810:58]
+    node _T_213 = tail(_T_212, 1) @[exu_div_ctl.scala 810:58]
+    node _T_214 = add(_T_213, b_ff) @[exu_div_ctl.scala 810:85]
+    node adder9_out = tail(_T_214, 1) @[exu_div_ctl.scala 810:85]
+    node _T_215 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 811:29]
+    node _T_216 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 811:38]
+    node _T_217 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 811:49]
+    node _T_218 = cat(_T_215, _T_216) @[Cat.scala 29:58]
+    node _T_219 = cat(_T_218, _T_217) @[Cat.scala 29:58]
+    node _T_220 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 811:68]
+    node _T_221 = cat(_T_220, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_222 = add(_T_219, _T_221) @[exu_div_ctl.scala 811:58]
+    node _T_223 = tail(_T_222, 1) @[exu_div_ctl.scala 811:58]
+    node _T_224 = bits(b_ff, 36, 0) @[exu_div_ctl.scala 811:95]
+    node _T_225 = cat(_T_224, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_226 = add(_T_223, _T_225) @[exu_div_ctl.scala 811:85]
+    node adder10_out = tail(_T_226, 1) @[exu_div_ctl.scala 811:85]
+    node _T_227 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 812:29]
+    node _T_228 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 812:38]
+    node _T_229 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 812:49]
+    node _T_230 = cat(_T_227, _T_228) @[Cat.scala 29:58]
+    node _T_231 = cat(_T_230, _T_229) @[Cat.scala 29:58]
+    node _T_232 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 812:68]
+    node _T_233 = cat(_T_232, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_234 = add(_T_231, _T_233) @[exu_div_ctl.scala 812:58]
+    node _T_235 = tail(_T_234, 1) @[exu_div_ctl.scala 812:58]
+    node _T_236 = bits(b_ff, 36, 0) @[exu_div_ctl.scala 812:95]
+    node _T_237 = cat(_T_236, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_238 = add(_T_235, _T_237) @[exu_div_ctl.scala 812:85]
+    node _T_239 = tail(_T_238, 1) @[exu_div_ctl.scala 812:85]
+    node _T_240 = add(_T_239, b_ff) @[exu_div_ctl.scala 812:107]
+    node adder11_out = tail(_T_240, 1) @[exu_div_ctl.scala 812:107]
+    node _T_241 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 813:29]
+    node _T_242 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 813:38]
+    node _T_243 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 813:49]
+    node _T_244 = cat(_T_241, _T_242) @[Cat.scala 29:58]
+    node _T_245 = cat(_T_244, _T_243) @[Cat.scala 29:58]
+    node _T_246 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 813:68]
+    node _T_247 = cat(_T_246, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_248 = add(_T_245, _T_247) @[exu_div_ctl.scala 813:58]
+    node _T_249 = tail(_T_248, 1) @[exu_div_ctl.scala 813:58]
+    node _T_250 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 813:95]
+    node _T_251 = cat(_T_250, UInt<2>("h00")) @[Cat.scala 29:58]
+    node _T_252 = add(_T_249, _T_251) @[exu_div_ctl.scala 813:85]
+    node adder12_out = tail(_T_252, 1) @[exu_div_ctl.scala 813:85]
+    node _T_253 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 814:29]
+    node _T_254 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 814:38]
+    node _T_255 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 814:49]
+    node _T_256 = cat(_T_253, _T_254) @[Cat.scala 29:58]
+    node _T_257 = cat(_T_256, _T_255) @[Cat.scala 29:58]
+    node _T_258 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 814:68]
+    node _T_259 = cat(_T_258, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_260 = add(_T_257, _T_259) @[exu_div_ctl.scala 814:58]
+    node _T_261 = tail(_T_260, 1) @[exu_div_ctl.scala 814:58]
+    node _T_262 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 814:95]
+    node _T_263 = cat(_T_262, UInt<2>("h00")) @[Cat.scala 29:58]
+    node _T_264 = add(_T_261, _T_263) @[exu_div_ctl.scala 814:85]
+    node _T_265 = tail(_T_264, 1) @[exu_div_ctl.scala 814:85]
+    node _T_266 = add(_T_265, b_ff) @[exu_div_ctl.scala 814:112]
+    node adder13_out = tail(_T_266, 1) @[exu_div_ctl.scala 814:112]
+    node _T_267 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 815:29]
+    node _T_268 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 815:38]
+    node _T_269 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 815:49]
+    node _T_270 = cat(_T_267, _T_268) @[Cat.scala 29:58]
+    node _T_271 = cat(_T_270, _T_269) @[Cat.scala 29:58]
+    node _T_272 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 815:68]
+    node _T_273 = cat(_T_272, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_274 = add(_T_271, _T_273) @[exu_div_ctl.scala 815:58]
+    node _T_275 = tail(_T_274, 1) @[exu_div_ctl.scala 815:58]
+    node _T_276 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 815:95]
+    node _T_277 = cat(_T_276, UInt<2>("h00")) @[Cat.scala 29:58]
+    node _T_278 = add(_T_275, _T_277) @[exu_div_ctl.scala 815:85]
+    node _T_279 = tail(_T_278, 1) @[exu_div_ctl.scala 815:85]
+    node _T_280 = bits(b_ff, 36, 0) @[exu_div_ctl.scala 815:122]
+    node _T_281 = cat(_T_280, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_282 = add(_T_279, _T_281) @[exu_div_ctl.scala 815:112]
+    node adder14_out = tail(_T_282, 1) @[exu_div_ctl.scala 815:112]
+    node _T_283 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 816:29]
+    node _T_284 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 816:38]
+    node _T_285 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 816:49]
+    node _T_286 = cat(_T_283, _T_284) @[Cat.scala 29:58]
+    node _T_287 = cat(_T_286, _T_285) @[Cat.scala 29:58]
+    node _T_288 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 816:68]
+    node _T_289 = cat(_T_288, UInt<3>("h00")) @[Cat.scala 29:58]
+    node _T_290 = add(_T_287, _T_289) @[exu_div_ctl.scala 816:58]
+    node _T_291 = tail(_T_290, 1) @[exu_div_ctl.scala 816:58]
+    node _T_292 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 816:95]
+    node _T_293 = cat(_T_292, UInt<2>("h00")) @[Cat.scala 29:58]
+    node _T_294 = add(_T_291, _T_293) @[exu_div_ctl.scala 816:85]
+    node _T_295 = tail(_T_294, 1) @[exu_div_ctl.scala 816:85]
+    node _T_296 = bits(b_ff, 36, 0) @[exu_div_ctl.scala 816:122]
+    node _T_297 = cat(_T_296, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_298 = add(_T_295, _T_297) @[exu_div_ctl.scala 816:112]
+    node _T_299 = tail(_T_298, 1) @[exu_div_ctl.scala 816:112]
+    node _T_300 = add(_T_299, b_ff) @[exu_div_ctl.scala 816:134]
+    node adder15_out = tail(_T_300, 1) @[exu_div_ctl.scala 816:134]
+    node _T_301 = bits(adder15_out, 37, 37) @[exu_div_ctl.scala 819:18]
+    node _T_302 = eq(_T_301, UInt<1>("h00")) @[exu_div_ctl.scala 819:6]
+    node _T_303 = xor(_T_302, dividend_sign_ff) @[exu_div_ctl.scala 819:23]
+    node _T_304 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 819:51]
+    node _T_305 = eq(_T_304, UInt<1>("h00")) @[exu_div_ctl.scala 819:58]
+    node _T_306 = eq(adder15_out, UInt<1>("h00")) @[exu_div_ctl.scala 819:82]
+    node _T_307 = and(_T_305, _T_306) @[exu_div_ctl.scala 819:67]
+    node _T_308 = or(_T_303, _T_307) @[exu_div_ctl.scala 819:43]
+    node _T_309 = bits(adder14_out, 37, 37) @[exu_div_ctl.scala 820:18]
+    node _T_310 = eq(_T_309, UInt<1>("h00")) @[exu_div_ctl.scala 820:6]
+    node _T_311 = xor(_T_310, dividend_sign_ff) @[exu_div_ctl.scala 820:23]
+    node _T_312 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 820:51]
+    node _T_313 = eq(_T_312, UInt<1>("h00")) @[exu_div_ctl.scala 820:58]
+    node _T_314 = eq(adder14_out, UInt<1>("h00")) @[exu_div_ctl.scala 820:82]
+    node _T_315 = and(_T_313, _T_314) @[exu_div_ctl.scala 820:67]
+    node _T_316 = or(_T_311, _T_315) @[exu_div_ctl.scala 820:43]
+    node _T_317 = bits(adder13_out, 37, 37) @[exu_div_ctl.scala 821:18]
+    node _T_318 = eq(_T_317, UInt<1>("h00")) @[exu_div_ctl.scala 821:6]
+    node _T_319 = xor(_T_318, dividend_sign_ff) @[exu_div_ctl.scala 821:23]
+    node _T_320 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 821:51]
+    node _T_321 = eq(_T_320, UInt<1>("h00")) @[exu_div_ctl.scala 821:58]
+    node _T_322 = eq(adder13_out, UInt<1>("h00")) @[exu_div_ctl.scala 821:82]
+    node _T_323 = and(_T_321, _T_322) @[exu_div_ctl.scala 821:67]
+    node _T_324 = or(_T_319, _T_323) @[exu_div_ctl.scala 821:43]
+    node _T_325 = bits(adder12_out, 37, 37) @[exu_div_ctl.scala 822:18]
+    node _T_326 = eq(_T_325, UInt<1>("h00")) @[exu_div_ctl.scala 822:6]
+    node _T_327 = xor(_T_326, dividend_sign_ff) @[exu_div_ctl.scala 822:23]
+    node _T_328 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 822:51]
+    node _T_329 = eq(_T_328, UInt<1>("h00")) @[exu_div_ctl.scala 822:58]
+    node _T_330 = eq(adder12_out, UInt<1>("h00")) @[exu_div_ctl.scala 822:82]
+    node _T_331 = and(_T_329, _T_330) @[exu_div_ctl.scala 822:67]
+    node _T_332 = or(_T_327, _T_331) @[exu_div_ctl.scala 822:43]
+    node _T_333 = bits(adder11_out, 37, 37) @[exu_div_ctl.scala 823:18]
+    node _T_334 = eq(_T_333, UInt<1>("h00")) @[exu_div_ctl.scala 823:6]
+    node _T_335 = xor(_T_334, dividend_sign_ff) @[exu_div_ctl.scala 823:23]
+    node _T_336 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 823:51]
+    node _T_337 = eq(_T_336, UInt<1>("h00")) @[exu_div_ctl.scala 823:58]
+    node _T_338 = eq(adder11_out, UInt<1>("h00")) @[exu_div_ctl.scala 823:82]
+    node _T_339 = and(_T_337, _T_338) @[exu_div_ctl.scala 823:67]
+    node _T_340 = or(_T_335, _T_339) @[exu_div_ctl.scala 823:43]
+    node _T_341 = bits(adder10_out, 37, 37) @[exu_div_ctl.scala 824:18]
+    node _T_342 = eq(_T_341, UInt<1>("h00")) @[exu_div_ctl.scala 824:6]
+    node _T_343 = xor(_T_342, dividend_sign_ff) @[exu_div_ctl.scala 824:23]
+    node _T_344 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 824:51]
+    node _T_345 = eq(_T_344, UInt<1>("h00")) @[exu_div_ctl.scala 824:58]
+    node _T_346 = eq(adder10_out, UInt<1>("h00")) @[exu_div_ctl.scala 824:82]
+    node _T_347 = and(_T_345, _T_346) @[exu_div_ctl.scala 824:67]
+    node _T_348 = or(_T_343, _T_347) @[exu_div_ctl.scala 824:43]
+    node _T_349 = bits(adder9_out, 37, 37) @[exu_div_ctl.scala 825:17]
+    node _T_350 = eq(_T_349, UInt<1>("h00")) @[exu_div_ctl.scala 825:6]
+    node _T_351 = xor(_T_350, dividend_sign_ff) @[exu_div_ctl.scala 825:22]
+    node _T_352 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 825:50]
+    node _T_353 = eq(_T_352, UInt<1>("h00")) @[exu_div_ctl.scala 825:57]
+    node _T_354 = eq(adder9_out, UInt<1>("h00")) @[exu_div_ctl.scala 825:80]
+    node _T_355 = and(_T_353, _T_354) @[exu_div_ctl.scala 825:66]
+    node _T_356 = or(_T_351, _T_355) @[exu_div_ctl.scala 825:42]
+    node _T_357 = bits(adder8_out, 37, 37) @[exu_div_ctl.scala 826:17]
+    node _T_358 = eq(_T_357, UInt<1>("h00")) @[exu_div_ctl.scala 826:6]
+    node _T_359 = xor(_T_358, dividend_sign_ff) @[exu_div_ctl.scala 826:22]
+    node _T_360 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 826:50]
+    node _T_361 = eq(_T_360, UInt<1>("h00")) @[exu_div_ctl.scala 826:57]
+    node _T_362 = eq(adder8_out, UInt<1>("h00")) @[exu_div_ctl.scala 826:80]
+    node _T_363 = and(_T_361, _T_362) @[exu_div_ctl.scala 826:66]
+    node _T_364 = or(_T_359, _T_363) @[exu_div_ctl.scala 826:42]
+    node _T_365 = bits(adder7_out, 37, 37) @[exu_div_ctl.scala 827:17]
+    node _T_366 = eq(_T_365, UInt<1>("h00")) @[exu_div_ctl.scala 827:6]
+    node _T_367 = xor(_T_366, dividend_sign_ff) @[exu_div_ctl.scala 827:22]
+    node _T_368 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 827:50]
+    node _T_369 = eq(_T_368, UInt<1>("h00")) @[exu_div_ctl.scala 827:57]
+    node _T_370 = eq(adder7_out, UInt<1>("h00")) @[exu_div_ctl.scala 827:80]
+    node _T_371 = and(_T_369, _T_370) @[exu_div_ctl.scala 827:66]
+    node _T_372 = or(_T_367, _T_371) @[exu_div_ctl.scala 827:42]
+    node _T_373 = bits(adder6_out, 37, 37) @[exu_div_ctl.scala 828:17]
+    node _T_374 = eq(_T_373, UInt<1>("h00")) @[exu_div_ctl.scala 828:6]
+    node _T_375 = xor(_T_374, dividend_sign_ff) @[exu_div_ctl.scala 828:22]
+    node _T_376 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 828:50]
+    node _T_377 = eq(_T_376, UInt<1>("h00")) @[exu_div_ctl.scala 828:57]
+    node _T_378 = eq(adder6_out, UInt<1>("h00")) @[exu_div_ctl.scala 828:80]
+    node _T_379 = and(_T_377, _T_378) @[exu_div_ctl.scala 828:66]
+    node _T_380 = or(_T_375, _T_379) @[exu_div_ctl.scala 828:42]
+    node _T_381 = bits(adder5_out, 37, 37) @[exu_div_ctl.scala 829:17]
+    node _T_382 = eq(_T_381, UInt<1>("h00")) @[exu_div_ctl.scala 829:6]
+    node _T_383 = xor(_T_382, dividend_sign_ff) @[exu_div_ctl.scala 829:22]
+    node _T_384 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 829:50]
+    node _T_385 = eq(_T_384, UInt<1>("h00")) @[exu_div_ctl.scala 829:57]
+    node _T_386 = eq(adder5_out, UInt<1>("h00")) @[exu_div_ctl.scala 829:80]
+    node _T_387 = and(_T_385, _T_386) @[exu_div_ctl.scala 829:66]
+    node _T_388 = or(_T_383, _T_387) @[exu_div_ctl.scala 829:42]
+    node _T_389 = bits(adder4_out, 37, 37) @[exu_div_ctl.scala 830:17]
+    node _T_390 = eq(_T_389, UInt<1>("h00")) @[exu_div_ctl.scala 830:6]
+    node _T_391 = xor(_T_390, dividend_sign_ff) @[exu_div_ctl.scala 830:22]
+    node _T_392 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 830:50]
+    node _T_393 = eq(_T_392, UInt<1>("h00")) @[exu_div_ctl.scala 830:57]
+    node _T_394 = eq(adder4_out, UInt<1>("h00")) @[exu_div_ctl.scala 830:80]
+    node _T_395 = and(_T_393, _T_394) @[exu_div_ctl.scala 830:66]
+    node _T_396 = or(_T_391, _T_395) @[exu_div_ctl.scala 830:42]
+    node _T_397 = bits(adder3_out, 36, 36) @[exu_div_ctl.scala 831:17]
+    node _T_398 = eq(_T_397, UInt<1>("h00")) @[exu_div_ctl.scala 831:6]
+    node _T_399 = xor(_T_398, dividend_sign_ff) @[exu_div_ctl.scala 831:22]
+    node _T_400 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 831:50]
+    node _T_401 = eq(_T_400, UInt<1>("h00")) @[exu_div_ctl.scala 831:57]
+    node _T_402 = eq(adder3_out, UInt<1>("h00")) @[exu_div_ctl.scala 831:80]
+    node _T_403 = and(_T_401, _T_402) @[exu_div_ctl.scala 831:66]
+    node _T_404 = or(_T_399, _T_403) @[exu_div_ctl.scala 831:42]
+    node _T_405 = bits(adder2_out, 35, 35) @[exu_div_ctl.scala 832:17]
+    node _T_406 = eq(_T_405, UInt<1>("h00")) @[exu_div_ctl.scala 832:6]
+    node _T_407 = xor(_T_406, dividend_sign_ff) @[exu_div_ctl.scala 832:22]
+    node _T_408 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 832:50]
+    node _T_409 = eq(_T_408, UInt<1>("h00")) @[exu_div_ctl.scala 832:57]
+    node _T_410 = eq(adder2_out, UInt<1>("h00")) @[exu_div_ctl.scala 832:80]
+    node _T_411 = and(_T_409, _T_410) @[exu_div_ctl.scala 832:66]
+    node _T_412 = or(_T_407, _T_411) @[exu_div_ctl.scala 832:42]
+    node _T_413 = bits(adder1_out, 34, 34) @[exu_div_ctl.scala 833:17]
+    node _T_414 = eq(_T_413, UInt<1>("h00")) @[exu_div_ctl.scala 833:6]
+    node _T_415 = xor(_T_414, dividend_sign_ff) @[exu_div_ctl.scala 833:22]
+    node _T_416 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 833:50]
+    node _T_417 = eq(_T_416, UInt<1>("h00")) @[exu_div_ctl.scala 833:57]
+    node _T_418 = eq(adder1_out, UInt<1>("h00")) @[exu_div_ctl.scala 833:80]
+    node _T_419 = and(_T_417, _T_418) @[exu_div_ctl.scala 833:66]
+    node _T_420 = or(_T_415, _T_419) @[exu_div_ctl.scala 833:42]
+    node _T_421 = cat(_T_420, UInt<1>("h00")) @[Cat.scala 29:58]
+    node _T_422 = cat(_T_404, _T_412) @[Cat.scala 29:58]
+    node _T_423 = cat(_T_422, _T_421) @[Cat.scala 29:58]
+    node _T_424 = cat(_T_388, _T_396) @[Cat.scala 29:58]
+    node _T_425 = cat(_T_372, _T_380) @[Cat.scala 29:58]
+    node _T_426 = cat(_T_425, _T_424) @[Cat.scala 29:58]
+    node _T_427 = cat(_T_426, _T_423) @[Cat.scala 29:58]
+    node _T_428 = cat(_T_356, _T_364) @[Cat.scala 29:58]
+    node _T_429 = cat(_T_340, _T_348) @[Cat.scala 29:58]
+    node _T_430 = cat(_T_429, _T_428) @[Cat.scala 29:58]
+    node _T_431 = cat(_T_324, _T_332) @[Cat.scala 29:58]
+    node _T_432 = cat(_T_308, _T_316) @[Cat.scala 29:58]
+    node _T_433 = cat(_T_432, _T_431) @[Cat.scala 29:58]
+    node _T_434 = cat(_T_433, _T_430) @[Cat.scala 29:58]
+    node _T_435 = cat(_T_434, _T_427) @[Cat.scala 29:58]
+    quotient_raw <= _T_435 @[exu_div_ctl.scala 818:16]
+    node _T_436 = bits(quotient_raw, 15, 8) @[exu_div_ctl.scala 836:43]
+    node _T_437 = mux(UInt<1>("h00"), UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
+    node _T_438 = cat(_T_437, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_439 = eq(_T_436, _T_438) @[exu_div_ctl.scala 836:49]
+    node _T_440 = bits(_T_439, 0, 0) @[exu_div_ctl.scala 836:78]
+    node _T_441 = bits(quotient_raw, 15, 9) @[exu_div_ctl.scala 836:43]
+    node _T_442 = mux(UInt<1>("h00"), UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
+    node _T_443 = cat(_T_442, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_444 = eq(_T_441, _T_443) @[exu_div_ctl.scala 836:49]
+    node _T_445 = bits(_T_444, 0, 0) @[exu_div_ctl.scala 836:78]
+    node _T_446 = bits(quotient_raw, 15, 10) @[exu_div_ctl.scala 836:43]
+    node _T_447 = mux(UInt<1>("h00"), UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
+    node _T_448 = cat(_T_447, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_449 = eq(_T_446, _T_448) @[exu_div_ctl.scala 836:49]
+    node _T_450 = bits(_T_449, 0, 0) @[exu_div_ctl.scala 836:78]
+    node _T_451 = bits(quotient_raw, 15, 11) @[exu_div_ctl.scala 836:43]
+    node _T_452 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
+    node _T_453 = cat(_T_452, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_454 = eq(_T_451, _T_453) @[exu_div_ctl.scala 836:49]
+    node _T_455 = bits(_T_454, 0, 0) @[exu_div_ctl.scala 836:78]
+    node _T_456 = bits(quotient_raw, 15, 12) @[exu_div_ctl.scala 836:43]
+    node _T_457 = mux(UInt<1>("h00"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12]
+    node _T_458 = cat(_T_457, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_459 = eq(_T_456, _T_458) @[exu_div_ctl.scala 836:49]
+    node _T_460 = bits(_T_459, 0, 0) @[exu_div_ctl.scala 836:78]
+    node _T_461 = bits(quotient_raw, 15, 13) @[exu_div_ctl.scala 836:43]
+    node _T_462 = mux(UInt<1>("h00"), UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
+    node _T_463 = cat(_T_462, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_464 = eq(_T_461, _T_463) @[exu_div_ctl.scala 836:49]
+    node _T_465 = bits(_T_464, 0, 0) @[exu_div_ctl.scala 836:78]
+    node _T_466 = bits(quotient_raw, 15, 14) @[exu_div_ctl.scala 836:43]
+    node _T_467 = cat(UInt<1>("h00"), UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_468 = eq(_T_466, _T_467) @[exu_div_ctl.scala 836:49]
+    node _T_469 = bits(_T_468, 0, 0) @[exu_div_ctl.scala 836:78]
+    node _T_470 = mux(_T_440, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_471 = mux(_T_445, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_472 = mux(_T_450, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_473 = mux(_T_455, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_474 = mux(_T_460, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_475 = mux(_T_465, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_476 = mux(_T_469, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_477 = or(_T_470, _T_471) @[Mux.scala 27:72]
+    node _T_478 = or(_T_477, _T_472) @[Mux.scala 27:72]
+    node _T_479 = or(_T_478, _T_473) @[Mux.scala 27:72]
+    node _T_480 = or(_T_479, _T_474) @[Mux.scala 27:72]
+    node _T_481 = or(_T_480, _T_475) @[Mux.scala 27:72]
+    node _T_482 = or(_T_481, _T_476) @[Mux.scala 27:72]
+    wire _T_483 : UInt<1> @[Mux.scala 27:72]
+    _T_483 <= _T_482 @[Mux.scala 27:72]
+    node _T_484 = bits(quotient_raw, 15, 15) @[exu_div_ctl.scala 836:109]
+    node _T_485 = eq(_T_484, UInt<1>("h01")) @[exu_div_ctl.scala 836:113]
+    node _T_486 = or(_T_483, _T_485) @[exu_div_ctl.scala 836:94]
+    node _T_487 = bits(quotient_raw, 15, 4) @[exu_div_ctl.scala 838:19]
+    node _T_488 = eq(_T_487, UInt<12>("h01")) @[exu_div_ctl.scala 838:26]
+    node _T_489 = bits(quotient_raw, 15, 5) @[exu_div_ctl.scala 838:70]
+    node _T_490 = eq(_T_489, UInt<11>("h01")) @[exu_div_ctl.scala 838:77]
+    node _T_491 = or(_T_488, _T_490) @[exu_div_ctl.scala 838:54]
+    node _T_492 = bits(quotient_raw, 15, 6) @[exu_div_ctl.scala 838:121]
+    node _T_493 = eq(_T_492, UInt<10>("h01")) @[exu_div_ctl.scala 838:128]
+    node _T_494 = or(_T_491, _T_493) @[exu_div_ctl.scala 838:105]
+    node _T_495 = bits(quotient_raw, 15, 7) @[exu_div_ctl.scala 839:21]
+    node _T_496 = eq(_T_495, UInt<9>("h01")) @[exu_div_ctl.scala 839:28]
+    node _T_497 = or(_T_494, _T_496) @[exu_div_ctl.scala 838:155]
+    node _T_498 = bits(quotient_raw, 15, 12) @[exu_div_ctl.scala 839:69]
+    node _T_499 = eq(_T_498, UInt<4>("h01")) @[exu_div_ctl.scala 839:76]
+    node _T_500 = or(_T_497, _T_499) @[exu_div_ctl.scala 839:53]
+    node _T_501 = bits(quotient_raw, 15, 13) @[exu_div_ctl.scala 839:112]
+    node _T_502 = eq(_T_501, UInt<3>("h01")) @[exu_div_ctl.scala 839:119]
+    node _T_503 = or(_T_500, _T_502) @[exu_div_ctl.scala 839:96]
+    node _T_504 = bits(quotient_raw, 15, 14) @[exu_div_ctl.scala 840:21]
+    node _T_505 = eq(_T_504, UInt<2>("h01")) @[exu_div_ctl.scala 840:28]
+    node _T_506 = or(_T_503, _T_505) @[exu_div_ctl.scala 839:138]
+    node _T_507 = bits(quotient_raw, 15, 15) @[exu_div_ctl.scala 840:62]
+    node _T_508 = eq(_T_507, UInt<1>("h01")) @[exu_div_ctl.scala 840:69]
+    node _T_509 = or(_T_506, _T_508) @[exu_div_ctl.scala 840:46]
+    node _T_510 = bits(quotient_raw, 15, 2) @[exu_div_ctl.scala 842:19]
+    node _T_511 = eq(_T_510, UInt<14>("h01")) @[exu_div_ctl.scala 842:26]
+    node _T_512 = bits(quotient_raw, 15, 3) @[exu_div_ctl.scala 842:72]
+    node _T_513 = eq(_T_512, UInt<13>("h01")) @[exu_div_ctl.scala 842:79]
+    node _T_514 = or(_T_511, _T_513) @[exu_div_ctl.scala 842:56]
+    node _T_515 = bits(quotient_raw, 15, 6) @[exu_div_ctl.scala 842:125]
+    node _T_516 = eq(_T_515, UInt<10>("h01")) @[exu_div_ctl.scala 842:132]
+    node _T_517 = or(_T_514, _T_516) @[exu_div_ctl.scala 842:109]
+    node _T_518 = bits(quotient_raw, 15, 7) @[exu_div_ctl.scala 843:23]
+    node _T_519 = eq(_T_518, UInt<9>("h01")) @[exu_div_ctl.scala 843:30]
+    node _T_520 = or(_T_517, _T_519) @[exu_div_ctl.scala 842:159]
+    node _T_521 = bits(quotient_raw, 15, 10) @[exu_div_ctl.scala 843:71]
+    node _T_522 = eq(_T_521, UInt<6>("h01")) @[exu_div_ctl.scala 843:78]
+    node _T_523 = or(_T_520, _T_522) @[exu_div_ctl.scala 843:55]
+    node _T_524 = bits(quotient_raw, 15, 11) @[exu_div_ctl.scala 843:116]
+    node _T_525 = eq(_T_524, UInt<5>("h01")) @[exu_div_ctl.scala 843:123]
+    node _T_526 = or(_T_523, _T_525) @[exu_div_ctl.scala 843:100]
+    node _T_527 = bits(quotient_raw, 15, 14) @[exu_div_ctl.scala 844:23]
+    node _T_528 = eq(_T_527, UInt<2>("h01")) @[exu_div_ctl.scala 844:30]
+    node _T_529 = or(_T_526, _T_528) @[exu_div_ctl.scala 843:144]
+    node _T_530 = bits(quotient_raw, 15, 15) @[exu_div_ctl.scala 844:64]
+    node _T_531 = eq(_T_530, UInt<1>("h01")) @[exu_div_ctl.scala 844:71]
+    node _T_532 = or(_T_529, _T_531) @[exu_div_ctl.scala 844:48]
+    node _T_533 = bits(quotient_raw, 15, 1) @[exu_div_ctl.scala 846:48]
+    node _T_534 = mux(UInt<1>("h00"), UInt<14>("h03fff"), UInt<14>("h00")) @[Bitwise.scala 72:12]
+    node _T_535 = cat(_T_534, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_536 = eq(_T_533, _T_535) @[exu_div_ctl.scala 846:54]
+    node _T_537 = bits(_T_536, 0, 0) @[exu_div_ctl.scala 846:83]
+    node _T_538 = bits(quotient_raw, 15, 3) @[exu_div_ctl.scala 846:48]
+    node _T_539 = mux(UInt<1>("h00"), UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12]
+    node _T_540 = cat(_T_539, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_541 = eq(_T_538, _T_540) @[exu_div_ctl.scala 846:54]
+    node _T_542 = bits(_T_541, 0, 0) @[exu_div_ctl.scala 846:83]
+    node _T_543 = bits(quotient_raw, 15, 5) @[exu_div_ctl.scala 846:48]
+    node _T_544 = mux(UInt<1>("h00"), UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
+    node _T_545 = cat(_T_544, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_546 = eq(_T_543, _T_545) @[exu_div_ctl.scala 846:54]
+    node _T_547 = bits(_T_546, 0, 0) @[exu_div_ctl.scala 846:83]
+    node _T_548 = bits(quotient_raw, 15, 7) @[exu_div_ctl.scala 846:48]
+    node _T_549 = mux(UInt<1>("h00"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
+    node _T_550 = cat(_T_549, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_551 = eq(_T_548, _T_550) @[exu_div_ctl.scala 846:54]
+    node _T_552 = bits(_T_551, 0, 0) @[exu_div_ctl.scala 846:83]
+    node _T_553 = bits(quotient_raw, 15, 9) @[exu_div_ctl.scala 846:48]
+    node _T_554 = mux(UInt<1>("h00"), UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
+    node _T_555 = cat(_T_554, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_556 = eq(_T_553, _T_555) @[exu_div_ctl.scala 846:54]
+    node _T_557 = bits(_T_556, 0, 0) @[exu_div_ctl.scala 846:83]
+    node _T_558 = bits(quotient_raw, 15, 11) @[exu_div_ctl.scala 846:48]
+    node _T_559 = mux(UInt<1>("h00"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
+    node _T_560 = cat(_T_559, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_561 = eq(_T_558, _T_560) @[exu_div_ctl.scala 846:54]
+    node _T_562 = bits(_T_561, 0, 0) @[exu_div_ctl.scala 846:83]
+    node _T_563 = bits(quotient_raw, 15, 13) @[exu_div_ctl.scala 846:48]
+    node _T_564 = mux(UInt<1>("h00"), UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
+    node _T_565 = cat(_T_564, UInt<1>("h01")) @[Cat.scala 29:58]
+    node _T_566 = eq(_T_563, _T_565) @[exu_div_ctl.scala 846:54]
+    node _T_567 = bits(_T_566, 0, 0) @[exu_div_ctl.scala 846:83]
+    node _T_568 = mux(_T_537, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_569 = mux(_T_542, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_570 = mux(_T_547, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_571 = mux(_T_552, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_572 = mux(_T_557, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_573 = mux(_T_562, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_574 = mux(_T_567, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_575 = or(_T_568, _T_569) @[Mux.scala 27:72]
+    node _T_576 = or(_T_575, _T_570) @[Mux.scala 27:72]
+    node _T_577 = or(_T_576, _T_571) @[Mux.scala 27:72]
+    node _T_578 = or(_T_577, _T_572) @[Mux.scala 27:72]
+    node _T_579 = or(_T_578, _T_573) @[Mux.scala 27:72]
+    node _T_580 = or(_T_579, _T_574) @[Mux.scala 27:72]
+    wire _T_581 : UInt<1> @[Mux.scala 27:72]
+    _T_581 <= _T_580 @[Mux.scala 27:72]
+    node _T_582 = bits(quotient_raw, 15, 15) @[exu_div_ctl.scala 846:114]
+    node _T_583 = eq(_T_582, UInt<1>("h01")) @[exu_div_ctl.scala 846:118]
+    node _T_584 = or(_T_581, _T_583) @[exu_div_ctl.scala 846:99]
+    node _T_585 = cat(_T_532, _T_584) @[Cat.scala 29:58]
+    node _T_586 = cat(_T_486, _T_509) @[Cat.scala 29:58]
+    node _T_587 = cat(_T_586, _T_585) @[Cat.scala 29:58]
+    quotient_new <= _T_587 @[exu_div_ctl.scala 835:16]
+    node _T_588 = bits(b_ff, 31, 0) @[exu_div_ctl.scala 849:48]
+    node _T_589 = mux(twos_comp_q_sel, q_ff, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_590 = mux(twos_comp_b_sel, _T_588, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_591 = or(_T_589, _T_590) @[Mux.scala 27:72]
+    wire twos_comp_in : UInt<32> @[Mux.scala 27:72]
+    twos_comp_in <= _T_591 @[Mux.scala 27:72]
+    wire _T_592 : UInt<1>[31] @[lib.scala 426:20]
+    node _T_593 = bits(twos_comp_in, 0, 0) @[lib.scala 428:27]
+    node _T_594 = orr(_T_593) @[lib.scala 428:35]
+    node _T_595 = bits(twos_comp_in, 1, 1) @[lib.scala 428:44]
+    node _T_596 = not(_T_595) @[lib.scala 428:40]
+    node _T_597 = bits(twos_comp_in, 1, 1) @[lib.scala 428:51]
+    node _T_598 = mux(_T_594, _T_596, _T_597) @[lib.scala 428:23]
+    _T_592[0] <= _T_598 @[lib.scala 428:17]
+    node _T_599 = bits(twos_comp_in, 1, 0) @[lib.scala 428:27]
+    node _T_600 = orr(_T_599) @[lib.scala 428:35]
+    node _T_601 = bits(twos_comp_in, 2, 2) @[lib.scala 428:44]
+    node _T_602 = not(_T_601) @[lib.scala 428:40]
+    node _T_603 = bits(twos_comp_in, 2, 2) @[lib.scala 428:51]
+    node _T_604 = mux(_T_600, _T_602, _T_603) @[lib.scala 428:23]
+    _T_592[1] <= _T_604 @[lib.scala 428:17]
+    node _T_605 = bits(twos_comp_in, 2, 0) @[lib.scala 428:27]
+    node _T_606 = orr(_T_605) @[lib.scala 428:35]
+    node _T_607 = bits(twos_comp_in, 3, 3) @[lib.scala 428:44]
+    node _T_608 = not(_T_607) @[lib.scala 428:40]
+    node _T_609 = bits(twos_comp_in, 3, 3) @[lib.scala 428:51]
+    node _T_610 = mux(_T_606, _T_608, _T_609) @[lib.scala 428:23]
+    _T_592[2] <= _T_610 @[lib.scala 428:17]
+    node _T_611 = bits(twos_comp_in, 3, 0) @[lib.scala 428:27]
+    node _T_612 = orr(_T_611) @[lib.scala 428:35]
+    node _T_613 = bits(twos_comp_in, 4, 4) @[lib.scala 428:44]
+    node _T_614 = not(_T_613) @[lib.scala 428:40]
+    node _T_615 = bits(twos_comp_in, 4, 4) @[lib.scala 428:51]
+    node _T_616 = mux(_T_612, _T_614, _T_615) @[lib.scala 428:23]
+    _T_592[3] <= _T_616 @[lib.scala 428:17]
+    node _T_617 = bits(twos_comp_in, 4, 0) @[lib.scala 428:27]
+    node _T_618 = orr(_T_617) @[lib.scala 428:35]
+    node _T_619 = bits(twos_comp_in, 5, 5) @[lib.scala 428:44]
+    node _T_620 = not(_T_619) @[lib.scala 428:40]
+    node _T_621 = bits(twos_comp_in, 5, 5) @[lib.scala 428:51]
+    node _T_622 = mux(_T_618, _T_620, _T_621) @[lib.scala 428:23]
+    _T_592[4] <= _T_622 @[lib.scala 428:17]
+    node _T_623 = bits(twos_comp_in, 5, 0) @[lib.scala 428:27]
+    node _T_624 = orr(_T_623) @[lib.scala 428:35]
+    node _T_625 = bits(twos_comp_in, 6, 6) @[lib.scala 428:44]
+    node _T_626 = not(_T_625) @[lib.scala 428:40]
+    node _T_627 = bits(twos_comp_in, 6, 6) @[lib.scala 428:51]
+    node _T_628 = mux(_T_624, _T_626, _T_627) @[lib.scala 428:23]
+    _T_592[5] <= _T_628 @[lib.scala 428:17]
+    node _T_629 = bits(twos_comp_in, 6, 0) @[lib.scala 428:27]
+    node _T_630 = orr(_T_629) @[lib.scala 428:35]
+    node _T_631 = bits(twos_comp_in, 7, 7) @[lib.scala 428:44]
+    node _T_632 = not(_T_631) @[lib.scala 428:40]
+    node _T_633 = bits(twos_comp_in, 7, 7) @[lib.scala 428:51]
+    node _T_634 = mux(_T_630, _T_632, _T_633) @[lib.scala 428:23]
+    _T_592[6] <= _T_634 @[lib.scala 428:17]
+    node _T_635 = bits(twos_comp_in, 7, 0) @[lib.scala 428:27]
+    node _T_636 = orr(_T_635) @[lib.scala 428:35]
+    node _T_637 = bits(twos_comp_in, 8, 8) @[lib.scala 428:44]
+    node _T_638 = not(_T_637) @[lib.scala 428:40]
+    node _T_639 = bits(twos_comp_in, 8, 8) @[lib.scala 428:51]
+    node _T_640 = mux(_T_636, _T_638, _T_639) @[lib.scala 428:23]
+    _T_592[7] <= _T_640 @[lib.scala 428:17]
+    node _T_641 = bits(twos_comp_in, 8, 0) @[lib.scala 428:27]
+    node _T_642 = orr(_T_641) @[lib.scala 428:35]
+    node _T_643 = bits(twos_comp_in, 9, 9) @[lib.scala 428:44]
+    node _T_644 = not(_T_643) @[lib.scala 428:40]
+    node _T_645 = bits(twos_comp_in, 9, 9) @[lib.scala 428:51]
+    node _T_646 = mux(_T_642, _T_644, _T_645) @[lib.scala 428:23]
+    _T_592[8] <= _T_646 @[lib.scala 428:17]
+    node _T_647 = bits(twos_comp_in, 9, 0) @[lib.scala 428:27]
+    node _T_648 = orr(_T_647) @[lib.scala 428:35]
+    node _T_649 = bits(twos_comp_in, 10, 10) @[lib.scala 428:44]
+    node _T_650 = not(_T_649) @[lib.scala 428:40]
+    node _T_651 = bits(twos_comp_in, 10, 10) @[lib.scala 428:51]
+    node _T_652 = mux(_T_648, _T_650, _T_651) @[lib.scala 428:23]
+    _T_592[9] <= _T_652 @[lib.scala 428:17]
+    node _T_653 = bits(twos_comp_in, 10, 0) @[lib.scala 428:27]
+    node _T_654 = orr(_T_653) @[lib.scala 428:35]
+    node _T_655 = bits(twos_comp_in, 11, 11) @[lib.scala 428:44]
+    node _T_656 = not(_T_655) @[lib.scala 428:40]
+    node _T_657 = bits(twos_comp_in, 11, 11) @[lib.scala 428:51]
+    node _T_658 = mux(_T_654, _T_656, _T_657) @[lib.scala 428:23]
+    _T_592[10] <= _T_658 @[lib.scala 428:17]
+    node _T_659 = bits(twos_comp_in, 11, 0) @[lib.scala 428:27]
+    node _T_660 = orr(_T_659) @[lib.scala 428:35]
+    node _T_661 = bits(twos_comp_in, 12, 12) @[lib.scala 428:44]
+    node _T_662 = not(_T_661) @[lib.scala 428:40]
+    node _T_663 = bits(twos_comp_in, 12, 12) @[lib.scala 428:51]
+    node _T_664 = mux(_T_660, _T_662, _T_663) @[lib.scala 428:23]
+    _T_592[11] <= _T_664 @[lib.scala 428:17]
+    node _T_665 = bits(twos_comp_in, 12, 0) @[lib.scala 428:27]
+    node _T_666 = orr(_T_665) @[lib.scala 428:35]
+    node _T_667 = bits(twos_comp_in, 13, 13) @[lib.scala 428:44]
+    node _T_668 = not(_T_667) @[lib.scala 428:40]
+    node _T_669 = bits(twos_comp_in, 13, 13) @[lib.scala 428:51]
+    node _T_670 = mux(_T_666, _T_668, _T_669) @[lib.scala 428:23]
+    _T_592[12] <= _T_670 @[lib.scala 428:17]
+    node _T_671 = bits(twos_comp_in, 13, 0) @[lib.scala 428:27]
+    node _T_672 = orr(_T_671) @[lib.scala 428:35]
+    node _T_673 = bits(twos_comp_in, 14, 14) @[lib.scala 428:44]
+    node _T_674 = not(_T_673) @[lib.scala 428:40]
+    node _T_675 = bits(twos_comp_in, 14, 14) @[lib.scala 428:51]
+    node _T_676 = mux(_T_672, _T_674, _T_675) @[lib.scala 428:23]
+    _T_592[13] <= _T_676 @[lib.scala 428:17]
+    node _T_677 = bits(twos_comp_in, 14, 0) @[lib.scala 428:27]
+    node _T_678 = orr(_T_677) @[lib.scala 428:35]
+    node _T_679 = bits(twos_comp_in, 15, 15) @[lib.scala 428:44]
+    node _T_680 = not(_T_679) @[lib.scala 428:40]
+    node _T_681 = bits(twos_comp_in, 15, 15) @[lib.scala 428:51]
+    node _T_682 = mux(_T_678, _T_680, _T_681) @[lib.scala 428:23]
+    _T_592[14] <= _T_682 @[lib.scala 428:17]
+    node _T_683 = bits(twos_comp_in, 15, 0) @[lib.scala 428:27]
+    node _T_684 = orr(_T_683) @[lib.scala 428:35]
+    node _T_685 = bits(twos_comp_in, 16, 16) @[lib.scala 428:44]
+    node _T_686 = not(_T_685) @[lib.scala 428:40]
+    node _T_687 = bits(twos_comp_in, 16, 16) @[lib.scala 428:51]
+    node _T_688 = mux(_T_684, _T_686, _T_687) @[lib.scala 428:23]
+    _T_592[15] <= _T_688 @[lib.scala 428:17]
+    node _T_689 = bits(twos_comp_in, 16, 0) @[lib.scala 428:27]
+    node _T_690 = orr(_T_689) @[lib.scala 428:35]
+    node _T_691 = bits(twos_comp_in, 17, 17) @[lib.scala 428:44]
+    node _T_692 = not(_T_691) @[lib.scala 428:40]
+    node _T_693 = bits(twos_comp_in, 17, 17) @[lib.scala 428:51]
+    node _T_694 = mux(_T_690, _T_692, _T_693) @[lib.scala 428:23]
+    _T_592[16] <= _T_694 @[lib.scala 428:17]
+    node _T_695 = bits(twos_comp_in, 17, 0) @[lib.scala 428:27]
+    node _T_696 = orr(_T_695) @[lib.scala 428:35]
+    node _T_697 = bits(twos_comp_in, 18, 18) @[lib.scala 428:44]
+    node _T_698 = not(_T_697) @[lib.scala 428:40]
+    node _T_699 = bits(twos_comp_in, 18, 18) @[lib.scala 428:51]
+    node _T_700 = mux(_T_696, _T_698, _T_699) @[lib.scala 428:23]
+    _T_592[17] <= _T_700 @[lib.scala 428:17]
+    node _T_701 = bits(twos_comp_in, 18, 0) @[lib.scala 428:27]
+    node _T_702 = orr(_T_701) @[lib.scala 428:35]
+    node _T_703 = bits(twos_comp_in, 19, 19) @[lib.scala 428:44]
+    node _T_704 = not(_T_703) @[lib.scala 428:40]
+    node _T_705 = bits(twos_comp_in, 19, 19) @[lib.scala 428:51]
+    node _T_706 = mux(_T_702, _T_704, _T_705) @[lib.scala 428:23]
+    _T_592[18] <= _T_706 @[lib.scala 428:17]
+    node _T_707 = bits(twos_comp_in, 19, 0) @[lib.scala 428:27]
+    node _T_708 = orr(_T_707) @[lib.scala 428:35]
+    node _T_709 = bits(twos_comp_in, 20, 20) @[lib.scala 428:44]
+    node _T_710 = not(_T_709) @[lib.scala 428:40]
+    node _T_711 = bits(twos_comp_in, 20, 20) @[lib.scala 428:51]
+    node _T_712 = mux(_T_708, _T_710, _T_711) @[lib.scala 428:23]
+    _T_592[19] <= _T_712 @[lib.scala 428:17]
+    node _T_713 = bits(twos_comp_in, 20, 0) @[lib.scala 428:27]
+    node _T_714 = orr(_T_713) @[lib.scala 428:35]
+    node _T_715 = bits(twos_comp_in, 21, 21) @[lib.scala 428:44]
+    node _T_716 = not(_T_715) @[lib.scala 428:40]
+    node _T_717 = bits(twos_comp_in, 21, 21) @[lib.scala 428:51]
+    node _T_718 = mux(_T_714, _T_716, _T_717) @[lib.scala 428:23]
+    _T_592[20] <= _T_718 @[lib.scala 428:17]
+    node _T_719 = bits(twos_comp_in, 21, 0) @[lib.scala 428:27]
+    node _T_720 = orr(_T_719) @[lib.scala 428:35]
+    node _T_721 = bits(twos_comp_in, 22, 22) @[lib.scala 428:44]
+    node _T_722 = not(_T_721) @[lib.scala 428:40]
+    node _T_723 = bits(twos_comp_in, 22, 22) @[lib.scala 428:51]
+    node _T_724 = mux(_T_720, _T_722, _T_723) @[lib.scala 428:23]
+    _T_592[21] <= _T_724 @[lib.scala 428:17]
+    node _T_725 = bits(twos_comp_in, 22, 0) @[lib.scala 428:27]
+    node _T_726 = orr(_T_725) @[lib.scala 428:35]
+    node _T_727 = bits(twos_comp_in, 23, 23) @[lib.scala 428:44]
+    node _T_728 = not(_T_727) @[lib.scala 428:40]
+    node _T_729 = bits(twos_comp_in, 23, 23) @[lib.scala 428:51]
+    node _T_730 = mux(_T_726, _T_728, _T_729) @[lib.scala 428:23]
+    _T_592[22] <= _T_730 @[lib.scala 428:17]
+    node _T_731 = bits(twos_comp_in, 23, 0) @[lib.scala 428:27]
+    node _T_732 = orr(_T_731) @[lib.scala 428:35]
+    node _T_733 = bits(twos_comp_in, 24, 24) @[lib.scala 428:44]
+    node _T_734 = not(_T_733) @[lib.scala 428:40]
+    node _T_735 = bits(twos_comp_in, 24, 24) @[lib.scala 428:51]
+    node _T_736 = mux(_T_732, _T_734, _T_735) @[lib.scala 428:23]
+    _T_592[23] <= _T_736 @[lib.scala 428:17]
+    node _T_737 = bits(twos_comp_in, 24, 0) @[lib.scala 428:27]
+    node _T_738 = orr(_T_737) @[lib.scala 428:35]
+    node _T_739 = bits(twos_comp_in, 25, 25) @[lib.scala 428:44]
+    node _T_740 = not(_T_739) @[lib.scala 428:40]
+    node _T_741 = bits(twos_comp_in, 25, 25) @[lib.scala 428:51]
+    node _T_742 = mux(_T_738, _T_740, _T_741) @[lib.scala 428:23]
+    _T_592[24] <= _T_742 @[lib.scala 428:17]
+    node _T_743 = bits(twos_comp_in, 25, 0) @[lib.scala 428:27]
+    node _T_744 = orr(_T_743) @[lib.scala 428:35]
+    node _T_745 = bits(twos_comp_in, 26, 26) @[lib.scala 428:44]
+    node _T_746 = not(_T_745) @[lib.scala 428:40]
+    node _T_747 = bits(twos_comp_in, 26, 26) @[lib.scala 428:51]
+    node _T_748 = mux(_T_744, _T_746, _T_747) @[lib.scala 428:23]
+    _T_592[25] <= _T_748 @[lib.scala 428:17]
+    node _T_749 = bits(twos_comp_in, 26, 0) @[lib.scala 428:27]
+    node _T_750 = orr(_T_749) @[lib.scala 428:35]
+    node _T_751 = bits(twos_comp_in, 27, 27) @[lib.scala 428:44]
+    node _T_752 = not(_T_751) @[lib.scala 428:40]
+    node _T_753 = bits(twos_comp_in, 27, 27) @[lib.scala 428:51]
+    node _T_754 = mux(_T_750, _T_752, _T_753) @[lib.scala 428:23]
+    _T_592[26] <= _T_754 @[lib.scala 428:17]
+    node _T_755 = bits(twos_comp_in, 27, 0) @[lib.scala 428:27]
+    node _T_756 = orr(_T_755) @[lib.scala 428:35]
+    node _T_757 = bits(twos_comp_in, 28, 28) @[lib.scala 428:44]
+    node _T_758 = not(_T_757) @[lib.scala 428:40]
+    node _T_759 = bits(twos_comp_in, 28, 28) @[lib.scala 428:51]
+    node _T_760 = mux(_T_756, _T_758, _T_759) @[lib.scala 428:23]
+    _T_592[27] <= _T_760 @[lib.scala 428:17]
+    node _T_761 = bits(twos_comp_in, 28, 0) @[lib.scala 428:27]
+    node _T_762 = orr(_T_761) @[lib.scala 428:35]
+    node _T_763 = bits(twos_comp_in, 29, 29) @[lib.scala 428:44]
+    node _T_764 = not(_T_763) @[lib.scala 428:40]
+    node _T_765 = bits(twos_comp_in, 29, 29) @[lib.scala 428:51]
+    node _T_766 = mux(_T_762, _T_764, _T_765) @[lib.scala 428:23]
+    _T_592[28] <= _T_766 @[lib.scala 428:17]
+    node _T_767 = bits(twos_comp_in, 29, 0) @[lib.scala 428:27]
+    node _T_768 = orr(_T_767) @[lib.scala 428:35]
+    node _T_769 = bits(twos_comp_in, 30, 30) @[lib.scala 428:44]
+    node _T_770 = not(_T_769) @[lib.scala 428:40]
+    node _T_771 = bits(twos_comp_in, 30, 30) @[lib.scala 428:51]
+    node _T_772 = mux(_T_768, _T_770, _T_771) @[lib.scala 428:23]
+    _T_592[29] <= _T_772 @[lib.scala 428:17]
+    node _T_773 = bits(twos_comp_in, 30, 0) @[lib.scala 428:27]
+    node _T_774 = orr(_T_773) @[lib.scala 428:35]
+    node _T_775 = bits(twos_comp_in, 31, 31) @[lib.scala 428:44]
+    node _T_776 = not(_T_775) @[lib.scala 428:40]
+    node _T_777 = bits(twos_comp_in, 31, 31) @[lib.scala 428:51]
+    node _T_778 = mux(_T_774, _T_776, _T_777) @[lib.scala 428:23]
+    _T_592[30] <= _T_778 @[lib.scala 428:17]
+    node _T_779 = cat(_T_592[2], _T_592[1]) @[lib.scala 430:14]
+    node _T_780 = cat(_T_779, _T_592[0]) @[lib.scala 430:14]
+    node _T_781 = cat(_T_592[4], _T_592[3]) @[lib.scala 430:14]
+    node _T_782 = cat(_T_592[6], _T_592[5]) @[lib.scala 430:14]
+    node _T_783 = cat(_T_782, _T_781) @[lib.scala 430:14]
+    node _T_784 = cat(_T_783, _T_780) @[lib.scala 430:14]
+    node _T_785 = cat(_T_592[8], _T_592[7]) @[lib.scala 430:14]
+    node _T_786 = cat(_T_592[10], _T_592[9]) @[lib.scala 430:14]
+    node _T_787 = cat(_T_786, _T_785) @[lib.scala 430:14]
+    node _T_788 = cat(_T_592[12], _T_592[11]) @[lib.scala 430:14]
+    node _T_789 = cat(_T_592[14], _T_592[13]) @[lib.scala 430:14]
+    node _T_790 = cat(_T_789, _T_788) @[lib.scala 430:14]
+    node _T_791 = cat(_T_790, _T_787) @[lib.scala 430:14]
+    node _T_792 = cat(_T_791, _T_784) @[lib.scala 430:14]
+    node _T_793 = cat(_T_592[16], _T_592[15]) @[lib.scala 430:14]
+    node _T_794 = cat(_T_592[18], _T_592[17]) @[lib.scala 430:14]
+    node _T_795 = cat(_T_794, _T_793) @[lib.scala 430:14]
+    node _T_796 = cat(_T_592[20], _T_592[19]) @[lib.scala 430:14]
+    node _T_797 = cat(_T_592[22], _T_592[21]) @[lib.scala 430:14]
+    node _T_798 = cat(_T_797, _T_796) @[lib.scala 430:14]
+    node _T_799 = cat(_T_798, _T_795) @[lib.scala 430:14]
+    node _T_800 = cat(_T_592[24], _T_592[23]) @[lib.scala 430:14]
+    node _T_801 = cat(_T_592[26], _T_592[25]) @[lib.scala 430:14]
+    node _T_802 = cat(_T_801, _T_800) @[lib.scala 430:14]
+    node _T_803 = cat(_T_592[28], _T_592[27]) @[lib.scala 430:14]
+    node _T_804 = cat(_T_592[30], _T_592[29]) @[lib.scala 430:14]
+    node _T_805 = cat(_T_804, _T_803) @[lib.scala 430:14]
+    node _T_806 = cat(_T_805, _T_802) @[lib.scala 430:14]
+    node _T_807 = cat(_T_806, _T_799) @[lib.scala 430:14]
+    node _T_808 = cat(_T_807, _T_792) @[lib.scala 430:14]
+    node _T_809 = bits(twos_comp_in, 0, 0) @[lib.scala 430:24]
+    node twos_comp_out = cat(_T_808, _T_809) @[Cat.scala 29:58]
+    node _T_810 = eq(a_shift, UInt<1>("h00")) @[exu_div_ctl.scala 853:6]
+    node _T_811 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 853:17]
+    node _T_812 = and(_T_810, _T_811) @[exu_div_ctl.scala 853:15]
+    node _T_813 = bits(_T_812, 0, 0) @[exu_div_ctl.scala 853:36]
+    node _T_814 = bits(io.dividend_in, 31, 0) @[exu_div_ctl.scala 853:60]
+    node _T_815 = bits(a_ff, 27, 0) @[exu_div_ctl.scala 854:53]
+    node _T_816 = cat(_T_815, UInt<4>("h00")) @[Cat.scala 29:58]
+    node _T_817 = bits(ar_shifted, 31, 0) @[exu_div_ctl.scala 855:55]
+    node _T_818 = mux(_T_813, _T_814, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_819 = mux(a_shift, _T_816, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_820 = mux(shortq_enable_ff, _T_817, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_821 = or(_T_818, _T_819) @[Mux.scala 27:72]
+    node _T_822 = or(_T_821, _T_820) @[Mux.scala 27:72]
+    wire a_in : UInt<32> @[Mux.scala 27:72]
+    a_in <= _T_822 @[Mux.scala 27:72]
+    node _T_823 = eq(b_twos_comp, UInt<1>("h00")) @[exu_div_ctl.scala 858:5]
+    node _T_824 = bits(io.divisor_in, 31, 31) @[exu_div_ctl.scala 858:78]
+    node _T_825 = and(io.signed_in, _T_824) @[exu_div_ctl.scala 858:63]
+    node _T_826 = bits(io.divisor_in, 31, 0) @[exu_div_ctl.scala 858:96]
+    node _T_827 = cat(_T_825, _T_826) @[Cat.scala 29:58]
+    node _T_828 = eq(divisor_sign_ff, UInt<1>("h00")) @[exu_div_ctl.scala 859:49]
+    node _T_829 = bits(twos_comp_out, 31, 0) @[exu_div_ctl.scala 859:79]
+    node _T_830 = cat(_T_828, _T_829) @[Cat.scala 29:58]
+    node _T_831 = mux(_T_823, _T_827, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_832 = mux(b_twos_comp, _T_830, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_833 = or(_T_831, _T_832) @[Mux.scala 27:72]
+    wire b_in : UInt<33> @[Mux.scala 27:72]
+    b_in <= _T_833 @[Mux.scala 27:72]
+    node _T_834 = mux(UInt<1>("h01"), UInt<33>("h01ffffffff"), UInt<33>("h00")) @[Bitwise.scala 72:12]
+    node _T_835 = bits(r_ff, 28, 0) @[exu_div_ctl.scala 863:54]
+    node _T_836 = bits(a_ff, 31, 28) @[exu_div_ctl.scala 863:65]
+    node _T_837 = cat(_T_835, _T_836) @[Cat.scala 29:58]
+    node _T_838 = bits(adder1_out, 32, 0) @[exu_div_ctl.scala 864:56]
+    node _T_839 = bits(adder2_out, 32, 0) @[exu_div_ctl.scala 865:56]
+    node _T_840 = bits(adder3_out, 32, 0) @[exu_div_ctl.scala 866:56]
+    node _T_841 = bits(adder4_out, 32, 0) @[exu_div_ctl.scala 867:56]
+    node _T_842 = bits(adder5_out, 32, 0) @[exu_div_ctl.scala 868:56]
+    node _T_843 = bits(adder6_out, 32, 0) @[exu_div_ctl.scala 869:56]
+    node _T_844 = bits(adder7_out, 32, 0) @[exu_div_ctl.scala 870:56]
+    node _T_845 = bits(adder8_out, 32, 0) @[exu_div_ctl.scala 871:56]
+    node _T_846 = bits(adder9_out, 32, 0) @[exu_div_ctl.scala 872:56]
+    node _T_847 = bits(adder10_out, 32, 0) @[exu_div_ctl.scala 873:57]
+    node _T_848 = bits(adder11_out, 32, 0) @[exu_div_ctl.scala 874:57]
+    node _T_849 = bits(adder12_out, 32, 0) @[exu_div_ctl.scala 875:57]
+    node _T_850 = bits(adder13_out, 32, 0) @[exu_div_ctl.scala 876:57]
+    node _T_851 = bits(adder14_out, 32, 0) @[exu_div_ctl.scala 877:57]
+    node _T_852 = bits(adder15_out, 32, 0) @[exu_div_ctl.scala 878:57]
+    node _T_853 = bits(ar_shifted, 64, 32) @[exu_div_ctl.scala 879:56]
+    node _T_854 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 880:58]
+    node _T_855 = cat(UInt<1>("h00"), _T_854) @[Cat.scala 29:58]
+    node _T_856 = mux(r_sign_sel, _T_834, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_857 = mux(r_adder_sel_0, _T_837, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_858 = mux(r_adder_sel_1, _T_838, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_859 = mux(r_adder_sel_2, _T_839, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_860 = mux(r_adder_sel_3, _T_840, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_861 = mux(r_adder_sel_4, _T_841, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_862 = mux(r_adder_sel_5, _T_842, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_863 = mux(r_adder_sel_6, _T_843, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_864 = mux(r_adder_sel_7, _T_844, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_865 = mux(r_adder_sel_8, _T_845, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_866 = mux(r_adder_sel_9, _T_846, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_867 = mux(r_adder_sel_10, _T_847, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_868 = mux(r_adder_sel_11, _T_848, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_869 = mux(r_adder_sel_12, _T_849, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_870 = mux(r_adder_sel_13, _T_850, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_871 = mux(r_adder_sel_14, _T_851, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_872 = mux(r_adder_sel_15, _T_852, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_873 = mux(shortq_enable_ff, _T_853, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_874 = mux(by_zero_case, _T_855, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_875 = or(_T_856, _T_857) @[Mux.scala 27:72]
+    node _T_876 = or(_T_875, _T_858) @[Mux.scala 27:72]
+    node _T_877 = or(_T_876, _T_859) @[Mux.scala 27:72]
+    node _T_878 = or(_T_877, _T_860) @[Mux.scala 27:72]
+    node _T_879 = or(_T_878, _T_861) @[Mux.scala 27:72]
+    node _T_880 = or(_T_879, _T_862) @[Mux.scala 27:72]
+    node _T_881 = or(_T_880, _T_863) @[Mux.scala 27:72]
+    node _T_882 = or(_T_881, _T_864) @[Mux.scala 27:72]
+    node _T_883 = or(_T_882, _T_865) @[Mux.scala 27:72]
+    node _T_884 = or(_T_883, _T_866) @[Mux.scala 27:72]
+    node _T_885 = or(_T_884, _T_867) @[Mux.scala 27:72]
+    node _T_886 = or(_T_885, _T_868) @[Mux.scala 27:72]
+    node _T_887 = or(_T_886, _T_869) @[Mux.scala 27:72]
+    node _T_888 = or(_T_887, _T_870) @[Mux.scala 27:72]
+    node _T_889 = or(_T_888, _T_871) @[Mux.scala 27:72]
+    node _T_890 = or(_T_889, _T_872) @[Mux.scala 27:72]
+    node _T_891 = or(_T_890, _T_873) @[Mux.scala 27:72]
+    node _T_892 = or(_T_891, _T_874) @[Mux.scala 27:72]
+    wire r_in : UInt<33> @[Mux.scala 27:72]
+    r_in <= _T_892 @[Mux.scala 27:72]
+    node _T_893 = eq(valid_ff, UInt<1>("h00")) @[exu_div_ctl.scala 883:5]
+    node _T_894 = bits(q_ff, 27, 0) @[exu_div_ctl.scala 883:55]
+    node _T_895 = cat(_T_894, quotient_new) @[Cat.scala 29:58]
+    node _T_896 = cat(UInt<28>("h00"), smallnum) @[Cat.scala 29:58]
+    node _T_897 = mux(UInt<1>("h01"), UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
+    node _T_898 = mux(_T_893, _T_895, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_899 = mux(smallnum_case, _T_896, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_900 = mux(by_zero_case, _T_897, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_901 = or(_T_898, _T_899) @[Mux.scala 27:72]
+    node _T_902 = or(_T_901, _T_900) @[Mux.scala 27:72]
+    wire q_in : UInt<32> @[Mux.scala 27:72]
+    q_in <= _T_902 @[Mux.scala 27:72]
+    node _T_903 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 887:31]
+    node _T_904 = and(finish_ff, _T_903) @[exu_div_ctl.scala 887:29]
+    io.valid_out <= _T_904 @[exu_div_ctl.scala 887:16]
+    node _T_905 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 889:6]
+    node _T_906 = eq(twos_comp_q_sel, UInt<1>("h00")) @[exu_div_ctl.scala 889:16]
+    node _T_907 = and(_T_905, _T_906) @[exu_div_ctl.scala 889:14]
+    node _T_908 = bits(_T_907, 0, 0) @[exu_div_ctl.scala 889:40]
+    node _T_909 = bits(r_ff, 31, 0) @[exu_div_ctl.scala 890:48]
+    node _T_910 = mux(_T_908, q_ff, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_911 = mux(rem_ff, _T_909, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_912 = mux(twos_comp_q_sel, twos_comp_out, UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_913 = or(_T_910, _T_911) @[Mux.scala 27:72]
+    node _T_914 = or(_T_913, _T_912) @[Mux.scala 27:72]
+    wire _T_915 : UInt<32> @[Mux.scala 27:72]
+    _T_915 <= _T_914 @[Mux.scala 27:72]
+    io.data_out <= _T_915 @[exu_div_ctl.scala 888:15]
+    node _T_916 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_917 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_918 = eq(_T_917, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_919 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_920 = eq(_T_919, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_921 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_922 = eq(_T_921, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_923 = and(_T_918, _T_920) @[exu_div_ctl.scala 895:95]
+    node _T_924 = and(_T_923, _T_922) @[exu_div_ctl.scala 895:95]
+    node _T_925 = and(_T_916, _T_924) @[exu_div_ctl.scala 896:11]
+    node _T_926 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_927 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_928 = eq(_T_927, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_929 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_930 = eq(_T_929, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_931 = and(_T_928, _T_930) @[exu_div_ctl.scala 895:95]
+    node _T_932 = and(_T_926, _T_931) @[exu_div_ctl.scala 896:11]
+    node _T_933 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 901:38]
+    node _T_934 = eq(_T_933, UInt<1>("h00")) @[exu_div_ctl.scala 901:33]
+    node _T_935 = and(_T_932, _T_934) @[exu_div_ctl.scala 901:31]
+    node _T_936 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_937 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_938 = eq(_T_937, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_939 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_940 = eq(_T_939, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_941 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_942 = eq(_T_941, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_943 = and(_T_938, _T_940) @[exu_div_ctl.scala 895:95]
+    node _T_944 = and(_T_943, _T_942) @[exu_div_ctl.scala 895:95]
+    node _T_945 = and(_T_936, _T_944) @[exu_div_ctl.scala 896:11]
+    node _T_946 = or(_T_935, _T_945) @[exu_div_ctl.scala 901:42]
+    node _T_947 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_948 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_949 = and(_T_947, _T_948) @[exu_div_ctl.scala 894:95]
+    node _T_950 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_951 = eq(_T_950, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_952 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_953 = eq(_T_952, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_954 = and(_T_951, _T_953) @[exu_div_ctl.scala 895:95]
+    node _T_955 = and(_T_949, _T_954) @[exu_div_ctl.scala 896:11]
+    node _T_956 = or(_T_946, _T_955) @[exu_div_ctl.scala 901:75]
+    node _T_957 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_958 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_959 = eq(_T_958, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_960 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_961 = eq(_T_960, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_962 = and(_T_959, _T_961) @[exu_div_ctl.scala 895:95]
+    node _T_963 = and(_T_957, _T_962) @[exu_div_ctl.scala 896:11]
+    node _T_964 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 903:38]
+    node _T_965 = eq(_T_964, UInt<1>("h00")) @[exu_div_ctl.scala 903:33]
+    node _T_966 = and(_T_963, _T_965) @[exu_div_ctl.scala 903:31]
+    node _T_967 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_968 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_969 = eq(_T_968, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_970 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_971 = eq(_T_970, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_972 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_973 = eq(_T_972, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_974 = and(_T_969, _T_971) @[exu_div_ctl.scala 895:95]
+    node _T_975 = and(_T_974, _T_973) @[exu_div_ctl.scala 895:95]
+    node _T_976 = and(_T_967, _T_975) @[exu_div_ctl.scala 896:11]
+    node _T_977 = or(_T_966, _T_976) @[exu_div_ctl.scala 903:42]
+    node _T_978 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_979 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_980 = eq(_T_979, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_981 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_982 = eq(_T_981, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_983 = and(_T_980, _T_982) @[exu_div_ctl.scala 895:95]
+    node _T_984 = and(_T_978, _T_983) @[exu_div_ctl.scala 896:11]
+    node _T_985 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 903:113]
+    node _T_986 = eq(_T_985, UInt<1>("h00")) @[exu_div_ctl.scala 903:108]
+    node _T_987 = and(_T_984, _T_986) @[exu_div_ctl.scala 903:106]
+    node _T_988 = or(_T_977, _T_987) @[exu_div_ctl.scala 903:78]
+    node _T_989 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_990 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:75]
+    node _T_991 = eq(_T_990, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_992 = and(_T_989, _T_991) @[exu_div_ctl.scala 894:95]
+    node _T_993 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_994 = eq(_T_993, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_995 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_996 = eq(_T_995, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_997 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:58]
+    node _T_998 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 895:58]
+    node _T_999 = and(_T_994, _T_996) @[exu_div_ctl.scala 895:95]
+    node _T_1000 = and(_T_999, _T_997) @[exu_div_ctl.scala 895:95]
+    node _T_1001 = and(_T_1000, _T_998) @[exu_div_ctl.scala 895:95]
+    node _T_1002 = and(_T_992, _T_1001) @[exu_div_ctl.scala 896:11]
+    node _T_1003 = or(_T_988, _T_1002) @[exu_div_ctl.scala 903:117]
+    node _T_1004 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:75]
+    node _T_1005 = eq(_T_1004, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1006 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1007 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1008 = and(_T_1005, _T_1006) @[exu_div_ctl.scala 894:95]
+    node _T_1009 = and(_T_1008, _T_1007) @[exu_div_ctl.scala 894:95]
+    node _T_1010 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1011 = eq(_T_1010, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1012 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1013 = eq(_T_1012, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1014 = and(_T_1011, _T_1013) @[exu_div_ctl.scala 895:95]
+    node _T_1015 = and(_T_1009, _T_1014) @[exu_div_ctl.scala 896:11]
+    node _T_1016 = or(_T_1003, _T_1015) @[exu_div_ctl.scala 904:44]
+    node _T_1017 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1018 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1019 = and(_T_1017, _T_1018) @[exu_div_ctl.scala 894:95]
+    node _T_1020 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1021 = eq(_T_1020, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1022 = and(_T_1019, _T_1021) @[exu_div_ctl.scala 896:11]
+    node _T_1023 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 904:114]
+    node _T_1024 = eq(_T_1023, UInt<1>("h00")) @[exu_div_ctl.scala 904:109]
+    node _T_1025 = and(_T_1022, _T_1024) @[exu_div_ctl.scala 904:107]
+    node _T_1026 = or(_T_1016, _T_1025) @[exu_div_ctl.scala 904:80]
+    node _T_1027 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1028 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1029 = and(_T_1027, _T_1028) @[exu_div_ctl.scala 894:95]
+    node _T_1030 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1031 = eq(_T_1030, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1032 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:58]
+    node _T_1033 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1034 = eq(_T_1033, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1035 = and(_T_1031, _T_1032) @[exu_div_ctl.scala 895:95]
+    node _T_1036 = and(_T_1035, _T_1034) @[exu_div_ctl.scala 895:95]
+    node _T_1037 = and(_T_1029, _T_1036) @[exu_div_ctl.scala 896:11]
+    node _T_1038 = or(_T_1026, _T_1037) @[exu_div_ctl.scala 904:119]
+    node _T_1039 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1040 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1041 = and(_T_1039, _T_1040) @[exu_div_ctl.scala 894:95]
+    node _T_1042 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1043 = eq(_T_1042, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1044 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1045 = eq(_T_1044, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1046 = and(_T_1043, _T_1045) @[exu_div_ctl.scala 895:95]
+    node _T_1047 = and(_T_1041, _T_1046) @[exu_div_ctl.scala 896:11]
+    node _T_1048 = or(_T_1038, _T_1047) @[exu_div_ctl.scala 905:44]
+    node _T_1049 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1050 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1051 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1052 = and(_T_1049, _T_1050) @[exu_div_ctl.scala 894:95]
+    node _T_1053 = and(_T_1052, _T_1051) @[exu_div_ctl.scala 894:95]
+    node _T_1054 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1055 = eq(_T_1054, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1056 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:58]
+    node _T_1057 = and(_T_1055, _T_1056) @[exu_div_ctl.scala 895:95]
+    node _T_1058 = and(_T_1053, _T_1057) @[exu_div_ctl.scala 896:11]
+    node _T_1059 = or(_T_1048, _T_1058) @[exu_div_ctl.scala 905:79]
+    node _T_1060 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1061 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1062 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1063 = and(_T_1060, _T_1061) @[exu_div_ctl.scala 894:95]
+    node _T_1064 = and(_T_1063, _T_1062) @[exu_div_ctl.scala 894:95]
+    node _T_1065 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1066 = eq(_T_1065, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1067 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1068 = eq(_T_1067, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1069 = and(_T_1066, _T_1068) @[exu_div_ctl.scala 895:95]
+    node _T_1070 = and(_T_1064, _T_1069) @[exu_div_ctl.scala 896:11]
+    node _T_1071 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1072 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:75]
+    node _T_1073 = eq(_T_1072, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1074 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1075 = and(_T_1071, _T_1073) @[exu_div_ctl.scala 894:95]
+    node _T_1076 = and(_T_1075, _T_1074) @[exu_div_ctl.scala 894:95]
+    node _T_1077 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1078 = eq(_T_1077, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1079 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:58]
+    node _T_1080 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 895:58]
+    node _T_1081 = and(_T_1078, _T_1079) @[exu_div_ctl.scala 895:95]
+    node _T_1082 = and(_T_1081, _T_1080) @[exu_div_ctl.scala 895:95]
+    node _T_1083 = and(_T_1076, _T_1082) @[exu_div_ctl.scala 896:11]
+    node _T_1084 = or(_T_1070, _T_1083) @[exu_div_ctl.scala 907:45]
+    node _T_1085 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1086 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1087 = eq(_T_1086, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1088 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1089 = eq(_T_1088, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1090 = and(_T_1087, _T_1089) @[exu_div_ctl.scala 895:95]
+    node _T_1091 = and(_T_1085, _T_1090) @[exu_div_ctl.scala 896:11]
+    node _T_1092 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 907:121]
+    node _T_1093 = eq(_T_1092, UInt<1>("h00")) @[exu_div_ctl.scala 907:116]
+    node _T_1094 = and(_T_1091, _T_1093) @[exu_div_ctl.scala 907:114]
+    node _T_1095 = or(_T_1084, _T_1094) @[exu_div_ctl.scala 907:86]
+    node _T_1096 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1097 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1098 = eq(_T_1097, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1099 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1100 = eq(_T_1099, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1101 = and(_T_1098, _T_1100) @[exu_div_ctl.scala 895:95]
+    node _T_1102 = and(_T_1096, _T_1101) @[exu_div_ctl.scala 896:11]
+    node _T_1103 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 908:40]
+    node _T_1104 = eq(_T_1103, UInt<1>("h00")) @[exu_div_ctl.scala 908:35]
+    node _T_1105 = and(_T_1102, _T_1104) @[exu_div_ctl.scala 908:33]
+    node _T_1106 = or(_T_1095, _T_1105) @[exu_div_ctl.scala 907:129]
+    node _T_1107 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1108 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1109 = eq(_T_1108, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1110 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1111 = eq(_T_1110, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1112 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1113 = eq(_T_1112, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1114 = and(_T_1109, _T_1111) @[exu_div_ctl.scala 895:95]
+    node _T_1115 = and(_T_1114, _T_1113) @[exu_div_ctl.scala 895:95]
+    node _T_1116 = and(_T_1107, _T_1115) @[exu_div_ctl.scala 896:11]
+    node _T_1117 = or(_T_1106, _T_1116) @[exu_div_ctl.scala 908:47]
+    node _T_1118 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:75]
+    node _T_1119 = eq(_T_1118, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1120 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1121 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:75]
+    node _T_1122 = eq(_T_1121, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1123 = and(_T_1119, _T_1120) @[exu_div_ctl.scala 894:95]
+    node _T_1124 = and(_T_1123, _T_1122) @[exu_div_ctl.scala 894:95]
+    node _T_1125 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1126 = eq(_T_1125, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1127 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1128 = eq(_T_1127, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1129 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:58]
+    node _T_1130 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 895:58]
+    node _T_1131 = and(_T_1126, _T_1128) @[exu_div_ctl.scala 895:95]
+    node _T_1132 = and(_T_1131, _T_1129) @[exu_div_ctl.scala 895:95]
+    node _T_1133 = and(_T_1132, _T_1130) @[exu_div_ctl.scala 895:95]
+    node _T_1134 = and(_T_1124, _T_1133) @[exu_div_ctl.scala 896:11]
+    node _T_1135 = or(_T_1117, _T_1134) @[exu_div_ctl.scala 908:88]
+    node _T_1136 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:75]
+    node _T_1137 = eq(_T_1136, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1138 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1139 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1140 = and(_T_1137, _T_1138) @[exu_div_ctl.scala 894:95]
+    node _T_1141 = and(_T_1140, _T_1139) @[exu_div_ctl.scala 894:95]
+    node _T_1142 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1143 = eq(_T_1142, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1144 = and(_T_1141, _T_1143) @[exu_div_ctl.scala 896:11]
+    node _T_1145 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 909:43]
+    node _T_1146 = eq(_T_1145, UInt<1>("h00")) @[exu_div_ctl.scala 909:38]
+    node _T_1147 = and(_T_1144, _T_1146) @[exu_div_ctl.scala 909:36]
+    node _T_1148 = or(_T_1135, _T_1147) @[exu_div_ctl.scala 908:131]
+    node _T_1149 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1150 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1151 = eq(_T_1150, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1152 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1153 = eq(_T_1152, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1154 = and(_T_1151, _T_1153) @[exu_div_ctl.scala 895:95]
+    node _T_1155 = and(_T_1149, _T_1154) @[exu_div_ctl.scala 896:11]
+    node _T_1156 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 909:83]
+    node _T_1157 = eq(_T_1156, UInt<1>("h00")) @[exu_div_ctl.scala 909:78]
+    node _T_1158 = and(_T_1155, _T_1157) @[exu_div_ctl.scala 909:76]
+    node _T_1159 = or(_T_1148, _T_1158) @[exu_div_ctl.scala 909:47]
+    node _T_1160 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1161 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:75]
+    node _T_1162 = eq(_T_1161, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1163 = and(_T_1160, _T_1162) @[exu_div_ctl.scala 894:95]
+    node _T_1164 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1165 = eq(_T_1164, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1166 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:58]
+    node _T_1167 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:58]
+    node _T_1168 = and(_T_1165, _T_1166) @[exu_div_ctl.scala 895:95]
+    node _T_1169 = and(_T_1168, _T_1167) @[exu_div_ctl.scala 895:95]
+    node _T_1170 = and(_T_1163, _T_1169) @[exu_div_ctl.scala 896:11]
+    node _T_1171 = or(_T_1159, _T_1170) @[exu_div_ctl.scala 909:88]
+    node _T_1172 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:75]
+    node _T_1173 = eq(_T_1172, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1174 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1175 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1176 = and(_T_1173, _T_1174) @[exu_div_ctl.scala 894:95]
+    node _T_1177 = and(_T_1176, _T_1175) @[exu_div_ctl.scala 894:95]
+    node _T_1178 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1179 = eq(_T_1178, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1180 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:58]
+    node _T_1181 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1182 = eq(_T_1181, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1183 = and(_T_1179, _T_1180) @[exu_div_ctl.scala 895:95]
+    node _T_1184 = and(_T_1183, _T_1182) @[exu_div_ctl.scala 895:95]
+    node _T_1185 = and(_T_1177, _T_1184) @[exu_div_ctl.scala 896:11]
+    node _T_1186 = or(_T_1171, _T_1185) @[exu_div_ctl.scala 909:131]
+    node _T_1187 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:75]
+    node _T_1188 = eq(_T_1187, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1189 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1190 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1191 = and(_T_1188, _T_1189) @[exu_div_ctl.scala 894:95]
+    node _T_1192 = and(_T_1191, _T_1190) @[exu_div_ctl.scala 894:95]
+    node _T_1193 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1194 = eq(_T_1193, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1195 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1196 = eq(_T_1195, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1197 = and(_T_1194, _T_1196) @[exu_div_ctl.scala 895:95]
+    node _T_1198 = and(_T_1192, _T_1197) @[exu_div_ctl.scala 896:11]
+    node _T_1199 = or(_T_1186, _T_1198) @[exu_div_ctl.scala 910:47]
+    node _T_1200 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1201 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:75]
+    node _T_1202 = eq(_T_1201, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1203 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:75]
+    node _T_1204 = eq(_T_1203, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1205 = and(_T_1200, _T_1202) @[exu_div_ctl.scala 894:95]
+    node _T_1206 = and(_T_1205, _T_1204) @[exu_div_ctl.scala 894:95]
+    node _T_1207 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1208 = eq(_T_1207, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1209 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:58]
+    node _T_1210 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 895:58]
+    node _T_1211 = and(_T_1208, _T_1209) @[exu_div_ctl.scala 895:95]
+    node _T_1212 = and(_T_1211, _T_1210) @[exu_div_ctl.scala 895:95]
+    node _T_1213 = and(_T_1206, _T_1212) @[exu_div_ctl.scala 896:11]
+    node _T_1214 = or(_T_1199, _T_1213) @[exu_div_ctl.scala 910:88]
+    node _T_1215 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:75]
+    node _T_1216 = eq(_T_1215, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1217 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1218 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1219 = and(_T_1216, _T_1217) @[exu_div_ctl.scala 894:95]
+    node _T_1220 = and(_T_1219, _T_1218) @[exu_div_ctl.scala 894:95]
+    node _T_1221 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1222 = eq(_T_1221, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1223 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1224 = eq(_T_1223, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1225 = and(_T_1222, _T_1224) @[exu_div_ctl.scala 895:95]
+    node _T_1226 = and(_T_1220, _T_1225) @[exu_div_ctl.scala 896:11]
+    node _T_1227 = or(_T_1214, _T_1226) @[exu_div_ctl.scala 910:131]
+    node _T_1228 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1229 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1230 = and(_T_1228, _T_1229) @[exu_div_ctl.scala 894:95]
+    node _T_1231 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1232 = eq(_T_1231, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1233 = and(_T_1230, _T_1232) @[exu_div_ctl.scala 896:11]
+    node _T_1234 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 911:82]
+    node _T_1235 = eq(_T_1234, UInt<1>("h00")) @[exu_div_ctl.scala 911:77]
+    node _T_1236 = and(_T_1233, _T_1235) @[exu_div_ctl.scala 911:75]
+    node _T_1237 = or(_T_1227, _T_1236) @[exu_div_ctl.scala 911:47]
+    node _T_1238 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:75]
+    node _T_1239 = eq(_T_1238, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1240 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1241 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1242 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1243 = and(_T_1239, _T_1240) @[exu_div_ctl.scala 894:95]
+    node _T_1244 = and(_T_1243, _T_1241) @[exu_div_ctl.scala 894:95]
+    node _T_1245 = and(_T_1244, _T_1242) @[exu_div_ctl.scala 894:95]
+    node _T_1246 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1247 = eq(_T_1246, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1248 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:58]
+    node _T_1249 = and(_T_1247, _T_1248) @[exu_div_ctl.scala 895:95]
+    node _T_1250 = and(_T_1245, _T_1249) @[exu_div_ctl.scala 896:11]
+    node _T_1251 = or(_T_1237, _T_1250) @[exu_div_ctl.scala 911:88]
+    node _T_1252 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1253 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1254 = and(_T_1252, _T_1253) @[exu_div_ctl.scala 894:95]
+    node _T_1255 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:58]
+    node _T_1256 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1257 = eq(_T_1256, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1258 = and(_T_1255, _T_1257) @[exu_div_ctl.scala 895:95]
+    node _T_1259 = and(_T_1254, _T_1258) @[exu_div_ctl.scala 896:11]
+    node _T_1260 = or(_T_1251, _T_1259) @[exu_div_ctl.scala 911:131]
+    node _T_1261 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1262 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1263 = and(_T_1261, _T_1262) @[exu_div_ctl.scala 894:95]
+    node _T_1264 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:58]
+    node _T_1265 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1266 = eq(_T_1265, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1267 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1268 = eq(_T_1267, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1269 = and(_T_1264, _T_1266) @[exu_div_ctl.scala 895:95]
+    node _T_1270 = and(_T_1269, _T_1268) @[exu_div_ctl.scala 895:95]
+    node _T_1271 = and(_T_1263, _T_1270) @[exu_div_ctl.scala 896:11]
+    node _T_1272 = or(_T_1260, _T_1271) @[exu_div_ctl.scala 912:47]
+    node _T_1273 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1274 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1275 = and(_T_1273, _T_1274) @[exu_div_ctl.scala 894:95]
+    node _T_1276 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1277 = eq(_T_1276, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1278 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1279 = eq(_T_1278, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1280 = and(_T_1277, _T_1279) @[exu_div_ctl.scala 895:95]
+    node _T_1281 = and(_T_1275, _T_1280) @[exu_div_ctl.scala 896:11]
+    node _T_1282 = or(_T_1272, _T_1281) @[exu_div_ctl.scala 912:88]
+    node _T_1283 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1284 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:75]
+    node _T_1285 = eq(_T_1284, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1286 = and(_T_1283, _T_1285) @[exu_div_ctl.scala 894:95]
+    node _T_1287 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1288 = eq(_T_1287, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1289 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:58]
+    node _T_1290 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:58]
+    node _T_1291 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 895:58]
+    node _T_1292 = and(_T_1288, _T_1289) @[exu_div_ctl.scala 895:95]
+    node _T_1293 = and(_T_1292, _T_1290) @[exu_div_ctl.scala 895:95]
+    node _T_1294 = and(_T_1293, _T_1291) @[exu_div_ctl.scala 895:95]
+    node _T_1295 = and(_T_1286, _T_1294) @[exu_div_ctl.scala 896:11]
+    node _T_1296 = or(_T_1282, _T_1295) @[exu_div_ctl.scala 912:131]
+    node _T_1297 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1298 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1299 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1300 = and(_T_1297, _T_1298) @[exu_div_ctl.scala 894:95]
+    node _T_1301 = and(_T_1300, _T_1299) @[exu_div_ctl.scala 894:95]
+    node _T_1302 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:58]
+    node _T_1303 = and(_T_1301, _T_1302) @[exu_div_ctl.scala 896:11]
+    node _T_1304 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 913:84]
+    node _T_1305 = eq(_T_1304, UInt<1>("h00")) @[exu_div_ctl.scala 913:79]
+    node _T_1306 = and(_T_1303, _T_1305) @[exu_div_ctl.scala 913:77]
+    node _T_1307 = or(_T_1296, _T_1306) @[exu_div_ctl.scala 913:47]
+    node _T_1308 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1309 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1310 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1311 = and(_T_1308, _T_1309) @[exu_div_ctl.scala 894:95]
+    node _T_1312 = and(_T_1311, _T_1310) @[exu_div_ctl.scala 894:95]
+    node _T_1313 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:58]
+    node _T_1314 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1315 = eq(_T_1314, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1316 = and(_T_1313, _T_1315) @[exu_div_ctl.scala 895:95]
+    node _T_1317 = and(_T_1312, _T_1316) @[exu_div_ctl.scala 896:11]
+    node _T_1318 = or(_T_1307, _T_1317) @[exu_div_ctl.scala 913:88]
+    node _T_1319 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1320 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1321 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1322 = and(_T_1319, _T_1320) @[exu_div_ctl.scala 894:95]
+    node _T_1323 = and(_T_1322, _T_1321) @[exu_div_ctl.scala 894:95]
+    node _T_1324 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:58]
+    node _T_1325 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:75]
+    node _T_1326 = eq(_T_1325, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1327 = and(_T_1324, _T_1326) @[exu_div_ctl.scala 895:95]
+    node _T_1328 = and(_T_1323, _T_1327) @[exu_div_ctl.scala 896:11]
+    node _T_1329 = or(_T_1318, _T_1328) @[exu_div_ctl.scala 913:131]
+    node _T_1330 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1331 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:75]
+    node _T_1332 = eq(_T_1331, UInt<1>("h00")) @[exu_div_ctl.scala 894:70]
+    node _T_1333 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1334 = and(_T_1330, _T_1332) @[exu_div_ctl.scala 894:95]
+    node _T_1335 = and(_T_1334, _T_1333) @[exu_div_ctl.scala 894:95]
+    node _T_1336 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:75]
+    node _T_1337 = eq(_T_1336, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1338 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 895:58]
+    node _T_1339 = and(_T_1337, _T_1338) @[exu_div_ctl.scala 895:95]
+    node _T_1340 = and(_T_1335, _T_1339) @[exu_div_ctl.scala 896:11]
+    node _T_1341 = or(_T_1329, _T_1340) @[exu_div_ctl.scala 914:47]
+    node _T_1342 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1343 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1344 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1345 = and(_T_1342, _T_1343) @[exu_div_ctl.scala 894:95]
+    node _T_1346 = and(_T_1345, _T_1344) @[exu_div_ctl.scala 894:95]
+    node _T_1347 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1348 = eq(_T_1347, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1349 = and(_T_1346, _T_1348) @[exu_div_ctl.scala 896:11]
+    node _T_1350 = or(_T_1341, _T_1349) @[exu_div_ctl.scala 914:88]
+    node _T_1351 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1352 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 894:58]
+    node _T_1353 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1354 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 894:58]
+    node _T_1355 = and(_T_1351, _T_1352) @[exu_div_ctl.scala 894:95]
+    node _T_1356 = and(_T_1355, _T_1353) @[exu_div_ctl.scala 894:95]
+    node _T_1357 = and(_T_1356, _T_1354) @[exu_div_ctl.scala 894:95]
+    node _T_1358 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 895:58]
+    node _T_1359 = and(_T_1357, _T_1358) @[exu_div_ctl.scala 896:11]
+    node _T_1360 = or(_T_1350, _T_1359) @[exu_div_ctl.scala 914:131]
+    node _T_1361 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 894:58]
+    node _T_1362 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 894:58]
+    node _T_1363 = and(_T_1361, _T_1362) @[exu_div_ctl.scala 894:95]
+    node _T_1364 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 895:75]
+    node _T_1365 = eq(_T_1364, UInt<1>("h00")) @[exu_div_ctl.scala 895:70]
+    node _T_1366 = and(_T_1363, _T_1365) @[exu_div_ctl.scala 896:11]
+    node _T_1367 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 915:81]
+    node _T_1368 = eq(_T_1367, UInt<1>("h00")) @[exu_div_ctl.scala 915:76]
+    node _T_1369 = and(_T_1366, _T_1368) @[exu_div_ctl.scala 915:74]
+    node _T_1370 = or(_T_1360, _T_1369) @[exu_div_ctl.scala 915:47]
+    node _T_1371 = cat(_T_1059, _T_1370) @[Cat.scala 29:58]
+    node _T_1372 = cat(_T_925, _T_956) @[Cat.scala 29:58]
+    node _T_1373 = cat(_T_1372, _T_1371) @[Cat.scala 29:58]
+    smallnum <= _T_1373 @[exu_div_ctl.scala 898:12]
+    node _T_1374 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 918:50]
+    node shortq_dividend = cat(dividend_sign_ff, _T_1374) @[Cat.scala 29:58]
+    inst a_enc of exu_div_cls @[exu_div_ctl.scala 919:21]
+    a_enc.clock <= clock
+    a_enc.reset <= reset
+    a_enc.io.operand <= shortq_dividend @[exu_div_ctl.scala 920:20]
+    inst b_enc of exu_div_cls_1 @[exu_div_ctl.scala 922:21]
+    b_enc.clock <= clock
+    b_enc.reset <= reset
+    node _T_1375 = bits(b_ff, 32, 0) @[exu_div_ctl.scala 923:27]
+    b_enc.io.operand <= _T_1375 @[exu_div_ctl.scala 923:20]
+    node dw_a_enc = cat(UInt<1>("h00"), a_enc.io.cls) @[Cat.scala 29:58]
+    node dw_b_enc = cat(UInt<1>("h00"), b_enc.io.cls) @[Cat.scala 29:58]
+    node _T_1376 = cat(UInt<1>("h00"), dw_b_enc) @[Cat.scala 29:58]
+    node _T_1377 = cat(UInt<1>("h00"), dw_a_enc) @[Cat.scala 29:58]
+    node _T_1378 = sub(_T_1376, _T_1377) @[exu_div_ctl.scala 927:41]
+    node _T_1379 = tail(_T_1378, 1) @[exu_div_ctl.scala 927:41]
+    node _T_1380 = add(_T_1379, UInt<7>("h01")) @[exu_div_ctl.scala 927:61]
+    node dw_shortq_raw = tail(_T_1380, 1) @[exu_div_ctl.scala 927:61]
+    node _T_1381 = bits(dw_shortq_raw, 6, 6) @[exu_div_ctl.scala 928:33]
+    node _T_1382 = bits(_T_1381, 0, 0) @[exu_div_ctl.scala 928:43]
+    node _T_1383 = bits(dw_shortq_raw, 5, 0) @[exu_div_ctl.scala 928:63]
+    node shortq = mux(_T_1382, UInt<1>("h00"), _T_1383) @[exu_div_ctl.scala 928:19]
+    node _T_1384 = bits(shortq, 5, 5) @[exu_div_ctl.scala 929:38]
+    node _T_1385 = eq(_T_1384, UInt<1>("h00")) @[exu_div_ctl.scala 929:31]
+    node _T_1386 = and(valid_ff, _T_1385) @[exu_div_ctl.scala 929:29]
+    node _T_1387 = bits(shortq, 4, 2) @[exu_div_ctl.scala 929:52]
+    node _T_1388 = eq(_T_1387, UInt<3>("h07")) @[exu_div_ctl.scala 929:58]
+    node _T_1389 = eq(_T_1388, UInt<1>("h00")) @[exu_div_ctl.scala 929:44]
+    node _T_1390 = and(_T_1386, _T_1389) @[exu_div_ctl.scala 929:42]
+    node _T_1391 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 929:75]
+    node _T_1392 = and(_T_1390, _T_1391) @[exu_div_ctl.scala 929:73]
+    shortq_enable <= _T_1392 @[exu_div_ctl.scala 929:17]
+    node _T_1393 = eq(shortq, UInt<5>("h01f")) @[exu_div_ctl.scala 931:58]
+    node _T_1394 = eq(shortq, UInt<5>("h01e")) @[exu_div_ctl.scala 931:58]
+    node _T_1395 = eq(shortq, UInt<5>("h01d")) @[exu_div_ctl.scala 931:58]
+    node _T_1396 = eq(shortq, UInt<5>("h01c")) @[exu_div_ctl.scala 931:58]
+    node _T_1397 = eq(shortq, UInt<5>("h01b")) @[exu_div_ctl.scala 931:58]
+    node _T_1398 = eq(shortq, UInt<5>("h01a")) @[exu_div_ctl.scala 931:58]
+    node _T_1399 = eq(shortq, UInt<5>("h019")) @[exu_div_ctl.scala 931:58]
+    node _T_1400 = eq(shortq, UInt<5>("h018")) @[exu_div_ctl.scala 931:58]
+    node _T_1401 = eq(shortq, UInt<5>("h017")) @[exu_div_ctl.scala 931:58]
+    node _T_1402 = eq(shortq, UInt<5>("h016")) @[exu_div_ctl.scala 931:58]
+    node _T_1403 = eq(shortq, UInt<5>("h015")) @[exu_div_ctl.scala 931:58]
+    node _T_1404 = eq(shortq, UInt<5>("h014")) @[exu_div_ctl.scala 931:58]
+    node _T_1405 = eq(shortq, UInt<5>("h013")) @[exu_div_ctl.scala 931:58]
+    node _T_1406 = eq(shortq, UInt<5>("h012")) @[exu_div_ctl.scala 931:58]
+    node _T_1407 = eq(shortq, UInt<5>("h011")) @[exu_div_ctl.scala 931:58]
+    node _T_1408 = eq(shortq, UInt<5>("h010")) @[exu_div_ctl.scala 931:58]
+    node _T_1409 = eq(shortq, UInt<4>("h0f")) @[exu_div_ctl.scala 931:58]
+    node _T_1410 = eq(shortq, UInt<4>("h0e")) @[exu_div_ctl.scala 931:58]
+    node _T_1411 = eq(shortq, UInt<4>("h0d")) @[exu_div_ctl.scala 931:58]
+    node _T_1412 = eq(shortq, UInt<4>("h0c")) @[exu_div_ctl.scala 931:58]
+    node _T_1413 = eq(shortq, UInt<4>("h0b")) @[exu_div_ctl.scala 931:58]
+    node _T_1414 = eq(shortq, UInt<4>("h0a")) @[exu_div_ctl.scala 931:58]
+    node _T_1415 = eq(shortq, UInt<4>("h09")) @[exu_div_ctl.scala 931:58]
+    node _T_1416 = eq(shortq, UInt<4>("h08")) @[exu_div_ctl.scala 931:58]
+    node _T_1417 = eq(shortq, UInt<3>("h07")) @[exu_div_ctl.scala 931:58]
+    node _T_1418 = eq(shortq, UInt<3>("h06")) @[exu_div_ctl.scala 931:58]
+    node _T_1419 = eq(shortq, UInt<3>("h05")) @[exu_div_ctl.scala 931:58]
+    node _T_1420 = eq(shortq, UInt<3>("h04")) @[exu_div_ctl.scala 931:58]
+    node _T_1421 = eq(shortq, UInt<2>("h03")) @[exu_div_ctl.scala 931:58]
+    node _T_1422 = eq(shortq, UInt<2>("h02")) @[exu_div_ctl.scala 931:58]
+    node _T_1423 = eq(shortq, UInt<1>("h01")) @[exu_div_ctl.scala 931:58]
+    node _T_1424 = eq(shortq, UInt<1>("h00")) @[exu_div_ctl.scala 931:58]
+    node _T_1425 = mux(_T_1393, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1426 = mux(_T_1394, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1427 = mux(_T_1395, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1428 = mux(_T_1396, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1429 = mux(_T_1397, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1430 = mux(_T_1398, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1431 = mux(_T_1399, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1432 = mux(_T_1400, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1433 = mux(_T_1401, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1434 = mux(_T_1402, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1435 = mux(_T_1403, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1436 = mux(_T_1404, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1437 = mux(_T_1405, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1438 = mux(_T_1406, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1439 = mux(_T_1407, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1440 = mux(_T_1408, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1441 = mux(_T_1409, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1442 = mux(_T_1410, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1443 = mux(_T_1411, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1444 = mux(_T_1412, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1445 = mux(_T_1413, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1446 = mux(_T_1414, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1447 = mux(_T_1415, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1448 = mux(_T_1416, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1449 = mux(_T_1417, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1450 = mux(_T_1418, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1451 = mux(_T_1419, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1452 = mux(_T_1420, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1453 = mux(_T_1421, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1454 = mux(_T_1422, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1455 = mux(_T_1423, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1456 = mux(_T_1424, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
+    node _T_1457 = or(_T_1425, _T_1426) @[Mux.scala 27:72]
+    node _T_1458 = or(_T_1457, _T_1427) @[Mux.scala 27:72]
+    node _T_1459 = or(_T_1458, _T_1428) @[Mux.scala 27:72]
+    node _T_1460 = or(_T_1459, _T_1429) @[Mux.scala 27:72]
+    node _T_1461 = or(_T_1460, _T_1430) @[Mux.scala 27:72]
+    node _T_1462 = or(_T_1461, _T_1431) @[Mux.scala 27:72]
+    node _T_1463 = or(_T_1462, _T_1432) @[Mux.scala 27:72]
+    node _T_1464 = or(_T_1463, _T_1433) @[Mux.scala 27:72]
+    node _T_1465 = or(_T_1464, _T_1434) @[Mux.scala 27:72]
+    node _T_1466 = or(_T_1465, _T_1435) @[Mux.scala 27:72]
+    node _T_1467 = or(_T_1466, _T_1436) @[Mux.scala 27:72]
+    node _T_1468 = or(_T_1467, _T_1437) @[Mux.scala 27:72]
+    node _T_1469 = or(_T_1468, _T_1438) @[Mux.scala 27:72]
+    node _T_1470 = or(_T_1469, _T_1439) @[Mux.scala 27:72]
+    node _T_1471 = or(_T_1470, _T_1440) @[Mux.scala 27:72]
+    node _T_1472 = or(_T_1471, _T_1441) @[Mux.scala 27:72]
+    node _T_1473 = or(_T_1472, _T_1442) @[Mux.scala 27:72]
+    node _T_1474 = or(_T_1473, _T_1443) @[Mux.scala 27:72]
+    node _T_1475 = or(_T_1474, _T_1444) @[Mux.scala 27:72]
+    node _T_1476 = or(_T_1475, _T_1445) @[Mux.scala 27:72]
+    node _T_1477 = or(_T_1476, _T_1446) @[Mux.scala 27:72]
+    node _T_1478 = or(_T_1477, _T_1447) @[Mux.scala 27:72]
+    node _T_1479 = or(_T_1478, _T_1448) @[Mux.scala 27:72]
+    node _T_1480 = or(_T_1479, _T_1449) @[Mux.scala 27:72]
+    node _T_1481 = or(_T_1480, _T_1450) @[Mux.scala 27:72]
+    node _T_1482 = or(_T_1481, _T_1451) @[Mux.scala 27:72]
+    node _T_1483 = or(_T_1482, _T_1452) @[Mux.scala 27:72]
+    node _T_1484 = or(_T_1483, _T_1453) @[Mux.scala 27:72]
+    node _T_1485 = or(_T_1484, _T_1454) @[Mux.scala 27:72]
+    node _T_1486 = or(_T_1485, _T_1455) @[Mux.scala 27:72]
+    node _T_1487 = or(_T_1486, _T_1456) @[Mux.scala 27:72]
+    wire _T_1488 : UInt<5> @[Mux.scala 27:72]
+    _T_1488 <= _T_1487 @[Mux.scala 27:72]
+    shortq_decode <= _T_1488 @[exu_div_ctl.scala 931:17]
+    node _T_1489 = eq(shortq_enable, UInt<1>("h00")) @[exu_div_ctl.scala 932:23]
+    node _T_1490 = mux(_T_1489, UInt<1>("h00"), shortq_decode) @[exu_div_ctl.scala 932:22]
+    shortq_shift <= _T_1490 @[exu_div_ctl.scala 932:16]
+    node _T_1491 = bits(b_ff1, 32, 32) @[exu_div_ctl.scala 933:20]
+    node _T_1492 = bits(b_ff1, 32, 32) @[exu_div_ctl.scala 933:30]
+    node _T_1493 = bits(b_ff1, 32, 32) @[exu_div_ctl.scala 933:40]
+    node _T_1494 = bits(b_ff1, 32, 32) @[exu_div_ctl.scala 933:50]
+    node _T_1495 = bits(b_ff1, 32, 32) @[exu_div_ctl.scala 933:60]
+    node _T_1496 = cat(_T_1494, _T_1495) @[Cat.scala 29:58]
+    node _T_1497 = cat(_T_1496, b_ff1) @[Cat.scala 29:58]
+    node _T_1498 = cat(_T_1491, _T_1492) @[Cat.scala 29:58]
+    node _T_1499 = cat(_T_1498, _T_1493) @[Cat.scala 29:58]
+    node _T_1500 = cat(_T_1499, _T_1497) @[Cat.scala 29:58]
+    b_ff <= _T_1500 @[exu_div_ctl.scala 933:8]
     inst rvclkhdr of rvclkhdr @[lib.scala 390:23]
     rvclkhdr.clock <= clock
     rvclkhdr.reset <= reset
     rvclkhdr.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr.io.en <= _T_1478 @[lib.scala 393:17]
+    rvclkhdr.io.en <= misc_enable @[lib.scala 393:17]
     rvclkhdr.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1479 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1478 : @[Reg.scala 28:19]
-      _T_1479 <= _T_1477 @[Reg.scala 28:23]
+    reg _T_1501 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when misc_enable : @[Reg.scala 28:19]
+      _T_1501 <= valid_ff_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    valid_ff_x <= _T_1479 @[exu_div_ctl.scala 266:16]
-    node _T_1480 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 267:34]
-    node _T_1481 = and(finish, _T_1480) @[exu_div_ctl.scala 267:32]
-    node _T_1482 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    valid_ff <= _T_1501 @[exu_div_ctl.scala 934:12]
     inst rvclkhdr_1 of rvclkhdr_1 @[lib.scala 390:23]
     rvclkhdr_1.clock <= clock
     rvclkhdr_1.reset <= reset
     rvclkhdr_1.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_1.io.en <= _T_1482 @[lib.scala 393:17]
+    rvclkhdr_1.io.en <= misc_enable @[lib.scala 393:17]
     rvclkhdr_1.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1483 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1482 : @[Reg.scala 28:19]
-      _T_1483 <= _T_1481 @[Reg.scala 28:23]
+    reg _T_1502 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when misc_enable : @[Reg.scala 28:19]
+      _T_1502 <= control_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    finish_ff <= _T_1483 @[exu_div_ctl.scala 267:15]
-    node _T_1484 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    control_ff <= _T_1502 @[exu_div_ctl.scala 935:16]
     inst rvclkhdr_2 of rvclkhdr_2 @[lib.scala 390:23]
     rvclkhdr_2.clock <= clock
     rvclkhdr_2.reset <= reset
     rvclkhdr_2.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_2.io.en <= _T_1484 @[lib.scala 393:17]
+    rvclkhdr_2.io.en <= misc_enable @[lib.scala 393:17]
     rvclkhdr_2.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1485 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1484 : @[Reg.scala 28:19]
-      _T_1485 <= run_in @[Reg.scala 28:23]
+    reg _T_1503 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when misc_enable : @[Reg.scala 28:19]
+      _T_1503 <= by_zero_case @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    run_state <= _T_1485 @[exu_div_ctl.scala 268:15]
-    node _T_1486 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    by_zero_case_ff <= _T_1503 @[exu_div_ctl.scala 936:19]
     inst rvclkhdr_3 of rvclkhdr_3 @[lib.scala 390:23]
     rvclkhdr_3.clock <= clock
     rvclkhdr_3.reset <= reset
     rvclkhdr_3.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_3.io.en <= _T_1486 @[lib.scala 393:17]
+    rvclkhdr_3.io.en <= misc_enable @[lib.scala 393:17]
     rvclkhdr_3.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1487 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1486 : @[Reg.scala 28:19]
-      _T_1487 <= count_in @[Reg.scala 28:23]
+    reg _T_1504 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when misc_enable : @[Reg.scala 28:19]
+      _T_1504 <= shortq_enable @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    count <= _T_1487 @[exu_div_ctl.scala 269:11]
-    node _T_1488 = bits(io.dividend_in, 31, 31) @[exu_div_ctl.scala 270:60]
-    node _T_1489 = and(io.valid_in, _T_1488) @[exu_div_ctl.scala 270:44]
-    node _T_1490 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 270:69]
-    node _T_1491 = and(_T_1490, dividend_neg_ff) @[exu_div_ctl.scala 270:82]
-    node _T_1492 = or(_T_1489, _T_1491) @[exu_div_ctl.scala 270:66]
-    node _T_1493 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    shortq_enable_ff <= _T_1504 @[exu_div_ctl.scala 937:20]
     inst rvclkhdr_4 of rvclkhdr_4 @[lib.scala 390:23]
     rvclkhdr_4.clock <= clock
     rvclkhdr_4.reset <= reset
     rvclkhdr_4.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_4.io.en <= _T_1493 @[lib.scala 393:17]
+    rvclkhdr_4.io.en <= misc_enable @[lib.scala 393:17]
     rvclkhdr_4.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1494 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1493 : @[Reg.scala 28:19]
-      _T_1494 <= _T_1492 @[Reg.scala 28:23]
+    reg _T_1505 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when misc_enable : @[Reg.scala 28:19]
+      _T_1505 <= shortq_shift @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    dividend_neg_ff <= _T_1494 @[exu_div_ctl.scala 270:21]
-    node _T_1495 = bits(io.divisor_in, 31, 31) @[exu_div_ctl.scala 271:58]
-    node _T_1496 = and(io.valid_in, _T_1495) @[exu_div_ctl.scala 271:43]
-    node _T_1497 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 271:67]
-    node _T_1498 = and(_T_1497, divisor_neg_ff) @[exu_div_ctl.scala 271:80]
-    node _T_1499 = or(_T_1496, _T_1498) @[exu_div_ctl.scala 271:64]
-    node _T_1500 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    shortq_shift_ff <= _T_1505 @[exu_div_ctl.scala 938:19]
     inst rvclkhdr_5 of rvclkhdr_5 @[lib.scala 390:23]
     rvclkhdr_5.clock <= clock
     rvclkhdr_5.reset <= reset
     rvclkhdr_5.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_5.io.en <= _T_1500 @[lib.scala 393:17]
+    rvclkhdr_5.io.en <= misc_enable @[lib.scala 393:17]
     rvclkhdr_5.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1501 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1500 : @[Reg.scala 28:19]
-      _T_1501 <= _T_1499 @[Reg.scala 28:23]
+    reg _T_1506 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when misc_enable : @[Reg.scala 28:19]
+      _T_1506 <= finish @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    divisor_neg_ff <= _T_1501 @[exu_div_ctl.scala 271:20]
-    node _T_1502 = and(io.valid_in, sign_eff) @[exu_div_ctl.scala 272:36]
-    node _T_1503 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 272:51]
-    node _T_1504 = and(_T_1503, sign_ff) @[exu_div_ctl.scala 272:64]
-    node _T_1505 = or(_T_1502, _T_1504) @[exu_div_ctl.scala 272:48]
-    node _T_1506 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    finish_ff <= _T_1506 @[exu_div_ctl.scala 939:13]
     inst rvclkhdr_6 of rvclkhdr_6 @[lib.scala 390:23]
     rvclkhdr_6.clock <= clock
     rvclkhdr_6.reset <= reset
     rvclkhdr_6.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_6.io.en <= _T_1506 @[lib.scala 393:17]
+    rvclkhdr_6.io.en <= misc_enable @[lib.scala 393:17]
     rvclkhdr_6.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
     reg _T_1507 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1506 : @[Reg.scala 28:19]
-      _T_1507 <= _T_1505 @[Reg.scala 28:23]
+    when misc_enable : @[Reg.scala 28:19]
+      _T_1507 <= count_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    sign_ff <= _T_1507 @[exu_div_ctl.scala 272:13]
-    node _T_1508 = and(io.valid_in, io.rem_in) @[exu_div_ctl.scala 273:37]
-    node _T_1509 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 273:53]
-    node _T_1510 = and(_T_1509, rem_ff) @[exu_div_ctl.scala 273:66]
-    node _T_1511 = or(_T_1508, _T_1510) @[exu_div_ctl.scala 273:50]
-    node _T_1512 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    count_ff <= _T_1507 @[exu_div_ctl.scala 940:12]
     inst rvclkhdr_7 of rvclkhdr_7 @[lib.scala 390:23]
     rvclkhdr_7.clock <= clock
     rvclkhdr_7.reset <= reset
     rvclkhdr_7.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_7.io.en <= _T_1512 @[lib.scala 393:17]
+    rvclkhdr_7.io.en <= a_enable @[lib.scala 393:17]
     rvclkhdr_7.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1513 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1512 : @[Reg.scala 28:19]
-      _T_1513 <= _T_1511 @[Reg.scala 28:23]
+    reg _T_1508 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when a_enable : @[Reg.scala 28:19]
+      _T_1508 <= a_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    rem_ff <= _T_1513 @[exu_div_ctl.scala 273:14]
-    node _T_1514 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    a_ff <= _T_1508 @[exu_div_ctl.scala 942:8]
+    node _T_1509 = bits(b_in, 32, 0) @[exu_div_ctl.scala 943:23]
     inst rvclkhdr_8 of rvclkhdr_8 @[lib.scala 390:23]
     rvclkhdr_8.clock <= clock
     rvclkhdr_8.reset <= reset
     rvclkhdr_8.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_8.io.en <= _T_1514 @[lib.scala 393:17]
+    rvclkhdr_8.io.en <= b_enable @[lib.scala 393:17]
     rvclkhdr_8.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1515 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1514 : @[Reg.scala 28:19]
-      _T_1515 <= smallnum_case @[Reg.scala 28:23]
+    reg _T_1510 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when b_enable : @[Reg.scala 28:19]
+      _T_1510 <= _T_1509 @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    smallnum_case_ff <= _T_1515 @[exu_div_ctl.scala 274:22]
-    node _T_1516 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    b_ff1 <= _T_1510 @[exu_div_ctl.scala 943:9]
     inst rvclkhdr_9 of rvclkhdr_9 @[lib.scala 390:23]
     rvclkhdr_9.clock <= clock
     rvclkhdr_9.reset <= reset
     rvclkhdr_9.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_9.io.en <= _T_1516 @[lib.scala 393:17]
+    rvclkhdr_9.io.en <= rq_enable @[lib.scala 393:17]
     rvclkhdr_9.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1517 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1516 : @[Reg.scala 28:19]
-      _T_1517 <= smallnum @[Reg.scala 28:23]
+    reg _T_1511 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when rq_enable : @[Reg.scala 28:19]
+      _T_1511 <= r_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    smallnum_ff <= _T_1517 @[exu_div_ctl.scala 275:17]
-    node _T_1518 = bits(div_clken, 0, 0) @[lib.scala 8:44]
+    r_ff <= _T_1511 @[exu_div_ctl.scala 944:8]
     inst rvclkhdr_10 of rvclkhdr_10 @[lib.scala 390:23]
     rvclkhdr_10.clock <= clock
     rvclkhdr_10.reset <= reset
     rvclkhdr_10.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_10.io.en <= _T_1518 @[lib.scala 393:17]
+    rvclkhdr_10.io.en <= rq_enable @[lib.scala 393:17]
     rvclkhdr_10.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1519 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1518 : @[Reg.scala 28:19]
-      _T_1519 <= shortq_enable @[Reg.scala 28:23]
+    reg _T_1512 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
+    when rq_enable : @[Reg.scala 28:19]
+      _T_1512 <= q_in @[Reg.scala 28:23]
       skip @[Reg.scala 28:19]
-    shortq_enable_ff <= _T_1519 @[exu_div_ctl.scala 276:22]
-    node _T_1520 = bits(div_clken, 0, 0) @[lib.scala 8:44]
-    inst rvclkhdr_11 of rvclkhdr_11 @[lib.scala 390:23]
-    rvclkhdr_11.clock <= clock
-    rvclkhdr_11.reset <= reset
-    rvclkhdr_11.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_11.io.en <= _T_1520 @[lib.scala 393:17]
-    rvclkhdr_11.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1521 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1520 : @[Reg.scala 28:19]
-      _T_1521 <= shortq_shift @[Reg.scala 28:23]
-      skip @[Reg.scala 28:19]
-    shortq_shift_xx <= _T_1521 @[exu_div_ctl.scala 277:21]
-    node _T_1522 = bits(qff_enable, 0, 0) @[lib.scala 8:44]
-    inst rvclkhdr_12 of rvclkhdr_12 @[lib.scala 390:23]
-    rvclkhdr_12.clock <= clock
-    rvclkhdr_12.reset <= reset
-    rvclkhdr_12.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_12.io.en <= _T_1522 @[lib.scala 393:17]
-    rvclkhdr_12.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1523 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1522 : @[Reg.scala 28:19]
-      _T_1523 <= q_in @[Reg.scala 28:23]
-      skip @[Reg.scala 28:19]
-    q_ff <= _T_1523 @[exu_div_ctl.scala 279:8]
-    node _T_1524 = bits(aff_enable, 0, 0) @[lib.scala 8:44]
-    inst rvclkhdr_13 of rvclkhdr_13 @[lib.scala 390:23]
-    rvclkhdr_13.clock <= clock
-    rvclkhdr_13.reset <= reset
-    rvclkhdr_13.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_13.io.en <= _T_1524 @[lib.scala 393:17]
-    rvclkhdr_13.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1525 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when _T_1524 : @[Reg.scala 28:19]
-      _T_1525 <= a_in @[Reg.scala 28:23]
-      skip @[Reg.scala 28:19]
-    a_ff <= _T_1525 @[exu_div_ctl.scala 280:8]
-    node _T_1526 = bits(io.divisor_in, 31, 31) @[exu_div_ctl.scala 281:50]
-    node _T_1527 = and(io.signed_in, _T_1526) @[exu_div_ctl.scala 281:35]
-    node _T_1528 = bits(io.divisor_in, 31, 0) @[exu_div_ctl.scala 281:69]
-    node _T_1529 = cat(_T_1527, _T_1528) @[Cat.scala 29:58]
-    inst rvclkhdr_14 of rvclkhdr_14 @[lib.scala 390:23]
-    rvclkhdr_14.clock <= clock
-    rvclkhdr_14.reset <= reset
-    rvclkhdr_14.io.clk <= clock @[lib.scala 392:18]
-    rvclkhdr_14.io.en <= io.valid_in @[lib.scala 393:17]
-    rvclkhdr_14.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
-    reg _T_1530 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
-    when io.valid_in : @[Reg.scala 28:19]
-      _T_1530 <= _T_1529 @[Reg.scala 28:23]
-      skip @[Reg.scala 28:19]
-    m_ff <= _T_1530 @[exu_div_ctl.scala 281:8]
+    q_ff <= _T_1512 @[exu_div_ctl.scala 945:8]
     
   module exu_div_ctl : 
     input clock : Clock
@@ -2254,17 +2799,17 @@ circuit exu_div_ctl :
     node _T_1 = mux(_T, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
     node _T_2 = and(_T_1, out_raw) @[exu_div_ctl.scala 21:49]
     io.exu_div_result <= _T_2 @[exu_div_ctl.scala 21:21]
-    inst divider_old of el2_exu_div_existing_1bit_cheapshortq @[exu_div_ctl.scala 23:27]
-    divider_old.clock <= clock
-    divider_old.reset <= reset
-    divider_old.io.scan_mode <= io.scan_mode @[exu_div_ctl.scala 24:31]
-    divider_old.io.cancel <= io.dec_div.dec_div_cancel @[exu_div_ctl.scala 25:31]
-    divider_old.io.valid_in <= io.dec_div.div_p.valid @[exu_div_ctl.scala 26:31]
-    node _T_3 = not(io.dec_div.div_p.bits.unsign) @[exu_div_ctl.scala 27:34]
-    divider_old.io.signed_in <= _T_3 @[exu_div_ctl.scala 27:31]
-    divider_old.io.rem_in <= io.dec_div.div_p.bits.rem @[exu_div_ctl.scala 28:31]
-    divider_old.io.dividend_in <= io.dividend @[exu_div_ctl.scala 29:31]
-    divider_old.io.divisor_in <= io.divisor @[exu_div_ctl.scala 30:31]
-    out_raw <= divider_old.io.data_out @[exu_div_ctl.scala 31:27]
-    io.exu_div_wren <= divider_old.io.valid_out @[exu_div_ctl.scala 32:27]
+    inst divider_new4 of exu_div_new_4bit_fullshortq @[exu_div_ctl.scala 71:30]
+    divider_new4.clock <= clock
+    divider_new4.reset <= reset
+    divider_new4.io.scan_mode <= io.scan_mode @[exu_div_ctl.scala 72:34]
+    divider_new4.io.cancel <= io.dec_div.dec_div_cancel @[exu_div_ctl.scala 73:34]
+    divider_new4.io.valid_in <= io.dec_div.div_p.valid @[exu_div_ctl.scala 74:34]
+    node _T_3 = not(io.dec_div.div_p.bits.unsign) @[exu_div_ctl.scala 75:37]
+    divider_new4.io.signed_in <= _T_3 @[exu_div_ctl.scala 75:34]
+    divider_new4.io.rem_in <= io.dec_div.div_p.bits.rem @[exu_div_ctl.scala 76:34]
+    divider_new4.io.dividend_in <= io.dividend @[exu_div_ctl.scala 77:34]
+    divider_new4.io.divisor_in <= io.divisor @[exu_div_ctl.scala 78:34]
+    out_raw <= divider_new4.io.data_out @[exu_div_ctl.scala 79:29]
+    io.exu_div_wren <= divider_new4.io.valid_out @[exu_div_ctl.scala 80:29]
     
diff --git a/exu_div_ctl.v b/exu_div_ctl.v
index b02c146d..e49b2b34 100644
--- a/exu_div_ctl.v
+++ b/exu_div_ctl.v
@@ -1,3 +1,198 @@
+module exu_div_cls(
+  input  [32:0] io_operand,
+  output [4:0]  io_cls
+);
+  wire  _T_3 = io_operand[31:30] == 2'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_5 = io_operand[31:29] == 3'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_7 = io_operand[31:28] == 4'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_9 = io_operand[31:27] == 5'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_11 = io_operand[31:26] == 6'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_13 = io_operand[31:25] == 7'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_15 = io_operand[31:24] == 8'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_17 = io_operand[31:23] == 9'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_19 = io_operand[31:22] == 10'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_21 = io_operand[31:21] == 11'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_23 = io_operand[31:20] == 12'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_25 = io_operand[31:19] == 13'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_27 = io_operand[31:18] == 14'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_29 = io_operand[31:17] == 15'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_31 = io_operand[31:16] == 16'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_33 = io_operand[31:15] == 17'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_35 = io_operand[31:14] == 18'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_37 = io_operand[31:13] == 19'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_39 = io_operand[31:12] == 20'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_41 = io_operand[31:11] == 21'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_43 = io_operand[31:10] == 22'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_45 = io_operand[31:9] == 23'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_47 = io_operand[31:8] == 24'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_49 = io_operand[31:7] == 25'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_51 = io_operand[31:6] == 26'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_53 = io_operand[31:5] == 27'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_55 = io_operand[31:4] == 28'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_57 = io_operand[31:3] == 29'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_59 = io_operand[31:2] == 30'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_61 = io_operand[31:1] == 31'h1; // @[exu_div_ctl.scala 956:63]
+  wire  _T_63 = io_operand[31:0] == 32'h1; // @[exu_div_ctl.scala 956:63]
+  wire [1:0] _T_66 = _T_5 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_67 = _T_7 ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_68 = _T_9 ? 3'h4 : 3'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_69 = _T_11 ? 3'h5 : 3'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_70 = _T_13 ? 3'h6 : 3'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_71 = _T_15 ? 3'h7 : 3'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_72 = _T_17 ? 4'h8 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_73 = _T_19 ? 4'h9 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_74 = _T_21 ? 4'ha : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_75 = _T_23 ? 4'hb : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_76 = _T_25 ? 4'hc : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_77 = _T_27 ? 4'hd : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_78 = _T_29 ? 4'he : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_79 = _T_31 ? 4'hf : 4'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_80 = _T_33 ? 5'h10 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_81 = _T_35 ? 5'h11 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_82 = _T_37 ? 5'h12 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_83 = _T_39 ? 5'h13 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_84 = _T_41 ? 5'h14 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_85 = _T_43 ? 5'h15 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_86 = _T_45 ? 5'h16 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_87 = _T_47 ? 5'h17 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_88 = _T_49 ? 5'h18 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_89 = _T_51 ? 5'h19 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_90 = _T_53 ? 5'h1a : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_91 = _T_55 ? 5'h1b : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_92 = _T_57 ? 5'h1c : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_93 = _T_59 ? 5'h1d : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_94 = _T_61 ? 5'h1e : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_95 = _T_63 ? 5'h1f : 5'h0; // @[Mux.scala 27:72]
+  wire [1:0] _GEN_1 = {{1'd0}, _T_3}; // @[Mux.scala 27:72]
+  wire [1:0] _T_97 = _GEN_1 | _T_66; // @[Mux.scala 27:72]
+  wire [1:0] _T_98 = _T_97 | _T_67; // @[Mux.scala 27:72]
+  wire [2:0] _GEN_2 = {{1'd0}, _T_98}; // @[Mux.scala 27:72]
+  wire [2:0] _T_99 = _GEN_2 | _T_68; // @[Mux.scala 27:72]
+  wire [2:0] _T_100 = _T_99 | _T_69; // @[Mux.scala 27:72]
+  wire [2:0] _T_101 = _T_100 | _T_70; // @[Mux.scala 27:72]
+  wire [2:0] _T_102 = _T_101 | _T_71; // @[Mux.scala 27:72]
+  wire [3:0] _GEN_3 = {{1'd0}, _T_102}; // @[Mux.scala 27:72]
+  wire [3:0] _T_103 = _GEN_3 | _T_72; // @[Mux.scala 27:72]
+  wire [3:0] _T_104 = _T_103 | _T_73; // @[Mux.scala 27:72]
+  wire [3:0] _T_105 = _T_104 | _T_74; // @[Mux.scala 27:72]
+  wire [3:0] _T_106 = _T_105 | _T_75; // @[Mux.scala 27:72]
+  wire [3:0] _T_107 = _T_106 | _T_76; // @[Mux.scala 27:72]
+  wire [3:0] _T_108 = _T_107 | _T_77; // @[Mux.scala 27:72]
+  wire [3:0] _T_109 = _T_108 | _T_78; // @[Mux.scala 27:72]
+  wire [3:0] _T_110 = _T_109 | _T_79; // @[Mux.scala 27:72]
+  wire [4:0] _GEN_4 = {{1'd0}, _T_110}; // @[Mux.scala 27:72]
+  wire [4:0] _T_111 = _GEN_4 | _T_80; // @[Mux.scala 27:72]
+  wire [4:0] _T_112 = _T_111 | _T_81; // @[Mux.scala 27:72]
+  wire [4:0] _T_113 = _T_112 | _T_82; // @[Mux.scala 27:72]
+  wire [4:0] _T_114 = _T_113 | _T_83; // @[Mux.scala 27:72]
+  wire [4:0] _T_115 = _T_114 | _T_84; // @[Mux.scala 27:72]
+  wire [4:0] _T_116 = _T_115 | _T_85; // @[Mux.scala 27:72]
+  wire [4:0] _T_117 = _T_116 | _T_86; // @[Mux.scala 27:72]
+  wire [4:0] _T_118 = _T_117 | _T_87; // @[Mux.scala 27:72]
+  wire [4:0] _T_119 = _T_118 | _T_88; // @[Mux.scala 27:72]
+  wire [4:0] _T_120 = _T_119 | _T_89; // @[Mux.scala 27:72]
+  wire [4:0] _T_121 = _T_120 | _T_90; // @[Mux.scala 27:72]
+  wire [4:0] _T_122 = _T_121 | _T_91; // @[Mux.scala 27:72]
+  wire [4:0] _T_123 = _T_122 | _T_92; // @[Mux.scala 27:72]
+  wire [4:0] _T_124 = _T_123 | _T_93; // @[Mux.scala 27:72]
+  wire [4:0] _T_125 = _T_124 | _T_94; // @[Mux.scala 27:72]
+  wire [4:0] cls_zeros = _T_125 | _T_95; // @[Mux.scala 27:72]
+  wire  _T_129 = io_operand[31:0] == 32'hffffffff; // @[exu_div_ctl.scala 958:25]
+  wire  _T_137 = io_operand[31:29] == 3'h6; // @[exu_div_ctl.scala 959:76]
+  wire  _T_142 = io_operand[31:28] == 4'he; // @[exu_div_ctl.scala 959:76]
+  wire  _T_147 = io_operand[31:27] == 5'h1e; // @[exu_div_ctl.scala 959:76]
+  wire  _T_152 = io_operand[31:26] == 6'h3e; // @[exu_div_ctl.scala 959:76]
+  wire  _T_157 = io_operand[31:25] == 7'h7e; // @[exu_div_ctl.scala 959:76]
+  wire  _T_162 = io_operand[31:24] == 8'hfe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_167 = io_operand[31:23] == 9'h1fe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_172 = io_operand[31:22] == 10'h3fe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_177 = io_operand[31:21] == 11'h7fe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_182 = io_operand[31:20] == 12'hffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_187 = io_operand[31:19] == 13'h1ffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_192 = io_operand[31:18] == 14'h3ffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_197 = io_operand[31:17] == 15'h7ffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_202 = io_operand[31:16] == 16'hfffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_207 = io_operand[31:15] == 17'h1fffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_212 = io_operand[31:14] == 18'h3fffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_217 = io_operand[31:13] == 19'h7fffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_222 = io_operand[31:12] == 20'hffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_227 = io_operand[31:11] == 21'h1ffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_232 = io_operand[31:10] == 22'h3ffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_237 = io_operand[31:9] == 23'h7ffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_242 = io_operand[31:8] == 24'hfffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_247 = io_operand[31:7] == 25'h1fffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_252 = io_operand[31:6] == 26'h3fffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_257 = io_operand[31:5] == 27'h7fffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_262 = io_operand[31:4] == 28'hffffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_267 = io_operand[31:3] == 29'h1ffffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_272 = io_operand[31:2] == 30'h3ffffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_277 = io_operand[31:1] == 31'h7ffffffe; // @[exu_div_ctl.scala 959:76]
+  wire  _T_282 = io_operand[31:0] == 32'hfffffffe; // @[exu_div_ctl.scala 959:76]
+  wire [1:0] _T_286 = _T_142 ? 2'h2 : 2'h0; // @[Mux.scala 27:72]
+  wire [1:0] _T_287 = _T_147 ? 2'h3 : 2'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_288 = _T_152 ? 3'h4 : 3'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_289 = _T_157 ? 3'h5 : 3'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_290 = _T_162 ? 3'h6 : 3'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_291 = _T_167 ? 3'h7 : 3'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_292 = _T_172 ? 4'h8 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_293 = _T_177 ? 4'h9 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_294 = _T_182 ? 4'ha : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_295 = _T_187 ? 4'hb : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_296 = _T_192 ? 4'hc : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_297 = _T_197 ? 4'hd : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_298 = _T_202 ? 4'he : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_299 = _T_207 ? 4'hf : 4'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_300 = _T_212 ? 5'h10 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_301 = _T_217 ? 5'h11 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_302 = _T_222 ? 5'h12 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_303 = _T_227 ? 5'h13 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_304 = _T_232 ? 5'h14 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_305 = _T_237 ? 5'h15 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_306 = _T_242 ? 5'h16 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_307 = _T_247 ? 5'h17 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_308 = _T_252 ? 5'h18 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_309 = _T_257 ? 5'h19 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_310 = _T_262 ? 5'h1a : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_311 = _T_267 ? 5'h1b : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_312 = _T_272 ? 5'h1c : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_313 = _T_277 ? 5'h1d : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_314 = _T_282 ? 5'h1e : 5'h0; // @[Mux.scala 27:72]
+  wire [1:0] _GEN_5 = {{1'd0}, _T_137}; // @[Mux.scala 27:72]
+  wire [1:0] _T_316 = _GEN_5 | _T_286; // @[Mux.scala 27:72]
+  wire [1:0] _T_317 = _T_316 | _T_287; // @[Mux.scala 27:72]
+  wire [2:0] _GEN_6 = {{1'd0}, _T_317}; // @[Mux.scala 27:72]
+  wire [2:0] _T_318 = _GEN_6 | _T_288; // @[Mux.scala 27:72]
+  wire [2:0] _T_319 = _T_318 | _T_289; // @[Mux.scala 27:72]
+  wire [2:0] _T_320 = _T_319 | _T_290; // @[Mux.scala 27:72]
+  wire [2:0] _T_321 = _T_320 | _T_291; // @[Mux.scala 27:72]
+  wire [3:0] _GEN_7 = {{1'd0}, _T_321}; // @[Mux.scala 27:72]
+  wire [3:0] _T_322 = _GEN_7 | _T_292; // @[Mux.scala 27:72]
+  wire [3:0] _T_323 = _T_322 | _T_293; // @[Mux.scala 27:72]
+  wire [3:0] _T_324 = _T_323 | _T_294; // @[Mux.scala 27:72]
+  wire [3:0] _T_325 = _T_324 | _T_295; // @[Mux.scala 27:72]
+  wire [3:0] _T_326 = _T_325 | _T_296; // @[Mux.scala 27:72]
+  wire [3:0] _T_327 = _T_326 | _T_297; // @[Mux.scala 27:72]
+  wire [3:0] _T_328 = _T_327 | _T_298; // @[Mux.scala 27:72]
+  wire [3:0] _T_329 = _T_328 | _T_299; // @[Mux.scala 27:72]
+  wire [4:0] _GEN_8 = {{1'd0}, _T_329}; // @[Mux.scala 27:72]
+  wire [4:0] _T_330 = _GEN_8 | _T_300; // @[Mux.scala 27:72]
+  wire [4:0] _T_331 = _T_330 | _T_301; // @[Mux.scala 27:72]
+  wire [4:0] _T_332 = _T_331 | _T_302; // @[Mux.scala 27:72]
+  wire [4:0] _T_333 = _T_332 | _T_303; // @[Mux.scala 27:72]
+  wire [4:0] _T_334 = _T_333 | _T_304; // @[Mux.scala 27:72]
+  wire [4:0] _T_335 = _T_334 | _T_305; // @[Mux.scala 27:72]
+  wire [4:0] _T_336 = _T_335 | _T_306; // @[Mux.scala 27:72]
+  wire [4:0] _T_337 = _T_336 | _T_307; // @[Mux.scala 27:72]
+  wire [4:0] _T_338 = _T_337 | _T_308; // @[Mux.scala 27:72]
+  wire [4:0] _T_339 = _T_338 | _T_309; // @[Mux.scala 27:72]
+  wire [4:0] _T_340 = _T_339 | _T_310; // @[Mux.scala 27:72]
+  wire [4:0] _T_341 = _T_340 | _T_311; // @[Mux.scala 27:72]
+  wire [4:0] _T_342 = _T_341 | _T_312; // @[Mux.scala 27:72]
+  wire [4:0] _T_343 = _T_342 | _T_313; // @[Mux.scala 27:72]
+  wire [4:0] _T_344 = _T_343 | _T_314; // @[Mux.scala 27:72]
+  wire [4:0] cls_ones = _T_129 ? 5'h1f : _T_344; // @[exu_div_ctl.scala 958:44]
+  assign io_cls = io_operand[32] ? cls_ones : cls_zeros; // @[exu_div_ctl.scala 960:10]
+endmodule
 module rvclkhdr(
   input   io_clk,
   input   io_en
@@ -16,7 +211,7 @@ module rvclkhdr(
   assign clkhdr_EN = io_en; // @[lib.scala 337:18]
   assign clkhdr_SE = 1'h0; // @[lib.scala 338:18]
 endmodule
-module el2_exu_div_existing_1bit_cheapshortq(
+module exu_div_new_4bit_fullshortq(
   input         clock,
   input         reset,
   input         io_cancel,
@@ -31,20 +226,20 @@ module el2_exu_div_existing_1bit_cheapshortq(
 `ifdef RANDOMIZE_REG_INIT
   reg [31:0] _RAND_0;
   reg [63:0] _RAND_1;
-  reg [63:0] _RAND_2;
+  reg [31:0] _RAND_2;
   reg [31:0] _RAND_3;
   reg [31:0] _RAND_4;
   reg [31:0] _RAND_5;
   reg [31:0] _RAND_6;
   reg [31:0] _RAND_7;
   reg [31:0] _RAND_8;
-  reg [31:0] _RAND_9;
+  reg [63:0] _RAND_9;
   reg [31:0] _RAND_10;
-  reg [63:0] _RAND_11;
-  reg [31:0] _RAND_12;
-  reg [31:0] _RAND_13;
-  reg [31:0] _RAND_14;
 `endif // RANDOMIZE_REG_INIT
+  wire [32:0] a_enc_io_operand; // @[exu_div_ctl.scala 919:21]
+  wire [4:0] a_enc_io_cls; // @[exu_div_ctl.scala 919:21]
+  wire [32:0] b_enc_io_operand; // @[exu_div_ctl.scala 922:21]
+  wire [4:0] b_enc_io_cls; // @[exu_div_ctl.scala 922:21]
   wire  rvclkhdr_io_clk; // @[lib.scala 390:23]
   wire  rvclkhdr_io_en; // @[lib.scala 390:23]
   wire  rvclkhdr_1_io_clk; // @[lib.scala 390:23]
@@ -67,560 +262,688 @@ module el2_exu_div_existing_1bit_cheapshortq(
   wire  rvclkhdr_9_io_en; // @[lib.scala 390:23]
   wire  rvclkhdr_10_io_clk; // @[lib.scala 390:23]
   wire  rvclkhdr_10_io_en; // @[lib.scala 390:23]
-  wire  rvclkhdr_11_io_clk; // @[lib.scala 390:23]
-  wire  rvclkhdr_11_io_en; // @[lib.scala 390:23]
-  wire  rvclkhdr_12_io_clk; // @[lib.scala 390:23]
-  wire  rvclkhdr_12_io_en; // @[lib.scala 390:23]
-  wire  rvclkhdr_13_io_clk; // @[lib.scala 390:23]
-  wire  rvclkhdr_13_io_en; // @[lib.scala 390:23]
-  wire  rvclkhdr_14_io_clk; // @[lib.scala 390:23]
-  wire  rvclkhdr_14_io_en; // @[lib.scala 390:23]
-  wire  _T = ~io_cancel; // @[exu_div_ctl.scala 127:30]
-  reg  valid_ff_x; // @[Reg.scala 27:20]
-  wire  valid_x = valid_ff_x & _T; // @[exu_div_ctl.scala 127:28]
-  reg [32:0] q_ff; // @[Reg.scala 27:20]
-  wire  _T_2 = q_ff[31:4] == 28'h0; // @[exu_div_ctl.scala 133:34]
-  reg [32:0] m_ff; // @[Reg.scala 27:20]
-  wire  _T_4 = m_ff[31:4] == 28'h0; // @[exu_div_ctl.scala 133:57]
-  wire  _T_5 = _T_2 & _T_4; // @[exu_div_ctl.scala 133:43]
-  wire  _T_7 = m_ff[31:0] != 32'h0; // @[exu_div_ctl.scala 133:80]
-  wire  _T_8 = _T_5 & _T_7; // @[exu_div_ctl.scala 133:66]
-  reg  rem_ff; // @[Reg.scala 27:20]
-  wire  _T_9 = ~rem_ff; // @[exu_div_ctl.scala 133:91]
-  wire  _T_10 = _T_8 & _T_9; // @[exu_div_ctl.scala 133:89]
-  wire  _T_11 = _T_10 & valid_x; // @[exu_div_ctl.scala 133:99]
-  wire  _T_13 = q_ff[31:0] == 32'h0; // @[exu_div_ctl.scala 134:18]
-  wire  _T_16 = _T_13 & _T_7; // @[exu_div_ctl.scala 134:27]
-  wire  _T_18 = _T_16 & _T_9; // @[exu_div_ctl.scala 134:50]
-  wire  _T_19 = _T_18 & valid_x; // @[exu_div_ctl.scala 134:60]
-  wire  smallnum_case = _T_11 | _T_19; // @[exu_div_ctl.scala 133:110]
-  wire  _T_23 = ~m_ff[3]; // @[exu_div_ctl.scala 138:69]
-  wire  _T_25 = ~m_ff[2]; // @[exu_div_ctl.scala 138:69]
-  wire  _T_27 = ~m_ff[1]; // @[exu_div_ctl.scala 138:69]
-  wire  _T_28 = _T_23 & _T_25; // @[exu_div_ctl.scala 138:94]
-  wire  _T_29 = _T_28 & _T_27; // @[exu_div_ctl.scala 138:94]
-  wire  _T_30 = q_ff[3] & _T_29; // @[exu_div_ctl.scala 139:10]
-  wire  _T_37 = q_ff[3] & _T_28; // @[exu_div_ctl.scala 139:10]
-  wire  _T_39 = ~m_ff[0]; // @[exu_div_ctl.scala 145:32]
-  wire  _T_40 = _T_37 & _T_39; // @[exu_div_ctl.scala 145:30]
-  wire  _T_50 = q_ff[2] & _T_29; // @[exu_div_ctl.scala 139:10]
-  wire  _T_51 = _T_40 | _T_50; // @[exu_div_ctl.scala 145:41]
-  wire  _T_54 = q_ff[3] & q_ff[2]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_60 = _T_54 & _T_28; // @[exu_div_ctl.scala 139:10]
-  wire  _T_61 = _T_51 | _T_60; // @[exu_div_ctl.scala 145:73]
-  wire  _T_68 = q_ff[2] & _T_28; // @[exu_div_ctl.scala 139:10]
-  wire  _T_71 = _T_68 & _T_39; // @[exu_div_ctl.scala 147:30]
-  wire  _T_81 = q_ff[1] & _T_29; // @[exu_div_ctl.scala 139:10]
-  wire  _T_82 = _T_71 | _T_81; // @[exu_div_ctl.scala 147:41]
-  wire  _T_88 = _T_23 & _T_27; // @[exu_div_ctl.scala 138:94]
-  wire  _T_89 = q_ff[3] & _T_88; // @[exu_div_ctl.scala 139:10]
-  wire  _T_92 = _T_89 & _T_39; // @[exu_div_ctl.scala 147:103]
-  wire  _T_93 = _T_82 | _T_92; // @[exu_div_ctl.scala 147:76]
-  wire  _T_96 = ~q_ff[2]; // @[exu_div_ctl.scala 137:69]
-  wire  _T_97 = q_ff[3] & _T_96; // @[exu_div_ctl.scala 137:94]
-  wire  _T_105 = _T_28 & m_ff[1]; // @[exu_div_ctl.scala 138:94]
-  wire  _T_106 = _T_105 & m_ff[0]; // @[exu_div_ctl.scala 138:94]
-  wire  _T_107 = _T_97 & _T_106; // @[exu_div_ctl.scala 139:10]
-  wire  _T_108 = _T_93 | _T_107; // @[exu_div_ctl.scala 147:114]
-  wire  _T_110 = ~q_ff[3]; // @[exu_div_ctl.scala 137:69]
-  wire  _T_113 = _T_110 & q_ff[2]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_114 = _T_113 & q_ff[1]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_120 = _T_114 & _T_28; // @[exu_div_ctl.scala 139:10]
-  wire  _T_121 = _T_108 | _T_120; // @[exu_div_ctl.scala 148:43]
-  wire  _T_127 = _T_54 & _T_23; // @[exu_div_ctl.scala 139:10]
-  wire  _T_130 = _T_127 & _T_39; // @[exu_div_ctl.scala 148:104]
-  wire  _T_131 = _T_121 | _T_130; // @[exu_div_ctl.scala 148:78]
-  wire  _T_140 = _T_23 & m_ff[2]; // @[exu_div_ctl.scala 138:94]
-  wire  _T_141 = _T_140 & _T_27; // @[exu_div_ctl.scala 138:94]
-  wire  _T_142 = _T_54 & _T_141; // @[exu_div_ctl.scala 139:10]
-  wire  _T_143 = _T_131 | _T_142; // @[exu_div_ctl.scala 148:116]
-  wire  _T_146 = q_ff[3] & q_ff[1]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_152 = _T_146 & _T_88; // @[exu_div_ctl.scala 139:10]
-  wire  _T_153 = _T_143 | _T_152; // @[exu_div_ctl.scala 149:43]
-  wire  _T_158 = _T_54 & q_ff[1]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_163 = _T_158 & _T_140; // @[exu_div_ctl.scala 139:10]
-  wire  _T_164 = _T_153 | _T_163; // @[exu_div_ctl.scala 149:77]
-  wire  _T_168 = q_ff[2] & q_ff[1]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_169 = _T_168 & q_ff[0]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_175 = _T_169 & _T_88; // @[exu_div_ctl.scala 139:10]
-  wire  _T_181 = _T_97 & q_ff[0]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_186 = _T_23 & m_ff[1]; // @[exu_div_ctl.scala 138:94]
-  wire  _T_187 = _T_186 & m_ff[0]; // @[exu_div_ctl.scala 138:94]
-  wire  _T_188 = _T_181 & _T_187; // @[exu_div_ctl.scala 139:10]
-  wire  _T_189 = _T_175 | _T_188; // @[exu_div_ctl.scala 151:44]
-  wire  _T_196 = q_ff[2] & _T_88; // @[exu_div_ctl.scala 139:10]
-  wire  _T_199 = _T_196 & _T_39; // @[exu_div_ctl.scala 151:111]
-  wire  _T_200 = _T_189 | _T_199; // @[exu_div_ctl.scala 151:84]
-  wire  _T_207 = q_ff[1] & _T_28; // @[exu_div_ctl.scala 139:10]
-  wire  _T_210 = _T_207 & _T_39; // @[exu_div_ctl.scala 152:32]
-  wire  _T_211 = _T_200 | _T_210; // @[exu_div_ctl.scala 151:126]
-  wire  _T_221 = q_ff[0] & _T_29; // @[exu_div_ctl.scala 139:10]
-  wire  _T_222 = _T_211 | _T_221; // @[exu_div_ctl.scala 152:46]
-  wire  _T_227 = ~q_ff[1]; // @[exu_div_ctl.scala 137:69]
-  wire  _T_229 = _T_113 & _T_227; // @[exu_div_ctl.scala 137:94]
-  wire  _T_239 = _T_229 & _T_106; // @[exu_div_ctl.scala 139:10]
-  wire  _T_240 = _T_222 | _T_239; // @[exu_div_ctl.scala 152:86]
-  wire  _T_249 = _T_114 & _T_23; // @[exu_div_ctl.scala 139:10]
-  wire  _T_252 = _T_249 & _T_39; // @[exu_div_ctl.scala 153:35]
-  wire  _T_253 = _T_240 | _T_252; // @[exu_div_ctl.scala 152:128]
-  wire  _T_259 = _T_25 & _T_27; // @[exu_div_ctl.scala 138:94]
-  wire  _T_260 = q_ff[3] & _T_259; // @[exu_div_ctl.scala 139:10]
-  wire  _T_263 = _T_260 & _T_39; // @[exu_div_ctl.scala 153:74]
-  wire  _T_264 = _T_253 | _T_263; // @[exu_div_ctl.scala 153:46]
-  wire  _T_274 = _T_140 & m_ff[1]; // @[exu_div_ctl.scala 138:94]
-  wire  _T_275 = _T_97 & _T_274; // @[exu_div_ctl.scala 139:10]
-  wire  _T_276 = _T_264 | _T_275; // @[exu_div_ctl.scala 153:86]
-  wire  _T_290 = _T_114 & _T_141; // @[exu_div_ctl.scala 139:10]
-  wire  _T_291 = _T_276 | _T_290; // @[exu_div_ctl.scala 153:128]
-  wire  _T_297 = _T_113 & q_ff[0]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_303 = _T_297 & _T_88; // @[exu_div_ctl.scala 139:10]
-  wire  _T_304 = _T_291 | _T_303; // @[exu_div_ctl.scala 154:46]
-  wire  _T_311 = _T_97 & _T_227; // @[exu_div_ctl.scala 137:94]
-  wire  _T_317 = _T_140 & m_ff[0]; // @[exu_div_ctl.scala 138:94]
-  wire  _T_318 = _T_311 & _T_317; // @[exu_div_ctl.scala 139:10]
-  wire  _T_319 = _T_304 | _T_318; // @[exu_div_ctl.scala 154:86]
-  wire  _T_324 = _T_96 & q_ff[1]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_325 = _T_324 & q_ff[0]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_331 = _T_325 & _T_28; // @[exu_div_ctl.scala 139:10]
-  wire  _T_332 = _T_319 | _T_331; // @[exu_div_ctl.scala 154:128]
-  wire  _T_338 = _T_54 & _T_27; // @[exu_div_ctl.scala 139:10]
-  wire  _T_341 = _T_338 & _T_39; // @[exu_div_ctl.scala 155:73]
-  wire  _T_342 = _T_332 | _T_341; // @[exu_div_ctl.scala 155:46]
-  wire  _T_350 = _T_114 & q_ff[0]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_355 = _T_350 & _T_140; // @[exu_div_ctl.scala 139:10]
-  wire  _T_356 = _T_342 | _T_355; // @[exu_div_ctl.scala 155:86]
-  wire  _T_363 = m_ff[3] & _T_25; // @[exu_div_ctl.scala 138:94]
-  wire  _T_364 = _T_54 & _T_363; // @[exu_div_ctl.scala 139:10]
-  wire  _T_365 = _T_356 | _T_364; // @[exu_div_ctl.scala 155:128]
-  wire  _T_375 = _T_363 & _T_27; // @[exu_div_ctl.scala 138:94]
-  wire  _T_376 = _T_146 & _T_375; // @[exu_div_ctl.scala 139:10]
-  wire  _T_377 = _T_365 | _T_376; // @[exu_div_ctl.scala 156:46]
-  wire  _T_380 = q_ff[3] & q_ff[0]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_386 = _T_380 & _T_259; // @[exu_div_ctl.scala 139:10]
-  wire  _T_387 = _T_377 | _T_386; // @[exu_div_ctl.scala 156:86]
-  wire  _T_391 = q_ff[3] & _T_227; // @[exu_div_ctl.scala 137:94]
-  wire  _T_399 = _T_274 & m_ff[0]; // @[exu_div_ctl.scala 138:94]
-  wire  _T_400 = _T_391 & _T_399; // @[exu_div_ctl.scala 139:10]
-  wire  _T_401 = _T_387 | _T_400; // @[exu_div_ctl.scala 156:128]
-  wire  _T_408 = _T_158 & m_ff[3]; // @[exu_div_ctl.scala 139:10]
-  wire  _T_411 = _T_408 & _T_39; // @[exu_div_ctl.scala 157:75]
-  wire  _T_412 = _T_401 | _T_411; // @[exu_div_ctl.scala 157:46]
-  wire  _T_421 = m_ff[3] & _T_27; // @[exu_div_ctl.scala 138:94]
-  wire  _T_422 = _T_158 & _T_421; // @[exu_div_ctl.scala 139:10]
-  wire  _T_423 = _T_412 | _T_422; // @[exu_div_ctl.scala 157:86]
-  wire  _T_428 = _T_54 & q_ff[0]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_433 = _T_428 & _T_421; // @[exu_div_ctl.scala 139:10]
-  wire  _T_434 = _T_423 | _T_433; // @[exu_div_ctl.scala 157:128]
-  wire  _T_440 = _T_97 & q_ff[1]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_445 = _T_440 & _T_186; // @[exu_div_ctl.scala 139:10]
-  wire  _T_446 = _T_434 | _T_445; // @[exu_div_ctl.scala 158:46]
-  wire  _T_451 = _T_146 & q_ff[0]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_454 = _T_451 & _T_25; // @[exu_div_ctl.scala 139:10]
-  wire  _T_455 = _T_446 | _T_454; // @[exu_div_ctl.scala 158:86]
-  wire  _T_462 = _T_158 & q_ff[0]; // @[exu_div_ctl.scala 137:94]
-  wire  _T_464 = _T_462 & m_ff[3]; // @[exu_div_ctl.scala 139:10]
-  wire  _T_465 = _T_455 | _T_464; // @[exu_div_ctl.scala 158:128]
-  wire  _T_471 = _T_146 & _T_25; // @[exu_div_ctl.scala 139:10]
-  wire  _T_474 = _T_471 & _T_39; // @[exu_div_ctl.scala 159:72]
-  wire  _T_475 = _T_465 | _T_474; // @[exu_div_ctl.scala 159:46]
-  wire [3:0] smallnum = {_T_30,_T_61,_T_164,_T_475}; // @[Cat.scala 29:58]
-  reg  sign_ff; // @[Reg.scala 27:20]
-  wire  _T_479 = sign_ff & q_ff[31]; // @[exu_div_ctl.scala 168:34]
-  wire [32:0] short_dividend = {_T_479,q_ff[31:0]}; // @[Cat.scala 29:58]
-  wire  _T_484 = ~short_dividend[32]; // @[exu_div_ctl.scala 173:7]
-  wire  _T_487 = short_dividend[31:24] != 8'h0; // @[exu_div_ctl.scala 173:60]
-  wire  _T_492 = short_dividend[31:23] != 9'h1ff; // @[exu_div_ctl.scala 174:59]
-  wire  _T_493 = _T_484 & _T_487; // @[Mux.scala 27:72]
-  wire  _T_494 = short_dividend[32] & _T_492; // @[Mux.scala 27:72]
-  wire  _T_495 = _T_493 | _T_494; // @[Mux.scala 27:72]
-  wire  _T_502 = short_dividend[23:16] != 8'h0; // @[exu_div_ctl.scala 177:60]
-  wire  _T_507 = short_dividend[22:15] != 8'hff; // @[exu_div_ctl.scala 178:59]
-  wire  _T_508 = _T_484 & _T_502; // @[Mux.scala 27:72]
-  wire  _T_509 = short_dividend[32] & _T_507; // @[Mux.scala 27:72]
-  wire  _T_510 = _T_508 | _T_509; // @[Mux.scala 27:72]
-  wire  _T_517 = short_dividend[15:8] != 8'h0; // @[exu_div_ctl.scala 181:59]
-  wire  _T_522 = short_dividend[14:7] != 8'hff; // @[exu_div_ctl.scala 182:58]
-  wire  _T_523 = _T_484 & _T_517; // @[Mux.scala 27:72]
-  wire  _T_524 = short_dividend[32] & _T_522; // @[Mux.scala 27:72]
-  wire  _T_525 = _T_523 | _T_524; // @[Mux.scala 27:72]
-  wire [4:0] a_cls = {2'h0,_T_495,_T_510,_T_525}; // @[Cat.scala 29:58]
-  wire  _T_531 = ~m_ff[32]; // @[exu_div_ctl.scala 187:7]
-  wire  _T_534 = m_ff[31:24] != 8'h0; // @[exu_div_ctl.scala 187:40]
-  wire  _T_539 = m_ff[31:24] != 8'hff; // @[exu_div_ctl.scala 188:39]
-  wire  _T_540 = _T_531 & _T_534; // @[Mux.scala 27:72]
-  wire  _T_541 = m_ff[32] & _T_539; // @[Mux.scala 27:72]
-  wire  _T_542 = _T_540 | _T_541; // @[Mux.scala 27:72]
-  wire  _T_549 = m_ff[23:16] != 8'h0; // @[exu_div_ctl.scala 191:40]
-  wire  _T_554 = m_ff[23:16] != 8'hff; // @[exu_div_ctl.scala 192:39]
-  wire  _T_555 = _T_531 & _T_549; // @[Mux.scala 27:72]
-  wire  _T_556 = m_ff[32] & _T_554; // @[Mux.scala 27:72]
-  wire  _T_557 = _T_555 | _T_556; // @[Mux.scala 27:72]
-  wire  _T_564 = m_ff[15:8] != 8'h0; // @[exu_div_ctl.scala 195:39]
-  wire  _T_569 = m_ff[15:8] != 8'hff; // @[exu_div_ctl.scala 196:38]
-  wire  _T_570 = _T_531 & _T_564; // @[Mux.scala 27:72]
-  wire  _T_571 = m_ff[32] & _T_569; // @[Mux.scala 27:72]
-  wire  _T_572 = _T_570 | _T_571; // @[Mux.scala 27:72]
-  wire [4:0] b_cls = {2'h0,_T_542,_T_557,_T_572}; // @[Cat.scala 29:58]
-  wire  _T_577 = a_cls[2:1] == 2'h1; // @[exu_div_ctl.scala 200:19]
-  wire  _T_580 = _T_577 & b_cls[2]; // @[exu_div_ctl.scala 200:34]
-  wire  _T_582 = a_cls[2:0] == 3'h1; // @[exu_div_ctl.scala 201:21]
-  wire  _T_585 = _T_582 & b_cls[2]; // @[exu_div_ctl.scala 201:36]
-  wire  _T_586 = _T_580 | _T_585; // @[exu_div_ctl.scala 200:65]
-  wire  _T_588 = a_cls[2:0] == 3'h0; // @[exu_div_ctl.scala 202:21]
-  wire  _T_591 = _T_588 & b_cls[2]; // @[exu_div_ctl.scala 202:36]
-  wire  _T_592 = _T_586 | _T_591; // @[exu_div_ctl.scala 201:67]
-  wire  _T_596 = b_cls[2:1] == 2'h1; // @[exu_div_ctl.scala 203:50]
-  wire  _T_597 = _T_582 & _T_596; // @[exu_div_ctl.scala 203:36]
-  wire  _T_598 = _T_592 | _T_597; // @[exu_div_ctl.scala 202:67]
-  wire  _T_603 = _T_588 & _T_596; // @[exu_div_ctl.scala 204:36]
-  wire  _T_604 = _T_598 | _T_603; // @[exu_div_ctl.scala 203:67]
-  wire  _T_608 = b_cls[2:0] == 3'h1; // @[exu_div_ctl.scala 205:50]
-  wire  _T_609 = _T_588 & _T_608; // @[exu_div_ctl.scala 205:36]
-  wire  _T_610 = _T_604 | _T_609; // @[exu_div_ctl.scala 204:67]
-  wire  _T_615 = a_cls[2] & b_cls[2]; // @[exu_div_ctl.scala 207:34]
-  wire  _T_620 = _T_577 & _T_596; // @[exu_div_ctl.scala 208:36]
-  wire  _T_621 = _T_615 | _T_620; // @[exu_div_ctl.scala 207:65]
-  wire  _T_626 = _T_582 & _T_608; // @[exu_div_ctl.scala 209:36]
-  wire  _T_627 = _T_621 | _T_626; // @[exu_div_ctl.scala 208:67]
-  wire  _T_631 = b_cls[2:0] == 3'h0; // @[exu_div_ctl.scala 210:50]
-  wire  _T_632 = _T_588 & _T_631; // @[exu_div_ctl.scala 210:36]
-  wire  _T_633 = _T_627 | _T_632; // @[exu_div_ctl.scala 209:67]
-  wire  _T_638 = a_cls[2] & _T_596; // @[exu_div_ctl.scala 212:34]
-  wire  _T_643 = _T_577 & _T_608; // @[exu_div_ctl.scala 213:36]
-  wire  _T_644 = _T_638 | _T_643; // @[exu_div_ctl.scala 212:65]
-  wire  _T_649 = _T_582 & _T_631; // @[exu_div_ctl.scala 214:36]
-  wire  _T_650 = _T_644 | _T_649; // @[exu_div_ctl.scala 213:67]
-  wire  _T_655 = a_cls[2] & _T_608; // @[exu_div_ctl.scala 216:34]
-  wire  _T_660 = _T_577 & _T_631; // @[exu_div_ctl.scala 217:36]
-  wire  _T_661 = _T_655 | _T_660; // @[exu_div_ctl.scala 216:65]
-  wire [3:0] shortq_raw = {_T_610,_T_633,_T_650,_T_661}; // @[Cat.scala 29:58]
-  wire  _T_666 = valid_ff_x & _T_7; // @[exu_div_ctl.scala 220:35]
-  wire  _T_667 = shortq_raw != 4'h0; // @[exu_div_ctl.scala 220:78]
-  wire  shortq_enable = _T_666 & _T_667; // @[exu_div_ctl.scala 220:64]
-  wire [3:0] _T_669 = shortq_enable ? 4'hf : 4'h0; // @[Bitwise.scala 72:12]
-  wire [3:0] _T_670 = _T_669 & shortq_raw; // @[exu_div_ctl.scala 221:57]
-  wire [5:0] shortq_shift = {2'h0,_T_670}; // @[Cat.scala 29:58]
-  reg [5:0] _T_1521; // @[Reg.scala 27:20]
-  wire [3:0] shortq_shift_xx = _T_1521[3:0]; // @[exu_div_ctl.scala 277:21]
-  wire [4:0] _T_679 = shortq_shift_xx[3] ? 5'h1f : 5'h0; // @[Mux.scala 27:72]
-  wire [4:0] _T_680 = shortq_shift_xx[2] ? 5'h18 : 5'h0; // @[Mux.scala 27:72]
-  wire [4:0] _T_681 = shortq_shift_xx[1] ? 5'h10 : 5'h0; // @[Mux.scala 27:72]
-  wire [3:0] _T_682 = shortq_shift_xx[0] ? 4'h8 : 4'h0; // @[Mux.scala 27:72]
-  wire [4:0] _T_683 = _T_679 | _T_680; // @[Mux.scala 27:72]
-  wire [4:0] _T_684 = _T_683 | _T_681; // @[Mux.scala 27:72]
-  wire [4:0] _GEN_15 = {{1'd0}, _T_682}; // @[Mux.scala 27:72]
-  wire [4:0] _T_685 = _T_684 | _GEN_15; // @[Mux.scala 27:72]
-  wire [5:0] shortq_shift_ff = {1'h0,_T_685}; // @[Cat.scala 29:58]
-  reg [5:0] count; // @[Reg.scala 27:20]
-  wire  _T_688 = count == 6'h20; // @[exu_div_ctl.scala 230:55]
-  wire  _T_689 = count == 6'h21; // @[exu_div_ctl.scala 230:76]
-  wire  _T_690 = _T_9 ? _T_688 : _T_689; // @[exu_div_ctl.scala 230:39]
-  wire  finish = smallnum_case | _T_690; // @[exu_div_ctl.scala 230:34]
-  reg  run_state; // @[Reg.scala 27:20]
-  wire  _T_691 = io_valid_in | run_state; // @[exu_div_ctl.scala 231:32]
-  wire  _T_692 = _T_691 | finish; // @[exu_div_ctl.scala 231:44]
-  reg  finish_ff; // @[Reg.scala 27:20]
-  wire  div_clken = _T_692 | finish_ff; // @[exu_div_ctl.scala 231:53]
-  wire  _T_694 = ~finish; // @[exu_div_ctl.scala 232:48]
-  wire  _T_695 = _T_691 & _T_694; // @[exu_div_ctl.scala 232:46]
-  wire  run_in = _T_695 & _T; // @[exu_div_ctl.scala 232:56]
-  wire  _T_698 = run_state & _T_694; // @[exu_div_ctl.scala 233:35]
-  wire  _T_700 = _T_698 & _T; // @[exu_div_ctl.scala 233:45]
-  wire  _T_701 = ~shortq_enable; // @[exu_div_ctl.scala 233:60]
-  wire  _T_702 = _T_700 & _T_701; // @[exu_div_ctl.scala 233:58]
-  wire [5:0] _T_704 = _T_702 ? 6'h3f : 6'h0; // @[Bitwise.scala 72:12]
-  wire [5:0] _T_706 = {1'h0,shortq_shift_ff[4:0]}; // @[Cat.scala 29:58]
-  wire [5:0] _T_708 = count + _T_706; // @[exu_div_ctl.scala 233:86]
-  wire [5:0] _T_710 = _T_708 + 6'h1; // @[exu_div_ctl.scala 233:118]
-  wire [5:0] count_in = _T_704 & _T_710; // @[exu_div_ctl.scala 233:77]
-  wire  _T_714 = ~io_signed_in; // @[exu_div_ctl.scala 235:20]
-  wire  _T_715 = io_divisor_in != 32'h0; // @[exu_div_ctl.scala 235:51]
-  wire  sign_eff = _T_714 & _T_715; // @[exu_div_ctl.scala 235:34]
-  wire  _T_716 = ~run_state; // @[exu_div_ctl.scala 238:6]
-  wire [32:0] _T_718 = {1'h0,io_dividend_in}; // @[Cat.scala 29:58]
+  wire  _T = ~io_cancel; // @[exu_div_ctl.scala 777:35]
+  wire  valid_ff_in = io_valid_in & _T; // @[exu_div_ctl.scala 777:33]
+  wire  _T_1 = ~io_valid_in; // @[exu_div_ctl.scala 778:35]
+  reg [2:0] control_ff; // @[Reg.scala 27:20]
+  wire  _T_3 = _T_1 & control_ff[2]; // @[exu_div_ctl.scala 778:48]
+  wire  _T_4 = io_valid_in & io_signed_in; // @[exu_div_ctl.scala 778:80]
+  wire  _T_6 = _T_4 & io_dividend_in[31]; // @[exu_div_ctl.scala 778:96]
+  wire  _T_7 = _T_3 | _T_6; // @[exu_div_ctl.scala 778:65]
+  wire  _T_10 = _T_1 & control_ff[1]; // @[exu_div_ctl.scala 778:133]
+  wire  _T_13 = _T_4 & io_divisor_in[31]; // @[exu_div_ctl.scala 778:181]
+  wire  _T_14 = _T_10 | _T_13; // @[exu_div_ctl.scala 778:150]
+  wire  _T_17 = _T_1 & control_ff[0]; // @[exu_div_ctl.scala 778:218]
+  wire  _T_18 = io_valid_in & io_rem_in; // @[exu_div_ctl.scala 778:250]
+  wire  _T_19 = _T_17 | _T_18; // @[exu_div_ctl.scala 778:235]
+  wire [2:0] control_in = {_T_7,_T_14,_T_19}; // @[Cat.scala 29:58]
+  reg [32:0] b_ff1; // @[Reg.scala 27:20]
+  wire [37:0] b_ff = {b_ff1[32],b_ff1[32],b_ff1[32],b_ff1[32],b_ff1[32],b_ff1}; // @[Cat.scala 29:58]
+  wire  _T_22 = b_ff[31:0] == 32'h0; // @[exu_div_ctl.scala 782:54]
+  reg  valid_ff; // @[Reg.scala 27:20]
+  wire  by_zero_case = valid_ff & _T_22; // @[exu_div_ctl.scala 782:40]
+  reg [31:0] a_ff; // @[Reg.scala 27:20]
+  wire  _T_24 = a_ff[31:4] == 28'h0; // @[exu_div_ctl.scala 784:37]
+  wire  _T_26 = b_ff[31:4] == 28'h0; // @[exu_div_ctl.scala 784:60]
+  wire  _T_27 = _T_24 & _T_26; // @[exu_div_ctl.scala 784:46]
+  wire  _T_28 = ~by_zero_case; // @[exu_div_ctl.scala 784:71]
+  wire  _T_29 = _T_27 & _T_28; // @[exu_div_ctl.scala 784:69]
+  wire  _T_30 = ~control_ff[0]; // @[exu_div_ctl.scala 784:87]
+  wire  _T_31 = _T_29 & _T_30; // @[exu_div_ctl.scala 784:85]
+  wire  _T_32 = _T_31 & valid_ff; // @[exu_div_ctl.scala 784:95]
+  wire  _T_34 = _T_32 & _T; // @[exu_div_ctl.scala 784:106]
+  wire  _T_36 = a_ff == 32'h0; // @[exu_div_ctl.scala 785:18]
+  wire  _T_38 = _T_36 & _T_28; // @[exu_div_ctl.scala 785:27]
+  wire  _T_40 = _T_38 & _T_30; // @[exu_div_ctl.scala 785:43]
+  wire  _T_41 = _T_40 & valid_ff; // @[exu_div_ctl.scala 785:53]
+  wire  _T_43 = _T_41 & _T; // @[exu_div_ctl.scala 785:64]
+  wire  smallnum_case = _T_34 | _T_43; // @[exu_div_ctl.scala 784:120]
+  reg [6:0] count_ff; // @[Reg.scala 27:20]
+  wire  _T_44 = |count_ff; // @[exu_div_ctl.scala 786:42]
   reg  shortq_enable_ff; // @[Reg.scala 27:20]
-  wire  _T_719 = valid_ff_x | shortq_enable_ff; // @[exu_div_ctl.scala 239:30]
-  wire  _T_720 = run_state & _T_719; // @[exu_div_ctl.scala 239:16]
-  reg  dividend_neg_ff; // @[Reg.scala 27:20]
-  wire  _T_744 = sign_ff & dividend_neg_ff; // @[exu_div_ctl.scala 243:32]
-  wire  _T_929 = |q_ff[30:0]; // @[lib.scala 428:35]
-  wire  _T_931 = ~q_ff[31]; // @[lib.scala 428:40]
-  wire  _T_933 = _T_929 ? _T_931 : q_ff[31]; // @[lib.scala 428:23]
-  wire  _T_923 = |q_ff[29:0]; // @[lib.scala 428:35]
-  wire  _T_925 = ~q_ff[30]; // @[lib.scala 428:40]
-  wire  _T_927 = _T_923 ? _T_925 : q_ff[30]; // @[lib.scala 428:23]
-  wire  _T_917 = |q_ff[28:0]; // @[lib.scala 428:35]
-  wire  _T_919 = ~q_ff[29]; // @[lib.scala 428:40]
-  wire  _T_921 = _T_917 ? _T_919 : q_ff[29]; // @[lib.scala 428:23]
-  wire  _T_911 = |q_ff[27:0]; // @[lib.scala 428:35]
-  wire  _T_913 = ~q_ff[28]; // @[lib.scala 428:40]
-  wire  _T_915 = _T_911 ? _T_913 : q_ff[28]; // @[lib.scala 428:23]
-  wire  _T_905 = |q_ff[26:0]; // @[lib.scala 428:35]
-  wire  _T_907 = ~q_ff[27]; // @[lib.scala 428:40]
-  wire  _T_909 = _T_905 ? _T_907 : q_ff[27]; // @[lib.scala 428:23]
-  wire  _T_899 = |q_ff[25:0]; // @[lib.scala 428:35]
-  wire  _T_901 = ~q_ff[26]; // @[lib.scala 428:40]
-  wire  _T_903 = _T_899 ? _T_901 : q_ff[26]; // @[lib.scala 428:23]
-  wire  _T_893 = |q_ff[24:0]; // @[lib.scala 428:35]
-  wire  _T_895 = ~q_ff[25]; // @[lib.scala 428:40]
-  wire  _T_897 = _T_893 ? _T_895 : q_ff[25]; // @[lib.scala 428:23]
-  wire  _T_887 = |q_ff[23:0]; // @[lib.scala 428:35]
-  wire  _T_889 = ~q_ff[24]; // @[lib.scala 428:40]
-  wire  _T_891 = _T_887 ? _T_889 : q_ff[24]; // @[lib.scala 428:23]
-  wire  _T_881 = |q_ff[22:0]; // @[lib.scala 428:35]
-  wire  _T_883 = ~q_ff[23]; // @[lib.scala 428:40]
-  wire  _T_885 = _T_881 ? _T_883 : q_ff[23]; // @[lib.scala 428:23]
-  wire  _T_875 = |q_ff[21:0]; // @[lib.scala 428:35]
-  wire  _T_877 = ~q_ff[22]; // @[lib.scala 428:40]
-  wire  _T_879 = _T_875 ? _T_877 : q_ff[22]; // @[lib.scala 428:23]
-  wire  _T_869 = |q_ff[20:0]; // @[lib.scala 428:35]
-  wire  _T_871 = ~q_ff[21]; // @[lib.scala 428:40]
-  wire  _T_873 = _T_869 ? _T_871 : q_ff[21]; // @[lib.scala 428:23]
-  wire  _T_863 = |q_ff[19:0]; // @[lib.scala 428:35]
-  wire  _T_865 = ~q_ff[20]; // @[lib.scala 428:40]
-  wire  _T_867 = _T_863 ? _T_865 : q_ff[20]; // @[lib.scala 428:23]
-  wire  _T_857 = |q_ff[18:0]; // @[lib.scala 428:35]
-  wire  _T_859 = ~q_ff[19]; // @[lib.scala 428:40]
-  wire  _T_861 = _T_857 ? _T_859 : q_ff[19]; // @[lib.scala 428:23]
-  wire  _T_851 = |q_ff[17:0]; // @[lib.scala 428:35]
-  wire  _T_853 = ~q_ff[18]; // @[lib.scala 428:40]
-  wire  _T_855 = _T_851 ? _T_853 : q_ff[18]; // @[lib.scala 428:23]
-  wire  _T_845 = |q_ff[16:0]; // @[lib.scala 428:35]
-  wire  _T_847 = ~q_ff[17]; // @[lib.scala 428:40]
-  wire  _T_849 = _T_845 ? _T_847 : q_ff[17]; // @[lib.scala 428:23]
-  wire  _T_839 = |q_ff[15:0]; // @[lib.scala 428:35]
-  wire  _T_841 = ~q_ff[16]; // @[lib.scala 428:40]
-  wire  _T_843 = _T_839 ? _T_841 : q_ff[16]; // @[lib.scala 428:23]
-  wire [7:0] _T_954 = {_T_885,_T_879,_T_873,_T_867,_T_861,_T_855,_T_849,_T_843}; // @[lib.scala 430:14]
-  wire  _T_833 = |q_ff[14:0]; // @[lib.scala 428:35]
-  wire  _T_835 = ~q_ff[15]; // @[lib.scala 428:40]
-  wire  _T_837 = _T_833 ? _T_835 : q_ff[15]; // @[lib.scala 428:23]
-  wire  _T_827 = |q_ff[13:0]; // @[lib.scala 428:35]
-  wire  _T_829 = ~q_ff[14]; // @[lib.scala 428:40]
-  wire  _T_831 = _T_827 ? _T_829 : q_ff[14]; // @[lib.scala 428:23]
-  wire  _T_821 = |q_ff[12:0]; // @[lib.scala 428:35]
-  wire  _T_823 = ~q_ff[13]; // @[lib.scala 428:40]
-  wire  _T_825 = _T_821 ? _T_823 : q_ff[13]; // @[lib.scala 428:23]
-  wire  _T_815 = |q_ff[11:0]; // @[lib.scala 428:35]
-  wire  _T_817 = ~q_ff[12]; // @[lib.scala 428:40]
-  wire  _T_819 = _T_815 ? _T_817 : q_ff[12]; // @[lib.scala 428:23]
-  wire  _T_809 = |q_ff[10:0]; // @[lib.scala 428:35]
-  wire  _T_811 = ~q_ff[11]; // @[lib.scala 428:40]
-  wire  _T_813 = _T_809 ? _T_811 : q_ff[11]; // @[lib.scala 428:23]
-  wire  _T_803 = |q_ff[9:0]; // @[lib.scala 428:35]
-  wire  _T_805 = ~q_ff[10]; // @[lib.scala 428:40]
-  wire  _T_807 = _T_803 ? _T_805 : q_ff[10]; // @[lib.scala 428:23]
-  wire  _T_797 = |q_ff[8:0]; // @[lib.scala 428:35]
-  wire  _T_799 = ~q_ff[9]; // @[lib.scala 428:40]
-  wire  _T_801 = _T_797 ? _T_799 : q_ff[9]; // @[lib.scala 428:23]
-  wire  _T_791 = |q_ff[7:0]; // @[lib.scala 428:35]
-  wire  _T_793 = ~q_ff[8]; // @[lib.scala 428:40]
-  wire  _T_795 = _T_791 ? _T_793 : q_ff[8]; // @[lib.scala 428:23]
-  wire  _T_785 = |q_ff[6:0]; // @[lib.scala 428:35]
-  wire  _T_787 = ~q_ff[7]; // @[lib.scala 428:40]
-  wire  _T_789 = _T_785 ? _T_787 : q_ff[7]; // @[lib.scala 428:23]
-  wire  _T_779 = |q_ff[5:0]; // @[lib.scala 428:35]
-  wire  _T_781 = ~q_ff[6]; // @[lib.scala 428:40]
-  wire  _T_783 = _T_779 ? _T_781 : q_ff[6]; // @[lib.scala 428:23]
-  wire  _T_773 = |q_ff[4:0]; // @[lib.scala 428:35]
-  wire  _T_775 = ~q_ff[5]; // @[lib.scala 428:40]
-  wire  _T_777 = _T_773 ? _T_775 : q_ff[5]; // @[lib.scala 428:23]
-  wire  _T_767 = |q_ff[3:0]; // @[lib.scala 428:35]
-  wire  _T_769 = ~q_ff[4]; // @[lib.scala 428:40]
-  wire  _T_771 = _T_767 ? _T_769 : q_ff[4]; // @[lib.scala 428:23]
-  wire  _T_761 = |q_ff[2:0]; // @[lib.scala 428:35]
-  wire  _T_763 = ~q_ff[3]; // @[lib.scala 428:40]
-  wire  _T_765 = _T_761 ? _T_763 : q_ff[3]; // @[lib.scala 428:23]
-  wire  _T_755 = |q_ff[1:0]; // @[lib.scala 428:35]
-  wire  _T_757 = ~q_ff[2]; // @[lib.scala 428:40]
-  wire  _T_759 = _T_755 ? _T_757 : q_ff[2]; // @[lib.scala 428:23]
-  wire  _T_749 = |q_ff[0]; // @[lib.scala 428:35]
-  wire  _T_751 = ~q_ff[1]; // @[lib.scala 428:40]
-  wire  _T_753 = _T_749 ? _T_751 : q_ff[1]; // @[lib.scala 428:23]
-  wire [6:0] _T_939 = {_T_789,_T_783,_T_777,_T_771,_T_765,_T_759,_T_753}; // @[lib.scala 430:14]
-  wire [14:0] _T_947 = {_T_837,_T_831,_T_825,_T_819,_T_813,_T_807,_T_801,_T_795,_T_939}; // @[lib.scala 430:14]
-  wire [30:0] _T_963 = {_T_933,_T_927,_T_921,_T_915,_T_909,_T_903,_T_897,_T_891,_T_954,_T_947}; // @[lib.scala 430:14]
-  wire [31:0] _T_965 = {_T_963,q_ff[0]}; // @[Cat.scala 29:58]
-  wire [31:0] dividend_eff = _T_744 ? _T_965 : q_ff[31:0]; // @[exu_div_ctl.scala 243:22]
-  wire [32:0] _T_1001 = run_state ? 33'h1ffffffff : 33'h0; // @[Bitwise.scala 72:12]
-  wire  _T_1013 = _T_689 & rem_ff; // @[exu_div_ctl.scala 257:41]
-  reg [32:0] a_ff; // @[Reg.scala 27:20]
-  wire  rem_correct = _T_1013 & a_ff[32]; // @[exu_div_ctl.scala 257:50]
-  wire [32:0] _T_986 = rem_correct ? a_ff : 33'h0; // @[Mux.scala 27:72]
-  wire  _T_975 = ~rem_correct; // @[exu_div_ctl.scala 248:6]
-  wire  _T_976 = ~shortq_enable_ff; // @[exu_div_ctl.scala 248:21]
-  wire  _T_977 = _T_975 & _T_976; // @[exu_div_ctl.scala 248:19]
-  wire [32:0] _T_981 = {a_ff[31:0],q_ff[32]}; // @[Cat.scala 29:58]
-  wire [32:0] _T_987 = _T_977 ? _T_981 : 33'h0; // @[Mux.scala 27:72]
-  wire [32:0] _T_989 = _T_986 | _T_987; // @[Mux.scala 27:72]
-  wire  _T_983 = _T_975 & shortq_enable_ff; // @[exu_div_ctl.scala 249:19]
-  wire [64:0] _T_971 = {33'h0,dividend_eff}; // @[Cat.scala 29:58]
-  wire [95:0] _GEN_16 = {{31'd0}, _T_971}; // @[exu_div_ctl.scala 245:47]
-  wire [95:0] _T_973 = _GEN_16 << shortq_shift_ff[4:0]; // @[exu_div_ctl.scala 245:47]
-  wire [64:0] a_eff_shift = _T_973[64:0]; // @[exu_div_ctl.scala 245:15]
-  wire [32:0] _T_988 = _T_983 ? a_eff_shift[64:32] : 33'h0; // @[Mux.scala 27:72]
-  wire [32:0] a_eff = _T_989 | _T_988; // @[Mux.scala 27:72]
-  wire [32:0] a_shift = _T_1001 & a_eff; // @[exu_div_ctl.scala 252:33]
-  wire  _T_1010 = a_ff[32] | rem_correct; // @[exu_div_ctl.scala 256:21]
-  reg  divisor_neg_ff; // @[Reg.scala 27:20]
-  wire  m_already_comp = divisor_neg_ff & sign_ff; // @[exu_div_ctl.scala 254:48]
-  wire  add = _T_1010 ^ m_already_comp; // @[exu_div_ctl.scala 256:36]
-  wire [32:0] _T_969 = ~m_ff; // @[exu_div_ctl.scala 244:35]
-  wire [32:0] m_eff = add ? m_ff : _T_969; // @[exu_div_ctl.scala 244:15]
-  wire [32:0] _T_1003 = a_shift + m_eff; // @[exu_div_ctl.scala 253:41]
-  wire  _T_1004 = ~add; // @[exu_div_ctl.scala 253:65]
-  wire [32:0] _T_1005 = {32'h0,_T_1004}; // @[Cat.scala 29:58]
-  wire [32:0] _T_1007 = _T_1003 + _T_1005; // @[exu_div_ctl.scala 253:49]
-  wire [32:0] a_in = _T_1001 & _T_1007; // @[exu_div_ctl.scala 253:30]
-  wire  _T_724 = ~a_in[32]; // @[exu_div_ctl.scala 239:85]
-  wire [32:0] _T_725 = {dividend_eff,_T_724}; // @[Cat.scala 29:58]
-  wire [63:0] _GEN_17 = {{31'd0}, _T_725}; // @[exu_div_ctl.scala 239:96]
-  wire [63:0] _T_727 = _GEN_17 << shortq_shift_ff[4:0]; // @[exu_div_ctl.scala 239:96]
-  wire  _T_729 = ~_T_719; // @[exu_div_ctl.scala 240:18]
-  wire  _T_730 = run_state & _T_729; // @[exu_div_ctl.scala 240:16]
-  wire [32:0] _T_735 = {q_ff[31:0],_T_724}; // @[Cat.scala 29:58]
-  wire [32:0] _T_736 = _T_716 ? _T_718 : 33'h0; // @[Mux.scala 27:72]
-  wire [63:0] _T_737 = _T_720 ? _T_727 : 64'h0; // @[Mux.scala 27:72]
-  wire [32:0] _T_738 = _T_730 ? _T_735 : 33'h0; // @[Mux.scala 27:72]
-  wire [63:0] _GEN_18 = {{31'd0}, _T_736}; // @[Mux.scala 27:72]
-  wire [63:0] _T_739 = _GEN_18 | _T_737; // @[Mux.scala 27:72]
-  wire [63:0] _GEN_19 = {{31'd0}, _T_738}; // @[Mux.scala 27:72]
-  wire [63:0] _T_740 = _T_739 | _GEN_19; // @[Mux.scala 27:72]
-  wire  _T_743 = run_state & _T_701; // @[exu_div_ctl.scala 242:48]
-  wire  qff_enable = io_valid_in | _T_743; // @[exu_div_ctl.scala 242:35]
-  wire  _T_994 = count != 6'h21; // @[exu_div_ctl.scala 251:73]
-  wire  _T_995 = _T_743 & _T_994; // @[exu_div_ctl.scala 251:64]
-  wire  _T_996 = io_valid_in | _T_995; // @[exu_div_ctl.scala 251:34]
-  wire  aff_enable = _T_996 | rem_correct; // @[exu_div_ctl.scala 251:89]
-  wire  _T_1016 = dividend_neg_ff ^ divisor_neg_ff; // @[exu_div_ctl.scala 258:50]
-  wire  _T_1017 = sign_ff & _T_1016; // @[exu_div_ctl.scala 258:31]
-  wire [31:0] q_ff_eff = _T_1017 ? _T_965 : q_ff[31:0]; // @[exu_div_ctl.scala 258:21]
-  wire  _T_1245 = |a_ff[0]; // @[lib.scala 428:35]
-  wire  _T_1247 = ~a_ff[1]; // @[lib.scala 428:40]
-  wire  _T_1249 = _T_1245 ? _T_1247 : a_ff[1]; // @[lib.scala 428:23]
-  wire  _T_1251 = |a_ff[1:0]; // @[lib.scala 428:35]
-  wire  _T_1253 = ~a_ff[2]; // @[lib.scala 428:40]
-  wire  _T_1255 = _T_1251 ? _T_1253 : a_ff[2]; // @[lib.scala 428:23]
-  wire  _T_1257 = |a_ff[2:0]; // @[lib.scala 428:35]
-  wire  _T_1259 = ~a_ff[3]; // @[lib.scala 428:40]
-  wire  _T_1261 = _T_1257 ? _T_1259 : a_ff[3]; // @[lib.scala 428:23]
-  wire  _T_1263 = |a_ff[3:0]; // @[lib.scala 428:35]
-  wire  _T_1265 = ~a_ff[4]; // @[lib.scala 428:40]
-  wire  _T_1267 = _T_1263 ? _T_1265 : a_ff[4]; // @[lib.scala 428:23]
-  wire  _T_1269 = |a_ff[4:0]; // @[lib.scala 428:35]
-  wire  _T_1271 = ~a_ff[5]; // @[lib.scala 428:40]
-  wire  _T_1273 = _T_1269 ? _T_1271 : a_ff[5]; // @[lib.scala 428:23]
-  wire  _T_1275 = |a_ff[5:0]; // @[lib.scala 428:35]
-  wire  _T_1277 = ~a_ff[6]; // @[lib.scala 428:40]
-  wire  _T_1279 = _T_1275 ? _T_1277 : a_ff[6]; // @[lib.scala 428:23]
-  wire  _T_1281 = |a_ff[6:0]; // @[lib.scala 428:35]
-  wire  _T_1283 = ~a_ff[7]; // @[lib.scala 428:40]
-  wire  _T_1285 = _T_1281 ? _T_1283 : a_ff[7]; // @[lib.scala 428:23]
-  wire  _T_1287 = |a_ff[7:0]; // @[lib.scala 428:35]
-  wire  _T_1289 = ~a_ff[8]; // @[lib.scala 428:40]
-  wire  _T_1291 = _T_1287 ? _T_1289 : a_ff[8]; // @[lib.scala 428:23]
-  wire  _T_1293 = |a_ff[8:0]; // @[lib.scala 428:35]
-  wire  _T_1295 = ~a_ff[9]; // @[lib.scala 428:40]
-  wire  _T_1297 = _T_1293 ? _T_1295 : a_ff[9]; // @[lib.scala 428:23]
-  wire  _T_1299 = |a_ff[9:0]; // @[lib.scala 428:35]
-  wire  _T_1301 = ~a_ff[10]; // @[lib.scala 428:40]
-  wire  _T_1303 = _T_1299 ? _T_1301 : a_ff[10]; // @[lib.scala 428:23]
-  wire  _T_1305 = |a_ff[10:0]; // @[lib.scala 428:35]
-  wire  _T_1307 = ~a_ff[11]; // @[lib.scala 428:40]
-  wire  _T_1309 = _T_1305 ? _T_1307 : a_ff[11]; // @[lib.scala 428:23]
-  wire  _T_1311 = |a_ff[11:0]; // @[lib.scala 428:35]
-  wire  _T_1313 = ~a_ff[12]; // @[lib.scala 428:40]
-  wire  _T_1315 = _T_1311 ? _T_1313 : a_ff[12]; // @[lib.scala 428:23]
-  wire  _T_1317 = |a_ff[12:0]; // @[lib.scala 428:35]
-  wire  _T_1319 = ~a_ff[13]; // @[lib.scala 428:40]
-  wire  _T_1321 = _T_1317 ? _T_1319 : a_ff[13]; // @[lib.scala 428:23]
-  wire  _T_1323 = |a_ff[13:0]; // @[lib.scala 428:35]
-  wire  _T_1325 = ~a_ff[14]; // @[lib.scala 428:40]
-  wire  _T_1327 = _T_1323 ? _T_1325 : a_ff[14]; // @[lib.scala 428:23]
-  wire  _T_1329 = |a_ff[14:0]; // @[lib.scala 428:35]
-  wire  _T_1331 = ~a_ff[15]; // @[lib.scala 428:40]
-  wire  _T_1333 = _T_1329 ? _T_1331 : a_ff[15]; // @[lib.scala 428:23]
-  wire  _T_1335 = |a_ff[15:0]; // @[lib.scala 428:35]
-  wire  _T_1337 = ~a_ff[16]; // @[lib.scala 428:40]
-  wire  _T_1339 = _T_1335 ? _T_1337 : a_ff[16]; // @[lib.scala 428:23]
-  wire  _T_1341 = |a_ff[16:0]; // @[lib.scala 428:35]
-  wire  _T_1343 = ~a_ff[17]; // @[lib.scala 428:40]
-  wire  _T_1345 = _T_1341 ? _T_1343 : a_ff[17]; // @[lib.scala 428:23]
-  wire  _T_1347 = |a_ff[17:0]; // @[lib.scala 428:35]
-  wire  _T_1349 = ~a_ff[18]; // @[lib.scala 428:40]
-  wire  _T_1351 = _T_1347 ? _T_1349 : a_ff[18]; // @[lib.scala 428:23]
-  wire  _T_1353 = |a_ff[18:0]; // @[lib.scala 428:35]
-  wire  _T_1355 = ~a_ff[19]; // @[lib.scala 428:40]
-  wire  _T_1357 = _T_1353 ? _T_1355 : a_ff[19]; // @[lib.scala 428:23]
-  wire  _T_1359 = |a_ff[19:0]; // @[lib.scala 428:35]
-  wire  _T_1361 = ~a_ff[20]; // @[lib.scala 428:40]
-  wire  _T_1363 = _T_1359 ? _T_1361 : a_ff[20]; // @[lib.scala 428:23]
-  wire  _T_1365 = |a_ff[20:0]; // @[lib.scala 428:35]
-  wire  _T_1367 = ~a_ff[21]; // @[lib.scala 428:40]
-  wire  _T_1369 = _T_1365 ? _T_1367 : a_ff[21]; // @[lib.scala 428:23]
-  wire  _T_1371 = |a_ff[21:0]; // @[lib.scala 428:35]
-  wire  _T_1373 = ~a_ff[22]; // @[lib.scala 428:40]
-  wire  _T_1375 = _T_1371 ? _T_1373 : a_ff[22]; // @[lib.scala 428:23]
-  wire  _T_1377 = |a_ff[22:0]; // @[lib.scala 428:35]
-  wire  _T_1379 = ~a_ff[23]; // @[lib.scala 428:40]
-  wire  _T_1381 = _T_1377 ? _T_1379 : a_ff[23]; // @[lib.scala 428:23]
-  wire  _T_1383 = |a_ff[23:0]; // @[lib.scala 428:35]
-  wire  _T_1385 = ~a_ff[24]; // @[lib.scala 428:40]
-  wire  _T_1387 = _T_1383 ? _T_1385 : a_ff[24]; // @[lib.scala 428:23]
-  wire  _T_1389 = |a_ff[24:0]; // @[lib.scala 428:35]
-  wire  _T_1391 = ~a_ff[25]; // @[lib.scala 428:40]
-  wire  _T_1393 = _T_1389 ? _T_1391 : a_ff[25]; // @[lib.scala 428:23]
-  wire  _T_1395 = |a_ff[25:0]; // @[lib.scala 428:35]
-  wire  _T_1397 = ~a_ff[26]; // @[lib.scala 428:40]
-  wire  _T_1399 = _T_1395 ? _T_1397 : a_ff[26]; // @[lib.scala 428:23]
-  wire  _T_1401 = |a_ff[26:0]; // @[lib.scala 428:35]
-  wire  _T_1403 = ~a_ff[27]; // @[lib.scala 428:40]
-  wire  _T_1405 = _T_1401 ? _T_1403 : a_ff[27]; // @[lib.scala 428:23]
-  wire  _T_1407 = |a_ff[27:0]; // @[lib.scala 428:35]
-  wire  _T_1409 = ~a_ff[28]; // @[lib.scala 428:40]
-  wire  _T_1411 = _T_1407 ? _T_1409 : a_ff[28]; // @[lib.scala 428:23]
-  wire  _T_1413 = |a_ff[28:0]; // @[lib.scala 428:35]
-  wire  _T_1415 = ~a_ff[29]; // @[lib.scala 428:40]
-  wire  _T_1417 = _T_1413 ? _T_1415 : a_ff[29]; // @[lib.scala 428:23]
-  wire  _T_1419 = |a_ff[29:0]; // @[lib.scala 428:35]
-  wire  _T_1421 = ~a_ff[30]; // @[lib.scala 428:40]
-  wire  _T_1423 = _T_1419 ? _T_1421 : a_ff[30]; // @[lib.scala 428:23]
-  wire  _T_1425 = |a_ff[30:0]; // @[lib.scala 428:35]
-  wire  _T_1427 = ~a_ff[31]; // @[lib.scala 428:40]
-  wire  _T_1429 = _T_1425 ? _T_1427 : a_ff[31]; // @[lib.scala 428:23]
-  wire [6:0] _T_1435 = {_T_1285,_T_1279,_T_1273,_T_1267,_T_1261,_T_1255,_T_1249}; // @[lib.scala 430:14]
-  wire [14:0] _T_1443 = {_T_1333,_T_1327,_T_1321,_T_1315,_T_1309,_T_1303,_T_1297,_T_1291,_T_1435}; // @[lib.scala 430:14]
-  wire [7:0] _T_1450 = {_T_1381,_T_1375,_T_1369,_T_1363,_T_1357,_T_1351,_T_1345,_T_1339}; // @[lib.scala 430:14]
-  wire [30:0] _T_1459 = {_T_1429,_T_1423,_T_1417,_T_1411,_T_1405,_T_1399,_T_1393,_T_1387,_T_1450,_T_1443}; // @[lib.scala 430:14]
-  wire [31:0] _T_1461 = {_T_1459,a_ff[0]}; // @[Cat.scala 29:58]
-  wire [31:0] a_ff_eff = _T_744 ? _T_1461 : a_ff[31:0]; // @[exu_div_ctl.scala 259:21]
-  reg  smallnum_case_ff; // @[Reg.scala 27:20]
-  reg [3:0] smallnum_ff; // @[Reg.scala 27:20]
-  wire [31:0] _T_1464 = {28'h0,smallnum_ff}; // @[Cat.scala 29:58]
-  wire  _T_1466 = ~smallnum_case_ff; // @[exu_div_ctl.scala 264:6]
-  wire  _T_1468 = _T_1466 & _T_9; // @[exu_div_ctl.scala 264:24]
-  wire [31:0] _T_1470 = smallnum_case_ff ? _T_1464 : 32'h0; // @[Mux.scala 27:72]
-  wire [31:0] _T_1471 = rem_ff ? a_ff_eff : 32'h0; // @[Mux.scala 27:72]
-  wire [31:0] _T_1472 = _T_1468 ? q_ff_eff : 32'h0; // @[Mux.scala 27:72]
-  wire [31:0] _T_1473 = _T_1470 | _T_1471; // @[Mux.scala 27:72]
-  wire  _T_1477 = io_valid_in & _T; // @[exu_div_ctl.scala 266:38]
-  wire  _T_1481 = finish & _T; // @[exu_div_ctl.scala 267:32]
-  wire  _T_1489 = io_valid_in & io_dividend_in[31]; // @[exu_div_ctl.scala 270:44]
-  wire  _T_1490 = ~io_valid_in; // @[exu_div_ctl.scala 270:69]
-  wire  _T_1491 = _T_1490 & dividend_neg_ff; // @[exu_div_ctl.scala 270:82]
-  wire  _T_1492 = _T_1489 | _T_1491; // @[exu_div_ctl.scala 270:66]
-  wire  _T_1496 = io_valid_in & io_divisor_in[31]; // @[exu_div_ctl.scala 271:43]
-  wire  _T_1498 = _T_1490 & divisor_neg_ff; // @[exu_div_ctl.scala 271:80]
-  wire  _T_1499 = _T_1496 | _T_1498; // @[exu_div_ctl.scala 271:64]
-  wire  _T_1502 = io_valid_in & sign_eff; // @[exu_div_ctl.scala 272:36]
-  wire  _T_1504 = _T_1490 & sign_ff; // @[exu_div_ctl.scala 272:64]
-  wire  _T_1505 = _T_1502 | _T_1504; // @[exu_div_ctl.scala 272:48]
-  wire  _T_1508 = io_valid_in & io_rem_in; // @[exu_div_ctl.scala 273:37]
-  wire  _T_1510 = _T_1490 & rem_ff; // @[exu_div_ctl.scala 273:66]
-  wire  _T_1511 = _T_1508 | _T_1510; // @[exu_div_ctl.scala 273:50]
-  wire [32:0] q_in = _T_740[32:0]; // @[exu_div_ctl.scala 237:8]
-  wire  _T_1527 = io_signed_in & io_divisor_in[31]; // @[exu_div_ctl.scala 281:35]
-  wire [32:0] _T_1529 = {_T_1527,io_divisor_in}; // @[Cat.scala 29:58]
+  wire  running_state = _T_44 | shortq_enable_ff; // @[exu_div_ctl.scala 786:45]
+  wire  _T_45 = io_valid_in | valid_ff; // @[exu_div_ctl.scala 787:43]
+  wire  _T_46 = _T_45 | io_cancel; // @[exu_div_ctl.scala 787:54]
+  wire  _T_47 = _T_46 | running_state; // @[exu_div_ctl.scala 787:66]
+  reg  finish_ff; // @[Reg.scala 27:20]
+  wire  misc_enable = _T_47 | finish_ff; // @[exu_div_ctl.scala 787:82]
+  wire  _T_48 = smallnum_case | by_zero_case; // @[exu_div_ctl.scala 788:45]
+  wire  _T_49 = count_ff == 7'h20; // @[exu_div_ctl.scala 788:72]
+  wire  finish_raw = _T_48 | _T_49; // @[exu_div_ctl.scala 788:60]
+  wire  finish = finish_raw & _T; // @[exu_div_ctl.scala 789:41]
+  wire  _T_51 = valid_ff | running_state; // @[exu_div_ctl.scala 790:40]
+  wire  _T_52 = ~finish; // @[exu_div_ctl.scala 790:59]
+  wire  _T_53 = _T_51 & _T_52; // @[exu_div_ctl.scala 790:57]
+  wire  _T_54 = ~finish_ff; // @[exu_div_ctl.scala 790:69]
+  wire  _T_55 = _T_53 & _T_54; // @[exu_div_ctl.scala 790:67]
+  wire  _T_57 = _T_55 & _T; // @[exu_div_ctl.scala 790:80]
+  wire [6:0] _T_1376 = {1'h0,1'h0,b_enc_io_cls}; // @[Cat.scala 29:58]
+  wire [6:0] _T_1377 = {1'h0,1'h0,a_enc_io_cls}; // @[Cat.scala 29:58]
+  wire [6:0] _T_1379 = _T_1376 - _T_1377; // @[exu_div_ctl.scala 927:41]
+  wire [6:0] dw_shortq_raw = _T_1379 + 7'h1; // @[exu_div_ctl.scala 927:61]
+  wire [5:0] shortq = dw_shortq_raw[6] ? 6'h0 : dw_shortq_raw[5:0]; // @[exu_div_ctl.scala 928:19]
+  wire  _T_1385 = ~shortq[5]; // @[exu_div_ctl.scala 929:31]
+  wire  _T_1386 = valid_ff & _T_1385; // @[exu_div_ctl.scala 929:29]
+  wire  _T_1388 = shortq[4:2] == 3'h7; // @[exu_div_ctl.scala 929:58]
+  wire  _T_1389 = ~_T_1388; // @[exu_div_ctl.scala 929:44]
+  wire  _T_1390 = _T_1386 & _T_1389; // @[exu_div_ctl.scala 929:42]
+  wire  shortq_enable = _T_1390 & _T; // @[exu_div_ctl.scala 929:73]
+  wire  _T_58 = ~shortq_enable; // @[exu_div_ctl.scala 790:95]
+  wire  count_enable = _T_57 & _T_58; // @[exu_div_ctl.scala 790:93]
+  wire [6:0] _T_60 = count_enable ? 7'h7f : 7'h0; // @[Bitwise.scala 72:12]
+  wire [6:0] _T_62 = count_ff + 7'h4; // @[exu_div_ctl.scala 791:63]
+  reg [4:0] shortq_shift_ff; // @[Reg.scala 27:20]
+  wire [6:0] _T_63 = {2'h0,shortq_shift_ff}; // @[Cat.scala 29:58]
+  wire [6:0] _T_65 = _T_62 + _T_63; // @[exu_div_ctl.scala 791:74]
+  wire [6:0] count_in = _T_60 & _T_65; // @[exu_div_ctl.scala 791:51]
+  wire  a_enable = io_valid_in | running_state; // @[exu_div_ctl.scala 792:43]
+  wire  _T_66 = ~shortq_enable_ff; // @[exu_div_ctl.scala 793:47]
+  wire  a_shift = running_state & _T_66; // @[exu_div_ctl.scala 793:45]
+  wire [32:0] _T_68 = control_ff[2] ? 33'h1ffffffff : 33'h0; // @[Bitwise.scala 72:12]
+  wire [64:0] _T_70 = {_T_68,a_ff}; // @[Cat.scala 29:58]
+  wire [95:0] _GEN_11 = {{31'd0}, _T_70}; // @[exu_div_ctl.scala 794:74]
+  wire [95:0] _T_71 = _GEN_11 << shortq_shift_ff; // @[exu_div_ctl.scala 794:74]
+  wire  _T_72 = control_ff[2] ^ control_ff[1]; // @[exu_div_ctl.scala 795:61]
+  wire  _T_73 = ~_T_72; // @[exu_div_ctl.scala 795:42]
+  wire  b_twos_comp = valid_ff & _T_73; // @[exu_div_ctl.scala 795:40]
+  wire  _T_76 = ~valid_ff; // @[exu_div_ctl.scala 797:30]
+  wire  _T_78 = _T_76 & _T_30; // @[exu_div_ctl.scala 797:40]
+  wire  _T_80 = _T_78 & _T_72; // @[exu_div_ctl.scala 797:50]
+  reg  by_zero_case_ff; // @[Reg.scala 27:20]
+  wire  _T_81 = ~by_zero_case_ff; // @[exu_div_ctl.scala 797:92]
+  wire  twos_comp_q_sel = _T_80 & _T_81; // @[exu_div_ctl.scala 797:90]
+  wire  b_enable = io_valid_in | b_twos_comp; // @[exu_div_ctl.scala 798:43]
+  wire  rq_enable = _T_45 | running_state; // @[exu_div_ctl.scala 799:54]
+  wire  _T_83 = valid_ff & control_ff[2]; // @[exu_div_ctl.scala 800:40]
+  wire  r_sign_sel = _T_83 & _T_28; // @[exu_div_ctl.scala 800:59]
+  reg [32:0] r_ff; // @[Reg.scala 27:20]
+  wire [37:0] _T_287 = {r_ff[32],r_ff,a_ff[31:28]}; // @[Cat.scala 29:58]
+  wire [37:0] _T_289 = {b_ff[34:0],3'h0}; // @[Cat.scala 29:58]
+  wire [37:0] _T_291 = _T_287 + _T_289; // @[exu_div_ctl.scala 816:58]
+  wire [37:0] _T_293 = {b_ff[35:0],2'h0}; // @[Cat.scala 29:58]
+  wire [37:0] _T_295 = _T_291 + _T_293; // @[exu_div_ctl.scala 816:85]
+  wire [37:0] _T_297 = {b_ff[36:0],1'h0}; // @[Cat.scala 29:58]
+  wire [37:0] _T_299 = _T_295 + _T_297; // @[exu_div_ctl.scala 816:112]
+  wire [37:0] adder15_out = _T_299 + b_ff; // @[exu_div_ctl.scala 816:134]
+  wire  _T_302 = ~adder15_out[37]; // @[exu_div_ctl.scala 819:6]
+  wire  _T_303 = _T_302 ^ control_ff[2]; // @[exu_div_ctl.scala 819:23]
+  wire  _T_305 = a_ff[27:0] == 28'h0; // @[exu_div_ctl.scala 819:58]
+  wire  _T_306 = adder15_out == 38'h0; // @[exu_div_ctl.scala 819:82]
+  wire  _T_307 = _T_305 & _T_306; // @[exu_div_ctl.scala 819:67]
+  wire  _T_308 = _T_303 | _T_307; // @[exu_div_ctl.scala 819:43]
+  wire  _T_310 = ~_T_299[37]; // @[exu_div_ctl.scala 820:6]
+  wire  _T_311 = _T_310 ^ control_ff[2]; // @[exu_div_ctl.scala 820:23]
+  wire  _T_314 = _T_299 == 38'h0; // @[exu_div_ctl.scala 820:82]
+  wire  _T_315 = _T_305 & _T_314; // @[exu_div_ctl.scala 820:67]
+  wire  _T_316 = _T_311 | _T_315; // @[exu_div_ctl.scala 820:43]
+  wire [37:0] adder13_out = _T_295 + b_ff; // @[exu_div_ctl.scala 814:112]
+  wire  _T_318 = ~adder13_out[37]; // @[exu_div_ctl.scala 821:6]
+  wire  _T_319 = _T_318 ^ control_ff[2]; // @[exu_div_ctl.scala 821:23]
+  wire  _T_322 = adder13_out == 38'h0; // @[exu_div_ctl.scala 821:82]
+  wire  _T_323 = _T_305 & _T_322; // @[exu_div_ctl.scala 821:67]
+  wire  _T_324 = _T_319 | _T_323; // @[exu_div_ctl.scala 821:43]
+  wire  _T_326 = ~_T_295[37]; // @[exu_div_ctl.scala 822:6]
+  wire  _T_327 = _T_326 ^ control_ff[2]; // @[exu_div_ctl.scala 822:23]
+  wire  _T_330 = _T_295 == 38'h0; // @[exu_div_ctl.scala 822:82]
+  wire  _T_331 = _T_305 & _T_330; // @[exu_div_ctl.scala 822:67]
+  wire  _T_332 = _T_327 | _T_331; // @[exu_div_ctl.scala 822:43]
+  wire [37:0] _T_239 = _T_291 + _T_297; // @[exu_div_ctl.scala 812:85]
+  wire [37:0] adder11_out = _T_239 + b_ff; // @[exu_div_ctl.scala 812:107]
+  wire  _T_334 = ~adder11_out[37]; // @[exu_div_ctl.scala 823:6]
+  wire  _T_335 = _T_334 ^ control_ff[2]; // @[exu_div_ctl.scala 823:23]
+  wire  _T_338 = adder11_out == 38'h0; // @[exu_div_ctl.scala 823:82]
+  wire  _T_339 = _T_305 & _T_338; // @[exu_div_ctl.scala 823:67]
+  wire  _T_340 = _T_335 | _T_339; // @[exu_div_ctl.scala 823:43]
+  wire  _T_342 = ~_T_239[37]; // @[exu_div_ctl.scala 824:6]
+  wire  _T_343 = _T_342 ^ control_ff[2]; // @[exu_div_ctl.scala 824:23]
+  wire  _T_346 = _T_239 == 38'h0; // @[exu_div_ctl.scala 824:82]
+  wire  _T_347 = _T_305 & _T_346; // @[exu_div_ctl.scala 824:67]
+  wire  _T_348 = _T_343 | _T_347; // @[exu_div_ctl.scala 824:43]
+  wire [37:0] adder9_out = _T_291 + b_ff; // @[exu_div_ctl.scala 810:85]
+  wire  _T_350 = ~adder9_out[37]; // @[exu_div_ctl.scala 825:6]
+  wire  _T_351 = _T_350 ^ control_ff[2]; // @[exu_div_ctl.scala 825:22]
+  wire  _T_354 = adder9_out == 38'h0; // @[exu_div_ctl.scala 825:80]
+  wire  _T_355 = _T_305 & _T_354; // @[exu_div_ctl.scala 825:66]
+  wire  _T_356 = _T_351 | _T_355; // @[exu_div_ctl.scala 825:42]
+  wire  _T_358 = ~_T_291[37]; // @[exu_div_ctl.scala 826:6]
+  wire  _T_359 = _T_358 ^ control_ff[2]; // @[exu_div_ctl.scala 826:22]
+  wire  _T_362 = _T_291 == 38'h0; // @[exu_div_ctl.scala 826:80]
+  wire  _T_363 = _T_305 & _T_362; // @[exu_div_ctl.scala 826:66]
+  wire  _T_364 = _T_359 | _T_363; // @[exu_div_ctl.scala 826:42]
+  wire [37:0] _T_191 = _T_287 + _T_293; // @[exu_div_ctl.scala 808:58]
+  wire [37:0] _T_195 = _T_191 + _T_297; // @[exu_div_ctl.scala 808:85]
+  wire [37:0] adder7_out = _T_195 + b_ff; // @[exu_div_ctl.scala 808:107]
+  wire  _T_366 = ~adder7_out[37]; // @[exu_div_ctl.scala 827:6]
+  wire  _T_367 = _T_366 ^ control_ff[2]; // @[exu_div_ctl.scala 827:22]
+  wire  _T_370 = adder7_out == 38'h0; // @[exu_div_ctl.scala 827:80]
+  wire  _T_371 = _T_305 & _T_370; // @[exu_div_ctl.scala 827:66]
+  wire  _T_372 = _T_367 | _T_371; // @[exu_div_ctl.scala 827:42]
+  wire  _T_374 = ~_T_195[37]; // @[exu_div_ctl.scala 828:6]
+  wire  _T_375 = _T_374 ^ control_ff[2]; // @[exu_div_ctl.scala 828:22]
+  wire  _T_378 = _T_195 == 38'h0; // @[exu_div_ctl.scala 828:80]
+  wire  _T_379 = _T_305 & _T_378; // @[exu_div_ctl.scala 828:66]
+  wire  _T_380 = _T_375 | _T_379; // @[exu_div_ctl.scala 828:42]
+  wire [37:0] adder5_out = _T_191 + b_ff; // @[exu_div_ctl.scala 806:85]
+  wire  _T_382 = ~adder5_out[37]; // @[exu_div_ctl.scala 829:6]
+  wire  _T_383 = _T_382 ^ control_ff[2]; // @[exu_div_ctl.scala 829:22]
+  wire  _T_386 = adder5_out == 38'h0; // @[exu_div_ctl.scala 829:80]
+  wire  _T_387 = _T_305 & _T_386; // @[exu_div_ctl.scala 829:66]
+  wire  _T_388 = _T_383 | _T_387; // @[exu_div_ctl.scala 829:42]
+  wire  _T_390 = ~_T_191[37]; // @[exu_div_ctl.scala 830:6]
+  wire  _T_391 = _T_390 ^ control_ff[2]; // @[exu_div_ctl.scala 830:22]
+  wire  _T_394 = _T_191 == 38'h0; // @[exu_div_ctl.scala 830:80]
+  wire  _T_395 = _T_305 & _T_394; // @[exu_div_ctl.scala 830:66]
+  wire  _T_396 = _T_391 | _T_395; // @[exu_div_ctl.scala 830:42]
+  wire [36:0] _T_146 = {r_ff,a_ff[31:28]}; // @[Cat.scala 29:58]
+  wire [36:0] _T_148 = {b_ff[35:0],1'h0}; // @[Cat.scala 29:58]
+  wire [36:0] _T_150 = _T_146 + _T_148; // @[exu_div_ctl.scala 804:48]
+  wire [36:0] adder3_out = _T_150 + b_ff[36:0]; // @[exu_div_ctl.scala 804:70]
+  wire  _T_398 = ~adder3_out[36]; // @[exu_div_ctl.scala 831:6]
+  wire  _T_399 = _T_398 ^ control_ff[2]; // @[exu_div_ctl.scala 831:22]
+  wire  _T_402 = adder3_out == 37'h0; // @[exu_div_ctl.scala 831:80]
+  wire  _T_403 = _T_305 & _T_402; // @[exu_div_ctl.scala 831:66]
+  wire  _T_404 = _T_399 | _T_403; // @[exu_div_ctl.scala 831:42]
+  wire [35:0] _T_140 = {r_ff[31:0],a_ff[31:28]}; // @[Cat.scala 29:58]
+  wire [35:0] _T_142 = {b_ff[34:0],1'h0}; // @[Cat.scala 29:58]
+  wire [35:0] adder2_out = _T_140 + _T_142; // @[exu_div_ctl.scala 803:48]
+  wire  _T_406 = ~adder2_out[35]; // @[exu_div_ctl.scala 832:6]
+  wire  _T_407 = _T_406 ^ control_ff[2]; // @[exu_div_ctl.scala 832:22]
+  wire  _T_410 = adder2_out == 36'h0; // @[exu_div_ctl.scala 832:80]
+  wire  _T_411 = _T_305 & _T_410; // @[exu_div_ctl.scala 832:66]
+  wire  _T_412 = _T_407 | _T_411; // @[exu_div_ctl.scala 832:42]
+  wire [34:0] _T_135 = {r_ff[30:0],a_ff[31:28]}; // @[Cat.scala 29:58]
+  wire [34:0] adder1_out = _T_135 + b_ff[34:0]; // @[exu_div_ctl.scala 802:48]
+  wire  _T_414 = ~adder1_out[34]; // @[exu_div_ctl.scala 833:6]
+  wire  _T_415 = _T_414 ^ control_ff[2]; // @[exu_div_ctl.scala 833:22]
+  wire  _T_418 = adder1_out == 35'h0; // @[exu_div_ctl.scala 833:80]
+  wire  _T_419 = _T_305 & _T_418; // @[exu_div_ctl.scala 833:66]
+  wire  _T_420 = _T_415 | _T_419; // @[exu_div_ctl.scala 833:42]
+  wire [7:0] _T_427 = {_T_372,_T_380,_T_388,_T_396,_T_404,_T_412,_T_420,1'h0}; // @[Cat.scala 29:58]
+  wire [15:0] quotient_raw = {_T_308,_T_316,_T_324,_T_332,_T_340,_T_348,_T_356,_T_364,_T_427}; // @[Cat.scala 29:58]
+  wire  _T_439 = quotient_raw[15:8] == 8'h1; // @[exu_div_ctl.scala 836:49]
+  wire  _T_444 = quotient_raw[15:9] == 7'h1; // @[exu_div_ctl.scala 836:49]
+  wire  _T_477 = _T_439 | _T_444; // @[Mux.scala 27:72]
+  wire  _T_449 = quotient_raw[15:10] == 6'h1; // @[exu_div_ctl.scala 836:49]
+  wire  _T_478 = _T_477 | _T_449; // @[Mux.scala 27:72]
+  wire  _T_454 = quotient_raw[15:11] == 5'h1; // @[exu_div_ctl.scala 836:49]
+  wire  _T_479 = _T_478 | _T_454; // @[Mux.scala 27:72]
+  wire  _T_459 = quotient_raw[15:12] == 4'h1; // @[exu_div_ctl.scala 836:49]
+  wire  _T_480 = _T_479 | _T_459; // @[Mux.scala 27:72]
+  wire  _T_464 = quotient_raw[15:13] == 3'h1; // @[exu_div_ctl.scala 836:49]
+  wire  _T_481 = _T_480 | _T_464; // @[Mux.scala 27:72]
+  wire  _T_468 = quotient_raw[15:14] == 2'h1; // @[exu_div_ctl.scala 836:49]
+  wire  _T_482 = _T_481 | _T_468; // @[Mux.scala 27:72]
+  wire  _T_486 = _T_482 | quotient_raw[15]; // @[exu_div_ctl.scala 836:94]
+  wire  _T_488 = quotient_raw[15:4] == 12'h1; // @[exu_div_ctl.scala 838:26]
+  wire  _T_490 = quotient_raw[15:5] == 11'h1; // @[exu_div_ctl.scala 838:77]
+  wire  _T_491 = _T_488 | _T_490; // @[exu_div_ctl.scala 838:54]
+  wire  _T_493 = quotient_raw[15:6] == 10'h1; // @[exu_div_ctl.scala 838:128]
+  wire  _T_494 = _T_491 | _T_493; // @[exu_div_ctl.scala 838:105]
+  wire  _T_496 = quotient_raw[15:7] == 9'h1; // @[exu_div_ctl.scala 839:28]
+  wire  _T_497 = _T_494 | _T_496; // @[exu_div_ctl.scala 838:155]
+  wire  _T_500 = _T_497 | _T_459; // @[exu_div_ctl.scala 839:53]
+  wire  _T_503 = _T_500 | _T_464; // @[exu_div_ctl.scala 839:96]
+  wire  _T_506 = _T_503 | _T_468; // @[exu_div_ctl.scala 839:138]
+  wire  _T_509 = _T_506 | quotient_raw[15]; // @[exu_div_ctl.scala 840:46]
+  wire  _T_511 = quotient_raw[15:2] == 14'h1; // @[exu_div_ctl.scala 842:26]
+  wire  _T_513 = quotient_raw[15:3] == 13'h1; // @[exu_div_ctl.scala 842:79]
+  wire  _T_514 = _T_511 | _T_513; // @[exu_div_ctl.scala 842:56]
+  wire  _T_517 = _T_514 | _T_493; // @[exu_div_ctl.scala 842:109]
+  wire  _T_520 = _T_517 | _T_496; // @[exu_div_ctl.scala 842:159]
+  wire  _T_523 = _T_520 | _T_449; // @[exu_div_ctl.scala 843:55]
+  wire  _T_526 = _T_523 | _T_454; // @[exu_div_ctl.scala 843:100]
+  wire  _T_529 = _T_526 | _T_468; // @[exu_div_ctl.scala 843:144]
+  wire  _T_532 = _T_529 | quotient_raw[15]; // @[exu_div_ctl.scala 844:48]
+  wire  _T_536 = quotient_raw[15:1] == 15'h1; // @[exu_div_ctl.scala 846:54]
+  wire  _T_575 = _T_536 | _T_513; // @[Mux.scala 27:72]
+  wire  _T_576 = _T_575 | _T_490; // @[Mux.scala 27:72]
+  wire  _T_577 = _T_576 | _T_496; // @[Mux.scala 27:72]
+  wire  _T_578 = _T_577 | _T_444; // @[Mux.scala 27:72]
+  wire  _T_579 = _T_578 | _T_454; // @[Mux.scala 27:72]
+  wire  _T_580 = _T_579 | _T_464; // @[Mux.scala 27:72]
+  wire  _T_584 = _T_580 | quotient_raw[15]; // @[exu_div_ctl.scala 846:99]
+  wire [3:0] quotient_new = {_T_486,_T_509,_T_532,_T_584}; // @[Cat.scala 29:58]
+  wire  _T_85 = quotient_new == 4'h0; // @[exu_div_ctl.scala 801:71]
+  wire  _T_86 = running_state & _T_85; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_0 = _T_86 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_88 = quotient_new == 4'h1; // @[exu_div_ctl.scala 801:71]
+  wire  _T_89 = running_state & _T_88; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_1 = _T_89 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_91 = quotient_new == 4'h2; // @[exu_div_ctl.scala 801:71]
+  wire  _T_92 = running_state & _T_91; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_2 = _T_92 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_94 = quotient_new == 4'h3; // @[exu_div_ctl.scala 801:71]
+  wire  _T_95 = running_state & _T_94; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_3 = _T_95 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_97 = quotient_new == 4'h4; // @[exu_div_ctl.scala 801:71]
+  wire  _T_98 = running_state & _T_97; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_4 = _T_98 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_100 = quotient_new == 4'h5; // @[exu_div_ctl.scala 801:71]
+  wire  _T_101 = running_state & _T_100; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_5 = _T_101 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_103 = quotient_new == 4'h6; // @[exu_div_ctl.scala 801:71]
+  wire  _T_104 = running_state & _T_103; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_6 = _T_104 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_106 = quotient_new == 4'h7; // @[exu_div_ctl.scala 801:71]
+  wire  _T_107 = running_state & _T_106; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_7 = _T_107 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_109 = quotient_new == 4'h8; // @[exu_div_ctl.scala 801:71]
+  wire  _T_110 = running_state & _T_109; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_8 = _T_110 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_112 = quotient_new == 4'h9; // @[exu_div_ctl.scala 801:71]
+  wire  _T_113 = running_state & _T_112; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_9 = _T_113 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_115 = quotient_new == 4'ha; // @[exu_div_ctl.scala 801:71]
+  wire  _T_116 = running_state & _T_115; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_10 = _T_116 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_118 = quotient_new == 4'hb; // @[exu_div_ctl.scala 801:71]
+  wire  _T_119 = running_state & _T_118; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_11 = _T_119 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_121 = quotient_new == 4'hc; // @[exu_div_ctl.scala 801:71]
+  wire  _T_122 = running_state & _T_121; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_12 = _T_122 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_124 = quotient_new == 4'hd; // @[exu_div_ctl.scala 801:71]
+  wire  _T_125 = running_state & _T_124; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_13 = _T_125 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_127 = quotient_new == 4'he; // @[exu_div_ctl.scala 801:71]
+  wire  _T_128 = running_state & _T_127; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_14 = _T_128 & _T_66; // @[exu_div_ctl.scala 801:85]
+  wire  _T_130 = quotient_new == 4'hf; // @[exu_div_ctl.scala 801:71]
+  wire  _T_131 = running_state & _T_130; // @[exu_div_ctl.scala 801:55]
+  wire  r_adder_sel_15 = _T_131 & _T_66; // @[exu_div_ctl.scala 801:85]
+  reg [31:0] q_ff; // @[Reg.scala 27:20]
+  wire [31:0] _T_589 = twos_comp_q_sel ? q_ff : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_590 = b_twos_comp ? b_ff[31:0] : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] twos_comp_in = _T_589 | _T_590; // @[Mux.scala 27:72]
+  wire  _T_594 = |twos_comp_in[0]; // @[lib.scala 428:35]
+  wire  _T_596 = ~twos_comp_in[1]; // @[lib.scala 428:40]
+  wire  _T_598 = _T_594 ? _T_596 : twos_comp_in[1]; // @[lib.scala 428:23]
+  wire  _T_600 = |twos_comp_in[1:0]; // @[lib.scala 428:35]
+  wire  _T_602 = ~twos_comp_in[2]; // @[lib.scala 428:40]
+  wire  _T_604 = _T_600 ? _T_602 : twos_comp_in[2]; // @[lib.scala 428:23]
+  wire  _T_606 = |twos_comp_in[2:0]; // @[lib.scala 428:35]
+  wire  _T_608 = ~twos_comp_in[3]; // @[lib.scala 428:40]
+  wire  _T_610 = _T_606 ? _T_608 : twos_comp_in[3]; // @[lib.scala 428:23]
+  wire  _T_612 = |twos_comp_in[3:0]; // @[lib.scala 428:35]
+  wire  _T_614 = ~twos_comp_in[4]; // @[lib.scala 428:40]
+  wire  _T_616 = _T_612 ? _T_614 : twos_comp_in[4]; // @[lib.scala 428:23]
+  wire  _T_618 = |twos_comp_in[4:0]; // @[lib.scala 428:35]
+  wire  _T_620 = ~twos_comp_in[5]; // @[lib.scala 428:40]
+  wire  _T_622 = _T_618 ? _T_620 : twos_comp_in[5]; // @[lib.scala 428:23]
+  wire  _T_624 = |twos_comp_in[5:0]; // @[lib.scala 428:35]
+  wire  _T_626 = ~twos_comp_in[6]; // @[lib.scala 428:40]
+  wire  _T_628 = _T_624 ? _T_626 : twos_comp_in[6]; // @[lib.scala 428:23]
+  wire  _T_630 = |twos_comp_in[6:0]; // @[lib.scala 428:35]
+  wire  _T_632 = ~twos_comp_in[7]; // @[lib.scala 428:40]
+  wire  _T_634 = _T_630 ? _T_632 : twos_comp_in[7]; // @[lib.scala 428:23]
+  wire  _T_636 = |twos_comp_in[7:0]; // @[lib.scala 428:35]
+  wire  _T_638 = ~twos_comp_in[8]; // @[lib.scala 428:40]
+  wire  _T_640 = _T_636 ? _T_638 : twos_comp_in[8]; // @[lib.scala 428:23]
+  wire  _T_642 = |twos_comp_in[8:0]; // @[lib.scala 428:35]
+  wire  _T_644 = ~twos_comp_in[9]; // @[lib.scala 428:40]
+  wire  _T_646 = _T_642 ? _T_644 : twos_comp_in[9]; // @[lib.scala 428:23]
+  wire  _T_648 = |twos_comp_in[9:0]; // @[lib.scala 428:35]
+  wire  _T_650 = ~twos_comp_in[10]; // @[lib.scala 428:40]
+  wire  _T_652 = _T_648 ? _T_650 : twos_comp_in[10]; // @[lib.scala 428:23]
+  wire  _T_654 = |twos_comp_in[10:0]; // @[lib.scala 428:35]
+  wire  _T_656 = ~twos_comp_in[11]; // @[lib.scala 428:40]
+  wire  _T_658 = _T_654 ? _T_656 : twos_comp_in[11]; // @[lib.scala 428:23]
+  wire  _T_660 = |twos_comp_in[11:0]; // @[lib.scala 428:35]
+  wire  _T_662 = ~twos_comp_in[12]; // @[lib.scala 428:40]
+  wire  _T_664 = _T_660 ? _T_662 : twos_comp_in[12]; // @[lib.scala 428:23]
+  wire  _T_666 = |twos_comp_in[12:0]; // @[lib.scala 428:35]
+  wire  _T_668 = ~twos_comp_in[13]; // @[lib.scala 428:40]
+  wire  _T_670 = _T_666 ? _T_668 : twos_comp_in[13]; // @[lib.scala 428:23]
+  wire  _T_672 = |twos_comp_in[13:0]; // @[lib.scala 428:35]
+  wire  _T_674 = ~twos_comp_in[14]; // @[lib.scala 428:40]
+  wire  _T_676 = _T_672 ? _T_674 : twos_comp_in[14]; // @[lib.scala 428:23]
+  wire  _T_678 = |twos_comp_in[14:0]; // @[lib.scala 428:35]
+  wire  _T_680 = ~twos_comp_in[15]; // @[lib.scala 428:40]
+  wire  _T_682 = _T_678 ? _T_680 : twos_comp_in[15]; // @[lib.scala 428:23]
+  wire  _T_684 = |twos_comp_in[15:0]; // @[lib.scala 428:35]
+  wire  _T_686 = ~twos_comp_in[16]; // @[lib.scala 428:40]
+  wire  _T_688 = _T_684 ? _T_686 : twos_comp_in[16]; // @[lib.scala 428:23]
+  wire  _T_690 = |twos_comp_in[16:0]; // @[lib.scala 428:35]
+  wire  _T_692 = ~twos_comp_in[17]; // @[lib.scala 428:40]
+  wire  _T_694 = _T_690 ? _T_692 : twos_comp_in[17]; // @[lib.scala 428:23]
+  wire  _T_696 = |twos_comp_in[17:0]; // @[lib.scala 428:35]
+  wire  _T_698 = ~twos_comp_in[18]; // @[lib.scala 428:40]
+  wire  _T_700 = _T_696 ? _T_698 : twos_comp_in[18]; // @[lib.scala 428:23]
+  wire  _T_702 = |twos_comp_in[18:0]; // @[lib.scala 428:35]
+  wire  _T_704 = ~twos_comp_in[19]; // @[lib.scala 428:40]
+  wire  _T_706 = _T_702 ? _T_704 : twos_comp_in[19]; // @[lib.scala 428:23]
+  wire  _T_708 = |twos_comp_in[19:0]; // @[lib.scala 428:35]
+  wire  _T_710 = ~twos_comp_in[20]; // @[lib.scala 428:40]
+  wire  _T_712 = _T_708 ? _T_710 : twos_comp_in[20]; // @[lib.scala 428:23]
+  wire  _T_714 = |twos_comp_in[20:0]; // @[lib.scala 428:35]
+  wire  _T_716 = ~twos_comp_in[21]; // @[lib.scala 428:40]
+  wire  _T_718 = _T_714 ? _T_716 : twos_comp_in[21]; // @[lib.scala 428:23]
+  wire  _T_720 = |twos_comp_in[21:0]; // @[lib.scala 428:35]
+  wire  _T_722 = ~twos_comp_in[22]; // @[lib.scala 428:40]
+  wire  _T_724 = _T_720 ? _T_722 : twos_comp_in[22]; // @[lib.scala 428:23]
+  wire  _T_726 = |twos_comp_in[22:0]; // @[lib.scala 428:35]
+  wire  _T_728 = ~twos_comp_in[23]; // @[lib.scala 428:40]
+  wire  _T_730 = _T_726 ? _T_728 : twos_comp_in[23]; // @[lib.scala 428:23]
+  wire  _T_732 = |twos_comp_in[23:0]; // @[lib.scala 428:35]
+  wire  _T_734 = ~twos_comp_in[24]; // @[lib.scala 428:40]
+  wire  _T_736 = _T_732 ? _T_734 : twos_comp_in[24]; // @[lib.scala 428:23]
+  wire  _T_738 = |twos_comp_in[24:0]; // @[lib.scala 428:35]
+  wire  _T_740 = ~twos_comp_in[25]; // @[lib.scala 428:40]
+  wire  _T_742 = _T_738 ? _T_740 : twos_comp_in[25]; // @[lib.scala 428:23]
+  wire  _T_744 = |twos_comp_in[25:0]; // @[lib.scala 428:35]
+  wire  _T_746 = ~twos_comp_in[26]; // @[lib.scala 428:40]
+  wire  _T_748 = _T_744 ? _T_746 : twos_comp_in[26]; // @[lib.scala 428:23]
+  wire  _T_750 = |twos_comp_in[26:0]; // @[lib.scala 428:35]
+  wire  _T_752 = ~twos_comp_in[27]; // @[lib.scala 428:40]
+  wire  _T_754 = _T_750 ? _T_752 : twos_comp_in[27]; // @[lib.scala 428:23]
+  wire  _T_756 = |twos_comp_in[27:0]; // @[lib.scala 428:35]
+  wire  _T_758 = ~twos_comp_in[28]; // @[lib.scala 428:40]
+  wire  _T_760 = _T_756 ? _T_758 : twos_comp_in[28]; // @[lib.scala 428:23]
+  wire  _T_762 = |twos_comp_in[28:0]; // @[lib.scala 428:35]
+  wire  _T_764 = ~twos_comp_in[29]; // @[lib.scala 428:40]
+  wire  _T_766 = _T_762 ? _T_764 : twos_comp_in[29]; // @[lib.scala 428:23]
+  wire  _T_768 = |twos_comp_in[29:0]; // @[lib.scala 428:35]
+  wire  _T_770 = ~twos_comp_in[30]; // @[lib.scala 428:40]
+  wire  _T_772 = _T_768 ? _T_770 : twos_comp_in[30]; // @[lib.scala 428:23]
+  wire  _T_774 = |twos_comp_in[30:0]; // @[lib.scala 428:35]
+  wire  _T_776 = ~twos_comp_in[31]; // @[lib.scala 428:40]
+  wire  _T_778 = _T_774 ? _T_776 : twos_comp_in[31]; // @[lib.scala 428:23]
+  wire [6:0] _T_784 = {_T_634,_T_628,_T_622,_T_616,_T_610,_T_604,_T_598}; // @[lib.scala 430:14]
+  wire [14:0] _T_792 = {_T_682,_T_676,_T_670,_T_664,_T_658,_T_652,_T_646,_T_640,_T_784}; // @[lib.scala 430:14]
+  wire [7:0] _T_799 = {_T_730,_T_724,_T_718,_T_712,_T_706,_T_700,_T_694,_T_688}; // @[lib.scala 430:14]
+  wire [30:0] _T_808 = {_T_778,_T_772,_T_766,_T_760,_T_754,_T_748,_T_742,_T_736,_T_799,_T_792}; // @[lib.scala 430:14]
+  wire [31:0] twos_comp_out = {_T_808,twos_comp_in[0]}; // @[Cat.scala 29:58]
+  wire  _T_810 = ~a_shift; // @[exu_div_ctl.scala 853:6]
+  wire  _T_812 = _T_810 & _T_66; // @[exu_div_ctl.scala 853:15]
+  wire [31:0] _T_816 = {a_ff[27:0],4'h0}; // @[Cat.scala 29:58]
+  wire [64:0] ar_shifted = _T_71[64:0]; // @[exu_div_ctl.scala 794:28]
+  wire [31:0] _T_818 = _T_812 ? io_dividend_in : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_819 = a_shift ? _T_816 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_820 = shortq_enable_ff ? ar_shifted[31:0] : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_821 = _T_818 | _T_819; // @[Mux.scala 27:72]
+  wire [31:0] a_in = _T_821 | _T_820; // @[Mux.scala 27:72]
+  wire  _T_823 = ~b_twos_comp; // @[exu_div_ctl.scala 858:5]
+  wire  _T_825 = io_signed_in & io_divisor_in[31]; // @[exu_div_ctl.scala 858:63]
+  wire [32:0] _T_827 = {_T_825,io_divisor_in}; // @[Cat.scala 29:58]
+  wire  _T_828 = ~control_ff[1]; // @[exu_div_ctl.scala 859:49]
+  wire [32:0] _T_830 = {_T_828,_T_808,twos_comp_in[0]}; // @[Cat.scala 29:58]
+  wire [32:0] _T_831 = _T_823 ? _T_827 : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_832 = b_twos_comp ? _T_830 : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] b_in = _T_831 | _T_832; // @[Mux.scala 27:72]
+  wire [32:0] _T_837 = {r_ff[28:0],a_ff[31:28]}; // @[Cat.scala 29:58]
+  wire [32:0] _T_855 = {1'h0,a_ff}; // @[Cat.scala 29:58]
+  wire [32:0] _T_856 = r_sign_sel ? 33'h1ffffffff : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_857 = r_adder_sel_0 ? _T_837 : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_858 = r_adder_sel_1 ? adder1_out[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_859 = r_adder_sel_2 ? adder2_out[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_860 = r_adder_sel_3 ? adder3_out[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_861 = r_adder_sel_4 ? _T_191[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_862 = r_adder_sel_5 ? adder5_out[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_863 = r_adder_sel_6 ? _T_195[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_864 = r_adder_sel_7 ? adder7_out[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_865 = r_adder_sel_8 ? _T_291[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_866 = r_adder_sel_9 ? adder9_out[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_867 = r_adder_sel_10 ? _T_239[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_868 = r_adder_sel_11 ? adder11_out[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_869 = r_adder_sel_12 ? _T_295[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_870 = r_adder_sel_13 ? adder13_out[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_871 = r_adder_sel_14 ? _T_299[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_872 = r_adder_sel_15 ? adder15_out[32:0] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_873 = shortq_enable_ff ? ar_shifted[64:32] : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_874 = by_zero_case ? _T_855 : 33'h0; // @[Mux.scala 27:72]
+  wire [32:0] _T_875 = _T_856 | _T_857; // @[Mux.scala 27:72]
+  wire [32:0] _T_876 = _T_875 | _T_858; // @[Mux.scala 27:72]
+  wire [32:0] _T_877 = _T_876 | _T_859; // @[Mux.scala 27:72]
+  wire [32:0] _T_878 = _T_877 | _T_860; // @[Mux.scala 27:72]
+  wire [32:0] _T_879 = _T_878 | _T_861; // @[Mux.scala 27:72]
+  wire [32:0] _T_880 = _T_879 | _T_862; // @[Mux.scala 27:72]
+  wire [32:0] _T_881 = _T_880 | _T_863; // @[Mux.scala 27:72]
+  wire [32:0] _T_882 = _T_881 | _T_864; // @[Mux.scala 27:72]
+  wire [32:0] _T_883 = _T_882 | _T_865; // @[Mux.scala 27:72]
+  wire [32:0] _T_884 = _T_883 | _T_866; // @[Mux.scala 27:72]
+  wire [32:0] _T_885 = _T_884 | _T_867; // @[Mux.scala 27:72]
+  wire [32:0] _T_886 = _T_885 | _T_868; // @[Mux.scala 27:72]
+  wire [32:0] _T_887 = _T_886 | _T_869; // @[Mux.scala 27:72]
+  wire [32:0] _T_888 = _T_887 | _T_870; // @[Mux.scala 27:72]
+  wire [32:0] _T_889 = _T_888 | _T_871; // @[Mux.scala 27:72]
+  wire [32:0] _T_890 = _T_889 | _T_872; // @[Mux.scala 27:72]
+  wire [32:0] _T_891 = _T_890 | _T_873; // @[Mux.scala 27:72]
+  wire [32:0] r_in = _T_891 | _T_874; // @[Mux.scala 27:72]
+  wire [31:0] _T_895 = {q_ff[27:0],_T_486,_T_509,_T_532,_T_584}; // @[Cat.scala 29:58]
+  wire  _T_918 = ~b_ff[3]; // @[exu_div_ctl.scala 895:70]
+  wire  _T_920 = ~b_ff[2]; // @[exu_div_ctl.scala 895:70]
+  wire  _T_923 = _T_918 & _T_920; // @[exu_div_ctl.scala 895:95]
+  wire  _T_922 = ~b_ff[1]; // @[exu_div_ctl.scala 895:70]
+  wire  _T_924 = _T_923 & _T_922; // @[exu_div_ctl.scala 895:95]
+  wire  _T_925 = a_ff[3] & _T_924; // @[exu_div_ctl.scala 896:11]
+  wire  _T_932 = a_ff[3] & _T_923; // @[exu_div_ctl.scala 896:11]
+  wire  _T_934 = ~b_ff[0]; // @[exu_div_ctl.scala 901:33]
+  wire  _T_935 = _T_932 & _T_934; // @[exu_div_ctl.scala 901:31]
+  wire  _T_945 = a_ff[2] & _T_924; // @[exu_div_ctl.scala 896:11]
+  wire  _T_946 = _T_935 | _T_945; // @[exu_div_ctl.scala 901:42]
+  wire  _T_949 = a_ff[3] & a_ff[2]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_955 = _T_949 & _T_923; // @[exu_div_ctl.scala 896:11]
+  wire  _T_956 = _T_946 | _T_955; // @[exu_div_ctl.scala 901:75]
+  wire  _T_963 = a_ff[2] & _T_923; // @[exu_div_ctl.scala 896:11]
+  wire  _T_966 = _T_963 & _T_934; // @[exu_div_ctl.scala 903:31]
+  wire  _T_976 = a_ff[1] & _T_924; // @[exu_div_ctl.scala 896:11]
+  wire  _T_977 = _T_966 | _T_976; // @[exu_div_ctl.scala 903:42]
+  wire  _T_983 = _T_918 & _T_922; // @[exu_div_ctl.scala 895:95]
+  wire  _T_984 = a_ff[3] & _T_983; // @[exu_div_ctl.scala 896:11]
+  wire  _T_987 = _T_984 & _T_934; // @[exu_div_ctl.scala 903:106]
+  wire  _T_988 = _T_977 | _T_987; // @[exu_div_ctl.scala 903:78]
+  wire  _T_991 = ~a_ff[2]; // @[exu_div_ctl.scala 894:70]
+  wire  _T_992 = a_ff[3] & _T_991; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1000 = _T_923 & b_ff[1]; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1001 = _T_1000 & b_ff[0]; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1002 = _T_992 & _T_1001; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1003 = _T_988 | _T_1002; // @[exu_div_ctl.scala 903:117]
+  wire  _T_1005 = ~a_ff[3]; // @[exu_div_ctl.scala 894:70]
+  wire  _T_1008 = _T_1005 & a_ff[2]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1009 = _T_1008 & a_ff[1]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1015 = _T_1009 & _T_923; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1016 = _T_1003 | _T_1015; // @[exu_div_ctl.scala 904:44]
+  wire  _T_1022 = _T_949 & _T_918; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1025 = _T_1022 & _T_934; // @[exu_div_ctl.scala 904:107]
+  wire  _T_1026 = _T_1016 | _T_1025; // @[exu_div_ctl.scala 904:80]
+  wire  _T_1035 = _T_918 & b_ff[2]; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1036 = _T_1035 & _T_922; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1037 = _T_949 & _T_1036; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1038 = _T_1026 | _T_1037; // @[exu_div_ctl.scala 904:119]
+  wire  _T_1041 = a_ff[3] & a_ff[1]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1047 = _T_1041 & _T_983; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1048 = _T_1038 | _T_1047; // @[exu_div_ctl.scala 905:44]
+  wire  _T_1053 = _T_949 & a_ff[1]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1058 = _T_1053 & _T_1035; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1059 = _T_1048 | _T_1058; // @[exu_div_ctl.scala 905:79]
+  wire  _T_1063 = a_ff[2] & a_ff[1]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1064 = _T_1063 & a_ff[0]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1070 = _T_1064 & _T_983; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1076 = _T_992 & a_ff[0]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1081 = _T_918 & b_ff[1]; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1082 = _T_1081 & b_ff[0]; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1083 = _T_1076 & _T_1082; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1084 = _T_1070 | _T_1083; // @[exu_div_ctl.scala 907:45]
+  wire  _T_1091 = a_ff[2] & _T_983; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1094 = _T_1091 & _T_934; // @[exu_div_ctl.scala 907:114]
+  wire  _T_1095 = _T_1084 | _T_1094; // @[exu_div_ctl.scala 907:86]
+  wire  _T_1102 = a_ff[1] & _T_923; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1105 = _T_1102 & _T_934; // @[exu_div_ctl.scala 908:33]
+  wire  _T_1106 = _T_1095 | _T_1105; // @[exu_div_ctl.scala 907:129]
+  wire  _T_1116 = a_ff[0] & _T_924; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1117 = _T_1106 | _T_1116; // @[exu_div_ctl.scala 908:47]
+  wire  _T_1122 = ~a_ff[1]; // @[exu_div_ctl.scala 894:70]
+  wire  _T_1124 = _T_1008 & _T_1122; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1134 = _T_1124 & _T_1001; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1135 = _T_1117 | _T_1134; // @[exu_div_ctl.scala 908:88]
+  wire  _T_1144 = _T_1009 & _T_918; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1147 = _T_1144 & _T_934; // @[exu_div_ctl.scala 909:36]
+  wire  _T_1148 = _T_1135 | _T_1147; // @[exu_div_ctl.scala 908:131]
+  wire  _T_1154 = _T_920 & _T_922; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1155 = a_ff[3] & _T_1154; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1158 = _T_1155 & _T_934; // @[exu_div_ctl.scala 909:76]
+  wire  _T_1159 = _T_1148 | _T_1158; // @[exu_div_ctl.scala 909:47]
+  wire  _T_1169 = _T_1035 & b_ff[1]; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1170 = _T_992 & _T_1169; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1171 = _T_1159 | _T_1170; // @[exu_div_ctl.scala 909:88]
+  wire  _T_1185 = _T_1009 & _T_1036; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1186 = _T_1171 | _T_1185; // @[exu_div_ctl.scala 909:131]
+  wire  _T_1192 = _T_1008 & a_ff[0]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1198 = _T_1192 & _T_983; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1199 = _T_1186 | _T_1198; // @[exu_div_ctl.scala 910:47]
+  wire  _T_1206 = _T_992 & _T_1122; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1212 = _T_1035 & b_ff[0]; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1213 = _T_1206 & _T_1212; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1214 = _T_1199 | _T_1213; // @[exu_div_ctl.scala 910:88]
+  wire  _T_1219 = _T_991 & a_ff[1]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1220 = _T_1219 & a_ff[0]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1226 = _T_1220 & _T_923; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1227 = _T_1214 | _T_1226; // @[exu_div_ctl.scala 910:131]
+  wire  _T_1233 = _T_949 & _T_922; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1236 = _T_1233 & _T_934; // @[exu_div_ctl.scala 911:75]
+  wire  _T_1237 = _T_1227 | _T_1236; // @[exu_div_ctl.scala 911:47]
+  wire  _T_1245 = _T_1009 & a_ff[0]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1250 = _T_1245 & _T_1035; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1251 = _T_1237 | _T_1250; // @[exu_div_ctl.scala 911:88]
+  wire  _T_1258 = b_ff[3] & _T_920; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1259 = _T_949 & _T_1258; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1260 = _T_1251 | _T_1259; // @[exu_div_ctl.scala 911:131]
+  wire  _T_1270 = _T_1258 & _T_922; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1271 = _T_1041 & _T_1270; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1272 = _T_1260 | _T_1271; // @[exu_div_ctl.scala 912:47]
+  wire  _T_1275 = a_ff[3] & a_ff[0]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1281 = _T_1275 & _T_1154; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1282 = _T_1272 | _T_1281; // @[exu_div_ctl.scala 912:88]
+  wire  _T_1286 = a_ff[3] & _T_1122; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1294 = _T_1169 & b_ff[0]; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1295 = _T_1286 & _T_1294; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1296 = _T_1282 | _T_1295; // @[exu_div_ctl.scala 912:131]
+  wire  _T_1303 = _T_1053 & b_ff[3]; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1306 = _T_1303 & _T_934; // @[exu_div_ctl.scala 913:77]
+  wire  _T_1307 = _T_1296 | _T_1306; // @[exu_div_ctl.scala 913:47]
+  wire  _T_1316 = b_ff[3] & _T_922; // @[exu_div_ctl.scala 895:95]
+  wire  _T_1317 = _T_1053 & _T_1316; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1318 = _T_1307 | _T_1317; // @[exu_div_ctl.scala 913:88]
+  wire  _T_1323 = _T_949 & a_ff[0]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1328 = _T_1323 & _T_1316; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1329 = _T_1318 | _T_1328; // @[exu_div_ctl.scala 913:131]
+  wire  _T_1335 = _T_992 & a_ff[1]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1340 = _T_1335 & _T_1081; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1341 = _T_1329 | _T_1340; // @[exu_div_ctl.scala 914:47]
+  wire  _T_1346 = _T_1041 & a_ff[0]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1349 = _T_1346 & _T_920; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1350 = _T_1341 | _T_1349; // @[exu_div_ctl.scala 914:88]
+  wire  _T_1357 = _T_1053 & a_ff[0]; // @[exu_div_ctl.scala 894:95]
+  wire  _T_1359 = _T_1357 & b_ff[3]; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1360 = _T_1350 | _T_1359; // @[exu_div_ctl.scala 914:131]
+  wire  _T_1366 = _T_1041 & _T_920; // @[exu_div_ctl.scala 896:11]
+  wire  _T_1369 = _T_1366 & _T_934; // @[exu_div_ctl.scala 915:74]
+  wire  _T_1370 = _T_1360 | _T_1369; // @[exu_div_ctl.scala 915:47]
+  wire [31:0] _T_896 = {28'h0,_T_925,_T_956,_T_1059,_T_1370}; // @[Cat.scala 29:58]
+  wire [31:0] _T_898 = _T_76 ? _T_895 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_899 = smallnum_case ? _T_896 : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_900 = by_zero_case ? 32'hffffffff : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_901 = _T_898 | _T_899; // @[Mux.scala 27:72]
+  wire [31:0] q_in = _T_901 | _T_900; // @[Mux.scala 27:72]
+  wire  _T_906 = ~twos_comp_q_sel; // @[exu_div_ctl.scala 889:16]
+  wire  _T_907 = _T_30 & _T_906; // @[exu_div_ctl.scala 889:14]
+  wire [31:0] _T_910 = _T_907 ? q_ff : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_911 = control_ff[0] ? r_ff[31:0] : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_912 = twos_comp_q_sel ? twos_comp_out : 32'h0; // @[Mux.scala 27:72]
+  wire [31:0] _T_913 = _T_910 | _T_911; // @[Mux.scala 27:72]
+  wire  _T_1397 = shortq == 6'h1b; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1398 = shortq == 6'h1a; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1399 = shortq == 6'h19; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1400 = shortq == 6'h18; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1401 = shortq == 6'h17; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1402 = shortq == 6'h16; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1403 = shortq == 6'h15; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1404 = shortq == 6'h14; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1405 = shortq == 6'h13; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1406 = shortq == 6'h12; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1407 = shortq == 6'h11; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1408 = shortq == 6'h10; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1409 = shortq == 6'hf; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1410 = shortq == 6'he; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1411 = shortq == 6'hd; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1412 = shortq == 6'hc; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1413 = shortq == 6'hb; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1414 = shortq == 6'ha; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1415 = shortq == 6'h9; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1416 = shortq == 6'h8; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1417 = shortq == 6'h7; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1418 = shortq == 6'h6; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1419 = shortq == 6'h5; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1420 = shortq == 6'h4; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1421 = shortq == 6'h3; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1422 = shortq == 6'h2; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1423 = shortq == 6'h1; // @[exu_div_ctl.scala 931:58]
+  wire  _T_1424 = shortq == 6'h0; // @[exu_div_ctl.scala 931:58]
+  wire [2:0] _T_1429 = _T_1397 ? 3'h4 : 3'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_1430 = _T_1398 ? 3'h4 : 3'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_1431 = _T_1399 ? 3'h4 : 3'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_1432 = _T_1400 ? 3'h4 : 3'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_1433 = _T_1401 ? 4'h8 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_1434 = _T_1402 ? 4'h8 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_1435 = _T_1403 ? 4'h8 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_1436 = _T_1404 ? 4'h8 : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_1437 = _T_1405 ? 4'hc : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_1438 = _T_1406 ? 4'hc : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_1439 = _T_1407 ? 4'hc : 4'h0; // @[Mux.scala 27:72]
+  wire [3:0] _T_1440 = _T_1408 ? 4'hc : 4'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1441 = _T_1409 ? 5'h10 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1442 = _T_1410 ? 5'h10 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1443 = _T_1411 ? 5'h10 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1444 = _T_1412 ? 5'h10 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1445 = _T_1413 ? 5'h14 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1446 = _T_1414 ? 5'h14 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1447 = _T_1415 ? 5'h14 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1448 = _T_1416 ? 5'h14 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1449 = _T_1417 ? 5'h18 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1450 = _T_1418 ? 5'h18 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1451 = _T_1419 ? 5'h18 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1452 = _T_1420 ? 5'h18 : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1453 = _T_1421 ? 5'h1c : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1454 = _T_1422 ? 5'h1c : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1455 = _T_1423 ? 5'h1c : 5'h0; // @[Mux.scala 27:72]
+  wire [4:0] _T_1456 = _T_1424 ? 5'h1c : 5'h0; // @[Mux.scala 27:72]
+  wire [2:0] _T_1461 = _T_1429 | _T_1430; // @[Mux.scala 27:72]
+  wire [2:0] _T_1462 = _T_1461 | _T_1431; // @[Mux.scala 27:72]
+  wire [2:0] _T_1463 = _T_1462 | _T_1432; // @[Mux.scala 27:72]
+  wire [3:0] _GEN_12 = {{1'd0}, _T_1463}; // @[Mux.scala 27:72]
+  wire [3:0] _T_1464 = _GEN_12 | _T_1433; // @[Mux.scala 27:72]
+  wire [3:0] _T_1465 = _T_1464 | _T_1434; // @[Mux.scala 27:72]
+  wire [3:0] _T_1466 = _T_1465 | _T_1435; // @[Mux.scala 27:72]
+  wire [3:0] _T_1467 = _T_1466 | _T_1436; // @[Mux.scala 27:72]
+  wire [3:0] _T_1468 = _T_1467 | _T_1437; // @[Mux.scala 27:72]
+  wire [3:0] _T_1469 = _T_1468 | _T_1438; // @[Mux.scala 27:72]
+  wire [3:0] _T_1470 = _T_1469 | _T_1439; // @[Mux.scala 27:72]
+  wire [3:0] _T_1471 = _T_1470 | _T_1440; // @[Mux.scala 27:72]
+  wire [4:0] _GEN_13 = {{1'd0}, _T_1471}; // @[Mux.scala 27:72]
+  wire [4:0] _T_1472 = _GEN_13 | _T_1441; // @[Mux.scala 27:72]
+  wire [4:0] _T_1473 = _T_1472 | _T_1442; // @[Mux.scala 27:72]
+  wire [4:0] _T_1474 = _T_1473 | _T_1443; // @[Mux.scala 27:72]
+  wire [4:0] _T_1475 = _T_1474 | _T_1444; // @[Mux.scala 27:72]
+  wire [4:0] _T_1476 = _T_1475 | _T_1445; // @[Mux.scala 27:72]
+  wire [4:0] _T_1477 = _T_1476 | _T_1446; // @[Mux.scala 27:72]
+  wire [4:0] _T_1478 = _T_1477 | _T_1447; // @[Mux.scala 27:72]
+  wire [4:0] _T_1479 = _T_1478 | _T_1448; // @[Mux.scala 27:72]
+  wire [4:0] _T_1480 = _T_1479 | _T_1449; // @[Mux.scala 27:72]
+  wire [4:0] _T_1481 = _T_1480 | _T_1450; // @[Mux.scala 27:72]
+  wire [4:0] _T_1482 = _T_1481 | _T_1451; // @[Mux.scala 27:72]
+  wire [4:0] _T_1483 = _T_1482 | _T_1452; // @[Mux.scala 27:72]
+  wire [4:0] _T_1484 = _T_1483 | _T_1453; // @[Mux.scala 27:72]
+  wire [4:0] _T_1485 = _T_1484 | _T_1454; // @[Mux.scala 27:72]
+  wire [4:0] _T_1486 = _T_1485 | _T_1455; // @[Mux.scala 27:72]
+  wire [4:0] shortq_decode = _T_1486 | _T_1456; // @[Mux.scala 27:72]
+  exu_div_cls a_enc ( // @[exu_div_ctl.scala 919:21]
+    .io_operand(a_enc_io_operand),
+    .io_cls(a_enc_io_cls)
+  );
+  exu_div_cls b_enc ( // @[exu_div_ctl.scala 922:21]
+    .io_operand(b_enc_io_operand),
+    .io_cls(b_enc_io_cls)
+  );
   rvclkhdr rvclkhdr ( // @[lib.scala 390:23]
     .io_clk(rvclkhdr_io_clk),
     .io_en(rvclkhdr_io_en)
@@ -665,54 +988,32 @@ module el2_exu_div_existing_1bit_cheapshortq(
     .io_clk(rvclkhdr_10_io_clk),
     .io_en(rvclkhdr_10_io_en)
   );
-  rvclkhdr rvclkhdr_11 ( // @[lib.scala 390:23]
-    .io_clk(rvclkhdr_11_io_clk),
-    .io_en(rvclkhdr_11_io_en)
-  );
-  rvclkhdr rvclkhdr_12 ( // @[lib.scala 390:23]
-    .io_clk(rvclkhdr_12_io_clk),
-    .io_en(rvclkhdr_12_io_en)
-  );
-  rvclkhdr rvclkhdr_13 ( // @[lib.scala 390:23]
-    .io_clk(rvclkhdr_13_io_clk),
-    .io_en(rvclkhdr_13_io_en)
-  );
-  rvclkhdr rvclkhdr_14 ( // @[lib.scala 390:23]
-    .io_clk(rvclkhdr_14_io_clk),
-    .io_en(rvclkhdr_14_io_en)
-  );
-  assign io_data_out = _T_1473 | _T_1472; // @[exu_div_ctl.scala 261:15]
-  assign io_valid_out = finish_ff & _T; // @[exu_div_ctl.scala 234:17]
+  assign io_data_out = _T_913 | _T_912; // @[exu_div_ctl.scala 888:15]
+  assign io_valid_out = finish_ff & _T; // @[exu_div_ctl.scala 887:16]
+  assign a_enc_io_operand = {control_ff[2],a_ff}; // @[exu_div_ctl.scala 920:20]
+  assign b_enc_io_operand = b_ff[32:0]; // @[exu_div_ctl.scala 923:20]
   assign rvclkhdr_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_io_en = _T_47 | finish_ff; // @[lib.scala 393:17]
   assign rvclkhdr_1_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_1_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_1_io_en = _T_47 | finish_ff; // @[lib.scala 393:17]
   assign rvclkhdr_2_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_2_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_2_io_en = _T_47 | finish_ff; // @[lib.scala 393:17]
   assign rvclkhdr_3_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_3_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_3_io_en = _T_47 | finish_ff; // @[lib.scala 393:17]
   assign rvclkhdr_4_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_4_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_4_io_en = _T_47 | finish_ff; // @[lib.scala 393:17]
   assign rvclkhdr_5_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_5_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_5_io_en = _T_47 | finish_ff; // @[lib.scala 393:17]
   assign rvclkhdr_6_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_6_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_6_io_en = _T_47 | finish_ff; // @[lib.scala 393:17]
   assign rvclkhdr_7_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_7_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_7_io_en = io_valid_in | running_state; // @[lib.scala 393:17]
   assign rvclkhdr_8_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_8_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_8_io_en = io_valid_in | b_twos_comp; // @[lib.scala 393:17]
   assign rvclkhdr_9_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_9_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
+  assign rvclkhdr_9_io_en = _T_45 | running_state; // @[lib.scala 393:17]
   assign rvclkhdr_10_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_10_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
-  assign rvclkhdr_11_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_11_io_en = _T_692 | finish_ff; // @[lib.scala 393:17]
-  assign rvclkhdr_12_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_12_io_en = io_valid_in | _T_743; // @[lib.scala 393:17]
-  assign rvclkhdr_13_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_13_io_en = _T_996 | rem_correct; // @[lib.scala 393:17]
-  assign rvclkhdr_14_io_clk = clock; // @[lib.scala 392:18]
-  assign rvclkhdr_14_io_en = io_valid_in; // @[lib.scala 393:17]
+  assign rvclkhdr_10_io_en = _T_45 | running_state; // @[lib.scala 393:17]
 `ifdef RANDOMIZE_GARBAGE_ASSIGN
 `define RANDOMIZE
 `endif
@@ -749,80 +1050,60 @@ initial begin
     `endif
 `ifdef RANDOMIZE_REG_INIT
   _RAND_0 = {1{`RANDOM}};
-  valid_ff_x = _RAND_0[0:0];
+  control_ff = _RAND_0[2:0];
   _RAND_1 = {2{`RANDOM}};
-  q_ff = _RAND_1[32:0];
-  _RAND_2 = {2{`RANDOM}};
-  m_ff = _RAND_2[32:0];
+  b_ff1 = _RAND_1[32:0];
+  _RAND_2 = {1{`RANDOM}};
+  valid_ff = _RAND_2[0:0];
   _RAND_3 = {1{`RANDOM}};
-  rem_ff = _RAND_3[0:0];
+  a_ff = _RAND_3[31:0];
   _RAND_4 = {1{`RANDOM}};
-  sign_ff = _RAND_4[0:0];
+  count_ff = _RAND_4[6:0];
   _RAND_5 = {1{`RANDOM}};
-  _T_1521 = _RAND_5[5:0];
+  shortq_enable_ff = _RAND_5[0:0];
   _RAND_6 = {1{`RANDOM}};
-  count = _RAND_6[5:0];
+  finish_ff = _RAND_6[0:0];
   _RAND_7 = {1{`RANDOM}};
-  run_state = _RAND_7[0:0];
+  shortq_shift_ff = _RAND_7[4:0];
   _RAND_8 = {1{`RANDOM}};
-  finish_ff = _RAND_8[0:0];
-  _RAND_9 = {1{`RANDOM}};
-  shortq_enable_ff = _RAND_9[0:0];
+  by_zero_case_ff = _RAND_8[0:0];
+  _RAND_9 = {2{`RANDOM}};
+  r_ff = _RAND_9[32:0];
   _RAND_10 = {1{`RANDOM}};
-  dividend_neg_ff = _RAND_10[0:0];
-  _RAND_11 = {2{`RANDOM}};
-  a_ff = _RAND_11[32:0];
-  _RAND_12 = {1{`RANDOM}};
-  divisor_neg_ff = _RAND_12[0:0];
-  _RAND_13 = {1{`RANDOM}};
-  smallnum_case_ff = _RAND_13[0:0];
-  _RAND_14 = {1{`RANDOM}};
-  smallnum_ff = _RAND_14[3:0];
+  q_ff = _RAND_10[31:0];
 `endif // RANDOMIZE_REG_INIT
   if (reset) begin
-    valid_ff_x = 1'h0;
+    control_ff = 3'h0;
   end
   if (reset) begin
-    q_ff = 33'h0;
+    b_ff1 = 33'h0;
   end
   if (reset) begin
-    m_ff = 33'h0;
+    valid_ff = 1'h0;
   end
   if (reset) begin
-    rem_ff = 1'h0;
+    a_ff = 32'h0;
   end
   if (reset) begin
-    sign_ff = 1'h0;
-  end
-  if (reset) begin
-    _T_1521 = 6'h0;
-  end
-  if (reset) begin
-    count = 6'h0;
-  end
-  if (reset) begin
-    run_state = 1'h0;
-  end
-  if (reset) begin
-    finish_ff = 1'h0;
+    count_ff = 7'h0;
   end
   if (reset) begin
     shortq_enable_ff = 1'h0;
   end
   if (reset) begin
-    dividend_neg_ff = 1'h0;
+    finish_ff = 1'h0;
   end
   if (reset) begin
-    a_ff = 33'h0;
+    shortq_shift_ff = 5'h0;
   end
   if (reset) begin
-    divisor_neg_ff = 1'h0;
+    by_zero_case_ff = 1'h0;
   end
   if (reset) begin
-    smallnum_case_ff = 1'h0;
+    r_ff = 33'h0;
   end
   if (reset) begin
-    smallnum_ff = 4'h0;
+    q_ff = 32'h0;
   end
   `endif // RANDOMIZE
 end // initial
@@ -832,107 +1113,83 @@ end // initial
 `endif // SYNTHESIS
   always @(posedge clock or posedge reset) begin
     if (reset) begin
-      valid_ff_x <= 1'h0;
-    end else if (div_clken) begin
-      valid_ff_x <= _T_1477;
+      control_ff <= 3'h0;
+    end else if (misc_enable) begin
+      control_ff <= control_in;
     end
   end
   always @(posedge clock or posedge reset) begin
     if (reset) begin
-      q_ff <= 33'h0;
-    end else if (qff_enable) begin
-      q_ff <= q_in;
+      b_ff1 <= 33'h0;
+    end else if (b_enable) begin
+      b_ff1 <= b_in;
     end
   end
   always @(posedge clock or posedge reset) begin
     if (reset) begin
-      m_ff <= 33'h0;
-    end else if (io_valid_in) begin
-      m_ff <= _T_1529;
+      valid_ff <= 1'h0;
+    end else if (misc_enable) begin
+      valid_ff <= valid_ff_in;
     end
   end
   always @(posedge clock or posedge reset) begin
     if (reset) begin
-      rem_ff <= 1'h0;
-    end else if (div_clken) begin
-      rem_ff <= _T_1511;
-    end
-  end
-  always @(posedge clock or posedge reset) begin
-    if (reset) begin
-      sign_ff <= 1'h0;
-    end else if (div_clken) begin
-      sign_ff <= _T_1505;
-    end
-  end
-  always @(posedge clock or posedge reset) begin
-    if (reset) begin
-      _T_1521 <= 6'h0;
-    end else if (div_clken) begin
-      _T_1521 <= shortq_shift;
-    end
-  end
-  always @(posedge clock or posedge reset) begin
-    if (reset) begin
-      count <= 6'h0;
-    end else if (div_clken) begin
-      count <= count_in;
-    end
-  end
-  always @(posedge clock or posedge reset) begin
-    if (reset) begin
-      run_state <= 1'h0;
-    end else if (div_clken) begin
-      run_state <= run_in;
-    end
-  end
-  always @(posedge clock or posedge reset) begin
-    if (reset) begin
-      finish_ff <= 1'h0;
-    end else if (div_clken) begin
-      finish_ff <= _T_1481;
-    end
-  end
-  always @(posedge clock or posedge reset) begin
-    if (reset) begin
-      shortq_enable_ff <= 1'h0;
-    end else if (div_clken) begin
-      shortq_enable_ff <= shortq_enable;
-    end
-  end
-  always @(posedge clock or posedge reset) begin
-    if (reset) begin
-      dividend_neg_ff <= 1'h0;
-    end else if (div_clken) begin
-      dividend_neg_ff <= _T_1492;
-    end
-  end
-  always @(posedge clock or posedge reset) begin
-    if (reset) begin
-      a_ff <= 33'h0;
-    end else if (aff_enable) begin
+      a_ff <= 32'h0;
+    end else if (a_enable) begin
       a_ff <= a_in;
     end
   end
   always @(posedge clock or posedge reset) begin
     if (reset) begin
-      divisor_neg_ff <= 1'h0;
-    end else if (div_clken) begin
-      divisor_neg_ff <= _T_1499;
+      count_ff <= 7'h0;
+    end else if (misc_enable) begin
+      count_ff <= count_in;
     end
   end
   always @(posedge clock or posedge reset) begin
     if (reset) begin
-      smallnum_case_ff <= 1'h0;
-    end else if (div_clken) begin
-      smallnum_case_ff <= smallnum_case;
+      shortq_enable_ff <= 1'h0;
+    end else if (misc_enable) begin
+      shortq_enable_ff <= shortq_enable;
     end
   end
   always @(posedge clock or posedge reset) begin
     if (reset) begin
-      smallnum_ff <= 4'h0;
-    end else if (div_clken) begin
-      smallnum_ff <= smallnum;
+      finish_ff <= 1'h0;
+    end else if (misc_enable) begin
+      finish_ff <= finish;
+    end
+  end
+  always @(posedge clock or posedge reset) begin
+    if (reset) begin
+      shortq_shift_ff <= 5'h0;
+    end else if (misc_enable) begin
+      if (_T_58) begin
+        shortq_shift_ff <= 5'h0;
+      end else begin
+        shortq_shift_ff <= shortq_decode;
+      end
+    end
+  end
+  always @(posedge clock or posedge reset) begin
+    if (reset) begin
+      by_zero_case_ff <= 1'h0;
+    end else if (misc_enable) begin
+      by_zero_case_ff <= by_zero_case;
+    end
+  end
+  always @(posedge clock or posedge reset) begin
+    if (reset) begin
+      r_ff <= 33'h0;
+    end else if (rq_enable) begin
+      r_ff <= r_in;
+    end
+  end
+  always @(posedge clock or posedge reset) begin
+    if (reset) begin
+      q_ff <= 32'h0;
+    end else if (rq_enable) begin
+      q_ff <= q_in;
     end
   end
 endmodule
@@ -949,38 +1206,38 @@ module exu_div_ctl(
   input         io_dec_div_div_p_bits_rem,
   input         io_dec_div_dec_div_cancel
 );
-  wire  divider_old_clock; // @[exu_div_ctl.scala 23:27]
-  wire  divider_old_reset; // @[exu_div_ctl.scala 23:27]
-  wire  divider_old_io_cancel; // @[exu_div_ctl.scala 23:27]
-  wire  divider_old_io_valid_in; // @[exu_div_ctl.scala 23:27]
-  wire  divider_old_io_signed_in; // @[exu_div_ctl.scala 23:27]
-  wire  divider_old_io_rem_in; // @[exu_div_ctl.scala 23:27]
-  wire [31:0] divider_old_io_dividend_in; // @[exu_div_ctl.scala 23:27]
-  wire [31:0] divider_old_io_divisor_in; // @[exu_div_ctl.scala 23:27]
-  wire [31:0] divider_old_io_data_out; // @[exu_div_ctl.scala 23:27]
-  wire  divider_old_io_valid_out; // @[exu_div_ctl.scala 23:27]
+  wire  divider_new4_clock; // @[exu_div_ctl.scala 71:30]
+  wire  divider_new4_reset; // @[exu_div_ctl.scala 71:30]
+  wire  divider_new4_io_cancel; // @[exu_div_ctl.scala 71:30]
+  wire  divider_new4_io_valid_in; // @[exu_div_ctl.scala 71:30]
+  wire  divider_new4_io_signed_in; // @[exu_div_ctl.scala 71:30]
+  wire  divider_new4_io_rem_in; // @[exu_div_ctl.scala 71:30]
+  wire [31:0] divider_new4_io_dividend_in; // @[exu_div_ctl.scala 71:30]
+  wire [31:0] divider_new4_io_divisor_in; // @[exu_div_ctl.scala 71:30]
+  wire [31:0] divider_new4_io_data_out; // @[exu_div_ctl.scala 71:30]
+  wire  divider_new4_io_valid_out; // @[exu_div_ctl.scala 71:30]
   wire [31:0] _T_1 = io_exu_div_wren ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12]
-  wire [31:0] out_raw = divider_old_io_data_out; // @[exu_div_ctl.scala 31:27]
-  el2_exu_div_existing_1bit_cheapshortq divider_old ( // @[exu_div_ctl.scala 23:27]
-    .clock(divider_old_clock),
-    .reset(divider_old_reset),
-    .io_cancel(divider_old_io_cancel),
-    .io_valid_in(divider_old_io_valid_in),
-    .io_signed_in(divider_old_io_signed_in),
-    .io_rem_in(divider_old_io_rem_in),
-    .io_dividend_in(divider_old_io_dividend_in),
-    .io_divisor_in(divider_old_io_divisor_in),
-    .io_data_out(divider_old_io_data_out),
-    .io_valid_out(divider_old_io_valid_out)
+  wire [31:0] out_raw = divider_new4_io_data_out; // @[exu_div_ctl.scala 79:29]
+  exu_div_new_4bit_fullshortq divider_new4 ( // @[exu_div_ctl.scala 71:30]
+    .clock(divider_new4_clock),
+    .reset(divider_new4_reset),
+    .io_cancel(divider_new4_io_cancel),
+    .io_valid_in(divider_new4_io_valid_in),
+    .io_signed_in(divider_new4_io_signed_in),
+    .io_rem_in(divider_new4_io_rem_in),
+    .io_dividend_in(divider_new4_io_dividend_in),
+    .io_divisor_in(divider_new4_io_divisor_in),
+    .io_data_out(divider_new4_io_data_out),
+    .io_valid_out(divider_new4_io_valid_out)
   );
   assign io_exu_div_result = _T_1 & out_raw; // @[exu_div_ctl.scala 21:21]
-  assign io_exu_div_wren = divider_old_io_valid_out; // @[exu_div_ctl.scala 32:27]
-  assign divider_old_clock = clock;
-  assign divider_old_reset = reset;
-  assign divider_old_io_cancel = io_dec_div_dec_div_cancel; // @[exu_div_ctl.scala 25:31]
-  assign divider_old_io_valid_in = io_dec_div_div_p_valid; // @[exu_div_ctl.scala 26:31]
-  assign divider_old_io_signed_in = ~io_dec_div_div_p_bits_unsign; // @[exu_div_ctl.scala 27:31]
-  assign divider_old_io_rem_in = io_dec_div_div_p_bits_rem; // @[exu_div_ctl.scala 28:31]
-  assign divider_old_io_dividend_in = io_dividend; // @[exu_div_ctl.scala 29:31]
-  assign divider_old_io_divisor_in = io_divisor; // @[exu_div_ctl.scala 30:31]
+  assign io_exu_div_wren = divider_new4_io_valid_out; // @[exu_div_ctl.scala 80:29]
+  assign divider_new4_clock = clock;
+  assign divider_new4_reset = reset;
+  assign divider_new4_io_cancel = io_dec_div_dec_div_cancel; // @[exu_div_ctl.scala 73:34]
+  assign divider_new4_io_valid_in = io_dec_div_div_p_valid; // @[exu_div_ctl.scala 74:34]
+  assign divider_new4_io_signed_in = ~io_dec_div_div_p_bits_unsign; // @[exu_div_ctl.scala 75:34]
+  assign divider_new4_io_rem_in = io_dec_div_div_p_bits_rem; // @[exu_div_ctl.scala 76:34]
+  assign divider_new4_io_dividend_in = io_dividend; // @[exu_div_ctl.scala 77:34]
+  assign divider_new4_io_divisor_in = io_divisor; // @[exu_div_ctl.scala 78:34]
 endmodule
diff --git a/src/main/scala/exu/exu_div_ctl.scala b/src/main/scala/exu/exu_div_ctl.scala
index 7dfe2f1f..7dd8d148 100644
--- a/src/main/scala/exu/exu_div_ctl.scala
+++ b/src/main/scala/exu/exu_div_ctl.scala
@@ -80,6 +80,9 @@ if(!DIV_NEW) {
     io.exu_div_wren         := divider_new4.io.valid_out
   }
 }
+object div_main extends App {
+  println((new chisel3.stage.ChiselStage).emitVerilog(new exu_div_ctl()))
+}
 ////////////////////////////////////////// OLD DIVIDER /////////////////////////////////////
 class exu_div_existing_1bit_cheapshortq extends Module with RequireAsyncReset with lib {
   val io = IO(new Bundle{
@@ -277,8 +280,6 @@ class exu_div_existing_1bit_cheapshortq extends Module with RequireAsyncReset wi
   a_ff := rvdffe(a_in, aff_enable,clock,io.scan_mode)
   m_ff := rvdffe(Cat(io.signed_in & io.divisor_in(31), io.divisor_in(31,0)), io.valid_in,clock,io.scan_mode)
 
-
-
 }
 /////////////////////////////////////////////// 1 BIT FULL DIVIDER//////////////////////////////////
 class exu_div_new_1bit_fullshortq extends Module with RequireAsyncReset with lib {
@@ -420,6 +421,7 @@ val shortq_dividend = Cat(dividend_sign_ff,a_ff)
   r_ff := rvdffe(r_in, rq_enable,clock,io.scan_mode)
   q_ff := rvdffe(q_in, rq_enable,clock,io.scan_mode)
 }
+/////////////////////////////////////////////// 2 BIT FULL DIVIDER//////////////////////////////////
 class exu_div_new_2bit_fullshortq extends Module with RequireAsyncReset with lib {
   val io = IO(new Bundle{
     val scan_mode             = Input(Bool())
@@ -571,6 +573,7 @@ class exu_div_new_2bit_fullshortq extends Module with RequireAsyncReset with lib
   q_ff := rvdffe(q_in, rq_enable,clock,io.scan_mode)
 
 }
+/////////////////////////////////////////////// 3 BIT FULL DIVIDER//////////////////////////////////
 class exu_div_new_3bit_fullshortq extends Module with RequireAsyncReset with lib {
   val io = IO(new Bundle{
     val scan_mode             = Input(Bool())
@@ -738,7 +741,7 @@ class exu_div_new_3bit_fullshortq extends Module with RequireAsyncReset with lib
   q_ff := rvdffe(q_in, rq_enable,clock,io.scan_mode)
 
 }
-
+/////////////////////////////////////////////// 4 BIT FULL DIVIDER//////////////////////////////////
 class exu_div_new_4bit_fullshortq extends Module with RequireAsyncReset with lib {
   val io = IO(new Bundle {
     val scan_mode = Input(Bool())
@@ -942,10 +945,6 @@ class exu_div_new_4bit_fullshortq extends Module with RequireAsyncReset with lib
   q_ff := rvdffe(q_in, rq_enable,clock,io.scan_mode)
 
 }
-object div_main5 extends App {
-  println((new chisel3.stage.ChiselStage).emitVerilog(new exu_div_new_4bit_fullshortq()))
-}
-
 class exu_div_cls extends Module{
   val io= IO(new Bundle{
     val operand = Input(UInt(33.W))
diff --git a/target/scala-2.12/classes/exu/div_main5$.class b/target/scala-2.12/classes/exu/div_main$.class
similarity index 63%
rename from target/scala-2.12/classes/exu/div_main5$.class
rename to target/scala-2.12/classes/exu/div_main$.class
index 45e6e887dfeb54661ca9dbd33b402225892e352f..ca66706c97ac85e28bed8abd11a621cb2ecbb5dd 100644
GIT binary patch
delta 288
zcmX>kH%CtL)W2Q(7#J8#80IoE@TOLj>ZfFu#pfnw=1r7Z$j9%4EVA*`Z)PVxmBhUK
zytL9hmAuq)6*EQ#VGT{NDxk`Ekly5y9BW1fevn2aA$A65E(R9{Nk#^_$r`LOn_XG?
znT=$TO;<@t%}K0GP4UdjEKy0yPpM>QsApsl(m-*-<_?ZJCMJg9$sF7^AS#|$d~z(e
z2aLIo+Y-e5$!!gy%y^(`Bq#Usn1e))@wh;gN={bgwSX|AnHWMQ@8R`fV+dhT2dd%Y
LD+fum^X&!zp9EDw

delta 359
zcmbOucSug^)W2Q(7#J8#80IoE@TFFi>ZfFu#pfnw=9x~ET*xorgCex?#Bb($ewD<$
z{JgZ%Je9oEauq`ZMh0aKO|Uwk+IWz5pm@AVQf5hfT4_#BaYlYoNuf0(gFMJ6JWALZ
zoVgfW7$kuzQ&MvhD^pWk^HK`(GxJJRfVxy*?qW3EtjNmGY$69T4kl=-0@dP~msz5c
zl%G<`&QQ<DAgqDv{>@1obxcgm8z&3!h)({_r4C{?a*Izk=k|aw17MObxYZy`8<?6@
q9!n5&0gnqz<S&mEj2XZS6x}p=8m|u<^Ckv$pt={l<sivKzTE)14|VJS

diff --git a/target/scala-2.12/classes/exu/div_main$delayedInit$body.class b/target/scala-2.12/classes/exu/div_main$delayedInit$body.class
new file mode 100644
index 0000000000000000000000000000000000000000..c5c22e5de292eddcd26426baff93827af89a0d84
GIT binary patch
literal 738
zcmZ`%U279T6g@W|yCzMV4{K}HwtlRVw%}UOr--0pA&^udZC}e|ciK+f%!bWuY5tXp
zAK-&N3jQeZ&Nc{J@MZ4Yv-h5R?%DbM=lc%;Pw|MbCNEMyROd%yp|lsuNX%r|)5>_G
zIGnj4!p1ZZk?@mL8#R{x%hA*%A~3tD4vdQR6Bk87i+PSLPhg_QSp&iG;?&55(CFu;
zbO~iKnM5<fQfIS&CeDQ)34P+f9i7R*bZc<nR!~5dP|tO`s1erZD&OdE5-V*yF7f`Y
zutO+zHV<o9M5Bs2nuL}70<Yo=86NP8F4~0B!Cr5lu-gAm5vy6kjS8+~nTyS-nzAGL
zeXhF3`#H}Q4|qXnck;DeEA5t*R>B=7d>x0<8l<$`OUEOb?2A#vNV^}i>xUvyHlKs_
zp%KCRftbwm=0KX$ID97(F_!E!OREm!GzsLcvLub6{c}AXF?&xR$LxECV28~u@e|-V
z)@!~M(84uT7+L4+8Asx{u=N=WU(x!6l@D3b2A@v$X^6XguU(emCRRBk-t0D0S&9M2
z0>|d|FO=!$*7g@>`-ZiTj1_S&JITRS!sW}RIU%=a`Uv;Aq0GKAP{adH3Mj+lxX3TG
NVCRz6Pk6`}{sPjKp@0AY

literal 0
HcmV?d00001

diff --git a/target/scala-2.12/classes/exu/div_main.class b/target/scala-2.12/classes/exu/div_main.class
new file mode 100644
index 0000000000000000000000000000000000000000..b361614349bedc5719e953d40b2c75db1546f93d
GIT binary patch
literal 781
zcmZuvZBNrs6n;*-t}B$WIRqy!I$jbmkxIghW<=95Fq$EZ1rp=~-nG|RQd-m9A@~dY
zGk(wyeDH%mz#nBi9fBHda`W7C?sHzAbNc<q*KYt;u|TlpS>N%4)1wm+L?(z(I2NbE
z2}RU(wmZktQzmpmk$Fcc&r{)Y&l8~_%rplVCy{SL<~i-u-442uQ2j*K2u9~z$sXZj
zmJS}b1nHJGz0#`aj7x5dHp$TTEYe<8-#>k5PrRJUYQsjkHF8wTkXxi#*VHV_b?;BE
zy*|t~yU~WGO>EFCHF9~q+A6vY%69Yiv*iOruT+boQhfAbVSLqGC$m(t%DZ(}tBblV
zXr~&tcU5D~%@8uFPQv)&Ve_}nwn~DiTU*-acae0t<B>ndGH=2rm|NS8z2?R|VYK<z
zYt2R;qZUR`uwh|nh;KIt!@dl~x%8h$fg+48{u<V1Kk`%%M-K+&oPXSFS3~VbDmal&
zJwB8E9_Oe%xoof#`{y>sa5JrQi;$OR((9)w+e#!{N?%-hVdFL?Q^FKWT919nd)<=i
zZS3!eM4U(^6IN+mFN-kLkna-d2_=0t+HpVe<Yo|ZV0rhlmHnU>bVBJyQLIE-k2B=1
zc8(Qj$nakU=sW}-1KTrfjWH5q?hA_dE>QZMQgDZl!81aEsjP)V|3fZclJ7EE!#FC8
t*P#=GP*%y=)6f!A($C~N7nuGuFm%i^YA`UzILy>6AG3!X=Gmbez)zPAqPYM7

literal 0
HcmV?d00001

diff --git a/target/scala-2.12/classes/exu/div_main5$delayedInit$body.class b/target/scala-2.12/classes/exu/div_main5$delayedInit$body.class
deleted file mode 100644
index eeef3e20d15302ece2b1d3c91ba8c8d395487abb..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 744
zcmZ`%TWb?R6#h=GCQWl`YiqsqqN}7WxEAbFL{PC1*i<2HU(4+7Xs2#w!)CTL|H_IN
z@WDP7{88eWZ9o$6WzL*$&-u=GzMbEHe*OaR98U;q@*;IZb$&7sO7A(LjKo-mU9F7c
z$KkjPBCL-B5eYX*wNV4<zVb&V5rNrHbzoGipOuj(w3z6`5(OrDnl%tgPMjK<5Srff
zm=2*RhQnw~SZZ&1XX0GAk<cIAcmA0SOs9qt$`#~LCDf-|%c!xUiO#n=9L7o;hijaF
zTkI0@?XBY)>S$Ckk0xPddWYBXg$$2)%Q6-Sg`<P+Az{_~PZ8@`!tDwcvCPHhRE-E5
zGb_zH$19dzD4y_=u-Kj{?pSemt+)d2Gv%8&l!S(-v^+=$zDy2<A2G7v#cchtNR-Vd
z;C$bR;8RZwCwa3c&1oFI7l{~1wwuLO`*E5Ca$i}JM&JIvu8x?!t3Sl-eTHC{4KDCQ
z;5pWBzU9!uEmRm;<7|&3ah%)!in;G-eZk7-tZ1FjlKqsw#0KAMH)XhkRnCYvyT??P
zqQ^1EvAJ`NB3*6od}FpBcyP&B9-G-oCCm~o-!x4KxjoZIc*qS!HkN@r9&wUG5e~;X
PKhvC@OIAPOF=O}(MIxhy

diff --git a/target/scala-2.12/classes/exu/div_main5.class b/target/scala-2.12/classes/exu/div_main5.class
deleted file mode 100644
index 02ce3d2ea62edc975fbbdb9b100f51e97dd4ef62..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

literal 787
zcmZuv+iuf95S{VHb=<hQ(4-|PZAl4IiUcMS<rWHR(gp=3gfvQ|a#6Lhx51TbBWGRO
zZ{S;afQLTtzz6VAh;c#-6<Au$&diz1IqM%kzkLUQdvFtBPMn0M?HunPamU-x01?uM
z{Fs|A_eN%CcqlBX0Yk_Ta6bZC(!DdbxXTe%T9b<zhy#~!W-ki&oRP<67>Fu@Iy{wP
zjPPj&_a1dQGF@4&bc>Aa`c@Yks49IuqrBeu`0T#1`10*ig5~r|v9NipA+BK^lPr_@
zJD=6my$n;8xz!E5TdQM=<?;`2=N}B`b=<9CtoH68J7^blmTxwTd`DxN%Hk%*HhYg-
z&pYXak|Kh!h%3TE`AzE&)t(F-Z&Y0$P@V@PS~_`2nvw<vg4XVA_ggz9QmJ)0T{R#H
zDIMk@ZGaB5vvj+Hkg$czPles|9Ep%E|5mIKdX{v2@9t!v`A_)Cxw4@rog-n^{1ajK
zsYmtcbj6`>pBj*bTr}tEWLaT_QOlm>0gYni^%n*dU?~DzBT{wW7PNL-$oIbeiU<5i
zND&ZE{o=(CX1B$MKv-M~o1C5>29{_zE*0i?r>hK{u`_hVmgo7BNAsvd{QTje0t&?F
z-vVGH0?9!B3VB(wNH+czGPllP{!0XbRXQqZ1Zjd27b^V^I6nnnC$ItwP$YX%x;QB%
pmef5eohL~2X*A~ymOoD%25V#$P~isI1VLx$Xk&;&i2_Uo_yrxOp>hBK

diff --git a/target/scala-2.12/classes/exu/exu_div_cls$$anon$7.class b/target/scala-2.12/classes/exu/exu_div_cls$$anon$7.class
index d2b83dac7795a6a5c3bffb71410c97f454d1c48c..fc3d6675de342627d191573562f186e371a6593b 100644
GIT binary patch
delta 39
vcmbQoJCApR2P@;Y$)2n>lRa3)CeLOq;oZu>#k`F{k9j*oAoJGAGHgu%?$ir%

delta 39
vcmbQoJCApR2kYckR<X%(tm=$ACbzM6@@`|`V&2Z6$Gn3fka^o=8MY<>^kWOP

diff --git a/target/scala-2.12/classes/exu/exu_div_cls.class b/target/scala-2.12/classes/exu/exu_div_cls.class
index ee0d573b58f634d62ca03e79b88174ad12657ea1..e34cf3d6b2bcc9d8c564efc0782757185749ebb8 100644
GIT binary patch
delta 298
zcmdlOwlQpjmmK4s$=-648TU=TFE@GeJvqL~4f1V_2PU&COa_v(6{07vRTQ4gsi?)c
zbFzt|&17RBuNlbOGPw}QI;iLm)Gw%H#JoqqelowR^yEaP2%yL=r8c06j>^W&`vfGx
z;**q3fFj40<A5UOlP%R`fIL@~T;}}(PC$97$>&vU8TU`-Rn-8Bqya@FCkLv=07cfR
zb^u9pH8~&|rdAAe#VIxO$tTrBCX1?@0B!P8R|T3>pe_TH?^RD@J|G|s*3GXW3S<j_
z*$x`KK)?8DR48s?;9}m&Aj`ayA(VL+Lof3lhV#t(7``&^XB1*Sz<8N?%jD-889<W)
RG$Vm#2WaYSzNQ(?2mqnoW1Ij0

delta 292
zcmdlOwlQpjmmK5X$=-648TU`VFE@GeECs&F4f1V_2Pd;DOa_v(6`~opP5!Q6Gr2%f
zc(R+K7US;8g^D(lzbOb$KA;!?)GMfD#JpF)elowR^yEaP2%yL=r8b~xj>^W&`voMy
z;**q3fFj40<A5UOlP%RWCI_e_F&_|c0?JBFKCfcScwjQGss>Ob4JaZxIZ!nQD6&qq
z14x>y$pOhQwc^Q)>LQcxs;K~7z@+XDw8u+b6=-UKx(rahS3QmSpnx=3H@}7`kSzda
zJ819%ec`83p}3WSi+LM^Eb}ggQ0CnXz07+V&NJ_4_{w~MQHc2<<7MWplb>s308I+e
Qj0Bn;psBO@nr1X306u(TQ~&?~

diff --git a/target/scala-2.12/classes/exu/exu_div_existing_1bit_cheapshortq$$anon$2.class b/target/scala-2.12/classes/exu/exu_div_existing_1bit_cheapshortq$$anon$2.class
index 0cc0765e3423ace018cd304fbc8e3569e3795a53..8f3867afb031a3b980f5921b23f0e7b62acf336b 100644
GIT binary patch
delta 128
zcmbO)HeYOm5c}kl>|&EO*wrVqafnS$1=7wydJ&Lr0Mhq?^j;t>!=XO;7m$wRP-l#v
z+{j_Wm;fY2Ctn8g6G5!a0-TnNnh^|K43P}V3{ea=4ABgs3^5FO46zLD3~>yr8R8kv
TGbAv4W=LcdV~Chs#I+UxAK)T3

delta 132
zcmbO)HeYOm5IbYo<VFtB$r|kHjNxEbDv%WcW-Ve@pDe^KHu*k~_6O239O{#MfOI5~
zJ_)3!0ckc4vB{T#v@?g;W&uu1M$J$LE`~4$WrlDD8-@smP=-i`JccNSc7|w%)eJEV
U=NV!dJ~PBIiZO&vF5+4X056{*-T(jq

diff --git a/target/scala-2.12/classes/exu/exu_div_existing_1bit_cheapshortq.class b/target/scala-2.12/classes/exu/exu_div_existing_1bit_cheapshortq.class
index 8fdc86e55f0f7dff988a2b9736d9c1d137927d16..a0f8889ec4568044b0712f23c8ee2564ba24f773 100644
GIT binary patch
delta 10043
zcmZXYcR*Fg(!h7PfCvZ&5dkRziWEgbEQlIFV=SnEy&)2fz4yd|DT*5VK}YOHjV6|e
zi7k?d(ZqrU5=<mUMSZbF1vMIdh<-EYu<OnD{<-_xotd54*?Mm7ef!+|_ItBGfed}k
zCt14Zd>6gd+)RBJm4%h%(0Q3~SARG!3-0M3XY#Mt{4D*~1upux^D~VyX+b7D)PGx$
z1&{U73$vhHhflM>PG9wDmcC=DiypHm(<skXmhUdk)LSoe(f_F|7cI%ule1j(z@?eG
z>na!h0F~#_MNeF2mL-+tl;vjKaYd&7e6@?dv9fHUoAuL`<-n{=eQ~yn{-m;;ztXJx
zt;z&9ecP%m`i({Yy<q$fS)HXHT;rnKXJ>-Dz9c(K@4VJUk6e=p9{Qm*S>UO6S(^o3
z`VIQ^)~BuGU+4AwyV>|{wt+c+!vN^5rxbbWaT{A!(h5a!8{PHi8^fr*Y)ef&W>ca;
zo_fWmKs|Sp+0M0&hGk7Xbu;&oy}4aweeGv8^s1kQTGa+v)ml?~*%nW|?6Xdl)NPCG
zY2Ox8`YuUIwtMO$w+^b*xv`a_;I?+#(ulTgTTQ<yMK$%v?KSk_pEsb|%FjPhZEq2=
z_Pp(V4Vpr~fqQD`BX@B8((d~mAx680UT#qKW?wz-3yz$1XMWL&=<pZG^y~N~|MoY2
zcNxDG#&6f19C1pKx4vy>f<a-rw#)3nL+`pv_W!A(Q;O_%OKBTL8H#chy{IIPCUB33
zK537%+pFk-qVTVzbeN*8imog2-z)X{D_X7SqN3_KQZGr-B1NYSdXyt$Yr9Ws&r$T9
zqW>yt{<YMbtSCp(Lq+w!k$S@wZBukZQSJRwZ-Am~gO2T&vAG|RI?0L_D>|d7%0a33
zwxSOeeXpooQOqG}F-6fnMWu=w9F}?`3|f9z#&%Ol0=|_xsfyMp`b|-dBT_F#(Go@Z
ziX3vKUOPn}DLSg?rJ@$!u|@iKGPbXcI<LGkMG@c2UPmh0uIN9C0*^|)fr{2Dx}?Y>
zPwI73v{cbqMOBZnUeqxe+s8(oW6M)ip(yqT+3Pe#-za*dsNr#`H%ieCMSm&^IwAGa
z6s=QKY!Lh?W9$B-)Ly3OoFd1cq_n-FPZS+f^h#07lhR_kqWy{<D{6E~>Wx<Pg+Ya<
zWNdX#OPxWA)+_p5k>?qy*TbOAXFc@giq0!?%4a>6c2G1|(GQAVD{6ICTD)IL92@uW
zL`fpgNu4o@zEpHuQQh-WFI~|FMVA$MU66V`6|GQoL6LKT)az)_gaR4caVc3*$SQnI
zv??^OlyH4np?T?r>o*lO`&qUvQ1pkQM!!huM~W^g3N13F-N;i)QMi7-vL3DnUX*r|
z6`fR6>sKiqqbN_2`)^V@RMBBY&X=S#P0>C@cEwWK$Dj|3Wo)mMB;|LhvsKYQiaK4E
z()EhU6t(?BN>?emtEkl#DP5}QhN7ldrF6bQIag(D4X;Vbhl+|6g_KC?2a3)q3b-z%
zlN9}=$oqzrj#hM3QT3Zr`ktag23@}?V;lG%sgt9~_D|W?ThW(_DikH(l6qSdJyX>2
zwv?_@RH~@W9VuO@=#D{dcV%o#?n<5OikjS$ZJCOGR}}G=l+ID~i=uk>rSyG8XBE|c
zAf*!({iw+6Axje;%Gka)>bxu5N~PTpMF$l*mPu)<qP>bNkEFDhqAwJ^RFw2s>V2l@
zsiF=~SUTZ}jP0RO=hzbdmUdZ+ZYzp?Dy54Rl_-jSCZ+Qf6)S4+kCbL8`dLx%b19u}
z(B|hdHvbn=GC|P^MV|ka(vgb3Q>2wk>0m_%6jgmGr2`awrO2j2N_#5WVNhX(jIHY{
zsk2$p--_D5meMtf9!Odl50%oDx}sZ>umvbw^aiiJ!NxX9VeT8eWFUeCDnrECmP)-a
zEMV-zFLHFTg%G@N3pFv3Da?*&KGRU9ADOl=+1L@4FvT(X*%QrV>c@1L37MWT6){EI
z6S-9(8qd^~X*biSO!t^hF@;nivU4CB!qkRoGgAiBRi<1f9|xirOnsP|RV7-<G>PeF
zroBwARf!%jb!G~8BwD~UjOiz)txOh2qU(;}fpLzMj#)-JW>F)|Ht<`<48AAvnIp`H
zPcg#@BC0MBjm1Lop7<2^JHZTCf>F-U3bq<1A3KxDHUsk*KR2*~ai@W?)d&w8IF0e7
zf!{FxVc;XiD+V@nA-rnfD8^d`?qIxa;Gcxp(Upc0<VuZy8I5U-j}2T$xJn~&F}J-!
z(4eIa*ch_z8Z}vPhDNdX#zRIy0(W$91NunCW7R1yv)mw6a+wtmt}fdrN^wVbqiMT4
zbha$eV)0QF_@G-22%%ac*BIWx51pVEX4HTnSb(3^Ad>~FJRpK94L#sJ%R*_G<3aih
zrQyPV87{;&HOX+HVYm>_*M!Ar?*%n*oF@ch9McY_=}gy|a+qp)5#3|z&J^TLw1}x6
z(~nF#(<?8ii)Wddc@x>yA{y&W($-AdnWiw6FzsgYu0?vcm{OQ(`w%T)>dkbl7U?Zz
z`Y+Q-rf46MzGfQ5)ZCY73)48J%S=0%+<l3zGbJ+B@+11#mwM^WluHCN@rEzNz%2Cf
zqhdDp@Pqc249y=O^`Z$V7zd8FT88F}IeozwZ~B3^Wv=Ff@HY6PpFg<6T#WLENGbvY
zNq?3<c#%R2+#EpjbUy{EktEMlc;pY!Bui#l2sOJ+B7-?oz!t~W1{ad_S3aF=#ayi~
zrqm`cCu>7B5)Q@`cJR11xLf9FPF4}j!^lA-Nq(DpO7^Fp)BtijkK^*i+5X^3oHv~K
z=rHPO9z{?6)+cE4#-ELt#{-BU)nom@XVp}w#vzO~#^L03#4f(CyIq2tn2VbNVHqsP
zs2~WVVp9Tn&Z|%1FQ=4IzrMI72;xX$czhiM3B(C?ARTnmMz^xjrHw~jveA`|1Nt`r
zZ!Bv>gP9cqPPnECxLI@x$JhtDHp1Ko8|%@4bZr<G)~Ae;gJ2j+^@+GS0wOUW0vwQ@
z{~CtY0WZkndGNvUb)hOoMuI2ysSiQeJ`DU&3j<deY1L<zHr(jblBIRUlyK5BEE?7Y
zNAwK=A8Mbh+N<J>Cg6hpbx26jdcsQ6)7}thXIZIrVMQNw4~35aS0z%0C@T*5Z78&`
zpf=SU5^58y+@m(mbdOpOwhqCyVbBy-BYkazQ9(0nW}VoWf%tH60mP(mNX2c9Xnp4f
zQ$ztF<Y!ngrNSwa+FI3zw=CIOxZx49c{+TNQ%GDgmC`V%F*xJ!NT|o@Z$YXlN;OzI
z%tjbP%ntEPBs9e2NXn;k1k}fnC~`6&0updh6je_}Kn#v<Oezf<5}j=f;kc|Jw7>?@
z<iW_NeIp38tfd`cOzT=Yu8iZ&h-od-elZ=vT7-tQea|$azVAnq7qX7Q&P|{-ZsU=K
zH3k1wb!eiWM?xdZI<1%0-1Lls=CBSoM38&>XQC#ai-JH{kEKx%W?4_Oqg+xg(OgOE
z*<S=6iGu35t1$$Sq!+KL5bnVNU(ukb2cyg0(R6BTF!jHSChr@hcef_c(sqNJm}3<T
zEtE*hMlH$A>qaw|ynSHfs-`rx)Y6b9qJ2|{g01*|Q)mI(@av}J;&Z%Djg}o+sA;>y
z+}=Z)fgd$S@p0gT8=KLAv;)6x2EAZ67Vty`#M0i}O?y5nmTChNz?mcy;%G(BX%5v%
z(u7TY@%seuBMEPQyxI~1U=J2_s<bC=6iaFD7Xz-AJzBJBF+YYZ_TZ*iXo{C(=>E^K
z@|g24k2$8t4_c7NoPT-DvGTaj%Huxv*u=6=I-~Ha;JP+6eLu9M*h}7`<NIMec;SOs
zx|H`@dEWmo&-+c!lUtJK{r~d3pCb>%vgS|=4p@0UV2-tGD;n#8|8Y-Ev3Tq)XpHAu
zK@ZCj&DoreBbbmt^LK>Z1>?Hbbe<gHt=W=PLb0$pgkiOK&@8!havO_1SJQY(0&x6W
z6k4uUTTO#GPRPa0y=h)9w4p)%9z&<0a~#<pl@5=Z4v(_KCUDgBb@X4p@}#dk>1$*>
z`O5nrUwApeDyN~A<I>4-)5&pjRLc@*RL2cZR2b1+YYDFAz)nbKC#16>ZOGY)|8Yi5
z^;8C(@NpaPw4Bna@$dt%L0ekDr!c-PZG%%dt}PvURO>{UJ!Kwx#&!9yEp7Dy?V%2)
zy#wyJg6Tke2*tdPbm=~CPdjKpC#Z%&9iRc77<7R8u1W?soY?{T;;$W~qE|<$*rp?N
zz}HDo9rE!tJI&_>(FpSCxaNv+wf~hu+cX~sB~mnJaL{Dh92H4W1J1HZ5XQHo(9fE7
zXAQfvR(5AiJ2IDcnB9rOW-GkF)G3J$;&T|#nYL5YMCgU-lW8#XJA$v}0;Oj{TZo1W
zoEcy2+7;}vq9bkP3uca}opW@-Dn|=C(Y`1!Lo>2kV1`y;gjQe`T7eN7IeC*QC^XYh
zh-HbChC(AMD&FLw&>Rohs_{JPD#sI&1l`S%El!dH`Lheuv=qsK6sdu@Q)9T*<QHK<
z3Js;`{}1J&)le>)VO=!Cx~Rg^Fg+1MslzuT!LV)=m9b3Hy3w98lIoX2v0Rd|TvD;v
z<05*nk;Din8ZMc!T>Ag96kEkoY{pWI@m*-C6suTVh<T|{Z$>me*t|OgTmCTn_QzS>
z!JleT=40>=zJPu3dUvQtja_BqplLkYJs=*g;L;v20SEMgWK8Y}b)f{IC*`RGH}-^%
zaNVq3=UOnv^df~DX44I`X;&|31GliW7qqq9(wZC3Ivn4Q-dEjwLmiUP)5+I-uioOV
z-GH0;{dli8#KLXf^uG8{A8>=)#uH|of%st`+EGJONfzIScF!GNhd#KeFYS~&e3kiP
zQeS9lxx=3&mCtD>8*vA}>I<#muK5DFFb<q;#9cE3UHj5G-=ZJgqj$ANZ)|MET`dCB
zhk?J#jD5Bb)pPVNUmszl8;i?(kY|VfhUGY3P{wuWh-v-7nH1>$<`?<={t!g9sb(#0
z1Wor{dIK27$)lhu1@*E&jJ4d;0<FE@qhsui&OOW>0CV6kbF$<4@%|U-(?h}sKS`zB
zJ;a<;nw*D~5AztX!}3&^YAL1nt`WwPf#kT9PRg87^l&Z33!~{Mx;c<OE=p<k6GrpL
zMH+oclxqFV`=t~IrO}hDl-{-^4Ivn0_EeHatE!B`Q~g32yA7j8vwMOjSU8$u+dPOI
zl+m}KazMJqJE%;)gJ!1DYr9=K_`(BxHysk;F%OciA!Cvr^Zfc^{wO-C9-9*uKb+Q3
z;Jak-#9SnX@ClD70AGxv1@nYoIYAgPnx61aXdXCzYNXeRFXj!Vo}OUPVEPdIn-{DP
z4jv3OiFrS`+2>nN_TQQ-rjG%CM>YL_<N3kR-SU*Sn30vIv}QODPTwh&r#NW{JpljV
zo6HwC4WelChd=;4=PB~TxS@1RJ~yxb<Y9EJB($Yf!mnG)bGl47_k`NG^gZyPTC7T&
z1D<=2?&9Z^NxI8@u>3u!2QRETe1XYBX$D^Kb<By!q4ZVo0>2tc@407qcPJ!U%4zFc
zZHaPB8wPEmoFBdBhZ?c5{f&H<o14*nIOVXMJ`9b?P8be#EiY-|y;+$raq)0y3>Ew(
z)s+g@5%kGfVV*Lz&{*yjv<BZ8RAAN!+W)W2i7grd-ZmhxbObcuk}g4CY%vlvuFz@b
z<7|ITW|mqej)dm609q|G9^*L4A4$6z!2FbZIufe0LJa4r9yc2|NLhby<VwF$5JrEe
zn2nogQE}y~Q4neiHd;GQoj)%jjjR1JXDH2A_-Jrvt+>$;%B2w@ts+}oK#8XRW7yn=
zN?LzWRM66kwpg^@Ja-g;#mXRK3?$P%O6zcxr3$@xjG5{?ma^esPG!<Gnq&tWot!6U
zs(JAj0`=rzF8|~hqM&i~61KzmaWIiS0qKnO<NpnuEspfkF+PdQ$I<7lBeon*lj3CF
zCUi#9aGlIOQ!t)Blbx{o1n5U!U}LzbhNmXLWctW5UgWPQ(TVCpC$I5`K^0suk<K|6
z$`OU;kHr(|G;z_o@jnC<nhXE4kV?h4Nif;sN(+}xCT}$QaOF?a0Bks!vg68^cLXUU
zR~k|SUpNty=(Fe6WV-lWvE~#CS>w6)!;hxWi(I28vElT$DYSJ-GK~&8&0Ic)Ve6@6
zsNtBYlnggcQi{b*+N>W-Hg2Yko0ZL>X=LMucc#(6t7F^gRJh{?E^6QlE<CWu`&4-1
zS6q0Z;|DN}hGeWJV_e?s$q!F|0Pz-Y%8N1L;2AI)ybrFJ0g+)Dy+uvYM}&#NB3%p-
zYv}*SU&K&w7Q>*O7!I?=2skK4LYWw46DmgA3=(5(vc*`NpT#(flNfJlD<)WGh>4c3
z#U#spG1)d)OtDQBQ*Bp@X}0IYbUQoozFlkaf!!1_!)}k5X?I)9vJVim?fZ%h`(MRe
zhnpE<o@1(*>$p)Yaoi%7I{rpwiCFI3P3SIhBFkkam7j|&*FVKd%~xb;?}(LdRRmU_
zBUZad3v^Evt83H~*)^_+)gBHayXHG$P0f#}+%494P7!N8_fT0Z)_T_x>%6;AIbE!)
z)l96fHG#@?V!cnsWwF86O|18AMP<3z=ock6_ze&n{o9Bo{_Vt8|Jh=j{~__Y|0A)Z
z_CB$*_Ag>r?LWotfLmfu;5o53@S4a8DiQnYoD|>GDHi+d{w@v#pAtKR^Tpxd`{LW+
zSK>&$*CIFMmiRv8xi}j7Lga;&h#$fpi{s%>#EFdh*Tv!b{}Cta-w~%8ToI=ueio-9
zUWzjfABoeAd_;bvn>Z8MQk;#768Ta6#ks~Q;%ws?;$-7b#D(bTqM*rGaiPg-QP^~e
zC}?^}{M>AhC~S6F6g4jp7h`@BMKNXK*A}<L#aMT7silJ`Zuv@FYSmbrY}Hi!(Yme3
zxYGJdakcdoaqX=XQS#Q0;(A;QaU<@8xEgm-+={;@ZYQh|ciQBMyKk3^d+m;hzuuWH
z9=x+eJZ#@yly<l*$~tuv4?3lb$BFLZN#{WEcjt5BX_txOS(o|ZpDw4x^RBPOi=+ba
zEa{FYPiZDzrYsT_-E{G)+i4KpCkzDW(HCrb&H_uXNnqD&H`w>~hAO@LfkU4Vu<JwT
zL*H0%>gNW|{YFEzekZ|Yz*uk{=mA<9-JFANL-q7F;GVu7YNS60k9WI+=ev8rYj9QY
g9<p5YKDc%}6kF(T;Hx`nmn_-|DX{P$@j%D_1A)v`8vp<R

delta 10093
zcmZXY34Bh+7QpA^OCqw~$c8ME5Rs5btPwPch_y)Uu_pF?-&$HqE4(V<CONj2P^BnE
zTeQ)}s|ZDirG24Pi%<;`$_pyqIrnD9*Vo_o``!7^oO9-!*=N4IGW)zT`_I?C3k&r1
z?`FYGz3F>da7#aCd{dWZL8*R!X_g-Oo~xdjkzu4E%QEzVOI`J^tJ7Y~GxXidT=kpF
zGvI+f>0en;sl)qOV58^Iw}#$$1%LC6Z@&++z(K!jd>5|Ff||PLsx1Ax6|VYMt1|Sr
zSGwxmGtKmRbvk>snRi^10nYlGHCglx)%lxed{eTr^c|~Q^+#D5M!GE9O#O2*^!Ayq
z`u^&)Gn)CItJCRgGxX#vSKWSHhVGW*s&AmQ2wnB4^%;8QT35YbeFk{yJvL<N2iLpm
z4>n|gw?21c7JZ#R<ZrI=ZS@iJsgH(0Up?ibj~=(FZ8fb?6t~GkuiO+y<>gzw^_b1w
z4f4@nY!1@%Hk;*~>uOkf>qB$7j&-?7)%guuJoTDe8d>FrSmoMNdHGf!y?jfzYU;gJ
z*0g`CDIGzQ>)U<w2_L6b>-_dHN5N%D+lCWu+qRazDHpx<sO_HmxKEl;F8h;rRoQDq
zti5!5szI~q8??t$pRj}Dmv-Oo2sO&R^ydbx%k|UaKIO<+cfqIahz@_6Okc;H{2gq3
zcN^aq#<%A#jyUCF9evxb1cSnKZMRv2m)>)?tp9yQCluLzCZ!z|EmV}J=xH@^G(mg3
z^qG64-RFw#DGJ{!rDGL+tms!o0iR2~!HU)@x}>PqKB?DB(F#Q;4XW5DV@upGwHGNm
zqUf2T)(52CEJgbi-B;B33#m6w(KbcDDXRCS)ElB`ok2&xl(BhyC3TV&eW2(EMKume
zy^f0BQS_~%=ZazuNsHNv_A7dzsL5feH{PJthh=OxlqB$LsWVj3dPP4e^87~Xr6^jd
z=#(OdJgJwYXtAR26#b>B%@MXpKO$p0VB~q`l`D$)R@OQ}(RM{Q6$O1K^@b_hpy)q}
zyz-@9Z$+yVomN!yDC<QZm9Z@`@*G>fq8Ex{|1E2stLO_w6^bIimwFQw?ND?}QSdRT
zH(b$1MI{D7fsCzBfz-}abViZmaVhPr=v_re6;&x}TPQ8&Df&{;Lq$zbNWDplJ~gQL
zgp95JNvV^j=tD)975V%i_4*o=d)iB1t*A(m(<#<tX%|KBDf+jfmx|h*mKJYR6UW9i
zJW`UVGg4==qMeFvD{4?A_0ko6r09yG+GnL+KSgU4omJ#~PU>|vX!<!B+xJqkrkGXu
zm}pmQ9x35^X0dtbh3hvIwK^}$mMi*MQPT@jx>(UAMU5_+(%$4L<zl#ARGkmkgDy$C
zS&9l3)%{UQCo9TV<nfb~j!|@2k@J6~bhx7ZitI|Hbf7`+l*rhslqBV{)cIJ^e-(AR
zBBdWHDp!>Fvy|p2`dv}Gt5Uj3(Qk@cUX#*g2JO2hV~hMnO5Ra)QBml1DScDX8AXA=
zO6g2R#}(E2O-d&z`c6@;8&W!2(IJC=y&+>8c2nx?Q)GKfmJLv}Q_%}W$)!?ntD+~0
zy55%3jfx&9>TpL&vlZPj$o+R2+sfai&aaAE+?8b+iY_aP_(Mt;DY~GjVVRV^q3E=t
zdiSJshN1#RwePbu;l7ORTO-e_!u^4?8>Q%=BFAzm9jfSaMV1OF?XT!lMSm&k^-$_<
zQS?|*mq#p}{z%4l-^g=p34cnvEJe2!#XgqO4-{Qj)clE*E>%>bsL6k&bfKd2ib5)-
zbe=)El`^(~r&2Oq(J@6n&!lvMq9cm5=TbUS(N~IU{w1YD6zx@H^Fm7dDcWIB@e3JS
z&nl^ttLRTfonK1ndPVmnWyeFcG+S3xDhb<w!WFOZmsi-#Mk&1a3jbpuf(5EW#J4Tg
zdSQ5uu^->a(bX10A<e+<jOhk0V;o^%0U@@u1#h&mBbvb!$F!Ge0aF>%VWu!Uq9;sa
zn3~%YZDpFqbe-ulCVzXPyG(<aLTeBq(<r8kOu0<%HHfY;^<?sOAbOu^Akzt^Y$iJg
zqVr50nA~a-Eo6F~DUWG6(^ID7Os#4XSsaOGGQ~4}&h!@3J*Kaj!X3d2pE$xYScVIo
zAfo0{(M)8B(P9~X=>+rPeT;U7c93iI)e>jwwk-zcGj28T1>+6_V_gWpGH@>AF$2F~
zEHSWx@v?!Du7p<%oXB{?z#WV?4ZOv8%fMha3f0+-f*wvpe+}@^Ze*-9u!QB`v)o&Q
zhBo4*QQAi%1%dN5YCvB+WF#c;KnHiAmnt5uMQwk}9fnFSx8jktWcds!?&@I_ZTEoJ
zElagntcV6*boYc%%5~=)LnnO43F_iPPY8ykxW$u9mgaat1Z5(<V6-Je8t(HV{S0ZC
z@i)T^?BGp?8HQm77J0)5kcLBiAO_Mgo0Ab(L<tV|0Z*)38$vLPsSnc`rWH)~wTTLt
z;+U#xLj#=0)T$2AKBg&kNP3rPJ5z8SqU%h9nCjFeJ)J3q=`_=FCcC;sN9&Sad!}bh
zvzeOvlJqmCiA<$TTbb(l5?x^$z~tdaw2G-aQz6q5KdR*=Qyx=mKcdG>Q<)<DiFPoJ
z^@kRg1zG@B^rrzhHx(RhwFR0V?n?zfyx|XZEQ>W?gpLq^{sG_ti!nL?q9_RpBK@}l
zpf)MA!Q4O^r?M1qAxXZeP!RylNtVpAP%3txNd}8%gDp;}2d*R;tb97zip5$grqm-Z
zh4sLNgd;J99XzZD9+oAVlT`#uFe;5C$sMVt<N*2%4J5ZqI4(bYI{<u$^T!c?H<oHz
zLeW#bjR{)3@@FHKa04Pp_2?k*&6xu(9KsZ%9Zt2sv5QajuuE_ki*a)hWWq{}4u&vF
zHYbqh{KgdiO6oGI*AKS_LmWvAk1vBEfjFT)q(i1@lWAp>DQ&zOkWHqtaln8kPzTGK
zQe)l<1t(nJ0^BW`6ppbDGPUvMI@r{Z8kDJx#p1@)qvRk2#!!9+=0-pi21bAb(i=d-
zM)hehjt0<YS_7zwQBmN70~<rIWwkcdta7zB!K%vD+Bl<1lJ~@va0oU{A{&4s`h|io
zmCsV;HF16maK(W7B&1+{U=0trFMb{hNtQKQ4_5R=k4CT<vU0jp2T`Xu;Ma|yjU`K)
zW4h1MrYrYuIH(~RT<=J2%hLL?c_?lOgO-qu^yCPmghtlvbz)-#;={oevanY;t?O)r
zNC-opP;kewArNKB*82awL+s7Q=V;-EcgW$9@k8!S;_Gw3AJdwFvu(D!SY*0?y8*2X
z=V)*<M<Pc{QI;VxlpKV~#6~E@k+krrqibR^f1D#|#^wAo5Y?sR_@f9I0mzo4EoiDX
z!qt%wV~f>+RF8vwQwXxGrG;e7hPAZI8M~qp|5~JFW=4U#!)a0f&=eBTr!f&l6N8nF
zp`jU<F>2eQNN}kML}FzWG{x2tre00#7Y(iPLy8*dKMij@6AeMI9v?(Qm}NbUsd7lU
z?#5iniKI%tiH2IZyBP%Hm`Dg`QwOYSMuL-(<hFNnXph^Pl8Y~zQz%aC+r0&}#c@$2
zSl)sr<VLNR*|QtX-sGhP8*^IHfc_9gn?dK65DmHbMoVY|Tkt?j+N`%?85LT#X^l+F
zZRWxs)e8KnFq$_CU)<D+wyJG-pcV9oop_E1DlnE-?M~VaqGKsHECHNJGChta`=ZuR
zizF@B)DOQ+0DqG3wt&~#LLltIbKR=#iJQh!D+a}Yn`M{Q+_YF0Ll(Pmb1byPD=~Ci
z+GFK$&)+=mF+IN7hCJ^1o5wv?9`{;#+{+$YSoTV16kZM7*a5s@FMAvc`;{||qI}i3
z{idr~ZOPSsYgf1_mKt5&8tTFUD@O;+ruA$`O*`-pZ&VbEM_+?xSVZT)<&frV_WmJE
zNT4-(h@FMt#`fSwOl!0)sWigk)-;eV@t|1_(-v+_-@}^5K?dTq*C?>VT0Pb4)y+DL
zxdUhz&US#>csYi)MdvuO&yx=GOow^wum$9qzViO&>xlGqMEaT#Pri=))7KFzU-#l^
zuIEcP`KFtEvt5}9)UJHP7aoc?d(Y8q*iq^1sB|`}135eT4`)==Q1ze_KI{NKmIBR%
zn;(cx5^25`V0<F&1_d}Zk#;}Ib)%jwFn2%W+`OL%8XU)$EI!Ud7wod%_P#o-j?;Ea
z`(#%d*yHB$oS#U`={Tl!r=}HX3B0-a<s^eU6mliO7@tIL3;$VD;j5Yot!gSXYT^oK
zk)s#Az!OfG(VXBqn!*XPYe{9s-QbTDa(==zAxmk3Rf$mF@Qf`wLVY^&26Ti*_-!XT
zuGV#=y_jzi_<cucg6XrUjNPDr5~O0cUL;tYM3bYc3keP-N#);?pbP$s+HE;a9XdS`
zn!{=COF!({6YTLtS6b_*&0eK)?$y&)y}G;`9hnQdP*6MyxSxoE`mqb`k48c5uC$3*
z^<9zK<RUEZPE9Vtz}KnGMOJMtGTVISRh!|gRezr~4bNhH4>CM!Wq8&!Bzx|xTRp(r
zQY;%(tQzD&h2d7yrWntqP?L)Pzey#p%O<(?fIc|96E$vjkH5F&g4vb}W=I#zkS<t-
zbioYiycv>z3Wan@hIC1VWRELo&`4s$)f_IFAzk|akld4HNS%`*&+JrRY~2S!EG4FG
z0KU}+0w@=4UK>mJeD=j(`#?h~>?sS==JMe7g?PA(tNOxp_!*%eb;8fMsUPh_$^D=K
zTs4cXa#2^fX6CM$3NihmK~6tN#@+p)1Khv|{UOnELu+l^|8QCoO@KZFXdc|)JC>h$
zvAw~YMH4RKi{{+{5DPbXOYp=04x}Y@)41$RH4xt!2&tA^T98?vA-}~l&lfkR(yF+{
zr@kNdN`;oBMUS8AySI~#xP^ODp*@tEca*bJ!P!QXnw`)ymA3vigP^IURBQUm##WSS
z5tu#}0$k@?ZwIA(qJ)udEUxZLo*f1omQ#7^7$>A74j&B8q(Jv2zP>LTOeb<F-O-HP
z@bNUFrF8Zi#>o@Gfdlz#Fif%BriQ7IZN+Wc>#US+W8M&01b56?6i;`3ygZOvyLc!y
z`VZVUl*Z|g>N|W4*x~b`Fvn6xS7XEN%3<WTjP}xf6Z!F3hG!?yGQTm59wKEl{t1)#
zAu^m^9c9`e^9U-#wBdBQETelcNgLXVGA+%l>-un-SobJ8RWsaU$6-`xI<OV@=x8jS
zL>-cwMlSBr%Tc)?W#a;LPhNl)45zz!Qabp-T^x}P-QfYZk<Kb(lpgQ^`{AjHJY)~d
zA&VbJGbv~US(KYo#gvwFs{--qM9^$RIbVH(F=7&EwxXN{gImGHbZzm&{E>7^Eyv)I
z5CRoEhkbG6NILy13<vJ^r>uv(LUY6P$q?YE&V&jq8VP+Y4{7r^JLe%y9qtaNBTDBX
z&Kw1;;ZHvD{BUy`g?wrh1j1t;D}Rg|L#NJT^QK_T-p9P|%{!;%F`c}*{h%JM8Vz2Q
zi&fp{fM-V2!Tp$eln#Dhd_Ec)!V{}1pJ4JB8j2@;cJlz>7<x=R!M$VXuJ;Ik9|PSj
zm9!10iDn}zarjtBgi5~in$J68V=FMbwbERg9^>fsR7vkiW7reMK?BQEnz2?>^eKKY
z4w}I;eu4F*#BDr1RiBxAPF*x+{xh18Ru<1NYdq}-&&@HuI3DWQh!^-^JT&2y4nIF^
zGl56*1#g(X&i22k?tOtXCO~UjQKi*2BQmy^QxkZaRGDwU#}l9yE5w*Hy2@NS<%7Wq
zs&LRm2%~>t%(BfB!G$w>Cqg4z@ls3Tz6&sB5@!eFzA-dp;gi6Fwc;j0BTkL@XeQa>
za_VXN8;8upD4|&xO$p7v<`$t1;IRuuzX?=>p}cT1B!h+L;Y5oq-HeQ3N}WReU}uhF
zuemhBcGNC8NY0e2&F_PTHl$;0-N`ZZC<vZPS7aNEp9(W*52M}IpZ{ubw$z|Ik@1Rt
zK9yd?HL&e88V?8a*r2)QVnZ2Yi#<1uUe*p+YdQ>~=hb9R9Pz|-m_;knxT?RLN&Bjk
zac`l!QVm=_gLXS7>K_U%083`juHvNi=06oEG$;NuVkjk3XTmItGtF9h;M75*4rhMO
z24dta>KbQ0_993jx!RBl_~eP0N$;N0S#<n6qxWnI*@Z{l9~aN2tGWwao(-oz&8DSG
zlDX8^F6P8B4BO8kLl>MphdRTRJ1NEDDs4WTLN>0ZjjNT-p}Az^ig)Hx!`(1(9wi!n
z#ECmT<)jw&eS;ED+{=j<I=%^W=^<y_#Ef=%vnPK%`6k3$ys2M|7KhA-N#K2O&3uRo
zTi924i+&<Zq=|I;trsK21u+tw#VAM;qv35a1`dj`P%g&VG!o-&(!>Otbz-8;c`?c2
zBqm!D#T3hYG1YQFOtX}U>9!$ahV4)>(>7bovOOba+u4aZcJ0MnyV+u%-5&9V-EHxv
zeV~|cpDGsE|0ota+*l}<I1Uwy9XE;h9k+@Vjz3X)U95EOEizr>#A??Clzt*syWJ9N
zG(WLg>m=5=*AQ8?7Kv<+<|4~usL1wgC~`cnifk_jk>lM-p!Z@*KNILPTdeijLurXv
zTc@sASEmQ1^TfKkt;G7e(<$93*848JA~yKBi}il(D19zA`bUcm{zJsZfDYpQfFzL{
z@V3|za7b(os1V!g?H4=hT@atvyCrr8mWo|LXT)bgzlc4-*TvrYg<@a*60yI*WpN<n
zgxC>sN_-VkCJu&Fi9-!vio>C$;+xP)k=N*{I1+YUd>8gm<cB{JM;A8!ReaU>ra0F4
zjwonyRUD5vFA5_55`~c!;&@YEaU#lH6h^fbC!?dqiRi)Nhh{0_WV89=ShIJ<>E`pq
znHE#T=@x56QOlL$Ov^*!Y^yz@sMQrw-1?k2A9Gw3$CQf;ZA!)YSPyZjt%LZnZI!sx
zu9-O2uB9kxpC}eyZogApX@6Dx{91~*`dWdw7S~4n5_e2oi7OO0;(rl06V`}Z9r8tK
z$LHd9(l_Exr+MOTr<LN5&YeYBmn-64x31!Dw{-EKyN4)$JxEl%envd(F+)7+u}u8g
z<D_`p^QCyw>zsJh>yD^QX(gVftPsz7>*9Iulj236>BB@--&FCk-&-L1&jg$PpMhmS
z9k3lR2<!%ig3UnMA5vq%VURo295e|W2Ni<TkSX9i%nMwGPXgDp+u)Yo0krfF!9Bea
sYK`avo+I{v*GT$%e$;Bw_uz)@P-3Bfj<4;azr$ASf)vO&NIcB(e+{c(RR910

diff --git a/target/scala-2.12/classes/exu/exu_div_new_1bit_fullshortq$$anon$3.class b/target/scala-2.12/classes/exu/exu_div_new_1bit_fullshortq$$anon$3.class
index 8bfdd96357c241c023ab92283bab067800a211f6..81fdd94f68ab771bd7f065992993252a343e2786 100644
GIT binary patch
delta 128
zcmZn^YZTk?g>AASyVztdcJ;}5K-wKhuLjaBK>7ucJ_w{$Im9Oa1JX%A+L}Xs@_Zm&
z0i^E$>8%{<jOvpYaENaH#9_&(DaXLYD9@nGsK8*usK^k?sKk)RsLasLsKT(CQI+95
SqZ-3!Ms-FpM!Cr$Tx$VoSRr-*

delta 128
zcmZn^YZTk?g^f{e@&XRg$z1H}lfSTuO?C&;hU{XKTYz*PkUj{cR|DyPK>7ucw&qZu
ztjZxaxdKQh0qLzkdOnBP=1&}!jGD3xT#RxI%8c?1HjD}kp^S<Qd5lU7?TpF{s~J@o
U&NHeqd}dT*6l0W~9Ky900Bgk|cmMzZ

diff --git a/target/scala-2.12/classes/exu/exu_div_new_1bit_fullshortq.class b/target/scala-2.12/classes/exu/exu_div_new_1bit_fullshortq.class
index c61d94e4eedd81bf3a4e57cb2700a0dd6ef65068..473e3d97b1bd904d32d81e3b3ca03ac5a9efa010 100644
GIT binary patch
delta 8644
zcmY+Ic|cXg9>@7{0m0>R*k!qw9RxuH5oEuhfFQC7D2jktJ<~+6Qp*xG1Q%RjuKomb
zD-}yk3YQjp=KAcJY44TMVvCvCD@)sV-*3)2gTp`Pe7-Z^`OVC4mUH3VgAVT=bm;zZ
z6<f91$ZS`)F!LHCLweuZU}RBiwD*ZMEns1JtyX$|tUe!F%h_=qe{NNuaqBt%OMO;t
z;Cx$sHn(y1ZMQ-e>sFuH%*yJlM)oCZfowL<YK2^8x6#U?HyPQUjV(~fMr^V|B|AmW
zYBmM=^QQV-zS+twokkYY(W1Uz?r4E}mf2}#v$q)8=bbIk#^!9X0&9QD3Rbp}o*gW5
zs};7e<6Eul#x^6Hv8{zYvE9gi-qr%!*pls5*0saP0(P{p)SX6lct;EDWNACC?Ea^X
z?30}>><@ZB{B#T3@Qjf;J<|evSlcsI_)kZ0U^%<o*@0aO^V$_53MLBRHOZQA*z3an
z-Zeo8S9WT5AX~m$Z{x6+7vza{E-ZLY3Kwqdj{^hQ;yrz#U6`@Uon72B?5@?=l`0E&
z_DGi$^+;E~R_m~L+FjeCy=kJ<m0j4Y56k@Qe64iTv(q*B?b!wm>Yrm8<m_@`^#|P9
zh<#C7LG8ZA{xt*lM`{Jh`{!t|Z+|@p4>t0EG?DrP>J&ZMi38!hn$I;(^JP7s3MLkK
z(1Tf@PtoZMor-nca!}Ot_EAK)o|gr^?rctXrq=y}-Vk<KtMO#+FQ}b)vJwI71e_P(
z_@eH~7O-5vaRGk{Nb1qe3k38CxFsO^knWi+pi96t0fC2gPqlz80(u2_9ML_c0@e$7
zQ-IS^-IF8WNdd15_)9?YOS*ZXfI|Xq3mEaT?wKQCuYfNE1ihkrY6Ltb;C%s}uj-yj
z0yYS^AYkAz-IFVzNx%sKe+x)?O*bzRa9F_i0%HEDdma?<tbpqRf{*K-S^--Hd?3K<
zb=^}YpiRJA0tTJXJ>vze5O7k!9RaB)b@QVFjtKZcz{pd&XRd(f1bitV<h1UYAz+(;
z4+RW8qkGB)v<tW>VDMSplP92Az$qQt|D{{f1Ux3-sDK{@#Gcd5bprMYxFI0)4c&8(
zfb9Z465#!B-BTfe3AiL+$a&q9FQ7%hX$?Hu-&Ah~50)n2F#$&f{3syyf^M!8uus4Z
z0ikc{o_hpr7x0k)?~A&pLI4wRNx+axx+h;ii-6Mt;BDQLE?}{MmjwJIAnrf9d7gm%
z0=^Ou_FvsIQ@{=ZR|NRHqkAR`unKrvfbm`3GeN*g0cQl*Ue@pY1-+rH;<DPnfpPJy
zEdG>5(R-5ZX<7Uvi}AgEHvN;!!+v|WG?Zn&-)9MBR#|*0i{uX^+ge$CDvMDcO15TM
zyf2HWk0e{8EdC>l&?}N{kq~>XNOLiNELj?4aatB$pGdaZvUp7v%BPZTrYw%g!s#=~
zRwavrvar1>*~(?HSBT43rMVP-F8O!L;zwEJUXyH{vbZS=%NLT3$>O>!lCDd(R#|)^
zi?}Z(+X`9q3gK`=n#+<KlK*X4gnT8{ER@B+WnucCWUH6ODOq@aE!iHB#W7hpe<RuM
zk;P$IINsE42{)y=JTFT5;el_ZNM*9<lEv?`nE0L4W``_(kVVcd$<`r@Z)A~iTe7vw
z;tN@f`Chl(|GhMqk3}h;OY9F)q$XLsCyU4*CEF9SxFn0<pCsD?S-c?&zn>-BJXxHS
zg~u<FZI%$5ev#&4{8h5dki{Wc4ERm5O_jv~NwohixhBbCk1T$ZMZq6Zo9(jrUKZJZ
zO18~Hoc&XpO8Q@trA-#sWRdu{WLqtZE3z1QN3uOBi_4PO7y)-}8y}a&MM+=~$m)@P
z>YPycGr-;XV4bbp=0rc`ZjkH#(NDe7PYtn?owfZ`Pe0{gFFPyysr~)boqnp+L2kFZ
zpZZlO3>zTNZQB63&Fy|_oa5cP5Zpux%xp%F2fpJ7;W)+#JkiC8=n+nZoL=O#hSPVP
z&T)zwNMt{d=mAbyoc3^P<n%eGW1Ip85&gz#I;Vs|M4g--;`AP;ZcgrliEeT#;S@QT
zXdS12a5~Rv7bnLdM4xfW=42j1w4Bp4PRBWICW16|O7HT*BqJ5N8i^KgD&o|`sg=_$
zPH%9Eb|!LgCYsG@ET=9`OF3QR^ctr?h3I!87_WAcs8Hb+UidJlUQRD?@^B&gmQyLG
z;Vwk$InCnqCa2w;oLq^na?0W4?@FOd)zDQOD^%>@I0a9*LMlvGOWfS3WQK~x9A^=_
zW2+miG%QjEVM93h;yPa#=xnqx*x0}Vn>bi#a~~|i3GT2M4Ib3hNAA>ay&A&XgZh7h
z7gi8KyIRP2;V-=K5~p}iq9L9{4V>~hJ<q9y2sW!tPIK(UZ#+T$kA@qjc!B!A1b2MY
z3u?fG$A^Lke(MF(1<x2Nc)lpg^%g}Q_=?6ueV_pC{2&BZ`amG&`N1-b^o1N$Ow`qW
zUzlQ8s3ap)(6od6Ae__$t~li2i7`}sn;ODG?D3=E3$ei$qUn`kf+_av6>s}1SZ9I=
zXvecAsKKdbaK|JwHHgG%W*CDPctMvL!qCB==rc2fqJ@)>Kb1Yksf^PhPU|>*%jp~u
z#A2pDxS?$T4SY%fl_qjp%jrQ*CpqmTg3)*?0Fp2vkP4JQ3NnvVejtR>5Y!+~22!Lq
z0wDm8aQc(eSDaW7WzRbZ{2+Bx0r=sFQ1GJ6bSDun2?l2@Ng#S52)qnwiWzAi`C?2c
z45fL*TBxaCFt}iF7<r;Y!3UR*pn7UIgxn*v-844=6jHeum`#hEh9_dcZ&L`kP}yX)
zjG$bzR)&B=4$83!TS6d)Y97Sf!zk|hFdE8LUX)I|RE)xtl&d-p7l)V^?fqZ1Z>V&$
zpYH<cib)HduJ~%9UkwEX$A!~4yGMc%((%$Lbr^P76+)v;S4L~TOv*c{tiEn}odsb$
zZHY8x5e5#Y30@0>TFAgpqbMAWYzQ$Ahik$i)nHMAwZ_-N!4)jHjHl%F;nb-G1Bbz*
zWGL49dTAIWP~msOAc6{OwN5Nbrq)Sq1f)^%A}!b}5#VZPaj|JrcPFP6S`g1jsN!<B
zCfgz*fy*<zSvaS|YFz5aJRHh-!38y<XIA79haiKTHLAO=h9~pI;qVwY|E{*?^fe!r
zA8x4tC)^qZ?vRPG(`afJqG+0#JQ<ac#q;2c<<T^;ENv6*ji#l}qJ+*Uq1L_8;7qDi
zo1*;)+DK!0Qxm38nhax=@q9Ubu`w71Qw`;=62@skYs0~47^g(=d73aJ20S4fmu6AW
z$uZPLwvwVPdA5?IrJ_5Ac2hRrZxK{GRx5NI3Gt*#wXE{RBc-oL(@3=eZ9hNU5K7CM
zjmJmAd_#_sq1g*#A%)Z=RVkfv?sAk-n&(n1q(QDW<cK)%f$?;%e6?LSo=?>m17g4q
z*Tzw-JY}5PYEW0-*3H9Padb}dF|ZQ+jNNh{`8?tJ(DJc3fzq&www+;ulCDPS@1DTN
z5J8oC#=PUf)lfiZm~J&Q7R1y13Z#GqJYWD?M^P>d=(O@<*FRtZei{$aR9U4Zx<Hw#
zt;OWgkc?lCrl<!;)6p!{Cf^lJ`=U_W1PKY?4Mn_%XnN7iw1gOnXwhgn{qSr8T|32n
znZk{U^vP*Vq%|(la&{*e>~UBkEmsMxhI*BhXn~x@KmnBTqveYkY2bhh$3QMr;_)#w
z*h<Ak8*HWGtet~O%uIqhn92uM3)9dg8LDin9ksiDbu!#*s8$O3?86B%cpEb&rO;8V
zrW2~(MJxqk>8___sB2+|U!>6NYVb}9Y=xOTZWx|QrDV^fqpW^e24%oN{3{j04EHLD
z+U=E@MvHtO?>!J#r$MRh0|T@n{FX++9?+sBrNbe^T)N9d6d!ye15ATD`*zD*oR|S2
zhB|&V^RHH&;;yalu?$L8ow$mwXMj5?nvQ;ddqN$?SRj!KtE3ZGhiw+xGj%jde$fr=
z>!%K{S}1Gtuq2b}=h2Y(FNM4H^YH0Rm<A0z>j7xaqRtx>MN55yV$@RKz>jMk)Z=$q
zzzj>2FzvEgg8td`30=Zt`{MUwA&XeOT8hU(7WpRd!T95$abPhl6|I(Pt(I!7?#-rF
zOZ!?m;rVPxB6EY5mZkI^QTNPJ{49iyO??FnrrJV&DGkT&9M$^>S3$U*e+KVNqU}~Y
zmcDJ4To{bk$J6(2dnw&~ttDW@eFYF?Sf<R^f-h6%YQdM`om|S!GP+MFQWBcS(y|8>
z(P4kTkiMVGl!aP<Z<SLF(Sto+98Z<Ym8ib%?NP~tL|D!j!xv}fK@&7-m*kEd7=VNG
zX}C?wqgwWwus)wUZQ`ThAE_p#LJM>wACh4OKXZP#eJm}=3fc`k2?T-Kf;8dI2~ds0
z3TbvUZ6n4N&<}>yg>;<<@C0-hfC-xUan?gLQ})$7HuF>Di_Y{}!&`;4;VIwVSW`-0
z>5g2wL7M53R5xTZC0XsXSt(FE#YsgXmy~yBDM?!kz!4W0QrXKzv?_i@Bws6pQRr7p
z9jN0ADS{aMwOAXjnkG9um`5XRE+SubiB{o&*NSK!ua=NmU9ZYw2sEsuOJ5z*N@b!p
zq?P=)9_0*8rPR<=LeqY%6h`niG5AR-b*e78x?I0fY*<AXRESnMp_DxSW!h9M*jPr=
zI0;4>Rx4%N!mQ@Yr`^_6I8p2AY8k~RpDSPg0L&<trs9Y+JvX!~qr`46*QPAbv4{8Z
zcm<d@l|u%sK}$LPGG2qX`Ra**j)YdcQ%?J#mC~)|y;aHA7Q2-OZ^F(BaHAjc&sRXU
zVZGwPkFhs8PX-HYz~aeJYG{`V2jH2>kOU0xOopol)V?I%_}3H&2IRMIf?+e?OLX(V
zX6@GBS_x(<)Nh)pRdmiaD{fjhFqM{}Lmc1^?d0;GV^pYJC}^EZ_hyF@uU%B9r@~ND
z$#-ukQc>!>po1Uw64C|Qt*m~^J7}`~FQyKBXBr*WPQ`~eGofb{-NK#xV&*rYI=)Wr
z2ZOisfIRtY+lg&eFbB5aUsW{0r?6}~y|&^${@RAN)%4nqmHf2>yZLJ;4yb_&JXAxs
zMqLg4jWMW}*7<A=WW#P8TuY8UM`zYTSy-dV#uLmo5fEWh4UskshTFUeQQ$xy#|#(&
zk3tOez(}|Wv9{q5XIllMY}+8-_AHFH{ex0Iny&46FvhT#u7M9B+0F<lcA1cB*9&O_
zf*{@TV@Puv1Q|{}U@@MCOy>~DQlen2at6k^<UzKZp%HT2euZ53QW)?4BIJ1lLB2;f
zOz=#H0<XtmqSs|899j)UL%)Gy?_E&h69=U}*)Ykc3d(#A5O+g`&oP+da}g?idtj=c
z7fkb;1ylUyz;wSQP;EL7HRf8FZk`D<%nRTi^A4El9|`yR*TH@MJ#fE&<9jf}{{xui
ze-j=Eco=2}9Dz9jH(*x4*DyD*5$b~7VP5b%P#<E1hLE>me#i}YDAWn+Ljz%P=rDLZ
zw2I#M!IH4|VCk^auq*;#X~b|?7C9T1NA9Hed00NY6`G>$VMX*y^!^-HjMxv&F*9LB
z%sOap9Qh`+#5zKA>?nHw0W0I;p(U;cR*u>Mt495o-hacY_+zj-{ufv^ItW%L%z!ls
zNbi%dCUF_GCLX2tRcIY^4i=C36xJo#!g~6RupwzVv?aX&?MeRwmK+P#<XYI6yb?Ag
zcLS!}2b)u)p(EV^Vms4&VM|5~JeAQ5TQjb}HcLEgx2%C3maDLnF4ku<H^8pUFJX69
lI_$~X2&SXgR>Bzrrkm*J&Cs>9t4_2+2`oJ7wiZqf{67{>BfbCt

delta 8216
zcmZvgd0bW1x4>CkKybJmWD>XxS7rnOL6GqRipU_7Afkvk^fU(q-_Ie-FokedJXbe3
zYYv#26qaR{nZvWx)P7|)*kD#RSlRHJEZ$n@uowP5pZCw*-@Vq_Yp=cb-fJIt_o&0W
zM;$tTSqZ7?uPd#Prmk9LRadSus*$Ukwe~c&eyfe@*fo0lZFjqLt=@NEr?*dcx0dyK
z|DEpk;SGBKpYB#|(feT=n;}!}*l5MyY}E?G)elsw`o3yZAG0>YNY!qW6$;e0O;)va
zlTl6C+zjK?Gn=h2Q5`4f_pbK4tknv&s%IPh9&WR$huVy4;g)7tuU_9`g$?Sgtyb8$
zahp}`+G<qyY-@&AHDbFJwy3AJTh&*$8`a4>nqiyz^$x3gXNOT;y|Y<eveT#r>}rOc
zYWps$dSI7P&D-4!d(^jgTj42n`W~zLUwe$I(^JjrU)b(=st8PK=3X!L$X-SD+#9a-
zN?DeS1nnN`KYQ~v@>I|4Gpoz?ksY*CFIThmPy_d;AWhnz-Q71Ha8s}B593}clbbsK
zfE@qAfjpE$drh}?QG1%!_f#*p(~MpR7vgWr!72Fr%fSWsJL~CI{LS3!q1GL7QwJZ4
z#NLEMjSt9rACAD@(8G23yZ`Wf{GHtCrp6r6*GA(g(#f6f>ggk)NR#%PRQqQrQnJf>
zh9Wf|byuy=kR8z%-BjG&Z$2tDH<-dZ$V2@NFLhQ&rbglFbxlSyxjjoW5tT5lW4g%X
z_?)!MW?IH{is?R6Ql~zGq9*^H-F<iUN2aJ_((6p715CG>%+E`^YNoABH<;XCkand^
z>zOVwIUOgv*yA#`<yxPje2wXErsNl;*M&^SnC>wReo5NRVrpmlf@$ChX*Y>!8`Jw5
z!OJqXF)vH&4NRArdY_cq9HvI5(@g&`rMx0XEMj_|=_jV>SEb!-rh^(?dsW63cuLyT
zFl}f0fXVYUX;;S7!t@qXpVQKA6jKw^>r7otsjtfsk7%^}bs5{wtcf`zZRRjN&GZ#h
z&{=6WnP~^phfD*`NxO2UjZ9aV`kt3|xf<1<m$99ZnvMS>P12YaGaYC8g(>!e98t@3
zi0KYf@Eg)@3e!%ekC?pPB)iNvWoW9_r>k(4sozEEE03v}>8wUBZ@H^*iR_5dnI2_&
zk?B{aA(!QdxlD(dzV0T9jl52MOIq(@y2<2yMQSUUtW4LKj8~;yKGO=Ob4<3^q@9K7
zF{YO^`s|vFE$(e;UB`5U=^Lide@nY*OuLyrX7YJQ+Kpq{#Pl|k^SjcnfN7;h&%Ueg
zshethot~Kb8xiW*>-u95p&n$q&s6lD)b3&Wm1)!sT}zKJ`TD-QAE9QxFUMJ#zG6!L
zKx)@AeaaN~q0~Of^gdJMM^f9s^fpuQO{ra^(e9fvHouRhrk?36ljkQ=JCo@ZCgoG9
zoyznAlhbEXTg7yg$@Z4imNT_$bnTXmt?+YcvzzG`rkvYSyM^g4Q^prkt1^Abl=P+4
zu3`FwX~<Vn+r)H3Be)}Dd;E^HxyBUqwUjMndXvfb8>y{hI>Y4gt<*lubdt&WJE@(*
z^gNT}UDC$hm9age_37ln_i|hr(*dSGnMVI0?RGK!%rx>xscmEWj>&RQYBw@{!8GhA
z(oX(K#`dw+r`TeDmg5?k-eZdRMQWEYU1bXVRcaS7y}@MqU#XqT^g5IKZ&Eu$qn6)f
zY{uWEW-`+;re1$Y?Rcgmk~aP+m1CIpGyTC-@RzjP$@CLb_I;^s)#&tn8Cv?^Qq#h8
zn<?=hsa?f%lPRW4YL_!zm$WGyy0x1gW4a<q3<SpcJ$OMwaSxz7K2dAScBgyL&A`&>
zJ$RxA``NKUO%HbVpo2XdRQBNE9_;GDQU|u(*Mq-nD9pV$)*Zdr?p_a$aO{?bi_M5?
zO{a%=#}Psi@r@TQP7o^oas&@iNHoj|X*JP&q6<XN5!v@f`hh5mD6%(F1JT1oCyDkG
z{Xz6OQ9>W2fIdk7O*E0HgJ=uUU847hBKjh^^+lRaR6?|uXdTgKL>Gzt`XM>?Lz+O8
zP1H)XjObk?NY|Fs--yEdBrGCIG9s-ZT0ry$Q74guGt!Sl!-=Atk(Lt8BzlGD0MVaB
zw}}!JoFrG9<X?!QT0!BnL|cizC%Qp2$OXyW1!)FRDbYTn^+dObE)n_nM{??qRD}fP
zn(H>g3URtWq(YS@adkyWjfTa9(-Gao8dq3hSg7<7^`YP+*7-nhXQPe5#s=ow41onU
z55Yo_?*@;;T5aG*ZaCF>H=N4L9bIe?neLD(GTc$1l0en0t|E#PB<$yb^cztgQM?CI
zGf_R!StMu^-+5q+CK2vQ4LWcYk9fi)l$;s>?&5n-m?(Mj0Lk;DD91~R+{Fo<2Y5q)
zVZM?qU@R_anKy)DFQ0k@BgN@qD8A<nW|%KreQ@}EQSSp$*zELyhr~2*2ohl?FpGoU
z@Pv5N1S3VA4=%I77xL}bDPHzBMXfJ{LyI`?i*bgD5I=|)!G7Q-YW*NsjQ0bhDD(#h
zalj8kgi4CfNO76S+aF~P{zzp+8AR)d786|{I!0t0fC0vepaAq87=VJ=C=la_b`z~7
zx*h-_FjQpvgR4-?IP^YA^UOF|f*EPK8C+qQC{Dn1b(%5do6Qg)zDB8dgUB=xydY(B
z0jdWFgD0ejjwIyA1EHU|Zw6n{F%SkAQWZaed*dUbgTVuP!6G&Tb*4aY!QRjw9VY3C
z!QJCgGgv=Va}q$oUXCzl<9?@#)6rns9Hfn{&}67A*G(&fKtT)K4qwq61ktFOE%3SY
z7VATxA8I}ef*3;@9@n0D(v<#MJT4B=&)NIGY+qmLYCq2f(iC6ad79#*JAXMCou`RU
zBXK1iF<?Z#8mEO~C#r(LSwsioM3xYU!x^%Aro~={fKhmQQk6x*JP3#14uKkRF&LLx
z6N;PtYcTkUHKCAVuqc80z}unFA1ss(AMx5CoXjH3VekkV6zkEv7zPO_#P5i36xQey
zSd>hCf|_thL-8Wr*@<xIZ)b6_Y0(ZbQIqb(BLb?ZyHD@7L_h*{&(W|@qUSZgIFH{T
zC?~;X&7((F#0w4s4G-oEbzf@k(fG<BSWL!$YNLt1rLat5>sW9S+atjZGDPeIT-xPG
zTxJI4v=TBYoj#&G3Ky2CAEfpu+~!P7=HwC_eIp8-u~(`u(S9%tfGis7D^f5`hAd?i
zZKRKA2!y_<!Q55CaNQ}T*)UuQr*-;@plI-b5n^c;I<1JtDMlzM`eu(%lJrz`MB`?U
zptBZ^+Tps;F$UtXSE^@~juiH~_oFdJ8-Pd8BsK)&VH+V%#lSp6wqnuE3uAGAvz0Mg
zPucQd?y{9Q-R5d6q+z+x@(?}*ydekgR`+Sk(NA7LG}wu?L(tbKWrQ}W&jCKPqr{Ix
z@Q&mPb0wIJ9S_ctO9}4|EthVzuULtv*N~^AYhM1-I*(!qM`d@$yyBt1As_EC7C%2x
z5RdE2f52frISdfiI4l=A|Bt(T@o79np@S+t&H2iBeJ3i0LNXNS3qCRw(nZTq^nWl4
zb2(Z+0tpFNVhYKB6gIdnJspNZ+%nuulQ^G%g{P<|Pepp3x&pyogeBq@72yt0=@3h3
z(T^p9m*|xUi$uR+cqzxwwek^`G%U9Zhd~aE6Q_n@sN)nDJ=AfEvwjE0iOeLZg-Qym
z2F44QWT>*8=%_yjtCC@wVWLt<YY#=R&=^0Fl!DiABHm7|2B|3!3)PegZ6EB!7b&>5
zYSEPf+hGd%4H0KjG0{`-8f%YF9}Dyrf2Tr-VXBg-*R0Gm+~8?6yIHJCgHqcWz4Q?N
zNJD2cbT3KiaLh0pE12}+jXk}x^x49vWwsb?fgr;iD$n$|%~9O+{XJ>H`W<Y+Y<+0~
zH<aUYWc`LYB02*SQCRiBZJQ%nGVr|2!6>P~_2xO|h+7$$wOUb<iTYX$i9Qs1^tED7
zCQN`j%6fqC%fkJtQxrY*b&63>eH~rZT9_+-$O6@{L<!Lg%@X0Cjqm6Z^6evj8V*^=
zT3IO`0a<95Pr>+$V<RBL&>%-O=%X6+QPZ+<R0EH45*M=}361OZlr-S`p*=ed^mO=&
zy0Op~wS`oW28oW5n(ch*4HWC?8SEN^$F62LxQL7#G+nAhk}^pgDu995o2R>7s>~s`
z;hRT67)pzE8^7VW+W|#*zuzwePn0jzr+KR!-w5g0UR)Uko}wTJ-)NlCUMRVch~F8Q
ze;+Y57aC!?UK4kXgkGX=9!9uac|=dxa#5FuyRe+Xp!aCGGFA`$P99#vM*W@NIUM((
z5l;)P8^Nsa!E&)XAF81dFWO8r4Jd<f;ZsEAyZ~aLiLS6oSn|Oc53!c9Cb};^!kHeg
zMscqY<Hg*1iAkmSRJP?{)osFJs2#i}OsF<nlTx6~Cc5&`d}k@T#~eG0p3LBEj^fcm
zl+7%_SE5HjDHHjladym#Q3Mr1v<Ra~Ws>Z~(OgW|lSL3GRu$sz-7dmUn;#2tgf`Kd
z5*$`p3}!<!R(LJ0W@WS<S2KP8VaCLmBJ}86f-}EFBnL(dQ!&n`ZPf22sQA5DYV%7`
zQC$LqMSCeEikD0D2(^9l5CLOwzLiRuzCSBz7xfyA!qNJazNP3&F2YCHm0?mBKPYpg
z#k%T>PiQu6ot<S!r^evCN;#5$8G4ykj$ddEWpc$BZVapzUFCQtR%7P1Em*DO>GR$y
z!veNtELQZz;+e6KZCIzc)8+LN&J~aW>qT(|lp0zd5cU%1Dj*3qimnQ{W!S909bV$^
zaS#ZbsdOh8@GDbas?clx_Db+WVRwBQUximjD6aZ6FdlQ$Dz9y;eqZUs3x#?a5!Ufo
zEnAg%y*!;Aj~|<@_~9NazXGrqsVxgy>57+Nzd*0W+T-1dYyHo1)GFSYfETq*@up$E
z!lMdnZyS|ks()I1ZTcsImvgV&2jAB=(NYDoV2k*>3eV0~Q8p2qZQ>9$+l6g4HakQm
zH9JKIHM>NwN!aWW)!2xMldxo*n}m=5u}RQh_|`zS=u-pE$LnigWJrU_#shq9@ZSkG
z)evr@LWIpF7z7Rw2^M@8AA!Np3DIyDVr)Yp*0u_U*tS5N?Rki|{R@T~hGORDV$E)c
zVTKPO$<7GLcA1c3cLP#;4TLnuk0I5m52QPFg2i|iGMs}TQ;CEu<s1xm$%PTFh6c!X
z{T)WSl|qi&b1=$%AmqAtK%PfB<a<5_1)kSo^nhw89Pk|!dF_Q_?;%j)oeiblRWQc;
z2yzFMd!K{~?<+9QrxPkoo-p1t11e0jpvv?(O!U17)qXWl<u?^-{1(7uzg;lJKLV!u
z*TOXaPI$<_;XSDF{{W`@--Q_g|AL1DUVxbacVK$Jw=mn>0CNJ}pf>Owm>Xn-x}a-N
zA9M%i1v|mqU^6TZ4ueO7tFV0tmV~?q4Pj?tX*fVb_#jvsF%zDM*p2N)cw*2RSRQ2$
zjZrUR`#CfYJ`7FKQ=u_>9W*t>T!JTK9ib^U4%@$=c}P4wIb;$v$L)d@asS5lA6OB8
z5?03l1}laRgp~=CVO4^__H|g5_ynv@JdW)xSUv0lEFShLtWC0ob@*|xK4}?jNO~4p
zlD>hB$+4g&*MK#71#C+0fXyinfk=&l)^rDmZA-raTP)GA)$$~4v)qL38S$_qV>Rr|
zxCOhg&hE+F08eFp1$(p7VPDoJFde_W0?rxmZ_=mN;77p@AN;&Ix(50mk5~(bdjB8W
CSzkf`

diff --git a/target/scala-2.12/classes/exu/exu_div_new_2bit_fullshortq$$anon$4.class b/target/scala-2.12/classes/exu/exu_div_new_2bit_fullshortq$$anon$4.class
index be51f8b4a13f82e948111ae71ac3bbacf53561d0..df64ff3215bca8f61671aed25315786977d9b94e 100644
GIT binary patch
delta 126
zcmZn^YZTk?g>7;kyVztdcJ;}tfwVi2egULgfV3)y*yMviItfVs1Jd(>v^9tN<U2sR
zf<v8g)8qvlHjJBrr0C{P9F~lls~ET#S2HLxu3@lYT+0y3xQ-!@aXmvj;|7M+j2juw
TGj3w|%($6RjB(ZE5U#ZV{p}~%

delta 130
zcmZn^YZTk?g^h9L<OLj}leyT{8CQW>?(FK5zp#l-ZUNGU>|&D-0_i*;{SQd52GZ6X
z>XTmp=?WmN${{v+E09j&5ZnBT!;(>R1p^o3N(N=dRSY(as~JKW*D&NUu4QOvT*t7Q
XaXrI%#tjUg88<SDF|L>#!nGCvo$M&5

diff --git a/target/scala-2.12/classes/exu/exu_div_new_2bit_fullshortq.class b/target/scala-2.12/classes/exu/exu_div_new_2bit_fullshortq.class
index 6cf445c946426a670fafab9e208f71a0a3a9c62e..bfb8f684bc5e9c03299a3407c0057b80e62508ef 100644
GIT binary patch
delta 8929
zcmZvgcU)D+^1zwBfP!*8S2|n}kalU83!+F9M68Gv3l^F_yGZi#(q5u@i6LFhK~@tZ
zYGT(|5;aX@M<XhV#u~)}7-NZ1Of)9`X3k+3^7;J!Is4t6ncdmh*>dmt<Bsc(J8sT+
z4-Tq5-z&%O8T?kM)8D5rd_dm{?Hf6dc(?Y=olksI`_5iK?Dipj*J|H1wH&I|TD4q#
zQf^eAD=$++D~zi1LcOe9SOzE5u!?eZFgL1)E6U)MI)s<Qd9?w*7u1&*mBU?CSzHcH
z>PqdK^bzrK{5q-=KBn&@{I*d)SW*t5YUfYN)$FB4^}r`(U{MDyEr$s8Dt@i%^OfZg
zr?y{KuKuvxsD8ezOwC_mR5O>CL4tZ@dAa)br$%+giZbY?HmxXE{Xa9R{L?bE?@FT@
z^;wzv6P9~ED}xlZ-^y}GRWGd^3v1OYt0L5itHL$%R#&g;uF)|3=B)Ej2do~Tk*BJx
z2~>}-w#ZsPq#+wU)zURdNE_B<HP<(-bydx4sXvlZt)x{g1>1Ahd8&qW{WU6R);qXP
zNPO1Qh#4C^)mPS&^wRnwt^ObUezjo{eur!vf!{S7-_STh9r<|#5?L(%d~`E8ZyJwO
zy3I{}WfS>4WMhPSVpEvb=B^qy6Kz;yR)=mTPf2gyX7ZqLtGjw-b8<7qZ4vakq*IbY
zw(8PU)HYr4R=?Vsp^-)H{Dt1DyIS~#7;~wl3zEFP6w+KtA4)ndsr@#g*RPq#*V1k7
z>OLX)aJx`RmGqLN9g-eMvh5HSGbOE;bVE|eS3<8yQl+GelDxkry^ODgYpPZ!Cu=0R
zd?WhmFR4t@eo64H&`Xo_vZSvhHA#y5PFR#k+92s?jZ8a*Z^b)>_A*I7N%Gkxq$4Gj
zOFALR_`T2@An7eh2PCoGLa&FU|4RB=qbs|GZ}EGC_AE&oCEb)1wpZv)khEOVB}u;f
zgx)Ag3niVD)M3BS%a-)EMqBm^-wX$YPP(L5Bz+_4cS&6i3X4)npG*2hQh1fnn<#08
zq|1`bhlJi}jb1w>e5;ib<*?8hDCr$ZRg&y~5PBJsUX}E%q(3Aj91#}JNZKUnmLy9x
z=?$qCzJ03I18dyXI!S&<Nr&3<BymZnB$<v0y&OsJN;)LT;keN2DQUK(?<75HCi0C&
zf3`;0ZI*OfQp5=%oh0cqNmnHKpA>pyBrTG3T2jYap*Kj<dy)=obgx$UmU&8O&yloK
z(ql>8P7A$%OWGpoj-<#Rh2CUID<xf()ai`S8!KtCMtjZ(-(1g<4qY9C&e9cQx)7m$
zdX^4;qKA_DofB<KB;A$N^SqEQlysw+hBo*0!3CjnMN*fGqODBQc}dYf3F#b3wUR<F
z3F(WHswH*0ETqp!Iv~lbj-(lN!na*oon~yhBJ3te+9ApLs*sM8v{{njnvjl=v{up+
zNrSEny%mz0B=xN)X=%Oi?T%I_-!dA6UAd%2NlA@D`o5$(N%1#?^i4_UBt`u!q_ZWR
zloWDPNMF!s`Ay-Q|1UyPDrvtY&s#z|RnksL%55Pnmb6`x(;XolD`}G?c2`JqC9Tou
z#9iTA&aXmexuge@`rH%Jk0jlel>VELs*)Ncb-yp9?@78WDei%g&XsglBWM!7z1k#n
zPDl!VDB7Nv^n)b7--UFRq<xY+{t(hBlD?DF;gOIQN!li<?PHSK9t+<-*XopS@TagF
zE@`!-$C3s<5qirc-Ivt+FCkql>6WA(e+%h{lIkTTJ|$`4Q{mest&YAev_Z4o!Z#$H
z5yT@v;wvp!(}JCuRQOK|9&SOiK`NBA;NBK=x0ec&HRKEIq1jJvbdbWr7W}dW+c-*v
zycXOjv7(KX4{O0yE%>Mfv)fAD$`<^s1+$!_!Xgd%9w+H)nzIxx5NP4o2-nf$oCmgp
zFuu1Pc<}K=Pl-MzN@<UDmgq$y_x4EJiG~v0Cz?kT>w;8GG=s>=1!)~oZ=yz`*NK9S
zNV|y&iT)y5N|a<ox<K?ikyi(#FNt!A?h$=R6w?9eIMFns_6pJ(qJBj6L~jxWDM<T>
z@{!<(Hq9l76((#uN79#wJWNPCh=vh8Aev8P>xgueXeN<!N2K*ceUR{XGllI9YP>;>
zdx(l$k^UyCBuaKgx=8c_k+&PtHlh(kzY(cKRyU*?qUl5~?nrBi`V%z}l@WDzN7_$R
zfCN`H7d|1prr~+Q8yb3gpz6yWs5%@8?r4n*2p?#8jPMT)+j&ALV}R_&`*^}z(1F)@
zLbQ{MT^uvoO=KOoqZhmk!J0Dn!hZks!hTO7L73KP^2WyJys<Hd=q}N_L{UCShlr*S
zIryMSv}V#1k+1RrSN>lgh=5qW+6VBp!msN^pf5awwE{nI=WBgooM5xLh3B<m<|o?8
ztkw^*!G#C-Lob7iGJr40pc%UGdH#@w?Z^CK9Jc541u@{uZ+n7s8%H~^vqO!%PB0OS
ze0L|bG)haOZfWE*1JKg=|5zIN;{X`t5TbZH+~t-)us}F}EfDfy8^00=UHDr;*z27@
zaO9RC2;qBzz>OCLK`8%|XbH6?bVfQ&Z6!n<IwP$m>PK{q=yf7<Fw#z<T%zAQqwPDv
z*nLDWM8a-9A{fVeK%%9=5D0t80asp&%qN8iFWQDcDD3Cf5J-drd~yg(F&tDn^DB|y
z!_#BI1#5wNc)UX)*-+IibI*#{?wI4S)xq|y!|S769o{fOm6Ag74MUw+vhe4}LSZ!4
z2J5xHVGxhCS$f}h`eWZ!N&#O!9G3*DI6mI<u;B$=+$S75+E<zE7HC}(&DDFsKYd0+
zRfPqHQ{#b_&ajI)7KotM3SK$_*YmIix?w9Ol@$wHgf2X<_wz~wj3(X3ngb4i_=|29
z5DA_5%18*{`H>i}lqm4y^CH0me&FdOIuHroaD-ougm^4o%LX%_lMF6!q@p`&=0$<0
zp<3}L$7~28d`KMnvM&l;v6dj3Q>Zx%TVi-&7Yx;{Bn(Hj(ubE$fKYp=R<iW=jnP{B
zNZFpNwJXoIj(oMAhyFZ1MjLaw9u-<XsOIxxAQq1D-7y&cqe@539}}+LtF5~@%J&Sy
ziOlbc!yQ$8TLwqV!70rWZnJ^8A_h95N`fB7->hKcTWmOSEm@8#=~_H#1~2I0To?;(
zhGR;E?$g0oFmd-doN-eur0|n*XqjV!1URloa+wWG$g#aJW|cN@FsiM+JkIxwN5P*q
z@PQigOIPAu<G>3W(o?Zvb}|?ZHJFQ94phWJis6J3*%A?~S;%)^?h}tzCuvce$NISS
zSSNX5JXj1TmF{{l*2iOLPU5=I3Nf^+OGmrG(O}P67l^|K&9^x*U_{RE0@0|Q-@I-o
zm2vu*r@Fv!L#@(7_a`d>*Q8b{<;&AB#5@6lpqAeo1HLB54Xu5tRpK>+ims4qIEAy(
z<~F7)co|MB)@F}RQ$YOqw_Ty9;YTHp+a`m51)g_U>7`k>`&#bRANlldn0{xJRNaxy
z-S9L#od|uoLn4?BXO*;8?Jh}_;={nj9?pu`sfoC%=P=C|_+u0fB!Ysqh-OdD;ZCq&
zy-!OgSc}u+_}}gr$8*Zq=E$5wPqo!J(H&RnyqH^L64oy0H8X!R2|B<9Jwvu8;r6?T
zBLrxhhKEpgl6MR)(vq2ZdNOq8jVZ8#JEWl2+Ek<}B*SH#E^RxwOreU#0yD;f&AoLO
z%2FZ7P$!h?bfr37sZJ>MOT&{fE*;0I=>hHdJ89qsS9oO_Bw>N4K>)9r3T^qabj<O9
z9^h-Zs+h%EIO^(GNgW?MJ@8Pu$_G!O38aBD-_#G<aF-15Mw?hYc3$b=W4MMr;K}OG
zhoz(J8lEXyzPy_b9$1T|S_t*lwnLzyb=q8`9PQ1IW@1`oW`GHm2kG6GW`G}D=kqdf
z`qvdNeHBM#f`W~-A1boI6SS<cp?rXThE3^-zFb#|^rP##GQ4@KUl*ILsVDeCJvU`y
zul0&!ORre-&<CEIiFs3xxu6}7^|-mT<MEeF4C?AW=%;p+*3$t%ePBk>N&b8<aEAuH
z<A#59-0+W%8$`zqqT@+f=yL;JLE5@E=>0Z`e(z^N0M6L0H|~-~3@ZlNm;c-wBh{!R
z>X%s~X1wOZmfqM?qmum(C44#HjR%di_szUuFxZ=F>{~BEBW`X|LCfOitFDokjKGQ3
zO@NLJEzk9VT)4@tePOcUu9(}lzPJ>3X~O!MjQnd~jL2Ojn4;><6Z*k0!>>vgky$Q$
zdp}5pdz68GJi9M=aZ7*ntcefl4|5DnN{$|X?b>a^^9Qe8e{LRt=SdS@!djot4S+bq
zL&Zir)1Mz2fVuV%6GqD}r)+p09#ij0SZtn(gFGF8Z-^&3n78+`akvEoao0r+gh0a+
z48E-|-jpQ+aX<YfYG0s&;ctwqCi`O`3<E~q1@l=s7;&a_6O(b|YjWTYK9P1$#`VAx
z)rB!fx}ZX_?ZzM&V`$qPC|A748e7GiwN(^yKMXaDG{-R9irN8xWiXD{h9?XGl_w2@
zSNX_M=>Gb#=zh&G$l#Sjp}WBiQ(ar^hePq%=b?ns+J)LP4}1erulRCBm&|-UTA*0V
z&LF;H3@*s4<M6e7c??d(Ltk>uY`QS39FD8!fvZqD7Lxdr0vvXJ9wwg$kIjW5gQpTj
z19#_@<H3PH%){O3$?xT&ji)k0pOB|AO`nh_<xc_1Yev9WgO_d@#CMGYC!RMFFBC6a
zG;J2^N5cPbUupN`?tByv9fgzhQC@7GmXGpp-9H~1%gjHqKzn=Uql_T)ARaRs7u%P@
z=f?*{Ks$Tpi?2T|y1p0?imttn$?i2>yL}$Izjz!(@RB@?=hJZz$!FzZ_(v7uD~hIM
zFyncy2h@zA)jBd`LQ_Y)Xgt1SF_PWU54-^_sEom)l{Dj?(^S&(@tDJPa^g$I;>-3k
zs*W9ptB50LOKIet#$jAAIH4p+<;4Z4f`Q54yNQCwLmCe$L@D;-NwE&ZM8~ab;TH;V
zlKA?;`TJuMXyZ8)p-pi<T2CZG8#7-t7B9-fLvgJS6zTmq@z?^0=i$Y=iW6T@09HO%
zR__!*H(p<i%3_5&^25cT@RvqmvIO8Ms)r<iR&4_QUKps4zLz%P=3LBKVdu&F7vTXL
zz_;X~$Ab$ow!8>p>;p`8uj^}onnwPp2&{%cdKS<kYQ`gq@d+GAcENmIF(lguHk(9}
z^G1Fw7dO_-V!X~Yr-GCrnp2Dg@e*<=hzHP)UuvNw2-3Uur4!5*Uvm#8K$amyan}!#
z+=-BmbFG*NLk;1g(f(i1+hD<GC7$}e&f*oqEc}^&!Bs;vJu2u>n>7hfh-mpHnS=*!
z4E_4h_FxPp4{0g*u7MbCos3Bmqqypgou*-+UY?8=*5+Nyn3XoG1s4NP4nN*z3cg#d
zcw(Xt{yb?4-Y8bOdo9?An~yThiaT2S;j(`UzF(}Ecc`oV3~EokVGKgirq5J7)nXMN
zvN7|wrsA;>ODCcQ8@p@XnA%KeeI~^!-qOiHd@g59gG7Uk-cEGg@M-v%wehXfU<AZ*
zr|DS4^8zZm@EuenaN`V!gs%EN&Yb~ckhjc0NjKhhCKic29}7Oe1Q+ArOne<B^SYV%
zD=C>Lm7o}Zl~Iwp<3<UL44u8!&I8ujSzw#pc-U^I!VbG?_zE21Yv=*rz>DxLd;#CV
zZP>}eU>7Td@7YJNo7KV|LtEHuNQHfdXJEf!0~|2a!$JGGP~}tshnx<>VW%hXgR>Qm
zI3I*+{Nv)N@f1{d065m65RNNTpvJ`Dgz3%MaMCp$YTahQDYq&(?H&d{x?h7c9;I;B
z<0+i;N`>=Y94>fwf{Wf8;U}LGxa4bt%f9!a&b$q-_`MHT{pZ59PM6?%;3TLIx&{rw
z&%*WKccC$KFx&_&hMz-Uf}5d7kdMKw(DQI7^fufLI|09j_kerhv**K|a1|beuYxAa
zeRvr07CeY}7ygK-ghvsF;c;Xx{293zo<#lxe?<kt-%*p`X%xz%K41{FoU!O|W{953
z?4y@3h^}OgG5M@b%wpEoI+i(EpJmS0a@NMWftjpdu#VP7EPrKgwj$;cKZtq8zsEdg
z$8TqzU7DCzLKO2%7{R={dNQAG^O<jACi6+0$$YzaW9II6m~WCdGbfK^e#t79yO>|f
zo6JAudn|7<|FlTfDQ!HKZ?jH4`mlf=|HE=43rN4k0yBbGK*m58*t0zg>e&;^87wGs
z7&B!~W5Jp4v%-+fgDkX{3k&O&!oqt!$1J^mW)WFlEHW#dMP*H9(Y^gxOz(PT?YoP`
z_M6Xa{Vgo6{~Q+I{|xIgAciFjn9I6mhqG?kvsq&Hk1T0mG)o@1g{9=QWvMy&uy)6i
VMVK6TOcpJH$za@ZWC_$c{~vwr9f$w`

delta 8904
zcmZvgcU)D+^1zwBfT9S8a)C=P0$%zBREi*o*ifvXB1+R|mtbCA+DkOg7}6~VSxt;+
znmzUwqroV~F2r7<prXcDqNs_+JbyFiunYP8-alu*J2N{wJ6rEvecX2SaohFjAHqJh
z$A=a8J%isGb;?Kdg^%f5seQxe5Lav8oVmoewC{|0#IEz{yHfk6sugfZJ%QiD>V%34
zb$o?`+HOI)R#sv84D0cg<xs1BS6QL%taMPv@Nzh-Ugs5XPJMl01>8}UMHSGbex-er
zJ|RAiUu$*jr}TY-UmNw~#TC#|4f?DCg4OMxRjAuOb5Qe^ltU-=%909*R9~*DfEd+&
zX$4r+WlJm6_DdbqjAiBOQY_CdD~EWs@be1w&@u;=eNnC!eD0ufEZ_UWL5=vb91_*d
zUskBTUplC{UzJ0$dg-ftSgtmF9j1=^x|2pGb@|tc8V$v7_9{0uYk8JN?y9mPKs~<P
zENgv{2CsEj%T^>Ityz)TTwk}+MfF}u{zyx;(pI%@D9>Kyt{PVL)2Oi7ZvQHw@mx(k
zrmt~V-&jrBORI~u`oHkIea%Ar4qls!-xX`$);LTZ{!JJXwOI7c$YyG{ZVXb{7FYF+
zbrkd9wP9-Ax=>AKR2|k6ty$r%4p~o;lHHv36hYBOquQ`OxtU@&2%077q@>`Dx;6!^
zoi3Qv?HkiIGOIzGbgxFWXp`u3iKGjXJT?n$j->gLj!UxNBJBD$6UAD##i;HTn)zFW
zNs6S`ByE%QP?BYvXfaLFYDqUG1#cI2#geKdU6f?nL3ZgoL};p3ryy%3b@*2J>L;mO
z(mqMBQ`n_SdR@|XNslDOekWR#N?If77mb{DiP%bZ3G1bjewO69TWE(%s*qGC$>Dop
zmnG?4Ni~vKwXo|h>EDueXw*<GVvE}&tY46{R?;m=p+5+_v67Zax+KYKudo{-X@R7l
zBsuOAcKs#2r_qLeA~r*fut}5jhNN#L{Vpkfzi3e==^IJEO6v5Zup1}ob4iyac^?pV
zBQ<*KfQapc)F=mq%>YU7OZrig^&w%GF6m84J0<-gsq<mcV!EVtl5R^fA0fNJM?`F2
zX!U?vqgpS?=P22bEKd@bbW)PjF=3Z2=>tgzB-tDnc0DA`ko29TC(T5$QSUF-igxQI
z-H{YlC$!@weJQCylJ8H#Zj_{jl1@o-J|XM|O8QXJL5=R85V2*P6xK5(?UM9VQrA<$
z?w^u2NV+R2{Isx}An7YfS0wqJ5q9~K7HPESjEK$UEZNZ2G4L#1F-{l4)GyA`!B6y9
zQr~kzwph|VNj=UB?E*<Rn`ub1ua7SXn+8eo7lo``(s@adKMU<lNhc(QToT$>B^{CE
zcUfqsORACNQBT_RdJ)@htxh9$Y7p(lO4=r=-4&r7Eor?Z!&RZpm9$dQGf4xl3A@iF
zJ(AR?k+fxvBDT9)onlMBF4|Q{x*;j)hR}W_sa{gtO`&~9(m6>HzX<INNk2&nz9qD;
zXteB>h|Tv`p(&HJPm=p>p`9dYmn7wm(3VKrD#`Ay(B?~8CyCt?+8jwMG^)ENV$1$b
z*esLuP*U&vLi>rNJCf2K2(2pVx}?M=q5V+OWl6CQg?6^2vl_u85!;)OgiW2Kj*o@x
zWl4u5`TQ=lFG$)e$?XrJoha!$Nsdp1wph{@No}8!*78)u_KjAj^#*^6cEcnsm-JN9
zfM>#PsiY=Jz5Wu~MUrky>i%D$oiC|TQo?i67CjfSUDE0p+X4$Tw_EVGq%(qe7)X4h
z1#4R{h)IKgwcx=P^fpL?(iZ%o1&!9yV1kBxo;5Vb$sKH@vZw_&w_qDvX^_`~Yb92;
zk@}%6_;m|DX~F(&rEOIUK4`&AJ87^`L%zpOhML+=D(49_^Q(j_=yA>i+CwO8(r^sn
zW(_|@<bB$M8$U}lo5*O7^aIflqUS_&h`QM$9U*#^$gTs@R-#@+O+>SZVmcsI6HO)h
zi)a;5k^|BWqL+y}Iv{N(Dk8d1w1g<i5$OWaWFikoq!mOtM2$rAi2@a*<3t5S_6pKs
zqP|4ui1re>IpKhhY6BjMSm}haxd=Rk=qS-^MD3iBwh{FvdPwv(k;NHl57BC(|02O@
z&0n$$3U89|6{27lq%B0nL=T9nh@xGQE)q>4GPxqHB+4baPNWhA8Ifv<3W+)xkv=2p
zM|2(uu4^5;yCL4va2O&_bwm9;5<bv`#|R&5*xnsN7(7RI<-OhEUFg7T-67Jhy;Ur;
zw;IPfa9a;}9Rf9D?t$%sG(3sOcYB~;Cld-oG+{O(PcWhI0}`4w;Q<o9L_!-+q>V&9
zi0%>1Ae!h2E_{b4;Ll@z%@gq9!UMcuIu?aKVB{;kV6<Rw?-riZikXj)Q?nC3&>z}!
ze_!ZnXs=}PdFePx)}GJtg;bOu^M%nUFW~c{z>D8;hjwjjt-#6(E%N+e9N6<}KWu3)
zTiWX_?fEo+Y-#^LTH5oc{xHHONHN*m<K_S`LkNE>0199eZwP>R*i3~BHwQv6Y~cd~
zArZFn_W~h-X9t2SKNX1f?-Dr%A?+dROY|qvETYaqNV|wiiGB})V7`(lrX$i-qKO?L
z0KV6IT0&f{^9f}Ben+%u8w?@v1CI`d1lY?b1j9tbJ|&1Zgo7tfi-8VU3(&J-3V~!p
zO|#CJ8Mf6n+h(JUWv9)okuElGJ3)=ojnW#5HZjz~mmdp(kysm~*ZPD)9M)dYec$be
zzH5|1zHAt+w;GP`_B<54qN{s%0%z+QC#!jyOQPAj7yQ3xB-B)zVHgQ(TAZPanPvzh
zX(cbq#c4cfhOQ{ZMHG#NB}`YI*ZsT^1|!M#sTP0@ApWX1^A86<*w53#Ar^k5!jI1n
z$C>IL4*t9*987SKUk-;jEZ*u5-h5^<ZjtHX;KN5ofQR9b;!8nU5Q6#OSd3$D1h`<W
zvk-S9aVScncu_p2>2?yP;*iptmyLxGYdEB2>hiUbntZsF=V)@}#nxFrq%S>R9v7wc
zIYrM1O&uKKbD|&y4)f|LO#NZSS&PRBXYS3`E)MfO192R4yI^;R6|a`gvE`s{Et>HE
z(fwf@mNwT9qQQdpF+Fj>Go!!(J*8=>r2)O7XLdmhxEhWqVS0%BW55ZHP!C?bDF#yc
z7tz?)01I@1qk3kSTEK}1#b9QUtR2+WK_BIN#$dxgEx1n4#9$WVFx7C3r=_5DMluF)
z4A-N!4k}}z8@E`{jkchVD`pDWi+jd_2h`FGd+{m@*f@OJx`SF?6bEKQt&*rGWOW>-
zrxxdiW{F|D`ZR1eC=#qWi^ru>s|Q45M=pqmNVG0!p1WFQwBF~*co=4=Q@ZOZ$n1>s
zQm2&hWvMuH-WdX+j^7^zUQV`aTE|kS#AyvGyFiNJCna1T*QhSI+)gOb%@LiTRQm9p
zU7&~Iq>{%i6Tr6;k2$RL)LOUSA@}M@KBX%z!Ba|#9?1HxIJi?dGy338RVJb*n*{JS
zoK{j>nVhD+wN-jrWKm7PNj-y$ex5Jpqb30qzN;(r;Xa9)yti!a2(fx5|DA}Pol)|e
zJ)OZ=wfU$^#CgiXPPsV=QVr+yaeDK2lE4wp=}Tf`67IkA7@ohrZO-Ee^q9}ne0lS<
zWC$``Kq>7pxIj6H!~&Ov8O6Qyo($a}kUvR6b6P2IQMbCNTU``ZHDpzi44?D&Qn0_^
zZb(_FnDfhux5%z7e?Jvm;WDpEg(NKSMDXXelc23NT*hNiJ4XGxgO{QH|Fx;7Hu#3=
z4sKA-2TjCiW~M?rzOFB{;T_V!gl(EVc%<PfFQGLu(-&;`&@@yw;PIj@n-9|P)--g-
z3EQ29Cwv1f%wDKY)O*iJ2Pdoz)N5tw-~(6qoODdb6~#lJv=JGgppZ5~WhNL=p)D8-
zLY97nP3!@lSS!{~t}Dv0=B<52?6F5ZaQ9v1P8sO;s$$#X7i(^M*RwNlL0na0sb=9J
z7zkIQarfNK0C$uR(r4@{9U<fc*CHL_FZTo^T+<z2`<vrye{+1T*|Fgo4qQ8S$7f>9
z*M#3|y5DQUZ&N1t<CtB0;Rb2MRN~F$#eeCAxoT7r^n0ukm$(+ghF<8YQR)9TBYZ31
zWe1J4?Y(*7Ah33-wQjv>8*yK2_hF+_qNR&l_r!DR@>p<T*z8<y$bp+Yx(`e++z|uY
z(g$ba4vkhnkCA`tgXy@VbflD;c;~(_)Nogc7wfMB-`W>a;2teJAKt$YcyMz+46BI`
z?gujsO-i<&eC@hz!gB|&TVL*-h37~UUcQ>om$D$%@KCYPM)KtcvT$)d#Px!UE128$
zhnL|G@}7jn`bpTy^DJ=S&$4l)-tUi_;R)v3(g!ce@Bt8Lcq(e8SmSmBAc$`!`7=za
zX7$Ga7z$PtT}S>xHm2K3=_&?e%U5K>U0f2?6L2!{B<;YMHC;|2D7!fjMj33I6Xk+;
z*o{`nX10n#;fJDy1C22hZ1sb^VG#Cb!#fWK)!?jz(2RswGiQ9%kU2P0U*3H6P`ty3
zkHCSg&c}h(4#kttSzjuNyuJV(D8unnJp>2rjGIDR7LSKOPkvx9yver@g?Rqj5X{%M
zQ8-C&js{15c@z%LRbK<xqpLDS@6nZ44Z|6A#hEF~ha~>25IdZkhpQ1EZaGkFFe(w`
zKap3B!7d-?;f6Kx`#IRgs7%!dX;dcbgEaEeTqs0+Z7$>+-1L@#eD`Ru<9WmJa&g0n
z)Ph|-9R7ogL%VIO3s5~|1SA?flvkTG;-UOgkI#ep^5&nJ!QPsAD7n-;kVlQg1z@6-
z`tX5a(B7Jv@Fl2a+=RKLj9Ys+S-quO+vlNg6WvVIHh(nc)o(Pk<umi}Ibz})@^F}*
zc)aVA;fd3tdGf?nu6Z&!S<TYhVm=e`?87_Jj4d!_G{>H}6}36`<fZvgg!;OC7-#J%
zTVanWJTni%_;1BH)FY!Ij<3&ya2_@W-`Dd-;gh*)2)I**18}UkgUtqSWq|J88|Rn2
z^J)1wp(O>7&TEOVg*RWAj|=7C5S-sGqjfKKJf;xcFB+|z*ztLV5Y3;<>fJ)<%8SRK
zv6vNSey{{@$=62U0`bM8RL_Dh%@mG~-x`BCru6faf>y2EdB0-Z6<-!$Kbj}C7%x<u
ze9f@~e^QLymJ|wYZV6Vask*8Jl6i1Zt7skgu^ikV(@OA{j~0c$GFXd(F@Ih<7JsVv
zbAQ_EOU!6tU5uN%9#1VC^uw``X$Vq``oWPi4$^QNSB`@rh7cjN{s-PZq4<o%W8SNs
zcyX{$KK&nX#Sl)<20F-I7?1aKxO{(%#}hV!eragiGlJFzSt<C2fe0Qw0VgOzanXf-
zlktLleFC<KY~Ij}MbbVtLnNIRKD^CDa7JZ3#o)`6CgK$mNjIz+g}AwB4MpPa)*i0=
zCgQs}5?7RVSK|xOp1k4kL$FQnNqBZeDW25Eo4-2=PmCx!1<fc-)S_`}Gq&|P6s4GC
zkO4RY>60PB5KXTmx?lKY@I>Lp$&d>%+-?dM7G6k2EZ;^&9Cw%s;dq#6`!r`Nj6&Wp
z6*ZlC+i6&I;RRGA@U7EuxOg^A!=FQmJgF3N`Ic$;TwYcRy&!qp%~BX1GGn=w8?3N0
z!zQaSu-Qt5EmlWhE7-y|=nmWARoDTW;9Ix@J6R}v$BJMV`vi8g6Y#yEEmRv)V2@!s
z{9srEdku}S&w4i0*j2)QyMyqf-7`4QE*cKD+Yg8EUx&jEC*hDIz!AqHII2v9V@?c?
zJH0alYF*Nx&UGsM<oY9=FowcO<5f82RtBftp2HcB6gca_;hf12&YRZ41<z8r=w*SQ
zy_(>X_ZGP9^AXhh&V~lROK>G%JX{UD3fDTm2v<6O0F5Do;Ce_2+z5FMZiXC2J_ff!
z&cp4HJ8&no4(@j94);3Em<zW%sqmoF*U)5cf`?)6!h^66;Bi<L{2q1?{s_;3C*h0W
zY533ZXG8!zix>}oMW8<7V|X61j9Eo?Vh}kAm&0Os9$Ce#qY9W!)FNgZozL1tzsTA~
zS1_CCHOw)36H}sZVEG$!wiGkhxPi<V_aSqg5x12Y;~z1%&JoPmIhVP0ac3S~=Q2}5
z2J=Xm#!QJ_nP=i%W=b+K&*b6ED_O;IH}mTD4)gBzJ(jnacWOBENgadbd(5YMZ|2+m
zKUl71zG=6aUwR<(O&`Ggde}4n9zC#}%KS5iGRKU`EHL9ERuq)6pLOinfd%*M#zK0&
z#6o-i!a8MoFmq-a3(K6q!h89!h+d5>vd?Z7)pst7?q_B({bn*tzcVa0D~iQs&1Uia
yJF(9FXRt2)PqTypkt}h*29}iFmL+Ew!18U27eb8z4~gQ%Fahkh9bOFe?fwtb+7K%M

diff --git a/target/scala-2.12/classes/exu/exu_div_new_3bit_fullshortq$$anon$5.class b/target/scala-2.12/classes/exu/exu_div_new_3bit_fullshortq$$anon$5.class
index 8f45e24a352b4dd55bb6033d19f0d38eba0481fa..a1e1bbf67196497c0a2d421e688457ab6903d815 100644
GIT binary patch
delta 128
zcmZn^YZTk?g>CX`cCpD^?CO(W0BLt1t;!)bxdlik0qKK4dOnc;2c+)+X=@I3M$gF$
zI7BB`09jr@mJOpfh`;$0hb5z?69X5MGlMdd3xf@lD?=!g8$%wGJ3~8@2g7P6PloeM
SUJRd^ycxxqoF<2GtpxzBt0NWw

delta 132
zcmZn^YZTk?g^kf+@&XRg$z1H}jE-QIJCNlBX0@=ZPyWItHu)fsHe?r@{0~Uy0cmRv
z^~tM&bOn%p0i?GAX;luf&7U|d88z)0xR@Lml$jhEY?z!FLYbTy@|av0+L>G#Rx`OV
UoM&=p_{`+ND8^(zIfQF1010*@+yDRo

diff --git a/target/scala-2.12/classes/exu/exu_div_new_3bit_fullshortq.class b/target/scala-2.12/classes/exu/exu_div_new_3bit_fullshortq.class
index 6b389f264b78432935694a10f1d19ecf21c2ea14..b91dea05f42037d10380048295ac0e49ecebd354 100644
GIT binary patch
delta 10131
zcmZXYd0da#_rRU|M1*=$A*EzXMMOl4in7E|2+=ww*+M3}RF+a^zBEs|W0{4qjIo!|
zkfnzBGS(l>V621hn3?aGG3GmbXEEP%?$f=WkJs;?=Xu|A&OP_s?cDo3Z>_O?YmM#x
z(kuuvsx!M(9LxGehoFl6%i<j%)oAoiDLyyiGtKB>(6d%NCzKNZB%UkQ5xbVrbFX*~
z<iyv-GxJ?yw!YM;-e7NRU0(=OjIJ9>joeN4#>EYV;yr0&A<Qs-*jNggM&71Um}R)U
zR|<2DPw+X<2!Fp6N{nmbIrRhLm-s9*j1TGAWivgG;d7TUY70HT#piBg$w#F|@HTtH
zV{4&t3Evf43*n*>vaJ*@8JF={XQXd0H9q^;-mu+KXuP)5-q^IG5N;VAKQ1-qe`0T(
z{<skC7$bI;8qIb!H-6f=3ho&TJ}EW6*llmL*;NP+j4iuL;h_<<yA&Q7=XWPUr1A7Y
zOCx+wXg$57D148z@!vf@BtOu~2;Li0PcQd+8OQcY`OCdS>uV<O3xP;}!VOv*<@>tT
z3ped|HthCyu_`55mBQ*>KHV>!k3JyXRU9z2ucOWVPg@z&%Tw#EACwQPmkp{&LE2vN
zE@`kEyAC-UQxA5<QrW>3R<h_%eX&Gd3O`K{G?%nToQ>&+L`Otj3?F4K#-E40Wk*6Q
z$r%~uRMH5IJnUjzsw6|AcArVgQuMhZr^BXJbmM`mvHfr)`Fh}EI35uLf=!J)f=!7=
z-%@n8p2Uox&A=*Ylc(sIqTdw-9hG+3iVi4xqR8)<w40)6o1$+Nc^;Q`iHg<>syQxW
zb2=eyVimou=$s<kYH1gxC|}WWMSm#jTO(`CRaCC%Cq-R9mv&PHm3%H^d!RJ!PD-03
zMH>`-rO5e|w2M>p4@F-nYFsPrq7^MubVAXeiu#?V8fm9xY!#wRi|uDc-Ofm_(-iGc
z^iYx4Kc!u=qK%5KD{?t2?M5kDqv*V%Cg;d5;GB$YxhPX?)r$U76#RwsI$zO2MNbv^
zpO<#i6@9Gek)rk&q+N=lO^R*^f{QY?(HEulT16KW*<F&_!HQNWs!{Y(QOIRkV}YVi
z75yUU$`u!*`xUYynxSZCJyC3=>F|HjCRNdUif$@ubyeDpQB<PnqN1kPq}>ojD;0gN
z=x;@#b+X1nL7VGjY|oUY$CuJ3Q_&}izE#xmD`}Ue=zT?BD{6gR+Qln+N6{rk&2C7$
zp@On*$k<Lw%{w=xNtmKViYgWTswm)VS!1T6U5Xwn>U2xmy{_m3MYj~W-X^=q+cGpm
zlxcD=D{6j6`ifChsOXd;xJ!0)bcEeC&lq2$<gR%V`Wg=v1>KXfVnw$V^|&v!%N2d8
z$mbiWU83lcqV^A@cCMm-*3&48?SZc`^P#k<QRMtc$}$ukQPlijQk$x%LQ$h{r8Ys)
zZbg498ueJ(ZBz6@kk@xIw)el2Hcu5reJ^EP(f5kNevsO=iXJHH^KYpwQglmE_aCKp
znW8#HU7nCO?um@;qA1e{di^BpWh*+PsLjt(o2jT;k<(MDovi4vqGrEHZHl6DMGc=x
z?RY`?&tz;bl_u_2X|q+)b44-#k=pkZ{j6x<Z&F*P=sQKB&!u*aqHh%Sej&B11RZ!G
zWAp#7)Z{C=rpWtusa>S#f}(bRNbQ@7PAhW#Q)*`@I-#h=Us9W{=rck0|B|sKzmzry
z6xsYOW#bfmqUbM4>tdnaZrw+Uev`z9g2GJ}{K<j?m@-&r!N&r*qXzXM@_%T`?!E;B
zZIraof;TPLt)Vi=v*1+=c5b8$7FzJU1wCz*!5j<LTCjCvGT@PoRjkK_gt82GY@%wv
zVZllZ+Sw_CBn$4hpw?6wjJ4oS3;t=rk<FCt77PBzf<u~<0nci#VtpbcBGyQIRlC%J
z-&!!(K^eSl!Fv|$r7MF13*N9`S4U-#E76BvAsj#-1Kgnnc=I1yKubQH$kz#}h$w^T
zG|^Tf%?ar~Q3R2PGg1!GM4}@^?-D&Hsv`<?Mrz@Lltna>XfM%QL_ZLnCF<gW)Tkv=
zI?+I)Ekt=lcZrS>xwl06ohX4Qs1;HfQ8v+4q60*FE2JkxuOY!C(amBK`n5*k84{)o
zp-pQPZX;nNk*6!tQldnnDx&p7FNnS*>g|f;)COq|63i5C_K`4_g#RXbo5-gPlC2xk
zWTGgdkBIV#?jhmlJB@!^HxwRs11CPt4Sc!gj%rS_9Cwsmaf6=x2+3UCQTCi@EKy)v
zB!ei6=rR&46%L!XMa&f#LzpM9kZ`rYQ-o^-f(PPSf&B^B30zFLUf^eh+Yz1luO6^U
zJE%A1UWwqwH+X{Hq`W~-R?#4x9pn|Bu$X_`4kL+bhcP`O$|q{?g>;-Kh3F3?{J%gQ
z@9Txa8zh`d)UrKNInn6$*ztdRfiGMWhF#lZoiBMwdvNAc+S76-rhC)VBToE&d%zEK
z9@zorm@gN8wgV(d4(({+eOBDQlaS|if<gT0U~uQ*p<oXS`O{9&4PTohu#fi^3sKfc
zXiNRI<Fh+MBUH}s4CzqLy%JFVduQ<0%JpHqW`cl0+^aKIo$3u<XtLTHl2DtX#;o2)
zId9bkeN>n}Hgv(N71BqAZtbIj`}v@civRDUf>-*$csR#(Ukv#I@9ztJ;4AXz#@G7d
zkbT8J^Mzvmy&u@~SU(hu;0yeqFHh=<19{31I&)6+(hoZED?~wEQP#8@QWjA((JrD~
zqDMrZ5qWll&M=lA@WXjZARcG3(G5L~^T+0n`#~dqz8j7~0)NsC0{J<T_VC9bCi3zA
z(2s|9M@QTI0jI&Ne1|yM<W}90Q%sKS4r8@cy#vn=hBkctRA>&V{7QEiucb-hpdQcy
z()hhT*z=!9;+&=N9>b9TUJkZ=TMrnArm^M}eAojTa?bz=K%2M#@Ig%~X}l34%_dwY
zKr?<J0D3}NSx@js!|px7*Cx%e!AdJ1IXz(<$+lU^Ui5?jlGU1yG6SGF6+aaXpr5>6
z5Kn>&rv6zkXhFq)iM50JfIwJ8g5O02q907l9x2e2{~ZV}+_4WX)gHZ}l{QK5LiOBu
zdT(&i-jJntdxM*nu6O76qj7cS#DX)V)1r3g5uwl=HC@bryZ1pK8M=qX4ojW5qgd;G
zz!6KmEjq}c(e**0zgc}&6zEtQOsm}+A=(t@27!*YYlDPsyea$&g=kX03B(N8^@Z*z
znqhX2CKXH5O!NG{;G|8#JfnJmr50vnkNbi>mfDJDVG8%^2i^GhA=o?GtElm_YH|wp
zK;$aX<k^1M<P?2?Rg+Wn2r}@744i0pJ~bFzU@Bib0eNFEI3h>R!9hG1458XIbS+k3
zhY;uu(`ZQDcx*D*@a9q2@-*rAqY!Z9P5NWCD<R+t)5(PgZxRY^wCVZ~>V+G>I~tmy
z21nG5Uk*VRnV}HOAB1BiF%&a&A2aZuLZP*miBl$8?ihyClBtK7ozLW{VbBfBIP^3J
znfgGh-rfwu-e&5fta_VSzXzOr4>h`2-Y}-B;f4gKh8rDOCQXg$BFS{Ivp*zjGxcy@
zGYo_85)MHylc$E`q|VfPnJ%}7Lzp(Jeo)FHz*U=#i;mpDZ0fTcPl<p?$f8W@qh;w)
zqFU3(s?{w1O9UFv;dxQu=FsS=bwqP$63qOo&5<j1btJfJZ|ePpBY4X14}>n}w7)6G
z%XI)aYuUJ{Ar|8vF#vN#w#5~XivlmceE^PPHm+P6Q~Ot%%`STbr#`PQ*w{a_4kw%I
z1F;j?`UG=$#tp;;F;^~#{R43%=E;&>6wd$8wBN+chD1S2ZNBUR?HZU*J@!E%P9&YA
zXQCjScNv0{?=T$f%F=PiF5;WVpoipWJf9btOKm?!#j7Lm5aMKdG8$_p4YjVc*sSC~
z7_;)wL6`*>(^=q7UVZs_GOZefm8xT`D=kr#ykLp4@5%!xe^v~};as8*=UK~efi1yv
zY4aeg>^KBkRn8s`?!cpl;u>GdYhs|EwiMF`Zdo^;hk6uZ3JyczKoWN3O9x>t-Z%_8
zpk{UkhP5CD2Ws|6q-`<a2Dzq_+*h3B3MV`%7TT4)j^^(VgLY^s>VG{96IiaEtlX0Z
zk7_p_KOFt#nf~%#@t0@%yAfyYFVD(f-Yfp{On>uZpoNx)=}GiHXasKMd^~!@fuFCp
zrp4xmlKNeGYzz)sKCX9_z964FjKnRJ&)245c;cdwPp*AXB$7aN0G>)!Bf*sq83T8C
zc`UTzVez<j!{Tr<PsO9me-z3Nk44$xQ7DTThq6ybqpbIMl=U71POy^4#i7rY{J=__
zrL|*lt*xZ#?V+tSXTdxVuoOdi$b)x|$01y)r&(pCm3;OnT%0R$af+O?Hy&C-f$6xw
z%5j0|xZoAX1=8`BvFNzq6~_gp;{xf}cN{t{G#wXOIW9CE7rx@SP&)P)kB$ppaa<@I
z^IeJ9=k4R6J&x(w@t9av@u%aVJHBue_-L!-{;W>Gp`MX|nPC+_F+pg|jKWdV0_{@F
ziCu-+Qj7pz2i&2E$IZp5YnFhUv&dX8?PjBoBFZlQ_!6#)Fk_Y^gD1C}hzD8`t|hTX
zip<38jb@bV=+tP$-!@I=NRxC?)3Kp--YIfyutMmure`9?TBJ`hgGx`t(JQtDr4{42
zipGlZgcdP8PsA9C_1C00oU)BKRuU28i`F9Dme45P5;hv#Pr{~(^~s_FLj55^Bll{2
z#f}YDnei3#HOb&_gMtl0K=hWZztD^sFEP$I=+P+<4{y^(Y|AgF)8Y3z-UKhFKrgLC
zZ$z7^tz*OI*27SuJDTTHiSA(fEYUlX#FcMOg~?FDH)mlQq3ag95dHMvqtYM@HQ38o
zc!%FlgK1!xne<{h4nH;;!pa(x7dJj)3N+>yUWY`jOdnweE1Z={XW5f5m6g#=ks7@)
z3Gap+&x(E;$Eg)LFC`i?^Di0DnlF3<QnihG5Xt)@46rf?O^2?0&}8VqSEu8LP6<&R
z(QP8n$w)pKm@KCuX&>U03g0+N4f(;z;KR>l;I5@&Sq4tgmRAghXJBsqh}Px=ZL8GC
zu)^66Th&)r*kL(SFt6J3e@uZV+Acgd#fleq>|K;U-T2}a&=hv@i&J5uwg;yNmzD>Q
znT8|1N7u=tH-f!6D|_geqX9ZI4L9CiHN_3N>vY^CyZMmmV8CH>)rx!iVY<k>^VCS(
zN{4xm8Td(dxNIhLESm*Q_`ccr$>5QN<Juz=Z{&ApKr`(yek6$)8)rf^R9U&IvT{{L
zu6+0xnGgt7=r2jD(zDEcP=$9+5p|V$-SkFP{gnT_2v3-O^T2_x&jw$V&o!I6myI)$
z`$`;elt*M)hiNkx+VfxLU|+<JI;v-ytsK>-n`3iSrW3Q3*|^$|>hsM8gh<cAF*`<X
zQ}Klh`U5yY_oyW8guc++WG856*58Uw=yQZ)G{OrOUVpQ3343PaLcw0!t8m+D)i^04
zF;wG`MLmaV8mYECA{d(4oN#QAuX-sQ^y6_0@hdJh2VMP`jnl9?8$TH<t!4eR8qB8T
z6l!P&e6WoB5wi<-UWDI>B8*FOaqw#>H`iyG8XRXa@-=v&5XSQsfj<p+AiuguHraeW
zgz~<N!Ov_wXFhc2t(TzP&G{I{f+cvB30;7nkJpz#XUi%nUjSa(Nla9trzbJ#iIz^{
zY7s4k<e>j~3-O=8yGWLL+vh<GerpC!`HLI~<8c&5-BR!<%L1KmU4%1oimtsltBYWW
z%_+wQ%hg~t=To!rhsCWNv^+N*KNf1u%Ys<fwKReCGgV8`&<AEM-jBuF#kmr-@dCF5
zZz{EB6GFOW3G}h4eYG7e2lL43S1PCHKrcA0>NV!aav;R!w5lgpls#XZgNr&e6R*5y
z^f+^P&d~VN#yx|ls)+22bS_f#A#R%sJ+-rXfK}#7%f&B|bGi%Fbmi-EA%Y*s!+XeM
zB<+IkY|5kZU=UoSuQIo0jrOUl{zYD%2j9R|^D4eSA3A7P@g6U(Q_u48vUrV_Wc@n1
zhHFbS61xm<zt{MzWw^ku=}xBb;4=KDP-nI8>&lj+zK%W#=`uZdIsOW$qkQkl7cR#`
zvd;V=A}(EZw7u$o>(rUS;4gwcSi3%}h|E{VQ&&J|sH-eo0UF?6l+`QoZ^U)FqXcQ!
z^_C(K2iwin4WFtWUgu5)IHEUjAaDtK@QDRDTsJVGV#$q{6yO*74Ra&9@l#lW8+d%U
z@&6Ry-QossQ3zw<CZ9^LuX#1SZt+&D@O7Kdq}Lr@ORu}!y$E0T_?!6Re-z`oy<UVX
z=mEv%#vO{GKk|rTw0X$4(d$v=pT)4lCpWS|OE#c^4|}aaG8@srU?UrxXR*+T#X&e5
z1q<0|s9<B@M;6b#*;tmw#<7iTJiEpcv?gqV)}Kw(-eif|9+ss2izVB5vJ{)~EY;=(
zOS5ajUbhQnlk8@(H|(~s^rrn-M)Or{io;-*;gHRyI$UGZ^jo=Xy5n3n!|}f?)2V{Z
zbUwglxin?7U8b|FmbPq8%XRF{RvlP&>ohjEbrqZEI*`qGy}}l{{>B!yxyTl~on}kg
zy0RRP5p1dF0ha5P#_~FZv;2-{*|N^jY`J$0Tj3MNR{9=h1zmfy!fvNoez!YpRd-)j
z6fm0=2j&i7s{$vm)q$Dpt-uxR?Z7(Z>ugQnL$)^XIV<UNhP@Nin;Ag`Y;8~xTNkv6
zmG%9O@qSC$x_<d=eZO^VL%$<zWAJdcDY%Ti7krPsAL7eC2${=145?<DLz}TJq2t*{
zq3^S;VGeA4SPQm2tP|T2wwrw%_Jr-s?ca`V@85y#>i>Z44sXl$gx_O(BRaBu5z%aS
zL=rm`@dm4mco*NB+2H|BtSYJjI~o;+?+kV{dOJH7eVZK}WXp~X`X@UvB$8DR`IVg*
z>dC5yK4vvBAF%3}bF5}~WA^#*D16UipT8EwPQEr9-y7M<5w}?GsgVxs<j7!lYUB%6
z8{3PWicMy<aqqFyaaZyElARuPjGY<vjGZ3s!Oo1aVTZ=Jv$JESvvXs%vM<K`z|P0F
zVHe^@vy1U(*roX2*yXVv?8?|d?CRJ**tKydSzW>=_T_{G_SJ+B+4YHC*o{PQb~AA)
z`#Q0X-Ad}(p50Db&h8}LWOtJT*uCUc?3?7f>_N&T_AuoLdz9+PA}b>*;YSUBnfh13
g6#OxYua<mI6~y8H*1xMD0rw%kx>l|{3bsxE2a+BpZU6uP

delta 10159
zcmZXYcVLd!_rRU|#0p8C3?mYW2qM#H2pN))1TiuQ5;CYDB8U|+GK>VZpUAa3)Tq&t
zh)Rq^j8ck<qNNno-EXz3Lzn)}d7k&)_x0;P&-1zGoO|xM>)iW1tJgJMy{>6RSuXU}
z>T|kQ)#m=JLhq`IB}sOWsx{eIhR<#IOw+n+^n6c$rj!x?s6Ur&B6cpP=Ry5BfD?bB
zKXWz{vn^#XQRDc`)cm%VY2{mNwX0i8_4mu$N+C=8ep{JVztvV-v%OUNZkw&v@zqk8
zrR{&U3}$QLua&`C?S}r$dY$+=J~d5ygPvV?(6bhwd$q(j>G?H2_i2lEmcjd){jM^&
zsO{NRrm4GZwL!Z};j(sZcNtvQGWV3h$J(Fx{6t&#RvFyZI_)jf{@7!yo!?ukt$oW@
z8@sO*?rM+rm1#A5ZMEh5OX0p|bD&Ji+i#;CJg@>DYC&(8X)O=fYPa8xgMQkRN3FH+
zcS23HQBwFjPTC*uc$2)cjTU?`)<n+_dT6x=h5Y%!!KRvNheDtqKji{#wZn(}O~UOJ
zPMUQ^SBp}rMJdeW@=1koKB7{%tEx1#6VT@2yKS`W!x<*)M~8=)WHD9gNPDU_lLotS
z;HZ<9b;J)#<wurT$fDo%!4i2XeK%RBxuiYrq-7t~JEGUc@KM%E`}?Su=tyWaIU~cx
z)igqJ$69G0R+Ax7hZ;e-lFmqSJZ5P1Zai|<_8f~OUyr;s`{Vk6U{i6&u_?XL)siln
zNS_h38E`__6iKR;^rxhtlfrI}q)JJTCHdA0yD5@(OZr@rd!4WwCuxgLr|U#)j;Dl8
zyreafE=g)yFYKZu6-%m<^p~VQr$vpqk`7DyQIg*oVV9-ThBG3zM^e+_tguOyv{ll_
zlAO*7y97yVC4C^N*?Yn+TGA3przHI?sqcBJG5)-Wtx7M`V*5#w{{`W7s-(9heId!?
zePNd-X`7@^B(=II>=GrdlXO{9^Gjsc<C2JNsa~eo>LvXnDfk27HBZtJNlzpNTo!iO
zlJ-jaQc}k&!Y*CXc1gE&f~z975m$xvdP!F#S$`<B10^k!bXwALNg>xnjro$^mGrYt
z4GpcdZVhBdG)>Yz6H#oW@w_f<G9<k!>5il}9|^mWk~T=XDyhW{VK+$9a!F?-{VOT-
zrl^sx(~g@Wwx?3l{g$xFk+fgZ*OEGYEbPWhdQH-&lG=VE?2;sHl=PvbmbZo7V4ZSr
zi`dQz&Bi;zBuvr*N!5~mk<{Z;QDeHK1CqXx)cLNkn;_|RNp~eV-y^%odm=PVFVo~+
zlVtOm@D(emRMI&~aG&hx=m@)SoH0JyhWo}z=%alhDd>Tat&((4Qul{KyHwIGN#36e
z?IKAZO6vGXXy;0L-$aQN+an)s`WM3Hv?Ql5g>15<<C1K?650$&Rg#)~Ewss!-j?*Q
zq{MH8-EK+Gbn^IC#P-^^!sdyjsPBY~OZrYy*!M!aUeY5;z5ge)D<$2P)a?hMT_WkG
zq^^%ioA6k~c2zIa2zvY|>dldKK~lS)gf>S~y(GscLOV&)F-a|d7TR=4hb1+BDzsyC
zDt;<rdoDEzzX+RMl75#I`>W8tD(NRl1AY_Qa!KDx3jJMZ*Gc+ZQm<!1yF#bRXCk(M
zKZK@O(hW&oe+umaNmnFw_)BPKOFA#f`EQ|}Ch3$Uhkt}NQ&Npi5C0Ldr9Brmm6ELf
z6|&Ki_DlLl(584W*=^b>={G@qFi6~P#vjetpGkvFX8cA+Zm)nTM7~y$b`Q-MXeFhk
zX1rrY|Hjgw$c!JEu}c$akZ;DzW^`{V4Q83~Ju|j#Mg}~xnT)kgmr$1B_RVGOiDs-e
zqqVg(NHt@H8I=~&V3Zm6nelHk#<i5TZ<_H}GY+yL1D<OmV|}bk^jITpW$iLEer?8J
zJ87`Sj1SECk}3^K%y`?3e)iI!P@p$&APlFE0dD62UJ$F}P{JWPt|T1FD;*$|_jZ8R
zTyX?1KAR|lsDfxQ(GNt&iF_Q9ekYnt6zGJsizt`qA<;o1Hz%a;iN+FjZH2U%D3j<W
z(VIjLt&r{$#Syu-Mp{jjOmvZ`oTy1_q>qRO5UFjDiin00)e@~D`jhAaQBWHstF}m$
zM3G1^N$+<734Pn5@B|5`=)z|toI=80&Pcn7W)Xc(bco2^8R>sS<A}W5A>AUHMC8~G
zX(tlo>JA@}FrI|%U69rgr4U^r;zUs{;K&<XpeHYOL7B5FR-VrzU2#6@NVVP-e7NF@
zs%xm?5kxlakrorh5*;ThMS>N2tLF$;>j-X$Yjo^KxKYQ2gylNc5bi{D;=j1T3Z+tQ
z!9B)-3*YJvYV$*lda{Z}nXHmmxx+#@uUCocfK@K&Sd7R6I$-m4MA<}t5$z@F<AL-g
z(Oe|Bs#iHo!gLQ5{z$Z)$gd;PZ4d12q>g}J)qF!opzG3;<Bt4cN5JoK9_b0Qj8`ju
z(GyYyhjudaAq(!<S(g`eh8Sg@8pG}5uuu0#Kuhit1+M(xrO?>+_rr~2Pc+_|?AUml
zJ)6gOM4-uog<uQwcy1iDry;QBGrK?&6y$Y*OgO|nl2QI=7w}RJsYCeb6dhu?M;EM`
z<pmyS@`@LvqBdO)qshl1-li-1s4#qN?TS?^gpUf0(Cnjv`+B2~ivRkk;MLwR1}<>b
z2mIj@@8<)(;Rbnh;p=^HjBoH7A6Nyke1I<m!Vo^+7y8il_JzJMj9!lXxi56)dA?xF
z>wKXJ5AuU9yuufpcrMX*L<fjG{gA#SN+ojlN8&`uL=8lmKe}q+k964|`#y?4_QzI7
zbI$+><Td`-L}mc^L9)^C?f~cvDF%Or%tr@^Alh`p;)Vcp6yFU-DXFR_FAj!wd`lMC
zKq_zO24j>oA&lt`4v@wl^u|vA6o=E5#=8$e#yM@ucXx-;Xc}*f{u|w)F?a6)J<ukh
z2Y90<gEU?Ukwz2FDYz!C^njj_R^Af=(6C!i@Ucp>Z?xRP$Kswanq<2zWY2m+50brS
zILhe(HdK69Zvg!iy#z@lxMJv^z61_b{7PRosP7R73rO&%UV-R)!?JriwBY{+LMtU*
z?Ml`zyk{>gWr$KHmBx$G=3d~UOi;V=htaq=7srDWOyEyC<0_8`1sm?v3(3DXI4cuX
zH?s|vI@7MeW!@X?vDC|~gNZb{-Y5((`a2^ER4fgoMe2nRZHNnlKt<d2LAq^{A^aGH
zXkuFb`V3h2fo>?8W^|7x6-!eM^Wr|>sAOW+k<nwx!HDdeK46Qb_Ik6B$vyhws?X$+
zvv5RcqoU5&qR~w3gPyzeMlbfoMl;p^7L8`A5oF*66LG3tc~&sAf=PUR3i7sKut!GM
z?fIo(2vsJdYkduRhCnZvOatn|<I}*3+eBf@lZE4*Avk)I)kMR%Aq1RZ3b}FP%|oG`
zGDRI^&ONBXadqL>LeNc4C<H56q7{8mvQ%%Q13!jBTV*OvupU9DFl=I~8e$B?RGtwA
z{#eFIpxKzJ4zTF;oiOOekAz?^bdOU_JHgTCXp^g!>24}bkWoF=sJ^csq$$~II6plE
zgYOy+L6FTe!f|S|)t8Jw_Jl(ie=8K)mq*}o%E2W^E+EI4k@N_Ngz1z<y_M-|lwPI9
zH!{Ia=RZfF@eE!R1uk|?o>)dRgC@Z=r!%nI`YgT@39iaawV&=teZhVv%{xUuQ;e8%
ze{fQAae+fTMnAki=8aqnr@6xEPQz}X?$q`Lr@7@5aUm4-0V~_5mciw6bpUoLS4}bE
z8a)7)$1E{%6$5Zg8ZcDz;(*!4YSE`TBnl6><^92f`vhT7bEx~?${d<aI%Y3KK{({`
z)3NBlZYWrnXX5tF<2y!TIV~EG?>xg-1%}1zBfuI3nC)Eo*=TUVi^7W)=NlCR24bEc
z9D}KGKAjD^XCGv};)xinnE(GO=F5s6s595eH|kUk#L>-Hhw|Jdcv7FI++s5bqi;eP
zr^8GPtza;&hy|EZa2vbuqCwDx?;$0I;(_u3B=5uvVlYK-8v>rNfX|$aUIq+?cCe6w
z>8mWXtc^m9HVlRTsk+dpIzJY7>_R%JUHI-;eB6q8A(%y$?s)k?BN$KkkH1BRzfXri
z8)cE2CL`?tiwy5cL&2rG>mYCies>78Ru;ctwAe7piv<VNOyxT$jG*DT_Y3gE(ys^w
zYFk>Dz9=zm>DrMvpar-|WY&WMZWo7pu7Ix}kDUn*#j|mxzA6%M9t(`bQQrg4vlDTc
zV+wgf0(j%Aayd4)ek3O1LYl+wJZA`W&`$xSP>rSB<HiriW7i7R@fMk=kk3rSby$e&
zP|q>J3D6pf45vjFPKyku?S~1cMZ#%7B04R4!D*4<v`9ETnutz|4X4ExPK$M?O0hAw
z#+ijBQ?&a>pyT2f92Xmoi-qH!BXLvRh=b2~mn2+i7vphXRVLx0k553^o1;(`orp63
z(I~r|h%&b^C_6m@W&6f}JC5hYF_?^&^Cx4V8@_PGdn?Puo~}>EVV;(Z+jTiVm7;5m
zEW}acfOhG|ye`M=s*fICB3z+_C(Ol}YnhBYxWrgfxHW8$F}VfcOLtX*8FoV&xO3~V
zcnp@{Qqq@5iIJ$i(2VjUC6gw6jbSoNm}KfT?HgNWrxN={%XB@~bRUPYmZ&cqL1m7^
z(JwUz#aE6oHi(T<iU+$M#P8!Uh*EW!(LyQ4rk{_cM#%W0wMdsNG)gkZjcy;NVq2x^
zB)tNH=>VjmdojRL`$j8_089D0GzhRl!B$;Bv|7~9H-g5yj}wl1bUGx#DoO$E`L#?s
zEhpgR@LD>&q^wn&&}M3H-}r_5`&!lBI1<*Xc81TjYA2F7^Boy53D)u*xtMV1mWD3$
ze!B6*@eqa@>}5Qx;}6HfR9J81+pC#4{@7>;)0&YN7e0InG~-t$z&J%yha17_&NSg{
z&dZpuG`e6?qgP(WD`goTDSeePoLfCDrbpuk#m|$WEzh3_8Omlgh~#|``db);W`dux
z1(&*B2YcU`zmkb(-Bt^cpR&!Ogm>IYn3tzyf+x?K1YP-Iq9c>QoBxeeJ{ciq66W7w
zlc6KLL2EOG-<yP)K|~bJb~TmVbcS8#L#KQKrtGy-;IXn7Pgi}l>$mc~l(b#=!e!6`
z_VTM)Fjm=*GlQ$jjmJ*KLEf*b<k1Vk)|im}bO_VfT$qZR?tq-##@sm@H^@FdC>u05
zYOGlOW`C5f{;oVD61UM&-hCQ=(;Y3J4xP$pKy!X*CZ<TYTpZHwIe3S^KMh(cNAZhF
zkFi+}L_>{*s~QVeHRQ^he~^P;D>djZRjE;PjV(}vw^Tjq8smcMg(}l*|Fi(?`Js7W
z$G6M@AC%8EntCt?N4C&14qG0Xi^DF1w3-VYm1C-DA0Jb5j3$n$*~Y*e6M4jFVkWNg
zV``q^T^FgjIAF(lL@s3D3m5Y1aFQ-vsme(ek8=DB#WL<l;|j%<nK)>6bZ(ra>zFIY
z5SwxLIk=Lr&$cqy_DU^IiJpII@vNeLLoJO{dma%CEv-)4H!7BW)E)H28r`I*HGgFe
zeqYwoHBoOQMybObs>f4DWABY++=O`LwyL#nv{Y6!1@qxtoPavY?WQDChhwdeejVO5
zs2bKcH77=&Do}Ifc`(?j&eAFVr^>@C|0z)eJ8i>n<>8-%Q!+qX9yTBPSe=sf#E9GS
z!}IZ`Qjd8|ACG#>iFzdUxS}W$K4uPnqt45RNPZT{Jh^-3fdjug4VT5PxzI(I<8;~b
zgav3{JP!i+t_64}e>Bfj3IC%6@xgiE%d>Lv6uY|^RDLNN?=okMi-f-L&(I{BF2rXj
z6pG;OJam?miw9ZiB2+re$3H`FE`r{C?tJ_r&sdCmqUmD%@=nOdma*7}R}<APh7j(w
z0I#VF7vl;J&B3pUb83Ro&vP`;v`f$7@vFBoZvpP$rv=~$RlI2-^i<BPJuI@*_(J?N
zxuCY9TF!h^Aw<CY{8k|(Dwk9zLl{*AG4KI>t+}u!hxp|}TpZ_$;2K;rZsZlk;Hg~0
zi@knTdRh!^pn+DMX%RFSmwRU(zXb2U4SdEDTt^M6qv8C>68zI}-C|>3FJFrK>-3dK
z7wUma@$bNO%H{4ne<_}T*NxvJbfH4VEo2NUvi{A1e+_zLZByFNQ`>c(u?)Jv_3F}P
zpaA|;d1X2NxwuIem>}h*+FB39uIY~Y#!uwe%}wrDf}?l~#{k!l8y{PO!*mNXCYD_I
zh7$Z>zh&$-7k&;)a0`zH7yfGrUL0<5hf){?AM-4HafcFIPYtD*zHak2D^PxiPp8+X
z{5^Wz<*qC7b&t=c*L{9zC0+v`P;4&TZWZ)H9=-}S5BY9<@rx_LuG;z)*y3H-uTg6j
z-pHH9HcDed8fk23qswd<G-1OboW(&ti-#(f06(xq=EX*^@oXg9#*)|#HcDyEMl1c;
z7-cp~R^DML%2#Zxl{*_}HHM{HJ!5Is%~`s2D9f;(!Nyy^$tJYu%O={aV3~FU*+jcJ
zY?9p#Hd(z}$fnrOWm)!ru&It!EZeD)O>5PH<+RFX(_1%XGg@zAGuwEw+_vM{thOiE
zZ07-Nj&lQ>=lmPXYj>5+cRA1U+dH!bZo}C^_e!?NV?0~z8O{niU1Wt_qFIsGX;$nV
z#+LXTV@v&dv1R_}S%Lp&Y<V{yR?=f8D-A5{&z1+KuoZzhY-Qjwwkq%@@+WL{;1_I7
z;O}g0?+a{QP%pMVsD!NvTFEvBZD(4aZ&_L20=BVlF)Q!8iSfS2+2-J(Y)f!C+Zz0U
zZ42>X+e7BES3~OAYoRUK>!D-V8=<eU9btB?Jj{XZ4C~Bxg}u#ohdpL{3j1|nJNtRE
zz5O1sec|od{_qFvKtw0@c0@GW7m>=UA||pU5u5S7gB|Vf$ZDb*v13tT_@2y;Mekw9
zqwld}F-_U=nD^PqL6NL>&@b%dV0TtK_#0Li`#P(Qy~OH<He;uTM&Ww~J2fnb)eoDA
z?`^Dp_+3_bI?j&O#|5*~anIP9_?Ot}_%wDV;Z=4v;Uj!MXJ->@*}250?Cc0Pc5b8<
zs~YLb&X3Gy7e?-4?~nYRT}*1nE+vg%A0%C1my>>DS4O$9tD|DrwNZbuhS6u)_2ljB
zqm*QJBjpWtb8J_3Yn&JRcw7PdWZX@5JJqivyOX+<eVTfQ-A(Jk?xn3@_tWmP2k9@f
zhv~=J=Na~_Uv)$^{Gi}J)PNH(1^<-dt2KY;1SH@O*ndwzGHykD`Bg7J2~Au4AJR1(
AWdHyG

diff --git a/target/scala-2.12/classes/exu/exu_div_new_4bit_fullshortq$$anon$6.class b/target/scala-2.12/classes/exu/exu_div_new_4bit_fullshortq$$anon$6.class
index 1f6ca9a9fcd4572ec480a85898fb28c5f13cae8a..edd7ade7e0109f5f1de96a0f7a83819e86d333ba 100644
GIT binary patch
delta 128
zcmZn^YZTk?g>CX`cCpD^?CO(W0BLt1t;!)bxdlik0qKK4dOnc;2c+)+X=@I3#*dR1
zaEMN>0J1&-SvHKHLHy01I4l`8Uomhoy=G8mdc$DD^p+u%=^aBJ(|d+?rVk9OnLaX{
TXZpnOndvj57}KlCAzW(#-r_7q

delta 132
zcmZn^YZTk?g^lsW<OLj}leyT{8DD}~?m*TnFsp@KeexGJvB?L4v?06L<bOaq4@g^c
zs83!Eq$_~*3n0A}NUL&)ZT`ez$*B39fs5${gEG@g1{<bV453V~8S<FkFtjthWmwJh
Wj^RAhdxp<U9~i}$o=*<pS_=T4Z7mD{

diff --git a/target/scala-2.12/classes/exu/exu_div_new_4bit_fullshortq.class b/target/scala-2.12/classes/exu/exu_div_new_4bit_fullshortq.class
index e92748af9954288b4637c0b2fd2e411f090c4264..f6a98119ac46e531fdcacbea472db9149994dca5 100644
GIT binary patch
delta 11211
zcmZ9Rc|cah`p0<~5kZCXDvRu(xL_)X$Rf(31PF*LA_xfOo(d=^xPTji;sPFY+yw=9
z1T-~EP0MasR{E=MH_Ozz+0|C9%&eQg@0`P#7w<o3KIeI!d1mIBIWy0^@2VTtWjCyw
z8}ljj<njFdmK1h!T){n3?0s|Q<<6U4IL~+9v_-xH15PF^eBK5&Ri#0eYVDeiCqG>A
zW;@0Cf351)xY?79dVWg{p5wOGkgfWy_FT#Zo3@GP0qq&SUGO#SIc<mFC)#t<PQkvr
z#PjT~8nx42J9YBzax$r3@2*jUYwgssJ>^>Iy0=_?5ARKT%gIR%sjZ=I>Qy{F)ttH-
z@=_n+nW9$itD$t&d%t*|(w+(RHMB^*r9BH8YN$xHIZ&g%eb7!ldZ1j*IAo_r9W1Av
z>N^K(XqTFKsD|p)hj<=P%MaJ6H;&q=en-mH++%j?g(Ky3SdBeeLr2ulkJhN$8#}8@
zk5#Axj@zkS8q3v5O?K+R#&T*>{g2mBvw9iN7B#IYgYK!<?>ebhn})WMSF=G^n;g_N
z&3=$KH|J<iXSK4$M@?waW#VmQYpw5E!a*%(-PI8%gjV?UJL#bE6Mfpe-EZ?Y4D#k?
zXSL*HLMz=qX?Tlz+0brzIT6}BFE47f$vdULJF6d^ngZFN)7$VAtz9_dpgua?4{trr
ztd_C}(4Ci^Rfkv7TB+=nEKu}$2leqQMo&fEq_e#>xud#Pqn5KVt#-DriipI$ItI^e
z+Vh_F9P*lwRBF#JUK2gOe%D1EbS_#WKXuPJG4|;5j_McZ4Bsy2brK$hMs0m}RIf?u
ze8I3zkW?<|vLt%lu#1qiMA9pgev=e<(WsFt>6oN@8ksH`eS7heVO=ZfrX<%l3~j2U
z8cEkB*}ZAlB}%H0^p+&c%Z6Q~q@|M1YINta(YHZw8P<7{8YSJA)cYTX-Bd|+lD?GW
z_O@X+NzxWc|0l`*9m6h3(prsL-ZA>dt{65^l9ow&RnqU0g5EW1<V!j(={re%-ZSi`
zN!lmrmL&J9hFzLQE3O)S`$%e(_YIp-lGaIjTT;6Z47+GaC6Zo~^jOm14~-i0B{fO<
zUXtH6VK?@g(YO8DyZ9<@OY*pG_)3?=HS+n`QT<qw>HmbCkR?m1l=O}ytB(x3;gU)v
zos;xOD~Y}duM0jl>NQLHK~mpO4DAd_^^)#L^8BY^H(Am)NuNmS@~L4rTGDz+S2TL?
zsnNF)|1zwXOFA#<iKLLv47&nJEs}ne^xO@@Zl<ILNnc6w`rNR~khEQ+OP?Ek>-vRZ
zGe*(|N$*OszG>LSNLnH3f}}qsg??$&D3o+U(od55-7@TEX;gj7=-by)<9*w($&|E1
z(x;Lf?ihAsC2iD5oG0(z(a)2<s^?ewsn=J{mvmW@^Vf!Uwxsitlz$uA7bTsRWb=)o
z&5+b2$?~qDO_6k{mBwKuU%%T|P5#!fsgv}pq`3bW+8vU9kQ8;#(5jN|N(#GgXxB@+
zB`NSbLt7^4UmDT(M&C-lH*Bs;^8LY(Et2%EB#$2rZJwkzB{}_MXlF?}C&~V2L;HfH
zQ<6G75ZZwcjJ_S$-bDoIp;2#wq=S;4NE-EvVOJ~Z7fG?d8rtoWzLymFo1xt-=^II*
zkAybok<qs=wRh3CfxjE|R!jO+Qs2jhcA2DWl6w4MXctPlBFX)Uq0N=_h9t*74ed;g
zs{b_lX7`t&$&vK3B<ueg+H^^c25tV^P>z>$K++$QlAaoNdnG+IXv_1|s@<|p(3VTo
z+BF_QhKg64@!w_)v6Keu%y`p`0ZbaKGUGqZ=+{mfEH&eYX6$Yy4GPWpj)we!mF(-h
z_R{W>86B*pbcPvUHDl)v(jeQ6C(YR2MjE7<@t7H(nsJ=1v~4isV-2}aN7>gs9i`m^
zGsbk1Qf|ikW*pX88dRC_YcmGhNrSa!{KAa>_R?Ub89y;&A4M4Ov5M^L2bx6ejNHd0
zYZsXDZ8N%dkp^?kc+reqyGn!UW;|=gP7bXGemqOyeQ^okyBw%DU+hRu{4+sk1UWf^
zeibxc&_E|pm7sZo-WPOKkgXHwKZ4=}^>hZU7W9IkOM><a`rC<m@z0&fnTI=rx^)8;
z2}%)k${BWQH`qNCbWM<dH&AC6&>TStf({ER7j#$9WkEe$K;#O_78D_9x1c40Zh)wh
zHcV$%2wxGx2_Ul5gw;YA=my~jf{qF5=mxqcC|*!6cTkz27X`f`s8-NZ5IJjZhPp#|
zQwWO%xq5(33#t+Hi=gX*0z5!=o}jsc5<RIaKj=Yyd6kfTD`f8r^7RDSdO@4zNr61h
z3$g=3wp!5Ff-VX2_5%GaC{s|lH)w~TB0--DIwi=#8}v}nSV8_ippAm&2zpP@VL=^y
zKz9W_5269u;8qIs*YI_L0UG`#aI}VD-GSqIPInqg6Ew+5AxYElXMvd-_U{3l4|L$O
zdQb&hu5{#e5#+}0eMzw?u?S?P7Sq^r-p7}gaF3qo#aUnUCtc7ZL0r(Fo}iBf<q1me
z1!@#jDd;|k_Gr!Z?gimHy%5BlUeuRrHDMiuw2xoug}&b7?R$#?imrTOZ^Dh9+xw9t
z$4w^F;D|nEZjn6SP;);`{hJ@fG9M+5*A1oKfDkb-4^w-a6IL0oSshF3YSn0hIF&yb
zhW34UKD1)kw$|+}$ijm8@bCLlI>qpucyi~f`%yHDQ3mp{CDez1_#6#`W<Y-$z{C4d
zKW<q@p1iCdMNu+WhQmH!A$11-+z*Dy!f+aua8oKY&HbqlD^U`;Pa)bZ;VY6M^cq0j
z!NUij>m|H)0QE=l!2r}M)oYFMN3Bw$R%x4BrTi;@)GF0$mGXH3G|7r9F6}e<?f~+m
z9sIWd3a0(KpZI~)3!FQU*3l#WWFQ6c8-ZlUhX&Gf++h$o@FjuR1Cj-u3Z$OALeP&w
z_J*K7gFt@?dO=Wd5NMa6TtWW?(Nq54K@`gW6-4$tCW!i4GU9nbG>FFyhU7#LM$Pz*
zAhi7IV6^N$81egMFluKErk>QEuN+LFWX)d_MF;-tV46iX{7x`tXUb9P#B3BFeTg;%
zQ#jcQ%>Wci2>CHvB|zxBc}57OLRh^BOF3X9wc{U!P!QC4{Q7g`%Kr|d&Unk_v;)1d
z<(JlC4vIo40>UDmGXk|f4kc4NTa!h#K2NsX6h@1Mph0h;DU1e+*2Ac;ke<?93EIl5
z!{Ke>5DFHr@9XZ44$<A+)!Yfi4c$-2a7q=gPmI2745winKOMO9Z^Ox%I`KOR=#J}9
zaA%!I4J8j|r}%SI309rwFzSjhnpd5ju=3z{QG+Rpr`ZZ`J^6}K@-(F=Ue;|t1BFK~
zLxb0H(TE~K*}8xgerXt%qQZX~hLxo7+a-EDt$0`jBB&T&k0QPvVTYCL!TrO?ieHK#
ze+V8#U|JMqwiv7j9}-C>X2Kq0?zxFaPe*gRpdk|<GZx(37rsr3n_ee00;8)Nj@m*F
z8+?!2q+0PYQJMgKZ=L03Q4|P^O9c>Q9wj??iPGYVE)<D*apOMG<Un2cgM4y#_@eLW
zXSahcN`KvIMKpFH>{8;>zY$G?!3c1F6q@ggOEJQ%;h2z%G3Z#uaB^V|sC#JyCghFb
z)D5e-xzvcFgC0?z5t!KgSlDMBMZX<+-68a+euQ>XYLl$Fy)^=(cT&Q&eF+ezhaotI
z?68??Gmx!w&Q$o)f?XYhVB>I)!7Mq+Rd2;RK97c+_|KU}RGpMe;m(a`KaW8<Z><1s
znuNieex5>jS{&?bVi7lIWsv@*1jS+l>!t@{V=RX0f^{c$OhA9#)labqx~mqLt&^}`
zN5+xDT$Kdjz@?Kl$<5Z4uZY9v=EiSh;P%$GZC9Y1HY55JyXgzq6~SljN`&Ue(%P2i
zC6J$P;jYK-Ks-4y4=nKqQxW%@@ffU!*$=;+fNg#7NGv%I90Q^^|I?@k&mT$sq0Qi?
zM1(F~AJE;An0!xt%#jHgzn9MahGT7YOhOxPCy)zv8BAJ#6c|qHqV>kKY2lriNRh0&
z;?D1kB42(k5o@kHzn(}#P-tIj)h298{gTKARslRZ6;4x<s2l6?Or0LQZWQ_Rr78FX
z?vH^Ds@d|3W3W9ojl*R0FzSvPg}T1a)b$m0hw)M4{<oSNVUtY9pyHCr9+i?rCq1>!
zpszTNg3ml1NAAQw8ci<z<^<ZyuZ=<n)}_!u?wy4Jf1U#S0jZ>5-;d6M|KPE(>@u;{
z5@&qNWHh4LDygvb%D_&ZoQ)OSTP()@TJOPH<+~UOFHAL>=|0J5X2B%dt~JB@C@<+T
z`o{!vKGQQz^zM%oayi2$3lv@9YckNYtW@aFXOJ&x&GDZyaYBnw@u)2Hqf;8{G-S1^
z75>>2oIRSlPj>5&SU;n!@6+MyMmE(Eug}1I4-mUk7>edp3PSPv*w(25W4vQf;DGlK
zgLML9oI->liYy^F3umyu?!jO8;NQlBzwQBBy7b_$d+^tTBqPZDmBnJhVgPx1P~ObO
zwjH4R4$yrEwDBFF`wnR1J3#l1g(qgu>^s2l9RS~0BhR%9Fj=h8Tj~8GKJs%j=u7T3
z6&Hk-nKYjtnu?VlIt#LW(;(|Vn+kaU>DVP-o(-Aj49E_@1li#kIHQ8aPVdLl=b*2f
zXOTY(#wKGv2!izlW$R3GgDJMM)-x!WW1sVbNZX9N&q8oRbWfkoH9Unp<0(Y<)MYk2
zg|zV$qI*Iiw)H);;VD%2G$GgU6#9&(P~FqUm*6S1ji*rE6AIzUbq@B}gLxRS-CT@#
zS3VW;9di){-}#VL&V$Tl0c6g(kku`KtV14TTMHno$wOp@@_};@nfO9_nV025)pa3M
zrui`6xe(@-3m~gn1lh&~kaa79th4~K&c%>*EQE_l%>{~|reeKC^86wS5W;*K#3FHq
zkk}#rD#SvG6z78<3Y=u3c#x0preYy{MCm@FbRSW=4+w>iD8onbBKU~XeMIR#qI4ft
zMeq@=`-s+kMC(2v6h5L2ACHRQBU<+nt^0`9eXJ}dal5K3rg6x&=Za*>gAZFx4tUGg
zws3xY70#y^B};#syO=y#tkP91ByWBkZxqW*OQ{F{c`=TISUpijV$+U$E+KE2j?yj!
z&|n|-;@Qh^_(d+qksGTN>rQf)lV`hFlf`oV<`ApQ($Dqgm2h$srWD8ROR$l5UV*mb
zu<42$hN!W#jp3E0n&EAcF-0vxBfl>tFIXq>>gAa0;marhZ+Uu?Tb3cCi&GY9I?9%A
zOcXDgie&L<1@-zclf^n+J8Bg+?|7V!T8Nge!eWjW*?}JlByDb6i_lxYQbaDnh)y<A
zKS~hM2|$7TBnriYQY2^z3RbtsU9>T3;Yd)HwFyUp$zru0js(n#*;EThBCnohjI!ej
z1UV5$vKA9m+uO!^$qK|d5ofVBSw}_q5|w1#Zz3*eX20E5YL*4MW&BEnCsA3VSyCde
zT8Z2nft0QKmms!DMyrV?iz?lh7NjKPfHFw1(o+F_9VOua)zbCPSJ7~BcjH(S+ImY?
z7PeV$$;ylR8(&S1G=ev-rW7_7m2=jif=fB_z0fimL@8q3d-L^WnEVv+DYPaADT=+G
zho&gL!jUJpTSFl*L9Xq_bJoyvG*QpNjT7FMpI<{mSSrF|v=MHZ-a+JEZalvn-*dXS
zhPrEa8A?Ycm&wv`qY-HiFRq|KHW{~7SbOrT6*#>ni<x%kn<i67{`W?tbUoKnHcgS)
zNGE<Fk-9*DyU=+4a2>v&kaakshgE`B2wE%XJwcyTB2jRv1o^B7<y7KIJXcU7h^F%?
z>+p3vuEbiLp>xc7@JyYnz<l=xSl?WadiMnRZ2%442r2}zIoK#LXm5UT0~Y68<E_(1
zyv;M-CT*l1l&kyPvk`Yid`sefZHzF|azSgf(l;ShT7W>}*!1N)Hqno4k%F9V1d`E3
z;@EWKA5>9C@Qo^(OvPdjy-e0+ZS&J&1$P;d_7*F4`c17^q<?PwqiURFi}jV@&3kUf
zWweM-*i0&wiKEz^FK@t7F2ki&t6qkNks-SCt2LO2h1-!=MeM|-xlHVT9=vuh=Id!K
zwu`E5c-&Hv)|KJbudPw18X7_6ZM>EnUd!8fjf9Ee%bEvlp)gjCy%S$RZ=n%wYZt6?
zT*}1t7usb0faCiA+HTy>-S#2FY}!fQFdn^?USJhUKV99t7iW*-F7luX@tycVGglu}
z1yUxs^5dJuefxGTJ_!uUmJiv3bF+f~#3_TVg`2Tkv1D@h;k4Ye73yQPI0n}0>+;Gr
zTE!}HrGQO$(Q7LaoFIsbwXOpSw8p4XH15Vr!*L8$DihmO__PMm%oaEL_4?f0o{EeU
z9BhnvJpv}i+^*7Ov7$}QfSvd?BC{4hcjSq%FW-Y-93u80XWhFKiNTxCDi-ZC;;=zK
z|HTZ`27O+%&~Cs-uKlvGp116xEa;Toh}Q-YXt9Pi;1m#gzOoLfA;KQSZ`D21INGq|
z0ec{e*@u}yheEmUei+{sw0b{&pN!v2Vf^3wk%C`PkqTVcOFpzo&r!4`w+Sbm*4iel
zAFZ{xdiYyei<7rr5URQJGrMt#4XsE1Y}J4~BvW+bP6HNUZ5>5Y6~A4Fou*0*LyL_Y
zS9T#lKh$IKZr_fZRkbofUs~1t`aX=Y8m)@P0RGR;w-ukYAIqVdU)zb5f>qFgpT>wF
zFr3@)uJxGm%|^}qdhDp1g}pDoQjZ^dHglgkbh5l2_b{z>RT-<V4iypA2CL%UskN`d
z3%;73w(|P9l6O6To9b4PjNm3U87pw^0c?ap2eGdmI)K!E8~^G65|15<qrQ!fIf$PS
zcjAW#Y#eT8M?3k2gY*^dE4aW%puqhvnAKuwY2R2ak3I}vwc6c!`DjE-yXMv66xR0U
zi-$2$b#1=lI()pM?+|Kx5q__-;uDYHc&}4}^aHTs2vVy$eSZ_bEJA~iQm=z=z4g}*
z`=i+P>oD75X9JAX@1obL$cE|;sz-_N%U{hg{K!_XpPkt;$Pqp}hMz0yMWW`;?HaL?
z>$!U)>NhA3VnCjJY9ltG1{|)q6}#~rjW_@s^zZAvMtr~xBA)L2X(KX_263Kw@IlA%
zn??gqK28(q0B;b*LH?I04)O6#C=T-@qBz2-8O2dPNfgI;6AB)30=tky3zkZg-pj-m
zM7fEtYk^HOzaxs4GodGFLa)+$7EYG;E&MDWS!7xMZlPK}wzz8f2er3+LXnn#QnBS<
zbkg#_^n>N!mc1>XTIMhd%bkoYKW3K9hA|ew+OY-9iZ!zK>@Krz=fyg-o5XC|J!ZDH
zHmsxVP}a#dmvy$?$Lu<WF{N__Gug*6#lC=bvHzHLRlX=?4yHopX!?UWbv?<P9V%Ei
zhp(86<8bEcc#F9?&1LRRe=?75Va&6e%Di0Mn77Me=Hv1K>+X7h^>Ew6eBB?go}Rr}
zFR!(%w@(=B)5Dqh`6jWxJ)78by{E8#e#2P*zQ3~p{cbUTe+L#Yu!sc?EM<cNAG5$g
zrIsuxsDuq3{DcLEEMy^}4_WAtc`PjaJ2qt4OcoyT4I3Ku0vi^6i$#pcV39GOv8dRI
zEIRI678v)Gjfij0V&Y#%`3{RsC}433-?G@mE-Wr7fyF1CL-{R>AGMezjPAt}M{h@Y
znI(?-FH0Jm%M!=#U`eIp`m^M5zpxSGJF?N^J=vJ?gW1^eYrt#S`0-oVgz<-1%7k-l
zVoG0@nzDpVNGV}yDb*}};+Jf4>H?OQx{zh2u47rLO>D}fXqG*xlI2YLguRgF#a>LC
z&8DWEV$;%zO-~=iW~6UtGt<9evnCH@vnMZOFHOF}O6O!avbh;KY+gnq%gy+O<z-G~
znVB=#{LIB{K^C!stP!j*tB}plDq@SKgtDS3^I38BV755Bm@UcP!HTj^u$9?o*{bXx
zP(EU1FU(}+Q&U*Q)XgZ*v5IMbvbEC#S;cf5U^6^e<;<;Y{j8C!a#jIbKYLgy+c5iA
zw*DnAwqZ^t+c;-C%FAry-1ThJ+_zBv%r@l?WL3FSQEp;Yd81f$UIogNtUCW8+dRJy
ztDZleZC=oYsSDy!E?{aw8e3VA&$bp^WW3-HwyiLVZ7<AaI|>i6oeSOBu7!zg_re8i
z&%&K-@1nRdthT5dt1EuM_ANfj_Ah?O>X$5L4NH%)1IrjYxGbF=TGql2mvmr9N~W-*
zC8yc3($4I7=~UKK`XAQ3Jd(96-)ed9%=@3yTMYj=sJCb){z>@j7R|s<XBTecz}b8o
yxoM2xG~~ycDE1CS`vvzqv*!-|gIu%P+mrPZ>v(E!Cn!!(xS*mlC0|pS&Hn>~KapPm

delta 11065
zcmZ9Sdt8s_8^^o5Bcb}Hlg>r7QdFWGq9m2j36Uh^e5zCqp-?&?*^_Q5k&GNdY-<}E
zejC4?#}2=3cEApHG>mP=#_w}IPtX0e{qx-K?{#0-^<4LLpP$#a^ose$E9NI!b6Du9
zV>!*HEbLTr-Ve;$%6sP0WlQJgFZEtJXNC8WQ}G4S7Esw<6k@7W7g?Nocl`x3YlnX+
zHE(jUW}TI@J8JNpSX;x)l^@jSIzeo^lb$W=GrW%Yef2qS7x7=}b9+5;-v)Y~#?w+s
z++D-0ly7&}C<(i*l(NP$wRGK6#(F6G_tYp>d#sc(d&`);^6uUm=Az7Qs$s6meLRzu
zt@~<Ns?w{Op6%*$-2NJtr(9Q`1<%y5e5Kog8n#2(i)XDe=wOYq=YW;+@xd}yr_5-n
zVU5Z?Je!q@Lp5x_;(oY>J)@jDT%(j9vQj1;DO21ITPZ&tDPt{4?$H`0=7^<Y+gi?!
zC=IPOO6OK9WyG;E)~Z}QR-@G8*ZkuN?1pmv8wcgx<HI}1>x5449=B7<PxwM!{H&w$
z#)+{Vw6)Dk8P}%Ex3<M~Sl(<K#%_oS?yRR0c`~3w*zc5`Qg`yHCw~3>#INuUm&K=a
z=U<)D-Hm!ytDOa%>=zuB2hV19Xy-l`-y!?xxf!5A&+o*OnsKh(PPzZQKYsOTFOjkl
zAoAew!c>*=@oam=PI>SGHA1(W@S=|@w^ue3X$^VnMRG>U-Cv@-#J!Y==Pvd6llmNf
znj~A*=a;7`<m=x!DTB^Ls^qKeJwuIed&OS)@{IlhmzQ;#B58-D_a#}sqU(*5RM9~c
z4SD5fb)5)FYbCuT=?_UE=X8r4NyjApB<ZR1y51Z~`y^eJ<oX|7Z>mb`|D(tDfvhpS
zs_TrGR4M7dlFVMy^&%y$lXP0reMy5Z=oYz>j!XJklJ7;*OS-7X)~x=f3|^Du_Fvss
znj|6VLrFHT>v|I;ZI<-9q)u<>dZQ#2Njf9xPnEph)MH!zrfzpa(oIQzZ|Sx3B<+`U
zU6T9Ty52NNJ0*Q2smD9IUV@}8lHO41&O3T+QSa*7#gbl@^gvSRd%9kpq&7*vNa}Y<
z*PAct8A)GB^0=()rAw+)>HKAi?fhkX#rA#DAxf0ARnnW1%s<feMoU^R=@m&2C53&c
zTjWbRDe0CZ|BrON1uAX-NRRDnS>yRXU1z$aU6MYQWcRVImn5l5(p!?ce4^_`OWGjm
ztfapr4f&KTW`3&2c1rzCdAlts;EL{bp`?S7zLDhhnXZ>1sb112lI%a%^^zrRlk~PE
zi!Vqo=nFlzjp}cT?VO~)B@O*j_qsyTvy$#e>VH+&TO_GP(zlX&UDNeuNNSMusY>j+
z9$U(FUAtN(+9%$=u5BuQisx6_w&$lTmvm8*)7N_KVo7Hu_4r1wog?Xm4oXITu7BgF
zWPGdZv`I3%q03Sw9hUUBq{Q!Zy=F<jON#qmuWgWYOVX$x^x7SgzE{cSM?JQxA9bDU
zl0tscWo44CNDBB_uPv7Jfuz1S_1aaE-j?L?i(Z>6>4K!5x2QJqmLA(H>Tk-R&28N-
zOH#X}u6Oj>>5@)J;=k&(lO-LJ^p~WBySm;!Nxw;oy+^e<_w?9)QGZixk-zD7HIlxQ
zH1v19cB`aok_P^v*KU&ZsU-jVdTo)U_a*iDQ?FgAQq!M$Z0-;AnjA^5NpgIs*DjRw
zvLwS_dhKjU&r7oSTdz%*bX=0@BfWN#q!yJfKhk5H@L1Prl5|g}9Wkt<cE>JBH+2#b
zOrm1M8%7*rDiyXE@v0Gnxl|}M;wLH!X2v?A6zj~S-en_tcaqW-MtswVZk?q<wh>=7
zqJz0qSYX66MzroC6=oUnIU{zlAO#U*A!9wJN@$@GtgE!1XvBj?d|<@!-K6ebBi=RQ
znC?=c&WJx7aipbGc-n~H8Zpd@6vRv`8S9s-M2$7bT3VMF@na+U8KlBmBVICMZyTvl
zV8l0!=-NXnEHmPNjA(Bw73Qlbw%f{Bt?W7~eMKhWcXWyujdsk3-Bs~3!h0(Av<LpC
z;v}HBV8<N9(?q8Bp!bMI5_NX~ts#mddXZ=o(eFgB5)E`<4z-S~uUO{597Q<MQKHpE
zKM=J$Le0k!2KR`vh=O{8nuwMXeMxkL$fYOfd!i{seVjl$h-MMJPqc@~+6nYI(KsR}
zXHW&vWTJ~i3Q>eJ=n{xotL?RPf$${~js-CrRai#CKS=l*QHTqOxq@<tMi3n%DkS=e
z=mnxVuAtwD_7MfU!J)J2a2ZfsCE-ybS2xfPL{o|Sx`S%nn61ckXTjnFlC_Y`;12qh
zXuLaWJv^A7c$#E0JRp0IsDY@v2k29xI3fp6&?cf3qF0HkLA9QMcSsaY)YS{Lnka^-
zov4K99?^NCATQ7(5F4kqV^}X>qKYdClT>_;aI%WO5~is*pf_+C&`vDs&C2;&LpQN~
z2y+o<`?IdrRwmrUgcq6w^ED=O_*&uT%?g>K8lLusVU3FSf#Ml&1Tm-&=qsXJB9A_x
z<3#C1KZ97kYU0}$!a5SpCHfyxGf`q+r0|Qr%nx(Aiw~o-Rog4JVu}yL-Co%EGJAn5
z$aI|}o-*<&$+>!Uov&K`hc6q$+{K-6<|;1DXO`UE5K66d6J>tP3cpgtohZcSE+SLW
zbZc+c-Mq62L(|>GFMceIMT(hGu-)X(BEjdAI{bhy_haEG0s~lo5$@0YS-c1wudBw3
zrs2$&#~V_}zq7CkU|ysUz~-<*ah>$=Y2+zhXowf*=OKW?+Cs>@`m<iBAKf3p7mB74
zh!eeG0AK14%Qc#1@&H(_(Jj{)E!T)|2EcO76P9a4b|9P5sm9>cdAisW$O6QJKsJ!=
z6)X$R<AYcqa83}bWOqeSFnYi`7?Iv14r9NGq=68v4Q74W?;5uU!{QH(Z$mB?1T#C~
zHxSfJltuJ8Q6rJVK+q>di9|g@SRYX_5M4Pggn5fsiAqD5r>W^<?d>mxFfS1n!mPxI
zVAfgO!cWG8%^)^J93W}NKu9wNAqK9+Ac)O0z62Iy2jM*ygV|&#W)4OlbT)Vi7K`Mz
z3}!=_ISJirLzxXXHw@QuZ%!TOA_fdWZAK_dMPXQ_3qA>DK@j9*FxT3l%#s|Gqb?x~
z!^hkZDb|n0ufi}Ej$bRa&VD?YbrM&?n5CJyjmdWP9Ym!x@I1xfA?h2dhOmhwy`b83
zxV9R~{76_U&TmBbOdZMw;f33VvH>X0c2r)`{8$cSsigZr*bK!0G8fguFd(}K%p4DK
za~QK_7R14<t0qbr&YV~`QN0_fxVC^ff@zG3cZNZb8I2_VIGout%i3@@kXsu1h|8-n
zEhdIz_*sg~2(+>|ob^P_aM6^*d;tB`nPlDh^2tu=r#l^;YTK#RhFj8P^F?j6HqVBR
zK%y-5d1k52v#JrS2fSi{C!ub!mbT0zNUx<hw*xI7I+EFPE38OK#R$SPT>aHU4aw>s
zud@;-M&fl=2A3yZXJrT=mp&LUn7uASeVr9GA_=01QPg0(3|0|p@({yHts{F!GCO81
zvX?_;Vk8EMHC(A(yfG5VG-#{A=aJ|a1EtSZ^dH4+z;GIXB5)x@m7|!GFpoep&f!(u
z#t^Gz%m%4beR)U0R}b>#%X=7nX?VJc!%@rulkI#I9NCIns6#O`58;Q5W<9tq5~{Yz
zR^*IkNn*(;*r+M9)kbTVXynwEa_S;(#~|sphUuE;tZ4M8onfT7oQAsRqA?BZ#O-Lj
zz)mF2LBNB@uyBzX1&7sRFi5Z)(I5#_kRk`PUk&f>7#4`bfttLC82Gsr&0M>iGuiQu
zVq*+a-c#7bqxK>q0IP{4M_{zsMH^`DvCNq}8Ab@NIS{=b!@473>N=~w(@9Us(O5Le
z83WQ)+|I@Ty&4Ng&QCaX)|>{%A$86)@H$@XEKcNttK!IBG{qs$&W1FtAwR~U{Vv+;
zBFCcPvncy&H@a$F`o>s<;}FNZ{yEg#sAay~%`i-JlopTq<{^^SA-uiGm}alUGdu2K
z@DWLqun;|nM{gV*3*V?T6aB|A3ut4d@erxwSWm13|FZPdEQg^68^jnCP!7d<_%A&#
zO)o&)#%M;hs_aF|ZXz%huZo+%tRb&{MhmRt-CpWGv1bBvX1&C<iEIdph-oYY1-7+t
z6pxcwA_{eP`Y-`{y*0hwnqF^BueYivz8{Cz4M@e{?@e>sLkvyAn&Pclcxx8knuWJ!
zag74>Ovkd6n2Er>wV@g@1v9~F0(xXrDyBNV95}YWI02_Qu_PJ2+UK8IP9#Xf4Cy1@
zOT$ZFpNKK}O9I;?)=k3Hu1{n^;^j$5-Oq_|_HYt9GAT)~eUzlvCM2U4xiW}1lcAiM
z3NI{0*E^P?>pf0kb;4>Yb85djQHJFE?~ov%kbEhm!R>aFJ2bo0&O$T&q_({nKrf3(
z#iJ!1&0LYnycsEpLsM{w@W?<aZ%^rnjP;{EXK=gER9$Imny$1r4N7Wy{Kbq+3>AOU
z^$-^_;kDB=*3^-_0IfEFYSpn}Fbl9T*+lDroA8~D9u5>|=V2WP6nC=Ff<WOh2eUko
zR)vA$%1mhOor3}8m4&Viq{WR?vHZA+;w((sKy4Ns!chVlQ#}P~o`N(_L8>Rz;k4l?
z_RoQvAk9tC6K;YuH~w?c-@%%jV9iai<|bHk6Rf%MoCi0-nw#J!+yrZGTIOK^i<-^8
z6b<vytzlU#SM*tcgT}=y$a*e>?DQO#Cz=;xevX<8S<NEILgzu|u^8LtVBwXI&isBJ
zQsF>LRDX!Do(x2R_1IGwmLPz^wCehzh$v7CtaP5DVF~O*HT$duM*C3BK2)>cx)k=I
zntiBdA4-dwr*K*Z`!LP^+CtUdW)afdmWzEnOtbEq4eKz?I!v<;)2wT=(W2nRXi-@X
zTI92Y<qO+f$c`_8%xpPi`<Fsiy&N+CWst4UgUl-%GRu6(4rN33C?B%M9LOpQAnTh8
zS>X!ET$V#-z7n$L<&fQ93E9p($Vyf*cQ!yYuVTqO(y&C#+=$^BQGz`?(vU+5#FAZt
zy(H3*(eZ0F227NQD8g!U0;de{`Xbibs>_oHi72dB5vYkQM1G^Rl^Oe~nFue&z8qy(
zMQ4K%W>GdK#oG27Wmq7tuZ7F2#n>iB3!8Od>-BIynwC&sQmxlC-dcljMq@{X3s3QI
z4Z<0%t(SC30ITPnv!ig1o4poG+-UXuC$4S4p;D|>weR4@sa`2an@)tP_G8kHrdN+d
zp}uvrjY*{l+Q<TUG<H1XW*{K?iL^xHAf+Dn`W4~u5kqN-K!J<|@)(>Q)EGZ3V($2r
zpf(k?Gb{0WnGOgNidC!XV&(_ECB{tfSc9YHL(N63x}8!p&0=g!_Go%**Q3?3+BHdS
zWGkgDmhLzm_oi6fo7ChwZ$Ro|4SAZ&u^X5he&Mb{N5WV`7AXzjar!H7pq|CaSHflg
zjTqK(V#Y=sq2jbH`@}}9lX0|xxr)y=veCFGv0cb$;AHgn$P#R-@rHsY5*BZmt^L}C
zIu;?0m#|4<fj<VFV;RmFLrXDLlW76*6jh~YSTaqhj`K{i!CE^nCyU#qER`qYOs0;|
ztWCIirf40HJ;`32-Nc6SiD))H*|?DBkt|h2Y{R})SjN)9lpH#@^HdzIa0Yi5y~?qV
zrqXa2&!%XXMI30%#JlCpiBCc2(ZQg08)EdSV3{mk8`Q?LLptsg9V%wxmkN9pnob?v
zOAM*R$tr_5j?K_S??5CRDzRlaZe~x3Orlwvv2GnEI!1J_62U&C+L4<<F<U^Ji4+i<
zOUsF?h}eRw!&MT@dqU7}D+Kd3LH1Tm?$cXf_bQ~qd@IPh3Y0=LtqNDx#ac{zt8i(=
z(4&q1S_Sqs`)V99du~JU*_66LJX_1Bw`kbLe!+r!0)LGVGmfDD!6U(!s#!Pi=hbW)
zE1*8aX=ytSvjql&cKj_6)!VTk6wt}fRs3%|R_7Jk&_PQ&3!kSU$QP5JW(wOtrw|<V
zXQPic;1;MJpEuAueZ|T;g!lGtoZ5;M?AIG;1$7gTn{Xs}S)gj`PE?JkVco?|g>{EH
z?&)+TbE;vZSjiKPOLWI2<aj#jR8P0+k=BG=SU|pLKo0ga;#N^#hlQ&IOCsI)0qVWS
z2Nt;U_@dBeTP?E@FYkuB+dhO4Sj#+7l~l`S@lu1oNUFndIHzFgJ+}wW9UCyeO10^d
z*nm8hV(L>n0gJSOUMi{u23x7Xij~ec={~MD;viPI6H{fAIKGqZVdWyBj!oy~SXkBg
z$}z{uldz$cPQCAz8zxf#KH^jS_eG}2ja5)*;5ITBXMzg4V0TQm3gm_^r)K3gChIlJ
z;Ch@mE9ipZEf7K{QC*KOD;2_P4^B#d)noirYTG#V8d&W?^#V~z6IQ!;n^oADY}EWA
zyCJ+1pIOweD3w|cJM?h?*7V^AFPw=&eT{1)8)jD7;R4%5M;I1jb0aR=n`Lm3U>M9Y
z+bnhU%zLpd+Fef#a|>-!SSWYl+#RpBSj?@*5w&D5eJ3J<ovV0pH?FroD(Kpi4frAg
znT2rQiA>IDg37ktINqIX!d$zvTeGkb*86ZyNNvPfFtHhDkstSCc&ekQ$}myur7El{
z>bS0=7_{b!mm1*;ed{O|HACh}xjoU0v&zOjcrV&(C7k!8soP{zEyM~4#D%?h^IQAb
zFwv_CH=~OE7>nxrstrk6hO23t^kvm_f9!Z$NfVa7W5Y05yB)wCr%2czz-dLHBafT7
z9S`}k1Gw+h(5~nrnh#)~+9AF<fMvPt0G6t$2iZuz6Zdy@oxO4ZiF*GayTluC3shI;
zvn^O*8tC%nDjv1q=C~WfO6~65+EAHs2%FGuEW+^Mu3fZt(=Lkdd94^>|2>2W-e{b%
zV0GD{OENJnJ1K{;%QPB7v|X+8Fpgo3+9$FTD=_^VF>BN;H`46x_*7(f1Up?L76#Nf
zYabLE4RQ1t!bNO8f=o0X+;N04d|#_Q%KGpo?1|8H6Q3Q$XOt#`dbD&FhE|O8CgI+S
zIlIqbC+;Mm4Rc$Ouzl*bS>K9N@jh*Wz1NBlH2WyAu7Vw74luwMg;w|sJw^s1@ff~)
zHH(8(>=%!yct%V*j^cngO2t9JPoQWKX;d5%ZB!f)UD|N5J&FL;K1gW8bUrG!w4tt5
ze2qeww=wJX*pqBb-=Z5P4yNCk_?q4|$uPZVqL}_>^0w*kth4DKY^3RZw#xKRcFObt
zyJ`B+)W`HM)0w7!o7S5?GX2o>F}L6*d<18FIXC64obwyp%*=y#GMmCXo89N;T`hQ*
zuEV)S*JZqG*L}QOw;|lpvYcC4$8byQJZ^3MAvYL4FXA>f`MihCpWN2=6t}Z0=k|7A
zaR>WR+|m9j@9D6FJ2^b$&OL{4m!1lDb#mcuPKUU=)4SZm`2hEHY2;q6cX%)NzPz_b
z1^4zE!u#}g<bA!zai2cN`BOeKxUX+G_w)OM_w&EX{Ri0bfS{FpKu{4648G3?3@kF`
zK_TmS@Sq2LU}ymk3Hy}~8oHDZ9`+Lt4WG}$MtsYMM9kttBd_vdQR#g6=udh0n8|!Z
z%y)c1%wrxA+nGnko<;dOj~biDN00rEN5%KxqsNWq(c{jb{EkPDU(I6@`tsO>I+U;R
z*u=kiT+%Wgo3x9^6(tAo_~g4hBBdK2m*URHrwrl~QZ|7rcw)*9o|MwUlP8|xDU<y8
z#7TubY0^4AdD3>CI{8aJC3QKUoLa!sQY-ni)Z;vTN+h2?Wi!v1@)4gg)q`hFUC3un
zeU8scV|;enc%GG3$LFMd%jZrD;`64h<@2Y#!HX88+w+C#Gx?(QR=zm>E?+V|i>FPW
z$CpiC&9gHY&&i15xf%I<S;k79HzSPa&&cHknS=O>%vF44<}RL}d6E}pzQ~I+Z=(F2
zZ<sZomt;-irCCp-Ji|-pJmj0^2J_On*sbQd@$&h#ykbEdFJF+yD;9<q@ydnwc*P<Q
zUb%QW-@LdE<!gNNk}Z78k_#wr^DWDQ_||1vD7W#g+2eUtb~(yZyej8czAg7DUX`1|
zw=M6%tCz>3T+XZWrt+e^9IoV@<28AI@*VjRyf%Ls7x^uGXMroPD~RX23YPQwf_mPt
zA|{dVUfGj3uDZkbtUki`uKtxb6|Uy{)*R){YdPP)HjO{Cwv8WH*M%QkH-opVd!8RE
zvgAjKviQ-W?|EzSNPeui*7QdEd!Mlj9AEYyUBx<m^eR40t|6X>>3{AT*6*5YtRJ=y
o@KkInswnn4M0<(-+xK2)7n#WZn%Q;E=xoi*AG8;L%}Oo)52N_F761SM