diff --git a/el2_dec_dec_ctl.anno.json b/el2_dec_dec_ctl.anno.json index f75b78b2..81329463 100644 --- a/el2_dec_dec_ctl.anno.json +++ b/el2_dec_dec_ctl.anno.json @@ -349,12 +349,6 @@ "~el2_dec_dec_ctl|el2_dec_dec_ctl>io_ins" ] }, - { - "class":"logger.LogLevelAnnotation", - "globalLogLevel":{ - - } - }, { "class":"firrtl.EmitCircuitAnnotation", "emitter":"firrtl.VerilogEmitter" diff --git a/el2_ifu_bp_ctl.anno.json b/el2_ifu_bp_ctl.anno.json new file mode 100644 index 00000000..4243459a --- /dev/null +++ b/el2_ifu_bp_ctl.anno.json @@ -0,0 +1,25 @@ +[ + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_out", + "sources":[ + "~el2_ifu_bp_ctl|el2_ifu_bp_ctl>io_in" + ] + }, + { + "class":"firrtl.EmitCircuitAnnotation", + "emitter":"firrtl.VerilogEmitter" + }, + { + "class":"firrtl.options.TargetDirAnnotation", + "directory":"." + }, + { + "class":"firrtl.options.OutputAnnotationFileAnnotation", + "file":"el2_ifu_bp_ctl" + }, + { + "class":"firrtl.transforms.BlackBoxTargetDirAnno", + "targetDir":"." + } +] \ No newline at end of file diff --git a/el2_ifu_bp_ctl.fir b/el2_ifu_bp_ctl.fir new file mode 100644 index 00000000..5d9173a0 --- /dev/null +++ b/el2_ifu_bp_ctl.fir @@ -0,0 +1,18 @@ +;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 +circuit el2_ifu_bp_ctl : + module el2_ifu_bp_ctl : + input clock : Clock + input reset : UInt<1> + output io : {flip in : UInt<32>, out : UInt} + + node _T = bits(io.in, 14, 10) @[el2_lib.scala 18:33] + node _T_1 = bits(io.in, 19, 15) @[el2_lib.scala 18:33] + node _T_2 = bits(io.in, 24, 20) @[el2_lib.scala 18:33] + wire _T_3 : UInt<5>[3] @[el2_lib.scala 18:25] + _T_3[0] <= _T @[el2_lib.scala 18:25] + _T_3[1] <= _T_1 @[el2_lib.scala 18:25] + _T_3[2] <= _T_2 @[el2_lib.scala 18:25] + node _T_4 = xor(_T_3[0], _T_3[1]) @[el2_lib.scala 18:113] + node _T_5 = xor(_T_4, _T_3[2]) @[el2_lib.scala 18:113] + io.out <= _T_5 @[el2_ifu_bp_ctl.scala 12:10] + diff --git a/el2_ifu_bp_ctl.v b/el2_ifu_bp_ctl.v new file mode 100644 index 00000000..902ad3b1 --- /dev/null +++ b/el2_ifu_bp_ctl.v @@ -0,0 +1,9 @@ +module el2_ifu_bp_ctl( + input clock, + input reset, + input [31:0] io_in, + output [4:0] io_out +); + wire [4:0] _T_4 = io_in[14:10] ^ io_in[19:15]; // @[el2_lib.scala 18:113] + assign io_out = _T_4 ^ io_in[24:20]; // @[el2_ifu_bp_ctl.scala 12:10] +endmodule diff --git a/project/target/config-classes/$d5de37ac4c1cb7029269$.class b/project/target/config-classes/$d5de37ac4c1cb7029269$.class new file mode 100644 index 00000000..f54feb64 Binary files /dev/null and b/project/target/config-classes/$d5de37ac4c1cb7029269$.class differ diff --git a/project/target/config-classes/$d5de37ac4c1cb7029269.cache b/project/target/config-classes/$d5de37ac4c1cb7029269.cache new file mode 100644 index 00000000..050f36c6 --- /dev/null +++ b/project/target/config-classes/$d5de37ac4c1cb7029269.cache @@ -0,0 +1 @@ +sbt.internal.DslEntry \ No newline at end of file diff --git a/project/target/config-classes/$d5de37ac4c1cb7029269.class b/project/target/config-classes/$d5de37ac4c1cb7029269.class new file mode 100644 index 00000000..8f1b4de9 Binary files /dev/null and b/project/target/config-classes/$d5de37ac4c1cb7029269.class differ diff --git a/project/target/streams/compile/compileIncremental/_global/streams/out b/project/target/streams/compile/compileIncremental/_global/streams/out index 6db8e09d..a24bed6f 100644 --- a/project/target/streams/compile/compileIncremental/_global/streams/out +++ b/project/target/streams/compile/compileIncremental/_global/streams/out @@ -1 +1 @@ -[debug] Full compilation, no sources in previous analysis. +[debug] Full compilation, no sources in previous analysis. diff --git a/project/target/streams/compile/copyResources/_global/streams/out b/project/target/streams/compile/copyResources/_global/streams/out index f25042f2..49995276 100644 --- a/project/target/streams/compile/copyResources/_global/streams/out +++ b/project/target/streams/compile/copyResources/_global/streams/out @@ -1,2 +1,2 @@ -[debug] Copy resource mappings:  -[debug]   +[debug] Copy resource mappings: +[debug] diff --git a/src/main/scala/dec/el2_dec_dec_ctl.scala b/src/main/scala/dec/el2_dec_dec_ctl.scala index 3407d605..0a0d95f4 100644 --- a/src/main/scala/dec/el2_dec_dec_ctl.scala +++ b/src/main/scala/dec/el2_dec_dec_ctl.scala @@ -168,6 +168,6 @@ class el2_dec_dec_ctl extends Module{ pattern(List(-6,4,-3,-2,1,0)).reduce(_&_) } -object dec extends App { - println(chisel3.Driver.emitVerilog(new el2_dec_dec_ctl())) -} +//object dec extends App { +// println((new chisel3.stage.ChiselStage).emitVerilog(new el2_dec_dec_ctl())) +//} diff --git a/src/main/scala/ifu/el2_ifu_bp_ctl.scala b/src/main/scala/ifu/el2_ifu_bp_ctl.scala index c87a3c2c..6739e7a2 100644 --- a/src/main/scala/ifu/el2_ifu_bp_ctl.scala +++ b/src/main/scala/ifu/el2_ifu_bp_ctl.scala @@ -1,5 +1,17 @@ package ifu -class el2_ifu_bp_ctl { +import lib._ +import chisel3._ +import chisel3.util._ +class el2_ifu_bp_ctl extends Module with el2_lib { + val io = IO (new Bundle { + val in = Input(UInt(32.W)) + val out = Output(UInt()) + }) + io.out := el2_btb_tag_hash(io.in) +} + +object ifu extends App { + println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_bp_ctl())) } diff --git a/src/main/scala/lib/el2_lib.scala b/src/main/scala/lib/el2_lib.scala index 37daedc6..5201e6dc 100644 --- a/src/main/scala/lib/el2_lib.scala +++ b/src/main/scala/lib/el2_lib.scala @@ -1,5 +1,25 @@ package lib -trait el2_lib { - +import chisel3._ +trait param { + val BTB_ADDR_HI = 9 + val BTB_ADDR_LO = 2 + val BTB_BTAG_SIZE = 5 + val BTB_INDEX1_HI = 9 + val BTB_INDEX1_LO = 2 + val BTB_INDEX2_HI = 17 + val BTB_INDEX2_LO = 10 + val BTB_INDEX3_HI = 25 + val BTB_INDEX3_LO = 18 +} + +trait el2_lib extends param{ + def el2_btb_tag_hash(pc : UInt) = + (VecInit.tabulate(3)(i => pc(BTB_ADDR_HI+((i+1)*(BTB_BTAG_SIZE)),BTB_ADDR_HI+(i*BTB_BTAG_SIZE)+1))).reduce(_^_) + + def el2_btb_tag_hash_fold(pc : UInt) = + pc(BTB_ADDR_HI+(2*BTB_BTAG_SIZE),BTB_ADDR_HI+BTB_BTAG_SIZE+1)^pc(BTB_ADDR_HI+BTB_BTAG_SIZE,BTB_ADDR_HI+1) + + def el2_btb_addr_hash(pc : UInt) : UInt = 0.U + // def el2_btb_ghr_hash } diff --git a/target/scala-2.12/classes/META-INF/chisel-module-template.kotlin_module b/target/scala-2.12/classes/META-INF/chisel-module-template.kotlin_module new file mode 100644 index 00000000..a49347af Binary files /dev/null and b/target/scala-2.12/classes/META-INF/chisel-module-template.kotlin_module differ diff --git a/target/scala-2.12/classes/dec/dec$.class b/target/scala-2.12/classes/dec/dec$.class deleted file mode 100644 index 36513d4d..00000000 Binary files a/target/scala-2.12/classes/dec/dec$.class and /dev/null differ diff --git a/target/scala-2.12/classes/dec/dec$delayedInit$body.class b/target/scala-2.12/classes/dec/dec$delayedInit$body.class deleted file mode 100644 index c6a4f70b..00000000 Binary files a/target/scala-2.12/classes/dec/dec$delayedInit$body.class and /dev/null differ diff --git a/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl$$anon$1.class b/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl$$anon$1.class new file mode 100644 index 00000000..d883e47a Binary files /dev/null and b/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl$$anon$1.class differ diff --git a/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl.class b/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl.class new file mode 100644 index 00000000..88e48ee2 Binary files /dev/null and b/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl.class differ diff --git a/target/scala-2.12/classes/ifu/ifu$.class b/target/scala-2.12/classes/ifu/ifu$.class new file mode 100644 index 00000000..e8974bf9 Binary files /dev/null and b/target/scala-2.12/classes/ifu/ifu$.class differ diff --git a/target/scala-2.12/classes/ifu/ifu$delayedInit$body.class b/target/scala-2.12/classes/ifu/ifu$delayedInit$body.class new file mode 100644 index 00000000..b646c037 Binary files /dev/null and b/target/scala-2.12/classes/ifu/ifu$delayedInit$body.class differ diff --git a/target/scala-2.12/classes/dec/dec.class b/target/scala-2.12/classes/ifu/ifu.class similarity index 60% rename from target/scala-2.12/classes/dec/dec.class rename to target/scala-2.12/classes/ifu/ifu.class index a4472f55..cefd58d2 100644 Binary files a/target/scala-2.12/classes/dec/dec.class and b/target/scala-2.12/classes/ifu/ifu.class differ diff --git a/target/scala-2.12/classes/lib/el2_lib.class b/target/scala-2.12/classes/lib/el2_lib.class new file mode 100644 index 00000000..7f966cbd Binary files /dev/null and b/target/scala-2.12/classes/lib/el2_lib.class differ diff --git a/target/scala-2.12/classes/lib/param.class b/target/scala-2.12/classes/lib/param.class new file mode 100644 index 00000000..52f6d713 Binary files /dev/null and b/target/scala-2.12/classes/lib/param.class differ diff --git a/target/streams/_global/_global/checkBuildSources/_global/streams/out b/target/streams/_global/_global/checkBuildSources/_global/streams/out index 24ce6f61..6c981659 100644 --- a/target/streams/_global/_global/checkBuildSources/_global/streams/out +++ b/target/streams/_global/_global/checkBuildSources/_global/streams/out @@ -1 +1 @@ -[debug] Checking for meta build source updates +[debug] Checking for meta build source updates