From c8e34781f34969bbd645bb1cea3f1c7c0b22d072 Mon Sep 17 00:00:00 2001 From: waleed-lm Date: Thu, 17 Dec 2020 15:07:47 +0500 Subject: [PATCH] Drg Reset Top updated --- .idea/modules/chisel-module-template.iml | 2 +- firrtl_black_box_resource_files.f | 2 +- .../$18a829103fa0c5e4c5b8.class | Bin 652 -> 0 bytes ...b8$.class => $f0dc2d2ede6b95b39ac0$.class} | Bin 2561 -> 2561 bytes ...c5b8.cache => $f0dc2d2ede6b95b39ac0.cache} | 0 .../$f0dc2d2ede6b95b39ac0.class | Bin 0 -> 652 bytes ...bb$.class => $18f43a52092506dc788e$.class} | Bin 1930 -> 1930 bytes ...6fa6.cache => $18f43a52092506dc788e.cache} | 0 .../$18f43a52092506dc788e.class | Bin 0 -> 642 bytes .../$2f582474508fa9116fa6.class | Bin 642 -> 0 bytes .../$55450b4b5846f82647bb.class | Bin 642 -> 0 bytes .../$56ce29e05313671701a9.class | Bin 642 -> 0 bytes ...0c$.class => $5ef5775acc184221fdd6$.class} | Bin 3421 -> 3421 bytes ...fc0c.cache => $5ef5775acc184221fdd6.cache} | 0 ...fc0c.class => $5ef5775acc184221fdd6.class} | Bin 1323 -> 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HcmV?d00001 diff --git a/project/target/config-classes/$ece07980155a36e6d2f2.class b/project/target/config-classes/$ece07980155a36e6d2f2.class deleted file mode 100644 index f03320c26056afcdc601e9f4bceb55ba84b1bccd..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 642 zcmZva%Wm307={0_ag1#s5C|zWM1oM!OTfW|P>8xPm!NP7atNtfwTm$xz=^RHUn-HO zs=DZ+i#|XfqYqMbQmMO)H2VHCIy#I0%&$K`egeP=>>=1Kk~ukUG~XUq>vdc^C8vh6 zPCb zw2X?U`v?w3-W*$4cFDq`Df0ADP0gi^{lFz>2snM?6A!`fEwpKBsLcvYzN)Dm%Cf4d zJ;X6%RYT{LGeKhqHDlOrrNY}8FV3iRavXzMzH~X}rG|{ZtjX-hEze=N)hG zW?4p|chlCWKZ#3Bf@`WIrvw-2llO-xlHfk$s{)Ej9MN`Ar|y{P)T)wcNbFjuV(Lo@ zCeuY+Z>b!S*g@-oZj~?6r5I#^AoKFoh|aQU`^2@eC3iimXZ!Akt|a|rEkzzAnlPSp zXQN&b!L!lRwzCLCAtpcswj&^bDAFl`Ak=XTfRuj)Geag zw&P>pbZpv3_WO?IksZ4Yuur_2%sZk@JU9y!Ira>J~)&k-YSJng5 zGHRagBRHLSOJWh(r7Mf2$nz&PH`g}t1D9SQ!1~^&9)jNoXs>9f$BSI4p{aews;a3& zgt@7zp=-uFQR5@6#(0$voyE^Dy!&2gls{?gNOL{vBY`iH57mMac#nC++!4MlYN{%| zn)b@sO{~}*FK&Dxo?Dx0FZ4cNNMlS;Ulo!kcvmW`VNRMBvawH%2p;ZAYOmyYH*eNe z6nZ!BPDZnY#3iw!(qc0hXIdX$qG%G|liMj|4>)Ap%r6H6X=*3kCdJzGiU*;*, flip hready : UInt<1>, flip hresp : UInt<1>}, out : {haddr : UInt<32>, hburst : UInt<3>, hmastlock : UInt<1>, hprot : UInt<4>, hsize : UInt<3>, htrans : UInt<2>, hwrite : UInt<1>, hwdata : UInt<64>}} @[quasar.scala 278:42] - _T_12.out.hwdata <= UInt<64>("h00") @[quasar.scala 278:42] - _T_12.out.hwrite <= UInt<1>("h00") @[quasar.scala 278:42] - _T_12.out.htrans <= UInt<2>("h00") @[quasar.scala 278:42] - _T_12.out.hsize <= UInt<3>("h00") @[quasar.scala 278:42] - _T_12.out.hprot <= UInt<4>("h00") @[quasar.scala 278:42] - _T_12.out.hmastlock <= UInt<1>("h00") @[quasar.scala 278:42] - _T_12.out.hburst <= UInt<3>("h00") @[quasar.scala 278:42] - _T_12.out.haddr <= UInt<32>("h00") @[quasar.scala 278:42] - _T_12.in.hresp <= UInt<1>("h00") @[quasar.scala 278:42] - _T_12.in.hready <= UInt<1>("h00") @[quasar.scala 278:42] - _T_12.in.hrdata <= UInt<64>("h00") @[quasar.scala 278:42] - io.lsu_ahb.out.hwdata <= _T_12.out.hwdata @[quasar.scala 278:27] - io.lsu_ahb.out.hwrite <= _T_12.out.hwrite @[quasar.scala 278:27] - io.lsu_ahb.out.htrans <= _T_12.out.htrans @[quasar.scala 278:27] - io.lsu_ahb.out.hsize <= _T_12.out.hsize @[quasar.scala 278:27] - io.lsu_ahb.out.hprot <= _T_12.out.hprot @[quasar.scala 278:27] - io.lsu_ahb.out.hmastlock <= _T_12.out.hmastlock @[quasar.scala 278:27] - io.lsu_ahb.out.hburst <= _T_12.out.hburst @[quasar.scala 278:27] - io.lsu_ahb.out.haddr <= _T_12.out.haddr @[quasar.scala 278:27] - _T_12.in.hresp <= io.lsu_ahb.in.hresp @[quasar.scala 278:27] - _T_12.in.hready <= io.lsu_ahb.in.hready @[quasar.scala 278:27] - _T_12.in.hrdata <= io.lsu_ahb.in.hrdata @[quasar.scala 278:27] - wire _T_13 : {in : {flip hrdata : UInt<64>, flip hready : UInt<1>, flip hresp : UInt<1>}, out : {haddr : UInt<32>, hburst : UInt<3>, hmastlock : UInt<1>, hprot : UInt<4>, hsize : UInt<3>, htrans : UInt<2>, hwrite : UInt<1>, hwdata : UInt<64>}} @[quasar.scala 279:42] - _T_13.out.hwdata <= UInt<64>("h00") @[quasar.scala 279:42] - _T_13.out.hwrite <= UInt<1>("h00") @[quasar.scala 279:42] - _T_13.out.htrans <= UInt<2>("h00") @[quasar.scala 279:42] - _T_13.out.hsize <= UInt<3>("h00") @[quasar.scala 279:42] - _T_13.out.hprot <= UInt<4>("h00") @[quasar.scala 279:42] - _T_13.out.hmastlock <= UInt<1>("h00") @[quasar.scala 279:42] - _T_13.out.hburst <= UInt<3>("h00") @[quasar.scala 279:42] - _T_13.out.haddr <= UInt<32>("h00") @[quasar.scala 279:42] - _T_13.in.hresp <= UInt<1>("h00") @[quasar.scala 279:42] - _T_13.in.hready <= UInt<1>("h00") @[quasar.scala 279:42] - _T_13.in.hrdata <= UInt<64>("h00") @[quasar.scala 279:42] - io.ifu_ahb.out.hwdata <= _T_13.out.hwdata @[quasar.scala 279:27] - io.ifu_ahb.out.hwrite <= _T_13.out.hwrite @[quasar.scala 279:27] - io.ifu_ahb.out.htrans <= _T_13.out.htrans @[quasar.scala 279:27] - io.ifu_ahb.out.hsize <= _T_13.out.hsize @[quasar.scala 279:27] - io.ifu_ahb.out.hprot <= _T_13.out.hprot @[quasar.scala 279:27] - io.ifu_ahb.out.hmastlock <= _T_13.out.hmastlock @[quasar.scala 279:27] - io.ifu_ahb.out.hburst <= _T_13.out.hburst @[quasar.scala 279:27] - io.ifu_ahb.out.haddr <= _T_13.out.haddr @[quasar.scala 279:27] - _T_13.in.hresp <= io.ifu_ahb.in.hresp @[quasar.scala 279:27] - _T_13.in.hready <= io.ifu_ahb.in.hready @[quasar.scala 279:27] - _T_13.in.hrdata <= io.ifu_ahb.in.hrdata @[quasar.scala 279:27] - wire _T_14 : {in : {flip hrdata : UInt<64>, flip hready : UInt<1>, flip hresp : UInt<1>}, out : {haddr : UInt<32>, hburst : UInt<3>, hmastlock : UInt<1>, hprot : UInt<4>, hsize : UInt<3>, htrans : UInt<2>, hwrite : UInt<1>, hwdata : UInt<64>}} @[quasar.scala 280:42] - _T_14.out.hwdata <= UInt<64>("h00") @[quasar.scala 280:42] - _T_14.out.hwrite <= UInt<1>("h00") @[quasar.scala 280:42] - _T_14.out.htrans <= UInt<2>("h00") @[quasar.scala 280:42] - _T_14.out.hsize <= UInt<3>("h00") @[quasar.scala 280:42] - _T_14.out.hprot <= UInt<4>("h00") @[quasar.scala 280:42] - _T_14.out.hmastlock <= UInt<1>("h00") @[quasar.scala 280:42] - _T_14.out.hburst <= UInt<3>("h00") @[quasar.scala 280:42] - _T_14.out.haddr <= UInt<32>("h00") @[quasar.scala 280:42] - _T_14.in.hresp <= UInt<1>("h00") @[quasar.scala 280:42] - _T_14.in.hready <= UInt<1>("h00") @[quasar.scala 280:42] - _T_14.in.hrdata <= UInt<64>("h00") @[quasar.scala 280:42] - io.sb_ahb.out.hwdata <= _T_14.out.hwdata @[quasar.scala 280:27] - io.sb_ahb.out.hwrite <= _T_14.out.hwrite @[quasar.scala 280:27] - io.sb_ahb.out.htrans <= _T_14.out.htrans @[quasar.scala 280:27] - io.sb_ahb.out.hsize <= _T_14.out.hsize @[quasar.scala 280:27] - io.sb_ahb.out.hprot <= _T_14.out.hprot @[quasar.scala 280:27] - io.sb_ahb.out.hmastlock <= _T_14.out.hmastlock @[quasar.scala 280:27] - io.sb_ahb.out.hburst <= _T_14.out.hburst @[quasar.scala 280:27] - io.sb_ahb.out.haddr <= _T_14.out.haddr @[quasar.scala 280:27] - _T_14.in.hresp <= io.sb_ahb.in.hresp @[quasar.scala 280:27] - _T_14.in.hready <= io.sb_ahb.in.hready @[quasar.scala 280:27] - _T_14.in.hrdata <= io.sb_ahb.in.hrdata @[quasar.scala 280:27] - wire _T_15 : {flip sig : {in : {flip hrdata : UInt<64>, flip hready : UInt<1>, flip hresp : UInt<1>}, out : {haddr : UInt<32>, hburst : UInt<3>, hmastlock : UInt<1>, hprot : UInt<4>, hsize : UInt<3>, htrans : UInt<2>, hwrite : UInt<1>, hwdata : UInt<64>}}, flip hsel : UInt<1>, flip hreadyin : UInt<1>} @[quasar.scala 281:42] - _T_15.hreadyin <= UInt<1>("h00") @[quasar.scala 281:42] - _T_15.hsel <= UInt<1>("h00") @[quasar.scala 281:42] - _T_15.sig.out.hwdata <= UInt<64>("h00") @[quasar.scala 281:42] - _T_15.sig.out.hwrite <= UInt<1>("h00") @[quasar.scala 281:42] - _T_15.sig.out.htrans <= UInt<2>("h00") @[quasar.scala 281:42] - _T_15.sig.out.hsize <= UInt<3>("h00") @[quasar.scala 281:42] - _T_15.sig.out.hprot <= UInt<4>("h00") @[quasar.scala 281:42] - _T_15.sig.out.hmastlock <= UInt<1>("h00") @[quasar.scala 281:42] - _T_15.sig.out.hburst <= UInt<3>("h00") @[quasar.scala 281:42] - _T_15.sig.out.haddr <= UInt<32>("h00") @[quasar.scala 281:42] - _T_15.sig.in.hresp <= UInt<1>("h00") @[quasar.scala 281:42] - _T_15.sig.in.hready <= UInt<1>("h00") @[quasar.scala 281:42] - _T_15.sig.in.hrdata <= UInt<64>("h00") @[quasar.scala 281:42] - _T_15.hreadyin <= io.dma_ahb.hreadyin @[quasar.scala 281:27] - _T_15.hsel <= io.dma_ahb.hsel @[quasar.scala 281:27] - _T_15.sig.out.hwdata <= io.dma_ahb.sig.out.hwdata @[quasar.scala 281:27] - _T_15.sig.out.hwrite <= io.dma_ahb.sig.out.hwrite @[quasar.scala 281:27] - _T_15.sig.out.htrans <= io.dma_ahb.sig.out.htrans @[quasar.scala 281:27] - _T_15.sig.out.hsize <= io.dma_ahb.sig.out.hsize @[quasar.scala 281:27] - _T_15.sig.out.hprot <= io.dma_ahb.sig.out.hprot @[quasar.scala 281:27] - _T_15.sig.out.hmastlock <= io.dma_ahb.sig.out.hmastlock @[quasar.scala 281:27] - _T_15.sig.out.hburst <= io.dma_ahb.sig.out.hburst @[quasar.scala 281:27] - _T_15.sig.out.haddr <= io.dma_ahb.sig.out.haddr @[quasar.scala 281:27] - io.dma_ahb.sig.in.hresp <= _T_15.sig.in.hresp @[quasar.scala 281:27] - io.dma_ahb.sig.in.hready <= _T_15.sig.in.hready @[quasar.scala 281:27] - io.dma_ahb.sig.in.hrdata <= _T_15.sig.in.hrdata @[quasar.scala 281:27] - io.dma_axi.r.bits.last <= dma_ctrl.io.dma_axi.r.bits.last @[quasar.scala 282:27] - io.dma_axi.r.bits.resp <= dma_ctrl.io.dma_axi.r.bits.resp @[quasar.scala 282:27] - io.dma_axi.r.bits.data <= dma_ctrl.io.dma_axi.r.bits.data @[quasar.scala 282:27] - io.dma_axi.r.bits.id <= dma_ctrl.io.dma_axi.r.bits.id @[quasar.scala 282:27] - io.dma_axi.r.valid <= dma_ctrl.io.dma_axi.r.valid @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.r.ready <= io.dma_axi.r.ready @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.qos <= io.dma_axi.ar.bits.qos @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.prot <= io.dma_axi.ar.bits.prot @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.cache <= io.dma_axi.ar.bits.cache @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.lock <= io.dma_axi.ar.bits.lock @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.burst <= io.dma_axi.ar.bits.burst @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.size <= io.dma_axi.ar.bits.size @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.len <= io.dma_axi.ar.bits.len @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.region <= io.dma_axi.ar.bits.region @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.addr <= io.dma_axi.ar.bits.addr @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.bits.id <= io.dma_axi.ar.bits.id @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.ar.valid <= io.dma_axi.ar.valid @[quasar.scala 282:27] - io.dma_axi.ar.ready <= dma_ctrl.io.dma_axi.ar.ready @[quasar.scala 282:27] - io.dma_axi.b.bits.id <= dma_ctrl.io.dma_axi.b.bits.id @[quasar.scala 282:27] - io.dma_axi.b.bits.resp <= dma_ctrl.io.dma_axi.b.bits.resp @[quasar.scala 282:27] - io.dma_axi.b.valid <= dma_ctrl.io.dma_axi.b.valid @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.b.ready <= io.dma_axi.b.ready @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.w.bits.last <= io.dma_axi.w.bits.last @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.w.bits.strb <= io.dma_axi.w.bits.strb @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.w.bits.data <= io.dma_axi.w.bits.data @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.w.valid <= io.dma_axi.w.valid @[quasar.scala 282:27] - io.dma_axi.w.ready <= dma_ctrl.io.dma_axi.w.ready @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.qos <= io.dma_axi.aw.bits.qos @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.prot <= io.dma_axi.aw.bits.prot @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.cache <= io.dma_axi.aw.bits.cache @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.lock <= io.dma_axi.aw.bits.lock @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.burst <= io.dma_axi.aw.bits.burst @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.size <= io.dma_axi.aw.bits.size @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.len <= io.dma_axi.aw.bits.len @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.region <= io.dma_axi.aw.bits.region @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.addr <= io.dma_axi.aw.bits.addr @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.bits.id <= io.dma_axi.aw.bits.id @[quasar.scala 282:27] - dma_ctrl.io.dma_axi.aw.valid <= io.dma_axi.aw.valid @[quasar.scala 282:27] - io.dma_axi.aw.ready <= dma_ctrl.io.dma_axi.aw.ready @[quasar.scala 282:27] - dbg.io.sb_axi.r.bits.last <= io.sb_axi.r.bits.last @[quasar.scala 283:27] - dbg.io.sb_axi.r.bits.resp <= io.sb_axi.r.bits.resp @[quasar.scala 283:27] - dbg.io.sb_axi.r.bits.data <= io.sb_axi.r.bits.data @[quasar.scala 283:27] - dbg.io.sb_axi.r.bits.id <= io.sb_axi.r.bits.id @[quasar.scala 283:27] - dbg.io.sb_axi.r.valid <= io.sb_axi.r.valid @[quasar.scala 283:27] - io.sb_axi.r.ready <= dbg.io.sb_axi.r.ready @[quasar.scala 283:27] - io.sb_axi.ar.bits.qos <= dbg.io.sb_axi.ar.bits.qos @[quasar.scala 283:27] - io.sb_axi.ar.bits.prot <= dbg.io.sb_axi.ar.bits.prot @[quasar.scala 283:27] - io.sb_axi.ar.bits.cache <= dbg.io.sb_axi.ar.bits.cache @[quasar.scala 283:27] - io.sb_axi.ar.bits.lock <= dbg.io.sb_axi.ar.bits.lock @[quasar.scala 283:27] - io.sb_axi.ar.bits.burst <= dbg.io.sb_axi.ar.bits.burst @[quasar.scala 283:27] - io.sb_axi.ar.bits.size <= dbg.io.sb_axi.ar.bits.size @[quasar.scala 283:27] - io.sb_axi.ar.bits.len <= dbg.io.sb_axi.ar.bits.len @[quasar.scala 283:27] - io.sb_axi.ar.bits.region <= dbg.io.sb_axi.ar.bits.region @[quasar.scala 283:27] - io.sb_axi.ar.bits.addr <= dbg.io.sb_axi.ar.bits.addr @[quasar.scala 283:27] - io.sb_axi.ar.bits.id <= dbg.io.sb_axi.ar.bits.id @[quasar.scala 283:27] - io.sb_axi.ar.valid <= dbg.io.sb_axi.ar.valid @[quasar.scala 283:27] - dbg.io.sb_axi.ar.ready <= io.sb_axi.ar.ready @[quasar.scala 283:27] - dbg.io.sb_axi.b.bits.id <= io.sb_axi.b.bits.id @[quasar.scala 283:27] - dbg.io.sb_axi.b.bits.resp <= io.sb_axi.b.bits.resp @[quasar.scala 283:27] - dbg.io.sb_axi.b.valid <= io.sb_axi.b.valid @[quasar.scala 283:27] - io.sb_axi.b.ready <= dbg.io.sb_axi.b.ready @[quasar.scala 283:27] - io.sb_axi.w.bits.last <= dbg.io.sb_axi.w.bits.last @[quasar.scala 283:27] - io.sb_axi.w.bits.strb <= dbg.io.sb_axi.w.bits.strb @[quasar.scala 283:27] - io.sb_axi.w.bits.data <= dbg.io.sb_axi.w.bits.data @[quasar.scala 283:27] - io.sb_axi.w.valid <= dbg.io.sb_axi.w.valid @[quasar.scala 283:27] - dbg.io.sb_axi.w.ready <= io.sb_axi.w.ready @[quasar.scala 283:27] - io.sb_axi.aw.bits.qos <= dbg.io.sb_axi.aw.bits.qos @[quasar.scala 283:27] - io.sb_axi.aw.bits.prot <= dbg.io.sb_axi.aw.bits.prot @[quasar.scala 283:27] - io.sb_axi.aw.bits.cache <= dbg.io.sb_axi.aw.bits.cache @[quasar.scala 283:27] - io.sb_axi.aw.bits.lock <= dbg.io.sb_axi.aw.bits.lock @[quasar.scala 283:27] - io.sb_axi.aw.bits.burst <= dbg.io.sb_axi.aw.bits.burst @[quasar.scala 283:27] - io.sb_axi.aw.bits.size <= dbg.io.sb_axi.aw.bits.size @[quasar.scala 283:27] - io.sb_axi.aw.bits.len <= dbg.io.sb_axi.aw.bits.len @[quasar.scala 283:27] - io.sb_axi.aw.bits.region <= dbg.io.sb_axi.aw.bits.region @[quasar.scala 283:27] - io.sb_axi.aw.bits.addr <= dbg.io.sb_axi.aw.bits.addr @[quasar.scala 283:27] - io.sb_axi.aw.bits.id <= dbg.io.sb_axi.aw.bits.id @[quasar.scala 283:27] - io.sb_axi.aw.valid <= dbg.io.sb_axi.aw.valid @[quasar.scala 283:27] - dbg.io.sb_axi.aw.ready <= io.sb_axi.aw.ready @[quasar.scala 283:27] - ifu.io.ifu.r.bits.last <= io.ifu_axi.r.bits.last @[quasar.scala 284:27] - ifu.io.ifu.r.bits.resp <= io.ifu_axi.r.bits.resp @[quasar.scala 284:27] - ifu.io.ifu.r.bits.data <= io.ifu_axi.r.bits.data @[quasar.scala 284:27] - ifu.io.ifu.r.bits.id <= io.ifu_axi.r.bits.id @[quasar.scala 284:27] - ifu.io.ifu.r.valid <= io.ifu_axi.r.valid @[quasar.scala 284:27] - io.ifu_axi.r.ready <= ifu.io.ifu.r.ready @[quasar.scala 284:27] - io.ifu_axi.ar.bits.qos <= ifu.io.ifu.ar.bits.qos @[quasar.scala 284:27] - io.ifu_axi.ar.bits.prot <= ifu.io.ifu.ar.bits.prot @[quasar.scala 284:27] - io.ifu_axi.ar.bits.cache <= ifu.io.ifu.ar.bits.cache @[quasar.scala 284:27] - io.ifu_axi.ar.bits.lock <= ifu.io.ifu.ar.bits.lock @[quasar.scala 284:27] - io.ifu_axi.ar.bits.burst <= ifu.io.ifu.ar.bits.burst @[quasar.scala 284:27] - io.ifu_axi.ar.bits.size <= ifu.io.ifu.ar.bits.size @[quasar.scala 284:27] - io.ifu_axi.ar.bits.len <= ifu.io.ifu.ar.bits.len @[quasar.scala 284:27] - io.ifu_axi.ar.bits.region <= ifu.io.ifu.ar.bits.region @[quasar.scala 284:27] - io.ifu_axi.ar.bits.addr <= ifu.io.ifu.ar.bits.addr @[quasar.scala 284:27] - io.ifu_axi.ar.bits.id <= ifu.io.ifu.ar.bits.id @[quasar.scala 284:27] - io.ifu_axi.ar.valid <= ifu.io.ifu.ar.valid @[quasar.scala 284:27] - ifu.io.ifu.ar.ready <= io.ifu_axi.ar.ready @[quasar.scala 284:27] - ifu.io.ifu.b.bits.id <= io.ifu_axi.b.bits.id @[quasar.scala 284:27] - ifu.io.ifu.b.bits.resp <= io.ifu_axi.b.bits.resp @[quasar.scala 284:27] - ifu.io.ifu.b.valid <= io.ifu_axi.b.valid @[quasar.scala 284:27] - io.ifu_axi.b.ready <= ifu.io.ifu.b.ready @[quasar.scala 284:27] - io.ifu_axi.w.bits.last <= ifu.io.ifu.w.bits.last @[quasar.scala 284:27] - io.ifu_axi.w.bits.strb <= ifu.io.ifu.w.bits.strb @[quasar.scala 284:27] - io.ifu_axi.w.bits.data <= ifu.io.ifu.w.bits.data @[quasar.scala 284:27] - io.ifu_axi.w.valid <= ifu.io.ifu.w.valid @[quasar.scala 284:27] - ifu.io.ifu.w.ready <= io.ifu_axi.w.ready @[quasar.scala 284:27] - io.ifu_axi.aw.bits.qos <= ifu.io.ifu.aw.bits.qos @[quasar.scala 284:27] - io.ifu_axi.aw.bits.prot <= ifu.io.ifu.aw.bits.prot @[quasar.scala 284:27] - io.ifu_axi.aw.bits.cache <= ifu.io.ifu.aw.bits.cache @[quasar.scala 284:27] - io.ifu_axi.aw.bits.lock <= ifu.io.ifu.aw.bits.lock @[quasar.scala 284:27] - io.ifu_axi.aw.bits.burst <= ifu.io.ifu.aw.bits.burst @[quasar.scala 284:27] - io.ifu_axi.aw.bits.size <= ifu.io.ifu.aw.bits.size @[quasar.scala 284:27] - io.ifu_axi.aw.bits.len <= ifu.io.ifu.aw.bits.len @[quasar.scala 284:27] - io.ifu_axi.aw.bits.region <= ifu.io.ifu.aw.bits.region @[quasar.scala 284:27] - io.ifu_axi.aw.bits.addr <= ifu.io.ifu.aw.bits.addr @[quasar.scala 284:27] - io.ifu_axi.aw.bits.id <= ifu.io.ifu.aw.bits.id @[quasar.scala 284:27] - io.ifu_axi.aw.valid <= ifu.io.ifu.aw.valid @[quasar.scala 284:27] - ifu.io.ifu.aw.ready <= io.ifu_axi.aw.ready @[quasar.scala 284:27] - lsu.io.axi.r.bits.last <= io.lsu_axi.r.bits.last @[quasar.scala 285:27] - lsu.io.axi.r.bits.resp <= io.lsu_axi.r.bits.resp @[quasar.scala 285:27] - lsu.io.axi.r.bits.data <= io.lsu_axi.r.bits.data @[quasar.scala 285:27] - lsu.io.axi.r.bits.id <= io.lsu_axi.r.bits.id @[quasar.scala 285:27] - lsu.io.axi.r.valid <= io.lsu_axi.r.valid @[quasar.scala 285:27] - io.lsu_axi.r.ready <= lsu.io.axi.r.ready @[quasar.scala 285:27] - io.lsu_axi.ar.bits.qos <= lsu.io.axi.ar.bits.qos @[quasar.scala 285:27] - io.lsu_axi.ar.bits.prot <= lsu.io.axi.ar.bits.prot @[quasar.scala 285:27] - io.lsu_axi.ar.bits.cache <= lsu.io.axi.ar.bits.cache @[quasar.scala 285:27] - io.lsu_axi.ar.bits.lock <= lsu.io.axi.ar.bits.lock @[quasar.scala 285:27] - io.lsu_axi.ar.bits.burst <= lsu.io.axi.ar.bits.burst @[quasar.scala 285:27] - io.lsu_axi.ar.bits.size <= lsu.io.axi.ar.bits.size @[quasar.scala 285:27] - io.lsu_axi.ar.bits.len <= lsu.io.axi.ar.bits.len @[quasar.scala 285:27] - io.lsu_axi.ar.bits.region <= lsu.io.axi.ar.bits.region @[quasar.scala 285:27] - io.lsu_axi.ar.bits.addr <= lsu.io.axi.ar.bits.addr @[quasar.scala 285:27] - io.lsu_axi.ar.bits.id <= lsu.io.axi.ar.bits.id @[quasar.scala 285:27] - io.lsu_axi.ar.valid <= lsu.io.axi.ar.valid @[quasar.scala 285:27] - lsu.io.axi.ar.ready <= io.lsu_axi.ar.ready @[quasar.scala 285:27] - lsu.io.axi.b.bits.id <= io.lsu_axi.b.bits.id @[quasar.scala 285:27] - lsu.io.axi.b.bits.resp <= io.lsu_axi.b.bits.resp @[quasar.scala 285:27] - lsu.io.axi.b.valid <= io.lsu_axi.b.valid @[quasar.scala 285:27] - io.lsu_axi.b.ready <= lsu.io.axi.b.ready @[quasar.scala 285:27] - io.lsu_axi.w.bits.last <= lsu.io.axi.w.bits.last @[quasar.scala 285:27] - io.lsu_axi.w.bits.strb <= lsu.io.axi.w.bits.strb @[quasar.scala 285:27] - io.lsu_axi.w.bits.data <= lsu.io.axi.w.bits.data @[quasar.scala 285:27] - io.lsu_axi.w.valid <= lsu.io.axi.w.valid @[quasar.scala 285:27] - lsu.io.axi.w.ready <= io.lsu_axi.w.ready @[quasar.scala 285:27] - io.lsu_axi.aw.bits.qos <= lsu.io.axi.aw.bits.qos @[quasar.scala 285:27] - io.lsu_axi.aw.bits.prot <= lsu.io.axi.aw.bits.prot @[quasar.scala 285:27] - io.lsu_axi.aw.bits.cache <= lsu.io.axi.aw.bits.cache @[quasar.scala 285:27] - io.lsu_axi.aw.bits.lock <= lsu.io.axi.aw.bits.lock @[quasar.scala 285:27] - io.lsu_axi.aw.bits.burst <= lsu.io.axi.aw.bits.burst @[quasar.scala 285:27] - io.lsu_axi.aw.bits.size <= lsu.io.axi.aw.bits.size @[quasar.scala 285:27] - io.lsu_axi.aw.bits.len <= lsu.io.axi.aw.bits.len @[quasar.scala 285:27] - io.lsu_axi.aw.bits.region <= lsu.io.axi.aw.bits.region @[quasar.scala 285:27] - io.lsu_axi.aw.bits.addr <= lsu.io.axi.aw.bits.addr @[quasar.scala 285:27] - io.lsu_axi.aw.bits.id <= lsu.io.axi.aw.bits.id @[quasar.scala 285:27] - io.lsu_axi.aw.valid <= lsu.io.axi.aw.valid @[quasar.scala 285:27] - lsu.io.axi.aw.ready <= io.lsu_axi.aw.ready @[quasar.scala 285:27] + node _T_8 = mux(dma_ctrl.io.dma_dbg_cmd_done, dma_ctrl.io.dma_dbg_rddata, dec.io.dec_dbg_rddata) @[quasar.scala 176:32] + dbg.io.core_dbg_rddata <= _T_8 @[quasar.scala 176:26] + node _T_9 = or(dma_ctrl.io.dma_dbg_cmd_done, dec.io.dec_dbg_cmd_done) @[quasar.scala 177:60] + dbg.io.core_dbg_cmd_done <= _T_9 @[quasar.scala 177:28] + node _T_10 = or(dma_ctrl.io.dma_dbg_cmd_fail, dec.io.dec_dbg_cmd_fail) @[quasar.scala 178:60] + dbg.io.core_dbg_cmd_fail <= _T_10 @[quasar.scala 178:28] + dbg.io.dec_tlu_debug_mode <= dec.io.dec_tlu_debug_mode @[quasar.scala 179:29] + dbg.io.dec_tlu_dbg_halted <= dec.io.dec_tlu_dbg_halted @[quasar.scala 180:29] + dbg.io.dec_tlu_mpc_halted_only <= dec.io.dec_tlu_mpc_halted_only @[quasar.scala 181:34] + dbg.io.dec_tlu_resume_ack <= dec.io.dec_tlu_resume_ack @[quasar.scala 182:29] + dbg.io.dmi_reg_en <= io.dmi_reg_en @[quasar.scala 183:21] + dbg.io.dmi_reg_addr <= io.dmi_reg_addr @[quasar.scala 184:23] + dbg.io.dmi_reg_wr_en <= io.dmi_reg_wr_en @[quasar.scala 185:24] + dbg.io.dmi_reg_wdata <= io.dmi_reg_wdata @[quasar.scala 186:24] + dbg.io.dbg_bus_clk_en <= io.dbg_bus_clk_en @[quasar.scala 187:25] + node _T_11 = asUInt(io.dbg_rst_l) @[quasar.scala 188:42] + dbg.io.dbg_rst_l <= _T_11 @[quasar.scala 188:20] + dbg.io.clk_override <= dec.io.dec_tlu_misc_clk_override @[quasar.scala 189:23] + dbg.io.scan_mode <= io.scan_mode @[quasar.scala 190:20] + dma_ctrl.reset <= io.core_rst_l @[quasar.scala 194:18] + dma_ctrl.io.free_clk <= rvclkhdr.io.l1clk @[quasar.scala 195:24] + dma_ctrl.io.dma_bus_clk_en <= io.dma_bus_clk_en @[quasar.scala 196:30] + dma_ctrl.io.clk_override <= dec.io.dec_tlu_misc_clk_override @[quasar.scala 197:28] + dma_ctrl.io.scan_mode <= io.scan_mode @[quasar.scala 198:25] + dma_ctrl.io.dbg_dma.dbg_dctl.dbg_cmd_wrdata <= dbg.io.dbg_dma.dbg_dctl.dbg_cmd_wrdata @[quasar.scala 199:23] + dma_ctrl.io.dbg_dma.dbg_ib.dbg_cmd_addr <= dbg.io.dbg_dma.dbg_ib.dbg_cmd_addr @[quasar.scala 199:23] + dma_ctrl.io.dbg_dma.dbg_ib.dbg_cmd_type <= dbg.io.dbg_dma.dbg_ib.dbg_cmd_type @[quasar.scala 199:23] + dma_ctrl.io.dbg_dma.dbg_ib.dbg_cmd_write <= dbg.io.dbg_dma.dbg_ib.dbg_cmd_write @[quasar.scala 199:23] + dma_ctrl.io.dbg_dma.dbg_ib.dbg_cmd_valid <= dbg.io.dbg_dma.dbg_ib.dbg_cmd_valid @[quasar.scala 199:23] + dbg.io.dbg_dma_io.dma_dbg_ready <= dma_ctrl.io.dbg_dma_io.dma_dbg_ready @[quasar.scala 200:26] + dma_ctrl.io.dbg_dma_io.dbg_dma_bubble <= dbg.io.dbg_dma_io.dbg_dma_bubble @[quasar.scala 200:26] + dma_ctrl.io.dbg_cmd_size <= dbg.io.dbg_cmd_size @[quasar.scala 201:28] + dma_ctrl.io.iccm_dma_rvalid <= ifu.io.iccm_dma_rvalid @[quasar.scala 202:31] + dma_ctrl.io.iccm_dma_rtag <= ifu.io.iccm_dma_rtag @[quasar.scala 203:29] + dma_ctrl.io.iccm_dma_rdata <= ifu.io.iccm_dma_rdata @[quasar.scala 204:30] + dma_ctrl.io.iccm_ready <= ifu.io.iccm_ready @[quasar.scala 205:26] + dma_ctrl.io.iccm_dma_ecc_error <= ifu.io.iccm_dma_ecc_error @[quasar.scala 206:34] + pic_ctrl_inst.io.scan_mode <= io.scan_mode @[quasar.scala 209:30] + pic_ctrl_inst.reset <= io.core_rst_l @[quasar.scala 210:23] + pic_ctrl_inst.io.free_clk <= rvclkhdr.io.l1clk @[quasar.scala 211:29] + pic_ctrl_inst.io.active_clk <= rvclkhdr_1.io.l1clk @[quasar.scala 212:31] + pic_ctrl_inst.io.clk_override <= dec.io.dec_tlu_pic_clk_override @[quasar.scala 213:33] + pic_ctrl_inst.io.extintsrc_req <= io.extintsrc_req @[quasar.scala 214:34] + lsu.io.lsu_pic.picm_rd_data <= pic_ctrl_inst.io.lsu_pic.picm_rd_data @[quasar.scala 215:28] + pic_ctrl_inst.io.lsu_pic.picm_wr_data <= lsu.io.lsu_pic.picm_wr_data @[quasar.scala 215:28] + pic_ctrl_inst.io.lsu_pic.picm_wraddr <= lsu.io.lsu_pic.picm_wraddr @[quasar.scala 215:28] + pic_ctrl_inst.io.lsu_pic.picm_rdaddr <= lsu.io.lsu_pic.picm_rdaddr @[quasar.scala 215:28] + pic_ctrl_inst.io.lsu_pic.picm_mken <= lsu.io.lsu_pic.picm_mken @[quasar.scala 215:28] + pic_ctrl_inst.io.lsu_pic.picm_rden <= lsu.io.lsu_pic.picm_rden @[quasar.scala 215:28] + pic_ctrl_inst.io.lsu_pic.picm_wren <= lsu.io.lsu_pic.picm_wren @[quasar.scala 215:28] + dec.io.dec_pic.mexintpend <= pic_ctrl_inst.io.dec_pic.mexintpend @[quasar.scala 216:28] + pic_ctrl_inst.io.dec_pic.dec_tlu_meipt <= dec.io.dec_pic.dec_tlu_meipt @[quasar.scala 216:28] + pic_ctrl_inst.io.dec_pic.dec_tlu_meicurpl <= dec.io.dec_pic.dec_tlu_meicurpl @[quasar.scala 216:28] + dec.io.dec_pic.mhwakeup <= pic_ctrl_inst.io.dec_pic.mhwakeup @[quasar.scala 216:28] + dec.io.dec_pic.pic_pl <= pic_ctrl_inst.io.dec_pic.pic_pl @[quasar.scala 216:28] + dec.io.dec_pic.pic_claimid <= pic_ctrl_inst.io.dec_pic.pic_claimid @[quasar.scala 216:28] + io.rv_trace_pkt.rv_i_tval_ip <= dec.io.rv_trace_pkt.rv_i_tval_ip @[quasar.scala 218:19] + io.rv_trace_pkt.rv_i_interrupt_ip <= dec.io.rv_trace_pkt.rv_i_interrupt_ip @[quasar.scala 218:19] + io.rv_trace_pkt.rv_i_ecause_ip <= dec.io.rv_trace_pkt.rv_i_ecause_ip @[quasar.scala 218:19] + io.rv_trace_pkt.rv_i_exception_ip <= dec.io.rv_trace_pkt.rv_i_exception_ip @[quasar.scala 218:19] + io.rv_trace_pkt.rv_i_address_ip <= dec.io.rv_trace_pkt.rv_i_address_ip @[quasar.scala 218:19] + io.rv_trace_pkt.rv_i_insn_ip <= dec.io.rv_trace_pkt.rv_i_insn_ip @[quasar.scala 218:19] + io.rv_trace_pkt.rv_i_valid_ip <= dec.io.rv_trace_pkt.rv_i_valid_ip @[quasar.scala 218:19] + io.dccm_clk_override <= dec.io.dec_tlu_dccm_clk_override @[quasar.scala 221:24] + io.icm_clk_override <= dec.io.dec_tlu_icm_clk_override @[quasar.scala 222:23] + io.dec_tlu_core_ecc_disable <= dec.io.ifu_dec.dec_mem_ctrl.dec_tlu_core_ecc_disable @[quasar.scala 223:31] + io.o_cpu_halt_ack <= dec.io.o_cpu_halt_ack @[quasar.scala 224:21] + io.o_cpu_halt_status <= dec.io.o_cpu_halt_status @[quasar.scala 225:24] + io.o_cpu_run_ack <= dec.io.o_cpu_run_ack @[quasar.scala 226:20] + io.o_debug_mode_status <= dec.io.o_debug_mode_status @[quasar.scala 227:26] + io.mpc_debug_halt_ack <= dec.io.mpc_debug_halt_ack @[quasar.scala 228:25] + io.mpc_debug_run_ack <= dec.io.mpc_debug_run_ack @[quasar.scala 229:24] + io.debug_brkpt_status <= dec.io.debug_brkpt_status @[quasar.scala 230:25] + io.dec_tlu_perfcnt0 <= dec.io.dec_tlu_perfcnt0 @[quasar.scala 231:23] + io.dec_tlu_perfcnt1 <= dec.io.dec_tlu_perfcnt1 @[quasar.scala 232:23] + io.dec_tlu_perfcnt2 <= dec.io.dec_tlu_perfcnt2 @[quasar.scala 233:23] + io.dec_tlu_perfcnt3 <= dec.io.dec_tlu_perfcnt3 @[quasar.scala 234:23] + io.dmi_reg_rdata <= dbg.io.dmi_reg_rdata @[quasar.scala 235:20] + lsu.io.dccm.rd_data_hi <= io.dccm.rd_data_hi @[quasar.scala 238:11] + lsu.io.dccm.rd_data_lo <= io.dccm.rd_data_lo @[quasar.scala 238:11] + io.dccm.wr_data_hi <= lsu.io.dccm.wr_data_hi @[quasar.scala 238:11] + io.dccm.wr_data_lo <= lsu.io.dccm.wr_data_lo @[quasar.scala 238:11] + io.dccm.rd_addr_hi <= lsu.io.dccm.rd_addr_hi @[quasar.scala 238:11] + io.dccm.rd_addr_lo <= lsu.io.dccm.rd_addr_lo @[quasar.scala 238:11] + io.dccm.wr_addr_hi <= lsu.io.dccm.wr_addr_hi @[quasar.scala 238:11] + io.dccm.wr_addr_lo <= lsu.io.dccm.wr_addr_lo @[quasar.scala 238:11] + io.dccm.rden <= lsu.io.dccm.rden @[quasar.scala 238:11] + io.dccm.wren <= lsu.io.dccm.wren @[quasar.scala 238:11] + wire _T_12 : {in : {flip hrdata : UInt<64>, flip hready : UInt<1>, flip hresp : UInt<1>}, out : {haddr : UInt<32>, hburst : UInt<3>, hmastlock : UInt<1>, hprot : UInt<4>, hsize : UInt<3>, htrans : UInt<2>, hwrite : UInt<1>, hwdata : UInt<64>}} @[quasar.scala 277:42] + _T_12.out.hwdata <= UInt<64>("h00") @[quasar.scala 277:42] + _T_12.out.hwrite <= UInt<1>("h00") @[quasar.scala 277:42] + _T_12.out.htrans <= UInt<2>("h00") @[quasar.scala 277:42] + _T_12.out.hsize <= UInt<3>("h00") @[quasar.scala 277:42] + _T_12.out.hprot <= UInt<4>("h00") @[quasar.scala 277:42] + _T_12.out.hmastlock <= UInt<1>("h00") @[quasar.scala 277:42] + _T_12.out.hburst <= UInt<3>("h00") @[quasar.scala 277:42] + _T_12.out.haddr <= UInt<32>("h00") @[quasar.scala 277:42] + _T_12.in.hresp <= UInt<1>("h00") @[quasar.scala 277:42] + _T_12.in.hready <= UInt<1>("h00") @[quasar.scala 277:42] + _T_12.in.hrdata <= UInt<64>("h00") @[quasar.scala 277:42] + io.lsu_ahb.out.hwdata <= _T_12.out.hwdata @[quasar.scala 277:27] + io.lsu_ahb.out.hwrite <= _T_12.out.hwrite @[quasar.scala 277:27] + io.lsu_ahb.out.htrans <= _T_12.out.htrans @[quasar.scala 277:27] + io.lsu_ahb.out.hsize <= _T_12.out.hsize @[quasar.scala 277:27] + io.lsu_ahb.out.hprot <= _T_12.out.hprot @[quasar.scala 277:27] + io.lsu_ahb.out.hmastlock <= _T_12.out.hmastlock @[quasar.scala 277:27] + io.lsu_ahb.out.hburst <= _T_12.out.hburst @[quasar.scala 277:27] + io.lsu_ahb.out.haddr <= _T_12.out.haddr @[quasar.scala 277:27] + _T_12.in.hresp <= io.lsu_ahb.in.hresp @[quasar.scala 277:27] + _T_12.in.hready <= io.lsu_ahb.in.hready @[quasar.scala 277:27] + _T_12.in.hrdata <= io.lsu_ahb.in.hrdata @[quasar.scala 277:27] + wire _T_13 : {in : {flip hrdata : UInt<64>, flip hready : UInt<1>, flip hresp : UInt<1>}, out : {haddr : UInt<32>, hburst : UInt<3>, hmastlock : UInt<1>, hprot : UInt<4>, hsize : UInt<3>, htrans : UInt<2>, hwrite : UInt<1>, hwdata : UInt<64>}} @[quasar.scala 278:42] + _T_13.out.hwdata <= UInt<64>("h00") @[quasar.scala 278:42] + _T_13.out.hwrite <= UInt<1>("h00") @[quasar.scala 278:42] + _T_13.out.htrans <= UInt<2>("h00") @[quasar.scala 278:42] + _T_13.out.hsize <= UInt<3>("h00") @[quasar.scala 278:42] + _T_13.out.hprot <= UInt<4>("h00") @[quasar.scala 278:42] + _T_13.out.hmastlock <= UInt<1>("h00") @[quasar.scala 278:42] + _T_13.out.hburst <= UInt<3>("h00") @[quasar.scala 278:42] + _T_13.out.haddr <= UInt<32>("h00") @[quasar.scala 278:42] + _T_13.in.hresp <= UInt<1>("h00") @[quasar.scala 278:42] + _T_13.in.hready <= UInt<1>("h00") @[quasar.scala 278:42] + _T_13.in.hrdata <= UInt<64>("h00") @[quasar.scala 278:42] + io.ifu_ahb.out.hwdata <= _T_13.out.hwdata @[quasar.scala 278:27] + io.ifu_ahb.out.hwrite <= _T_13.out.hwrite @[quasar.scala 278:27] + io.ifu_ahb.out.htrans <= _T_13.out.htrans @[quasar.scala 278:27] + io.ifu_ahb.out.hsize <= _T_13.out.hsize @[quasar.scala 278:27] + io.ifu_ahb.out.hprot <= _T_13.out.hprot @[quasar.scala 278:27] + io.ifu_ahb.out.hmastlock <= _T_13.out.hmastlock @[quasar.scala 278:27] + io.ifu_ahb.out.hburst <= _T_13.out.hburst @[quasar.scala 278:27] + io.ifu_ahb.out.haddr <= _T_13.out.haddr @[quasar.scala 278:27] + _T_13.in.hresp <= io.ifu_ahb.in.hresp @[quasar.scala 278:27] + _T_13.in.hready <= io.ifu_ahb.in.hready @[quasar.scala 278:27] + _T_13.in.hrdata <= io.ifu_ahb.in.hrdata @[quasar.scala 278:27] + wire _T_14 : {in : {flip hrdata : UInt<64>, flip hready : UInt<1>, flip hresp : UInt<1>}, out : {haddr : UInt<32>, hburst : UInt<3>, hmastlock : UInt<1>, hprot : UInt<4>, hsize : UInt<3>, htrans : UInt<2>, hwrite : UInt<1>, hwdata : UInt<64>}} @[quasar.scala 279:42] + _T_14.out.hwdata <= UInt<64>("h00") @[quasar.scala 279:42] + _T_14.out.hwrite <= UInt<1>("h00") @[quasar.scala 279:42] + _T_14.out.htrans <= UInt<2>("h00") @[quasar.scala 279:42] + _T_14.out.hsize <= UInt<3>("h00") @[quasar.scala 279:42] + _T_14.out.hprot <= UInt<4>("h00") @[quasar.scala 279:42] + _T_14.out.hmastlock <= UInt<1>("h00") @[quasar.scala 279:42] + _T_14.out.hburst <= UInt<3>("h00") @[quasar.scala 279:42] + _T_14.out.haddr <= UInt<32>("h00") @[quasar.scala 279:42] + _T_14.in.hresp <= UInt<1>("h00") @[quasar.scala 279:42] + _T_14.in.hready <= UInt<1>("h00") @[quasar.scala 279:42] + _T_14.in.hrdata <= UInt<64>("h00") @[quasar.scala 279:42] + io.sb_ahb.out.hwdata <= _T_14.out.hwdata @[quasar.scala 279:27] + io.sb_ahb.out.hwrite <= _T_14.out.hwrite @[quasar.scala 279:27] + io.sb_ahb.out.htrans <= _T_14.out.htrans @[quasar.scala 279:27] + io.sb_ahb.out.hsize <= _T_14.out.hsize @[quasar.scala 279:27] + io.sb_ahb.out.hprot <= _T_14.out.hprot @[quasar.scala 279:27] + io.sb_ahb.out.hmastlock <= _T_14.out.hmastlock @[quasar.scala 279:27] + io.sb_ahb.out.hburst <= _T_14.out.hburst @[quasar.scala 279:27] + io.sb_ahb.out.haddr <= _T_14.out.haddr @[quasar.scala 279:27] + _T_14.in.hresp <= io.sb_ahb.in.hresp @[quasar.scala 279:27] + _T_14.in.hready <= io.sb_ahb.in.hready @[quasar.scala 279:27] + _T_14.in.hrdata <= io.sb_ahb.in.hrdata @[quasar.scala 279:27] + wire _T_15 : {flip sig : {in : {flip hrdata : UInt<64>, flip hready : UInt<1>, flip hresp : UInt<1>}, out : {haddr : UInt<32>, hburst : UInt<3>, hmastlock : UInt<1>, hprot : UInt<4>, hsize : UInt<3>, htrans : UInt<2>, hwrite : UInt<1>, hwdata : UInt<64>}}, flip hsel : UInt<1>, flip hreadyin : UInt<1>} @[quasar.scala 280:42] + _T_15.hreadyin <= UInt<1>("h00") @[quasar.scala 280:42] + _T_15.hsel <= UInt<1>("h00") @[quasar.scala 280:42] + _T_15.sig.out.hwdata <= UInt<64>("h00") @[quasar.scala 280:42] + _T_15.sig.out.hwrite <= UInt<1>("h00") @[quasar.scala 280:42] + _T_15.sig.out.htrans <= UInt<2>("h00") @[quasar.scala 280:42] + _T_15.sig.out.hsize <= UInt<3>("h00") @[quasar.scala 280:42] + _T_15.sig.out.hprot <= UInt<4>("h00") @[quasar.scala 280:42] + _T_15.sig.out.hmastlock <= UInt<1>("h00") @[quasar.scala 280:42] + _T_15.sig.out.hburst <= UInt<3>("h00") @[quasar.scala 280:42] + _T_15.sig.out.haddr <= UInt<32>("h00") @[quasar.scala 280:42] + _T_15.sig.in.hresp <= UInt<1>("h00") @[quasar.scala 280:42] + _T_15.sig.in.hready <= UInt<1>("h00") @[quasar.scala 280:42] + _T_15.sig.in.hrdata <= UInt<64>("h00") @[quasar.scala 280:42] + _T_15.hreadyin <= io.dma_ahb.hreadyin @[quasar.scala 280:27] + _T_15.hsel <= io.dma_ahb.hsel @[quasar.scala 280:27] + _T_15.sig.out.hwdata <= io.dma_ahb.sig.out.hwdata @[quasar.scala 280:27] + _T_15.sig.out.hwrite <= io.dma_ahb.sig.out.hwrite @[quasar.scala 280:27] + _T_15.sig.out.htrans <= io.dma_ahb.sig.out.htrans @[quasar.scala 280:27] + _T_15.sig.out.hsize <= io.dma_ahb.sig.out.hsize @[quasar.scala 280:27] + _T_15.sig.out.hprot <= io.dma_ahb.sig.out.hprot @[quasar.scala 280:27] + _T_15.sig.out.hmastlock <= io.dma_ahb.sig.out.hmastlock @[quasar.scala 280:27] + _T_15.sig.out.hburst <= io.dma_ahb.sig.out.hburst @[quasar.scala 280:27] + _T_15.sig.out.haddr <= io.dma_ahb.sig.out.haddr @[quasar.scala 280:27] + io.dma_ahb.sig.in.hresp <= _T_15.sig.in.hresp @[quasar.scala 280:27] + io.dma_ahb.sig.in.hready <= _T_15.sig.in.hready @[quasar.scala 280:27] + io.dma_ahb.sig.in.hrdata <= _T_15.sig.in.hrdata @[quasar.scala 280:27] + io.dma_axi.r.bits.last <= dma_ctrl.io.dma_axi.r.bits.last @[quasar.scala 281:27] + io.dma_axi.r.bits.resp <= dma_ctrl.io.dma_axi.r.bits.resp @[quasar.scala 281:27] + io.dma_axi.r.bits.data <= dma_ctrl.io.dma_axi.r.bits.data @[quasar.scala 281:27] + io.dma_axi.r.bits.id <= dma_ctrl.io.dma_axi.r.bits.id @[quasar.scala 281:27] + io.dma_axi.r.valid <= dma_ctrl.io.dma_axi.r.valid @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.r.ready <= io.dma_axi.r.ready @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.qos <= io.dma_axi.ar.bits.qos @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.prot <= io.dma_axi.ar.bits.prot @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.cache <= io.dma_axi.ar.bits.cache @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.lock <= io.dma_axi.ar.bits.lock @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.burst <= io.dma_axi.ar.bits.burst @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.size <= io.dma_axi.ar.bits.size @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.len <= io.dma_axi.ar.bits.len @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.region <= io.dma_axi.ar.bits.region @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.addr <= io.dma_axi.ar.bits.addr @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.bits.id <= io.dma_axi.ar.bits.id @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.ar.valid <= io.dma_axi.ar.valid @[quasar.scala 281:27] + io.dma_axi.ar.ready <= dma_ctrl.io.dma_axi.ar.ready @[quasar.scala 281:27] + io.dma_axi.b.bits.id <= dma_ctrl.io.dma_axi.b.bits.id @[quasar.scala 281:27] + io.dma_axi.b.bits.resp <= dma_ctrl.io.dma_axi.b.bits.resp @[quasar.scala 281:27] + io.dma_axi.b.valid <= dma_ctrl.io.dma_axi.b.valid @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.b.ready <= io.dma_axi.b.ready @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.w.bits.last <= io.dma_axi.w.bits.last @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.w.bits.strb <= io.dma_axi.w.bits.strb @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.w.bits.data <= io.dma_axi.w.bits.data @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.w.valid <= io.dma_axi.w.valid @[quasar.scala 281:27] + io.dma_axi.w.ready <= dma_ctrl.io.dma_axi.w.ready @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.qos <= io.dma_axi.aw.bits.qos @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.prot <= io.dma_axi.aw.bits.prot @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.cache <= io.dma_axi.aw.bits.cache @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.lock <= io.dma_axi.aw.bits.lock @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.burst <= io.dma_axi.aw.bits.burst @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.size <= io.dma_axi.aw.bits.size @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.len <= io.dma_axi.aw.bits.len @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.region <= io.dma_axi.aw.bits.region @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.addr <= io.dma_axi.aw.bits.addr @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.bits.id <= io.dma_axi.aw.bits.id @[quasar.scala 281:27] + dma_ctrl.io.dma_axi.aw.valid <= io.dma_axi.aw.valid @[quasar.scala 281:27] + io.dma_axi.aw.ready <= dma_ctrl.io.dma_axi.aw.ready @[quasar.scala 281:27] + dbg.io.sb_axi.r.bits.last <= io.sb_axi.r.bits.last @[quasar.scala 282:27] + dbg.io.sb_axi.r.bits.resp <= io.sb_axi.r.bits.resp @[quasar.scala 282:27] + dbg.io.sb_axi.r.bits.data <= io.sb_axi.r.bits.data @[quasar.scala 282:27] + dbg.io.sb_axi.r.bits.id <= io.sb_axi.r.bits.id @[quasar.scala 282:27] + dbg.io.sb_axi.r.valid <= io.sb_axi.r.valid @[quasar.scala 282:27] + io.sb_axi.r.ready <= dbg.io.sb_axi.r.ready @[quasar.scala 282:27] + io.sb_axi.ar.bits.qos <= dbg.io.sb_axi.ar.bits.qos @[quasar.scala 282:27] + io.sb_axi.ar.bits.prot <= dbg.io.sb_axi.ar.bits.prot @[quasar.scala 282:27] + io.sb_axi.ar.bits.cache <= dbg.io.sb_axi.ar.bits.cache @[quasar.scala 282:27] + io.sb_axi.ar.bits.lock <= dbg.io.sb_axi.ar.bits.lock @[quasar.scala 282:27] + io.sb_axi.ar.bits.burst <= dbg.io.sb_axi.ar.bits.burst @[quasar.scala 282:27] + io.sb_axi.ar.bits.size <= dbg.io.sb_axi.ar.bits.size @[quasar.scala 282:27] + io.sb_axi.ar.bits.len <= dbg.io.sb_axi.ar.bits.len @[quasar.scala 282:27] + io.sb_axi.ar.bits.region <= dbg.io.sb_axi.ar.bits.region @[quasar.scala 282:27] + io.sb_axi.ar.bits.addr <= dbg.io.sb_axi.ar.bits.addr @[quasar.scala 282:27] + io.sb_axi.ar.bits.id <= dbg.io.sb_axi.ar.bits.id @[quasar.scala 282:27] + io.sb_axi.ar.valid <= dbg.io.sb_axi.ar.valid @[quasar.scala 282:27] + dbg.io.sb_axi.ar.ready <= io.sb_axi.ar.ready @[quasar.scala 282:27] + dbg.io.sb_axi.b.bits.id <= io.sb_axi.b.bits.id @[quasar.scala 282:27] + dbg.io.sb_axi.b.bits.resp <= io.sb_axi.b.bits.resp @[quasar.scala 282:27] + dbg.io.sb_axi.b.valid <= io.sb_axi.b.valid @[quasar.scala 282:27] + io.sb_axi.b.ready <= dbg.io.sb_axi.b.ready @[quasar.scala 282:27] + io.sb_axi.w.bits.last <= dbg.io.sb_axi.w.bits.last @[quasar.scala 282:27] + io.sb_axi.w.bits.strb <= dbg.io.sb_axi.w.bits.strb @[quasar.scala 282:27] + io.sb_axi.w.bits.data <= dbg.io.sb_axi.w.bits.data @[quasar.scala 282:27] + io.sb_axi.w.valid <= dbg.io.sb_axi.w.valid @[quasar.scala 282:27] + dbg.io.sb_axi.w.ready <= io.sb_axi.w.ready @[quasar.scala 282:27] + io.sb_axi.aw.bits.qos <= dbg.io.sb_axi.aw.bits.qos @[quasar.scala 282:27] + io.sb_axi.aw.bits.prot <= dbg.io.sb_axi.aw.bits.prot @[quasar.scala 282:27] + io.sb_axi.aw.bits.cache <= dbg.io.sb_axi.aw.bits.cache @[quasar.scala 282:27] + io.sb_axi.aw.bits.lock <= dbg.io.sb_axi.aw.bits.lock @[quasar.scala 282:27] + io.sb_axi.aw.bits.burst <= dbg.io.sb_axi.aw.bits.burst @[quasar.scala 282:27] + io.sb_axi.aw.bits.size <= dbg.io.sb_axi.aw.bits.size @[quasar.scala 282:27] + io.sb_axi.aw.bits.len <= dbg.io.sb_axi.aw.bits.len @[quasar.scala 282:27] + io.sb_axi.aw.bits.region <= dbg.io.sb_axi.aw.bits.region @[quasar.scala 282:27] + io.sb_axi.aw.bits.addr <= dbg.io.sb_axi.aw.bits.addr @[quasar.scala 282:27] + io.sb_axi.aw.bits.id <= dbg.io.sb_axi.aw.bits.id @[quasar.scala 282:27] + io.sb_axi.aw.valid <= dbg.io.sb_axi.aw.valid @[quasar.scala 282:27] + dbg.io.sb_axi.aw.ready <= io.sb_axi.aw.ready @[quasar.scala 282:27] + ifu.io.ifu.r.bits.last <= io.ifu_axi.r.bits.last @[quasar.scala 283:27] + ifu.io.ifu.r.bits.resp <= io.ifu_axi.r.bits.resp @[quasar.scala 283:27] + ifu.io.ifu.r.bits.data <= io.ifu_axi.r.bits.data @[quasar.scala 283:27] + ifu.io.ifu.r.bits.id <= io.ifu_axi.r.bits.id @[quasar.scala 283:27] + ifu.io.ifu.r.valid <= io.ifu_axi.r.valid @[quasar.scala 283:27] + io.ifu_axi.r.ready <= ifu.io.ifu.r.ready @[quasar.scala 283:27] + io.ifu_axi.ar.bits.qos <= ifu.io.ifu.ar.bits.qos @[quasar.scala 283:27] + io.ifu_axi.ar.bits.prot <= ifu.io.ifu.ar.bits.prot @[quasar.scala 283:27] + io.ifu_axi.ar.bits.cache <= ifu.io.ifu.ar.bits.cache @[quasar.scala 283:27] + io.ifu_axi.ar.bits.lock <= ifu.io.ifu.ar.bits.lock @[quasar.scala 283:27] + io.ifu_axi.ar.bits.burst <= ifu.io.ifu.ar.bits.burst @[quasar.scala 283:27] + io.ifu_axi.ar.bits.size <= ifu.io.ifu.ar.bits.size @[quasar.scala 283:27] + io.ifu_axi.ar.bits.len <= ifu.io.ifu.ar.bits.len @[quasar.scala 283:27] + io.ifu_axi.ar.bits.region <= ifu.io.ifu.ar.bits.region @[quasar.scala 283:27] + io.ifu_axi.ar.bits.addr <= ifu.io.ifu.ar.bits.addr @[quasar.scala 283:27] + io.ifu_axi.ar.bits.id <= ifu.io.ifu.ar.bits.id @[quasar.scala 283:27] + io.ifu_axi.ar.valid <= ifu.io.ifu.ar.valid @[quasar.scala 283:27] + ifu.io.ifu.ar.ready <= io.ifu_axi.ar.ready @[quasar.scala 283:27] + ifu.io.ifu.b.bits.id <= io.ifu_axi.b.bits.id @[quasar.scala 283:27] + ifu.io.ifu.b.bits.resp <= io.ifu_axi.b.bits.resp @[quasar.scala 283:27] + ifu.io.ifu.b.valid <= io.ifu_axi.b.valid @[quasar.scala 283:27] + io.ifu_axi.b.ready <= ifu.io.ifu.b.ready @[quasar.scala 283:27] + io.ifu_axi.w.bits.last <= ifu.io.ifu.w.bits.last @[quasar.scala 283:27] + io.ifu_axi.w.bits.strb <= ifu.io.ifu.w.bits.strb @[quasar.scala 283:27] + io.ifu_axi.w.bits.data <= ifu.io.ifu.w.bits.data @[quasar.scala 283:27] + io.ifu_axi.w.valid <= ifu.io.ifu.w.valid @[quasar.scala 283:27] + ifu.io.ifu.w.ready <= io.ifu_axi.w.ready @[quasar.scala 283:27] + io.ifu_axi.aw.bits.qos <= ifu.io.ifu.aw.bits.qos @[quasar.scala 283:27] + io.ifu_axi.aw.bits.prot <= ifu.io.ifu.aw.bits.prot @[quasar.scala 283:27] + io.ifu_axi.aw.bits.cache <= ifu.io.ifu.aw.bits.cache @[quasar.scala 283:27] + io.ifu_axi.aw.bits.lock <= ifu.io.ifu.aw.bits.lock @[quasar.scala 283:27] + io.ifu_axi.aw.bits.burst <= ifu.io.ifu.aw.bits.burst @[quasar.scala 283:27] + io.ifu_axi.aw.bits.size <= ifu.io.ifu.aw.bits.size @[quasar.scala 283:27] + io.ifu_axi.aw.bits.len <= ifu.io.ifu.aw.bits.len @[quasar.scala 283:27] + io.ifu_axi.aw.bits.region <= ifu.io.ifu.aw.bits.region @[quasar.scala 283:27] + io.ifu_axi.aw.bits.addr <= ifu.io.ifu.aw.bits.addr @[quasar.scala 283:27] + io.ifu_axi.aw.bits.id <= ifu.io.ifu.aw.bits.id @[quasar.scala 283:27] + io.ifu_axi.aw.valid <= ifu.io.ifu.aw.valid @[quasar.scala 283:27] + ifu.io.ifu.aw.ready <= io.ifu_axi.aw.ready @[quasar.scala 283:27] + lsu.io.axi.r.bits.last <= io.lsu_axi.r.bits.last @[quasar.scala 284:27] + lsu.io.axi.r.bits.resp <= io.lsu_axi.r.bits.resp @[quasar.scala 284:27] + lsu.io.axi.r.bits.data <= io.lsu_axi.r.bits.data @[quasar.scala 284:27] + lsu.io.axi.r.bits.id <= io.lsu_axi.r.bits.id @[quasar.scala 284:27] + lsu.io.axi.r.valid <= io.lsu_axi.r.valid @[quasar.scala 284:27] + io.lsu_axi.r.ready <= lsu.io.axi.r.ready @[quasar.scala 284:27] + io.lsu_axi.ar.bits.qos <= lsu.io.axi.ar.bits.qos @[quasar.scala 284:27] + io.lsu_axi.ar.bits.prot <= lsu.io.axi.ar.bits.prot @[quasar.scala 284:27] + io.lsu_axi.ar.bits.cache <= lsu.io.axi.ar.bits.cache @[quasar.scala 284:27] + io.lsu_axi.ar.bits.lock <= lsu.io.axi.ar.bits.lock @[quasar.scala 284:27] + io.lsu_axi.ar.bits.burst <= lsu.io.axi.ar.bits.burst @[quasar.scala 284:27] + io.lsu_axi.ar.bits.size <= lsu.io.axi.ar.bits.size @[quasar.scala 284:27] + io.lsu_axi.ar.bits.len <= lsu.io.axi.ar.bits.len @[quasar.scala 284:27] + io.lsu_axi.ar.bits.region <= lsu.io.axi.ar.bits.region @[quasar.scala 284:27] + io.lsu_axi.ar.bits.addr <= lsu.io.axi.ar.bits.addr @[quasar.scala 284:27] + io.lsu_axi.ar.bits.id <= lsu.io.axi.ar.bits.id @[quasar.scala 284:27] + io.lsu_axi.ar.valid <= lsu.io.axi.ar.valid @[quasar.scala 284:27] + lsu.io.axi.ar.ready <= io.lsu_axi.ar.ready @[quasar.scala 284:27] + lsu.io.axi.b.bits.id <= io.lsu_axi.b.bits.id @[quasar.scala 284:27] + lsu.io.axi.b.bits.resp <= io.lsu_axi.b.bits.resp @[quasar.scala 284:27] + lsu.io.axi.b.valid <= io.lsu_axi.b.valid @[quasar.scala 284:27] + io.lsu_axi.b.ready <= lsu.io.axi.b.ready @[quasar.scala 284:27] + io.lsu_axi.w.bits.last <= lsu.io.axi.w.bits.last @[quasar.scala 284:27] + io.lsu_axi.w.bits.strb <= lsu.io.axi.w.bits.strb @[quasar.scala 284:27] + io.lsu_axi.w.bits.data <= lsu.io.axi.w.bits.data @[quasar.scala 284:27] + io.lsu_axi.w.valid <= lsu.io.axi.w.valid @[quasar.scala 284:27] + lsu.io.axi.w.ready <= io.lsu_axi.w.ready @[quasar.scala 284:27] + io.lsu_axi.aw.bits.qos <= lsu.io.axi.aw.bits.qos @[quasar.scala 284:27] + io.lsu_axi.aw.bits.prot <= lsu.io.axi.aw.bits.prot @[quasar.scala 284:27] + io.lsu_axi.aw.bits.cache <= lsu.io.axi.aw.bits.cache @[quasar.scala 284:27] + io.lsu_axi.aw.bits.lock <= lsu.io.axi.aw.bits.lock @[quasar.scala 284:27] + io.lsu_axi.aw.bits.burst <= lsu.io.axi.aw.bits.burst @[quasar.scala 284:27] + io.lsu_axi.aw.bits.size <= lsu.io.axi.aw.bits.size @[quasar.scala 284:27] + io.lsu_axi.aw.bits.len <= lsu.io.axi.aw.bits.len @[quasar.scala 284:27] + io.lsu_axi.aw.bits.region <= lsu.io.axi.aw.bits.region @[quasar.scala 284:27] + io.lsu_axi.aw.bits.addr <= lsu.io.axi.aw.bits.addr @[quasar.scala 284:27] + io.lsu_axi.aw.bits.id <= lsu.io.axi.aw.bits.id @[quasar.scala 284:27] + io.lsu_axi.aw.valid <= lsu.io.axi.aw.valid @[quasar.scala 284:27] + lsu.io.axi.aw.ready <= io.lsu_axi.aw.ready @[quasar.scala 284:27] diff --git a/quasar.v b/quasar.v index 82fb8986..1cb87743 100644 --- a/quasar.v +++ b/quasar.v @@ -82467,158 +82467,158 @@ module quasar( .io_en(rvclkhdr_1_io_en), .io_scan_mode(rvclkhdr_1_io_scan_mode) ); - assign io_lsu_axi_aw_valid = lsu_io_axi_aw_valid; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_id = lsu_io_axi_aw_bits_id; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_addr = lsu_io_axi_aw_bits_addr; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_region = lsu_io_axi_aw_bits_region; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_len = 8'h0; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_size = lsu_io_axi_aw_bits_size; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_burst = 2'h1; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_lock = 1'h0; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_cache = lsu_io_axi_aw_bits_cache; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_prot = 3'h0; // @[quasar.scala 285:27] - assign io_lsu_axi_aw_bits_qos = 4'h0; // @[quasar.scala 285:27] - assign io_lsu_axi_w_valid = lsu_io_axi_w_valid; // @[quasar.scala 285:27] - assign io_lsu_axi_w_bits_data = lsu_io_axi_w_bits_data; // @[quasar.scala 285:27] - assign io_lsu_axi_w_bits_strb = lsu_io_axi_w_bits_strb; // @[quasar.scala 285:27] - assign io_lsu_axi_w_bits_last = 1'h1; // @[quasar.scala 285:27] - assign io_lsu_axi_b_ready = 1'h1; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_valid = lsu_io_axi_ar_valid; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_id = lsu_io_axi_ar_bits_id; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_addr = lsu_io_axi_ar_bits_addr; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_region = lsu_io_axi_ar_bits_region; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_len = 8'h0; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_size = lsu_io_axi_ar_bits_size; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_burst = 2'h1; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_lock = 1'h0; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_cache = lsu_io_axi_ar_bits_cache; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_prot = 3'h0; // @[quasar.scala 285:27] - assign io_lsu_axi_ar_bits_qos = 4'h0; // @[quasar.scala 285:27] - assign io_lsu_axi_r_ready = 1'h1; // @[quasar.scala 285:27] - assign io_ifu_axi_aw_valid = 1'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_id = 3'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_addr = 32'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_region = 4'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_len = 8'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_size = 3'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_burst = 2'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_lock = 1'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_cache = 4'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_prot = 3'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_aw_bits_qos = 4'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_w_valid = 1'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_w_bits_data = 64'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_w_bits_strb = 8'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_w_bits_last = 1'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_b_ready = 1'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_valid = ifu_io_ifu_ar_valid; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_id = ifu_io_ifu_ar_bits_id; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_addr = ifu_io_ifu_ar_bits_addr; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_region = ifu_io_ifu_ar_bits_region; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_len = 8'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_size = 3'h3; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_burst = 2'h1; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_lock = 1'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_cache = 4'hf; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_prot = 3'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_ar_bits_qos = 4'h0; // @[quasar.scala 284:27] - assign io_ifu_axi_r_ready = 1'h1; // @[quasar.scala 284:27] - assign io_sb_axi_aw_valid = dbg_io_sb_axi_aw_valid; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_id = 1'h0; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_addr = dbg_io_sb_axi_aw_bits_addr; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_region = dbg_io_sb_axi_aw_bits_region; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_len = 8'h0; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_size = dbg_io_sb_axi_aw_bits_size; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_burst = 2'h1; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_lock = 1'h0; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_cache = 4'hf; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_prot = 3'h0; // @[quasar.scala 283:27] - assign io_sb_axi_aw_bits_qos = 4'h0; // @[quasar.scala 283:27] - assign io_sb_axi_w_valid = dbg_io_sb_axi_w_valid; // @[quasar.scala 283:27] - assign io_sb_axi_w_bits_data = dbg_io_sb_axi_w_bits_data; // @[quasar.scala 283:27] - assign io_sb_axi_w_bits_strb = dbg_io_sb_axi_w_bits_strb; // @[quasar.scala 283:27] - assign io_sb_axi_w_bits_last = 1'h1; // @[quasar.scala 283:27] - assign io_sb_axi_b_ready = 1'h1; // @[quasar.scala 283:27] - assign io_sb_axi_ar_valid = dbg_io_sb_axi_ar_valid; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_id = 1'h0; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_addr = dbg_io_sb_axi_ar_bits_addr; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_region = dbg_io_sb_axi_ar_bits_region; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_len = 8'h0; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_size = dbg_io_sb_axi_ar_bits_size; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_burst = 2'h1; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_lock = 1'h0; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_cache = 4'h0; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_prot = 3'h0; // @[quasar.scala 283:27] - assign io_sb_axi_ar_bits_qos = 4'h0; // @[quasar.scala 283:27] - assign io_sb_axi_r_ready = 1'h1; // @[quasar.scala 283:27] - assign io_dma_axi_aw_ready = dma_ctrl_io_dma_axi_aw_ready; // @[quasar.scala 282:27] - assign io_dma_axi_w_ready = dma_ctrl_io_dma_axi_w_ready; // @[quasar.scala 282:27] - assign io_dma_axi_b_valid = dma_ctrl_io_dma_axi_b_valid; // @[quasar.scala 282:27] - assign io_dma_axi_b_bits_resp = dma_ctrl_io_dma_axi_b_bits_resp; // @[quasar.scala 282:27] - assign io_dma_axi_b_bits_id = dma_ctrl_io_dma_axi_b_bits_id; // @[quasar.scala 282:27] - assign io_dma_axi_ar_ready = dma_ctrl_io_dma_axi_ar_ready; // @[quasar.scala 282:27] - assign io_dma_axi_r_valid = dma_ctrl_io_dma_axi_r_valid; // @[quasar.scala 282:27] - assign io_dma_axi_r_bits_id = dma_ctrl_io_dma_axi_r_bits_id; // @[quasar.scala 282:27] - assign io_dma_axi_r_bits_data = dma_ctrl_io_dma_axi_r_bits_data; // @[quasar.scala 282:27] - assign io_dma_axi_r_bits_resp = dma_ctrl_io_dma_axi_r_bits_resp; // @[quasar.scala 282:27] - assign io_dma_axi_r_bits_last = 1'h1; // @[quasar.scala 282:27] - assign io_lsu_ahb_out_haddr = 32'h0; // @[quasar.scala 278:27] - assign io_lsu_ahb_out_hburst = 3'h0; // @[quasar.scala 278:27] - assign io_lsu_ahb_out_hmastlock = 1'h0; // @[quasar.scala 278:27] - assign io_lsu_ahb_out_hprot = 4'h0; // @[quasar.scala 278:27] - assign io_lsu_ahb_out_hsize = 3'h0; // @[quasar.scala 278:27] - assign io_lsu_ahb_out_htrans = 2'h0; // @[quasar.scala 278:27] - assign io_lsu_ahb_out_hwrite = 1'h0; // @[quasar.scala 278:27] - assign io_lsu_ahb_out_hwdata = 64'h0; // @[quasar.scala 278:27] - assign io_ifu_ahb_out_haddr = 32'h0; // @[quasar.scala 279:27] - assign io_ifu_ahb_out_hburst = 3'h0; // @[quasar.scala 279:27] - assign io_ifu_ahb_out_hmastlock = 1'h0; // @[quasar.scala 279:27] - assign io_ifu_ahb_out_hprot = 4'h0; // @[quasar.scala 279:27] - assign io_ifu_ahb_out_hsize = 3'h0; // @[quasar.scala 279:27] - assign io_ifu_ahb_out_htrans = 2'h0; // @[quasar.scala 279:27] - assign io_ifu_ahb_out_hwrite = 1'h0; // @[quasar.scala 279:27] - assign io_ifu_ahb_out_hwdata = 64'h0; // @[quasar.scala 279:27] - assign io_sb_ahb_out_haddr = 32'h0; // @[quasar.scala 280:27] - assign io_sb_ahb_out_hburst = 3'h0; // @[quasar.scala 280:27] - assign io_sb_ahb_out_hmastlock = 1'h0; // @[quasar.scala 280:27] - assign io_sb_ahb_out_hprot = 4'h0; // @[quasar.scala 280:27] - assign io_sb_ahb_out_hsize = 3'h0; // @[quasar.scala 280:27] - assign io_sb_ahb_out_htrans = 2'h0; // @[quasar.scala 280:27] - assign io_sb_ahb_out_hwrite = 1'h0; // @[quasar.scala 280:27] - assign io_sb_ahb_out_hwdata = 64'h0; // @[quasar.scala 280:27] - assign io_dma_ahb_sig_in_hrdata = 64'h0; // @[quasar.scala 281:27] - assign io_dma_ahb_sig_in_hready = 1'h0; // @[quasar.scala 281:27] - assign io_dma_ahb_sig_in_hresp = 1'h0; // @[quasar.scala 281:27] + assign io_lsu_axi_aw_valid = lsu_io_axi_aw_valid; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_id = lsu_io_axi_aw_bits_id; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_addr = lsu_io_axi_aw_bits_addr; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_region = lsu_io_axi_aw_bits_region; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_len = 8'h0; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_size = lsu_io_axi_aw_bits_size; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_burst = 2'h1; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_lock = 1'h0; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_cache = lsu_io_axi_aw_bits_cache; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_prot = 3'h0; // @[quasar.scala 284:27] + assign io_lsu_axi_aw_bits_qos = 4'h0; // @[quasar.scala 284:27] + assign io_lsu_axi_w_valid = lsu_io_axi_w_valid; // @[quasar.scala 284:27] + assign io_lsu_axi_w_bits_data = lsu_io_axi_w_bits_data; // @[quasar.scala 284:27] + assign io_lsu_axi_w_bits_strb = lsu_io_axi_w_bits_strb; // @[quasar.scala 284:27] + assign io_lsu_axi_w_bits_last = 1'h1; // @[quasar.scala 284:27] + assign io_lsu_axi_b_ready = 1'h1; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_valid = lsu_io_axi_ar_valid; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_id = lsu_io_axi_ar_bits_id; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_addr = lsu_io_axi_ar_bits_addr; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_region = lsu_io_axi_ar_bits_region; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_len = 8'h0; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_size = lsu_io_axi_ar_bits_size; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_burst = 2'h1; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_lock = 1'h0; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_cache = lsu_io_axi_ar_bits_cache; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_prot = 3'h0; // @[quasar.scala 284:27] + assign io_lsu_axi_ar_bits_qos = 4'h0; // @[quasar.scala 284:27] + assign io_lsu_axi_r_ready = 1'h1; // @[quasar.scala 284:27] + assign io_ifu_axi_aw_valid = 1'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_id = 3'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_addr = 32'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_region = 4'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_len = 8'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_size = 3'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_burst = 2'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_lock = 1'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_cache = 4'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_prot = 3'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_aw_bits_qos = 4'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_w_valid = 1'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_w_bits_data = 64'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_w_bits_strb = 8'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_w_bits_last = 1'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_b_ready = 1'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_valid = ifu_io_ifu_ar_valid; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_id = ifu_io_ifu_ar_bits_id; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_addr = ifu_io_ifu_ar_bits_addr; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_region = ifu_io_ifu_ar_bits_region; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_len = 8'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_size = 3'h3; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_burst = 2'h1; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_lock = 1'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_cache = 4'hf; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_prot = 3'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_ar_bits_qos = 4'h0; // @[quasar.scala 283:27] + assign io_ifu_axi_r_ready = 1'h1; // @[quasar.scala 283:27] + assign io_sb_axi_aw_valid = dbg_io_sb_axi_aw_valid; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_id = 1'h0; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_addr = dbg_io_sb_axi_aw_bits_addr; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_region = dbg_io_sb_axi_aw_bits_region; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_len = 8'h0; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_size = dbg_io_sb_axi_aw_bits_size; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_burst = 2'h1; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_lock = 1'h0; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_cache = 4'hf; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_prot = 3'h0; // @[quasar.scala 282:27] + assign io_sb_axi_aw_bits_qos = 4'h0; // @[quasar.scala 282:27] + assign io_sb_axi_w_valid = dbg_io_sb_axi_w_valid; // @[quasar.scala 282:27] + assign io_sb_axi_w_bits_data = dbg_io_sb_axi_w_bits_data; // @[quasar.scala 282:27] + assign io_sb_axi_w_bits_strb = dbg_io_sb_axi_w_bits_strb; // @[quasar.scala 282:27] + assign io_sb_axi_w_bits_last = 1'h1; // @[quasar.scala 282:27] + assign io_sb_axi_b_ready = 1'h1; // @[quasar.scala 282:27] + assign io_sb_axi_ar_valid = dbg_io_sb_axi_ar_valid; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_id = 1'h0; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_addr = dbg_io_sb_axi_ar_bits_addr; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_region = dbg_io_sb_axi_ar_bits_region; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_len = 8'h0; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_size = dbg_io_sb_axi_ar_bits_size; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_burst = 2'h1; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_lock = 1'h0; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_cache = 4'h0; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_prot = 3'h0; // @[quasar.scala 282:27] + assign io_sb_axi_ar_bits_qos = 4'h0; // @[quasar.scala 282:27] + assign io_sb_axi_r_ready = 1'h1; // @[quasar.scala 282:27] + assign io_dma_axi_aw_ready = dma_ctrl_io_dma_axi_aw_ready; // @[quasar.scala 281:27] + assign io_dma_axi_w_ready = dma_ctrl_io_dma_axi_w_ready; // @[quasar.scala 281:27] + assign io_dma_axi_b_valid = dma_ctrl_io_dma_axi_b_valid; // @[quasar.scala 281:27] + assign io_dma_axi_b_bits_resp = dma_ctrl_io_dma_axi_b_bits_resp; // @[quasar.scala 281:27] + assign io_dma_axi_b_bits_id = dma_ctrl_io_dma_axi_b_bits_id; // @[quasar.scala 281:27] + assign io_dma_axi_ar_ready = dma_ctrl_io_dma_axi_ar_ready; // @[quasar.scala 281:27] + assign io_dma_axi_r_valid = dma_ctrl_io_dma_axi_r_valid; // @[quasar.scala 281:27] + assign io_dma_axi_r_bits_id = dma_ctrl_io_dma_axi_r_bits_id; // @[quasar.scala 281:27] + assign io_dma_axi_r_bits_data = dma_ctrl_io_dma_axi_r_bits_data; // @[quasar.scala 281:27] + assign io_dma_axi_r_bits_resp = dma_ctrl_io_dma_axi_r_bits_resp; // @[quasar.scala 281:27] + assign io_dma_axi_r_bits_last = 1'h1; // @[quasar.scala 281:27] + assign io_lsu_ahb_out_haddr = 32'h0; // @[quasar.scala 277:27] + assign io_lsu_ahb_out_hburst = 3'h0; // @[quasar.scala 277:27] + assign io_lsu_ahb_out_hmastlock = 1'h0; // @[quasar.scala 277:27] + assign io_lsu_ahb_out_hprot = 4'h0; // @[quasar.scala 277:27] + assign io_lsu_ahb_out_hsize = 3'h0; // @[quasar.scala 277:27] + assign io_lsu_ahb_out_htrans = 2'h0; // @[quasar.scala 277:27] + assign io_lsu_ahb_out_hwrite = 1'h0; // @[quasar.scala 277:27] + assign io_lsu_ahb_out_hwdata = 64'h0; // @[quasar.scala 277:27] + assign io_ifu_ahb_out_haddr = 32'h0; // @[quasar.scala 278:27] + assign io_ifu_ahb_out_hburst = 3'h0; // @[quasar.scala 278:27] + assign io_ifu_ahb_out_hmastlock = 1'h0; // @[quasar.scala 278:27] + assign io_ifu_ahb_out_hprot = 4'h0; // @[quasar.scala 278:27] + assign io_ifu_ahb_out_hsize = 3'h0; // @[quasar.scala 278:27] + assign io_ifu_ahb_out_htrans = 2'h0; // @[quasar.scala 278:27] + assign io_ifu_ahb_out_hwrite = 1'h0; // @[quasar.scala 278:27] + assign io_ifu_ahb_out_hwdata = 64'h0; // @[quasar.scala 278:27] + assign io_sb_ahb_out_haddr = 32'h0; // @[quasar.scala 279:27] + assign io_sb_ahb_out_hburst = 3'h0; // @[quasar.scala 279:27] + assign io_sb_ahb_out_hmastlock = 1'h0; // @[quasar.scala 279:27] + assign io_sb_ahb_out_hprot = 4'h0; // @[quasar.scala 279:27] + assign io_sb_ahb_out_hsize = 3'h0; // @[quasar.scala 279:27] + assign io_sb_ahb_out_htrans = 2'h0; // @[quasar.scala 279:27] + assign io_sb_ahb_out_hwrite = 1'h0; // @[quasar.scala 279:27] + assign io_sb_ahb_out_hwdata = 64'h0; // @[quasar.scala 279:27] + assign io_dma_ahb_sig_in_hrdata = 64'h0; // @[quasar.scala 280:27] + assign io_dma_ahb_sig_in_hready = 1'h0; // @[quasar.scala 280:27] + assign io_dma_ahb_sig_in_hresp = 1'h0; // @[quasar.scala 280:27] assign io_core_rst_l = reset & _T_2; // @[quasar.scala 82:17] - assign io_rv_trace_pkt_rv_i_valid_ip = dec_io_rv_trace_pkt_rv_i_valid_ip; // @[quasar.scala 219:19] - assign io_rv_trace_pkt_rv_i_insn_ip = dec_io_rv_trace_pkt_rv_i_insn_ip; // @[quasar.scala 219:19] - assign io_rv_trace_pkt_rv_i_address_ip = dec_io_rv_trace_pkt_rv_i_address_ip; // @[quasar.scala 219:19] - assign io_rv_trace_pkt_rv_i_exception_ip = dec_io_rv_trace_pkt_rv_i_exception_ip; // @[quasar.scala 219:19] - assign io_rv_trace_pkt_rv_i_ecause_ip = dec_io_rv_trace_pkt_rv_i_ecause_ip; // @[quasar.scala 219:19] - assign io_rv_trace_pkt_rv_i_interrupt_ip = dec_io_rv_trace_pkt_rv_i_interrupt_ip; // @[quasar.scala 219:19] - assign io_rv_trace_pkt_rv_i_tval_ip = dec_io_rv_trace_pkt_rv_i_tval_ip; // @[quasar.scala 219:19] - assign io_dccm_clk_override = dec_io_dec_tlu_dccm_clk_override; // @[quasar.scala 222:24] - assign io_icm_clk_override = dec_io_dec_tlu_icm_clk_override; // @[quasar.scala 223:23] - assign io_dec_tlu_core_ecc_disable = dec_io_ifu_dec_dec_mem_ctrl_dec_tlu_core_ecc_disable; // @[quasar.scala 224:31] - assign io_o_cpu_halt_ack = dec_io_o_cpu_halt_ack; // @[quasar.scala 225:21] - assign io_o_cpu_halt_status = dec_io_o_cpu_halt_status; // @[quasar.scala 226:24] - assign io_o_cpu_run_ack = dec_io_o_cpu_run_ack; // @[quasar.scala 227:20] - assign io_o_debug_mode_status = dec_io_o_debug_mode_status; // @[quasar.scala 228:26] - assign io_mpc_debug_halt_ack = dec_io_mpc_debug_halt_ack; // @[quasar.scala 229:25] - assign io_mpc_debug_run_ack = dec_io_mpc_debug_run_ack; // @[quasar.scala 230:24] - assign io_debug_brkpt_status = dec_io_debug_brkpt_status; // @[quasar.scala 231:25] - assign io_dec_tlu_perfcnt0 = dec_io_dec_tlu_perfcnt0; // @[quasar.scala 232:23] - assign io_dec_tlu_perfcnt1 = dec_io_dec_tlu_perfcnt1; // @[quasar.scala 233:23] - assign io_dec_tlu_perfcnt2 = dec_io_dec_tlu_perfcnt2; // @[quasar.scala 234:23] - assign io_dec_tlu_perfcnt3 = dec_io_dec_tlu_perfcnt3; // @[quasar.scala 235:23] - assign io_dccm_wren = lsu_io_dccm_wren; // @[quasar.scala 239:11] - assign io_dccm_rden = lsu_io_dccm_rden; // @[quasar.scala 239:11] - assign io_dccm_wr_addr_lo = lsu_io_dccm_wr_addr_lo; // @[quasar.scala 239:11] - assign io_dccm_wr_addr_hi = lsu_io_dccm_wr_addr_hi; // @[quasar.scala 239:11] - assign io_dccm_rd_addr_lo = lsu_io_dccm_rd_addr_lo; // @[quasar.scala 239:11] - assign io_dccm_rd_addr_hi = lsu_io_dccm_rd_addr_hi; // @[quasar.scala 239:11] - assign io_dccm_wr_data_lo = lsu_io_dccm_wr_data_lo; // @[quasar.scala 239:11] - assign io_dccm_wr_data_hi = lsu_io_dccm_wr_data_hi; // @[quasar.scala 239:11] + assign io_rv_trace_pkt_rv_i_valid_ip = dec_io_rv_trace_pkt_rv_i_valid_ip; // @[quasar.scala 218:19] + assign io_rv_trace_pkt_rv_i_insn_ip = dec_io_rv_trace_pkt_rv_i_insn_ip; // @[quasar.scala 218:19] + assign io_rv_trace_pkt_rv_i_address_ip = dec_io_rv_trace_pkt_rv_i_address_ip; // @[quasar.scala 218:19] + assign io_rv_trace_pkt_rv_i_exception_ip = dec_io_rv_trace_pkt_rv_i_exception_ip; // @[quasar.scala 218:19] + assign io_rv_trace_pkt_rv_i_ecause_ip = dec_io_rv_trace_pkt_rv_i_ecause_ip; // @[quasar.scala 218:19] + assign io_rv_trace_pkt_rv_i_interrupt_ip = dec_io_rv_trace_pkt_rv_i_interrupt_ip; // @[quasar.scala 218:19] + assign io_rv_trace_pkt_rv_i_tval_ip = dec_io_rv_trace_pkt_rv_i_tval_ip; // @[quasar.scala 218:19] + assign io_dccm_clk_override = dec_io_dec_tlu_dccm_clk_override; // @[quasar.scala 221:24] + assign io_icm_clk_override = dec_io_dec_tlu_icm_clk_override; // @[quasar.scala 222:23] + assign io_dec_tlu_core_ecc_disable = dec_io_ifu_dec_dec_mem_ctrl_dec_tlu_core_ecc_disable; // @[quasar.scala 223:31] + assign io_o_cpu_halt_ack = dec_io_o_cpu_halt_ack; // @[quasar.scala 224:21] + assign io_o_cpu_halt_status = dec_io_o_cpu_halt_status; // @[quasar.scala 225:24] + assign io_o_cpu_run_ack = dec_io_o_cpu_run_ack; // @[quasar.scala 226:20] + assign io_o_debug_mode_status = dec_io_o_debug_mode_status; // @[quasar.scala 227:26] + assign io_mpc_debug_halt_ack = dec_io_mpc_debug_halt_ack; // @[quasar.scala 228:25] + assign io_mpc_debug_run_ack = dec_io_mpc_debug_run_ack; // @[quasar.scala 229:24] + assign io_debug_brkpt_status = dec_io_debug_brkpt_status; // @[quasar.scala 230:25] + assign io_dec_tlu_perfcnt0 = dec_io_dec_tlu_perfcnt0; // @[quasar.scala 231:23] + assign io_dec_tlu_perfcnt1 = dec_io_dec_tlu_perfcnt1; // @[quasar.scala 232:23] + assign io_dec_tlu_perfcnt2 = dec_io_dec_tlu_perfcnt2; // @[quasar.scala 233:23] + assign io_dec_tlu_perfcnt3 = dec_io_dec_tlu_perfcnt3; // @[quasar.scala 234:23] + assign io_dccm_wren = lsu_io_dccm_wren; // @[quasar.scala 238:11] + assign io_dccm_rden = lsu_io_dccm_rden; // @[quasar.scala 238:11] + assign io_dccm_wr_addr_lo = lsu_io_dccm_wr_addr_lo; // @[quasar.scala 238:11] + assign io_dccm_wr_addr_hi = lsu_io_dccm_wr_addr_hi; // @[quasar.scala 238:11] + assign io_dccm_rd_addr_lo = lsu_io_dccm_rd_addr_lo; // @[quasar.scala 238:11] + assign io_dccm_rd_addr_hi = lsu_io_dccm_rd_addr_hi; // @[quasar.scala 238:11] + assign io_dccm_wr_data_lo = lsu_io_dccm_wr_data_lo; // @[quasar.scala 238:11] + assign io_dccm_wr_data_hi = lsu_io_dccm_wr_data_hi; // @[quasar.scala 238:11] assign io_ic_rw_addr = ifu_io_ic_rw_addr; // @[quasar.scala 100:13] assign io_ic_tag_valid = ifu_io_ic_tag_valid; // @[quasar.scala 100:13] assign io_ic_wr_en = ifu_io_ic_wr_en; // @[quasar.scala 100:13] @@ -82640,7 +82640,7 @@ module quasar( assign io_iccm_rden = ifu_io_iccm_rden; // @[quasar.scala 101:15] assign io_iccm_wr_size = ifu_io_iccm_wr_size; // @[quasar.scala 101:15] assign io_iccm_wr_data = ifu_io_iccm_wr_data; // @[quasar.scala 101:15] - assign io_dmi_reg_rdata = dbg_io_dmi_reg_rdata; // @[quasar.scala 236:20] + assign io_dmi_reg_rdata = dbg_io_dmi_reg_rdata; // @[quasar.scala 235:20] assign ifu_clock = clock; assign ifu_reset = io_core_rst_l; // @[quasar.scala 90:13] assign ifu_io_exu_flush_final = dec_io_exu_flush_final; // @[quasar.scala 95:26] @@ -82691,11 +82691,11 @@ module quasar( assign ifu_io_ic_eccerr = io_ic_eccerr; // @[quasar.scala 100:13] assign ifu_io_ic_rd_hit = io_ic_rd_hit; // @[quasar.scala 100:13] assign ifu_io_ic_tag_perr = io_ic_tag_perr; // @[quasar.scala 100:13] - assign ifu_io_ifu_ar_ready = io_ifu_axi_ar_ready; // @[quasar.scala 284:27] - assign ifu_io_ifu_r_valid = io_ifu_axi_r_valid; // @[quasar.scala 284:27] - assign ifu_io_ifu_r_bits_id = io_ifu_axi_r_bits_id; // @[quasar.scala 284:27] - assign ifu_io_ifu_r_bits_data = io_ifu_axi_r_bits_data; // @[quasar.scala 284:27] - assign ifu_io_ifu_r_bits_resp = io_ifu_axi_r_bits_resp; // @[quasar.scala 284:27] + assign ifu_io_ifu_ar_ready = io_ifu_axi_ar_ready; // @[quasar.scala 283:27] + assign ifu_io_ifu_r_valid = io_ifu_axi_r_valid; // @[quasar.scala 283:27] + assign ifu_io_ifu_r_bits_id = io_ifu_axi_r_bits_id; // @[quasar.scala 283:27] + assign ifu_io_ifu_r_bits_data = io_ifu_axi_r_bits_data; // @[quasar.scala 283:27] + assign ifu_io_ifu_r_bits_resp = io_ifu_axi_r_bits_resp; // @[quasar.scala 283:27] assign ifu_io_ifu_bus_clk_en = io_ifu_bus_clk_en; // @[quasar.scala 98:25] assign ifu_io_ifu_dma_dma_ifc_dma_iccm_stall_any = dma_ctrl_io_ifu_dma_dma_ifc_dma_iccm_stall_any; // @[quasar.scala 99:18] assign ifu_io_ifu_dma_dma_mem_ctl_dma_iccm_req = dma_ctrl_io_ifu_dma_dma_mem_ctl_dma_iccm_req; // @[quasar.scala 99:18] @@ -82820,36 +82820,36 @@ module quasar( assign dec_io_dec_dma_tlu_dma_dma_pmu_any_write = dma_ctrl_io_dec_dma_tlu_dma_dma_pmu_any_write; // @[quasar.scala 125:18] assign dec_io_dec_dma_tlu_dma_dma_dccm_stall_any = dma_ctrl_io_dec_dma_tlu_dma_dma_dccm_stall_any; // @[quasar.scala 125:18] assign dec_io_dec_dma_tlu_dma_dma_iccm_stall_any = dma_ctrl_io_dec_dma_tlu_dma_dma_iccm_stall_any; // @[quasar.scala 125:18] - assign dec_io_dec_pic_pic_claimid = pic_ctrl_inst_io_dec_pic_pic_claimid; // @[quasar.scala 217:28] - assign dec_io_dec_pic_pic_pl = pic_ctrl_inst_io_dec_pic_pic_pl; // @[quasar.scala 217:28] - assign dec_io_dec_pic_mhwakeup = pic_ctrl_inst_io_dec_pic_mhwakeup; // @[quasar.scala 217:28] - assign dec_io_dec_pic_mexintpend = pic_ctrl_inst_io_dec_pic_mexintpend; // @[quasar.scala 217:28] + assign dec_io_dec_pic_pic_claimid = pic_ctrl_inst_io_dec_pic_pic_claimid; // @[quasar.scala 216:28] + assign dec_io_dec_pic_pic_pl = pic_ctrl_inst_io_dec_pic_pic_pl; // @[quasar.scala 216:28] + assign dec_io_dec_pic_mhwakeup = pic_ctrl_inst_io_dec_pic_mhwakeup; // @[quasar.scala 216:28] + assign dec_io_dec_pic_mexintpend = pic_ctrl_inst_io_dec_pic_mexintpend; // @[quasar.scala 216:28] assign dbg_clock = clock; - assign dbg_reset = io_core_rst_l; // @[quasar.scala 176:13] - assign dbg_io_core_dbg_rddata = dma_ctrl_io_dma_dbg_cmd_done ? dma_ctrl_io_dma_dbg_rddata : dec_io_dec_dbg_rddata; // @[quasar.scala 177:26] - assign dbg_io_core_dbg_cmd_done = dma_ctrl_io_dma_dbg_cmd_done | dec_io_dec_dbg_cmd_done; // @[quasar.scala 178:28] - assign dbg_io_core_dbg_cmd_fail = dma_ctrl_io_dma_dbg_cmd_fail | dec_io_dec_dbg_cmd_fail; // @[quasar.scala 179:28] - assign dbg_io_dec_tlu_debug_mode = dec_io_dec_tlu_debug_mode; // @[quasar.scala 180:29] - assign dbg_io_dec_tlu_dbg_halted = dec_io_dec_tlu_dbg_halted; // @[quasar.scala 181:29] - assign dbg_io_dec_tlu_mpc_halted_only = dec_io_dec_tlu_mpc_halted_only; // @[quasar.scala 182:34] - assign dbg_io_dec_tlu_resume_ack = dec_io_dec_tlu_resume_ack; // @[quasar.scala 183:29] - assign dbg_io_dmi_reg_en = io_dmi_reg_en; // @[quasar.scala 184:21] - assign dbg_io_dmi_reg_addr = io_dmi_reg_addr; // @[quasar.scala 185:23] - assign dbg_io_dmi_reg_wr_en = io_dmi_reg_wr_en; // @[quasar.scala 186:24] - assign dbg_io_dmi_reg_wdata = io_dmi_reg_wdata; // @[quasar.scala 187:24] - assign dbg_io_sb_axi_aw_ready = io_sb_axi_aw_ready; // @[quasar.scala 283:27] - assign dbg_io_sb_axi_w_ready = io_sb_axi_w_ready; // @[quasar.scala 283:27] - assign dbg_io_sb_axi_b_valid = io_sb_axi_b_valid; // @[quasar.scala 283:27] - assign dbg_io_sb_axi_b_bits_resp = io_sb_axi_b_bits_resp; // @[quasar.scala 283:27] - assign dbg_io_sb_axi_ar_ready = io_sb_axi_ar_ready; // @[quasar.scala 283:27] - assign dbg_io_sb_axi_r_valid = io_sb_axi_r_valid; // @[quasar.scala 283:27] - assign dbg_io_sb_axi_r_bits_data = io_sb_axi_r_bits_data; // @[quasar.scala 283:27] - assign dbg_io_sb_axi_r_bits_resp = io_sb_axi_r_bits_resp; // @[quasar.scala 283:27] - assign dbg_io_dbg_dma_io_dma_dbg_ready = dma_ctrl_io_dbg_dma_io_dma_dbg_ready; // @[quasar.scala 201:26] - assign dbg_io_dbg_bus_clk_en = io_dbg_bus_clk_en; // @[quasar.scala 188:25] - assign dbg_io_dbg_rst_l = io_dbg_rst_l; // @[quasar.scala 189:20] - assign dbg_io_clk_override = dec_io_dec_tlu_misc_clk_override; // @[quasar.scala 190:23] - assign dbg_io_scan_mode = io_scan_mode; // @[quasar.scala 191:20] + assign dbg_reset = reset; + assign dbg_io_core_dbg_rddata = dma_ctrl_io_dma_dbg_cmd_done ? dma_ctrl_io_dma_dbg_rddata : dec_io_dec_dbg_rddata; // @[quasar.scala 176:26] + assign dbg_io_core_dbg_cmd_done = dma_ctrl_io_dma_dbg_cmd_done | dec_io_dec_dbg_cmd_done; // @[quasar.scala 177:28] + assign dbg_io_core_dbg_cmd_fail = dma_ctrl_io_dma_dbg_cmd_fail | dec_io_dec_dbg_cmd_fail; // @[quasar.scala 178:28] + assign dbg_io_dec_tlu_debug_mode = dec_io_dec_tlu_debug_mode; // @[quasar.scala 179:29] + assign dbg_io_dec_tlu_dbg_halted = dec_io_dec_tlu_dbg_halted; // @[quasar.scala 180:29] + assign dbg_io_dec_tlu_mpc_halted_only = dec_io_dec_tlu_mpc_halted_only; // @[quasar.scala 181:34] + assign dbg_io_dec_tlu_resume_ack = dec_io_dec_tlu_resume_ack; // @[quasar.scala 182:29] + assign dbg_io_dmi_reg_en = io_dmi_reg_en; // @[quasar.scala 183:21] + assign dbg_io_dmi_reg_addr = io_dmi_reg_addr; // @[quasar.scala 184:23] + assign dbg_io_dmi_reg_wr_en = io_dmi_reg_wr_en; // @[quasar.scala 185:24] + assign dbg_io_dmi_reg_wdata = io_dmi_reg_wdata; // @[quasar.scala 186:24] + assign dbg_io_sb_axi_aw_ready = io_sb_axi_aw_ready; // @[quasar.scala 282:27] + assign dbg_io_sb_axi_w_ready = io_sb_axi_w_ready; // @[quasar.scala 282:27] + assign dbg_io_sb_axi_b_valid = io_sb_axi_b_valid; // @[quasar.scala 282:27] + assign dbg_io_sb_axi_b_bits_resp = io_sb_axi_b_bits_resp; // @[quasar.scala 282:27] + assign dbg_io_sb_axi_ar_ready = io_sb_axi_ar_ready; // @[quasar.scala 282:27] + assign dbg_io_sb_axi_r_valid = io_sb_axi_r_valid; // @[quasar.scala 282:27] + assign dbg_io_sb_axi_r_bits_data = io_sb_axi_r_bits_data; // @[quasar.scala 282:27] + assign dbg_io_sb_axi_r_bits_resp = io_sb_axi_r_bits_resp; // @[quasar.scala 282:27] + assign dbg_io_dbg_dma_io_dma_dbg_ready = dma_ctrl_io_dbg_dma_io_dma_dbg_ready; // @[quasar.scala 200:26] + assign dbg_io_dbg_bus_clk_en = io_dbg_bus_clk_en; // @[quasar.scala 187:25] + assign dbg_io_dbg_rst_l = io_dbg_rst_l; // @[quasar.scala 188:20] + assign dbg_io_clk_override = dec_io_dec_tlu_misc_clk_override; // @[quasar.scala 189:23] + assign dbg_io_scan_mode = io_scan_mode; // @[quasar.scala 190:20] assign exu_clock = clock; assign exu_reset = io_core_rst_l; // @[quasar.scala 152:13] assign exu_io_scan_mode = io_scan_mode; // @[quasar.scala 153:20] @@ -82928,24 +82928,24 @@ module quasar( assign lsu_io_lsu_dma_dma_dccm_ctl_dma_mem_addr = dma_ctrl_io_lsu_dma_dma_dccm_ctl_dma_mem_addr; // @[quasar.scala 171:18] assign lsu_io_lsu_dma_dma_dccm_ctl_dma_mem_wdata = dma_ctrl_io_lsu_dma_dma_dccm_ctl_dma_mem_wdata; // @[quasar.scala 171:18] assign lsu_io_lsu_dma_dma_mem_tag = dma_ctrl_io_lsu_dma_dma_mem_tag; // @[quasar.scala 171:18] - assign lsu_io_lsu_pic_picm_rd_data = pic_ctrl_inst_io_lsu_pic_picm_rd_data; // @[quasar.scala 216:28] + assign lsu_io_lsu_pic_picm_rd_data = pic_ctrl_inst_io_lsu_pic_picm_rd_data; // @[quasar.scala 215:28] assign lsu_io_lsu_exu_exu_lsu_rs1_d = exu_io_lsu_exu_exu_lsu_rs1_d; // @[quasar.scala 163:18] assign lsu_io_lsu_exu_exu_lsu_rs2_d = exu_io_lsu_exu_exu_lsu_rs2_d; // @[quasar.scala 163:18] assign lsu_io_lsu_dec_tlu_busbuff_dec_tlu_external_ldfwd_disable = dec_io_lsu_dec_tlu_busbuff_dec_tlu_external_ldfwd_disable; // @[quasar.scala 122:18] assign lsu_io_lsu_dec_tlu_busbuff_dec_tlu_wb_coalescing_disable = dec_io_lsu_dec_tlu_busbuff_dec_tlu_wb_coalescing_disable; // @[quasar.scala 122:18] assign lsu_io_lsu_dec_tlu_busbuff_dec_tlu_sideeffect_posted_disable = dec_io_lsu_dec_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[quasar.scala 122:18] - assign lsu_io_dccm_rd_data_lo = io_dccm_rd_data_lo; // @[quasar.scala 239:11] - assign lsu_io_dccm_rd_data_hi = io_dccm_rd_data_hi; // @[quasar.scala 239:11] - assign lsu_io_axi_aw_ready = io_lsu_axi_aw_ready; // @[quasar.scala 285:27] - assign lsu_io_axi_w_ready = io_lsu_axi_w_ready; // @[quasar.scala 285:27] - assign lsu_io_axi_b_valid = io_lsu_axi_b_valid; // @[quasar.scala 285:27] - assign lsu_io_axi_b_bits_resp = io_lsu_axi_b_bits_resp; // @[quasar.scala 285:27] - assign lsu_io_axi_b_bits_id = io_lsu_axi_b_bits_id; // @[quasar.scala 285:27] - assign lsu_io_axi_ar_ready = io_lsu_axi_ar_ready; // @[quasar.scala 285:27] - assign lsu_io_axi_r_valid = io_lsu_axi_r_valid; // @[quasar.scala 285:27] - assign lsu_io_axi_r_bits_id = io_lsu_axi_r_bits_id; // @[quasar.scala 285:27] - assign lsu_io_axi_r_bits_data = io_lsu_axi_r_bits_data; // @[quasar.scala 285:27] - assign lsu_io_axi_r_bits_resp = io_lsu_axi_r_bits_resp; // @[quasar.scala 285:27] + assign lsu_io_dccm_rd_data_lo = io_dccm_rd_data_lo; // @[quasar.scala 238:11] + assign lsu_io_dccm_rd_data_hi = io_dccm_rd_data_hi; // @[quasar.scala 238:11] + assign lsu_io_axi_aw_ready = io_lsu_axi_aw_ready; // @[quasar.scala 284:27] + assign lsu_io_axi_w_ready = io_lsu_axi_w_ready; // @[quasar.scala 284:27] + assign lsu_io_axi_b_valid = io_lsu_axi_b_valid; // @[quasar.scala 284:27] + assign lsu_io_axi_b_bits_resp = io_lsu_axi_b_bits_resp; // @[quasar.scala 284:27] + assign lsu_io_axi_b_bits_id = io_lsu_axi_b_bits_id; // @[quasar.scala 284:27] + assign lsu_io_axi_ar_ready = io_lsu_axi_ar_ready; // @[quasar.scala 284:27] + assign lsu_io_axi_r_valid = io_lsu_axi_r_valid; // @[quasar.scala 284:27] + assign lsu_io_axi_r_bits_id = io_lsu_axi_r_bits_id; // @[quasar.scala 284:27] + assign lsu_io_axi_r_bits_data = io_lsu_axi_r_bits_data; // @[quasar.scala 284:27] + assign lsu_io_axi_r_bits_resp = io_lsu_axi_r_bits_resp; // @[quasar.scala 284:27] assign lsu_io_dec_tlu_flush_lower_r = dec_io_dec_exu_tlu_exu_dec_tlu_flush_lower_r; // @[quasar.scala 159:32] assign lsu_io_dec_tlu_i0_kill_writeb_r = dec_io_dec_tlu_i0_kill_writeb_r; // @[quasar.scala 160:35] assign lsu_io_dec_tlu_force_halt = dec_io_ifu_dec_dec_mem_ctrl_dec_tlu_force_halt; // @[quasar.scala 161:29] @@ -82987,52 +82987,52 @@ module quasar( assign lsu_io_scan_mode = io_scan_mode; // @[quasar.scala 172:20] assign lsu_io_free_clk = rvclkhdr_io_l1clk; // @[quasar.scala 173:19] assign pic_ctrl_inst_clock = clock; - assign pic_ctrl_inst_reset = io_core_rst_l; // @[quasar.scala 211:23] - assign pic_ctrl_inst_io_scan_mode = io_scan_mode; // @[quasar.scala 210:30] - assign pic_ctrl_inst_io_free_clk = rvclkhdr_io_l1clk; // @[quasar.scala 212:29] - assign pic_ctrl_inst_io_active_clk = rvclkhdr_1_io_l1clk; // @[quasar.scala 213:31] - assign pic_ctrl_inst_io_clk_override = dec_io_dec_tlu_pic_clk_override; // @[quasar.scala 214:33] - assign pic_ctrl_inst_io_extintsrc_req = {{1'd0}, io_extintsrc_req}; // @[quasar.scala 215:34] - assign pic_ctrl_inst_io_lsu_pic_picm_wren = lsu_io_lsu_pic_picm_wren; // @[quasar.scala 216:28] - assign pic_ctrl_inst_io_lsu_pic_picm_rden = lsu_io_lsu_pic_picm_rden; // @[quasar.scala 216:28] - assign pic_ctrl_inst_io_lsu_pic_picm_mken = lsu_io_lsu_pic_picm_mken; // @[quasar.scala 216:28] - assign pic_ctrl_inst_io_lsu_pic_picm_rdaddr = lsu_io_lsu_pic_picm_rdaddr; // @[quasar.scala 216:28] - assign pic_ctrl_inst_io_lsu_pic_picm_wraddr = lsu_io_lsu_pic_picm_wraddr; // @[quasar.scala 216:28] - assign pic_ctrl_inst_io_lsu_pic_picm_wr_data = lsu_io_lsu_pic_picm_wr_data; // @[quasar.scala 216:28] - assign pic_ctrl_inst_io_dec_pic_dec_tlu_meicurpl = dec_io_dec_pic_dec_tlu_meicurpl; // @[quasar.scala 217:28] - assign pic_ctrl_inst_io_dec_pic_dec_tlu_meipt = dec_io_dec_pic_dec_tlu_meipt; // @[quasar.scala 217:28] + assign pic_ctrl_inst_reset = io_core_rst_l; // @[quasar.scala 210:23] + assign pic_ctrl_inst_io_scan_mode = io_scan_mode; // @[quasar.scala 209:30] + assign pic_ctrl_inst_io_free_clk = rvclkhdr_io_l1clk; // @[quasar.scala 211:29] + assign pic_ctrl_inst_io_active_clk = rvclkhdr_1_io_l1clk; // @[quasar.scala 212:31] + assign pic_ctrl_inst_io_clk_override = dec_io_dec_tlu_pic_clk_override; // @[quasar.scala 213:33] + assign pic_ctrl_inst_io_extintsrc_req = {{1'd0}, io_extintsrc_req}; // @[quasar.scala 214:34] + assign pic_ctrl_inst_io_lsu_pic_picm_wren = lsu_io_lsu_pic_picm_wren; // @[quasar.scala 215:28] + assign pic_ctrl_inst_io_lsu_pic_picm_rden = lsu_io_lsu_pic_picm_rden; // @[quasar.scala 215:28] + assign pic_ctrl_inst_io_lsu_pic_picm_mken = lsu_io_lsu_pic_picm_mken; // @[quasar.scala 215:28] + assign pic_ctrl_inst_io_lsu_pic_picm_rdaddr = lsu_io_lsu_pic_picm_rdaddr; // @[quasar.scala 215:28] + assign pic_ctrl_inst_io_lsu_pic_picm_wraddr = lsu_io_lsu_pic_picm_wraddr; // @[quasar.scala 215:28] + assign pic_ctrl_inst_io_lsu_pic_picm_wr_data = lsu_io_lsu_pic_picm_wr_data; // @[quasar.scala 215:28] + assign pic_ctrl_inst_io_dec_pic_dec_tlu_meicurpl = dec_io_dec_pic_dec_tlu_meicurpl; // @[quasar.scala 216:28] + assign pic_ctrl_inst_io_dec_pic_dec_tlu_meipt = dec_io_dec_pic_dec_tlu_meipt; // @[quasar.scala 216:28] assign dma_ctrl_clock = clock; - assign dma_ctrl_reset = io_core_rst_l; // @[quasar.scala 195:18] - assign dma_ctrl_io_free_clk = rvclkhdr_io_l1clk; // @[quasar.scala 196:24] - assign dma_ctrl_io_dma_bus_clk_en = io_dma_bus_clk_en; // @[quasar.scala 197:30] - assign dma_ctrl_io_clk_override = dec_io_dec_tlu_misc_clk_override; // @[quasar.scala 198:28] - assign dma_ctrl_io_scan_mode = io_scan_mode; // @[quasar.scala 199:25] - assign dma_ctrl_io_dbg_cmd_size = dbg_io_dbg_cmd_size; // @[quasar.scala 202:28] - assign dma_ctrl_io_dbg_dma_dbg_ib_dbg_cmd_valid = dbg_io_dbg_dma_dbg_ib_dbg_cmd_valid; // @[quasar.scala 200:23] - assign dma_ctrl_io_dbg_dma_dbg_ib_dbg_cmd_write = dbg_io_dbg_dma_dbg_ib_dbg_cmd_write; // @[quasar.scala 200:23] - assign dma_ctrl_io_dbg_dma_dbg_ib_dbg_cmd_type = dbg_io_dbg_dma_dbg_ib_dbg_cmd_type; // @[quasar.scala 200:23] - assign dma_ctrl_io_dbg_dma_dbg_ib_dbg_cmd_addr = dbg_io_dbg_dma_dbg_ib_dbg_cmd_addr; // @[quasar.scala 200:23] - assign dma_ctrl_io_dbg_dma_dbg_dctl_dbg_cmd_wrdata = dbg_io_dbg_dma_dbg_dctl_dbg_cmd_wrdata; // @[quasar.scala 200:23] - assign dma_ctrl_io_dbg_dma_io_dbg_dma_bubble = dbg_io_dbg_dma_io_dbg_dma_bubble; // @[quasar.scala 201:26] + assign dma_ctrl_reset = io_core_rst_l; // @[quasar.scala 194:18] + assign dma_ctrl_io_free_clk = rvclkhdr_io_l1clk; // @[quasar.scala 195:24] + assign dma_ctrl_io_dma_bus_clk_en = io_dma_bus_clk_en; // @[quasar.scala 196:30] + assign dma_ctrl_io_clk_override = dec_io_dec_tlu_misc_clk_override; // @[quasar.scala 197:28] + assign dma_ctrl_io_scan_mode = io_scan_mode; // @[quasar.scala 198:25] + assign dma_ctrl_io_dbg_cmd_size = dbg_io_dbg_cmd_size; // @[quasar.scala 201:28] + assign dma_ctrl_io_dbg_dma_dbg_ib_dbg_cmd_valid = dbg_io_dbg_dma_dbg_ib_dbg_cmd_valid; // @[quasar.scala 199:23] + assign dma_ctrl_io_dbg_dma_dbg_ib_dbg_cmd_write = dbg_io_dbg_dma_dbg_ib_dbg_cmd_write; // @[quasar.scala 199:23] + assign dma_ctrl_io_dbg_dma_dbg_ib_dbg_cmd_type = dbg_io_dbg_dma_dbg_ib_dbg_cmd_type; // @[quasar.scala 199:23] + assign dma_ctrl_io_dbg_dma_dbg_ib_dbg_cmd_addr = dbg_io_dbg_dma_dbg_ib_dbg_cmd_addr; // @[quasar.scala 199:23] + assign dma_ctrl_io_dbg_dma_dbg_dctl_dbg_cmd_wrdata = dbg_io_dbg_dma_dbg_dctl_dbg_cmd_wrdata; // @[quasar.scala 199:23] + assign dma_ctrl_io_dbg_dma_io_dbg_dma_bubble = dbg_io_dbg_dma_io_dbg_dma_bubble; // @[quasar.scala 200:26] assign dma_ctrl_io_dec_dma_tlu_dma_dec_tlu_dma_qos_prty = dec_io_dec_dma_tlu_dma_dec_tlu_dma_qos_prty; // @[quasar.scala 125:18] - assign dma_ctrl_io_iccm_dma_rvalid = ifu_io_iccm_dma_rvalid; // @[quasar.scala 203:31] - assign dma_ctrl_io_iccm_dma_ecc_error = ifu_io_iccm_dma_ecc_error; // @[quasar.scala 207:34] - assign dma_ctrl_io_iccm_dma_rtag = ifu_io_iccm_dma_rtag; // @[quasar.scala 204:29] - assign dma_ctrl_io_iccm_dma_rdata = ifu_io_iccm_dma_rdata; // @[quasar.scala 205:30] - assign dma_ctrl_io_iccm_ready = ifu_io_iccm_ready; // @[quasar.scala 206:26] - assign dma_ctrl_io_dma_axi_aw_valid = io_dma_axi_aw_valid; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_aw_bits_id = io_dma_axi_aw_bits_id; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_aw_bits_addr = io_dma_axi_aw_bits_addr; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_aw_bits_size = io_dma_axi_aw_bits_size; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_w_valid = io_dma_axi_w_valid; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_w_bits_data = io_dma_axi_w_bits_data; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_w_bits_strb = io_dma_axi_w_bits_strb; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_b_ready = io_dma_axi_b_ready; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_ar_valid = io_dma_axi_ar_valid; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_ar_bits_id = io_dma_axi_ar_bits_id; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_ar_bits_addr = io_dma_axi_ar_bits_addr; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_ar_bits_size = io_dma_axi_ar_bits_size; // @[quasar.scala 282:27] - assign dma_ctrl_io_dma_axi_r_ready = io_dma_axi_r_ready; // @[quasar.scala 282:27] + assign dma_ctrl_io_iccm_dma_rvalid = ifu_io_iccm_dma_rvalid; // @[quasar.scala 202:31] + assign dma_ctrl_io_iccm_dma_ecc_error = ifu_io_iccm_dma_ecc_error; // @[quasar.scala 206:34] + assign dma_ctrl_io_iccm_dma_rtag = ifu_io_iccm_dma_rtag; // @[quasar.scala 203:29] + assign dma_ctrl_io_iccm_dma_rdata = ifu_io_iccm_dma_rdata; // @[quasar.scala 204:30] + assign dma_ctrl_io_iccm_ready = ifu_io_iccm_ready; // @[quasar.scala 205:26] + assign dma_ctrl_io_dma_axi_aw_valid = io_dma_axi_aw_valid; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_aw_bits_id = io_dma_axi_aw_bits_id; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_aw_bits_addr = io_dma_axi_aw_bits_addr; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_aw_bits_size = io_dma_axi_aw_bits_size; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_w_valid = io_dma_axi_w_valid; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_w_bits_data = io_dma_axi_w_bits_data; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_w_bits_strb = io_dma_axi_w_bits_strb; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_b_ready = io_dma_axi_b_ready; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_ar_valid = io_dma_axi_ar_valid; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_ar_bits_id = io_dma_axi_ar_bits_id; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_ar_bits_addr = io_dma_axi_ar_bits_addr; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_ar_bits_size = io_dma_axi_ar_bits_size; // @[quasar.scala 281:27] + assign dma_ctrl_io_dma_axi_r_ready = io_dma_axi_r_ready; // @[quasar.scala 281:27] assign dma_ctrl_io_lsu_dma_dma_dccm_ctl_dccm_dma_rvalid = lsu_io_lsu_dma_dma_dccm_ctl_dccm_dma_rvalid; // @[quasar.scala 171:18] assign dma_ctrl_io_lsu_dma_dma_dccm_ctl_dccm_dma_ecc_error = lsu_io_lsu_dma_dma_dccm_ctl_dccm_dma_ecc_error; // @[quasar.scala 171:18] assign dma_ctrl_io_lsu_dma_dma_dccm_ctl_dccm_dma_rtag = lsu_io_lsu_dma_dma_dccm_ctl_dccm_dma_rtag; // @[quasar.scala 171:18] diff --git a/src/main/scala/quasar.scala b/src/main/scala/quasar.scala index bf466197..a50b1524 100644 --- a/src/main/scala/quasar.scala +++ b/src/main/scala/quasar.scala @@ -173,7 +173,6 @@ class quasar extends Module with RequireAsyncReset with lib { lsu.io.free_clk := free_clk // Debug lets go - dbg.reset := io.core_rst_l dbg.io.core_dbg_rddata := Mux(dma_ctrl.io.dma_dbg_cmd_done, dma_ctrl.io.dma_dbg_rddata, dec.io.dec_dbg_rddata) dbg.io.core_dbg_cmd_done := dma_ctrl.io.dma_dbg_cmd_done | dec.io.dec_dbg_cmd_done dbg.io.core_dbg_cmd_fail := dma_ctrl.io.dma_dbg_cmd_fail | dec.io.dec_dbg_cmd_fail diff --git a/target/scala-2.12/classes/QUASAR$.class b/target/scala-2.12/classes/QUASAR$.class index e62ad7876586282fb177d7765912f36f6b476fe7..02057f0a141c74cfaa9f0c8adbc23d7c5fb236e2 100644 GIT binary patch delta 99 zcmaDZ`&@Rz8ZJhK$!oc6f#gOW@ySfwo={dYw-t~zkJ|=F-sXnLOHMZ8u>kV3d0fG& gg21HYWLaKkM#agAyuPf84C+9!&Ab&rQipFh0IsYXT>t<8 delta 99 zcmaDZ`&@Rz8ZJh~$!oc6f#gOW@ySfwo={dYw-t~zkJ|=F-sXnLOHMZ8u>kV3d0fG& gg21HYWLaKkMy1J#yuPeT4C+9!&Ab&rQipFh0I>TTY5)KL diff --git a/target/scala-2.12/classes/QUASAR$delayedInit$body.class b/target/scala-2.12/classes/QUASAR$delayedInit$body.class index b6f388cfda18865c1176a0465d4685277868d12b..08686436dfc52b0936146d5da4505c7ec95f9e18 100644 GIT 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\ No newline at end of file diff --git a/target/streams/_global/update/_global/streams/out b/target/streams/_global/update/_global/streams/out index e750f3ac..a24fcdeb 100644 --- a/target/streams/_global/update/_global/streams/out +++ b/target/streams/_global/update/_global/streams/out @@ -1,3 +1,3 @@ -[debug] "not up to date. inChanged = true, force = false -[debug] Updating ... -[debug] Done updating  +[debug] "not up to date. inChanged = true, force = false +[debug] Updating ... +[debug] Done updating diff --git a/target/streams/compile/externalDependencyClasspath/_global/streams/export b/target/streams/compile/externalDependencyClasspath/_global/streams/export index 58921df4..414eb951 100644 --- a/target/streams/compile/externalDependencyClasspath/_global/streams/export +++ b/target/streams/compile/externalDependencyClasspath/_global/streams/export @@ -1 +1 @@ -/home/abdulhameed.akram/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/abdulhameed.akram/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar +/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar diff --git a/target/streams/compile/managedClasspath/_global/streams/export b/target/streams/compile/managedClasspath/_global/streams/export index 58921df4..414eb951 100644 --- a/target/streams/compile/managedClasspath/_global/streams/export +++ b/target/streams/compile/managedClasspath/_global/streams/export @@ -1 +1 @@ -/home/abdulhameed.akram/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/abdulhameed.akram/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar +/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar diff --git a/target/streams/runtime/externalDependencyClasspath/_global/streams/export b/target/streams/runtime/externalDependencyClasspath/_global/streams/export index 58921df4..414eb951 100644 --- a/target/streams/runtime/externalDependencyClasspath/_global/streams/export +++ b/target/streams/runtime/externalDependencyClasspath/_global/streams/export @@ -1 +1 @@ -/home/abdulhameed.akram/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/abdulhameed.akram/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar +/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/waleedbinehsan/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/waleedbinehsan/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar diff --git a/target/streams/runtime/managedClasspath/_global/streams/export b/target/streams/runtime/managedClasspath/_global/streams/export index 58921df4..414eb951 100644 --- a/target/streams/runtime/managedClasspath/_global/streams/export +++ b/target/streams/runtime/managedClasspath/_global/streams/export @@ -1 +1 @@ -/home/abdulhameed.akram/.sbt/boot/scala-2.12.10/lib/scala-library.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel-iotesters_2.12/1.4.1/chisel-iotesters_2.12-1.4.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chiseltest_2.12/0.2.1/chiseltest_2.12-0.2.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3_2.12/3.3.1/chisel3_2.12-3.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl_2.12/1.3.1/firrtl_2.12-1.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/firrtl-interpreter_2.12/1.3.1/firrtl-interpreter_2.12-1.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/treadle_2.12/1.2.1/treadle_2.12-1.2.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/junit/junit/4.13/junit-4.13.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalatest/scalatest_2.12/3.0.8/scalatest_2.12-3.0.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalacheck/scalacheck_2.12/1.14.3/scalacheck_2.12-1.14.3.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/scopt/scopt_2.12/3.7.1/scopt_2.12-3.7.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/lihaoyi/utest_2.12/0.6.6/utest_2.12-0.6.6.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-macros_2.12/3.3.1/chisel3-macros_2.12-3.3.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/edu/berkeley/cs/chisel3-core_2.12/3.3.1/chisel3-core_2.12-3.3.1.jar:/home/abdulhameed.akram/.sbt/boot/scala-2.12.10/lib/scala-reflect.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/antlr/antlr4-runtime/4.7.1/antlr4-runtime-4.7.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/google/protobuf/protobuf-java/3.9.0/protobuf-java-3.9.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/net/jcazevedo/moultingyaml_2.12/0.4.2/moultingyaml_2.12-0.4.2.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-native_2.12/3.6.8/json4s-native_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-text/1.8/commons-text-1.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-jline/2.12.1/scala-jline-2.12.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/hamcrest/hamcrest-core/1.3/hamcrest-core-1.3.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scalactic/scalactic_2.12/3.0.8/scalactic_2.12-3.0.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-lang/modules/scala-xml_2.12/1.2.0/scala-xml_2.12-1.2.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/scala-sbt/test-interface/1.0/test-interface-1.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/portable-scala/portable-scala-reflect_2.12/0.1.0/portable-scala-reflect_2.12-0.1.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/github/nscala-time/nscala-time_2.12/2.22.0/nscala-time_2.12-2.22.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/yaml/snakeyaml/1.26/snakeyaml-1.26.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-core_2.12/3.6.8/json4s-core_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/apache/commons/commons-lang3/3.9/commons-lang3-3.9.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/fusesource/jansi/jansi/1.11/jansi-1.11.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/joda-time/joda-time/2.10.1/joda-time-2.10.1.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/joda/joda-convert/2.2.0/joda-convert-2.2.0.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-ast_2.12/3.6.8/json4s-ast_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/org/json4s/json4s-scalap_2.12/3.6.8/json4s-scalap_2.12-3.6.8.jar:/home/abdulhameed.akram/.cache/coursier/v1/https/repo1.maven.org/maven2/com/thoughtworks/paranamer/paranamer/2.8/paranamer-2.8.jar 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