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Aligner Updated

This commit is contained in:
waleed-lm 2020-10-13 19:35:39 +05:00
parent a0e4ed76e6
commit d287a22f43
2 changed files with 2 additions and 2 deletions
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2
el2_ifu_aln_ctl.fir
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@ -2786,7 +2786,7 @@ circuit el2_ifu_aln_ctl :
wire _T_509 : UInt<16> @[Mux.scala 27:72] wire _T_509 : UInt<16> @[Mux.scala 27:72]
_T_509 <= _T_508 @[Mux.scala 27:72] _T_509 <= _T_508 @[Mux.scala 27:72]
q1final <= _T_509 @[el2_ifu_aln_ctl.scala 314:11] q1final <= _T_509 @[el2_ifu_aln_ctl.scala 314:11]
node _T_510 = bits(f0val, 0, 0) @[el2_ifu_aln_ctl.scala 316:34] node _T_510 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 316:34]
node _T_511 = bits(_T_510, 0, 0) @[el2_ifu_aln_ctl.scala 316:38] node _T_511 = bits(_T_510, 0, 0) @[el2_ifu_aln_ctl.scala 316:38]
node _T_512 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 316:64] node _T_512 = bits(f0val, 1, 1) @[el2_ifu_aln_ctl.scala 316:64]
node _T_513 = not(_T_512) @[el2_ifu_aln_ctl.scala 316:58] node _T_513 = not(_T_512) @[el2_ifu_aln_ctl.scala 316:58]

2
el2_ifu_aln_ctl.v
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@ -620,7 +620,7 @@ module el2_ifu_aln_ctl(
wire [15:0] _T_497 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72] wire [15:0] _T_497 = q0sel[1] ? q0eff[31:16] : 16'h0; // @[Mux.scala 27:72]
wire [31:0] _GEN_12 = {{16'd0}, _T_497}; // @[Mux.scala 27:72] wire [31:0] _GEN_12 = {{16'd0}, _T_497}; // @[Mux.scala 27:72]
wire [31:0] q0final = _T_496 | _GEN_12; // @[Mux.scala 27:72] wire [31:0] q0final = _T_496 | _GEN_12; // @[Mux.scala 27:72]
wire [31:0] _T_520 = f0val[0] ? q0final : 32'h0; // @[Mux.scala 27:72] wire [31:0] _T_520 = f0val[1] ? q0final : 32'h0; // @[Mux.scala 27:72]
wire _T_513 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 316:58] wire _T_513 = ~f0val[1]; // @[el2_ifu_aln_ctl.scala 316:58]
wire _T_515 = _T_513 & f0val[0]; // @[el2_ifu_aln_ctl.scala 316:68] wire _T_515 = _T_513 & f0val[0]; // @[el2_ifu_aln_ctl.scala 316:68]
wire _T_197 = _T_186 & q1off; // @[Mux.scala 27:72] wire _T_197 = _T_186 & q1off; // @[Mux.scala 27:72]