dccm_ctl with lsu_rdata_corr_m corrected
This commit is contained in:
Laraib Khan
parent
a6f2164595
commit
d8a8c019ed
|
|
@ -571,7 +571,7 @@ circuit lsu_dccm_ctl :
|
|||
node _T_414 = bits(io.addr_in_pic_m, 0, 0) @[lsu_dccm_ctl.scala 156:232]
|
||||
node _T_415 = bits(picm_rd_data_m, 7, 0) @[lsu_dccm_ctl.scala 156:253]
|
||||
node _T_416 = bits(io.addr_in_dccm_m, 0, 0) @[Bitwise.scala 72:15]
|
||||
node _T_417 = mux(_T_416, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_417 = mux(_T_416, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_418 = bits(dccm_rdata_m, 7, 0) @[lsu_dccm_ctl.scala 156:308]
|
||||
node _T_419 = and(_T_417, _T_418) @[lsu_dccm_ctl.scala 156:294]
|
||||
node _T_420 = mux(_T_414, _T_415, _T_419) @[lsu_dccm_ctl.scala 156:214]
|
||||
|
|
@ -613,7 +613,7 @@ circuit lsu_dccm_ctl :
|
|||
node _T_456 = bits(io.addr_in_pic_m, 0, 0) @[lsu_dccm_ctl.scala 156:232]
|
||||
node _T_457 = bits(picm_rd_data_m, 15, 8) @[lsu_dccm_ctl.scala 156:253]
|
||||
node _T_458 = bits(io.addr_in_dccm_m, 0, 0) @[Bitwise.scala 72:15]
|
||||
node _T_459 = mux(_T_458, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_459 = mux(_T_458, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_460 = bits(dccm_rdata_m, 15, 8) @[lsu_dccm_ctl.scala 156:308]
|
||||
node _T_461 = and(_T_459, _T_460) @[lsu_dccm_ctl.scala 156:294]
|
||||
node _T_462 = mux(_T_456, _T_457, _T_461) @[lsu_dccm_ctl.scala 156:214]
|
||||
|
|
@ -655,7 +655,7 @@ circuit lsu_dccm_ctl :
|
|||
node _T_498 = bits(io.addr_in_pic_m, 0, 0) @[lsu_dccm_ctl.scala 156:232]
|
||||
node _T_499 = bits(picm_rd_data_m, 23, 16) @[lsu_dccm_ctl.scala 156:253]
|
||||
node _T_500 = bits(io.addr_in_dccm_m, 0, 0) @[Bitwise.scala 72:15]
|
||||
node _T_501 = mux(_T_500, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_501 = mux(_T_500, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_502 = bits(dccm_rdata_m, 23, 16) @[lsu_dccm_ctl.scala 156:308]
|
||||
node _T_503 = and(_T_501, _T_502) @[lsu_dccm_ctl.scala 156:294]
|
||||
node _T_504 = mux(_T_498, _T_499, _T_503) @[lsu_dccm_ctl.scala 156:214]
|
||||
|
|
@ -697,7 +697,7 @@ circuit lsu_dccm_ctl :
|
|||
node _T_540 = bits(io.addr_in_pic_m, 0, 0) @[lsu_dccm_ctl.scala 156:232]
|
||||
node _T_541 = bits(picm_rd_data_m, 31, 24) @[lsu_dccm_ctl.scala 156:253]
|
||||
node _T_542 = bits(io.addr_in_dccm_m, 0, 0) @[Bitwise.scala 72:15]
|
||||
node _T_543 = mux(_T_542, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_543 = mux(_T_542, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_544 = bits(dccm_rdata_m, 31, 24) @[lsu_dccm_ctl.scala 156:308]
|
||||
node _T_545 = and(_T_543, _T_544) @[lsu_dccm_ctl.scala 156:294]
|
||||
node _T_546 = mux(_T_540, _T_541, _T_545) @[lsu_dccm_ctl.scala 156:214]
|
||||
|
|
@ -739,7 +739,7 @@ circuit lsu_dccm_ctl :
|
|||
node _T_582 = bits(io.addr_in_pic_m, 0, 0) @[lsu_dccm_ctl.scala 156:232]
|
||||
node _T_583 = bits(picm_rd_data_m, 39, 32) @[lsu_dccm_ctl.scala 156:253]
|
||||
node _T_584 = bits(io.addr_in_dccm_m, 0, 0) @[Bitwise.scala 72:15]
|
||||
node _T_585 = mux(_T_584, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_585 = mux(_T_584, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_586 = bits(dccm_rdata_m, 39, 32) @[lsu_dccm_ctl.scala 156:308]
|
||||
node _T_587 = and(_T_585, _T_586) @[lsu_dccm_ctl.scala 156:294]
|
||||
node _T_588 = mux(_T_582, _T_583, _T_587) @[lsu_dccm_ctl.scala 156:214]
|
||||
|
|
@ -781,7 +781,7 @@ circuit lsu_dccm_ctl :
|
|||
node _T_624 = bits(io.addr_in_pic_m, 0, 0) @[lsu_dccm_ctl.scala 156:232]
|
||||
node _T_625 = bits(picm_rd_data_m, 47, 40) @[lsu_dccm_ctl.scala 156:253]
|
||||
node _T_626 = bits(io.addr_in_dccm_m, 0, 0) @[Bitwise.scala 72:15]
|
||||
node _T_627 = mux(_T_626, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_627 = mux(_T_626, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_628 = bits(dccm_rdata_m, 47, 40) @[lsu_dccm_ctl.scala 156:308]
|
||||
node _T_629 = and(_T_627, _T_628) @[lsu_dccm_ctl.scala 156:294]
|
||||
node _T_630 = mux(_T_624, _T_625, _T_629) @[lsu_dccm_ctl.scala 156:214]
|
||||
|
|
@ -823,7 +823,7 @@ circuit lsu_dccm_ctl :
|
|||
node _T_666 = bits(io.addr_in_pic_m, 0, 0) @[lsu_dccm_ctl.scala 156:232]
|
||||
node _T_667 = bits(picm_rd_data_m, 55, 48) @[lsu_dccm_ctl.scala 156:253]
|
||||
node _T_668 = bits(io.addr_in_dccm_m, 0, 0) @[Bitwise.scala 72:15]
|
||||
node _T_669 = mux(_T_668, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_669 = mux(_T_668, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_670 = bits(dccm_rdata_m, 55, 48) @[lsu_dccm_ctl.scala 156:308]
|
||||
node _T_671 = and(_T_669, _T_670) @[lsu_dccm_ctl.scala 156:294]
|
||||
node _T_672 = mux(_T_666, _T_667, _T_671) @[lsu_dccm_ctl.scala 156:214]
|
||||
|
|
@ -865,7 +865,7 @@ circuit lsu_dccm_ctl :
|
|||
node _T_708 = bits(io.addr_in_pic_m, 0, 0) @[lsu_dccm_ctl.scala 156:232]
|
||||
node _T_709 = bits(picm_rd_data_m, 63, 56) @[lsu_dccm_ctl.scala 156:253]
|
||||
node _T_710 = bits(io.addr_in_dccm_m, 0, 0) @[Bitwise.scala 72:15]
|
||||
node _T_711 = mux(_T_710, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_711 = mux(_T_710, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
|
||||
node _T_712 = bits(dccm_rdata_m, 63, 56) @[lsu_dccm_ctl.scala 156:308]
|
||||
node _T_713 = and(_T_711, _T_712) @[lsu_dccm_ctl.scala 156:294]
|
||||
node _T_714 = mux(_T_708, _T_709, _T_713) @[lsu_dccm_ctl.scala 156:214]
|
||||
|
|
|
|||
334
lsu_dccm_ctl.v
334
lsu_dccm_ctl.v
|
|
@ -356,141 +356,139 @@ module lsu_dccm_ctl(
|
|||
wire [63:0] _T_407 = _T_405 & 64'haaaaaaaaaaaaaaaa; // @[Bitwise.scala 103:75]
|
||||
wire [63:0] lsu_rdata_corr_m = _T_403 | _T_407; // @[Bitwise.scala 103:39]
|
||||
wire [63:0] _T_4 = {lsu_rdata_corr_m[31:0],lsu_rdata_corr_m[31:0]}; // @[Cat.scala 29:58]
|
||||
wire [1:0] _T_417 = io_addr_in_dccm_m ? 2'h3 : 2'h0; // @[Bitwise.scala 72:12]
|
||||
wire [7:0] _GEN_21 = {{6'd0}, _T_417}; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_419 = _GEN_21 & dccm_rdata_m[7:0]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_419 = _T_14 & dccm_rdata_m[7:0]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_420 = io_addr_in_pic_m ? picm_rd_data_m[7:0] : _T_419; // @[lsu_dccm_ctl.scala 156:214]
|
||||
wire [7:0] _T_421 = _T_6[0] ? _T_9[7:0] : _T_420; // @[lsu_dccm_ctl.scala 156:78]
|
||||
wire [7:0] _T_425 = {{4'd0}, _T_421[7:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_427 = {_T_421[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_429 = _T_427 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_430 = _T_425 | _T_429; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_22 = {{2'd0}, _T_430[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_435 = _GEN_22 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_21 = {{2'd0}, _T_430[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_435 = _GEN_21 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_437 = {_T_430[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_439 = _T_437 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_440 = _T_435 | _T_439; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_23 = {{1'd0}, _T_440[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_445 = _GEN_23 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_22 = {{1'd0}, _T_440[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_445 = _GEN_22 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_447 = {_T_440[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_449 = _T_447 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_450 = _T_445 | _T_449; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _T_461 = _GEN_21 & dccm_rdata_m[15:8]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_461 = _T_14 & dccm_rdata_m[15:8]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_462 = io_addr_in_pic_m ? picm_rd_data_m[15:8] : _T_461; // @[lsu_dccm_ctl.scala 156:214]
|
||||
wire [7:0] _T_463 = _T_6[1] ? _T_9[15:8] : _T_462; // @[lsu_dccm_ctl.scala 156:78]
|
||||
wire [7:0] _T_467 = {{4'd0}, _T_463[7:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_469 = {_T_463[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_471 = _T_469 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_472 = _T_467 | _T_471; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_25 = {{2'd0}, _T_472[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_477 = _GEN_25 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_23 = {{2'd0}, _T_472[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_477 = _GEN_23 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_479 = {_T_472[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_481 = _T_479 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_482 = _T_477 | _T_481; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_26 = {{1'd0}, _T_482[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_487 = _GEN_26 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_24 = {{1'd0}, _T_482[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_487 = _GEN_24 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_489 = {_T_482[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_491 = _T_489 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_492 = _T_487 | _T_491; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _T_503 = _GEN_21 & dccm_rdata_m[23:16]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_503 = _T_14 & dccm_rdata_m[23:16]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_504 = io_addr_in_pic_m ? picm_rd_data_m[23:16] : _T_503; // @[lsu_dccm_ctl.scala 156:214]
|
||||
wire [7:0] _T_505 = _T_6[2] ? _T_9[23:16] : _T_504; // @[lsu_dccm_ctl.scala 156:78]
|
||||
wire [7:0] _T_509 = {{4'd0}, _T_505[7:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_511 = {_T_505[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_513 = _T_511 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_514 = _T_509 | _T_513; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_28 = {{2'd0}, _T_514[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_519 = _GEN_28 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_25 = {{2'd0}, _T_514[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_519 = _GEN_25 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_521 = {_T_514[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_523 = _T_521 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_524 = _T_519 | _T_523; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_29 = {{1'd0}, _T_524[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_529 = _GEN_29 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_26 = {{1'd0}, _T_524[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_529 = _GEN_26 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_531 = {_T_524[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_533 = _T_531 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_534 = _T_529 | _T_533; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _T_545 = _GEN_21 & dccm_rdata_m[31:24]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_545 = _T_14 & dccm_rdata_m[31:24]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_546 = io_addr_in_pic_m ? picm_rd_data_m[31:24] : _T_545; // @[lsu_dccm_ctl.scala 156:214]
|
||||
wire [7:0] _T_547 = _T_6[3] ? _T_9[31:24] : _T_546; // @[lsu_dccm_ctl.scala 156:78]
|
||||
wire [7:0] _T_551 = {{4'd0}, _T_547[7:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_553 = {_T_547[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_555 = _T_553 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_556 = _T_551 | _T_555; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_31 = {{2'd0}, _T_556[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_561 = _GEN_31 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_27 = {{2'd0}, _T_556[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_561 = _GEN_27 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_563 = {_T_556[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_565 = _T_563 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_566 = _T_561 | _T_565; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_32 = {{1'd0}, _T_566[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_571 = _GEN_32 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_28 = {{1'd0}, _T_566[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_571 = _GEN_28 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_573 = {_T_566[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_575 = _T_573 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_576 = _T_571 | _T_575; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _T_587 = _GEN_21 & dccm_rdata_m[39:32]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_587 = _T_14 & dccm_rdata_m[39:32]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_588 = io_addr_in_pic_m ? picm_rd_data_m[39:32] : _T_587; // @[lsu_dccm_ctl.scala 156:214]
|
||||
wire [7:0] _T_589 = _T_6[4] ? _T_9[39:32] : _T_588; // @[lsu_dccm_ctl.scala 156:78]
|
||||
wire [7:0] _T_593 = {{4'd0}, _T_589[7:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_595 = {_T_589[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_597 = _T_595 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_598 = _T_593 | _T_597; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_34 = {{2'd0}, _T_598[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_603 = _GEN_34 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_29 = {{2'd0}, _T_598[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_603 = _GEN_29 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_605 = {_T_598[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_607 = _T_605 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_608 = _T_603 | _T_607; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_35 = {{1'd0}, _T_608[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_613 = _GEN_35 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_30 = {{1'd0}, _T_608[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_613 = _GEN_30 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_615 = {_T_608[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_617 = _T_615 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_618 = _T_613 | _T_617; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _T_629 = _GEN_21 & dccm_rdata_m[47:40]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_629 = _T_14 & dccm_rdata_m[47:40]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_630 = io_addr_in_pic_m ? picm_rd_data_m[47:40] : _T_629; // @[lsu_dccm_ctl.scala 156:214]
|
||||
wire [7:0] _T_631 = _T_6[5] ? _T_9[47:40] : _T_630; // @[lsu_dccm_ctl.scala 156:78]
|
||||
wire [7:0] _T_635 = {{4'd0}, _T_631[7:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_637 = {_T_631[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_639 = _T_637 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_640 = _T_635 | _T_639; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_37 = {{2'd0}, _T_640[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_645 = _GEN_37 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_31 = {{2'd0}, _T_640[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_645 = _GEN_31 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_647 = {_T_640[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_649 = _T_647 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_650 = _T_645 | _T_649; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_38 = {{1'd0}, _T_650[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_655 = _GEN_38 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_32 = {{1'd0}, _T_650[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_655 = _GEN_32 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_657 = {_T_650[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_659 = _T_657 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_660 = _T_655 | _T_659; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _T_671 = _GEN_21 & dccm_rdata_m[55:48]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_671 = _T_14 & dccm_rdata_m[55:48]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_672 = io_addr_in_pic_m ? picm_rd_data_m[55:48] : _T_671; // @[lsu_dccm_ctl.scala 156:214]
|
||||
wire [7:0] _T_673 = _T_6[6] ? _T_9[55:48] : _T_672; // @[lsu_dccm_ctl.scala 156:78]
|
||||
wire [7:0] _T_677 = {{4'd0}, _T_673[7:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_679 = {_T_673[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_681 = _T_679 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_682 = _T_677 | _T_681; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_40 = {{2'd0}, _T_682[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_687 = _GEN_40 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_33 = {{2'd0}, _T_682[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_687 = _GEN_33 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_689 = {_T_682[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_691 = _T_689 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_692 = _T_687 | _T_691; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_41 = {{1'd0}, _T_692[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_697 = _GEN_41 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_34 = {{1'd0}, _T_692[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_697 = _GEN_34 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_699 = {_T_692[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_701 = _T_699 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_702 = _T_697 | _T_701; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _T_713 = _GEN_21 & dccm_rdata_m[63:56]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_713 = _T_14 & dccm_rdata_m[63:56]; // @[lsu_dccm_ctl.scala 156:294]
|
||||
wire [7:0] _T_714 = io_addr_in_pic_m ? picm_rd_data_m[63:56] : _T_713; // @[lsu_dccm_ctl.scala 156:214]
|
||||
wire [7:0] _T_715 = _T_6[7] ? _T_9[63:56] : _T_714; // @[lsu_dccm_ctl.scala 156:78]
|
||||
wire [7:0] _T_719 = {{4'd0}, _T_715[7:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_721 = {_T_715[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_723 = _T_721 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_724 = _T_719 | _T_723; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_43 = {{2'd0}, _T_724[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_729 = _GEN_43 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_35 = {{2'd0}, _T_724[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_729 = _GEN_35 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_731 = {_T_724[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_733 = _T_731 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_734 = _T_729 | _T_733; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_44 = {{1'd0}, _T_734[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_739 = _GEN_44 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_36 = {{1'd0}, _T_734[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_739 = _GEN_36 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_741 = {_T_734[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_743 = _T_741 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_744 = _T_739 | _T_743; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -499,36 +497,36 @@ module lsu_dccm_ctl(
|
|||
wire [63:0] _T_758 = {_T_752[31:0], 32'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [63:0] _T_760 = _T_758 & 64'hffffffff00000000; // @[Bitwise.scala 103:75]
|
||||
wire [63:0] _T_761 = _T_756 | _T_760; // @[Bitwise.scala 103:39]
|
||||
wire [63:0] _GEN_45 = {{16'd0}, _T_761[63:16]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_766 = _GEN_45 & 64'hffff0000ffff; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _GEN_37 = {{16'd0}, _T_761[63:16]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_766 = _GEN_37 & 64'hffff0000ffff; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_768 = {_T_761[47:0], 16'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [63:0] _T_770 = _T_768 & 64'hffff0000ffff0000; // @[Bitwise.scala 103:75]
|
||||
wire [63:0] _T_771 = _T_766 | _T_770; // @[Bitwise.scala 103:39]
|
||||
wire [63:0] _GEN_46 = {{8'd0}, _T_771[63:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_776 = _GEN_46 & 64'hff00ff00ff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _GEN_38 = {{8'd0}, _T_771[63:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_776 = _GEN_38 & 64'hff00ff00ff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_778 = {_T_771[55:0], 8'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [63:0] _T_780 = _T_778 & 64'hff00ff00ff00ff00; // @[Bitwise.scala 103:75]
|
||||
wire [63:0] _T_781 = _T_776 | _T_780; // @[Bitwise.scala 103:39]
|
||||
wire [63:0] _GEN_47 = {{4'd0}, _T_781[63:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_786 = _GEN_47 & 64'hf0f0f0f0f0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _GEN_39 = {{4'd0}, _T_781[63:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_786 = _GEN_39 & 64'hf0f0f0f0f0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_788 = {_T_781[59:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [63:0] _T_790 = _T_788 & 64'hf0f0f0f0f0f0f0f0; // @[Bitwise.scala 103:75]
|
||||
wire [63:0] _T_791 = _T_786 | _T_790; // @[Bitwise.scala 103:39]
|
||||
wire [63:0] _GEN_48 = {{2'd0}, _T_791[63:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_796 = _GEN_48 & 64'h3333333333333333; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _GEN_40 = {{2'd0}, _T_791[63:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_796 = _GEN_40 & 64'h3333333333333333; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_798 = {_T_791[61:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [63:0] _T_800 = _T_798 & 64'hcccccccccccccccc; // @[Bitwise.scala 103:75]
|
||||
wire [63:0] _T_801 = _T_796 | _T_800; // @[Bitwise.scala 103:39]
|
||||
wire [63:0] _GEN_49 = {{1'd0}, _T_801[63:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_806 = _GEN_49 & 64'h5555555555555555; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _GEN_41 = {{1'd0}, _T_801[63:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_806 = _GEN_41 & 64'h5555555555555555; // @[Bitwise.scala 103:31]
|
||||
wire [63:0] _T_808 = {_T_801[62:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [63:0] _T_810 = _T_808 & 64'haaaaaaaaaaaaaaaa; // @[Bitwise.scala 103:75]
|
||||
wire [63:0] lsu_rdata_m = _T_806 | _T_810; // @[Bitwise.scala 103:39]
|
||||
wire _T_813 = io_addr_in_pic_m | io_addr_in_dccm_m; // @[lsu_dccm_ctl.scala 157:123]
|
||||
wire _T_814 = _T & _T_813; // @[lsu_dccm_ctl.scala 157:103]
|
||||
reg [63:0] _T_818; // @[lib.scala 383:16]
|
||||
wire [3:0] _GEN_50 = {{2'd0}, io_lsu_addr_m[1:0]}; // @[lsu_dccm_ctl.scala 158:49]
|
||||
wire [5:0] _T_820 = 4'h8 * _GEN_50; // @[lsu_dccm_ctl.scala 158:49]
|
||||
wire [3:0] _GEN_42 = {{2'd0}, io_lsu_addr_m[1:0]}; // @[lsu_dccm_ctl.scala 158:49]
|
||||
wire [5:0] _T_820 = 4'h8 * _GEN_42; // @[lsu_dccm_ctl.scala 158:49]
|
||||
wire [63:0] _T_821 = lsu_rdata_m >> _T_820; // @[lsu_dccm_ctl.scala 158:43]
|
||||
wire _T_827 = io_lsu_addr_d[15:2] == io_lsu_addr_r[15:2]; // @[lsu_dccm_ctl.scala 163:60]
|
||||
wire _T_830 = io_end_addr_d[15:2] == io_lsu_addr_r[15:2]; // @[lsu_dccm_ctl.scala 163:133]
|
||||
|
|
@ -629,10 +627,10 @@ module lsu_dccm_ctl(
|
|||
wire [3:0] _T_991 = io_lsu_pkt_r_bits_word ? 4'hf : 4'h0; // @[Bitwise.scala 72:12]
|
||||
wire [3:0] _T_993 = _T_989 | _T_991; // @[lsu_dccm_ctl.scala 217:51]
|
||||
wire [3:0] store_byteen_r = _T_982 & _T_993; // @[lsu_dccm_ctl.scala 216:58]
|
||||
wire [6:0] _GEN_52 = {{3'd0}, store_byteen_m}; // @[lsu_dccm_ctl.scala 220:45]
|
||||
wire [6:0] _T_996 = _GEN_52 << io_lsu_addr_m[1:0]; // @[lsu_dccm_ctl.scala 220:45]
|
||||
wire [6:0] _GEN_53 = {{3'd0}, store_byteen_r}; // @[lsu_dccm_ctl.scala 222:45]
|
||||
wire [6:0] _T_999 = _GEN_53 << io_lsu_addr_r[1:0]; // @[lsu_dccm_ctl.scala 222:45]
|
||||
wire [6:0] _GEN_44 = {{3'd0}, store_byteen_m}; // @[lsu_dccm_ctl.scala 220:45]
|
||||
wire [6:0] _T_996 = _GEN_44 << io_lsu_addr_m[1:0]; // @[lsu_dccm_ctl.scala 220:45]
|
||||
wire [6:0] _GEN_45 = {{3'd0}, store_byteen_r}; // @[lsu_dccm_ctl.scala 222:45]
|
||||
wire [6:0] _T_999 = _GEN_45 << io_lsu_addr_r[1:0]; // @[lsu_dccm_ctl.scala 222:45]
|
||||
wire _T_1002 = io_stbuf_addr_any[15:2] == io_lsu_addr_m[15:2]; // @[lsu_dccm_ctl.scala 225:67]
|
||||
wire dccm_wr_bypass_d_m_lo = _T_1002 & io_addr_in_dccm_m; // @[lsu_dccm_ctl.scala 225:101]
|
||||
wire _T_1005 = io_stbuf_addr_any[15:2] == io_end_addr_m[15:2]; // @[lsu_dccm_ctl.scala 226:67]
|
||||
|
|
@ -642,8 +640,8 @@ module lsu_dccm_ctl(
|
|||
wire _T_1011 = io_stbuf_addr_any[15:2] == io_end_addr_r[15:2]; // @[lsu_dccm_ctl.scala 229:67]
|
||||
wire dccm_wr_bypass_d_r_hi = _T_1011 & io_addr_in_dccm_r; // @[lsu_dccm_ctl.scala 229:101]
|
||||
wire [63:0] _T_1014 = {32'h0,io_store_data_m}; // @[Cat.scala 29:58]
|
||||
wire [126:0] _GEN_55 = {{63'd0}, _T_1014}; // @[lsu_dccm_ctl.scala 258:72]
|
||||
wire [126:0] _T_1017 = _GEN_55 << _T_820; // @[lsu_dccm_ctl.scala 258:72]
|
||||
wire [126:0] _GEN_47 = {{63'd0}, _T_1014}; // @[lsu_dccm_ctl.scala 258:72]
|
||||
wire [126:0] _T_1017 = _GEN_47 << _T_820; // @[lsu_dccm_ctl.scala 258:72]
|
||||
wire [63:0] store_data_pre_m = _T_1017[63:0]; // @[lsu_dccm_ctl.scala 258:29]
|
||||
wire [31:0] store_data_hi_m = store_data_pre_m[63:32]; // @[lsu_dccm_ctl.scala 259:48]
|
||||
wire [31:0] store_data_lo_m = store_data_pre_m[31:0]; // @[lsu_dccm_ctl.scala 260:48]
|
||||
|
|
@ -655,13 +653,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1034 = {_T_1028[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1036 = _T_1034 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1037 = _T_1032 | _T_1036; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_56 = {{2'd0}, _T_1037[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1042 = _GEN_56 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_48 = {{2'd0}, _T_1037[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1042 = _GEN_48 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1044 = {_T_1037[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1046 = _T_1044 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1047 = _T_1042 | _T_1046; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_57 = {{1'd0}, _T_1047[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1052 = _GEN_57 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_49 = {{1'd0}, _T_1047[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1052 = _GEN_49 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1054 = {_T_1047[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1056 = _T_1054 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1057 = _T_1052 | _T_1056; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -671,13 +669,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1072 = {_T_1066[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1074 = _T_1072 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1075 = _T_1070 | _T_1074; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_58 = {{2'd0}, _T_1075[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1080 = _GEN_58 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_50 = {{2'd0}, _T_1075[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1080 = _GEN_50 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1082 = {_T_1075[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1084 = _T_1082 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1085 = _T_1080 | _T_1084; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_59 = {{1'd0}, _T_1085[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1090 = _GEN_59 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_51 = {{1'd0}, _T_1085[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1090 = _GEN_51 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1092 = {_T_1085[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1094 = _T_1092 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1095 = _T_1090 | _T_1094; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -687,13 +685,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1110 = {_T_1104[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1112 = _T_1110 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1113 = _T_1108 | _T_1112; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_60 = {{2'd0}, _T_1113[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1118 = _GEN_60 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_52 = {{2'd0}, _T_1113[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1118 = _GEN_52 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1120 = {_T_1113[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1122 = _T_1120 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1123 = _T_1118 | _T_1122; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_61 = {{1'd0}, _T_1123[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1128 = _GEN_61 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_53 = {{1'd0}, _T_1123[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1128 = _GEN_53 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1130 = {_T_1123[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1132 = _T_1130 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1133 = _T_1128 | _T_1132; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -703,13 +701,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1148 = {_T_1142[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1150 = _T_1148 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1151 = _T_1146 | _T_1150; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_62 = {{2'd0}, _T_1151[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1156 = _GEN_62 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_54 = {{2'd0}, _T_1151[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1156 = _GEN_54 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1158 = {_T_1151[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1160 = _T_1158 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1161 = _T_1156 | _T_1160; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_63 = {{1'd0}, _T_1161[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1166 = _GEN_63 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_55 = {{1'd0}, _T_1161[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1166 = _GEN_55 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1168 = {_T_1161[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1170 = _T_1168 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1171 = _T_1166 | _T_1170; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -718,23 +716,23 @@ module lsu_dccm_ctl(
|
|||
wire [31:0] _T_1181 = {_T_1175[15:0], 16'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1183 = _T_1181 & 32'hffff0000; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1184 = _T_1179 | _T_1183; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_64 = {{8'd0}, _T_1184[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1189 = _GEN_64 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_56 = {{8'd0}, _T_1184[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1189 = _GEN_56 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1191 = {_T_1184[23:0], 8'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1193 = _T_1191 & 32'hff00ff00; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1194 = _T_1189 | _T_1193; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_65 = {{4'd0}, _T_1194[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1199 = _GEN_65 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_57 = {{4'd0}, _T_1194[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1199 = _GEN_57 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1201 = {_T_1194[27:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1203 = _T_1201 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1204 = _T_1199 | _T_1203; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_66 = {{2'd0}, _T_1204[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1209 = _GEN_66 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_58 = {{2'd0}, _T_1204[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1209 = _GEN_58 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1211 = {_T_1204[29:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1213 = _T_1211 & 32'hcccccccc; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1214 = _T_1209 | _T_1213; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_67 = {{1'd0}, _T_1214[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1219 = _GEN_67 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_59 = {{1'd0}, _T_1214[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1219 = _GEN_59 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1221 = {_T_1214[30:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1223 = _T_1221 & 32'haaaaaaaa; // @[Bitwise.scala 103:75]
|
||||
reg [31:0] _T_1225; // @[lsu_dccm_ctl.scala 261:72]
|
||||
|
|
@ -745,13 +743,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1240 = {_T_1234[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1242 = _T_1240 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1243 = _T_1238 | _T_1242; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_68 = {{2'd0}, _T_1243[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1248 = _GEN_68 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_60 = {{2'd0}, _T_1243[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1248 = _GEN_60 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1250 = {_T_1243[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1252 = _T_1250 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1253 = _T_1248 | _T_1252; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_69 = {{1'd0}, _T_1253[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1258 = _GEN_69 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_61 = {{1'd0}, _T_1253[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1258 = _GEN_61 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1260 = {_T_1253[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1262 = _T_1260 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1263 = _T_1258 | _T_1262; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -761,13 +759,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1278 = {_T_1272[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1280 = _T_1278 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1281 = _T_1276 | _T_1280; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_70 = {{2'd0}, _T_1281[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1286 = _GEN_70 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_62 = {{2'd0}, _T_1281[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1286 = _GEN_62 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1288 = {_T_1281[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1290 = _T_1288 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1291 = _T_1286 | _T_1290; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_71 = {{1'd0}, _T_1291[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1296 = _GEN_71 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_63 = {{1'd0}, _T_1291[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1296 = _GEN_63 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1298 = {_T_1291[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1300 = _T_1298 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1301 = _T_1296 | _T_1300; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -777,13 +775,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1316 = {_T_1310[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1318 = _T_1316 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1319 = _T_1314 | _T_1318; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_72 = {{2'd0}, _T_1319[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1324 = _GEN_72 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_64 = {{2'd0}, _T_1319[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1324 = _GEN_64 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1326 = {_T_1319[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1328 = _T_1326 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1329 = _T_1324 | _T_1328; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_73 = {{1'd0}, _T_1329[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1334 = _GEN_73 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_65 = {{1'd0}, _T_1329[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1334 = _GEN_65 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1336 = {_T_1329[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1338 = _T_1336 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1339 = _T_1334 | _T_1338; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -793,13 +791,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1354 = {_T_1348[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1356 = _T_1354 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1357 = _T_1352 | _T_1356; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_74 = {{2'd0}, _T_1357[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1362 = _GEN_74 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_66 = {{2'd0}, _T_1357[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1362 = _GEN_66 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1364 = {_T_1357[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1366 = _T_1364 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1367 = _T_1362 | _T_1366; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_75 = {{1'd0}, _T_1367[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1372 = _GEN_75 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_67 = {{1'd0}, _T_1367[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1372 = _GEN_67 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1374 = {_T_1367[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1376 = _T_1374 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1377 = _T_1372 | _T_1376; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -808,23 +806,23 @@ module lsu_dccm_ctl(
|
|||
wire [31:0] _T_1387 = {_T_1381[15:0], 16'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1389 = _T_1387 & 32'hffff0000; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1390 = _T_1385 | _T_1389; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_76 = {{8'd0}, _T_1390[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1395 = _GEN_76 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_68 = {{8'd0}, _T_1390[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1395 = _GEN_68 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1397 = {_T_1390[23:0], 8'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1399 = _T_1397 & 32'hff00ff00; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1400 = _T_1395 | _T_1399; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_77 = {{4'd0}, _T_1400[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1405 = _GEN_77 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_69 = {{4'd0}, _T_1400[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1405 = _GEN_69 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1407 = {_T_1400[27:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1409 = _T_1407 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1410 = _T_1405 | _T_1409; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_78 = {{2'd0}, _T_1410[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1415 = _GEN_78 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_70 = {{2'd0}, _T_1410[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1415 = _GEN_70 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1417 = {_T_1410[29:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1419 = _T_1417 & 32'hcccccccc; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1420 = _T_1415 | _T_1419; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_79 = {{1'd0}, _T_1420[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1425 = _GEN_79 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_71 = {{1'd0}, _T_1420[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1425 = _GEN_71 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1427 = {_T_1420[30:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1429 = _T_1427 & 32'haaaaaaaa; // @[Bitwise.scala 103:75]
|
||||
wire _T_1431 = io_ldst_dual_m & io_lsu_pkt_m_valid; // @[lsu_dccm_ctl.scala 262:295]
|
||||
|
|
@ -839,13 +837,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1450 = {_T_1444[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1452 = _T_1450 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1453 = _T_1448 | _T_1452; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_80 = {{2'd0}, _T_1453[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1458 = _GEN_80 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_72 = {{2'd0}, _T_1453[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1458 = _GEN_72 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1460 = {_T_1453[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1462 = _T_1460 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1463 = _T_1458 | _T_1462; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_81 = {{1'd0}, _T_1463[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1468 = _GEN_81 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_73 = {{1'd0}, _T_1463[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1468 = _GEN_73 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1470 = {_T_1463[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1472 = _T_1470 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1473 = _T_1468 | _T_1472; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -856,13 +854,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1487 = {_T_1481[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1489 = _T_1487 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1490 = _T_1485 | _T_1489; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_82 = {{2'd0}, _T_1490[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1495 = _GEN_82 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_74 = {{2'd0}, _T_1490[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1495 = _GEN_74 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1497 = {_T_1490[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1499 = _T_1497 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1500 = _T_1495 | _T_1499; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_83 = {{1'd0}, _T_1500[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1505 = _GEN_83 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_75 = {{1'd0}, _T_1500[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1505 = _GEN_75 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1507 = {_T_1500[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1509 = _T_1507 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1510 = _T_1505 | _T_1509; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -873,13 +871,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1524 = {_T_1518[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1526 = _T_1524 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1527 = _T_1522 | _T_1526; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_84 = {{2'd0}, _T_1527[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1532 = _GEN_84 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_76 = {{2'd0}, _T_1527[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1532 = _GEN_76 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1534 = {_T_1527[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1536 = _T_1534 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1537 = _T_1532 | _T_1536; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_85 = {{1'd0}, _T_1537[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1542 = _GEN_85 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_77 = {{1'd0}, _T_1537[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1542 = _GEN_77 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1544 = {_T_1537[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1546 = _T_1544 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1547 = _T_1542 | _T_1546; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -890,13 +888,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1561 = {_T_1555[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1563 = _T_1561 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1564 = _T_1559 | _T_1563; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_86 = {{2'd0}, _T_1564[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1569 = _GEN_86 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_78 = {{2'd0}, _T_1564[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1569 = _GEN_78 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1571 = {_T_1564[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1573 = _T_1571 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1574 = _T_1569 | _T_1573; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_87 = {{1'd0}, _T_1574[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1579 = _GEN_87 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_79 = {{1'd0}, _T_1574[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1579 = _GEN_79 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1581 = {_T_1574[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1583 = _T_1581 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1584 = _T_1579 | _T_1583; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -905,23 +903,23 @@ module lsu_dccm_ctl(
|
|||
wire [31:0] _T_1594 = {_T_1588[15:0], 16'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1596 = _T_1594 & 32'hffff0000; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1597 = _T_1592 | _T_1596; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_88 = {{8'd0}, _T_1597[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1602 = _GEN_88 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_80 = {{8'd0}, _T_1597[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1602 = _GEN_80 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1604 = {_T_1597[23:0], 8'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1606 = _T_1604 & 32'hff00ff00; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1607 = _T_1602 | _T_1606; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_89 = {{4'd0}, _T_1607[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1612 = _GEN_89 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_81 = {{4'd0}, _T_1607[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1612 = _GEN_81 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1614 = {_T_1607[27:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1616 = _T_1614 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1617 = _T_1612 | _T_1616; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_90 = {{2'd0}, _T_1617[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1622 = _GEN_90 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_82 = {{2'd0}, _T_1617[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1622 = _GEN_82 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1624 = {_T_1617[29:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1626 = _T_1624 & 32'hcccccccc; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1627 = _T_1622 | _T_1626; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_91 = {{1'd0}, _T_1627[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1632 = _GEN_91 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_83 = {{1'd0}, _T_1627[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1632 = _GEN_83 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1634 = {_T_1627[30:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1636 = _T_1634 & 32'haaaaaaaa; // @[Bitwise.scala 103:75]
|
||||
wire _T_1638 = io_lsu_stbuf_commit_any & dccm_wr_bypass_d_r_hi; // @[lsu_dccm_ctl.scala 264:105]
|
||||
|
|
@ -932,13 +930,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1651 = {_T_1645[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1653 = _T_1651 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1654 = _T_1649 | _T_1653; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_92 = {{2'd0}, _T_1654[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1659 = _GEN_92 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_84 = {{2'd0}, _T_1654[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1659 = _GEN_84 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1661 = {_T_1654[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1663 = _T_1661 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1664 = _T_1659 | _T_1663; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_93 = {{1'd0}, _T_1664[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1669 = _GEN_93 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_85 = {{1'd0}, _T_1664[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1669 = _GEN_85 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1671 = {_T_1664[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1673 = _T_1671 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1674 = _T_1669 | _T_1673; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -949,13 +947,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1688 = {_T_1682[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1690 = _T_1688 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1691 = _T_1686 | _T_1690; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_94 = {{2'd0}, _T_1691[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1696 = _GEN_94 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_86 = {{2'd0}, _T_1691[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1696 = _GEN_86 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1698 = {_T_1691[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1700 = _T_1698 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1701 = _T_1696 | _T_1700; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_95 = {{1'd0}, _T_1701[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1706 = _GEN_95 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_87 = {{1'd0}, _T_1701[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1706 = _GEN_87 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1708 = {_T_1701[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1710 = _T_1708 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1711 = _T_1706 | _T_1710; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -966,13 +964,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1725 = {_T_1719[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1727 = _T_1725 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1728 = _T_1723 | _T_1727; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_96 = {{2'd0}, _T_1728[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1733 = _GEN_96 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_88 = {{2'd0}, _T_1728[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1733 = _GEN_88 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1735 = {_T_1728[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1737 = _T_1735 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1738 = _T_1733 | _T_1737; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_97 = {{1'd0}, _T_1738[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1743 = _GEN_97 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_89 = {{1'd0}, _T_1738[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1743 = _GEN_89 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1745 = {_T_1738[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1747 = _T_1745 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1748 = _T_1743 | _T_1747; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -983,13 +981,13 @@ module lsu_dccm_ctl(
|
|||
wire [7:0] _T_1762 = {_T_1756[3:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1764 = _T_1762 & 8'hf0; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1765 = _T_1760 | _T_1764; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_98 = {{2'd0}, _T_1765[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1770 = _GEN_98 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_90 = {{2'd0}, _T_1765[7:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1770 = _GEN_90 & 8'h33; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1772 = {_T_1765[5:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1774 = _T_1772 & 8'hcc; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1775 = _T_1770 | _T_1774; // @[Bitwise.scala 103:39]
|
||||
wire [7:0] _GEN_99 = {{1'd0}, _T_1775[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1780 = _GEN_99 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _GEN_91 = {{1'd0}, _T_1775[7:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1780 = _GEN_91 & 8'h55; // @[Bitwise.scala 103:31]
|
||||
wire [7:0] _T_1782 = {_T_1775[6:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [7:0] _T_1784 = _T_1782 & 8'haa; // @[Bitwise.scala 103:75]
|
||||
wire [7:0] _T_1785 = _T_1780 | _T_1784; // @[Bitwise.scala 103:39]
|
||||
|
|
@ -998,28 +996,28 @@ module lsu_dccm_ctl(
|
|||
wire [31:0] _T_1795 = {_T_1789[15:0], 16'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1797 = _T_1795 & 32'hffff0000; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1798 = _T_1793 | _T_1797; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_100 = {{8'd0}, _T_1798[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1803 = _GEN_100 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_92 = {{8'd0}, _T_1798[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1803 = _GEN_92 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1805 = {_T_1798[23:0], 8'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1807 = _T_1805 & 32'hff00ff00; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1808 = _T_1803 | _T_1807; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_101 = {{4'd0}, _T_1808[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1813 = _GEN_101 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_93 = {{4'd0}, _T_1808[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1813 = _GEN_93 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1815 = {_T_1808[27:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1817 = _T_1815 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1818 = _T_1813 | _T_1817; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_102 = {{2'd0}, _T_1818[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1823 = _GEN_102 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_94 = {{2'd0}, _T_1818[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1823 = _GEN_94 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1825 = {_T_1818[29:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1827 = _T_1825 & 32'hcccccccc; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1828 = _T_1823 | _T_1827; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_103 = {{1'd0}, _T_1828[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1833 = _GEN_103 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_95 = {{1'd0}, _T_1828[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1833 = _GEN_95 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1835 = {_T_1828[30:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1837 = _T_1835 & 32'haaaaaaaa; // @[Bitwise.scala 103:75]
|
||||
wire [63:0] _T_1841 = {io_store_data_hi_r,io_store_data_lo_r}; // @[Cat.scala 29:58]
|
||||
wire [3:0] _GEN_104 = {{2'd0}, io_lsu_addr_r[1:0]}; // @[lsu_dccm_ctl.scala 265:94]
|
||||
wire [5:0] _T_1843 = 4'h8 * _GEN_104; // @[lsu_dccm_ctl.scala 265:94]
|
||||
wire [3:0] _GEN_96 = {{2'd0}, io_lsu_addr_r[1:0]}; // @[lsu_dccm_ctl.scala 265:94]
|
||||
wire [5:0] _T_1843 = 4'h8 * _GEN_96; // @[lsu_dccm_ctl.scala 265:94]
|
||||
wire [63:0] _T_1844 = _T_1841 >> _T_1843; // @[lsu_dccm_ctl.scala 265:88]
|
||||
wire [7:0] _T_1847 = store_byteen_r[0] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
|
||||
wire [7:0] _T_1850 = store_byteen_r[1] ? 8'hff : 8'h0; // @[Bitwise.scala 72:12]
|
||||
|
|
@ -1030,28 +1028,28 @@ module lsu_dccm_ctl(
|
|||
wire [31:0] _T_1866 = {_T_1860[15:0], 16'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1868 = _T_1866 & 32'hffff0000; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1869 = _T_1864 | _T_1868; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_105 = {{8'd0}, _T_1869[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1874 = _GEN_105 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_97 = {{8'd0}, _T_1869[31:8]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1874 = _GEN_97 & 32'hff00ff; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1876 = {_T_1869[23:0], 8'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1878 = _T_1876 & 32'hff00ff00; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1879 = _T_1874 | _T_1878; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_106 = {{4'd0}, _T_1879[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1884 = _GEN_106 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_98 = {{4'd0}, _T_1879[31:4]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1884 = _GEN_98 & 32'hf0f0f0f; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1886 = {_T_1879[27:0], 4'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1888 = _T_1886 & 32'hf0f0f0f0; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1889 = _T_1884 | _T_1888; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_107 = {{2'd0}, _T_1889[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1894 = _GEN_107 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_99 = {{2'd0}, _T_1889[31:2]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1894 = _GEN_99 & 32'h33333333; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1896 = {_T_1889[29:0], 2'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1898 = _T_1896 & 32'hcccccccc; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1899 = _T_1894 | _T_1898; // @[Bitwise.scala 103:39]
|
||||
wire [31:0] _GEN_108 = {{1'd0}, _T_1899[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1904 = _GEN_108 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _GEN_100 = {{1'd0}, _T_1899[31:1]}; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1904 = _GEN_100 & 32'h55555555; // @[Bitwise.scala 103:31]
|
||||
wire [31:0] _T_1906 = {_T_1899[30:0], 1'h0}; // @[Bitwise.scala 103:65]
|
||||
wire [31:0] _T_1908 = _T_1906 & 32'haaaaaaaa; // @[Bitwise.scala 103:75]
|
||||
wire [31:0] _T_1909 = _T_1904 | _T_1908; // @[Bitwise.scala 103:39]
|
||||
wire [63:0] _GEN_109 = {{32'd0}, _T_1909}; // @[lsu_dccm_ctl.scala 265:115]
|
||||
wire [63:0] _T_1910 = _T_1844 & _GEN_109; // @[lsu_dccm_ctl.scala 265:115]
|
||||
wire [63:0] _GEN_101 = {{32'd0}, _T_1909}; // @[lsu_dccm_ctl.scala 265:115]
|
||||
wire [63:0] _T_1910 = _T_1844 & _GEN_101; // @[lsu_dccm_ctl.scala 265:115]
|
||||
wire _T_1915 = io_lsu_pkt_r_valid & io_lsu_pkt_r_bits_store; // @[lsu_dccm_ctl.scala 272:58]
|
||||
wire _T_1916 = _T_1915 & io_addr_in_pic_r; // @[lsu_dccm_ctl.scala 272:84]
|
||||
wire _T_1917 = _T_1916 & io_lsu_commit_r; // @[lsu_dccm_ctl.scala 272:103]
|
||||
|
|
|
|||
|
|
@ -153,7 +153,7 @@ class lsu_dccm_ctl extends Module with RequireAsyncReset with lib
|
|||
io.lsu_ld_data_r := 0.U
|
||||
//Registers
|
||||
lsu_rdata_corr_m := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(((Cat(io.stbuf_fwdbyteen_hi_m,io.stbuf_fwdbyteen_lo_m))(i)).asBool,(Cat(io.stbuf_fwddata_hi_m,io.stbuf_fwddata_lo_m))((8*i)+7,8*i), Mux(io.addr_in_pic_m.asBool,picm_rd_data_m((8*i)+7,8*i),(Fill(8,io.addr_in_dccm_m) & dccm_rdata_corr_m((8*i)+7,8*i))))))))
|
||||
lsu_rdata_m := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(((Cat(io.stbuf_fwdbyteen_hi_m,io.stbuf_fwdbyteen_lo_m))(i)).asBool,(Cat(io.stbuf_fwddata_hi_m,io.stbuf_fwddata_lo_m))((8*i)+7,8*i), Mux(io.addr_in_pic_m.asBool,picm_rd_data_m((8*i)+7,8*i),(Fill(2,io.addr_in_dccm_m) & dccm_rdata_m((8*i)+7,8*i))))))))
|
||||
lsu_rdata_m := Reverse(Cat(VecInit.tabulate(8)(i=> Reverse(Mux(((Cat(io.stbuf_fwdbyteen_hi_m,io.stbuf_fwdbyteen_lo_m))(i)).asBool,(Cat(io.stbuf_fwddata_hi_m,io.stbuf_fwddata_lo_m))((8*i)+7,8*i), Mux(io.addr_in_pic_m.asBool,picm_rd_data_m((8*i)+7,8*i),(Fill(8,io.addr_in_dccm_m) & dccm_rdata_m((8*i)+7,8*i))))))))
|
||||
io.lsu_ld_data_corr_r := rvdffe(lsu_ld_data_corr_m,((io.lsu_pkt_m.valid & io.lsu_pkt_m.bits.load & (io.addr_in_pic_m | io.addr_in_dccm_m)) | io.clk_override),clock,io.scan_mode)
|
||||
io.lsu_ld_data_m := lsu_rdata_m >> 8.U*io.lsu_addr_m(1,0)
|
||||
lsu_ld_data_corr_m := lsu_rdata_corr_m >> 8.U*io.lsu_addr_m(1,0)
|
||||
|
|
|
|||
Binary file not shown.
Loading…
Reference in New Issue