From d952fb425f26f22db2823cf0c8a81f8ef4148804 Mon Sep 17 00:00:00 2001 From: waleed-lm Date: Sun, 8 Nov 2020 18:32:54 +0500 Subject: [PATCH] Bus-buffer testing start --- el2_lsu_bus_buffer.fir | 1271 +++++++++-------- el2_lsu_bus_buffer.v | 684 ++++----- src/main/scala/lsu/el2_lsu_bus_buffer.scala | 2 +- .../classes/lsu/el2_lsu_bus_buffer.class | Bin 567223 -> 567822 bytes 4 files changed, 986 insertions(+), 971 deletions(-) diff --git a/el2_lsu_bus_buffer.fir b/el2_lsu_bus_buffer.fir index 3bb94622..426e5f0f 100644 --- a/el2_lsu_bus_buffer.fir +++ b/el2_lsu_bus_buffer.fir @@ -5864,671 +5864,680 @@ circuit el2_lsu_bus_buffer : node _T_4432 = cat(_T_4431, buf_data_en[0]) @[Cat.scala 29:58] io.data_en <= _T_4432 @[el2_lsu_bus_buffer.scala 578:14] node _T_4433 = cat(io.lsu_busreq_m, UInt<1>("h00")) @[Cat.scala 29:58] - node _T_4434 = mux(io.ldst_dual_m, _T_4433, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 580:27] + node _T_4434 = mux(io.ldst_dual_m, _T_4433, io.lsu_busreq_m) @[el2_lsu_bus_buffer.scala 580:28] node _T_4435 = cat(io.lsu_busreq_r, UInt<1>("h00")) @[Cat.scala 29:58] - node _T_4436 = mux(io.ldst_dual_r, _T_4435, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 580:93] - node _T_4437 = add(_T_4434, _T_4436) @[el2_lsu_bus_buffer.scala 580:87] - node buf_numvld_any = add(_T_4437, ibuf_valid) @[el2_lsu_bus_buffer.scala 580:153] - node _T_4438 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 581:60] - node _T_4439 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 581:79] - node _T_4440 = and(_T_4438, _T_4439) @[el2_lsu_bus_buffer.scala 581:64] - node _T_4441 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:91] - node _T_4442 = and(_T_4440, _T_4441) @[el2_lsu_bus_buffer.scala 581:89] - node _T_4443 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 581:60] - node _T_4444 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 581:79] - node _T_4445 = and(_T_4443, _T_4444) @[el2_lsu_bus_buffer.scala 581:64] - node _T_4446 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:91] - node _T_4447 = and(_T_4445, _T_4446) @[el2_lsu_bus_buffer.scala 581:89] - node _T_4448 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 581:60] - node _T_4449 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 581:79] - node _T_4450 = and(_T_4448, _T_4449) @[el2_lsu_bus_buffer.scala 581:64] - node _T_4451 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:91] - node _T_4452 = and(_T_4450, _T_4451) @[el2_lsu_bus_buffer.scala 581:89] - node _T_4453 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 581:60] - node _T_4454 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 581:79] - node _T_4455 = and(_T_4453, _T_4454) @[el2_lsu_bus_buffer.scala 581:64] - node _T_4456 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:91] - node _T_4457 = and(_T_4455, _T_4456) @[el2_lsu_bus_buffer.scala 581:89] - node _T_4458 = add(_T_4457, _T_4452) @[el2_lsu_bus_buffer.scala 581:142] - node _T_4459 = add(_T_4458, _T_4447) @[el2_lsu_bus_buffer.scala 581:142] - node _T_4460 = add(_T_4459, _T_4442) @[el2_lsu_bus_buffer.scala 581:142] - buf_numvld_wrcmd_any <= _T_4460 @[el2_lsu_bus_buffer.scala 581:24] - node _T_4461 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 582:63] - node _T_4462 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:75] - node _T_4463 = and(_T_4461, _T_4462) @[el2_lsu_bus_buffer.scala 582:73] - node _T_4464 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 582:63] - node _T_4465 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:75] - node _T_4466 = and(_T_4464, _T_4465) @[el2_lsu_bus_buffer.scala 582:73] - node _T_4467 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 582:63] - node _T_4468 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:75] - node _T_4469 = and(_T_4467, _T_4468) @[el2_lsu_bus_buffer.scala 582:73] - node _T_4470 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 582:63] - node _T_4471 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:75] + node _T_4436 = mux(io.ldst_dual_r, _T_4435, io.lsu_busreq_r) @[el2_lsu_bus_buffer.scala 580:94] + node _T_4437 = add(_T_4434, _T_4436) @[el2_lsu_bus_buffer.scala 580:88] + node _T_4438 = add(_T_4437, ibuf_valid) @[el2_lsu_bus_buffer.scala 580:154] + node _T_4439 = neq(buf_state[0], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 580:190] + node _T_4440 = neq(buf_state[1], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 580:190] + node _T_4441 = neq(buf_state[2], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 580:190] + node _T_4442 = neq(buf_state[3], UInt<3>("h00")) @[el2_lsu_bus_buffer.scala 580:190] + node _T_4443 = add(_T_4439, _T_4440) @[el2_lsu_bus_buffer.scala 580:217] + node _T_4444 = add(_T_4443, _T_4441) @[el2_lsu_bus_buffer.scala 580:217] + node _T_4445 = add(_T_4444, _T_4442) @[el2_lsu_bus_buffer.scala 580:217] + node _T_4446 = add(_T_4438, _T_4445) @[el2_lsu_bus_buffer.scala 580:169] + node buf_numvld_any = tail(_T_4446, 1) @[el2_lsu_bus_buffer.scala 580:169] + node _T_4447 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 581:60] + node _T_4448 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 581:79] + node _T_4449 = and(_T_4447, _T_4448) @[el2_lsu_bus_buffer.scala 581:64] + node _T_4450 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:91] + node _T_4451 = and(_T_4449, _T_4450) @[el2_lsu_bus_buffer.scala 581:89] + node _T_4452 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 581:60] + node _T_4453 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 581:79] + node _T_4454 = and(_T_4452, _T_4453) @[el2_lsu_bus_buffer.scala 581:64] + node _T_4455 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:91] + node _T_4456 = and(_T_4454, _T_4455) @[el2_lsu_bus_buffer.scala 581:89] + node _T_4457 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 581:60] + node _T_4458 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 581:79] + node _T_4459 = and(_T_4457, _T_4458) @[el2_lsu_bus_buffer.scala 581:64] + node _T_4460 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:91] + node _T_4461 = and(_T_4459, _T_4460) @[el2_lsu_bus_buffer.scala 581:89] + node _T_4462 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 581:60] + node _T_4463 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 581:79] + node _T_4464 = and(_T_4462, _T_4463) @[el2_lsu_bus_buffer.scala 581:64] + node _T_4465 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 581:91] + node _T_4466 = and(_T_4464, _T_4465) @[el2_lsu_bus_buffer.scala 581:89] + node _T_4467 = add(_T_4466, _T_4461) @[el2_lsu_bus_buffer.scala 581:142] + node _T_4468 = add(_T_4467, _T_4456) @[el2_lsu_bus_buffer.scala 581:142] + node _T_4469 = add(_T_4468, _T_4451) @[el2_lsu_bus_buffer.scala 581:142] + buf_numvld_wrcmd_any <= _T_4469 @[el2_lsu_bus_buffer.scala 581:24] + node _T_4470 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 582:63] + node _T_4471 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:75] node _T_4472 = and(_T_4470, _T_4471) @[el2_lsu_bus_buffer.scala 582:73] - node _T_4473 = add(_T_4472, _T_4469) @[el2_lsu_bus_buffer.scala 582:126] - node _T_4474 = add(_T_4473, _T_4466) @[el2_lsu_bus_buffer.scala 582:126] - node _T_4475 = add(_T_4474, _T_4463) @[el2_lsu_bus_buffer.scala 582:126] - buf_numvld_cmd_any <= _T_4475 @[el2_lsu_bus_buffer.scala 582:22] - node _T_4476 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 583:63] - node _T_4477 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 583:90] - node _T_4478 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 583:102] - node _T_4479 = and(_T_4477, _T_4478) @[el2_lsu_bus_buffer.scala 583:100] - node _T_4480 = or(_T_4476, _T_4479) @[el2_lsu_bus_buffer.scala 583:74] - node _T_4481 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 583:63] - node _T_4482 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 583:90] - node _T_4483 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 583:102] - node _T_4484 = and(_T_4482, _T_4483) @[el2_lsu_bus_buffer.scala 583:100] - node _T_4485 = or(_T_4481, _T_4484) @[el2_lsu_bus_buffer.scala 583:74] - node _T_4486 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 583:63] - node _T_4487 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 583:90] - node _T_4488 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 583:102] - node _T_4489 = and(_T_4487, _T_4488) @[el2_lsu_bus_buffer.scala 583:100] - node _T_4490 = or(_T_4486, _T_4489) @[el2_lsu_bus_buffer.scala 583:74] - node _T_4491 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 583:63] - node _T_4492 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 583:90] - node _T_4493 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 583:102] - node _T_4494 = and(_T_4492, _T_4493) @[el2_lsu_bus_buffer.scala 583:100] - node _T_4495 = or(_T_4491, _T_4494) @[el2_lsu_bus_buffer.scala 583:74] - node _T_4496 = add(_T_4495, _T_4490) @[el2_lsu_bus_buffer.scala 583:154] - node _T_4497 = add(_T_4496, _T_4485) @[el2_lsu_bus_buffer.scala 583:154] - node _T_4498 = add(_T_4497, _T_4480) @[el2_lsu_bus_buffer.scala 583:154] - buf_numvld_pend_any <= _T_4498 @[el2_lsu_bus_buffer.scala 583:23] - node _T_4499 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 584:61] - node _T_4500 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 584:61] - node _T_4501 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 584:61] - node _T_4502 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 584:61] - node _T_4503 = or(_T_4502, _T_4501) @[el2_lsu_bus_buffer.scala 584:93] - node _T_4504 = or(_T_4503, _T_4500) @[el2_lsu_bus_buffer.scala 584:93] - node _T_4505 = or(_T_4504, _T_4499) @[el2_lsu_bus_buffer.scala 584:93] - any_done_wait_state <= _T_4505 @[el2_lsu_bus_buffer.scala 584:23] - node _T_4506 = orr(buf_numvld_pend_any) @[el2_lsu_bus_buffer.scala 585:53] - io.lsu_bus_buffer_pend_any <= _T_4506 @[el2_lsu_bus_buffer.scala 585:30] - node _T_4507 = and(io.ldst_dual_d, io.dec_lsu_valid_raw_d) @[el2_lsu_bus_buffer.scala 586:52] - node _T_4508 = geq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 586:92] - node _T_4509 = eq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 586:119] - node _T_4510 = mux(_T_4507, _T_4508, _T_4509) @[el2_lsu_bus_buffer.scala 586:36] - io.lsu_bus_buffer_full_any <= _T_4510 @[el2_lsu_bus_buffer.scala 586:30] - node _T_4511 = orr(buf_state[0]) @[el2_lsu_bus_buffer.scala 587:52] - node _T_4512 = orr(buf_state[1]) @[el2_lsu_bus_buffer.scala 587:52] - node _T_4513 = orr(buf_state[2]) @[el2_lsu_bus_buffer.scala 587:52] - node _T_4514 = orr(buf_state[3]) @[el2_lsu_bus_buffer.scala 587:52] - node _T_4515 = or(_T_4511, _T_4512) @[el2_lsu_bus_buffer.scala 587:65] - node _T_4516 = or(_T_4515, _T_4513) @[el2_lsu_bus_buffer.scala 587:65] - node _T_4517 = or(_T_4516, _T_4514) @[el2_lsu_bus_buffer.scala 587:65] - node _T_4518 = eq(_T_4517, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:34] - node _T_4519 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:72] - node _T_4520 = and(_T_4518, _T_4519) @[el2_lsu_bus_buffer.scala 587:70] - node _T_4521 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:86] - node _T_4522 = and(_T_4520, _T_4521) @[el2_lsu_bus_buffer.scala 587:84] - io.lsu_bus_buffer_empty_any <= _T_4522 @[el2_lsu_bus_buffer.scala 587:31] - node _T_4523 = and(io.lsu_busreq_m, io.lsu_pkt_m.valid) @[el2_lsu_bus_buffer.scala 589:51] - node _T_4524 = and(_T_4523, io.lsu_pkt_m.load) @[el2_lsu_bus_buffer.scala 589:72] - node _T_4525 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:94] - node _T_4526 = and(_T_4524, _T_4525) @[el2_lsu_bus_buffer.scala 589:92] - node _T_4527 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:111] - node _T_4528 = and(_T_4526, _T_4527) @[el2_lsu_bus_buffer.scala 589:109] - io.lsu_nonblock_load_valid_m <= _T_4528 @[el2_lsu_bus_buffer.scala 589:32] + node _T_4473 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 582:63] + node _T_4474 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:75] + node _T_4475 = and(_T_4473, _T_4474) @[el2_lsu_bus_buffer.scala 582:73] + node _T_4476 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 582:63] + node _T_4477 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:75] + node _T_4478 = and(_T_4476, _T_4477) @[el2_lsu_bus_buffer.scala 582:73] + node _T_4479 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 582:63] + node _T_4480 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 582:75] + node _T_4481 = and(_T_4479, _T_4480) @[el2_lsu_bus_buffer.scala 582:73] + node _T_4482 = add(_T_4481, _T_4478) @[el2_lsu_bus_buffer.scala 582:126] + node _T_4483 = add(_T_4482, _T_4475) @[el2_lsu_bus_buffer.scala 582:126] + node _T_4484 = add(_T_4483, _T_4472) @[el2_lsu_bus_buffer.scala 582:126] + buf_numvld_cmd_any <= _T_4484 @[el2_lsu_bus_buffer.scala 582:22] + node _T_4485 = eq(buf_state[0], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 583:63] + node _T_4486 = eq(buf_state[0], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 583:90] + node _T_4487 = eq(buf_cmd_state_bus_en[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 583:102] + node _T_4488 = and(_T_4486, _T_4487) @[el2_lsu_bus_buffer.scala 583:100] + node _T_4489 = or(_T_4485, _T_4488) @[el2_lsu_bus_buffer.scala 583:74] + node _T_4490 = eq(buf_state[1], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 583:63] + node _T_4491 = eq(buf_state[1], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 583:90] + node _T_4492 = eq(buf_cmd_state_bus_en[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 583:102] + node _T_4493 = and(_T_4491, _T_4492) @[el2_lsu_bus_buffer.scala 583:100] + node _T_4494 = or(_T_4490, _T_4493) @[el2_lsu_bus_buffer.scala 583:74] + node _T_4495 = eq(buf_state[2], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 583:63] + node _T_4496 = eq(buf_state[2], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 583:90] + node _T_4497 = eq(buf_cmd_state_bus_en[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 583:102] + node _T_4498 = and(_T_4496, _T_4497) @[el2_lsu_bus_buffer.scala 583:100] + node _T_4499 = or(_T_4495, _T_4498) @[el2_lsu_bus_buffer.scala 583:74] + node _T_4500 = eq(buf_state[3], UInt<3>("h01")) @[el2_lsu_bus_buffer.scala 583:63] + node _T_4501 = eq(buf_state[3], UInt<3>("h02")) @[el2_lsu_bus_buffer.scala 583:90] + node _T_4502 = eq(buf_cmd_state_bus_en[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 583:102] + node _T_4503 = and(_T_4501, _T_4502) @[el2_lsu_bus_buffer.scala 583:100] + node _T_4504 = or(_T_4500, _T_4503) @[el2_lsu_bus_buffer.scala 583:74] + node _T_4505 = add(_T_4504, _T_4499) @[el2_lsu_bus_buffer.scala 583:154] + node _T_4506 = add(_T_4505, _T_4494) @[el2_lsu_bus_buffer.scala 583:154] + node _T_4507 = add(_T_4506, _T_4489) @[el2_lsu_bus_buffer.scala 583:154] + buf_numvld_pend_any <= _T_4507 @[el2_lsu_bus_buffer.scala 583:23] + node _T_4508 = eq(buf_state[0], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 584:61] + node _T_4509 = eq(buf_state[1], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 584:61] + node _T_4510 = eq(buf_state[2], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 584:61] + node _T_4511 = eq(buf_state[3], UInt<3>("h05")) @[el2_lsu_bus_buffer.scala 584:61] + node _T_4512 = or(_T_4511, _T_4510) @[el2_lsu_bus_buffer.scala 584:93] + node _T_4513 = or(_T_4512, _T_4509) @[el2_lsu_bus_buffer.scala 584:93] + node _T_4514 = or(_T_4513, _T_4508) @[el2_lsu_bus_buffer.scala 584:93] + any_done_wait_state <= _T_4514 @[el2_lsu_bus_buffer.scala 584:23] + node _T_4515 = orr(buf_numvld_pend_any) @[el2_lsu_bus_buffer.scala 585:53] + io.lsu_bus_buffer_pend_any <= _T_4515 @[el2_lsu_bus_buffer.scala 585:30] + node _T_4516 = and(io.ldst_dual_d, io.dec_lsu_valid_raw_d) @[el2_lsu_bus_buffer.scala 586:52] + node _T_4517 = geq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 586:92] + node _T_4518 = eq(buf_numvld_any, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 586:119] + node _T_4519 = mux(_T_4516, _T_4517, _T_4518) @[el2_lsu_bus_buffer.scala 586:36] + io.lsu_bus_buffer_full_any <= _T_4519 @[el2_lsu_bus_buffer.scala 586:30] + node _T_4520 = orr(buf_state[0]) @[el2_lsu_bus_buffer.scala 587:52] + node _T_4521 = orr(buf_state[1]) @[el2_lsu_bus_buffer.scala 587:52] + node _T_4522 = orr(buf_state[2]) @[el2_lsu_bus_buffer.scala 587:52] + node _T_4523 = orr(buf_state[3]) @[el2_lsu_bus_buffer.scala 587:52] + node _T_4524 = or(_T_4520, _T_4521) @[el2_lsu_bus_buffer.scala 587:65] + node _T_4525 = or(_T_4524, _T_4522) @[el2_lsu_bus_buffer.scala 587:65] + node _T_4526 = or(_T_4525, _T_4523) @[el2_lsu_bus_buffer.scala 587:65] + node _T_4527 = eq(_T_4526, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:34] + node _T_4528 = eq(ibuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:72] + node _T_4529 = and(_T_4527, _T_4528) @[el2_lsu_bus_buffer.scala 587:70] + node _T_4530 = eq(obuf_valid, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 587:86] + node _T_4531 = and(_T_4529, _T_4530) @[el2_lsu_bus_buffer.scala 587:84] + io.lsu_bus_buffer_empty_any <= _T_4531 @[el2_lsu_bus_buffer.scala 587:31] + node _T_4532 = and(io.lsu_busreq_m, io.lsu_pkt_m.valid) @[el2_lsu_bus_buffer.scala 589:51] + node _T_4533 = and(_T_4532, io.lsu_pkt_m.load) @[el2_lsu_bus_buffer.scala 589:72] + node _T_4534 = eq(io.flush_m_up, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:94] + node _T_4535 = and(_T_4533, _T_4534) @[el2_lsu_bus_buffer.scala 589:92] + node _T_4536 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 589:111] + node _T_4537 = and(_T_4535, _T_4536) @[el2_lsu_bus_buffer.scala 589:109] + io.lsu_nonblock_load_valid_m <= _T_4537 @[el2_lsu_bus_buffer.scala 589:32] io.lsu_nonblock_load_tag_m <= WrPtr0_m @[el2_lsu_bus_buffer.scala 590:30] wire lsu_nonblock_load_valid_r : UInt<1> lsu_nonblock_load_valid_r <= UInt<1>("h00") - node _T_4529 = eq(io.lsu_commit_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:61] - node _T_4530 = and(lsu_nonblock_load_valid_r, _T_4529) @[el2_lsu_bus_buffer.scala 592:59] - io.lsu_nonblock_load_inv_r <= _T_4530 @[el2_lsu_bus_buffer.scala 592:30] + node _T_4538 = eq(io.lsu_commit_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 592:61] + node _T_4539 = and(lsu_nonblock_load_valid_r, _T_4538) @[el2_lsu_bus_buffer.scala 592:59] + io.lsu_nonblock_load_inv_r <= _T_4539 @[el2_lsu_bus_buffer.scala 592:30] io.lsu_nonblock_load_inv_tag_r <= WrPtr0_r @[el2_lsu_bus_buffer.scala 593:34] - node _T_4531 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 594:80] - node _T_4532 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 594:127] - node _T_4533 = and(UInt<1>("h01"), _T_4532) @[el2_lsu_bus_buffer.scala 594:116] - node _T_4534 = eq(_T_4533, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:95] - node _T_4535 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 594:80] - node _T_4536 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 594:127] - node _T_4537 = and(UInt<1>("h01"), _T_4536) @[el2_lsu_bus_buffer.scala 594:116] - node _T_4538 = eq(_T_4537, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:95] - node _T_4539 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 594:80] - node _T_4540 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 594:127] - node _T_4541 = and(UInt<1>("h01"), _T_4540) @[el2_lsu_bus_buffer.scala 594:116] - node _T_4542 = eq(_T_4541, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:95] - node _T_4543 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 594:80] - node _T_4544 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 594:127] - node _T_4545 = and(UInt<1>("h01"), _T_4544) @[el2_lsu_bus_buffer.scala 594:116] - node _T_4546 = eq(_T_4545, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:95] - node _T_4547 = mux(_T_4531, _T_4534, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4548 = mux(_T_4535, _T_4538, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4549 = mux(_T_4539, _T_4542, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4550 = mux(_T_4543, _T_4546, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4551 = or(_T_4547, _T_4548) @[Mux.scala 27:72] - node _T_4552 = or(_T_4551, _T_4549) @[Mux.scala 27:72] - node _T_4553 = or(_T_4552, _T_4550) @[Mux.scala 27:72] + node _T_4540 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 594:80] + node _T_4541 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 594:127] + node _T_4542 = and(UInt<1>("h01"), _T_4541) @[el2_lsu_bus_buffer.scala 594:116] + node _T_4543 = eq(_T_4542, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:95] + node _T_4544 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 594:80] + node _T_4545 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 594:127] + node _T_4546 = and(UInt<1>("h01"), _T_4545) @[el2_lsu_bus_buffer.scala 594:116] + node _T_4547 = eq(_T_4546, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:95] + node _T_4548 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 594:80] + node _T_4549 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 594:127] + node _T_4550 = and(UInt<1>("h01"), _T_4549) @[el2_lsu_bus_buffer.scala 594:116] + node _T_4551 = eq(_T_4550, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:95] + node _T_4552 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 594:80] + node _T_4553 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 594:127] + node _T_4554 = and(UInt<1>("h01"), _T_4553) @[el2_lsu_bus_buffer.scala 594:116] + node _T_4555 = eq(_T_4554, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 594:95] + node _T_4556 = mux(_T_4540, _T_4543, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4557 = mux(_T_4544, _T_4547, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4558 = mux(_T_4548, _T_4551, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4559 = mux(_T_4552, _T_4555, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4560 = or(_T_4556, _T_4557) @[Mux.scala 27:72] + node _T_4561 = or(_T_4560, _T_4558) @[Mux.scala 27:72] + node _T_4562 = or(_T_4561, _T_4559) @[Mux.scala 27:72] wire lsu_nonblock_load_data_ready : UInt<1> @[Mux.scala 27:72] - lsu_nonblock_load_data_ready <= _T_4553 @[Mux.scala 27:72] - node _T_4554 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 595:80] - node _T_4555 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 595:104] - node _T_4556 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 595:120] - node _T_4557 = eq(_T_4556, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:110] - node _T_4558 = and(_T_4555, _T_4557) @[el2_lsu_bus_buffer.scala 595:108] - node _T_4559 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 595:80] - node _T_4560 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 595:104] - node _T_4561 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 595:120] - node _T_4562 = eq(_T_4561, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:110] - node _T_4563 = and(_T_4560, _T_4562) @[el2_lsu_bus_buffer.scala 595:108] - node _T_4564 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 595:80] - node _T_4565 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 595:104] - node _T_4566 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 595:120] - node _T_4567 = eq(_T_4566, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:110] - node _T_4568 = and(_T_4565, _T_4567) @[el2_lsu_bus_buffer.scala 595:108] - node _T_4569 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 595:80] - node _T_4570 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 595:104] - node _T_4571 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 595:120] - node _T_4572 = eq(_T_4571, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:110] - node _T_4573 = and(_T_4570, _T_4572) @[el2_lsu_bus_buffer.scala 595:108] - node _T_4574 = mux(_T_4554, _T_4558, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4575 = mux(_T_4559, _T_4563, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4576 = mux(_T_4564, _T_4568, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4577 = mux(_T_4569, _T_4573, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4578 = or(_T_4574, _T_4575) @[Mux.scala 27:72] - node _T_4579 = or(_T_4578, _T_4576) @[Mux.scala 27:72] - node _T_4580 = or(_T_4579, _T_4577) @[Mux.scala 27:72] - wire _T_4581 : UInt<1> @[Mux.scala 27:72] - _T_4581 <= _T_4580 @[Mux.scala 27:72] - io.lsu_nonblock_load_data_error <= _T_4581 @[el2_lsu_bus_buffer.scala 595:35] - node _T_4582 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 596:79] - node _T_4583 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 596:102] - node _T_4584 = eq(_T_4583, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:92] - node _T_4585 = and(_T_4582, _T_4584) @[el2_lsu_bus_buffer.scala 596:90] - node _T_4586 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:109] - node _T_4587 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:124] - node _T_4588 = or(_T_4586, _T_4587) @[el2_lsu_bus_buffer.scala 596:122] - node _T_4589 = and(_T_4585, _T_4588) @[el2_lsu_bus_buffer.scala 596:106] - node _T_4590 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 596:79] - node _T_4591 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 596:102] - node _T_4592 = eq(_T_4591, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:92] - node _T_4593 = and(_T_4590, _T_4592) @[el2_lsu_bus_buffer.scala 596:90] - node _T_4594 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:109] - node _T_4595 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:124] - node _T_4596 = or(_T_4594, _T_4595) @[el2_lsu_bus_buffer.scala 596:122] - node _T_4597 = and(_T_4593, _T_4596) @[el2_lsu_bus_buffer.scala 596:106] - node _T_4598 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 596:79] - node _T_4599 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 596:102] - node _T_4600 = eq(_T_4599, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:92] - node _T_4601 = and(_T_4598, _T_4600) @[el2_lsu_bus_buffer.scala 596:90] - node _T_4602 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:109] - node _T_4603 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:124] - node _T_4604 = or(_T_4602, _T_4603) @[el2_lsu_bus_buffer.scala 596:122] - node _T_4605 = and(_T_4601, _T_4604) @[el2_lsu_bus_buffer.scala 596:106] - node _T_4606 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 596:79] - node _T_4607 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 596:102] - node _T_4608 = eq(_T_4607, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:92] - node _T_4609 = and(_T_4606, _T_4608) @[el2_lsu_bus_buffer.scala 596:90] - node _T_4610 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:109] - node _T_4611 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:124] - node _T_4612 = or(_T_4610, _T_4611) @[el2_lsu_bus_buffer.scala 596:122] - node _T_4613 = and(_T_4609, _T_4612) @[el2_lsu_bus_buffer.scala 596:106] - node _T_4614 = mux(_T_4589, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4615 = mux(_T_4597, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4616 = mux(_T_4605, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4617 = mux(_T_4613, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4618 = or(_T_4614, _T_4615) @[Mux.scala 27:72] - node _T_4619 = or(_T_4618, _T_4616) @[Mux.scala 27:72] - node _T_4620 = or(_T_4619, _T_4617) @[Mux.scala 27:72] - wire _T_4621 : UInt<2> @[Mux.scala 27:72] - _T_4621 <= _T_4620 @[Mux.scala 27:72] - io.lsu_nonblock_load_data_tag <= _T_4621 @[el2_lsu_bus_buffer.scala 596:33] - node _T_4622 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 597:78] - node _T_4623 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 597:101] - node _T_4624 = eq(_T_4623, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:91] - node _T_4625 = and(_T_4622, _T_4624) @[el2_lsu_bus_buffer.scala 597:89] - node _T_4626 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:108] - node _T_4627 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:123] - node _T_4628 = or(_T_4626, _T_4627) @[el2_lsu_bus_buffer.scala 597:121] - node _T_4629 = and(_T_4625, _T_4628) @[el2_lsu_bus_buffer.scala 597:105] - node _T_4630 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 597:78] - node _T_4631 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 597:101] - node _T_4632 = eq(_T_4631, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:91] - node _T_4633 = and(_T_4630, _T_4632) @[el2_lsu_bus_buffer.scala 597:89] - node _T_4634 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:108] - node _T_4635 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:123] - node _T_4636 = or(_T_4634, _T_4635) @[el2_lsu_bus_buffer.scala 597:121] - node _T_4637 = and(_T_4633, _T_4636) @[el2_lsu_bus_buffer.scala 597:105] - node _T_4638 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 597:78] - node _T_4639 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 597:101] - node _T_4640 = eq(_T_4639, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:91] - node _T_4641 = and(_T_4638, _T_4640) @[el2_lsu_bus_buffer.scala 597:89] - node _T_4642 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:108] - node _T_4643 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:123] - node _T_4644 = or(_T_4642, _T_4643) @[el2_lsu_bus_buffer.scala 597:121] - node _T_4645 = and(_T_4641, _T_4644) @[el2_lsu_bus_buffer.scala 597:105] - node _T_4646 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 597:78] - node _T_4647 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 597:101] - node _T_4648 = eq(_T_4647, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:91] - node _T_4649 = and(_T_4646, _T_4648) @[el2_lsu_bus_buffer.scala 597:89] - node _T_4650 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:108] - node _T_4651 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:123] - node _T_4652 = or(_T_4650, _T_4651) @[el2_lsu_bus_buffer.scala 597:121] - node _T_4653 = and(_T_4649, _T_4652) @[el2_lsu_bus_buffer.scala 597:105] - node _T_4654 = mux(_T_4629, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4655 = mux(_T_4637, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4656 = mux(_T_4645, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4657 = mux(_T_4653, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4658 = or(_T_4654, _T_4655) @[Mux.scala 27:72] - node _T_4659 = or(_T_4658, _T_4656) @[Mux.scala 27:72] - node _T_4660 = or(_T_4659, _T_4657) @[Mux.scala 27:72] + lsu_nonblock_load_data_ready <= _T_4562 @[Mux.scala 27:72] + node _T_4563 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 595:80] + node _T_4564 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 595:104] + node _T_4565 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 595:120] + node _T_4566 = eq(_T_4565, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:110] + node _T_4567 = and(_T_4564, _T_4566) @[el2_lsu_bus_buffer.scala 595:108] + node _T_4568 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 595:80] + node _T_4569 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 595:104] + node _T_4570 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 595:120] + node _T_4571 = eq(_T_4570, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:110] + node _T_4572 = and(_T_4569, _T_4571) @[el2_lsu_bus_buffer.scala 595:108] + node _T_4573 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 595:80] + node _T_4574 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 595:104] + node _T_4575 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 595:120] + node _T_4576 = eq(_T_4575, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:110] + node _T_4577 = and(_T_4574, _T_4576) @[el2_lsu_bus_buffer.scala 595:108] + node _T_4578 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 595:80] + node _T_4579 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 595:104] + node _T_4580 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 595:120] + node _T_4581 = eq(_T_4580, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 595:110] + node _T_4582 = and(_T_4579, _T_4581) @[el2_lsu_bus_buffer.scala 595:108] + node _T_4583 = mux(_T_4563, _T_4567, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4584 = mux(_T_4568, _T_4572, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4585 = mux(_T_4573, _T_4577, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4586 = mux(_T_4578, _T_4582, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4587 = or(_T_4583, _T_4584) @[Mux.scala 27:72] + node _T_4588 = or(_T_4587, _T_4585) @[Mux.scala 27:72] + node _T_4589 = or(_T_4588, _T_4586) @[Mux.scala 27:72] + wire _T_4590 : UInt<1> @[Mux.scala 27:72] + _T_4590 <= _T_4589 @[Mux.scala 27:72] + io.lsu_nonblock_load_data_error <= _T_4590 @[el2_lsu_bus_buffer.scala 595:35] + node _T_4591 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 596:79] + node _T_4592 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 596:102] + node _T_4593 = eq(_T_4592, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:92] + node _T_4594 = and(_T_4591, _T_4593) @[el2_lsu_bus_buffer.scala 596:90] + node _T_4595 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:109] + node _T_4596 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:124] + node _T_4597 = or(_T_4595, _T_4596) @[el2_lsu_bus_buffer.scala 596:122] + node _T_4598 = and(_T_4594, _T_4597) @[el2_lsu_bus_buffer.scala 596:106] + node _T_4599 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 596:79] + node _T_4600 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 596:102] + node _T_4601 = eq(_T_4600, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:92] + node _T_4602 = and(_T_4599, _T_4601) @[el2_lsu_bus_buffer.scala 596:90] + node _T_4603 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:109] + node _T_4604 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:124] + node _T_4605 = or(_T_4603, _T_4604) @[el2_lsu_bus_buffer.scala 596:122] + node _T_4606 = and(_T_4602, _T_4605) @[el2_lsu_bus_buffer.scala 596:106] + node _T_4607 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 596:79] + node _T_4608 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 596:102] + node _T_4609 = eq(_T_4608, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:92] + node _T_4610 = and(_T_4607, _T_4609) @[el2_lsu_bus_buffer.scala 596:90] + node _T_4611 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:109] + node _T_4612 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:124] + node _T_4613 = or(_T_4611, _T_4612) @[el2_lsu_bus_buffer.scala 596:122] + node _T_4614 = and(_T_4610, _T_4613) @[el2_lsu_bus_buffer.scala 596:106] + node _T_4615 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 596:79] + node _T_4616 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 596:102] + node _T_4617 = eq(_T_4616, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:92] + node _T_4618 = and(_T_4615, _T_4617) @[el2_lsu_bus_buffer.scala 596:90] + node _T_4619 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:109] + node _T_4620 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 596:124] + node _T_4621 = or(_T_4619, _T_4620) @[el2_lsu_bus_buffer.scala 596:122] + node _T_4622 = and(_T_4618, _T_4621) @[el2_lsu_bus_buffer.scala 596:106] + node _T_4623 = mux(_T_4598, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4624 = mux(_T_4606, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4625 = mux(_T_4614, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4626 = mux(_T_4622, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4627 = or(_T_4623, _T_4624) @[Mux.scala 27:72] + node _T_4628 = or(_T_4627, _T_4625) @[Mux.scala 27:72] + node _T_4629 = or(_T_4628, _T_4626) @[Mux.scala 27:72] + wire _T_4630 : UInt<2> @[Mux.scala 27:72] + _T_4630 <= _T_4629 @[Mux.scala 27:72] + io.lsu_nonblock_load_data_tag <= _T_4630 @[el2_lsu_bus_buffer.scala 596:33] + node _T_4631 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 597:78] + node _T_4632 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 597:101] + node _T_4633 = eq(_T_4632, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:91] + node _T_4634 = and(_T_4631, _T_4633) @[el2_lsu_bus_buffer.scala 597:89] + node _T_4635 = eq(buf_dual[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:108] + node _T_4636 = eq(buf_dualhi[0], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:123] + node _T_4637 = or(_T_4635, _T_4636) @[el2_lsu_bus_buffer.scala 597:121] + node _T_4638 = and(_T_4634, _T_4637) @[el2_lsu_bus_buffer.scala 597:105] + node _T_4639 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 597:78] + node _T_4640 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 597:101] + node _T_4641 = eq(_T_4640, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:91] + node _T_4642 = and(_T_4639, _T_4641) @[el2_lsu_bus_buffer.scala 597:89] + node _T_4643 = eq(buf_dual[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:108] + node _T_4644 = eq(buf_dualhi[1], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:123] + node _T_4645 = or(_T_4643, _T_4644) @[el2_lsu_bus_buffer.scala 597:121] + node _T_4646 = and(_T_4642, _T_4645) @[el2_lsu_bus_buffer.scala 597:105] + node _T_4647 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 597:78] + node _T_4648 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 597:101] + node _T_4649 = eq(_T_4648, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:91] + node _T_4650 = and(_T_4647, _T_4649) @[el2_lsu_bus_buffer.scala 597:89] + node _T_4651 = eq(buf_dual[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:108] + node _T_4652 = eq(buf_dualhi[2], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:123] + node _T_4653 = or(_T_4651, _T_4652) @[el2_lsu_bus_buffer.scala 597:121] + node _T_4654 = and(_T_4650, _T_4653) @[el2_lsu_bus_buffer.scala 597:105] + node _T_4655 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 597:78] + node _T_4656 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 597:101] + node _T_4657 = eq(_T_4656, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:91] + node _T_4658 = and(_T_4655, _T_4657) @[el2_lsu_bus_buffer.scala 597:89] + node _T_4659 = eq(buf_dual[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:108] + node _T_4660 = eq(buf_dualhi[3], UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 597:123] + node _T_4661 = or(_T_4659, _T_4660) @[el2_lsu_bus_buffer.scala 597:121] + node _T_4662 = and(_T_4658, _T_4661) @[el2_lsu_bus_buffer.scala 597:105] + node _T_4663 = mux(_T_4638, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4664 = mux(_T_4646, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4665 = mux(_T_4654, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4666 = mux(_T_4662, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4667 = or(_T_4663, _T_4664) @[Mux.scala 27:72] + node _T_4668 = or(_T_4667, _T_4665) @[Mux.scala 27:72] + node _T_4669 = or(_T_4668, _T_4666) @[Mux.scala 27:72] wire lsu_nonblock_load_data_lo : UInt<32> @[Mux.scala 27:72] - lsu_nonblock_load_data_lo <= _T_4660 @[Mux.scala 27:72] - node _T_4661 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 598:78] - node _T_4662 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 598:101] - node _T_4663 = eq(_T_4662, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:91] - node _T_4664 = and(_T_4661, _T_4663) @[el2_lsu_bus_buffer.scala 598:89] - node _T_4665 = or(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 598:120] - node _T_4666 = and(_T_4664, _T_4665) @[el2_lsu_bus_buffer.scala 598:105] - node _T_4667 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 598:78] - node _T_4668 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 598:101] - node _T_4669 = eq(_T_4668, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:91] - node _T_4670 = and(_T_4667, _T_4669) @[el2_lsu_bus_buffer.scala 598:89] - node _T_4671 = or(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 598:120] - node _T_4672 = and(_T_4670, _T_4671) @[el2_lsu_bus_buffer.scala 598:105] - node _T_4673 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 598:78] - node _T_4674 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 598:101] - node _T_4675 = eq(_T_4674, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:91] - node _T_4676 = and(_T_4673, _T_4675) @[el2_lsu_bus_buffer.scala 598:89] - node _T_4677 = or(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 598:120] - node _T_4678 = and(_T_4676, _T_4677) @[el2_lsu_bus_buffer.scala 598:105] - node _T_4679 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 598:78] - node _T_4680 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 598:101] - node _T_4681 = eq(_T_4680, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:91] - node _T_4682 = and(_T_4679, _T_4681) @[el2_lsu_bus_buffer.scala 598:89] - node _T_4683 = or(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 598:120] - node _T_4684 = and(_T_4682, _T_4683) @[el2_lsu_bus_buffer.scala 598:105] - node _T_4685 = mux(_T_4666, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4686 = mux(_T_4672, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4687 = mux(_T_4678, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4688 = mux(_T_4684, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4689 = or(_T_4685, _T_4686) @[Mux.scala 27:72] - node _T_4690 = or(_T_4689, _T_4687) @[Mux.scala 27:72] - node _T_4691 = or(_T_4690, _T_4688) @[Mux.scala 27:72] + lsu_nonblock_load_data_lo <= _T_4669 @[Mux.scala 27:72] + node _T_4670 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 598:78] + node _T_4671 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 598:101] + node _T_4672 = eq(_T_4671, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:91] + node _T_4673 = and(_T_4670, _T_4672) @[el2_lsu_bus_buffer.scala 598:89] + node _T_4674 = or(buf_dual[0], buf_dualhi[0]) @[el2_lsu_bus_buffer.scala 598:120] + node _T_4675 = and(_T_4673, _T_4674) @[el2_lsu_bus_buffer.scala 598:105] + node _T_4676 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 598:78] + node _T_4677 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 598:101] + node _T_4678 = eq(_T_4677, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:91] + node _T_4679 = and(_T_4676, _T_4678) @[el2_lsu_bus_buffer.scala 598:89] + node _T_4680 = or(buf_dual[1], buf_dualhi[1]) @[el2_lsu_bus_buffer.scala 598:120] + node _T_4681 = and(_T_4679, _T_4680) @[el2_lsu_bus_buffer.scala 598:105] + node _T_4682 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 598:78] + node _T_4683 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 598:101] + node _T_4684 = eq(_T_4683, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:91] + node _T_4685 = and(_T_4682, _T_4684) @[el2_lsu_bus_buffer.scala 598:89] + node _T_4686 = or(buf_dual[2], buf_dualhi[2]) @[el2_lsu_bus_buffer.scala 598:120] + node _T_4687 = and(_T_4685, _T_4686) @[el2_lsu_bus_buffer.scala 598:105] + node _T_4688 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 598:78] + node _T_4689 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 598:101] + node _T_4690 = eq(_T_4689, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 598:91] + node _T_4691 = and(_T_4688, _T_4690) @[el2_lsu_bus_buffer.scala 598:89] + node _T_4692 = or(buf_dual[3], buf_dualhi[3]) @[el2_lsu_bus_buffer.scala 598:120] + node _T_4693 = and(_T_4691, _T_4692) @[el2_lsu_bus_buffer.scala 598:105] + node _T_4694 = mux(_T_4675, buf_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4695 = mux(_T_4681, buf_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4696 = mux(_T_4687, buf_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4697 = mux(_T_4693, buf_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4698 = or(_T_4694, _T_4695) @[Mux.scala 27:72] + node _T_4699 = or(_T_4698, _T_4696) @[Mux.scala 27:72] + node _T_4700 = or(_T_4699, _T_4697) @[Mux.scala 27:72] wire lsu_nonblock_load_data_hi : UInt<32> @[Mux.scala 27:72] - lsu_nonblock_load_data_hi <= _T_4691 @[Mux.scala 27:72] - node _T_4692 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4693 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4694 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4695 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4696 = mux(_T_4692, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4697 = mux(_T_4693, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4698 = mux(_T_4694, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4699 = mux(_T_4695, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4700 = or(_T_4696, _T_4697) @[Mux.scala 27:72] - node _T_4701 = or(_T_4700, _T_4698) @[Mux.scala 27:72] - node _T_4702 = or(_T_4701, _T_4699) @[Mux.scala 27:72] - wire _T_4703 : UInt<32> @[Mux.scala 27:72] - _T_4703 <= _T_4702 @[Mux.scala 27:72] - node lsu_nonblock_addr_offset = bits(_T_4703, 1, 0) @[el2_lsu_bus_buffer.scala 599:83] - node _T_4704 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4705 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4706 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4707 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4708 = mux(_T_4704, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4709 = mux(_T_4705, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4710 = mux(_T_4706, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4711 = mux(_T_4707, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4712 = or(_T_4708, _T_4709) @[Mux.scala 27:72] - node _T_4713 = or(_T_4712, _T_4710) @[Mux.scala 27:72] - node _T_4714 = or(_T_4713, _T_4711) @[Mux.scala 27:72] + lsu_nonblock_load_data_hi <= _T_4700 @[Mux.scala 27:72] + node _T_4701 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4702 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4703 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4704 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4705 = mux(_T_4701, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4706 = mux(_T_4702, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4707 = mux(_T_4703, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4708 = mux(_T_4704, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4709 = or(_T_4705, _T_4706) @[Mux.scala 27:72] + node _T_4710 = or(_T_4709, _T_4707) @[Mux.scala 27:72] + node _T_4711 = or(_T_4710, _T_4708) @[Mux.scala 27:72] + wire _T_4712 : UInt<32> @[Mux.scala 27:72] + _T_4712 <= _T_4711 @[Mux.scala 27:72] + node lsu_nonblock_addr_offset = bits(_T_4712, 1, 0) @[el2_lsu_bus_buffer.scala 599:83] + node _T_4713 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4714 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4715 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4716 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4717 = mux(_T_4713, buf_sz[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4718 = mux(_T_4714, buf_sz[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4719 = mux(_T_4715, buf_sz[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4720 = mux(_T_4716, buf_sz[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4721 = or(_T_4717, _T_4718) @[Mux.scala 27:72] + node _T_4722 = or(_T_4721, _T_4719) @[Mux.scala 27:72] + node _T_4723 = or(_T_4722, _T_4720) @[Mux.scala 27:72] wire lsu_nonblock_sz : UInt<2> @[Mux.scala 27:72] - lsu_nonblock_sz <= _T_4714 @[Mux.scala 27:72] - node _T_4715 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 119:118] - node _T_4716 = bits(buf_unsign, 0, 0) @[el2_lsu_bus_buffer.scala 119:129] - node _T_4717 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 119:118] - node _T_4718 = bits(buf_unsign, 1, 1) @[el2_lsu_bus_buffer.scala 119:129] - node _T_4719 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 119:118] - node _T_4720 = bits(buf_unsign, 2, 2) @[el2_lsu_bus_buffer.scala 119:129] - node _T_4721 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 119:118] - node _T_4722 = bits(buf_unsign, 3, 3) @[el2_lsu_bus_buffer.scala 119:129] - node _T_4723 = mux(_T_4715, _T_4716, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4724 = mux(_T_4717, _T_4718, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4725 = mux(_T_4719, _T_4720, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4726 = mux(_T_4721, _T_4722, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4727 = or(_T_4723, _T_4724) @[Mux.scala 27:72] - node _T_4728 = or(_T_4727, _T_4725) @[Mux.scala 27:72] - node _T_4729 = or(_T_4728, _T_4726) @[Mux.scala 27:72] + lsu_nonblock_sz <= _T_4723 @[Mux.scala 27:72] + node _T_4724 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 119:118] + node _T_4725 = bits(buf_unsign, 0, 0) @[el2_lsu_bus_buffer.scala 119:129] + node _T_4726 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 119:118] + node _T_4727 = bits(buf_unsign, 1, 1) @[el2_lsu_bus_buffer.scala 119:129] + node _T_4728 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 119:118] + node _T_4729 = bits(buf_unsign, 2, 2) @[el2_lsu_bus_buffer.scala 119:129] + node _T_4730 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 119:118] + node _T_4731 = bits(buf_unsign, 3, 3) @[el2_lsu_bus_buffer.scala 119:129] + node _T_4732 = mux(_T_4724, _T_4725, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4733 = mux(_T_4726, _T_4727, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4734 = mux(_T_4728, _T_4729, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4735 = mux(_T_4730, _T_4731, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4736 = or(_T_4732, _T_4733) @[Mux.scala 27:72] + node _T_4737 = or(_T_4736, _T_4734) @[Mux.scala 27:72] + node _T_4738 = or(_T_4737, _T_4735) @[Mux.scala 27:72] wire lsu_nonblock_unsign : UInt<1> @[Mux.scala 27:72] - lsu_nonblock_unsign <= _T_4729 @[Mux.scala 27:72] - node _T_4730 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] - node _T_4731 = cat(_T_4730, buf_dual[1]) @[Cat.scala 29:58] - node _T_4732 = cat(_T_4731, buf_dual[0]) @[Cat.scala 29:58] - node _T_4733 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 119:118] - node _T_4734 = bits(_T_4732, 0, 0) @[el2_lsu_bus_buffer.scala 119:129] - node _T_4735 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 119:118] - node _T_4736 = bits(_T_4732, 1, 1) @[el2_lsu_bus_buffer.scala 119:129] - node _T_4737 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 119:118] - node _T_4738 = bits(_T_4732, 2, 2) @[el2_lsu_bus_buffer.scala 119:129] - node _T_4739 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 119:118] - node _T_4740 = bits(_T_4732, 3, 3) @[el2_lsu_bus_buffer.scala 119:129] - node _T_4741 = mux(_T_4733, _T_4734, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4742 = mux(_T_4735, _T_4736, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4743 = mux(_T_4737, _T_4738, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4744 = mux(_T_4739, _T_4740, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4745 = or(_T_4741, _T_4742) @[Mux.scala 27:72] - node _T_4746 = or(_T_4745, _T_4743) @[Mux.scala 27:72] - node _T_4747 = or(_T_4746, _T_4744) @[Mux.scala 27:72] + lsu_nonblock_unsign <= _T_4738 @[Mux.scala 27:72] + node _T_4739 = cat(buf_dual[3], buf_dual[2]) @[Cat.scala 29:58] + node _T_4740 = cat(_T_4739, buf_dual[1]) @[Cat.scala 29:58] + node _T_4741 = cat(_T_4740, buf_dual[0]) @[Cat.scala 29:58] + node _T_4742 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 119:118] + node _T_4743 = bits(_T_4741, 0, 0) @[el2_lsu_bus_buffer.scala 119:129] + node _T_4744 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 119:118] + node _T_4745 = bits(_T_4741, 1, 1) @[el2_lsu_bus_buffer.scala 119:129] + node _T_4746 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 119:118] + node _T_4747 = bits(_T_4741, 2, 2) @[el2_lsu_bus_buffer.scala 119:129] + node _T_4748 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 119:118] + node _T_4749 = bits(_T_4741, 3, 3) @[el2_lsu_bus_buffer.scala 119:129] + node _T_4750 = mux(_T_4742, _T_4743, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4751 = mux(_T_4744, _T_4745, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4752 = mux(_T_4746, _T_4747, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4753 = mux(_T_4748, _T_4749, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4754 = or(_T_4750, _T_4751) @[Mux.scala 27:72] + node _T_4755 = or(_T_4754, _T_4752) @[Mux.scala 27:72] + node _T_4756 = or(_T_4755, _T_4753) @[Mux.scala 27:72] wire lsu_nonblock_dual : UInt<1> @[Mux.scala 27:72] - lsu_nonblock_dual <= _T_4747 @[Mux.scala 27:72] - node _T_4748 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58] - node _T_4749 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[el2_lsu_bus_buffer.scala 603:121] - node lsu_nonblock_data_unalgn = dshr(_T_4748, _T_4749) @[el2_lsu_bus_buffer.scala 603:92] + lsu_nonblock_dual <= _T_4756 @[Mux.scala 27:72] + node _T_4757 = cat(lsu_nonblock_load_data_hi, lsu_nonblock_load_data_lo) @[Cat.scala 29:58] + node _T_4758 = mul(lsu_nonblock_addr_offset, UInt<4>("h08")) @[el2_lsu_bus_buffer.scala 603:121] + node lsu_nonblock_data_unalgn = dshr(_T_4757, _T_4758) @[el2_lsu_bus_buffer.scala 603:92] io.data_hi <= lsu_nonblock_load_data_hi @[el2_lsu_bus_buffer.scala 604:14] io.data_lo <= lsu_nonblock_load_data_lo @[el2_lsu_bus_buffer.scala 605:14] - node _T_4750 = eq(io.lsu_nonblock_load_data_error, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 606:69] - node _T_4751 = and(lsu_nonblock_load_data_ready, _T_4750) @[el2_lsu_bus_buffer.scala 606:67] - io.lsu_nonblock_load_data_valid <= _T_4751 @[el2_lsu_bus_buffer.scala 606:35] - node _T_4752 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:81] - node _T_4753 = and(lsu_nonblock_unsign, _T_4752) @[el2_lsu_bus_buffer.scala 607:63] - node _T_4754 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 607:131] - node _T_4755 = cat(UInt<24>("h00"), _T_4754) @[Cat.scala 29:58] - node _T_4756 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 608:45] - node _T_4757 = and(lsu_nonblock_unsign, _T_4756) @[el2_lsu_bus_buffer.scala 608:26] - node _T_4758 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 608:95] - node _T_4759 = cat(UInt<16>("h00"), _T_4758) @[Cat.scala 29:58] - node _T_4760 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 609:6] - node _T_4761 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 609:45] - node _T_4762 = and(_T_4760, _T_4761) @[el2_lsu_bus_buffer.scala 609:27] - node _T_4763 = bits(lsu_nonblock_data_unalgn, 7, 7) @[el2_lsu_bus_buffer.scala 609:93] - node _T_4764 = bits(_T_4763, 0, 0) @[Bitwise.scala 72:15] - node _T_4765 = mux(_T_4764, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] - node _T_4766 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 609:123] - node _T_4767 = cat(_T_4765, _T_4766) @[Cat.scala 29:58] - node _T_4768 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 610:6] - node _T_4769 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 610:45] - node _T_4770 = and(_T_4768, _T_4769) @[el2_lsu_bus_buffer.scala 610:27] - node _T_4771 = bits(lsu_nonblock_data_unalgn, 15, 15) @[el2_lsu_bus_buffer.scala 610:93] - node _T_4772 = bits(_T_4771, 0, 0) @[Bitwise.scala 72:15] - node _T_4773 = mux(_T_4772, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] - node _T_4774 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 610:124] - node _T_4775 = cat(_T_4773, _T_4774) @[Cat.scala 29:58] - node _T_4776 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 611:21] - node _T_4777 = mux(_T_4753, _T_4755, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4778 = mux(_T_4757, _T_4759, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4779 = mux(_T_4762, _T_4767, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4780 = mux(_T_4770, _T_4775, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4781 = mux(_T_4776, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4782 = or(_T_4777, _T_4778) @[Mux.scala 27:72] - node _T_4783 = or(_T_4782, _T_4779) @[Mux.scala 27:72] - node _T_4784 = or(_T_4783, _T_4780) @[Mux.scala 27:72] - node _T_4785 = or(_T_4784, _T_4781) @[Mux.scala 27:72] - wire _T_4786 : UInt<64> @[Mux.scala 27:72] - _T_4786 <= _T_4785 @[Mux.scala 27:72] - io.lsu_nonblock_load_data <= _T_4786 @[el2_lsu_bus_buffer.scala 607:29] - node _T_4787 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 612:62] - node _T_4788 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 612:89] - node _T_4789 = and(_T_4787, _T_4788) @[el2_lsu_bus_buffer.scala 612:73] - node _T_4790 = and(_T_4789, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 612:93] - node _T_4791 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 612:62] - node _T_4792 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 612:89] - node _T_4793 = and(_T_4791, _T_4792) @[el2_lsu_bus_buffer.scala 612:73] - node _T_4794 = and(_T_4793, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 612:93] - node _T_4795 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 612:62] - node _T_4796 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 612:89] - node _T_4797 = and(_T_4795, _T_4796) @[el2_lsu_bus_buffer.scala 612:73] - node _T_4798 = and(_T_4797, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 612:93] - node _T_4799 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 612:62] - node _T_4800 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 612:89] - node _T_4801 = and(_T_4799, _T_4800) @[el2_lsu_bus_buffer.scala 612:73] - node _T_4802 = and(_T_4801, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 612:93] - node _T_4803 = or(_T_4790, _T_4794) @[el2_lsu_bus_buffer.scala 612:141] - node _T_4804 = or(_T_4803, _T_4798) @[el2_lsu_bus_buffer.scala 612:141] - node _T_4805 = or(_T_4804, _T_4802) @[el2_lsu_bus_buffer.scala 612:141] - bus_sideeffect_pend <= _T_4805 @[el2_lsu_bus_buffer.scala 612:23] - node _T_4806 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 613:71] - node _T_4807 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 614:25] - node _T_4808 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 614:50] - node _T_4809 = bits(buf_addr[0], 31, 3) @[el2_lsu_bus_buffer.scala 614:70] - node _T_4810 = eq(_T_4808, _T_4809) @[el2_lsu_bus_buffer.scala 614:56] - node _T_4811 = and(_T_4807, _T_4810) @[el2_lsu_bus_buffer.scala 614:38] - node _T_4812 = eq(obuf_tag0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:92] - node _T_4813 = eq(obuf_tag1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:126] - node _T_4814 = and(obuf_merge, _T_4813) @[el2_lsu_bus_buffer.scala 614:114] - node _T_4815 = or(_T_4812, _T_4814) @[el2_lsu_bus_buffer.scala 614:100] - node _T_4816 = eq(_T_4815, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:80] - node _T_4817 = and(_T_4811, _T_4816) @[el2_lsu_bus_buffer.scala 614:78] - node _T_4818 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 613:71] - node _T_4819 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 614:25] - node _T_4820 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 614:50] - node _T_4821 = bits(buf_addr[1], 31, 3) @[el2_lsu_bus_buffer.scala 614:70] - node _T_4822 = eq(_T_4820, _T_4821) @[el2_lsu_bus_buffer.scala 614:56] - node _T_4823 = and(_T_4819, _T_4822) @[el2_lsu_bus_buffer.scala 614:38] - node _T_4824 = eq(obuf_tag0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 614:92] - node _T_4825 = eq(obuf_tag1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 614:126] - node _T_4826 = and(obuf_merge, _T_4825) @[el2_lsu_bus_buffer.scala 614:114] - node _T_4827 = or(_T_4824, _T_4826) @[el2_lsu_bus_buffer.scala 614:100] - node _T_4828 = eq(_T_4827, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:80] - node _T_4829 = and(_T_4823, _T_4828) @[el2_lsu_bus_buffer.scala 614:78] - node _T_4830 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 613:71] - node _T_4831 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 614:25] - node _T_4832 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 614:50] - node _T_4833 = bits(buf_addr[2], 31, 3) @[el2_lsu_bus_buffer.scala 614:70] - node _T_4834 = eq(_T_4832, _T_4833) @[el2_lsu_bus_buffer.scala 614:56] - node _T_4835 = and(_T_4831, _T_4834) @[el2_lsu_bus_buffer.scala 614:38] - node _T_4836 = eq(obuf_tag0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 614:92] - node _T_4837 = eq(obuf_tag1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 614:126] - node _T_4838 = and(obuf_merge, _T_4837) @[el2_lsu_bus_buffer.scala 614:114] - node _T_4839 = or(_T_4836, _T_4838) @[el2_lsu_bus_buffer.scala 614:100] - node _T_4840 = eq(_T_4839, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:80] - node _T_4841 = and(_T_4835, _T_4840) @[el2_lsu_bus_buffer.scala 614:78] - node _T_4842 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 613:71] - node _T_4843 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 614:25] - node _T_4844 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 614:50] - node _T_4845 = bits(buf_addr[3], 31, 3) @[el2_lsu_bus_buffer.scala 614:70] - node _T_4846 = eq(_T_4844, _T_4845) @[el2_lsu_bus_buffer.scala 614:56] - node _T_4847 = and(_T_4843, _T_4846) @[el2_lsu_bus_buffer.scala 614:38] - node _T_4848 = eq(obuf_tag0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 614:92] - node _T_4849 = eq(obuf_tag1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 614:126] - node _T_4850 = and(obuf_merge, _T_4849) @[el2_lsu_bus_buffer.scala 614:114] - node _T_4851 = or(_T_4848, _T_4850) @[el2_lsu_bus_buffer.scala 614:100] - node _T_4852 = eq(_T_4851, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:80] - node _T_4853 = and(_T_4847, _T_4852) @[el2_lsu_bus_buffer.scala 614:78] - node _T_4854 = mux(_T_4806, _T_4817, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4855 = mux(_T_4818, _T_4829, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4856 = mux(_T_4830, _T_4841, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4857 = mux(_T_4842, _T_4853, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4858 = or(_T_4854, _T_4855) @[Mux.scala 27:72] - node _T_4859 = or(_T_4858, _T_4856) @[Mux.scala 27:72] - node _T_4860 = or(_T_4859, _T_4857) @[Mux.scala 27:72] - wire _T_4861 : UInt<1> @[Mux.scala 27:72] - _T_4861 <= _T_4860 @[Mux.scala 27:72] - bus_addr_match_pending <= _T_4861 @[el2_lsu_bus_buffer.scala 613:26] - node _T_4862 = or(obuf_cmd_done, obuf_data_done) @[el2_lsu_bus_buffer.scala 616:54] - node _T_4863 = mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 616:75] - node _T_4864 = and(io.lsu_axi_awready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 616:150] - node _T_4865 = mux(_T_4862, _T_4863, _T_4864) @[el2_lsu_bus_buffer.scala 616:39] - node _T_4866 = mux(obuf_write, _T_4865, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 616:23] - bus_cmd_ready <= _T_4866 @[el2_lsu_bus_buffer.scala 616:17] - node _T_4867 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 617:39] - bus_wcmd_sent <= _T_4867 @[el2_lsu_bus_buffer.scala 617:17] - node _T_4868 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 618:39] - bus_wdata_sent <= _T_4868 @[el2_lsu_bus_buffer.scala 618:18] - node _T_4869 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 619:35] - node _T_4870 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 619:70] - node _T_4871 = and(_T_4869, _T_4870) @[el2_lsu_bus_buffer.scala 619:52] - node _T_4872 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 619:111] - node _T_4873 = or(_T_4871, _T_4872) @[el2_lsu_bus_buffer.scala 619:89] - bus_cmd_sent <= _T_4873 @[el2_lsu_bus_buffer.scala 619:16] - node _T_4874 = and(io.lsu_axi_rvalid, io.lsu_axi_rready) @[el2_lsu_bus_buffer.scala 620:37] - bus_rsp_read <= _T_4874 @[el2_lsu_bus_buffer.scala 620:16] - node _T_4875 = and(io.lsu_axi_bvalid, io.lsu_axi_bready) @[el2_lsu_bus_buffer.scala 621:38] - bus_rsp_write <= _T_4875 @[el2_lsu_bus_buffer.scala 621:17] + node _T_4759 = eq(io.lsu_nonblock_load_data_error, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 606:69] + node _T_4760 = and(lsu_nonblock_load_data_ready, _T_4759) @[el2_lsu_bus_buffer.scala 606:67] + io.lsu_nonblock_load_data_valid <= _T_4760 @[el2_lsu_bus_buffer.scala 606:35] + node _T_4761 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 607:81] + node _T_4762 = and(lsu_nonblock_unsign, _T_4761) @[el2_lsu_bus_buffer.scala 607:63] + node _T_4763 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 607:131] + node _T_4764 = cat(UInt<24>("h00"), _T_4763) @[Cat.scala 29:58] + node _T_4765 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 608:45] + node _T_4766 = and(lsu_nonblock_unsign, _T_4765) @[el2_lsu_bus_buffer.scala 608:26] + node _T_4767 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 608:95] + node _T_4768 = cat(UInt<16>("h00"), _T_4767) @[Cat.scala 29:58] + node _T_4769 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 609:6] + node _T_4770 = eq(lsu_nonblock_sz, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 609:45] + node _T_4771 = and(_T_4769, _T_4770) @[el2_lsu_bus_buffer.scala 609:27] + node _T_4772 = bits(lsu_nonblock_data_unalgn, 7, 7) @[el2_lsu_bus_buffer.scala 609:93] + node _T_4773 = bits(_T_4772, 0, 0) @[Bitwise.scala 72:15] + node _T_4774 = mux(_T_4773, UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12] + node _T_4775 = bits(lsu_nonblock_data_unalgn, 7, 0) @[el2_lsu_bus_buffer.scala 609:123] + node _T_4776 = cat(_T_4774, _T_4775) @[Cat.scala 29:58] + node _T_4777 = eq(lsu_nonblock_unsign, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 610:6] + node _T_4778 = eq(lsu_nonblock_sz, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 610:45] + node _T_4779 = and(_T_4777, _T_4778) @[el2_lsu_bus_buffer.scala 610:27] + node _T_4780 = bits(lsu_nonblock_data_unalgn, 15, 15) @[el2_lsu_bus_buffer.scala 610:93] + node _T_4781 = bits(_T_4780, 0, 0) @[Bitwise.scala 72:15] + node _T_4782 = mux(_T_4781, UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12] + node _T_4783 = bits(lsu_nonblock_data_unalgn, 15, 0) @[el2_lsu_bus_buffer.scala 610:124] + node _T_4784 = cat(_T_4782, _T_4783) @[Cat.scala 29:58] + node _T_4785 = eq(lsu_nonblock_sz, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 611:21] + node _T_4786 = mux(_T_4762, _T_4764, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4787 = mux(_T_4766, _T_4768, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4788 = mux(_T_4771, _T_4776, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4789 = mux(_T_4779, _T_4784, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4790 = mux(_T_4785, lsu_nonblock_data_unalgn, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4791 = or(_T_4786, _T_4787) @[Mux.scala 27:72] + node _T_4792 = or(_T_4791, _T_4788) @[Mux.scala 27:72] + node _T_4793 = or(_T_4792, _T_4789) @[Mux.scala 27:72] + node _T_4794 = or(_T_4793, _T_4790) @[Mux.scala 27:72] + wire _T_4795 : UInt<64> @[Mux.scala 27:72] + _T_4795 <= _T_4794 @[Mux.scala 27:72] + io.lsu_nonblock_load_data <= _T_4795 @[el2_lsu_bus_buffer.scala 607:29] + node _T_4796 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 612:62] + node _T_4797 = bits(buf_sideeffect, 0, 0) @[el2_lsu_bus_buffer.scala 612:89] + node _T_4798 = and(_T_4796, _T_4797) @[el2_lsu_bus_buffer.scala 612:73] + node _T_4799 = and(_T_4798, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 612:93] + node _T_4800 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 612:62] + node _T_4801 = bits(buf_sideeffect, 1, 1) @[el2_lsu_bus_buffer.scala 612:89] + node _T_4802 = and(_T_4800, _T_4801) @[el2_lsu_bus_buffer.scala 612:73] + node _T_4803 = and(_T_4802, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 612:93] + node _T_4804 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 612:62] + node _T_4805 = bits(buf_sideeffect, 2, 2) @[el2_lsu_bus_buffer.scala 612:89] + node _T_4806 = and(_T_4804, _T_4805) @[el2_lsu_bus_buffer.scala 612:73] + node _T_4807 = and(_T_4806, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 612:93] + node _T_4808 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 612:62] + node _T_4809 = bits(buf_sideeffect, 3, 3) @[el2_lsu_bus_buffer.scala 612:89] + node _T_4810 = and(_T_4808, _T_4809) @[el2_lsu_bus_buffer.scala 612:73] + node _T_4811 = and(_T_4810, io.dec_tlu_sideeffect_posted_disable) @[el2_lsu_bus_buffer.scala 612:93] + node _T_4812 = or(_T_4799, _T_4803) @[el2_lsu_bus_buffer.scala 612:141] + node _T_4813 = or(_T_4812, _T_4807) @[el2_lsu_bus_buffer.scala 612:141] + node _T_4814 = or(_T_4813, _T_4811) @[el2_lsu_bus_buffer.scala 612:141] + bus_sideeffect_pend <= _T_4814 @[el2_lsu_bus_buffer.scala 612:23] + node _T_4815 = eq(buf_state[0], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 613:71] + node _T_4816 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 614:25] + node _T_4817 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 614:50] + node _T_4818 = bits(buf_addr[0], 31, 3) @[el2_lsu_bus_buffer.scala 614:70] + node _T_4819 = eq(_T_4817, _T_4818) @[el2_lsu_bus_buffer.scala 614:56] + node _T_4820 = and(_T_4816, _T_4819) @[el2_lsu_bus_buffer.scala 614:38] + node _T_4821 = eq(obuf_tag0, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:92] + node _T_4822 = eq(obuf_tag1, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:126] + node _T_4823 = and(obuf_merge, _T_4822) @[el2_lsu_bus_buffer.scala 614:114] + node _T_4824 = or(_T_4821, _T_4823) @[el2_lsu_bus_buffer.scala 614:100] + node _T_4825 = eq(_T_4824, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:80] + node _T_4826 = and(_T_4820, _T_4825) @[el2_lsu_bus_buffer.scala 614:78] + node _T_4827 = eq(buf_state[1], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 613:71] + node _T_4828 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 614:25] + node _T_4829 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 614:50] + node _T_4830 = bits(buf_addr[1], 31, 3) @[el2_lsu_bus_buffer.scala 614:70] + node _T_4831 = eq(_T_4829, _T_4830) @[el2_lsu_bus_buffer.scala 614:56] + node _T_4832 = and(_T_4828, _T_4831) @[el2_lsu_bus_buffer.scala 614:38] + node _T_4833 = eq(obuf_tag0, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 614:92] + node _T_4834 = eq(obuf_tag1, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 614:126] + node _T_4835 = and(obuf_merge, _T_4834) @[el2_lsu_bus_buffer.scala 614:114] + node _T_4836 = or(_T_4833, _T_4835) @[el2_lsu_bus_buffer.scala 614:100] + node _T_4837 = eq(_T_4836, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:80] + node _T_4838 = and(_T_4832, _T_4837) @[el2_lsu_bus_buffer.scala 614:78] + node _T_4839 = eq(buf_state[2], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 613:71] + node _T_4840 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 614:25] + node _T_4841 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 614:50] + node _T_4842 = bits(buf_addr[2], 31, 3) @[el2_lsu_bus_buffer.scala 614:70] + node _T_4843 = eq(_T_4841, _T_4842) @[el2_lsu_bus_buffer.scala 614:56] + node _T_4844 = and(_T_4840, _T_4843) @[el2_lsu_bus_buffer.scala 614:38] + node _T_4845 = eq(obuf_tag0, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 614:92] + node _T_4846 = eq(obuf_tag1, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 614:126] + node _T_4847 = and(obuf_merge, _T_4846) @[el2_lsu_bus_buffer.scala 614:114] + node _T_4848 = or(_T_4845, _T_4847) @[el2_lsu_bus_buffer.scala 614:100] + node _T_4849 = eq(_T_4848, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:80] + node _T_4850 = and(_T_4844, _T_4849) @[el2_lsu_bus_buffer.scala 614:78] + node _T_4851 = eq(buf_state[3], UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 613:71] + node _T_4852 = and(UInt<1>("h01"), obuf_valid) @[el2_lsu_bus_buffer.scala 614:25] + node _T_4853 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 614:50] + node _T_4854 = bits(buf_addr[3], 31, 3) @[el2_lsu_bus_buffer.scala 614:70] + node _T_4855 = eq(_T_4853, _T_4854) @[el2_lsu_bus_buffer.scala 614:56] + node _T_4856 = and(_T_4852, _T_4855) @[el2_lsu_bus_buffer.scala 614:38] + node _T_4857 = eq(obuf_tag0, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 614:92] + node _T_4858 = eq(obuf_tag1, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 614:126] + node _T_4859 = and(obuf_merge, _T_4858) @[el2_lsu_bus_buffer.scala 614:114] + node _T_4860 = or(_T_4857, _T_4859) @[el2_lsu_bus_buffer.scala 614:100] + node _T_4861 = eq(_T_4860, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 614:80] + node _T_4862 = and(_T_4856, _T_4861) @[el2_lsu_bus_buffer.scala 614:78] + node _T_4863 = mux(_T_4815, _T_4826, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4864 = mux(_T_4827, _T_4838, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4865 = mux(_T_4839, _T_4850, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4866 = mux(_T_4851, _T_4862, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4867 = or(_T_4863, _T_4864) @[Mux.scala 27:72] + node _T_4868 = or(_T_4867, _T_4865) @[Mux.scala 27:72] + node _T_4869 = or(_T_4868, _T_4866) @[Mux.scala 27:72] + wire _T_4870 : UInt<1> @[Mux.scala 27:72] + _T_4870 <= _T_4869 @[Mux.scala 27:72] + bus_addr_match_pending <= _T_4870 @[el2_lsu_bus_buffer.scala 613:26] + node _T_4871 = or(obuf_cmd_done, obuf_data_done) @[el2_lsu_bus_buffer.scala 616:54] + node _T_4872 = mux(obuf_cmd_done, io.lsu_axi_wready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 616:75] + node _T_4873 = and(io.lsu_axi_awready, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 616:150] + node _T_4874 = mux(_T_4871, _T_4872, _T_4873) @[el2_lsu_bus_buffer.scala 616:39] + node _T_4875 = mux(obuf_write, _T_4874, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 616:23] + bus_cmd_ready <= _T_4875 @[el2_lsu_bus_buffer.scala 616:17] + node _T_4876 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 617:39] + bus_wcmd_sent <= _T_4876 @[el2_lsu_bus_buffer.scala 617:17] + node _T_4877 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 618:39] + bus_wdata_sent <= _T_4877 @[el2_lsu_bus_buffer.scala 618:18] + node _T_4878 = or(obuf_cmd_done, bus_wcmd_sent) @[el2_lsu_bus_buffer.scala 619:35] + node _T_4879 = or(obuf_data_done, bus_wdata_sent) @[el2_lsu_bus_buffer.scala 619:70] + node _T_4880 = and(_T_4878, _T_4879) @[el2_lsu_bus_buffer.scala 619:52] + node _T_4881 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 619:111] + node _T_4882 = or(_T_4880, _T_4881) @[el2_lsu_bus_buffer.scala 619:89] + bus_cmd_sent <= _T_4882 @[el2_lsu_bus_buffer.scala 619:16] + node _T_4883 = and(io.lsu_axi_rvalid, io.lsu_axi_rready) @[el2_lsu_bus_buffer.scala 620:37] + bus_rsp_read <= _T_4883 @[el2_lsu_bus_buffer.scala 620:16] + node _T_4884 = and(io.lsu_axi_bvalid, io.lsu_axi_bready) @[el2_lsu_bus_buffer.scala 621:38] + bus_rsp_write <= _T_4884 @[el2_lsu_bus_buffer.scala 621:17] bus_rsp_read_tag <= io.lsu_axi_rid @[el2_lsu_bus_buffer.scala 622:20] bus_rsp_write_tag <= io.lsu_axi_bid @[el2_lsu_bus_buffer.scala 623:21] - node _T_4876 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 624:60] - node _T_4877 = and(bus_rsp_write, _T_4876) @[el2_lsu_bus_buffer.scala 624:40] - bus_rsp_write_error <= _T_4877 @[el2_lsu_bus_buffer.scala 624:23] - node _T_4878 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 625:58] - node _T_4879 = and(bus_rsp_read, _T_4878) @[el2_lsu_bus_buffer.scala 625:38] - bus_rsp_read_error <= _T_4879 @[el2_lsu_bus_buffer.scala 625:22] + node _T_4885 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 624:60] + node _T_4886 = and(bus_rsp_write, _T_4885) @[el2_lsu_bus_buffer.scala 624:40] + bus_rsp_write_error <= _T_4886 @[el2_lsu_bus_buffer.scala 624:23] + node _T_4887 = neq(io.lsu_axi_bresp, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 625:58] + node _T_4888 = and(bus_rsp_read, _T_4887) @[el2_lsu_bus_buffer.scala 625:38] + bus_rsp_read_error <= _T_4888 @[el2_lsu_bus_buffer.scala 625:22] bus_rsp_rdata <= io.lsu_axi_rdata @[el2_lsu_bus_buffer.scala 626:17] - node _T_4880 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 629:36] - node _T_4881 = eq(obuf_cmd_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 629:51] - node _T_4882 = and(_T_4880, _T_4881) @[el2_lsu_bus_buffer.scala 629:49] - node _T_4883 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 629:68] - node _T_4884 = and(_T_4882, _T_4883) @[el2_lsu_bus_buffer.scala 629:66] - io.lsu_axi_awvalid <= _T_4884 @[el2_lsu_bus_buffer.scala 629:22] + node _T_4889 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 629:36] + node _T_4890 = eq(obuf_cmd_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 629:51] + node _T_4891 = and(_T_4889, _T_4890) @[el2_lsu_bus_buffer.scala 629:49] + node _T_4892 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 629:68] + node _T_4893 = and(_T_4891, _T_4892) @[el2_lsu_bus_buffer.scala 629:66] + io.lsu_axi_awvalid <= _T_4893 @[el2_lsu_bus_buffer.scala 629:22] io.lsu_axi_awid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 630:19] - node _T_4885 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 631:69] - node _T_4886 = cat(_T_4885, UInt<3>("h00")) @[Cat.scala 29:58] - node _T_4887 = mux(obuf_sideeffect, obuf_addr, _T_4886) @[el2_lsu_bus_buffer.scala 631:27] - io.lsu_axi_awaddr <= _T_4887 @[el2_lsu_bus_buffer.scala 631:21] - node _T_4888 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] - node _T_4889 = mux(obuf_sideeffect, _T_4888, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 632:27] - io.lsu_axi_awsize <= _T_4889 @[el2_lsu_bus_buffer.scala 632:21] + node _T_4894 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 631:69] + node _T_4895 = cat(_T_4894, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4896 = mux(obuf_sideeffect, obuf_addr, _T_4895) @[el2_lsu_bus_buffer.scala 631:27] + io.lsu_axi_awaddr <= _T_4896 @[el2_lsu_bus_buffer.scala 631:21] + node _T_4897 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4898 = mux(obuf_sideeffect, _T_4897, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 632:27] + io.lsu_axi_awsize <= _T_4898 @[el2_lsu_bus_buffer.scala 632:21] io.lsu_axi_awprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 633:21] - node _T_4890 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 634:28] - io.lsu_axi_awcache <= _T_4890 @[el2_lsu_bus_buffer.scala 634:22] - node _T_4891 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 635:35] - io.lsu_axi_awregion <= _T_4891 @[el2_lsu_bus_buffer.scala 635:23] + node _T_4899 = mux(obuf_sideeffect, UInt<1>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 634:28] + io.lsu_axi_awcache <= _T_4899 @[el2_lsu_bus_buffer.scala 634:22] + node _T_4900 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 635:35] + io.lsu_axi_awregion <= _T_4900 @[el2_lsu_bus_buffer.scala 635:23] io.lsu_axi_awlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 636:20] io.lsu_axi_awburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 637:22] io.lsu_axi_awqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 638:20] io.lsu_axi_awlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 639:21] - node _T_4892 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 641:35] - node _T_4893 = eq(obuf_data_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 641:50] - node _T_4894 = and(_T_4892, _T_4893) @[el2_lsu_bus_buffer.scala 641:48] - node _T_4895 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 641:68] - node _T_4896 = and(_T_4894, _T_4895) @[el2_lsu_bus_buffer.scala 641:66] - io.lsu_axi_wvalid <= _T_4896 @[el2_lsu_bus_buffer.scala 641:21] - node _T_4897 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15] - node _T_4898 = mux(_T_4897, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] - node _T_4899 = and(obuf_byteen, _T_4898) @[el2_lsu_bus_buffer.scala 642:35] - io.lsu_axi_wstrb <= _T_4899 @[el2_lsu_bus_buffer.scala 642:20] + node _T_4901 = and(obuf_valid, obuf_write) @[el2_lsu_bus_buffer.scala 641:35] + node _T_4902 = eq(obuf_data_done, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 641:50] + node _T_4903 = and(_T_4901, _T_4902) @[el2_lsu_bus_buffer.scala 641:48] + node _T_4904 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 641:68] + node _T_4905 = and(_T_4903, _T_4904) @[el2_lsu_bus_buffer.scala 641:66] + io.lsu_axi_wvalid <= _T_4905 @[el2_lsu_bus_buffer.scala 641:21] + node _T_4906 = bits(obuf_write, 0, 0) @[Bitwise.scala 72:15] + node _T_4907 = mux(_T_4906, UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12] + node _T_4908 = and(obuf_byteen, _T_4907) @[el2_lsu_bus_buffer.scala 642:35] + io.lsu_axi_wstrb <= _T_4908 @[el2_lsu_bus_buffer.scala 642:20] io.lsu_axi_wdata <= obuf_data @[el2_lsu_bus_buffer.scala 643:20] io.lsu_axi_wlast <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 644:20] - node _T_4900 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 646:38] - node _T_4901 = and(obuf_valid, _T_4900) @[el2_lsu_bus_buffer.scala 646:36] - node _T_4902 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 646:52] - node _T_4903 = and(_T_4901, _T_4902) @[el2_lsu_bus_buffer.scala 646:50] - node _T_4904 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 646:67] - node _T_4905 = and(_T_4903, _T_4904) @[el2_lsu_bus_buffer.scala 646:65] - io.lsu_axi_arvalid <= _T_4905 @[el2_lsu_bus_buffer.scala 646:22] + node _T_4909 = eq(obuf_write, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 646:38] + node _T_4910 = and(obuf_valid, _T_4909) @[el2_lsu_bus_buffer.scala 646:36] + node _T_4911 = eq(obuf_nosend, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 646:52] + node _T_4912 = and(_T_4910, _T_4911) @[el2_lsu_bus_buffer.scala 646:50] + node _T_4913 = eq(bus_addr_match_pending, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 646:67] + node _T_4914 = and(_T_4912, _T_4913) @[el2_lsu_bus_buffer.scala 646:65] + io.lsu_axi_arvalid <= _T_4914 @[el2_lsu_bus_buffer.scala 646:22] io.lsu_axi_arid <= obuf_tag0 @[el2_lsu_bus_buffer.scala 647:19] - node _T_4906 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 648:69] - node _T_4907 = cat(_T_4906, UInt<3>("h00")) @[Cat.scala 29:58] - node _T_4908 = mux(obuf_sideeffect, obuf_addr, _T_4907) @[el2_lsu_bus_buffer.scala 648:27] - io.lsu_axi_araddr <= _T_4908 @[el2_lsu_bus_buffer.scala 648:21] - node _T_4909 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] - node _T_4910 = mux(obuf_sideeffect, _T_4909, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 649:27] - io.lsu_axi_arsize <= _T_4910 @[el2_lsu_bus_buffer.scala 649:21] + node _T_4915 = bits(obuf_addr, 31, 3) @[el2_lsu_bus_buffer.scala 648:69] + node _T_4916 = cat(_T_4915, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_4917 = mux(obuf_sideeffect, obuf_addr, _T_4916) @[el2_lsu_bus_buffer.scala 648:27] + io.lsu_axi_araddr <= _T_4917 @[el2_lsu_bus_buffer.scala 648:21] + node _T_4918 = cat(UInt<1>("h00"), obuf_sz) @[Cat.scala 29:58] + node _T_4919 = mux(obuf_sideeffect, _T_4918, UInt<3>("h03")) @[el2_lsu_bus_buffer.scala 649:27] + io.lsu_axi_arsize <= _T_4919 @[el2_lsu_bus_buffer.scala 649:21] io.lsu_axi_arprot <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 650:21] - node _T_4911 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 651:28] - io.lsu_axi_arcache <= _T_4911 @[el2_lsu_bus_buffer.scala 651:22] - node _T_4912 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 652:35] - io.lsu_axi_arregion <= _T_4912 @[el2_lsu_bus_buffer.scala 652:23] + node _T_4920 = mux(obuf_sideeffect, UInt<4>("h00"), UInt<4>("h0f")) @[el2_lsu_bus_buffer.scala 651:28] + io.lsu_axi_arcache <= _T_4920 @[el2_lsu_bus_buffer.scala 651:22] + node _T_4921 = bits(obuf_addr, 31, 28) @[el2_lsu_bus_buffer.scala 652:35] + io.lsu_axi_arregion <= _T_4921 @[el2_lsu_bus_buffer.scala 652:23] io.lsu_axi_arlen <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 653:20] io.lsu_axi_arburst <= UInt<2>("h01") @[el2_lsu_bus_buffer.scala 654:22] io.lsu_axi_arqos <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 655:20] io.lsu_axi_arlock <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 656:21] io.lsu_axi_bready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 657:21] io.lsu_axi_rready <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 658:21] - node _T_4913 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 659:81] - node _T_4914 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 659:125] - node _T_4915 = and(io.lsu_bus_clk_en_q, _T_4914) @[el2_lsu_bus_buffer.scala 659:114] - node _T_4916 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 659:140] - node _T_4917 = and(_T_4915, _T_4916) @[el2_lsu_bus_buffer.scala 659:129] - node _T_4918 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 659:81] - node _T_4919 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 659:125] - node _T_4920 = and(io.lsu_bus_clk_en_q, _T_4919) @[el2_lsu_bus_buffer.scala 659:114] - node _T_4921 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 659:140] - node _T_4922 = and(_T_4920, _T_4921) @[el2_lsu_bus_buffer.scala 659:129] - node _T_4923 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 659:81] - node _T_4924 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 659:125] - node _T_4925 = and(io.lsu_bus_clk_en_q, _T_4924) @[el2_lsu_bus_buffer.scala 659:114] - node _T_4926 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 659:140] - node _T_4927 = and(_T_4925, _T_4926) @[el2_lsu_bus_buffer.scala 659:129] - node _T_4928 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 659:81] - node _T_4929 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 659:125] - node _T_4930 = and(io.lsu_bus_clk_en_q, _T_4929) @[el2_lsu_bus_buffer.scala 659:114] - node _T_4931 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 659:140] - node _T_4932 = and(_T_4930, _T_4931) @[el2_lsu_bus_buffer.scala 659:129] - node _T_4933 = mux(_T_4913, _T_4917, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4934 = mux(_T_4918, _T_4922, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4935 = mux(_T_4923, _T_4927, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4936 = mux(_T_4928, _T_4932, UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4937 = or(_T_4933, _T_4934) @[Mux.scala 27:72] - node _T_4938 = or(_T_4937, _T_4935) @[Mux.scala 27:72] - node _T_4939 = or(_T_4938, _T_4936) @[Mux.scala 27:72] - wire _T_4940 : UInt<1> @[Mux.scala 27:72] - _T_4940 <= _T_4939 @[Mux.scala 27:72] - io.lsu_imprecise_error_store_any <= _T_4940 @[el2_lsu_bus_buffer.scala 659:36] - node _T_4941 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 660:87] - node _T_4942 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 660:109] - node _T_4943 = and(_T_4941, _T_4942) @[el2_lsu_bus_buffer.scala 660:98] - node _T_4944 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 660:124] - node _T_4945 = and(_T_4943, _T_4944) @[el2_lsu_bus_buffer.scala 660:113] - node _T_4946 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 660:87] - node _T_4947 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 660:109] - node _T_4948 = and(_T_4946, _T_4947) @[el2_lsu_bus_buffer.scala 660:98] - node _T_4949 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 660:124] - node _T_4950 = and(_T_4948, _T_4949) @[el2_lsu_bus_buffer.scala 660:113] - node _T_4951 = mux(_T_4945, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4952 = mux(_T_4950, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4953 = or(_T_4951, _T_4952) @[Mux.scala 27:72] + node _T_4922 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 659:81] + node _T_4923 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 659:125] + node _T_4924 = and(io.lsu_bus_clk_en_q, _T_4923) @[el2_lsu_bus_buffer.scala 659:114] + node _T_4925 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 659:140] + node _T_4926 = and(_T_4924, _T_4925) @[el2_lsu_bus_buffer.scala 659:129] + node _T_4927 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 659:81] + node _T_4928 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 659:125] + node _T_4929 = and(io.lsu_bus_clk_en_q, _T_4928) @[el2_lsu_bus_buffer.scala 659:114] + node _T_4930 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 659:140] + node _T_4931 = and(_T_4929, _T_4930) @[el2_lsu_bus_buffer.scala 659:129] + node _T_4932 = eq(buf_state[2], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 659:81] + node _T_4933 = bits(buf_error, 2, 2) @[el2_lsu_bus_buffer.scala 659:125] + node _T_4934 = and(io.lsu_bus_clk_en_q, _T_4933) @[el2_lsu_bus_buffer.scala 659:114] + node _T_4935 = bits(buf_write, 2, 2) @[el2_lsu_bus_buffer.scala 659:140] + node _T_4936 = and(_T_4934, _T_4935) @[el2_lsu_bus_buffer.scala 659:129] + node _T_4937 = eq(buf_state[3], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 659:81] + node _T_4938 = bits(buf_error, 3, 3) @[el2_lsu_bus_buffer.scala 659:125] + node _T_4939 = and(io.lsu_bus_clk_en_q, _T_4938) @[el2_lsu_bus_buffer.scala 659:114] + node _T_4940 = bits(buf_write, 3, 3) @[el2_lsu_bus_buffer.scala 659:140] + node _T_4941 = and(_T_4939, _T_4940) @[el2_lsu_bus_buffer.scala 659:129] + node _T_4942 = mux(_T_4922, _T_4926, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4943 = mux(_T_4927, _T_4931, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4944 = mux(_T_4932, _T_4936, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4945 = mux(_T_4937, _T_4941, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4946 = or(_T_4942, _T_4943) @[Mux.scala 27:72] + node _T_4947 = or(_T_4946, _T_4944) @[Mux.scala 27:72] + node _T_4948 = or(_T_4947, _T_4945) @[Mux.scala 27:72] + wire _T_4949 : UInt<1> @[Mux.scala 27:72] + _T_4949 <= _T_4948 @[Mux.scala 27:72] + io.lsu_imprecise_error_store_any <= _T_4949 @[el2_lsu_bus_buffer.scala 659:36] + node _T_4950 = eq(buf_state[0], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 660:87] + node _T_4951 = bits(buf_error, 0, 0) @[el2_lsu_bus_buffer.scala 660:109] + node _T_4952 = and(_T_4950, _T_4951) @[el2_lsu_bus_buffer.scala 660:98] + node _T_4953 = bits(buf_write, 0, 0) @[el2_lsu_bus_buffer.scala 660:124] + node _T_4954 = and(_T_4952, _T_4953) @[el2_lsu_bus_buffer.scala 660:113] + node _T_4955 = eq(buf_state[1], UInt<3>("h06")) @[el2_lsu_bus_buffer.scala 660:87] + node _T_4956 = bits(buf_error, 1, 1) @[el2_lsu_bus_buffer.scala 660:109] + node _T_4957 = and(_T_4955, _T_4956) @[el2_lsu_bus_buffer.scala 660:98] + node _T_4958 = bits(buf_write, 1, 1) @[el2_lsu_bus_buffer.scala 660:124] + node _T_4959 = and(_T_4957, _T_4958) @[el2_lsu_bus_buffer.scala 660:113] + node _T_4960 = mux(_T_4954, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4961 = mux(_T_4959, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4962 = or(_T_4960, _T_4961) @[Mux.scala 27:72] wire lsu_imprecise_error_store_tag : UInt<1> @[Mux.scala 27:72] - lsu_imprecise_error_store_tag <= _T_4953 @[Mux.scala 27:72] - node _T_4954 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 662:72] - node _T_4955 = and(io.lsu_nonblock_load_data_error, _T_4954) @[el2_lsu_bus_buffer.scala 662:70] - io.lsu_imprecise_error_load_any <= _T_4955 @[el2_lsu_bus_buffer.scala 662:35] - node _T_4956 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4957 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4958 = mux(_T_4956, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4959 = mux(_T_4957, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4960 = or(_T_4958, _T_4959) @[Mux.scala 27:72] - wire _T_4961 : UInt<32> @[Mux.scala 27:72] - _T_4961 <= _T_4960 @[Mux.scala 27:72] - node _T_4962 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4963 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4964 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4965 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 120:123] - node _T_4966 = mux(_T_4962, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4967 = mux(_T_4963, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4968 = mux(_T_4964, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4969 = mux(_T_4965, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] - node _T_4970 = or(_T_4966, _T_4967) @[Mux.scala 27:72] - node _T_4971 = or(_T_4970, _T_4968) @[Mux.scala 27:72] - node _T_4972 = or(_T_4971, _T_4969) @[Mux.scala 27:72] - wire _T_4973 : UInt<32> @[Mux.scala 27:72] - _T_4973 <= _T_4972 @[Mux.scala 27:72] - node _T_4974 = mux(io.lsu_imprecise_error_store_any, _T_4961, _T_4973) @[el2_lsu_bus_buffer.scala 663:41] - io.lsu_imprecise_error_addr_any <= _T_4974 @[el2_lsu_bus_buffer.scala 663:35] + lsu_imprecise_error_store_tag <= _T_4962 @[Mux.scala 27:72] + node _T_4963 = eq(io.lsu_imprecise_error_store_any, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 662:72] + node _T_4964 = and(io.lsu_nonblock_load_data_error, _T_4963) @[el2_lsu_bus_buffer.scala 662:70] + io.lsu_imprecise_error_load_any <= _T_4964 @[el2_lsu_bus_buffer.scala 662:35] + node _T_4965 = eq(lsu_imprecise_error_store_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4966 = eq(lsu_imprecise_error_store_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4967 = mux(_T_4965, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4968 = mux(_T_4966, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4969 = or(_T_4967, _T_4968) @[Mux.scala 27:72] + wire _T_4970 : UInt<32> @[Mux.scala 27:72] + _T_4970 <= _T_4969 @[Mux.scala 27:72] + node _T_4971 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4972 = eq(io.lsu_nonblock_load_data_tag, UInt<1>("h01")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4973 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h02")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4974 = eq(io.lsu_nonblock_load_data_tag, UInt<2>("h03")) @[el2_lsu_bus_buffer.scala 120:123] + node _T_4975 = mux(_T_4971, buf_addr[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4976 = mux(_T_4972, buf_addr[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4977 = mux(_T_4973, buf_addr[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4978 = mux(_T_4974, buf_addr[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_4979 = or(_T_4975, _T_4976) @[Mux.scala 27:72] + node _T_4980 = or(_T_4979, _T_4977) @[Mux.scala 27:72] + node _T_4981 = or(_T_4980, _T_4978) @[Mux.scala 27:72] + wire _T_4982 : UInt<32> @[Mux.scala 27:72] + _T_4982 <= _T_4981 @[Mux.scala 27:72] + node _T_4983 = mux(io.lsu_imprecise_error_store_any, _T_4970, _T_4982) @[el2_lsu_bus_buffer.scala 663:41] + io.lsu_imprecise_error_addr_any <= _T_4983 @[el2_lsu_bus_buffer.scala 663:35] lsu_bus_cntr_overflow <= UInt<1>("h00") @[el2_lsu_bus_buffer.scala 664:25] io.lsu_bus_idle_any <= UInt<1>("h01") @[el2_lsu_bus_buffer.scala 666:23] - node _T_4975 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 669:46] - node _T_4976 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 669:89] - node _T_4977 = or(_T_4975, _T_4976) @[el2_lsu_bus_buffer.scala 669:68] - node _T_4978 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 669:132] - node _T_4979 = or(_T_4977, _T_4978) @[el2_lsu_bus_buffer.scala 669:110] - io.lsu_pmu_bus_trxn <= _T_4979 @[el2_lsu_bus_buffer.scala 669:23] - node _T_4980 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 670:48] - node _T_4981 = and(_T_4980, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 670:65] - io.lsu_pmu_bus_misaligned <= _T_4981 @[el2_lsu_bus_buffer.scala 670:29] - node _T_4982 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 671:59] - io.lsu_pmu_bus_error <= _T_4982 @[el2_lsu_bus_buffer.scala 671:24] - node _T_4983 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 673:48] - node _T_4984 = and(io.lsu_axi_awvalid, _T_4983) @[el2_lsu_bus_buffer.scala 673:46] - node _T_4985 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 673:92] - node _T_4986 = and(io.lsu_axi_wvalid, _T_4985) @[el2_lsu_bus_buffer.scala 673:90] - node _T_4987 = or(_T_4984, _T_4986) @[el2_lsu_bus_buffer.scala 673:69] - node _T_4988 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 673:136] - node _T_4989 = and(io.lsu_axi_arvalid, _T_4988) @[el2_lsu_bus_buffer.scala 673:134] - node _T_4990 = or(_T_4987, _T_4989) @[el2_lsu_bus_buffer.scala 673:112] - io.lsu_pmu_bus_busy <= _T_4990 @[el2_lsu_bus_buffer.scala 673:23] - reg _T_4991 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 675:49] - _T_4991 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 675:49] - WrPtr0_r <= _T_4991 @[el2_lsu_bus_buffer.scala 675:12] - reg _T_4992 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 676:49] - _T_4992 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 676:49] - WrPtr1_r <= _T_4992 @[el2_lsu_bus_buffer.scala 676:12] - node _T_4993 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 677:75] - node _T_4994 = and(io.lsu_busreq_m, _T_4993) @[el2_lsu_bus_buffer.scala 677:73] - node _T_4995 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 677:89] - node _T_4996 = and(_T_4994, _T_4995) @[el2_lsu_bus_buffer.scala 677:87] - reg _T_4997 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 677:56] - _T_4997 <= _T_4996 @[el2_lsu_bus_buffer.scala 677:56] - io.lsu_busreq_r <= _T_4997 @[el2_lsu_bus_buffer.scala 677:19] - reg _T_4998 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 678:66] - _T_4998 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 678:66] - lsu_nonblock_load_valid_r <= _T_4998 @[el2_lsu_bus_buffer.scala 678:29] + node _T_4984 = and(io.lsu_axi_awvalid, io.lsu_axi_awready) @[el2_lsu_bus_buffer.scala 669:46] + node _T_4985 = and(io.lsu_axi_wvalid, io.lsu_axi_wready) @[el2_lsu_bus_buffer.scala 669:89] + node _T_4986 = or(_T_4984, _T_4985) @[el2_lsu_bus_buffer.scala 669:68] + node _T_4987 = and(io.lsu_axi_arvalid, io.lsu_axi_arready) @[el2_lsu_bus_buffer.scala 669:132] + node _T_4988 = or(_T_4986, _T_4987) @[el2_lsu_bus_buffer.scala 669:110] + io.lsu_pmu_bus_trxn <= _T_4988 @[el2_lsu_bus_buffer.scala 669:23] + node _T_4989 = and(io.lsu_busreq_r, io.ldst_dual_r) @[el2_lsu_bus_buffer.scala 670:48] + node _T_4990 = and(_T_4989, io.lsu_commit_r) @[el2_lsu_bus_buffer.scala 670:65] + io.lsu_pmu_bus_misaligned <= _T_4990 @[el2_lsu_bus_buffer.scala 670:29] + node _T_4991 = or(io.lsu_imprecise_error_load_any, io.lsu_imprecise_error_store_any) @[el2_lsu_bus_buffer.scala 671:59] + io.lsu_pmu_bus_error <= _T_4991 @[el2_lsu_bus_buffer.scala 671:24] + node _T_4992 = eq(io.lsu_axi_awready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 673:48] + node _T_4993 = and(io.lsu_axi_awvalid, _T_4992) @[el2_lsu_bus_buffer.scala 673:46] + node _T_4994 = eq(io.lsu_axi_wready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 673:92] + node _T_4995 = and(io.lsu_axi_wvalid, _T_4994) @[el2_lsu_bus_buffer.scala 673:90] + node _T_4996 = or(_T_4993, _T_4995) @[el2_lsu_bus_buffer.scala 673:69] + node _T_4997 = eq(io.lsu_axi_arready, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 673:136] + node _T_4998 = and(io.lsu_axi_arvalid, _T_4997) @[el2_lsu_bus_buffer.scala 673:134] + node _T_4999 = or(_T_4996, _T_4998) @[el2_lsu_bus_buffer.scala 673:112] + io.lsu_pmu_bus_busy <= _T_4999 @[el2_lsu_bus_buffer.scala 673:23] + reg _T_5000 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 675:49] + _T_5000 <= WrPtr0_m @[el2_lsu_bus_buffer.scala 675:49] + WrPtr0_r <= _T_5000 @[el2_lsu_bus_buffer.scala 675:12] + reg _T_5001 : UInt, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 676:49] + _T_5001 <= WrPtr1_m @[el2_lsu_bus_buffer.scala 676:49] + WrPtr1_r <= _T_5001 @[el2_lsu_bus_buffer.scala 676:12] + node _T_5002 = eq(io.flush_r, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 677:75] + node _T_5003 = and(io.lsu_busreq_m, _T_5002) @[el2_lsu_bus_buffer.scala 677:73] + node _T_5004 = eq(io.ld_full_hit_m, UInt<1>("h00")) @[el2_lsu_bus_buffer.scala 677:89] + node _T_5005 = and(_T_5003, _T_5004) @[el2_lsu_bus_buffer.scala 677:87] + reg _T_5006 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 677:56] + _T_5006 <= _T_5005 @[el2_lsu_bus_buffer.scala 677:56] + io.lsu_busreq_r <= _T_5006 @[el2_lsu_bus_buffer.scala 677:19] + reg _T_5007 : UInt<1>, io.lsu_c2_r_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_lsu_bus_buffer.scala 678:66] + _T_5007 <= io.lsu_nonblock_load_valid_m @[el2_lsu_bus_buffer.scala 678:66] + lsu_nonblock_load_valid_r <= _T_5007 @[el2_lsu_bus_buffer.scala 678:29] diff --git a/el2_lsu_bus_buffer.v b/el2_lsu_bus_buffer.v index 2458e489..6f32da68 100644 --- a/el2_lsu_bus_buffer.v +++ b/el2_lsu_bus_buffer.v @@ -1006,33 +1006,33 @@ module el2_lsu_bus_buffer( reg ibuf_nomerge; // @[Reg.scala 27:20] reg ibuf_unsign; // @[Reg.scala 27:20] reg [1:0] ibuf_sz; // @[Reg.scala 27:20] - wire _T_4455 = buf_write[3] & _T_2636; // @[el2_lsu_bus_buffer.scala 581:64] - wire _T_4456 = ~buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 581:91] - wire _T_4457 = _T_4455 & _T_4456; // @[el2_lsu_bus_buffer.scala 581:89] - wire _T_4450 = buf_write[2] & _T_2631; // @[el2_lsu_bus_buffer.scala 581:64] - wire _T_4451 = ~buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 581:91] - wire _T_4452 = _T_4450 & _T_4451; // @[el2_lsu_bus_buffer.scala 581:89] - wire [1:0] _T_4458 = _T_4457 + _T_4452; // @[el2_lsu_bus_buffer.scala 581:142] - wire _T_4445 = buf_write[1] & _T_2626; // @[el2_lsu_bus_buffer.scala 581:64] - wire _T_4446 = ~buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 581:91] - wire _T_4447 = _T_4445 & _T_4446; // @[el2_lsu_bus_buffer.scala 581:89] - wire [1:0] _GEN_362 = {{1'd0}, _T_4447}; // @[el2_lsu_bus_buffer.scala 581:142] - wire [2:0] _T_4459 = _T_4458 + _GEN_362; // @[el2_lsu_bus_buffer.scala 581:142] - wire _T_4440 = buf_write[0] & _T_2621; // @[el2_lsu_bus_buffer.scala 581:64] - wire _T_4441 = ~buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 581:91] - wire _T_4442 = _T_4440 & _T_4441; // @[el2_lsu_bus_buffer.scala 581:89] - wire [2:0] _GEN_363 = {{2'd0}, _T_4442}; // @[el2_lsu_bus_buffer.scala 581:142] - wire [3:0] buf_numvld_wrcmd_any = _T_4459 + _GEN_363; // @[el2_lsu_bus_buffer.scala 581:142] + wire _T_4464 = buf_write[3] & _T_2636; // @[el2_lsu_bus_buffer.scala 581:64] + wire _T_4465 = ~buf_cmd_state_bus_en_3; // @[el2_lsu_bus_buffer.scala 581:91] + wire _T_4466 = _T_4464 & _T_4465; // @[el2_lsu_bus_buffer.scala 581:89] + wire _T_4459 = buf_write[2] & _T_2631; // @[el2_lsu_bus_buffer.scala 581:64] + wire _T_4460 = ~buf_cmd_state_bus_en_2; // @[el2_lsu_bus_buffer.scala 581:91] + wire _T_4461 = _T_4459 & _T_4460; // @[el2_lsu_bus_buffer.scala 581:89] + wire [1:0] _T_4467 = _T_4466 + _T_4461; // @[el2_lsu_bus_buffer.scala 581:142] + wire _T_4454 = buf_write[1] & _T_2626; // @[el2_lsu_bus_buffer.scala 581:64] + wire _T_4455 = ~buf_cmd_state_bus_en_1; // @[el2_lsu_bus_buffer.scala 581:91] + wire _T_4456 = _T_4454 & _T_4455; // @[el2_lsu_bus_buffer.scala 581:89] + wire [1:0] _GEN_362 = {{1'd0}, _T_4456}; // @[el2_lsu_bus_buffer.scala 581:142] + wire [2:0] _T_4468 = _T_4467 + _GEN_362; // @[el2_lsu_bus_buffer.scala 581:142] + wire _T_4449 = buf_write[0] & _T_2621; // @[el2_lsu_bus_buffer.scala 581:64] + wire _T_4450 = ~buf_cmd_state_bus_en_0; // @[el2_lsu_bus_buffer.scala 581:91] + wire _T_4451 = _T_4449 & _T_4450; // @[el2_lsu_bus_buffer.scala 581:89] + wire [2:0] _GEN_363 = {{2'd0}, _T_4451}; // @[el2_lsu_bus_buffer.scala 581:142] + wire [3:0] buf_numvld_wrcmd_any = _T_4468 + _GEN_363; // @[el2_lsu_bus_buffer.scala 581:142] wire _T_1029 = buf_numvld_wrcmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 320:43] - wire _T_4472 = _T_2636 & _T_4456; // @[el2_lsu_bus_buffer.scala 582:73] - wire _T_4469 = _T_2631 & _T_4451; // @[el2_lsu_bus_buffer.scala 582:73] - wire [1:0] _T_4473 = _T_4472 + _T_4469; // @[el2_lsu_bus_buffer.scala 582:126] - wire _T_4466 = _T_2626 & _T_4446; // @[el2_lsu_bus_buffer.scala 582:73] - wire [1:0] _GEN_364 = {{1'd0}, _T_4466}; // @[el2_lsu_bus_buffer.scala 582:126] - wire [2:0] _T_4474 = _T_4473 + _GEN_364; // @[el2_lsu_bus_buffer.scala 582:126] - wire _T_4463 = _T_2621 & _T_4441; // @[el2_lsu_bus_buffer.scala 582:73] - wire [2:0] _GEN_365 = {{2'd0}, _T_4463}; // @[el2_lsu_bus_buffer.scala 582:126] - wire [3:0] buf_numvld_cmd_any = _T_4474 + _GEN_365; // @[el2_lsu_bus_buffer.scala 582:126] + wire _T_4481 = _T_2636 & _T_4465; // @[el2_lsu_bus_buffer.scala 582:73] + wire _T_4478 = _T_2631 & _T_4460; // @[el2_lsu_bus_buffer.scala 582:73] + wire [1:0] _T_4482 = _T_4481 + _T_4478; // @[el2_lsu_bus_buffer.scala 582:126] + wire _T_4475 = _T_2626 & _T_4455; // @[el2_lsu_bus_buffer.scala 582:73] + wire [1:0] _GEN_364 = {{1'd0}, _T_4475}; // @[el2_lsu_bus_buffer.scala 582:126] + wire [2:0] _T_4483 = _T_4482 + _GEN_364; // @[el2_lsu_bus_buffer.scala 582:126] + wire _T_4472 = _T_2621 & _T_4450; // @[el2_lsu_bus_buffer.scala 582:73] + wire [2:0] _GEN_365 = {{2'd0}, _T_4472}; // @[el2_lsu_bus_buffer.scala 582:126] + wire [3:0] buf_numvld_cmd_any = _T_4483 + _GEN_365; // @[el2_lsu_bus_buffer.scala 582:126] wire _T_1030 = buf_numvld_cmd_any == 4'h1; // @[el2_lsu_bus_buffer.scala 320:72] wire _T_1031 = _T_1029 & _T_1030; // @[el2_lsu_bus_buffer.scala 320:51] reg [2:0] obuf_wr_timer; // @[el2_lsu_bus_buffer.scala 419:54] @@ -1042,19 +1042,19 @@ module el2_lsu_bus_buffer( wire _T_1994 = |buf_age_3; // @[el2_lsu_bus_buffer.scala 436:58] wire _T_1995 = ~_T_1994; // @[el2_lsu_bus_buffer.scala 436:45] wire _T_1997 = _T_1995 & _T_2636; // @[el2_lsu_bus_buffer.scala 436:63] - wire _T_1999 = _T_1997 & _T_4456; // @[el2_lsu_bus_buffer.scala 436:88] + wire _T_1999 = _T_1997 & _T_4465; // @[el2_lsu_bus_buffer.scala 436:88] wire _T_1988 = |buf_age_2; // @[el2_lsu_bus_buffer.scala 436:58] wire _T_1989 = ~_T_1988; // @[el2_lsu_bus_buffer.scala 436:45] wire _T_1991 = _T_1989 & _T_2631; // @[el2_lsu_bus_buffer.scala 436:63] - wire _T_1993 = _T_1991 & _T_4451; // @[el2_lsu_bus_buffer.scala 436:88] + wire _T_1993 = _T_1991 & _T_4460; // @[el2_lsu_bus_buffer.scala 436:88] wire _T_1982 = |buf_age_1; // @[el2_lsu_bus_buffer.scala 436:58] wire _T_1983 = ~_T_1982; // @[el2_lsu_bus_buffer.scala 436:45] wire _T_1985 = _T_1983 & _T_2626; // @[el2_lsu_bus_buffer.scala 436:63] - wire _T_1987 = _T_1985 & _T_4446; // @[el2_lsu_bus_buffer.scala 436:88] + wire _T_1987 = _T_1985 & _T_4455; // @[el2_lsu_bus_buffer.scala 436:88] wire _T_1976 = |buf_age_0; // @[el2_lsu_bus_buffer.scala 436:58] wire _T_1977 = ~_T_1976; // @[el2_lsu_bus_buffer.scala 436:45] wire _T_1979 = _T_1977 & _T_2621; // @[el2_lsu_bus_buffer.scala 436:63] - wire _T_1981 = _T_1979 & _T_4441; // @[el2_lsu_bus_buffer.scala 436:88] + wire _T_1981 = _T_1979 & _T_4450; // @[el2_lsu_bus_buffer.scala 436:88] wire [3:0] CmdPtr0Dec = {_T_1999,_T_1993,_T_1987,_T_1981}; // @[Cat.scala 29:58] wire [7:0] _T_2069 = {4'h0,_T_1999,_T_1993,_T_1987,_T_1981}; // @[Cat.scala 29:58] wire _T_2072 = _T_2069[4] | _T_2069[5]; // @[el2_lsu_bus_buffer.scala 444:42] @@ -1116,40 +1116,40 @@ module el2_lsu_bus_buffer( wire _T_1070 = obuf_wr_timer < 3'h7; // @[el2_lsu_bus_buffer.scala 323:95] wire _T_1071 = _T_1069 & _T_1070; // @[el2_lsu_bus_buffer.scala 323:79] wire [2:0] _T_1073 = obuf_wr_timer + 3'h1; // @[el2_lsu_bus_buffer.scala 323:121] - wire _T_4491 = buf_state_3 == 3'h1; // @[el2_lsu_bus_buffer.scala 583:63] - wire _T_4495 = _T_4491 | _T_4472; // @[el2_lsu_bus_buffer.scala 583:74] - wire _T_4486 = buf_state_2 == 3'h1; // @[el2_lsu_bus_buffer.scala 583:63] - wire _T_4490 = _T_4486 | _T_4469; // @[el2_lsu_bus_buffer.scala 583:74] - wire [1:0] _T_4496 = _T_4495 + _T_4490; // @[el2_lsu_bus_buffer.scala 583:154] - wire _T_4481 = buf_state_1 == 3'h1; // @[el2_lsu_bus_buffer.scala 583:63] - wire _T_4485 = _T_4481 | _T_4466; // @[el2_lsu_bus_buffer.scala 583:74] - wire [1:0] _GEN_366 = {{1'd0}, _T_4485}; // @[el2_lsu_bus_buffer.scala 583:154] - wire [2:0] _T_4497 = _T_4496 + _GEN_366; // @[el2_lsu_bus_buffer.scala 583:154] - wire _T_4476 = buf_state_0 == 3'h1; // @[el2_lsu_bus_buffer.scala 583:63] - wire _T_4480 = _T_4476 | _T_4463; // @[el2_lsu_bus_buffer.scala 583:74] - wire [2:0] _GEN_367 = {{2'd0}, _T_4480}; // @[el2_lsu_bus_buffer.scala 583:154] - wire [3:0] buf_numvld_pend_any = _T_4497 + _GEN_367; // @[el2_lsu_bus_buffer.scala 583:154] + wire _T_4500 = buf_state_3 == 3'h1; // @[el2_lsu_bus_buffer.scala 583:63] + wire _T_4504 = _T_4500 | _T_4481; // @[el2_lsu_bus_buffer.scala 583:74] + wire _T_4495 = buf_state_2 == 3'h1; // @[el2_lsu_bus_buffer.scala 583:63] + wire _T_4499 = _T_4495 | _T_4478; // @[el2_lsu_bus_buffer.scala 583:74] + wire [1:0] _T_4505 = _T_4504 + _T_4499; // @[el2_lsu_bus_buffer.scala 583:154] + wire _T_4490 = buf_state_1 == 3'h1; // @[el2_lsu_bus_buffer.scala 583:63] + wire _T_4494 = _T_4490 | _T_4475; // @[el2_lsu_bus_buffer.scala 583:74] + wire [1:0] _GEN_366 = {{1'd0}, _T_4494}; // @[el2_lsu_bus_buffer.scala 583:154] + wire [2:0] _T_4506 = _T_4505 + _GEN_366; // @[el2_lsu_bus_buffer.scala 583:154] + wire _T_4485 = buf_state_0 == 3'h1; // @[el2_lsu_bus_buffer.scala 583:63] + wire _T_4489 = _T_4485 | _T_4472; // @[el2_lsu_bus_buffer.scala 583:74] + wire [2:0] _GEN_367 = {{2'd0}, _T_4489}; // @[el2_lsu_bus_buffer.scala 583:154] + wire [3:0] buf_numvld_pend_any = _T_4506 + _GEN_367; // @[el2_lsu_bus_buffer.scala 583:154] wire _T_1100 = buf_numvld_pend_any == 4'h0; // @[el2_lsu_bus_buffer.scala 326:53] wire _T_1101 = ibuf_byp & _T_1100; // @[el2_lsu_bus_buffer.scala 326:31] wire _T_1102 = ~io_lsu_pkt_r_store; // @[el2_lsu_bus_buffer.scala 326:64] wire _T_1103 = _T_1102 | io_no_dword_merge_r; // @[el2_lsu_bus_buffer.scala 326:84] wire ibuf_buf_byp = _T_1101 & _T_1103; // @[el2_lsu_bus_buffer.scala 326:61] wire _T_1104 = ibuf_buf_byp & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 341:32] - wire _T_4787 = buf_state_0 == 3'h3; // @[el2_lsu_bus_buffer.scala 612:62] - wire _T_4789 = _T_4787 & buf_sideeffect[0]; // @[el2_lsu_bus_buffer.scala 612:73] - wire _T_4790 = _T_4789 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 612:93] - wire _T_4791 = buf_state_1 == 3'h3; // @[el2_lsu_bus_buffer.scala 612:62] - wire _T_4793 = _T_4791 & buf_sideeffect[1]; // @[el2_lsu_bus_buffer.scala 612:73] - wire _T_4794 = _T_4793 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 612:93] - wire _T_4803 = _T_4790 | _T_4794; // @[el2_lsu_bus_buffer.scala 612:141] - wire _T_4795 = buf_state_2 == 3'h3; // @[el2_lsu_bus_buffer.scala 612:62] - wire _T_4797 = _T_4795 & buf_sideeffect[2]; // @[el2_lsu_bus_buffer.scala 612:73] - wire _T_4798 = _T_4797 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 612:93] - wire _T_4804 = _T_4803 | _T_4798; // @[el2_lsu_bus_buffer.scala 612:141] - wire _T_4799 = buf_state_3 == 3'h3; // @[el2_lsu_bus_buffer.scala 612:62] - wire _T_4801 = _T_4799 & buf_sideeffect[3]; // @[el2_lsu_bus_buffer.scala 612:73] - wire _T_4802 = _T_4801 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 612:93] - wire bus_sideeffect_pend = _T_4804 | _T_4802; // @[el2_lsu_bus_buffer.scala 612:141] + wire _T_4796 = buf_state_0 == 3'h3; // @[el2_lsu_bus_buffer.scala 612:62] + wire _T_4798 = _T_4796 & buf_sideeffect[0]; // @[el2_lsu_bus_buffer.scala 612:73] + wire _T_4799 = _T_4798 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 612:93] + wire _T_4800 = buf_state_1 == 3'h3; // @[el2_lsu_bus_buffer.scala 612:62] + wire _T_4802 = _T_4800 & buf_sideeffect[1]; // @[el2_lsu_bus_buffer.scala 612:73] + wire _T_4803 = _T_4802 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 612:93] + wire _T_4812 = _T_4799 | _T_4803; // @[el2_lsu_bus_buffer.scala 612:141] + wire _T_4804 = buf_state_2 == 3'h3; // @[el2_lsu_bus_buffer.scala 612:62] + wire _T_4806 = _T_4804 & buf_sideeffect[2]; // @[el2_lsu_bus_buffer.scala 612:73] + wire _T_4807 = _T_4806 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 612:93] + wire _T_4813 = _T_4812 | _T_4807; // @[el2_lsu_bus_buffer.scala 612:141] + wire _T_4808 = buf_state_3 == 3'h3; // @[el2_lsu_bus_buffer.scala 612:62] + wire _T_4810 = _T_4808 & buf_sideeffect[3]; // @[el2_lsu_bus_buffer.scala 612:73] + wire _T_4811 = _T_4810 & io_dec_tlu_sideeffect_posted_disable; // @[el2_lsu_bus_buffer.scala 612:93] + wire bus_sideeffect_pend = _T_4813 | _T_4811; // @[el2_lsu_bus_buffer.scala 612:141] wire _T_1105 = io_is_sideeffects_r & bus_sideeffect_pend; // @[el2_lsu_bus_buffer.scala 341:74] wire _T_1106 = ~_T_1105; // @[el2_lsu_bus_buffer.scala 341:52] wire _T_1107 = _T_1104 & _T_1106; // @[el2_lsu_bus_buffer.scala 341:50] @@ -1218,28 +1218,28 @@ module el2_lsu_bus_buffer( wire _T_2040 = ~CmdPtr0Dec[3]; // @[el2_lsu_bus_buffer.scala 437:83] wire _T_2041 = _T_2038 & _T_2040; // @[el2_lsu_bus_buffer.scala 437:81] wire _T_2043 = _T_2041 & _T_2636; // @[el2_lsu_bus_buffer.scala 437:98] - wire _T_2045 = _T_2043 & _T_4456; // @[el2_lsu_bus_buffer.scala 437:123] + wire _T_2045 = _T_2043 & _T_4465; // @[el2_lsu_bus_buffer.scala 437:123] wire [3:0] _T_2025 = buf_age_2 & _T_2035; // @[el2_lsu_bus_buffer.scala 437:59] wire _T_2026 = |_T_2025; // @[el2_lsu_bus_buffer.scala 437:76] wire _T_2027 = ~_T_2026; // @[el2_lsu_bus_buffer.scala 437:45] wire _T_2029 = ~CmdPtr0Dec[2]; // @[el2_lsu_bus_buffer.scala 437:83] wire _T_2030 = _T_2027 & _T_2029; // @[el2_lsu_bus_buffer.scala 437:81] wire _T_2032 = _T_2030 & _T_2631; // @[el2_lsu_bus_buffer.scala 437:98] - wire _T_2034 = _T_2032 & _T_4451; // @[el2_lsu_bus_buffer.scala 437:123] + wire _T_2034 = _T_2032 & _T_4460; // @[el2_lsu_bus_buffer.scala 437:123] wire [3:0] _T_2014 = buf_age_1 & _T_2035; // @[el2_lsu_bus_buffer.scala 437:59] wire _T_2015 = |_T_2014; // @[el2_lsu_bus_buffer.scala 437:76] wire _T_2016 = ~_T_2015; // @[el2_lsu_bus_buffer.scala 437:45] wire _T_2018 = ~CmdPtr0Dec[1]; // @[el2_lsu_bus_buffer.scala 437:83] wire _T_2019 = _T_2016 & _T_2018; // @[el2_lsu_bus_buffer.scala 437:81] wire _T_2021 = _T_2019 & _T_2626; // @[el2_lsu_bus_buffer.scala 437:98] - wire _T_2023 = _T_2021 & _T_4446; // @[el2_lsu_bus_buffer.scala 437:123] + wire _T_2023 = _T_2021 & _T_4455; // @[el2_lsu_bus_buffer.scala 437:123] wire [3:0] _T_2003 = buf_age_0 & _T_2035; // @[el2_lsu_bus_buffer.scala 437:59] wire _T_2004 = |_T_2003; // @[el2_lsu_bus_buffer.scala 437:76] wire _T_2005 = ~_T_2004; // @[el2_lsu_bus_buffer.scala 437:45] wire _T_2007 = ~CmdPtr0Dec[0]; // @[el2_lsu_bus_buffer.scala 437:83] wire _T_2008 = _T_2005 & _T_2007; // @[el2_lsu_bus_buffer.scala 437:81] wire _T_2010 = _T_2008 & _T_2621; // @[el2_lsu_bus_buffer.scala 437:98] - wire _T_2012 = _T_2010 & _T_4441; // @[el2_lsu_bus_buffer.scala 437:123] + wire _T_2012 = _T_2010 & _T_4450; // @[el2_lsu_bus_buffer.scala 437:123] wire [3:0] CmdPtr1Dec = {_T_2045,_T_2034,_T_2023,_T_2012}; // @[Cat.scala 29:58] wire found_cmdptr1 = |CmdPtr1Dec; // @[el2_lsu_bus_buffer.scala 442:31] wire _T_1220 = _T_1219 | found_cmdptr1; // @[el2_lsu_bus_buffer.scala 344:181] @@ -1258,10 +1258,10 @@ module el2_lsu_bus_buffer( reg obuf_write; // @[Reg.scala 27:20] reg obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 406:54] reg obuf_data_done; // @[el2_lsu_bus_buffer.scala 407:55] - wire _T_4862 = obuf_cmd_done | obuf_data_done; // @[el2_lsu_bus_buffer.scala 616:54] - wire _T_4863 = obuf_cmd_done ? io_lsu_axi_wready : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 616:75] - wire _T_4865 = _T_4862 ? _T_4863 : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 616:39] - wire bus_cmd_ready = obuf_write ? _T_4865 : io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 616:23] + wire _T_4871 = obuf_cmd_done | obuf_data_done; // @[el2_lsu_bus_buffer.scala 616:54] + wire _T_4872 = obuf_cmd_done ? io_lsu_axi_wready : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 616:75] + wire _T_4874 = _T_4871 ? _T_4872 : io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 616:39] + wire bus_cmd_ready = obuf_write ? _T_4874 : io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 616:23] wire _T_1244 = ~obuf_valid; // @[el2_lsu_bus_buffer.scala 345:48] wire _T_1245 = bus_cmd_ready | _T_1244; // @[el2_lsu_bus_buffer.scala 345:46] reg obuf_nosend; // @[Reg.scala 27:20] @@ -1270,52 +1270,52 @@ module el2_lsu_bus_buffer( wire _T_1248 = ~obuf_wr_wait; // @[el2_lsu_bus_buffer.scala 345:77] wire _T_1249 = _T_1247 & _T_1248; // @[el2_lsu_bus_buffer.scala 345:75] reg [31:0] obuf_addr; // @[el2_lib.scala 491:16] - wire _T_4810 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[el2_lsu_bus_buffer.scala 614:56] - wire _T_4811 = obuf_valid & _T_4810; // @[el2_lsu_bus_buffer.scala 614:38] - wire _T_4813 = obuf_tag1 == 2'h0; // @[el2_lsu_bus_buffer.scala 614:126] - wire _T_4814 = obuf_merge & _T_4813; // @[el2_lsu_bus_buffer.scala 614:114] - wire _T_4815 = _T_3577 | _T_4814; // @[el2_lsu_bus_buffer.scala 614:100] - wire _T_4816 = ~_T_4815; // @[el2_lsu_bus_buffer.scala 614:80] - wire _T_4817 = _T_4811 & _T_4816; // @[el2_lsu_bus_buffer.scala 614:78] - wire _T_4854 = _T_4787 & _T_4817; // @[Mux.scala 27:72] - wire _T_4822 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[el2_lsu_bus_buffer.scala 614:56] - wire _T_4823 = obuf_valid & _T_4822; // @[el2_lsu_bus_buffer.scala 614:38] - wire _T_4825 = obuf_tag1 == 2'h1; // @[el2_lsu_bus_buffer.scala 614:126] - wire _T_4826 = obuf_merge & _T_4825; // @[el2_lsu_bus_buffer.scala 614:114] - wire _T_4827 = _T_3770 | _T_4826; // @[el2_lsu_bus_buffer.scala 614:100] - wire _T_4828 = ~_T_4827; // @[el2_lsu_bus_buffer.scala 614:80] - wire _T_4829 = _T_4823 & _T_4828; // @[el2_lsu_bus_buffer.scala 614:78] - wire _T_4855 = _T_4791 & _T_4829; // @[Mux.scala 27:72] - wire _T_4858 = _T_4854 | _T_4855; // @[Mux.scala 27:72] - wire _T_4834 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[el2_lsu_bus_buffer.scala 614:56] - wire _T_4835 = obuf_valid & _T_4834; // @[el2_lsu_bus_buffer.scala 614:38] - wire _T_4837 = obuf_tag1 == 2'h2; // @[el2_lsu_bus_buffer.scala 614:126] - wire _T_4838 = obuf_merge & _T_4837; // @[el2_lsu_bus_buffer.scala 614:114] - wire _T_4839 = _T_3963 | _T_4838; // @[el2_lsu_bus_buffer.scala 614:100] - wire _T_4840 = ~_T_4839; // @[el2_lsu_bus_buffer.scala 614:80] - wire _T_4841 = _T_4835 & _T_4840; // @[el2_lsu_bus_buffer.scala 614:78] - wire _T_4856 = _T_4795 & _T_4841; // @[Mux.scala 27:72] - wire _T_4859 = _T_4858 | _T_4856; // @[Mux.scala 27:72] - wire _T_4846 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[el2_lsu_bus_buffer.scala 614:56] - wire _T_4847 = obuf_valid & _T_4846; // @[el2_lsu_bus_buffer.scala 614:38] - wire _T_4849 = obuf_tag1 == 2'h3; // @[el2_lsu_bus_buffer.scala 614:126] - wire _T_4850 = obuf_merge & _T_4849; // @[el2_lsu_bus_buffer.scala 614:114] - wire _T_4851 = _T_4156 | _T_4850; // @[el2_lsu_bus_buffer.scala 614:100] - wire _T_4852 = ~_T_4851; // @[el2_lsu_bus_buffer.scala 614:80] - wire _T_4853 = _T_4847 & _T_4852; // @[el2_lsu_bus_buffer.scala 614:78] - wire _T_4857 = _T_4799 & _T_4853; // @[Mux.scala 27:72] - wire bus_addr_match_pending = _T_4859 | _T_4857; // @[Mux.scala 27:72] + wire _T_4819 = obuf_addr[31:3] == buf_addr_0[31:3]; // @[el2_lsu_bus_buffer.scala 614:56] + wire _T_4820 = obuf_valid & _T_4819; // @[el2_lsu_bus_buffer.scala 614:38] + wire _T_4822 = obuf_tag1 == 2'h0; // @[el2_lsu_bus_buffer.scala 614:126] + wire _T_4823 = obuf_merge & _T_4822; // @[el2_lsu_bus_buffer.scala 614:114] + wire _T_4824 = _T_3577 | _T_4823; // @[el2_lsu_bus_buffer.scala 614:100] + wire _T_4825 = ~_T_4824; // @[el2_lsu_bus_buffer.scala 614:80] + wire _T_4826 = _T_4820 & _T_4825; // @[el2_lsu_bus_buffer.scala 614:78] + wire _T_4863 = _T_4796 & _T_4826; // @[Mux.scala 27:72] + wire _T_4831 = obuf_addr[31:3] == buf_addr_1[31:3]; // @[el2_lsu_bus_buffer.scala 614:56] + wire _T_4832 = obuf_valid & _T_4831; // @[el2_lsu_bus_buffer.scala 614:38] + wire _T_4834 = obuf_tag1 == 2'h1; // @[el2_lsu_bus_buffer.scala 614:126] + wire _T_4835 = obuf_merge & _T_4834; // @[el2_lsu_bus_buffer.scala 614:114] + wire _T_4836 = _T_3770 | _T_4835; // @[el2_lsu_bus_buffer.scala 614:100] + wire _T_4837 = ~_T_4836; // @[el2_lsu_bus_buffer.scala 614:80] + wire _T_4838 = _T_4832 & _T_4837; // @[el2_lsu_bus_buffer.scala 614:78] + wire _T_4864 = _T_4800 & _T_4838; // @[Mux.scala 27:72] + wire _T_4867 = _T_4863 | _T_4864; // @[Mux.scala 27:72] + wire _T_4843 = obuf_addr[31:3] == buf_addr_2[31:3]; // @[el2_lsu_bus_buffer.scala 614:56] + wire _T_4844 = obuf_valid & _T_4843; // @[el2_lsu_bus_buffer.scala 614:38] + wire _T_4846 = obuf_tag1 == 2'h2; // @[el2_lsu_bus_buffer.scala 614:126] + wire _T_4847 = obuf_merge & _T_4846; // @[el2_lsu_bus_buffer.scala 614:114] + wire _T_4848 = _T_3963 | _T_4847; // @[el2_lsu_bus_buffer.scala 614:100] + wire _T_4849 = ~_T_4848; // @[el2_lsu_bus_buffer.scala 614:80] + wire _T_4850 = _T_4844 & _T_4849; // @[el2_lsu_bus_buffer.scala 614:78] + wire _T_4865 = _T_4804 & _T_4850; // @[Mux.scala 27:72] + wire _T_4868 = _T_4867 | _T_4865; // @[Mux.scala 27:72] + wire _T_4855 = obuf_addr[31:3] == buf_addr_3[31:3]; // @[el2_lsu_bus_buffer.scala 614:56] + wire _T_4856 = obuf_valid & _T_4855; // @[el2_lsu_bus_buffer.scala 614:38] + wire _T_4858 = obuf_tag1 == 2'h3; // @[el2_lsu_bus_buffer.scala 614:126] + wire _T_4859 = obuf_merge & _T_4858; // @[el2_lsu_bus_buffer.scala 614:114] + wire _T_4860 = _T_4156 | _T_4859; // @[el2_lsu_bus_buffer.scala 614:100] + wire _T_4861 = ~_T_4860; // @[el2_lsu_bus_buffer.scala 614:80] + wire _T_4862 = _T_4856 & _T_4861; // @[el2_lsu_bus_buffer.scala 614:78] + wire _T_4866 = _T_4808 & _T_4862; // @[Mux.scala 27:72] + wire bus_addr_match_pending = _T_4868 | _T_4866; // @[Mux.scala 27:72] wire _T_1252 = ~bus_addr_match_pending; // @[el2_lsu_bus_buffer.scala 345:118] wire _T_1253 = _T_1249 & _T_1252; // @[el2_lsu_bus_buffer.scala 345:116] wire obuf_wr_en = _T_1253 & io_lsu_bus_clk_en; // @[el2_lsu_bus_buffer.scala 345:142] wire _T_1255 = obuf_valid & obuf_nosend; // @[el2_lsu_bus_buffer.scala 347:47] wire bus_wcmd_sent = io_lsu_axi_awvalid & io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 617:39] - wire _T_4869 = obuf_cmd_done | bus_wcmd_sent; // @[el2_lsu_bus_buffer.scala 619:35] + wire _T_4878 = obuf_cmd_done | bus_wcmd_sent; // @[el2_lsu_bus_buffer.scala 619:35] wire bus_wdata_sent = io_lsu_axi_wvalid & io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 618:39] - wire _T_4870 = obuf_data_done | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 619:70] - wire _T_4871 = _T_4869 & _T_4870; // @[el2_lsu_bus_buffer.scala 619:52] - wire _T_4872 = io_lsu_axi_arvalid & io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 619:111] - wire bus_cmd_sent = _T_4871 | _T_4872; // @[el2_lsu_bus_buffer.scala 619:89] + wire _T_4879 = obuf_data_done | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 619:70] + wire _T_4880 = _T_4878 & _T_4879; // @[el2_lsu_bus_buffer.scala 619:52] + wire _T_4881 = io_lsu_axi_arvalid & io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 619:111] + wire bus_cmd_sent = _T_4880 | _T_4881; // @[el2_lsu_bus_buffer.scala 619:89] wire _T_1256 = bus_cmd_sent | _T_1255; // @[el2_lsu_bus_buffer.scala 347:33] wire _T_1257 = ~obuf_wr_en; // @[el2_lsu_bus_buffer.scala 347:65] wire _T_1258 = _T_1256 & _T_1257; // @[el2_lsu_bus_buffer.scala 347:63] @@ -1694,7 +1694,7 @@ module el2_lsu_bus_buffer( wire _T_2152 = _T_2150 & _T_3547; // @[el2_lsu_bus_buffer.scala 467:41] wire _T_2154 = _T_2152 & _T_1869; // @[el2_lsu_bus_buffer.scala 467:71] wire _T_2156 = _T_2154 & _T_1867; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2157 = _T_4480 | _T_2156; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2157 = _T_4489 | _T_2156; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2158 = ibuf_byp & io_lsu_busreq_r; // @[el2_lsu_bus_buffer.scala 468:17] wire _T_2159 = _T_2158 & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 468:35] wire _T_2161 = _T_2159 & _T_1870; // @[el2_lsu_bus_buffer.scala 468:52] @@ -1703,19 +1703,19 @@ module el2_lsu_bus_buffer( wire _T_2165 = _T_2144 & _T_2164; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2167 = _T_2165 | buf_age_0[0]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2181 = _T_2154 & _T_1878; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2182 = _T_4485 | _T_2181; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2182 = _T_4494 | _T_2181; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2188 = _T_2161 & _T_1880; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2189 = _T_2182 | _T_2188; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2190 = _T_2144 & _T_2189; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2192 = _T_2190 | buf_age_0[1]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2206 = _T_2154 & _T_1889; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2207 = _T_4490 | _T_2206; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2207 = _T_4499 | _T_2206; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2213 = _T_2161 & _T_1891; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2214 = _T_2207 | _T_2213; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2215 = _T_2144 & _T_2214; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2217 = _T_2215 | buf_age_0[2]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2231 = _T_2154 & _T_1900; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2232 = _T_4495 | _T_2231; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2232 = _T_4504 | _T_2231; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2238 = _T_2161 & _T_1902; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2239 = _T_2232 | _T_2238; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2240 = _T_2144 & _T_2239; // @[el2_lsu_bus_buffer.scala 465:113] @@ -1786,26 +1786,26 @@ module el2_lsu_bus_buffer( wire _T_2246 = _T_1877 & buf_state_en_1; // @[el2_lsu_bus_buffer.scala 465:94] wire _T_2256 = _T_2152 & _T_1880; // @[el2_lsu_bus_buffer.scala 467:71] wire _T_2258 = _T_2256 & _T_1867; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2259 = _T_4480 | _T_2258; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2259 = _T_4489 | _T_2258; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2263 = _T_2159 & _T_1881; // @[el2_lsu_bus_buffer.scala 468:52] wire _T_2265 = _T_2263 & _T_1869; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2266 = _T_2259 | _T_2265; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2267 = _T_2246 & _T_2266; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2269 = _T_2267 | buf_age_1[0]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2283 = _T_2256 & _T_1878; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2284 = _T_4485 | _T_2283; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2284 = _T_4494 | _T_2283; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2290 = _T_2263 & _T_1880; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2291 = _T_2284 | _T_2290; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2292 = _T_2246 & _T_2291; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2294 = _T_2292 | buf_age_1[1]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2308 = _T_2256 & _T_1889; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2309 = _T_4490 | _T_2308; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2309 = _T_4499 | _T_2308; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2315 = _T_2263 & _T_1891; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2316 = _T_2309 | _T_2315; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2317 = _T_2246 & _T_2316; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2319 = _T_2317 | buf_age_1[2]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2333 = _T_2256 & _T_1900; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2334 = _T_4495 | _T_2333; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2334 = _T_4504 | _T_2333; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2340 = _T_2263 & _T_1902; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2341 = _T_2334 | _T_2340; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2342 = _T_2246 & _T_2341; // @[el2_lsu_bus_buffer.scala 465:113] @@ -1876,26 +1876,26 @@ module el2_lsu_bus_buffer( wire _T_2348 = _T_1888 & buf_state_en_2; // @[el2_lsu_bus_buffer.scala 465:94] wire _T_2358 = _T_2152 & _T_1891; // @[el2_lsu_bus_buffer.scala 467:71] wire _T_2360 = _T_2358 & _T_1867; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2361 = _T_4480 | _T_2360; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2361 = _T_4489 | _T_2360; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2365 = _T_2159 & _T_1892; // @[el2_lsu_bus_buffer.scala 468:52] wire _T_2367 = _T_2365 & _T_1869; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2368 = _T_2361 | _T_2367; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2369 = _T_2348 & _T_2368; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2371 = _T_2369 | buf_age_2[0]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2385 = _T_2358 & _T_1878; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2386 = _T_4485 | _T_2385; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2386 = _T_4494 | _T_2385; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2392 = _T_2365 & _T_1880; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2393 = _T_2386 | _T_2392; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2394 = _T_2348 & _T_2393; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2396 = _T_2394 | buf_age_2[1]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2410 = _T_2358 & _T_1889; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2411 = _T_4490 | _T_2410; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2411 = _T_4499 | _T_2410; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2417 = _T_2365 & _T_1891; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2418 = _T_2411 | _T_2417; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2419 = _T_2348 & _T_2418; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2421 = _T_2419 | buf_age_2[2]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2435 = _T_2358 & _T_1900; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2436 = _T_4495 | _T_2435; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2436 = _T_4504 | _T_2435; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2442 = _T_2365 & _T_1902; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2443 = _T_2436 | _T_2442; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2444 = _T_2348 & _T_2443; // @[el2_lsu_bus_buffer.scala 465:113] @@ -1966,26 +1966,26 @@ module el2_lsu_bus_buffer( wire _T_2450 = _T_1899 & buf_state_en_3; // @[el2_lsu_bus_buffer.scala 465:94] wire _T_2460 = _T_2152 & _T_1902; // @[el2_lsu_bus_buffer.scala 467:71] wire _T_2462 = _T_2460 & _T_1867; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2463 = _T_4480 | _T_2462; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2463 = _T_4489 | _T_2462; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2467 = _T_2159 & _T_1903; // @[el2_lsu_bus_buffer.scala 468:52] wire _T_2469 = _T_2467 & _T_1869; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2470 = _T_2463 | _T_2469; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2471 = _T_2450 & _T_2470; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2473 = _T_2471 | buf_age_3[0]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2487 = _T_2460 & _T_1878; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2488 = _T_4485 | _T_2487; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2488 = _T_4494 | _T_2487; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2494 = _T_2467 & _T_1880; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2495 = _T_2488 | _T_2494; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2496 = _T_2450 & _T_2495; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2498 = _T_2496 | buf_age_3[1]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2512 = _T_2460 & _T_1889; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2513 = _T_4490 | _T_2512; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2513 = _T_4499 | _T_2512; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2519 = _T_2467 & _T_1891; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2520 = _T_2513 | _T_2519; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2521 = _T_2450 & _T_2520; // @[el2_lsu_bus_buffer.scala 465:113] wire _T_2523 = _T_2521 | buf_age_3[2]; // @[el2_lsu_bus_buffer.scala 468:97] wire _T_2537 = _T_2460 & _T_1900; // @[el2_lsu_bus_buffer.scala 467:92] - wire _T_2538 = _T_4495 | _T_2537; // @[el2_lsu_bus_buffer.scala 466:86] + wire _T_2538 = _T_4504 | _T_2537; // @[el2_lsu_bus_buffer.scala 466:86] wire _T_2544 = _T_2467 & _T_1902; // @[el2_lsu_bus_buffer.scala 468:73] wire _T_2545 = _T_2538 | _T_2544; // @[el2_lsu_bus_buffer.scala 467:114] wire _T_2546 = _T_2450 & _T_2545; // @[el2_lsu_bus_buffer.scala 465:113] @@ -2155,14 +2155,14 @@ module el2_lsu_bus_buffer( wire _T_3590 = _T_3588 & _T_1346; // @[el2_lsu_bus_buffer.scala 518:74] wire _T_3593 = _T_3583 & obuf_nosend; // @[el2_lsu_bus_buffer.scala 520:67] wire _T_3594 = _T_3593 & bus_rsp_read; // @[el2_lsu_bus_buffer.scala 520:81] - wire _T_4878 = io_lsu_axi_bresp != 2'h0; // @[el2_lsu_bus_buffer.scala 625:58] - wire bus_rsp_read_error = bus_rsp_read & _T_4878; // @[el2_lsu_bus_buffer.scala 625:38] + wire _T_4887 = io_lsu_axi_bresp != 2'h0; // @[el2_lsu_bus_buffer.scala 625:58] + wire bus_rsp_read_error = bus_rsp_read & _T_4887; // @[el2_lsu_bus_buffer.scala 625:38] wire _T_3597 = _T_3593 & bus_rsp_read_error; // @[el2_lsu_bus_buffer.scala 521:82] wire _T_3672 = bus_rsp_read_error & _T_3651; // @[el2_lsu_bus_buffer.scala 535:91] wire _T_3674 = bus_rsp_read_error & buf_ldfwd[0]; // @[el2_lsu_bus_buffer.scala 536:31] wire _T_3676 = _T_3674 & _T_3653; // @[el2_lsu_bus_buffer.scala 536:46] wire _T_3677 = _T_3672 | _T_3676; // @[el2_lsu_bus_buffer.scala 535:143] - wire bus_rsp_write_error = bus_rsp_write & _T_4878; // @[el2_lsu_bus_buffer.scala 624:40] + wire bus_rsp_write_error = bus_rsp_write & _T_4887; // @[el2_lsu_bus_buffer.scala 624:40] wire _T_3680 = bus_rsp_write_error & _T_3649; // @[el2_lsu_bus_buffer.scala 537:53] wire _T_3681 = _T_3677 | _T_3680; // @[el2_lsu_bus_buffer.scala 536:88] wire _T_3682 = _T_3583 & _T_3681; // @[el2_lsu_bus_buffer.scala 535:68] @@ -2181,9 +2181,9 @@ module el2_lsu_bus_buffer( wire [2:0] _GEN_21 = 2'h3 == buf_dualtag_0 ? buf_state_3 : _GEN_20; // @[el2_lsu_bus_buffer.scala 526:90] wire _T_3616 = _GEN_21 != 3'h4; // @[el2_lsu_bus_buffer.scala 526:90] wire _T_3617 = _T_3615 & _T_3616; // @[el2_lsu_bus_buffer.scala 526:61] - wire _T_4503 = _T_2761 | _T_2758; // @[el2_lsu_bus_buffer.scala 584:93] - wire _T_4504 = _T_4503 | _T_2755; // @[el2_lsu_bus_buffer.scala 584:93] - wire any_done_wait_state = _T_4504 | _T_2752; // @[el2_lsu_bus_buffer.scala 584:93] + wire _T_4512 = _T_2761 | _T_2758; // @[el2_lsu_bus_buffer.scala 584:93] + wire _T_4513 = _T_4512 | _T_2755; // @[el2_lsu_bus_buffer.scala 584:93] + wire any_done_wait_state = _T_4513 | _T_2752; // @[el2_lsu_bus_buffer.scala 584:93] wire _T_3619 = buf_ldfwd[0] | any_done_wait_state; // @[el2_lsu_bus_buffer.scala 527:31] wire _T_3625 = buf_dualtag_0 == 2'h0; // @[el2_lsu_bus_buffer.scala 119:118] wire _T_3627 = buf_dualtag_0 == 2'h1; // @[el2_lsu_bus_buffer.scala 119:118] @@ -2449,188 +2449,194 @@ module el2_lsu_bus_buffer( wire _T_4424 = ~buf_rst_3; // @[el2_lsu_bus_buffer.scala 577:128] wire [2:0] _T_4431 = {buf_data_en_3,buf_data_en_2,buf_data_en_1}; // @[Cat.scala 29:58] wire [1:0] _T_4433 = {io_lsu_busreq_m,1'h0}; // @[Cat.scala 29:58] - wire [1:0] _T_4434 = io_ldst_dual_m ? _T_4433 : {{1'd0}, io_lsu_busreq_m}; // @[el2_lsu_bus_buffer.scala 580:27] + wire [1:0] _T_4434 = io_ldst_dual_m ? _T_4433 : {{1'd0}, io_lsu_busreq_m}; // @[el2_lsu_bus_buffer.scala 580:28] wire [1:0] _T_4435 = {io_lsu_busreq_r,1'h0}; // @[Cat.scala 29:58] - wire [1:0] _T_4436 = io_ldst_dual_r ? _T_4435 : {{1'd0}, io_lsu_busreq_r}; // @[el2_lsu_bus_buffer.scala 580:93] - wire [2:0] _T_4437 = _T_4434 + _T_4436; // @[el2_lsu_bus_buffer.scala 580:87] - wire [2:0] _GEN_388 = {{2'd0}, ibuf_valid}; // @[el2_lsu_bus_buffer.scala 580:153] - wire [3:0] buf_numvld_any = _T_4437 + _GEN_388; // @[el2_lsu_bus_buffer.scala 580:153] - wire _T_4507 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_buffer.scala 586:52] - wire _T_4508 = buf_numvld_any >= 4'h3; // @[el2_lsu_bus_buffer.scala 586:92] - wire _T_4509 = buf_numvld_any == 4'h3; // @[el2_lsu_bus_buffer.scala 586:119] - wire _T_4511 = |buf_state_0; // @[el2_lsu_bus_buffer.scala 587:52] - wire _T_4512 = |buf_state_1; // @[el2_lsu_bus_buffer.scala 587:52] - wire _T_4513 = |buf_state_2; // @[el2_lsu_bus_buffer.scala 587:52] - wire _T_4514 = |buf_state_3; // @[el2_lsu_bus_buffer.scala 587:52] - wire _T_4515 = _T_4511 | _T_4512; // @[el2_lsu_bus_buffer.scala 587:65] - wire _T_4516 = _T_4515 | _T_4513; // @[el2_lsu_bus_buffer.scala 587:65] - wire _T_4517 = _T_4516 | _T_4514; // @[el2_lsu_bus_buffer.scala 587:65] - wire _T_4518 = ~_T_4517; // @[el2_lsu_bus_buffer.scala 587:34] - wire _T_4520 = _T_4518 & _T_844; // @[el2_lsu_bus_buffer.scala 587:70] - wire _T_4523 = io_lsu_busreq_m & io_lsu_pkt_m_valid; // @[el2_lsu_bus_buffer.scala 589:51] - wire _T_4524 = _T_4523 & io_lsu_pkt_m_load; // @[el2_lsu_bus_buffer.scala 589:72] - wire _T_4525 = ~io_flush_m_up; // @[el2_lsu_bus_buffer.scala 589:94] - wire _T_4526 = _T_4524 & _T_4525; // @[el2_lsu_bus_buffer.scala 589:92] - wire _T_4527 = ~io_ld_full_hit_m; // @[el2_lsu_bus_buffer.scala 589:111] - wire _T_4529 = ~io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 592:61] + wire [1:0] _T_4436 = io_ldst_dual_r ? _T_4435 : {{1'd0}, io_lsu_busreq_r}; // @[el2_lsu_bus_buffer.scala 580:94] + wire [2:0] _T_4437 = _T_4434 + _T_4436; // @[el2_lsu_bus_buffer.scala 580:88] + wire [2:0] _GEN_388 = {{2'd0}, ibuf_valid}; // @[el2_lsu_bus_buffer.scala 580:154] + wire [3:0] _T_4438 = _T_4437 + _GEN_388; // @[el2_lsu_bus_buffer.scala 580:154] + wire [1:0] _T_4443 = _T_5 + _T_12; // @[el2_lsu_bus_buffer.scala 580:217] + wire [1:0] _GEN_389 = {{1'd0}, _T_19}; // @[el2_lsu_bus_buffer.scala 580:217] + wire [2:0] _T_4444 = _T_4443 + _GEN_389; // @[el2_lsu_bus_buffer.scala 580:217] + wire [2:0] _GEN_390 = {{2'd0}, _T_26}; // @[el2_lsu_bus_buffer.scala 580:217] + wire [3:0] _T_4445 = _T_4444 + _GEN_390; // @[el2_lsu_bus_buffer.scala 580:217] + wire [3:0] buf_numvld_any = _T_4438 + _T_4445; // @[el2_lsu_bus_buffer.scala 580:169] + wire _T_4516 = io_ldst_dual_d & io_dec_lsu_valid_raw_d; // @[el2_lsu_bus_buffer.scala 586:52] + wire _T_4517 = buf_numvld_any >= 4'h3; // @[el2_lsu_bus_buffer.scala 586:92] + wire _T_4518 = buf_numvld_any == 4'h3; // @[el2_lsu_bus_buffer.scala 586:119] + wire _T_4520 = |buf_state_0; // @[el2_lsu_bus_buffer.scala 587:52] + wire _T_4521 = |buf_state_1; // @[el2_lsu_bus_buffer.scala 587:52] + wire _T_4522 = |buf_state_2; // @[el2_lsu_bus_buffer.scala 587:52] + wire _T_4523 = |buf_state_3; // @[el2_lsu_bus_buffer.scala 587:52] + wire _T_4524 = _T_4520 | _T_4521; // @[el2_lsu_bus_buffer.scala 587:65] + wire _T_4525 = _T_4524 | _T_4522; // @[el2_lsu_bus_buffer.scala 587:65] + wire _T_4526 = _T_4525 | _T_4523; // @[el2_lsu_bus_buffer.scala 587:65] + wire _T_4527 = ~_T_4526; // @[el2_lsu_bus_buffer.scala 587:34] + wire _T_4529 = _T_4527 & _T_844; // @[el2_lsu_bus_buffer.scala 587:70] + wire _T_4532 = io_lsu_busreq_m & io_lsu_pkt_m_valid; // @[el2_lsu_bus_buffer.scala 589:51] + wire _T_4533 = _T_4532 & io_lsu_pkt_m_load; // @[el2_lsu_bus_buffer.scala 589:72] + wire _T_4534 = ~io_flush_m_up; // @[el2_lsu_bus_buffer.scala 589:94] + wire _T_4535 = _T_4533 & _T_4534; // @[el2_lsu_bus_buffer.scala 589:92] + wire _T_4536 = ~io_ld_full_hit_m; // @[el2_lsu_bus_buffer.scala 589:111] + wire _T_4538 = ~io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 592:61] reg lsu_nonblock_load_valid_r; // @[el2_lsu_bus_buffer.scala 678:66] - wire _T_4547 = _T_2814 & _T_3658; // @[Mux.scala 27:72] - wire _T_4548 = _T_2836 & _T_3851; // @[Mux.scala 27:72] - wire _T_4549 = _T_2858 & _T_4044; // @[Mux.scala 27:72] - wire _T_4550 = _T_2880 & _T_4237; // @[Mux.scala 27:72] - wire _T_4551 = _T_4547 | _T_4548; // @[Mux.scala 27:72] - wire _T_4552 = _T_4551 | _T_4549; // @[Mux.scala 27:72] - wire lsu_nonblock_load_data_ready = _T_4552 | _T_4550; // @[Mux.scala 27:72] - wire _T_4558 = buf_error[0] & _T_3658; // @[el2_lsu_bus_buffer.scala 595:108] - wire _T_4563 = buf_error[1] & _T_3851; // @[el2_lsu_bus_buffer.scala 595:108] - wire _T_4568 = buf_error[2] & _T_4044; // @[el2_lsu_bus_buffer.scala 595:108] - wire _T_4573 = buf_error[3] & _T_4237; // @[el2_lsu_bus_buffer.scala 595:108] - wire _T_4574 = _T_2814 & _T_4558; // @[Mux.scala 27:72] - wire _T_4575 = _T_2836 & _T_4563; // @[Mux.scala 27:72] - wire _T_4576 = _T_2858 & _T_4568; // @[Mux.scala 27:72] - wire _T_4577 = _T_2880 & _T_4573; // @[Mux.scala 27:72] - wire _T_4578 = _T_4574 | _T_4575; // @[Mux.scala 27:72] - wire _T_4579 = _T_4578 | _T_4576; // @[Mux.scala 27:72] - wire _T_4586 = ~buf_dual_0; // @[el2_lsu_bus_buffer.scala 596:109] - wire _T_4587 = ~buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 596:124] - wire _T_4588 = _T_4586 | _T_4587; // @[el2_lsu_bus_buffer.scala 596:122] - wire _T_4589 = _T_4547 & _T_4588; // @[el2_lsu_bus_buffer.scala 596:106] - wire _T_4594 = ~buf_dual_1; // @[el2_lsu_bus_buffer.scala 596:109] - wire _T_4595 = ~buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 596:124] - wire _T_4596 = _T_4594 | _T_4595; // @[el2_lsu_bus_buffer.scala 596:122] - wire _T_4597 = _T_4548 & _T_4596; // @[el2_lsu_bus_buffer.scala 596:106] - wire _T_4602 = ~buf_dual_2; // @[el2_lsu_bus_buffer.scala 596:109] - wire _T_4603 = ~buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 596:124] - wire _T_4604 = _T_4602 | _T_4603; // @[el2_lsu_bus_buffer.scala 596:122] - wire _T_4605 = _T_4549 & _T_4604; // @[el2_lsu_bus_buffer.scala 596:106] - wire _T_4610 = ~buf_dual_3; // @[el2_lsu_bus_buffer.scala 596:109] - wire _T_4611 = ~buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 596:124] - wire _T_4612 = _T_4610 | _T_4611; // @[el2_lsu_bus_buffer.scala 596:122] - wire _T_4613 = _T_4550 & _T_4612; // @[el2_lsu_bus_buffer.scala 596:106] - wire [1:0] _T_4616 = _T_4605 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4617 = _T_4613 ? 2'h3 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _GEN_389 = {{1'd0}, _T_4597}; // @[Mux.scala 27:72] - wire [1:0] _T_4619 = _GEN_389 | _T_4616; // @[Mux.scala 27:72] - wire [31:0] _T_4654 = _T_4589 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4655 = _T_4597 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4656 = _T_4605 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4657 = _T_4613 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4658 = _T_4654 | _T_4655; // @[Mux.scala 27:72] - wire [31:0] _T_4659 = _T_4658 | _T_4656; // @[Mux.scala 27:72] - wire [31:0] lsu_nonblock_load_data_lo = _T_4659 | _T_4657; // @[Mux.scala 27:72] - wire _T_4665 = buf_dual_0 | buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 598:120] - wire _T_4666 = _T_4547 & _T_4665; // @[el2_lsu_bus_buffer.scala 598:105] - wire _T_4671 = buf_dual_1 | buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 598:120] - wire _T_4672 = _T_4548 & _T_4671; // @[el2_lsu_bus_buffer.scala 598:105] - wire _T_4677 = buf_dual_2 | buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 598:120] - wire _T_4678 = _T_4549 & _T_4677; // @[el2_lsu_bus_buffer.scala 598:105] - wire _T_4683 = buf_dual_3 | buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 598:120] - wire _T_4684 = _T_4550 & _T_4683; // @[el2_lsu_bus_buffer.scala 598:105] - wire [31:0] _T_4685 = _T_4666 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4686 = _T_4672 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4687 = _T_4678 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4688 = _T_4684 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4689 = _T_4685 | _T_4686; // @[Mux.scala 27:72] - wire [31:0] _T_4690 = _T_4689 | _T_4687; // @[Mux.scala 27:72] - wire [31:0] lsu_nonblock_load_data_hi = _T_4690 | _T_4688; // @[Mux.scala 27:72] - wire _T_4692 = io_lsu_nonblock_load_data_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 120:123] - wire _T_4693 = io_lsu_nonblock_load_data_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 120:123] - wire _T_4694 = io_lsu_nonblock_load_data_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 120:123] - wire _T_4695 = io_lsu_nonblock_load_data_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 120:123] - wire [31:0] _T_4696 = _T_4692 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4697 = _T_4693 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4698 = _T_4694 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4699 = _T_4695 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4700 = _T_4696 | _T_4697; // @[Mux.scala 27:72] - wire [31:0] _T_4701 = _T_4700 | _T_4698; // @[Mux.scala 27:72] - wire [31:0] _T_4702 = _T_4701 | _T_4699; // @[Mux.scala 27:72] - wire [1:0] lsu_nonblock_addr_offset = _T_4702[1:0]; // @[el2_lsu_bus_buffer.scala 599:83] - wire [1:0] _T_4708 = _T_4692 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4709 = _T_4693 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4710 = _T_4694 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4711 = _T_4695 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] - wire [1:0] _T_4712 = _T_4708 | _T_4709; // @[Mux.scala 27:72] - wire [1:0] _T_4713 = _T_4712 | _T_4710; // @[Mux.scala 27:72] - wire [1:0] lsu_nonblock_sz = _T_4713 | _T_4711; // @[Mux.scala 27:72] - wire _T_4723 = _T_4692 & buf_unsign[0]; // @[Mux.scala 27:72] - wire _T_4724 = _T_4693 & buf_unsign[1]; // @[Mux.scala 27:72] - wire _T_4725 = _T_4694 & buf_unsign[2]; // @[Mux.scala 27:72] - wire _T_4726 = _T_4695 & buf_unsign[3]; // @[Mux.scala 27:72] - wire _T_4727 = _T_4723 | _T_4724; // @[Mux.scala 27:72] - wire _T_4728 = _T_4727 | _T_4725; // @[Mux.scala 27:72] - wire lsu_nonblock_unsign = _T_4728 | _T_4726; // @[Mux.scala 27:72] - wire [63:0] _T_4748 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58] - wire [3:0] _GEN_390 = {{2'd0}, lsu_nonblock_addr_offset}; // @[el2_lsu_bus_buffer.scala 603:121] - wire [5:0] _T_4749 = _GEN_390 * 4'h8; // @[el2_lsu_bus_buffer.scala 603:121] - wire [63:0] lsu_nonblock_data_unalgn = _T_4748 >> _T_4749; // @[el2_lsu_bus_buffer.scala 603:92] - wire _T_4750 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 606:69] - wire _T_4752 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 607:81] - wire _T_4753 = lsu_nonblock_unsign & _T_4752; // @[el2_lsu_bus_buffer.scala 607:63] - wire [31:0] _T_4755 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] - wire _T_4756 = lsu_nonblock_sz == 2'h1; // @[el2_lsu_bus_buffer.scala 608:45] - wire _T_4757 = lsu_nonblock_unsign & _T_4756; // @[el2_lsu_bus_buffer.scala 608:26] - wire [31:0] _T_4759 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] - wire _T_4760 = ~lsu_nonblock_unsign; // @[el2_lsu_bus_buffer.scala 609:6] - wire _T_4762 = _T_4760 & _T_4752; // @[el2_lsu_bus_buffer.scala 609:27] - wire [23:0] _T_4765 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_4767 = {_T_4765,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] - wire _T_4770 = _T_4760 & _T_4756; // @[el2_lsu_bus_buffer.scala 610:27] - wire [15:0] _T_4773 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] - wire [31:0] _T_4775 = {_T_4773,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] - wire _T_4776 = lsu_nonblock_sz == 2'h2; // @[el2_lsu_bus_buffer.scala 611:21] - wire [31:0] _T_4777 = _T_4753 ? _T_4755 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4778 = _T_4757 ? _T_4759 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4779 = _T_4762 ? _T_4767 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4780 = _T_4770 ? _T_4775 : 32'h0; // @[Mux.scala 27:72] - wire [63:0] _T_4781 = _T_4776 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4782 = _T_4777 | _T_4778; // @[Mux.scala 27:72] - wire [31:0] _T_4783 = _T_4782 | _T_4779; // @[Mux.scala 27:72] - wire [31:0] _T_4784 = _T_4783 | _T_4780; // @[Mux.scala 27:72] - wire [63:0] _GEN_391 = {{32'd0}, _T_4784}; // @[Mux.scala 27:72] - wire [63:0] _T_4785 = _GEN_391 | _T_4781; // @[Mux.scala 27:72] - wire _T_4880 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 629:36] - wire _T_4881 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 629:51] - wire _T_4882 = _T_4880 & _T_4881; // @[el2_lsu_bus_buffer.scala 629:49] - wire [31:0] _T_4886 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58] - wire [2:0] _T_4888 = {1'h0,obuf_sz}; // @[Cat.scala 29:58] - wire _T_4893 = ~obuf_data_done; // @[el2_lsu_bus_buffer.scala 641:50] - wire _T_4894 = _T_4880 & _T_4893; // @[el2_lsu_bus_buffer.scala 641:48] - wire [7:0] _T_4898 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] - wire _T_4901 = obuf_valid & _T_1356; // @[el2_lsu_bus_buffer.scala 646:36] - wire _T_4903 = _T_4901 & _T_1362; // @[el2_lsu_bus_buffer.scala 646:50] - wire _T_4915 = io_lsu_bus_clk_en_q & buf_error[0]; // @[el2_lsu_bus_buffer.scala 659:114] - wire _T_4917 = _T_4915 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 659:129] - wire _T_4920 = io_lsu_bus_clk_en_q & buf_error[1]; // @[el2_lsu_bus_buffer.scala 659:114] - wire _T_4922 = _T_4920 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 659:129] - wire _T_4925 = io_lsu_bus_clk_en_q & buf_error[2]; // @[el2_lsu_bus_buffer.scala 659:114] - wire _T_4927 = _T_4925 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 659:129] - wire _T_4930 = io_lsu_bus_clk_en_q & buf_error[3]; // @[el2_lsu_bus_buffer.scala 659:114] - wire _T_4932 = _T_4930 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 659:129] - wire _T_4933 = _T_2814 & _T_4917; // @[Mux.scala 27:72] - wire _T_4934 = _T_2836 & _T_4922; // @[Mux.scala 27:72] - wire _T_4935 = _T_2858 & _T_4927; // @[Mux.scala 27:72] - wire _T_4936 = _T_2880 & _T_4932; // @[Mux.scala 27:72] - wire _T_4937 = _T_4933 | _T_4934; // @[Mux.scala 27:72] - wire _T_4938 = _T_4937 | _T_4935; // @[Mux.scala 27:72] - wire _T_4948 = _T_2836 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 660:98] - wire lsu_imprecise_error_store_tag = _T_4948 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 660:113] - wire _T_4954 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 662:72] - wire _T_4956 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 120:123] - wire [31:0] _T_4958 = _T_4956 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4959 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] - wire [31:0] _T_4960 = _T_4958 | _T_4959; // @[Mux.scala 27:72] - wire _T_4977 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 669:68] - wire _T_4980 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 670:48] - wire _T_4983 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 673:48] - wire _T_4984 = io_lsu_axi_awvalid & _T_4983; // @[el2_lsu_bus_buffer.scala 673:46] - wire _T_4985 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 673:92] - wire _T_4986 = io_lsu_axi_wvalid & _T_4985; // @[el2_lsu_bus_buffer.scala 673:90] - wire _T_4987 = _T_4984 | _T_4986; // @[el2_lsu_bus_buffer.scala 673:69] - wire _T_4988 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 673:136] - wire _T_4989 = io_lsu_axi_arvalid & _T_4988; // @[el2_lsu_bus_buffer.scala 673:134] - wire _T_4993 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 677:75] - wire _T_4994 = io_lsu_busreq_m & _T_4993; // @[el2_lsu_bus_buffer.scala 677:73] - reg _T_4997; // @[el2_lsu_bus_buffer.scala 677:56] + wire _T_4556 = _T_2814 & _T_3658; // @[Mux.scala 27:72] + wire _T_4557 = _T_2836 & _T_3851; // @[Mux.scala 27:72] + wire _T_4558 = _T_2858 & _T_4044; // @[Mux.scala 27:72] + wire _T_4559 = _T_2880 & _T_4237; // @[Mux.scala 27:72] + wire _T_4560 = _T_4556 | _T_4557; // @[Mux.scala 27:72] + wire _T_4561 = _T_4560 | _T_4558; // @[Mux.scala 27:72] + wire lsu_nonblock_load_data_ready = _T_4561 | _T_4559; // @[Mux.scala 27:72] + wire _T_4567 = buf_error[0] & _T_3658; // @[el2_lsu_bus_buffer.scala 595:108] + wire _T_4572 = buf_error[1] & _T_3851; // @[el2_lsu_bus_buffer.scala 595:108] + wire _T_4577 = buf_error[2] & _T_4044; // @[el2_lsu_bus_buffer.scala 595:108] + wire _T_4582 = buf_error[3] & _T_4237; // @[el2_lsu_bus_buffer.scala 595:108] + wire _T_4583 = _T_2814 & _T_4567; // @[Mux.scala 27:72] + wire _T_4584 = _T_2836 & _T_4572; // @[Mux.scala 27:72] + wire _T_4585 = _T_2858 & _T_4577; // @[Mux.scala 27:72] + wire _T_4586 = _T_2880 & _T_4582; // @[Mux.scala 27:72] + wire _T_4587 = _T_4583 | _T_4584; // @[Mux.scala 27:72] + wire _T_4588 = _T_4587 | _T_4585; // @[Mux.scala 27:72] + wire _T_4595 = ~buf_dual_0; // @[el2_lsu_bus_buffer.scala 596:109] + wire _T_4596 = ~buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 596:124] + wire _T_4597 = _T_4595 | _T_4596; // @[el2_lsu_bus_buffer.scala 596:122] + wire _T_4598 = _T_4556 & _T_4597; // @[el2_lsu_bus_buffer.scala 596:106] + wire _T_4603 = ~buf_dual_1; // @[el2_lsu_bus_buffer.scala 596:109] + wire _T_4604 = ~buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 596:124] + wire _T_4605 = _T_4603 | _T_4604; // @[el2_lsu_bus_buffer.scala 596:122] + wire _T_4606 = _T_4557 & _T_4605; // @[el2_lsu_bus_buffer.scala 596:106] + wire _T_4611 = ~buf_dual_2; // @[el2_lsu_bus_buffer.scala 596:109] + wire _T_4612 = ~buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 596:124] + wire _T_4613 = _T_4611 | _T_4612; // @[el2_lsu_bus_buffer.scala 596:122] + wire _T_4614 = _T_4558 & _T_4613; // @[el2_lsu_bus_buffer.scala 596:106] + wire _T_4619 = ~buf_dual_3; // @[el2_lsu_bus_buffer.scala 596:109] + wire _T_4620 = ~buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 596:124] + wire _T_4621 = _T_4619 | _T_4620; // @[el2_lsu_bus_buffer.scala 596:122] + wire _T_4622 = _T_4559 & _T_4621; // @[el2_lsu_bus_buffer.scala 596:106] + wire [1:0] _T_4625 = _T_4614 ? 2'h2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4626 = _T_4622 ? 2'h3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _GEN_391 = {{1'd0}, _T_4606}; // @[Mux.scala 27:72] + wire [1:0] _T_4628 = _GEN_391 | _T_4625; // @[Mux.scala 27:72] + wire [31:0] _T_4663 = _T_4598 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4664 = _T_4606 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4665 = _T_4614 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4666 = _T_4622 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4667 = _T_4663 | _T_4664; // @[Mux.scala 27:72] + wire [31:0] _T_4668 = _T_4667 | _T_4665; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_lo = _T_4668 | _T_4666; // @[Mux.scala 27:72] + wire _T_4674 = buf_dual_0 | buf_dualhi_0; // @[el2_lsu_bus_buffer.scala 598:120] + wire _T_4675 = _T_4556 & _T_4674; // @[el2_lsu_bus_buffer.scala 598:105] + wire _T_4680 = buf_dual_1 | buf_dualhi_1; // @[el2_lsu_bus_buffer.scala 598:120] + wire _T_4681 = _T_4557 & _T_4680; // @[el2_lsu_bus_buffer.scala 598:105] + wire _T_4686 = buf_dual_2 | buf_dualhi_2; // @[el2_lsu_bus_buffer.scala 598:120] + wire _T_4687 = _T_4558 & _T_4686; // @[el2_lsu_bus_buffer.scala 598:105] + wire _T_4692 = buf_dual_3 | buf_dualhi_3; // @[el2_lsu_bus_buffer.scala 598:120] + wire _T_4693 = _T_4559 & _T_4692; // @[el2_lsu_bus_buffer.scala 598:105] + wire [31:0] _T_4694 = _T_4675 ? buf_data_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4695 = _T_4681 ? buf_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4696 = _T_4687 ? buf_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4697 = _T_4693 ? buf_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4698 = _T_4694 | _T_4695; // @[Mux.scala 27:72] + wire [31:0] _T_4699 = _T_4698 | _T_4696; // @[Mux.scala 27:72] + wire [31:0] lsu_nonblock_load_data_hi = _T_4699 | _T_4697; // @[Mux.scala 27:72] + wire _T_4701 = io_lsu_nonblock_load_data_tag == 2'h0; // @[el2_lsu_bus_buffer.scala 120:123] + wire _T_4702 = io_lsu_nonblock_load_data_tag == 2'h1; // @[el2_lsu_bus_buffer.scala 120:123] + wire _T_4703 = io_lsu_nonblock_load_data_tag == 2'h2; // @[el2_lsu_bus_buffer.scala 120:123] + wire _T_4704 = io_lsu_nonblock_load_data_tag == 2'h3; // @[el2_lsu_bus_buffer.scala 120:123] + wire [31:0] _T_4705 = _T_4701 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4706 = _T_4702 ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4707 = _T_4703 ? buf_addr_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4708 = _T_4704 ? buf_addr_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4709 = _T_4705 | _T_4706; // @[Mux.scala 27:72] + wire [31:0] _T_4710 = _T_4709 | _T_4707; // @[Mux.scala 27:72] + wire [31:0] _T_4711 = _T_4710 | _T_4708; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_addr_offset = _T_4711[1:0]; // @[el2_lsu_bus_buffer.scala 599:83] + wire [1:0] _T_4717 = _T_4701 ? buf_sz_0 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4718 = _T_4702 ? buf_sz_1 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4719 = _T_4703 ? buf_sz_2 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4720 = _T_4704 ? buf_sz_3 : 2'h0; // @[Mux.scala 27:72] + wire [1:0] _T_4721 = _T_4717 | _T_4718; // @[Mux.scala 27:72] + wire [1:0] _T_4722 = _T_4721 | _T_4719; // @[Mux.scala 27:72] + wire [1:0] lsu_nonblock_sz = _T_4722 | _T_4720; // @[Mux.scala 27:72] + wire _T_4732 = _T_4701 & buf_unsign[0]; // @[Mux.scala 27:72] + wire _T_4733 = _T_4702 & buf_unsign[1]; // @[Mux.scala 27:72] + wire _T_4734 = _T_4703 & buf_unsign[2]; // @[Mux.scala 27:72] + wire _T_4735 = _T_4704 & buf_unsign[3]; // @[Mux.scala 27:72] + wire _T_4736 = _T_4732 | _T_4733; // @[Mux.scala 27:72] + wire _T_4737 = _T_4736 | _T_4734; // @[Mux.scala 27:72] + wire lsu_nonblock_unsign = _T_4737 | _T_4735; // @[Mux.scala 27:72] + wire [63:0] _T_4757 = {lsu_nonblock_load_data_hi,lsu_nonblock_load_data_lo}; // @[Cat.scala 29:58] + wire [3:0] _GEN_392 = {{2'd0}, lsu_nonblock_addr_offset}; // @[el2_lsu_bus_buffer.scala 603:121] + wire [5:0] _T_4758 = _GEN_392 * 4'h8; // @[el2_lsu_bus_buffer.scala 603:121] + wire [63:0] lsu_nonblock_data_unalgn = _T_4757 >> _T_4758; // @[el2_lsu_bus_buffer.scala 603:92] + wire _T_4759 = ~io_lsu_nonblock_load_data_error; // @[el2_lsu_bus_buffer.scala 606:69] + wire _T_4761 = lsu_nonblock_sz == 2'h0; // @[el2_lsu_bus_buffer.scala 607:81] + wire _T_4762 = lsu_nonblock_unsign & _T_4761; // @[el2_lsu_bus_buffer.scala 607:63] + wire [31:0] _T_4764 = {24'h0,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4765 = lsu_nonblock_sz == 2'h1; // @[el2_lsu_bus_buffer.scala 608:45] + wire _T_4766 = lsu_nonblock_unsign & _T_4765; // @[el2_lsu_bus_buffer.scala 608:26] + wire [31:0] _T_4768 = {16'h0,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4769 = ~lsu_nonblock_unsign; // @[el2_lsu_bus_buffer.scala 609:6] + wire _T_4771 = _T_4769 & _T_4761; // @[el2_lsu_bus_buffer.scala 609:27] + wire [23:0] _T_4774 = lsu_nonblock_data_unalgn[7] ? 24'hffffff : 24'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4776 = {_T_4774,lsu_nonblock_data_unalgn[7:0]}; // @[Cat.scala 29:58] + wire _T_4779 = _T_4769 & _T_4765; // @[el2_lsu_bus_buffer.scala 610:27] + wire [15:0] _T_4782 = lsu_nonblock_data_unalgn[15] ? 16'hffff : 16'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_4784 = {_T_4782,lsu_nonblock_data_unalgn[15:0]}; // @[Cat.scala 29:58] + wire _T_4785 = lsu_nonblock_sz == 2'h2; // @[el2_lsu_bus_buffer.scala 611:21] + wire [31:0] _T_4786 = _T_4762 ? _T_4764 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4787 = _T_4766 ? _T_4768 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4788 = _T_4771 ? _T_4776 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4789 = _T_4779 ? _T_4784 : 32'h0; // @[Mux.scala 27:72] + wire [63:0] _T_4790 = _T_4785 ? lsu_nonblock_data_unalgn : 64'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4791 = _T_4786 | _T_4787; // @[Mux.scala 27:72] + wire [31:0] _T_4792 = _T_4791 | _T_4788; // @[Mux.scala 27:72] + wire [31:0] _T_4793 = _T_4792 | _T_4789; // @[Mux.scala 27:72] + wire [63:0] _GEN_393 = {{32'd0}, _T_4793}; // @[Mux.scala 27:72] + wire [63:0] _T_4794 = _GEN_393 | _T_4790; // @[Mux.scala 27:72] + wire _T_4889 = obuf_valid & obuf_write; // @[el2_lsu_bus_buffer.scala 629:36] + wire _T_4890 = ~obuf_cmd_done; // @[el2_lsu_bus_buffer.scala 629:51] + wire _T_4891 = _T_4889 & _T_4890; // @[el2_lsu_bus_buffer.scala 629:49] + wire [31:0] _T_4895 = {obuf_addr[31:3],3'h0}; // @[Cat.scala 29:58] + wire [2:0] _T_4897 = {1'h0,obuf_sz}; // @[Cat.scala 29:58] + wire _T_4902 = ~obuf_data_done; // @[el2_lsu_bus_buffer.scala 641:50] + wire _T_4903 = _T_4889 & _T_4902; // @[el2_lsu_bus_buffer.scala 641:48] + wire [7:0] _T_4907 = obuf_write ? 8'hff : 8'h0; // @[Bitwise.scala 72:12] + wire _T_4910 = obuf_valid & _T_1356; // @[el2_lsu_bus_buffer.scala 646:36] + wire _T_4912 = _T_4910 & _T_1362; // @[el2_lsu_bus_buffer.scala 646:50] + wire _T_4924 = io_lsu_bus_clk_en_q & buf_error[0]; // @[el2_lsu_bus_buffer.scala 659:114] + wire _T_4926 = _T_4924 & buf_write[0]; // @[el2_lsu_bus_buffer.scala 659:129] + wire _T_4929 = io_lsu_bus_clk_en_q & buf_error[1]; // @[el2_lsu_bus_buffer.scala 659:114] + wire _T_4931 = _T_4929 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 659:129] + wire _T_4934 = io_lsu_bus_clk_en_q & buf_error[2]; // @[el2_lsu_bus_buffer.scala 659:114] + wire _T_4936 = _T_4934 & buf_write[2]; // @[el2_lsu_bus_buffer.scala 659:129] + wire _T_4939 = io_lsu_bus_clk_en_q & buf_error[3]; // @[el2_lsu_bus_buffer.scala 659:114] + wire _T_4941 = _T_4939 & buf_write[3]; // @[el2_lsu_bus_buffer.scala 659:129] + wire _T_4942 = _T_2814 & _T_4926; // @[Mux.scala 27:72] + wire _T_4943 = _T_2836 & _T_4931; // @[Mux.scala 27:72] + wire _T_4944 = _T_2858 & _T_4936; // @[Mux.scala 27:72] + wire _T_4945 = _T_2880 & _T_4941; // @[Mux.scala 27:72] + wire _T_4946 = _T_4942 | _T_4943; // @[Mux.scala 27:72] + wire _T_4947 = _T_4946 | _T_4944; // @[Mux.scala 27:72] + wire _T_4957 = _T_2836 & buf_error[1]; // @[el2_lsu_bus_buffer.scala 660:98] + wire lsu_imprecise_error_store_tag = _T_4957 & buf_write[1]; // @[el2_lsu_bus_buffer.scala 660:113] + wire _T_4963 = ~io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 662:72] + wire _T_4965 = ~lsu_imprecise_error_store_tag; // @[el2_lsu_bus_buffer.scala 120:123] + wire [31:0] _T_4967 = _T_4965 ? buf_addr_0 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4968 = lsu_imprecise_error_store_tag ? buf_addr_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_4969 = _T_4967 | _T_4968; // @[Mux.scala 27:72] + wire _T_4986 = bus_wcmd_sent | bus_wdata_sent; // @[el2_lsu_bus_buffer.scala 669:68] + wire _T_4989 = io_lsu_busreq_r & io_ldst_dual_r; // @[el2_lsu_bus_buffer.scala 670:48] + wire _T_4992 = ~io_lsu_axi_awready; // @[el2_lsu_bus_buffer.scala 673:48] + wire _T_4993 = io_lsu_axi_awvalid & _T_4992; // @[el2_lsu_bus_buffer.scala 673:46] + wire _T_4994 = ~io_lsu_axi_wready; // @[el2_lsu_bus_buffer.scala 673:92] + wire _T_4995 = io_lsu_axi_wvalid & _T_4994; // @[el2_lsu_bus_buffer.scala 673:90] + wire _T_4996 = _T_4993 | _T_4995; // @[el2_lsu_bus_buffer.scala 673:69] + wire _T_4997 = ~io_lsu_axi_arready; // @[el2_lsu_bus_buffer.scala 673:136] + wire _T_4998 = io_lsu_axi_arvalid & _T_4997; // @[el2_lsu_bus_buffer.scala 673:134] + wire _T_5002 = ~io_flush_r; // @[el2_lsu_bus_buffer.scala 677:75] + wire _T_5003 = io_lsu_busreq_m & _T_5002; // @[el2_lsu_bus_buffer.scala 677:73] + reg _T_5006; // @[el2_lsu_bus_buffer.scala 677:56] rvclkhdr rvclkhdr ( // @[el2_lib.scala 485:23] .io_l1clk(rvclkhdr_io_l1clk), .io_clk(rvclkhdr_io_clk), @@ -2703,52 +2709,52 @@ module el2_lsu_bus_buffer( .io_en(rvclkhdr_11_io_en), .io_scan_mode(rvclkhdr_11_io_scan_mode) ); - assign io_lsu_busreq_r = _T_4997; // @[el2_lsu_bus_buffer.scala 677:19] + assign io_lsu_busreq_r = _T_5006; // @[el2_lsu_bus_buffer.scala 677:19] assign io_lsu_bus_buffer_pend_any = |buf_numvld_pend_any; // @[el2_lsu_bus_buffer.scala 585:30] - assign io_lsu_bus_buffer_full_any = _T_4507 ? _T_4508 : _T_4509; // @[el2_lsu_bus_buffer.scala 586:30] - assign io_lsu_bus_buffer_empty_any = _T_4520 & _T_1244; // @[el2_lsu_bus_buffer.scala 587:31] + assign io_lsu_bus_buffer_full_any = _T_4516 ? _T_4517 : _T_4518; // @[el2_lsu_bus_buffer.scala 586:30] + assign io_lsu_bus_buffer_empty_any = _T_4529 & _T_1244; // @[el2_lsu_bus_buffer.scala 587:31] assign io_lsu_bus_idle_any = 1'h1; // @[el2_lsu_bus_buffer.scala 666:23] assign io_ld_byte_hit_buf_lo = {_T_69,_T_58}; // @[el2_lsu_bus_buffer.scala 198:25] assign io_ld_byte_hit_buf_hi = {_T_84,_T_73}; // @[el2_lsu_bus_buffer.scala 199:25] assign io_ld_fwddata_buf_lo = _T_646[31:0]; // @[el2_lsu_bus_buffer.scala 224:24] assign io_ld_fwddata_buf_hi = _T_741[31:0]; // @[el2_lsu_bus_buffer.scala 229:24] - assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4954; // @[el2_lsu_bus_buffer.scala 662:35] - assign io_lsu_imprecise_error_store_any = _T_4938 | _T_4936; // @[el2_lsu_bus_buffer.scala 659:36] - assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4960 : _T_4702; // @[el2_lsu_bus_buffer.scala 663:35] - assign io_lsu_nonblock_load_valid_m = _T_4526 & _T_4527; // @[el2_lsu_bus_buffer.scala 589:32] + assign io_lsu_imprecise_error_load_any = io_lsu_nonblock_load_data_error & _T_4963; // @[el2_lsu_bus_buffer.scala 662:35] + assign io_lsu_imprecise_error_store_any = _T_4947 | _T_4945; // @[el2_lsu_bus_buffer.scala 659:36] + assign io_lsu_imprecise_error_addr_any = io_lsu_imprecise_error_store_any ? _T_4969 : _T_4711; // @[el2_lsu_bus_buffer.scala 663:35] + assign io_lsu_nonblock_load_valid_m = _T_4535 & _T_4536; // @[el2_lsu_bus_buffer.scala 589:32] assign io_lsu_nonblock_load_tag_m = _T_1876 ? 2'h0 : _T_1912; // @[el2_lsu_bus_buffer.scala 590:30] - assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4529; // @[el2_lsu_bus_buffer.scala 592:30] + assign io_lsu_nonblock_load_inv_r = lsu_nonblock_load_valid_r & _T_4538; // @[el2_lsu_bus_buffer.scala 592:30] assign io_lsu_nonblock_load_inv_tag_r = WrPtr0_r; // @[el2_lsu_bus_buffer.scala 593:34] - assign io_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4750; // @[el2_lsu_bus_buffer.scala 606:35] - assign io_lsu_nonblock_load_data_error = _T_4579 | _T_4577; // @[el2_lsu_bus_buffer.scala 595:35] - assign io_lsu_nonblock_load_data_tag = _T_4619 | _T_4617; // @[el2_lsu_bus_buffer.scala 596:33] - assign io_lsu_nonblock_load_data = _T_4785[31:0]; // @[el2_lsu_bus_buffer.scala 607:29] - assign io_lsu_pmu_bus_trxn = _T_4977 | _T_4872; // @[el2_lsu_bus_buffer.scala 669:23] - assign io_lsu_pmu_bus_misaligned = _T_4980 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 670:29] + assign io_lsu_nonblock_load_data_valid = lsu_nonblock_load_data_ready & _T_4759; // @[el2_lsu_bus_buffer.scala 606:35] + assign io_lsu_nonblock_load_data_error = _T_4588 | _T_4586; // @[el2_lsu_bus_buffer.scala 595:35] + assign io_lsu_nonblock_load_data_tag = _T_4628 | _T_4626; // @[el2_lsu_bus_buffer.scala 596:33] + assign io_lsu_nonblock_load_data = _T_4794[31:0]; // @[el2_lsu_bus_buffer.scala 607:29] + assign io_lsu_pmu_bus_trxn = _T_4986 | _T_4881; // @[el2_lsu_bus_buffer.scala 669:23] + assign io_lsu_pmu_bus_misaligned = _T_4989 & io_lsu_commit_r; // @[el2_lsu_bus_buffer.scala 670:29] assign io_lsu_pmu_bus_error = io_lsu_imprecise_error_load_any | io_lsu_imprecise_error_store_any; // @[el2_lsu_bus_buffer.scala 671:24] - assign io_lsu_pmu_bus_busy = _T_4987 | _T_4989; // @[el2_lsu_bus_buffer.scala 673:23] - assign io_lsu_axi_awvalid = _T_4882 & _T_1252; // @[el2_lsu_bus_buffer.scala 629:22] + assign io_lsu_pmu_bus_busy = _T_4996 | _T_4998; // @[el2_lsu_bus_buffer.scala 673:23] + assign io_lsu_axi_awvalid = _T_4891 & _T_1252; // @[el2_lsu_bus_buffer.scala 629:22] assign io_lsu_axi_awid = {{1'd0}, _T_1861}; // @[el2_lsu_bus_buffer.scala 630:19] - assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4886; // @[el2_lsu_bus_buffer.scala 631:21] + assign io_lsu_axi_awaddr = obuf_sideeffect ? obuf_addr : _T_4895; // @[el2_lsu_bus_buffer.scala 631:21] assign io_lsu_axi_awregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 635:23] assign io_lsu_axi_awlen = 8'h0; // @[el2_lsu_bus_buffer.scala 636:20] - assign io_lsu_axi_awsize = obuf_sideeffect ? _T_4888 : 3'h3; // @[el2_lsu_bus_buffer.scala 632:21] + assign io_lsu_axi_awsize = obuf_sideeffect ? _T_4897 : 3'h3; // @[el2_lsu_bus_buffer.scala 632:21] assign io_lsu_axi_awburst = 2'h1; // @[el2_lsu_bus_buffer.scala 637:22] assign io_lsu_axi_awlock = 1'h0; // @[el2_lsu_bus_buffer.scala 639:21] assign io_lsu_axi_awcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 634:22] assign io_lsu_axi_awprot = 3'h0; // @[el2_lsu_bus_buffer.scala 633:21] assign io_lsu_axi_awqos = 4'h0; // @[el2_lsu_bus_buffer.scala 638:20] - assign io_lsu_axi_wvalid = _T_4894 & _T_1252; // @[el2_lsu_bus_buffer.scala 641:21] + assign io_lsu_axi_wvalid = _T_4903 & _T_1252; // @[el2_lsu_bus_buffer.scala 641:21] assign io_lsu_axi_wdata = obuf_data; // @[el2_lsu_bus_buffer.scala 643:20] - assign io_lsu_axi_wstrb = obuf_byteen & _T_4898; // @[el2_lsu_bus_buffer.scala 642:20] + assign io_lsu_axi_wstrb = obuf_byteen & _T_4907; // @[el2_lsu_bus_buffer.scala 642:20] assign io_lsu_axi_wlast = 1'h1; // @[el2_lsu_bus_buffer.scala 644:20] assign io_lsu_axi_bready = 1'h1; // @[el2_lsu_bus_buffer.scala 657:21] - assign io_lsu_axi_arvalid = _T_4903 & _T_1252; // @[el2_lsu_bus_buffer.scala 646:22] + assign io_lsu_axi_arvalid = _T_4912 & _T_1252; // @[el2_lsu_bus_buffer.scala 646:22] assign io_lsu_axi_arid = {{1'd0}, _T_1861}; // @[el2_lsu_bus_buffer.scala 647:19] - assign io_lsu_axi_araddr = obuf_sideeffect ? obuf_addr : _T_4886; // @[el2_lsu_bus_buffer.scala 648:21] + assign io_lsu_axi_araddr = obuf_sideeffect ? obuf_addr : _T_4895; // @[el2_lsu_bus_buffer.scala 648:21] assign io_lsu_axi_arregion = obuf_addr[31:28]; // @[el2_lsu_bus_buffer.scala 652:23] assign io_lsu_axi_arlen = 8'h0; // @[el2_lsu_bus_buffer.scala 653:20] - assign io_lsu_axi_arsize = obuf_sideeffect ? _T_4888 : 3'h3; // @[el2_lsu_bus_buffer.scala 649:21] + assign io_lsu_axi_arsize = obuf_sideeffect ? _T_4897 : 3'h3; // @[el2_lsu_bus_buffer.scala 649:21] assign io_lsu_axi_arburst = 2'h1; // @[el2_lsu_bus_buffer.scala 654:22] assign io_lsu_axi_arlock = 1'h0; // @[el2_lsu_bus_buffer.scala 656:21] assign io_lsu_axi_arcache = obuf_sideeffect ? 4'h0 : 4'hf; // @[el2_lsu_bus_buffer.scala 651:22] @@ -2756,8 +2762,8 @@ module el2_lsu_bus_buffer( assign io_lsu_axi_arqos = 4'h0; // @[el2_lsu_bus_buffer.scala 655:20] assign io_lsu_axi_rready = 1'h1; // @[el2_lsu_bus_buffer.scala 658:21] assign io_test = _T_745 | _T_744; // @[el2_lsu_bus_buffer.scala 258:11] - assign io_data_hi = _T_4690 | _T_4688; // @[el2_lsu_bus_buffer.scala 604:14] - assign io_data_lo = _T_4659 | _T_4657; // @[el2_lsu_bus_buffer.scala 605:14] + assign io_data_hi = _T_4699 | _T_4697; // @[el2_lsu_bus_buffer.scala 604:14] + assign io_data_lo = _T_4668 | _T_4666; // @[el2_lsu_bus_buffer.scala 605:14] assign io_data_en = {_T_4431,buf_data_en_0}; // @[el2_lsu_bus_buffer.scala 578:14] assign io_Cmdptr0 = _T_2092[1:0]; // @[el2_lsu_bus_buffer.scala 447:14] assign io_Cmdptr1 = 2'h0; // @[el2_lsu_bus_buffer.scala 358:14] @@ -3049,7 +3055,7 @@ initial begin _RAND_105 = {1{`RANDOM}}; lsu_nonblock_load_valid_r = _RAND_105[0:0]; _RAND_106 = {1{`RANDOM}}; - _T_4997 = _RAND_106[0:0]; + _T_5006 = _RAND_106[0:0]; `endif // RANDOMIZE_REG_INIT if (reset) begin buf_addr_0 = 32'h0; @@ -3370,7 +3376,7 @@ initial begin lsu_nonblock_load_valid_r = 1'h0; end if (reset) begin - _T_4997 = 1'h0; + _T_5006 = 1'h0; end `endif // RANDOMIZE end // initial @@ -4197,14 +4203,14 @@ end // initial if (reset) begin obuf_cmd_done <= 1'h0; end else begin - obuf_cmd_done <= _T_1318 & _T_4869; + obuf_cmd_done <= _T_1318 & _T_4878; end end always @(posedge io_lsu_busm_clk or posedge reset) begin if (reset) begin obuf_data_done <= 1'h0; end else begin - obuf_data_done <= _T_1318 & _T_4870; + obuf_data_done <= _T_1318 & _T_4879; end end always @(posedge io_lsu_free_c2_clk or posedge reset) begin @@ -4602,9 +4608,9 @@ end // initial end always @(posedge io_lsu_c2_r_clk or posedge reset) begin if (reset) begin - _T_4997 <= 1'h0; + _T_5006 <= 1'h0; end else begin - _T_4997 <= _T_4994 & _T_4527; + _T_5006 <= _T_5003 & _T_4536; end end endmodule diff --git a/src/main/scala/lsu/el2_lsu_bus_buffer.scala b/src/main/scala/lsu/el2_lsu_bus_buffer.scala index fc18e247..72171936 100644 --- a/src/main/scala/lsu/el2_lsu_bus_buffer.scala +++ b/src/main/scala/lsu/el2_lsu_bus_buffer.scala @@ -577,7 +577,7 @@ class el2_lsu_bus_buffer extends Module with RequireAsyncReset with el2_lib { buf_error := (0 until DEPTH).map(i=>(withClock(io.lsu_bus_buf_c1_clk){RegNext(Mux(buf_error_en(i), true.B, buf_error(i)) & !buf_rst(i), false.B)}).asUInt()).reverse.reduce(Cat(_,_)) io.data_en := (0 until DEPTH).map(i=>buf_data_en(i).asUInt()).reverse.reduce(Cat(_,_)) - val buf_numvld_any = Mux(io.ldst_dual_m, Cat(io.lsu_busreq_m, 0.U),io.lsu_busreq_m) +& Mux(io.ldst_dual_r, Cat(io.lsu_busreq_r, 0.U),io.lsu_busreq_r) +& ibuf_valid + val buf_numvld_any = (Mux(io.ldst_dual_m, Cat(io.lsu_busreq_m, 0.U),io.lsu_busreq_m) +& Mux(io.ldst_dual_r, Cat(io.lsu_busreq_r, 0.U),io.lsu_busreq_r) +& ibuf_valid) + buf_state.map(i=>(i=/=idle_C).asUInt).reduce(_+&_) buf_numvld_wrcmd_any := (0 until DEPTH).map(i=>(buf_write(i) & (buf_state(i)===cmd_C) & !buf_cmd_state_bus_en(i)).asUInt).reverse.reduce(_ +& _) buf_numvld_cmd_any := (0 until DEPTH).map(i=>((buf_state(i)===cmd_C) & !buf_cmd_state_bus_en(i)).asUInt).reverse.reduce(_ +& _) buf_numvld_pend_any := (0 until DEPTH).map(i=>((buf_state(i)===wait_C) | ((buf_state(i)===cmd_C) & !buf_cmd_state_bus_en(i))).asUInt).reverse.reduce(_ +& _) diff --git a/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class b/target/scala-2.12/classes/lsu/el2_lsu_bus_buffer.class index 87e0411147d09a7c563567afe5f9888794dfcf7e..d6b2fd52ee0feb48d1d25eb6433d4298730753c4 100644 GIT binary patch literal 567822 zcmcG%3w&H#RX={tB$?+<+N5oov}x~6o4)Q%o6Jnoq)8ullBR8%M{gc|q-{E#B$IU7 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