diff --git a/el2_ifu_compress_ctl.anno.json b/el2_ifu_compress_ctl.anno.json index 6b7e00f9..5aa14554 100644 --- a/el2_ifu_compress_ctl.anno.json +++ b/el2_ifu_compress_ctl.anno.json @@ -6,6 +6,13 @@ "~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din" ] }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2_19", + "sources":[ + "~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din" + ] + }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_rdpd", @@ -27,13 +34,6 @@ "~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din" ] }, - { - "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_sjaloffset11_1", - "sources":[ - "~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din" - ] - }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2", @@ -57,14 +57,14 @@ }, { "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_rs2pd", + "sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_l2_31", "sources":[ "~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din" ] }, { "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_sluimm17_12", + "sink":"~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_rs2pd", "sources":[ "~el2_ifu_compress_ctl|el2_ifu_compress_ctl>io_din" ] diff --git a/el2_ifu_compress_ctl.fir b/el2_ifu_compress_ctl.fir index 6921ffec..59d506c2 100644 --- a/el2_ifu_compress_ctl.fir +++ b/el2_ifu_compress_ctl.fir @@ -3,7 +3,7 @@ circuit el2_ifu_compress_ctl : module el2_ifu_compress_ctl : input clock : Clock input reset : UInt<1> - output io : {flip din : UInt<16>, dout : UInt<32>, l1 : UInt<32>, l2 : UInt<32>, l3 : UInt<32>, legal : UInt<1>, rdd : UInt<5>, rdpd : UInt<5>, rs2d : UInt<5>, rs2pd : UInt<5>, o : UInt<32>, sjaloffset11_1 : UInt<1>, sluimm17_12 : UInt<1>} + output io : {flip din : UInt<16>, dout : UInt<32>, l1 : UInt<32>, l2 : UInt<32>, l3 : UInt<32>, legal : UInt<1>, rdd : UInt<5>, rdpd : UInt<5>, rs2d : UInt<5>, rs2pd : UInt<5>, o : UInt<32>, l2_19 : UInt, l2_31 : UInt} wire out : UInt<1>[32] @[el2_ifu_compress_ctl.scala 26:17] out[0] <= UInt<1>("h00") @[el2_ifu_compress_ctl.scala 27:7] @@ -1202,7 +1202,7 @@ circuit el2_ifu_compress_ctl : node _T_1128 = and(_T_1124, _T_1125) @[el2_ifu_compress_ctl.scala 25:110] node _T_1129 = and(_T_1128, _T_1126) @[el2_ifu_compress_ctl.scala 25:110] node _T_1130 = and(_T_1129, _T_1127) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1131 = or(_T_1122, _T_1130) @[el2_ifu_compress_ctl.scala 112:70] + node _T_1131 = or(_T_1122, _T_1130) @[el2_ifu_compress_ctl.scala 113:29] node _T_1132 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1133 = eq(_T_1132, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1134 = bits(io.din, 14, 14) @[el2_ifu_compress_ctl.scala 25:71] @@ -1211,7 +1211,7 @@ circuit el2_ifu_compress_ctl : node _T_1137 = and(_T_1133, _T_1134) @[el2_ifu_compress_ctl.scala 25:110] node _T_1138 = and(_T_1137, _T_1135) @[el2_ifu_compress_ctl.scala 25:110] node _T_1139 = and(_T_1138, _T_1136) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1140 = or(_T_1131, _T_1139) @[el2_ifu_compress_ctl.scala 112:95] + node _T_1140 = or(_T_1131, _T_1139) @[el2_ifu_compress_ctl.scala 114:28] node _T_1141 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1142 = eq(_T_1141, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1143 = bits(io.din, 14, 14) @[el2_ifu_compress_ctl.scala 25:71] @@ -1220,7 +1220,7 @@ circuit el2_ifu_compress_ctl : node _T_1146 = and(_T_1142, _T_1143) @[el2_ifu_compress_ctl.scala 25:110] node _T_1147 = and(_T_1146, _T_1144) @[el2_ifu_compress_ctl.scala 25:110] node _T_1148 = and(_T_1147, _T_1145) @[el2_ifu_compress_ctl.scala 25:110] - node sluimm17_12 = or(_T_1140, _T_1148) @[el2_ifu_compress_ctl.scala 113:29] + node sluimm17_12 = or(_T_1140, _T_1148) @[el2_ifu_compress_ctl.scala 115:29] node _T_1149 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:71] node _T_1150 = bits(io.din, 14, 14) @[el2_ifu_compress_ctl.scala 25:90] node _T_1151 = eq(_T_1150, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] @@ -1240,14 +1240,14 @@ circuit el2_ifu_compress_ctl : node _T_1165 = bits(io.din, 1, 1) @[el2_ifu_compress_ctl.scala 25:71] node _T_1166 = and(_T_1162, _T_1164) @[el2_ifu_compress_ctl.scala 25:110] node _T_1167 = and(_T_1166, _T_1165) @[el2_ifu_compress_ctl.scala 25:110] - node uimm5_0 = or(_T_1160, _T_1167) @[el2_ifu_compress_ctl.scala 114:45] + node uimm5_0 = or(_T_1160, _T_1167) @[el2_ifu_compress_ctl.scala 117:45] node _T_1168 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:71] node _T_1169 = bits(io.din, 1, 1) @[el2_ifu_compress_ctl.scala 25:90] node _T_1170 = eq(_T_1169, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1171 = and(_T_1168, _T_1170) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1172 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 115:44] - node _T_1173 = eq(_T_1172, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 115:37] - node uswimm6_2 = and(_T_1171, _T_1173) @[el2_ifu_compress_ctl.scala 115:35] + node _T_1172 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 118:44] + node _T_1173 = eq(_T_1172, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 118:37] + node uswimm6_2 = and(_T_1171, _T_1173) @[el2_ifu_compress_ctl.scala 118:35] node _T_1174 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:71] node _T_1175 = bits(io.din, 14, 14) @[el2_ifu_compress_ctl.scala 25:71] node _T_1176 = bits(io.din, 1, 1) @[el2_ifu_compress_ctl.scala 25:71] @@ -1263,11 +1263,11 @@ circuit el2_ifu_compress_ctl : node _T_1184 = cat(out[11], out[10]) @[Cat.scala 29:58] node _T_1185 = cat(_T_1184, out[9]) @[Cat.scala 29:58] node _T_1186 = cat(_T_1185, _T_1183) @[Cat.scala 29:58] - node _T_1187 = bits(rdrd, 0, 0) @[el2_ifu_compress_ctl.scala 119:81] - node _T_1188 = bits(rdprd, 0, 0) @[el2_ifu_compress_ctl.scala 120:9] - node _T_1189 = bits(rs2prd, 0, 0) @[el2_ifu_compress_ctl.scala 120:30] - node _T_1190 = bits(rdeq1, 0, 0) @[el2_ifu_compress_ctl.scala 120:51] - node _T_1191 = bits(rdeq2, 0, 0) @[el2_ifu_compress_ctl.scala 120:75] + node _T_1187 = bits(rdrd, 0, 0) @[el2_ifu_compress_ctl.scala 122:81] + node _T_1188 = bits(rdprd, 0, 0) @[el2_ifu_compress_ctl.scala 123:9] + node _T_1189 = bits(rs2prd, 0, 0) @[el2_ifu_compress_ctl.scala 123:30] + node _T_1190 = bits(rdeq1, 0, 0) @[el2_ifu_compress_ctl.scala 123:51] + node _T_1191 = bits(rdeq2, 0, 0) @[el2_ifu_compress_ctl.scala 123:75] node _T_1192 = mux(_T_1187, rdd, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1193 = mux(_T_1188, rdpd, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1194 = mux(_T_1189, rs2pd, UInt<1>("h00")) @[Mux.scala 27:72] @@ -1279,16 +1279,16 @@ circuit el2_ifu_compress_ctl : node _T_1200 = or(_T_1199, _T_1196) @[Mux.scala 27:72] wire _T_1201 : UInt<5> @[Mux.scala 27:72] _T_1201 <= _T_1200 @[Mux.scala 27:72] - node l1_11 = or(_T_1186, _T_1201) @[el2_ifu_compress_ctl.scala 119:64] + node l1_11 = or(_T_1186, _T_1201) @[el2_ifu_compress_ctl.scala 122:64] node _T_1202 = cat(out[14], out[13]) @[Cat.scala 29:58] node l1_14 = cat(_T_1202, out[12]) @[Cat.scala 29:58] node _T_1203 = cat(out[16], out[15]) @[Cat.scala 29:58] node _T_1204 = cat(out[19], out[18]) @[Cat.scala 29:58] node _T_1205 = cat(_T_1204, out[17]) @[Cat.scala 29:58] node _T_1206 = cat(_T_1205, _T_1203) @[Cat.scala 29:58] - node _T_1207 = bits(rdrs1, 0, 0) @[el2_ifu_compress_ctl.scala 124:85] - node _T_1208 = bits(rdprs1, 0, 0) @[el2_ifu_compress_ctl.scala 125:12] - node _T_1209 = bits(rs1eq2, 0, 0) @[el2_ifu_compress_ctl.scala 125:33] + node _T_1207 = bits(rdrs1, 0, 0) @[el2_ifu_compress_ctl.scala 127:85] + node _T_1208 = bits(rdprs1, 0, 0) @[el2_ifu_compress_ctl.scala 128:12] + node _T_1209 = bits(rs1eq2, 0, 0) @[el2_ifu_compress_ctl.scala 128:33] node _T_1210 = mux(_T_1207, rdd, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1211 = mux(_T_1208, rdpd, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1212 = mux(_T_1209, UInt<5>("h02"), UInt<1>("h00")) @[Mux.scala 27:72] @@ -1296,19 +1296,19 @@ circuit el2_ifu_compress_ctl : node _T_1214 = or(_T_1213, _T_1212) @[Mux.scala 27:72] wire _T_1215 : UInt<5> @[Mux.scala 27:72] _T_1215 <= _T_1214 @[Mux.scala 27:72] - node l1_19 = or(_T_1206, _T_1215) @[el2_ifu_compress_ctl.scala 124:67] + node l1_19 = or(_T_1206, _T_1215) @[el2_ifu_compress_ctl.scala 127:67] node _T_1216 = cat(out[21], out[20]) @[Cat.scala 29:58] node _T_1217 = cat(out[24], out[23]) @[Cat.scala 29:58] node _T_1218 = cat(_T_1217, out[22]) @[Cat.scala 29:58] node _T_1219 = cat(_T_1218, _T_1216) @[Cat.scala 29:58] - node _T_1220 = bits(rs2rs2, 0, 0) @[el2_ifu_compress_ctl.scala 127:86] - node _T_1221 = bits(rs2prs2, 0, 0) @[el2_ifu_compress_ctl.scala 128:13] + node _T_1220 = bits(rs2rs2, 0, 0) @[el2_ifu_compress_ctl.scala 130:86] + node _T_1221 = bits(rs2prs2, 0, 0) @[el2_ifu_compress_ctl.scala 131:13] node _T_1222 = mux(_T_1220, rs2d, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1223 = mux(_T_1221, rs2pd, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1224 = or(_T_1222, _T_1223) @[Mux.scala 27:72] wire _T_1225 : UInt<5> @[Mux.scala 27:72] _T_1225 <= _T_1224 @[Mux.scala 27:72] - node l1_24 = or(_T_1219, _T_1225) @[el2_ifu_compress_ctl.scala 127:67] + node l1_24 = or(_T_1219, _T_1225) @[el2_ifu_compress_ctl.scala 130:67] node _T_1226 = cat(out[27], out[26]) @[Cat.scala 29:58] node _T_1227 = cat(_T_1226, out[25]) @[Cat.scala 29:58] node _T_1228 = cat(out[29], out[28]) @[Cat.scala 29:58] @@ -1320,47 +1320,47 @@ circuit el2_ifu_compress_ctl : node _T_1233 = cat(l1_31, l1_24) @[Cat.scala 29:58] node _T_1234 = cat(_T_1233, l1_19) @[Cat.scala 29:58] node l1 = cat(_T_1234, _T_1232) @[Cat.scala 29:58] - node _T_1235 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 132:26] - node _T_1236 = bits(io.din, 6, 2) @[el2_ifu_compress_ctl.scala 132:38] + node _T_1235 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 135:26] + node _T_1236 = bits(io.din, 6, 2) @[el2_ifu_compress_ctl.scala 135:38] node simm5d = cat(_T_1235, _T_1236) @[Cat.scala 29:58] - node _T_1237 = bits(io.din, 10, 7) @[el2_ifu_compress_ctl.scala 133:26] - node _T_1238 = bits(io.din, 12, 11) @[el2_ifu_compress_ctl.scala 133:40] - node _T_1239 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 133:55] - node _T_1240 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 133:66] + node _T_1237 = bits(io.din, 10, 7) @[el2_ifu_compress_ctl.scala 136:26] + node _T_1238 = bits(io.din, 12, 11) @[el2_ifu_compress_ctl.scala 136:40] + node _T_1239 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 136:55] + node _T_1240 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 136:66] node _T_1241 = cat(_T_1239, _T_1240) @[Cat.scala 29:58] node _T_1242 = cat(_T_1237, _T_1238) @[Cat.scala 29:58] node uimm9d = cat(_T_1242, _T_1241) @[Cat.scala 29:58] - node _T_1243 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 134:26] - node _T_1244 = bits(io.din, 4, 3) @[el2_ifu_compress_ctl.scala 134:38] - node _T_1245 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 134:51] - node _T_1246 = bits(io.din, 2, 2) @[el2_ifu_compress_ctl.scala 134:62] - node _T_1247 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 134:73] + node _T_1243 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 137:26] + node _T_1244 = bits(io.din, 4, 3) @[el2_ifu_compress_ctl.scala 137:38] + node _T_1245 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 137:51] + node _T_1246 = bits(io.din, 2, 2) @[el2_ifu_compress_ctl.scala 137:62] + node _T_1247 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 137:73] node _T_1248 = cat(_T_1246, _T_1247) @[Cat.scala 29:58] node _T_1249 = cat(_T_1243, _T_1244) @[Cat.scala 29:58] node _T_1250 = cat(_T_1249, _T_1245) @[Cat.scala 29:58] node simm9d = cat(_T_1250, _T_1248) @[Cat.scala 29:58] - node _T_1251 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 135:28] - node _T_1252 = bits(io.din, 12, 10) @[el2_ifu_compress_ctl.scala 135:39] - node _T_1253 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 135:54] + node _T_1251 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 138:28] + node _T_1252 = bits(io.din, 12, 10) @[el2_ifu_compress_ctl.scala 138:39] + node _T_1253 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 138:54] node _T_1254 = cat(_T_1251, _T_1252) @[Cat.scala 29:58] node ulwimm6d = cat(_T_1254, _T_1253) @[Cat.scala 29:58] - node _T_1255 = bits(io.din, 3, 2) @[el2_ifu_compress_ctl.scala 136:30] - node _T_1256 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 136:43] - node _T_1257 = bits(io.din, 6, 4) @[el2_ifu_compress_ctl.scala 136:55] + node _T_1255 = bits(io.din, 3, 2) @[el2_ifu_compress_ctl.scala 139:30] + node _T_1256 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 139:43] + node _T_1257 = bits(io.din, 6, 4) @[el2_ifu_compress_ctl.scala 139:55] node _T_1258 = cat(_T_1255, _T_1256) @[Cat.scala 29:58] node ulwspimm7d = cat(_T_1258, _T_1257) @[Cat.scala 29:58] - node _T_1259 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 137:26] - node _T_1260 = bits(io.din, 6, 2) @[el2_ifu_compress_ctl.scala 137:38] + node _T_1259 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 140:26] + node _T_1260 = bits(io.din, 6, 2) @[el2_ifu_compress_ctl.scala 140:38] node uimm5d = cat(_T_1259, _T_1260) @[Cat.scala 29:58] - node _T_1261 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 138:27] - node _T_1262 = bits(io.din, 8, 8) @[el2_ifu_compress_ctl.scala 138:39] - node _T_1263 = bits(io.din, 10, 9) @[el2_ifu_compress_ctl.scala 138:50] - node _T_1264 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 138:64] - node _T_1265 = bits(io.din, 7, 7) @[el2_ifu_compress_ctl.scala 138:75] - node _T_1266 = bits(io.din, 2, 2) @[el2_ifu_compress_ctl.scala 138:86] - node _T_1267 = bits(io.din, 11, 11) @[el2_ifu_compress_ctl.scala 138:97] - node _T_1268 = bits(io.din, 5, 4) @[el2_ifu_compress_ctl.scala 139:11] - node _T_1269 = bits(io.din, 3, 3) @[el2_ifu_compress_ctl.scala 139:24] + node _T_1261 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 141:27] + node _T_1262 = bits(io.din, 8, 8) @[el2_ifu_compress_ctl.scala 141:39] + node _T_1263 = bits(io.din, 10, 9) @[el2_ifu_compress_ctl.scala 141:50] + node _T_1264 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 141:64] + node _T_1265 = bits(io.din, 7, 7) @[el2_ifu_compress_ctl.scala 141:75] + node _T_1266 = bits(io.din, 2, 2) @[el2_ifu_compress_ctl.scala 141:86] + node _T_1267 = bits(io.din, 11, 11) @[el2_ifu_compress_ctl.scala 141:97] + node _T_1268 = bits(io.din, 5, 4) @[el2_ifu_compress_ctl.scala 142:11] + node _T_1269 = bits(io.din, 3, 3) @[el2_ifu_compress_ctl.scala 142:24] node _T_1270 = cat(_T_1268, _T_1269) @[Cat.scala 29:58] node _T_1271 = cat(_T_1266, _T_1267) @[Cat.scala 29:58] node _T_1272 = cat(_T_1271, _T_1270) @[Cat.scala 29:58] @@ -1369,46 +1369,46 @@ circuit el2_ifu_compress_ctl : node _T_1275 = cat(_T_1274, _T_1263) @[Cat.scala 29:58] node _T_1276 = cat(_T_1275, _T_1273) @[Cat.scala 29:58] node sjald_1 = cat(_T_1276, _T_1272) @[Cat.scala 29:58] - node _T_1277 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 140:32] + node _T_1277 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 143:32] node _T_1278 = bits(_T_1277, 0, 0) @[Bitwise.scala 72:15] node sjald_12 = mux(_T_1278, UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12] node sjald = cat(sjald_12, sjald_1) @[Cat.scala 29:58] - node _T_1279 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 142:36] + node _T_1279 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 145:36] node _T_1280 = bits(_T_1279, 0, 0) @[Bitwise.scala 72:15] node _T_1281 = mux(_T_1280, UInt<15>("h07fff"), UInt<15>("h00")) @[Bitwise.scala 72:12] - node _T_1282 = bits(io.din, 6, 2) @[el2_ifu_compress_ctl.scala 142:49] + node _T_1282 = bits(io.din, 6, 2) @[el2_ifu_compress_ctl.scala 145:49] node sluimmd = cat(_T_1281, _T_1282) @[Cat.scala 29:58] - node _T_1283 = bits(l1, 31, 20) @[el2_ifu_compress_ctl.scala 144:17] - node _T_1284 = bits(simm5_0, 0, 0) @[el2_ifu_compress_ctl.scala 145:23] - node _T_1285 = bits(simm5d, 5, 5) @[el2_ifu_compress_ctl.scala 145:49] + node _T_1283 = bits(l1, 31, 20) @[el2_ifu_compress_ctl.scala 147:17] + node _T_1284 = bits(simm5_0, 0, 0) @[el2_ifu_compress_ctl.scala 148:23] + node _T_1285 = bits(simm5d, 5, 5) @[el2_ifu_compress_ctl.scala 148:49] node _T_1286 = bits(_T_1285, 0, 0) @[Bitwise.scala 72:15] node _T_1287 = mux(_T_1286, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12] - node _T_1288 = bits(simm5d, 4, 0) @[el2_ifu_compress_ctl.scala 145:60] + node _T_1288 = bits(simm5d, 4, 0) @[el2_ifu_compress_ctl.scala 148:60] node _T_1289 = cat(_T_1287, _T_1288) @[Cat.scala 29:58] - node _T_1290 = bits(uimm9_2, 0, 0) @[el2_ifu_compress_ctl.scala 146:23] + node _T_1290 = bits(uimm9_2, 0, 0) @[el2_ifu_compress_ctl.scala 149:23] node _T_1291 = cat(UInt<2>("h00"), uimm9d) @[Cat.scala 29:58] node _T_1292 = cat(_T_1291, UInt<2>("h00")) @[Cat.scala 29:58] - node _T_1293 = bits(simm9_4, 0, 0) @[el2_ifu_compress_ctl.scala 147:23] - node _T_1294 = bits(simm9d, 5, 5) @[el2_ifu_compress_ctl.scala 147:49] + node _T_1293 = bits(simm9_4, 0, 0) @[el2_ifu_compress_ctl.scala 150:23] + node _T_1294 = bits(simm9d, 5, 5) @[el2_ifu_compress_ctl.scala 150:49] node _T_1295 = bits(_T_1294, 0, 0) @[Bitwise.scala 72:15] node _T_1296 = mux(_T_1295, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] - node _T_1297 = bits(simm9d, 4, 0) @[el2_ifu_compress_ctl.scala 147:60] + node _T_1297 = bits(simm9d, 4, 0) @[el2_ifu_compress_ctl.scala 150:60] node _T_1298 = cat(_T_1296, _T_1297) @[Cat.scala 29:58] node _T_1299 = cat(_T_1298, UInt<4>("h00")) @[Cat.scala 29:58] - node _T_1300 = bits(ulwimm6_2, 0, 0) @[el2_ifu_compress_ctl.scala 148:25] + node _T_1300 = bits(ulwimm6_2, 0, 0) @[el2_ifu_compress_ctl.scala 151:25] node _T_1301 = cat(UInt<5>("h00"), ulwimm6d) @[Cat.scala 29:58] node _T_1302 = cat(_T_1301, UInt<2>("h00")) @[Cat.scala 29:58] - node _T_1303 = bits(ulwspimm7_2, 0, 0) @[el2_ifu_compress_ctl.scala 149:27] + node _T_1303 = bits(ulwspimm7_2, 0, 0) @[el2_ifu_compress_ctl.scala 152:27] node _T_1304 = cat(UInt<4>("h00"), ulwspimm7d) @[Cat.scala 29:58] node _T_1305 = cat(_T_1304, UInt<2>("h00")) @[Cat.scala 29:58] - node _T_1306 = bits(uimm5_0, 0, 0) @[el2_ifu_compress_ctl.scala 150:23] + node _T_1306 = bits(uimm5_0, 0, 0) @[el2_ifu_compress_ctl.scala 153:23] node _T_1307 = cat(UInt<6>("h00"), uimm5d) @[Cat.scala 29:58] - node _T_1308 = bits(sjald, 19, 19) @[el2_ifu_compress_ctl.scala 151:40] - node _T_1309 = bits(sjald, 9, 0) @[el2_ifu_compress_ctl.scala 151:50] - node _T_1310 = bits(sjald, 10, 10) @[el2_ifu_compress_ctl.scala 151:61] + node _T_1308 = bits(sjald, 19, 19) @[el2_ifu_compress_ctl.scala 154:40] + node _T_1309 = bits(sjald, 9, 0) @[el2_ifu_compress_ctl.scala 154:50] + node _T_1310 = bits(sjald, 10, 10) @[el2_ifu_compress_ctl.scala 154:61] node _T_1311 = cat(_T_1308, _T_1309) @[Cat.scala 29:58] node _T_1312 = cat(_T_1311, _T_1310) @[Cat.scala 29:58] - node _T_1313 = bits(sluimmd, 19, 8) @[el2_ifu_compress_ctl.scala 152:35] + node _T_1313 = bits(sluimmd, 19, 8) @[el2_ifu_compress_ctl.scala 155:35] node _T_1314 = mux(_T_1284, _T_1289, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1315 = mux(_T_1290, _T_1292, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1316 = mux(_T_1293, _T_1299, UInt<1>("h00")) @[Mux.scala 27:72] @@ -1426,29 +1426,29 @@ circuit el2_ifu_compress_ctl : node _T_1328 = or(_T_1327, _T_1321) @[Mux.scala 27:72] wire _T_1329 : UInt<12> @[Mux.scala 27:72] _T_1329 <= _T_1328 @[Mux.scala 27:72] - node l2_31 = or(_T_1283, _T_1329) @[el2_ifu_compress_ctl.scala 144:25] - node _T_1330 = bits(l1, 19, 12) @[el2_ifu_compress_ctl.scala 154:17] - node _T_1331 = bits(sjaloffset11_1, 0, 0) @[el2_ifu_compress_ctl.scala 154:52] - node _T_1332 = bits(sjald, 19, 11) @[el2_ifu_compress_ctl.scala 154:65] - node _T_1333 = bits(sluimm17_12, 0, 0) @[el2_ifu_compress_ctl.scala 155:17] - node _T_1334 = bits(sluimmd, 7, 0) @[el2_ifu_compress_ctl.scala 155:32] + node l2_31 = or(_T_1283, _T_1329) @[el2_ifu_compress_ctl.scala 147:25] + node _T_1330 = bits(l1, 19, 12) @[el2_ifu_compress_ctl.scala 157:17] + node _T_1331 = bits(sjaloffset11_1, 0, 0) @[el2_ifu_compress_ctl.scala 157:52] + node _T_1332 = bits(sjald, 19, 11) @[el2_ifu_compress_ctl.scala 157:65] + node _T_1333 = bits(sluimm17_12, 0, 0) @[el2_ifu_compress_ctl.scala 158:17] + node _T_1334 = bits(sluimmd, 7, 0) @[el2_ifu_compress_ctl.scala 158:32] node _T_1335 = mux(_T_1331, _T_1332, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1336 = mux(_T_1333, _T_1334, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1337 = or(_T_1335, _T_1336) @[Mux.scala 27:72] wire _T_1338 : UInt<9> @[Mux.scala 27:72] _T_1338 <= _T_1337 @[Mux.scala 27:72] - node l2_19 = or(_T_1330, _T_1338) @[el2_ifu_compress_ctl.scala 154:25] - node _T_1339 = bits(l1, 11, 0) @[el2_ifu_compress_ctl.scala 156:32] + node l2_19 = or(_T_1330, _T_1338) @[el2_ifu_compress_ctl.scala 157:25] + node _T_1339 = bits(l1, 11, 0) @[el2_ifu_compress_ctl.scala 159:32] node _T_1340 = cat(l2_31, l2_19) @[Cat.scala 29:58] node l2 = cat(_T_1340, _T_1339) @[Cat.scala 29:58] - node _T_1341 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 157:25] - node _T_1342 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 157:36] - node _T_1343 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 157:46] - node _T_1344 = bits(io.din, 2, 2) @[el2_ifu_compress_ctl.scala 157:56] - node _T_1345 = bits(io.din, 11, 11) @[el2_ifu_compress_ctl.scala 157:66] - node _T_1346 = bits(io.din, 10, 10) @[el2_ifu_compress_ctl.scala 157:77] - node _T_1347 = bits(io.din, 4, 4) @[el2_ifu_compress_ctl.scala 157:88] - node _T_1348 = bits(io.din, 3, 3) @[el2_ifu_compress_ctl.scala 157:98] + node _T_1341 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 162:25] + node _T_1342 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 162:36] + node _T_1343 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 162:46] + node _T_1344 = bits(io.din, 2, 2) @[el2_ifu_compress_ctl.scala 162:56] + node _T_1345 = bits(io.din, 11, 11) @[el2_ifu_compress_ctl.scala 162:66] + node _T_1346 = bits(io.din, 10, 10) @[el2_ifu_compress_ctl.scala 162:77] + node _T_1347 = bits(io.din, 4, 4) @[el2_ifu_compress_ctl.scala 162:88] + node _T_1348 = bits(io.din, 3, 3) @[el2_ifu_compress_ctl.scala 162:98] node _T_1349 = cat(_T_1348, UInt<1>("h00")) @[Cat.scala 29:58] node _T_1350 = cat(_T_1346, _T_1347) @[Cat.scala 29:58] node _T_1351 = cat(_T_1350, _T_1349) @[Cat.scala 29:58] @@ -1457,28 +1457,28 @@ circuit el2_ifu_compress_ctl : node _T_1354 = cat(_T_1353, _T_1343) @[Cat.scala 29:58] node _T_1355 = cat(_T_1354, _T_1352) @[Cat.scala 29:58] node sbr8d = cat(_T_1355, _T_1351) @[Cat.scala 29:58] - node _T_1356 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 158:28] - node _T_1357 = bits(io.din, 12, 10) @[el2_ifu_compress_ctl.scala 158:39] - node _T_1358 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 158:54] + node _T_1356 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 163:28] + node _T_1357 = bits(io.din, 12, 10) @[el2_ifu_compress_ctl.scala 163:39] + node _T_1358 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 163:54] node _T_1359 = cat(_T_1358, UInt<2>("h00")) @[Cat.scala 29:58] node _T_1360 = cat(_T_1356, _T_1357) @[Cat.scala 29:58] node uswimm6d = cat(_T_1360, _T_1359) @[Cat.scala 29:58] - node _T_1361 = bits(io.din, 8, 7) @[el2_ifu_compress_ctl.scala 159:30] - node _T_1362 = bits(io.din, 12, 9) @[el2_ifu_compress_ctl.scala 159:42] + node _T_1361 = bits(io.din, 8, 7) @[el2_ifu_compress_ctl.scala 164:30] + node _T_1362 = bits(io.din, 12, 9) @[el2_ifu_compress_ctl.scala 164:42] node _T_1363 = cat(_T_1361, _T_1362) @[Cat.scala 29:58] node uswspimm7d = cat(_T_1363, UInt<2>("h00")) @[Cat.scala 29:58] - node _T_1364 = bits(l2, 31, 25) @[el2_ifu_compress_ctl.scala 160:17] - node _T_1365 = bits(sbroffset8_1, 0, 0) @[el2_ifu_compress_ctl.scala 160:50] - node _T_1366 = bits(sbr8d, 8, 8) @[el2_ifu_compress_ctl.scala 160:74] + node _T_1364 = bits(l2, 31, 25) @[el2_ifu_compress_ctl.scala 165:17] + node _T_1365 = bits(sbroffset8_1, 0, 0) @[el2_ifu_compress_ctl.scala 165:50] + node _T_1366 = bits(sbr8d, 8, 8) @[el2_ifu_compress_ctl.scala 165:74] node _T_1367 = bits(_T_1366, 0, 0) @[Bitwise.scala 72:15] node _T_1368 = mux(_T_1367, UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12] - node _T_1369 = bits(sbr8d, 7, 5) @[el2_ifu_compress_ctl.scala 160:84] + node _T_1369 = bits(sbr8d, 7, 5) @[el2_ifu_compress_ctl.scala 165:84] node _T_1370 = cat(_T_1368, _T_1369) @[Cat.scala 29:58] - node _T_1371 = bits(uswimm6_2, 0, 0) @[el2_ifu_compress_ctl.scala 161:15] - node _T_1372 = bits(uswimm6d, 6, 5) @[el2_ifu_compress_ctl.scala 161:44] + node _T_1371 = bits(uswimm6_2, 0, 0) @[el2_ifu_compress_ctl.scala 166:15] + node _T_1372 = bits(uswimm6d, 6, 5) @[el2_ifu_compress_ctl.scala 166:44] node _T_1373 = cat(UInt<5>("h00"), _T_1372) @[Cat.scala 29:58] - node _T_1374 = bits(uswspimm7_2, 0, 0) @[el2_ifu_compress_ctl.scala 162:17] - node _T_1375 = bits(uswspimm7d, 7, 5) @[el2_ifu_compress_ctl.scala 162:48] + node _T_1374 = bits(uswspimm7_2, 0, 0) @[el2_ifu_compress_ctl.scala 167:17] + node _T_1375 = bits(uswspimm7d, 7, 5) @[el2_ifu_compress_ctl.scala 167:48] node _T_1376 = cat(UInt<4>("h00"), _T_1375) @[Cat.scala 29:58] node _T_1377 = mux(_T_1365, _T_1370, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1378 = mux(_T_1371, _T_1373, UInt<1>("h00")) @[Mux.scala 27:72] @@ -1487,17 +1487,17 @@ circuit el2_ifu_compress_ctl : node _T_1381 = or(_T_1380, _T_1379) @[Mux.scala 27:72] wire _T_1382 : UInt<7> @[Mux.scala 27:72] _T_1382 <= _T_1381 @[Mux.scala 27:72] - node l3_31 = or(_T_1364, _T_1382) @[el2_ifu_compress_ctl.scala 160:25] - node l3_24 = bits(l2, 24, 12) @[el2_ifu_compress_ctl.scala 163:17] - node _T_1383 = bits(l2, 11, 7) @[el2_ifu_compress_ctl.scala 164:17] - node _T_1384 = bits(sbroffset8_1, 0, 0) @[el2_ifu_compress_ctl.scala 164:49] - node _T_1385 = bits(sbr8d, 4, 1) @[el2_ifu_compress_ctl.scala 164:66] - node _T_1386 = bits(sbr8d, 8, 8) @[el2_ifu_compress_ctl.scala 164:78] + node l3_31 = or(_T_1364, _T_1382) @[el2_ifu_compress_ctl.scala 165:25] + node l3_24 = bits(l2, 24, 12) @[el2_ifu_compress_ctl.scala 168:17] + node _T_1383 = bits(l2, 11, 7) @[el2_ifu_compress_ctl.scala 169:17] + node _T_1384 = bits(sbroffset8_1, 0, 0) @[el2_ifu_compress_ctl.scala 169:49] + node _T_1385 = bits(sbr8d, 4, 1) @[el2_ifu_compress_ctl.scala 169:66] + node _T_1386 = bits(sbr8d, 8, 8) @[el2_ifu_compress_ctl.scala 169:78] node _T_1387 = cat(_T_1385, _T_1386) @[Cat.scala 29:58] - node _T_1388 = bits(uswimm6_2, 0, 0) @[el2_ifu_compress_ctl.scala 165:15] - node _T_1389 = bits(uswimm6d, 4, 0) @[el2_ifu_compress_ctl.scala 165:31] - node _T_1390 = bits(uswspimm7_2, 0, 0) @[el2_ifu_compress_ctl.scala 166:17] - node _T_1391 = bits(uswspimm7d, 4, 0) @[el2_ifu_compress_ctl.scala 166:35] + node _T_1388 = bits(uswimm6_2, 0, 0) @[el2_ifu_compress_ctl.scala 170:15] + node _T_1389 = bits(uswimm6d, 4, 0) @[el2_ifu_compress_ctl.scala 170:31] + node _T_1390 = bits(uswspimm7_2, 0, 0) @[el2_ifu_compress_ctl.scala 171:17] + node _T_1391 = bits(uswspimm7d, 4, 0) @[el2_ifu_compress_ctl.scala 171:35] node _T_1392 = mux(_T_1384, _T_1387, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1393 = mux(_T_1388, _T_1389, UInt<1>("h00")) @[Mux.scala 27:72] node _T_1394 = mux(_T_1390, _T_1391, UInt<1>("h00")) @[Mux.scala 27:72] @@ -1505,8 +1505,8 @@ circuit el2_ifu_compress_ctl : node _T_1396 = or(_T_1395, _T_1394) @[Mux.scala 27:72] wire _T_1397 : UInt<5> @[Mux.scala 27:72] _T_1397 <= _T_1396 @[Mux.scala 27:72] - node l3_11 = or(_T_1383, _T_1397) @[el2_ifu_compress_ctl.scala 164:24] - node _T_1398 = bits(l2, 6, 0) @[el2_ifu_compress_ctl.scala 167:39] + node l3_11 = or(_T_1383, _T_1397) @[el2_ifu_compress_ctl.scala 169:24] + node _T_1398 = bits(l2, 6, 0) @[el2_ifu_compress_ctl.scala 172:39] node _T_1399 = cat(l3_11, _T_1398) @[Cat.scala 29:58] node _T_1400 = cat(l3_31, l3_24) @[Cat.scala 29:58] node l3 = cat(_T_1400, _T_1399) @[Cat.scala 29:58] @@ -1519,9 +1519,9 @@ circuit el2_ifu_compress_ctl : node _T_1407 = and(_T_1402, _T_1404) @[el2_ifu_compress_ctl.scala 25:110] node _T_1408 = and(_T_1407, _T_1405) @[el2_ifu_compress_ctl.scala 25:110] node _T_1409 = and(_T_1408, _T_1406) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1410 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 169:48] - node _T_1411 = eq(_T_1410, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 169:41] - node _T_1412 = and(_T_1409, _T_1411) @[el2_ifu_compress_ctl.scala 169:39] + node _T_1410 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 174:48] + node _T_1411 = eq(_T_1410, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 174:41] + node _T_1412 = and(_T_1409, _T_1411) @[el2_ifu_compress_ctl.scala 174:39] node _T_1413 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1414 = eq(_T_1413, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1415 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1531,10 +1531,10 @@ circuit el2_ifu_compress_ctl : node _T_1419 = and(_T_1414, _T_1416) @[el2_ifu_compress_ctl.scala 25:110] node _T_1420 = and(_T_1419, _T_1417) @[el2_ifu_compress_ctl.scala 25:110] node _T_1421 = and(_T_1420, _T_1418) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1422 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 169:88] - node _T_1423 = eq(_T_1422, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 169:81] - node _T_1424 = and(_T_1421, _T_1423) @[el2_ifu_compress_ctl.scala 169:79] - node _T_1425 = or(_T_1412, _T_1424) @[el2_ifu_compress_ctl.scala 169:54] + node _T_1422 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 174:88] + node _T_1423 = eq(_T_1422, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 174:81] + node _T_1424 = and(_T_1421, _T_1423) @[el2_ifu_compress_ctl.scala 174:79] + node _T_1425 = or(_T_1412, _T_1424) @[el2_ifu_compress_ctl.scala 174:54] node _T_1426 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1427 = eq(_T_1426, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1428 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] @@ -1545,7 +1545,7 @@ circuit el2_ifu_compress_ctl : node _T_1433 = and(_T_1427, _T_1429) @[el2_ifu_compress_ctl.scala 25:110] node _T_1434 = and(_T_1433, _T_1430) @[el2_ifu_compress_ctl.scala 25:110] node _T_1435 = and(_T_1434, _T_1432) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1436 = or(_T_1425, _T_1435) @[el2_ifu_compress_ctl.scala 169:94] + node _T_1436 = or(_T_1425, _T_1435) @[el2_ifu_compress_ctl.scala 174:94] node _T_1437 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1438 = eq(_T_1437, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1439 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1555,10 +1555,10 @@ circuit el2_ifu_compress_ctl : node _T_1443 = and(_T_1438, _T_1440) @[el2_ifu_compress_ctl.scala 25:110] node _T_1444 = and(_T_1443, _T_1441) @[el2_ifu_compress_ctl.scala 25:110] node _T_1445 = and(_T_1444, _T_1442) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1446 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 170:64] - node _T_1447 = eq(_T_1446, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 170:57] - node _T_1448 = and(_T_1445, _T_1447) @[el2_ifu_compress_ctl.scala 170:55] - node _T_1449 = or(_T_1436, _T_1448) @[el2_ifu_compress_ctl.scala 170:30] + node _T_1446 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 175:64] + node _T_1447 = eq(_T_1446, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 175:57] + node _T_1448 = and(_T_1445, _T_1447) @[el2_ifu_compress_ctl.scala 175:55] + node _T_1449 = or(_T_1436, _T_1448) @[el2_ifu_compress_ctl.scala 175:30] node _T_1450 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1451 = eq(_T_1450, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1452 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1568,10 +1568,10 @@ circuit el2_ifu_compress_ctl : node _T_1456 = and(_T_1451, _T_1453) @[el2_ifu_compress_ctl.scala 25:110] node _T_1457 = and(_T_1456, _T_1454) @[el2_ifu_compress_ctl.scala 25:110] node _T_1458 = and(_T_1457, _T_1455) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1459 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 170:105] - node _T_1460 = eq(_T_1459, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 170:98] - node _T_1461 = and(_T_1458, _T_1460) @[el2_ifu_compress_ctl.scala 170:96] - node _T_1462 = or(_T_1449, _T_1461) @[el2_ifu_compress_ctl.scala 170:70] + node _T_1459 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 175:105] + node _T_1460 = eq(_T_1459, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 175:98] + node _T_1461 = and(_T_1458, _T_1460) @[el2_ifu_compress_ctl.scala 175:96] + node _T_1462 = or(_T_1449, _T_1461) @[el2_ifu_compress_ctl.scala 175:70] node _T_1463 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1464 = eq(_T_1463, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1465 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] @@ -1582,7 +1582,7 @@ circuit el2_ifu_compress_ctl : node _T_1470 = and(_T_1464, _T_1466) @[el2_ifu_compress_ctl.scala 25:110] node _T_1471 = and(_T_1470, _T_1467) @[el2_ifu_compress_ctl.scala 25:110] node _T_1472 = and(_T_1471, _T_1469) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1473 = or(_T_1462, _T_1472) @[el2_ifu_compress_ctl.scala 170:111] + node _T_1473 = or(_T_1462, _T_1472) @[el2_ifu_compress_ctl.scala 175:111] node _T_1474 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:71] node _T_1475 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] node _T_1476 = eq(_T_1475, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] @@ -1592,7 +1592,7 @@ circuit el2_ifu_compress_ctl : node _T_1480 = and(_T_1474, _T_1476) @[el2_ifu_compress_ctl.scala 25:110] node _T_1481 = and(_T_1480, _T_1478) @[el2_ifu_compress_ctl.scala 25:110] node _T_1482 = and(_T_1481, _T_1479) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1483 = or(_T_1473, _T_1482) @[el2_ifu_compress_ctl.scala 171:29] + node _T_1483 = or(_T_1473, _T_1482) @[el2_ifu_compress_ctl.scala 176:29] node _T_1484 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1485 = eq(_T_1484, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1486 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1602,10 +1602,10 @@ circuit el2_ifu_compress_ctl : node _T_1490 = and(_T_1485, _T_1487) @[el2_ifu_compress_ctl.scala 25:110] node _T_1491 = and(_T_1490, _T_1488) @[el2_ifu_compress_ctl.scala 25:110] node _T_1492 = and(_T_1491, _T_1489) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1493 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 171:88] - node _T_1494 = eq(_T_1493, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 171:81] - node _T_1495 = and(_T_1492, _T_1494) @[el2_ifu_compress_ctl.scala 171:79] - node _T_1496 = or(_T_1483, _T_1495) @[el2_ifu_compress_ctl.scala 171:54] + node _T_1493 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 176:88] + node _T_1494 = eq(_T_1493, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 176:81] + node _T_1495 = and(_T_1492, _T_1494) @[el2_ifu_compress_ctl.scala 176:79] + node _T_1496 = or(_T_1483, _T_1495) @[el2_ifu_compress_ctl.scala 176:54] node _T_1497 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] node _T_1498 = eq(_T_1497, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1499 = bits(io.din, 6, 6) @[el2_ifu_compress_ctl.scala 25:71] @@ -1615,7 +1615,7 @@ circuit el2_ifu_compress_ctl : node _T_1503 = and(_T_1498, _T_1499) @[el2_ifu_compress_ctl.scala 25:110] node _T_1504 = and(_T_1503, _T_1501) @[el2_ifu_compress_ctl.scala 25:110] node _T_1505 = and(_T_1504, _T_1502) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1506 = or(_T_1496, _T_1505) @[el2_ifu_compress_ctl.scala 171:94] + node _T_1506 = or(_T_1496, _T_1505) @[el2_ifu_compress_ctl.scala 176:94] node _T_1507 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1508 = eq(_T_1507, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1509 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] @@ -1626,7 +1626,7 @@ circuit el2_ifu_compress_ctl : node _T_1514 = and(_T_1508, _T_1510) @[el2_ifu_compress_ctl.scala 25:110] node _T_1515 = and(_T_1514, _T_1511) @[el2_ifu_compress_ctl.scala 25:110] node _T_1516 = and(_T_1515, _T_1513) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1517 = or(_T_1506, _T_1516) @[el2_ifu_compress_ctl.scala 171:118] + node _T_1517 = or(_T_1506, _T_1516) @[el2_ifu_compress_ctl.scala 176:118] node _T_1518 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1519 = eq(_T_1518, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1520 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1636,10 +1636,10 @@ circuit el2_ifu_compress_ctl : node _T_1524 = and(_T_1519, _T_1521) @[el2_ifu_compress_ctl.scala 25:110] node _T_1525 = and(_T_1524, _T_1522) @[el2_ifu_compress_ctl.scala 25:110] node _T_1526 = and(_T_1525, _T_1523) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1527 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 172:37] - node _T_1528 = eq(_T_1527, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 172:30] - node _T_1529 = and(_T_1526, _T_1528) @[el2_ifu_compress_ctl.scala 172:28] - node _T_1530 = or(_T_1517, _T_1529) @[el2_ifu_compress_ctl.scala 171:144] + node _T_1527 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 177:37] + node _T_1528 = eq(_T_1527, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 177:30] + node _T_1529 = and(_T_1526, _T_1528) @[el2_ifu_compress_ctl.scala 177:28] + node _T_1530 = or(_T_1517, _T_1529) @[el2_ifu_compress_ctl.scala 176:144] node _T_1531 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] node _T_1532 = eq(_T_1531, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1533 = bits(io.din, 5, 5) @[el2_ifu_compress_ctl.scala 25:71] @@ -1649,7 +1649,7 @@ circuit el2_ifu_compress_ctl : node _T_1537 = and(_T_1532, _T_1533) @[el2_ifu_compress_ctl.scala 25:110] node _T_1538 = and(_T_1537, _T_1535) @[el2_ifu_compress_ctl.scala 25:110] node _T_1539 = and(_T_1538, _T_1536) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1540 = or(_T_1530, _T_1539) @[el2_ifu_compress_ctl.scala 172:43] + node _T_1540 = or(_T_1530, _T_1539) @[el2_ifu_compress_ctl.scala 177:43] node _T_1541 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1542 = eq(_T_1541, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1543 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] @@ -1660,7 +1660,7 @@ circuit el2_ifu_compress_ctl : node _T_1548 = and(_T_1542, _T_1544) @[el2_ifu_compress_ctl.scala 25:110] node _T_1549 = and(_T_1548, _T_1545) @[el2_ifu_compress_ctl.scala 25:110] node _T_1550 = and(_T_1549, _T_1547) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1551 = or(_T_1540, _T_1550) @[el2_ifu_compress_ctl.scala 172:67] + node _T_1551 = or(_T_1540, _T_1550) @[el2_ifu_compress_ctl.scala 177:67] node _T_1552 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1553 = eq(_T_1552, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1554 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1670,10 +1670,10 @@ circuit el2_ifu_compress_ctl : node _T_1558 = and(_T_1553, _T_1555) @[el2_ifu_compress_ctl.scala 25:110] node _T_1559 = and(_T_1558, _T_1556) @[el2_ifu_compress_ctl.scala 25:110] node _T_1560 = and(_T_1559, _T_1557) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1561 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 173:37] - node _T_1562 = eq(_T_1561, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 173:30] - node _T_1563 = and(_T_1560, _T_1562) @[el2_ifu_compress_ctl.scala 173:28] - node _T_1564 = or(_T_1551, _T_1563) @[el2_ifu_compress_ctl.scala 172:94] + node _T_1561 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 178:37] + node _T_1562 = eq(_T_1561, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 178:30] + node _T_1563 = and(_T_1560, _T_1562) @[el2_ifu_compress_ctl.scala 178:28] + node _T_1564 = or(_T_1551, _T_1563) @[el2_ifu_compress_ctl.scala 177:94] node _T_1565 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:71] node _T_1566 = bits(io.din, 11, 11) @[el2_ifu_compress_ctl.scala 25:71] node _T_1567 = bits(io.din, 10, 10) @[el2_ifu_compress_ctl.scala 25:90] @@ -1685,7 +1685,7 @@ circuit el2_ifu_compress_ctl : node _T_1573 = and(_T_1572, _T_1568) @[el2_ifu_compress_ctl.scala 25:110] node _T_1574 = and(_T_1573, _T_1570) @[el2_ifu_compress_ctl.scala 25:110] node _T_1575 = and(_T_1574, _T_1571) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1576 = or(_T_1564, _T_1575) @[el2_ifu_compress_ctl.scala 173:43] + node _T_1576 = or(_T_1564, _T_1575) @[el2_ifu_compress_ctl.scala 178:43] node _T_1577 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1578 = eq(_T_1577, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1579 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] @@ -1696,7 +1696,7 @@ circuit el2_ifu_compress_ctl : node _T_1584 = and(_T_1578, _T_1580) @[el2_ifu_compress_ctl.scala 25:110] node _T_1585 = and(_T_1584, _T_1581) @[el2_ifu_compress_ctl.scala 25:110] node _T_1586 = and(_T_1585, _T_1583) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1587 = or(_T_1576, _T_1586) @[el2_ifu_compress_ctl.scala 173:71] + node _T_1587 = or(_T_1576, _T_1586) @[el2_ifu_compress_ctl.scala 178:71] node _T_1588 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1589 = eq(_T_1588, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1590 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1706,10 +1706,10 @@ circuit el2_ifu_compress_ctl : node _T_1594 = and(_T_1589, _T_1591) @[el2_ifu_compress_ctl.scala 25:110] node _T_1595 = and(_T_1594, _T_1592) @[el2_ifu_compress_ctl.scala 25:110] node _T_1596 = and(_T_1595, _T_1593) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1597 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 174:37] - node _T_1598 = eq(_T_1597, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 174:30] - node _T_1599 = and(_T_1596, _T_1598) @[el2_ifu_compress_ctl.scala 174:28] - node _T_1600 = or(_T_1587, _T_1599) @[el2_ifu_compress_ctl.scala 173:97] + node _T_1597 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 179:37] + node _T_1598 = eq(_T_1597, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 179:30] + node _T_1599 = and(_T_1596, _T_1598) @[el2_ifu_compress_ctl.scala 179:28] + node _T_1600 = or(_T_1587, _T_1599) @[el2_ifu_compress_ctl.scala 178:97] node _T_1601 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:71] node _T_1602 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:71] node _T_1603 = bits(io.din, 1, 1) @[el2_ifu_compress_ctl.scala 25:90] @@ -1718,7 +1718,7 @@ circuit el2_ifu_compress_ctl : node _T_1606 = and(_T_1601, _T_1602) @[el2_ifu_compress_ctl.scala 25:110] node _T_1607 = and(_T_1606, _T_1604) @[el2_ifu_compress_ctl.scala 25:110] node _T_1608 = and(_T_1607, _T_1605) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1609 = or(_T_1600, _T_1608) @[el2_ifu_compress_ctl.scala 174:43] + node _T_1609 = or(_T_1600, _T_1608) @[el2_ifu_compress_ctl.scala 179:43] node _T_1610 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1611 = eq(_T_1610, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1612 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] @@ -1729,7 +1729,7 @@ circuit el2_ifu_compress_ctl : node _T_1617 = and(_T_1611, _T_1613) @[el2_ifu_compress_ctl.scala 25:110] node _T_1618 = and(_T_1617, _T_1614) @[el2_ifu_compress_ctl.scala 25:110] node _T_1619 = and(_T_1618, _T_1616) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1620 = or(_T_1609, _T_1619) @[el2_ifu_compress_ctl.scala 174:67] + node _T_1620 = or(_T_1609, _T_1619) @[el2_ifu_compress_ctl.scala 179:67] node _T_1621 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1622 = eq(_T_1621, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1623 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1739,10 +1739,10 @@ circuit el2_ifu_compress_ctl : node _T_1627 = and(_T_1622, _T_1624) @[el2_ifu_compress_ctl.scala 25:110] node _T_1628 = and(_T_1627, _T_1625) @[el2_ifu_compress_ctl.scala 25:110] node _T_1629 = and(_T_1628, _T_1626) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1630 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 175:37] - node _T_1631 = eq(_T_1630, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 175:30] - node _T_1632 = and(_T_1629, _T_1631) @[el2_ifu_compress_ctl.scala 175:28] - node _T_1633 = or(_T_1620, _T_1632) @[el2_ifu_compress_ctl.scala 174:93] + node _T_1630 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 180:37] + node _T_1631 = eq(_T_1630, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 180:30] + node _T_1632 = and(_T_1629, _T_1631) @[el2_ifu_compress_ctl.scala 180:28] + node _T_1633 = or(_T_1620, _T_1632) @[el2_ifu_compress_ctl.scala 179:93] node _T_1634 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:71] node _T_1635 = bits(io.din, 4, 4) @[el2_ifu_compress_ctl.scala 25:71] node _T_1636 = bits(io.din, 1, 1) @[el2_ifu_compress_ctl.scala 25:90] @@ -1751,7 +1751,7 @@ circuit el2_ifu_compress_ctl : node _T_1639 = and(_T_1634, _T_1635) @[el2_ifu_compress_ctl.scala 25:110] node _T_1640 = and(_T_1639, _T_1637) @[el2_ifu_compress_ctl.scala 25:110] node _T_1641 = and(_T_1640, _T_1638) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1642 = or(_T_1633, _T_1641) @[el2_ifu_compress_ctl.scala 175:43] + node _T_1642 = or(_T_1633, _T_1641) @[el2_ifu_compress_ctl.scala 180:43] node _T_1643 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1644 = eq(_T_1643, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1645 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1761,10 +1761,10 @@ circuit el2_ifu_compress_ctl : node _T_1649 = and(_T_1644, _T_1646) @[el2_ifu_compress_ctl.scala 25:110] node _T_1650 = and(_T_1649, _T_1647) @[el2_ifu_compress_ctl.scala 25:110] node _T_1651 = and(_T_1650, _T_1648) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1652 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 175:100] - node _T_1653 = eq(_T_1652, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 175:93] - node _T_1654 = and(_T_1651, _T_1653) @[el2_ifu_compress_ctl.scala 175:91] - node _T_1655 = or(_T_1642, _T_1654) @[el2_ifu_compress_ctl.scala 175:66] + node _T_1652 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 180:100] + node _T_1653 = eq(_T_1652, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 180:93] + node _T_1654 = and(_T_1651, _T_1653) @[el2_ifu_compress_ctl.scala 180:91] + node _T_1655 = or(_T_1642, _T_1654) @[el2_ifu_compress_ctl.scala 180:66] node _T_1656 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1657 = eq(_T_1656, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1658 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] @@ -1775,7 +1775,7 @@ circuit el2_ifu_compress_ctl : node _T_1663 = and(_T_1657, _T_1659) @[el2_ifu_compress_ctl.scala 25:110] node _T_1664 = and(_T_1663, _T_1660) @[el2_ifu_compress_ctl.scala 25:110] node _T_1665 = and(_T_1664, _T_1662) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1666 = or(_T_1655, _T_1665) @[el2_ifu_compress_ctl.scala 175:106] + node _T_1666 = or(_T_1655, _T_1665) @[el2_ifu_compress_ctl.scala 180:106] node _T_1667 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:71] node _T_1668 = bits(io.din, 3, 3) @[el2_ifu_compress_ctl.scala 25:71] node _T_1669 = bits(io.din, 1, 1) @[el2_ifu_compress_ctl.scala 25:90] @@ -1784,7 +1784,7 @@ circuit el2_ifu_compress_ctl : node _T_1672 = and(_T_1667, _T_1668) @[el2_ifu_compress_ctl.scala 25:110] node _T_1673 = and(_T_1672, _T_1670) @[el2_ifu_compress_ctl.scala 25:110] node _T_1674 = and(_T_1673, _T_1671) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1675 = or(_T_1666, _T_1674) @[el2_ifu_compress_ctl.scala 176:29] + node _T_1675 = or(_T_1666, _T_1674) @[el2_ifu_compress_ctl.scala 181:29] node _T_1676 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:71] node _T_1677 = bits(io.din, 2, 2) @[el2_ifu_compress_ctl.scala 25:71] node _T_1678 = bits(io.din, 1, 1) @[el2_ifu_compress_ctl.scala 25:90] @@ -1793,7 +1793,7 @@ circuit el2_ifu_compress_ctl : node _T_1681 = and(_T_1676, _T_1677) @[el2_ifu_compress_ctl.scala 25:110] node _T_1682 = and(_T_1681, _T_1679) @[el2_ifu_compress_ctl.scala 25:110] node _T_1683 = and(_T_1682, _T_1680) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1684 = or(_T_1675, _T_1683) @[el2_ifu_compress_ctl.scala 176:52] + node _T_1684 = or(_T_1675, _T_1683) @[el2_ifu_compress_ctl.scala 181:52] node _T_1685 = bits(io.din, 14, 14) @[el2_ifu_compress_ctl.scala 25:71] node _T_1686 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1687 = eq(_T_1686, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] @@ -1801,7 +1801,7 @@ circuit el2_ifu_compress_ctl : node _T_1689 = eq(_T_1688, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1690 = and(_T_1685, _T_1687) @[el2_ifu_compress_ctl.scala 25:110] node _T_1691 = and(_T_1690, _T_1689) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1692 = or(_T_1684, _T_1691) @[el2_ifu_compress_ctl.scala 176:75] + node _T_1692 = or(_T_1684, _T_1691) @[el2_ifu_compress_ctl.scala 181:75] node _T_1693 = bits(io.din, 14, 14) @[el2_ifu_compress_ctl.scala 25:90] node _T_1694 = eq(_T_1693, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1695 = bits(io.din, 12, 12) @[el2_ifu_compress_ctl.scala 25:90] @@ -1812,7 +1812,7 @@ circuit el2_ifu_compress_ctl : node _T_1700 = and(_T_1694, _T_1696) @[el2_ifu_compress_ctl.scala 25:110] node _T_1701 = and(_T_1700, _T_1698) @[el2_ifu_compress_ctl.scala 25:110] node _T_1702 = and(_T_1701, _T_1699) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1703 = or(_T_1692, _T_1702) @[el2_ifu_compress_ctl.scala 176:98] + node _T_1703 = or(_T_1692, _T_1702) @[el2_ifu_compress_ctl.scala 181:98] node _T_1704 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:71] node _T_1705 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1706 = eq(_T_1705, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] @@ -1821,10 +1821,10 @@ circuit el2_ifu_compress_ctl : node _T_1709 = and(_T_1704, _T_1706) @[el2_ifu_compress_ctl.scala 25:110] node _T_1710 = and(_T_1709, _T_1707) @[el2_ifu_compress_ctl.scala 25:110] node _T_1711 = and(_T_1710, _T_1708) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1712 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 177:63] - node _T_1713 = eq(_T_1712, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 177:56] - node _T_1714 = and(_T_1711, _T_1713) @[el2_ifu_compress_ctl.scala 177:54] - node _T_1715 = or(_T_1703, _T_1714) @[el2_ifu_compress_ctl.scala 177:29] + node _T_1712 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 182:63] + node _T_1713 = eq(_T_1712, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 182:56] + node _T_1714 = and(_T_1711, _T_1713) @[el2_ifu_compress_ctl.scala 182:54] + node _T_1715 = or(_T_1703, _T_1714) @[el2_ifu_compress_ctl.scala 182:29] node _T_1716 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1717 = eq(_T_1716, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1718 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] @@ -1835,10 +1835,10 @@ circuit el2_ifu_compress_ctl : node _T_1723 = and(_T_1717, _T_1719) @[el2_ifu_compress_ctl.scala 25:110] node _T_1724 = and(_T_1723, _T_1721) @[el2_ifu_compress_ctl.scala 25:110] node _T_1725 = and(_T_1724, _T_1722) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1726 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 177:105] - node _T_1727 = eq(_T_1726, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 177:98] - node _T_1728 = and(_T_1725, _T_1727) @[el2_ifu_compress_ctl.scala 177:96] - node _T_1729 = or(_T_1715, _T_1728) @[el2_ifu_compress_ctl.scala 177:69] + node _T_1726 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 182:105] + node _T_1727 = eq(_T_1726, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 182:98] + node _T_1728 = and(_T_1725, _T_1727) @[el2_ifu_compress_ctl.scala 182:96] + node _T_1729 = or(_T_1715, _T_1728) @[el2_ifu_compress_ctl.scala 182:69] node _T_1730 = bits(io.din, 15, 15) @[el2_ifu_compress_ctl.scala 25:90] node _T_1731 = eq(_T_1730, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1732 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] @@ -1849,23 +1849,23 @@ circuit el2_ifu_compress_ctl : node _T_1737 = and(_T_1731, _T_1733) @[el2_ifu_compress_ctl.scala 25:110] node _T_1738 = and(_T_1737, _T_1734) @[el2_ifu_compress_ctl.scala 25:110] node _T_1739 = and(_T_1738, _T_1736) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1740 = or(_T_1729, _T_1739) @[el2_ifu_compress_ctl.scala 177:111] + node _T_1740 = or(_T_1729, _T_1739) @[el2_ifu_compress_ctl.scala 182:111] node _T_1741 = bits(io.din, 14, 14) @[el2_ifu_compress_ctl.scala 25:71] node _T_1742 = bits(io.din, 13, 13) @[el2_ifu_compress_ctl.scala 25:90] node _T_1743 = eq(_T_1742, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 25:83] node _T_1744 = and(_T_1741, _T_1743) @[el2_ifu_compress_ctl.scala 25:110] - node _T_1745 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 178:59] - node _T_1746 = eq(_T_1745, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 178:52] - node _T_1747 = and(_T_1744, _T_1746) @[el2_ifu_compress_ctl.scala 178:50] - node legal = or(_T_1740, _T_1747) @[el2_ifu_compress_ctl.scala 178:30] + node _T_1745 = bits(io.din, 0, 0) @[el2_ifu_compress_ctl.scala 183:59] + node _T_1746 = eq(_T_1745, UInt<1>("h00")) @[el2_ifu_compress_ctl.scala 183:52] + node _T_1747 = and(_T_1744, _T_1746) @[el2_ifu_compress_ctl.scala 183:50] + node legal = or(_T_1740, _T_1747) @[el2_ifu_compress_ctl.scala 183:30] node _T_1748 = bits(legal, 0, 0) @[Bitwise.scala 72:15] node _T_1749 = mux(_T_1748, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] - node _T_1750 = and(l3, _T_1749) @[el2_ifu_compress_ctl.scala 180:16] - io.dout <= _T_1750 @[el2_ifu_compress_ctl.scala 180:10] - io.l1 <= l1 @[el2_ifu_compress_ctl.scala 181:9] - io.l2 <= l2 @[el2_ifu_compress_ctl.scala 182:9] - io.l3 <= l3 @[el2_ifu_compress_ctl.scala 183:9] - io.legal <= legal @[el2_ifu_compress_ctl.scala 184:12] + node _T_1750 = and(l3, _T_1749) @[el2_ifu_compress_ctl.scala 185:16] + io.dout <= _T_1750 @[el2_ifu_compress_ctl.scala 185:10] + io.l1 <= l1 @[el2_ifu_compress_ctl.scala 186:9] + io.l2 <= l2 @[el2_ifu_compress_ctl.scala 187:9] + io.l3 <= l3 @[el2_ifu_compress_ctl.scala 188:9] + io.legal <= legal @[el2_ifu_compress_ctl.scala 189:12] node _T_1751 = cat(out[31], out[30]) @[Cat.scala 29:58] node _T_1752 = cat(_T_1751, out[29]) @[Cat.scala 29:58] node _T_1753 = cat(_T_1752, out[28]) @[Cat.scala 29:58] @@ -1897,11 +1897,11 @@ circuit el2_ifu_compress_ctl : node _T_1779 = cat(_T_1778, out[2]) @[Cat.scala 29:58] node _T_1780 = cat(_T_1779, out[1]) @[Cat.scala 29:58] node _T_1781 = cat(_T_1780, out[0]) @[Cat.scala 29:58] - io.o <= _T_1781 @[el2_ifu_compress_ctl.scala 185:8] - io.rdd <= rdd @[el2_ifu_compress_ctl.scala 186:10] - io.rdpd <= rdpd @[el2_ifu_compress_ctl.scala 187:11] - io.rs2d <= rs2d @[el2_ifu_compress_ctl.scala 188:11] - io.rs2pd <= rs2pd @[el2_ifu_compress_ctl.scala 189:12] - io.sjaloffset11_1 <= sjaloffset11_1 @[el2_ifu_compress_ctl.scala 190:21] - io.sluimm17_12 <= sluimm17_12 @[el2_ifu_compress_ctl.scala 191:18] + io.o <= _T_1781 @[el2_ifu_compress_ctl.scala 190:8] + io.rdd <= rdd @[el2_ifu_compress_ctl.scala 191:10] + io.rdpd <= rdpd @[el2_ifu_compress_ctl.scala 192:11] + io.rs2d <= rs2d @[el2_ifu_compress_ctl.scala 193:11] + io.rs2pd <= rs2pd @[el2_ifu_compress_ctl.scala 194:12] + io.l2_19 <= l2_19 @[el2_ifu_compress_ctl.scala 195:12] + io.l2_31 <= l2_31 @[el2_ifu_compress_ctl.scala 196:12] diff --git a/el2_ifu_compress_ctl.v b/el2_ifu_compress_ctl.v index 274f0081..79c0fb22 100644 --- a/el2_ifu_compress_ctl.v +++ b/el2_ifu_compress_ctl.v @@ -12,8 +12,8 @@ module el2_ifu_compress_ctl( output [4:0] io_rs2d, output [4:0] io_rs2pd, output [31:0] io_o, - output io_sjaloffset11_1, - output io_sluimm17_12 + output [8:0] io_l2_19, + output [11:0] io_l2_31 ); wire _T_2 = ~io_din[14]; // @[el2_ifu_compress_ctl.scala 25:83] wire _T_4 = ~io_din[13]; // @[el2_ifu_compress_ctl.scala 25:83] @@ -318,12 +318,12 @@ module el2_ifu_compress_ctl( wire _T_1121 = _T_897 & _T_42; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1122 = _T_1112 | _T_1121; // @[el2_ifu_compress_ctl.scala 112:44] wire _T_1130 = _T_897 & io_din[9]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1131 = _T_1122 | _T_1130; // @[el2_ifu_compress_ctl.scala 112:70] + wire _T_1131 = _T_1122 | _T_1130; // @[el2_ifu_compress_ctl.scala 113:29] wire _T_1139 = _T_897 & io_din[10]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1140 = _T_1131 | _T_1139; // @[el2_ifu_compress_ctl.scala 112:95] + wire _T_1140 = _T_1131 | _T_1139; // @[el2_ifu_compress_ctl.scala 114:28] wire _T_1148 = _T_897 & io_din[11]; // @[el2_ifu_compress_ctl.scala 25:110] - wire sluimm17_12 = _T_1140 | _T_1148; // @[el2_ifu_compress_ctl.scala 113:29] - wire uimm5_0 = _T_79 | _T_195; // @[el2_ifu_compress_ctl.scala 114:45] + wire sluimm17_12 = _T_1140 | _T_1148; // @[el2_ifu_compress_ctl.scala 115:29] + wire uimm5_0 = _T_79 | _T_195; // @[el2_ifu_compress_ctl.scala 117:45] wire [6:0] l1_6 = {out_6,out_5,out_4,_T_228,out_2,1'h1,1'h1}; // @[Cat.scala 29:58] wire [4:0] _T_1192 = rdrd ? rdd : 5'h0; // @[Mux.scala 27:72] wire [4:0] _T_1193 = rdprd ? rdpd : 5'h0; // @[Mux.scala 27:72] @@ -343,7 +343,7 @@ module el2_ifu_compress_ctl( wire [4:0] _T_1222 = rs2rs2 ? rs2d : 5'h0; // @[Mux.scala 27:72] wire [4:0] _T_1223 = rs2prs2 ? rs2pd : 5'h0; // @[Mux.scala 27:72] wire [4:0] _T_1224 = _T_1222 | _T_1223; // @[Mux.scala 27:72] - wire [4:0] l1_24 = _T_1219 | _T_1224; // @[el2_ifu_compress_ctl.scala 127:67] + wire [4:0] l1_24 = _T_1219 | _T_1224; // @[el2_ifu_compress_ctl.scala 130:67] wire [14:0] _T_1232 = {out_14,out_13,out_12,l1_11,l1_6}; // @[Cat.scala 29:58] wire [16:0] _T_1234 = {1'h0,out_30,2'h0,3'h0,l1_24,l1_19}; // @[Cat.scala 29:58] wire [31:0] l1 = {1'h0,out_30,2'h0,3'h0,l1_24,l1_19,_T_1232}; // @[Cat.scala 29:58] @@ -377,13 +377,13 @@ module el2_ifu_compress_ctl( wire [11:0] _T_1326 = _T_1325 | _T_1319; // @[Mux.scala 27:72] wire [11:0] _T_1327 = _T_1326 | _T_1320; // @[Mux.scala 27:72] wire [11:0] _T_1328 = _T_1327 | _T_1321; // @[Mux.scala 27:72] - wire [11:0] l2_31 = l1[31:20] | _T_1328; // @[el2_ifu_compress_ctl.scala 144:25] + wire [11:0] l2_31 = l1[31:20] | _T_1328; // @[el2_ifu_compress_ctl.scala 147:25] wire [8:0] _T_1335 = _T_228 ? sjald[19:11] : 9'h0; // @[Mux.scala 27:72] wire [7:0] _T_1336 = sluimm17_12 ? sluimmd[7:0] : 8'h0; // @[Mux.scala 27:72] wire [8:0] _GEN_0 = {{1'd0}, _T_1336}; // @[Mux.scala 27:72] wire [8:0] _T_1337 = _T_1335 | _GEN_0; // @[Mux.scala 27:72] - wire [8:0] _GEN_1 = {{1'd0}, l1[19:12]}; // @[el2_ifu_compress_ctl.scala 154:25] - wire [8:0] l2_19 = _GEN_1 | _T_1337; // @[el2_ifu_compress_ctl.scala 154:25] + wire [8:0] _GEN_1 = {{1'd0}, l1[19:12]}; // @[el2_ifu_compress_ctl.scala 157:25] + wire [8:0] l2_19 = _GEN_1 | _T_1337; // @[el2_ifu_compress_ctl.scala 157:25] wire [32:0] l2 = {l2_31,l2_19,l1[11:0]}; // @[Cat.scala 29:58] wire [8:0] sbr8d = {io_din[12],io_din[6],io_din[5],io_din[2],io_din[11],io_din[10],io_din[4],io_din[3],1'h0}; // @[Cat.scala 29:58] wire [6:0] uswimm6d = {io_din[5],io_din[12:10],io_din[6],2'h0}; // @[Cat.scala 29:58] @@ -397,146 +397,146 @@ module el2_ifu_compress_ctl( wire [6:0] _T_1379 = _T_807 ? _T_1376 : 7'h0; // @[Mux.scala 27:72] wire [6:0] _T_1380 = _T_1377 | _T_1378; // @[Mux.scala 27:72] wire [6:0] _T_1381 = _T_1380 | _T_1379; // @[Mux.scala 27:72] - wire [6:0] l3_31 = l2[31:25] | _T_1381; // @[el2_ifu_compress_ctl.scala 160:25] - wire [12:0] l3_24 = l2[24:12]; // @[el2_ifu_compress_ctl.scala 163:17] + wire [6:0] l3_31 = l2[31:25] | _T_1381; // @[el2_ifu_compress_ctl.scala 165:25] + wire [12:0] l3_24 = l2[24:12]; // @[el2_ifu_compress_ctl.scala 168:17] wire [4:0] _T_1387 = {sbr8d[4:1],sbr8d[8]}; // @[Cat.scala 29:58] wire [4:0] _T_1392 = _T_234 ? _T_1387 : 5'h0; // @[Mux.scala 27:72] wire [4:0] _T_1393 = _T_854 ? uswimm6d[4:0] : 5'h0; // @[Mux.scala 27:72] wire [4:0] _T_1394 = _T_807 ? uswspimm7d[4:0] : 5'h0; // @[Mux.scala 27:72] wire [4:0] _T_1395 = _T_1392 | _T_1393; // @[Mux.scala 27:72] wire [4:0] _T_1396 = _T_1395 | _T_1394; // @[Mux.scala 27:72] - wire [4:0] l3_11 = l2[11:7] | _T_1396; // @[el2_ifu_compress_ctl.scala 164:24] + wire [4:0] l3_11 = l2[11:7] | _T_1396; // @[el2_ifu_compress_ctl.scala 169:24] wire [11:0] _T_1399 = {l3_11,l2[6:0]}; // @[Cat.scala 29:58] wire [19:0] _T_1400 = {l3_31,l3_24}; // @[Cat.scala 29:58] wire [31:0] l3 = {l3_31,l3_24,l3_11,l2[6:0]}; // @[Cat.scala 29:58] wire _T_1407 = _T_4 & _T_487; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1408 = _T_1407 & io_din[11]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1409 = _T_1408 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1412 = _T_1409 & _T_147; // @[el2_ifu_compress_ctl.scala 169:39] + wire _T_1412 = _T_1409 & _T_147; // @[el2_ifu_compress_ctl.scala 174:39] wire _T_1420 = _T_1407 & io_din[6]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1421 = _T_1420 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1424 = _T_1421 & _T_147; // @[el2_ifu_compress_ctl.scala 169:79] - wire _T_1425 = _T_1412 | _T_1424; // @[el2_ifu_compress_ctl.scala 169:54] + wire _T_1424 = _T_1421 & _T_147; // @[el2_ifu_compress_ctl.scala 174:79] + wire _T_1425 = _T_1412 | _T_1424; // @[el2_ifu_compress_ctl.scala 174:54] wire _T_1434 = _T_642 & io_din[11]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1435 = _T_1434 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1436 = _T_1425 | _T_1435; // @[el2_ifu_compress_ctl.scala 169:94] + wire _T_1436 = _T_1425 | _T_1435; // @[el2_ifu_compress_ctl.scala 174:94] wire _T_1444 = _T_1407 & io_din[5]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1445 = _T_1444 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1448 = _T_1445 & _T_147; // @[el2_ifu_compress_ctl.scala 170:55] - wire _T_1449 = _T_1436 | _T_1448; // @[el2_ifu_compress_ctl.scala 170:30] + wire _T_1448 = _T_1445 & _T_147; // @[el2_ifu_compress_ctl.scala 175:55] + wire _T_1449 = _T_1436 | _T_1448; // @[el2_ifu_compress_ctl.scala 175:30] wire _T_1457 = _T_1407 & io_din[10]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1458 = _T_1457 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1461 = _T_1458 & _T_147; // @[el2_ifu_compress_ctl.scala 170:96] - wire _T_1462 = _T_1449 | _T_1461; // @[el2_ifu_compress_ctl.scala 170:70] + wire _T_1461 = _T_1458 & _T_147; // @[el2_ifu_compress_ctl.scala 175:96] + wire _T_1462 = _T_1449 | _T_1461; // @[el2_ifu_compress_ctl.scala 175:70] wire _T_1471 = _T_642 & io_din[6]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1472 = _T_1471 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1473 = _T_1462 | _T_1472; // @[el2_ifu_compress_ctl.scala 170:111] + wire _T_1473 = _T_1462 | _T_1472; // @[el2_ifu_compress_ctl.scala 175:111] wire _T_1480 = io_din[15] & _T_487; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1481 = _T_1480 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1482 = _T_1481 & io_din[0]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1483 = _T_1473 | _T_1482; // @[el2_ifu_compress_ctl.scala 171:29] + wire _T_1483 = _T_1473 | _T_1482; // @[el2_ifu_compress_ctl.scala 176:29] wire _T_1491 = _T_1407 & io_din[9]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1492 = _T_1491 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1495 = _T_1492 & _T_147; // @[el2_ifu_compress_ctl.scala 171:79] - wire _T_1496 = _T_1483 | _T_1495; // @[el2_ifu_compress_ctl.scala 171:54] + wire _T_1495 = _T_1492 & _T_147; // @[el2_ifu_compress_ctl.scala 176:79] + wire _T_1496 = _T_1483 | _T_1495; // @[el2_ifu_compress_ctl.scala 176:54] wire _T_1503 = _T_487 & io_din[6]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1504 = _T_1503 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1505 = _T_1504 & io_din[0]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1506 = _T_1496 | _T_1505; // @[el2_ifu_compress_ctl.scala 171:94] + wire _T_1506 = _T_1496 | _T_1505; // @[el2_ifu_compress_ctl.scala 176:94] wire _T_1515 = _T_642 & io_din[5]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1516 = _T_1515 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1517 = _T_1506 | _T_1516; // @[el2_ifu_compress_ctl.scala 171:118] + wire _T_1517 = _T_1506 | _T_1516; // @[el2_ifu_compress_ctl.scala 176:118] wire _T_1525 = _T_1407 & io_din[8]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1526 = _T_1525 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1529 = _T_1526 & _T_147; // @[el2_ifu_compress_ctl.scala 172:28] - wire _T_1530 = _T_1517 | _T_1529; // @[el2_ifu_compress_ctl.scala 171:144] + wire _T_1529 = _T_1526 & _T_147; // @[el2_ifu_compress_ctl.scala 177:28] + wire _T_1530 = _T_1517 | _T_1529; // @[el2_ifu_compress_ctl.scala 176:144] wire _T_1537 = _T_487 & io_din[5]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1538 = _T_1537 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1539 = _T_1538 & io_din[0]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1540 = _T_1530 | _T_1539; // @[el2_ifu_compress_ctl.scala 172:43] + wire _T_1540 = _T_1530 | _T_1539; // @[el2_ifu_compress_ctl.scala 177:43] wire _T_1549 = _T_642 & io_din[10]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1550 = _T_1549 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1551 = _T_1540 | _T_1550; // @[el2_ifu_compress_ctl.scala 172:67] + wire _T_1551 = _T_1540 | _T_1550; // @[el2_ifu_compress_ctl.scala 177:67] wire _T_1559 = _T_1407 & io_din[7]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1560 = _T_1559 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1563 = _T_1560 & _T_147; // @[el2_ifu_compress_ctl.scala 173:28] - wire _T_1564 = _T_1551 | _T_1563; // @[el2_ifu_compress_ctl.scala 172:94] + wire _T_1563 = _T_1560 & _T_147; // @[el2_ifu_compress_ctl.scala 178:28] + wire _T_1564 = _T_1551 | _T_1563; // @[el2_ifu_compress_ctl.scala 177:94] wire _T_1572 = io_din[12] & io_din[11]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1573 = _T_1572 & _T_38; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1574 = _T_1573 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1575 = _T_1574 & io_din[0]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1576 = _T_1564 | _T_1575; // @[el2_ifu_compress_ctl.scala 173:43] + wire _T_1576 = _T_1564 | _T_1575; // @[el2_ifu_compress_ctl.scala 178:43] wire _T_1585 = _T_642 & io_din[9]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1586 = _T_1585 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1587 = _T_1576 | _T_1586; // @[el2_ifu_compress_ctl.scala 173:71] + wire _T_1587 = _T_1576 | _T_1586; // @[el2_ifu_compress_ctl.scala 178:71] wire _T_1595 = _T_1407 & io_din[4]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1596 = _T_1595 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1599 = _T_1596 & _T_147; // @[el2_ifu_compress_ctl.scala 174:28] - wire _T_1600 = _T_1587 | _T_1599; // @[el2_ifu_compress_ctl.scala 173:97] + wire _T_1599 = _T_1596 & _T_147; // @[el2_ifu_compress_ctl.scala 179:28] + wire _T_1600 = _T_1587 | _T_1599; // @[el2_ifu_compress_ctl.scala 178:97] wire _T_1606 = io_din[13] & io_din[12]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1607 = _T_1606 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1608 = _T_1607 & io_din[0]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1609 = _T_1600 | _T_1608; // @[el2_ifu_compress_ctl.scala 174:43] + wire _T_1609 = _T_1600 | _T_1608; // @[el2_ifu_compress_ctl.scala 179:43] wire _T_1618 = _T_642 & io_din[8]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1619 = _T_1618 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1620 = _T_1609 | _T_1619; // @[el2_ifu_compress_ctl.scala 174:67] + wire _T_1620 = _T_1609 | _T_1619; // @[el2_ifu_compress_ctl.scala 179:67] wire _T_1628 = _T_1407 & io_din[3]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1629 = _T_1628 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1632 = _T_1629 & _T_147; // @[el2_ifu_compress_ctl.scala 175:28] - wire _T_1633 = _T_1620 | _T_1632; // @[el2_ifu_compress_ctl.scala 174:93] + wire _T_1632 = _T_1629 & _T_147; // @[el2_ifu_compress_ctl.scala 180:28] + wire _T_1633 = _T_1620 | _T_1632; // @[el2_ifu_compress_ctl.scala 179:93] wire _T_1639 = io_din[13] & io_din[4]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1640 = _T_1639 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1641 = _T_1640 & io_din[0]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1642 = _T_1633 | _T_1641; // @[el2_ifu_compress_ctl.scala 175:43] + wire _T_1642 = _T_1633 | _T_1641; // @[el2_ifu_compress_ctl.scala 180:43] wire _T_1650 = _T_1407 & io_din[2]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1651 = _T_1650 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1654 = _T_1651 & _T_147; // @[el2_ifu_compress_ctl.scala 175:91] - wire _T_1655 = _T_1642 | _T_1654; // @[el2_ifu_compress_ctl.scala 175:66] + wire _T_1654 = _T_1651 & _T_147; // @[el2_ifu_compress_ctl.scala 180:91] + wire _T_1655 = _T_1642 | _T_1654; // @[el2_ifu_compress_ctl.scala 180:66] wire _T_1664 = _T_642 & io_din[7]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1665 = _T_1664 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1666 = _T_1655 | _T_1665; // @[el2_ifu_compress_ctl.scala 175:106] + wire _T_1666 = _T_1655 | _T_1665; // @[el2_ifu_compress_ctl.scala 180:106] wire _T_1672 = io_din[13] & io_din[3]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1673 = _T_1672 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1674 = _T_1673 & io_din[0]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1675 = _T_1666 | _T_1674; // @[el2_ifu_compress_ctl.scala 176:29] + wire _T_1675 = _T_1666 | _T_1674; // @[el2_ifu_compress_ctl.scala 181:29] wire _T_1681 = io_din[13] & io_din[2]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1682 = _T_1681 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1683 = _T_1682 & io_din[0]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1684 = _T_1675 | _T_1683; // @[el2_ifu_compress_ctl.scala 176:52] + wire _T_1684 = _T_1675 | _T_1683; // @[el2_ifu_compress_ctl.scala 181:52] wire _T_1690 = io_din[14] & _T_4; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1691 = _T_1690 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1692 = _T_1684 | _T_1691; // @[el2_ifu_compress_ctl.scala 176:75] + wire _T_1692 = _T_1684 | _T_1691; // @[el2_ifu_compress_ctl.scala 181:75] wire _T_1701 = _T_703 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1702 = _T_1701 & io_din[0]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1703 = _T_1692 | _T_1702; // @[el2_ifu_compress_ctl.scala 176:98] + wire _T_1703 = _T_1692 | _T_1702; // @[el2_ifu_compress_ctl.scala 181:98] wire _T_1710 = _T_820 & io_din[12]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1711 = _T_1710 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1714 = _T_1711 & _T_147; // @[el2_ifu_compress_ctl.scala 177:54] - wire _T_1715 = _T_1703 | _T_1714; // @[el2_ifu_compress_ctl.scala 177:29] + wire _T_1714 = _T_1711 & _T_147; // @[el2_ifu_compress_ctl.scala 182:54] + wire _T_1715 = _T_1703 | _T_1714; // @[el2_ifu_compress_ctl.scala 182:29] wire _T_1724 = _T_642 & _T_487; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1725 = _T_1724 & io_din[1]; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1728 = _T_1725 & _T_147; // @[el2_ifu_compress_ctl.scala 177:96] - wire _T_1729 = _T_1715 | _T_1728; // @[el2_ifu_compress_ctl.scala 177:69] + wire _T_1728 = _T_1725 & _T_147; // @[el2_ifu_compress_ctl.scala 182:96] + wire _T_1729 = _T_1715 | _T_1728; // @[el2_ifu_compress_ctl.scala 182:69] wire _T_1738 = _T_642 & io_din[12]; // @[el2_ifu_compress_ctl.scala 25:110] wire _T_1739 = _T_1738 & _T_830; // @[el2_ifu_compress_ctl.scala 25:110] - wire _T_1740 = _T_1729 | _T_1739; // @[el2_ifu_compress_ctl.scala 177:111] - wire _T_1747 = _T_1690 & _T_147; // @[el2_ifu_compress_ctl.scala 178:50] - wire legal = _T_1740 | _T_1747; // @[el2_ifu_compress_ctl.scala 178:30] + wire _T_1740 = _T_1729 | _T_1739; // @[el2_ifu_compress_ctl.scala 182:111] + wire _T_1747 = _T_1690 & _T_147; // @[el2_ifu_compress_ctl.scala 183:50] + wire legal = _T_1740 | _T_1747; // @[el2_ifu_compress_ctl.scala 183:30] wire [31:0] _T_1749 = legal ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] wire [9:0] _T_1759 = {1'h0,out_30,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0,1'h0}; // @[Cat.scala 29:58] wire [18:0] _T_1768 = {_T_1759,1'h0,out_20,1'h0,1'h0,1'h0,1'h0,1'h0,out_14,out_13}; // @[Cat.scala 29:58] wire [27:0] _T_1777 = {_T_1768,out_12,1'h0,1'h0,1'h0,1'h0,1'h0,out_6,out_5,out_4}; // @[Cat.scala 29:58] wire [30:0] _T_1780 = {_T_1777,_T_228,out_2,1'h1}; // @[Cat.scala 29:58] - assign io_dout = l3 & _T_1749; // @[el2_ifu_compress_ctl.scala 180:10] - assign io_l1 = {_T_1234,_T_1232}; // @[el2_ifu_compress_ctl.scala 181:9] - assign io_l2 = l2[31:0]; // @[el2_ifu_compress_ctl.scala 182:9] - assign io_l3 = {_T_1400,_T_1399}; // @[el2_ifu_compress_ctl.scala 183:9] - assign io_legal = _T_1740 | _T_1747; // @[el2_ifu_compress_ctl.scala 184:12] - assign io_rdd = io_din[11:7]; // @[el2_ifu_compress_ctl.scala 186:10] - assign io_rdpd = {2'h1,io_din[9:7]}; // @[el2_ifu_compress_ctl.scala 187:11] - assign io_rs2d = io_din[6:2]; // @[el2_ifu_compress_ctl.scala 188:11] - assign io_rs2pd = {2'h1,io_din[4:2]}; // @[el2_ifu_compress_ctl.scala 189:12] - assign io_o = {_T_1780,1'h1}; // @[el2_ifu_compress_ctl.scala 185:8] - assign io_sjaloffset11_1 = _T_2 & io_din[13]; // @[el2_ifu_compress_ctl.scala 190:21] - assign io_sluimm17_12 = _T_1140 | _T_1148; // @[el2_ifu_compress_ctl.scala 191:18] + assign io_dout = l3 & _T_1749; // @[el2_ifu_compress_ctl.scala 185:10] + assign io_l1 = {_T_1234,_T_1232}; // @[el2_ifu_compress_ctl.scala 186:9] + assign io_l2 = l2[31:0]; // @[el2_ifu_compress_ctl.scala 187:9] + assign io_l3 = {_T_1400,_T_1399}; // @[el2_ifu_compress_ctl.scala 188:9] + assign io_legal = _T_1740 | _T_1747; // @[el2_ifu_compress_ctl.scala 189:12] + assign io_rdd = io_din[11:7]; // @[el2_ifu_compress_ctl.scala 191:10] + assign io_rdpd = {2'h1,io_din[9:7]}; // @[el2_ifu_compress_ctl.scala 192:11] + assign io_rs2d = io_din[6:2]; // @[el2_ifu_compress_ctl.scala 193:11] + assign io_rs2pd = {2'h1,io_din[4:2]}; // @[el2_ifu_compress_ctl.scala 194:12] + assign io_o = {_T_1780,1'h1}; // @[el2_ifu_compress_ctl.scala 190:8] + assign io_l2_19 = _GEN_1 | _T_1337; // @[el2_ifu_compress_ctl.scala 195:12] + assign io_l2_31 = l1[31:20] | _T_1328; // @[el2_ifu_compress_ctl.scala 196:12] endmodule diff --git a/src/main/scala/ifu/el2_ifu_compress_ctl.scala b/src/main/scala/ifu/el2_ifu_compress_ctl.scala index 0ed13255..2bfcd4bc 100644 --- a/src/main/scala/ifu/el2_ifu_compress_ctl.scala +++ b/src/main/scala/ifu/el2_ifu_compress_ctl.scala @@ -16,8 +16,8 @@ class el2_ifu_compress_ctl extends Module { val rs2d = Output(UInt(5.W)) val rs2pd = Output(UInt(5.W)) val o = Output(UInt(32.W)) - val sjaloffset11_1 = Output(Bool()) - val sluimm17_12 = Output(Bool()) + val l2_19 = Output(UInt()) + val l2_31 = Output(UInt()) }) //io.dout := (0 until 32).map(i=> 0.U.asBool) @@ -109,8 +109,11 @@ class el2_ifu_compress_ctl extends Module { val simm9_4 = pat(List(-15,14,13,-11,-10,-9,8,-7)) val simm5_0 = pat(List(-14,-13,11,-10,0)) | pat(List(-15,-13,0)) val sjaloffset11_1 = pat(List(-14,13)) - val sluimm17_12 = pat(List(-15,14,13,7)) | pat(List(-15,14,13,-8)) | pat(List(-15,14,13,9)) | - pat(List(-15,14,13,10)) | pat(List(-15,14,13,11)) + val sluimm17_12 = pat(List(-15,14,13,7)) | + pat(List(-15,14,13,-8)) | + pat(List(-15,14,13,9)) | + pat(List(-15,14,13,10)) | + pat(List(-15,14,13,11)) val uimm5_0 = pat(List(15,-14,-13,-11,0)) | pat(List(-15,-14,1)) val uswimm6_2 = pat(List(15,-1))&(!io.din(0)) val uswspimm7_2 = pat(List(15,14,1)) @@ -154,6 +157,8 @@ class el2_ifu_compress_ctl extends Module { val l2_19 = l1(19,12) | Mux1H(Seq(sjaloffset11_1.asBool->sjald(19,11), sluimm17_12.asBool->sluimmd(7,0))) val l2 = Cat(l2_31, l2_19, l1(11,0)) + + val sbr8d = Cat(io.din(12),io.din(6),io.din(5),io.din(2),io.din(11),io.din(10),io.din(4),io.din(3),0.U) val uswimm6d = Cat(io.din(5), io.din(12,10), io.din(6), 0.U(2.W)) val uswspimm7d = Cat(io.din(8,7),io.din(12,9), 0.U(2.W)) @@ -187,8 +192,8 @@ class el2_ifu_compress_ctl extends Module { io.rdpd := rdpd io.rs2d := rs2d io.rs2pd := rs2pd - io.sjaloffset11_1 := sjaloffset11_1 - io.sluimm17_12 := sluimm17_12 + io.l2_19 := l2_19 + io.l2_31 := l2_31 } /* class ExpandedInstruction extends Bundle { diff --git a/target/scala-2.12/classes/ifu/el2_ifu_compress_ctl$$anon$1.class b/target/scala-2.12/classes/ifu/el2_ifu_compress_ctl$$anon$1.class index 0710b14c..dae840bf 100644 Binary files a/target/scala-2.12/classes/ifu/el2_ifu_compress_ctl$$anon$1.class and b/target/scala-2.12/classes/ifu/el2_ifu_compress_ctl$$anon$1.class differ diff --git a/target/scala-2.12/classes/ifu/el2_ifu_compress_ctl.class b/target/scala-2.12/classes/ifu/el2_ifu_compress_ctl.class index d92c3c7d..3f4977e4 100644 Binary files a/target/scala-2.12/classes/ifu/el2_ifu_compress_ctl.class and b/target/scala-2.12/classes/ifu/el2_ifu_compress_ctl.class differ diff --git a/target/scala-2.12/classes/ifu/ifu_compress$.class b/target/scala-2.12/classes/ifu/ifu_compress$.class index f3734830..c4f2b067 100644 Binary files a/target/scala-2.12/classes/ifu/ifu_compress$.class and b/target/scala-2.12/classes/ifu/ifu_compress$.class differ diff --git a/target/scala-2.12/classes/ifu/ifu_compress$delayedInit$body.class b/target/scala-2.12/classes/ifu/ifu_compress$delayedInit$body.class index 1f21c62d..4c732856 100644 Binary files a/target/scala-2.12/classes/ifu/ifu_compress$delayedInit$body.class and b/target/scala-2.12/classes/ifu/ifu_compress$delayedInit$body.class differ