diff --git a/TEC_RV_ICG.sv b/TEC_RV_ICG.sv new file mode 100644 index 00000000..5d8f005d --- /dev/null +++ b/TEC_RV_ICG.sv @@ -0,0 +1,14 @@ +module TEC_RV_ICG( + ( + input logic SE, EN, CK, + output Q + ); + logic en_ff; + logic enable; + assign enable = EN | SE; + always @(CK, enable) begin + if(!CK) + en_ff = enable; + end + assign Q = CK & en_ff; +endmodule \ No newline at end of file diff --git a/el2_dec_decode_ctl.v b/el2_dec_decode_ctl.v new file mode 100644 index 00000000..926f89bf --- /dev/null +++ b/el2_dec_decode_ctl.v @@ -0,0 +1,3400 @@ +module TEC_RV_ICG( + ( + input logic SE, EN, CK, + output Q + ); + logic en_ff; + logic enable; + assign enable = EN | SE; + always @(CK, enable) begin + if(!CK) + en_ff = enable; + end + assign Q = CK & en_ff; +endmodule +module rvclkhdr( + output io_l1clk, + input io_clk, + input io_en, + input io_scan_mode +); + wire clkhdr_Q; // @[beh_lib.scala 330:24] + wire clkhdr_CK; // @[beh_lib.scala 330:24] + wire clkhdr_EN; // @[beh_lib.scala 330:24] + wire clkhdr_SE; // @[beh_lib.scala 330:24] + TEC_RV_ICG clkhdr ( // @[beh_lib.scala 330:24] + .Q(clkhdr_Q), + .CK(clkhdr_CK), + .EN(clkhdr_EN), + .SE(clkhdr_SE) + ); + assign io_l1clk = clkhdr_Q; // @[beh_lib.scala 331:12] + assign clkhdr_CK = io_clk; // @[beh_lib.scala 332:16] + assign clkhdr_EN = io_en; // @[beh_lib.scala 333:16] + assign clkhdr_SE = io_scan_mode; // @[beh_lib.scala 334:16] +endmodule +module el2_dec_dec_ctl( + input [31:0] io_ins, + output io_out_alu, + output io_out_rs2, + output io_out_rs1, + output io_out_imm12, + output io_out_rd, + output io_out_shimm5, + output io_out_imm20, + output io_out_pc, + output io_out_load, + output io_out_store, + output io_out_lsu, + output io_out_add, + output io_out_sub, + output io_out_land, + output io_out_lor, + output io_out_lxor, + output io_out_sll, + output io_out_sra, + output io_out_srl, + output io_out_slt, + output io_out_unsign, + output io_out_condbr, + output io_out_beq, + output io_out_bne, + output io_out_bge, + output io_out_blt, + output io_out_jal, + output io_out_by, + output io_out_half, + output io_out_word, + output io_out_csr_read, + output io_out_csr_clr, + output io_out_csr_set, + output io_out_csr_write, + output io_out_csr_imm, + output io_out_presync, + output io_out_postsync, + output io_out_ebreak, + output io_out_ecall, + output io_out_mret, + output io_out_mul, + output io_out_rs1_sign, + output io_out_rs2_sign, + output io_out_low, + output io_out_div, + output io_out_rem, + output io_out_fence, + output io_out_fence_i, + output io_out_pm_alu, + output io_out_legal +); + wire _T_2 = io_ins[2] | io_ins[6]; // @[el2_dec_dec_ctl.scala 20:27] + wire _T_4 = ~io_ins[25]; // @[el2_dec_dec_ctl.scala 20:42] + wire _T_6 = _T_4 & io_ins[4]; // @[el2_dec_dec_ctl.scala 20:53] + wire _T_7 = _T_2 | _T_6; // @[el2_dec_dec_ctl.scala 20:39] + wire _T_9 = ~io_ins[5]; // @[el2_dec_dec_ctl.scala 20:68] + wire _T_11 = _T_9 & io_ins[4]; // @[el2_dec_dec_ctl.scala 20:78] + wire _T_14 = ~io_ins[14]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_16 = ~io_ins[13]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_18 = ~io_ins[2]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_19 = _T_14 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_20 = _T_19 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_26 = _T_16 & io_ins[11]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_27 = _T_26 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_28 = _T_20 | _T_27; // @[el2_dec_dec_ctl.scala 21:43] + wire _T_33 = io_ins[19] & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_34 = _T_33 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_35 = _T_28 | _T_34; // @[el2_dec_dec_ctl.scala 21:70] + wire _T_41 = _T_16 & io_ins[10]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_42 = _T_41 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_43 = _T_35 | _T_42; // @[el2_dec_dec_ctl.scala 22:29] + wire _T_48 = io_ins[18] & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_49 = _T_48 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_50 = _T_43 | _T_49; // @[el2_dec_dec_ctl.scala 22:56] + wire _T_56 = _T_16 & io_ins[9]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_57 = _T_56 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_58 = _T_50 | _T_57; // @[el2_dec_dec_ctl.scala 23:29] + wire _T_63 = io_ins[17] & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_64 = _T_63 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_65 = _T_58 | _T_64; // @[el2_dec_dec_ctl.scala 23:55] + wire _T_71 = _T_16 & io_ins[8]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_72 = _T_71 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_73 = _T_65 | _T_72; // @[el2_dec_dec_ctl.scala 24:29] + wire _T_78 = io_ins[16] & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_79 = _T_78 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_80 = _T_73 | _T_79; // @[el2_dec_dec_ctl.scala 24:55] + wire _T_86 = _T_16 & io_ins[7]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_87 = _T_86 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_88 = _T_80 | _T_87; // @[el2_dec_dec_ctl.scala 25:29] + wire _T_93 = io_ins[15] & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_94 = _T_93 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_95 = _T_88 | _T_94; // @[el2_dec_dec_ctl.scala 25:55] + wire _T_97 = ~io_ins[4]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_99 = ~io_ins[3]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_100 = _T_97 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_101 = _T_95 | _T_100; // @[el2_dec_dec_ctl.scala 26:29] + wire _T_103 = ~io_ins[6]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_106 = _T_103 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_113 = io_ins[5] & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_114 = _T_113 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_120 = _T_103 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_121 = _T_120 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_129 = _T_100 & io_ins[2]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_136 = io_ins[13] & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_137 = _T_136 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_138 = _T_137 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_139 = _T_129 | _T_138; // @[el2_dec_dec_ctl.scala 28:42] + wire _T_143 = ~io_ins[12]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_146 = _T_16 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_147 = _T_146 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_148 = _T_147 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_149 = _T_139 | _T_148; // @[el2_dec_dec_ctl.scala 28:70] + wire _T_157 = _T_143 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_158 = _T_157 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_159 = _T_158 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_165 = _T_9 & _T_18; // @[el2_dec_dec_ctl.scala 30:28] + wire _T_168 = io_ins[5] & io_ins[2]; // @[el2_dec_dec_ctl.scala 30:55] + wire _T_169 = _T_165 | _T_168; // @[el2_dec_dec_ctl.scala 30:42] + wire _T_180 = _T_16 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_181 = _T_180 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_182 = _T_181 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_186 = io_ins[5] & io_ins[3]; // @[el2_dec_dec_ctl.scala 32:29] + wire _T_189 = io_ins[4] & io_ins[2]; // @[el2_dec_dec_ctl.scala 32:53] + wire _T_195 = _T_9 & _T_99; // @[el2_dec_dec_ctl.scala 33:28] + wire _T_197 = _T_195 & io_ins[2]; // @[el2_dec_dec_ctl.scala 33:41] + wire _T_208 = _T_9 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_223 = _T_103 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_235 = _T_19 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_236 = _T_235 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_237 = _T_236 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_245 = _T_237 | _T_197; // @[el2_dec_dec_ctl.scala 37:49] + wire _T_247 = ~io_ins[30]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_261 = _T_247 & _T_4; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_262 = _T_261 & _T_14; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_263 = _T_262 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_264 = _T_263 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_265 = _T_264 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_266 = _T_265 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_267 = _T_266 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_278 = io_ins[30] & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_279 = _T_278 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_280 = _T_279 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_281 = _T_280 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_282 = _T_281 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_293 = _T_4 & _T_14; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_294 = _T_293 & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_295 = _T_294 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_296 = _T_295 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_297 = _T_296 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_298 = _T_282 | _T_297; // @[el2_dec_dec_ctl.scala 39:49] + wire _T_307 = _T_14 & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_308 = _T_307 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_309 = _T_308 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_310 = _T_309 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_311 = _T_298 | _T_310; // @[el2_dec_dec_ctl.scala 39:85] + wire _T_317 = io_ins[6] & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_318 = _T_317 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_327 = io_ins[14] & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_328 = _T_327 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_329 = _T_328 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_330 = _T_329 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_340 = _T_4 & io_ins[14]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_341 = _T_340 & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_342 = _T_341 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_343 = _T_342 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_344 = _T_343 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_349 = _T_103 & io_ins[3]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_362 = _T_341 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_363 = _T_362 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_364 = _T_363 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_365 = _T_349 | _T_364; // @[el2_dec_dec_ctl.scala 42:37] + wire _T_369 = io_ins[5] & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_370 = _T_369 & io_ins[2]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_371 = _T_365 | _T_370; // @[el2_dec_dec_ctl.scala 42:74] + wire _T_381 = _T_371 | _T_148; // @[el2_dec_dec_ctl.scala 43:26] + wire _T_391 = _T_327 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_392 = _T_391 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_393 = _T_392 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_406 = _T_340 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_407 = _T_406 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_408 = _T_407 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_409 = _T_408 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_420 = io_ins[14] & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_421 = _T_420 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_422 = _T_421 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_423 = _T_422 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_424 = _T_423 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_439 = _T_293 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_440 = _T_439 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_441 = _T_440 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_442 = _T_441 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_453 = io_ins[30] & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_454 = _T_453 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_455 = _T_454 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_456 = _T_455 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_472 = _T_261 & io_ins[14]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_473 = _T_472 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_474 = _T_473 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_475 = _T_474 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_476 = _T_475 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_515 = _T_307 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_516 = _T_515 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_517 = _T_516 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_524 = io_ins[13] & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_525 = _T_524 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_526 = _T_525 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_527 = _T_517 | _T_526; // @[el2_dec_dec_ctl.scala 50:51] + wire _T_533 = io_ins[14] & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_534 = _T_533 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_535 = _T_527 | _T_534; // @[el2_dec_dec_ctl.scala 50:79] + wire _T_548 = _T_294 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_549 = _T_548 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_550 = _T_549 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_551 = _T_535 | _T_550; // @[el2_dec_dec_ctl.scala 51:29] + wire _T_560 = io_ins[25] & io_ins[14]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_561 = _T_560 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_562 = _T_561 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_563 = _T_562 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_564 = _T_563 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_582 = _T_14 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_583 = _T_582 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_584 = _T_583 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_594 = _T_14 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_595 = _T_594 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_596 = _T_595 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_605 = io_ins[14] & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_606 = _T_605 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_607 = _T_606 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_617 = io_ins[14] & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_618 = _T_617 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_619 = _T_618 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_635 = _T_146 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_636 = _T_635 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_645 = io_ins[12] & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_646 = _T_645 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_653 = io_ins[13] & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_659 = _T_524 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_663 = io_ins[7] & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_664 = _T_663 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_665 = _T_659 | _T_664; // @[el2_dec_dec_ctl.scala 62:44] + wire _T_669 = io_ins[8] & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_670 = _T_669 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_671 = _T_665 | _T_670; // @[el2_dec_dec_ctl.scala 62:67] + wire _T_675 = io_ins[9] & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_676 = _T_675 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_677 = _T_671 | _T_676; // @[el2_dec_dec_ctl.scala 63:26] + wire _T_681 = io_ins[10] & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_682 = _T_681 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_683 = _T_677 | _T_682; // @[el2_dec_dec_ctl.scala 63:49] + wire _T_687 = io_ins[11] & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_688 = _T_687 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_696 = _T_93 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_697 = _T_696 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_698 = _T_697 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_705 = _T_78 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_706 = _T_705 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_707 = _T_706 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_708 = _T_698 | _T_707; // @[el2_dec_dec_ctl.scala 65:49] + wire _T_715 = _T_63 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_716 = _T_715 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_717 = _T_716 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_718 = _T_708 | _T_717; // @[el2_dec_dec_ctl.scala 65:79] + wire _T_724 = io_ins[18] & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_725 = _T_724 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_726 = _T_725 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_727 = _T_718 | _T_726; // @[el2_dec_dec_ctl.scala 66:33] + wire _T_733 = io_ins[19] & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_734 = _T_733 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_735 = _T_734 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_743 = _T_180 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_751 = _T_420 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_752 = _T_751 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_757 = io_ins[15] & io_ins[14]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_758 = _T_757 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_759 = _T_758 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_760 = _T_752 | _T_759; // @[el2_dec_dec_ctl.scala 69:47] + wire _T_765 = io_ins[16] & io_ins[14]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_766 = _T_765 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_767 = _T_766 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_768 = _T_760 | _T_767; // @[el2_dec_dec_ctl.scala 69:74] + wire _T_773 = io_ins[17] & io_ins[14]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_774 = _T_773 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_775 = _T_774 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_776 = _T_768 | _T_775; // @[el2_dec_dec_ctl.scala 70:30] + wire _T_781 = io_ins[18] & io_ins[14]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_782 = _T_781 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_783 = _T_782 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_784 = _T_776 | _T_783; // @[el2_dec_dec_ctl.scala 70:57] + wire _T_789 = io_ins[19] & io_ins[14]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_790 = _T_789 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_791 = _T_790 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_798 = io_ins[15] & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_799 = _T_798 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_800 = _T_799 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_806 = io_ins[16] & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_807 = _T_806 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_808 = _T_807 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_809 = _T_800 | _T_808; // @[el2_dec_dec_ctl.scala 72:47] + wire _T_815 = io_ins[17] & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_816 = _T_815 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_817 = _T_816 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_818 = _T_809 | _T_817; // @[el2_dec_dec_ctl.scala 72:75] + wire _T_827 = _T_818 | _T_726; // @[el2_dec_dec_ctl.scala 73:31] + wire _T_838 = ~io_ins[22]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_846 = _T_838 & io_ins[20]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_847 = _T_846 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_848 = _T_847 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_849 = _T_848 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_852 = ~io_ins[21]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_854 = ~io_ins[20]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_861 = _T_852 & _T_854; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_862 = _T_861 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_863 = _T_862 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_864 = _T_863 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_873 = io_ins[29] & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_874 = _T_873 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_875 = _T_874 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_886 = io_ins[25] & _T_14; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_887 = _T_886 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_888 = _T_887 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_889 = _T_888 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_904 = _T_886 & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_905 = _T_904 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_906 = _T_905 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_907 = _T_906 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_908 = _T_907 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_909 = _T_908 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_922 = _T_886 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_923 = _T_922 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_924 = _T_923 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_925 = _T_924 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_926 = _T_925 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_958 = _T_922 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_959 = _T_958 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_960 = _T_959 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_970 = _T_560 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_971 = _T_970 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_982 = _T_560 & io_ins[13]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_983 = _T_982 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_984 = _T_983 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_989 = _T_9 & io_ins[3]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_994 = io_ins[12] & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_995 = _T_994 & io_ins[3]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1003 = io_ins[28] & io_ins[22]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1004 = _T_1003 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1005 = _T_1004 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1006 = _T_1005 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1010 = _T_1006 | _T_189; // @[el2_dec_dec_ctl.scala 87:51] + wire _T_1016 = _T_4 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1017 = _T_1016 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1018 = _T_1010 | _T_1017; // @[el2_dec_dec_ctl.scala 87:72] + wire _T_1034 = _T_86 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1035 = _T_1034 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1036 = _T_989 | _T_1035; // @[el2_dec_dec_ctl.scala 89:41] + wire _T_1043 = _T_71 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1044 = _T_1043 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1045 = _T_1036 | _T_1044; // @[el2_dec_dec_ctl.scala 89:68] + wire _T_1052 = _T_56 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1053 = _T_1052 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1054 = _T_1045 | _T_1053; // @[el2_dec_dec_ctl.scala 90:30] + wire _T_1061 = _T_41 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1062 = _T_1061 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1063 = _T_1054 | _T_1062; // @[el2_dec_dec_ctl.scala 90:57] + wire _T_1070 = _T_26 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1071 = _T_1070 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1072 = _T_1063 | _T_1071; // @[el2_dec_dec_ctl.scala 91:31] + wire _T_1078 = _T_93 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1079 = _T_1078 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1080 = _T_1072 | _T_1079; // @[el2_dec_dec_ctl.scala 91:59] + wire _T_1086 = _T_78 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1087 = _T_1086 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1088 = _T_1080 | _T_1087; // @[el2_dec_dec_ctl.scala 92:30] + wire _T_1094 = _T_63 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1095 = _T_1094 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1096 = _T_1088 | _T_1095; // @[el2_dec_dec_ctl.scala 92:57] + wire _T_1102 = _T_48 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1103 = _T_1102 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1104 = _T_1096 | _T_1103; // @[el2_dec_dec_ctl.scala 93:30] + wire _T_1110 = _T_33 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1111 = _T_1110 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1127 = _T_838 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1128 = _T_1127 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1129 = _T_1128 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1130 = _T_1129 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1131 = _T_995 | _T_1130; // @[el2_dec_dec_ctl.scala 95:45] + wire _T_1140 = _T_1131 | _T_1035; // @[el2_dec_dec_ctl.scala 95:78] + wire _T_1149 = _T_1140 | _T_1044; // @[el2_dec_dec_ctl.scala 96:30] + wire _T_1158 = _T_1149 | _T_1053; // @[el2_dec_dec_ctl.scala 96:57] + wire _T_1167 = _T_1158 | _T_1062; // @[el2_dec_dec_ctl.scala 97:30] + wire _T_1176 = _T_1167 | _T_1071; // @[el2_dec_dec_ctl.scala 97:58] + wire _T_1184 = _T_1176 | _T_1079; // @[el2_dec_dec_ctl.scala 98:31] + wire _T_1192 = _T_1184 | _T_1087; // @[el2_dec_dec_ctl.scala 98:58] + wire _T_1200 = _T_1192 | _T_1095; // @[el2_dec_dec_ctl.scala 99:30] + wire _T_1208 = _T_1200 | _T_1103; // @[el2_dec_dec_ctl.scala 99:57] + wire _T_1218 = ~io_ins[31]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1224 = ~io_ins[27]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1226 = ~io_ins[26]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1230 = ~io_ins[24]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1232 = ~io_ins[23]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1239 = ~io_ins[19]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1241 = ~io_ins[18]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1243 = ~io_ins[17]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1245 = ~io_ins[16]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1247 = ~io_ins[15]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1251 = ~io_ins[11]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1253 = ~io_ins[10]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1255 = ~io_ins[9]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1257 = ~io_ins[8]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1259 = ~io_ins[7]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1269 = _T_1218 & _T_247; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1270 = _T_1269 & io_ins[29]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1271 = _T_1270 & io_ins[28]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1272 = _T_1271 & _T_1224; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1273 = _T_1272 & _T_1226; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1274 = _T_1273 & _T_4; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1275 = _T_1274 & _T_1230; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1276 = _T_1275 & _T_1232; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1277 = _T_1276 & _T_838; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1278 = _T_1277 & io_ins[21]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1279 = _T_1278 & _T_854; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1280 = _T_1279 & _T_1239; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1281 = _T_1280 & _T_1241; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1282 = _T_1281 & _T_1243; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1283 = _T_1282 & _T_1245; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1284 = _T_1283 & _T_1247; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1285 = _T_1284 & _T_14; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1286 = _T_1285 & _T_1251; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1287 = _T_1286 & _T_1253; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1288 = _T_1287 & _T_1255; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1289 = _T_1288 & _T_1257; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1290 = _T_1289 & _T_1259; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1291 = _T_1290 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1292 = _T_1291 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1293 = _T_1292 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1294 = _T_1293 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1295 = _T_1294 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1296 = _T_1295 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1297 = _T_1296 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1303 = ~io_ins[29]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1351 = _T_1269 & _T_1303; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1352 = _T_1351 & io_ins[28]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1353 = _T_1352 & _T_1224; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1354 = _T_1353 & _T_1226; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1355 = _T_1354 & _T_4; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1356 = _T_1355 & _T_1230; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1357 = _T_1356 & _T_1232; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1358 = _T_1357 & io_ins[22]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1359 = _T_1358 & _T_852; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1360 = _T_1359 & io_ins[20]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1361 = _T_1360 & _T_1239; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1362 = _T_1361 & _T_1241; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1363 = _T_1362 & _T_1243; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1364 = _T_1363 & _T_1245; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1365 = _T_1364 & _T_1247; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1366 = _T_1365 & _T_14; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1367 = _T_1366 & _T_1251; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1368 = _T_1367 & _T_1253; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1369 = _T_1368 & _T_1255; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1370 = _T_1369 & _T_1257; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1371 = _T_1370 & _T_1259; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1372 = _T_1371 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1373 = _T_1372 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1374 = _T_1373 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1375 = _T_1374 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1376 = _T_1375 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1377 = _T_1376 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1378 = _T_1377 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1379 = _T_1297 | _T_1378; // @[el2_dec_dec_ctl.scala 101:136] + wire _T_1387 = ~io_ins[28]; // @[el2_dec_dec_ctl.scala 15:46] + wire _T_1434 = _T_1351 & _T_1387; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1435 = _T_1434 & _T_1224; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1436 = _T_1435 & _T_1226; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1437 = _T_1436 & _T_4; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1438 = _T_1437 & _T_1230; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1439 = _T_1438 & _T_1232; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1440 = _T_1439 & _T_838; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1441 = _T_1440 & _T_852; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1442 = _T_1441 & _T_1239; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1443 = _T_1442 & _T_1241; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1444 = _T_1443 & _T_1243; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1445 = _T_1444 & _T_1245; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1446 = _T_1445 & _T_1247; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1447 = _T_1446 & _T_14; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1448 = _T_1447 & _T_1251; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1449 = _T_1448 & _T_1253; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1450 = _T_1449 & _T_1255; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1451 = _T_1450 & _T_1257; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1452 = _T_1451 & _T_1259; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1453 = _T_1452 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1454 = _T_1453 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1455 = _T_1454 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1456 = _T_1455 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1457 = _T_1456 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1458 = _T_1457 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1459 = _T_1379 | _T_1458; // @[el2_dec_dec_ctl.scala 102:122] + wire _T_1487 = _T_1437 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1488 = _T_1487 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1489 = _T_1488 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1490 = _T_1489 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1491 = _T_1490 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1492 = _T_1459 | _T_1491; // @[el2_dec_dec_ctl.scala 103:119] + wire _T_1519 = _T_1218 & _T_1303; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1520 = _T_1519 & _T_1387; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1521 = _T_1520 & _T_1224; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1522 = _T_1521 & _T_1226; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1523 = _T_1522 & _T_4; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1524 = _T_1523 & _T_14; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1525 = _T_1524 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1526 = _T_1525 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1527 = _T_1526 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1528 = _T_1527 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1529 = _T_1528 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1530 = _T_1529 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1531 = _T_1530 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1532 = _T_1492 | _T_1531; // @[el2_dec_dec_ctl.scala 104:60] + wire _T_1561 = _T_1523 & io_ins[14]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1562 = _T_1561 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1563 = _T_1562 & io_ins[12]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1564 = _T_1563 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1565 = _T_1564 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1566 = _T_1565 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1567 = _T_1566 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1568 = _T_1567 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1569 = _T_1532 | _T_1568; // @[el2_dec_dec_ctl.scala 105:69] + wire _T_1595 = _T_1436 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1596 = _T_1595 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1597 = _T_1596 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1598 = _T_1597 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1599 = _T_1598 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1600 = _T_1599 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1601 = _T_1569 | _T_1600; // @[el2_dec_dec_ctl.scala 106:66] + wire _T_1618 = _T_235 & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1619 = _T_1618 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1620 = _T_1619 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1621 = _T_1620 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1622 = _T_1621 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1623 = _T_1622 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1624 = _T_1601 | _T_1623; // @[el2_dec_dec_ctl.scala 107:58] + wire _T_1636 = io_ins[14] & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1637 = _T_1636 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1638 = _T_1637 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1639 = _T_1638 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1640 = _T_1639 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1641 = _T_1640 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1642 = _T_1641 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1643 = _T_1624 | _T_1642; // @[el2_dec_dec_ctl.scala 108:46] + wire _T_1655 = _T_143 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1656 = _T_1655 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1657 = _T_1656 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1658 = _T_1657 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1659 = _T_1658 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1660 = _T_1659 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1661 = _T_1643 | _T_1660; // @[el2_dec_dec_ctl.scala 109:40] + wire _T_1676 = _T_19 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1677 = _T_1676 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1678 = _T_1677 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1679 = _T_1678 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1680 = _T_1679 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1681 = _T_1680 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1682 = _T_1661 | _T_1681; // @[el2_dec_dec_ctl.scala 110:39] + wire _T_1693 = io_ins[12] & io_ins[6]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1694 = _T_1693 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1695 = _T_1694 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1696 = _T_1695 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1697 = _T_1696 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1698 = _T_1697 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1699 = _T_1698 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1700 = _T_1682 | _T_1699; // @[el2_dec_dec_ctl.scala 111:43] + wire _T_1769 = _T_1441 & _T_854; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1770 = _T_1769 & _T_1239; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1771 = _T_1770 & _T_1241; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1772 = _T_1771 & _T_1243; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1773 = _T_1772 & _T_1245; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1774 = _T_1773 & _T_1247; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1775 = _T_1774 & _T_14; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1776 = _T_1775 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1777 = _T_1776 & _T_1251; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1778 = _T_1777 & _T_1253; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1779 = _T_1778 & _T_1255; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1780 = _T_1779 & _T_1257; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1781 = _T_1780 & _T_1259; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1782 = _T_1781 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1783 = _T_1782 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1784 = _T_1783 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1785 = _T_1784 & io_ins[3]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1786 = _T_1785 & io_ins[2]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1787 = _T_1786 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1788 = _T_1787 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1789 = _T_1700 | _T_1788; // @[el2_dec_dec_ctl.scala 112:39] + wire _T_1837 = _T_1434 & _T_1239; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1838 = _T_1837 & _T_1241; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1839 = _T_1838 & _T_1243; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1840 = _T_1839 & _T_1245; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1841 = _T_1840 & _T_1247; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1842 = _T_1841 & _T_14; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1843 = _T_1842 & _T_16; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1844 = _T_1843 & _T_143; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1845 = _T_1844 & _T_1251; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1846 = _T_1845 & _T_1253; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1847 = _T_1846 & _T_1255; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1848 = _T_1847 & _T_1257; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1849 = _T_1848 & _T_1259; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1850 = _T_1849 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1851 = _T_1850 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1852 = _T_1851 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1853 = _T_1852 & io_ins[3]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1854 = _T_1853 & io_ins[2]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1855 = _T_1854 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1856 = _T_1855 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1857 = _T_1789 | _T_1856; // @[el2_dec_dec_ctl.scala 113:130] + wire _T_1869 = _T_524 & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1870 = _T_1869 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1871 = _T_1870 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1872 = _T_1871 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1873 = _T_1872 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1874 = _T_1873 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1875 = _T_1857 | _T_1874; // @[el2_dec_dec_ctl.scala 114:102] + wire _T_1890 = _T_16 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1891 = _T_1890 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1892 = _T_1891 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1893 = _T_1892 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1894 = _T_1893 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1895 = _T_1894 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1896 = _T_1895 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1897 = _T_1875 | _T_1896; // @[el2_dec_dec_ctl.scala 115:39] + wire _T_1906 = io_ins[6] & io_ins[5]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1907 = _T_1906 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1908 = _T_1907 & io_ins[3]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1909 = _T_1908 & io_ins[2]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1910 = _T_1909 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1911 = _T_1910 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1912 = _T_1897 | _T_1911; // @[el2_dec_dec_ctl.scala 116:43] + wire _T_1924 = _T_653 & _T_9; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1925 = _T_1924 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1926 = _T_1925 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1927 = _T_1926 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1928 = _T_1927 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1929 = _T_1912 | _T_1928; // @[el2_dec_dec_ctl.scala 117:35] + wire _T_1945 = _T_582 & _T_103; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1946 = _T_1945 & _T_97; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1947 = _T_1946 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1948 = _T_1947 & _T_18; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1949 = _T_1948 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1950 = _T_1949 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1951 = _T_1929 | _T_1950; // @[el2_dec_dec_ctl.scala 118:38] + wire _T_1960 = _T_103 & io_ins[4]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1961 = _T_1960 & _T_99; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1962 = _T_1961 & io_ins[2]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1963 = _T_1962 & io_ins[1]; // @[el2_dec_dec_ctl.scala 17:17] + wire _T_1964 = _T_1963 & io_ins[0]; // @[el2_dec_dec_ctl.scala 17:17] + assign io_out_alu = _T_7 | _T_11; // @[el2_dec_dec_ctl.scala 20:14] + assign io_out_rs2 = _T_114 | _T_121; // @[el2_dec_dec_ctl.scala 27:14] + assign io_out_rs1 = _T_101 | _T_106; // @[el2_dec_dec_ctl.scala 21:14] + assign io_out_imm12 = _T_149 | _T_159; // @[el2_dec_dec_ctl.scala 28:16] + assign io_out_rd = _T_169 | io_ins[4]; // @[el2_dec_dec_ctl.scala 30:13] + assign io_out_shimm5 = _T_182 & _T_18; // @[el2_dec_dec_ctl.scala 31:17] + assign io_out_imm20 = _T_186 | _T_189; // @[el2_dec_dec_ctl.scala 32:16] + assign io_out_pc = _T_197 | _T_186; // @[el2_dec_dec_ctl.scala 33:13] + assign io_out_load = _T_208 & _T_18; // @[el2_dec_dec_ctl.scala 34:15] + assign io_out_store = _T_120 & _T_97; // @[el2_dec_dec_ctl.scala 35:16] + assign io_out_lsu = _T_223 & _T_18; // @[el2_dec_dec_ctl.scala 36:14] + assign io_out_add = _T_245 | _T_267; // @[el2_dec_dec_ctl.scala 37:14] + assign io_out_sub = _T_311 | _T_318; // @[el2_dec_dec_ctl.scala 39:14] + assign io_out_land = _T_330 | _T_344; // @[el2_dec_dec_ctl.scala 41:15] + assign io_out_lor = _T_381 | _T_393; // @[el2_dec_dec_ctl.scala 42:14] + assign io_out_lxor = _T_409 | _T_424; // @[el2_dec_dec_ctl.scala 45:15] + assign io_out_sll = _T_442 & _T_18; // @[el2_dec_dec_ctl.scala 46:14] + assign io_out_sra = _T_456 & _T_18; // @[el2_dec_dec_ctl.scala 47:14] + assign io_out_srl = _T_476 & _T_18; // @[el2_dec_dec_ctl.scala 48:14] + assign io_out_slt = _T_297 | _T_310; // @[el2_dec_dec_ctl.scala 49:14] + assign io_out_unsign = _T_551 | _T_564; // @[el2_dec_dec_ctl.scala 50:17] + assign io_out_condbr = _T_317 & _T_18; // @[el2_dec_dec_ctl.scala 53:17] + assign io_out_beq = _T_584 & _T_18; // @[el2_dec_dec_ctl.scala 54:14] + assign io_out_bne = _T_596 & _T_18; // @[el2_dec_dec_ctl.scala 55:14] + assign io_out_bge = _T_607 & _T_18; // @[el2_dec_dec_ctl.scala 56:14] + assign io_out_blt = _T_619 & _T_18; // @[el2_dec_dec_ctl.scala 57:14] + assign io_out_jal = io_ins[6] & io_ins[2]; // @[el2_dec_dec_ctl.scala 58:14] + assign io_out_by = _T_636 & _T_18; // @[el2_dec_dec_ctl.scala 59:13] + assign io_out_half = _T_646 & _T_18; // @[el2_dec_dec_ctl.scala 60:15] + assign io_out_word = _T_653 & _T_97; // @[el2_dec_dec_ctl.scala 61:15] + assign io_out_csr_read = _T_683 | _T_688; // @[el2_dec_dec_ctl.scala 62:19] + assign io_out_csr_clr = _T_727 | _T_735; // @[el2_dec_dec_ctl.scala 65:18] + assign io_out_csr_set = _T_827 | _T_735; // @[el2_dec_dec_ctl.scala 72:18] + assign io_out_csr_write = _T_743 & io_ins[4]; // @[el2_dec_dec_ctl.scala 68:20] + assign io_out_csr_imm = _T_784 | _T_791; // @[el2_dec_dec_ctl.scala 69:18] + assign io_out_presync = _T_1104 | _T_1111; // @[el2_dec_dec_ctl.scala 89:18] + assign io_out_postsync = _T_1208 | _T_1111; // @[el2_dec_dec_ctl.scala 95:19] + assign io_out_ebreak = _T_849 & io_ins[4]; // @[el2_dec_dec_ctl.scala 75:17] + assign io_out_ecall = _T_864 & io_ins[4]; // @[el2_dec_dec_ctl.scala 76:16] + assign io_out_mret = _T_875 & io_ins[4]; // @[el2_dec_dec_ctl.scala 77:15] + assign io_out_mul = _T_889 & _T_18; // @[el2_dec_dec_ctl.scala 78:14] + assign io_out_rs1_sign = _T_909 | _T_926; // @[el2_dec_dec_ctl.scala 79:19] + assign io_out_rs2_sign = _T_925 & _T_18; // @[el2_dec_dec_ctl.scala 81:19] + assign io_out_low = _T_960 & _T_18; // @[el2_dec_dec_ctl.scala 82:14] + assign io_out_div = _T_971 & _T_18; // @[el2_dec_dec_ctl.scala 83:14] + assign io_out_rem = _T_984 & _T_18; // @[el2_dec_dec_ctl.scala 84:14] + assign io_out_fence = _T_9 & io_ins[3]; // @[el2_dec_dec_ctl.scala 85:16] + assign io_out_fence_i = _T_994 & io_ins[3]; // @[el2_dec_dec_ctl.scala 86:18] + assign io_out_pm_alu = _T_1018 | _T_11; // @[el2_dec_dec_ctl.scala 87:17] + assign io_out_legal = _T_1951 | _T_1964; // @[el2_dec_dec_ctl.scala 101:16] +endmodule +module el2_dec_decode_ctl( + input clock, + input reset, + input io_dec_tlu_flush_extint, + input io_dec_tlu_force_halt, + output io_dec_extint_stall, + input [15:0] io_ifu_i0_cinst, + output [31:0] io_dec_i0_inst_wb1, + output [30:0] io_dec_i0_pc_wb1, + input io_lsu_nonblock_load_valid_m, + input [2:0] io_lsu_nonblock_load_tag_m, + input io_lsu_nonblock_load_inv_r, + input [2:0] io_lsu_nonblock_load_inv_tag_r, + input io_lsu_nonblock_load_data_valid, + input io_lsu_nonblock_load_data_error, + input [2:0] io_lsu_nonblock_load_data_tag, + input [31:0] io_lsu_nonblock_load_data, + input [3:0] io_dec_i0_trigger_match_d, + input io_dec_tlu_wr_pause_r, + input io_dec_tlu_pipelining_disable, + input [3:0] io_lsu_trigger_match_m, + input io_lsu_pmu_misaligned_m, + input io_dec_tlu_debug_stall, + input io_dec_tlu_flush_leak_one_r, + input io_dec_debug_fence_d, + input [1:0] io_dbg_cmd_wrdata, + input io_dec_i0_icaf_d, + input io_dec_i0_icaf_f1_d, + input [1:0] io_dec_i0_icaf_type_d, + input io_dec_i0_dbecc_d, + input io_dec_i0_brp_valid, + input [11:0] io_dec_i0_brp_toffset, + input [1:0] io_dec_i0_brp_hist, + input io_dec_i0_brp_br_error, + input io_dec_i0_brp_br_start_error, + input io_dec_i0_brp_bank, + input [30:0] io_dec_i0_brp_prett, + input io_dec_i0_brp_way, + input io_dec_i0_brp_ret, + input [7:0] io_dec_i0_bp_index, + input [7:0] io_dec_i0_bp_fghr, + input [4:0] io_dec_i0_bp_btag, + input [30:0] io_dec_i0_pc_d, + input io_lsu_idle_any, + input io_lsu_load_stall_any, + input io_lsu_store_stall_any, + input io_dma_dccm_stall_any, + input io_exu_div_wren, + input io_dec_tlu_i0_kill_writeb_wb, + input io_dec_tlu_flush_lower_wb, + input io_dec_tlu_i0_kill_writeb_r, + input io_dec_tlu_flush_lower_r, + input io_dec_tlu_flush_pause_r, + input io_dec_tlu_presync_d, + input io_dec_tlu_postsync_d, + input io_dec_i0_pc4_d, + input [31:0] io_dec_csr_rddata_d, + input io_dec_csr_legal_d, + input [31:0] io_exu_csr_rs1_x, + input [31:0] io_lsu_result_m, + input [31:0] io_lsu_result_corr_r, + input io_exu_flush_final, + input [30:0] io_exu_i0_pc_x, + input [31:0] io_dec_i0_instr_d, + input io_dec_ib0_valid_d, + input [31:0] io_exu_i0_result_x, + input io_free_clk, + input io_active_clk, + input io_clk_override, + output io_dec_i0_rs1_en_d, + output io_dec_i0_rs2_en_d, + output [4:0] io_dec_i0_rs1_d, + output [4:0] io_dec_i0_rs2_d, + output [31:0] io_dec_i0_immed_d, + output [11:0] io_dec_i0_br_immed_d, + output io_i0_ap_land, + output io_i0_ap_lor, + output io_i0_ap_lxor, + output io_i0_ap_sll, + output io_i0_ap_srl, + output io_i0_ap_sra, + output io_i0_ap_beq, + output io_i0_ap_bne, + output io_i0_ap_blt, + output io_i0_ap_bge, + output io_i0_ap_add, + output io_i0_ap_sub, + output io_i0_ap_slt, + output io_i0_ap_unsign, + output io_i0_ap_jal, + output io_i0_ap_predict_t, + output io_i0_ap_predict_nt, + output io_i0_ap_csr_write, + output io_i0_ap_csr_imm, + output io_dec_i0_decode_d, + output io_dec_i0_alu_decode_d, + output [31:0] io_dec_i0_rs1_bypass_data_d, + output [31:0] io_dec_i0_rs2_bypass_data_d, + output [4:0] io_dec_i0_waddr_r, + output io_dec_i0_wen_r, + output [31:0] io_dec_i0_wdata_r, + output io_dec_i0_select_pc_d, + output [1:0] io_dec_i0_rs1_bypass_en_d, + output [1:0] io_dec_i0_rs2_bypass_en_d, + output io_lsu_p_fast_int, + output io_lsu_p_by, + output io_lsu_p_half, + output io_lsu_p_word, + output io_lsu_p_dword, + output io_lsu_p_load, + output io_lsu_p_store, + output io_lsu_p_unsign, + output io_lsu_p_dma, + output io_lsu_p_store_data_bypass_d, + output io_lsu_p_load_ldst_bypass_d, + output io_lsu_p_store_data_bypass_m, + output io_lsu_p_valid, + output io_mul_p_valid, + output io_mul_p_rs1_sign, + output io_mul_p_rs2_sign, + output io_mul_p_low, + output io_mul_p_bext, + output io_mul_p_bdep, + output io_mul_p_clmul, + output io_mul_p_clmulh, + output io_mul_p_clmulr, + output io_mul_p_grev, + output io_mul_p_shfl, + output io_mul_p_unshfl, + output io_mul_p_crc32_b, + output io_mul_p_crc32_h, + output io_mul_p_crc32_w, + output io_mul_p_crc32c_b, + output io_mul_p_crc32c_h, + output io_mul_p_crc32c_w, + output io_mul_p_bfp, + output io_div_p_valid, + output io_div_p_unsign, + output io_div_p_rem, + output [4:0] io_div_waddr_wb, + output io_dec_div_cancel, + output io_dec_lsu_valid_raw_d, + output [11:0] io_dec_lsu_offset_d, + output io_dec_csr_ren_d, + output io_dec_csr_wen_unq_d, + output io_dec_csr_any_unq_d, + output [11:0] io_dec_csr_rdaddr_d, + output io_dec_csr_wen_r, + output [11:0] io_dec_csr_wraddr_r, + output [31:0] io_dec_csr_wrdata_r, + output io_dec_csr_stall_int_ff, + output io_dec_tlu_i0_valid_r, + output io_dec_tlu_packet_r_legal, + output io_dec_tlu_packet_r_icaf, + output io_dec_tlu_packet_r_icaf_f1, + output [1:0] io_dec_tlu_packet_r_icaf_type, + output io_dec_tlu_packet_r_fence_i, + output [3:0] io_dec_tlu_packet_r_i0trigger, + output [3:0] io_dec_tlu_packet_r_pmu_i0_itype, + output io_dec_tlu_packet_r_pmu_i0_br_unpred, + output io_dec_tlu_packet_r_pmu_divide, + output io_dec_tlu_packet_r_pmu_lsu_misaligned, + output [30:0] io_dec_tlu_i0_pc_r, + output [31:0] io_dec_illegal_inst, + output [30:0] io_pred_correct_npc_x, + output io_dec_i0_predict_p_d_misp, + output io_dec_i0_predict_p_d_ataken, + output io_dec_i0_predict_p_d_boffset, + output io_dec_i0_predict_p_d_pc4, + output [1:0] io_dec_i0_predict_p_d_hist, + output [11:0] io_dec_i0_predict_p_d_toffset, + output io_dec_i0_predict_p_d_valid, + output io_dec_i0_predict_p_d_br_error, + output io_dec_i0_predict_p_d_br_start_error, + output [30:0] io_dec_i0_predict_p_d_prett, + output io_dec_i0_predict_p_d_pcall, + output io_dec_i0_predict_p_d_pret, + output io_dec_i0_predict_p_d_pja, + output io_dec_i0_predict_p_d_way, + output [7:0] io_i0_predict_fghr_d, + output [7:0] io_i0_predict_index_d, + output [4:0] io_i0_predict_btag_d, + output [1:0] io_dec_data_en, + output [1:0] io_dec_ctl_en, + output io_dec_pmu_instr_decoded, + output io_dec_pmu_decode_stall, + output io_dec_pmu_presync_stall, + output io_dec_pmu_postsync_stall, + output io_dec_nonblock_load_wen, + output [4:0] io_dec_nonblock_load_waddr, + output io_dec_pause_state, + output io_dec_pause_state_cg, + output io_dec_div_active, + input io_scan_mode +); +`ifdef RANDOMIZE_REG_INIT + reg [31:0] _RAND_0; + reg [31:0] _RAND_1; + reg [31:0] _RAND_2; + reg [31:0] _RAND_3; + reg [31:0] _RAND_4; + reg [31:0] _RAND_5; + reg [31:0] _RAND_6; + reg [31:0] _RAND_7; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; + reg [31:0] _RAND_24; + reg [31:0] _RAND_25; + reg [31:0] _RAND_26; + reg [31:0] _RAND_27; + reg [31:0] _RAND_28; + reg [31:0] _RAND_29; + reg [31:0] _RAND_30; + reg [31:0] _RAND_31; + reg [31:0] _RAND_32; + reg [31:0] _RAND_33; + reg [31:0] _RAND_34; + reg [31:0] _RAND_35; + reg [31:0] _RAND_36; + reg [31:0] _RAND_37; + reg [31:0] _RAND_38; + reg [31:0] _RAND_39; + reg [31:0] _RAND_40; + reg [31:0] _RAND_41; + reg [31:0] _RAND_42; + reg [31:0] _RAND_43; + reg [31:0] _RAND_44; + reg [31:0] _RAND_45; + reg [31:0] _RAND_46; + reg [31:0] _RAND_47; + reg [31:0] _RAND_48; + reg [31:0] _RAND_49; + reg [31:0] _RAND_50; + reg [31:0] _RAND_51; + reg [31:0] _RAND_52; + reg [31:0] _RAND_53; + reg [31:0] _RAND_54; + reg [31:0] _RAND_55; + reg [31:0] _RAND_56; + reg [31:0] _RAND_57; + reg [31:0] _RAND_58; + reg [31:0] _RAND_59; + reg [31:0] _RAND_60; + reg [31:0] _RAND_61; + reg [31:0] _RAND_62; + reg [31:0] _RAND_63; + reg [31:0] _RAND_64; + reg [31:0] _RAND_65; + reg [31:0] _RAND_66; + reg [31:0] _RAND_67; + reg [31:0] _RAND_68; + reg [31:0] _RAND_69; + reg [31:0] _RAND_70; + reg [31:0] _RAND_71; + reg [31:0] _RAND_72; + reg [31:0] _RAND_73; + reg [31:0] _RAND_74; + reg [31:0] _RAND_75; + reg [31:0] _RAND_76; + reg [31:0] _RAND_77; + reg [31:0] _RAND_78; + reg [31:0] _RAND_79; + reg [31:0] _RAND_80; + reg [31:0] _RAND_81; + reg [31:0] _RAND_82; + reg [31:0] _RAND_83; + reg [31:0] _RAND_84; + reg [31:0] _RAND_85; + reg [31:0] _RAND_86; + reg [31:0] _RAND_87; + reg [31:0] _RAND_88; + reg [31:0] _RAND_89; + reg [31:0] _RAND_90; +`endif // RANDOMIZE_REG_INIT + wire data_gated_cgc_io_l1clk; // @[el2_dec_decode_ctl.scala 221:29] + wire data_gated_cgc_io_clk; // @[el2_dec_decode_ctl.scala 221:29] + wire data_gated_cgc_io_en; // @[el2_dec_decode_ctl.scala 221:29] + wire data_gated_cgc_io_scan_mode; // @[el2_dec_decode_ctl.scala 221:29] + wire [31:0] i0_dec_io_ins; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_alu; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_rs2; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_rs1; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_imm12; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_rd; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_shimm5; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_imm20; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_pc; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_load; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_store; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_lsu; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_add; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_sub; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_land; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_lor; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_lxor; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_sll; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_sra; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_srl; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_slt; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_unsign; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_condbr; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_beq; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_bne; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_bge; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_blt; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_jal; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_by; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_half; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_word; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_csr_read; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_csr_clr; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_csr_set; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_csr_write; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_csr_imm; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_presync; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_postsync; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_ebreak; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_ecall; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_mret; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_mul; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_rs1_sign; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_rs2_sign; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_low; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_div; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_rem; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_fence; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_fence_i; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_pm_alu; // @[el2_dec_decode_ctl.scala 396:24] + wire i0_dec_io_out_legal; // @[el2_dec_decode_ctl.scala 396:24] + wire rvclkhdr_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_1_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_1_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_1_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_1_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_2_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_2_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_2_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_2_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_3_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_3_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_3_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_3_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_4_io_l1clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_4_io_clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_4_io_en; // @[beh_lib.scala 360:21] + wire rvclkhdr_4_io_scan_mode; // @[beh_lib.scala 360:21] + wire rvclkhdr_5_io_l1clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_5_io_clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_5_io_en; // @[beh_lib.scala 360:21] + wire rvclkhdr_5_io_scan_mode; // @[beh_lib.scala 360:21] + wire rvclkhdr_6_io_l1clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_6_io_clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_6_io_en; // @[beh_lib.scala 360:21] + wire rvclkhdr_6_io_scan_mode; // @[beh_lib.scala 360:21] + wire rvclkhdr_7_io_l1clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_7_io_clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_7_io_en; // @[beh_lib.scala 360:21] + wire rvclkhdr_7_io_scan_mode; // @[beh_lib.scala 360:21] + wire rvclkhdr_8_io_l1clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_8_io_clk; // @[beh_lib.scala 360:21] + wire rvclkhdr_8_io_en; // @[beh_lib.scala 360:21] + wire rvclkhdr_8_io_scan_mode; // @[beh_lib.scala 360:21] + wire rvclkhdr_9_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_9_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_9_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_9_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_10_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_10_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_10_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_10_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_11_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_11_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_11_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_11_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_12_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_12_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_12_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_12_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_13_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_13_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_13_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_13_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_14_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_14_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_14_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_14_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_15_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_15_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_15_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_15_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_16_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_16_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_16_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_16_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_17_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_17_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_17_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_17_io_scan_mode; // @[beh_lib.scala 350:21] + wire rvclkhdr_18_io_l1clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_18_io_clk; // @[beh_lib.scala 350:21] + wire rvclkhdr_18_io_en; // @[beh_lib.scala 350:21] + wire rvclkhdr_18_io_scan_mode; // @[beh_lib.scala 350:21] + reg tlu_wr_pause_r1; // @[el2_dec_decode_ctl.scala 503:29] + wire _T_1 = io_dec_tlu_wr_pause_r ^ tlu_wr_pause_r1; // @[el2_dec_decode_ctl.scala 211:51] + reg tlu_wr_pause_r2; // @[el2_dec_decode_ctl.scala 504:29] + wire _T_2 = tlu_wr_pause_r1 ^ tlu_wr_pause_r2; // @[el2_dec_decode_ctl.scala 212:50] + wire _T_3 = _T_1 | _T_2; // @[el2_dec_decode_ctl.scala 211:73] + wire _T_4 = io_dec_tlu_flush_extint ^ io_dec_extint_stall; // @[el2_dec_decode_ctl.scala 213:50] + wire _T_5 = _T_3 | _T_4; // @[el2_dec_decode_ctl.scala 212:74] + reg leak1_i1_stall; // @[el2_dec_decode_ctl.scala 404:56] + wire _T_279 = ~io_dec_tlu_flush_lower_r; // @[el2_dec_decode_ctl.scala 403:73] + wire _T_280 = leak1_i1_stall & _T_279; // @[el2_dec_decode_ctl.scala 403:71] + wire leak1_i1_stall_in = io_dec_tlu_flush_leak_one_r | _T_280; // @[el2_dec_decode_ctl.scala 403:53] + wire _T_6 = leak1_i1_stall_in ^ leak1_i1_stall; // @[el2_dec_decode_ctl.scala 214:50] + wire _T_7 = _T_5 | _T_6; // @[el2_dec_decode_ctl.scala 213:74] + wire _T_283 = io_dec_i0_decode_d & leak1_i1_stall; // @[el2_dec_decode_ctl.scala 406:45] + reg leak1_i0_stall; // @[el2_dec_decode_ctl.scala 407:56] + wire _T_285 = leak1_i0_stall & _T_279; // @[el2_dec_decode_ctl.scala 406:81] + wire leak1_i0_stall_in = _T_283 | _T_285; // @[el2_dec_decode_ctl.scala 406:63] + wire _T_8 = leak1_i0_stall_in ^ leak1_i0_stall; // @[el2_dec_decode_ctl.scala 215:50] + wire _T_9 = _T_7 | _T_8; // @[el2_dec_decode_ctl.scala 214:74] + reg pause_stall; // @[el2_dec_decode_ctl.scala 501:50] + wire _T_412 = io_dec_tlu_wr_pause_r | pause_stall; // @[el2_dec_decode_ctl.scala 500:44] + wire _T_408 = ~io_dec_tlu_flush_pause_r; // @[el2_dec_decode_ctl.scala 499:49] + wire _T_409 = io_dec_tlu_flush_lower_r & _T_408; // @[el2_dec_decode_ctl.scala 499:47] + reg [31:0] write_csr_data; // @[beh_lib.scala 356:14] + wire _T_410 = write_csr_data == 32'h0; // @[el2_dec_decode_ctl.scala 499:109] + wire _T_411 = pause_stall & _T_410; // @[el2_dec_decode_ctl.scala 499:91] + wire clear_pause = _T_409 | _T_411; // @[el2_dec_decode_ctl.scala 499:76] + wire _T_413 = ~clear_pause; // @[el2_dec_decode_ctl.scala 500:61] + wire pause_state_in = _T_412 & _T_413; // @[el2_dec_decode_ctl.scala 500:59] + wire _T_10 = pause_state_in ^ pause_stall; // @[el2_dec_decode_ctl.scala 216:50] + wire _T_11 = _T_9 | _T_10; // @[el2_dec_decode_ctl.scala 215:74] + wire _T_17 = ~leak1_i1_stall; // @[el2_dec_decode_ctl.scala 229:62] + wire i0_brp_valid = io_dec_i0_brp_valid & _T_17; // @[el2_dec_decode_ctl.scala 229:60] + wire i0_dp_raw_condbr = i0_dec_io_out_condbr; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_jal = i0_dec_io_out_jal; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire [20:0] i0_pcall_imm = {io_dec_i0_instr_d[31],io_dec_i0_instr_d[19:12],io_dec_i0_instr_d[20],io_dec_i0_instr_d[30:21],1'h0}; // @[Cat.scala 29:58] + wire _T_298 = i0_pcall_imm[20:13] == 8'hff; // @[el2_dec_decode_ctl.scala 412:79] + wire _T_300 = i0_pcall_imm[20:13] == 8'h0; // @[el2_dec_decode_ctl.scala 412:112] + wire i0_pcall_12b_offset = i0_pcall_imm[12] ? _T_298 : _T_300; // @[el2_dec_decode_ctl.scala 412:33] + wire i0_dp_raw_imm20 = i0_dec_io_out_imm20; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire _T_301 = i0_pcall_12b_offset & i0_dp_raw_imm20; // @[el2_dec_decode_ctl.scala 413:47] + wire [4:0] i0r_rd = io_dec_i0_instr_d[11:7]; // @[el2_dec_decode_ctl.scala 626:16] + wire _T_302 = i0r_rd == 5'h1; // @[el2_dec_decode_ctl.scala 413:76] + wire _T_303 = i0r_rd == 5'h5; // @[el2_dec_decode_ctl.scala 413:98] + wire _T_304 = _T_302 | _T_303; // @[el2_dec_decode_ctl.scala 413:89] + wire i0_pcall_case = _T_301 & _T_304; // @[el2_dec_decode_ctl.scala 413:65] + wire i0_pcall_raw = i0_dp_raw_jal & i0_pcall_case; // @[el2_dec_decode_ctl.scala 415:38] + wire _T_19 = i0_dp_raw_condbr | i0_pcall_raw; // @[el2_dec_decode_ctl.scala 240:75] + wire _T_309 = ~_T_304; // @[el2_dec_decode_ctl.scala 414:67] + wire i0_pja_case = _T_301 & _T_309; // @[el2_dec_decode_ctl.scala 414:65] + wire i0_pja_raw = i0_dp_raw_jal & i0_pja_case; // @[el2_dec_decode_ctl.scala 417:38] + wire _T_20 = _T_19 | i0_pja_raw; // @[el2_dec_decode_ctl.scala 240:90] + wire i0_dp_raw_imm12 = i0_dec_io_out_imm12; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire _T_325 = i0_dp_raw_jal & i0_dp_raw_imm12; // @[el2_dec_decode_ctl.scala 421:37] + wire _T_326 = i0r_rd == 5'h0; // @[el2_dec_decode_ctl.scala 421:65] + wire _T_327 = _T_325 & _T_326; // @[el2_dec_decode_ctl.scala 421:55] + wire [4:0] i0r_rs1 = io_dec_i0_instr_d[19:15]; // @[el2_dec_decode_ctl.scala 624:16] + wire _T_328 = i0r_rs1 == 5'h1; // @[el2_dec_decode_ctl.scala 421:89] + wire _T_329 = i0r_rs1 == 5'h5; // @[el2_dec_decode_ctl.scala 421:111] + wire _T_330 = _T_328 | _T_329; // @[el2_dec_decode_ctl.scala 421:101] + wire i0_pret_case = _T_327 & _T_330; // @[el2_dec_decode_ctl.scala 421:79] + wire i0_pret_raw = i0_dp_raw_jal & i0_pret_case; // @[el2_dec_decode_ctl.scala 422:32] + wire _T_21 = _T_20 | i0_pret_raw; // @[el2_dec_decode_ctl.scala 240:103] + wire _T_22 = ~_T_21; // @[el2_dec_decode_ctl.scala 240:56] + wire i0_notbr_error = i0_brp_valid & _T_22; // @[el2_dec_decode_ctl.scala 240:54] + wire _T_30 = io_dec_i0_brp_br_error | i0_notbr_error; // @[el2_dec_decode_ctl.scala 245:57] + wire _T_24 = i0_brp_valid & io_dec_i0_brp_hist[1]; // @[el2_dec_decode_ctl.scala 243:47] + wire _T_314 = i0_pcall_raw | i0_pja_raw; // @[el2_dec_decode_ctl.scala 419:41] + wire [11:0] _T_323 = {io_dec_i0_instr_d[31],io_dec_i0_instr_d[7],io_dec_i0_instr_d[30:25],io_dec_i0_instr_d[11:8]}; // @[Cat.scala 29:58] + wire [11:0] i0_br_offset = _T_314 ? i0_pcall_imm[12:1] : _T_323; // @[el2_dec_decode_ctl.scala 419:26] + wire _T_25 = io_dec_i0_brp_toffset != i0_br_offset; // @[el2_dec_decode_ctl.scala 243:96] + wire _T_26 = _T_24 & _T_25; // @[el2_dec_decode_ctl.scala 243:71] + wire _T_27 = ~i0_pret_raw; // @[el2_dec_decode_ctl.scala 243:116] + wire i0_br_toffset_error = _T_26 & _T_27; // @[el2_dec_decode_ctl.scala 243:114] + wire _T_31 = _T_30 | i0_br_toffset_error; // @[el2_dec_decode_ctl.scala 245:74] + wire _T_28 = i0_brp_valid & io_dec_i0_brp_ret; // @[el2_dec_decode_ctl.scala 244:47] + wire i0_ret_error = _T_28 & _T_27; // @[el2_dec_decode_ctl.scala 244:67] + wire i0_br_error = _T_31 | i0_ret_error; // @[el2_dec_decode_ctl.scala 245:96] + wire _T_38 = i0_br_error | io_dec_i0_brp_br_start_error; // @[el2_dec_decode_ctl.scala 250:47] + wire i0_br_error_all = _T_38 & _T_17; // @[el2_dec_decode_ctl.scala 250:79] + wire i0_icaf_d = io_dec_i0_icaf_d | io_dec_i0_dbecc_d; // @[el2_dec_decode_ctl.scala 259:36] + wire _T_40 = i0_br_error_all | i0_icaf_d; // @[el2_dec_decode_ctl.scala 263:25] + wire i0_dp_raw_postsync = i0_dec_io_out_postsync; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_postsync = _T_40 | i0_dp_raw_postsync; // @[el2_dec_decode_ctl.scala 263:50] + wire _T_439 = i0_dp_postsync | io_dec_tlu_postsync_d; // @[el2_dec_decode_ctl.scala 530:36] + wire debug_fence_i = io_dec_debug_fence_d & io_dbg_cmd_wrdata[0]; // @[el2_dec_decode_ctl.scala 522:48] + wire _T_440 = _T_439 | debug_fence_i; // @[el2_dec_decode_ctl.scala 530:60] + wire i0_dp_raw_csr_write = i0_dec_io_out_csr_write; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_csr_write = _T_40 ? 1'h0 : i0_dp_raw_csr_write; // @[el2_dec_decode_ctl.scala 263:50] + wire _T_343 = ~io_dec_debug_fence_d; // @[el2_dec_decode_ctl.scala 461:42] + wire i0_csr_write = i0_dp_csr_write & _T_343; // @[el2_dec_decode_ctl.scala 461:40] + wire i0_dp_raw_csr_read = i0_dec_io_out_csr_read; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_csr_read = _T_40 ? 1'h0 : i0_dp_raw_csr_read; // @[el2_dec_decode_ctl.scala 263:50] + wire _T_347 = ~i0_dp_csr_read; // @[el2_dec_decode_ctl.scala 466:41] + wire i0_csr_write_only_d = i0_csr_write & _T_347; // @[el2_dec_decode_ctl.scala 466:39] + wire _T_442 = io_dec_i0_instr_d[31:20] == 12'h7c2; // @[el2_dec_decode_ctl.scala 530:112] + wire _T_443 = i0_csr_write_only_d & _T_442; // @[el2_dec_decode_ctl.scala 530:99] + wire i0_postsync = _T_440 | _T_443; // @[el2_dec_decode_ctl.scala 530:76] + wire i0_dp_raw_legal = i0_dec_io_out_legal; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_legal = _T_40 | i0_dp_raw_legal; // @[el2_dec_decode_ctl.scala 263:50] + wire any_csr_d = i0_dp_csr_read | i0_csr_write; // @[el2_dec_decode_ctl.scala 532:34] + wire _T_444 = ~any_csr_d; // @[el2_dec_decode_ctl.scala 534:40] + wire _T_445 = _T_444 | io_dec_csr_legal_d; // @[el2_dec_decode_ctl.scala 534:51] + wire i0_legal = i0_dp_legal & _T_445; // @[el2_dec_decode_ctl.scala 534:37] + wire _T_504 = ~i0_legal; // @[el2_dec_decode_ctl.scala 574:56] + wire _T_505 = i0_postsync | _T_504; // @[el2_dec_decode_ctl.scala 574:54] + wire _T_506 = io_dec_i0_decode_d & _T_505; // @[el2_dec_decode_ctl.scala 574:39] + reg postsync_stall; // @[el2_dec_decode_ctl.scala 572:53] + reg x_d_i0valid; // @[beh_lib.scala 366:14] + wire _T_507 = postsync_stall & x_d_i0valid; // @[el2_dec_decode_ctl.scala 574:88] + wire ps_stall_in = _T_506 | _T_507; // @[el2_dec_decode_ctl.scala 574:69] + wire _T_12 = ps_stall_in ^ postsync_stall; // @[el2_dec_decode_ctl.scala 217:50] + wire _T_13 = _T_11 | _T_12; // @[el2_dec_decode_ctl.scala 216:74] + reg flush_final_r; // @[el2_dec_decode_ctl.scala 620:52] + wire _T_14 = io_exu_flush_final ^ flush_final_r; // @[el2_dec_decode_ctl.scala 218:50] + wire _T_15 = _T_13 | _T_14; // @[el2_dec_decode_ctl.scala 217:74] + wire shift_illegal = io_dec_i0_decode_d & _T_504; // @[el2_dec_decode_ctl.scala 538:47] + reg illegal_lockout; // @[el2_dec_decode_ctl.scala 542:54] + wire _T_466 = shift_illegal | illegal_lockout; // @[el2_dec_decode_ctl.scala 541:40] + wire _T_467 = ~flush_final_r; // @[el2_dec_decode_ctl.scala 541:61] + wire illegal_lockout_in = _T_466 & _T_467; // @[el2_dec_decode_ctl.scala 541:59] + wire _T_16 = illegal_lockout_in ^ illegal_lockout; // @[el2_dec_decode_ctl.scala 219:50] + wire i0_legal_decode_d = io_dec_i0_decode_d & i0_legal; // @[el2_dec_decode_ctl.scala 648:46] + wire _T_32 = i0_br_error & i0_legal_decode_d; // @[el2_dec_decode_ctl.scala 246:67] + wire _T_35 = io_dec_i0_brp_br_start_error & i0_legal_decode_d; // @[el2_dec_decode_ctl.scala 247:84] + wire i0_dp_raw_pm_alu = i0_dec_io_out_pm_alu; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_pm_alu = _T_40 ? 1'h0 : i0_dp_raw_pm_alu; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_fence_i = i0_dec_io_out_fence_i; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_fence_i = _T_40 ? 1'h0 : i0_dp_raw_fence_i; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_fence = i0_dec_io_out_fence; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_fence = _T_40 ? 1'h0 : i0_dp_raw_fence; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_rem = i0_dec_io_out_rem; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_div = i0_dec_io_out_div; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_div = _T_40 ? 1'h0 : i0_dp_raw_div; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_low = i0_dec_io_out_low; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_rs2_sign = i0_dec_io_out_rs2_sign; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_rs1_sign = i0_dec_io_out_rs1_sign; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_mul = i0_dec_io_out_mul; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_mul = _T_40 ? 1'h0 : i0_dp_raw_mul; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_mret = i0_dec_io_out_mret; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_mret = _T_40 ? 1'h0 : i0_dp_raw_mret; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_ecall = i0_dec_io_out_ecall; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_ecall = _T_40 ? 1'h0 : i0_dp_raw_ecall; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_ebreak = i0_dec_io_out_ebreak; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_ebreak = _T_40 ? 1'h0 : i0_dp_raw_ebreak; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_presync = i0_dec_io_out_presync; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_presync = _T_40 ? 1'h0 : i0_dp_raw_presync; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_csr_imm = i0_dec_io_out_csr_imm; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_csr_imm = _T_40 ? 1'h0 : i0_dp_raw_csr_imm; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_csr_set = i0_dec_io_out_csr_set; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_csr_set = _T_40 ? 1'h0 : i0_dp_raw_csr_set; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_csr_clr = i0_dec_io_out_csr_clr; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_csr_clr = _T_40 ? 1'h0 : i0_dp_raw_csr_clr; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_word = i0_dec_io_out_word; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_word = _T_40 ? 1'h0 : i0_dp_raw_word; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_half = i0_dec_io_out_half; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_half = _T_40 ? 1'h0 : i0_dp_raw_half; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_by = i0_dec_io_out_by; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_by = _T_40 ? 1'h0 : i0_dp_raw_by; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_jal = _T_40 ? 1'h0 : i0_dp_raw_jal; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_blt = i0_dec_io_out_blt; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_bge = i0_dec_io_out_bge; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_bne = i0_dec_io_out_bne; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_beq = i0_dec_io_out_beq; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_condbr = _T_40 ? 1'h0 : i0_dp_raw_condbr; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_unsign = i0_dec_io_out_unsign; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_unsign = _T_40 ? 1'h0 : i0_dp_raw_unsign; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_slt = i0_dec_io_out_slt; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_srl = i0_dec_io_out_srl; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_sra = i0_dec_io_out_sra; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_sll = i0_dec_io_out_sll; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_lxor = i0_dec_io_out_lxor; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_lor = i0_dec_io_out_lor; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_land = i0_dec_io_out_land; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_sub = i0_dec_io_out_sub; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_add = i0_dec_io_out_add; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_raw_lsu = i0_dec_io_out_lsu; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_lsu = _T_40 ? 1'h0 : i0_dp_raw_lsu; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_store = i0_dec_io_out_store; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_store = _T_40 ? 1'h0 : i0_dp_raw_store; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_load = i0_dec_io_out_load; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_load = _T_40 ? 1'h0 : i0_dp_raw_load; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_pc = i0_dec_io_out_pc; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_imm20 = _T_40 ? 1'h0 : i0_dp_raw_imm20; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_shimm5 = i0_dec_io_out_shimm5; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_shimm5 = _T_40 ? 1'h0 : i0_dp_raw_shimm5; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_rd = i0_dec_io_out_rd; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_rd = _T_40 ? 1'h0 : i0_dp_raw_rd; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_imm12 = _T_40 ? 1'h0 : i0_dp_raw_imm12; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_rs1 = i0_dec_io_out_rs1; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_rs1 = _T_40 | i0_dp_raw_rs1; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_rs2 = i0_dec_io_out_rs2; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_rs2 = _T_40 | i0_dp_raw_rs2; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_dp_raw_alu = i0_dec_io_out_alu; // @[el2_dec_decode_ctl.scala 156:22 el2_dec_decode_ctl.scala 398:14] + wire i0_dp_alu = _T_40 | i0_dp_raw_alu; // @[el2_dec_decode_ctl.scala 263:50] + wire i0_pcall = i0_dp_jal & i0_pcall_case; // @[el2_dec_decode_ctl.scala 416:38] + wire _T_43 = i0_dp_condbr | i0_pcall; // @[el2_dec_decode_ctl.scala 277:38] + wire i0_pja = i0_dp_jal & i0_pja_case; // @[el2_dec_decode_ctl.scala 418:38] + wire _T_44 = _T_43 | i0_pja; // @[el2_dec_decode_ctl.scala 277:49] + wire i0_pret = i0_dp_jal & i0_pret_case; // @[el2_dec_decode_ctl.scala 423:32] + wire i0_predict_br = _T_44 | i0_pret; // @[el2_dec_decode_ctl.scala 277:58] + wire _T_46 = io_dec_i0_brp_hist[1] & i0_brp_valid; // @[el2_dec_decode_ctl.scala 279:50] + wire _T_47 = ~_T_46; // @[el2_dec_decode_ctl.scala 279:26] + wire i0_ap_pc2 = ~io_dec_i0_pc4_d; // @[el2_dec_decode_ctl.scala 281:20] + wire cam_data_reset = io_lsu_nonblock_load_data_valid | io_lsu_nonblock_load_data_error; // @[el2_dec_decode_ctl.scala 314:63] + reg [2:0] cam_raw_0_tag; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_93 = io_lsu_nonblock_load_data_tag == cam_raw_0_tag; // @[el2_dec_decode_ctl.scala 325:67] + wire _T_94 = cam_data_reset & _T_93; // @[el2_dec_decode_ctl.scala 325:45] + reg cam_raw_0_valid; // @[el2_dec_decode_ctl.scala 350:47] + wire cam_data_reset_val_0 = _T_94 & cam_raw_0_valid; // @[el2_dec_decode_ctl.scala 325:83] + wire cam_0_valid = cam_data_reset_val_0 ? 1'h0 : cam_raw_0_valid; // @[el2_dec_decode_ctl.scala 329:39] + wire _T_50 = ~cam_0_valid; // @[el2_dec_decode_ctl.scala 306:79] + reg [2:0] cam_raw_1_tag; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_119 = io_lsu_nonblock_load_data_tag == cam_raw_1_tag; // @[el2_dec_decode_ctl.scala 325:67] + wire _T_120 = cam_data_reset & _T_119; // @[el2_dec_decode_ctl.scala 325:45] + reg cam_raw_1_valid; // @[el2_dec_decode_ctl.scala 350:47] + wire cam_data_reset_val_1 = _T_120 & cam_raw_1_valid; // @[el2_dec_decode_ctl.scala 325:83] + wire cam_1_valid = cam_data_reset_val_1 ? 1'h0 : cam_raw_1_valid; // @[el2_dec_decode_ctl.scala 329:39] + wire _T_53 = ~cam_1_valid; // @[el2_dec_decode_ctl.scala 306:79] + wire _T_56 = cam_0_valid & _T_53; // @[el2_dec_decode_ctl.scala 306:127] + wire [1:0] _T_58 = {io_lsu_nonblock_load_valid_m, 1'h0}; // @[el2_dec_decode_ctl.scala 306:159] + reg [2:0] cam_raw_2_tag; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_145 = io_lsu_nonblock_load_data_tag == cam_raw_2_tag; // @[el2_dec_decode_ctl.scala 325:67] + wire _T_146 = cam_data_reset & _T_145; // @[el2_dec_decode_ctl.scala 325:45] + reg cam_raw_2_valid; // @[el2_dec_decode_ctl.scala 350:47] + wire cam_data_reset_val_2 = _T_146 & cam_raw_2_valid; // @[el2_dec_decode_ctl.scala 325:83] + wire cam_2_valid = cam_data_reset_val_2 ? 1'h0 : cam_raw_2_valid; // @[el2_dec_decode_ctl.scala 329:39] + wire _T_59 = ~cam_2_valid; // @[el2_dec_decode_ctl.scala 306:79] + wire _T_62 = cam_0_valid & cam_1_valid; // @[el2_dec_decode_ctl.scala 306:127] + wire _T_65 = _T_62 & _T_59; // @[el2_dec_decode_ctl.scala 306:127] + wire [2:0] _T_67 = {io_lsu_nonblock_load_valid_m, 2'h0}; // @[el2_dec_decode_ctl.scala 306:159] + reg [2:0] cam_raw_3_tag; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_171 = io_lsu_nonblock_load_data_tag == cam_raw_3_tag; // @[el2_dec_decode_ctl.scala 325:67] + wire _T_172 = cam_data_reset & _T_171; // @[el2_dec_decode_ctl.scala 325:45] + reg cam_raw_3_valid; // @[el2_dec_decode_ctl.scala 350:47] + wire cam_data_reset_val_3 = _T_172 & cam_raw_3_valid; // @[el2_dec_decode_ctl.scala 325:83] + wire cam_3_valid = cam_data_reset_val_3 ? 1'h0 : cam_raw_3_valid; // @[el2_dec_decode_ctl.scala 329:39] + wire _T_68 = ~cam_3_valid; // @[el2_dec_decode_ctl.scala 306:79] + wire _T_74 = _T_62 & cam_2_valid; // @[el2_dec_decode_ctl.scala 306:127] + wire _T_77 = _T_74 & _T_68; // @[el2_dec_decode_ctl.scala 306:127] + wire [3:0] _T_79 = {io_lsu_nonblock_load_valid_m, 3'h0}; // @[el2_dec_decode_ctl.scala 306:159] + wire _T_80 = _T_50 & io_lsu_nonblock_load_valid_m; // @[Mux.scala 27:72] + wire [1:0] _T_81 = _T_56 ? _T_58 : 2'h0; // @[Mux.scala 27:72] + wire [2:0] _T_82 = _T_65 ? _T_67 : 3'h0; // @[Mux.scala 27:72] + wire [3:0] _T_83 = _T_77 ? _T_79 : 4'h0; // @[Mux.scala 27:72] + wire [1:0] _GEN_123 = {{1'd0}, _T_80}; // @[Mux.scala 27:72] + wire [1:0] _T_84 = _GEN_123 | _T_81; // @[Mux.scala 27:72] + wire [2:0] _GEN_124 = {{1'd0}, _T_84}; // @[Mux.scala 27:72] + wire [2:0] _T_85 = _GEN_124 | _T_82; // @[Mux.scala 27:72] + wire [3:0] _GEN_125 = {{1'd0}, _T_85}; // @[Mux.scala 27:72] + wire [3:0] cam_wen = _GEN_125 | _T_83; // @[Mux.scala 27:72] + reg x_d_i0load; // @[beh_lib.scala 366:14] + reg [4:0] x_d_i0rd; // @[beh_lib.scala 366:14] + wire [4:0] nonblock_load_rd = x_d_i0load ? x_d_i0rd : 5'h0; // @[el2_dec_decode_ctl.scala 317:31] + reg [2:0] _T_701; // @[el2_dec_decode_ctl.scala 656:72] + wire [3:0] i0_pipe_en = {io_dec_i0_decode_d,_T_701}; // @[Cat.scala 29:58] + wire _T_707 = |i0_pipe_en[2:1]; // @[el2_dec_decode_ctl.scala 659:49] + wire i0_r_ctl_en = _T_707 | io_clk_override; // @[el2_dec_decode_ctl.scala 659:53] + reg nonblock_load_valid_m_delay; // @[Reg.scala 27:20] + reg r_d_i0load; // @[beh_lib.scala 366:14] + wire i0_load_kill_wen_r = nonblock_load_valid_m_delay & r_d_i0load; // @[el2_dec_decode_ctl.scala 322:56] + wire _T_90 = io_lsu_nonblock_load_inv_tag_r == cam_raw_0_tag; // @[el2_dec_decode_ctl.scala 324:66] + wire _T_91 = io_lsu_nonblock_load_inv_r & _T_90; // @[el2_dec_decode_ctl.scala 324:45] + wire cam_inv_reset_val_0 = _T_91 & cam_0_valid; // @[el2_dec_decode_ctl.scala 324:82] + reg r_d_i0v; // @[beh_lib.scala 366:14] + wire _T_743 = ~io_dec_tlu_flush_lower_wb; // @[el2_dec_decode_ctl.scala 691:41] + wire r_d_in_i0v = r_d_i0v & _T_743; // @[el2_dec_decode_ctl.scala 691:39] + wire _T_754 = ~io_dec_tlu_i0_kill_writeb_r; // @[el2_dec_decode_ctl.scala 699:42] + wire i0_wen_r = r_d_in_i0v & _T_754; // @[el2_dec_decode_ctl.scala 699:40] + reg [4:0] r_d_i0rd; // @[beh_lib.scala 366:14] + reg [4:0] cam_raw_0_rd; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_102 = r_d_i0rd == cam_raw_0_rd; // @[el2_dec_decode_ctl.scala 337:80] + wire _T_103 = i0_wen_r & _T_102; // @[el2_dec_decode_ctl.scala 337:64] + reg cam_raw_0_wb; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_105 = _T_103 & cam_raw_0_wb; // @[el2_dec_decode_ctl.scala 337:95] + wire _T_106 = cam_inv_reset_val_0 | _T_105; // @[el2_dec_decode_ctl.scala 337:44] + wire _GEN_52 = _T_106 ? 1'h0 : cam_0_valid; // @[el2_dec_decode_ctl.scala 337:116] + wire _GEN_55 = _T_106 ? 1'h0 : cam_raw_0_wb; // @[el2_dec_decode_ctl.scala 337:116] + wire _GEN_56 = cam_wen[0] | _GEN_52; // @[el2_dec_decode_ctl.scala 332:28] + wire _GEN_57 = cam_wen[0] ? 1'h0 : _GEN_55; // @[el2_dec_decode_ctl.scala 332:28] + wire _T_109 = nonblock_load_valid_m_delay & _T_90; // @[el2_dec_decode_ctl.scala 342:44] + wire _T_111 = _T_109 & cam_0_valid; // @[el2_dec_decode_ctl.scala 342:95] + wire nonblock_load_write_0 = _T_93 & cam_raw_0_valid; // @[el2_dec_decode_ctl.scala 351:66] + wire _T_116 = io_lsu_nonblock_load_inv_tag_r == cam_raw_1_tag; // @[el2_dec_decode_ctl.scala 324:66] + wire _T_117 = io_lsu_nonblock_load_inv_r & _T_116; // @[el2_dec_decode_ctl.scala 324:45] + wire cam_inv_reset_val_1 = _T_117 & cam_1_valid; // @[el2_dec_decode_ctl.scala 324:82] + reg [4:0] cam_raw_1_rd; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_128 = r_d_i0rd == cam_raw_1_rd; // @[el2_dec_decode_ctl.scala 337:80] + wire _T_129 = i0_wen_r & _T_128; // @[el2_dec_decode_ctl.scala 337:64] + reg cam_raw_1_wb; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_131 = _T_129 & cam_raw_1_wb; // @[el2_dec_decode_ctl.scala 337:95] + wire _T_132 = cam_inv_reset_val_1 | _T_131; // @[el2_dec_decode_ctl.scala 337:44] + wire _GEN_63 = _T_132 ? 1'h0 : cam_1_valid; // @[el2_dec_decode_ctl.scala 337:116] + wire _GEN_66 = _T_132 ? 1'h0 : cam_raw_1_wb; // @[el2_dec_decode_ctl.scala 337:116] + wire _GEN_67 = cam_wen[1] | _GEN_63; // @[el2_dec_decode_ctl.scala 332:28] + wire _GEN_68 = cam_wen[1] ? 1'h0 : _GEN_66; // @[el2_dec_decode_ctl.scala 332:28] + wire _T_135 = nonblock_load_valid_m_delay & _T_116; // @[el2_dec_decode_ctl.scala 342:44] + wire _T_137 = _T_135 & cam_1_valid; // @[el2_dec_decode_ctl.scala 342:95] + wire nonblock_load_write_1 = _T_119 & cam_raw_1_valid; // @[el2_dec_decode_ctl.scala 351:66] + wire _T_142 = io_lsu_nonblock_load_inv_tag_r == cam_raw_2_tag; // @[el2_dec_decode_ctl.scala 324:66] + wire _T_143 = io_lsu_nonblock_load_inv_r & _T_142; // @[el2_dec_decode_ctl.scala 324:45] + wire cam_inv_reset_val_2 = _T_143 & cam_2_valid; // @[el2_dec_decode_ctl.scala 324:82] + reg [4:0] cam_raw_2_rd; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_154 = r_d_i0rd == cam_raw_2_rd; // @[el2_dec_decode_ctl.scala 337:80] + wire _T_155 = i0_wen_r & _T_154; // @[el2_dec_decode_ctl.scala 337:64] + reg cam_raw_2_wb; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_157 = _T_155 & cam_raw_2_wb; // @[el2_dec_decode_ctl.scala 337:95] + wire _T_158 = cam_inv_reset_val_2 | _T_157; // @[el2_dec_decode_ctl.scala 337:44] + wire _GEN_74 = _T_158 ? 1'h0 : cam_2_valid; // @[el2_dec_decode_ctl.scala 337:116] + wire _GEN_77 = _T_158 ? 1'h0 : cam_raw_2_wb; // @[el2_dec_decode_ctl.scala 337:116] + wire _GEN_78 = cam_wen[2] | _GEN_74; // @[el2_dec_decode_ctl.scala 332:28] + wire _GEN_79 = cam_wen[2] ? 1'h0 : _GEN_77; // @[el2_dec_decode_ctl.scala 332:28] + wire _T_161 = nonblock_load_valid_m_delay & _T_142; // @[el2_dec_decode_ctl.scala 342:44] + wire _T_163 = _T_161 & cam_2_valid; // @[el2_dec_decode_ctl.scala 342:95] + wire nonblock_load_write_2 = _T_145 & cam_raw_2_valid; // @[el2_dec_decode_ctl.scala 351:66] + wire _T_168 = io_lsu_nonblock_load_inv_tag_r == cam_raw_3_tag; // @[el2_dec_decode_ctl.scala 324:66] + wire _T_169 = io_lsu_nonblock_load_inv_r & _T_168; // @[el2_dec_decode_ctl.scala 324:45] + wire cam_inv_reset_val_3 = _T_169 & cam_3_valid; // @[el2_dec_decode_ctl.scala 324:82] + reg [4:0] cam_raw_3_rd; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_180 = r_d_i0rd == cam_raw_3_rd; // @[el2_dec_decode_ctl.scala 337:80] + wire _T_181 = i0_wen_r & _T_180; // @[el2_dec_decode_ctl.scala 337:64] + reg cam_raw_3_wb; // @[el2_dec_decode_ctl.scala 350:47] + wire _T_183 = _T_181 & cam_raw_3_wb; // @[el2_dec_decode_ctl.scala 337:95] + wire _T_184 = cam_inv_reset_val_3 | _T_183; // @[el2_dec_decode_ctl.scala 337:44] + wire _GEN_85 = _T_184 ? 1'h0 : cam_3_valid; // @[el2_dec_decode_ctl.scala 337:116] + wire _GEN_88 = _T_184 ? 1'h0 : cam_raw_3_wb; // @[el2_dec_decode_ctl.scala 337:116] + wire _GEN_89 = cam_wen[3] | _GEN_85; // @[el2_dec_decode_ctl.scala 332:28] + wire _GEN_90 = cam_wen[3] ? 1'h0 : _GEN_88; // @[el2_dec_decode_ctl.scala 332:28] + wire _T_187 = nonblock_load_valid_m_delay & _T_168; // @[el2_dec_decode_ctl.scala 342:44] + wire _T_189 = _T_187 & cam_3_valid; // @[el2_dec_decode_ctl.scala 342:95] + wire nonblock_load_write_3 = _T_171 & cam_raw_3_valid; // @[el2_dec_decode_ctl.scala 351:66] + wire _T_194 = r_d_i0rd == io_dec_nonblock_load_waddr; // @[el2_dec_decode_ctl.scala 356:44] + wire nonblock_load_cancel = _T_194 & i0_wen_r; // @[el2_dec_decode_ctl.scala 356:76] + wire _T_195 = nonblock_load_write_0 | nonblock_load_write_1; // @[el2_dec_decode_ctl.scala 357:95] + wire _T_196 = _T_195 | nonblock_load_write_2; // @[el2_dec_decode_ctl.scala 357:95] + wire _T_197 = _T_196 | nonblock_load_write_3; // @[el2_dec_decode_ctl.scala 357:95] + wire _T_199 = io_lsu_nonblock_load_data_valid & _T_197; // @[el2_dec_decode_ctl.scala 357:64] + wire _T_200 = ~nonblock_load_cancel; // @[el2_dec_decode_ctl.scala 357:109] + wire _T_202 = nonblock_load_rd == i0r_rs1; // @[el2_dec_decode_ctl.scala 358:54] + wire _T_203 = _T_202 & io_lsu_nonblock_load_valid_m; // @[el2_dec_decode_ctl.scala 358:66] + wire _T_204 = _T_203 & io_dec_i0_rs1_en_d; // @[el2_dec_decode_ctl.scala 358:97] + wire [4:0] i0r_rs2 = io_dec_i0_instr_d[24:20]; // @[el2_dec_decode_ctl.scala 625:16] + wire _T_205 = nonblock_load_rd == i0r_rs2; // @[el2_dec_decode_ctl.scala 358:137] + wire _T_206 = _T_205 & io_lsu_nonblock_load_valid_m; // @[el2_dec_decode_ctl.scala 358:149] + wire _T_207 = _T_206 & io_dec_i0_rs2_en_d; // @[el2_dec_decode_ctl.scala 358:180] + wire i0_nonblock_boundary_stall = _T_204 | _T_207; // @[el2_dec_decode_ctl.scala 358:118] + wire [4:0] _T_209 = nonblock_load_write_0 ? 5'h1f : 5'h0; // @[Bitwise.scala 72:12] + wire [4:0] _T_210 = _T_209 & cam_raw_0_rd; // @[el2_dec_decode_ctl.scala 362:88] + wire _T_211 = io_dec_i0_rs1_en_d & cam_0_valid; // @[el2_dec_decode_ctl.scala 362:121] + wire _T_212 = cam_raw_0_rd == i0r_rs1; // @[el2_dec_decode_ctl.scala 362:149] + wire _T_213 = _T_211 & _T_212; // @[el2_dec_decode_ctl.scala 362:136] + wire _T_214 = io_dec_i0_rs2_en_d & cam_0_valid; // @[el2_dec_decode_ctl.scala 362:182] + wire _T_215 = cam_raw_0_rd == i0r_rs2; // @[el2_dec_decode_ctl.scala 362:210] + wire _T_216 = _T_214 & _T_215; // @[el2_dec_decode_ctl.scala 362:197] + wire [4:0] _T_218 = nonblock_load_write_1 ? 5'h1f : 5'h0; // @[Bitwise.scala 72:12] + wire [4:0] _T_219 = _T_218 & cam_raw_1_rd; // @[el2_dec_decode_ctl.scala 362:88] + wire _T_220 = io_dec_i0_rs1_en_d & cam_1_valid; // @[el2_dec_decode_ctl.scala 362:121] + wire _T_221 = cam_raw_1_rd == i0r_rs1; // @[el2_dec_decode_ctl.scala 362:149] + wire _T_222 = _T_220 & _T_221; // @[el2_dec_decode_ctl.scala 362:136] + wire _T_223 = io_dec_i0_rs2_en_d & cam_1_valid; // @[el2_dec_decode_ctl.scala 362:182] + wire _T_224 = cam_raw_1_rd == i0r_rs2; // @[el2_dec_decode_ctl.scala 362:210] + wire _T_225 = _T_223 & _T_224; // @[el2_dec_decode_ctl.scala 362:197] + wire [4:0] _T_227 = nonblock_load_write_2 ? 5'h1f : 5'h0; // @[Bitwise.scala 72:12] + wire [4:0] _T_228 = _T_227 & cam_raw_2_rd; // @[el2_dec_decode_ctl.scala 362:88] + wire _T_229 = io_dec_i0_rs1_en_d & cam_2_valid; // @[el2_dec_decode_ctl.scala 362:121] + wire _T_230 = cam_raw_2_rd == i0r_rs1; // @[el2_dec_decode_ctl.scala 362:149] + wire _T_231 = _T_229 & _T_230; // @[el2_dec_decode_ctl.scala 362:136] + wire _T_232 = io_dec_i0_rs2_en_d & cam_2_valid; // @[el2_dec_decode_ctl.scala 362:182] + wire _T_233 = cam_raw_2_rd == i0r_rs2; // @[el2_dec_decode_ctl.scala 362:210] + wire _T_234 = _T_232 & _T_233; // @[el2_dec_decode_ctl.scala 362:197] + wire [4:0] _T_236 = nonblock_load_write_3 ? 5'h1f : 5'h0; // @[Bitwise.scala 72:12] + wire [4:0] _T_237 = _T_236 & cam_raw_3_rd; // @[el2_dec_decode_ctl.scala 362:88] + wire _T_238 = io_dec_i0_rs1_en_d & cam_3_valid; // @[el2_dec_decode_ctl.scala 362:121] + wire _T_239 = cam_raw_3_rd == i0r_rs1; // @[el2_dec_decode_ctl.scala 362:149] + wire _T_240 = _T_238 & _T_239; // @[el2_dec_decode_ctl.scala 362:136] + wire _T_241 = io_dec_i0_rs2_en_d & cam_3_valid; // @[el2_dec_decode_ctl.scala 362:182] + wire _T_242 = cam_raw_3_rd == i0r_rs2; // @[el2_dec_decode_ctl.scala 362:210] + wire _T_243 = _T_241 & _T_242; // @[el2_dec_decode_ctl.scala 362:197] + wire [4:0] _T_244 = _T_210 | _T_219; // @[el2_dec_decode_ctl.scala 363:69] + wire [4:0] _T_245 = _T_244 | _T_228; // @[el2_dec_decode_ctl.scala 363:69] + wire _T_246 = _T_213 | _T_222; // @[el2_dec_decode_ctl.scala 363:102] + wire _T_247 = _T_246 | _T_231; // @[el2_dec_decode_ctl.scala 363:102] + wire ld_stall_1 = _T_247 | _T_240; // @[el2_dec_decode_ctl.scala 363:102] + wire _T_248 = _T_216 | _T_225; // @[el2_dec_decode_ctl.scala 363:134] + wire _T_249 = _T_248 | _T_234; // @[el2_dec_decode_ctl.scala 363:134] + wire ld_stall_2 = _T_249 | _T_243; // @[el2_dec_decode_ctl.scala 363:134] + wire _T_250 = ld_stall_1 | ld_stall_2; // @[el2_dec_decode_ctl.scala 365:38] + wire i0_nonblock_load_stall = _T_250 | i0_nonblock_boundary_stall; // @[el2_dec_decode_ctl.scala 365:51] + wire _T_252 = ~i0_predict_br; // @[el2_dec_decode_ctl.scala 374:34] + wire [3:0] _T_254 = i0_legal_decode_d ? 4'hf : 4'h0; // @[Bitwise.scala 72:12] + wire _T_255 = ~io_dec_csr_wen_unq_d; // @[el2_dec_decode_ctl.scala 384:18] + wire csr_read = i0_dp_csr_read & i0_legal_decode_d; // @[el2_dec_decode_ctl.scala 459:36] + wire _T_256 = csr_read & _T_255; // @[el2_dec_decode_ctl.scala 384:16] + wire _T_258 = ~csr_read; // @[el2_dec_decode_ctl.scala 385:6] + wire _T_259 = _T_258 & io_dec_csr_wen_unq_d; // @[el2_dec_decode_ctl.scala 385:16] + wire _T_261 = csr_read & io_dec_csr_wen_unq_d; // @[el2_dec_decode_ctl.scala 386:16] + wire [3:0] _T_263 = i0_dp_jal ? 4'he : 4'h0; // @[Mux.scala 98:16] + wire [3:0] _T_264 = i0_dp_condbr ? 4'hd : _T_263; // @[Mux.scala 98:16] + wire [3:0] _T_265 = i0_dp_mret ? 4'hc : _T_264; // @[Mux.scala 98:16] + wire [3:0] _T_266 = i0_dp_fence_i ? 4'hb : _T_265; // @[Mux.scala 98:16] + wire [3:0] _T_267 = i0_dp_fence ? 4'ha : _T_266; // @[Mux.scala 98:16] + wire [3:0] _T_268 = i0_dp_ecall ? 4'h9 : _T_267; // @[Mux.scala 98:16] + wire [3:0] _T_269 = i0_dp_ebreak ? 4'h8 : _T_268; // @[Mux.scala 98:16] + wire [3:0] _T_270 = _T_261 ? 4'h7 : _T_269; // @[Mux.scala 98:16] + wire [3:0] _T_271 = _T_259 ? 4'h6 : _T_270; // @[Mux.scala 98:16] + wire [3:0] _T_272 = _T_256 ? 4'h5 : _T_271; // @[Mux.scala 98:16] + wire [3:0] _T_273 = i0_dp_pm_alu ? 4'h4 : _T_272; // @[Mux.scala 98:16] + wire [3:0] _T_274 = i0_dp_store ? 4'h3 : _T_273; // @[Mux.scala 98:16] + wire [3:0] _T_275 = i0_dp_load ? 4'h2 : _T_274; // @[Mux.scala 98:16] + wire [3:0] _T_276 = i0_dp_mul ? 4'h1 : _T_275; // @[Mux.scala 98:16] + reg lsu_idle; // @[el2_dec_decode_ctl.scala 400:45] + wire _T_333 = ~i0_pcall_case; // @[el2_dec_decode_ctl.scala 424:35] + wire _T_334 = i0_dp_jal & _T_333; // @[el2_dec_decode_ctl.scala 424:32] + wire _T_335 = ~i0_pja_case; // @[el2_dec_decode_ctl.scala 424:52] + wire _T_336 = _T_334 & _T_335; // @[el2_dec_decode_ctl.scala 424:50] + wire _T_337 = ~i0_pret_case; // @[el2_dec_decode_ctl.scala 424:67] + reg _T_339; // @[el2_dec_decode_ctl.scala 436:58] + wire lsu_decode_d = i0_legal_decode_d & i0_dp_lsu; // @[el2_dec_decode_ctl.scala 578:40] + wire _T_902 = i0_dp_load | i0_dp_store; // @[el2_dec_decode_ctl.scala 792:47] + reg x_d_i0v; // @[beh_lib.scala 366:14] + wire _T_876 = io_dec_i0_rs1_en_d & x_d_i0v; // @[el2_dec_decode_ctl.scala 772:48] + wire _T_877 = x_d_i0rd == i0r_rs1; // @[el2_dec_decode_ctl.scala 772:70] + wire i0_rs1_depend_i0_x = _T_876 & _T_877; // @[el2_dec_decode_ctl.scala 772:58] + wire _T_878 = io_dec_i0_rs1_en_d & r_d_i0v; // @[el2_dec_decode_ctl.scala 773:48] + wire _T_879 = r_d_i0rd == i0r_rs1; // @[el2_dec_decode_ctl.scala 773:70] + wire i0_rs1_depend_i0_r = _T_878 & _T_879; // @[el2_dec_decode_ctl.scala 773:58] + wire [1:0] _T_891 = i0_rs1_depend_i0_r ? 2'h2 : 2'h0; // @[el2_dec_decode_ctl.scala 779:63] + wire [1:0] i0_rs1_depth_d = i0_rs1_depend_i0_x ? 2'h1 : _T_891; // @[el2_dec_decode_ctl.scala 779:24] + wire _T_904 = _T_902 & i0_rs1_depth_d[0]; // @[el2_dec_decode_ctl.scala 792:62] + reg i0_x_c_load; // @[Reg.scala 15:16] + reg i0_r_c_load; // @[Reg.scala 15:16] + wire _T_887_load = i0_rs1_depend_i0_r & i0_r_c_load; // @[el2_dec_decode_ctl.scala 778:61] + wire i0_rs1_class_d_load = i0_rs1_depend_i0_x ? i0_x_c_load : _T_887_load; // @[el2_dec_decode_ctl.scala 778:24] + wire load_ldst_bypass_d = _T_904 & i0_rs1_class_d_load; // @[el2_dec_decode_ctl.scala 792:82] + wire _T_880 = io_dec_i0_rs2_en_d & x_d_i0v; // @[el2_dec_decode_ctl.scala 775:48] + wire _T_881 = x_d_i0rd == i0r_rs2; // @[el2_dec_decode_ctl.scala 775:70] + wire i0_rs2_depend_i0_x = _T_880 & _T_881; // @[el2_dec_decode_ctl.scala 775:58] + wire _T_882 = io_dec_i0_rs2_en_d & r_d_i0v; // @[el2_dec_decode_ctl.scala 776:48] + wire _T_883 = r_d_i0rd == i0r_rs2; // @[el2_dec_decode_ctl.scala 776:70] + wire i0_rs2_depend_i0_r = _T_882 & _T_883; // @[el2_dec_decode_ctl.scala 776:58] + wire [1:0] _T_900 = i0_rs2_depend_i0_r ? 2'h2 : 2'h0; // @[el2_dec_decode_ctl.scala 781:63] + wire [1:0] i0_rs2_depth_d = i0_rs2_depend_i0_x ? 2'h1 : _T_900; // @[el2_dec_decode_ctl.scala 781:24] + wire _T_907 = i0_dp_store & i0_rs2_depth_d[0]; // @[el2_dec_decode_ctl.scala 793:47] + wire _T_896_load = i0_rs2_depend_i0_r & i0_r_c_load; // @[el2_dec_decode_ctl.scala 780:61] + wire i0_rs2_class_d_load = i0_rs2_depend_i0_x ? i0_x_c_load : _T_896_load; // @[el2_dec_decode_ctl.scala 780:24] + wire store_data_bypass_d = _T_907 & i0_rs2_class_d_load; // @[el2_dec_decode_ctl.scala 793:67] + wire _T_349 = i0_dp_csr_clr | i0_dp_csr_set; // @[el2_dec_decode_ctl.scala 467:42] + reg r_d_csrwen; // @[beh_lib.scala 366:14] + reg r_d_i0valid; // @[beh_lib.scala 366:14] + wire _T_352 = r_d_csrwen & r_d_i0valid; // @[el2_dec_decode_ctl.scala 475:34] + reg [11:0] r_d_csrwaddr; // @[beh_lib.scala 366:14] + wire _T_355 = r_d_csrwaddr == 12'h300; // @[el2_dec_decode_ctl.scala 478:45] + wire _T_356 = r_d_csrwaddr == 12'h304; // @[el2_dec_decode_ctl.scala 478:75] + wire _T_357 = _T_355 | _T_356; // @[el2_dec_decode_ctl.scala 478:59] + wire _T_358 = _T_357 & r_d_csrwen; // @[el2_dec_decode_ctl.scala 478:90] + wire _T_359 = _T_358 & r_d_i0valid; // @[el2_dec_decode_ctl.scala 478:103] + wire _T_360 = ~io_dec_tlu_i0_kill_writeb_wb; // @[el2_dec_decode_ctl.scala 478:119] + reg csr_read_x; // @[el2_dec_decode_ctl.scala 480:52] + reg csr_clr_x; // @[el2_dec_decode_ctl.scala 481:51] + reg csr_set_x; // @[el2_dec_decode_ctl.scala 482:51] + reg csr_write_x; // @[el2_dec_decode_ctl.scala 483:53] + reg csr_imm_x; // @[el2_dec_decode_ctl.scala 484:51] + wire i0_x_data_en = i0_pipe_en[3] | io_clk_override; // @[el2_dec_decode_ctl.scala 661:50] + reg [4:0] csrimm_x; // @[beh_lib.scala 356:14] + reg [31:0] csr_rddata_x; // @[beh_lib.scala 356:14] + wire [31:0] _T_394 = {27'h0,csrimm_x}; // @[Cat.scala 29:58] + wire _T_396 = ~csr_imm_x; // @[el2_dec_decode_ctl.scala 492:25] + wire [31:0] _T_397 = csr_imm_x ? _T_394 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_398 = _T_396 ? io_exu_csr_rs1_x : 32'h0; // @[Mux.scala 27:72] + wire [31:0] csr_mask_x = _T_397 | _T_398; // @[Mux.scala 27:72] + wire [31:0] _T_400 = ~csr_mask_x; // @[el2_dec_decode_ctl.scala 495:56] + wire [31:0] _T_401 = csr_rddata_x & _T_400; // @[el2_dec_decode_ctl.scala 495:53] + wire [31:0] _T_402 = csr_rddata_x | csr_mask_x; // @[el2_dec_decode_ctl.scala 496:53] + wire [31:0] _T_403 = csr_clr_x ? _T_401 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_404 = csr_set_x ? _T_402 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_405 = csr_write_x ? csr_mask_x : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_406 = _T_403 | _T_404; // @[Mux.scala 27:72] + wire [31:0] write_csr_data_x = _T_406 | _T_405; // @[Mux.scala 27:72] + wire _T_418 = ~tlu_wr_pause_r1; // @[el2_dec_decode_ctl.scala 506:44] + wire _T_419 = ~tlu_wr_pause_r2; // @[el2_dec_decode_ctl.scala 506:64] + wire _T_420 = _T_418 & _T_419; // @[el2_dec_decode_ctl.scala 506:61] + wire [31:0] _T_423 = write_csr_data - 32'h1; // @[el2_dec_decode_ctl.scala 509:59] + wire _T_425 = csr_clr_x | csr_set_x; // @[el2_dec_decode_ctl.scala 511:34] + wire _T_426 = _T_425 | csr_write_x; // @[el2_dec_decode_ctl.scala 511:46] + wire _T_427 = _T_426 & csr_read_x; // @[el2_dec_decode_ctl.scala 511:61] + wire _T_428 = _T_427 | io_dec_tlu_wr_pause_r; // @[el2_dec_decode_ctl.scala 511:75] + reg r_d_csrwonly; // @[beh_lib.scala 366:14] + wire _T_764 = r_d_i0v & r_d_i0load; // @[el2_dec_decode_ctl.scala 714:37] + reg [31:0] i0_result_r_raw; // @[beh_lib.scala 356:14] + wire [31:0] i0_result_corr_r = _T_764 ? io_lsu_result_corr_r : i0_result_r_raw; // @[el2_dec_decode_ctl.scala 714:27] + reg x_d_csrwonly; // @[beh_lib.scala 366:14] + wire _T_432 = x_d_csrwonly | r_d_csrwonly; // @[el2_dec_decode_ctl.scala 520:38] + reg wbd_csrwonly; // @[beh_lib.scala 366:14] + wire prior_csr_write = _T_432 | wbd_csrwonly; // @[el2_dec_decode_ctl.scala 520:53] + wire debug_fence_raw = io_dec_debug_fence_d & io_dbg_cmd_wrdata[1]; // @[el2_dec_decode_ctl.scala 523:48] + wire debug_fence = debug_fence_raw | debug_fence_i; // @[el2_dec_decode_ctl.scala 524:40] + wire _T_436 = i0_dp_presync | io_dec_tlu_presync_d; // @[el2_dec_decode_ctl.scala 527:34] + wire _T_437 = _T_436 | debug_fence_i; // @[el2_dec_decode_ctl.scala 527:57] + wire _T_438 = _T_437 | debug_fence_raw; // @[el2_dec_decode_ctl.scala 527:73] + wire i0_presync = _T_438 | io_dec_tlu_pipelining_disable; // @[el2_dec_decode_ctl.scala 527:91] + wire [31:0] _T_462 = {16'h0,io_ifu_i0_cinst}; // @[Cat.scala 29:58] + wire _T_464 = ~illegal_lockout; // @[el2_dec_decode_ctl.scala 539:44] + reg [31:0] _T_465; // @[beh_lib.scala 356:14] + wire i0_div_prior_div_stall = i0_dp_div & io_dec_div_active; // @[el2_dec_decode_ctl.scala 543:42] + wire _T_470 = i0_dp_csr_read & prior_csr_write; // @[el2_dec_decode_ctl.scala 545:40] + wire _T_471 = _T_470 | io_dec_extint_stall; // @[el2_dec_decode_ctl.scala 545:59] + wire _T_472 = _T_471 | pause_stall; // @[el2_dec_decode_ctl.scala 545:81] + wire _T_473 = _T_472 | leak1_i0_stall; // @[el2_dec_decode_ctl.scala 545:95] + wire _T_474 = _T_473 | io_dec_tlu_debug_stall; // @[el2_dec_decode_ctl.scala 546:20] + wire _T_475 = _T_474 | postsync_stall; // @[el2_dec_decode_ctl.scala 546:45] + wire prior_inflight = x_d_i0valid | r_d_i0valid; // @[el2_dec_decode_ctl.scala 568:41] + wire prior_inflight_eff = i0_dp_div ? x_d_i0valid : prior_inflight; // @[el2_dec_decode_ctl.scala 569:31] + wire presync_stall = i0_presync & prior_inflight_eff; // @[el2_dec_decode_ctl.scala 571:37] + wire _T_476 = _T_475 | presync_stall; // @[el2_dec_decode_ctl.scala 546:62] + wire _T_477 = i0_dp_fence | debug_fence; // @[el2_dec_decode_ctl.scala 547:19] + wire _T_478 = ~lsu_idle; // @[el2_dec_decode_ctl.scala 547:36] + wire _T_479 = _T_477 & _T_478; // @[el2_dec_decode_ctl.scala 547:34] + wire _T_480 = _T_476 | _T_479; // @[el2_dec_decode_ctl.scala 546:79] + wire _T_481 = _T_480 | i0_nonblock_load_stall; // @[el2_dec_decode_ctl.scala 547:47] + wire _T_822 = io_dec_i0_rs1_en_d & io_dec_div_active; // @[el2_dec_decode_ctl.scala 742:49] + wire _T_823 = io_div_waddr_wb == i0r_rs1; // @[el2_dec_decode_ctl.scala 742:88] + wire _T_824 = _T_822 & _T_823; // @[el2_dec_decode_ctl.scala 742:69] + wire _T_825 = io_dec_i0_rs2_en_d & io_dec_div_active; // @[el2_dec_decode_ctl.scala 743:52] + wire _T_826 = io_div_waddr_wb == i0r_rs2; // @[el2_dec_decode_ctl.scala 743:91] + wire _T_827 = _T_825 & _T_826; // @[el2_dec_decode_ctl.scala 743:72] + wire i0_nonblock_div_stall = _T_824 | _T_827; // @[el2_dec_decode_ctl.scala 742:102] + wire _T_483 = _T_481 | i0_nonblock_div_stall; // @[el2_dec_decode_ctl.scala 548:21] + wire i0_block_raw_d = _T_483 | i0_div_prior_div_stall; // @[el2_dec_decode_ctl.scala 548:45] + wire _T_484 = io_lsu_store_stall_any | io_dma_dccm_stall_any; // @[el2_dec_decode_ctl.scala 550:65] + wire i0_store_stall_d = i0_dp_store & _T_484; // @[el2_dec_decode_ctl.scala 550:39] + wire _T_485 = io_lsu_load_stall_any | io_dma_dccm_stall_any; // @[el2_dec_decode_ctl.scala 551:63] + wire i0_load_stall_d = i0_dp_load & _T_485; // @[el2_dec_decode_ctl.scala 551:38] + wire _T_486 = i0_block_raw_d | i0_store_stall_d; // @[el2_dec_decode_ctl.scala 552:38] + wire i0_block_d = _T_486 | i0_load_stall_d; // @[el2_dec_decode_ctl.scala 552:57] + wire _T_487 = ~i0_block_d; // @[el2_dec_decode_ctl.scala 556:46] + wire _T_488 = io_dec_ib0_valid_d & _T_487; // @[el2_dec_decode_ctl.scala 556:44] + wire _T_490 = _T_488 & _T_279; // @[el2_dec_decode_ctl.scala 556:61] + wire _T_493 = ~i0_block_raw_d; // @[el2_dec_decode_ctl.scala 557:46] + wire _T_494 = io_dec_ib0_valid_d & _T_493; // @[el2_dec_decode_ctl.scala 557:44] + wire _T_496 = _T_494 & _T_279; // @[el2_dec_decode_ctl.scala 557:61] + wire i0_exudecode_d = _T_496 & _T_467; // @[el2_dec_decode_ctl.scala 557:89] + wire i0_exulegal_decode_d = i0_exudecode_d & i0_legal; // @[el2_dec_decode_ctl.scala 558:46] + wire _T_498 = ~io_dec_i0_decode_d; // @[el2_dec_decode_ctl.scala 562:51] + wire _T_517 = i0_dp_fence_i | debug_fence_i; // @[el2_dec_decode_ctl.scala 590:44] + wire [3:0] _T_522 = {io_dec_i0_decode_d,io_dec_i0_decode_d,io_dec_i0_decode_d,io_dec_i0_decode_d}; // @[Cat.scala 29:58] + wire _T_704 = |i0_pipe_en[3:2]; // @[el2_dec_decode_ctl.scala 658:49] + wire i0_x_ctl_en = _T_704 | io_clk_override; // @[el2_dec_decode_ctl.scala 658:53] + reg x_t_legal; // @[beh_lib.scala 366:14] + reg x_t_icaf; // @[beh_lib.scala 366:14] + reg x_t_icaf_f1; // @[beh_lib.scala 366:14] + reg [1:0] x_t_icaf_type; // @[beh_lib.scala 366:14] + reg x_t_fence_i; // @[beh_lib.scala 366:14] + reg [3:0] x_t_i0trigger; // @[beh_lib.scala 366:14] + reg [3:0] x_t_pmu_i0_itype; // @[beh_lib.scala 366:14] + reg x_t_pmu_i0_br_unpred; // @[beh_lib.scala 366:14] + wire [3:0] _T_530 = {io_dec_tlu_flush_lower_wb,io_dec_tlu_flush_lower_wb,io_dec_tlu_flush_lower_wb,io_dec_tlu_flush_lower_wb}; // @[Cat.scala 29:58] + wire [3:0] _T_531 = ~_T_530; // @[el2_dec_decode_ctl.scala 603:39] + reg r_t_legal; // @[beh_lib.scala 366:14] + reg r_t_icaf; // @[beh_lib.scala 366:14] + reg r_t_icaf_f1; // @[beh_lib.scala 366:14] + reg [1:0] r_t_icaf_type; // @[beh_lib.scala 366:14] + reg r_t_fence_i; // @[beh_lib.scala 366:14] + reg [3:0] r_t_i0trigger; // @[beh_lib.scala 366:14] + reg [3:0] r_t_pmu_i0_itype; // @[beh_lib.scala 366:14] + reg r_t_pmu_i0_br_unpred; // @[beh_lib.scala 366:14] + reg [3:0] lsu_trigger_match_r; // @[el2_dec_decode_ctl.scala 606:36] + reg lsu_pmu_misaligned_r; // @[el2_dec_decode_ctl.scala 607:37] + reg r_d_i0store; // @[beh_lib.scala 366:14] + wire _T_536 = r_d_i0load | r_d_i0store; // @[el2_dec_decode_ctl.scala 611:56] + wire [3:0] _T_540 = {_T_536,_T_536,_T_536,_T_536}; // @[Cat.scala 29:58] + wire [3:0] _T_541 = _T_540 & lsu_trigger_match_r; // @[el2_dec_decode_ctl.scala 611:72] + wire [3:0] _T_542 = _T_541 | r_t_i0trigger; // @[el2_dec_decode_ctl.scala 611:95] + reg r_d_i0div; // @[beh_lib.scala 366:14] + wire _T_545 = r_d_i0div & r_d_i0valid; // @[el2_dec_decode_ctl.scala 617:53] + wire _T_556 = i0r_rs1 != 5'h0; // @[el2_dec_decode_ctl.scala 628:49] + wire _T_558 = i0r_rs2 != 5'h0; // @[el2_dec_decode_ctl.scala 629:49] + wire _T_560 = i0r_rd != 5'h0; // @[el2_dec_decode_ctl.scala 630:48] + wire i0_rd_en_d = i0_dp_rd & _T_560; // @[el2_dec_decode_ctl.scala 630:37] + wire i0_jalimm20 = i0_dp_jal & i0_dp_imm20; // @[el2_dec_decode_ctl.scala 634:38] + wire _T_561 = ~i0_dp_jal; // @[el2_dec_decode_ctl.scala 635:27] + wire i0_uiimm20 = _T_561 & i0_dp_imm20; // @[el2_dec_decode_ctl.scala 635:38] + wire [31:0] _T_563 = i0_dp_csr_read ? io_dec_csr_rddata_d : 32'h0; // @[Mux.scala 27:72] + wire [9:0] _T_577 = {io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31]}; // @[Cat.scala 29:58] + wire [18:0] _T_586 = {_T_577,io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[31]}; // @[Cat.scala 29:58] + wire [31:0] _T_589 = {_T_586,io_dec_i0_instr_d[31],io_dec_i0_instr_d[31:20]}; // @[Cat.scala 29:58] + wire [31:0] _T_684 = i0_dp_imm12 ? _T_589 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_618 = {27'h0,i0r_rs2}; // @[Cat.scala 29:58] + wire [31:0] _T_685 = i0_dp_shimm5 ? _T_618 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_689 = _T_684 | _T_685; // @[Mux.scala 27:72] + wire [31:0] _T_638 = {_T_577,io_dec_i0_instr_d[31],io_dec_i0_instr_d[31],io_dec_i0_instr_d[19:12],io_dec_i0_instr_d[20],io_dec_i0_instr_d[30:21],1'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_686 = i0_jalimm20 ? _T_638 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_690 = _T_689 | _T_686; // @[Mux.scala 27:72] + wire [31:0] _T_652 = {io_dec_i0_instr_d[31:12],12'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_687 = i0_uiimm20 ? _T_652 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_691 = _T_690 | _T_687; // @[Mux.scala 27:72] + wire _T_653 = i0_csr_write_only_d & i0_dp_csr_imm; // @[el2_dec_decode_ctl.scala 646:40] + wire [31:0] _T_683 = {27'h0,i0r_rs1}; // @[Cat.scala 29:58] + wire [31:0] _T_688 = _T_653 ? _T_683 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] i0_immed_d = _T_691 | _T_688; // @[Mux.scala 27:72] + wire [31:0] _T_564 = _T_347 ? i0_immed_d : 32'h0; // @[Mux.scala 27:72] + wire i0_d_c_mul = i0_dp_mul & i0_legal_decode_d; // @[el2_dec_decode_ctl.scala 650:44] + wire i0_d_c_load = i0_dp_load & i0_legal_decode_d; // @[el2_dec_decode_ctl.scala 651:44] + wire i0_d_c_alu = i0_dp_alu & i0_legal_decode_d; // @[el2_dec_decode_ctl.scala 652:44] + reg i0_x_c_mul; // @[Reg.scala 15:16] + reg i0_x_c_alu; // @[Reg.scala 15:16] + reg i0_r_c_mul; // @[Reg.scala 15:16] + reg i0_r_c_alu; // @[Reg.scala 15:16] + wire _T_710 = |i0_pipe_en[1:0]; // @[el2_dec_decode_ctl.scala 660:49] + wire i0_r_data_en = i0_pipe_en[2] | io_clk_override; // @[el2_dec_decode_ctl.scala 662:50] + reg x_d_i0store; // @[beh_lib.scala 366:14] + reg x_d_i0div; // @[beh_lib.scala 366:14] + reg x_d_csrwen; // @[beh_lib.scala 366:14] + reg [11:0] x_d_csrwaddr; // @[beh_lib.scala 366:14] + wire _T_733 = x_d_i0v & _T_743; // @[el2_dec_decode_ctl.scala 684:37] + wire _T_737 = x_d_i0valid & _T_743; // @[el2_dec_decode_ctl.scala 685:37] + wire _T_756 = ~r_d_i0div; // @[el2_dec_decode_ctl.scala 700:49] + wire _T_757 = i0_wen_r & _T_756; // @[el2_dec_decode_ctl.scala 700:47] + wire _T_758 = ~i0_load_kill_wen_r; // @[el2_dec_decode_ctl.scala 700:65] + wire _T_761 = x_d_i0v & x_d_i0load; // @[el2_dec_decode_ctl.scala 709:45] + wire _T_768 = io_i0_ap_predict_nt & _T_561; // @[el2_dec_decode_ctl.scala 715:52] + wire [11:0] _T_781 = {10'h0,io_dec_i0_pc4_d,i0_ap_pc2}; // @[Cat.scala 29:58] + reg [11:0] last_br_immed_x; // @[beh_lib.scala 356:14] + wire _T_799 = x_d_i0div & x_d_i0valid; // @[el2_dec_decode_ctl.scala 723:40] + wire div_e1_to_r = _T_799 | _T_545; // @[el2_dec_decode_ctl.scala 723:55] + wire _T_802 = x_d_i0rd == 5'h0; // @[el2_dec_decode_ctl.scala 725:69] + wire _T_803 = _T_799 & _T_802; // @[el2_dec_decode_ctl.scala 725:57] + wire _T_805 = _T_799 & io_dec_tlu_flush_lower_r; // @[el2_dec_decode_ctl.scala 726:30] + wire _T_806 = _T_803 | _T_805; // @[el2_dec_decode_ctl.scala 725:86] + wire _T_808 = _T_545 & io_dec_tlu_flush_lower_r; // @[el2_dec_decode_ctl.scala 727:30] + wire _T_809 = _T_808 & io_dec_tlu_i0_kill_writeb_r; // @[el2_dec_decode_ctl.scala 727:57] + wire div_flush = _T_806 | _T_809; // @[el2_dec_decode_ctl.scala 726:59] + wire _T_810 = io_dec_div_active & div_flush; // @[el2_dec_decode_ctl.scala 731:51] + wire _T_811 = ~div_e1_to_r; // @[el2_dec_decode_ctl.scala 732:26] + wire _T_812 = io_dec_div_active & _T_811; // @[el2_dec_decode_ctl.scala 732:24] + wire _T_813 = r_d_i0rd == io_div_waddr_wb; // @[el2_dec_decode_ctl.scala 732:51] + wire _T_814 = _T_812 & _T_813; // @[el2_dec_decode_ctl.scala 732:39] + wire _T_815 = _T_814 & i0_wen_r; // @[el2_dec_decode_ctl.scala 732:72] + wire nonblock_div_cancel = _T_810 | _T_815; // @[el2_dec_decode_ctl.scala 731:65] + wire i0_div_decode_d = i0_legal_decode_d & i0_dp_div; // @[el2_dec_decode_ctl.scala 735:55] + wire _T_817 = ~io_exu_div_wren; // @[el2_dec_decode_ctl.scala 737:62] + wire _T_818 = io_dec_div_active & _T_817; // @[el2_dec_decode_ctl.scala 737:60] + wire _T_819 = ~nonblock_div_cancel; // @[el2_dec_decode_ctl.scala 737:81] + wire _T_820 = _T_818 & _T_819; // @[el2_dec_decode_ctl.scala 737:79] + reg _T_821; // @[el2_dec_decode_ctl.scala 739:54] + reg [4:0] _T_830; // @[Reg.scala 27:20] + reg [31:0] i0_inst_x; // @[beh_lib.scala 356:14] + reg [31:0] i0_inst_r; // @[beh_lib.scala 356:14] + reg [31:0] i0_inst_wb; // @[beh_lib.scala 356:14] + reg [31:0] _T_837; // @[beh_lib.scala 356:14] + reg [30:0] i0_pc_wb; // @[beh_lib.scala 356:14] + reg [30:0] _T_840; // @[beh_lib.scala 356:14] + reg [30:0] dec_i0_pc_r; // @[beh_lib.scala 356:14] + wire [31:0] _T_842 = {io_exu_i0_pc_x,1'h0}; // @[Cat.scala 29:58] + wire [12:0] _T_843 = {last_br_immed_x,1'h0}; // @[Cat.scala 29:58] + wire [12:0] _T_846 = _T_842[12:1] + _T_843[12:1]; // @[el2_lib.scala 310:31] + wire [18:0] _T_849 = _T_842[31:13] + 19'h1; // @[el2_lib.scala 311:27] + wire [18:0] _T_852 = _T_842[31:13] - 19'h1; // @[el2_lib.scala 312:27] + wire _T_855 = ~_T_846[12]; // @[el2_lib.scala 314:27] + wire _T_856 = _T_843[12] ^ _T_855; // @[el2_lib.scala 314:25] + wire _T_859 = ~_T_843[12]; // @[el2_lib.scala 315:8] + wire _T_861 = _T_859 & _T_846[12]; // @[el2_lib.scala 315:14] + wire _T_865 = _T_843[12] & _T_855; // @[el2_lib.scala 316:13] + wire [18:0] _T_867 = _T_856 ? _T_842[31:13] : 19'h0; // @[Mux.scala 27:72] + wire [18:0] _T_868 = _T_861 ? _T_849 : 19'h0; // @[Mux.scala 27:72] + wire [18:0] _T_869 = _T_865 ? _T_852 : 19'h0; // @[Mux.scala 27:72] + wire [18:0] _T_870 = _T_867 | _T_868; // @[Mux.scala 27:72] + wire [18:0] _T_871 = _T_870 | _T_869; // @[Mux.scala 27:72] + wire [31:0] temp_pred_correct_npc_x = {_T_871,_T_846[11:0],1'h0}; // @[Cat.scala 29:58] + wire _T_887_mul = i0_rs1_depend_i0_r & i0_r_c_mul; // @[el2_dec_decode_ctl.scala 778:61] + wire _T_887_alu = i0_rs1_depend_i0_r & i0_r_c_alu; // @[el2_dec_decode_ctl.scala 778:61] + wire i0_rs1_class_d_mul = i0_rs1_depend_i0_x ? i0_x_c_mul : _T_887_mul; // @[el2_dec_decode_ctl.scala 778:24] + wire i0_rs1_class_d_alu = i0_rs1_depend_i0_x ? i0_x_c_alu : _T_887_alu; // @[el2_dec_decode_ctl.scala 778:24] + wire _T_896_mul = i0_rs2_depend_i0_r & i0_r_c_mul; // @[el2_dec_decode_ctl.scala 780:61] + wire _T_896_alu = i0_rs2_depend_i0_r & i0_r_c_alu; // @[el2_dec_decode_ctl.scala 780:61] + wire i0_rs2_class_d_mul = i0_rs2_depend_i0_x ? i0_x_c_mul : _T_896_mul; // @[el2_dec_decode_ctl.scala 780:24] + wire i0_rs2_class_d_alu = i0_rs2_depend_i0_x ? i0_x_c_alu : _T_896_alu; // @[el2_dec_decode_ctl.scala 780:24] + wire _T_909 = io_dec_i0_rs1_en_d & io_dec_nonblock_load_wen; // @[el2_dec_decode_ctl.scala 798:62] + wire _T_910 = io_dec_nonblock_load_waddr == i0r_rs1; // @[el2_dec_decode_ctl.scala 798:119] + wire i0_rs1_nonblock_load_bypass_en_d = _T_909 & _T_910; // @[el2_dec_decode_ctl.scala 798:89] + wire _T_911 = io_dec_i0_rs2_en_d & io_dec_nonblock_load_wen; // @[el2_dec_decode_ctl.scala 800:62] + wire _T_912 = io_dec_nonblock_load_waddr == i0r_rs2; // @[el2_dec_decode_ctl.scala 800:119] + wire i0_rs2_nonblock_load_bypass_en_d = _T_911 & _T_912; // @[el2_dec_decode_ctl.scala 800:89] + wire _T_914 = i0_rs1_class_d_alu | i0_rs1_class_d_mul; // @[el2_dec_decode_ctl.scala 803:69] + wire _T_915 = i0_rs1_depth_d[0] & _T_914; // @[el2_dec_decode_ctl.scala 803:48] + wire _T_917 = i0_rs1_depth_d[0] & i0_rs1_class_d_load; // @[el2_dec_decode_ctl.scala 803:111] + wire _T_920 = _T_914 | i0_rs1_class_d_load; // @[el2_dec_decode_ctl.scala 803:199] + wire _T_921 = i0_rs1_depth_d[1] & _T_920; // @[el2_dec_decode_ctl.scala 803:156] + wire [2:0] i0_rs1bypass = {_T_915,_T_917,_T_921}; // @[Cat.scala 29:58] + wire _T_925 = i0_rs2_class_d_alu | i0_rs2_class_d_mul; // @[el2_dec_decode_ctl.scala 805:70] + wire _T_926 = i0_rs2_depth_d[0] & _T_925; // @[el2_dec_decode_ctl.scala 805:48] + wire _T_928 = i0_rs2_depth_d[0] & i0_rs2_class_d_load; // @[el2_dec_decode_ctl.scala 805:112] + wire _T_931 = _T_925 | i0_rs2_class_d_load; // @[el2_dec_decode_ctl.scala 805:199] + wire _T_932 = i0_rs2_depth_d[1] & _T_931; // @[el2_dec_decode_ctl.scala 805:156] + wire [2:0] i0_rs2bypass = {_T_926,_T_928,_T_932}; // @[Cat.scala 29:58] + wire _T_938 = i0_rs1bypass[1] | i0_rs1bypass[0]; // @[el2_dec_decode_ctl.scala 807:78] + wire _T_940 = ~i0_rs1bypass[2]; // @[el2_dec_decode_ctl.scala 807:99] + wire _T_941 = _T_940 & i0_rs1_nonblock_load_bypass_en_d; // @[el2_dec_decode_ctl.scala 807:116] + wire _T_942 = _T_938 | _T_941; // @[el2_dec_decode_ctl.scala 807:96] + wire _T_947 = i0_rs2bypass[1] | i0_rs2bypass[0]; // @[el2_dec_decode_ctl.scala 808:78] + wire _T_949 = ~i0_rs2bypass[2]; // @[el2_dec_decode_ctl.scala 808:99] + wire _T_950 = _T_949 & i0_rs2_nonblock_load_bypass_en_d; // @[el2_dec_decode_ctl.scala 808:116] + wire _T_951 = _T_947 | _T_950; // @[el2_dec_decode_ctl.scala 808:96] + wire _T_958 = ~i0_rs1bypass[1]; // @[el2_dec_decode_ctl.scala 813:30] + wire _T_960 = ~i0_rs1bypass[0]; // @[el2_dec_decode_ctl.scala 813:49] + wire _T_961 = _T_958 & _T_960; // @[el2_dec_decode_ctl.scala 813:47] + wire _T_962 = _T_961 & i0_rs1_nonblock_load_bypass_en_d; // @[el2_dec_decode_ctl.scala 813:66] + wire [31:0] _T_964 = i0_rs1bypass[1] ? io_lsu_result_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_965 = i0_rs1bypass[0] ? i0_result_r_raw : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_966 = _T_962 ? io_lsu_nonblock_load_data : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_967 = _T_964 | _T_965; // @[Mux.scala 27:72] + wire _T_975 = ~i0_rs2bypass[1]; // @[el2_dec_decode_ctl.scala 818:31] + wire _T_977 = ~i0_rs2bypass[0]; // @[el2_dec_decode_ctl.scala 818:50] + wire _T_978 = _T_975 & _T_977; // @[el2_dec_decode_ctl.scala 818:48] + wire _T_979 = _T_978 & i0_rs2_nonblock_load_bypass_en_d; // @[el2_dec_decode_ctl.scala 818:67] + wire [31:0] _T_981 = i0_rs2bypass[1] ? io_lsu_result_m : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_982 = i0_rs2bypass[0] ? i0_result_r_raw : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_983 = _T_979 ? io_lsu_nonblock_load_data : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_984 = _T_981 | _T_982; // @[Mux.scala 27:72] + wire _T_987 = i0_dp_raw_load | i0_dp_raw_store; // @[el2_dec_decode_ctl.scala 820:68] + wire _T_988 = io_dec_ib0_valid_d & _T_987; // @[el2_dec_decode_ctl.scala 820:50] + wire _T_989 = ~io_dma_dccm_stall_any; // @[el2_dec_decode_ctl.scala 820:89] + wire _T_990 = _T_988 & _T_989; // @[el2_dec_decode_ctl.scala 820:87] + wire _T_992 = _T_990 & _T_493; // @[el2_dec_decode_ctl.scala 820:112] + wire _T_994 = ~io_dec_extint_stall; // @[el2_dec_decode_ctl.scala 822:6] + wire _T_995 = _T_994 & i0_dp_lsu; // @[el2_dec_decode_ctl.scala 822:27] + wire _T_996 = _T_995 & i0_dp_load; // @[el2_dec_decode_ctl.scala 822:39] + wire _T_1001 = _T_995 & i0_dp_store; // @[el2_dec_decode_ctl.scala 823:39] + wire [11:0] _T_1005 = {io_dec_i0_instr_d[31:25],i0r_rd}; // @[Cat.scala 29:58] + wire [11:0] _T_1006 = _T_996 ? io_dec_i0_instr_d[31:20] : 12'h0; // @[Mux.scala 27:72] + wire [11:0] _T_1007 = _T_1001 ? _T_1005 : 12'h0; // @[Mux.scala 27:72] + rvclkhdr data_gated_cgc ( // @[el2_dec_decode_ctl.scala 221:29] + .io_l1clk(data_gated_cgc_io_l1clk), + .io_clk(data_gated_cgc_io_clk), + .io_en(data_gated_cgc_io_en), + .io_scan_mode(data_gated_cgc_io_scan_mode) + ); + el2_dec_dec_ctl i0_dec ( // @[el2_dec_decode_ctl.scala 396:24] + .io_ins(i0_dec_io_ins), + .io_out_alu(i0_dec_io_out_alu), + .io_out_rs2(i0_dec_io_out_rs2), + .io_out_rs1(i0_dec_io_out_rs1), + .io_out_imm12(i0_dec_io_out_imm12), + .io_out_rd(i0_dec_io_out_rd), + .io_out_shimm5(i0_dec_io_out_shimm5), + .io_out_imm20(i0_dec_io_out_imm20), + .io_out_pc(i0_dec_io_out_pc), + .io_out_load(i0_dec_io_out_load), + .io_out_store(i0_dec_io_out_store), + .io_out_lsu(i0_dec_io_out_lsu), + .io_out_add(i0_dec_io_out_add), + .io_out_sub(i0_dec_io_out_sub), + .io_out_land(i0_dec_io_out_land), + .io_out_lor(i0_dec_io_out_lor), + .io_out_lxor(i0_dec_io_out_lxor), + .io_out_sll(i0_dec_io_out_sll), + .io_out_sra(i0_dec_io_out_sra), + .io_out_srl(i0_dec_io_out_srl), + .io_out_slt(i0_dec_io_out_slt), + .io_out_unsign(i0_dec_io_out_unsign), + .io_out_condbr(i0_dec_io_out_condbr), + .io_out_beq(i0_dec_io_out_beq), + .io_out_bne(i0_dec_io_out_bne), + .io_out_bge(i0_dec_io_out_bge), + .io_out_blt(i0_dec_io_out_blt), + .io_out_jal(i0_dec_io_out_jal), + .io_out_by(i0_dec_io_out_by), + .io_out_half(i0_dec_io_out_half), + .io_out_word(i0_dec_io_out_word), + .io_out_csr_read(i0_dec_io_out_csr_read), + .io_out_csr_clr(i0_dec_io_out_csr_clr), + .io_out_csr_set(i0_dec_io_out_csr_set), + .io_out_csr_write(i0_dec_io_out_csr_write), + .io_out_csr_imm(i0_dec_io_out_csr_imm), + .io_out_presync(i0_dec_io_out_presync), + .io_out_postsync(i0_dec_io_out_postsync), + .io_out_ebreak(i0_dec_io_out_ebreak), + .io_out_ecall(i0_dec_io_out_ecall), + .io_out_mret(i0_dec_io_out_mret), + .io_out_mul(i0_dec_io_out_mul), + .io_out_rs1_sign(i0_dec_io_out_rs1_sign), + .io_out_rs2_sign(i0_dec_io_out_rs2_sign), + .io_out_low(i0_dec_io_out_low), + .io_out_div(i0_dec_io_out_div), + .io_out_rem(i0_dec_io_out_rem), + .io_out_fence(i0_dec_io_out_fence), + .io_out_fence_i(i0_dec_io_out_fence_i), + .io_out_pm_alu(i0_dec_io_out_pm_alu), + .io_out_legal(i0_dec_io_out_legal) + ); + rvclkhdr rvclkhdr ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_io_l1clk), + .io_clk(rvclkhdr_io_clk), + .io_en(rvclkhdr_io_en), + .io_scan_mode(rvclkhdr_io_scan_mode) + ); + rvclkhdr rvclkhdr_1 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_1_io_l1clk), + .io_clk(rvclkhdr_1_io_clk), + .io_en(rvclkhdr_1_io_en), + .io_scan_mode(rvclkhdr_1_io_scan_mode) + ); + rvclkhdr rvclkhdr_2 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_2_io_l1clk), + .io_clk(rvclkhdr_2_io_clk), + .io_en(rvclkhdr_2_io_en), + .io_scan_mode(rvclkhdr_2_io_scan_mode) + ); + rvclkhdr rvclkhdr_3 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_3_io_l1clk), + .io_clk(rvclkhdr_3_io_clk), + .io_en(rvclkhdr_3_io_en), + .io_scan_mode(rvclkhdr_3_io_scan_mode) + ); + rvclkhdr rvclkhdr_4 ( // @[beh_lib.scala 360:21] + .io_l1clk(rvclkhdr_4_io_l1clk), + .io_clk(rvclkhdr_4_io_clk), + .io_en(rvclkhdr_4_io_en), + .io_scan_mode(rvclkhdr_4_io_scan_mode) + ); + rvclkhdr rvclkhdr_5 ( // @[beh_lib.scala 360:21] + .io_l1clk(rvclkhdr_5_io_l1clk), + .io_clk(rvclkhdr_5_io_clk), + .io_en(rvclkhdr_5_io_en), + .io_scan_mode(rvclkhdr_5_io_scan_mode) + ); + rvclkhdr rvclkhdr_6 ( // @[beh_lib.scala 360:21] + .io_l1clk(rvclkhdr_6_io_l1clk), + .io_clk(rvclkhdr_6_io_clk), + .io_en(rvclkhdr_6_io_en), + .io_scan_mode(rvclkhdr_6_io_scan_mode) + ); + rvclkhdr rvclkhdr_7 ( // @[beh_lib.scala 360:21] + .io_l1clk(rvclkhdr_7_io_l1clk), + .io_clk(rvclkhdr_7_io_clk), + .io_en(rvclkhdr_7_io_en), + .io_scan_mode(rvclkhdr_7_io_scan_mode) + ); + rvclkhdr rvclkhdr_8 ( // @[beh_lib.scala 360:21] + .io_l1clk(rvclkhdr_8_io_l1clk), + .io_clk(rvclkhdr_8_io_clk), + .io_en(rvclkhdr_8_io_en), + .io_scan_mode(rvclkhdr_8_io_scan_mode) + ); + rvclkhdr rvclkhdr_9 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_9_io_l1clk), + .io_clk(rvclkhdr_9_io_clk), + .io_en(rvclkhdr_9_io_en), + .io_scan_mode(rvclkhdr_9_io_scan_mode) + ); + rvclkhdr rvclkhdr_10 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_10_io_l1clk), + .io_clk(rvclkhdr_10_io_clk), + .io_en(rvclkhdr_10_io_en), + .io_scan_mode(rvclkhdr_10_io_scan_mode) + ); + rvclkhdr rvclkhdr_11 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_11_io_l1clk), + .io_clk(rvclkhdr_11_io_clk), + .io_en(rvclkhdr_11_io_en), + .io_scan_mode(rvclkhdr_11_io_scan_mode) + ); + rvclkhdr rvclkhdr_12 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_12_io_l1clk), + .io_clk(rvclkhdr_12_io_clk), + .io_en(rvclkhdr_12_io_en), + .io_scan_mode(rvclkhdr_12_io_scan_mode) + ); + rvclkhdr rvclkhdr_13 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_13_io_l1clk), + .io_clk(rvclkhdr_13_io_clk), + .io_en(rvclkhdr_13_io_en), + .io_scan_mode(rvclkhdr_13_io_scan_mode) + ); + rvclkhdr rvclkhdr_14 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_14_io_l1clk), + .io_clk(rvclkhdr_14_io_clk), + .io_en(rvclkhdr_14_io_en), + .io_scan_mode(rvclkhdr_14_io_scan_mode) + ); + rvclkhdr rvclkhdr_15 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_15_io_l1clk), + .io_clk(rvclkhdr_15_io_clk), + .io_en(rvclkhdr_15_io_en), + .io_scan_mode(rvclkhdr_15_io_scan_mode) + ); + rvclkhdr rvclkhdr_16 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_16_io_l1clk), + .io_clk(rvclkhdr_16_io_clk), + .io_en(rvclkhdr_16_io_en), + .io_scan_mode(rvclkhdr_16_io_scan_mode) + ); + rvclkhdr rvclkhdr_17 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_17_io_l1clk), + .io_clk(rvclkhdr_17_io_clk), + .io_en(rvclkhdr_17_io_en), + .io_scan_mode(rvclkhdr_17_io_scan_mode) + ); + rvclkhdr rvclkhdr_18 ( // @[beh_lib.scala 350:21] + .io_l1clk(rvclkhdr_18_io_l1clk), + .io_clk(rvclkhdr_18_io_clk), + .io_en(rvclkhdr_18_io_en), + .io_scan_mode(rvclkhdr_18_io_scan_mode) + ); + assign io_dec_extint_stall = _T_339; // @[el2_dec_decode_ctl.scala 436:23] + assign io_dec_i0_inst_wb1 = _T_837; // @[el2_dec_decode_ctl.scala 757:22] + assign io_dec_i0_pc_wb1 = _T_840; // @[el2_dec_decode_ctl.scala 760:20] + assign io_dec_i0_rs1_en_d = i0_dp_rs1 & _T_556; // @[el2_dec_decode_ctl.scala 628:24] + assign io_dec_i0_rs2_en_d = i0_dp_rs2 & _T_558; // @[el2_dec_decode_ctl.scala 629:24] + assign io_dec_i0_rs1_d = io_dec_i0_instr_d[19:15]; // @[el2_dec_decode_ctl.scala 631:19] + assign io_dec_i0_rs2_d = io_dec_i0_instr_d[24:20]; // @[el2_dec_decode_ctl.scala 632:19] + assign io_dec_i0_immed_d = _T_563 | _T_564; // @[el2_dec_decode_ctl.scala 637:21] + assign io_dec_i0_br_immed_d = _T_768 ? i0_br_offset : _T_781; // @[el2_dec_decode_ctl.scala 715:24] + assign io_i0_ap_land = _T_40 ? 1'h0 : i0_dp_raw_land; // @[el2_dec_decode_ctl.scala 288:20] + assign io_i0_ap_lor = _T_40 | i0_dp_raw_lor; // @[el2_dec_decode_ctl.scala 289:20] + assign io_i0_ap_lxor = _T_40 ? 1'h0 : i0_dp_raw_lxor; // @[el2_dec_decode_ctl.scala 290:20] + assign io_i0_ap_sll = _T_40 ? 1'h0 : i0_dp_raw_sll; // @[el2_dec_decode_ctl.scala 291:20] + assign io_i0_ap_srl = _T_40 ? 1'h0 : i0_dp_raw_srl; // @[el2_dec_decode_ctl.scala 292:20] + assign io_i0_ap_sra = _T_40 ? 1'h0 : i0_dp_raw_sra; // @[el2_dec_decode_ctl.scala 293:20] + assign io_i0_ap_beq = _T_40 ? 1'h0 : i0_dp_raw_beq; // @[el2_dec_decode_ctl.scala 296:20] + assign io_i0_ap_bne = _T_40 ? 1'h0 : i0_dp_raw_bne; // @[el2_dec_decode_ctl.scala 297:20] + assign io_i0_ap_blt = _T_40 ? 1'h0 : i0_dp_raw_blt; // @[el2_dec_decode_ctl.scala 298:20] + assign io_i0_ap_bge = _T_40 ? 1'h0 : i0_dp_raw_bge; // @[el2_dec_decode_ctl.scala 299:20] + assign io_i0_ap_add = _T_40 ? 1'h0 : i0_dp_raw_add; // @[el2_dec_decode_ctl.scala 286:20] + assign io_i0_ap_sub = _T_40 ? 1'h0 : i0_dp_raw_sub; // @[el2_dec_decode_ctl.scala 287:20] + assign io_i0_ap_slt = _T_40 ? 1'h0 : i0_dp_raw_slt; // @[el2_dec_decode_ctl.scala 294:20] + assign io_i0_ap_unsign = _T_40 ? 1'h0 : i0_dp_raw_unsign; // @[el2_dec_decode_ctl.scala 295:20] + assign io_i0_ap_jal = _T_336 & _T_337; // @[el2_dec_decode_ctl.scala 302:22] + assign io_i0_ap_predict_t = _T_46 & i0_predict_br; // @[el2_dec_decode_ctl.scala 284:26] + assign io_i0_ap_predict_nt = _T_47 & i0_predict_br; // @[el2_dec_decode_ctl.scala 283:26] + assign io_i0_ap_csr_write = i0_csr_write & _T_347; // @[el2_dec_decode_ctl.scala 300:22] + assign io_i0_ap_csr_imm = _T_40 ? 1'h0 : i0_dp_raw_csr_imm; // @[el2_dec_decode_ctl.scala 301:22] + assign io_dec_i0_decode_d = _T_490 & _T_467; // @[el2_dec_decode_ctl.scala 556:22 el2_dec_decode_ctl.scala 622:22] + assign io_dec_i0_alu_decode_d = i0_exulegal_decode_d & i0_dp_alu; // @[el2_dec_decode_ctl.scala 576:26] + assign io_dec_i0_rs1_bypass_data_d = _T_967 | _T_966; // @[el2_dec_decode_ctl.scala 810:34] + assign io_dec_i0_rs2_bypass_data_d = _T_984 | _T_983; // @[el2_dec_decode_ctl.scala 815:34] + assign io_dec_i0_waddr_r = r_d_i0rd; // @[el2_dec_decode_ctl.scala 698:27] + assign io_dec_i0_wen_r = _T_757 & _T_758; // @[el2_dec_decode_ctl.scala 700:32] + assign io_dec_i0_wdata_r = _T_764 ? io_lsu_result_corr_r : i0_result_r_raw; // @[el2_dec_decode_ctl.scala 701:26] + assign io_dec_i0_select_pc_d = _T_40 ? 1'h0 : i0_dp_raw_pc; // @[el2_dec_decode_ctl.scala 274:25] + assign io_dec_i0_rs1_bypass_en_d = {i0_rs1bypass[2],_T_942}; // @[el2_dec_decode_ctl.scala 807:37] + assign io_dec_i0_rs2_bypass_en_d = {i0_rs2bypass[2],_T_951}; // @[el2_dec_decode_ctl.scala 808:37] + assign io_lsu_p_fast_int = io_dec_extint_stall; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 442:30] + assign io_lsu_p_by = io_dec_extint_stall ? 1'h0 : i0_dp_by; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 448:41] + assign io_lsu_p_half = io_dec_extint_stall ? 1'h0 : i0_dp_half; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 449:41] + assign io_lsu_p_word = io_dec_extint_stall | i0_dp_word; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 441:30 el2_dec_decode_ctl.scala 450:41] + assign io_lsu_p_dword = 1'h0; // @[el2_dec_decode_ctl.scala 438:11] + assign io_lsu_p_load = io_dec_extint_stall | i0_dp_load; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 440:30 el2_dec_decode_ctl.scala 446:41] + assign io_lsu_p_store = io_dec_extint_stall ? 1'h0 : i0_dp_store; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 447:41] + assign io_lsu_p_unsign = io_dec_extint_stall ? 1'h0 : i0_dp_unsign; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 454:41] + assign io_lsu_p_dma = 1'h0; // @[el2_dec_decode_ctl.scala 438:11] + assign io_lsu_p_store_data_bypass_d = io_dec_extint_stall ? 1'h0 : store_data_bypass_d; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 452:41] + assign io_lsu_p_load_ldst_bypass_d = io_dec_extint_stall ? 1'h0 : load_ldst_bypass_d; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 451:41] + assign io_lsu_p_store_data_bypass_m = 1'h0; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 453:41] + assign io_lsu_p_valid = io_dec_extint_stall | lsu_decode_d; // @[el2_dec_decode_ctl.scala 438:11 el2_dec_decode_ctl.scala 443:30 el2_dec_decode_ctl.scala 445:41] + assign io_mul_p_valid = i0_exulegal_decode_d & i0_dp_mul; // @[el2_dec_decode_ctl.scala 126:12 el2_dec_decode_ctl.scala 431:21] + assign io_mul_p_rs1_sign = _T_40 ? 1'h0 : i0_dp_raw_rs1_sign; // @[el2_dec_decode_ctl.scala 126:12 el2_dec_decode_ctl.scala 432:21] + assign io_mul_p_rs2_sign = _T_40 ? 1'h0 : i0_dp_raw_rs2_sign; // @[el2_dec_decode_ctl.scala 126:12 el2_dec_decode_ctl.scala 433:21] + assign io_mul_p_low = _T_40 ? 1'h0 : i0_dp_raw_low; // @[el2_dec_decode_ctl.scala 126:12 el2_dec_decode_ctl.scala 434:21] + assign io_mul_p_bext = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_bdep = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_clmul = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_clmulh = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_clmulr = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_grev = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_shfl = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_unshfl = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_crc32_b = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_crc32_h = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_crc32_w = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_crc32c_b = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_crc32c_h = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_crc32c_w = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_mul_p_bfp = 1'h0; // @[el2_dec_decode_ctl.scala 126:12] + assign io_div_p_valid = i0_exulegal_decode_d & i0_dp_div; // @[el2_dec_decode_ctl.scala 427:21] + assign io_div_p_unsign = _T_40 ? 1'h0 : i0_dp_raw_unsign; // @[el2_dec_decode_ctl.scala 428:21] + assign io_div_p_rem = _T_40 ? 1'h0 : i0_dp_raw_rem; // @[el2_dec_decode_ctl.scala 429:21] + assign io_div_waddr_wb = _T_830; // @[el2_dec_decode_ctl.scala 745:19] + assign io_dec_div_cancel = _T_810 | _T_815; // @[el2_dec_decode_ctl.scala 734:29] + assign io_dec_lsu_valid_raw_d = _T_992 | io_dec_extint_stall; // @[el2_dec_decode_ctl.scala 820:26] + assign io_dec_lsu_offset_d = _T_1006 | _T_1007; // @[el2_dec_decode_ctl.scala 821:23] + assign io_dec_csr_ren_d = _T_40 ? 1'h0 : i0_dp_raw_csr_read; // @[el2_dec_decode_ctl.scala 458:21] + assign io_dec_csr_wen_unq_d = _T_349 | i0_csr_write; // @[el2_dec_decode_ctl.scala 467:24] + assign io_dec_csr_any_unq_d = i0_dp_csr_read | i0_csr_write; // @[el2_dec_decode_ctl.scala 533:24] + assign io_dec_csr_rdaddr_d = io_dec_i0_instr_d[31:20]; // @[el2_dec_decode_ctl.scala 470:24] + assign io_dec_csr_wen_r = _T_352 & _T_754; // @[el2_dec_decode_ctl.scala 475:20] + assign io_dec_csr_wraddr_r = r_d_csrwaddr; // @[el2_dec_decode_ctl.scala 471:23] + assign io_dec_csr_wrdata_r = r_d_csrwonly ? i0_result_corr_r : write_csr_data; // @[el2_dec_decode_ctl.scala 518:24] + assign io_dec_csr_stall_int_ff = _T_359 & _T_360; // @[el2_dec_decode_ctl.scala 478:27] + assign io_dec_tlu_i0_valid_r = r_d_i0valid & _T_743; // @[el2_dec_decode_ctl.scala 582:30] + assign io_dec_tlu_packet_r_legal = io_dec_tlu_flush_lower_wb ? 1'h0 : r_t_legal; // @[el2_dec_decode_ctl.scala 616:39] + assign io_dec_tlu_packet_r_icaf = io_dec_tlu_flush_lower_wb ? 1'h0 : r_t_icaf; // @[el2_dec_decode_ctl.scala 616:39] + assign io_dec_tlu_packet_r_icaf_f1 = io_dec_tlu_flush_lower_wb ? 1'h0 : r_t_icaf_f1; // @[el2_dec_decode_ctl.scala 616:39] + assign io_dec_tlu_packet_r_icaf_type = io_dec_tlu_flush_lower_wb ? 2'h0 : r_t_icaf_type; // @[el2_dec_decode_ctl.scala 616:39] + assign io_dec_tlu_packet_r_fence_i = io_dec_tlu_flush_lower_wb ? 1'h0 : r_t_fence_i; // @[el2_dec_decode_ctl.scala 616:39] + assign io_dec_tlu_packet_r_i0trigger = io_dec_tlu_flush_lower_wb ? 4'h0 : _T_542; // @[el2_dec_decode_ctl.scala 616:39] + assign io_dec_tlu_packet_r_pmu_i0_itype = io_dec_tlu_flush_lower_wb ? 4'h0 : r_t_pmu_i0_itype; // @[el2_dec_decode_ctl.scala 616:39] + assign io_dec_tlu_packet_r_pmu_i0_br_unpred = io_dec_tlu_flush_lower_wb ? 1'h0 : r_t_pmu_i0_br_unpred; // @[el2_dec_decode_ctl.scala 616:39] + assign io_dec_tlu_packet_r_pmu_divide = r_d_i0div & r_d_i0valid; // @[el2_dec_decode_ctl.scala 616:39 el2_dec_decode_ctl.scala 617:39] + assign io_dec_tlu_packet_r_pmu_lsu_misaligned = io_dec_tlu_flush_lower_wb ? 1'h0 : lsu_pmu_misaligned_r; // @[el2_dec_decode_ctl.scala 616:39] + assign io_dec_tlu_i0_pc_r = dec_i0_pc_r; // @[el2_dec_decode_ctl.scala 763:27] + assign io_dec_illegal_inst = _T_465; // @[el2_dec_decode_ctl.scala 540:23] + assign io_pred_correct_npc_x = temp_pred_correct_npc_x[31:1]; // @[el2_dec_decode_ctl.scala 768:25] + assign io_dec_i0_predict_p_d_misp = 1'h0; // @[el2_dec_decode_ctl.scala 230:38] + assign io_dec_i0_predict_p_d_ataken = 1'h0; // @[el2_dec_decode_ctl.scala 231:38] + assign io_dec_i0_predict_p_d_boffset = 1'h0; // @[el2_dec_decode_ctl.scala 232:38] + assign io_dec_i0_predict_p_d_pc4 = io_dec_i0_pc4_d; // @[el2_dec_decode_ctl.scala 237:38] + assign io_dec_i0_predict_p_d_hist = io_dec_i0_brp_hist; // @[el2_dec_decode_ctl.scala 238:38] + assign io_dec_i0_predict_p_d_toffset = _T_314 ? i0_pcall_imm[12:1] : _T_323; // @[el2_dec_decode_ctl.scala 251:44] + assign io_dec_i0_predict_p_d_valid = i0_brp_valid & i0_legal_decode_d; // @[el2_dec_decode_ctl.scala 239:38] + assign io_dec_i0_predict_p_d_br_error = _T_32 & _T_17; // @[el2_dec_decode_ctl.scala 246:51] + assign io_dec_i0_predict_p_d_br_start_error = _T_35 & _T_17; // @[el2_dec_decode_ctl.scala 247:51] + assign io_dec_i0_predict_p_d_prett = io_dec_i0_brp_prett; // @[el2_dec_decode_ctl.scala 236:38] + assign io_dec_i0_predict_p_d_pcall = i0_dp_jal & i0_pcall_case; // @[el2_dec_decode_ctl.scala 233:38] + assign io_dec_i0_predict_p_d_pret = i0_dp_jal & i0_pret_case; // @[el2_dec_decode_ctl.scala 235:38] + assign io_dec_i0_predict_p_d_pja = i0_dp_jal & i0_pja_case; // @[el2_dec_decode_ctl.scala 234:38] + assign io_dec_i0_predict_p_d_way = io_dec_i0_brp_way; // @[el2_dec_decode_ctl.scala 253:51] + assign io_i0_predict_fghr_d = io_dec_i0_bp_fghr; // @[el2_dec_decode_ctl.scala 252:32] + assign io_i0_predict_index_d = io_dec_i0_bp_index; // @[el2_dec_decode_ctl.scala 248:32] + assign io_i0_predict_btag_d = io_dec_i0_bp_btag; // @[el2_dec_decode_ctl.scala 249:32] + assign io_dec_data_en = {i0_x_data_en,i0_r_data_en}; // @[el2_dec_decode_ctl.scala 666:27] + assign io_dec_ctl_en = {i0_x_ctl_en,i0_r_ctl_en}; // @[el2_dec_decode_ctl.scala 667:27] + assign io_dec_pmu_instr_decoded = io_dec_i0_decode_d; // @[el2_dec_decode_ctl.scala 561:28] + assign io_dec_pmu_decode_stall = io_dec_ib0_valid_d & _T_498; // @[el2_dec_decode_ctl.scala 562:27] + assign io_dec_pmu_presync_stall = i0_presync & prior_inflight_eff; // @[el2_dec_decode_ctl.scala 564:29] + assign io_dec_pmu_postsync_stall = postsync_stall; // @[el2_dec_decode_ctl.scala 563:29] + assign io_dec_nonblock_load_wen = _T_199 & _T_200; // @[el2_dec_decode_ctl.scala 357:28] + assign io_dec_nonblock_load_waddr = _T_245 | _T_237; // @[el2_dec_decode_ctl.scala 354:29 el2_dec_decode_ctl.scala 364:29] + assign io_dec_pause_state = pause_stall; // @[el2_dec_decode_ctl.scala 502:22] + assign io_dec_pause_state_cg = pause_stall & _T_420; // @[el2_dec_decode_ctl.scala 506:25] + assign io_dec_div_active = _T_821; // @[el2_dec_decode_ctl.scala 739:21] + assign data_gated_cgc_io_clk = clock; // @[el2_dec_decode_ctl.scala 224:31] + assign data_gated_cgc_io_en = _T_15 | _T_16; // @[el2_dec_decode_ctl.scala 222:31] + assign data_gated_cgc_io_scan_mode = io_scan_mode; // @[el2_dec_decode_ctl.scala 223:31] + assign i0_dec_io_ins = io_dec_i0_instr_d; // @[el2_dec_decode_ctl.scala 397:18] + assign rvclkhdr_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_io_en = i0_pipe_en[3] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_1_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_1_io_en = i0_pipe_en[3] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_1_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_2_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_2_io_en = _T_428 | pause_stall; // @[beh_lib.scala 353:15] + assign rvclkhdr_2_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_3_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_3_io_en = shift_illegal & _T_464; // @[beh_lib.scala 353:15] + assign rvclkhdr_3_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_4_io_clk = clock; // @[beh_lib.scala 362:16] + assign rvclkhdr_4_io_en = _T_704 | io_clk_override; // @[beh_lib.scala 363:15] + assign rvclkhdr_4_io_scan_mode = io_scan_mode; // @[beh_lib.scala 364:22] + assign rvclkhdr_5_io_clk = clock; // @[beh_lib.scala 362:16] + assign rvclkhdr_5_io_en = _T_704 | io_clk_override; // @[beh_lib.scala 363:15] + assign rvclkhdr_5_io_scan_mode = io_scan_mode; // @[beh_lib.scala 364:22] + assign rvclkhdr_6_io_clk = clock; // @[beh_lib.scala 362:16] + assign rvclkhdr_6_io_en = _T_704 | io_clk_override; // @[beh_lib.scala 363:15] + assign rvclkhdr_6_io_scan_mode = io_scan_mode; // @[beh_lib.scala 364:22] + assign rvclkhdr_7_io_clk = clock; // @[beh_lib.scala 362:16] + assign rvclkhdr_7_io_en = _T_707 | io_clk_override; // @[beh_lib.scala 363:15] + assign rvclkhdr_7_io_scan_mode = io_scan_mode; // @[beh_lib.scala 364:22] + assign rvclkhdr_8_io_clk = clock; // @[beh_lib.scala 362:16] + assign rvclkhdr_8_io_en = _T_710 | io_clk_override; // @[beh_lib.scala 363:15] + assign rvclkhdr_8_io_scan_mode = io_scan_mode; // @[beh_lib.scala 364:22] + assign rvclkhdr_9_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_9_io_en = i0_pipe_en[2] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_9_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_10_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_10_io_en = i0_pipe_en[3] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_10_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_11_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_11_io_en = i0_legal_decode_d & i0_dp_div; // @[beh_lib.scala 353:15] + assign rvclkhdr_11_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_12_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_12_io_en = i0_pipe_en[3] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_12_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_13_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_13_io_en = i0_pipe_en[2] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_13_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_14_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_14_io_en = i0_pipe_en[1] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_14_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_15_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_15_io_en = i0_pipe_en[0] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_15_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_16_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_16_io_en = i0_pipe_en[1] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_16_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_17_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_17_io_en = i0_pipe_en[0] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_17_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] + assign rvclkhdr_18_io_clk = clock; // @[beh_lib.scala 352:16] + assign rvclkhdr_18_io_en = i0_pipe_en[2] | io_clk_override; // @[beh_lib.scala 353:15] + assign rvclkhdr_18_io_scan_mode = io_scan_mode; // @[beh_lib.scala 354:22] +`ifdef RANDOMIZE_GARBAGE_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_INVALID_ASSIGN +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_REG_INIT +`define RANDOMIZE +`endif +`ifdef RANDOMIZE_MEM_INIT +`define RANDOMIZE +`endif +`ifndef RANDOM +`define RANDOM $random +`endif +`ifdef RANDOMIZE_MEM_INIT + integer initvar; +`endif +`ifndef SYNTHESIS +`ifdef FIRRTL_BEFORE_INITIAL +`FIRRTL_BEFORE_INITIAL +`endif +initial begin + `ifdef RANDOMIZE + `ifdef INIT_RANDOM + `INIT_RANDOM + `endif + `ifndef VERILATOR + `ifdef RANDOMIZE_DELAY + #`RANDOMIZE_DELAY begin end + `else + #0.002 begin end + `endif + `endif +`ifdef RANDOMIZE_REG_INIT + _RAND_0 = {1{`RANDOM}}; + tlu_wr_pause_r1 = _RAND_0[0:0]; + _RAND_1 = {1{`RANDOM}}; + tlu_wr_pause_r2 = _RAND_1[0:0]; + _RAND_2 = {1{`RANDOM}}; + leak1_i1_stall = _RAND_2[0:0]; + _RAND_3 = {1{`RANDOM}}; + leak1_i0_stall = _RAND_3[0:0]; + _RAND_4 = {1{`RANDOM}}; + pause_stall = _RAND_4[0:0]; + _RAND_5 = {1{`RANDOM}}; + write_csr_data = _RAND_5[31:0]; + _RAND_6 = {1{`RANDOM}}; + postsync_stall = _RAND_6[0:0]; + _RAND_7 = {1{`RANDOM}}; + x_d_i0valid = _RAND_7[0:0]; + _RAND_8 = {1{`RANDOM}}; + flush_final_r = _RAND_8[0:0]; + _RAND_9 = {1{`RANDOM}}; + illegal_lockout = _RAND_9[0:0]; + _RAND_10 = {1{`RANDOM}}; + cam_raw_0_tag = _RAND_10[2:0]; + _RAND_11 = {1{`RANDOM}}; + cam_raw_0_valid = _RAND_11[0:0]; + _RAND_12 = {1{`RANDOM}}; + cam_raw_1_tag = _RAND_12[2:0]; + _RAND_13 = {1{`RANDOM}}; + cam_raw_1_valid = _RAND_13[0:0]; + _RAND_14 = {1{`RANDOM}}; + cam_raw_2_tag = _RAND_14[2:0]; + _RAND_15 = {1{`RANDOM}}; + cam_raw_2_valid = _RAND_15[0:0]; + _RAND_16 = {1{`RANDOM}}; + cam_raw_3_tag = _RAND_16[2:0]; + _RAND_17 = {1{`RANDOM}}; + cam_raw_3_valid = _RAND_17[0:0]; + _RAND_18 = {1{`RANDOM}}; + x_d_i0load = _RAND_18[0:0]; + _RAND_19 = {1{`RANDOM}}; + x_d_i0rd = _RAND_19[4:0]; + _RAND_20 = {1{`RANDOM}}; + _T_701 = _RAND_20[2:0]; + _RAND_21 = {1{`RANDOM}}; + nonblock_load_valid_m_delay = _RAND_21[0:0]; + _RAND_22 = {1{`RANDOM}}; + r_d_i0load = _RAND_22[0:0]; + _RAND_23 = {1{`RANDOM}}; + r_d_i0v = _RAND_23[0:0]; + _RAND_24 = {1{`RANDOM}}; + r_d_i0rd = _RAND_24[4:0]; + _RAND_25 = {1{`RANDOM}}; + cam_raw_0_rd = _RAND_25[4:0]; + _RAND_26 = {1{`RANDOM}}; + cam_raw_0_wb = _RAND_26[0:0]; + _RAND_27 = {1{`RANDOM}}; + cam_raw_1_rd = _RAND_27[4:0]; + _RAND_28 = {1{`RANDOM}}; + cam_raw_1_wb = _RAND_28[0:0]; + _RAND_29 = {1{`RANDOM}}; + cam_raw_2_rd = _RAND_29[4:0]; + _RAND_30 = {1{`RANDOM}}; + cam_raw_2_wb = _RAND_30[0:0]; + _RAND_31 = {1{`RANDOM}}; + cam_raw_3_rd = _RAND_31[4:0]; + _RAND_32 = {1{`RANDOM}}; + cam_raw_3_wb = _RAND_32[0:0]; + _RAND_33 = {1{`RANDOM}}; + lsu_idle = _RAND_33[0:0]; + _RAND_34 = {1{`RANDOM}}; + _T_339 = _RAND_34[0:0]; + _RAND_35 = {1{`RANDOM}}; + x_d_i0v = _RAND_35[0:0]; + _RAND_36 = {1{`RANDOM}}; + i0_x_c_load = _RAND_36[0:0]; + _RAND_37 = {1{`RANDOM}}; + i0_r_c_load = _RAND_37[0:0]; + _RAND_38 = {1{`RANDOM}}; + r_d_csrwen = _RAND_38[0:0]; + _RAND_39 = {1{`RANDOM}}; + r_d_i0valid = _RAND_39[0:0]; + _RAND_40 = {1{`RANDOM}}; + r_d_csrwaddr = _RAND_40[11:0]; + _RAND_41 = {1{`RANDOM}}; + csr_read_x = _RAND_41[0:0]; + _RAND_42 = {1{`RANDOM}}; + csr_clr_x = _RAND_42[0:0]; + _RAND_43 = {1{`RANDOM}}; + csr_set_x = _RAND_43[0:0]; + _RAND_44 = {1{`RANDOM}}; + csr_write_x = _RAND_44[0:0]; + _RAND_45 = {1{`RANDOM}}; + csr_imm_x = _RAND_45[0:0]; + _RAND_46 = {1{`RANDOM}}; + csrimm_x = _RAND_46[4:0]; + _RAND_47 = {1{`RANDOM}}; + csr_rddata_x = _RAND_47[31:0]; + _RAND_48 = {1{`RANDOM}}; + r_d_csrwonly = _RAND_48[0:0]; + _RAND_49 = {1{`RANDOM}}; + i0_result_r_raw = _RAND_49[31:0]; + _RAND_50 = {1{`RANDOM}}; + x_d_csrwonly = _RAND_50[0:0]; + _RAND_51 = {1{`RANDOM}}; + wbd_csrwonly = _RAND_51[0:0]; + _RAND_52 = {1{`RANDOM}}; + _T_465 = _RAND_52[31:0]; + _RAND_53 = {1{`RANDOM}}; + x_t_legal = _RAND_53[0:0]; + _RAND_54 = {1{`RANDOM}}; + x_t_icaf = _RAND_54[0:0]; + _RAND_55 = {1{`RANDOM}}; + x_t_icaf_f1 = _RAND_55[0:0]; + _RAND_56 = {1{`RANDOM}}; + x_t_icaf_type = _RAND_56[1:0]; + _RAND_57 = {1{`RANDOM}}; + x_t_fence_i = _RAND_57[0:0]; + _RAND_58 = {1{`RANDOM}}; + x_t_i0trigger = _RAND_58[3:0]; + _RAND_59 = {1{`RANDOM}}; + x_t_pmu_i0_itype = _RAND_59[3:0]; + _RAND_60 = {1{`RANDOM}}; + x_t_pmu_i0_br_unpred = _RAND_60[0:0]; + _RAND_61 = {1{`RANDOM}}; + r_t_legal = _RAND_61[0:0]; + _RAND_62 = {1{`RANDOM}}; + r_t_icaf = _RAND_62[0:0]; + _RAND_63 = {1{`RANDOM}}; + r_t_icaf_f1 = _RAND_63[0:0]; + _RAND_64 = {1{`RANDOM}}; + r_t_icaf_type = _RAND_64[1:0]; + _RAND_65 = {1{`RANDOM}}; + r_t_fence_i = _RAND_65[0:0]; + _RAND_66 = {1{`RANDOM}}; + r_t_i0trigger = _RAND_66[3:0]; + _RAND_67 = {1{`RANDOM}}; + r_t_pmu_i0_itype = _RAND_67[3:0]; + _RAND_68 = {1{`RANDOM}}; + r_t_pmu_i0_br_unpred = _RAND_68[0:0]; + _RAND_69 = {1{`RANDOM}}; + lsu_trigger_match_r = _RAND_69[3:0]; + _RAND_70 = {1{`RANDOM}}; + lsu_pmu_misaligned_r = _RAND_70[0:0]; + _RAND_71 = {1{`RANDOM}}; + r_d_i0store = _RAND_71[0:0]; + _RAND_72 = {1{`RANDOM}}; + r_d_i0div = _RAND_72[0:0]; + _RAND_73 = {1{`RANDOM}}; + i0_x_c_mul = _RAND_73[0:0]; + _RAND_74 = {1{`RANDOM}}; + i0_x_c_alu = _RAND_74[0:0]; + _RAND_75 = {1{`RANDOM}}; + i0_r_c_mul = _RAND_75[0:0]; + _RAND_76 = {1{`RANDOM}}; + i0_r_c_alu = _RAND_76[0:0]; + _RAND_77 = {1{`RANDOM}}; + x_d_i0store = _RAND_77[0:0]; + _RAND_78 = {1{`RANDOM}}; + x_d_i0div = _RAND_78[0:0]; + _RAND_79 = {1{`RANDOM}}; + x_d_csrwen = _RAND_79[0:0]; + _RAND_80 = {1{`RANDOM}}; + x_d_csrwaddr = _RAND_80[11:0]; + _RAND_81 = {1{`RANDOM}}; + last_br_immed_x = _RAND_81[11:0]; + _RAND_82 = {1{`RANDOM}}; + _T_821 = _RAND_82[0:0]; + _RAND_83 = {1{`RANDOM}}; + _T_830 = _RAND_83[4:0]; + _RAND_84 = {1{`RANDOM}}; + i0_inst_x = _RAND_84[31:0]; + _RAND_85 = {1{`RANDOM}}; + i0_inst_r = _RAND_85[31:0]; + _RAND_86 = {1{`RANDOM}}; + i0_inst_wb = _RAND_86[31:0]; + _RAND_87 = {1{`RANDOM}}; + _T_837 = _RAND_87[31:0]; + _RAND_88 = {1{`RANDOM}}; + i0_pc_wb = _RAND_88[30:0]; + _RAND_89 = {1{`RANDOM}}; + _T_840 = _RAND_89[30:0]; + _RAND_90 = {1{`RANDOM}}; + dec_i0_pc_r = _RAND_90[30:0]; +`endif // RANDOMIZE_REG_INIT + if (reset) begin + tlu_wr_pause_r1 = 1'h0; + end + if (reset) begin + tlu_wr_pause_r2 = 1'h0; + end + if (reset) begin + leak1_i1_stall = 1'h0; + end + if (reset) begin + leak1_i0_stall = 1'h0; + end + if (reset) begin + pause_stall = 1'h0; + end + if (reset) begin + write_csr_data = 32'h0; + end + if (reset) begin + postsync_stall = 1'h0; + end + if (reset) begin + x_d_i0valid = 1'h0; + end + if (reset) begin + flush_final_r = 1'h0; + end + if (reset) begin + illegal_lockout = 1'h0; + end + if (reset) begin + cam_raw_0_tag = 3'h0; + end + if (reset) begin + cam_raw_0_valid = 1'h0; + end + if (reset) begin + cam_raw_1_tag = 3'h0; + end + if (reset) begin + cam_raw_1_valid = 1'h0; + end + if (reset) begin + cam_raw_2_tag = 3'h0; + end + if (reset) begin + cam_raw_2_valid = 1'h0; + end + if (reset) begin + cam_raw_3_tag = 3'h0; + end + if (reset) begin + cam_raw_3_valid = 1'h0; + end + if (reset) begin + x_d_i0load = 1'h0; + end + if (reset) begin + x_d_i0rd = 5'h0; + end + if (reset) begin + _T_701 = 3'h0; + end + if (reset) begin + nonblock_load_valid_m_delay = 1'h0; + end + if (reset) begin + r_d_i0load = 1'h0; + end + if (reset) begin + r_d_i0v = 1'h0; + end + if (reset) begin + r_d_i0rd = 5'h0; + end + if (reset) begin + cam_raw_0_rd = 5'h0; + end + if (reset) begin + cam_raw_0_wb = 1'h0; + end + if (reset) begin + cam_raw_1_rd = 5'h0; + end + if (reset) begin + cam_raw_1_wb = 1'h0; + end + if (reset) begin + cam_raw_2_rd = 5'h0; + end + if (reset) begin + cam_raw_2_wb = 1'h0; + end + if (reset) begin + cam_raw_3_rd = 5'h0; + end + if (reset) begin + cam_raw_3_wb = 1'h0; + end + if (reset) begin + lsu_idle = 1'h0; + end + if (reset) begin + _T_339 = 1'h0; + end + if (reset) begin + x_d_i0v = 1'h0; + end + if (reset) begin + r_d_csrwen = 1'h0; + end + if (reset) begin + r_d_i0valid = 1'h0; + end + if (reset) begin + r_d_csrwaddr = 12'h0; + end + if (reset) begin + csr_read_x = 1'h0; + end + if (reset) begin + csr_clr_x = 1'h0; + end + if (reset) begin + csr_set_x = 1'h0; + end + if (reset) begin + csr_write_x = 1'h0; + end + if (reset) begin + csr_imm_x = 1'h0; + end + if (reset) begin + csrimm_x = 5'h0; + end + if (reset) begin + csr_rddata_x = 32'h0; + end + if (reset) begin + r_d_csrwonly = 1'h0; + end + if (reset) begin + i0_result_r_raw = 32'h0; + end + if (reset) begin + x_d_csrwonly = 1'h0; + end + if (reset) begin + wbd_csrwonly = 1'h0; + end + if (reset) begin + _T_465 = 32'h0; + end + if (reset) begin + x_t_legal = 1'h0; + end + if (reset) begin + x_t_icaf = 1'h0; + end + if (reset) begin + x_t_icaf_f1 = 1'h0; + end + if (reset) begin + x_t_icaf_type = 2'h0; + end + if (reset) begin + x_t_fence_i = 1'h0; + end + if (reset) begin + x_t_i0trigger = 4'h0; + end + if (reset) begin + x_t_pmu_i0_itype = 4'h0; + end + if (reset) begin + x_t_pmu_i0_br_unpred = 1'h0; + end + if (reset) begin + r_t_legal = 1'h0; + end + if (reset) begin + r_t_icaf = 1'h0; + end + if (reset) begin + r_t_icaf_f1 = 1'h0; + end + if (reset) begin + r_t_icaf_type = 2'h0; + end + if (reset) begin + r_t_fence_i = 1'h0; + end + if (reset) begin + r_t_i0trigger = 4'h0; + end + if (reset) begin + r_t_pmu_i0_itype = 4'h0; + end + if (reset) begin + r_t_pmu_i0_br_unpred = 1'h0; + end + if (reset) begin + lsu_trigger_match_r = 4'h0; + end + if (reset) begin + lsu_pmu_misaligned_r = 1'h0; + end + if (reset) begin + r_d_i0store = 1'h0; + end + if (reset) begin + r_d_i0div = 1'h0; + end + if (reset) begin + x_d_i0store = 1'h0; + end + if (reset) begin + x_d_i0div = 1'h0; + end + if (reset) begin + x_d_csrwen = 1'h0; + end + if (reset) begin + x_d_csrwaddr = 12'h0; + end + if (reset) begin + last_br_immed_x = 12'h0; + end + if (reset) begin + _T_821 = 1'h0; + end + if (reset) begin + _T_830 = 5'h0; + end + if (reset) begin + i0_inst_x = 32'h0; + end + if (reset) begin + i0_inst_r = 32'h0; + end + if (reset) begin + i0_inst_wb = 32'h0; + end + if (reset) begin + _T_837 = 32'h0; + end + if (reset) begin + i0_pc_wb = 31'h0; + end + if (reset) begin + _T_840 = 31'h0; + end + if (reset) begin + dec_i0_pc_r = 31'h0; + end + `endif // RANDOMIZE +end // initial +`ifdef FIRRTL_AFTER_INITIAL +`FIRRTL_AFTER_INITIAL +`endif +`endif // SYNTHESIS + always @(posedge io_active_clk) begin + if (i0_x_ctl_en) begin + i0_x_c_load <= i0_d_c_load; + end + if (i0_r_ctl_en) begin + i0_r_c_load <= i0_x_c_load; + end + if (i0_x_ctl_en) begin + i0_x_c_mul <= i0_d_c_mul; + end + if (i0_x_ctl_en) begin + i0_x_c_alu <= i0_d_c_alu; + end + if (i0_r_ctl_en) begin + i0_r_c_mul <= i0_x_c_mul; + end + if (i0_r_ctl_en) begin + i0_r_c_alu <= i0_x_c_alu; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + tlu_wr_pause_r1 <= 1'h0; + end else begin + tlu_wr_pause_r1 <= io_dec_tlu_wr_pause_r; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + tlu_wr_pause_r2 <= 1'h0; + end else begin + tlu_wr_pause_r2 <= tlu_wr_pause_r1; + end + end + always @(posedge data_gated_cgc_io_l1clk or posedge reset) begin + if (reset) begin + leak1_i1_stall <= 1'h0; + end else begin + leak1_i1_stall <= io_dec_tlu_flush_leak_one_r | _T_280; + end + end + always @(posedge data_gated_cgc_io_l1clk or posedge reset) begin + if (reset) begin + leak1_i0_stall <= 1'h0; + end else begin + leak1_i0_stall <= _T_283 | _T_285; + end + end + always @(posedge data_gated_cgc_io_l1clk or posedge reset) begin + if (reset) begin + pause_stall <= 1'h0; + end else begin + pause_stall <= _T_412 & _T_413; + end + end + always @(posedge rvclkhdr_2_io_l1clk or posedge reset) begin + if (reset) begin + write_csr_data <= 32'h0; + end else if (pause_stall) begin + write_csr_data <= _T_423; + end else if (io_dec_tlu_wr_pause_r) begin + write_csr_data <= io_dec_csr_wrdata_r; + end else begin + write_csr_data <= write_csr_data_x; + end + end + always @(posedge data_gated_cgc_io_l1clk or posedge reset) begin + if (reset) begin + postsync_stall <= 1'h0; + end else begin + postsync_stall <= _T_506 | _T_507; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + x_d_i0valid <= 1'h0; + end else begin + x_d_i0valid <= io_dec_i0_decode_d; + end + end + always @(posedge data_gated_cgc_io_l1clk or posedge reset) begin + if (reset) begin + flush_final_r <= 1'h0; + end else begin + flush_final_r <= io_exu_flush_final; + end + end + always @(posedge data_gated_cgc_io_l1clk or posedge reset) begin + if (reset) begin + illegal_lockout <= 1'h0; + end else begin + illegal_lockout <= _T_466 & _T_467; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_0_tag <= 3'h0; + end else if (cam_wen[0]) begin + cam_raw_0_tag <= io_lsu_nonblock_load_tag_m; + end else if (_T_106) begin + cam_raw_0_tag <= 3'h0; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_0_valid <= 1'h0; + end else if (io_dec_tlu_force_halt) begin + cam_raw_0_valid <= 1'h0; + end else begin + cam_raw_0_valid <= _GEN_56; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_1_tag <= 3'h0; + end else if (cam_wen[1]) begin + cam_raw_1_tag <= io_lsu_nonblock_load_tag_m; + end else if (_T_132) begin + cam_raw_1_tag <= 3'h0; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_1_valid <= 1'h0; + end else if (io_dec_tlu_force_halt) begin + cam_raw_1_valid <= 1'h0; + end else begin + cam_raw_1_valid <= _GEN_67; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_2_tag <= 3'h0; + end else if (cam_wen[2]) begin + cam_raw_2_tag <= io_lsu_nonblock_load_tag_m; + end else if (_T_158) begin + cam_raw_2_tag <= 3'h0; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_2_valid <= 1'h0; + end else if (io_dec_tlu_force_halt) begin + cam_raw_2_valid <= 1'h0; + end else begin + cam_raw_2_valid <= _GEN_78; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_3_tag <= 3'h0; + end else if (cam_wen[3]) begin + cam_raw_3_tag <= io_lsu_nonblock_load_tag_m; + end else if (_T_184) begin + cam_raw_3_tag <= 3'h0; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_3_valid <= 1'h0; + end else if (io_dec_tlu_force_halt) begin + cam_raw_3_valid <= 1'h0; + end else begin + cam_raw_3_valid <= _GEN_89; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + x_d_i0load <= 1'h0; + end else begin + x_d_i0load <= i0_dp_load & i0_legal_decode_d; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + x_d_i0rd <= 5'h0; + end else begin + x_d_i0rd <= io_dec_i0_instr_d[11:7]; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + _T_701 <= 3'h0; + end else begin + _T_701 <= i0_pipe_en[3:1]; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + nonblock_load_valid_m_delay <= 1'h0; + end else if (i0_r_ctl_en) begin + nonblock_load_valid_m_delay <= io_lsu_nonblock_load_valid_m; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + r_d_i0load <= 1'h0; + end else begin + r_d_i0load <= x_d_i0load; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + r_d_i0v <= 1'h0; + end else begin + r_d_i0v <= _T_733 & _T_279; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + r_d_i0rd <= 5'h0; + end else begin + r_d_i0rd <= x_d_i0rd; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_0_rd <= 5'h0; + end else if (cam_wen[0]) begin + if (x_d_i0load) begin + cam_raw_0_rd <= x_d_i0rd; + end else begin + cam_raw_0_rd <= 5'h0; + end + end else if (_T_106) begin + cam_raw_0_rd <= 5'h0; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_0_wb <= 1'h0; + end else begin + cam_raw_0_wb <= _T_111 | _GEN_57; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_1_rd <= 5'h0; + end else if (cam_wen[1]) begin + if (x_d_i0load) begin + cam_raw_1_rd <= x_d_i0rd; + end else begin + cam_raw_1_rd <= 5'h0; + end + end else if (_T_132) begin + cam_raw_1_rd <= 5'h0; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_1_wb <= 1'h0; + end else begin + cam_raw_1_wb <= _T_137 | _GEN_68; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_2_rd <= 5'h0; + end else if (cam_wen[2]) begin + if (x_d_i0load) begin + cam_raw_2_rd <= x_d_i0rd; + end else begin + cam_raw_2_rd <= 5'h0; + end + end else if (_T_158) begin + cam_raw_2_rd <= 5'h0; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_2_wb <= 1'h0; + end else begin + cam_raw_2_wb <= _T_163 | _GEN_79; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_3_rd <= 5'h0; + end else if (cam_wen[3]) begin + if (x_d_i0load) begin + cam_raw_3_rd <= x_d_i0rd; + end else begin + cam_raw_3_rd <= 5'h0; + end + end else if (_T_184) begin + cam_raw_3_rd <= 5'h0; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + cam_raw_3_wb <= 1'h0; + end else begin + cam_raw_3_wb <= _T_189 | _GEN_90; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + lsu_idle <= 1'h0; + end else begin + lsu_idle <= io_lsu_idle_any; + end + end + always @(posedge data_gated_cgc_io_l1clk or posedge reset) begin + if (reset) begin + _T_339 <= 1'h0; + end else begin + _T_339 <= io_dec_tlu_flush_extint; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + x_d_i0v <= 1'h0; + end else begin + x_d_i0v <= i0_rd_en_d & i0_legal_decode_d; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + r_d_csrwen <= 1'h0; + end else begin + r_d_csrwen <= x_d_csrwen; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + r_d_i0valid <= 1'h0; + end else begin + r_d_i0valid <= _T_737 & _T_279; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + r_d_csrwaddr <= 12'h0; + end else begin + r_d_csrwaddr <= x_d_csrwaddr; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + csr_read_x <= 1'h0; + end else begin + csr_read_x <= i0_dp_csr_read & i0_legal_decode_d; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + csr_clr_x <= 1'h0; + end else begin + csr_clr_x <= i0_dp_csr_clr & i0_legal_decode_d; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + csr_set_x <= 1'h0; + end else begin + csr_set_x <= i0_dp_csr_set & i0_legal_decode_d; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + csr_write_x <= 1'h0; + end else begin + csr_write_x <= i0_csr_write & i0_legal_decode_d; + end + end + always @(posedge io_active_clk or posedge reset) begin + if (reset) begin + csr_imm_x <= 1'h0; + end else if (_T_40) begin + csr_imm_x <= 1'h0; + end else begin + csr_imm_x <= i0_dp_raw_csr_imm; + end + end + always @(posedge rvclkhdr_io_l1clk or posedge reset) begin + if (reset) begin + csrimm_x <= 5'h0; + end else begin + csrimm_x <= io_dec_i0_instr_d[19:15]; + end + end + always @(posedge rvclkhdr_1_io_l1clk or posedge reset) begin + if (reset) begin + csr_rddata_x <= 32'h0; + end else begin + csr_rddata_x <= io_dec_csr_rddata_d; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + r_d_csrwonly <= 1'h0; + end else begin + r_d_csrwonly <= x_d_csrwonly; + end + end + always @(posedge rvclkhdr_9_io_l1clk or posedge reset) begin + if (reset) begin + i0_result_r_raw <= 32'h0; + end else if (_T_761) begin + i0_result_r_raw <= io_lsu_result_m; + end else begin + i0_result_r_raw <= io_exu_i0_result_x; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + x_d_csrwonly <= 1'h0; + end else begin + x_d_csrwonly <= i0_csr_write_only_d & io_dec_i0_decode_d; + end + end + always @(posedge rvclkhdr_8_io_l1clk or posedge reset) begin + if (reset) begin + wbd_csrwonly <= 1'h0; + end else begin + wbd_csrwonly <= r_d_csrwonly; + end + end + always @(posedge rvclkhdr_3_io_l1clk or posedge reset) begin + if (reset) begin + _T_465 <= 32'h0; + end else if (io_dec_i0_pc4_d) begin + _T_465 <= io_dec_i0_instr_d; + end else begin + _T_465 <= _T_462; + end + end + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + x_t_legal <= 1'h0; + end else begin + x_t_legal <= io_dec_i0_decode_d & i0_legal; + end + end + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + x_t_icaf <= 1'h0; + end else begin + x_t_icaf <= i0_icaf_d & i0_legal_decode_d; + end + end + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + x_t_icaf_f1 <= 1'h0; + end else begin + x_t_icaf_f1 <= io_dec_i0_icaf_f1_d & i0_legal_decode_d; + end + end + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + x_t_icaf_type <= 2'h0; + end else begin + x_t_icaf_type <= io_dec_i0_icaf_type_d; + end + end + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + x_t_fence_i <= 1'h0; + end else begin + x_t_fence_i <= _T_517 & i0_legal_decode_d; + end + end + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + x_t_i0trigger <= 4'h0; + end else begin + x_t_i0trigger <= io_dec_i0_trigger_match_d & _T_522; + end + end + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + x_t_pmu_i0_itype <= 4'h0; + end else begin + x_t_pmu_i0_itype <= _T_254 & _T_276; + end + end + always @(posedge rvclkhdr_4_io_l1clk or posedge reset) begin + if (reset) begin + x_t_pmu_i0_br_unpred <= 1'h0; + end else begin + x_t_pmu_i0_br_unpred <= i0_dp_jal & _T_252; + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + r_t_legal <= 1'h0; + end else begin + r_t_legal <= x_t_legal; + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + r_t_icaf <= 1'h0; + end else begin + r_t_icaf <= x_t_icaf; + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + r_t_icaf_f1 <= 1'h0; + end else begin + r_t_icaf_f1 <= x_t_icaf_f1; + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + r_t_icaf_type <= 2'h0; + end else begin + r_t_icaf_type <= x_t_icaf_type; + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + r_t_fence_i <= 1'h0; + end else begin + r_t_fence_i <= x_t_fence_i; + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + r_t_i0trigger <= 4'h0; + end else begin + r_t_i0trigger <= x_t_i0trigger & _T_531; + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + r_t_pmu_i0_itype <= 4'h0; + end else begin + r_t_pmu_i0_itype <= x_t_pmu_i0_itype; + end + end + always @(posedge rvclkhdr_5_io_l1clk or posedge reset) begin + if (reset) begin + r_t_pmu_i0_br_unpred <= 1'h0; + end else begin + r_t_pmu_i0_br_unpred <= x_t_pmu_i0_br_unpred; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + lsu_trigger_match_r <= 4'h0; + end else begin + lsu_trigger_match_r <= io_lsu_trigger_match_m; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + lsu_pmu_misaligned_r <= 1'h0; + end else begin + lsu_pmu_misaligned_r <= io_lsu_pmu_misaligned_m; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + r_d_i0store <= 1'h0; + end else begin + r_d_i0store <= x_d_i0store; + end + end + always @(posedge rvclkhdr_7_io_l1clk or posedge reset) begin + if (reset) begin + r_d_i0div <= 1'h0; + end else begin + r_d_i0div <= x_d_i0div; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + x_d_i0store <= 1'h0; + end else begin + x_d_i0store <= i0_dp_store & i0_legal_decode_d; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + x_d_i0div <= 1'h0; + end else begin + x_d_i0div <= i0_dp_div & i0_legal_decode_d; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + x_d_csrwen <= 1'h0; + end else begin + x_d_csrwen <= io_dec_csr_wen_unq_d & i0_legal_decode_d; + end + end + always @(posedge rvclkhdr_6_io_l1clk or posedge reset) begin + if (reset) begin + x_d_csrwaddr <= 12'h0; + end else begin + x_d_csrwaddr <= io_dec_i0_instr_d[31:20]; + end + end + always @(posedge rvclkhdr_10_io_l1clk or posedge reset) begin + if (reset) begin + last_br_immed_x <= 12'h0; + end else if (io_i0_ap_predict_nt) begin + last_br_immed_x <= _T_781; + end else if (_T_314) begin + last_br_immed_x <= i0_pcall_imm[12:1]; + end else begin + last_br_immed_x <= _T_323; + end + end + always @(posedge io_free_clk or posedge reset) begin + if (reset) begin + _T_821 <= 1'h0; + end else begin + _T_821 <= i0_div_decode_d | _T_820; + end + end + always @(posedge clock or posedge reset) begin + if (reset) begin + _T_830 <= 5'h0; + end else if (i0_div_decode_d) begin + _T_830 <= i0r_rd; + end + end + always @(posedge rvclkhdr_12_io_l1clk or posedge reset) begin + if (reset) begin + i0_inst_x <= 32'h0; + end else if (io_dec_i0_pc4_d) begin + i0_inst_x <= io_dec_i0_instr_d; + end else begin + i0_inst_x <= _T_462; + end + end + always @(posedge rvclkhdr_13_io_l1clk or posedge reset) begin + if (reset) begin + i0_inst_r <= 32'h0; + end else begin + i0_inst_r <= i0_inst_x; + end + end + always @(posedge rvclkhdr_14_io_l1clk or posedge reset) begin + if (reset) begin + i0_inst_wb <= 32'h0; + end else begin + i0_inst_wb <= i0_inst_r; + end + end + always @(posedge rvclkhdr_15_io_l1clk or posedge reset) begin + if (reset) begin + _T_837 <= 32'h0; + end else begin + _T_837 <= i0_inst_wb; + end + end + always @(posedge rvclkhdr_16_io_l1clk or posedge reset) begin + if (reset) begin + i0_pc_wb <= 31'h0; + end else begin + i0_pc_wb <= io_dec_tlu_i0_pc_r; + end + end + always @(posedge rvclkhdr_17_io_l1clk or posedge reset) begin + if (reset) begin + _T_840 <= 31'h0; + end else begin + _T_840 <= i0_pc_wb; + end + end + always @(posedge rvclkhdr_18_io_l1clk or posedge reset) begin + if (reset) begin + dec_i0_pc_r <= 31'h0; + end else begin + dec_i0_pc_r <= io_exu_i0_pc_x; + end + end +endmodule + diff --git a/el2_ifu_mem_ctl.anno.json b/el2_ifu_mem_ctl.anno.json index ff1d29fd..bf2607a2 100644 --- a/el2_ifu_mem_ctl.anno.json +++ b/el2_ifu_mem_ctl.anno.json @@ -7,6 +7,108 @@ "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" ] }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_single_err", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_wren", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_write", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_access_fault_type_f", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_double_err", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_dma_active", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_flush_err_wb", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_i0_commit_cmt", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_fetch_val", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_data" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_test", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_double_err", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rw_addr", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_addr", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_fetch_addr_bf", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_access_fault_f", @@ -16,18 +118,90 @@ }, { "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_error_start", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_wr_data", "sources":[ - "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_eccerr", - "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit", - "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final" + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_wdata", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" ] }, { "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_dma_active", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_wr_size", "sources":[ - "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_flush_err_wb" + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_sz", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_ecc_error", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_error_start", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_eccerr", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_tag_perr", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rid", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rvalid", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bus_clk_en" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rden", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_iccm_access_bf", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_fetch_req_bf", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_write", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit" + ] + }, + { + "class":"firrtl.transforms.CombinationalPath", + "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_debug_wr_data", + "sources":[ + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_ic_diag_pkt_icache_wrdata" ] }, { @@ -37,22 +211,17 @@ "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_single_err", "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_error_start", "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_eccerr", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_tag_perr", "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit", - "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final" - ] - }, - { - "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_access_fault_type_f", - "sources":[ - "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_double_err" - ] - }, - { - "class":"firrtl.transforms.CombinationalPath", - "sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_debug_wr_data", - "sources":[ - "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_ic_diag_pkt_icache_wrdata" + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rid", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rvalid", + "~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bus_clk_en" ] }, { diff --git a/el2_ifu_mem_ctl.fir b/el2_ifu_mem_ctl.fir index dffe6be7..ec011ff2 100644 --- a/el2_ifu_mem_ctl.fir +++ b/el2_ifu_mem_ctl.fir @@ -51,7 +51,7 @@ circuit el2_ifu_mem_ctl : module el2_ifu_mem_ctl : input clock : Clock input reset : UInt<1> - output io : {flip free_clk : Clock, flip active_clk : Clock, flip exu_flush_final : UInt<1>, flip dec_tlu_flush_lower_wb : UInt<1>, flip dec_tlu_flush_err_wb : UInt<1>, flip dec_tlu_i0_commit_cmt : UInt<1>, flip dec_tlu_force_halt : UInt<1>, flip ifc_fetch_addr_bf : UInt<31>, flip ifc_fetch_uncacheable_bf : UInt<1>, flip ifc_fetch_req_bf : UInt<1>, flip ifc_fetch_req_bf_raw : UInt<1>, flip ifc_iccm_access_bf : UInt<1>, flip ifc_region_acc_fault_bf : UInt<1>, flip ifc_dma_access_ok : UInt<1>, flip dec_tlu_fence_i_wb : UInt<1>, flip ifu_bp_hit_taken_f : UInt<1>, flip ifu_bp_inst_mask_f : UInt<1>, ifu_miss_state_idle : UInt<1>, ifu_ic_mb_empty : UInt<1>, ic_dma_active : UInt<1>, ic_write_stall : UInt<1>, ifu_pmu_ic_miss : UInt<1>, ifu_pmu_ic_hit : UInt<1>, ifu_pmu_bus_error : UInt<1>, ifu_pmu_bus_busy : UInt<1>, ifu_pmu_bus_trxn : UInt<1>, ifu_axi_awvalid : UInt<1>, ifu_axi_awid : UInt<3>, ifu_axi_awaddr : UInt<32>, ifu_axi_awregion : UInt<4>, ifu_axi_awlen : UInt<8>, ifu_axi_awsize : UInt<3>, ifu_axi_awburst : UInt<2>, ifu_axi_awlock : UInt<1>, ifu_axi_awcache : UInt<4>, ifu_axi_awprot : UInt<3>, ifu_axi_awqos : UInt<4>, ifu_axi_wvalid : UInt<1>, ifu_axi_wdata : UInt<64>, ifu_axi_wstrb : UInt<8>, ifu_axi_wlast : UInt<1>, ifu_axi_bready : UInt<1>, ifu_axi_arvalid : UInt<1>, flip ifu_axi_arready : UInt<1>, ifu_axi_arid : UInt<3>, ifu_axi_araddr : UInt<32>, ifu_axi_arregion : UInt<4>, ifu_axi_arlen : UInt<8>, ifu_axi_arsize : UInt<3>, ifu_axi_arburst : UInt<2>, ifu_axi_arlock : UInt<1>, ifu_axi_arcache : UInt<4>, ifu_axi_arprot : UInt<3>, ifu_axi_arqos : UInt<4>, flip ifu_axi_rvalid : UInt<1>, ifu_axi_rready : UInt<1>, flip ifu_axi_rid : UInt<3>, flip ifu_axi_rdata : UInt<64>, flip ifu_axi_rresp : UInt<2>, flip ifu_bus_clk_en : UInt<1>, flip dma_iccm_req : UInt<1>, flip dma_mem_addr : UInt<32>, flip dma_mem_sz : UInt<3>, flip dma_mem_write : UInt<1>, flip dma_mem_wdata : UInt<64>, flip dma_mem_tag : UInt<3>, iccm_dma_ecc_error : UInt<1>, iccm_dma_rvalid : UInt<1>, iccm_dma_rdata : UInt<64>, iccm_dma_rtag : UInt<3>, iccm_ready : UInt<1>, ic_rw_addr : UInt<31>, ic_wr_en : UInt<2>, ic_rd_en : UInt<1>, ic_wr_data : UInt<71>[2], flip ic_rd_data : UInt<64>, flip ic_debug_rd_data : UInt<71>, flip ictag_debug_rd_data : UInt<26>, ic_debug_wr_data : UInt<71>, ifu_ic_debug_rd_data : UInt<71>, flip ic_eccerr : UInt<2>, flip ic_parerr : UInt<2>, ic_debug_addr : UInt<10>, ic_debug_rd_en : UInt<1>, ic_debug_wr_en : UInt<1>, ic_debug_tag_array : UInt<1>, ic_debug_way : UInt<2>, ic_tag_valid : UInt<2>, flip ic_rd_hit : UInt<2>, flip ic_tag_perr : UInt<1>, iccm_rw_addr : UInt<15>, iccm_wren : UInt<1>, iccm_rden : UInt<1>, iccm_wr_data : UInt<78>, iccm_wr_size : UInt<3>, flip iccm_rd_data : UInt<64>, flip iccm_rd_data_ecc : UInt<78>, flip ifu_fetch_val : UInt<2>, ic_hit_f : UInt<1>, ic_access_fault_f : UInt<1>, ic_access_fault_type_f : UInt<2>, iccm_rd_ecc_single_err : UInt<1>, iccm_rd_ecc_double_err : UInt<1>, ic_error_start : UInt<1>, ifu_async_error_start : UInt<1>, iccm_dma_sb_error : UInt<1>, ic_fetch_val_f : UInt<2>, ic_data_f : UInt<32>, ic_premux_data : UInt<64>, ic_sel_premux_data : UInt<1>, flip dec_tlu_ic_diag_pkt : {icache_wrdata : UInt<71>, icache_dicawics : UInt<17>, icache_rd_valid : UInt<1>, icache_wr_valid : UInt<1>}, flip dec_tlu_core_ecc_disable : UInt<1>, ifu_ic_debug_rd_data_valid : UInt<1>, iccm_buf_correct_ecc : UInt<1>, iccm_correction_state : UInt<1>, flip scan_mode : UInt<1>} + output io : {flip free_clk : Clock, flip active_clk : Clock, flip exu_flush_final : UInt<1>, flip dec_tlu_flush_lower_wb : UInt<1>, flip dec_tlu_flush_err_wb : UInt<1>, flip dec_tlu_i0_commit_cmt : UInt<1>, flip dec_tlu_force_halt : UInt<1>, flip ifc_fetch_addr_bf : UInt<31>, flip ifc_fetch_uncacheable_bf : UInt<1>, flip ifc_fetch_req_bf : UInt<1>, flip ifc_fetch_req_bf_raw : UInt<1>, flip ifc_iccm_access_bf : UInt<1>, flip ifc_region_acc_fault_bf : UInt<1>, flip ifc_dma_access_ok : UInt<1>, flip dec_tlu_fence_i_wb : UInt<1>, flip ifu_bp_hit_taken_f : UInt<1>, flip ifu_bp_inst_mask_f : UInt<1>, ifu_miss_state_idle : UInt<1>, ifu_ic_mb_empty : UInt<1>, ic_dma_active : UInt<1>, ic_write_stall : UInt<1>, ifu_pmu_ic_miss : UInt<1>, ifu_pmu_ic_hit : UInt<1>, ifu_pmu_bus_error : UInt<1>, ifu_pmu_bus_busy : UInt<1>, ifu_pmu_bus_trxn : UInt<1>, ifu_axi_awvalid : UInt<1>, ifu_axi_awid : UInt<3>, ifu_axi_awaddr : UInt<32>, ifu_axi_awregion : UInt<4>, ifu_axi_awlen : UInt<8>, ifu_axi_awsize : UInt<3>, ifu_axi_awburst : UInt<2>, ifu_axi_awlock : UInt<1>, ifu_axi_awcache : UInt<4>, ifu_axi_awprot : UInt<3>, ifu_axi_awqos : UInt<4>, ifu_axi_wvalid : UInt<1>, ifu_axi_wdata : UInt<64>, ifu_axi_wstrb : UInt<8>, ifu_axi_wlast : UInt<1>, ifu_axi_bready : UInt<1>, ifu_axi_arvalid : UInt<1>, flip ifu_axi_arready : UInt<1>, ifu_axi_arid : UInt<3>, ifu_axi_araddr : UInt<32>, ifu_axi_arregion : UInt<4>, ifu_axi_arlen : UInt<8>, ifu_axi_arsize : UInt<3>, ifu_axi_arburst : UInt<2>, ifu_axi_arlock : UInt<1>, ifu_axi_arcache : UInt<4>, ifu_axi_arprot : UInt<3>, ifu_axi_arqos : UInt<4>, flip ifu_axi_rvalid : UInt<1>, ifu_axi_rready : UInt<1>, flip ifu_axi_rid : UInt<3>, flip ifu_axi_rdata : UInt<64>, flip ifu_axi_rresp : UInt<2>, flip ifu_bus_clk_en : UInt<1>, flip dma_iccm_req : UInt<1>, flip dma_mem_addr : UInt<32>, flip dma_mem_sz : UInt<3>, flip dma_mem_write : UInt<1>, flip dma_mem_wdata : UInt<64>, flip dma_mem_tag : UInt<3>, iccm_dma_ecc_error : UInt<1>, iccm_dma_rvalid : UInt<1>, iccm_dma_rdata : UInt<64>, iccm_dma_rtag : UInt<3>, iccm_ready : UInt<1>, ic_rw_addr : UInt<31>, ic_wr_en : UInt<2>, ic_rd_en : UInt<1>, ic_wr_data : UInt<71>[2], flip ic_rd_data : UInt<64>, flip ic_debug_rd_data : UInt<71>, flip ictag_debug_rd_data : UInt<26>, ic_debug_wr_data : UInt<71>, ifu_ic_debug_rd_data : UInt<71>, flip ic_eccerr : UInt<2>, flip ic_parerr : UInt<2>, ic_debug_addr : UInt<10>, ic_debug_rd_en : UInt<1>, ic_debug_wr_en : UInt<1>, ic_debug_tag_array : UInt<1>, ic_debug_way : UInt<2>, ic_tag_valid : UInt<2>, flip ic_rd_hit : UInt<2>, flip ic_tag_perr : UInt<1>, iccm_rw_addr : UInt<15>, iccm_wren : UInt<1>, iccm_rden : UInt<1>, iccm_wr_data : UInt<78>, iccm_wr_size : UInt<3>, flip iccm_rd_data : UInt<64>, flip iccm_rd_data_ecc : UInt<78>, flip ifu_fetch_val : UInt<2>, ic_hit_f : UInt<1>, ic_access_fault_f : UInt<1>, ic_access_fault_type_f : UInt<2>, iccm_rd_ecc_single_err : UInt<1>, iccm_rd_ecc_double_err : UInt<1>, ic_error_start : UInt<1>, ifu_async_error_start : UInt<1>, iccm_dma_sb_error : UInt<1>, ic_fetch_val_f : UInt<2>, ic_data_f : UInt<32>, ic_premux_data : UInt<64>, ic_sel_premux_data : UInt<1>, flip dec_tlu_ic_diag_pkt : {icache_wrdata : UInt<71>, icache_dicawics : UInt<17>, icache_rd_valid : UInt<1>, icache_wr_valid : UInt<1>}, flip dec_tlu_core_ecc_disable : UInt<1>, ifu_ic_debug_rd_data_valid : UInt<1>, iccm_buf_correct_ecc : UInt<1>, iccm_correction_state : UInt<1>, test : UInt, flip scan_mode : UInt<1>} io.ic_debug_rd_en <= UInt<1>("h00") @[el2_ifu_mem_ctl.scala 128:20] io.ic_debug_wr_en <= UInt<1>("h00") @[el2_ifu_mem_ctl.scala 129:20] @@ -695,1392 +695,4865 @@ circuit el2_ifu_mem_ctl : node _T_331 = or(_T_329, _T_330) @[Mux.scala 27:72] wire ic_rw_addr : UInt<31> @[Mux.scala 27:72] ic_rw_addr <= _T_331 @[Mux.scala 27:72] - reg _T_332 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 382:51] - _T_332 <= sel_mb_addr @[el2_ifu_mem_ctl.scala 382:51] - sel_mb_addr_ff <= _T_332 @[el2_ifu_mem_ctl.scala 382:18] + wire bus_ifu_wr_en_ff_q : UInt<1> + bus_ifu_wr_en_ff_q <= UInt<1>("h00") + node _T_332 = and(miss_pending, write_ic_16_bytes) @[el2_ifu_mem_ctl.scala 382:41] + node _T_333 = eq(uncacheable_miss_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 382:63] + node _T_334 = and(_T_332, _T_333) @[el2_ifu_mem_ctl.scala 382:61] + node _T_335 = and(_T_334, last_beat) @[el2_ifu_mem_ctl.scala 382:84] + node sel_mb_status_addr = and(_T_335, bus_ifu_wr_en_ff_q) @[el2_ifu_mem_ctl.scala 382:96] + node _T_336 = bits(imb_ff, 30, 5) @[el2_ifu_mem_ctl.scala 383:62] + node _T_337 = bits(imb_ff, 1, 0) @[el2_ifu_mem_ctl.scala 383:116] + node _T_338 = cat(_T_336, ic_wr_addr_bits_hi_3) @[Cat.scala 29:58] + node _T_339 = cat(_T_338, _T_337) @[Cat.scala 29:58] + node ifu_status_wr_addr = mux(sel_mb_status_addr, _T_339, ifu_fetch_addr_int_f) @[el2_ifu_mem_ctl.scala 383:31] + reg _T_340 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 385:51] + _T_340 <= sel_mb_addr @[el2_ifu_mem_ctl.scala 385:51] + sel_mb_addr_ff <= _T_340 @[el2_ifu_mem_ctl.scala 385:18] wire ifu_bus_rdata_ff : UInt<64> ifu_bus_rdata_ff <= UInt<1>("h00") wire ic_miss_buff_half : UInt<64> ic_miss_buff_half <= UInt<1>("h00") - wire _T_333 : UInt<1>[35] @[el2_lib.scala 322:18] - wire _T_334 : UInt<1>[35] @[el2_lib.scala 323:18] - wire _T_335 : UInt<1>[35] @[el2_lib.scala 324:18] - wire _T_336 : UInt<1>[31] @[el2_lib.scala 325:18] - wire _T_337 : UInt<1>[31] @[el2_lib.scala 326:18] - wire _T_338 : UInt<1>[31] @[el2_lib.scala 327:18] - wire _T_339 : UInt<1>[7] @[el2_lib.scala 328:18] - node _T_340 = bits(ifu_bus_rdata_ff, 0, 0) @[el2_lib.scala 335:36] - _T_333[0] <= _T_340 @[el2_lib.scala 335:30] - node _T_341 = bits(ifu_bus_rdata_ff, 0, 0) @[el2_lib.scala 336:36] - _T_334[0] <= _T_341 @[el2_lib.scala 336:30] - node _T_342 = bits(ifu_bus_rdata_ff, 1, 1) @[el2_lib.scala 335:36] - _T_333[1] <= _T_342 @[el2_lib.scala 335:30] - node _T_343 = bits(ifu_bus_rdata_ff, 1, 1) @[el2_lib.scala 337:36] - _T_335[0] <= _T_343 @[el2_lib.scala 337:30] - node _T_344 = bits(ifu_bus_rdata_ff, 2, 2) @[el2_lib.scala 336:36] - _T_334[1] <= _T_344 @[el2_lib.scala 336:30] - node _T_345 = bits(ifu_bus_rdata_ff, 2, 2) @[el2_lib.scala 337:36] - _T_335[1] <= _T_345 @[el2_lib.scala 337:30] - node _T_346 = bits(ifu_bus_rdata_ff, 3, 3) @[el2_lib.scala 335:36] - _T_333[2] <= _T_346 @[el2_lib.scala 335:30] - node _T_347 = bits(ifu_bus_rdata_ff, 3, 3) @[el2_lib.scala 336:36] - _T_334[2] <= _T_347 @[el2_lib.scala 336:30] - node _T_348 = bits(ifu_bus_rdata_ff, 3, 3) @[el2_lib.scala 337:36] - _T_335[2] <= _T_348 @[el2_lib.scala 337:30] - node _T_349 = bits(ifu_bus_rdata_ff, 4, 4) @[el2_lib.scala 335:36] - _T_333[3] <= _T_349 @[el2_lib.scala 335:30] - node _T_350 = bits(ifu_bus_rdata_ff, 4, 4) @[el2_lib.scala 338:36] - _T_336[0] <= _T_350 @[el2_lib.scala 338:30] - node _T_351 = bits(ifu_bus_rdata_ff, 5, 5) @[el2_lib.scala 336:36] - _T_334[3] <= _T_351 @[el2_lib.scala 336:30] - node _T_352 = bits(ifu_bus_rdata_ff, 5, 5) @[el2_lib.scala 338:36] - _T_336[1] <= _T_352 @[el2_lib.scala 338:30] - node _T_353 = bits(ifu_bus_rdata_ff, 6, 6) @[el2_lib.scala 335:36] - _T_333[4] <= _T_353 @[el2_lib.scala 335:30] - node _T_354 = bits(ifu_bus_rdata_ff, 6, 6) @[el2_lib.scala 336:36] - _T_334[4] <= _T_354 @[el2_lib.scala 336:30] - node _T_355 = bits(ifu_bus_rdata_ff, 6, 6) @[el2_lib.scala 338:36] - _T_336[2] <= _T_355 @[el2_lib.scala 338:30] - node _T_356 = bits(ifu_bus_rdata_ff, 7, 7) @[el2_lib.scala 337:36] - _T_335[3] <= _T_356 @[el2_lib.scala 337:30] - node _T_357 = bits(ifu_bus_rdata_ff, 7, 7) @[el2_lib.scala 338:36] - _T_336[3] <= _T_357 @[el2_lib.scala 338:30] - node _T_358 = bits(ifu_bus_rdata_ff, 8, 8) @[el2_lib.scala 335:36] - _T_333[5] <= _T_358 @[el2_lib.scala 335:30] - node _T_359 = bits(ifu_bus_rdata_ff, 8, 8) @[el2_lib.scala 337:36] - _T_335[4] <= _T_359 @[el2_lib.scala 337:30] - node _T_360 = bits(ifu_bus_rdata_ff, 8, 8) @[el2_lib.scala 338:36] - _T_336[4] <= _T_360 @[el2_lib.scala 338:30] - node _T_361 = bits(ifu_bus_rdata_ff, 9, 9) @[el2_lib.scala 336:36] - _T_334[5] <= _T_361 @[el2_lib.scala 336:30] - node _T_362 = bits(ifu_bus_rdata_ff, 9, 9) @[el2_lib.scala 337:36] - _T_335[5] <= _T_362 @[el2_lib.scala 337:30] - node _T_363 = bits(ifu_bus_rdata_ff, 9, 9) @[el2_lib.scala 338:36] - _T_336[5] <= _T_363 @[el2_lib.scala 338:30] - node _T_364 = bits(ifu_bus_rdata_ff, 10, 10) @[el2_lib.scala 335:36] - _T_333[6] <= _T_364 @[el2_lib.scala 335:30] - node _T_365 = bits(ifu_bus_rdata_ff, 10, 10) @[el2_lib.scala 336:36] - _T_334[6] <= _T_365 @[el2_lib.scala 336:30] - node _T_366 = bits(ifu_bus_rdata_ff, 10, 10) @[el2_lib.scala 337:36] - _T_335[6] <= _T_366 @[el2_lib.scala 337:30] - node _T_367 = bits(ifu_bus_rdata_ff, 10, 10) @[el2_lib.scala 338:36] - _T_336[6] <= _T_367 @[el2_lib.scala 338:30] - node _T_368 = bits(ifu_bus_rdata_ff, 11, 11) @[el2_lib.scala 335:36] - _T_333[7] <= _T_368 @[el2_lib.scala 335:30] - node _T_369 = bits(ifu_bus_rdata_ff, 11, 11) @[el2_lib.scala 339:36] - _T_337[0] <= _T_369 @[el2_lib.scala 339:30] - node _T_370 = bits(ifu_bus_rdata_ff, 12, 12) @[el2_lib.scala 336:36] - _T_334[7] <= _T_370 @[el2_lib.scala 336:30] - node _T_371 = bits(ifu_bus_rdata_ff, 12, 12) @[el2_lib.scala 339:36] - _T_337[1] <= _T_371 @[el2_lib.scala 339:30] - node _T_372 = bits(ifu_bus_rdata_ff, 13, 13) @[el2_lib.scala 335:36] - _T_333[8] <= _T_372 @[el2_lib.scala 335:30] - node _T_373 = bits(ifu_bus_rdata_ff, 13, 13) @[el2_lib.scala 336:36] - _T_334[8] <= _T_373 @[el2_lib.scala 336:30] - node _T_374 = bits(ifu_bus_rdata_ff, 13, 13) @[el2_lib.scala 339:36] - _T_337[2] <= _T_374 @[el2_lib.scala 339:30] - node _T_375 = bits(ifu_bus_rdata_ff, 14, 14) @[el2_lib.scala 337:36] - _T_335[7] <= _T_375 @[el2_lib.scala 337:30] - node _T_376 = bits(ifu_bus_rdata_ff, 14, 14) @[el2_lib.scala 339:36] - _T_337[3] <= _T_376 @[el2_lib.scala 339:30] - node _T_377 = bits(ifu_bus_rdata_ff, 15, 15) @[el2_lib.scala 335:36] - _T_333[9] <= _T_377 @[el2_lib.scala 335:30] - node _T_378 = bits(ifu_bus_rdata_ff, 15, 15) @[el2_lib.scala 337:36] - _T_335[8] <= _T_378 @[el2_lib.scala 337:30] - node _T_379 = bits(ifu_bus_rdata_ff, 15, 15) @[el2_lib.scala 339:36] - _T_337[4] <= _T_379 @[el2_lib.scala 339:30] - node _T_380 = bits(ifu_bus_rdata_ff, 16, 16) @[el2_lib.scala 336:36] - _T_334[9] <= _T_380 @[el2_lib.scala 336:30] - node _T_381 = bits(ifu_bus_rdata_ff, 16, 16) @[el2_lib.scala 337:36] - _T_335[9] <= _T_381 @[el2_lib.scala 337:30] - node _T_382 = bits(ifu_bus_rdata_ff, 16, 16) @[el2_lib.scala 339:36] - _T_337[5] <= _T_382 @[el2_lib.scala 339:30] - node _T_383 = bits(ifu_bus_rdata_ff, 17, 17) @[el2_lib.scala 335:36] - _T_333[10] <= _T_383 @[el2_lib.scala 335:30] - node _T_384 = bits(ifu_bus_rdata_ff, 17, 17) @[el2_lib.scala 336:36] - _T_334[10] <= _T_384 @[el2_lib.scala 336:30] - node _T_385 = bits(ifu_bus_rdata_ff, 17, 17) @[el2_lib.scala 337:36] - _T_335[10] <= _T_385 @[el2_lib.scala 337:30] - node _T_386 = bits(ifu_bus_rdata_ff, 17, 17) @[el2_lib.scala 339:36] - _T_337[6] <= _T_386 @[el2_lib.scala 339:30] - node _T_387 = bits(ifu_bus_rdata_ff, 18, 18) @[el2_lib.scala 338:36] - _T_336[7] <= _T_387 @[el2_lib.scala 338:30] - node _T_388 = bits(ifu_bus_rdata_ff, 18, 18) @[el2_lib.scala 339:36] - _T_337[7] <= _T_388 @[el2_lib.scala 339:30] - node _T_389 = bits(ifu_bus_rdata_ff, 19, 19) @[el2_lib.scala 335:36] - _T_333[11] <= _T_389 @[el2_lib.scala 335:30] - node _T_390 = bits(ifu_bus_rdata_ff, 19, 19) @[el2_lib.scala 338:36] - _T_336[8] <= _T_390 @[el2_lib.scala 338:30] - node _T_391 = bits(ifu_bus_rdata_ff, 19, 19) @[el2_lib.scala 339:36] - _T_337[8] <= _T_391 @[el2_lib.scala 339:30] - node _T_392 = bits(ifu_bus_rdata_ff, 20, 20) @[el2_lib.scala 336:36] - _T_334[11] <= _T_392 @[el2_lib.scala 336:30] - node _T_393 = bits(ifu_bus_rdata_ff, 20, 20) @[el2_lib.scala 338:36] - _T_336[9] <= _T_393 @[el2_lib.scala 338:30] - node _T_394 = bits(ifu_bus_rdata_ff, 20, 20) @[el2_lib.scala 339:36] - _T_337[9] <= _T_394 @[el2_lib.scala 339:30] - node _T_395 = bits(ifu_bus_rdata_ff, 21, 21) @[el2_lib.scala 335:36] - _T_333[12] <= _T_395 @[el2_lib.scala 335:30] - node _T_396 = bits(ifu_bus_rdata_ff, 21, 21) @[el2_lib.scala 336:36] - _T_334[12] <= _T_396 @[el2_lib.scala 336:30] - node _T_397 = bits(ifu_bus_rdata_ff, 21, 21) @[el2_lib.scala 338:36] - _T_336[10] <= _T_397 @[el2_lib.scala 338:30] - node _T_398 = bits(ifu_bus_rdata_ff, 21, 21) @[el2_lib.scala 339:36] - _T_337[10] <= _T_398 @[el2_lib.scala 339:30] - node _T_399 = bits(ifu_bus_rdata_ff, 22, 22) @[el2_lib.scala 337:36] - _T_335[11] <= _T_399 @[el2_lib.scala 337:30] - node _T_400 = bits(ifu_bus_rdata_ff, 22, 22) @[el2_lib.scala 338:36] - _T_336[11] <= _T_400 @[el2_lib.scala 338:30] - node _T_401 = bits(ifu_bus_rdata_ff, 22, 22) @[el2_lib.scala 339:36] - _T_337[11] <= _T_401 @[el2_lib.scala 339:30] - node _T_402 = bits(ifu_bus_rdata_ff, 23, 23) @[el2_lib.scala 335:36] - _T_333[13] <= _T_402 @[el2_lib.scala 335:30] - node _T_403 = bits(ifu_bus_rdata_ff, 23, 23) @[el2_lib.scala 337:36] - _T_335[12] <= _T_403 @[el2_lib.scala 337:30] - node _T_404 = bits(ifu_bus_rdata_ff, 23, 23) @[el2_lib.scala 338:36] - _T_336[12] <= _T_404 @[el2_lib.scala 338:30] - node _T_405 = bits(ifu_bus_rdata_ff, 23, 23) @[el2_lib.scala 339:36] - _T_337[12] <= _T_405 @[el2_lib.scala 339:30] - node _T_406 = bits(ifu_bus_rdata_ff, 24, 24) @[el2_lib.scala 336:36] - _T_334[13] <= _T_406 @[el2_lib.scala 336:30] - node _T_407 = bits(ifu_bus_rdata_ff, 24, 24) @[el2_lib.scala 337:36] - _T_335[13] <= _T_407 @[el2_lib.scala 337:30] - node _T_408 = bits(ifu_bus_rdata_ff, 24, 24) @[el2_lib.scala 338:36] - _T_336[13] <= _T_408 @[el2_lib.scala 338:30] - node _T_409 = bits(ifu_bus_rdata_ff, 24, 24) @[el2_lib.scala 339:36] - _T_337[13] <= _T_409 @[el2_lib.scala 339:30] - node _T_410 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 335:36] - _T_333[14] <= _T_410 @[el2_lib.scala 335:30] - node _T_411 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 336:36] - _T_334[14] <= _T_411 @[el2_lib.scala 336:30] - node _T_412 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 337:36] - _T_335[14] <= _T_412 @[el2_lib.scala 337:30] - node _T_413 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 338:36] - _T_336[14] <= _T_413 @[el2_lib.scala 338:30] - node _T_414 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 339:36] - _T_337[14] <= _T_414 @[el2_lib.scala 339:30] - node _T_415 = bits(ifu_bus_rdata_ff, 26, 26) @[el2_lib.scala 335:36] - _T_333[15] <= _T_415 @[el2_lib.scala 335:30] - node _T_416 = bits(ifu_bus_rdata_ff, 26, 26) @[el2_lib.scala 340:36] - _T_338[0] <= _T_416 @[el2_lib.scala 340:30] - node _T_417 = bits(ifu_bus_rdata_ff, 27, 27) @[el2_lib.scala 336:36] - _T_334[15] <= _T_417 @[el2_lib.scala 336:30] - node _T_418 = bits(ifu_bus_rdata_ff, 27, 27) @[el2_lib.scala 340:36] - _T_338[1] <= _T_418 @[el2_lib.scala 340:30] - node _T_419 = bits(ifu_bus_rdata_ff, 28, 28) @[el2_lib.scala 335:36] - _T_333[16] <= _T_419 @[el2_lib.scala 335:30] - node _T_420 = bits(ifu_bus_rdata_ff, 28, 28) @[el2_lib.scala 336:36] - _T_334[16] <= _T_420 @[el2_lib.scala 336:30] - node _T_421 = bits(ifu_bus_rdata_ff, 28, 28) @[el2_lib.scala 340:36] - _T_338[2] <= _T_421 @[el2_lib.scala 340:30] - node _T_422 = bits(ifu_bus_rdata_ff, 29, 29) @[el2_lib.scala 337:36] - _T_335[15] <= _T_422 @[el2_lib.scala 337:30] - node _T_423 = bits(ifu_bus_rdata_ff, 29, 29) @[el2_lib.scala 340:36] - _T_338[3] <= _T_423 @[el2_lib.scala 340:30] - node _T_424 = bits(ifu_bus_rdata_ff, 30, 30) @[el2_lib.scala 335:36] - _T_333[17] <= _T_424 @[el2_lib.scala 335:30] - node _T_425 = bits(ifu_bus_rdata_ff, 30, 30) @[el2_lib.scala 337:36] - _T_335[16] <= _T_425 @[el2_lib.scala 337:30] - node _T_426 = bits(ifu_bus_rdata_ff, 30, 30) @[el2_lib.scala 340:36] - _T_338[4] <= _T_426 @[el2_lib.scala 340:30] - node _T_427 = bits(ifu_bus_rdata_ff, 31, 31) @[el2_lib.scala 336:36] - _T_334[17] <= _T_427 @[el2_lib.scala 336:30] - node _T_428 = bits(ifu_bus_rdata_ff, 31, 31) @[el2_lib.scala 337:36] - _T_335[17] <= _T_428 @[el2_lib.scala 337:30] - node _T_429 = bits(ifu_bus_rdata_ff, 31, 31) @[el2_lib.scala 340:36] - _T_338[5] <= _T_429 @[el2_lib.scala 340:30] - node _T_430 = bits(ifu_bus_rdata_ff, 32, 32) @[el2_lib.scala 335:36] - _T_333[18] <= _T_430 @[el2_lib.scala 335:30] - node _T_431 = bits(ifu_bus_rdata_ff, 32, 32) @[el2_lib.scala 336:36] - _T_334[18] <= _T_431 @[el2_lib.scala 336:30] - node _T_432 = bits(ifu_bus_rdata_ff, 32, 32) @[el2_lib.scala 337:36] - _T_335[18] <= _T_432 @[el2_lib.scala 337:30] - node _T_433 = bits(ifu_bus_rdata_ff, 32, 32) @[el2_lib.scala 340:36] - _T_338[6] <= _T_433 @[el2_lib.scala 340:30] - node _T_434 = bits(ifu_bus_rdata_ff, 33, 33) @[el2_lib.scala 338:36] - _T_336[15] <= _T_434 @[el2_lib.scala 338:30] - node _T_435 = bits(ifu_bus_rdata_ff, 33, 33) @[el2_lib.scala 340:36] - _T_338[7] <= _T_435 @[el2_lib.scala 340:30] - node _T_436 = bits(ifu_bus_rdata_ff, 34, 34) @[el2_lib.scala 335:36] - _T_333[19] <= _T_436 @[el2_lib.scala 335:30] - node _T_437 = bits(ifu_bus_rdata_ff, 34, 34) @[el2_lib.scala 338:36] - _T_336[16] <= _T_437 @[el2_lib.scala 338:30] - node _T_438 = bits(ifu_bus_rdata_ff, 34, 34) @[el2_lib.scala 340:36] - _T_338[8] <= _T_438 @[el2_lib.scala 340:30] - node _T_439 = bits(ifu_bus_rdata_ff, 35, 35) @[el2_lib.scala 336:36] - _T_334[19] <= _T_439 @[el2_lib.scala 336:30] - node _T_440 = bits(ifu_bus_rdata_ff, 35, 35) @[el2_lib.scala 338:36] - _T_336[17] <= _T_440 @[el2_lib.scala 338:30] - node _T_441 = bits(ifu_bus_rdata_ff, 35, 35) @[el2_lib.scala 340:36] - _T_338[9] <= _T_441 @[el2_lib.scala 340:30] - node _T_442 = bits(ifu_bus_rdata_ff, 36, 36) @[el2_lib.scala 335:36] - _T_333[20] <= _T_442 @[el2_lib.scala 335:30] - node _T_443 = bits(ifu_bus_rdata_ff, 36, 36) @[el2_lib.scala 336:36] - _T_334[20] <= _T_443 @[el2_lib.scala 336:30] - node _T_444 = bits(ifu_bus_rdata_ff, 36, 36) @[el2_lib.scala 338:36] - _T_336[18] <= _T_444 @[el2_lib.scala 338:30] - node _T_445 = bits(ifu_bus_rdata_ff, 36, 36) @[el2_lib.scala 340:36] - _T_338[10] <= _T_445 @[el2_lib.scala 340:30] - node _T_446 = bits(ifu_bus_rdata_ff, 37, 37) @[el2_lib.scala 337:36] - _T_335[19] <= _T_446 @[el2_lib.scala 337:30] - node _T_447 = bits(ifu_bus_rdata_ff, 37, 37) @[el2_lib.scala 338:36] - _T_336[19] <= _T_447 @[el2_lib.scala 338:30] - node _T_448 = bits(ifu_bus_rdata_ff, 37, 37) @[el2_lib.scala 340:36] - _T_338[11] <= _T_448 @[el2_lib.scala 340:30] - node _T_449 = bits(ifu_bus_rdata_ff, 38, 38) @[el2_lib.scala 335:36] - _T_333[21] <= _T_449 @[el2_lib.scala 335:30] - node _T_450 = bits(ifu_bus_rdata_ff, 38, 38) @[el2_lib.scala 337:36] - _T_335[20] <= _T_450 @[el2_lib.scala 337:30] - node _T_451 = bits(ifu_bus_rdata_ff, 38, 38) @[el2_lib.scala 338:36] - _T_336[20] <= _T_451 @[el2_lib.scala 338:30] - node _T_452 = bits(ifu_bus_rdata_ff, 38, 38) @[el2_lib.scala 340:36] - _T_338[12] <= _T_452 @[el2_lib.scala 340:30] - node _T_453 = bits(ifu_bus_rdata_ff, 39, 39) @[el2_lib.scala 336:36] - _T_334[21] <= _T_453 @[el2_lib.scala 336:30] - node _T_454 = bits(ifu_bus_rdata_ff, 39, 39) @[el2_lib.scala 337:36] - _T_335[21] <= _T_454 @[el2_lib.scala 337:30] - node _T_455 = bits(ifu_bus_rdata_ff, 39, 39) @[el2_lib.scala 338:36] - _T_336[21] <= _T_455 @[el2_lib.scala 338:30] - node _T_456 = bits(ifu_bus_rdata_ff, 39, 39) @[el2_lib.scala 340:36] - _T_338[13] <= _T_456 @[el2_lib.scala 340:30] - node _T_457 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 335:36] - _T_333[22] <= _T_457 @[el2_lib.scala 335:30] - node _T_458 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 336:36] - _T_334[22] <= _T_458 @[el2_lib.scala 336:30] - node _T_459 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 337:36] - _T_335[22] <= _T_459 @[el2_lib.scala 337:30] - node _T_460 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 338:36] - _T_336[22] <= _T_460 @[el2_lib.scala 338:30] - node _T_461 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 340:36] - _T_338[14] <= _T_461 @[el2_lib.scala 340:30] - node _T_462 = bits(ifu_bus_rdata_ff, 41, 41) @[el2_lib.scala 339:36] - _T_337[15] <= _T_462 @[el2_lib.scala 339:30] - node _T_463 = bits(ifu_bus_rdata_ff, 41, 41) @[el2_lib.scala 340:36] - _T_338[15] <= _T_463 @[el2_lib.scala 340:30] - node _T_464 = bits(ifu_bus_rdata_ff, 42, 42) @[el2_lib.scala 335:36] - _T_333[23] <= _T_464 @[el2_lib.scala 335:30] - node _T_465 = bits(ifu_bus_rdata_ff, 42, 42) @[el2_lib.scala 339:36] - _T_337[16] <= _T_465 @[el2_lib.scala 339:30] - node _T_466 = bits(ifu_bus_rdata_ff, 42, 42) @[el2_lib.scala 340:36] - _T_338[16] <= _T_466 @[el2_lib.scala 340:30] - node _T_467 = bits(ifu_bus_rdata_ff, 43, 43) @[el2_lib.scala 336:36] - _T_334[23] <= _T_467 @[el2_lib.scala 336:30] - node _T_468 = bits(ifu_bus_rdata_ff, 43, 43) @[el2_lib.scala 339:36] - _T_337[17] <= _T_468 @[el2_lib.scala 339:30] - node _T_469 = bits(ifu_bus_rdata_ff, 43, 43) @[el2_lib.scala 340:36] - _T_338[17] <= _T_469 @[el2_lib.scala 340:30] - node _T_470 = bits(ifu_bus_rdata_ff, 44, 44) @[el2_lib.scala 335:36] - _T_333[24] <= _T_470 @[el2_lib.scala 335:30] - node _T_471 = bits(ifu_bus_rdata_ff, 44, 44) @[el2_lib.scala 336:36] - _T_334[24] <= _T_471 @[el2_lib.scala 336:30] - node _T_472 = bits(ifu_bus_rdata_ff, 44, 44) @[el2_lib.scala 339:36] - _T_337[18] <= _T_472 @[el2_lib.scala 339:30] - node _T_473 = bits(ifu_bus_rdata_ff, 44, 44) @[el2_lib.scala 340:36] - _T_338[18] <= _T_473 @[el2_lib.scala 340:30] - node _T_474 = bits(ifu_bus_rdata_ff, 45, 45) @[el2_lib.scala 337:36] - _T_335[23] <= _T_474 @[el2_lib.scala 337:30] - node _T_475 = bits(ifu_bus_rdata_ff, 45, 45) @[el2_lib.scala 339:36] - _T_337[19] <= _T_475 @[el2_lib.scala 339:30] - node _T_476 = bits(ifu_bus_rdata_ff, 45, 45) @[el2_lib.scala 340:36] - _T_338[19] <= _T_476 @[el2_lib.scala 340:30] - node _T_477 = bits(ifu_bus_rdata_ff, 46, 46) @[el2_lib.scala 335:36] - _T_333[25] <= _T_477 @[el2_lib.scala 335:30] - node _T_478 = bits(ifu_bus_rdata_ff, 46, 46) @[el2_lib.scala 337:36] - _T_335[24] <= _T_478 @[el2_lib.scala 337:30] - node _T_479 = bits(ifu_bus_rdata_ff, 46, 46) @[el2_lib.scala 339:36] - _T_337[20] <= _T_479 @[el2_lib.scala 339:30] - node _T_480 = bits(ifu_bus_rdata_ff, 46, 46) @[el2_lib.scala 340:36] - _T_338[20] <= _T_480 @[el2_lib.scala 340:30] - node _T_481 = bits(ifu_bus_rdata_ff, 47, 47) @[el2_lib.scala 336:36] - _T_334[25] <= _T_481 @[el2_lib.scala 336:30] - node _T_482 = bits(ifu_bus_rdata_ff, 47, 47) @[el2_lib.scala 337:36] - _T_335[25] <= _T_482 @[el2_lib.scala 337:30] - node _T_483 = bits(ifu_bus_rdata_ff, 47, 47) @[el2_lib.scala 339:36] - _T_337[21] <= _T_483 @[el2_lib.scala 339:30] - node _T_484 = bits(ifu_bus_rdata_ff, 47, 47) @[el2_lib.scala 340:36] - _T_338[21] <= _T_484 @[el2_lib.scala 340:30] - node _T_485 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 335:36] - _T_333[26] <= _T_485 @[el2_lib.scala 335:30] - node _T_486 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 336:36] - _T_334[26] <= _T_486 @[el2_lib.scala 336:30] - node _T_487 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 337:36] - _T_335[26] <= _T_487 @[el2_lib.scala 337:30] - node _T_488 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 339:36] - _T_337[22] <= _T_488 @[el2_lib.scala 339:30] - node _T_489 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 340:36] - _T_338[22] <= _T_489 @[el2_lib.scala 340:30] - node _T_490 = bits(ifu_bus_rdata_ff, 49, 49) @[el2_lib.scala 338:36] - _T_336[23] <= _T_490 @[el2_lib.scala 338:30] - node _T_491 = bits(ifu_bus_rdata_ff, 49, 49) @[el2_lib.scala 339:36] - _T_337[23] <= _T_491 @[el2_lib.scala 339:30] - node _T_492 = bits(ifu_bus_rdata_ff, 49, 49) @[el2_lib.scala 340:36] - _T_338[23] <= _T_492 @[el2_lib.scala 340:30] - node _T_493 = bits(ifu_bus_rdata_ff, 50, 50) @[el2_lib.scala 335:36] - _T_333[27] <= _T_493 @[el2_lib.scala 335:30] - node _T_494 = bits(ifu_bus_rdata_ff, 50, 50) @[el2_lib.scala 338:36] - _T_336[24] <= _T_494 @[el2_lib.scala 338:30] - node _T_495 = bits(ifu_bus_rdata_ff, 50, 50) @[el2_lib.scala 339:36] - _T_337[24] <= _T_495 @[el2_lib.scala 339:30] - node _T_496 = bits(ifu_bus_rdata_ff, 50, 50) @[el2_lib.scala 340:36] - _T_338[24] <= _T_496 @[el2_lib.scala 340:30] - node _T_497 = bits(ifu_bus_rdata_ff, 51, 51) @[el2_lib.scala 336:36] - _T_334[27] <= _T_497 @[el2_lib.scala 336:30] - node _T_498 = bits(ifu_bus_rdata_ff, 51, 51) @[el2_lib.scala 338:36] - _T_336[25] <= _T_498 @[el2_lib.scala 338:30] - node _T_499 = bits(ifu_bus_rdata_ff, 51, 51) @[el2_lib.scala 339:36] - _T_337[25] <= _T_499 @[el2_lib.scala 339:30] - node _T_500 = bits(ifu_bus_rdata_ff, 51, 51) @[el2_lib.scala 340:36] - _T_338[25] <= _T_500 @[el2_lib.scala 340:30] - node _T_501 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 335:36] - _T_333[28] <= _T_501 @[el2_lib.scala 335:30] - node _T_502 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 336:36] - _T_334[28] <= _T_502 @[el2_lib.scala 336:30] - node _T_503 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 338:36] - _T_336[26] <= _T_503 @[el2_lib.scala 338:30] - node _T_504 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 339:36] - _T_337[26] <= _T_504 @[el2_lib.scala 339:30] - node _T_505 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 340:36] - _T_338[26] <= _T_505 @[el2_lib.scala 340:30] - node _T_506 = bits(ifu_bus_rdata_ff, 53, 53) @[el2_lib.scala 337:36] - _T_335[27] <= _T_506 @[el2_lib.scala 337:30] - node _T_507 = bits(ifu_bus_rdata_ff, 53, 53) @[el2_lib.scala 338:36] - _T_336[27] <= _T_507 @[el2_lib.scala 338:30] - node _T_508 = bits(ifu_bus_rdata_ff, 53, 53) @[el2_lib.scala 339:36] - _T_337[27] <= _T_508 @[el2_lib.scala 339:30] - node _T_509 = bits(ifu_bus_rdata_ff, 53, 53) @[el2_lib.scala 340:36] - _T_338[27] <= _T_509 @[el2_lib.scala 340:30] - node _T_510 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 335:36] - _T_333[29] <= _T_510 @[el2_lib.scala 335:30] - node _T_511 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 337:36] - _T_335[28] <= _T_511 @[el2_lib.scala 337:30] - node _T_512 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 338:36] - _T_336[28] <= _T_512 @[el2_lib.scala 338:30] - node _T_513 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 339:36] - _T_337[28] <= _T_513 @[el2_lib.scala 339:30] - node _T_514 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 340:36] - _T_338[28] <= _T_514 @[el2_lib.scala 340:30] - node _T_515 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 336:36] - _T_334[29] <= _T_515 @[el2_lib.scala 336:30] - node _T_516 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 337:36] - _T_335[29] <= _T_516 @[el2_lib.scala 337:30] - node _T_517 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 338:36] - _T_336[29] <= _T_517 @[el2_lib.scala 338:30] - node _T_518 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 339:36] - _T_337[29] <= _T_518 @[el2_lib.scala 339:30] - node _T_519 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 340:36] - _T_338[29] <= _T_519 @[el2_lib.scala 340:30] - node _T_520 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 335:36] - _T_333[30] <= _T_520 @[el2_lib.scala 335:30] - node _T_521 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 336:36] - _T_334[30] <= _T_521 @[el2_lib.scala 336:30] - node _T_522 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 337:36] - _T_335[30] <= _T_522 @[el2_lib.scala 337:30] - node _T_523 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 338:36] - _T_336[30] <= _T_523 @[el2_lib.scala 338:30] - node _T_524 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 339:36] - _T_337[30] <= _T_524 @[el2_lib.scala 339:30] - node _T_525 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 340:36] - _T_338[30] <= _T_525 @[el2_lib.scala 340:30] - node _T_526 = bits(ifu_bus_rdata_ff, 57, 57) @[el2_lib.scala 335:36] - _T_333[31] <= _T_526 @[el2_lib.scala 335:30] - node _T_527 = bits(ifu_bus_rdata_ff, 57, 57) @[el2_lib.scala 341:36] - _T_339[0] <= _T_527 @[el2_lib.scala 341:30] - node _T_528 = bits(ifu_bus_rdata_ff, 58, 58) @[el2_lib.scala 336:36] - _T_334[31] <= _T_528 @[el2_lib.scala 336:30] - node _T_529 = bits(ifu_bus_rdata_ff, 58, 58) @[el2_lib.scala 341:36] - _T_339[1] <= _T_529 @[el2_lib.scala 341:30] - node _T_530 = bits(ifu_bus_rdata_ff, 59, 59) @[el2_lib.scala 335:36] - _T_333[32] <= _T_530 @[el2_lib.scala 335:30] - node _T_531 = bits(ifu_bus_rdata_ff, 59, 59) @[el2_lib.scala 336:36] - _T_334[32] <= _T_531 @[el2_lib.scala 336:30] - node _T_532 = bits(ifu_bus_rdata_ff, 59, 59) @[el2_lib.scala 341:36] - _T_339[2] <= _T_532 @[el2_lib.scala 341:30] - node _T_533 = bits(ifu_bus_rdata_ff, 60, 60) @[el2_lib.scala 337:36] - _T_335[31] <= _T_533 @[el2_lib.scala 337:30] - node _T_534 = bits(ifu_bus_rdata_ff, 60, 60) @[el2_lib.scala 341:36] - _T_339[3] <= _T_534 @[el2_lib.scala 341:30] - node _T_535 = bits(ifu_bus_rdata_ff, 61, 61) @[el2_lib.scala 335:36] - _T_333[33] <= _T_535 @[el2_lib.scala 335:30] - node _T_536 = bits(ifu_bus_rdata_ff, 61, 61) @[el2_lib.scala 337:36] - _T_335[32] <= _T_536 @[el2_lib.scala 337:30] - node _T_537 = bits(ifu_bus_rdata_ff, 61, 61) @[el2_lib.scala 341:36] - _T_339[4] <= _T_537 @[el2_lib.scala 341:30] - node _T_538 = bits(ifu_bus_rdata_ff, 62, 62) @[el2_lib.scala 336:36] - _T_334[33] <= _T_538 @[el2_lib.scala 336:30] - node _T_539 = bits(ifu_bus_rdata_ff, 62, 62) @[el2_lib.scala 337:36] - _T_335[33] <= _T_539 @[el2_lib.scala 337:30] - node _T_540 = bits(ifu_bus_rdata_ff, 62, 62) @[el2_lib.scala 341:36] - _T_339[5] <= _T_540 @[el2_lib.scala 341:30] - node _T_541 = bits(ifu_bus_rdata_ff, 63, 63) @[el2_lib.scala 335:36] - _T_333[34] <= _T_541 @[el2_lib.scala 335:30] - node _T_542 = bits(ifu_bus_rdata_ff, 63, 63) @[el2_lib.scala 336:36] - _T_334[34] <= _T_542 @[el2_lib.scala 336:30] - node _T_543 = bits(ifu_bus_rdata_ff, 63, 63) @[el2_lib.scala 337:36] - _T_335[34] <= _T_543 @[el2_lib.scala 337:30] - node _T_544 = bits(ifu_bus_rdata_ff, 63, 63) @[el2_lib.scala 341:36] - _T_339[6] <= _T_544 @[el2_lib.scala 341:30] - node _T_545 = cat(_T_333[1], _T_333[0]) @[el2_lib.scala 343:27] - node _T_546 = cat(_T_333[3], _T_333[2]) @[el2_lib.scala 343:27] - node _T_547 = cat(_T_546, _T_545) @[el2_lib.scala 343:27] - node _T_548 = cat(_T_333[5], _T_333[4]) @[el2_lib.scala 343:27] - node _T_549 = cat(_T_333[7], _T_333[6]) @[el2_lib.scala 343:27] - node _T_550 = cat(_T_549, _T_548) @[el2_lib.scala 343:27] - node _T_551 = cat(_T_550, _T_547) @[el2_lib.scala 343:27] - node _T_552 = cat(_T_333[9], _T_333[8]) @[el2_lib.scala 343:27] - node _T_553 = cat(_T_333[11], _T_333[10]) @[el2_lib.scala 343:27] - node _T_554 = cat(_T_553, _T_552) @[el2_lib.scala 343:27] - node _T_555 = cat(_T_333[13], _T_333[12]) @[el2_lib.scala 343:27] - node _T_556 = cat(_T_333[16], _T_333[15]) @[el2_lib.scala 343:27] - node _T_557 = cat(_T_556, _T_333[14]) @[el2_lib.scala 343:27] - node _T_558 = cat(_T_557, _T_555) @[el2_lib.scala 343:27] - node _T_559 = cat(_T_558, _T_554) @[el2_lib.scala 343:27] - node _T_560 = cat(_T_559, _T_551) @[el2_lib.scala 343:27] - node _T_561 = cat(_T_333[18], _T_333[17]) @[el2_lib.scala 343:27] - node _T_562 = cat(_T_333[20], _T_333[19]) @[el2_lib.scala 343:27] - node _T_563 = cat(_T_562, _T_561) @[el2_lib.scala 343:27] - node _T_564 = cat(_T_333[22], _T_333[21]) @[el2_lib.scala 343:27] - node _T_565 = cat(_T_333[25], _T_333[24]) @[el2_lib.scala 343:27] - node _T_566 = cat(_T_565, _T_333[23]) @[el2_lib.scala 343:27] - node _T_567 = cat(_T_566, _T_564) @[el2_lib.scala 343:27] - node _T_568 = cat(_T_567, _T_563) @[el2_lib.scala 343:27] - node _T_569 = cat(_T_333[27], _T_333[26]) @[el2_lib.scala 343:27] - node _T_570 = cat(_T_333[29], _T_333[28]) @[el2_lib.scala 343:27] + wire _T_341 : UInt<1>[35] @[el2_lib.scala 322:18] + wire _T_342 : UInt<1>[35] @[el2_lib.scala 323:18] + wire _T_343 : UInt<1>[35] @[el2_lib.scala 324:18] + wire _T_344 : UInt<1>[31] @[el2_lib.scala 325:18] + wire _T_345 : UInt<1>[31] @[el2_lib.scala 326:18] + wire _T_346 : UInt<1>[31] @[el2_lib.scala 327:18] + wire _T_347 : UInt<1>[7] @[el2_lib.scala 328:18] + node _T_348 = bits(ifu_bus_rdata_ff, 0, 0) @[el2_lib.scala 335:36] + _T_341[0] <= _T_348 @[el2_lib.scala 335:30] + node _T_349 = bits(ifu_bus_rdata_ff, 0, 0) @[el2_lib.scala 336:36] + _T_342[0] <= _T_349 @[el2_lib.scala 336:30] + node _T_350 = bits(ifu_bus_rdata_ff, 1, 1) @[el2_lib.scala 335:36] + _T_341[1] <= _T_350 @[el2_lib.scala 335:30] + node _T_351 = bits(ifu_bus_rdata_ff, 1, 1) @[el2_lib.scala 337:36] + _T_343[0] <= _T_351 @[el2_lib.scala 337:30] + node _T_352 = bits(ifu_bus_rdata_ff, 2, 2) @[el2_lib.scala 336:36] + _T_342[1] <= _T_352 @[el2_lib.scala 336:30] + node _T_353 = bits(ifu_bus_rdata_ff, 2, 2) @[el2_lib.scala 337:36] + _T_343[1] <= _T_353 @[el2_lib.scala 337:30] + node _T_354 = bits(ifu_bus_rdata_ff, 3, 3) @[el2_lib.scala 335:36] + _T_341[2] <= _T_354 @[el2_lib.scala 335:30] + node _T_355 = bits(ifu_bus_rdata_ff, 3, 3) @[el2_lib.scala 336:36] + _T_342[2] <= _T_355 @[el2_lib.scala 336:30] + node _T_356 = bits(ifu_bus_rdata_ff, 3, 3) @[el2_lib.scala 337:36] + _T_343[2] <= _T_356 @[el2_lib.scala 337:30] + node _T_357 = bits(ifu_bus_rdata_ff, 4, 4) @[el2_lib.scala 335:36] + _T_341[3] <= _T_357 @[el2_lib.scala 335:30] + node _T_358 = bits(ifu_bus_rdata_ff, 4, 4) @[el2_lib.scala 338:36] + _T_344[0] <= _T_358 @[el2_lib.scala 338:30] + node _T_359 = bits(ifu_bus_rdata_ff, 5, 5) @[el2_lib.scala 336:36] + _T_342[3] <= _T_359 @[el2_lib.scala 336:30] + node _T_360 = bits(ifu_bus_rdata_ff, 5, 5) @[el2_lib.scala 338:36] + _T_344[1] <= _T_360 @[el2_lib.scala 338:30] + node _T_361 = bits(ifu_bus_rdata_ff, 6, 6) @[el2_lib.scala 335:36] + _T_341[4] <= _T_361 @[el2_lib.scala 335:30] + node _T_362 = bits(ifu_bus_rdata_ff, 6, 6) @[el2_lib.scala 336:36] + _T_342[4] <= _T_362 @[el2_lib.scala 336:30] + node _T_363 = bits(ifu_bus_rdata_ff, 6, 6) @[el2_lib.scala 338:36] + _T_344[2] <= _T_363 @[el2_lib.scala 338:30] + node _T_364 = bits(ifu_bus_rdata_ff, 7, 7) @[el2_lib.scala 337:36] + _T_343[3] <= _T_364 @[el2_lib.scala 337:30] + node _T_365 = bits(ifu_bus_rdata_ff, 7, 7) @[el2_lib.scala 338:36] + _T_344[3] <= _T_365 @[el2_lib.scala 338:30] + node _T_366 = bits(ifu_bus_rdata_ff, 8, 8) @[el2_lib.scala 335:36] + _T_341[5] <= _T_366 @[el2_lib.scala 335:30] + node _T_367 = bits(ifu_bus_rdata_ff, 8, 8) @[el2_lib.scala 337:36] + _T_343[4] <= _T_367 @[el2_lib.scala 337:30] + node _T_368 = bits(ifu_bus_rdata_ff, 8, 8) @[el2_lib.scala 338:36] + _T_344[4] <= _T_368 @[el2_lib.scala 338:30] + node _T_369 = bits(ifu_bus_rdata_ff, 9, 9) @[el2_lib.scala 336:36] + _T_342[5] <= _T_369 @[el2_lib.scala 336:30] + node _T_370 = bits(ifu_bus_rdata_ff, 9, 9) @[el2_lib.scala 337:36] + _T_343[5] <= _T_370 @[el2_lib.scala 337:30] + node _T_371 = bits(ifu_bus_rdata_ff, 9, 9) @[el2_lib.scala 338:36] + _T_344[5] <= _T_371 @[el2_lib.scala 338:30] + node _T_372 = bits(ifu_bus_rdata_ff, 10, 10) @[el2_lib.scala 335:36] + _T_341[6] <= _T_372 @[el2_lib.scala 335:30] + node _T_373 = bits(ifu_bus_rdata_ff, 10, 10) @[el2_lib.scala 336:36] + _T_342[6] <= _T_373 @[el2_lib.scala 336:30] + node _T_374 = bits(ifu_bus_rdata_ff, 10, 10) @[el2_lib.scala 337:36] + _T_343[6] <= _T_374 @[el2_lib.scala 337:30] + node _T_375 = bits(ifu_bus_rdata_ff, 10, 10) @[el2_lib.scala 338:36] + _T_344[6] <= _T_375 @[el2_lib.scala 338:30] + node _T_376 = bits(ifu_bus_rdata_ff, 11, 11) @[el2_lib.scala 335:36] + _T_341[7] <= _T_376 @[el2_lib.scala 335:30] + node _T_377 = bits(ifu_bus_rdata_ff, 11, 11) @[el2_lib.scala 339:36] + _T_345[0] <= _T_377 @[el2_lib.scala 339:30] + node _T_378 = bits(ifu_bus_rdata_ff, 12, 12) @[el2_lib.scala 336:36] + _T_342[7] <= _T_378 @[el2_lib.scala 336:30] + node _T_379 = bits(ifu_bus_rdata_ff, 12, 12) @[el2_lib.scala 339:36] + _T_345[1] <= _T_379 @[el2_lib.scala 339:30] + node _T_380 = bits(ifu_bus_rdata_ff, 13, 13) @[el2_lib.scala 335:36] + _T_341[8] <= _T_380 @[el2_lib.scala 335:30] + node _T_381 = bits(ifu_bus_rdata_ff, 13, 13) @[el2_lib.scala 336:36] + _T_342[8] <= _T_381 @[el2_lib.scala 336:30] + node _T_382 = bits(ifu_bus_rdata_ff, 13, 13) @[el2_lib.scala 339:36] + _T_345[2] <= _T_382 @[el2_lib.scala 339:30] + node _T_383 = bits(ifu_bus_rdata_ff, 14, 14) @[el2_lib.scala 337:36] + _T_343[7] <= _T_383 @[el2_lib.scala 337:30] + node _T_384 = bits(ifu_bus_rdata_ff, 14, 14) @[el2_lib.scala 339:36] + _T_345[3] <= _T_384 @[el2_lib.scala 339:30] + node _T_385 = bits(ifu_bus_rdata_ff, 15, 15) @[el2_lib.scala 335:36] + _T_341[9] <= _T_385 @[el2_lib.scala 335:30] + node _T_386 = bits(ifu_bus_rdata_ff, 15, 15) @[el2_lib.scala 337:36] + _T_343[8] <= _T_386 @[el2_lib.scala 337:30] + node _T_387 = bits(ifu_bus_rdata_ff, 15, 15) @[el2_lib.scala 339:36] + _T_345[4] <= _T_387 @[el2_lib.scala 339:30] + node _T_388 = bits(ifu_bus_rdata_ff, 16, 16) @[el2_lib.scala 336:36] + _T_342[9] <= _T_388 @[el2_lib.scala 336:30] + node _T_389 = bits(ifu_bus_rdata_ff, 16, 16) @[el2_lib.scala 337:36] + _T_343[9] <= _T_389 @[el2_lib.scala 337:30] + node _T_390 = bits(ifu_bus_rdata_ff, 16, 16) @[el2_lib.scala 339:36] + _T_345[5] <= _T_390 @[el2_lib.scala 339:30] + node _T_391 = bits(ifu_bus_rdata_ff, 17, 17) @[el2_lib.scala 335:36] + _T_341[10] <= _T_391 @[el2_lib.scala 335:30] + node _T_392 = bits(ifu_bus_rdata_ff, 17, 17) @[el2_lib.scala 336:36] + _T_342[10] <= _T_392 @[el2_lib.scala 336:30] + node _T_393 = bits(ifu_bus_rdata_ff, 17, 17) @[el2_lib.scala 337:36] + _T_343[10] <= _T_393 @[el2_lib.scala 337:30] + node _T_394 = bits(ifu_bus_rdata_ff, 17, 17) @[el2_lib.scala 339:36] + _T_345[6] <= _T_394 @[el2_lib.scala 339:30] + node _T_395 = bits(ifu_bus_rdata_ff, 18, 18) @[el2_lib.scala 338:36] + _T_344[7] <= _T_395 @[el2_lib.scala 338:30] + node _T_396 = bits(ifu_bus_rdata_ff, 18, 18) @[el2_lib.scala 339:36] + _T_345[7] <= _T_396 @[el2_lib.scala 339:30] + node _T_397 = bits(ifu_bus_rdata_ff, 19, 19) @[el2_lib.scala 335:36] + _T_341[11] <= _T_397 @[el2_lib.scala 335:30] + node _T_398 = bits(ifu_bus_rdata_ff, 19, 19) @[el2_lib.scala 338:36] + _T_344[8] <= _T_398 @[el2_lib.scala 338:30] + node _T_399 = bits(ifu_bus_rdata_ff, 19, 19) @[el2_lib.scala 339:36] + _T_345[8] <= _T_399 @[el2_lib.scala 339:30] + node _T_400 = bits(ifu_bus_rdata_ff, 20, 20) @[el2_lib.scala 336:36] + _T_342[11] <= _T_400 @[el2_lib.scala 336:30] + node _T_401 = bits(ifu_bus_rdata_ff, 20, 20) @[el2_lib.scala 338:36] + _T_344[9] <= _T_401 @[el2_lib.scala 338:30] + node _T_402 = bits(ifu_bus_rdata_ff, 20, 20) @[el2_lib.scala 339:36] + _T_345[9] <= _T_402 @[el2_lib.scala 339:30] + node _T_403 = bits(ifu_bus_rdata_ff, 21, 21) @[el2_lib.scala 335:36] + _T_341[12] <= _T_403 @[el2_lib.scala 335:30] + node _T_404 = bits(ifu_bus_rdata_ff, 21, 21) @[el2_lib.scala 336:36] + _T_342[12] <= _T_404 @[el2_lib.scala 336:30] + node _T_405 = bits(ifu_bus_rdata_ff, 21, 21) @[el2_lib.scala 338:36] + _T_344[10] <= _T_405 @[el2_lib.scala 338:30] + node _T_406 = bits(ifu_bus_rdata_ff, 21, 21) @[el2_lib.scala 339:36] + _T_345[10] <= _T_406 @[el2_lib.scala 339:30] + node _T_407 = bits(ifu_bus_rdata_ff, 22, 22) @[el2_lib.scala 337:36] + _T_343[11] <= _T_407 @[el2_lib.scala 337:30] + node _T_408 = bits(ifu_bus_rdata_ff, 22, 22) @[el2_lib.scala 338:36] + _T_344[11] <= _T_408 @[el2_lib.scala 338:30] + node _T_409 = bits(ifu_bus_rdata_ff, 22, 22) @[el2_lib.scala 339:36] + _T_345[11] <= _T_409 @[el2_lib.scala 339:30] + node _T_410 = bits(ifu_bus_rdata_ff, 23, 23) @[el2_lib.scala 335:36] + _T_341[13] <= _T_410 @[el2_lib.scala 335:30] + node _T_411 = bits(ifu_bus_rdata_ff, 23, 23) @[el2_lib.scala 337:36] + _T_343[12] <= _T_411 @[el2_lib.scala 337:30] + node _T_412 = bits(ifu_bus_rdata_ff, 23, 23) @[el2_lib.scala 338:36] + _T_344[12] <= _T_412 @[el2_lib.scala 338:30] + node _T_413 = bits(ifu_bus_rdata_ff, 23, 23) @[el2_lib.scala 339:36] + _T_345[12] <= _T_413 @[el2_lib.scala 339:30] + node _T_414 = bits(ifu_bus_rdata_ff, 24, 24) @[el2_lib.scala 336:36] + _T_342[13] <= _T_414 @[el2_lib.scala 336:30] + node _T_415 = bits(ifu_bus_rdata_ff, 24, 24) @[el2_lib.scala 337:36] + _T_343[13] <= _T_415 @[el2_lib.scala 337:30] + node _T_416 = bits(ifu_bus_rdata_ff, 24, 24) @[el2_lib.scala 338:36] + _T_344[13] <= _T_416 @[el2_lib.scala 338:30] + node _T_417 = bits(ifu_bus_rdata_ff, 24, 24) @[el2_lib.scala 339:36] + _T_345[13] <= _T_417 @[el2_lib.scala 339:30] + node _T_418 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 335:36] + _T_341[14] <= _T_418 @[el2_lib.scala 335:30] + node _T_419 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 336:36] + _T_342[14] <= _T_419 @[el2_lib.scala 336:30] + node _T_420 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 337:36] + _T_343[14] <= _T_420 @[el2_lib.scala 337:30] + node _T_421 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 338:36] + _T_344[14] <= _T_421 @[el2_lib.scala 338:30] + node _T_422 = bits(ifu_bus_rdata_ff, 25, 25) @[el2_lib.scala 339:36] + _T_345[14] <= _T_422 @[el2_lib.scala 339:30] + node _T_423 = bits(ifu_bus_rdata_ff, 26, 26) @[el2_lib.scala 335:36] + _T_341[15] <= _T_423 @[el2_lib.scala 335:30] + node _T_424 = bits(ifu_bus_rdata_ff, 26, 26) @[el2_lib.scala 340:36] + _T_346[0] <= _T_424 @[el2_lib.scala 340:30] + node _T_425 = bits(ifu_bus_rdata_ff, 27, 27) @[el2_lib.scala 336:36] + _T_342[15] <= _T_425 @[el2_lib.scala 336:30] + node _T_426 = bits(ifu_bus_rdata_ff, 27, 27) @[el2_lib.scala 340:36] + _T_346[1] <= _T_426 @[el2_lib.scala 340:30] + node _T_427 = bits(ifu_bus_rdata_ff, 28, 28) @[el2_lib.scala 335:36] + _T_341[16] <= _T_427 @[el2_lib.scala 335:30] + node _T_428 = bits(ifu_bus_rdata_ff, 28, 28) @[el2_lib.scala 336:36] + _T_342[16] <= _T_428 @[el2_lib.scala 336:30] + node _T_429 = bits(ifu_bus_rdata_ff, 28, 28) @[el2_lib.scala 340:36] + _T_346[2] <= _T_429 @[el2_lib.scala 340:30] + node _T_430 = bits(ifu_bus_rdata_ff, 29, 29) @[el2_lib.scala 337:36] + _T_343[15] <= _T_430 @[el2_lib.scala 337:30] + node _T_431 = bits(ifu_bus_rdata_ff, 29, 29) @[el2_lib.scala 340:36] + _T_346[3] <= _T_431 @[el2_lib.scala 340:30] + node _T_432 = bits(ifu_bus_rdata_ff, 30, 30) @[el2_lib.scala 335:36] + _T_341[17] <= _T_432 @[el2_lib.scala 335:30] + node _T_433 = bits(ifu_bus_rdata_ff, 30, 30) @[el2_lib.scala 337:36] + _T_343[16] <= _T_433 @[el2_lib.scala 337:30] + node _T_434 = bits(ifu_bus_rdata_ff, 30, 30) @[el2_lib.scala 340:36] + _T_346[4] <= _T_434 @[el2_lib.scala 340:30] + node _T_435 = bits(ifu_bus_rdata_ff, 31, 31) @[el2_lib.scala 336:36] + _T_342[17] <= _T_435 @[el2_lib.scala 336:30] + node _T_436 = bits(ifu_bus_rdata_ff, 31, 31) @[el2_lib.scala 337:36] + _T_343[17] <= _T_436 @[el2_lib.scala 337:30] + node _T_437 = bits(ifu_bus_rdata_ff, 31, 31) @[el2_lib.scala 340:36] + _T_346[5] <= _T_437 @[el2_lib.scala 340:30] + node _T_438 = bits(ifu_bus_rdata_ff, 32, 32) @[el2_lib.scala 335:36] + _T_341[18] <= _T_438 @[el2_lib.scala 335:30] + node _T_439 = bits(ifu_bus_rdata_ff, 32, 32) @[el2_lib.scala 336:36] + _T_342[18] <= _T_439 @[el2_lib.scala 336:30] + node _T_440 = bits(ifu_bus_rdata_ff, 32, 32) @[el2_lib.scala 337:36] + _T_343[18] <= _T_440 @[el2_lib.scala 337:30] + node _T_441 = bits(ifu_bus_rdata_ff, 32, 32) @[el2_lib.scala 340:36] + _T_346[6] <= _T_441 @[el2_lib.scala 340:30] + node _T_442 = bits(ifu_bus_rdata_ff, 33, 33) @[el2_lib.scala 338:36] + _T_344[15] <= _T_442 @[el2_lib.scala 338:30] + node _T_443 = bits(ifu_bus_rdata_ff, 33, 33) @[el2_lib.scala 340:36] + _T_346[7] <= _T_443 @[el2_lib.scala 340:30] + node _T_444 = bits(ifu_bus_rdata_ff, 34, 34) @[el2_lib.scala 335:36] + _T_341[19] <= _T_444 @[el2_lib.scala 335:30] + node _T_445 = bits(ifu_bus_rdata_ff, 34, 34) @[el2_lib.scala 338:36] + _T_344[16] <= _T_445 @[el2_lib.scala 338:30] + node _T_446 = bits(ifu_bus_rdata_ff, 34, 34) @[el2_lib.scala 340:36] + _T_346[8] <= _T_446 @[el2_lib.scala 340:30] + node _T_447 = bits(ifu_bus_rdata_ff, 35, 35) @[el2_lib.scala 336:36] + _T_342[19] <= _T_447 @[el2_lib.scala 336:30] + node _T_448 = bits(ifu_bus_rdata_ff, 35, 35) @[el2_lib.scala 338:36] + _T_344[17] <= _T_448 @[el2_lib.scala 338:30] + node _T_449 = bits(ifu_bus_rdata_ff, 35, 35) @[el2_lib.scala 340:36] + _T_346[9] <= _T_449 @[el2_lib.scala 340:30] + node _T_450 = bits(ifu_bus_rdata_ff, 36, 36) @[el2_lib.scala 335:36] + _T_341[20] <= _T_450 @[el2_lib.scala 335:30] + node _T_451 = bits(ifu_bus_rdata_ff, 36, 36) @[el2_lib.scala 336:36] + _T_342[20] <= _T_451 @[el2_lib.scala 336:30] + node _T_452 = bits(ifu_bus_rdata_ff, 36, 36) @[el2_lib.scala 338:36] + _T_344[18] <= _T_452 @[el2_lib.scala 338:30] + node _T_453 = bits(ifu_bus_rdata_ff, 36, 36) @[el2_lib.scala 340:36] + _T_346[10] <= _T_453 @[el2_lib.scala 340:30] + node _T_454 = bits(ifu_bus_rdata_ff, 37, 37) @[el2_lib.scala 337:36] + _T_343[19] <= _T_454 @[el2_lib.scala 337:30] + node _T_455 = bits(ifu_bus_rdata_ff, 37, 37) @[el2_lib.scala 338:36] + _T_344[19] <= _T_455 @[el2_lib.scala 338:30] + node _T_456 = bits(ifu_bus_rdata_ff, 37, 37) @[el2_lib.scala 340:36] + _T_346[11] <= _T_456 @[el2_lib.scala 340:30] + node _T_457 = bits(ifu_bus_rdata_ff, 38, 38) @[el2_lib.scala 335:36] + _T_341[21] <= _T_457 @[el2_lib.scala 335:30] + node _T_458 = bits(ifu_bus_rdata_ff, 38, 38) @[el2_lib.scala 337:36] + _T_343[20] <= _T_458 @[el2_lib.scala 337:30] + node _T_459 = bits(ifu_bus_rdata_ff, 38, 38) @[el2_lib.scala 338:36] + _T_344[20] <= _T_459 @[el2_lib.scala 338:30] + node _T_460 = bits(ifu_bus_rdata_ff, 38, 38) @[el2_lib.scala 340:36] + _T_346[12] <= _T_460 @[el2_lib.scala 340:30] + node _T_461 = bits(ifu_bus_rdata_ff, 39, 39) @[el2_lib.scala 336:36] + _T_342[21] <= _T_461 @[el2_lib.scala 336:30] + node _T_462 = bits(ifu_bus_rdata_ff, 39, 39) @[el2_lib.scala 337:36] + _T_343[21] <= _T_462 @[el2_lib.scala 337:30] + node _T_463 = bits(ifu_bus_rdata_ff, 39, 39) @[el2_lib.scala 338:36] + _T_344[21] <= _T_463 @[el2_lib.scala 338:30] + node _T_464 = bits(ifu_bus_rdata_ff, 39, 39) @[el2_lib.scala 340:36] + _T_346[13] <= _T_464 @[el2_lib.scala 340:30] + node _T_465 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 335:36] + _T_341[22] <= _T_465 @[el2_lib.scala 335:30] + node _T_466 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 336:36] + _T_342[22] <= _T_466 @[el2_lib.scala 336:30] + node _T_467 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 337:36] + _T_343[22] <= _T_467 @[el2_lib.scala 337:30] + node _T_468 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 338:36] + _T_344[22] <= _T_468 @[el2_lib.scala 338:30] + node _T_469 = bits(ifu_bus_rdata_ff, 40, 40) @[el2_lib.scala 340:36] + _T_346[14] <= _T_469 @[el2_lib.scala 340:30] + node _T_470 = bits(ifu_bus_rdata_ff, 41, 41) @[el2_lib.scala 339:36] + _T_345[15] <= _T_470 @[el2_lib.scala 339:30] + node _T_471 = bits(ifu_bus_rdata_ff, 41, 41) @[el2_lib.scala 340:36] + _T_346[15] <= _T_471 @[el2_lib.scala 340:30] + node _T_472 = bits(ifu_bus_rdata_ff, 42, 42) @[el2_lib.scala 335:36] + _T_341[23] <= _T_472 @[el2_lib.scala 335:30] + node _T_473 = bits(ifu_bus_rdata_ff, 42, 42) @[el2_lib.scala 339:36] + _T_345[16] <= _T_473 @[el2_lib.scala 339:30] + node _T_474 = bits(ifu_bus_rdata_ff, 42, 42) @[el2_lib.scala 340:36] + _T_346[16] <= _T_474 @[el2_lib.scala 340:30] + node _T_475 = bits(ifu_bus_rdata_ff, 43, 43) @[el2_lib.scala 336:36] + _T_342[23] <= _T_475 @[el2_lib.scala 336:30] + node _T_476 = bits(ifu_bus_rdata_ff, 43, 43) @[el2_lib.scala 339:36] + _T_345[17] <= _T_476 @[el2_lib.scala 339:30] + node _T_477 = bits(ifu_bus_rdata_ff, 43, 43) @[el2_lib.scala 340:36] + _T_346[17] <= _T_477 @[el2_lib.scala 340:30] + node _T_478 = bits(ifu_bus_rdata_ff, 44, 44) @[el2_lib.scala 335:36] + _T_341[24] <= _T_478 @[el2_lib.scala 335:30] + node _T_479 = bits(ifu_bus_rdata_ff, 44, 44) @[el2_lib.scala 336:36] + _T_342[24] <= _T_479 @[el2_lib.scala 336:30] + node _T_480 = bits(ifu_bus_rdata_ff, 44, 44) @[el2_lib.scala 339:36] + _T_345[18] <= _T_480 @[el2_lib.scala 339:30] + node _T_481 = bits(ifu_bus_rdata_ff, 44, 44) @[el2_lib.scala 340:36] + _T_346[18] <= _T_481 @[el2_lib.scala 340:30] + node _T_482 = bits(ifu_bus_rdata_ff, 45, 45) @[el2_lib.scala 337:36] + _T_343[23] <= _T_482 @[el2_lib.scala 337:30] + node _T_483 = bits(ifu_bus_rdata_ff, 45, 45) @[el2_lib.scala 339:36] + _T_345[19] <= _T_483 @[el2_lib.scala 339:30] + node _T_484 = bits(ifu_bus_rdata_ff, 45, 45) @[el2_lib.scala 340:36] + _T_346[19] <= _T_484 @[el2_lib.scala 340:30] + node _T_485 = bits(ifu_bus_rdata_ff, 46, 46) @[el2_lib.scala 335:36] + _T_341[25] <= _T_485 @[el2_lib.scala 335:30] + node _T_486 = bits(ifu_bus_rdata_ff, 46, 46) @[el2_lib.scala 337:36] + _T_343[24] <= _T_486 @[el2_lib.scala 337:30] + node _T_487 = bits(ifu_bus_rdata_ff, 46, 46) @[el2_lib.scala 339:36] + _T_345[20] <= _T_487 @[el2_lib.scala 339:30] + node _T_488 = bits(ifu_bus_rdata_ff, 46, 46) @[el2_lib.scala 340:36] + _T_346[20] <= _T_488 @[el2_lib.scala 340:30] + node _T_489 = bits(ifu_bus_rdata_ff, 47, 47) @[el2_lib.scala 336:36] + _T_342[25] <= _T_489 @[el2_lib.scala 336:30] + node _T_490 = bits(ifu_bus_rdata_ff, 47, 47) @[el2_lib.scala 337:36] + _T_343[25] <= _T_490 @[el2_lib.scala 337:30] + node _T_491 = bits(ifu_bus_rdata_ff, 47, 47) @[el2_lib.scala 339:36] + _T_345[21] <= _T_491 @[el2_lib.scala 339:30] + node _T_492 = bits(ifu_bus_rdata_ff, 47, 47) @[el2_lib.scala 340:36] + _T_346[21] <= _T_492 @[el2_lib.scala 340:30] + node _T_493 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 335:36] + _T_341[26] <= _T_493 @[el2_lib.scala 335:30] + node _T_494 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 336:36] + _T_342[26] <= _T_494 @[el2_lib.scala 336:30] + node _T_495 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 337:36] + _T_343[26] <= _T_495 @[el2_lib.scala 337:30] + node _T_496 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 339:36] + _T_345[22] <= _T_496 @[el2_lib.scala 339:30] + node _T_497 = bits(ifu_bus_rdata_ff, 48, 48) @[el2_lib.scala 340:36] + _T_346[22] <= _T_497 @[el2_lib.scala 340:30] + node _T_498 = bits(ifu_bus_rdata_ff, 49, 49) @[el2_lib.scala 338:36] + _T_344[23] <= _T_498 @[el2_lib.scala 338:30] + node _T_499 = bits(ifu_bus_rdata_ff, 49, 49) @[el2_lib.scala 339:36] + _T_345[23] <= _T_499 @[el2_lib.scala 339:30] + node _T_500 = bits(ifu_bus_rdata_ff, 49, 49) @[el2_lib.scala 340:36] + _T_346[23] <= _T_500 @[el2_lib.scala 340:30] + node _T_501 = bits(ifu_bus_rdata_ff, 50, 50) @[el2_lib.scala 335:36] + _T_341[27] <= _T_501 @[el2_lib.scala 335:30] + node _T_502 = bits(ifu_bus_rdata_ff, 50, 50) @[el2_lib.scala 338:36] + _T_344[24] <= _T_502 @[el2_lib.scala 338:30] + node _T_503 = bits(ifu_bus_rdata_ff, 50, 50) @[el2_lib.scala 339:36] + _T_345[24] <= _T_503 @[el2_lib.scala 339:30] + node _T_504 = bits(ifu_bus_rdata_ff, 50, 50) @[el2_lib.scala 340:36] + _T_346[24] <= _T_504 @[el2_lib.scala 340:30] + node _T_505 = bits(ifu_bus_rdata_ff, 51, 51) @[el2_lib.scala 336:36] + _T_342[27] <= _T_505 @[el2_lib.scala 336:30] + node _T_506 = bits(ifu_bus_rdata_ff, 51, 51) @[el2_lib.scala 338:36] + _T_344[25] <= _T_506 @[el2_lib.scala 338:30] + node _T_507 = bits(ifu_bus_rdata_ff, 51, 51) @[el2_lib.scala 339:36] + _T_345[25] <= _T_507 @[el2_lib.scala 339:30] + node _T_508 = bits(ifu_bus_rdata_ff, 51, 51) @[el2_lib.scala 340:36] + _T_346[25] <= _T_508 @[el2_lib.scala 340:30] + node _T_509 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 335:36] + _T_341[28] <= _T_509 @[el2_lib.scala 335:30] + node _T_510 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 336:36] + _T_342[28] <= _T_510 @[el2_lib.scala 336:30] + node _T_511 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 338:36] + _T_344[26] <= _T_511 @[el2_lib.scala 338:30] + node _T_512 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 339:36] + _T_345[26] <= _T_512 @[el2_lib.scala 339:30] + node _T_513 = bits(ifu_bus_rdata_ff, 52, 52) @[el2_lib.scala 340:36] + _T_346[26] <= _T_513 @[el2_lib.scala 340:30] + node _T_514 = bits(ifu_bus_rdata_ff, 53, 53) @[el2_lib.scala 337:36] + _T_343[27] <= _T_514 @[el2_lib.scala 337:30] + node _T_515 = bits(ifu_bus_rdata_ff, 53, 53) @[el2_lib.scala 338:36] + _T_344[27] <= _T_515 @[el2_lib.scala 338:30] + node _T_516 = bits(ifu_bus_rdata_ff, 53, 53) @[el2_lib.scala 339:36] + _T_345[27] <= _T_516 @[el2_lib.scala 339:30] + node _T_517 = bits(ifu_bus_rdata_ff, 53, 53) @[el2_lib.scala 340:36] + _T_346[27] <= _T_517 @[el2_lib.scala 340:30] + node _T_518 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 335:36] + _T_341[29] <= _T_518 @[el2_lib.scala 335:30] + node _T_519 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 337:36] + _T_343[28] <= _T_519 @[el2_lib.scala 337:30] + node _T_520 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 338:36] + _T_344[28] <= _T_520 @[el2_lib.scala 338:30] + node _T_521 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 339:36] + _T_345[28] <= _T_521 @[el2_lib.scala 339:30] + node _T_522 = bits(ifu_bus_rdata_ff, 54, 54) @[el2_lib.scala 340:36] + _T_346[28] <= _T_522 @[el2_lib.scala 340:30] + node _T_523 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 336:36] + _T_342[29] <= _T_523 @[el2_lib.scala 336:30] + node _T_524 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 337:36] + _T_343[29] <= _T_524 @[el2_lib.scala 337:30] + node _T_525 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 338:36] + _T_344[29] <= _T_525 @[el2_lib.scala 338:30] + node _T_526 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 339:36] + _T_345[29] <= _T_526 @[el2_lib.scala 339:30] + node _T_527 = bits(ifu_bus_rdata_ff, 55, 55) @[el2_lib.scala 340:36] + _T_346[29] <= _T_527 @[el2_lib.scala 340:30] + node _T_528 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 335:36] + _T_341[30] <= _T_528 @[el2_lib.scala 335:30] + node _T_529 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 336:36] + _T_342[30] <= _T_529 @[el2_lib.scala 336:30] + node _T_530 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 337:36] + _T_343[30] <= _T_530 @[el2_lib.scala 337:30] + node _T_531 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 338:36] + _T_344[30] <= _T_531 @[el2_lib.scala 338:30] + node _T_532 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 339:36] + _T_345[30] <= _T_532 @[el2_lib.scala 339:30] + node _T_533 = bits(ifu_bus_rdata_ff, 56, 56) @[el2_lib.scala 340:36] + _T_346[30] <= _T_533 @[el2_lib.scala 340:30] + node _T_534 = bits(ifu_bus_rdata_ff, 57, 57) @[el2_lib.scala 335:36] + _T_341[31] <= _T_534 @[el2_lib.scala 335:30] + node _T_535 = bits(ifu_bus_rdata_ff, 57, 57) @[el2_lib.scala 341:36] + _T_347[0] <= _T_535 @[el2_lib.scala 341:30] + node _T_536 = bits(ifu_bus_rdata_ff, 58, 58) @[el2_lib.scala 336:36] + _T_342[31] <= _T_536 @[el2_lib.scala 336:30] + node _T_537 = bits(ifu_bus_rdata_ff, 58, 58) @[el2_lib.scala 341:36] + _T_347[1] <= _T_537 @[el2_lib.scala 341:30] + node _T_538 = bits(ifu_bus_rdata_ff, 59, 59) @[el2_lib.scala 335:36] + _T_341[32] <= _T_538 @[el2_lib.scala 335:30] + node _T_539 = bits(ifu_bus_rdata_ff, 59, 59) @[el2_lib.scala 336:36] + _T_342[32] <= _T_539 @[el2_lib.scala 336:30] + node _T_540 = bits(ifu_bus_rdata_ff, 59, 59) @[el2_lib.scala 341:36] + _T_347[2] <= _T_540 @[el2_lib.scala 341:30] + node _T_541 = bits(ifu_bus_rdata_ff, 60, 60) @[el2_lib.scala 337:36] + _T_343[31] <= _T_541 @[el2_lib.scala 337:30] + node _T_542 = bits(ifu_bus_rdata_ff, 60, 60) @[el2_lib.scala 341:36] + _T_347[3] <= _T_542 @[el2_lib.scala 341:30] + node _T_543 = bits(ifu_bus_rdata_ff, 61, 61) @[el2_lib.scala 335:36] + _T_341[33] <= _T_543 @[el2_lib.scala 335:30] + node _T_544 = bits(ifu_bus_rdata_ff, 61, 61) @[el2_lib.scala 337:36] + _T_343[32] <= _T_544 @[el2_lib.scala 337:30] + node _T_545 = bits(ifu_bus_rdata_ff, 61, 61) @[el2_lib.scala 341:36] + _T_347[4] <= _T_545 @[el2_lib.scala 341:30] + node _T_546 = bits(ifu_bus_rdata_ff, 62, 62) @[el2_lib.scala 336:36] + _T_342[33] <= _T_546 @[el2_lib.scala 336:30] + node _T_547 = bits(ifu_bus_rdata_ff, 62, 62) @[el2_lib.scala 337:36] + _T_343[33] <= _T_547 @[el2_lib.scala 337:30] + node _T_548 = bits(ifu_bus_rdata_ff, 62, 62) @[el2_lib.scala 341:36] + _T_347[5] <= _T_548 @[el2_lib.scala 341:30] + node _T_549 = bits(ifu_bus_rdata_ff, 63, 63) @[el2_lib.scala 335:36] + _T_341[34] <= _T_549 @[el2_lib.scala 335:30] + node _T_550 = bits(ifu_bus_rdata_ff, 63, 63) @[el2_lib.scala 336:36] + _T_342[34] <= _T_550 @[el2_lib.scala 336:30] + node _T_551 = bits(ifu_bus_rdata_ff, 63, 63) @[el2_lib.scala 337:36] + _T_343[34] <= _T_551 @[el2_lib.scala 337:30] + node _T_552 = bits(ifu_bus_rdata_ff, 63, 63) @[el2_lib.scala 341:36] + _T_347[6] <= _T_552 @[el2_lib.scala 341:30] + node _T_553 = cat(_T_341[1], _T_341[0]) @[el2_lib.scala 343:27] + node _T_554 = cat(_T_341[3], _T_341[2]) @[el2_lib.scala 343:27] + node _T_555 = cat(_T_554, _T_553) @[el2_lib.scala 343:27] + node _T_556 = cat(_T_341[5], _T_341[4]) @[el2_lib.scala 343:27] + node _T_557 = cat(_T_341[7], _T_341[6]) @[el2_lib.scala 343:27] + node _T_558 = cat(_T_557, _T_556) @[el2_lib.scala 343:27] + node _T_559 = cat(_T_558, _T_555) @[el2_lib.scala 343:27] + node _T_560 = cat(_T_341[9], _T_341[8]) @[el2_lib.scala 343:27] + node _T_561 = cat(_T_341[11], _T_341[10]) @[el2_lib.scala 343:27] + node _T_562 = cat(_T_561, _T_560) @[el2_lib.scala 343:27] + node _T_563 = cat(_T_341[13], _T_341[12]) @[el2_lib.scala 343:27] + node _T_564 = cat(_T_341[16], _T_341[15]) @[el2_lib.scala 343:27] + node _T_565 = cat(_T_564, _T_341[14]) @[el2_lib.scala 343:27] + node _T_566 = cat(_T_565, _T_563) @[el2_lib.scala 343:27] + node _T_567 = cat(_T_566, _T_562) @[el2_lib.scala 343:27] + node _T_568 = cat(_T_567, _T_559) @[el2_lib.scala 343:27] + node _T_569 = cat(_T_341[18], _T_341[17]) @[el2_lib.scala 343:27] + node _T_570 = cat(_T_341[20], _T_341[19]) @[el2_lib.scala 343:27] node _T_571 = cat(_T_570, _T_569) @[el2_lib.scala 343:27] - node _T_572 = cat(_T_333[31], _T_333[30]) @[el2_lib.scala 343:27] - node _T_573 = cat(_T_333[34], _T_333[33]) @[el2_lib.scala 343:27] - node _T_574 = cat(_T_573, _T_333[32]) @[el2_lib.scala 343:27] + node _T_572 = cat(_T_341[22], _T_341[21]) @[el2_lib.scala 343:27] + node _T_573 = cat(_T_341[25], _T_341[24]) @[el2_lib.scala 343:27] + node _T_574 = cat(_T_573, _T_341[23]) @[el2_lib.scala 343:27] node _T_575 = cat(_T_574, _T_572) @[el2_lib.scala 343:27] node _T_576 = cat(_T_575, _T_571) @[el2_lib.scala 343:27] - node _T_577 = cat(_T_576, _T_568) @[el2_lib.scala 343:27] - node _T_578 = cat(_T_577, _T_560) @[el2_lib.scala 343:27] - node _T_579 = xorr(_T_578) @[el2_lib.scala 343:34] - node _T_580 = cat(_T_334[1], _T_334[0]) @[el2_lib.scala 343:44] - node _T_581 = cat(_T_334[3], _T_334[2]) @[el2_lib.scala 343:44] - node _T_582 = cat(_T_581, _T_580) @[el2_lib.scala 343:44] - node _T_583 = cat(_T_334[5], _T_334[4]) @[el2_lib.scala 343:44] - node _T_584 = cat(_T_334[7], _T_334[6]) @[el2_lib.scala 343:44] - node _T_585 = cat(_T_584, _T_583) @[el2_lib.scala 343:44] - node _T_586 = cat(_T_585, _T_582) @[el2_lib.scala 343:44] - node _T_587 = cat(_T_334[9], _T_334[8]) @[el2_lib.scala 343:44] - node _T_588 = cat(_T_334[11], _T_334[10]) @[el2_lib.scala 343:44] - node _T_589 = cat(_T_588, _T_587) @[el2_lib.scala 343:44] - node _T_590 = cat(_T_334[13], _T_334[12]) @[el2_lib.scala 343:44] - node _T_591 = cat(_T_334[16], _T_334[15]) @[el2_lib.scala 343:44] - node _T_592 = cat(_T_591, _T_334[14]) @[el2_lib.scala 343:44] - node _T_593 = cat(_T_592, _T_590) @[el2_lib.scala 343:44] - node _T_594 = cat(_T_593, _T_589) @[el2_lib.scala 343:44] - node _T_595 = cat(_T_594, _T_586) @[el2_lib.scala 343:44] - node _T_596 = cat(_T_334[18], _T_334[17]) @[el2_lib.scala 343:44] - node _T_597 = cat(_T_334[20], _T_334[19]) @[el2_lib.scala 343:44] - node _T_598 = cat(_T_597, _T_596) @[el2_lib.scala 343:44] - node _T_599 = cat(_T_334[22], _T_334[21]) @[el2_lib.scala 343:44] - node _T_600 = cat(_T_334[25], _T_334[24]) @[el2_lib.scala 343:44] - node _T_601 = cat(_T_600, _T_334[23]) @[el2_lib.scala 343:44] - node _T_602 = cat(_T_601, _T_599) @[el2_lib.scala 343:44] - node _T_603 = cat(_T_602, _T_598) @[el2_lib.scala 343:44] - node _T_604 = cat(_T_334[27], _T_334[26]) @[el2_lib.scala 343:44] - node _T_605 = cat(_T_334[29], _T_334[28]) @[el2_lib.scala 343:44] + node _T_577 = cat(_T_341[27], _T_341[26]) @[el2_lib.scala 343:27] + node _T_578 = cat(_T_341[29], _T_341[28]) @[el2_lib.scala 343:27] + node _T_579 = cat(_T_578, _T_577) @[el2_lib.scala 343:27] + node _T_580 = cat(_T_341[31], _T_341[30]) @[el2_lib.scala 343:27] + node _T_581 = cat(_T_341[34], _T_341[33]) @[el2_lib.scala 343:27] + node _T_582 = cat(_T_581, _T_341[32]) @[el2_lib.scala 343:27] + node _T_583 = cat(_T_582, _T_580) @[el2_lib.scala 343:27] + node _T_584 = cat(_T_583, _T_579) @[el2_lib.scala 343:27] + node _T_585 = cat(_T_584, _T_576) @[el2_lib.scala 343:27] + node _T_586 = cat(_T_585, _T_568) @[el2_lib.scala 343:27] + node _T_587 = xorr(_T_586) @[el2_lib.scala 343:34] + node _T_588 = cat(_T_342[1], _T_342[0]) @[el2_lib.scala 343:44] + node _T_589 = cat(_T_342[3], _T_342[2]) @[el2_lib.scala 343:44] + node _T_590 = cat(_T_589, _T_588) @[el2_lib.scala 343:44] + node _T_591 = cat(_T_342[5], _T_342[4]) @[el2_lib.scala 343:44] + node _T_592 = cat(_T_342[7], _T_342[6]) @[el2_lib.scala 343:44] + node _T_593 = cat(_T_592, _T_591) @[el2_lib.scala 343:44] + node _T_594 = cat(_T_593, _T_590) @[el2_lib.scala 343:44] + node _T_595 = cat(_T_342[9], _T_342[8]) @[el2_lib.scala 343:44] + node _T_596 = cat(_T_342[11], _T_342[10]) @[el2_lib.scala 343:44] + node _T_597 = cat(_T_596, _T_595) @[el2_lib.scala 343:44] + node _T_598 = cat(_T_342[13], _T_342[12]) @[el2_lib.scala 343:44] + node _T_599 = cat(_T_342[16], _T_342[15]) @[el2_lib.scala 343:44] + node _T_600 = cat(_T_599, _T_342[14]) @[el2_lib.scala 343:44] + node _T_601 = cat(_T_600, _T_598) @[el2_lib.scala 343:44] + node _T_602 = cat(_T_601, _T_597) @[el2_lib.scala 343:44] + node _T_603 = cat(_T_602, _T_594) @[el2_lib.scala 343:44] + node _T_604 = cat(_T_342[18], _T_342[17]) @[el2_lib.scala 343:44] + node _T_605 = cat(_T_342[20], _T_342[19]) @[el2_lib.scala 343:44] node _T_606 = cat(_T_605, _T_604) @[el2_lib.scala 343:44] - node _T_607 = cat(_T_334[31], _T_334[30]) @[el2_lib.scala 343:44] - node _T_608 = cat(_T_334[34], _T_334[33]) @[el2_lib.scala 343:44] - node _T_609 = cat(_T_608, _T_334[32]) @[el2_lib.scala 343:44] + node _T_607 = cat(_T_342[22], _T_342[21]) @[el2_lib.scala 343:44] + node _T_608 = cat(_T_342[25], _T_342[24]) @[el2_lib.scala 343:44] + node _T_609 = cat(_T_608, _T_342[23]) @[el2_lib.scala 343:44] node _T_610 = cat(_T_609, _T_607) @[el2_lib.scala 343:44] node _T_611 = cat(_T_610, _T_606) @[el2_lib.scala 343:44] - node _T_612 = cat(_T_611, _T_603) @[el2_lib.scala 343:44] - node _T_613 = cat(_T_612, _T_595) @[el2_lib.scala 343:44] - node _T_614 = xorr(_T_613) @[el2_lib.scala 343:51] - node _T_615 = cat(_T_335[1], _T_335[0]) @[el2_lib.scala 343:61] - node _T_616 = cat(_T_335[3], _T_335[2]) @[el2_lib.scala 343:61] - node _T_617 = cat(_T_616, _T_615) @[el2_lib.scala 343:61] - node _T_618 = cat(_T_335[5], _T_335[4]) @[el2_lib.scala 343:61] - node _T_619 = cat(_T_335[7], _T_335[6]) @[el2_lib.scala 343:61] - node _T_620 = cat(_T_619, _T_618) @[el2_lib.scala 343:61] - node _T_621 = cat(_T_620, _T_617) @[el2_lib.scala 343:61] - node _T_622 = cat(_T_335[9], _T_335[8]) @[el2_lib.scala 343:61] - node _T_623 = cat(_T_335[11], _T_335[10]) @[el2_lib.scala 343:61] - node _T_624 = cat(_T_623, _T_622) @[el2_lib.scala 343:61] - node _T_625 = cat(_T_335[13], _T_335[12]) @[el2_lib.scala 343:61] - node _T_626 = cat(_T_335[16], _T_335[15]) @[el2_lib.scala 343:61] - node _T_627 = cat(_T_626, _T_335[14]) @[el2_lib.scala 343:61] - node _T_628 = cat(_T_627, _T_625) @[el2_lib.scala 343:61] - node _T_629 = cat(_T_628, _T_624) @[el2_lib.scala 343:61] - node _T_630 = cat(_T_629, _T_621) @[el2_lib.scala 343:61] - node _T_631 = cat(_T_335[18], _T_335[17]) @[el2_lib.scala 343:61] - node _T_632 = cat(_T_335[20], _T_335[19]) @[el2_lib.scala 343:61] - node _T_633 = cat(_T_632, _T_631) @[el2_lib.scala 343:61] - node _T_634 = cat(_T_335[22], _T_335[21]) @[el2_lib.scala 343:61] - node _T_635 = cat(_T_335[25], _T_335[24]) @[el2_lib.scala 343:61] - node _T_636 = cat(_T_635, _T_335[23]) @[el2_lib.scala 343:61] - node _T_637 = cat(_T_636, _T_634) @[el2_lib.scala 343:61] - node _T_638 = cat(_T_637, _T_633) @[el2_lib.scala 343:61] - node _T_639 = cat(_T_335[27], _T_335[26]) @[el2_lib.scala 343:61] - node _T_640 = cat(_T_335[29], _T_335[28]) @[el2_lib.scala 343:61] + node _T_612 = cat(_T_342[27], _T_342[26]) @[el2_lib.scala 343:44] + node _T_613 = cat(_T_342[29], _T_342[28]) @[el2_lib.scala 343:44] + node _T_614 = cat(_T_613, _T_612) @[el2_lib.scala 343:44] + node _T_615 = cat(_T_342[31], _T_342[30]) @[el2_lib.scala 343:44] + node _T_616 = cat(_T_342[34], _T_342[33]) @[el2_lib.scala 343:44] + node _T_617 = cat(_T_616, _T_342[32]) @[el2_lib.scala 343:44] + node _T_618 = cat(_T_617, _T_615) @[el2_lib.scala 343:44] + node _T_619 = cat(_T_618, _T_614) @[el2_lib.scala 343:44] + node _T_620 = cat(_T_619, _T_611) @[el2_lib.scala 343:44] + node _T_621 = cat(_T_620, _T_603) @[el2_lib.scala 343:44] + node _T_622 = xorr(_T_621) @[el2_lib.scala 343:51] + node _T_623 = cat(_T_343[1], _T_343[0]) @[el2_lib.scala 343:61] + node _T_624 = cat(_T_343[3], _T_343[2]) @[el2_lib.scala 343:61] + node _T_625 = cat(_T_624, _T_623) @[el2_lib.scala 343:61] + node _T_626 = cat(_T_343[5], _T_343[4]) @[el2_lib.scala 343:61] + node _T_627 = cat(_T_343[7], _T_343[6]) @[el2_lib.scala 343:61] + node _T_628 = cat(_T_627, _T_626) @[el2_lib.scala 343:61] + node _T_629 = cat(_T_628, _T_625) @[el2_lib.scala 343:61] + node _T_630 = cat(_T_343[9], _T_343[8]) @[el2_lib.scala 343:61] + node _T_631 = cat(_T_343[11], _T_343[10]) @[el2_lib.scala 343:61] + node _T_632 = cat(_T_631, _T_630) @[el2_lib.scala 343:61] + node _T_633 = cat(_T_343[13], _T_343[12]) @[el2_lib.scala 343:61] + node _T_634 = cat(_T_343[16], _T_343[15]) @[el2_lib.scala 343:61] + node _T_635 = cat(_T_634, _T_343[14]) @[el2_lib.scala 343:61] + node _T_636 = cat(_T_635, _T_633) @[el2_lib.scala 343:61] + node _T_637 = cat(_T_636, _T_632) @[el2_lib.scala 343:61] + node _T_638 = cat(_T_637, _T_629) @[el2_lib.scala 343:61] + node _T_639 = cat(_T_343[18], _T_343[17]) @[el2_lib.scala 343:61] + node _T_640 = cat(_T_343[20], _T_343[19]) @[el2_lib.scala 343:61] node _T_641 = cat(_T_640, _T_639) @[el2_lib.scala 343:61] - node _T_642 = cat(_T_335[31], _T_335[30]) @[el2_lib.scala 343:61] - node _T_643 = cat(_T_335[34], _T_335[33]) @[el2_lib.scala 343:61] - node _T_644 = cat(_T_643, _T_335[32]) @[el2_lib.scala 343:61] + node _T_642 = cat(_T_343[22], _T_343[21]) @[el2_lib.scala 343:61] + node _T_643 = cat(_T_343[25], _T_343[24]) @[el2_lib.scala 343:61] + node _T_644 = cat(_T_643, _T_343[23]) @[el2_lib.scala 343:61] node _T_645 = cat(_T_644, _T_642) @[el2_lib.scala 343:61] node _T_646 = cat(_T_645, _T_641) @[el2_lib.scala 343:61] - node _T_647 = cat(_T_646, _T_638) @[el2_lib.scala 343:61] - node _T_648 = cat(_T_647, _T_630) @[el2_lib.scala 343:61] - node _T_649 = xorr(_T_648) @[el2_lib.scala 343:68] - node _T_650 = cat(_T_336[2], _T_336[1]) @[el2_lib.scala 343:78] - node _T_651 = cat(_T_650, _T_336[0]) @[el2_lib.scala 343:78] - node _T_652 = cat(_T_336[4], _T_336[3]) @[el2_lib.scala 343:78] - node _T_653 = cat(_T_336[6], _T_336[5]) @[el2_lib.scala 343:78] - node _T_654 = cat(_T_653, _T_652) @[el2_lib.scala 343:78] - node _T_655 = cat(_T_654, _T_651) @[el2_lib.scala 343:78] - node _T_656 = cat(_T_336[8], _T_336[7]) @[el2_lib.scala 343:78] - node _T_657 = cat(_T_336[10], _T_336[9]) @[el2_lib.scala 343:78] - node _T_658 = cat(_T_657, _T_656) @[el2_lib.scala 343:78] - node _T_659 = cat(_T_336[12], _T_336[11]) @[el2_lib.scala 343:78] - node _T_660 = cat(_T_336[14], _T_336[13]) @[el2_lib.scala 343:78] - node _T_661 = cat(_T_660, _T_659) @[el2_lib.scala 343:78] - node _T_662 = cat(_T_661, _T_658) @[el2_lib.scala 343:78] - node _T_663 = cat(_T_662, _T_655) @[el2_lib.scala 343:78] - node _T_664 = cat(_T_336[16], _T_336[15]) @[el2_lib.scala 343:78] - node _T_665 = cat(_T_336[18], _T_336[17]) @[el2_lib.scala 343:78] + node _T_647 = cat(_T_343[27], _T_343[26]) @[el2_lib.scala 343:61] + node _T_648 = cat(_T_343[29], _T_343[28]) @[el2_lib.scala 343:61] + node _T_649 = cat(_T_648, _T_647) @[el2_lib.scala 343:61] + node _T_650 = cat(_T_343[31], _T_343[30]) @[el2_lib.scala 343:61] + node _T_651 = cat(_T_343[34], _T_343[33]) @[el2_lib.scala 343:61] + node _T_652 = cat(_T_651, _T_343[32]) @[el2_lib.scala 343:61] + node _T_653 = cat(_T_652, _T_650) @[el2_lib.scala 343:61] + node _T_654 = cat(_T_653, _T_649) @[el2_lib.scala 343:61] + node _T_655 = cat(_T_654, _T_646) @[el2_lib.scala 343:61] + node _T_656 = cat(_T_655, _T_638) @[el2_lib.scala 343:61] + node _T_657 = xorr(_T_656) @[el2_lib.scala 343:68] + node _T_658 = cat(_T_344[2], _T_344[1]) @[el2_lib.scala 343:78] + node _T_659 = cat(_T_658, _T_344[0]) @[el2_lib.scala 343:78] + node _T_660 = cat(_T_344[4], _T_344[3]) @[el2_lib.scala 343:78] + node _T_661 = cat(_T_344[6], _T_344[5]) @[el2_lib.scala 343:78] + node _T_662 = cat(_T_661, _T_660) @[el2_lib.scala 343:78] + node _T_663 = cat(_T_662, _T_659) @[el2_lib.scala 343:78] + node _T_664 = cat(_T_344[8], _T_344[7]) @[el2_lib.scala 343:78] + node _T_665 = cat(_T_344[10], _T_344[9]) @[el2_lib.scala 343:78] node _T_666 = cat(_T_665, _T_664) @[el2_lib.scala 343:78] - node _T_667 = cat(_T_336[20], _T_336[19]) @[el2_lib.scala 343:78] - node _T_668 = cat(_T_336[22], _T_336[21]) @[el2_lib.scala 343:78] + node _T_667 = cat(_T_344[12], _T_344[11]) @[el2_lib.scala 343:78] + node _T_668 = cat(_T_344[14], _T_344[13]) @[el2_lib.scala 343:78] node _T_669 = cat(_T_668, _T_667) @[el2_lib.scala 343:78] node _T_670 = cat(_T_669, _T_666) @[el2_lib.scala 343:78] - node _T_671 = cat(_T_336[24], _T_336[23]) @[el2_lib.scala 343:78] - node _T_672 = cat(_T_336[26], _T_336[25]) @[el2_lib.scala 343:78] - node _T_673 = cat(_T_672, _T_671) @[el2_lib.scala 343:78] - node _T_674 = cat(_T_336[28], _T_336[27]) @[el2_lib.scala 343:78] - node _T_675 = cat(_T_336[30], _T_336[29]) @[el2_lib.scala 343:78] - node _T_676 = cat(_T_675, _T_674) @[el2_lib.scala 343:78] - node _T_677 = cat(_T_676, _T_673) @[el2_lib.scala 343:78] - node _T_678 = cat(_T_677, _T_670) @[el2_lib.scala 343:78] - node _T_679 = cat(_T_678, _T_663) @[el2_lib.scala 343:78] - node _T_680 = xorr(_T_679) @[el2_lib.scala 343:85] - node _T_681 = cat(_T_337[2], _T_337[1]) @[el2_lib.scala 343:95] - node _T_682 = cat(_T_681, _T_337[0]) @[el2_lib.scala 343:95] - node _T_683 = cat(_T_337[4], _T_337[3]) @[el2_lib.scala 343:95] - node _T_684 = cat(_T_337[6], _T_337[5]) @[el2_lib.scala 343:95] - node _T_685 = cat(_T_684, _T_683) @[el2_lib.scala 343:95] - node _T_686 = cat(_T_685, _T_682) @[el2_lib.scala 343:95] - node _T_687 = cat(_T_337[8], _T_337[7]) @[el2_lib.scala 343:95] - node _T_688 = cat(_T_337[10], _T_337[9]) @[el2_lib.scala 343:95] - node _T_689 = cat(_T_688, _T_687) @[el2_lib.scala 343:95] - node _T_690 = cat(_T_337[12], _T_337[11]) @[el2_lib.scala 343:95] - node _T_691 = cat(_T_337[14], _T_337[13]) @[el2_lib.scala 343:95] - node _T_692 = cat(_T_691, _T_690) @[el2_lib.scala 343:95] - node _T_693 = cat(_T_692, _T_689) @[el2_lib.scala 343:95] - node _T_694 = cat(_T_693, _T_686) @[el2_lib.scala 343:95] - node _T_695 = cat(_T_337[16], _T_337[15]) @[el2_lib.scala 343:95] - node _T_696 = cat(_T_337[18], _T_337[17]) @[el2_lib.scala 343:95] + node _T_671 = cat(_T_670, _T_663) @[el2_lib.scala 343:78] + node _T_672 = cat(_T_344[16], _T_344[15]) @[el2_lib.scala 343:78] + node _T_673 = cat(_T_344[18], _T_344[17]) @[el2_lib.scala 343:78] + node _T_674 = cat(_T_673, _T_672) @[el2_lib.scala 343:78] + node _T_675 = cat(_T_344[20], _T_344[19]) @[el2_lib.scala 343:78] + node _T_676 = cat(_T_344[22], _T_344[21]) @[el2_lib.scala 343:78] + node _T_677 = cat(_T_676, _T_675) @[el2_lib.scala 343:78] + node _T_678 = cat(_T_677, _T_674) @[el2_lib.scala 343:78] + node _T_679 = cat(_T_344[24], _T_344[23]) @[el2_lib.scala 343:78] + node _T_680 = cat(_T_344[26], _T_344[25]) @[el2_lib.scala 343:78] + node _T_681 = cat(_T_680, _T_679) @[el2_lib.scala 343:78] + node _T_682 = cat(_T_344[28], _T_344[27]) @[el2_lib.scala 343:78] + node _T_683 = cat(_T_344[30], _T_344[29]) @[el2_lib.scala 343:78] + node _T_684 = cat(_T_683, _T_682) @[el2_lib.scala 343:78] + node _T_685 = cat(_T_684, _T_681) @[el2_lib.scala 343:78] + node _T_686 = cat(_T_685, _T_678) @[el2_lib.scala 343:78] + node _T_687 = cat(_T_686, _T_671) @[el2_lib.scala 343:78] + node _T_688 = xorr(_T_687) @[el2_lib.scala 343:85] + node _T_689 = cat(_T_345[2], _T_345[1]) @[el2_lib.scala 343:95] + node _T_690 = cat(_T_689, _T_345[0]) @[el2_lib.scala 343:95] + node _T_691 = cat(_T_345[4], _T_345[3]) @[el2_lib.scala 343:95] + node _T_692 = cat(_T_345[6], _T_345[5]) @[el2_lib.scala 343:95] + node _T_693 = cat(_T_692, _T_691) @[el2_lib.scala 343:95] + node _T_694 = cat(_T_693, _T_690) @[el2_lib.scala 343:95] + node _T_695 = cat(_T_345[8], _T_345[7]) @[el2_lib.scala 343:95] + node _T_696 = cat(_T_345[10], _T_345[9]) @[el2_lib.scala 343:95] node _T_697 = cat(_T_696, _T_695) @[el2_lib.scala 343:95] - node _T_698 = cat(_T_337[20], _T_337[19]) @[el2_lib.scala 343:95] - node _T_699 = cat(_T_337[22], _T_337[21]) @[el2_lib.scala 343:95] + node _T_698 = cat(_T_345[12], _T_345[11]) @[el2_lib.scala 343:95] + node _T_699 = cat(_T_345[14], _T_345[13]) @[el2_lib.scala 343:95] node _T_700 = cat(_T_699, _T_698) @[el2_lib.scala 343:95] node _T_701 = cat(_T_700, _T_697) @[el2_lib.scala 343:95] - node _T_702 = cat(_T_337[24], _T_337[23]) @[el2_lib.scala 343:95] - node _T_703 = cat(_T_337[26], _T_337[25]) @[el2_lib.scala 343:95] - node _T_704 = cat(_T_703, _T_702) @[el2_lib.scala 343:95] - node _T_705 = cat(_T_337[28], _T_337[27]) @[el2_lib.scala 343:95] - node _T_706 = cat(_T_337[30], _T_337[29]) @[el2_lib.scala 343:95] - node _T_707 = cat(_T_706, _T_705) @[el2_lib.scala 343:95] - node _T_708 = cat(_T_707, _T_704) @[el2_lib.scala 343:95] - node _T_709 = cat(_T_708, _T_701) @[el2_lib.scala 343:95] - node _T_710 = cat(_T_709, _T_694) @[el2_lib.scala 343:95] - node _T_711 = xorr(_T_710) @[el2_lib.scala 343:102] - node _T_712 = cat(_T_338[2], _T_338[1]) @[el2_lib.scala 343:112] - node _T_713 = cat(_T_712, _T_338[0]) @[el2_lib.scala 343:112] - node _T_714 = cat(_T_338[4], _T_338[3]) @[el2_lib.scala 343:112] - node _T_715 = cat(_T_338[6], _T_338[5]) @[el2_lib.scala 343:112] - node _T_716 = cat(_T_715, _T_714) @[el2_lib.scala 343:112] - node _T_717 = cat(_T_716, _T_713) @[el2_lib.scala 343:112] - node _T_718 = cat(_T_338[8], _T_338[7]) @[el2_lib.scala 343:112] - node _T_719 = cat(_T_338[10], _T_338[9]) @[el2_lib.scala 343:112] - node _T_720 = cat(_T_719, _T_718) @[el2_lib.scala 343:112] - node _T_721 = cat(_T_338[12], _T_338[11]) @[el2_lib.scala 343:112] - node _T_722 = cat(_T_338[14], _T_338[13]) @[el2_lib.scala 343:112] - node _T_723 = cat(_T_722, _T_721) @[el2_lib.scala 343:112] - node _T_724 = cat(_T_723, _T_720) @[el2_lib.scala 343:112] - node _T_725 = cat(_T_724, _T_717) @[el2_lib.scala 343:112] - node _T_726 = cat(_T_338[16], _T_338[15]) @[el2_lib.scala 343:112] - node _T_727 = cat(_T_338[18], _T_338[17]) @[el2_lib.scala 343:112] + node _T_702 = cat(_T_701, _T_694) @[el2_lib.scala 343:95] + node _T_703 = cat(_T_345[16], _T_345[15]) @[el2_lib.scala 343:95] + node _T_704 = cat(_T_345[18], _T_345[17]) @[el2_lib.scala 343:95] + node _T_705 = cat(_T_704, _T_703) @[el2_lib.scala 343:95] + node _T_706 = cat(_T_345[20], _T_345[19]) @[el2_lib.scala 343:95] + node _T_707 = cat(_T_345[22], _T_345[21]) @[el2_lib.scala 343:95] + node _T_708 = cat(_T_707, _T_706) @[el2_lib.scala 343:95] + node _T_709 = cat(_T_708, _T_705) @[el2_lib.scala 343:95] + node _T_710 = cat(_T_345[24], _T_345[23]) @[el2_lib.scala 343:95] + node _T_711 = cat(_T_345[26], _T_345[25]) @[el2_lib.scala 343:95] + node _T_712 = cat(_T_711, _T_710) @[el2_lib.scala 343:95] + node _T_713 = cat(_T_345[28], _T_345[27]) @[el2_lib.scala 343:95] + node _T_714 = cat(_T_345[30], _T_345[29]) @[el2_lib.scala 343:95] + node _T_715 = cat(_T_714, _T_713) @[el2_lib.scala 343:95] + node _T_716 = cat(_T_715, _T_712) @[el2_lib.scala 343:95] + node _T_717 = cat(_T_716, _T_709) @[el2_lib.scala 343:95] + node _T_718 = cat(_T_717, _T_702) @[el2_lib.scala 343:95] + node _T_719 = xorr(_T_718) @[el2_lib.scala 343:102] + node _T_720 = cat(_T_346[2], _T_346[1]) @[el2_lib.scala 343:112] + node _T_721 = cat(_T_720, _T_346[0]) @[el2_lib.scala 343:112] + node _T_722 = cat(_T_346[4], _T_346[3]) @[el2_lib.scala 343:112] + node _T_723 = cat(_T_346[6], _T_346[5]) @[el2_lib.scala 343:112] + node _T_724 = cat(_T_723, _T_722) @[el2_lib.scala 343:112] + node _T_725 = cat(_T_724, _T_721) @[el2_lib.scala 343:112] + node _T_726 = cat(_T_346[8], _T_346[7]) @[el2_lib.scala 343:112] + node _T_727 = cat(_T_346[10], _T_346[9]) @[el2_lib.scala 343:112] node _T_728 = cat(_T_727, _T_726) @[el2_lib.scala 343:112] - node _T_729 = cat(_T_338[20], _T_338[19]) @[el2_lib.scala 343:112] - node _T_730 = cat(_T_338[22], _T_338[21]) @[el2_lib.scala 343:112] + node _T_729 = cat(_T_346[12], _T_346[11]) @[el2_lib.scala 343:112] + node _T_730 = cat(_T_346[14], _T_346[13]) @[el2_lib.scala 343:112] node _T_731 = cat(_T_730, _T_729) @[el2_lib.scala 343:112] node _T_732 = cat(_T_731, _T_728) @[el2_lib.scala 343:112] - node _T_733 = cat(_T_338[24], _T_338[23]) @[el2_lib.scala 343:112] - node _T_734 = cat(_T_338[26], _T_338[25]) @[el2_lib.scala 343:112] - node _T_735 = cat(_T_734, _T_733) @[el2_lib.scala 343:112] - node _T_736 = cat(_T_338[28], _T_338[27]) @[el2_lib.scala 343:112] - node _T_737 = cat(_T_338[30], _T_338[29]) @[el2_lib.scala 343:112] - node _T_738 = cat(_T_737, _T_736) @[el2_lib.scala 343:112] - node _T_739 = cat(_T_738, _T_735) @[el2_lib.scala 343:112] - node _T_740 = cat(_T_739, _T_732) @[el2_lib.scala 343:112] - node _T_741 = cat(_T_740, _T_725) @[el2_lib.scala 343:112] - node _T_742 = xorr(_T_741) @[el2_lib.scala 343:119] - node _T_743 = cat(_T_339[2], _T_339[1]) @[el2_lib.scala 343:129] - node _T_744 = cat(_T_743, _T_339[0]) @[el2_lib.scala 343:129] - node _T_745 = cat(_T_339[4], _T_339[3]) @[el2_lib.scala 343:129] - node _T_746 = cat(_T_339[6], _T_339[5]) @[el2_lib.scala 343:129] - node _T_747 = cat(_T_746, _T_745) @[el2_lib.scala 343:129] - node _T_748 = cat(_T_747, _T_744) @[el2_lib.scala 343:129] - node _T_749 = xorr(_T_748) @[el2_lib.scala 343:136] - node _T_750 = cat(_T_711, _T_742) @[Cat.scala 29:58] - node _T_751 = cat(_T_750, _T_749) @[Cat.scala 29:58] - node _T_752 = cat(_T_649, _T_680) @[Cat.scala 29:58] - node _T_753 = cat(_T_579, _T_614) @[Cat.scala 29:58] - node _T_754 = cat(_T_753, _T_752) @[Cat.scala 29:58] - node ic_wr_ecc = cat(_T_754, _T_751) @[Cat.scala 29:58] - wire _T_755 : UInt<1>[35] @[el2_lib.scala 322:18] - wire _T_756 : UInt<1>[35] @[el2_lib.scala 323:18] - wire _T_757 : UInt<1>[35] @[el2_lib.scala 324:18] - wire _T_758 : UInt<1>[31] @[el2_lib.scala 325:18] - wire _T_759 : UInt<1>[31] @[el2_lib.scala 326:18] - wire _T_760 : UInt<1>[31] @[el2_lib.scala 327:18] - wire _T_761 : UInt<1>[7] @[el2_lib.scala 328:18] - node _T_762 = bits(ic_miss_buff_half, 0, 0) @[el2_lib.scala 335:36] - _T_755[0] <= _T_762 @[el2_lib.scala 335:30] - node _T_763 = bits(ic_miss_buff_half, 0, 0) @[el2_lib.scala 336:36] - _T_756[0] <= _T_763 @[el2_lib.scala 336:30] - node _T_764 = bits(ic_miss_buff_half, 1, 1) @[el2_lib.scala 335:36] - _T_755[1] <= _T_764 @[el2_lib.scala 335:30] - node _T_765 = bits(ic_miss_buff_half, 1, 1) @[el2_lib.scala 337:36] - _T_757[0] <= _T_765 @[el2_lib.scala 337:30] - node _T_766 = bits(ic_miss_buff_half, 2, 2) @[el2_lib.scala 336:36] - _T_756[1] <= _T_766 @[el2_lib.scala 336:30] - node _T_767 = bits(ic_miss_buff_half, 2, 2) @[el2_lib.scala 337:36] - _T_757[1] <= _T_767 @[el2_lib.scala 337:30] - node _T_768 = bits(ic_miss_buff_half, 3, 3) @[el2_lib.scala 335:36] - _T_755[2] <= _T_768 @[el2_lib.scala 335:30] - node _T_769 = bits(ic_miss_buff_half, 3, 3) @[el2_lib.scala 336:36] - _T_756[2] <= _T_769 @[el2_lib.scala 336:30] - node _T_770 = bits(ic_miss_buff_half, 3, 3) @[el2_lib.scala 337:36] - _T_757[2] <= _T_770 @[el2_lib.scala 337:30] - node _T_771 = bits(ic_miss_buff_half, 4, 4) @[el2_lib.scala 335:36] - _T_755[3] <= _T_771 @[el2_lib.scala 335:30] - node _T_772 = bits(ic_miss_buff_half, 4, 4) @[el2_lib.scala 338:36] - _T_758[0] <= _T_772 @[el2_lib.scala 338:30] - node _T_773 = bits(ic_miss_buff_half, 5, 5) @[el2_lib.scala 336:36] - _T_756[3] <= _T_773 @[el2_lib.scala 336:30] - node _T_774 = bits(ic_miss_buff_half, 5, 5) @[el2_lib.scala 338:36] - _T_758[1] <= _T_774 @[el2_lib.scala 338:30] - node _T_775 = bits(ic_miss_buff_half, 6, 6) @[el2_lib.scala 335:36] - _T_755[4] <= _T_775 @[el2_lib.scala 335:30] - node _T_776 = bits(ic_miss_buff_half, 6, 6) @[el2_lib.scala 336:36] - _T_756[4] <= _T_776 @[el2_lib.scala 336:30] - node _T_777 = bits(ic_miss_buff_half, 6, 6) @[el2_lib.scala 338:36] - _T_758[2] <= _T_777 @[el2_lib.scala 338:30] - node _T_778 = bits(ic_miss_buff_half, 7, 7) @[el2_lib.scala 337:36] - _T_757[3] <= _T_778 @[el2_lib.scala 337:30] - node _T_779 = bits(ic_miss_buff_half, 7, 7) @[el2_lib.scala 338:36] - _T_758[3] <= _T_779 @[el2_lib.scala 338:30] - node _T_780 = bits(ic_miss_buff_half, 8, 8) @[el2_lib.scala 335:36] - _T_755[5] <= _T_780 @[el2_lib.scala 335:30] - node _T_781 = bits(ic_miss_buff_half, 8, 8) @[el2_lib.scala 337:36] - _T_757[4] <= _T_781 @[el2_lib.scala 337:30] - node _T_782 = bits(ic_miss_buff_half, 8, 8) @[el2_lib.scala 338:36] - _T_758[4] <= _T_782 @[el2_lib.scala 338:30] - node _T_783 = bits(ic_miss_buff_half, 9, 9) @[el2_lib.scala 336:36] - _T_756[5] <= _T_783 @[el2_lib.scala 336:30] - node _T_784 = bits(ic_miss_buff_half, 9, 9) @[el2_lib.scala 337:36] - _T_757[5] <= _T_784 @[el2_lib.scala 337:30] - node _T_785 = bits(ic_miss_buff_half, 9, 9) @[el2_lib.scala 338:36] - _T_758[5] <= _T_785 @[el2_lib.scala 338:30] - node _T_786 = bits(ic_miss_buff_half, 10, 10) @[el2_lib.scala 335:36] - _T_755[6] <= _T_786 @[el2_lib.scala 335:30] - node _T_787 = bits(ic_miss_buff_half, 10, 10) @[el2_lib.scala 336:36] - _T_756[6] <= _T_787 @[el2_lib.scala 336:30] - node _T_788 = bits(ic_miss_buff_half, 10, 10) @[el2_lib.scala 337:36] - _T_757[6] <= _T_788 @[el2_lib.scala 337:30] - node _T_789 = bits(ic_miss_buff_half, 10, 10) @[el2_lib.scala 338:36] - _T_758[6] <= _T_789 @[el2_lib.scala 338:30] - node _T_790 = bits(ic_miss_buff_half, 11, 11) @[el2_lib.scala 335:36] - _T_755[7] <= _T_790 @[el2_lib.scala 335:30] - node _T_791 = bits(ic_miss_buff_half, 11, 11) @[el2_lib.scala 339:36] - _T_759[0] <= _T_791 @[el2_lib.scala 339:30] - node _T_792 = bits(ic_miss_buff_half, 12, 12) @[el2_lib.scala 336:36] - _T_756[7] <= _T_792 @[el2_lib.scala 336:30] - node _T_793 = bits(ic_miss_buff_half, 12, 12) @[el2_lib.scala 339:36] - _T_759[1] <= _T_793 @[el2_lib.scala 339:30] - node _T_794 = bits(ic_miss_buff_half, 13, 13) @[el2_lib.scala 335:36] - _T_755[8] <= _T_794 @[el2_lib.scala 335:30] - node _T_795 = bits(ic_miss_buff_half, 13, 13) @[el2_lib.scala 336:36] - _T_756[8] <= _T_795 @[el2_lib.scala 336:30] - node _T_796 = bits(ic_miss_buff_half, 13, 13) @[el2_lib.scala 339:36] - _T_759[2] <= _T_796 @[el2_lib.scala 339:30] - node _T_797 = bits(ic_miss_buff_half, 14, 14) @[el2_lib.scala 337:36] - _T_757[7] <= _T_797 @[el2_lib.scala 337:30] - node _T_798 = bits(ic_miss_buff_half, 14, 14) @[el2_lib.scala 339:36] - _T_759[3] <= _T_798 @[el2_lib.scala 339:30] - node _T_799 = bits(ic_miss_buff_half, 15, 15) @[el2_lib.scala 335:36] - _T_755[9] <= _T_799 @[el2_lib.scala 335:30] - node _T_800 = bits(ic_miss_buff_half, 15, 15) @[el2_lib.scala 337:36] - _T_757[8] <= _T_800 @[el2_lib.scala 337:30] - node _T_801 = bits(ic_miss_buff_half, 15, 15) @[el2_lib.scala 339:36] - _T_759[4] <= _T_801 @[el2_lib.scala 339:30] - node _T_802 = bits(ic_miss_buff_half, 16, 16) @[el2_lib.scala 336:36] - _T_756[9] <= _T_802 @[el2_lib.scala 336:30] - node _T_803 = bits(ic_miss_buff_half, 16, 16) @[el2_lib.scala 337:36] - _T_757[9] <= _T_803 @[el2_lib.scala 337:30] - node _T_804 = bits(ic_miss_buff_half, 16, 16) @[el2_lib.scala 339:36] - _T_759[5] <= _T_804 @[el2_lib.scala 339:30] - node _T_805 = bits(ic_miss_buff_half, 17, 17) @[el2_lib.scala 335:36] - _T_755[10] <= _T_805 @[el2_lib.scala 335:30] - node _T_806 = bits(ic_miss_buff_half, 17, 17) @[el2_lib.scala 336:36] - _T_756[10] <= _T_806 @[el2_lib.scala 336:30] - node _T_807 = bits(ic_miss_buff_half, 17, 17) @[el2_lib.scala 337:36] - _T_757[10] <= _T_807 @[el2_lib.scala 337:30] - node _T_808 = bits(ic_miss_buff_half, 17, 17) @[el2_lib.scala 339:36] - _T_759[6] <= _T_808 @[el2_lib.scala 339:30] - node _T_809 = bits(ic_miss_buff_half, 18, 18) @[el2_lib.scala 338:36] - _T_758[7] <= _T_809 @[el2_lib.scala 338:30] - node _T_810 = bits(ic_miss_buff_half, 18, 18) @[el2_lib.scala 339:36] - _T_759[7] <= _T_810 @[el2_lib.scala 339:30] - node _T_811 = bits(ic_miss_buff_half, 19, 19) @[el2_lib.scala 335:36] - _T_755[11] <= _T_811 @[el2_lib.scala 335:30] - node _T_812 = bits(ic_miss_buff_half, 19, 19) @[el2_lib.scala 338:36] - _T_758[8] <= _T_812 @[el2_lib.scala 338:30] - node _T_813 = bits(ic_miss_buff_half, 19, 19) @[el2_lib.scala 339:36] - _T_759[8] <= _T_813 @[el2_lib.scala 339:30] - node _T_814 = bits(ic_miss_buff_half, 20, 20) @[el2_lib.scala 336:36] - _T_756[11] <= _T_814 @[el2_lib.scala 336:30] - node _T_815 = bits(ic_miss_buff_half, 20, 20) @[el2_lib.scala 338:36] - _T_758[9] <= _T_815 @[el2_lib.scala 338:30] - node _T_816 = bits(ic_miss_buff_half, 20, 20) @[el2_lib.scala 339:36] - _T_759[9] <= _T_816 @[el2_lib.scala 339:30] - node _T_817 = bits(ic_miss_buff_half, 21, 21) @[el2_lib.scala 335:36] - _T_755[12] <= _T_817 @[el2_lib.scala 335:30] - node _T_818 = bits(ic_miss_buff_half, 21, 21) @[el2_lib.scala 336:36] - _T_756[12] <= _T_818 @[el2_lib.scala 336:30] - node _T_819 = bits(ic_miss_buff_half, 21, 21) @[el2_lib.scala 338:36] - _T_758[10] <= _T_819 @[el2_lib.scala 338:30] - node _T_820 = bits(ic_miss_buff_half, 21, 21) @[el2_lib.scala 339:36] - _T_759[10] <= _T_820 @[el2_lib.scala 339:30] - node _T_821 = bits(ic_miss_buff_half, 22, 22) @[el2_lib.scala 337:36] - _T_757[11] <= _T_821 @[el2_lib.scala 337:30] - node _T_822 = bits(ic_miss_buff_half, 22, 22) @[el2_lib.scala 338:36] - _T_758[11] <= _T_822 @[el2_lib.scala 338:30] - node _T_823 = bits(ic_miss_buff_half, 22, 22) @[el2_lib.scala 339:36] - _T_759[11] <= _T_823 @[el2_lib.scala 339:30] - node _T_824 = bits(ic_miss_buff_half, 23, 23) @[el2_lib.scala 335:36] - _T_755[13] <= _T_824 @[el2_lib.scala 335:30] - node _T_825 = bits(ic_miss_buff_half, 23, 23) @[el2_lib.scala 337:36] - _T_757[12] <= _T_825 @[el2_lib.scala 337:30] - node _T_826 = bits(ic_miss_buff_half, 23, 23) @[el2_lib.scala 338:36] - _T_758[12] <= _T_826 @[el2_lib.scala 338:30] - node _T_827 = bits(ic_miss_buff_half, 23, 23) @[el2_lib.scala 339:36] - _T_759[12] <= _T_827 @[el2_lib.scala 339:30] - node _T_828 = bits(ic_miss_buff_half, 24, 24) @[el2_lib.scala 336:36] - _T_756[13] <= _T_828 @[el2_lib.scala 336:30] - node _T_829 = bits(ic_miss_buff_half, 24, 24) @[el2_lib.scala 337:36] - _T_757[13] <= _T_829 @[el2_lib.scala 337:30] - node _T_830 = bits(ic_miss_buff_half, 24, 24) @[el2_lib.scala 338:36] - _T_758[13] <= _T_830 @[el2_lib.scala 338:30] - node _T_831 = bits(ic_miss_buff_half, 24, 24) @[el2_lib.scala 339:36] - _T_759[13] <= _T_831 @[el2_lib.scala 339:30] - node _T_832 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 335:36] - _T_755[14] <= _T_832 @[el2_lib.scala 335:30] - node _T_833 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 336:36] - _T_756[14] <= _T_833 @[el2_lib.scala 336:30] - node _T_834 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 337:36] - _T_757[14] <= _T_834 @[el2_lib.scala 337:30] - node _T_835 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 338:36] - _T_758[14] <= _T_835 @[el2_lib.scala 338:30] - node _T_836 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 339:36] - _T_759[14] <= _T_836 @[el2_lib.scala 339:30] - node _T_837 = bits(ic_miss_buff_half, 26, 26) @[el2_lib.scala 335:36] - _T_755[15] <= _T_837 @[el2_lib.scala 335:30] - node _T_838 = bits(ic_miss_buff_half, 26, 26) @[el2_lib.scala 340:36] - _T_760[0] <= _T_838 @[el2_lib.scala 340:30] - node _T_839 = bits(ic_miss_buff_half, 27, 27) @[el2_lib.scala 336:36] - _T_756[15] <= _T_839 @[el2_lib.scala 336:30] - node _T_840 = bits(ic_miss_buff_half, 27, 27) @[el2_lib.scala 340:36] - _T_760[1] <= _T_840 @[el2_lib.scala 340:30] - node _T_841 = bits(ic_miss_buff_half, 28, 28) @[el2_lib.scala 335:36] - _T_755[16] <= _T_841 @[el2_lib.scala 335:30] - node _T_842 = bits(ic_miss_buff_half, 28, 28) @[el2_lib.scala 336:36] - _T_756[16] <= _T_842 @[el2_lib.scala 336:30] - node _T_843 = bits(ic_miss_buff_half, 28, 28) @[el2_lib.scala 340:36] - _T_760[2] <= _T_843 @[el2_lib.scala 340:30] - node _T_844 = bits(ic_miss_buff_half, 29, 29) @[el2_lib.scala 337:36] - _T_757[15] <= _T_844 @[el2_lib.scala 337:30] - node _T_845 = bits(ic_miss_buff_half, 29, 29) @[el2_lib.scala 340:36] - _T_760[3] <= _T_845 @[el2_lib.scala 340:30] - node _T_846 = bits(ic_miss_buff_half, 30, 30) @[el2_lib.scala 335:36] - _T_755[17] <= _T_846 @[el2_lib.scala 335:30] - node _T_847 = bits(ic_miss_buff_half, 30, 30) @[el2_lib.scala 337:36] - _T_757[16] <= _T_847 @[el2_lib.scala 337:30] - node _T_848 = bits(ic_miss_buff_half, 30, 30) @[el2_lib.scala 340:36] - _T_760[4] <= _T_848 @[el2_lib.scala 340:30] - node _T_849 = bits(ic_miss_buff_half, 31, 31) @[el2_lib.scala 336:36] - _T_756[17] <= _T_849 @[el2_lib.scala 336:30] - node _T_850 = bits(ic_miss_buff_half, 31, 31) @[el2_lib.scala 337:36] - _T_757[17] <= _T_850 @[el2_lib.scala 337:30] - node _T_851 = bits(ic_miss_buff_half, 31, 31) @[el2_lib.scala 340:36] - _T_760[5] <= _T_851 @[el2_lib.scala 340:30] - node _T_852 = bits(ic_miss_buff_half, 32, 32) @[el2_lib.scala 335:36] - _T_755[18] <= _T_852 @[el2_lib.scala 335:30] - node _T_853 = bits(ic_miss_buff_half, 32, 32) @[el2_lib.scala 336:36] - _T_756[18] <= _T_853 @[el2_lib.scala 336:30] - node _T_854 = bits(ic_miss_buff_half, 32, 32) @[el2_lib.scala 337:36] - _T_757[18] <= _T_854 @[el2_lib.scala 337:30] - node _T_855 = bits(ic_miss_buff_half, 32, 32) @[el2_lib.scala 340:36] - _T_760[6] <= _T_855 @[el2_lib.scala 340:30] - node _T_856 = bits(ic_miss_buff_half, 33, 33) @[el2_lib.scala 338:36] - _T_758[15] <= _T_856 @[el2_lib.scala 338:30] - node _T_857 = bits(ic_miss_buff_half, 33, 33) @[el2_lib.scala 340:36] - _T_760[7] <= _T_857 @[el2_lib.scala 340:30] - node _T_858 = bits(ic_miss_buff_half, 34, 34) @[el2_lib.scala 335:36] - _T_755[19] <= _T_858 @[el2_lib.scala 335:30] - node _T_859 = bits(ic_miss_buff_half, 34, 34) @[el2_lib.scala 338:36] - _T_758[16] <= _T_859 @[el2_lib.scala 338:30] - node _T_860 = bits(ic_miss_buff_half, 34, 34) @[el2_lib.scala 340:36] - _T_760[8] <= _T_860 @[el2_lib.scala 340:30] - node _T_861 = bits(ic_miss_buff_half, 35, 35) @[el2_lib.scala 336:36] - _T_756[19] <= _T_861 @[el2_lib.scala 336:30] - node _T_862 = bits(ic_miss_buff_half, 35, 35) @[el2_lib.scala 338:36] - _T_758[17] <= _T_862 @[el2_lib.scala 338:30] - node _T_863 = bits(ic_miss_buff_half, 35, 35) @[el2_lib.scala 340:36] - _T_760[9] <= _T_863 @[el2_lib.scala 340:30] - node _T_864 = bits(ic_miss_buff_half, 36, 36) @[el2_lib.scala 335:36] - _T_755[20] <= _T_864 @[el2_lib.scala 335:30] - node _T_865 = bits(ic_miss_buff_half, 36, 36) @[el2_lib.scala 336:36] - _T_756[20] <= _T_865 @[el2_lib.scala 336:30] - node _T_866 = bits(ic_miss_buff_half, 36, 36) @[el2_lib.scala 338:36] - _T_758[18] <= _T_866 @[el2_lib.scala 338:30] - node _T_867 = bits(ic_miss_buff_half, 36, 36) @[el2_lib.scala 340:36] - _T_760[10] <= _T_867 @[el2_lib.scala 340:30] - node _T_868 = bits(ic_miss_buff_half, 37, 37) @[el2_lib.scala 337:36] - _T_757[19] <= _T_868 @[el2_lib.scala 337:30] - node _T_869 = bits(ic_miss_buff_half, 37, 37) @[el2_lib.scala 338:36] - _T_758[19] <= _T_869 @[el2_lib.scala 338:30] - node _T_870 = bits(ic_miss_buff_half, 37, 37) @[el2_lib.scala 340:36] - _T_760[11] <= _T_870 @[el2_lib.scala 340:30] - node _T_871 = bits(ic_miss_buff_half, 38, 38) @[el2_lib.scala 335:36] - _T_755[21] <= _T_871 @[el2_lib.scala 335:30] - node _T_872 = bits(ic_miss_buff_half, 38, 38) @[el2_lib.scala 337:36] - _T_757[20] <= _T_872 @[el2_lib.scala 337:30] - node _T_873 = bits(ic_miss_buff_half, 38, 38) @[el2_lib.scala 338:36] - _T_758[20] <= _T_873 @[el2_lib.scala 338:30] - node _T_874 = bits(ic_miss_buff_half, 38, 38) @[el2_lib.scala 340:36] - _T_760[12] <= _T_874 @[el2_lib.scala 340:30] - node _T_875 = bits(ic_miss_buff_half, 39, 39) @[el2_lib.scala 336:36] - _T_756[21] <= _T_875 @[el2_lib.scala 336:30] - node _T_876 = bits(ic_miss_buff_half, 39, 39) @[el2_lib.scala 337:36] - _T_757[21] <= _T_876 @[el2_lib.scala 337:30] - node _T_877 = bits(ic_miss_buff_half, 39, 39) @[el2_lib.scala 338:36] - _T_758[21] <= _T_877 @[el2_lib.scala 338:30] - node _T_878 = bits(ic_miss_buff_half, 39, 39) @[el2_lib.scala 340:36] - _T_760[13] <= _T_878 @[el2_lib.scala 340:30] - node _T_879 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 335:36] - _T_755[22] <= _T_879 @[el2_lib.scala 335:30] - node _T_880 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 336:36] - _T_756[22] <= _T_880 @[el2_lib.scala 336:30] - node _T_881 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 337:36] - _T_757[22] <= _T_881 @[el2_lib.scala 337:30] - node _T_882 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 338:36] - _T_758[22] <= _T_882 @[el2_lib.scala 338:30] - node _T_883 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 340:36] - _T_760[14] <= _T_883 @[el2_lib.scala 340:30] - node _T_884 = bits(ic_miss_buff_half, 41, 41) @[el2_lib.scala 339:36] - _T_759[15] <= _T_884 @[el2_lib.scala 339:30] - node _T_885 = bits(ic_miss_buff_half, 41, 41) @[el2_lib.scala 340:36] - _T_760[15] <= _T_885 @[el2_lib.scala 340:30] - node _T_886 = bits(ic_miss_buff_half, 42, 42) @[el2_lib.scala 335:36] - _T_755[23] <= _T_886 @[el2_lib.scala 335:30] - node _T_887 = bits(ic_miss_buff_half, 42, 42) @[el2_lib.scala 339:36] - _T_759[16] <= _T_887 @[el2_lib.scala 339:30] - node _T_888 = bits(ic_miss_buff_half, 42, 42) @[el2_lib.scala 340:36] - _T_760[16] <= _T_888 @[el2_lib.scala 340:30] - node _T_889 = bits(ic_miss_buff_half, 43, 43) @[el2_lib.scala 336:36] - _T_756[23] <= _T_889 @[el2_lib.scala 336:30] - node _T_890 = bits(ic_miss_buff_half, 43, 43) @[el2_lib.scala 339:36] - _T_759[17] <= _T_890 @[el2_lib.scala 339:30] - node _T_891 = bits(ic_miss_buff_half, 43, 43) @[el2_lib.scala 340:36] - _T_760[17] <= _T_891 @[el2_lib.scala 340:30] - node _T_892 = bits(ic_miss_buff_half, 44, 44) @[el2_lib.scala 335:36] - _T_755[24] <= _T_892 @[el2_lib.scala 335:30] - node _T_893 = bits(ic_miss_buff_half, 44, 44) @[el2_lib.scala 336:36] - _T_756[24] <= _T_893 @[el2_lib.scala 336:30] - node _T_894 = bits(ic_miss_buff_half, 44, 44) @[el2_lib.scala 339:36] - _T_759[18] <= _T_894 @[el2_lib.scala 339:30] - node _T_895 = bits(ic_miss_buff_half, 44, 44) @[el2_lib.scala 340:36] - _T_760[18] <= _T_895 @[el2_lib.scala 340:30] - node _T_896 = bits(ic_miss_buff_half, 45, 45) @[el2_lib.scala 337:36] - _T_757[23] <= _T_896 @[el2_lib.scala 337:30] - node _T_897 = bits(ic_miss_buff_half, 45, 45) @[el2_lib.scala 339:36] - _T_759[19] <= _T_897 @[el2_lib.scala 339:30] - node _T_898 = bits(ic_miss_buff_half, 45, 45) @[el2_lib.scala 340:36] - _T_760[19] <= _T_898 @[el2_lib.scala 340:30] - node _T_899 = bits(ic_miss_buff_half, 46, 46) @[el2_lib.scala 335:36] - _T_755[25] <= _T_899 @[el2_lib.scala 335:30] - node _T_900 = bits(ic_miss_buff_half, 46, 46) @[el2_lib.scala 337:36] - _T_757[24] <= _T_900 @[el2_lib.scala 337:30] - node _T_901 = bits(ic_miss_buff_half, 46, 46) @[el2_lib.scala 339:36] - _T_759[20] <= _T_901 @[el2_lib.scala 339:30] - node _T_902 = bits(ic_miss_buff_half, 46, 46) @[el2_lib.scala 340:36] - _T_760[20] <= _T_902 @[el2_lib.scala 340:30] - node _T_903 = bits(ic_miss_buff_half, 47, 47) @[el2_lib.scala 336:36] - _T_756[25] <= _T_903 @[el2_lib.scala 336:30] - node _T_904 = bits(ic_miss_buff_half, 47, 47) @[el2_lib.scala 337:36] - _T_757[25] <= _T_904 @[el2_lib.scala 337:30] - node _T_905 = bits(ic_miss_buff_half, 47, 47) @[el2_lib.scala 339:36] - _T_759[21] <= _T_905 @[el2_lib.scala 339:30] - node _T_906 = bits(ic_miss_buff_half, 47, 47) @[el2_lib.scala 340:36] - _T_760[21] <= _T_906 @[el2_lib.scala 340:30] - node _T_907 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 335:36] - _T_755[26] <= _T_907 @[el2_lib.scala 335:30] - node _T_908 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 336:36] - _T_756[26] <= _T_908 @[el2_lib.scala 336:30] - node _T_909 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 337:36] - _T_757[26] <= _T_909 @[el2_lib.scala 337:30] - node _T_910 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 339:36] - _T_759[22] <= _T_910 @[el2_lib.scala 339:30] - node _T_911 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 340:36] - _T_760[22] <= _T_911 @[el2_lib.scala 340:30] - node _T_912 = bits(ic_miss_buff_half, 49, 49) @[el2_lib.scala 338:36] - _T_758[23] <= _T_912 @[el2_lib.scala 338:30] - node _T_913 = bits(ic_miss_buff_half, 49, 49) @[el2_lib.scala 339:36] - _T_759[23] <= _T_913 @[el2_lib.scala 339:30] - node _T_914 = bits(ic_miss_buff_half, 49, 49) @[el2_lib.scala 340:36] - _T_760[23] <= _T_914 @[el2_lib.scala 340:30] - node _T_915 = bits(ic_miss_buff_half, 50, 50) @[el2_lib.scala 335:36] - _T_755[27] <= _T_915 @[el2_lib.scala 335:30] - node _T_916 = bits(ic_miss_buff_half, 50, 50) @[el2_lib.scala 338:36] - _T_758[24] <= _T_916 @[el2_lib.scala 338:30] - node _T_917 = bits(ic_miss_buff_half, 50, 50) @[el2_lib.scala 339:36] - _T_759[24] <= _T_917 @[el2_lib.scala 339:30] - node _T_918 = bits(ic_miss_buff_half, 50, 50) @[el2_lib.scala 340:36] - _T_760[24] <= _T_918 @[el2_lib.scala 340:30] - node _T_919 = bits(ic_miss_buff_half, 51, 51) @[el2_lib.scala 336:36] - _T_756[27] <= _T_919 @[el2_lib.scala 336:30] - node _T_920 = bits(ic_miss_buff_half, 51, 51) @[el2_lib.scala 338:36] - _T_758[25] <= _T_920 @[el2_lib.scala 338:30] - node _T_921 = bits(ic_miss_buff_half, 51, 51) @[el2_lib.scala 339:36] - _T_759[25] <= _T_921 @[el2_lib.scala 339:30] - node _T_922 = bits(ic_miss_buff_half, 51, 51) @[el2_lib.scala 340:36] - _T_760[25] <= _T_922 @[el2_lib.scala 340:30] - node _T_923 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 335:36] - _T_755[28] <= _T_923 @[el2_lib.scala 335:30] - node _T_924 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 336:36] - _T_756[28] <= _T_924 @[el2_lib.scala 336:30] - node _T_925 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 338:36] - _T_758[26] <= _T_925 @[el2_lib.scala 338:30] - node _T_926 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 339:36] - _T_759[26] <= _T_926 @[el2_lib.scala 339:30] - node _T_927 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 340:36] - _T_760[26] <= _T_927 @[el2_lib.scala 340:30] - node _T_928 = bits(ic_miss_buff_half, 53, 53) @[el2_lib.scala 337:36] - _T_757[27] <= _T_928 @[el2_lib.scala 337:30] - node _T_929 = bits(ic_miss_buff_half, 53, 53) @[el2_lib.scala 338:36] - _T_758[27] <= _T_929 @[el2_lib.scala 338:30] - node _T_930 = bits(ic_miss_buff_half, 53, 53) @[el2_lib.scala 339:36] - _T_759[27] <= _T_930 @[el2_lib.scala 339:30] - node _T_931 = bits(ic_miss_buff_half, 53, 53) @[el2_lib.scala 340:36] - _T_760[27] <= _T_931 @[el2_lib.scala 340:30] - node _T_932 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 335:36] - _T_755[29] <= _T_932 @[el2_lib.scala 335:30] - node _T_933 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 337:36] - _T_757[28] <= _T_933 @[el2_lib.scala 337:30] - node _T_934 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 338:36] - _T_758[28] <= _T_934 @[el2_lib.scala 338:30] - node _T_935 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 339:36] - _T_759[28] <= _T_935 @[el2_lib.scala 339:30] - node _T_936 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 340:36] - _T_760[28] <= _T_936 @[el2_lib.scala 340:30] - node _T_937 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 336:36] - _T_756[29] <= _T_937 @[el2_lib.scala 336:30] - node _T_938 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 337:36] - _T_757[29] <= _T_938 @[el2_lib.scala 337:30] - node _T_939 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 338:36] - _T_758[29] <= _T_939 @[el2_lib.scala 338:30] - node _T_940 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 339:36] - _T_759[29] <= _T_940 @[el2_lib.scala 339:30] - node _T_941 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 340:36] - _T_760[29] <= _T_941 @[el2_lib.scala 340:30] - node _T_942 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 335:36] - _T_755[30] <= _T_942 @[el2_lib.scala 335:30] - node _T_943 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 336:36] - _T_756[30] <= _T_943 @[el2_lib.scala 336:30] - node _T_944 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 337:36] - _T_757[30] <= _T_944 @[el2_lib.scala 337:30] - node _T_945 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 338:36] - _T_758[30] <= _T_945 @[el2_lib.scala 338:30] - node _T_946 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 339:36] - _T_759[30] <= _T_946 @[el2_lib.scala 339:30] - node _T_947 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 340:36] - _T_760[30] <= _T_947 @[el2_lib.scala 340:30] - node _T_948 = bits(ic_miss_buff_half, 57, 57) @[el2_lib.scala 335:36] - _T_755[31] <= _T_948 @[el2_lib.scala 335:30] - node _T_949 = bits(ic_miss_buff_half, 57, 57) @[el2_lib.scala 341:36] - _T_761[0] <= _T_949 @[el2_lib.scala 341:30] - node _T_950 = bits(ic_miss_buff_half, 58, 58) @[el2_lib.scala 336:36] - _T_756[31] <= _T_950 @[el2_lib.scala 336:30] - node _T_951 = bits(ic_miss_buff_half, 58, 58) @[el2_lib.scala 341:36] - _T_761[1] <= _T_951 @[el2_lib.scala 341:30] - node _T_952 = bits(ic_miss_buff_half, 59, 59) @[el2_lib.scala 335:36] - _T_755[32] <= _T_952 @[el2_lib.scala 335:30] - node _T_953 = bits(ic_miss_buff_half, 59, 59) @[el2_lib.scala 336:36] - _T_756[32] <= _T_953 @[el2_lib.scala 336:30] - node _T_954 = bits(ic_miss_buff_half, 59, 59) @[el2_lib.scala 341:36] - _T_761[2] <= _T_954 @[el2_lib.scala 341:30] - node _T_955 = bits(ic_miss_buff_half, 60, 60) @[el2_lib.scala 337:36] - _T_757[31] <= _T_955 @[el2_lib.scala 337:30] - node _T_956 = bits(ic_miss_buff_half, 60, 60) @[el2_lib.scala 341:36] - _T_761[3] <= _T_956 @[el2_lib.scala 341:30] - node _T_957 = bits(ic_miss_buff_half, 61, 61) @[el2_lib.scala 335:36] - _T_755[33] <= _T_957 @[el2_lib.scala 335:30] - node _T_958 = bits(ic_miss_buff_half, 61, 61) @[el2_lib.scala 337:36] - _T_757[32] <= _T_958 @[el2_lib.scala 337:30] - node _T_959 = bits(ic_miss_buff_half, 61, 61) @[el2_lib.scala 341:36] - _T_761[4] <= _T_959 @[el2_lib.scala 341:30] - node _T_960 = bits(ic_miss_buff_half, 62, 62) @[el2_lib.scala 336:36] - _T_756[33] <= _T_960 @[el2_lib.scala 336:30] - node _T_961 = bits(ic_miss_buff_half, 62, 62) @[el2_lib.scala 337:36] - _T_757[33] <= _T_961 @[el2_lib.scala 337:30] - node _T_962 = bits(ic_miss_buff_half, 62, 62) @[el2_lib.scala 341:36] - _T_761[5] <= _T_962 @[el2_lib.scala 341:30] - node _T_963 = bits(ic_miss_buff_half, 63, 63) @[el2_lib.scala 335:36] - _T_755[34] <= _T_963 @[el2_lib.scala 335:30] - node _T_964 = bits(ic_miss_buff_half, 63, 63) @[el2_lib.scala 336:36] - _T_756[34] <= _T_964 @[el2_lib.scala 336:30] - node _T_965 = bits(ic_miss_buff_half, 63, 63) @[el2_lib.scala 337:36] - _T_757[34] <= _T_965 @[el2_lib.scala 337:30] - node _T_966 = bits(ic_miss_buff_half, 63, 63) @[el2_lib.scala 341:36] - _T_761[6] <= _T_966 @[el2_lib.scala 341:30] - node _T_967 = cat(_T_755[1], _T_755[0]) @[el2_lib.scala 343:27] - node _T_968 = cat(_T_755[3], _T_755[2]) @[el2_lib.scala 343:27] - node _T_969 = cat(_T_968, _T_967) @[el2_lib.scala 343:27] - node _T_970 = cat(_T_755[5], _T_755[4]) @[el2_lib.scala 343:27] - node _T_971 = cat(_T_755[7], _T_755[6]) @[el2_lib.scala 343:27] - node _T_972 = cat(_T_971, _T_970) @[el2_lib.scala 343:27] - node _T_973 = cat(_T_972, _T_969) @[el2_lib.scala 343:27] - node _T_974 = cat(_T_755[9], _T_755[8]) @[el2_lib.scala 343:27] - node _T_975 = cat(_T_755[11], _T_755[10]) @[el2_lib.scala 343:27] - node _T_976 = cat(_T_975, _T_974) @[el2_lib.scala 343:27] - node _T_977 = cat(_T_755[13], _T_755[12]) @[el2_lib.scala 343:27] - node _T_978 = cat(_T_755[16], _T_755[15]) @[el2_lib.scala 343:27] - node _T_979 = cat(_T_978, _T_755[14]) @[el2_lib.scala 343:27] - node _T_980 = cat(_T_979, _T_977) @[el2_lib.scala 343:27] - node _T_981 = cat(_T_980, _T_976) @[el2_lib.scala 343:27] - node _T_982 = cat(_T_981, _T_973) @[el2_lib.scala 343:27] - node _T_983 = cat(_T_755[18], _T_755[17]) @[el2_lib.scala 343:27] - node _T_984 = cat(_T_755[20], _T_755[19]) @[el2_lib.scala 343:27] - node _T_985 = cat(_T_984, _T_983) @[el2_lib.scala 343:27] - node _T_986 = cat(_T_755[22], _T_755[21]) @[el2_lib.scala 343:27] - node _T_987 = cat(_T_755[25], _T_755[24]) @[el2_lib.scala 343:27] - node _T_988 = cat(_T_987, _T_755[23]) @[el2_lib.scala 343:27] - node _T_989 = cat(_T_988, _T_986) @[el2_lib.scala 343:27] - node _T_990 = cat(_T_989, _T_985) @[el2_lib.scala 343:27] - node _T_991 = cat(_T_755[27], _T_755[26]) @[el2_lib.scala 343:27] - node _T_992 = cat(_T_755[29], _T_755[28]) @[el2_lib.scala 343:27] + node _T_733 = cat(_T_732, _T_725) @[el2_lib.scala 343:112] + node _T_734 = cat(_T_346[16], _T_346[15]) @[el2_lib.scala 343:112] + node _T_735 = cat(_T_346[18], _T_346[17]) @[el2_lib.scala 343:112] + node _T_736 = cat(_T_735, _T_734) @[el2_lib.scala 343:112] + node _T_737 = cat(_T_346[20], _T_346[19]) @[el2_lib.scala 343:112] + node _T_738 = cat(_T_346[22], _T_346[21]) @[el2_lib.scala 343:112] + node _T_739 = cat(_T_738, _T_737) @[el2_lib.scala 343:112] + node _T_740 = cat(_T_739, _T_736) @[el2_lib.scala 343:112] + node _T_741 = cat(_T_346[24], _T_346[23]) @[el2_lib.scala 343:112] + node _T_742 = cat(_T_346[26], _T_346[25]) @[el2_lib.scala 343:112] + node _T_743 = cat(_T_742, _T_741) @[el2_lib.scala 343:112] + node _T_744 = cat(_T_346[28], _T_346[27]) @[el2_lib.scala 343:112] + node _T_745 = cat(_T_346[30], _T_346[29]) @[el2_lib.scala 343:112] + node _T_746 = cat(_T_745, _T_744) @[el2_lib.scala 343:112] + node _T_747 = cat(_T_746, _T_743) @[el2_lib.scala 343:112] + node _T_748 = cat(_T_747, _T_740) @[el2_lib.scala 343:112] + node _T_749 = cat(_T_748, _T_733) @[el2_lib.scala 343:112] + node _T_750 = xorr(_T_749) @[el2_lib.scala 343:119] + node _T_751 = cat(_T_347[2], _T_347[1]) @[el2_lib.scala 343:129] + node _T_752 = cat(_T_751, _T_347[0]) @[el2_lib.scala 343:129] + node _T_753 = cat(_T_347[4], _T_347[3]) @[el2_lib.scala 343:129] + node _T_754 = cat(_T_347[6], _T_347[5]) @[el2_lib.scala 343:129] + node _T_755 = cat(_T_754, _T_753) @[el2_lib.scala 343:129] + node _T_756 = cat(_T_755, _T_752) @[el2_lib.scala 343:129] + node _T_757 = xorr(_T_756) @[el2_lib.scala 343:136] + node _T_758 = cat(_T_719, _T_750) @[Cat.scala 29:58] + node _T_759 = cat(_T_758, _T_757) @[Cat.scala 29:58] + node _T_760 = cat(_T_657, _T_688) @[Cat.scala 29:58] + node _T_761 = cat(_T_587, _T_622) @[Cat.scala 29:58] + node _T_762 = cat(_T_761, _T_760) @[Cat.scala 29:58] + node ic_wr_ecc = cat(_T_762, _T_759) @[Cat.scala 29:58] + wire _T_763 : UInt<1>[35] @[el2_lib.scala 322:18] + wire _T_764 : UInt<1>[35] @[el2_lib.scala 323:18] + wire _T_765 : UInt<1>[35] @[el2_lib.scala 324:18] + wire _T_766 : UInt<1>[31] @[el2_lib.scala 325:18] + wire _T_767 : UInt<1>[31] @[el2_lib.scala 326:18] + wire _T_768 : UInt<1>[31] @[el2_lib.scala 327:18] + wire _T_769 : UInt<1>[7] @[el2_lib.scala 328:18] + node _T_770 = bits(ic_miss_buff_half, 0, 0) @[el2_lib.scala 335:36] + _T_763[0] <= _T_770 @[el2_lib.scala 335:30] + node _T_771 = bits(ic_miss_buff_half, 0, 0) @[el2_lib.scala 336:36] + _T_764[0] <= _T_771 @[el2_lib.scala 336:30] + node _T_772 = bits(ic_miss_buff_half, 1, 1) @[el2_lib.scala 335:36] + _T_763[1] <= _T_772 @[el2_lib.scala 335:30] + node _T_773 = bits(ic_miss_buff_half, 1, 1) @[el2_lib.scala 337:36] + _T_765[0] <= _T_773 @[el2_lib.scala 337:30] + node _T_774 = bits(ic_miss_buff_half, 2, 2) @[el2_lib.scala 336:36] + _T_764[1] <= _T_774 @[el2_lib.scala 336:30] + node _T_775 = bits(ic_miss_buff_half, 2, 2) @[el2_lib.scala 337:36] + _T_765[1] <= _T_775 @[el2_lib.scala 337:30] + node _T_776 = bits(ic_miss_buff_half, 3, 3) @[el2_lib.scala 335:36] + _T_763[2] <= _T_776 @[el2_lib.scala 335:30] + node _T_777 = bits(ic_miss_buff_half, 3, 3) @[el2_lib.scala 336:36] + _T_764[2] <= _T_777 @[el2_lib.scala 336:30] + node _T_778 = bits(ic_miss_buff_half, 3, 3) @[el2_lib.scala 337:36] + _T_765[2] <= _T_778 @[el2_lib.scala 337:30] + node _T_779 = bits(ic_miss_buff_half, 4, 4) @[el2_lib.scala 335:36] + _T_763[3] <= _T_779 @[el2_lib.scala 335:30] + node _T_780 = bits(ic_miss_buff_half, 4, 4) @[el2_lib.scala 338:36] + _T_766[0] <= _T_780 @[el2_lib.scala 338:30] + node _T_781 = bits(ic_miss_buff_half, 5, 5) @[el2_lib.scala 336:36] + _T_764[3] <= _T_781 @[el2_lib.scala 336:30] + node _T_782 = bits(ic_miss_buff_half, 5, 5) @[el2_lib.scala 338:36] + _T_766[1] <= _T_782 @[el2_lib.scala 338:30] + node _T_783 = bits(ic_miss_buff_half, 6, 6) @[el2_lib.scala 335:36] + _T_763[4] <= _T_783 @[el2_lib.scala 335:30] + node _T_784 = bits(ic_miss_buff_half, 6, 6) @[el2_lib.scala 336:36] + _T_764[4] <= _T_784 @[el2_lib.scala 336:30] + node _T_785 = bits(ic_miss_buff_half, 6, 6) @[el2_lib.scala 338:36] + _T_766[2] <= _T_785 @[el2_lib.scala 338:30] + node _T_786 = bits(ic_miss_buff_half, 7, 7) @[el2_lib.scala 337:36] + _T_765[3] <= _T_786 @[el2_lib.scala 337:30] + node _T_787 = bits(ic_miss_buff_half, 7, 7) @[el2_lib.scala 338:36] + _T_766[3] <= _T_787 @[el2_lib.scala 338:30] + node _T_788 = bits(ic_miss_buff_half, 8, 8) @[el2_lib.scala 335:36] + _T_763[5] <= _T_788 @[el2_lib.scala 335:30] + node _T_789 = bits(ic_miss_buff_half, 8, 8) @[el2_lib.scala 337:36] + _T_765[4] <= _T_789 @[el2_lib.scala 337:30] + node _T_790 = bits(ic_miss_buff_half, 8, 8) @[el2_lib.scala 338:36] + _T_766[4] <= _T_790 @[el2_lib.scala 338:30] + node _T_791 = bits(ic_miss_buff_half, 9, 9) @[el2_lib.scala 336:36] + _T_764[5] <= _T_791 @[el2_lib.scala 336:30] + node _T_792 = bits(ic_miss_buff_half, 9, 9) @[el2_lib.scala 337:36] + _T_765[5] <= _T_792 @[el2_lib.scala 337:30] + node _T_793 = bits(ic_miss_buff_half, 9, 9) @[el2_lib.scala 338:36] + _T_766[5] <= _T_793 @[el2_lib.scala 338:30] + node _T_794 = bits(ic_miss_buff_half, 10, 10) @[el2_lib.scala 335:36] + _T_763[6] <= _T_794 @[el2_lib.scala 335:30] + node _T_795 = bits(ic_miss_buff_half, 10, 10) @[el2_lib.scala 336:36] + _T_764[6] <= _T_795 @[el2_lib.scala 336:30] + node _T_796 = bits(ic_miss_buff_half, 10, 10) @[el2_lib.scala 337:36] + _T_765[6] <= _T_796 @[el2_lib.scala 337:30] + node _T_797 = bits(ic_miss_buff_half, 10, 10) @[el2_lib.scala 338:36] + _T_766[6] <= _T_797 @[el2_lib.scala 338:30] + node _T_798 = bits(ic_miss_buff_half, 11, 11) @[el2_lib.scala 335:36] + _T_763[7] <= _T_798 @[el2_lib.scala 335:30] + node _T_799 = bits(ic_miss_buff_half, 11, 11) @[el2_lib.scala 339:36] + _T_767[0] <= _T_799 @[el2_lib.scala 339:30] + node _T_800 = bits(ic_miss_buff_half, 12, 12) @[el2_lib.scala 336:36] + _T_764[7] <= _T_800 @[el2_lib.scala 336:30] + node _T_801 = bits(ic_miss_buff_half, 12, 12) @[el2_lib.scala 339:36] + _T_767[1] <= _T_801 @[el2_lib.scala 339:30] + node _T_802 = bits(ic_miss_buff_half, 13, 13) @[el2_lib.scala 335:36] + _T_763[8] <= _T_802 @[el2_lib.scala 335:30] + node _T_803 = bits(ic_miss_buff_half, 13, 13) @[el2_lib.scala 336:36] + _T_764[8] <= _T_803 @[el2_lib.scala 336:30] + node _T_804 = bits(ic_miss_buff_half, 13, 13) @[el2_lib.scala 339:36] + _T_767[2] <= _T_804 @[el2_lib.scala 339:30] + node _T_805 = bits(ic_miss_buff_half, 14, 14) @[el2_lib.scala 337:36] + _T_765[7] <= _T_805 @[el2_lib.scala 337:30] + node _T_806 = bits(ic_miss_buff_half, 14, 14) @[el2_lib.scala 339:36] + _T_767[3] <= _T_806 @[el2_lib.scala 339:30] + node _T_807 = bits(ic_miss_buff_half, 15, 15) @[el2_lib.scala 335:36] + _T_763[9] <= _T_807 @[el2_lib.scala 335:30] + node _T_808 = bits(ic_miss_buff_half, 15, 15) @[el2_lib.scala 337:36] + _T_765[8] <= _T_808 @[el2_lib.scala 337:30] + node _T_809 = bits(ic_miss_buff_half, 15, 15) @[el2_lib.scala 339:36] + _T_767[4] <= _T_809 @[el2_lib.scala 339:30] + node _T_810 = bits(ic_miss_buff_half, 16, 16) @[el2_lib.scala 336:36] + _T_764[9] <= _T_810 @[el2_lib.scala 336:30] + node _T_811 = bits(ic_miss_buff_half, 16, 16) @[el2_lib.scala 337:36] + _T_765[9] <= _T_811 @[el2_lib.scala 337:30] + node _T_812 = bits(ic_miss_buff_half, 16, 16) @[el2_lib.scala 339:36] + _T_767[5] <= _T_812 @[el2_lib.scala 339:30] + node _T_813 = bits(ic_miss_buff_half, 17, 17) @[el2_lib.scala 335:36] + _T_763[10] <= _T_813 @[el2_lib.scala 335:30] + node _T_814 = bits(ic_miss_buff_half, 17, 17) @[el2_lib.scala 336:36] + _T_764[10] <= _T_814 @[el2_lib.scala 336:30] + node _T_815 = bits(ic_miss_buff_half, 17, 17) @[el2_lib.scala 337:36] + _T_765[10] <= _T_815 @[el2_lib.scala 337:30] + node _T_816 = bits(ic_miss_buff_half, 17, 17) @[el2_lib.scala 339:36] + _T_767[6] <= _T_816 @[el2_lib.scala 339:30] + node _T_817 = bits(ic_miss_buff_half, 18, 18) @[el2_lib.scala 338:36] + _T_766[7] <= _T_817 @[el2_lib.scala 338:30] + node _T_818 = bits(ic_miss_buff_half, 18, 18) @[el2_lib.scala 339:36] + _T_767[7] <= _T_818 @[el2_lib.scala 339:30] + node _T_819 = bits(ic_miss_buff_half, 19, 19) @[el2_lib.scala 335:36] + _T_763[11] <= _T_819 @[el2_lib.scala 335:30] + node _T_820 = bits(ic_miss_buff_half, 19, 19) @[el2_lib.scala 338:36] + _T_766[8] <= _T_820 @[el2_lib.scala 338:30] + node _T_821 = bits(ic_miss_buff_half, 19, 19) @[el2_lib.scala 339:36] + _T_767[8] <= _T_821 @[el2_lib.scala 339:30] + node _T_822 = bits(ic_miss_buff_half, 20, 20) @[el2_lib.scala 336:36] + _T_764[11] <= _T_822 @[el2_lib.scala 336:30] + node _T_823 = bits(ic_miss_buff_half, 20, 20) @[el2_lib.scala 338:36] + _T_766[9] <= _T_823 @[el2_lib.scala 338:30] + node _T_824 = bits(ic_miss_buff_half, 20, 20) @[el2_lib.scala 339:36] + _T_767[9] <= _T_824 @[el2_lib.scala 339:30] + node _T_825 = bits(ic_miss_buff_half, 21, 21) @[el2_lib.scala 335:36] + _T_763[12] <= _T_825 @[el2_lib.scala 335:30] + node _T_826 = bits(ic_miss_buff_half, 21, 21) @[el2_lib.scala 336:36] + _T_764[12] <= _T_826 @[el2_lib.scala 336:30] + node _T_827 = bits(ic_miss_buff_half, 21, 21) @[el2_lib.scala 338:36] + _T_766[10] <= _T_827 @[el2_lib.scala 338:30] + node _T_828 = bits(ic_miss_buff_half, 21, 21) @[el2_lib.scala 339:36] + _T_767[10] <= _T_828 @[el2_lib.scala 339:30] + node _T_829 = bits(ic_miss_buff_half, 22, 22) @[el2_lib.scala 337:36] + _T_765[11] <= _T_829 @[el2_lib.scala 337:30] + node _T_830 = bits(ic_miss_buff_half, 22, 22) @[el2_lib.scala 338:36] + _T_766[11] <= _T_830 @[el2_lib.scala 338:30] + node _T_831 = bits(ic_miss_buff_half, 22, 22) @[el2_lib.scala 339:36] + _T_767[11] <= _T_831 @[el2_lib.scala 339:30] + node _T_832 = bits(ic_miss_buff_half, 23, 23) @[el2_lib.scala 335:36] + _T_763[13] <= _T_832 @[el2_lib.scala 335:30] + node _T_833 = bits(ic_miss_buff_half, 23, 23) @[el2_lib.scala 337:36] + _T_765[12] <= _T_833 @[el2_lib.scala 337:30] + node _T_834 = bits(ic_miss_buff_half, 23, 23) @[el2_lib.scala 338:36] + _T_766[12] <= _T_834 @[el2_lib.scala 338:30] + node _T_835 = bits(ic_miss_buff_half, 23, 23) @[el2_lib.scala 339:36] + _T_767[12] <= _T_835 @[el2_lib.scala 339:30] + node _T_836 = bits(ic_miss_buff_half, 24, 24) @[el2_lib.scala 336:36] + _T_764[13] <= _T_836 @[el2_lib.scala 336:30] + node _T_837 = bits(ic_miss_buff_half, 24, 24) @[el2_lib.scala 337:36] + _T_765[13] <= _T_837 @[el2_lib.scala 337:30] + node _T_838 = bits(ic_miss_buff_half, 24, 24) @[el2_lib.scala 338:36] + _T_766[13] <= _T_838 @[el2_lib.scala 338:30] + node _T_839 = bits(ic_miss_buff_half, 24, 24) @[el2_lib.scala 339:36] + _T_767[13] <= _T_839 @[el2_lib.scala 339:30] + node _T_840 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 335:36] + _T_763[14] <= _T_840 @[el2_lib.scala 335:30] + node _T_841 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 336:36] + _T_764[14] <= _T_841 @[el2_lib.scala 336:30] + node _T_842 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 337:36] + _T_765[14] <= _T_842 @[el2_lib.scala 337:30] + node _T_843 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 338:36] + _T_766[14] <= _T_843 @[el2_lib.scala 338:30] + node _T_844 = bits(ic_miss_buff_half, 25, 25) @[el2_lib.scala 339:36] + _T_767[14] <= _T_844 @[el2_lib.scala 339:30] + node _T_845 = bits(ic_miss_buff_half, 26, 26) @[el2_lib.scala 335:36] + _T_763[15] <= _T_845 @[el2_lib.scala 335:30] + node _T_846 = bits(ic_miss_buff_half, 26, 26) @[el2_lib.scala 340:36] + _T_768[0] <= _T_846 @[el2_lib.scala 340:30] + node _T_847 = bits(ic_miss_buff_half, 27, 27) @[el2_lib.scala 336:36] + _T_764[15] <= _T_847 @[el2_lib.scala 336:30] + node _T_848 = bits(ic_miss_buff_half, 27, 27) @[el2_lib.scala 340:36] + _T_768[1] <= _T_848 @[el2_lib.scala 340:30] + node _T_849 = bits(ic_miss_buff_half, 28, 28) @[el2_lib.scala 335:36] + _T_763[16] <= _T_849 @[el2_lib.scala 335:30] + node _T_850 = bits(ic_miss_buff_half, 28, 28) @[el2_lib.scala 336:36] + _T_764[16] <= _T_850 @[el2_lib.scala 336:30] + node _T_851 = bits(ic_miss_buff_half, 28, 28) @[el2_lib.scala 340:36] + _T_768[2] <= _T_851 @[el2_lib.scala 340:30] + node _T_852 = bits(ic_miss_buff_half, 29, 29) @[el2_lib.scala 337:36] + _T_765[15] <= _T_852 @[el2_lib.scala 337:30] + node _T_853 = bits(ic_miss_buff_half, 29, 29) @[el2_lib.scala 340:36] + _T_768[3] <= _T_853 @[el2_lib.scala 340:30] + node _T_854 = bits(ic_miss_buff_half, 30, 30) @[el2_lib.scala 335:36] + _T_763[17] <= _T_854 @[el2_lib.scala 335:30] + node _T_855 = bits(ic_miss_buff_half, 30, 30) @[el2_lib.scala 337:36] + _T_765[16] <= _T_855 @[el2_lib.scala 337:30] + node _T_856 = bits(ic_miss_buff_half, 30, 30) @[el2_lib.scala 340:36] + _T_768[4] <= _T_856 @[el2_lib.scala 340:30] + node _T_857 = bits(ic_miss_buff_half, 31, 31) @[el2_lib.scala 336:36] + _T_764[17] <= _T_857 @[el2_lib.scala 336:30] + node _T_858 = bits(ic_miss_buff_half, 31, 31) @[el2_lib.scala 337:36] + _T_765[17] <= _T_858 @[el2_lib.scala 337:30] + node _T_859 = bits(ic_miss_buff_half, 31, 31) @[el2_lib.scala 340:36] + _T_768[5] <= _T_859 @[el2_lib.scala 340:30] + node _T_860 = bits(ic_miss_buff_half, 32, 32) @[el2_lib.scala 335:36] + _T_763[18] <= _T_860 @[el2_lib.scala 335:30] + node _T_861 = bits(ic_miss_buff_half, 32, 32) @[el2_lib.scala 336:36] + _T_764[18] <= _T_861 @[el2_lib.scala 336:30] + node _T_862 = bits(ic_miss_buff_half, 32, 32) @[el2_lib.scala 337:36] + _T_765[18] <= _T_862 @[el2_lib.scala 337:30] + node _T_863 = bits(ic_miss_buff_half, 32, 32) @[el2_lib.scala 340:36] + _T_768[6] <= _T_863 @[el2_lib.scala 340:30] + node _T_864 = bits(ic_miss_buff_half, 33, 33) @[el2_lib.scala 338:36] + _T_766[15] <= _T_864 @[el2_lib.scala 338:30] + node _T_865 = bits(ic_miss_buff_half, 33, 33) @[el2_lib.scala 340:36] + _T_768[7] <= _T_865 @[el2_lib.scala 340:30] + node _T_866 = bits(ic_miss_buff_half, 34, 34) @[el2_lib.scala 335:36] + _T_763[19] <= _T_866 @[el2_lib.scala 335:30] + node _T_867 = bits(ic_miss_buff_half, 34, 34) @[el2_lib.scala 338:36] + _T_766[16] <= _T_867 @[el2_lib.scala 338:30] + node _T_868 = bits(ic_miss_buff_half, 34, 34) @[el2_lib.scala 340:36] + _T_768[8] <= _T_868 @[el2_lib.scala 340:30] + node _T_869 = bits(ic_miss_buff_half, 35, 35) @[el2_lib.scala 336:36] + _T_764[19] <= _T_869 @[el2_lib.scala 336:30] + node _T_870 = bits(ic_miss_buff_half, 35, 35) @[el2_lib.scala 338:36] + _T_766[17] <= _T_870 @[el2_lib.scala 338:30] + node _T_871 = bits(ic_miss_buff_half, 35, 35) @[el2_lib.scala 340:36] + _T_768[9] <= _T_871 @[el2_lib.scala 340:30] + node _T_872 = bits(ic_miss_buff_half, 36, 36) @[el2_lib.scala 335:36] + _T_763[20] <= _T_872 @[el2_lib.scala 335:30] + node _T_873 = bits(ic_miss_buff_half, 36, 36) @[el2_lib.scala 336:36] + _T_764[20] <= _T_873 @[el2_lib.scala 336:30] + node _T_874 = bits(ic_miss_buff_half, 36, 36) @[el2_lib.scala 338:36] + _T_766[18] <= _T_874 @[el2_lib.scala 338:30] + node _T_875 = bits(ic_miss_buff_half, 36, 36) @[el2_lib.scala 340:36] + _T_768[10] <= _T_875 @[el2_lib.scala 340:30] + node _T_876 = bits(ic_miss_buff_half, 37, 37) @[el2_lib.scala 337:36] + _T_765[19] <= _T_876 @[el2_lib.scala 337:30] + node _T_877 = bits(ic_miss_buff_half, 37, 37) @[el2_lib.scala 338:36] + _T_766[19] <= _T_877 @[el2_lib.scala 338:30] + node _T_878 = bits(ic_miss_buff_half, 37, 37) @[el2_lib.scala 340:36] + _T_768[11] <= _T_878 @[el2_lib.scala 340:30] + node _T_879 = bits(ic_miss_buff_half, 38, 38) @[el2_lib.scala 335:36] + _T_763[21] <= _T_879 @[el2_lib.scala 335:30] + node _T_880 = bits(ic_miss_buff_half, 38, 38) @[el2_lib.scala 337:36] + _T_765[20] <= _T_880 @[el2_lib.scala 337:30] + node _T_881 = bits(ic_miss_buff_half, 38, 38) @[el2_lib.scala 338:36] + _T_766[20] <= _T_881 @[el2_lib.scala 338:30] + node _T_882 = bits(ic_miss_buff_half, 38, 38) @[el2_lib.scala 340:36] + _T_768[12] <= _T_882 @[el2_lib.scala 340:30] + node _T_883 = bits(ic_miss_buff_half, 39, 39) @[el2_lib.scala 336:36] + _T_764[21] <= _T_883 @[el2_lib.scala 336:30] + node _T_884 = bits(ic_miss_buff_half, 39, 39) @[el2_lib.scala 337:36] + _T_765[21] <= _T_884 @[el2_lib.scala 337:30] + node _T_885 = bits(ic_miss_buff_half, 39, 39) @[el2_lib.scala 338:36] + _T_766[21] <= _T_885 @[el2_lib.scala 338:30] + node _T_886 = bits(ic_miss_buff_half, 39, 39) @[el2_lib.scala 340:36] + _T_768[13] <= _T_886 @[el2_lib.scala 340:30] + node _T_887 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 335:36] + _T_763[22] <= _T_887 @[el2_lib.scala 335:30] + node _T_888 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 336:36] + _T_764[22] <= _T_888 @[el2_lib.scala 336:30] + node _T_889 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 337:36] + _T_765[22] <= _T_889 @[el2_lib.scala 337:30] + node _T_890 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 338:36] + _T_766[22] <= _T_890 @[el2_lib.scala 338:30] + node _T_891 = bits(ic_miss_buff_half, 40, 40) @[el2_lib.scala 340:36] + _T_768[14] <= _T_891 @[el2_lib.scala 340:30] + node _T_892 = bits(ic_miss_buff_half, 41, 41) @[el2_lib.scala 339:36] + _T_767[15] <= _T_892 @[el2_lib.scala 339:30] + node _T_893 = bits(ic_miss_buff_half, 41, 41) @[el2_lib.scala 340:36] + _T_768[15] <= _T_893 @[el2_lib.scala 340:30] + node _T_894 = bits(ic_miss_buff_half, 42, 42) @[el2_lib.scala 335:36] + _T_763[23] <= _T_894 @[el2_lib.scala 335:30] + node _T_895 = bits(ic_miss_buff_half, 42, 42) @[el2_lib.scala 339:36] + _T_767[16] <= _T_895 @[el2_lib.scala 339:30] + node _T_896 = bits(ic_miss_buff_half, 42, 42) @[el2_lib.scala 340:36] + _T_768[16] <= _T_896 @[el2_lib.scala 340:30] + node _T_897 = bits(ic_miss_buff_half, 43, 43) @[el2_lib.scala 336:36] + _T_764[23] <= _T_897 @[el2_lib.scala 336:30] + node _T_898 = bits(ic_miss_buff_half, 43, 43) @[el2_lib.scala 339:36] + _T_767[17] <= _T_898 @[el2_lib.scala 339:30] + node _T_899 = bits(ic_miss_buff_half, 43, 43) @[el2_lib.scala 340:36] + _T_768[17] <= _T_899 @[el2_lib.scala 340:30] + node _T_900 = bits(ic_miss_buff_half, 44, 44) @[el2_lib.scala 335:36] + _T_763[24] <= _T_900 @[el2_lib.scala 335:30] + node _T_901 = bits(ic_miss_buff_half, 44, 44) @[el2_lib.scala 336:36] + _T_764[24] <= _T_901 @[el2_lib.scala 336:30] + node _T_902 = bits(ic_miss_buff_half, 44, 44) @[el2_lib.scala 339:36] + _T_767[18] <= _T_902 @[el2_lib.scala 339:30] + node _T_903 = bits(ic_miss_buff_half, 44, 44) @[el2_lib.scala 340:36] + _T_768[18] <= _T_903 @[el2_lib.scala 340:30] + node _T_904 = bits(ic_miss_buff_half, 45, 45) @[el2_lib.scala 337:36] + _T_765[23] <= _T_904 @[el2_lib.scala 337:30] + node _T_905 = bits(ic_miss_buff_half, 45, 45) @[el2_lib.scala 339:36] + _T_767[19] <= _T_905 @[el2_lib.scala 339:30] + node _T_906 = bits(ic_miss_buff_half, 45, 45) @[el2_lib.scala 340:36] + _T_768[19] <= _T_906 @[el2_lib.scala 340:30] + node _T_907 = bits(ic_miss_buff_half, 46, 46) @[el2_lib.scala 335:36] + _T_763[25] <= _T_907 @[el2_lib.scala 335:30] + node _T_908 = bits(ic_miss_buff_half, 46, 46) @[el2_lib.scala 337:36] + _T_765[24] <= _T_908 @[el2_lib.scala 337:30] + node _T_909 = bits(ic_miss_buff_half, 46, 46) @[el2_lib.scala 339:36] + _T_767[20] <= _T_909 @[el2_lib.scala 339:30] + node _T_910 = bits(ic_miss_buff_half, 46, 46) @[el2_lib.scala 340:36] + _T_768[20] <= _T_910 @[el2_lib.scala 340:30] + node _T_911 = bits(ic_miss_buff_half, 47, 47) @[el2_lib.scala 336:36] + _T_764[25] <= _T_911 @[el2_lib.scala 336:30] + node _T_912 = bits(ic_miss_buff_half, 47, 47) @[el2_lib.scala 337:36] + _T_765[25] <= _T_912 @[el2_lib.scala 337:30] + node _T_913 = bits(ic_miss_buff_half, 47, 47) @[el2_lib.scala 339:36] + _T_767[21] <= _T_913 @[el2_lib.scala 339:30] + node _T_914 = bits(ic_miss_buff_half, 47, 47) @[el2_lib.scala 340:36] + _T_768[21] <= _T_914 @[el2_lib.scala 340:30] + node _T_915 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 335:36] + _T_763[26] <= _T_915 @[el2_lib.scala 335:30] + node _T_916 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 336:36] + _T_764[26] <= _T_916 @[el2_lib.scala 336:30] + node _T_917 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 337:36] + _T_765[26] <= _T_917 @[el2_lib.scala 337:30] + node _T_918 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 339:36] + _T_767[22] <= _T_918 @[el2_lib.scala 339:30] + node _T_919 = bits(ic_miss_buff_half, 48, 48) @[el2_lib.scala 340:36] + _T_768[22] <= _T_919 @[el2_lib.scala 340:30] + node _T_920 = bits(ic_miss_buff_half, 49, 49) @[el2_lib.scala 338:36] + _T_766[23] <= _T_920 @[el2_lib.scala 338:30] + node _T_921 = bits(ic_miss_buff_half, 49, 49) @[el2_lib.scala 339:36] + _T_767[23] <= _T_921 @[el2_lib.scala 339:30] + node _T_922 = bits(ic_miss_buff_half, 49, 49) @[el2_lib.scala 340:36] + _T_768[23] <= _T_922 @[el2_lib.scala 340:30] + node _T_923 = bits(ic_miss_buff_half, 50, 50) @[el2_lib.scala 335:36] + _T_763[27] <= _T_923 @[el2_lib.scala 335:30] + node _T_924 = bits(ic_miss_buff_half, 50, 50) @[el2_lib.scala 338:36] + _T_766[24] <= _T_924 @[el2_lib.scala 338:30] + node _T_925 = bits(ic_miss_buff_half, 50, 50) @[el2_lib.scala 339:36] + _T_767[24] <= _T_925 @[el2_lib.scala 339:30] + node _T_926 = bits(ic_miss_buff_half, 50, 50) @[el2_lib.scala 340:36] + _T_768[24] <= _T_926 @[el2_lib.scala 340:30] + node _T_927 = bits(ic_miss_buff_half, 51, 51) @[el2_lib.scala 336:36] + _T_764[27] <= _T_927 @[el2_lib.scala 336:30] + node _T_928 = bits(ic_miss_buff_half, 51, 51) @[el2_lib.scala 338:36] + _T_766[25] <= _T_928 @[el2_lib.scala 338:30] + node _T_929 = bits(ic_miss_buff_half, 51, 51) @[el2_lib.scala 339:36] + _T_767[25] <= _T_929 @[el2_lib.scala 339:30] + node _T_930 = bits(ic_miss_buff_half, 51, 51) @[el2_lib.scala 340:36] + _T_768[25] <= _T_930 @[el2_lib.scala 340:30] + node _T_931 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 335:36] + _T_763[28] <= _T_931 @[el2_lib.scala 335:30] + node _T_932 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 336:36] + _T_764[28] <= _T_932 @[el2_lib.scala 336:30] + node _T_933 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 338:36] + _T_766[26] <= _T_933 @[el2_lib.scala 338:30] + node _T_934 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 339:36] + _T_767[26] <= _T_934 @[el2_lib.scala 339:30] + node _T_935 = bits(ic_miss_buff_half, 52, 52) @[el2_lib.scala 340:36] + _T_768[26] <= _T_935 @[el2_lib.scala 340:30] + node _T_936 = bits(ic_miss_buff_half, 53, 53) @[el2_lib.scala 337:36] + _T_765[27] <= _T_936 @[el2_lib.scala 337:30] + node _T_937 = bits(ic_miss_buff_half, 53, 53) @[el2_lib.scala 338:36] + _T_766[27] <= _T_937 @[el2_lib.scala 338:30] + node _T_938 = bits(ic_miss_buff_half, 53, 53) @[el2_lib.scala 339:36] + _T_767[27] <= _T_938 @[el2_lib.scala 339:30] + node _T_939 = bits(ic_miss_buff_half, 53, 53) @[el2_lib.scala 340:36] + _T_768[27] <= _T_939 @[el2_lib.scala 340:30] + node _T_940 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 335:36] + _T_763[29] <= _T_940 @[el2_lib.scala 335:30] + node _T_941 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 337:36] + _T_765[28] <= _T_941 @[el2_lib.scala 337:30] + node _T_942 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 338:36] + _T_766[28] <= _T_942 @[el2_lib.scala 338:30] + node _T_943 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 339:36] + _T_767[28] <= _T_943 @[el2_lib.scala 339:30] + node _T_944 = bits(ic_miss_buff_half, 54, 54) @[el2_lib.scala 340:36] + _T_768[28] <= _T_944 @[el2_lib.scala 340:30] + node _T_945 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 336:36] + _T_764[29] <= _T_945 @[el2_lib.scala 336:30] + node _T_946 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 337:36] + _T_765[29] <= _T_946 @[el2_lib.scala 337:30] + node _T_947 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 338:36] + _T_766[29] <= _T_947 @[el2_lib.scala 338:30] + node _T_948 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 339:36] + _T_767[29] <= _T_948 @[el2_lib.scala 339:30] + node _T_949 = bits(ic_miss_buff_half, 55, 55) @[el2_lib.scala 340:36] + _T_768[29] <= _T_949 @[el2_lib.scala 340:30] + node _T_950 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 335:36] + _T_763[30] <= _T_950 @[el2_lib.scala 335:30] + node _T_951 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 336:36] + _T_764[30] <= _T_951 @[el2_lib.scala 336:30] + node _T_952 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 337:36] + _T_765[30] <= _T_952 @[el2_lib.scala 337:30] + node _T_953 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 338:36] + _T_766[30] <= _T_953 @[el2_lib.scala 338:30] + node _T_954 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 339:36] + _T_767[30] <= _T_954 @[el2_lib.scala 339:30] + node _T_955 = bits(ic_miss_buff_half, 56, 56) @[el2_lib.scala 340:36] + _T_768[30] <= _T_955 @[el2_lib.scala 340:30] + node _T_956 = bits(ic_miss_buff_half, 57, 57) @[el2_lib.scala 335:36] + _T_763[31] <= _T_956 @[el2_lib.scala 335:30] + node _T_957 = bits(ic_miss_buff_half, 57, 57) @[el2_lib.scala 341:36] + _T_769[0] <= _T_957 @[el2_lib.scala 341:30] + node _T_958 = bits(ic_miss_buff_half, 58, 58) @[el2_lib.scala 336:36] + _T_764[31] <= _T_958 @[el2_lib.scala 336:30] + node _T_959 = bits(ic_miss_buff_half, 58, 58) @[el2_lib.scala 341:36] + _T_769[1] <= _T_959 @[el2_lib.scala 341:30] + node _T_960 = bits(ic_miss_buff_half, 59, 59) @[el2_lib.scala 335:36] + _T_763[32] <= _T_960 @[el2_lib.scala 335:30] + node _T_961 = bits(ic_miss_buff_half, 59, 59) @[el2_lib.scala 336:36] + _T_764[32] <= _T_961 @[el2_lib.scala 336:30] + node _T_962 = bits(ic_miss_buff_half, 59, 59) @[el2_lib.scala 341:36] + _T_769[2] <= _T_962 @[el2_lib.scala 341:30] + node _T_963 = bits(ic_miss_buff_half, 60, 60) @[el2_lib.scala 337:36] + _T_765[31] <= _T_963 @[el2_lib.scala 337:30] + node _T_964 = bits(ic_miss_buff_half, 60, 60) @[el2_lib.scala 341:36] + _T_769[3] <= _T_964 @[el2_lib.scala 341:30] + node _T_965 = bits(ic_miss_buff_half, 61, 61) @[el2_lib.scala 335:36] + _T_763[33] <= _T_965 @[el2_lib.scala 335:30] + node _T_966 = bits(ic_miss_buff_half, 61, 61) @[el2_lib.scala 337:36] + _T_765[32] <= _T_966 @[el2_lib.scala 337:30] + node _T_967 = bits(ic_miss_buff_half, 61, 61) @[el2_lib.scala 341:36] + _T_769[4] <= _T_967 @[el2_lib.scala 341:30] + node _T_968 = bits(ic_miss_buff_half, 62, 62) @[el2_lib.scala 336:36] + _T_764[33] <= _T_968 @[el2_lib.scala 336:30] + node _T_969 = bits(ic_miss_buff_half, 62, 62) @[el2_lib.scala 337:36] + _T_765[33] <= _T_969 @[el2_lib.scala 337:30] + node _T_970 = bits(ic_miss_buff_half, 62, 62) @[el2_lib.scala 341:36] + _T_769[5] <= _T_970 @[el2_lib.scala 341:30] + node _T_971 = bits(ic_miss_buff_half, 63, 63) @[el2_lib.scala 335:36] + _T_763[34] <= _T_971 @[el2_lib.scala 335:30] + node _T_972 = bits(ic_miss_buff_half, 63, 63) @[el2_lib.scala 336:36] + _T_764[34] <= _T_972 @[el2_lib.scala 336:30] + node _T_973 = bits(ic_miss_buff_half, 63, 63) @[el2_lib.scala 337:36] + _T_765[34] <= _T_973 @[el2_lib.scala 337:30] + node _T_974 = bits(ic_miss_buff_half, 63, 63) @[el2_lib.scala 341:36] + _T_769[6] <= _T_974 @[el2_lib.scala 341:30] + node _T_975 = cat(_T_763[1], _T_763[0]) @[el2_lib.scala 343:27] + node _T_976 = cat(_T_763[3], _T_763[2]) @[el2_lib.scala 343:27] + node _T_977 = cat(_T_976, _T_975) @[el2_lib.scala 343:27] + node _T_978 = cat(_T_763[5], _T_763[4]) @[el2_lib.scala 343:27] + node _T_979 = cat(_T_763[7], _T_763[6]) @[el2_lib.scala 343:27] + node _T_980 = cat(_T_979, _T_978) @[el2_lib.scala 343:27] + node _T_981 = cat(_T_980, _T_977) @[el2_lib.scala 343:27] + node _T_982 = cat(_T_763[9], _T_763[8]) @[el2_lib.scala 343:27] + node _T_983 = cat(_T_763[11], _T_763[10]) @[el2_lib.scala 343:27] + node _T_984 = cat(_T_983, _T_982) @[el2_lib.scala 343:27] + node _T_985 = cat(_T_763[13], _T_763[12]) @[el2_lib.scala 343:27] + node _T_986 = cat(_T_763[16], _T_763[15]) @[el2_lib.scala 343:27] + node _T_987 = cat(_T_986, _T_763[14]) @[el2_lib.scala 343:27] + node _T_988 = cat(_T_987, _T_985) @[el2_lib.scala 343:27] + node _T_989 = cat(_T_988, _T_984) @[el2_lib.scala 343:27] + node _T_990 = cat(_T_989, _T_981) @[el2_lib.scala 343:27] + node _T_991 = cat(_T_763[18], _T_763[17]) @[el2_lib.scala 343:27] + node _T_992 = cat(_T_763[20], _T_763[19]) @[el2_lib.scala 343:27] node _T_993 = cat(_T_992, _T_991) @[el2_lib.scala 343:27] - node _T_994 = cat(_T_755[31], _T_755[30]) @[el2_lib.scala 343:27] - node _T_995 = cat(_T_755[34], _T_755[33]) @[el2_lib.scala 343:27] - node _T_996 = cat(_T_995, _T_755[32]) @[el2_lib.scala 343:27] + node _T_994 = cat(_T_763[22], _T_763[21]) @[el2_lib.scala 343:27] + node _T_995 = cat(_T_763[25], _T_763[24]) @[el2_lib.scala 343:27] + node _T_996 = cat(_T_995, _T_763[23]) @[el2_lib.scala 343:27] node _T_997 = cat(_T_996, _T_994) @[el2_lib.scala 343:27] node _T_998 = cat(_T_997, _T_993) @[el2_lib.scala 343:27] - node _T_999 = cat(_T_998, _T_990) @[el2_lib.scala 343:27] - node _T_1000 = cat(_T_999, _T_982) @[el2_lib.scala 343:27] - node _T_1001 = xorr(_T_1000) @[el2_lib.scala 343:34] - node _T_1002 = cat(_T_756[1], _T_756[0]) @[el2_lib.scala 343:44] - node _T_1003 = cat(_T_756[3], _T_756[2]) @[el2_lib.scala 343:44] - node _T_1004 = cat(_T_1003, _T_1002) @[el2_lib.scala 343:44] - node _T_1005 = cat(_T_756[5], _T_756[4]) @[el2_lib.scala 343:44] - node _T_1006 = cat(_T_756[7], _T_756[6]) @[el2_lib.scala 343:44] - node _T_1007 = cat(_T_1006, _T_1005) @[el2_lib.scala 343:44] - node _T_1008 = cat(_T_1007, _T_1004) @[el2_lib.scala 343:44] - node _T_1009 = cat(_T_756[9], _T_756[8]) @[el2_lib.scala 343:44] - node _T_1010 = cat(_T_756[11], _T_756[10]) @[el2_lib.scala 343:44] - node _T_1011 = cat(_T_1010, _T_1009) @[el2_lib.scala 343:44] - node _T_1012 = cat(_T_756[13], _T_756[12]) @[el2_lib.scala 343:44] - node _T_1013 = cat(_T_756[16], _T_756[15]) @[el2_lib.scala 343:44] - node _T_1014 = cat(_T_1013, _T_756[14]) @[el2_lib.scala 343:44] - node _T_1015 = cat(_T_1014, _T_1012) @[el2_lib.scala 343:44] - node _T_1016 = cat(_T_1015, _T_1011) @[el2_lib.scala 343:44] - node _T_1017 = cat(_T_1016, _T_1008) @[el2_lib.scala 343:44] - node _T_1018 = cat(_T_756[18], _T_756[17]) @[el2_lib.scala 343:44] - node _T_1019 = cat(_T_756[20], _T_756[19]) @[el2_lib.scala 343:44] - node _T_1020 = cat(_T_1019, _T_1018) @[el2_lib.scala 343:44] - node _T_1021 = cat(_T_756[22], _T_756[21]) @[el2_lib.scala 343:44] - node _T_1022 = cat(_T_756[25], _T_756[24]) @[el2_lib.scala 343:44] - node _T_1023 = cat(_T_1022, _T_756[23]) @[el2_lib.scala 343:44] - node _T_1024 = cat(_T_1023, _T_1021) @[el2_lib.scala 343:44] - node _T_1025 = cat(_T_1024, _T_1020) @[el2_lib.scala 343:44] - node _T_1026 = cat(_T_756[27], _T_756[26]) @[el2_lib.scala 343:44] - node _T_1027 = cat(_T_756[29], _T_756[28]) @[el2_lib.scala 343:44] + node _T_999 = cat(_T_763[27], _T_763[26]) @[el2_lib.scala 343:27] + node _T_1000 = cat(_T_763[29], _T_763[28]) @[el2_lib.scala 343:27] + node _T_1001 = cat(_T_1000, _T_999) @[el2_lib.scala 343:27] + node _T_1002 = cat(_T_763[31], _T_763[30]) @[el2_lib.scala 343:27] + node _T_1003 = cat(_T_763[34], _T_763[33]) @[el2_lib.scala 343:27] + node _T_1004 = cat(_T_1003, _T_763[32]) @[el2_lib.scala 343:27] + node _T_1005 = cat(_T_1004, _T_1002) @[el2_lib.scala 343:27] + node _T_1006 = cat(_T_1005, _T_1001) @[el2_lib.scala 343:27] + node _T_1007 = cat(_T_1006, _T_998) @[el2_lib.scala 343:27] + node _T_1008 = cat(_T_1007, _T_990) @[el2_lib.scala 343:27] + node _T_1009 = xorr(_T_1008) @[el2_lib.scala 343:34] + node _T_1010 = cat(_T_764[1], _T_764[0]) @[el2_lib.scala 343:44] + node _T_1011 = cat(_T_764[3], _T_764[2]) @[el2_lib.scala 343:44] + node _T_1012 = cat(_T_1011, _T_1010) @[el2_lib.scala 343:44] + node _T_1013 = cat(_T_764[5], _T_764[4]) @[el2_lib.scala 343:44] + node _T_1014 = cat(_T_764[7], _T_764[6]) @[el2_lib.scala 343:44] + node _T_1015 = cat(_T_1014, _T_1013) @[el2_lib.scala 343:44] + node _T_1016 = cat(_T_1015, _T_1012) @[el2_lib.scala 343:44] + node _T_1017 = cat(_T_764[9], _T_764[8]) @[el2_lib.scala 343:44] + node _T_1018 = cat(_T_764[11], _T_764[10]) @[el2_lib.scala 343:44] + node _T_1019 = cat(_T_1018, _T_1017) @[el2_lib.scala 343:44] + node _T_1020 = cat(_T_764[13], _T_764[12]) @[el2_lib.scala 343:44] + node _T_1021 = cat(_T_764[16], _T_764[15]) @[el2_lib.scala 343:44] + node _T_1022 = cat(_T_1021, _T_764[14]) @[el2_lib.scala 343:44] + node _T_1023 = cat(_T_1022, _T_1020) @[el2_lib.scala 343:44] + node _T_1024 = cat(_T_1023, _T_1019) @[el2_lib.scala 343:44] + node _T_1025 = cat(_T_1024, _T_1016) @[el2_lib.scala 343:44] + node _T_1026 = cat(_T_764[18], _T_764[17]) @[el2_lib.scala 343:44] + node _T_1027 = cat(_T_764[20], _T_764[19]) @[el2_lib.scala 343:44] node _T_1028 = cat(_T_1027, _T_1026) @[el2_lib.scala 343:44] - node _T_1029 = cat(_T_756[31], _T_756[30]) @[el2_lib.scala 343:44] - node _T_1030 = cat(_T_756[34], _T_756[33]) @[el2_lib.scala 343:44] - node _T_1031 = cat(_T_1030, _T_756[32]) @[el2_lib.scala 343:44] + node _T_1029 = cat(_T_764[22], _T_764[21]) @[el2_lib.scala 343:44] + node _T_1030 = cat(_T_764[25], _T_764[24]) @[el2_lib.scala 343:44] + node _T_1031 = cat(_T_1030, _T_764[23]) @[el2_lib.scala 343:44] node _T_1032 = cat(_T_1031, _T_1029) @[el2_lib.scala 343:44] node _T_1033 = cat(_T_1032, _T_1028) @[el2_lib.scala 343:44] - node _T_1034 = cat(_T_1033, _T_1025) @[el2_lib.scala 343:44] - node _T_1035 = cat(_T_1034, _T_1017) @[el2_lib.scala 343:44] - node _T_1036 = xorr(_T_1035) @[el2_lib.scala 343:51] - node _T_1037 = cat(_T_757[1], _T_757[0]) @[el2_lib.scala 343:61] - node _T_1038 = cat(_T_757[3], _T_757[2]) @[el2_lib.scala 343:61] - node _T_1039 = cat(_T_1038, _T_1037) @[el2_lib.scala 343:61] - node _T_1040 = cat(_T_757[5], _T_757[4]) @[el2_lib.scala 343:61] - node _T_1041 = cat(_T_757[7], _T_757[6]) @[el2_lib.scala 343:61] - node _T_1042 = cat(_T_1041, _T_1040) @[el2_lib.scala 343:61] - node _T_1043 = cat(_T_1042, _T_1039) @[el2_lib.scala 343:61] - node _T_1044 = cat(_T_757[9], _T_757[8]) @[el2_lib.scala 343:61] - node _T_1045 = cat(_T_757[11], _T_757[10]) @[el2_lib.scala 343:61] - node _T_1046 = cat(_T_1045, _T_1044) @[el2_lib.scala 343:61] - node _T_1047 = cat(_T_757[13], _T_757[12]) @[el2_lib.scala 343:61] - node _T_1048 = cat(_T_757[16], _T_757[15]) @[el2_lib.scala 343:61] - node _T_1049 = cat(_T_1048, _T_757[14]) @[el2_lib.scala 343:61] - node _T_1050 = cat(_T_1049, _T_1047) @[el2_lib.scala 343:61] - node _T_1051 = cat(_T_1050, _T_1046) @[el2_lib.scala 343:61] - node _T_1052 = cat(_T_1051, _T_1043) @[el2_lib.scala 343:61] - node _T_1053 = cat(_T_757[18], _T_757[17]) @[el2_lib.scala 343:61] - node _T_1054 = cat(_T_757[20], _T_757[19]) @[el2_lib.scala 343:61] - node _T_1055 = cat(_T_1054, _T_1053) @[el2_lib.scala 343:61] - node _T_1056 = cat(_T_757[22], _T_757[21]) @[el2_lib.scala 343:61] - node _T_1057 = cat(_T_757[25], _T_757[24]) @[el2_lib.scala 343:61] - node _T_1058 = cat(_T_1057, _T_757[23]) @[el2_lib.scala 343:61] - node _T_1059 = cat(_T_1058, _T_1056) @[el2_lib.scala 343:61] - node _T_1060 = cat(_T_1059, _T_1055) @[el2_lib.scala 343:61] - node _T_1061 = cat(_T_757[27], _T_757[26]) @[el2_lib.scala 343:61] - node _T_1062 = cat(_T_757[29], _T_757[28]) @[el2_lib.scala 343:61] + node _T_1034 = cat(_T_764[27], _T_764[26]) @[el2_lib.scala 343:44] + node _T_1035 = cat(_T_764[29], _T_764[28]) @[el2_lib.scala 343:44] + node _T_1036 = cat(_T_1035, _T_1034) @[el2_lib.scala 343:44] + node _T_1037 = cat(_T_764[31], _T_764[30]) @[el2_lib.scala 343:44] + node _T_1038 = cat(_T_764[34], _T_764[33]) @[el2_lib.scala 343:44] + node _T_1039 = cat(_T_1038, _T_764[32]) @[el2_lib.scala 343:44] + node _T_1040 = cat(_T_1039, _T_1037) @[el2_lib.scala 343:44] + node _T_1041 = cat(_T_1040, _T_1036) @[el2_lib.scala 343:44] + node _T_1042 = cat(_T_1041, _T_1033) @[el2_lib.scala 343:44] + node _T_1043 = cat(_T_1042, _T_1025) @[el2_lib.scala 343:44] + node _T_1044 = xorr(_T_1043) @[el2_lib.scala 343:51] + node _T_1045 = cat(_T_765[1], _T_765[0]) @[el2_lib.scala 343:61] + node _T_1046 = cat(_T_765[3], _T_765[2]) @[el2_lib.scala 343:61] + node _T_1047 = cat(_T_1046, _T_1045) @[el2_lib.scala 343:61] + node _T_1048 = cat(_T_765[5], _T_765[4]) @[el2_lib.scala 343:61] + node _T_1049 = cat(_T_765[7], _T_765[6]) @[el2_lib.scala 343:61] + node _T_1050 = cat(_T_1049, _T_1048) @[el2_lib.scala 343:61] + node _T_1051 = cat(_T_1050, _T_1047) @[el2_lib.scala 343:61] + node _T_1052 = cat(_T_765[9], _T_765[8]) @[el2_lib.scala 343:61] + node _T_1053 = cat(_T_765[11], _T_765[10]) @[el2_lib.scala 343:61] + node _T_1054 = cat(_T_1053, _T_1052) @[el2_lib.scala 343:61] + node _T_1055 = cat(_T_765[13], _T_765[12]) @[el2_lib.scala 343:61] + node _T_1056 = cat(_T_765[16], _T_765[15]) @[el2_lib.scala 343:61] + node _T_1057 = cat(_T_1056, _T_765[14]) @[el2_lib.scala 343:61] + node _T_1058 = cat(_T_1057, _T_1055) @[el2_lib.scala 343:61] + node _T_1059 = cat(_T_1058, _T_1054) @[el2_lib.scala 343:61] + node _T_1060 = cat(_T_1059, _T_1051) @[el2_lib.scala 343:61] + node _T_1061 = cat(_T_765[18], _T_765[17]) @[el2_lib.scala 343:61] + node _T_1062 = cat(_T_765[20], _T_765[19]) @[el2_lib.scala 343:61] node _T_1063 = cat(_T_1062, _T_1061) @[el2_lib.scala 343:61] - node _T_1064 = cat(_T_757[31], _T_757[30]) @[el2_lib.scala 343:61] - node _T_1065 = cat(_T_757[34], _T_757[33]) @[el2_lib.scala 343:61] - node _T_1066 = cat(_T_1065, _T_757[32]) @[el2_lib.scala 343:61] + node _T_1064 = cat(_T_765[22], _T_765[21]) @[el2_lib.scala 343:61] + node _T_1065 = cat(_T_765[25], _T_765[24]) @[el2_lib.scala 343:61] + node _T_1066 = cat(_T_1065, _T_765[23]) @[el2_lib.scala 343:61] node _T_1067 = cat(_T_1066, _T_1064) @[el2_lib.scala 343:61] node _T_1068 = cat(_T_1067, _T_1063) @[el2_lib.scala 343:61] - node _T_1069 = cat(_T_1068, _T_1060) @[el2_lib.scala 343:61] - node _T_1070 = cat(_T_1069, _T_1052) @[el2_lib.scala 343:61] - node _T_1071 = xorr(_T_1070) @[el2_lib.scala 343:68] - node _T_1072 = cat(_T_758[2], _T_758[1]) @[el2_lib.scala 343:78] - node _T_1073 = cat(_T_1072, _T_758[0]) @[el2_lib.scala 343:78] - node _T_1074 = cat(_T_758[4], _T_758[3]) @[el2_lib.scala 343:78] - node _T_1075 = cat(_T_758[6], _T_758[5]) @[el2_lib.scala 343:78] - node _T_1076 = cat(_T_1075, _T_1074) @[el2_lib.scala 343:78] - node _T_1077 = cat(_T_1076, _T_1073) @[el2_lib.scala 343:78] - node _T_1078 = cat(_T_758[8], _T_758[7]) @[el2_lib.scala 343:78] - node _T_1079 = cat(_T_758[10], _T_758[9]) @[el2_lib.scala 343:78] - node _T_1080 = cat(_T_1079, _T_1078) @[el2_lib.scala 343:78] - node _T_1081 = cat(_T_758[12], _T_758[11]) @[el2_lib.scala 343:78] - node _T_1082 = cat(_T_758[14], _T_758[13]) @[el2_lib.scala 343:78] - node _T_1083 = cat(_T_1082, _T_1081) @[el2_lib.scala 343:78] - node _T_1084 = cat(_T_1083, _T_1080) @[el2_lib.scala 343:78] - node _T_1085 = cat(_T_1084, _T_1077) @[el2_lib.scala 343:78] - node _T_1086 = cat(_T_758[16], _T_758[15]) @[el2_lib.scala 343:78] - node _T_1087 = cat(_T_758[18], _T_758[17]) @[el2_lib.scala 343:78] + node _T_1069 = cat(_T_765[27], _T_765[26]) @[el2_lib.scala 343:61] + node _T_1070 = cat(_T_765[29], _T_765[28]) @[el2_lib.scala 343:61] + node _T_1071 = cat(_T_1070, _T_1069) @[el2_lib.scala 343:61] + node _T_1072 = cat(_T_765[31], _T_765[30]) @[el2_lib.scala 343:61] + node _T_1073 = cat(_T_765[34], _T_765[33]) @[el2_lib.scala 343:61] + node _T_1074 = cat(_T_1073, _T_765[32]) @[el2_lib.scala 343:61] + node _T_1075 = cat(_T_1074, _T_1072) @[el2_lib.scala 343:61] + node _T_1076 = cat(_T_1075, _T_1071) @[el2_lib.scala 343:61] + node _T_1077 = cat(_T_1076, _T_1068) @[el2_lib.scala 343:61] + node _T_1078 = cat(_T_1077, _T_1060) @[el2_lib.scala 343:61] + node _T_1079 = xorr(_T_1078) @[el2_lib.scala 343:68] + node _T_1080 = cat(_T_766[2], _T_766[1]) @[el2_lib.scala 343:78] + node _T_1081 = cat(_T_1080, _T_766[0]) @[el2_lib.scala 343:78] + node _T_1082 = cat(_T_766[4], _T_766[3]) @[el2_lib.scala 343:78] + node _T_1083 = cat(_T_766[6], _T_766[5]) @[el2_lib.scala 343:78] + node _T_1084 = cat(_T_1083, _T_1082) @[el2_lib.scala 343:78] + node _T_1085 = cat(_T_1084, _T_1081) @[el2_lib.scala 343:78] + node _T_1086 = cat(_T_766[8], _T_766[7]) @[el2_lib.scala 343:78] + node _T_1087 = cat(_T_766[10], _T_766[9]) @[el2_lib.scala 343:78] node _T_1088 = cat(_T_1087, _T_1086) @[el2_lib.scala 343:78] - node _T_1089 = cat(_T_758[20], _T_758[19]) @[el2_lib.scala 343:78] - node _T_1090 = cat(_T_758[22], _T_758[21]) @[el2_lib.scala 343:78] + node _T_1089 = cat(_T_766[12], _T_766[11]) @[el2_lib.scala 343:78] + node _T_1090 = cat(_T_766[14], _T_766[13]) @[el2_lib.scala 343:78] node _T_1091 = cat(_T_1090, _T_1089) @[el2_lib.scala 343:78] node _T_1092 = cat(_T_1091, _T_1088) @[el2_lib.scala 343:78] - node _T_1093 = cat(_T_758[24], _T_758[23]) @[el2_lib.scala 343:78] - node _T_1094 = cat(_T_758[26], _T_758[25]) @[el2_lib.scala 343:78] - node _T_1095 = cat(_T_1094, _T_1093) @[el2_lib.scala 343:78] - node _T_1096 = cat(_T_758[28], _T_758[27]) @[el2_lib.scala 343:78] - node _T_1097 = cat(_T_758[30], _T_758[29]) @[el2_lib.scala 343:78] - node _T_1098 = cat(_T_1097, _T_1096) @[el2_lib.scala 343:78] - node _T_1099 = cat(_T_1098, _T_1095) @[el2_lib.scala 343:78] - node _T_1100 = cat(_T_1099, _T_1092) @[el2_lib.scala 343:78] - node _T_1101 = cat(_T_1100, _T_1085) @[el2_lib.scala 343:78] - node _T_1102 = xorr(_T_1101) @[el2_lib.scala 343:85] - node _T_1103 = cat(_T_759[2], _T_759[1]) @[el2_lib.scala 343:95] - node _T_1104 = cat(_T_1103, _T_759[0]) @[el2_lib.scala 343:95] - node _T_1105 = cat(_T_759[4], _T_759[3]) @[el2_lib.scala 343:95] - node _T_1106 = cat(_T_759[6], _T_759[5]) @[el2_lib.scala 343:95] - node _T_1107 = cat(_T_1106, _T_1105) @[el2_lib.scala 343:95] - node _T_1108 = cat(_T_1107, _T_1104) @[el2_lib.scala 343:95] - node _T_1109 = cat(_T_759[8], _T_759[7]) @[el2_lib.scala 343:95] - node _T_1110 = cat(_T_759[10], _T_759[9]) @[el2_lib.scala 343:95] - node _T_1111 = cat(_T_1110, _T_1109) @[el2_lib.scala 343:95] - node _T_1112 = cat(_T_759[12], _T_759[11]) @[el2_lib.scala 343:95] - node _T_1113 = cat(_T_759[14], _T_759[13]) @[el2_lib.scala 343:95] - node _T_1114 = cat(_T_1113, _T_1112) @[el2_lib.scala 343:95] - node _T_1115 = cat(_T_1114, _T_1111) @[el2_lib.scala 343:95] - node _T_1116 = cat(_T_1115, _T_1108) @[el2_lib.scala 343:95] - node _T_1117 = cat(_T_759[16], _T_759[15]) @[el2_lib.scala 343:95] - node _T_1118 = cat(_T_759[18], _T_759[17]) @[el2_lib.scala 343:95] + node _T_1093 = cat(_T_1092, _T_1085) @[el2_lib.scala 343:78] + node _T_1094 = cat(_T_766[16], _T_766[15]) @[el2_lib.scala 343:78] + node _T_1095 = cat(_T_766[18], _T_766[17]) @[el2_lib.scala 343:78] + node _T_1096 = cat(_T_1095, _T_1094) @[el2_lib.scala 343:78] + node _T_1097 = cat(_T_766[20], _T_766[19]) @[el2_lib.scala 343:78] + node _T_1098 = cat(_T_766[22], _T_766[21]) @[el2_lib.scala 343:78] + node _T_1099 = cat(_T_1098, _T_1097) @[el2_lib.scala 343:78] + node _T_1100 = cat(_T_1099, _T_1096) @[el2_lib.scala 343:78] + node _T_1101 = cat(_T_766[24], _T_766[23]) @[el2_lib.scala 343:78] + node _T_1102 = cat(_T_766[26], _T_766[25]) @[el2_lib.scala 343:78] + node _T_1103 = cat(_T_1102, _T_1101) @[el2_lib.scala 343:78] + node _T_1104 = cat(_T_766[28], _T_766[27]) @[el2_lib.scala 343:78] + node _T_1105 = cat(_T_766[30], _T_766[29]) @[el2_lib.scala 343:78] + node _T_1106 = cat(_T_1105, _T_1104) @[el2_lib.scala 343:78] + node _T_1107 = cat(_T_1106, _T_1103) @[el2_lib.scala 343:78] + node _T_1108 = cat(_T_1107, _T_1100) @[el2_lib.scala 343:78] + node _T_1109 = cat(_T_1108, _T_1093) @[el2_lib.scala 343:78] + node _T_1110 = xorr(_T_1109) @[el2_lib.scala 343:85] + node _T_1111 = cat(_T_767[2], _T_767[1]) @[el2_lib.scala 343:95] + node _T_1112 = cat(_T_1111, _T_767[0]) @[el2_lib.scala 343:95] + node _T_1113 = cat(_T_767[4], _T_767[3]) @[el2_lib.scala 343:95] + node _T_1114 = cat(_T_767[6], _T_767[5]) @[el2_lib.scala 343:95] + node _T_1115 = cat(_T_1114, _T_1113) @[el2_lib.scala 343:95] + node _T_1116 = cat(_T_1115, _T_1112) @[el2_lib.scala 343:95] + node _T_1117 = cat(_T_767[8], _T_767[7]) @[el2_lib.scala 343:95] + node _T_1118 = cat(_T_767[10], _T_767[9]) @[el2_lib.scala 343:95] node _T_1119 = cat(_T_1118, _T_1117) @[el2_lib.scala 343:95] - node _T_1120 = cat(_T_759[20], _T_759[19]) @[el2_lib.scala 343:95] - node _T_1121 = cat(_T_759[22], _T_759[21]) @[el2_lib.scala 343:95] + node _T_1120 = cat(_T_767[12], _T_767[11]) @[el2_lib.scala 343:95] + node _T_1121 = cat(_T_767[14], _T_767[13]) @[el2_lib.scala 343:95] node _T_1122 = cat(_T_1121, _T_1120) @[el2_lib.scala 343:95] node _T_1123 = cat(_T_1122, _T_1119) @[el2_lib.scala 343:95] - node _T_1124 = cat(_T_759[24], _T_759[23]) @[el2_lib.scala 343:95] - node _T_1125 = cat(_T_759[26], _T_759[25]) @[el2_lib.scala 343:95] - node _T_1126 = cat(_T_1125, _T_1124) @[el2_lib.scala 343:95] - node _T_1127 = cat(_T_759[28], _T_759[27]) @[el2_lib.scala 343:95] - node _T_1128 = cat(_T_759[30], _T_759[29]) @[el2_lib.scala 343:95] - node _T_1129 = cat(_T_1128, _T_1127) @[el2_lib.scala 343:95] - node _T_1130 = cat(_T_1129, _T_1126) @[el2_lib.scala 343:95] - node _T_1131 = cat(_T_1130, _T_1123) @[el2_lib.scala 343:95] - node _T_1132 = cat(_T_1131, _T_1116) @[el2_lib.scala 343:95] - node _T_1133 = xorr(_T_1132) @[el2_lib.scala 343:102] - node _T_1134 = cat(_T_760[2], _T_760[1]) @[el2_lib.scala 343:112] - node _T_1135 = cat(_T_1134, _T_760[0]) @[el2_lib.scala 343:112] - node _T_1136 = cat(_T_760[4], _T_760[3]) @[el2_lib.scala 343:112] - node _T_1137 = cat(_T_760[6], _T_760[5]) @[el2_lib.scala 343:112] - node _T_1138 = cat(_T_1137, _T_1136) @[el2_lib.scala 343:112] - node _T_1139 = cat(_T_1138, _T_1135) @[el2_lib.scala 343:112] - node _T_1140 = cat(_T_760[8], _T_760[7]) @[el2_lib.scala 343:112] - node _T_1141 = cat(_T_760[10], _T_760[9]) @[el2_lib.scala 343:112] - node _T_1142 = cat(_T_1141, _T_1140) @[el2_lib.scala 343:112] - node _T_1143 = cat(_T_760[12], _T_760[11]) @[el2_lib.scala 343:112] - node _T_1144 = cat(_T_760[14], _T_760[13]) @[el2_lib.scala 343:112] - node _T_1145 = cat(_T_1144, _T_1143) @[el2_lib.scala 343:112] - node _T_1146 = cat(_T_1145, _T_1142) @[el2_lib.scala 343:112] - node _T_1147 = cat(_T_1146, _T_1139) @[el2_lib.scala 343:112] - node _T_1148 = cat(_T_760[16], _T_760[15]) @[el2_lib.scala 343:112] - node _T_1149 = cat(_T_760[18], _T_760[17]) @[el2_lib.scala 343:112] + node _T_1124 = cat(_T_1123, _T_1116) @[el2_lib.scala 343:95] + node _T_1125 = cat(_T_767[16], _T_767[15]) @[el2_lib.scala 343:95] + node _T_1126 = cat(_T_767[18], _T_767[17]) @[el2_lib.scala 343:95] + node _T_1127 = cat(_T_1126, _T_1125) @[el2_lib.scala 343:95] + node _T_1128 = cat(_T_767[20], _T_767[19]) @[el2_lib.scala 343:95] + node _T_1129 = cat(_T_767[22], _T_767[21]) @[el2_lib.scala 343:95] + node _T_1130 = cat(_T_1129, _T_1128) @[el2_lib.scala 343:95] + node _T_1131 = cat(_T_1130, _T_1127) @[el2_lib.scala 343:95] + node _T_1132 = cat(_T_767[24], _T_767[23]) @[el2_lib.scala 343:95] + node _T_1133 = cat(_T_767[26], _T_767[25]) @[el2_lib.scala 343:95] + node _T_1134 = cat(_T_1133, _T_1132) @[el2_lib.scala 343:95] + node _T_1135 = cat(_T_767[28], _T_767[27]) @[el2_lib.scala 343:95] + node _T_1136 = cat(_T_767[30], _T_767[29]) @[el2_lib.scala 343:95] + node _T_1137 = cat(_T_1136, _T_1135) @[el2_lib.scala 343:95] + node _T_1138 = cat(_T_1137, _T_1134) @[el2_lib.scala 343:95] + node _T_1139 = cat(_T_1138, _T_1131) @[el2_lib.scala 343:95] + node _T_1140 = cat(_T_1139, _T_1124) @[el2_lib.scala 343:95] + node _T_1141 = xorr(_T_1140) @[el2_lib.scala 343:102] + node _T_1142 = cat(_T_768[2], _T_768[1]) @[el2_lib.scala 343:112] + node _T_1143 = cat(_T_1142, _T_768[0]) @[el2_lib.scala 343:112] + node _T_1144 = cat(_T_768[4], _T_768[3]) @[el2_lib.scala 343:112] + node _T_1145 = cat(_T_768[6], _T_768[5]) @[el2_lib.scala 343:112] + node _T_1146 = cat(_T_1145, _T_1144) @[el2_lib.scala 343:112] + node _T_1147 = cat(_T_1146, _T_1143) @[el2_lib.scala 343:112] + node _T_1148 = cat(_T_768[8], _T_768[7]) @[el2_lib.scala 343:112] + node _T_1149 = cat(_T_768[10], _T_768[9]) @[el2_lib.scala 343:112] node _T_1150 = cat(_T_1149, _T_1148) @[el2_lib.scala 343:112] - node _T_1151 = cat(_T_760[20], _T_760[19]) @[el2_lib.scala 343:112] - node _T_1152 = cat(_T_760[22], _T_760[21]) @[el2_lib.scala 343:112] + node _T_1151 = cat(_T_768[12], _T_768[11]) @[el2_lib.scala 343:112] + node _T_1152 = cat(_T_768[14], _T_768[13]) @[el2_lib.scala 343:112] node _T_1153 = cat(_T_1152, _T_1151) @[el2_lib.scala 343:112] node _T_1154 = cat(_T_1153, _T_1150) @[el2_lib.scala 343:112] - node _T_1155 = cat(_T_760[24], _T_760[23]) @[el2_lib.scala 343:112] - node _T_1156 = cat(_T_760[26], _T_760[25]) @[el2_lib.scala 343:112] - node _T_1157 = cat(_T_1156, _T_1155) @[el2_lib.scala 343:112] - node _T_1158 = cat(_T_760[28], _T_760[27]) @[el2_lib.scala 343:112] - node _T_1159 = cat(_T_760[30], _T_760[29]) @[el2_lib.scala 343:112] - node _T_1160 = cat(_T_1159, _T_1158) @[el2_lib.scala 343:112] - node _T_1161 = cat(_T_1160, _T_1157) @[el2_lib.scala 343:112] - node _T_1162 = cat(_T_1161, _T_1154) @[el2_lib.scala 343:112] - node _T_1163 = cat(_T_1162, _T_1147) @[el2_lib.scala 343:112] - node _T_1164 = xorr(_T_1163) @[el2_lib.scala 343:119] - node _T_1165 = cat(_T_761[2], _T_761[1]) @[el2_lib.scala 343:129] - node _T_1166 = cat(_T_1165, _T_761[0]) @[el2_lib.scala 343:129] - node _T_1167 = cat(_T_761[4], _T_761[3]) @[el2_lib.scala 343:129] - node _T_1168 = cat(_T_761[6], _T_761[5]) @[el2_lib.scala 343:129] - node _T_1169 = cat(_T_1168, _T_1167) @[el2_lib.scala 343:129] - node _T_1170 = cat(_T_1169, _T_1166) @[el2_lib.scala 343:129] - node _T_1171 = xorr(_T_1170) @[el2_lib.scala 343:136] - node _T_1172 = cat(_T_1133, _T_1164) @[Cat.scala 29:58] - node _T_1173 = cat(_T_1172, _T_1171) @[Cat.scala 29:58] - node _T_1174 = cat(_T_1071, _T_1102) @[Cat.scala 29:58] - node _T_1175 = cat(_T_1001, _T_1036) @[Cat.scala 29:58] - node _T_1176 = cat(_T_1175, _T_1174) @[Cat.scala 29:58] - node ic_miss_buff_ecc = cat(_T_1176, _T_1173) @[Cat.scala 29:58] + node _T_1155 = cat(_T_1154, _T_1147) @[el2_lib.scala 343:112] + node _T_1156 = cat(_T_768[16], _T_768[15]) @[el2_lib.scala 343:112] + node _T_1157 = cat(_T_768[18], _T_768[17]) @[el2_lib.scala 343:112] + node _T_1158 = cat(_T_1157, _T_1156) @[el2_lib.scala 343:112] + node _T_1159 = cat(_T_768[20], _T_768[19]) @[el2_lib.scala 343:112] + node _T_1160 = cat(_T_768[22], _T_768[21]) @[el2_lib.scala 343:112] + node _T_1161 = cat(_T_1160, _T_1159) @[el2_lib.scala 343:112] + node _T_1162 = cat(_T_1161, _T_1158) @[el2_lib.scala 343:112] + node _T_1163 = cat(_T_768[24], _T_768[23]) @[el2_lib.scala 343:112] + node _T_1164 = cat(_T_768[26], _T_768[25]) @[el2_lib.scala 343:112] + node _T_1165 = cat(_T_1164, _T_1163) @[el2_lib.scala 343:112] + node _T_1166 = cat(_T_768[28], _T_768[27]) @[el2_lib.scala 343:112] + node _T_1167 = cat(_T_768[30], _T_768[29]) @[el2_lib.scala 343:112] + node _T_1168 = cat(_T_1167, _T_1166) @[el2_lib.scala 343:112] + node _T_1169 = cat(_T_1168, _T_1165) @[el2_lib.scala 343:112] + node _T_1170 = cat(_T_1169, _T_1162) @[el2_lib.scala 343:112] + node _T_1171 = cat(_T_1170, _T_1155) @[el2_lib.scala 343:112] + node _T_1172 = xorr(_T_1171) @[el2_lib.scala 343:119] + node _T_1173 = cat(_T_769[2], _T_769[1]) @[el2_lib.scala 343:129] + node _T_1174 = cat(_T_1173, _T_769[0]) @[el2_lib.scala 343:129] + node _T_1175 = cat(_T_769[4], _T_769[3]) @[el2_lib.scala 343:129] + node _T_1176 = cat(_T_769[6], _T_769[5]) @[el2_lib.scala 343:129] + node _T_1177 = cat(_T_1176, _T_1175) @[el2_lib.scala 343:129] + node _T_1178 = cat(_T_1177, _T_1174) @[el2_lib.scala 343:129] + node _T_1179 = xorr(_T_1178) @[el2_lib.scala 343:136] + node _T_1180 = cat(_T_1141, _T_1172) @[Cat.scala 29:58] + node _T_1181 = cat(_T_1180, _T_1179) @[Cat.scala 29:58] + node _T_1182 = cat(_T_1079, _T_1110) @[Cat.scala 29:58] + node _T_1183 = cat(_T_1009, _T_1044) @[Cat.scala 29:58] + node _T_1184 = cat(_T_1183, _T_1182) @[Cat.scala 29:58] + node ic_miss_buff_ecc = cat(_T_1184, _T_1181) @[Cat.scala 29:58] wire ic_wr_16bytes_data : UInt<142> ic_wr_16bytes_data <= UInt<1>("h00") - node _T_1177 = bits(ic_wr_16bytes_data, 70, 0) @[el2_ifu_mem_ctl.scala 388:72] - node _T_1178 = bits(ic_wr_16bytes_data, 141, 71) @[el2_ifu_mem_ctl.scala 388:72] - io.ic_wr_data[0] <= _T_1177 @[el2_ifu_mem_ctl.scala 388:17] - io.ic_wr_data[1] <= _T_1178 @[el2_ifu_mem_ctl.scala 388:17] - io.ic_debug_wr_data <= io.dec_tlu_ic_diag_pkt.icache_wrdata @[el2_ifu_mem_ctl.scala 389:23] + node _T_1185 = bits(ic_wr_16bytes_data, 70, 0) @[el2_ifu_mem_ctl.scala 391:72] + node _T_1186 = bits(ic_wr_16bytes_data, 141, 71) @[el2_ifu_mem_ctl.scala 391:72] + io.ic_wr_data[0] <= _T_1185 @[el2_ifu_mem_ctl.scala 391:17] + io.ic_wr_data[1] <= _T_1186 @[el2_ifu_mem_ctl.scala 391:17] + io.ic_debug_wr_data <= io.dec_tlu_ic_diag_pkt.icache_wrdata @[el2_ifu_mem_ctl.scala 392:23] wire ic_rd_parity_final_err : UInt<1> ic_rd_parity_final_err <= UInt<1>("h00") - node _T_1179 = orr(io.ic_eccerr) @[el2_ifu_mem_ctl.scala 391:56] - node _T_1180 = and(_T_1179, ic_act_hit_f) @[el2_ifu_mem_ctl.scala 391:83] - node _T_1181 = or(_T_1180, ic_rd_parity_final_err) @[el2_ifu_mem_ctl.scala 391:99] - io.ic_error_start <= _T_1181 @[el2_ifu_mem_ctl.scala 391:21] + node _T_1187 = orr(io.ic_eccerr) @[el2_ifu_mem_ctl.scala 394:56] + node _T_1188 = and(_T_1187, ic_act_hit_f) @[el2_ifu_mem_ctl.scala 394:83] + node _T_1189 = or(_T_1188, ic_rd_parity_final_err) @[el2_ifu_mem_ctl.scala 394:99] + io.ic_error_start <= _T_1189 @[el2_ifu_mem_ctl.scala 394:21] wire ic_debug_tag_val_rd_out : UInt<1> ic_debug_tag_val_rd_out <= UInt<1>("h00") wire ic_debug_ict_array_sel_ff : UInt<1> ic_debug_ict_array_sel_ff <= UInt<1>("h00") - node _T_1182 = bits(ic_debug_ict_array_sel_ff, 0, 0) @[el2_ifu_mem_ctl.scala 394:63] - node _T_1183 = bits(io.ictag_debug_rd_data, 25, 21) @[el2_ifu_mem_ctl.scala 394:121] - node _T_1184 = bits(io.ictag_debug_rd_data, 20, 0) @[el2_ifu_mem_ctl.scala 394:161] - node _T_1185 = cat(UInt<3>("h00"), ic_debug_tag_val_rd_out) @[Cat.scala 29:58] - node _T_1186 = cat(UInt<1>("h00"), way_status) @[Cat.scala 29:58] - node _T_1187 = cat(_T_1186, _T_1185) @[Cat.scala 29:58] - node _T_1188 = cat(UInt<32>("h00"), _T_1184) @[Cat.scala 29:58] - node _T_1189 = cat(UInt<2>("h00"), _T_1183) @[Cat.scala 29:58] - node _T_1190 = cat(_T_1189, _T_1188) @[Cat.scala 29:58] - node _T_1191 = cat(_T_1190, _T_1187) @[Cat.scala 29:58] - node ifu_ic_debug_rd_data_in = mux(_T_1182, _T_1191, io.ic_debug_rd_data) @[el2_ifu_mem_ctl.scala 394:36] - reg _T_1192 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 397:37] - _T_1192 <= ifu_ic_debug_rd_data_in @[el2_ifu_mem_ctl.scala 397:37] - io.ifu_ic_debug_rd_data <= _T_1192 @[el2_ifu_mem_ctl.scala 397:27] - node _T_1193 = bits(ifu_bus_rdata_ff, 15, 0) @[el2_ifu_mem_ctl.scala 398:74] - node _T_1194 = xorr(_T_1193) @[el2_lib.scala 203:13] - node _T_1195 = bits(ifu_bus_rdata_ff, 31, 16) @[el2_ifu_mem_ctl.scala 398:74] - node _T_1196 = xorr(_T_1195) @[el2_lib.scala 203:13] - node _T_1197 = bits(ifu_bus_rdata_ff, 47, 32) @[el2_ifu_mem_ctl.scala 398:74] - node _T_1198 = xorr(_T_1197) @[el2_lib.scala 203:13] - node _T_1199 = bits(ifu_bus_rdata_ff, 63, 48) @[el2_ifu_mem_ctl.scala 398:74] - node _T_1200 = xorr(_T_1199) @[el2_lib.scala 203:13] - node _T_1201 = cat(_T_1200, _T_1198) @[Cat.scala 29:58] - node _T_1202 = cat(_T_1201, _T_1196) @[Cat.scala 29:58] - node ic_wr_parity = cat(_T_1202, _T_1194) @[Cat.scala 29:58] - node _T_1203 = bits(ic_miss_buff_half, 15, 0) @[el2_ifu_mem_ctl.scala 399:82] + node _T_1190 = bits(ic_debug_ict_array_sel_ff, 0, 0) @[el2_ifu_mem_ctl.scala 397:63] + node _T_1191 = bits(io.ictag_debug_rd_data, 25, 21) @[el2_ifu_mem_ctl.scala 397:121] + node _T_1192 = bits(io.ictag_debug_rd_data, 20, 0) @[el2_ifu_mem_ctl.scala 397:161] + node _T_1193 = cat(UInt<3>("h00"), ic_debug_tag_val_rd_out) @[Cat.scala 29:58] + node _T_1194 = cat(UInt<1>("h00"), way_status) @[Cat.scala 29:58] + node _T_1195 = cat(_T_1194, _T_1193) @[Cat.scala 29:58] + node _T_1196 = cat(UInt<32>("h00"), _T_1192) @[Cat.scala 29:58] + node _T_1197 = cat(UInt<2>("h00"), _T_1191) @[Cat.scala 29:58] + node _T_1198 = cat(_T_1197, _T_1196) @[Cat.scala 29:58] + node _T_1199 = cat(_T_1198, _T_1195) @[Cat.scala 29:58] + node ifu_ic_debug_rd_data_in = mux(_T_1190, _T_1199, io.ic_debug_rd_data) @[el2_ifu_mem_ctl.scala 397:36] + reg _T_1200 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 400:37] + _T_1200 <= ifu_ic_debug_rd_data_in @[el2_ifu_mem_ctl.scala 400:37] + io.ifu_ic_debug_rd_data <= _T_1200 @[el2_ifu_mem_ctl.scala 400:27] + node _T_1201 = bits(ifu_bus_rdata_ff, 15, 0) @[el2_ifu_mem_ctl.scala 401:74] + node _T_1202 = xorr(_T_1201) @[el2_lib.scala 203:13] + node _T_1203 = bits(ifu_bus_rdata_ff, 31, 16) @[el2_ifu_mem_ctl.scala 401:74] node _T_1204 = xorr(_T_1203) @[el2_lib.scala 203:13] - node _T_1205 = bits(ic_miss_buff_half, 31, 16) @[el2_ifu_mem_ctl.scala 399:82] + node _T_1205 = bits(ifu_bus_rdata_ff, 47, 32) @[el2_ifu_mem_ctl.scala 401:74] node _T_1206 = xorr(_T_1205) @[el2_lib.scala 203:13] - node _T_1207 = bits(ic_miss_buff_half, 47, 32) @[el2_ifu_mem_ctl.scala 399:82] + node _T_1207 = bits(ifu_bus_rdata_ff, 63, 48) @[el2_ifu_mem_ctl.scala 401:74] node _T_1208 = xorr(_T_1207) @[el2_lib.scala 203:13] - node _T_1209 = bits(ic_miss_buff_half, 63, 48) @[el2_ifu_mem_ctl.scala 399:82] - node _T_1210 = xorr(_T_1209) @[el2_lib.scala 203:13] - node _T_1211 = cat(_T_1210, _T_1208) @[Cat.scala 29:58] - node _T_1212 = cat(_T_1211, _T_1206) @[Cat.scala 29:58] - node ic_miss_buff_parity = cat(_T_1212, _T_1204) @[Cat.scala 29:58] - node _T_1213 = bits(ifu_bus_rid_ff, 0, 0) @[el2_ifu_mem_ctl.scala 401:43] - node _T_1214 = bits(_T_1213, 0, 0) @[el2_ifu_mem_ctl.scala 401:47] - node _T_1215 = bits(ifu_bus_rdata_ff, 63, 0) @[el2_ifu_mem_ctl.scala 401:117] - node _T_1216 = bits(ic_miss_buff_half, 63, 0) @[el2_ifu_mem_ctl.scala 401:201] - node _T_1217 = cat(ic_miss_buff_ecc, _T_1216) @[Cat.scala 29:58] - node _T_1218 = cat(ic_wr_ecc, _T_1215) @[Cat.scala 29:58] - node _T_1219 = cat(_T_1218, _T_1217) @[Cat.scala 29:58] - node _T_1220 = cat(ic_wr_ecc, ifu_bus_rdata_ff) @[Cat.scala 29:58] - node _T_1221 = cat(ic_miss_buff_ecc, ic_miss_buff_half) @[Cat.scala 29:58] - node _T_1222 = cat(_T_1221, _T_1220) @[Cat.scala 29:58] - node _T_1223 = mux(_T_1214, _T_1219, _T_1222) @[el2_ifu_mem_ctl.scala 401:28] - ic_wr_16bytes_data <= _T_1223 @[el2_ifu_mem_ctl.scala 401:22] + node _T_1209 = cat(_T_1208, _T_1206) @[Cat.scala 29:58] + node _T_1210 = cat(_T_1209, _T_1204) @[Cat.scala 29:58] + node ic_wr_parity = cat(_T_1210, _T_1202) @[Cat.scala 29:58] + node _T_1211 = bits(ic_miss_buff_half, 15, 0) @[el2_ifu_mem_ctl.scala 402:82] + node _T_1212 = xorr(_T_1211) @[el2_lib.scala 203:13] + node _T_1213 = bits(ic_miss_buff_half, 31, 16) @[el2_ifu_mem_ctl.scala 402:82] + node _T_1214 = xorr(_T_1213) @[el2_lib.scala 203:13] + node _T_1215 = bits(ic_miss_buff_half, 47, 32) @[el2_ifu_mem_ctl.scala 402:82] + node _T_1216 = xorr(_T_1215) @[el2_lib.scala 203:13] + node _T_1217 = bits(ic_miss_buff_half, 63, 48) @[el2_ifu_mem_ctl.scala 402:82] + node _T_1218 = xorr(_T_1217) @[el2_lib.scala 203:13] + node _T_1219 = cat(_T_1218, _T_1216) @[Cat.scala 29:58] + node _T_1220 = cat(_T_1219, _T_1214) @[Cat.scala 29:58] + node ic_miss_buff_parity = cat(_T_1220, _T_1212) @[Cat.scala 29:58] + node _T_1221 = bits(ifu_bus_rid_ff, 0, 0) @[el2_ifu_mem_ctl.scala 404:43] + node _T_1222 = bits(_T_1221, 0, 0) @[el2_ifu_mem_ctl.scala 404:47] + node _T_1223 = bits(ifu_bus_rdata_ff, 63, 0) @[el2_ifu_mem_ctl.scala 404:117] + node _T_1224 = bits(ic_miss_buff_half, 63, 0) @[el2_ifu_mem_ctl.scala 404:201] + node _T_1225 = cat(ic_miss_buff_ecc, _T_1224) @[Cat.scala 29:58] + node _T_1226 = cat(ic_wr_ecc, _T_1223) @[Cat.scala 29:58] + node _T_1227 = cat(_T_1226, _T_1225) @[Cat.scala 29:58] + node _T_1228 = cat(ic_wr_ecc, ifu_bus_rdata_ff) @[Cat.scala 29:58] + node _T_1229 = cat(ic_miss_buff_ecc, ic_miss_buff_half) @[Cat.scala 29:58] + node _T_1230 = cat(_T_1229, _T_1228) @[Cat.scala 29:58] + node _T_1231 = mux(_T_1222, _T_1227, _T_1230) @[el2_ifu_mem_ctl.scala 404:28] + ic_wr_16bytes_data <= _T_1231 @[el2_ifu_mem_ctl.scala 404:22] wire bus_ifu_wr_data_error_ff : UInt<1> bus_ifu_wr_data_error_ff <= UInt<1>("h00") wire ifu_wr_data_comb_err_ff : UInt<1> ifu_wr_data_comb_err_ff <= UInt<1>("h00") wire reset_beat_cnt : UInt<1> reset_beat_cnt <= UInt<1>("h00") - node _T_1224 = or(bus_ifu_wr_data_error_ff, ifu_wr_data_comb_err_ff) @[el2_ifu_mem_ctl.scala 407:53] - node _T_1225 = eq(reset_beat_cnt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 407:82] - node ifu_wr_cumulative_err = and(_T_1224, _T_1225) @[el2_ifu_mem_ctl.scala 407:80] - node _T_1226 = or(bus_ifu_wr_data_error_ff, ifu_wr_data_comb_err_ff) @[el2_ifu_mem_ctl.scala 408:55] - ifu_wr_cumulative_err_data <= _T_1226 @[el2_ifu_mem_ctl.scala 408:30] - reg _T_1227 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 409:61] - _T_1227 <= ifu_wr_cumulative_err @[el2_ifu_mem_ctl.scala 409:61] - ifu_wr_data_comb_err_ff <= _T_1227 @[el2_ifu_mem_ctl.scala 409:27] + node _T_1232 = or(bus_ifu_wr_data_error_ff, ifu_wr_data_comb_err_ff) @[el2_ifu_mem_ctl.scala 410:53] + node _T_1233 = eq(reset_beat_cnt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 410:82] + node ifu_wr_cumulative_err = and(_T_1232, _T_1233) @[el2_ifu_mem_ctl.scala 410:80] + node _T_1234 = or(bus_ifu_wr_data_error_ff, ifu_wr_data_comb_err_ff) @[el2_ifu_mem_ctl.scala 411:55] + ifu_wr_cumulative_err_data <= _T_1234 @[el2_ifu_mem_ctl.scala 411:30] + reg _T_1235 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 412:61] + _T_1235 <= ifu_wr_cumulative_err @[el2_ifu_mem_ctl.scala 412:61] + ifu_wr_data_comb_err_ff <= _T_1235 @[el2_ifu_mem_ctl.scala 412:27] wire ic_crit_wd_rdy : UInt<1> ic_crit_wd_rdy <= UInt<1>("h00") wire ifu_byp_data_err_new : UInt<1> ifu_byp_data_err_new <= UInt<1>("h00") - node _T_1228 = eq(miss_state, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 412:51] - node _T_1229 = or(ic_crit_wd_rdy, _T_1228) @[el2_ifu_mem_ctl.scala 412:38] - node _T_1230 = eq(miss_state, UInt<3>("h01")) @[el2_ifu_mem_ctl.scala 412:77] - node _T_1231 = or(_T_1229, _T_1230) @[el2_ifu_mem_ctl.scala 412:64] - node _T_1232 = eq(ifu_byp_data_err_new, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 412:98] - node sel_byp_data = and(_T_1231, _T_1232) @[el2_ifu_mem_ctl.scala 412:96] - node _T_1233 = eq(miss_state, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 413:51] - node _T_1234 = or(ic_crit_wd_rdy, _T_1233) @[el2_ifu_mem_ctl.scala 413:38] - node _T_1235 = eq(miss_state, UInt<3>("h01")) @[el2_ifu_mem_ctl.scala 413:77] - node _T_1236 = or(_T_1234, _T_1235) @[el2_ifu_mem_ctl.scala 413:64] - node _T_1237 = eq(_T_1236, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 413:21] - node _T_1238 = eq(fetch_req_iccm_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 413:98] - node sel_ic_data = and(_T_1237, _T_1238) @[el2_ifu_mem_ctl.scala 413:96] + node _T_1236 = eq(miss_state, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 415:51] + node _T_1237 = or(ic_crit_wd_rdy, _T_1236) @[el2_ifu_mem_ctl.scala 415:38] + node _T_1238 = eq(miss_state, UInt<3>("h01")) @[el2_ifu_mem_ctl.scala 415:77] + node _T_1239 = or(_T_1237, _T_1238) @[el2_ifu_mem_ctl.scala 415:64] + node _T_1240 = eq(ifu_byp_data_err_new, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 415:98] + node sel_byp_data = and(_T_1239, _T_1240) @[el2_ifu_mem_ctl.scala 415:96] + node _T_1241 = eq(miss_state, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 416:51] + node _T_1242 = or(ic_crit_wd_rdy, _T_1241) @[el2_ifu_mem_ctl.scala 416:38] + node _T_1243 = eq(miss_state, UInt<3>("h01")) @[el2_ifu_mem_ctl.scala 416:77] + node _T_1244 = or(_T_1242, _T_1243) @[el2_ifu_mem_ctl.scala 416:64] + node _T_1245 = eq(_T_1244, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 416:21] + node _T_1246 = eq(fetch_req_iccm_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 416:98] + node sel_ic_data = and(_T_1245, _T_1246) @[el2_ifu_mem_ctl.scala 416:96] wire ic_byp_data_only_new : UInt<80> ic_byp_data_only_new <= UInt<1>("h00") - node _T_1239 = or(fetch_req_iccm_f, sel_ic_data) @[el2_ifu_mem_ctl.scala 417:81] - node _T_1240 = or(sel_byp_data, _T_1239) @[el2_ifu_mem_ctl.scala 417:47] - node _T_1241 = bits(_T_1240, 0, 0) @[el2_ifu_mem_ctl.scala 417:140] - node _T_1242 = bits(fetch_req_iccm_f, 0, 0) @[Bitwise.scala 72:15] - node _T_1243 = mux(_T_1242, UInt<64>("h0ffffffffffffffff"), UInt<64>("h00")) @[Bitwise.scala 72:12] - node _T_1244 = and(_T_1243, io.iccm_rd_data) @[el2_ifu_mem_ctl.scala 419:64] - node _T_1245 = bits(sel_byp_data, 0, 0) @[Bitwise.scala 72:15] - node _T_1246 = mux(_T_1245, UInt<64>("h0ffffffffffffffff"), UInt<64>("h00")) @[Bitwise.scala 72:12] - node _T_1247 = and(_T_1246, ic_byp_data_only_new) @[el2_ifu_mem_ctl.scala 419:109] - node ic_premux_data = or(_T_1244, _T_1247) @[el2_ifu_mem_ctl.scala 419:83] - node ic_sel_premux_data = or(fetch_req_iccm_f, sel_byp_data) @[el2_ifu_mem_ctl.scala 421:58] - node ifc_bus_acc_fault_f = and(ic_byp_hit_f, ifu_byp_data_err_new) @[el2_ifu_mem_ctl.scala 423:42] - node _T_1248 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 425:40] - node fetch_req_f_qual = and(io.ic_hit_f, _T_1248) @[el2_ifu_mem_ctl.scala 425:38] + node _T_1247 = or(fetch_req_iccm_f, sel_ic_data) @[el2_ifu_mem_ctl.scala 420:81] + node _T_1248 = or(sel_byp_data, _T_1247) @[el2_ifu_mem_ctl.scala 420:47] + node _T_1249 = bits(_T_1248, 0, 0) @[el2_ifu_mem_ctl.scala 420:140] + node _T_1250 = bits(fetch_req_iccm_f, 0, 0) @[Bitwise.scala 72:15] + node _T_1251 = mux(_T_1250, UInt<64>("h0ffffffffffffffff"), UInt<64>("h00")) @[Bitwise.scala 72:12] + node _T_1252 = and(_T_1251, io.iccm_rd_data) @[el2_ifu_mem_ctl.scala 422:64] + node _T_1253 = bits(sel_byp_data, 0, 0) @[Bitwise.scala 72:15] + node _T_1254 = mux(_T_1253, UInt<64>("h0ffffffffffffffff"), UInt<64>("h00")) @[Bitwise.scala 72:12] + node _T_1255 = and(_T_1254, ic_byp_data_only_new) @[el2_ifu_mem_ctl.scala 422:109] + node ic_premux_data = or(_T_1252, _T_1255) @[el2_ifu_mem_ctl.scala 422:83] + node ic_sel_premux_data = or(fetch_req_iccm_f, sel_byp_data) @[el2_ifu_mem_ctl.scala 424:58] + node ifc_bus_acc_fault_f = and(ic_byp_hit_f, ifu_byp_data_err_new) @[el2_ifu_mem_ctl.scala 426:42] + node _T_1256 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 428:40] + node fetch_req_f_qual = and(io.ic_hit_f, _T_1256) @[el2_ifu_mem_ctl.scala 428:38] wire ifc_region_acc_fault_memory_f : UInt<1> ifc_region_acc_fault_memory_f <= UInt<1>("h00") - node _T_1249 = or(ifc_region_acc_fault_final_f, ifc_bus_acc_fault_f) @[el2_ifu_mem_ctl.scala 427:57] - node _T_1250 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 427:82] - node _T_1251 = and(_T_1249, _T_1250) @[el2_ifu_mem_ctl.scala 427:80] - io.ic_access_fault_f <= _T_1251 @[el2_ifu_mem_ctl.scala 427:24] - node _T_1252 = bits(io.iccm_rd_ecc_double_err, 0, 0) @[el2_ifu_mem_ctl.scala 428:62] - node _T_1253 = bits(ifc_region_acc_fault_f, 0, 0) @[el2_ifu_mem_ctl.scala 429:32] - node _T_1254 = bits(ifc_region_acc_fault_memory_f, 0, 0) @[el2_ifu_mem_ctl.scala 430:47] - node _T_1255 = mux(_T_1254, UInt<2>("h03"), UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 430:10] - node _T_1256 = mux(_T_1253, UInt<2>("h02"), _T_1255) @[el2_ifu_mem_ctl.scala 429:8] - node _T_1257 = mux(_T_1252, UInt<1>("h01"), _T_1256) @[el2_ifu_mem_ctl.scala 428:35] - io.ic_access_fault_type_f <= _T_1257 @[el2_ifu_mem_ctl.scala 428:29] + node _T_1257 = or(ifc_region_acc_fault_final_f, ifc_bus_acc_fault_f) @[el2_ifu_mem_ctl.scala 430:57] + node _T_1258 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 430:82] + node _T_1259 = and(_T_1257, _T_1258) @[el2_ifu_mem_ctl.scala 430:80] + io.ic_access_fault_f <= _T_1259 @[el2_ifu_mem_ctl.scala 430:24] + node _T_1260 = bits(io.iccm_rd_ecc_double_err, 0, 0) @[el2_ifu_mem_ctl.scala 431:62] + node _T_1261 = bits(ifc_region_acc_fault_f, 0, 0) @[el2_ifu_mem_ctl.scala 432:32] + node _T_1262 = bits(ifc_region_acc_fault_memory_f, 0, 0) @[el2_ifu_mem_ctl.scala 433:47] + node _T_1263 = mux(_T_1262, UInt<2>("h03"), UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 433:10] + node _T_1264 = mux(_T_1261, UInt<2>("h02"), _T_1263) @[el2_ifu_mem_ctl.scala 432:8] + node _T_1265 = mux(_T_1260, UInt<1>("h01"), _T_1264) @[el2_ifu_mem_ctl.scala 431:35] + io.ic_access_fault_type_f <= _T_1265 @[el2_ifu_mem_ctl.scala 431:29] + wire ifu_bp_inst_mask_f : UInt<1> + ifu_bp_inst_mask_f <= UInt<1>("h00") + node _T_1266 = and(fetch_req_f_qual, ifu_bp_inst_mask_f) @[el2_ifu_mem_ctl.scala 435:45] + node _T_1267 = mux(UInt<1>("h01"), UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_1268 = eq(ifu_fetch_addr_int_f, _T_1267) @[el2_ifu_mem_ctl.scala 435:77] + node _T_1269 = eq(_T_1268, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 435:68] + node _T_1270 = and(_T_1266, _T_1269) @[el2_ifu_mem_ctl.scala 435:66] + node _T_1271 = neq(err_stop_state, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 435:128] + node _T_1272 = and(_T_1270, _T_1271) @[el2_ifu_mem_ctl.scala 435:111] + node _T_1273 = cat(_T_1272, fetch_req_f_qual) @[Cat.scala 29:58] + io.ic_fetch_val_f <= _T_1273 @[el2_ifu_mem_ctl.scala 435:21] + node _T_1274 = bits(io.ic_rd_data, 1, 0) @[el2_ifu_mem_ctl.scala 436:33] + node two_byte_instr = neq(_T_1274, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 436:39] + wire ic_miss_buff_data_in : UInt<64> + ic_miss_buff_data_in <= UInt<1>("h00") + wire ifu_bus_rsp_tag : UInt<3> + ifu_bus_rsp_tag <= UInt<1>("h00") + wire bus_ifu_wr_en : UInt<1> + bus_ifu_wr_en <= UInt<1>("h00") + node _T_1275 = eq(ifu_bus_rsp_tag, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 442:91] + node write_fill_data_0 = and(bus_ifu_wr_en, _T_1275) @[el2_ifu_mem_ctl.scala 442:73] + node _T_1276 = eq(ifu_bus_rsp_tag, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 442:91] + node write_fill_data_1 = and(bus_ifu_wr_en, _T_1276) @[el2_ifu_mem_ctl.scala 442:73] + node _T_1277 = eq(ifu_bus_rsp_tag, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 442:91] + node write_fill_data_2 = and(bus_ifu_wr_en, _T_1277) @[el2_ifu_mem_ctl.scala 442:73] + node _T_1278 = eq(ifu_bus_rsp_tag, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 442:91] + node write_fill_data_3 = and(bus_ifu_wr_en, _T_1278) @[el2_ifu_mem_ctl.scala 442:73] + node _T_1279 = eq(ifu_bus_rsp_tag, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 442:91] + node write_fill_data_4 = and(bus_ifu_wr_en, _T_1279) @[el2_ifu_mem_ctl.scala 442:73] + node _T_1280 = eq(ifu_bus_rsp_tag, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 442:91] + node write_fill_data_5 = and(bus_ifu_wr_en, _T_1280) @[el2_ifu_mem_ctl.scala 442:73] + node _T_1281 = eq(ifu_bus_rsp_tag, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 442:91] + node write_fill_data_6 = and(bus_ifu_wr_en, _T_1281) @[el2_ifu_mem_ctl.scala 442:73] + node _T_1282 = eq(ifu_bus_rsp_tag, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 442:91] + node write_fill_data_7 = and(bus_ifu_wr_en, _T_1282) @[el2_ifu_mem_ctl.scala 442:73] + wire ic_miss_buff_data : UInt<32>[16] @[el2_ifu_mem_ctl.scala 443:31] + node _T_1283 = bits(write_fill_data_0, 0, 0) @[el2_ifu_mem_ctl.scala 445:91] + reg _T_1284 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1283 : @[Reg.scala 28:19] + _T_1284 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[0] <= _T_1284 @[el2_ifu_mem_ctl.scala 445:26] + node _T_1285 = bits(write_fill_data_0, 0, 0) @[el2_ifu_mem_ctl.scala 446:93] + reg _T_1286 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1285 : @[Reg.scala 28:19] + _T_1286 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[1] <= _T_1286 @[el2_ifu_mem_ctl.scala 446:28] + node _T_1287 = bits(write_fill_data_1, 0, 0) @[el2_ifu_mem_ctl.scala 445:91] + reg _T_1288 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1287 : @[Reg.scala 28:19] + _T_1288 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[2] <= _T_1288 @[el2_ifu_mem_ctl.scala 445:26] + node _T_1289 = bits(write_fill_data_1, 0, 0) @[el2_ifu_mem_ctl.scala 446:93] + reg _T_1290 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1289 : @[Reg.scala 28:19] + _T_1290 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[3] <= _T_1290 @[el2_ifu_mem_ctl.scala 446:28] + node _T_1291 = bits(write_fill_data_2, 0, 0) @[el2_ifu_mem_ctl.scala 445:91] + reg _T_1292 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1291 : @[Reg.scala 28:19] + _T_1292 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[4] <= _T_1292 @[el2_ifu_mem_ctl.scala 445:26] + node _T_1293 = bits(write_fill_data_2, 0, 0) @[el2_ifu_mem_ctl.scala 446:93] + reg _T_1294 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1293 : @[Reg.scala 28:19] + _T_1294 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[5] <= _T_1294 @[el2_ifu_mem_ctl.scala 446:28] + node _T_1295 = bits(write_fill_data_3, 0, 0) @[el2_ifu_mem_ctl.scala 445:91] + reg _T_1296 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1295 : @[Reg.scala 28:19] + _T_1296 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[6] <= _T_1296 @[el2_ifu_mem_ctl.scala 445:26] + node _T_1297 = bits(write_fill_data_3, 0, 0) @[el2_ifu_mem_ctl.scala 446:93] + reg _T_1298 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1297 : @[Reg.scala 28:19] + _T_1298 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[7] <= _T_1298 @[el2_ifu_mem_ctl.scala 446:28] + node _T_1299 = bits(write_fill_data_4, 0, 0) @[el2_ifu_mem_ctl.scala 445:91] + reg _T_1300 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1299 : @[Reg.scala 28:19] + _T_1300 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[8] <= _T_1300 @[el2_ifu_mem_ctl.scala 445:26] + node _T_1301 = bits(write_fill_data_4, 0, 0) @[el2_ifu_mem_ctl.scala 446:93] + reg _T_1302 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1301 : @[Reg.scala 28:19] + _T_1302 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[9] <= _T_1302 @[el2_ifu_mem_ctl.scala 446:28] + node _T_1303 = bits(write_fill_data_5, 0, 0) @[el2_ifu_mem_ctl.scala 445:91] + reg _T_1304 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1303 : @[Reg.scala 28:19] + _T_1304 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[10] <= _T_1304 @[el2_ifu_mem_ctl.scala 445:26] + node _T_1305 = bits(write_fill_data_5, 0, 0) @[el2_ifu_mem_ctl.scala 446:93] + reg _T_1306 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1305 : @[Reg.scala 28:19] + _T_1306 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[11] <= _T_1306 @[el2_ifu_mem_ctl.scala 446:28] + node _T_1307 = bits(write_fill_data_6, 0, 0) @[el2_ifu_mem_ctl.scala 445:91] + reg _T_1308 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1307 : @[Reg.scala 28:19] + _T_1308 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[12] <= _T_1308 @[el2_ifu_mem_ctl.scala 445:26] + node _T_1309 = bits(write_fill_data_6, 0, 0) @[el2_ifu_mem_ctl.scala 446:93] + reg _T_1310 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1309 : @[Reg.scala 28:19] + _T_1310 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[13] <= _T_1310 @[el2_ifu_mem_ctl.scala 446:28] + node _T_1311 = bits(write_fill_data_7, 0, 0) @[el2_ifu_mem_ctl.scala 445:91] + reg _T_1312 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1311 : @[Reg.scala 28:19] + _T_1312 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[14] <= _T_1312 @[el2_ifu_mem_ctl.scala 445:26] + node _T_1313 = bits(write_fill_data_7, 0, 0) @[el2_ifu_mem_ctl.scala 446:93] + reg _T_1314 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_1313 : @[Reg.scala 28:19] + _T_1314 <= ic_miss_buff_data_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ic_miss_buff_data[15] <= _T_1314 @[el2_ifu_mem_ctl.scala 446:28] + wire ic_miss_buff_data_valid : UInt<8> + ic_miss_buff_data_valid <= UInt<1>("h00") + node _T_1315 = bits(ic_miss_buff_data_valid, 0, 0) @[el2_ifu_mem_ctl.scala 448:113] + node _T_1316 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 448:118] + node _T_1317 = and(_T_1315, _T_1316) @[el2_ifu_mem_ctl.scala 448:116] + node ic_miss_buff_data_valid_in_0 = or(write_fill_data_0, _T_1317) @[el2_ifu_mem_ctl.scala 448:88] + node _T_1318 = bits(ic_miss_buff_data_valid, 1, 1) @[el2_ifu_mem_ctl.scala 448:113] + node _T_1319 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 448:118] + node _T_1320 = and(_T_1318, _T_1319) @[el2_ifu_mem_ctl.scala 448:116] + node ic_miss_buff_data_valid_in_1 = or(write_fill_data_1, _T_1320) @[el2_ifu_mem_ctl.scala 448:88] + node _T_1321 = bits(ic_miss_buff_data_valid, 2, 2) @[el2_ifu_mem_ctl.scala 448:113] + node _T_1322 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 448:118] + node _T_1323 = and(_T_1321, _T_1322) @[el2_ifu_mem_ctl.scala 448:116] + node ic_miss_buff_data_valid_in_2 = or(write_fill_data_2, _T_1323) @[el2_ifu_mem_ctl.scala 448:88] + node _T_1324 = bits(ic_miss_buff_data_valid, 3, 3) @[el2_ifu_mem_ctl.scala 448:113] + node _T_1325 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 448:118] + node _T_1326 = and(_T_1324, _T_1325) @[el2_ifu_mem_ctl.scala 448:116] + node ic_miss_buff_data_valid_in_3 = or(write_fill_data_3, _T_1326) @[el2_ifu_mem_ctl.scala 448:88] + node _T_1327 = bits(ic_miss_buff_data_valid, 4, 4) @[el2_ifu_mem_ctl.scala 448:113] + node _T_1328 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 448:118] + node _T_1329 = and(_T_1327, _T_1328) @[el2_ifu_mem_ctl.scala 448:116] + node ic_miss_buff_data_valid_in_4 = or(write_fill_data_4, _T_1329) @[el2_ifu_mem_ctl.scala 448:88] + node _T_1330 = bits(ic_miss_buff_data_valid, 5, 5) @[el2_ifu_mem_ctl.scala 448:113] + node _T_1331 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 448:118] + node _T_1332 = and(_T_1330, _T_1331) @[el2_ifu_mem_ctl.scala 448:116] + node ic_miss_buff_data_valid_in_5 = or(write_fill_data_5, _T_1332) @[el2_ifu_mem_ctl.scala 448:88] + node _T_1333 = bits(ic_miss_buff_data_valid, 6, 6) @[el2_ifu_mem_ctl.scala 448:113] + node _T_1334 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 448:118] + node _T_1335 = and(_T_1333, _T_1334) @[el2_ifu_mem_ctl.scala 448:116] + node ic_miss_buff_data_valid_in_6 = or(write_fill_data_6, _T_1335) @[el2_ifu_mem_ctl.scala 448:88] + node _T_1336 = bits(ic_miss_buff_data_valid, 7, 7) @[el2_ifu_mem_ctl.scala 448:113] + node _T_1337 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 448:118] + node _T_1338 = and(_T_1336, _T_1337) @[el2_ifu_mem_ctl.scala 448:116] + node ic_miss_buff_data_valid_in_7 = or(write_fill_data_7, _T_1338) @[el2_ifu_mem_ctl.scala 448:88] + node _T_1339 = cat(ic_miss_buff_data_valid_in_7, ic_miss_buff_data_valid_in_6) @[Cat.scala 29:58] + node _T_1340 = cat(_T_1339, ic_miss_buff_data_valid_in_5) @[Cat.scala 29:58] + node _T_1341 = cat(_T_1340, ic_miss_buff_data_valid_in_4) @[Cat.scala 29:58] + node _T_1342 = cat(_T_1341, ic_miss_buff_data_valid_in_3) @[Cat.scala 29:58] + node _T_1343 = cat(_T_1342, ic_miss_buff_data_valid_in_2) @[Cat.scala 29:58] + node _T_1344 = cat(_T_1343, ic_miss_buff_data_valid_in_1) @[Cat.scala 29:58] + node _T_1345 = cat(_T_1344, ic_miss_buff_data_valid_in_0) @[Cat.scala 29:58] + reg _T_1346 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 449:60] + _T_1346 <= _T_1345 @[el2_ifu_mem_ctl.scala 449:60] + ic_miss_buff_data_valid <= _T_1346 @[el2_ifu_mem_ctl.scala 449:27] + wire bus_ifu_wr_data_error : UInt<1> + bus_ifu_wr_data_error <= UInt<1>("h00") + wire ic_miss_buff_data_error : UInt<8> + ic_miss_buff_data_error <= UInt<1>("h00") + node _T_1347 = bits(write_fill_data_0, 0, 0) @[el2_ifu_mem_ctl.scala 452:92] + node _T_1348 = bits(ic_miss_buff_data_error, 0, 0) @[el2_ifu_mem_ctl.scala 453:28] + node _T_1349 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 453:34] + node _T_1350 = and(_T_1348, _T_1349) @[el2_ifu_mem_ctl.scala 453:32] + node ic_miss_buff_data_error_in_0 = mux(_T_1347, bus_ifu_wr_data_error, _T_1350) @[el2_ifu_mem_ctl.scala 452:72] + node _T_1351 = bits(write_fill_data_1, 0, 0) @[el2_ifu_mem_ctl.scala 452:92] + node _T_1352 = bits(ic_miss_buff_data_error, 1, 1) @[el2_ifu_mem_ctl.scala 453:28] + node _T_1353 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 453:34] + node _T_1354 = and(_T_1352, _T_1353) @[el2_ifu_mem_ctl.scala 453:32] + node ic_miss_buff_data_error_in_1 = mux(_T_1351, bus_ifu_wr_data_error, _T_1354) @[el2_ifu_mem_ctl.scala 452:72] + node _T_1355 = bits(write_fill_data_2, 0, 0) @[el2_ifu_mem_ctl.scala 452:92] + node _T_1356 = bits(ic_miss_buff_data_error, 2, 2) @[el2_ifu_mem_ctl.scala 453:28] + node _T_1357 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 453:34] + node _T_1358 = and(_T_1356, _T_1357) @[el2_ifu_mem_ctl.scala 453:32] + node ic_miss_buff_data_error_in_2 = mux(_T_1355, bus_ifu_wr_data_error, _T_1358) @[el2_ifu_mem_ctl.scala 452:72] + node _T_1359 = bits(write_fill_data_3, 0, 0) @[el2_ifu_mem_ctl.scala 452:92] + node _T_1360 = bits(ic_miss_buff_data_error, 3, 3) @[el2_ifu_mem_ctl.scala 453:28] + node _T_1361 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 453:34] + node _T_1362 = and(_T_1360, _T_1361) @[el2_ifu_mem_ctl.scala 453:32] + node ic_miss_buff_data_error_in_3 = mux(_T_1359, bus_ifu_wr_data_error, _T_1362) @[el2_ifu_mem_ctl.scala 452:72] + node _T_1363 = bits(write_fill_data_4, 0, 0) @[el2_ifu_mem_ctl.scala 452:92] + node _T_1364 = bits(ic_miss_buff_data_error, 4, 4) @[el2_ifu_mem_ctl.scala 453:28] + node _T_1365 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 453:34] + node _T_1366 = and(_T_1364, _T_1365) @[el2_ifu_mem_ctl.scala 453:32] + node ic_miss_buff_data_error_in_4 = mux(_T_1363, bus_ifu_wr_data_error, _T_1366) @[el2_ifu_mem_ctl.scala 452:72] + node _T_1367 = bits(write_fill_data_5, 0, 0) @[el2_ifu_mem_ctl.scala 452:92] + node _T_1368 = bits(ic_miss_buff_data_error, 5, 5) @[el2_ifu_mem_ctl.scala 453:28] + node _T_1369 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 453:34] + node _T_1370 = and(_T_1368, _T_1369) @[el2_ifu_mem_ctl.scala 453:32] + node ic_miss_buff_data_error_in_5 = mux(_T_1367, bus_ifu_wr_data_error, _T_1370) @[el2_ifu_mem_ctl.scala 452:72] + node _T_1371 = bits(write_fill_data_6, 0, 0) @[el2_ifu_mem_ctl.scala 452:92] + node _T_1372 = bits(ic_miss_buff_data_error, 6, 6) @[el2_ifu_mem_ctl.scala 453:28] + node _T_1373 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 453:34] + node _T_1374 = and(_T_1372, _T_1373) @[el2_ifu_mem_ctl.scala 453:32] + node ic_miss_buff_data_error_in_6 = mux(_T_1371, bus_ifu_wr_data_error, _T_1374) @[el2_ifu_mem_ctl.scala 452:72] + node _T_1375 = bits(write_fill_data_7, 0, 0) @[el2_ifu_mem_ctl.scala 452:92] + node _T_1376 = bits(ic_miss_buff_data_error, 7, 7) @[el2_ifu_mem_ctl.scala 453:28] + node _T_1377 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 453:34] + node _T_1378 = and(_T_1376, _T_1377) @[el2_ifu_mem_ctl.scala 453:32] + node ic_miss_buff_data_error_in_7 = mux(_T_1375, bus_ifu_wr_data_error, _T_1378) @[el2_ifu_mem_ctl.scala 452:72] + node _T_1379 = cat(ic_miss_buff_data_error_in_7, ic_miss_buff_data_error_in_6) @[Cat.scala 29:58] + node _T_1380 = cat(_T_1379, ic_miss_buff_data_error_in_5) @[Cat.scala 29:58] + node _T_1381 = cat(_T_1380, ic_miss_buff_data_error_in_4) @[Cat.scala 29:58] + node _T_1382 = cat(_T_1381, ic_miss_buff_data_error_in_3) @[Cat.scala 29:58] + node _T_1383 = cat(_T_1382, ic_miss_buff_data_error_in_2) @[Cat.scala 29:58] + node _T_1384 = cat(_T_1383, ic_miss_buff_data_error_in_1) @[Cat.scala 29:58] + node _T_1385 = cat(_T_1384, ic_miss_buff_data_error_in_0) @[Cat.scala 29:58] + reg _T_1386 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 454:60] + _T_1386 <= _T_1385 @[el2_ifu_mem_ctl.scala 454:60] + ic_miss_buff_data_error <= _T_1386 @[el2_ifu_mem_ctl.scala 454:27] + node bypass_index = bits(imb_ff, 4, 0) @[el2_ifu_mem_ctl.scala 457:28] + node _T_1387 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 458:42] + node _T_1388 = add(_T_1387, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 458:70] + node bypass_index_5_3_inc = tail(_T_1388, 1) @[el2_ifu_mem_ctl.scala 458:70] + node _T_1389 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 459:87] + node _T_1390 = eq(_T_1389, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 459:114] + node _T_1391 = bits(_T_1390, 0, 0) @[el2_ifu_mem_ctl.scala 459:122] + node _T_1392 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 459:87] + node _T_1393 = eq(_T_1392, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 459:114] + node _T_1394 = bits(_T_1393, 0, 0) @[el2_ifu_mem_ctl.scala 459:122] + node _T_1395 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 459:87] + node _T_1396 = eq(_T_1395, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 459:114] + node _T_1397 = bits(_T_1396, 0, 0) @[el2_ifu_mem_ctl.scala 459:122] + node _T_1398 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 459:87] + node _T_1399 = eq(_T_1398, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 459:114] + node _T_1400 = bits(_T_1399, 0, 0) @[el2_ifu_mem_ctl.scala 459:122] + node _T_1401 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 459:87] + node _T_1402 = eq(_T_1401, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 459:114] + node _T_1403 = bits(_T_1402, 0, 0) @[el2_ifu_mem_ctl.scala 459:122] + node _T_1404 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 459:87] + node _T_1405 = eq(_T_1404, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 459:114] + node _T_1406 = bits(_T_1405, 0, 0) @[el2_ifu_mem_ctl.scala 459:122] + node _T_1407 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 459:87] + node _T_1408 = eq(_T_1407, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 459:114] + node _T_1409 = bits(_T_1408, 0, 0) @[el2_ifu_mem_ctl.scala 459:122] + node _T_1410 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 459:87] + node _T_1411 = eq(_T_1410, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 459:114] + node _T_1412 = bits(_T_1411, 0, 0) @[el2_ifu_mem_ctl.scala 459:122] + node _T_1413 = mux(_T_1391, ic_miss_buff_data_valid_in_0, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1414 = mux(_T_1394, ic_miss_buff_data_valid_in_1, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1415 = mux(_T_1397, ic_miss_buff_data_valid_in_2, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1416 = mux(_T_1400, ic_miss_buff_data_valid_in_3, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1417 = mux(_T_1403, ic_miss_buff_data_valid_in_4, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1418 = mux(_T_1406, ic_miss_buff_data_valid_in_5, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1419 = mux(_T_1409, ic_miss_buff_data_valid_in_6, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1420 = mux(_T_1412, ic_miss_buff_data_valid_in_7, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1421 = or(_T_1413, _T_1414) @[Mux.scala 27:72] + node _T_1422 = or(_T_1421, _T_1415) @[Mux.scala 27:72] + node _T_1423 = or(_T_1422, _T_1416) @[Mux.scala 27:72] + node _T_1424 = or(_T_1423, _T_1417) @[Mux.scala 27:72] + node _T_1425 = or(_T_1424, _T_1418) @[Mux.scala 27:72] + node _T_1426 = or(_T_1425, _T_1419) @[Mux.scala 27:72] + node _T_1427 = or(_T_1426, _T_1420) @[Mux.scala 27:72] + wire bypass_valid_value_check : UInt<1> @[Mux.scala 27:72] + bypass_valid_value_check <= _T_1427 @[Mux.scala 27:72] + node _T_1428 = bits(bypass_index, 1, 1) @[el2_ifu_mem_ctl.scala 460:71] + node _T_1429 = eq(_T_1428, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 460:58] + node _T_1430 = and(bypass_valid_value_check, _T_1429) @[el2_ifu_mem_ctl.scala 460:56] + node _T_1431 = bits(bypass_index, 0, 0) @[el2_ifu_mem_ctl.scala 460:90] + node _T_1432 = eq(_T_1431, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 460:77] + node _T_1433 = and(_T_1430, _T_1432) @[el2_ifu_mem_ctl.scala 460:75] + node _T_1434 = bits(bypass_index, 1, 1) @[el2_ifu_mem_ctl.scala 461:71] + node _T_1435 = eq(_T_1434, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 461:58] + node _T_1436 = and(bypass_valid_value_check, _T_1435) @[el2_ifu_mem_ctl.scala 461:56] + node _T_1437 = bits(bypass_index, 0, 0) @[el2_ifu_mem_ctl.scala 461:89] + node _T_1438 = and(_T_1436, _T_1437) @[el2_ifu_mem_ctl.scala 461:75] + node _T_1439 = or(_T_1433, _T_1438) @[el2_ifu_mem_ctl.scala 460:95] + node _T_1440 = bits(bypass_index, 1, 1) @[el2_ifu_mem_ctl.scala 462:70] + node _T_1441 = and(bypass_valid_value_check, _T_1440) @[el2_ifu_mem_ctl.scala 462:56] + node _T_1442 = bits(bypass_index, 0, 0) @[el2_ifu_mem_ctl.scala 462:89] + node _T_1443 = eq(_T_1442, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 462:76] + node _T_1444 = and(_T_1441, _T_1443) @[el2_ifu_mem_ctl.scala 462:74] + node _T_1445 = or(_T_1439, _T_1444) @[el2_ifu_mem_ctl.scala 461:94] + node _T_1446 = bits(bypass_index, 1, 1) @[el2_ifu_mem_ctl.scala 463:47] + node _T_1447 = and(bypass_valid_value_check, _T_1446) @[el2_ifu_mem_ctl.scala 463:33] + node _T_1448 = bits(bypass_index, 0, 0) @[el2_ifu_mem_ctl.scala 463:65] + node _T_1449 = and(_T_1447, _T_1448) @[el2_ifu_mem_ctl.scala 463:51] + node _T_1450 = eq(bypass_index_5_3_inc, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 463:132] + node _T_1451 = bits(_T_1450, 0, 0) @[el2_ifu_mem_ctl.scala 463:140] + node _T_1452 = eq(bypass_index_5_3_inc, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 463:132] + node _T_1453 = bits(_T_1452, 0, 0) @[el2_ifu_mem_ctl.scala 463:140] + node _T_1454 = eq(bypass_index_5_3_inc, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 463:132] + node _T_1455 = bits(_T_1454, 0, 0) @[el2_ifu_mem_ctl.scala 463:140] + node _T_1456 = eq(bypass_index_5_3_inc, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 463:132] + node _T_1457 = bits(_T_1456, 0, 0) @[el2_ifu_mem_ctl.scala 463:140] + node _T_1458 = eq(bypass_index_5_3_inc, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 463:132] + node _T_1459 = bits(_T_1458, 0, 0) @[el2_ifu_mem_ctl.scala 463:140] + node _T_1460 = eq(bypass_index_5_3_inc, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 463:132] + node _T_1461 = bits(_T_1460, 0, 0) @[el2_ifu_mem_ctl.scala 463:140] + node _T_1462 = eq(bypass_index_5_3_inc, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 463:132] + node _T_1463 = bits(_T_1462, 0, 0) @[el2_ifu_mem_ctl.scala 463:140] + node _T_1464 = eq(bypass_index_5_3_inc, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 463:132] + node _T_1465 = bits(_T_1464, 0, 0) @[el2_ifu_mem_ctl.scala 463:140] + node _T_1466 = mux(_T_1451, ic_miss_buff_data_valid_in_0, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1467 = mux(_T_1453, ic_miss_buff_data_valid_in_1, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1468 = mux(_T_1455, ic_miss_buff_data_valid_in_2, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1469 = mux(_T_1457, ic_miss_buff_data_valid_in_3, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1470 = mux(_T_1459, ic_miss_buff_data_valid_in_4, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1471 = mux(_T_1461, ic_miss_buff_data_valid_in_5, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1472 = mux(_T_1463, ic_miss_buff_data_valid_in_6, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1473 = mux(_T_1465, ic_miss_buff_data_valid_in_7, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1474 = or(_T_1466, _T_1467) @[Mux.scala 27:72] + node _T_1475 = or(_T_1474, _T_1468) @[Mux.scala 27:72] + node _T_1476 = or(_T_1475, _T_1469) @[Mux.scala 27:72] + node _T_1477 = or(_T_1476, _T_1470) @[Mux.scala 27:72] + node _T_1478 = or(_T_1477, _T_1471) @[Mux.scala 27:72] + node _T_1479 = or(_T_1478, _T_1472) @[Mux.scala 27:72] + node _T_1480 = or(_T_1479, _T_1473) @[Mux.scala 27:72] + wire _T_1481 : UInt<1> @[Mux.scala 27:72] + _T_1481 <= _T_1480 @[Mux.scala 27:72] + node _T_1482 = and(_T_1449, _T_1481) @[el2_ifu_mem_ctl.scala 463:69] + node _T_1483 = or(_T_1445, _T_1482) @[el2_ifu_mem_ctl.scala 462:94] + node _T_1484 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 464:70] + node _T_1485 = mux(UInt<1>("h01"), UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12] + node _T_1486 = eq(_T_1484, _T_1485) @[el2_ifu_mem_ctl.scala 464:95] + node _T_1487 = and(bypass_valid_value_check, _T_1486) @[el2_ifu_mem_ctl.scala 464:56] + node bypass_data_ready_in = or(_T_1483, _T_1487) @[el2_ifu_mem_ctl.scala 463:181] + io.test <= bypass_data_ready_in @[el2_ifu_mem_ctl.scala 466:11] + wire ic_crit_wd_rdy_new_ff : UInt<1> + ic_crit_wd_rdy_new_ff <= UInt<1>("h00") + node _T_1488 = and(bypass_data_ready_in, crit_wd_byp_ok_ff) @[el2_ifu_mem_ctl.scala 468:53] + node _T_1489 = and(_T_1488, uncacheable_miss_ff) @[el2_ifu_mem_ctl.scala 468:73] + node _T_1490 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 468:98] + node _T_1491 = and(_T_1489, _T_1490) @[el2_ifu_mem_ctl.scala 468:96] + node _T_1492 = eq(ifu_bp_hit_taken_q_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 468:120] + node _T_1493 = and(_T_1491, _T_1492) @[el2_ifu_mem_ctl.scala 468:118] + node _T_1494 = eq(uncacheable_miss_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 469:75] + node _T_1495 = and(crit_wd_byp_ok_ff, _T_1494) @[el2_ifu_mem_ctl.scala 469:73] + node _T_1496 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 469:98] + node _T_1497 = and(_T_1495, _T_1496) @[el2_ifu_mem_ctl.scala 469:96] + node _T_1498 = eq(ifu_bp_hit_taken_q_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 469:120] + node _T_1499 = and(_T_1497, _T_1498) @[el2_ifu_mem_ctl.scala 469:118] + node _T_1500 = or(_T_1493, _T_1499) @[el2_ifu_mem_ctl.scala 468:143] + node _T_1501 = and(ic_crit_wd_rdy_new_ff, crit_wd_byp_ok_ff) @[el2_ifu_mem_ctl.scala 470:54] + node _T_1502 = eq(fetch_req_icache_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 470:76] + node _T_1503 = and(_T_1501, _T_1502) @[el2_ifu_mem_ctl.scala 470:74] + node _T_1504 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 470:98] + node _T_1505 = and(_T_1503, _T_1504) @[el2_ifu_mem_ctl.scala 470:96] + node ic_crit_wd_rdy_new_in = or(_T_1500, _T_1505) @[el2_ifu_mem_ctl.scala 469:143] + reg _T_1506 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 471:58] + _T_1506 <= ic_crit_wd_rdy_new_in @[el2_ifu_mem_ctl.scala 471:58] + ic_crit_wd_rdy_new_ff <= _T_1506 @[el2_ifu_mem_ctl.scala 471:25] + node byp_fetch_index = bits(ifu_fetch_addr_int_f, 4, 0) @[el2_ifu_mem_ctl.scala 472:45] + node _T_1507 = bits(ifu_fetch_addr_int_f, 4, 2) @[el2_ifu_mem_ctl.scala 473:51] + node byp_fetch_index_0 = cat(_T_1507, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_1508 = bits(ifu_fetch_addr_int_f, 4, 2) @[el2_ifu_mem_ctl.scala 474:51] + node byp_fetch_index_1 = cat(_T_1508, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_1509 = bits(ifu_fetch_addr_int_f, 4, 2) @[el2_ifu_mem_ctl.scala 475:49] + node _T_1510 = add(_T_1509, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 475:75] + node byp_fetch_index_inc = tail(_T_1510, 1) @[el2_ifu_mem_ctl.scala 475:75] + node byp_fetch_index_inc_0 = cat(byp_fetch_index_inc, UInt<1>("h00")) @[Cat.scala 29:58] + node byp_fetch_index_inc_1 = cat(byp_fetch_index_inc, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_1511 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 478:93] + node _T_1512 = eq(_T_1511, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 478:118] + node _T_1513 = bits(_T_1512, 0, 0) @[el2_ifu_mem_ctl.scala 478:126] + node _T_1514 = bits(ic_miss_buff_data_error, 0, 0) @[el2_ifu_mem_ctl.scala 478:157] + node _T_1515 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 478:93] + node _T_1516 = eq(_T_1515, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 478:118] + node _T_1517 = bits(_T_1516, 0, 0) @[el2_ifu_mem_ctl.scala 478:126] + node _T_1518 = bits(ic_miss_buff_data_error, 1, 1) @[el2_ifu_mem_ctl.scala 478:157] + node _T_1519 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 478:93] + node _T_1520 = eq(_T_1519, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 478:118] + node _T_1521 = bits(_T_1520, 0, 0) @[el2_ifu_mem_ctl.scala 478:126] + node _T_1522 = bits(ic_miss_buff_data_error, 2, 2) @[el2_ifu_mem_ctl.scala 478:157] + node _T_1523 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 478:93] + node _T_1524 = eq(_T_1523, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 478:118] + node _T_1525 = bits(_T_1524, 0, 0) @[el2_ifu_mem_ctl.scala 478:126] + node _T_1526 = bits(ic_miss_buff_data_error, 3, 3) @[el2_ifu_mem_ctl.scala 478:157] + node _T_1527 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 478:93] + node _T_1528 = eq(_T_1527, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 478:118] + node _T_1529 = bits(_T_1528, 0, 0) @[el2_ifu_mem_ctl.scala 478:126] + node _T_1530 = bits(ic_miss_buff_data_error, 4, 4) @[el2_ifu_mem_ctl.scala 478:157] + node _T_1531 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 478:93] + node _T_1532 = eq(_T_1531, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 478:118] + node _T_1533 = bits(_T_1532, 0, 0) @[el2_ifu_mem_ctl.scala 478:126] + node _T_1534 = bits(ic_miss_buff_data_error, 5, 5) @[el2_ifu_mem_ctl.scala 478:157] + node _T_1535 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 478:93] + node _T_1536 = eq(_T_1535, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 478:118] + node _T_1537 = bits(_T_1536, 0, 0) @[el2_ifu_mem_ctl.scala 478:126] + node _T_1538 = bits(ic_miss_buff_data_error, 6, 6) @[el2_ifu_mem_ctl.scala 478:157] + node _T_1539 = bits(bypass_index, 4, 2) @[el2_ifu_mem_ctl.scala 478:93] + node _T_1540 = eq(_T_1539, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 478:118] + node _T_1541 = bits(_T_1540, 0, 0) @[el2_ifu_mem_ctl.scala 478:126] + node _T_1542 = bits(ic_miss_buff_data_error, 7, 7) @[el2_ifu_mem_ctl.scala 478:157] + node _T_1543 = mux(_T_1513, _T_1514, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1544 = mux(_T_1517, _T_1518, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1545 = mux(_T_1521, _T_1522, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1546 = mux(_T_1525, _T_1526, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1547 = mux(_T_1529, _T_1530, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1548 = mux(_T_1533, _T_1534, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1549 = mux(_T_1537, _T_1538, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1550 = mux(_T_1541, _T_1542, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1551 = or(_T_1543, _T_1544) @[Mux.scala 27:72] + node _T_1552 = or(_T_1551, _T_1545) @[Mux.scala 27:72] + node _T_1553 = or(_T_1552, _T_1546) @[Mux.scala 27:72] + node _T_1554 = or(_T_1553, _T_1547) @[Mux.scala 27:72] + node _T_1555 = or(_T_1554, _T_1548) @[Mux.scala 27:72] + node _T_1556 = or(_T_1555, _T_1549) @[Mux.scala 27:72] + node _T_1557 = or(_T_1556, _T_1550) @[Mux.scala 27:72] + wire ic_miss_buff_data_error_bypass : UInt<1> @[Mux.scala 27:72] + ic_miss_buff_data_error_bypass <= _T_1557 @[Mux.scala 27:72] + node _T_1558 = eq(byp_fetch_index_inc, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 479:104] + node _T_1559 = bits(_T_1558, 0, 0) @[el2_ifu_mem_ctl.scala 479:112] + node _T_1560 = bits(ic_miss_buff_data_error, 0, 0) @[el2_ifu_mem_ctl.scala 479:143] + node _T_1561 = eq(byp_fetch_index_inc, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 479:104] + node _T_1562 = bits(_T_1561, 0, 0) @[el2_ifu_mem_ctl.scala 479:112] + node _T_1563 = bits(ic_miss_buff_data_error, 1, 1) @[el2_ifu_mem_ctl.scala 479:143] + node _T_1564 = eq(byp_fetch_index_inc, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 479:104] + node _T_1565 = bits(_T_1564, 0, 0) @[el2_ifu_mem_ctl.scala 479:112] + node _T_1566 = bits(ic_miss_buff_data_error, 2, 2) @[el2_ifu_mem_ctl.scala 479:143] + node _T_1567 = eq(byp_fetch_index_inc, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 479:104] + node _T_1568 = bits(_T_1567, 0, 0) @[el2_ifu_mem_ctl.scala 479:112] + node _T_1569 = bits(ic_miss_buff_data_error, 3, 3) @[el2_ifu_mem_ctl.scala 479:143] + node _T_1570 = eq(byp_fetch_index_inc, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 479:104] + node _T_1571 = bits(_T_1570, 0, 0) @[el2_ifu_mem_ctl.scala 479:112] + node _T_1572 = bits(ic_miss_buff_data_error, 4, 4) @[el2_ifu_mem_ctl.scala 479:143] + node _T_1573 = eq(byp_fetch_index_inc, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 479:104] + node _T_1574 = bits(_T_1573, 0, 0) @[el2_ifu_mem_ctl.scala 479:112] + node _T_1575 = bits(ic_miss_buff_data_error, 5, 5) @[el2_ifu_mem_ctl.scala 479:143] + node _T_1576 = eq(byp_fetch_index_inc, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 479:104] + node _T_1577 = bits(_T_1576, 0, 0) @[el2_ifu_mem_ctl.scala 479:112] + node _T_1578 = bits(ic_miss_buff_data_error, 6, 6) @[el2_ifu_mem_ctl.scala 479:143] + node _T_1579 = eq(byp_fetch_index_inc, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 479:104] + node _T_1580 = bits(_T_1579, 0, 0) @[el2_ifu_mem_ctl.scala 479:112] + node _T_1581 = bits(ic_miss_buff_data_error, 7, 7) @[el2_ifu_mem_ctl.scala 479:143] + node _T_1582 = mux(_T_1559, _T_1560, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1583 = mux(_T_1562, _T_1563, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1584 = mux(_T_1565, _T_1566, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1585 = mux(_T_1568, _T_1569, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1586 = mux(_T_1571, _T_1572, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1587 = mux(_T_1574, _T_1575, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1588 = mux(_T_1577, _T_1578, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1589 = mux(_T_1580, _T_1581, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1590 = or(_T_1582, _T_1583) @[Mux.scala 27:72] + node _T_1591 = or(_T_1590, _T_1584) @[Mux.scala 27:72] + node _T_1592 = or(_T_1591, _T_1585) @[Mux.scala 27:72] + node _T_1593 = or(_T_1592, _T_1586) @[Mux.scala 27:72] + node _T_1594 = or(_T_1593, _T_1587) @[Mux.scala 27:72] + node _T_1595 = or(_T_1594, _T_1588) @[Mux.scala 27:72] + node _T_1596 = or(_T_1595, _T_1589) @[Mux.scala 27:72] + wire ic_miss_buff_data_error_bypass_inc : UInt<1> @[Mux.scala 27:72] + ic_miss_buff_data_error_bypass_inc <= _T_1596 @[Mux.scala 27:72] + node _T_1597 = bits(ifu_fetch_addr_int_f, 1, 1) @[el2_ifu_mem_ctl.scala 482:28] + node _T_1598 = bits(ifu_fetch_addr_int_f, 0, 0) @[el2_ifu_mem_ctl.scala 482:52] + node _T_1599 = and(_T_1597, _T_1598) @[el2_ifu_mem_ctl.scala 482:31] + when _T_1599 : @[el2_ifu_mem_ctl.scala 482:56] + ifu_byp_data_err_new <= ic_miss_buff_data_error_bypass @[el2_ifu_mem_ctl.scala 483:26] + skip @[el2_ifu_mem_ctl.scala 482:56] + else : @[el2_ifu_mem_ctl.scala 484:5] + node _T_1600 = or(ic_miss_buff_data_error_bypass, ic_miss_buff_data_error_bypass_inc) @[el2_ifu_mem_ctl.scala 484:70] + ifu_byp_data_err_new <= _T_1600 @[el2_ifu_mem_ctl.scala 484:36] + skip @[el2_ifu_mem_ctl.scala 484:5] + node _T_1601 = bits(ifu_fetch_addr_int_f, 0, 0) @[el2_ifu_mem_ctl.scala 486:59] + node _T_1602 = bits(_T_1601, 0, 0) @[el2_ifu_mem_ctl.scala 486:63] + node _T_1603 = eq(_T_1602, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 486:38] + node _T_1604 = eq(byp_fetch_index_inc_0, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1605 = bits(_T_1604, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1606 = bits(ic_miss_buff_data[0], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1607 = eq(byp_fetch_index_inc_0, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1608 = bits(_T_1607, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1609 = bits(ic_miss_buff_data[1], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1610 = eq(byp_fetch_index_inc_0, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1611 = bits(_T_1610, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1612 = bits(ic_miss_buff_data[2], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1613 = eq(byp_fetch_index_inc_0, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1614 = bits(_T_1613, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1615 = bits(ic_miss_buff_data[3], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1616 = eq(byp_fetch_index_inc_0, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1617 = bits(_T_1616, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1618 = bits(ic_miss_buff_data[4], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1619 = eq(byp_fetch_index_inc_0, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1620 = bits(_T_1619, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1621 = bits(ic_miss_buff_data[5], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1622 = eq(byp_fetch_index_inc_0, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1623 = bits(_T_1622, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1624 = bits(ic_miss_buff_data[6], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1625 = eq(byp_fetch_index_inc_0, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1626 = bits(_T_1625, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1627 = bits(ic_miss_buff_data[7], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1628 = eq(byp_fetch_index_inc_0, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1629 = bits(_T_1628, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1630 = bits(ic_miss_buff_data[8], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1631 = eq(byp_fetch_index_inc_0, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1632 = bits(_T_1631, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1633 = bits(ic_miss_buff_data[9], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1634 = eq(byp_fetch_index_inc_0, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1635 = bits(_T_1634, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1636 = bits(ic_miss_buff_data[10], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1637 = eq(byp_fetch_index_inc_0, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1638 = bits(_T_1637, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1639 = bits(ic_miss_buff_data[11], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1640 = eq(byp_fetch_index_inc_0, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1641 = bits(_T_1640, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1642 = bits(ic_miss_buff_data[12], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1643 = eq(byp_fetch_index_inc_0, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1644 = bits(_T_1643, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1645 = bits(ic_miss_buff_data[13], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1646 = eq(byp_fetch_index_inc_0, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1647 = bits(_T_1646, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1648 = bits(ic_miss_buff_data[14], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1649 = eq(byp_fetch_index_inc_0, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 487:73] + node _T_1650 = bits(_T_1649, 0, 0) @[el2_ifu_mem_ctl.scala 487:81] + node _T_1651 = bits(ic_miss_buff_data[15], 15, 0) @[el2_ifu_mem_ctl.scala 487:109] + node _T_1652 = mux(_T_1605, _T_1606, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1653 = mux(_T_1608, _T_1609, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1654 = mux(_T_1611, _T_1612, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1655 = mux(_T_1614, _T_1615, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1656 = mux(_T_1617, _T_1618, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1657 = mux(_T_1620, _T_1621, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1658 = mux(_T_1623, _T_1624, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1659 = mux(_T_1626, _T_1627, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1660 = mux(_T_1629, _T_1630, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1661 = mux(_T_1632, _T_1633, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1662 = mux(_T_1635, _T_1636, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1663 = mux(_T_1638, _T_1639, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1664 = mux(_T_1641, _T_1642, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1665 = mux(_T_1644, _T_1645, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1666 = mux(_T_1647, _T_1648, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1667 = mux(_T_1650, _T_1651, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1668 = or(_T_1652, _T_1653) @[Mux.scala 27:72] + node _T_1669 = or(_T_1668, _T_1654) @[Mux.scala 27:72] + node _T_1670 = or(_T_1669, _T_1655) @[Mux.scala 27:72] + node _T_1671 = or(_T_1670, _T_1656) @[Mux.scala 27:72] + node _T_1672 = or(_T_1671, _T_1657) @[Mux.scala 27:72] + node _T_1673 = or(_T_1672, _T_1658) @[Mux.scala 27:72] + node _T_1674 = or(_T_1673, _T_1659) @[Mux.scala 27:72] + node _T_1675 = or(_T_1674, _T_1660) @[Mux.scala 27:72] + node _T_1676 = or(_T_1675, _T_1661) @[Mux.scala 27:72] + node _T_1677 = or(_T_1676, _T_1662) @[Mux.scala 27:72] + node _T_1678 = or(_T_1677, _T_1663) @[Mux.scala 27:72] + node _T_1679 = or(_T_1678, _T_1664) @[Mux.scala 27:72] + node _T_1680 = or(_T_1679, _T_1665) @[Mux.scala 27:72] + node _T_1681 = or(_T_1680, _T_1666) @[Mux.scala 27:72] + node _T_1682 = or(_T_1681, _T_1667) @[Mux.scala 27:72] + wire _T_1683 : UInt<16> @[Mux.scala 27:72] + _T_1683 <= _T_1682 @[Mux.scala 27:72] + node _T_1684 = eq(byp_fetch_index_1, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1685 = bits(_T_1684, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1686 = bits(ic_miss_buff_data[0], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1687 = eq(byp_fetch_index_1, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1688 = bits(_T_1687, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1689 = bits(ic_miss_buff_data[1], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1690 = eq(byp_fetch_index_1, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1691 = bits(_T_1690, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1692 = bits(ic_miss_buff_data[2], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1693 = eq(byp_fetch_index_1, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1694 = bits(_T_1693, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1695 = bits(ic_miss_buff_data[3], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1696 = eq(byp_fetch_index_1, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1697 = bits(_T_1696, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1698 = bits(ic_miss_buff_data[4], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1699 = eq(byp_fetch_index_1, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1700 = bits(_T_1699, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1701 = bits(ic_miss_buff_data[5], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1702 = eq(byp_fetch_index_1, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1703 = bits(_T_1702, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1704 = bits(ic_miss_buff_data[6], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1705 = eq(byp_fetch_index_1, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1706 = bits(_T_1705, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1707 = bits(ic_miss_buff_data[7], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1708 = eq(byp_fetch_index_1, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1709 = bits(_T_1708, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1710 = bits(ic_miss_buff_data[8], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1711 = eq(byp_fetch_index_1, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1712 = bits(_T_1711, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1713 = bits(ic_miss_buff_data[9], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1714 = eq(byp_fetch_index_1, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1715 = bits(_T_1714, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1716 = bits(ic_miss_buff_data[10], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1717 = eq(byp_fetch_index_1, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1718 = bits(_T_1717, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1719 = bits(ic_miss_buff_data[11], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1720 = eq(byp_fetch_index_1, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1721 = bits(_T_1720, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1722 = bits(ic_miss_buff_data[12], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1723 = eq(byp_fetch_index_1, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1724 = bits(_T_1723, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1725 = bits(ic_miss_buff_data[13], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1726 = eq(byp_fetch_index_1, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1727 = bits(_T_1726, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1728 = bits(ic_miss_buff_data[14], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1729 = eq(byp_fetch_index_1, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 487:179] + node _T_1730 = bits(_T_1729, 0, 0) @[el2_ifu_mem_ctl.scala 487:187] + node _T_1731 = bits(ic_miss_buff_data[15], 31, 0) @[el2_ifu_mem_ctl.scala 487:215] + node _T_1732 = mux(_T_1685, _T_1686, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1733 = mux(_T_1688, _T_1689, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1734 = mux(_T_1691, _T_1692, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1735 = mux(_T_1694, _T_1695, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1736 = mux(_T_1697, _T_1698, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1737 = mux(_T_1700, _T_1701, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1738 = mux(_T_1703, _T_1704, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1739 = mux(_T_1706, _T_1707, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1740 = mux(_T_1709, _T_1710, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1741 = mux(_T_1712, _T_1713, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1742 = mux(_T_1715, _T_1716, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1743 = mux(_T_1718, _T_1719, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1744 = mux(_T_1721, _T_1722, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1745 = mux(_T_1724, _T_1725, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1746 = mux(_T_1727, _T_1728, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1747 = mux(_T_1730, _T_1731, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1748 = or(_T_1732, _T_1733) @[Mux.scala 27:72] + node _T_1749 = or(_T_1748, _T_1734) @[Mux.scala 27:72] + node _T_1750 = or(_T_1749, _T_1735) @[Mux.scala 27:72] + node _T_1751 = or(_T_1750, _T_1736) @[Mux.scala 27:72] + node _T_1752 = or(_T_1751, _T_1737) @[Mux.scala 27:72] + node _T_1753 = or(_T_1752, _T_1738) @[Mux.scala 27:72] + node _T_1754 = or(_T_1753, _T_1739) @[Mux.scala 27:72] + node _T_1755 = or(_T_1754, _T_1740) @[Mux.scala 27:72] + node _T_1756 = or(_T_1755, _T_1741) @[Mux.scala 27:72] + node _T_1757 = or(_T_1756, _T_1742) @[Mux.scala 27:72] + node _T_1758 = or(_T_1757, _T_1743) @[Mux.scala 27:72] + node _T_1759 = or(_T_1758, _T_1744) @[Mux.scala 27:72] + node _T_1760 = or(_T_1759, _T_1745) @[Mux.scala 27:72] + node _T_1761 = or(_T_1760, _T_1746) @[Mux.scala 27:72] + node _T_1762 = or(_T_1761, _T_1747) @[Mux.scala 27:72] + wire _T_1763 : UInt<32> @[Mux.scala 27:72] + _T_1763 <= _T_1762 @[Mux.scala 27:72] + node _T_1764 = eq(byp_fetch_index_0, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1765 = bits(_T_1764, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1766 = bits(ic_miss_buff_data[0], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1767 = eq(byp_fetch_index_0, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1768 = bits(_T_1767, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1769 = bits(ic_miss_buff_data[1], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1770 = eq(byp_fetch_index_0, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1771 = bits(_T_1770, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1772 = bits(ic_miss_buff_data[2], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1773 = eq(byp_fetch_index_0, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1774 = bits(_T_1773, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1775 = bits(ic_miss_buff_data[3], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1776 = eq(byp_fetch_index_0, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1777 = bits(_T_1776, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1778 = bits(ic_miss_buff_data[4], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1779 = eq(byp_fetch_index_0, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1780 = bits(_T_1779, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1781 = bits(ic_miss_buff_data[5], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1782 = eq(byp_fetch_index_0, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1783 = bits(_T_1782, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1784 = bits(ic_miss_buff_data[6], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1785 = eq(byp_fetch_index_0, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1786 = bits(_T_1785, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1787 = bits(ic_miss_buff_data[7], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1788 = eq(byp_fetch_index_0, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1789 = bits(_T_1788, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1790 = bits(ic_miss_buff_data[8], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1791 = eq(byp_fetch_index_0, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1792 = bits(_T_1791, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1793 = bits(ic_miss_buff_data[9], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1794 = eq(byp_fetch_index_0, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1795 = bits(_T_1794, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1796 = bits(ic_miss_buff_data[10], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1797 = eq(byp_fetch_index_0, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1798 = bits(_T_1797, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1799 = bits(ic_miss_buff_data[11], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1800 = eq(byp_fetch_index_0, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1801 = bits(_T_1800, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1802 = bits(ic_miss_buff_data[12], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1803 = eq(byp_fetch_index_0, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1804 = bits(_T_1803, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1805 = bits(ic_miss_buff_data[13], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1806 = eq(byp_fetch_index_0, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1807 = bits(_T_1806, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1808 = bits(ic_miss_buff_data[14], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1809 = eq(byp_fetch_index_0, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 487:285] + node _T_1810 = bits(_T_1809, 0, 0) @[el2_ifu_mem_ctl.scala 487:293] + node _T_1811 = bits(ic_miss_buff_data[15], 31, 0) @[el2_ifu_mem_ctl.scala 487:321] + node _T_1812 = mux(_T_1765, _T_1766, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1813 = mux(_T_1768, _T_1769, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1814 = mux(_T_1771, _T_1772, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1815 = mux(_T_1774, _T_1775, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1816 = mux(_T_1777, _T_1778, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1817 = mux(_T_1780, _T_1781, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1818 = mux(_T_1783, _T_1784, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1819 = mux(_T_1786, _T_1787, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1820 = mux(_T_1789, _T_1790, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1821 = mux(_T_1792, _T_1793, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1822 = mux(_T_1795, _T_1796, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1823 = mux(_T_1798, _T_1799, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1824 = mux(_T_1801, _T_1802, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1825 = mux(_T_1804, _T_1805, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1826 = mux(_T_1807, _T_1808, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1827 = mux(_T_1810, _T_1811, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1828 = or(_T_1812, _T_1813) @[Mux.scala 27:72] + node _T_1829 = or(_T_1828, _T_1814) @[Mux.scala 27:72] + node _T_1830 = or(_T_1829, _T_1815) @[Mux.scala 27:72] + node _T_1831 = or(_T_1830, _T_1816) @[Mux.scala 27:72] + node _T_1832 = or(_T_1831, _T_1817) @[Mux.scala 27:72] + node _T_1833 = or(_T_1832, _T_1818) @[Mux.scala 27:72] + node _T_1834 = or(_T_1833, _T_1819) @[Mux.scala 27:72] + node _T_1835 = or(_T_1834, _T_1820) @[Mux.scala 27:72] + node _T_1836 = or(_T_1835, _T_1821) @[Mux.scala 27:72] + node _T_1837 = or(_T_1836, _T_1822) @[Mux.scala 27:72] + node _T_1838 = or(_T_1837, _T_1823) @[Mux.scala 27:72] + node _T_1839 = or(_T_1838, _T_1824) @[Mux.scala 27:72] + node _T_1840 = or(_T_1839, _T_1825) @[Mux.scala 27:72] + node _T_1841 = or(_T_1840, _T_1826) @[Mux.scala 27:72] + node _T_1842 = or(_T_1841, _T_1827) @[Mux.scala 27:72] + wire _T_1843 : UInt<32> @[Mux.scala 27:72] + _T_1843 <= _T_1842 @[Mux.scala 27:72] + node _T_1844 = cat(_T_1683, _T_1763) @[Cat.scala 29:58] + node _T_1845 = cat(_T_1844, _T_1843) @[Cat.scala 29:58] + node _T_1846 = eq(byp_fetch_index_inc_1, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1847 = bits(_T_1846, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1848 = bits(ic_miss_buff_data[0], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1849 = eq(byp_fetch_index_inc_1, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1850 = bits(_T_1849, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1851 = bits(ic_miss_buff_data[1], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1852 = eq(byp_fetch_index_inc_1, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1853 = bits(_T_1852, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1854 = bits(ic_miss_buff_data[2], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1855 = eq(byp_fetch_index_inc_1, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1856 = bits(_T_1855, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1857 = bits(ic_miss_buff_data[3], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1858 = eq(byp_fetch_index_inc_1, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1859 = bits(_T_1858, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1860 = bits(ic_miss_buff_data[4], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1861 = eq(byp_fetch_index_inc_1, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1862 = bits(_T_1861, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1863 = bits(ic_miss_buff_data[5], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1864 = eq(byp_fetch_index_inc_1, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1865 = bits(_T_1864, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1866 = bits(ic_miss_buff_data[6], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1867 = eq(byp_fetch_index_inc_1, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1868 = bits(_T_1867, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1869 = bits(ic_miss_buff_data[7], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1870 = eq(byp_fetch_index_inc_1, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1871 = bits(_T_1870, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1872 = bits(ic_miss_buff_data[8], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1873 = eq(byp_fetch_index_inc_1, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1874 = bits(_T_1873, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1875 = bits(ic_miss_buff_data[9], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1876 = eq(byp_fetch_index_inc_1, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1877 = bits(_T_1876, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1878 = bits(ic_miss_buff_data[10], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1879 = eq(byp_fetch_index_inc_1, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1880 = bits(_T_1879, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1881 = bits(ic_miss_buff_data[11], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1882 = eq(byp_fetch_index_inc_1, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1883 = bits(_T_1882, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1884 = bits(ic_miss_buff_data[12], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1885 = eq(byp_fetch_index_inc_1, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1886 = bits(_T_1885, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1887 = bits(ic_miss_buff_data[13], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1888 = eq(byp_fetch_index_inc_1, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1889 = bits(_T_1888, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1890 = bits(ic_miss_buff_data[14], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1891 = eq(byp_fetch_index_inc_1, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 488:73] + node _T_1892 = bits(_T_1891, 0, 0) @[el2_ifu_mem_ctl.scala 488:81] + node _T_1893 = bits(ic_miss_buff_data[15], 15, 0) @[el2_ifu_mem_ctl.scala 488:109] + node _T_1894 = mux(_T_1847, _T_1848, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1895 = mux(_T_1850, _T_1851, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1896 = mux(_T_1853, _T_1854, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1897 = mux(_T_1856, _T_1857, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1898 = mux(_T_1859, _T_1860, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1899 = mux(_T_1862, _T_1863, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1900 = mux(_T_1865, _T_1866, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1901 = mux(_T_1868, _T_1869, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1902 = mux(_T_1871, _T_1872, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1903 = mux(_T_1874, _T_1875, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1904 = mux(_T_1877, _T_1878, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1905 = mux(_T_1880, _T_1881, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1906 = mux(_T_1883, _T_1884, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1907 = mux(_T_1886, _T_1887, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1908 = mux(_T_1889, _T_1890, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1909 = mux(_T_1892, _T_1893, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1910 = or(_T_1894, _T_1895) @[Mux.scala 27:72] + node _T_1911 = or(_T_1910, _T_1896) @[Mux.scala 27:72] + node _T_1912 = or(_T_1911, _T_1897) @[Mux.scala 27:72] + node _T_1913 = or(_T_1912, _T_1898) @[Mux.scala 27:72] + node _T_1914 = or(_T_1913, _T_1899) @[Mux.scala 27:72] + node _T_1915 = or(_T_1914, _T_1900) @[Mux.scala 27:72] + node _T_1916 = or(_T_1915, _T_1901) @[Mux.scala 27:72] + node _T_1917 = or(_T_1916, _T_1902) @[Mux.scala 27:72] + node _T_1918 = or(_T_1917, _T_1903) @[Mux.scala 27:72] + node _T_1919 = or(_T_1918, _T_1904) @[Mux.scala 27:72] + node _T_1920 = or(_T_1919, _T_1905) @[Mux.scala 27:72] + node _T_1921 = or(_T_1920, _T_1906) @[Mux.scala 27:72] + node _T_1922 = or(_T_1921, _T_1907) @[Mux.scala 27:72] + node _T_1923 = or(_T_1922, _T_1908) @[Mux.scala 27:72] + node _T_1924 = or(_T_1923, _T_1909) @[Mux.scala 27:72] + wire _T_1925 : UInt<16> @[Mux.scala 27:72] + _T_1925 <= _T_1924 @[Mux.scala 27:72] + node _T_1926 = eq(byp_fetch_index_inc_0, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1927 = bits(_T_1926, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1928 = bits(ic_miss_buff_data[0], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1929 = eq(byp_fetch_index_inc_0, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1930 = bits(_T_1929, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1931 = bits(ic_miss_buff_data[1], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1932 = eq(byp_fetch_index_inc_0, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1933 = bits(_T_1932, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1934 = bits(ic_miss_buff_data[2], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1935 = eq(byp_fetch_index_inc_0, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1936 = bits(_T_1935, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1937 = bits(ic_miss_buff_data[3], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1938 = eq(byp_fetch_index_inc_0, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1939 = bits(_T_1938, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1940 = bits(ic_miss_buff_data[4], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1941 = eq(byp_fetch_index_inc_0, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1942 = bits(_T_1941, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1943 = bits(ic_miss_buff_data[5], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1944 = eq(byp_fetch_index_inc_0, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1945 = bits(_T_1944, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1946 = bits(ic_miss_buff_data[6], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1947 = eq(byp_fetch_index_inc_0, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1948 = bits(_T_1947, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1949 = bits(ic_miss_buff_data[7], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1950 = eq(byp_fetch_index_inc_0, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1951 = bits(_T_1950, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1952 = bits(ic_miss_buff_data[8], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1953 = eq(byp_fetch_index_inc_0, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1954 = bits(_T_1953, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1955 = bits(ic_miss_buff_data[9], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1956 = eq(byp_fetch_index_inc_0, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1957 = bits(_T_1956, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1958 = bits(ic_miss_buff_data[10], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1959 = eq(byp_fetch_index_inc_0, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1960 = bits(_T_1959, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1961 = bits(ic_miss_buff_data[11], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1962 = eq(byp_fetch_index_inc_0, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1963 = bits(_T_1962, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1964 = bits(ic_miss_buff_data[12], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1965 = eq(byp_fetch_index_inc_0, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1966 = bits(_T_1965, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1967 = bits(ic_miss_buff_data[13], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1968 = eq(byp_fetch_index_inc_0, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1969 = bits(_T_1968, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1970 = bits(ic_miss_buff_data[14], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1971 = eq(byp_fetch_index_inc_0, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 488:183] + node _T_1972 = bits(_T_1971, 0, 0) @[el2_ifu_mem_ctl.scala 488:191] + node _T_1973 = bits(ic_miss_buff_data[15], 31, 0) @[el2_ifu_mem_ctl.scala 488:219] + node _T_1974 = mux(_T_1927, _T_1928, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1975 = mux(_T_1930, _T_1931, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1976 = mux(_T_1933, _T_1934, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1977 = mux(_T_1936, _T_1937, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1978 = mux(_T_1939, _T_1940, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1979 = mux(_T_1942, _T_1943, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1980 = mux(_T_1945, _T_1946, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1981 = mux(_T_1948, _T_1949, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1982 = mux(_T_1951, _T_1952, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1983 = mux(_T_1954, _T_1955, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1984 = mux(_T_1957, _T_1958, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1985 = mux(_T_1960, _T_1961, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1986 = mux(_T_1963, _T_1964, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1987 = mux(_T_1966, _T_1967, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1988 = mux(_T_1969, _T_1970, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1989 = mux(_T_1972, _T_1973, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_1990 = or(_T_1974, _T_1975) @[Mux.scala 27:72] + node _T_1991 = or(_T_1990, _T_1976) @[Mux.scala 27:72] + node _T_1992 = or(_T_1991, _T_1977) @[Mux.scala 27:72] + node _T_1993 = or(_T_1992, _T_1978) @[Mux.scala 27:72] + node _T_1994 = or(_T_1993, _T_1979) @[Mux.scala 27:72] + node _T_1995 = or(_T_1994, _T_1980) @[Mux.scala 27:72] + node _T_1996 = or(_T_1995, _T_1981) @[Mux.scala 27:72] + node _T_1997 = or(_T_1996, _T_1982) @[Mux.scala 27:72] + node _T_1998 = or(_T_1997, _T_1983) @[Mux.scala 27:72] + node _T_1999 = or(_T_1998, _T_1984) @[Mux.scala 27:72] + node _T_2000 = or(_T_1999, _T_1985) @[Mux.scala 27:72] + node _T_2001 = or(_T_2000, _T_1986) @[Mux.scala 27:72] + node _T_2002 = or(_T_2001, _T_1987) @[Mux.scala 27:72] + node _T_2003 = or(_T_2002, _T_1988) @[Mux.scala 27:72] + node _T_2004 = or(_T_2003, _T_1989) @[Mux.scala 27:72] + wire _T_2005 : UInt<32> @[Mux.scala 27:72] + _T_2005 <= _T_2004 @[Mux.scala 27:72] + node _T_2006 = eq(byp_fetch_index_1, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2007 = bits(_T_2006, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2008 = bits(ic_miss_buff_data[0], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2009 = eq(byp_fetch_index_1, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2010 = bits(_T_2009, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2011 = bits(ic_miss_buff_data[1], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2012 = eq(byp_fetch_index_1, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2013 = bits(_T_2012, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2014 = bits(ic_miss_buff_data[2], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2015 = eq(byp_fetch_index_1, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2016 = bits(_T_2015, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2017 = bits(ic_miss_buff_data[3], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2018 = eq(byp_fetch_index_1, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2019 = bits(_T_2018, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2020 = bits(ic_miss_buff_data[4], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2021 = eq(byp_fetch_index_1, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2022 = bits(_T_2021, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2023 = bits(ic_miss_buff_data[5], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2024 = eq(byp_fetch_index_1, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2025 = bits(_T_2024, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2026 = bits(ic_miss_buff_data[6], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2027 = eq(byp_fetch_index_1, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2028 = bits(_T_2027, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2029 = bits(ic_miss_buff_data[7], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2030 = eq(byp_fetch_index_1, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2031 = bits(_T_2030, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2032 = bits(ic_miss_buff_data[8], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2033 = eq(byp_fetch_index_1, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2034 = bits(_T_2033, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2035 = bits(ic_miss_buff_data[9], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2036 = eq(byp_fetch_index_1, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2037 = bits(_T_2036, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2038 = bits(ic_miss_buff_data[10], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2039 = eq(byp_fetch_index_1, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2040 = bits(_T_2039, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2041 = bits(ic_miss_buff_data[11], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2042 = eq(byp_fetch_index_1, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2043 = bits(_T_2042, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2044 = bits(ic_miss_buff_data[12], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2045 = eq(byp_fetch_index_1, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2046 = bits(_T_2045, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2047 = bits(ic_miss_buff_data[13], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2048 = eq(byp_fetch_index_1, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2049 = bits(_T_2048, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2050 = bits(ic_miss_buff_data[14], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2051 = eq(byp_fetch_index_1, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 488:289] + node _T_2052 = bits(_T_2051, 0, 0) @[el2_ifu_mem_ctl.scala 488:297] + node _T_2053 = bits(ic_miss_buff_data[15], 31, 0) @[el2_ifu_mem_ctl.scala 488:325] + node _T_2054 = mux(_T_2007, _T_2008, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2055 = mux(_T_2010, _T_2011, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2056 = mux(_T_2013, _T_2014, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2057 = mux(_T_2016, _T_2017, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2058 = mux(_T_2019, _T_2020, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2059 = mux(_T_2022, _T_2023, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2060 = mux(_T_2025, _T_2026, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2061 = mux(_T_2028, _T_2029, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2062 = mux(_T_2031, _T_2032, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2063 = mux(_T_2034, _T_2035, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2064 = mux(_T_2037, _T_2038, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2065 = mux(_T_2040, _T_2041, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2066 = mux(_T_2043, _T_2044, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2067 = mux(_T_2046, _T_2047, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2068 = mux(_T_2049, _T_2050, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2069 = mux(_T_2052, _T_2053, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2070 = or(_T_2054, _T_2055) @[Mux.scala 27:72] + node _T_2071 = or(_T_2070, _T_2056) @[Mux.scala 27:72] + node _T_2072 = or(_T_2071, _T_2057) @[Mux.scala 27:72] + node _T_2073 = or(_T_2072, _T_2058) @[Mux.scala 27:72] + node _T_2074 = or(_T_2073, _T_2059) @[Mux.scala 27:72] + node _T_2075 = or(_T_2074, _T_2060) @[Mux.scala 27:72] + node _T_2076 = or(_T_2075, _T_2061) @[Mux.scala 27:72] + node _T_2077 = or(_T_2076, _T_2062) @[Mux.scala 27:72] + node _T_2078 = or(_T_2077, _T_2063) @[Mux.scala 27:72] + node _T_2079 = or(_T_2078, _T_2064) @[Mux.scala 27:72] + node _T_2080 = or(_T_2079, _T_2065) @[Mux.scala 27:72] + node _T_2081 = or(_T_2080, _T_2066) @[Mux.scala 27:72] + node _T_2082 = or(_T_2081, _T_2067) @[Mux.scala 27:72] + node _T_2083 = or(_T_2082, _T_2068) @[Mux.scala 27:72] + node _T_2084 = or(_T_2083, _T_2069) @[Mux.scala 27:72] + wire _T_2085 : UInt<32> @[Mux.scala 27:72] + _T_2085 <= _T_2084 @[Mux.scala 27:72] + node _T_2086 = cat(_T_1925, _T_2005) @[Cat.scala 29:58] + node _T_2087 = cat(_T_2086, _T_2085) @[Cat.scala 29:58] + node ic_byp_data_only_pre_new = mux(_T_1603, _T_1845, _T_2087) @[el2_ifu_mem_ctl.scala 486:37] + node _T_2088 = bits(ifu_fetch_addr_int_f, 0, 0) @[el2_ifu_mem_ctl.scala 490:52] + node _T_2089 = bits(_T_2088, 0, 0) @[el2_ifu_mem_ctl.scala 490:62] + node _T_2090 = eq(_T_2089, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 490:31] + node _T_2091 = bits(ic_byp_data_only_pre_new, 79, 16) @[el2_ifu_mem_ctl.scala 490:128] + node _T_2092 = cat(UInt<16>("h00"), _T_2091) @[Cat.scala 29:58] + node _T_2093 = mux(_T_2090, ic_byp_data_only_pre_new, _T_2092) @[el2_ifu_mem_ctl.scala 490:30] + ic_byp_data_only_new <= _T_2093 @[el2_ifu_mem_ctl.scala 490:24] + node _T_2094 = bits(imb_ff, 5, 5) @[el2_ifu_mem_ctl.scala 492:27] + node _T_2095 = bits(ifu_fetch_addr_int_f, 6, 6) @[el2_ifu_mem_ctl.scala 492:75] + node miss_wrap_f = neq(_T_2094, _T_2095) @[el2_ifu_mem_ctl.scala 492:51] + node _T_2096 = bits(byp_fetch_index, 4, 2) @[el2_ifu_mem_ctl.scala 493:102] + node _T_2097 = eq(_T_2096, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 493:127] + node _T_2098 = bits(_T_2097, 0, 0) @[el2_ifu_mem_ctl.scala 493:135] + node _T_2099 = bits(ic_miss_buff_data_valid, 0, 0) @[el2_ifu_mem_ctl.scala 493:166] + node _T_2100 = bits(byp_fetch_index, 4, 2) @[el2_ifu_mem_ctl.scala 493:102] + node _T_2101 = eq(_T_2100, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 493:127] + node _T_2102 = bits(_T_2101, 0, 0) @[el2_ifu_mem_ctl.scala 493:135] + node _T_2103 = bits(ic_miss_buff_data_valid, 1, 1) @[el2_ifu_mem_ctl.scala 493:166] + node _T_2104 = bits(byp_fetch_index, 4, 2) @[el2_ifu_mem_ctl.scala 493:102] + node _T_2105 = eq(_T_2104, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 493:127] + node _T_2106 = bits(_T_2105, 0, 0) @[el2_ifu_mem_ctl.scala 493:135] + node _T_2107 = bits(ic_miss_buff_data_valid, 2, 2) @[el2_ifu_mem_ctl.scala 493:166] + node _T_2108 = bits(byp_fetch_index, 4, 2) @[el2_ifu_mem_ctl.scala 493:102] + node _T_2109 = eq(_T_2108, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 493:127] + node _T_2110 = bits(_T_2109, 0, 0) @[el2_ifu_mem_ctl.scala 493:135] + node _T_2111 = bits(ic_miss_buff_data_valid, 3, 3) @[el2_ifu_mem_ctl.scala 493:166] + node _T_2112 = bits(byp_fetch_index, 4, 2) @[el2_ifu_mem_ctl.scala 493:102] + node _T_2113 = eq(_T_2112, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 493:127] + node _T_2114 = bits(_T_2113, 0, 0) @[el2_ifu_mem_ctl.scala 493:135] + node _T_2115 = bits(ic_miss_buff_data_valid, 4, 4) @[el2_ifu_mem_ctl.scala 493:166] + node _T_2116 = bits(byp_fetch_index, 4, 2) @[el2_ifu_mem_ctl.scala 493:102] + node _T_2117 = eq(_T_2116, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 493:127] + node _T_2118 = bits(_T_2117, 0, 0) @[el2_ifu_mem_ctl.scala 493:135] + node _T_2119 = bits(ic_miss_buff_data_valid, 5, 5) @[el2_ifu_mem_ctl.scala 493:166] + node _T_2120 = bits(byp_fetch_index, 4, 2) @[el2_ifu_mem_ctl.scala 493:102] + node _T_2121 = eq(_T_2120, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 493:127] + node _T_2122 = bits(_T_2121, 0, 0) @[el2_ifu_mem_ctl.scala 493:135] + node _T_2123 = bits(ic_miss_buff_data_valid, 6, 6) @[el2_ifu_mem_ctl.scala 493:166] + node _T_2124 = bits(byp_fetch_index, 4, 2) @[el2_ifu_mem_ctl.scala 493:102] + node _T_2125 = eq(_T_2124, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 493:127] + node _T_2126 = bits(_T_2125, 0, 0) @[el2_ifu_mem_ctl.scala 493:135] + node _T_2127 = bits(ic_miss_buff_data_valid, 7, 7) @[el2_ifu_mem_ctl.scala 493:166] + node _T_2128 = mux(_T_2098, _T_2099, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2129 = mux(_T_2102, _T_2103, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2130 = mux(_T_2106, _T_2107, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2131 = mux(_T_2110, _T_2111, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2132 = mux(_T_2114, _T_2115, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2133 = mux(_T_2118, _T_2119, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2134 = mux(_T_2122, _T_2123, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2135 = mux(_T_2126, _T_2127, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2136 = or(_T_2128, _T_2129) @[Mux.scala 27:72] + node _T_2137 = or(_T_2136, _T_2130) @[Mux.scala 27:72] + node _T_2138 = or(_T_2137, _T_2131) @[Mux.scala 27:72] + node _T_2139 = or(_T_2138, _T_2132) @[Mux.scala 27:72] + node _T_2140 = or(_T_2139, _T_2133) @[Mux.scala 27:72] + node _T_2141 = or(_T_2140, _T_2134) @[Mux.scala 27:72] + node _T_2142 = or(_T_2141, _T_2135) @[Mux.scala 27:72] + wire ic_miss_buff_data_valid_bypass_index : UInt<1> @[Mux.scala 27:72] + ic_miss_buff_data_valid_bypass_index <= _T_2142 @[Mux.scala 27:72] + node _T_2143 = eq(byp_fetch_index_inc, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 494:110] + node _T_2144 = bits(_T_2143, 0, 0) @[el2_ifu_mem_ctl.scala 494:118] + node _T_2145 = bits(ic_miss_buff_data_valid, 0, 0) @[el2_ifu_mem_ctl.scala 494:149] + node _T_2146 = eq(byp_fetch_index_inc, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 494:110] + node _T_2147 = bits(_T_2146, 0, 0) @[el2_ifu_mem_ctl.scala 494:118] + node _T_2148 = bits(ic_miss_buff_data_valid, 1, 1) @[el2_ifu_mem_ctl.scala 494:149] + node _T_2149 = eq(byp_fetch_index_inc, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 494:110] + node _T_2150 = bits(_T_2149, 0, 0) @[el2_ifu_mem_ctl.scala 494:118] + node _T_2151 = bits(ic_miss_buff_data_valid, 2, 2) @[el2_ifu_mem_ctl.scala 494:149] + node _T_2152 = eq(byp_fetch_index_inc, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 494:110] + node _T_2153 = bits(_T_2152, 0, 0) @[el2_ifu_mem_ctl.scala 494:118] + node _T_2154 = bits(ic_miss_buff_data_valid, 3, 3) @[el2_ifu_mem_ctl.scala 494:149] + node _T_2155 = eq(byp_fetch_index_inc, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 494:110] + node _T_2156 = bits(_T_2155, 0, 0) @[el2_ifu_mem_ctl.scala 494:118] + node _T_2157 = bits(ic_miss_buff_data_valid, 4, 4) @[el2_ifu_mem_ctl.scala 494:149] + node _T_2158 = eq(byp_fetch_index_inc, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 494:110] + node _T_2159 = bits(_T_2158, 0, 0) @[el2_ifu_mem_ctl.scala 494:118] + node _T_2160 = bits(ic_miss_buff_data_valid, 5, 5) @[el2_ifu_mem_ctl.scala 494:149] + node _T_2161 = eq(byp_fetch_index_inc, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 494:110] + node _T_2162 = bits(_T_2161, 0, 0) @[el2_ifu_mem_ctl.scala 494:118] + node _T_2163 = bits(ic_miss_buff_data_valid, 6, 6) @[el2_ifu_mem_ctl.scala 494:149] + node _T_2164 = eq(byp_fetch_index_inc, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 494:110] + node _T_2165 = bits(_T_2164, 0, 0) @[el2_ifu_mem_ctl.scala 494:118] + node _T_2166 = bits(ic_miss_buff_data_valid, 7, 7) @[el2_ifu_mem_ctl.scala 494:149] + node _T_2167 = mux(_T_2144, _T_2145, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2168 = mux(_T_2147, _T_2148, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2169 = mux(_T_2150, _T_2151, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2170 = mux(_T_2153, _T_2154, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2171 = mux(_T_2156, _T_2157, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2172 = mux(_T_2159, _T_2160, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2173 = mux(_T_2162, _T_2163, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2174 = mux(_T_2165, _T_2166, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2175 = or(_T_2167, _T_2168) @[Mux.scala 27:72] + node _T_2176 = or(_T_2175, _T_2169) @[Mux.scala 27:72] + node _T_2177 = or(_T_2176, _T_2170) @[Mux.scala 27:72] + node _T_2178 = or(_T_2177, _T_2171) @[Mux.scala 27:72] + node _T_2179 = or(_T_2178, _T_2172) @[Mux.scala 27:72] + node _T_2180 = or(_T_2179, _T_2173) @[Mux.scala 27:72] + node _T_2181 = or(_T_2180, _T_2174) @[Mux.scala 27:72] + wire ic_miss_buff_data_valid_inc_bypass_index : UInt<1> @[Mux.scala 27:72] + ic_miss_buff_data_valid_inc_bypass_index <= _T_2181 @[Mux.scala 27:72] + node _T_2182 = bits(byp_fetch_index, 1, 1) @[el2_ifu_mem_ctl.scala 495:85] + node _T_2183 = eq(_T_2182, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 495:69] + node _T_2184 = and(ic_miss_buff_data_valid_bypass_index, _T_2183) @[el2_ifu_mem_ctl.scala 495:67] + node _T_2185 = bits(byp_fetch_index, 0, 0) @[el2_ifu_mem_ctl.scala 495:107] + node _T_2186 = eq(_T_2185, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 495:91] + node _T_2187 = and(_T_2184, _T_2186) @[el2_ifu_mem_ctl.scala 495:89] + node _T_2188 = bits(byp_fetch_index, 1, 1) @[el2_ifu_mem_ctl.scala 496:61] + node _T_2189 = eq(_T_2188, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 496:45] + node _T_2190 = and(ic_miss_buff_data_valid_bypass_index, _T_2189) @[el2_ifu_mem_ctl.scala 496:43] + node _T_2191 = bits(byp_fetch_index, 0, 0) @[el2_ifu_mem_ctl.scala 496:83] + node _T_2192 = and(_T_2190, _T_2191) @[el2_ifu_mem_ctl.scala 496:65] + node _T_2193 = or(_T_2187, _T_2192) @[el2_ifu_mem_ctl.scala 495:112] + node _T_2194 = bits(byp_fetch_index, 1, 1) @[el2_ifu_mem_ctl.scala 497:61] + node _T_2195 = and(ic_miss_buff_data_valid_bypass_index, _T_2194) @[el2_ifu_mem_ctl.scala 497:43] + node _T_2196 = bits(byp_fetch_index, 0, 0) @[el2_ifu_mem_ctl.scala 497:83] + node _T_2197 = eq(_T_2196, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 497:67] + node _T_2198 = and(_T_2195, _T_2197) @[el2_ifu_mem_ctl.scala 497:65] + node _T_2199 = or(_T_2193, _T_2198) @[el2_ifu_mem_ctl.scala 496:88] + node _T_2200 = bits(byp_fetch_index, 1, 1) @[el2_ifu_mem_ctl.scala 498:61] + node _T_2201 = and(ic_miss_buff_data_valid_bypass_index, _T_2200) @[el2_ifu_mem_ctl.scala 498:43] + node _T_2202 = bits(byp_fetch_index, 0, 0) @[el2_ifu_mem_ctl.scala 498:83] + node _T_2203 = and(_T_2201, _T_2202) @[el2_ifu_mem_ctl.scala 498:65] + node _T_2204 = and(_T_2203, ic_miss_buff_data_valid_inc_bypass_index) @[el2_ifu_mem_ctl.scala 498:87] + node _T_2205 = or(_T_2199, _T_2204) @[el2_ifu_mem_ctl.scala 497:88] + node _T_2206 = bits(byp_fetch_index, 1, 1) @[el2_ifu_mem_ctl.scala 499:61] + node _T_2207 = eq(_T_2206, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 499:45] + node _T_2208 = and(ic_miss_buff_data_valid_bypass_index, _T_2207) @[el2_ifu_mem_ctl.scala 499:43] + node _T_2209 = bits(byp_fetch_index, 0, 0) @[el2_ifu_mem_ctl.scala 499:83] + node _T_2210 = eq(_T_2209, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 499:67] + node _T_2211 = and(_T_2208, _T_2210) @[el2_ifu_mem_ctl.scala 499:65] + node _T_2212 = bits(byp_fetch_index, 4, 2) @[el2_ifu_mem_ctl.scala 499:105] + node _T_2213 = mux(UInt<1>("h01"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_2214 = eq(_T_2212, _T_2213) @[el2_ifu_mem_ctl.scala 499:131] + node _T_2215 = and(_T_2211, _T_2214) @[el2_ifu_mem_ctl.scala 499:87] + node miss_buff_hit_unq_f = or(_T_2205, _T_2215) @[el2_ifu_mem_ctl.scala 498:131] + node _T_2216 = eq(miss_state, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 501:30] + node _T_2217 = eq(miss_wrap_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 501:68] + node _T_2218 = and(miss_buff_hit_unq_f, _T_2217) @[el2_ifu_mem_ctl.scala 501:66] + node _T_2219 = and(_T_2216, _T_2218) @[el2_ifu_mem_ctl.scala 501:43] + stream_hit_f <= _T_2219 @[el2_ifu_mem_ctl.scala 501:16] + node _T_2220 = eq(miss_state, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 502:31] + node _T_2221 = eq(miss_wrap_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 502:69] + node _T_2222 = and(miss_buff_hit_unq_f, _T_2221) @[el2_ifu_mem_ctl.scala 502:67] + node _T_2223 = and(_T_2220, _T_2222) @[el2_ifu_mem_ctl.scala 502:44] + node _T_2224 = and(_T_2223, ifc_fetch_req_f) @[el2_ifu_mem_ctl.scala 502:83] + stream_miss_f <= _T_2224 @[el2_ifu_mem_ctl.scala 502:17] + node _T_2225 = bits(byp_fetch_index, 4, 1) @[el2_ifu_mem_ctl.scala 503:35] + node _T_2226 = mux(UInt<1>("h01"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_2227 = eq(_T_2225, _T_2226) @[el2_ifu_mem_ctl.scala 503:60] + node _T_2228 = and(_T_2227, ifc_fetch_req_f) @[el2_ifu_mem_ctl.scala 503:92] + node _T_2229 = and(_T_2228, stream_hit_f) @[el2_ifu_mem_ctl.scala 503:110] + stream_eol_f <= _T_2229 @[el2_ifu_mem_ctl.scala 503:16] + node _T_2230 = eq(miss_state, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 504:55] + node _T_2231 = eq(miss_state, UInt<3>("h01")) @[el2_ifu_mem_ctl.scala 504:87] + node _T_2232 = or(_T_2230, _T_2231) @[el2_ifu_mem_ctl.scala 504:74] + node _T_2233 = and(miss_buff_hit_unq_f, _T_2232) @[el2_ifu_mem_ctl.scala 504:41] + crit_byp_hit_f <= _T_2233 @[el2_ifu_mem_ctl.scala 504:18] + node _T_2234 = bits(ifu_bus_rid_ff, 2, 1) @[el2_ifu_mem_ctl.scala 507:37] + node _T_2235 = bits(ifu_bus_rid_ff, 0, 0) @[el2_ifu_mem_ctl.scala 507:70] + node _T_2236 = eq(_T_2235, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 507:55] + node other_tag = cat(_T_2234, _T_2236) @[Cat.scala 29:58] + node _T_2237 = eq(other_tag, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 508:81] + node _T_2238 = bits(_T_2237, 0, 0) @[el2_ifu_mem_ctl.scala 508:89] + node _T_2239 = bits(ic_miss_buff_data_valid, 0, 0) @[el2_ifu_mem_ctl.scala 508:120] + node _T_2240 = eq(other_tag, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 508:81] + node _T_2241 = bits(_T_2240, 0, 0) @[el2_ifu_mem_ctl.scala 508:89] + node _T_2242 = bits(ic_miss_buff_data_valid, 1, 1) @[el2_ifu_mem_ctl.scala 508:120] + node _T_2243 = eq(other_tag, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 508:81] + node _T_2244 = bits(_T_2243, 0, 0) @[el2_ifu_mem_ctl.scala 508:89] + node _T_2245 = bits(ic_miss_buff_data_valid, 2, 2) @[el2_ifu_mem_ctl.scala 508:120] + node _T_2246 = eq(other_tag, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 508:81] + node _T_2247 = bits(_T_2246, 0, 0) @[el2_ifu_mem_ctl.scala 508:89] + node _T_2248 = bits(ic_miss_buff_data_valid, 3, 3) @[el2_ifu_mem_ctl.scala 508:120] + node _T_2249 = eq(other_tag, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 508:81] + node _T_2250 = bits(_T_2249, 0, 0) @[el2_ifu_mem_ctl.scala 508:89] + node _T_2251 = bits(ic_miss_buff_data_valid, 4, 4) @[el2_ifu_mem_ctl.scala 508:120] + node _T_2252 = eq(other_tag, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 508:81] + node _T_2253 = bits(_T_2252, 0, 0) @[el2_ifu_mem_ctl.scala 508:89] + node _T_2254 = bits(ic_miss_buff_data_valid, 5, 5) @[el2_ifu_mem_ctl.scala 508:120] + node _T_2255 = eq(other_tag, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 508:81] + node _T_2256 = bits(_T_2255, 0, 0) @[el2_ifu_mem_ctl.scala 508:89] + node _T_2257 = bits(ic_miss_buff_data_valid, 6, 6) @[el2_ifu_mem_ctl.scala 508:120] + node _T_2258 = eq(other_tag, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 508:81] + node _T_2259 = bits(_T_2258, 0, 0) @[el2_ifu_mem_ctl.scala 508:89] + node _T_2260 = bits(ic_miss_buff_data_valid, 7, 7) @[el2_ifu_mem_ctl.scala 508:120] + node _T_2261 = mux(_T_2238, _T_2239, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2262 = mux(_T_2241, _T_2242, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2263 = mux(_T_2244, _T_2245, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2264 = mux(_T_2247, _T_2248, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2265 = mux(_T_2250, _T_2251, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2266 = mux(_T_2253, _T_2254, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2267 = mux(_T_2256, _T_2257, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2268 = mux(_T_2259, _T_2260, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2269 = or(_T_2261, _T_2262) @[Mux.scala 27:72] + node _T_2270 = or(_T_2269, _T_2263) @[Mux.scala 27:72] + node _T_2271 = or(_T_2270, _T_2264) @[Mux.scala 27:72] + node _T_2272 = or(_T_2271, _T_2265) @[Mux.scala 27:72] + node _T_2273 = or(_T_2272, _T_2266) @[Mux.scala 27:72] + node _T_2274 = or(_T_2273, _T_2267) @[Mux.scala 27:72] + node _T_2275 = or(_T_2274, _T_2268) @[Mux.scala 27:72] + wire second_half_available : UInt<1> @[Mux.scala 27:72] + second_half_available <= _T_2275 @[Mux.scala 27:72] + node _T_2276 = and(second_half_available, bus_ifu_wr_en_ff) @[el2_ifu_mem_ctl.scala 509:46] + write_ic_16_bytes <= _T_2276 @[el2_ifu_mem_ctl.scala 509:21] + node _T_2277 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2278 = eq(_T_2277, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2279 = bits(_T_2278, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2280 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2281 = eq(_T_2280, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2282 = bits(_T_2281, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2283 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2284 = eq(_T_2283, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2285 = bits(_T_2284, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2286 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2287 = eq(_T_2286, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2288 = bits(_T_2287, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2289 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2290 = eq(_T_2289, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2291 = bits(_T_2290, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2292 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2293 = eq(_T_2292, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2294 = bits(_T_2293, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2295 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2296 = eq(_T_2295, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2297 = bits(_T_2296, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2298 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2299 = eq(_T_2298, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2300 = bits(_T_2299, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2301 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2302 = eq(_T_2301, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2303 = bits(_T_2302, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2304 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2305 = eq(_T_2304, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2306 = bits(_T_2305, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2307 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2308 = eq(_T_2307, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2309 = bits(_T_2308, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2310 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2311 = eq(_T_2310, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2312 = bits(_T_2311, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2313 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2314 = eq(_T_2313, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2315 = bits(_T_2314, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2316 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2317 = eq(_T_2316, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2318 = bits(_T_2317, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2319 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2320 = eq(_T_2319, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2321 = bits(_T_2320, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2322 = cat(other_tag, UInt<1>("h01")) @[Cat.scala 29:58] + node _T_2323 = eq(_T_2322, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 510:89] + node _T_2324 = bits(_T_2323, 0, 0) @[el2_ifu_mem_ctl.scala 510:97] + node _T_2325 = mux(_T_2279, ic_miss_buff_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2326 = mux(_T_2282, ic_miss_buff_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2327 = mux(_T_2285, ic_miss_buff_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2328 = mux(_T_2288, ic_miss_buff_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2329 = mux(_T_2291, ic_miss_buff_data[4], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2330 = mux(_T_2294, ic_miss_buff_data[5], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2331 = mux(_T_2297, ic_miss_buff_data[6], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2332 = mux(_T_2300, ic_miss_buff_data[7], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2333 = mux(_T_2303, ic_miss_buff_data[8], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2334 = mux(_T_2306, ic_miss_buff_data[9], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2335 = mux(_T_2309, ic_miss_buff_data[10], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2336 = mux(_T_2312, ic_miss_buff_data[11], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2337 = mux(_T_2315, ic_miss_buff_data[12], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2338 = mux(_T_2318, ic_miss_buff_data[13], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2339 = mux(_T_2321, ic_miss_buff_data[14], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2340 = mux(_T_2324, ic_miss_buff_data[15], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2341 = or(_T_2325, _T_2326) @[Mux.scala 27:72] + node _T_2342 = or(_T_2341, _T_2327) @[Mux.scala 27:72] + node _T_2343 = or(_T_2342, _T_2328) @[Mux.scala 27:72] + node _T_2344 = or(_T_2343, _T_2329) @[Mux.scala 27:72] + node _T_2345 = or(_T_2344, _T_2330) @[Mux.scala 27:72] + node _T_2346 = or(_T_2345, _T_2331) @[Mux.scala 27:72] + node _T_2347 = or(_T_2346, _T_2332) @[Mux.scala 27:72] + node _T_2348 = or(_T_2347, _T_2333) @[Mux.scala 27:72] + node _T_2349 = or(_T_2348, _T_2334) @[Mux.scala 27:72] + node _T_2350 = or(_T_2349, _T_2335) @[Mux.scala 27:72] + node _T_2351 = or(_T_2350, _T_2336) @[Mux.scala 27:72] + node _T_2352 = or(_T_2351, _T_2337) @[Mux.scala 27:72] + node _T_2353 = or(_T_2352, _T_2338) @[Mux.scala 27:72] + node _T_2354 = or(_T_2353, _T_2339) @[Mux.scala 27:72] + node _T_2355 = or(_T_2354, _T_2340) @[Mux.scala 27:72] + wire _T_2356 : UInt<32> @[Mux.scala 27:72] + _T_2356 <= _T_2355 @[Mux.scala 27:72] + node _T_2357 = cat(other_tag, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_2358 = eq(_T_2357, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 511:64] + node _T_2359 = bits(_T_2358, 0, 0) @[el2_ifu_mem_ctl.scala 511:72] + node _T_2360 = cat(other_tag, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_2361 = eq(_T_2360, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 511:64] + node _T_2362 = bits(_T_2361, 0, 0) @[el2_ifu_mem_ctl.scala 511:72] + node _T_2363 = cat(other_tag, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_2364 = eq(_T_2363, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 511:64] + node _T_2365 = bits(_T_2364, 0, 0) @[el2_ifu_mem_ctl.scala 511:72] + node _T_2366 = cat(other_tag, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_2367 = eq(_T_2366, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 511:64] + node _T_2368 = bits(_T_2367, 0, 0) @[el2_ifu_mem_ctl.scala 511:72] + node _T_2369 = cat(other_tag, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_2370 = eq(_T_2369, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 511:64] + node _T_2371 = bits(_T_2370, 0, 0) @[el2_ifu_mem_ctl.scala 511:72] + node _T_2372 = cat(other_tag, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_2373 = eq(_T_2372, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 511:64] + node _T_2374 = bits(_T_2373, 0, 0) @[el2_ifu_mem_ctl.scala 511:72] + node _T_2375 = cat(other_tag, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_2376 = eq(_T_2375, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 511:64] + node _T_2377 = bits(_T_2376, 0, 0) @[el2_ifu_mem_ctl.scala 511:72] + node _T_2378 = cat(other_tag, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_2379 = eq(_T_2378, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 511:64] + node _T_2380 = bits(_T_2379, 0, 0) @[el2_ifu_mem_ctl.scala 511:72] + node _T_2381 = mux(_T_2359, ic_miss_buff_data[0], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2382 = mux(_T_2362, ic_miss_buff_data[1], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2383 = mux(_T_2365, ic_miss_buff_data[2], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2384 = mux(_T_2368, ic_miss_buff_data[3], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2385 = mux(_T_2371, ic_miss_buff_data[4], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2386 = mux(_T_2374, ic_miss_buff_data[5], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2387 = mux(_T_2377, ic_miss_buff_data[6], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2388 = mux(_T_2380, ic_miss_buff_data[7], UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2389 = or(_T_2381, _T_2382) @[Mux.scala 27:72] + node _T_2390 = or(_T_2389, _T_2383) @[Mux.scala 27:72] + node _T_2391 = or(_T_2390, _T_2384) @[Mux.scala 27:72] + node _T_2392 = or(_T_2391, _T_2385) @[Mux.scala 27:72] + node _T_2393 = or(_T_2392, _T_2386) @[Mux.scala 27:72] + node _T_2394 = or(_T_2393, _T_2387) @[Mux.scala 27:72] + node _T_2395 = or(_T_2394, _T_2388) @[Mux.scala 27:72] + wire _T_2396 : UInt<32> @[Mux.scala 27:72] + _T_2396 <= _T_2395 @[Mux.scala 27:72] + node _T_2397 = cat(_T_2356, _T_2396) @[Cat.scala 29:58] + ic_miss_buff_half <= _T_2397 @[el2_ifu_mem_ctl.scala 510:21] + node _T_2398 = and(io.ic_tag_perr, sel_ic_data) @[el2_ifu_mem_ctl.scala 513:44] + node _T_2399 = or(ifc_region_acc_fault_final_f, ifc_bus_acc_fault_f) @[el2_ifu_mem_ctl.scala 513:91] + node _T_2400 = eq(_T_2399, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 513:60] + node _T_2401 = and(_T_2398, _T_2400) @[el2_ifu_mem_ctl.scala 513:58] + ic_rd_parity_final_err <= _T_2401 @[el2_ifu_mem_ctl.scala 513:26] + wire ifu_ic_rw_int_addr_ff : UInt<5> + ifu_ic_rw_int_addr_ff <= UInt<1>("h00") + wire perr_sb_write_status : UInt<1> + perr_sb_write_status <= UInt<1>("h00") + reg perr_ic_index_ff : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when perr_sb_write_status : @[Reg.scala 28:19] + perr_ic_index_ff <= ifu_ic_rw_int_addr_ff @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + wire perr_sel_invalidate : UInt<1> + perr_sel_invalidate <= UInt<1>("h00") + node _T_2402 = bits(perr_sel_invalidate, 0, 0) @[Bitwise.scala 72:15] + node perr_err_inv_way = mux(_T_2402, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12] + node _T_2403 = eq(perr_state, UInt<3>("h03")) @[el2_ifu_mem_ctl.scala 520:34] + iccm_correct_ecc <= _T_2403 @[el2_ifu_mem_ctl.scala 520:20] + node dma_sb_err_state = eq(perr_state, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 521:37] + reg dma_sb_err_state_ff : UInt<1>, io.active_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 522:61] + dma_sb_err_state_ff <= dma_sb_err_state @[el2_ifu_mem_ctl.scala 522:61] + wire perr_nxtstate : UInt<3> + perr_nxtstate <= UInt<1>("h00") + wire perr_state_en : UInt<1> + perr_state_en <= UInt<1>("h00") + wire iccm_error_start : UInt<1> + iccm_error_start <= UInt<1>("h00") + node _T_2404 = eq(UInt<3>("h00"), perr_state) @[Conditional.scala 37:30] + when _T_2404 : @[Conditional.scala 40:58] + node _T_2405 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 530:89] + node _T_2406 = and(io.ic_error_start, _T_2405) @[el2_ifu_mem_ctl.scala 530:87] + node _T_2407 = bits(_T_2406, 0, 0) @[el2_ifu_mem_ctl.scala 530:110] + node _T_2408 = mux(_T_2407, UInt<3>("h01"), UInt<3>("h02")) @[el2_ifu_mem_ctl.scala 530:67] + node _T_2409 = mux(io.iccm_dma_sb_error, UInt<3>("h04"), _T_2408) @[el2_ifu_mem_ctl.scala 530:27] + perr_nxtstate <= _T_2409 @[el2_ifu_mem_ctl.scala 530:21] + node _T_2410 = or(iccm_error_start, io.ic_error_start) @[el2_ifu_mem_ctl.scala 531:44] + node _T_2411 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 531:67] + node _T_2412 = and(_T_2410, _T_2411) @[el2_ifu_mem_ctl.scala 531:65] + node _T_2413 = or(_T_2412, io.iccm_dma_sb_error) @[el2_ifu_mem_ctl.scala 531:88] + node _T_2414 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 531:114] + node _T_2415 = and(_T_2413, _T_2414) @[el2_ifu_mem_ctl.scala 531:112] + perr_state_en <= _T_2415 @[el2_ifu_mem_ctl.scala 531:21] + perr_sb_write_status <= perr_state_en @[el2_ifu_mem_ctl.scala 532:28] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_2416 = eq(UInt<3>("h01"), perr_state) @[Conditional.scala 37:30] + when _T_2416 : @[Conditional.scala 39:67] + perr_nxtstate <= UInt<3>("h00") @[el2_ifu_mem_ctl.scala 535:21] + node _T_2417 = or(io.dec_tlu_flush_lower_wb, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 536:50] + perr_state_en <= _T_2417 @[el2_ifu_mem_ctl.scala 536:21] + node _T_2418 = and(io.dec_tlu_flush_lower_wb, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 537:56] + perr_sel_invalidate <= _T_2418 @[el2_ifu_mem_ctl.scala 537:27] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_2419 = eq(UInt<3>("h02"), perr_state) @[Conditional.scala 37:30] + when _T_2419 : @[Conditional.scala 39:67] + node _T_2420 = and(io.dec_tlu_flush_err_wb, io.dec_tlu_flush_lower_wb) @[el2_ifu_mem_ctl.scala 540:54] + node _T_2421 = or(_T_2420, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 540:84] + node _T_2422 = bits(_T_2421, 0, 0) @[el2_ifu_mem_ctl.scala 540:115] + node _T_2423 = mux(_T_2422, UInt<3>("h00"), UInt<3>("h03")) @[el2_ifu_mem_ctl.scala 540:27] + perr_nxtstate <= _T_2423 @[el2_ifu_mem_ctl.scala 540:21] + node _T_2424 = or(io.dec_tlu_flush_lower_wb, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 541:50] + perr_state_en <= _T_2424 @[el2_ifu_mem_ctl.scala 541:21] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_2425 = eq(UInt<3>("h04"), perr_state) @[Conditional.scala 37:30] + when _T_2425 : @[Conditional.scala 39:67] + node _T_2426 = mux(io.dec_tlu_force_halt, UInt<3>("h00"), UInt<3>("h03")) @[el2_ifu_mem_ctl.scala 544:27] + perr_nxtstate <= _T_2426 @[el2_ifu_mem_ctl.scala 544:21] + perr_state_en <= UInt<1>("h01") @[el2_ifu_mem_ctl.scala 545:21] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_2427 = eq(UInt<3>("h03"), perr_state) @[Conditional.scala 37:30] + when _T_2427 : @[Conditional.scala 39:67] + perr_nxtstate <= UInt<3>("h00") @[el2_ifu_mem_ctl.scala 548:21] + perr_state_en <= UInt<1>("h01") @[el2_ifu_mem_ctl.scala 549:21] + skip @[Conditional.scala 39:67] + reg _T_2428 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when perr_state_en : @[Reg.scala 28:19] + _T_2428 <= perr_nxtstate @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + perr_state <= _T_2428 @[el2_ifu_mem_ctl.scala 552:14] + wire err_stop_nxtstate : UInt<2> + err_stop_nxtstate <= UInt<1>("h00") + wire err_stop_state_en : UInt<1> + err_stop_state_en <= UInt<1>("h00") + wire iccm_correction_state : UInt<1> + iccm_correction_state <= UInt<1>("h00") + node _T_2429 = eq(UInt<2>("h00"), err_stop_state) @[Conditional.scala 37:30] + when _T_2429 : @[Conditional.scala 40:58] + err_stop_nxtstate <= UInt<2>("h01") @[el2_ifu_mem_ctl.scala 560:25] + node _T_2430 = eq(perr_state, UInt<3>("h02")) @[el2_ifu_mem_ctl.scala 561:66] + node _T_2431 = and(io.dec_tlu_flush_err_wb, _T_2430) @[el2_ifu_mem_ctl.scala 561:52] + node _T_2432 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 561:83] + node _T_2433 = and(_T_2431, _T_2432) @[el2_ifu_mem_ctl.scala 561:81] + err_stop_state_en <= _T_2433 @[el2_ifu_mem_ctl.scala 561:25] + skip @[Conditional.scala 40:58] + else : @[Conditional.scala 39:67] + node _T_2434 = eq(UInt<2>("h01"), err_stop_state) @[Conditional.scala 37:30] + when _T_2434 : @[Conditional.scala 39:67] + node _T_2435 = or(io.dec_tlu_flush_lower_wb, io.dec_tlu_i0_commit_cmt) @[el2_ifu_mem_ctl.scala 564:59] + node _T_2436 = or(_T_2435, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 564:86] + node _T_2437 = bits(_T_2436, 0, 0) @[el2_ifu_mem_ctl.scala 564:117] + node _T_2438 = eq(io.ifu_fetch_val, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 565:31] + node _T_2439 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_mem_ctl.scala 565:56] + node _T_2440 = and(_T_2439, two_byte_instr) @[el2_ifu_mem_ctl.scala 565:59] + node _T_2441 = or(_T_2438, _T_2440) @[el2_ifu_mem_ctl.scala 565:38] + node _T_2442 = bits(_T_2441, 0, 0) @[el2_ifu_mem_ctl.scala 565:83] + node _T_2443 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_mem_ctl.scala 566:31] + node _T_2444 = bits(_T_2443, 0, 0) @[el2_ifu_mem_ctl.scala 566:41] + node _T_2445 = mux(_T_2444, UInt<2>("h02"), UInt<2>("h01")) @[el2_ifu_mem_ctl.scala 566:14] + node _T_2446 = mux(_T_2442, UInt<2>("h03"), _T_2445) @[el2_ifu_mem_ctl.scala 565:12] + node _T_2447 = mux(_T_2437, UInt<2>("h00"), _T_2446) @[el2_ifu_mem_ctl.scala 564:31] + err_stop_nxtstate <= _T_2447 @[el2_ifu_mem_ctl.scala 564:25] + node _T_2448 = or(io.dec_tlu_flush_lower_wb, io.dec_tlu_i0_commit_cmt) @[el2_ifu_mem_ctl.scala 567:54] + node _T_2449 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_mem_ctl.scala 567:99] + node _T_2450 = or(_T_2448, _T_2449) @[el2_ifu_mem_ctl.scala 567:81] + node _T_2451 = or(_T_2450, ifu_bp_hit_taken_q_f) @[el2_ifu_mem_ctl.scala 567:103] + node _T_2452 = or(_T_2451, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 567:126] + err_stop_state_en <= _T_2452 @[el2_ifu_mem_ctl.scala 567:25] + node _T_2453 = bits(io.ifu_fetch_val, 1, 0) @[el2_ifu_mem_ctl.scala 568:43] + node _T_2454 = eq(_T_2453, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 568:48] + node _T_2455 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_mem_ctl.scala 568:75] + node _T_2456 = and(_T_2455, two_byte_instr) @[el2_ifu_mem_ctl.scala 568:79] + node _T_2457 = or(_T_2454, _T_2456) @[el2_ifu_mem_ctl.scala 568:56] + node _T_2458 = or(io.exu_flush_final, io.dec_tlu_i0_commit_cmt) @[el2_ifu_mem_ctl.scala 568:122] + node _T_2459 = eq(_T_2458, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 568:101] + node _T_2460 = and(_T_2457, _T_2459) @[el2_ifu_mem_ctl.scala 568:99] + err_stop_fetch <= _T_2460 @[el2_ifu_mem_ctl.scala 568:22] + iccm_correction_state <= UInt<1>("h01") @[el2_ifu_mem_ctl.scala 569:29] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_2461 = eq(UInt<2>("h02"), err_stop_state) @[Conditional.scala 37:30] + when _T_2461 : @[Conditional.scala 39:67] + node _T_2462 = or(io.dec_tlu_flush_lower_wb, io.dec_tlu_i0_commit_cmt) @[el2_ifu_mem_ctl.scala 572:59] + node _T_2463 = or(_T_2462, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 572:86] + node _T_2464 = bits(_T_2463, 0, 0) @[el2_ifu_mem_ctl.scala 572:111] + node _T_2465 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_mem_ctl.scala 573:46] + node _T_2466 = bits(_T_2465, 0, 0) @[el2_ifu_mem_ctl.scala 573:50] + node _T_2467 = mux(_T_2466, UInt<2>("h03"), UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 573:29] + node _T_2468 = mux(_T_2464, UInt<2>("h00"), _T_2467) @[el2_ifu_mem_ctl.scala 572:31] + err_stop_nxtstate <= _T_2468 @[el2_ifu_mem_ctl.scala 572:25] + node _T_2469 = or(io.dec_tlu_flush_lower_wb, io.dec_tlu_i0_commit_cmt) @[el2_ifu_mem_ctl.scala 574:54] + node _T_2470 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_mem_ctl.scala 574:99] + node _T_2471 = or(_T_2469, _T_2470) @[el2_ifu_mem_ctl.scala 574:81] + node _T_2472 = or(_T_2471, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 574:103] + err_stop_state_en <= _T_2472 @[el2_ifu_mem_ctl.scala 574:25] + node _T_2473 = bits(io.ifu_fetch_val, 0, 0) @[el2_ifu_mem_ctl.scala 575:41] + node _T_2474 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 575:47] + node _T_2475 = and(_T_2473, _T_2474) @[el2_ifu_mem_ctl.scala 575:45] + node _T_2476 = eq(io.dec_tlu_i0_commit_cmt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 575:69] + node _T_2477 = and(_T_2475, _T_2476) @[el2_ifu_mem_ctl.scala 575:67] + err_stop_fetch <= _T_2477 @[el2_ifu_mem_ctl.scala 575:22] + iccm_correction_state <= UInt<1>("h01") @[el2_ifu_mem_ctl.scala 576:29] + skip @[Conditional.scala 39:67] + else : @[Conditional.scala 39:67] + node _T_2478 = eq(UInt<2>("h03"), err_stop_state) @[Conditional.scala 37:30] + when _T_2478 : @[Conditional.scala 39:67] + node _T_2479 = eq(io.dec_tlu_flush_err_wb, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 579:62] + node _T_2480 = and(io.dec_tlu_flush_lower_wb, _T_2479) @[el2_ifu_mem_ctl.scala 579:60] + node _T_2481 = or(_T_2480, io.dec_tlu_i0_commit_cmt) @[el2_ifu_mem_ctl.scala 579:88] + node _T_2482 = or(_T_2481, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 579:115] + node _T_2483 = bits(_T_2482, 0, 0) @[el2_ifu_mem_ctl.scala 579:140] + node _T_2484 = bits(io.dec_tlu_flush_err_wb, 0, 0) @[el2_ifu_mem_ctl.scala 580:60] + node _T_2485 = mux(_T_2484, UInt<2>("h01"), UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 580:29] + node _T_2486 = mux(_T_2483, UInt<2>("h00"), _T_2485) @[el2_ifu_mem_ctl.scala 579:31] + err_stop_nxtstate <= _T_2486 @[el2_ifu_mem_ctl.scala 579:25] + node _T_2487 = or(io.dec_tlu_flush_lower_wb, io.dec_tlu_i0_commit_cmt) @[el2_ifu_mem_ctl.scala 581:54] + node _T_2488 = or(_T_2487, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 581:81] + err_stop_state_en <= _T_2488 @[el2_ifu_mem_ctl.scala 581:25] + err_stop_fetch <= UInt<1>("h01") @[el2_ifu_mem_ctl.scala 582:22] + iccm_correction_state <= UInt<1>("h01") @[el2_ifu_mem_ctl.scala 583:29] + skip @[Conditional.scala 39:67] + reg _T_2489 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when err_stop_state_en : @[Reg.scala 28:19] + _T_2489 <= err_stop_nxtstate @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + err_stop_state <= _T_2489 @[el2_ifu_mem_ctl.scala 586:18] + bus_ifu_bus_clk_en <= io.ifu_bus_clk_en @[el2_ifu_mem_ctl.scala 587:22] + reg bus_ifu_bus_clk_en_ff : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 588:61] + bus_ifu_bus_clk_en_ff <= bus_ifu_bus_clk_en @[el2_ifu_mem_ctl.scala 588:61] + reg _T_2490 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 589:52] + _T_2490 <= scnd_miss_req_in @[el2_ifu_mem_ctl.scala 589:52] + scnd_miss_req_q <= _T_2490 @[el2_ifu_mem_ctl.scala 589:19] + reg scnd_miss_req_ff2 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 590:57] + scnd_miss_req_ff2 <= scnd_miss_req @[el2_ifu_mem_ctl.scala 590:57] + wire bus_cmd_req_hold : UInt<1> + bus_cmd_req_hold <= UInt<1>("h00") + wire ifu_bus_cmd_valid : UInt<1> + ifu_bus_cmd_valid <= UInt<1>("h00") + wire bus_cmd_beat_count : UInt<3> + bus_cmd_beat_count <= UInt<1>("h00") + wire ifu_bus_cmd_ready : UInt<1> + ifu_bus_cmd_ready <= UInt<1>("h00") + node _T_2491 = or(ic_act_miss_f, bus_cmd_req_hold) @[el2_ifu_mem_ctl.scala 595:45] + node _T_2492 = or(_T_2491, ifu_bus_cmd_valid) @[el2_ifu_mem_ctl.scala 595:64] + node _T_2493 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 595:87] + node _T_2494 = and(_T_2492, _T_2493) @[el2_ifu_mem_ctl.scala 595:85] + node _T_2495 = mux(UInt<1>("h01"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_2496 = eq(bus_cmd_beat_count, _T_2495) @[el2_ifu_mem_ctl.scala 595:133] + node _T_2497 = and(_T_2496, ifu_bus_cmd_valid) @[el2_ifu_mem_ctl.scala 595:164] + node _T_2498 = and(_T_2497, ifu_bus_cmd_ready) @[el2_ifu_mem_ctl.scala 595:184] + node _T_2499 = and(_T_2498, miss_pending) @[el2_ifu_mem_ctl.scala 595:204] + node _T_2500 = eq(_T_2499, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 595:112] + node ifc_bus_ic_req_ff_in = and(_T_2494, _T_2500) @[el2_ifu_mem_ctl.scala 595:110] + node _T_2501 = or(bus_ifu_bus_clk_en, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 596:80] + reg _T_2502 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_2501 : @[Reg.scala 28:19] + _T_2502 <= ifc_bus_ic_req_ff_in @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ifu_bus_cmd_valid <= _T_2502 @[el2_ifu_mem_ctl.scala 596:21] + wire bus_cmd_sent : UInt<1> + bus_cmd_sent <= UInt<1>("h00") + node _T_2503 = or(ic_act_miss_f, bus_cmd_req_hold) @[el2_ifu_mem_ctl.scala 598:39] + node _T_2504 = eq(bus_cmd_sent, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 598:61] + node _T_2505 = and(_T_2503, _T_2504) @[el2_ifu_mem_ctl.scala 598:59] + node _T_2506 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 598:77] + node bus_cmd_req_in = and(_T_2505, _T_2506) @[el2_ifu_mem_ctl.scala 598:75] + reg _T_2507 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 599:49] + _T_2507 <= bus_cmd_req_in @[el2_ifu_mem_ctl.scala 599:49] + bus_cmd_sent <= _T_2507 @[el2_ifu_mem_ctl.scala 599:16] + io.ifu_axi_arvalid <= ifu_bus_cmd_valid @[el2_ifu_mem_ctl.scala 601:22] + node _T_2508 = bits(ifu_bus_cmd_valid, 0, 0) @[Bitwise.scala 72:15] + node _T_2509 = mux(_T_2508, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_2510 = and(bus_rd_addr_count, _T_2509) @[el2_ifu_mem_ctl.scala 602:40] + io.ifu_axi_arid <= _T_2510 @[el2_ifu_mem_ctl.scala 602:19] + node _T_2511 = cat(ifu_ic_req_addr_f, UInt<3>("h00")) @[Cat.scala 29:58] + node _T_2512 = bits(ifu_bus_cmd_valid, 0, 0) @[Bitwise.scala 72:15] + node _T_2513 = mux(_T_2512, UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12] + node _T_2514 = and(_T_2511, _T_2513) @[el2_ifu_mem_ctl.scala 603:57] + io.ifu_axi_araddr <= _T_2514 @[el2_ifu_mem_ctl.scala 603:21] + io.ifu_axi_arsize <= UInt<3>("h03") @[el2_ifu_mem_ctl.scala 604:21] + io.ifu_axi_arcache <= UInt<4>("h0f") @[el2_ifu_mem_ctl.scala 605:22] + node _T_2515 = bits(ifu_ic_req_addr_f, 28, 25) @[el2_ifu_mem_ctl.scala 606:43] + io.ifu_axi_arregion <= _T_2515 @[el2_ifu_mem_ctl.scala 606:23] + io.ifu_axi_arburst <= UInt<1>("h01") @[el2_ifu_mem_ctl.scala 607:22] + io.ifu_axi_rready <= UInt<1>("h01") @[el2_ifu_mem_ctl.scala 608:21] + reg ifu_bus_arready_unq_ff : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when bus_ifu_bus_clk_en : @[Reg.scala 28:19] + ifu_bus_arready_unq_ff <= io.ifu_axi_arready @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg ifu_bus_rvalid_unq_ff : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when bus_ifu_bus_clk_en : @[Reg.scala 28:19] + ifu_bus_rvalid_unq_ff <= io.ifu_axi_rvalid @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg ifu_bus_arvalid_ff : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when bus_ifu_bus_clk_en : @[Reg.scala 28:19] + ifu_bus_arvalid_ff <= io.ifu_axi_arvalid @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg ifu_bus_rresp_ff : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when bus_ifu_bus_clk_en : @[Reg.scala 28:19] + ifu_bus_rresp_ff <= io.ifu_axi_rresp @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + reg _T_2516 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when bus_ifu_bus_clk_en : @[Reg.scala 28:19] + _T_2516 <= io.ifu_axi_rdata @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ifu_bus_rdata_ff <= _T_2516 @[el2_ifu_mem_ctl.scala 618:20] + reg _T_2517 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when bus_ifu_bus_clk_en : @[Reg.scala 28:19] + _T_2517 <= io.ifu_axi_rid @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + ifu_bus_rid_ff <= _T_2517 @[el2_ifu_mem_ctl.scala 619:18] + ifu_bus_cmd_ready <= io.ifu_axi_arready @[el2_ifu_mem_ctl.scala 620:21] + ifu_bus_rsp_valid <= io.ifu_axi_rvalid @[el2_ifu_mem_ctl.scala 621:21] + ifu_bus_rsp_ready <= io.ifu_axi_rready @[el2_ifu_mem_ctl.scala 622:21] + ifu_bus_rsp_tag <= io.ifu_axi_rid @[el2_ifu_mem_ctl.scala 623:19] + ic_miss_buff_data_in <= io.ifu_axi_rdata @[el2_ifu_mem_ctl.scala 624:21] + node ifu_bus_rvalid = and(ifu_bus_rsp_valid, bus_ifu_bus_clk_en) @[el2_ifu_mem_ctl.scala 626:42] + node ifu_bus_arready = and(io.ifu_axi_arready, bus_ifu_bus_clk_en) @[el2_ifu_mem_ctl.scala 627:45] + node ifu_bus_arready_ff = and(ifu_bus_arready_unq_ff, bus_ifu_bus_clk_en_ff) @[el2_ifu_mem_ctl.scala 628:51] + node ifu_bus_rvalid_ff = and(ifu_bus_rvalid_unq_ff, bus_ifu_bus_clk_en_ff) @[el2_ifu_mem_ctl.scala 629:49] + node _T_2518 = and(io.ifu_axi_arvalid, ifu_bus_arready) @[el2_ifu_mem_ctl.scala 630:35] + node _T_2519 = and(_T_2518, miss_pending) @[el2_ifu_mem_ctl.scala 630:53] + node _T_2520 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 630:70] + node _T_2521 = and(_T_2519, _T_2520) @[el2_ifu_mem_ctl.scala 630:68] + bus_cmd_sent <= _T_2521 @[el2_ifu_mem_ctl.scala 630:16] + wire bus_last_data_beat : UInt<1> + bus_last_data_beat <= UInt<1>("h00") + node _T_2522 = eq(bus_last_data_beat, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 632:50] + node _T_2523 = and(bus_ifu_wr_en_ff, _T_2522) @[el2_ifu_mem_ctl.scala 632:48] + node _T_2524 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 632:72] + node bus_inc_data_beat_cnt = and(_T_2523, _T_2524) @[el2_ifu_mem_ctl.scala 632:70] + node _T_2525 = and(bus_ifu_wr_en_ff, bus_last_data_beat) @[el2_ifu_mem_ctl.scala 633:68] + node _T_2526 = or(ic_act_miss_f, _T_2525) @[el2_ifu_mem_ctl.scala 633:48] + node bus_reset_data_beat_cnt = or(_T_2526, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 633:91] + node _T_2527 = eq(bus_inc_data_beat_cnt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 634:32] + node _T_2528 = eq(bus_reset_data_beat_cnt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 634:57] + node bus_hold_data_beat_cnt = and(_T_2527, _T_2528) @[el2_ifu_mem_ctl.scala 634:55] + wire bus_data_beat_count : UInt<3> + bus_data_beat_count <= UInt<1>("h00") + node _T_2529 = add(bus_data_beat_count, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 636:115] + node _T_2530 = tail(_T_2529, 1) @[el2_ifu_mem_ctl.scala 636:115] + node _T_2531 = mux(bus_reset_data_beat_cnt, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2532 = mux(bus_inc_data_beat_cnt, _T_2530, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2533 = mux(bus_hold_data_beat_cnt, bus_data_beat_count, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2534 = or(_T_2531, _T_2532) @[Mux.scala 27:72] + node _T_2535 = or(_T_2534, _T_2533) @[Mux.scala 27:72] + wire _T_2536 : UInt<3> @[Mux.scala 27:72] + _T_2536 <= _T_2535 @[Mux.scala 27:72] + bus_new_data_beat_count <= _T_2536 @[el2_ifu_mem_ctl.scala 636:27] + reg _T_2537 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 637:56] + _T_2537 <= bus_new_data_beat_count @[el2_ifu_mem_ctl.scala 637:56] + bus_data_beat_count <= _T_2537 @[el2_ifu_mem_ctl.scala 637:23] + node _T_2538 = and(bus_ifu_wr_en_ff, bus_last_data_beat) @[el2_ifu_mem_ctl.scala 638:49] + node _T_2539 = eq(scnd_miss_req, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 638:73] + node _T_2540 = and(_T_2538, _T_2539) @[el2_ifu_mem_ctl.scala 638:71] + node _T_2541 = eq(ic_act_miss_f, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 638:116] + node _T_2542 = and(last_data_recieved_ff, _T_2541) @[el2_ifu_mem_ctl.scala 638:114] + node last_data_recieved_in = or(_T_2540, _T_2542) @[el2_ifu_mem_ctl.scala 638:89] + reg _T_2543 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 639:58] + _T_2543 <= last_data_recieved_in @[el2_ifu_mem_ctl.scala 639:58] + last_data_recieved_ff <= _T_2543 @[el2_ifu_mem_ctl.scala 639:25] + node _T_2544 = eq(miss_pending, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 641:35] + node _T_2545 = bits(imb_ff, 4, 2) @[el2_ifu_mem_ctl.scala 641:56] + node _T_2546 = bits(imb_scnd_ff, 4, 2) @[el2_ifu_mem_ctl.scala 642:39] + node _T_2547 = add(bus_rd_addr_count, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 643:45] + node _T_2548 = tail(_T_2547, 1) @[el2_ifu_mem_ctl.scala 643:45] + node _T_2549 = mux(bus_cmd_sent, _T_2548, bus_rd_addr_count) @[el2_ifu_mem_ctl.scala 643:12] + node _T_2550 = mux(scnd_miss_req_q, _T_2546, _T_2549) @[el2_ifu_mem_ctl.scala 642:10] + node bus_new_rd_addr_count = mux(_T_2544, _T_2545, _T_2550) @[el2_ifu_mem_ctl.scala 641:34] + node _T_2551 = or(bus_ifu_bus_clk_en, ic_act_miss_f) @[el2_ifu_mem_ctl.scala 644:81] + node _T_2552 = or(_T_2551, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 644:97] + reg _T_2553 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_2552 : @[Reg.scala 28:19] + _T_2553 <= bus_new_rd_addr_count @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + bus_rd_addr_count <= _T_2553 @[el2_ifu_mem_ctl.scala 644:21] + node _T_2554 = and(ifu_bus_cmd_valid, ifu_bus_cmd_ready) @[el2_ifu_mem_ctl.scala 646:48] + node _T_2555 = and(_T_2554, miss_pending) @[el2_ifu_mem_ctl.scala 646:68] + node _T_2556 = eq(io.dec_tlu_force_halt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 646:85] + node bus_inc_cmd_beat_cnt = and(_T_2555, _T_2556) @[el2_ifu_mem_ctl.scala 646:83] + node _T_2557 = eq(uncacheable_miss_in, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 647:51] + node _T_2558 = and(ic_act_miss_f, _T_2557) @[el2_ifu_mem_ctl.scala 647:49] + node bus_reset_cmd_beat_cnt_0 = or(_T_2558, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 647:73] + node bus_reset_cmd_beat_cnt_secondlast = and(ic_act_miss_f, uncacheable_miss_in) @[el2_ifu_mem_ctl.scala 648:57] + node _T_2559 = eq(bus_inc_cmd_beat_cnt, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 649:31] + node _T_2560 = or(ic_act_miss_f, scnd_miss_req) @[el2_ifu_mem_ctl.scala 649:71] + node _T_2561 = or(_T_2560, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 649:87] + node _T_2562 = eq(_T_2561, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 649:55] + node bus_hold_cmd_beat_cnt = and(_T_2559, _T_2562) @[el2_ifu_mem_ctl.scala 649:53] + node _T_2563 = or(bus_inc_cmd_beat_cnt, ic_act_miss_f) @[el2_ifu_mem_ctl.scala 650:46] + node bus_cmd_beat_en = or(_T_2563, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 650:62] + node _T_2564 = bits(bus_reset_cmd_beat_cnt_secondlast, 0, 0) @[el2_ifu_mem_ctl.scala 651:107] + node _T_2565 = add(bus_cmd_beat_count, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 652:46] + node _T_2566 = tail(_T_2565, 1) @[el2_ifu_mem_ctl.scala 652:46] + node _T_2567 = mux(bus_reset_cmd_beat_cnt_0, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2568 = mux(_T_2564, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2569 = mux(bus_inc_cmd_beat_cnt, _T_2566, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2570 = mux(bus_hold_cmd_beat_cnt, bus_cmd_beat_count, UInt<1>("h00")) @[Mux.scala 27:72] + node _T_2571 = or(_T_2567, _T_2568) @[Mux.scala 27:72] + node _T_2572 = or(_T_2571, _T_2569) @[Mux.scala 27:72] + node _T_2573 = or(_T_2572, _T_2570) @[Mux.scala 27:72] + wire bus_new_cmd_beat_count : UInt<3> @[Mux.scala 27:72] + bus_new_cmd_beat_count <= _T_2573 @[Mux.scala 27:72] + node _T_2574 = or(bus_ifu_bus_clk_en, ic_act_miss_f) @[el2_ifu_mem_ctl.scala 653:84] + node _T_2575 = or(_T_2574, io.dec_tlu_force_halt) @[el2_ifu_mem_ctl.scala 653:100] + node _T_2576 = and(_T_2575, bus_cmd_beat_en) @[el2_ifu_mem_ctl.scala 653:125] + reg _T_2577 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] + when _T_2576 : @[Reg.scala 28:19] + _T_2577 <= bus_new_cmd_beat_count @[Reg.scala 28:23] + skip @[Reg.scala 28:19] + bus_cmd_beat_count <= _T_2577 @[el2_ifu_mem_ctl.scala 653:22] + node _T_2578 = eq(bus_data_beat_count, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 654:69] + node _T_2579 = andr(bus_data_beat_count) @[el2_ifu_mem_ctl.scala 654:101] + node _T_2580 = mux(uncacheable_miss_ff, _T_2578, _T_2579) @[el2_ifu_mem_ctl.scala 654:28] + bus_last_data_beat <= _T_2580 @[el2_ifu_mem_ctl.scala 654:22] + node _T_2581 = and(ifu_bus_rvalid, miss_pending) @[el2_ifu_mem_ctl.scala 655:35] + bus_ifu_wr_en <= _T_2581 @[el2_ifu_mem_ctl.scala 655:17] + node _T_2582 = and(ifu_bus_rvalid_ff, miss_pending) @[el2_ifu_mem_ctl.scala 656:41] + bus_ifu_wr_en_ff <= _T_2582 @[el2_ifu_mem_ctl.scala 656:20] + node _T_2583 = and(ifu_bus_rvalid_ff, miss_pending) @[el2_ifu_mem_ctl.scala 657:44] + node _T_2584 = eq(uncacheable_miss_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 657:61] + node _T_2585 = and(_T_2583, _T_2584) @[el2_ifu_mem_ctl.scala 657:59] + node _T_2586 = orr(ifu_bus_rresp_ff) @[el2_ifu_mem_ctl.scala 657:103] + node _T_2587 = eq(_T_2586, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 657:84] + node _T_2588 = and(_T_2585, _T_2587) @[el2_ifu_mem_ctl.scala 657:82] + node _T_2589 = and(_T_2588, write_ic_16_bytes) @[el2_ifu_mem_ctl.scala 657:108] + bus_ifu_wr_en_ff_q <= _T_2589 @[el2_ifu_mem_ctl.scala 657:22] + node _T_2590 = and(ifu_bus_rvalid_ff, miss_pending) @[el2_ifu_mem_ctl.scala 658:51] + node _T_2591 = eq(uncacheable_miss_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 658:68] + node bus_ifu_wr_en_ff_wo_err = and(_T_2590, _T_2591) @[el2_ifu_mem_ctl.scala 658:66] + reg ic_act_miss_f_delayed : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 659:61] + ic_act_miss_f_delayed <= ic_act_miss_f @[el2_ifu_mem_ctl.scala 659:61] + node _T_2592 = eq(miss_state, UInt<3>("h01")) @[el2_ifu_mem_ctl.scala 660:66] + node _T_2593 = and(ic_act_miss_f_delayed, _T_2592) @[el2_ifu_mem_ctl.scala 660:53] + node _T_2594 = eq(uncacheable_miss_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 660:86] + node _T_2595 = and(_T_2593, _T_2594) @[el2_ifu_mem_ctl.scala 660:84] + reset_tag_valid_for_miss <= _T_2595 @[el2_ifu_mem_ctl.scala 660:28] + node _T_2596 = orr(io.ifu_axi_rresp) @[el2_ifu_mem_ctl.scala 661:47] + node _T_2597 = and(_T_2596, ifu_bus_rvalid) @[el2_ifu_mem_ctl.scala 661:50] + node _T_2598 = and(_T_2597, miss_pending) @[el2_ifu_mem_ctl.scala 661:68] + bus_ifu_wr_data_error <= _T_2598 @[el2_ifu_mem_ctl.scala 661:25] + node _T_2599 = orr(ifu_bus_rresp_ff) @[el2_ifu_mem_ctl.scala 662:48] + node _T_2600 = and(_T_2599, ifu_bus_rvalid_ff) @[el2_ifu_mem_ctl.scala 662:52] + node _T_2601 = and(_T_2600, miss_pending) @[el2_ifu_mem_ctl.scala 662:73] + bus_ifu_wr_data_error_ff <= _T_2601 @[el2_ifu_mem_ctl.scala 662:28] + wire ifc_dma_access_ok_d : UInt<1> + ifc_dma_access_ok_d <= UInt<1>("h00") + reg ifc_dma_access_ok_prev : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 664:62] + ifc_dma_access_ok_prev <= ifc_dma_access_ok_d @[el2_ifu_mem_ctl.scala 664:62] + node _T_2602 = or(ic_crit_wd_rdy_new_in, ic_crit_wd_rdy_new_ff) @[el2_ifu_mem_ctl.scala 665:43] + ic_crit_wd_rdy <= _T_2602 @[el2_ifu_mem_ctl.scala 665:18] + node _T_2603 = and(bus_last_data_beat, bus_ifu_wr_en_ff) @[el2_ifu_mem_ctl.scala 666:35] + last_beat <= _T_2603 @[el2_ifu_mem_ctl.scala 666:13] + reset_beat_cnt <= bus_reset_data_beat_cnt @[el2_ifu_mem_ctl.scala 667:18] + node _T_2604 = eq(iccm_correct_ecc, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 669:50] + node _T_2605 = and(io.ifc_dma_access_ok, _T_2604) @[el2_ifu_mem_ctl.scala 669:47] + node _T_2606 = eq(io.iccm_dma_sb_error, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 669:70] + node _T_2607 = and(_T_2605, _T_2606) @[el2_ifu_mem_ctl.scala 669:68] + ifc_dma_access_ok_d <= _T_2607 @[el2_ifu_mem_ctl.scala 669:23] + node _T_2608 = eq(iccm_correct_ecc, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 670:54] + node _T_2609 = and(io.ifc_dma_access_ok, _T_2608) @[el2_ifu_mem_ctl.scala 670:51] + node _T_2610 = and(_T_2609, ifc_dma_access_ok_prev) @[el2_ifu_mem_ctl.scala 670:72] + node _T_2611 = eq(perr_state, UInt<3>("h00")) @[el2_ifu_mem_ctl.scala 670:111] + node _T_2612 = and(_T_2610, _T_2611) @[el2_ifu_mem_ctl.scala 670:97] + node _T_2613 = eq(io.iccm_dma_sb_error, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 670:129] + node iccm_ready = and(_T_2612, _T_2613) @[el2_ifu_mem_ctl.scala 670:127] + reg _T_2614 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 672:51] + _T_2614 <= io.dma_iccm_req @[el2_ifu_mem_ctl.scala 672:51] + dma_iccm_req_f <= _T_2614 @[el2_ifu_mem_ctl.scala 672:18] + node _T_2615 = and(iccm_ready, io.dma_iccm_req) @[el2_ifu_mem_ctl.scala 673:40] + node _T_2616 = and(_T_2615, io.dma_mem_write) @[el2_ifu_mem_ctl.scala 673:58] + node _T_2617 = or(_T_2616, iccm_correct_ecc) @[el2_ifu_mem_ctl.scala 673:79] + io.iccm_wren <= _T_2617 @[el2_ifu_mem_ctl.scala 673:16] + node _T_2618 = and(iccm_ready, io.dma_iccm_req) @[el2_ifu_mem_ctl.scala 674:40] + node _T_2619 = eq(io.dma_mem_write, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 674:60] + node _T_2620 = and(_T_2618, _T_2619) @[el2_ifu_mem_ctl.scala 674:58] + node _T_2621 = and(io.ifc_iccm_access_bf, io.ifc_fetch_req_bf) @[el2_ifu_mem_ctl.scala 674:104] + node _T_2622 = or(_T_2620, _T_2621) @[el2_ifu_mem_ctl.scala 674:79] + io.iccm_rden <= _T_2622 @[el2_ifu_mem_ctl.scala 674:16] + node _T_2623 = and(iccm_ready, io.dma_iccm_req) @[el2_ifu_mem_ctl.scala 675:43] + node _T_2624 = eq(io.dma_mem_write, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 675:63] + node iccm_dma_rden = and(_T_2623, _T_2624) @[el2_ifu_mem_ctl.scala 675:61] + node _T_2625 = bits(io.dma_iccm_req, 0, 0) @[Bitwise.scala 72:15] + node _T_2626 = mux(_T_2625, UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12] + node _T_2627 = and(_T_2626, io.dma_mem_sz) @[el2_ifu_mem_ctl.scala 676:47] + io.iccm_wr_size <= _T_2627 @[el2_ifu_mem_ctl.scala 676:19] + node _T_2628 = bits(io.dma_mem_wdata, 63, 32) @[el2_ifu_mem_ctl.scala 677:54] + wire _T_2629 : UInt<1>[18] @[el2_lib.scala 245:18] + wire _T_2630 : UInt<1>[18] @[el2_lib.scala 246:18] + wire _T_2631 : UInt<1>[18] @[el2_lib.scala 247:18] + wire _T_2632 : UInt<1>[15] @[el2_lib.scala 248:18] + wire _T_2633 : UInt<1>[15] @[el2_lib.scala 249:18] + wire _T_2634 : UInt<1>[6] @[el2_lib.scala 250:18] + node _T_2635 = bits(_T_2628, 0, 0) @[el2_lib.scala 257:36] + _T_2630[0] <= _T_2635 @[el2_lib.scala 257:30] + node _T_2636 = bits(_T_2628, 0, 0) @[el2_lib.scala 258:36] + _T_2631[0] <= _T_2636 @[el2_lib.scala 258:30] + node _T_2637 = bits(_T_2628, 0, 0) @[el2_lib.scala 261:36] + _T_2634[0] <= _T_2637 @[el2_lib.scala 261:30] + node _T_2638 = bits(_T_2628, 1, 1) @[el2_lib.scala 256:36] + _T_2629[0] <= _T_2638 @[el2_lib.scala 256:30] + node _T_2639 = bits(_T_2628, 1, 1) @[el2_lib.scala 258:36] + _T_2631[1] <= _T_2639 @[el2_lib.scala 258:30] + node _T_2640 = bits(_T_2628, 1, 1) @[el2_lib.scala 261:36] + _T_2634[1] <= _T_2640 @[el2_lib.scala 261:30] + node _T_2641 = bits(_T_2628, 2, 2) @[el2_lib.scala 258:36] + _T_2631[2] <= _T_2641 @[el2_lib.scala 258:30] + node _T_2642 = bits(_T_2628, 2, 2) @[el2_lib.scala 261:36] + _T_2634[2] <= _T_2642 @[el2_lib.scala 261:30] + node _T_2643 = bits(_T_2628, 3, 3) @[el2_lib.scala 256:36] + _T_2629[1] <= _T_2643 @[el2_lib.scala 256:30] + node _T_2644 = bits(_T_2628, 3, 3) @[el2_lib.scala 257:36] + _T_2630[1] <= _T_2644 @[el2_lib.scala 257:30] + node _T_2645 = bits(_T_2628, 3, 3) @[el2_lib.scala 261:36] + _T_2634[3] <= _T_2645 @[el2_lib.scala 261:30] + node _T_2646 = bits(_T_2628, 4, 4) @[el2_lib.scala 257:36] + _T_2630[2] <= _T_2646 @[el2_lib.scala 257:30] + node _T_2647 = bits(_T_2628, 4, 4) @[el2_lib.scala 261:36] + _T_2634[4] <= _T_2647 @[el2_lib.scala 261:30] + node _T_2648 = bits(_T_2628, 5, 5) @[el2_lib.scala 256:36] + _T_2629[2] <= _T_2648 @[el2_lib.scala 256:30] + node _T_2649 = bits(_T_2628, 5, 5) @[el2_lib.scala 261:36] + _T_2634[5] <= _T_2649 @[el2_lib.scala 261:30] + node _T_2650 = bits(_T_2628, 6, 6) @[el2_lib.scala 256:36] + _T_2629[3] <= _T_2650 @[el2_lib.scala 256:30] + node _T_2651 = bits(_T_2628, 6, 6) @[el2_lib.scala 257:36] + _T_2630[3] <= _T_2651 @[el2_lib.scala 257:30] + node _T_2652 = bits(_T_2628, 6, 6) @[el2_lib.scala 258:36] + _T_2631[3] <= _T_2652 @[el2_lib.scala 258:30] + node _T_2653 = bits(_T_2628, 6, 6) @[el2_lib.scala 259:36] + _T_2632[0] <= _T_2653 @[el2_lib.scala 259:30] + node _T_2654 = bits(_T_2628, 6, 6) @[el2_lib.scala 260:36] + _T_2633[0] <= _T_2654 @[el2_lib.scala 260:30] + node _T_2655 = bits(_T_2628, 7, 7) @[el2_lib.scala 257:36] + _T_2630[4] <= _T_2655 @[el2_lib.scala 257:30] + node _T_2656 = bits(_T_2628, 7, 7) @[el2_lib.scala 258:36] + _T_2631[4] <= _T_2656 @[el2_lib.scala 258:30] + node _T_2657 = bits(_T_2628, 7, 7) @[el2_lib.scala 259:36] + _T_2632[1] <= _T_2657 @[el2_lib.scala 259:30] + node _T_2658 = bits(_T_2628, 7, 7) @[el2_lib.scala 260:36] + _T_2633[1] <= _T_2658 @[el2_lib.scala 260:30] + node _T_2659 = bits(_T_2628, 8, 8) @[el2_lib.scala 256:36] + _T_2629[4] <= _T_2659 @[el2_lib.scala 256:30] + node _T_2660 = bits(_T_2628, 8, 8) @[el2_lib.scala 258:36] + _T_2631[5] <= _T_2660 @[el2_lib.scala 258:30] + node _T_2661 = bits(_T_2628, 8, 8) @[el2_lib.scala 259:36] + _T_2632[2] <= _T_2661 @[el2_lib.scala 259:30] + node _T_2662 = bits(_T_2628, 8, 8) @[el2_lib.scala 260:36] + _T_2633[2] <= _T_2662 @[el2_lib.scala 260:30] + node _T_2663 = bits(_T_2628, 9, 9) @[el2_lib.scala 258:36] + _T_2631[6] <= _T_2663 @[el2_lib.scala 258:30] + node _T_2664 = bits(_T_2628, 9, 9) @[el2_lib.scala 259:36] + _T_2632[3] <= _T_2664 @[el2_lib.scala 259:30] + node _T_2665 = bits(_T_2628, 9, 9) @[el2_lib.scala 260:36] + _T_2633[3] <= _T_2665 @[el2_lib.scala 260:30] + node _T_2666 = bits(_T_2628, 10, 10) @[el2_lib.scala 256:36] + _T_2629[5] <= _T_2666 @[el2_lib.scala 256:30] + node _T_2667 = bits(_T_2628, 10, 10) @[el2_lib.scala 257:36] + _T_2630[5] <= _T_2667 @[el2_lib.scala 257:30] + node _T_2668 = bits(_T_2628, 10, 10) @[el2_lib.scala 259:36] + _T_2632[4] <= _T_2668 @[el2_lib.scala 259:30] + node _T_2669 = bits(_T_2628, 10, 10) @[el2_lib.scala 260:36] + _T_2633[4] <= _T_2669 @[el2_lib.scala 260:30] + node _T_2670 = bits(_T_2628, 11, 11) @[el2_lib.scala 257:36] + _T_2630[6] <= _T_2670 @[el2_lib.scala 257:30] + node _T_2671 = bits(_T_2628, 11, 11) @[el2_lib.scala 259:36] + _T_2632[5] <= _T_2671 @[el2_lib.scala 259:30] + node _T_2672 = bits(_T_2628, 11, 11) @[el2_lib.scala 260:36] + _T_2633[5] <= _T_2672 @[el2_lib.scala 260:30] + node _T_2673 = bits(_T_2628, 12, 12) @[el2_lib.scala 256:36] + _T_2629[6] <= _T_2673 @[el2_lib.scala 256:30] + node _T_2674 = bits(_T_2628, 12, 12) @[el2_lib.scala 259:36] + _T_2632[6] <= _T_2674 @[el2_lib.scala 259:30] + node _T_2675 = bits(_T_2628, 12, 12) @[el2_lib.scala 260:36] + _T_2633[6] <= _T_2675 @[el2_lib.scala 260:30] + node _T_2676 = bits(_T_2628, 13, 13) @[el2_lib.scala 259:36] + _T_2632[7] <= _T_2676 @[el2_lib.scala 259:30] + node _T_2677 = bits(_T_2628, 13, 13) @[el2_lib.scala 260:36] + _T_2633[7] <= _T_2677 @[el2_lib.scala 260:30] + node _T_2678 = bits(_T_2628, 14, 14) @[el2_lib.scala 256:36] + _T_2629[7] <= _T_2678 @[el2_lib.scala 256:30] + node _T_2679 = bits(_T_2628, 14, 14) @[el2_lib.scala 257:36] + _T_2630[7] <= _T_2679 @[el2_lib.scala 257:30] + node _T_2680 = bits(_T_2628, 14, 14) @[el2_lib.scala 258:36] + _T_2631[7] <= _T_2680 @[el2_lib.scala 258:30] + node _T_2681 = bits(_T_2628, 14, 14) @[el2_lib.scala 260:36] + _T_2633[8] <= _T_2681 @[el2_lib.scala 260:30] + node _T_2682 = bits(_T_2628, 15, 15) @[el2_lib.scala 257:36] + _T_2630[8] <= _T_2682 @[el2_lib.scala 257:30] + node _T_2683 = bits(_T_2628, 15, 15) @[el2_lib.scala 258:36] + _T_2631[8] <= _T_2683 @[el2_lib.scala 258:30] + node _T_2684 = bits(_T_2628, 15, 15) @[el2_lib.scala 260:36] + _T_2633[9] <= _T_2684 @[el2_lib.scala 260:30] + node _T_2685 = bits(_T_2628, 16, 16) @[el2_lib.scala 256:36] + _T_2629[8] <= _T_2685 @[el2_lib.scala 256:30] + node _T_2686 = bits(_T_2628, 16, 16) @[el2_lib.scala 258:36] + _T_2631[9] <= _T_2686 @[el2_lib.scala 258:30] + node _T_2687 = bits(_T_2628, 16, 16) @[el2_lib.scala 260:36] + _T_2633[10] <= _T_2687 @[el2_lib.scala 260:30] + node _T_2688 = bits(_T_2628, 17, 17) @[el2_lib.scala 258:36] + _T_2631[10] <= _T_2688 @[el2_lib.scala 258:30] + node _T_2689 = bits(_T_2628, 17, 17) @[el2_lib.scala 260:36] + _T_2633[11] <= _T_2689 @[el2_lib.scala 260:30] + node _T_2690 = bits(_T_2628, 18, 18) @[el2_lib.scala 256:36] + _T_2629[9] <= _T_2690 @[el2_lib.scala 256:30] + node _T_2691 = bits(_T_2628, 18, 18) @[el2_lib.scala 257:36] + _T_2630[9] <= _T_2691 @[el2_lib.scala 257:30] + node _T_2692 = bits(_T_2628, 18, 18) @[el2_lib.scala 260:36] + _T_2633[12] <= _T_2692 @[el2_lib.scala 260:30] + node _T_2693 = bits(_T_2628, 19, 19) @[el2_lib.scala 257:36] + _T_2630[10] <= _T_2693 @[el2_lib.scala 257:30] + node _T_2694 = bits(_T_2628, 19, 19) @[el2_lib.scala 260:36] + _T_2633[13] <= _T_2694 @[el2_lib.scala 260:30] + node _T_2695 = bits(_T_2628, 20, 20) @[el2_lib.scala 256:36] + _T_2629[10] <= _T_2695 @[el2_lib.scala 256:30] + node _T_2696 = bits(_T_2628, 20, 20) @[el2_lib.scala 260:36] + _T_2633[14] <= _T_2696 @[el2_lib.scala 260:30] + node _T_2697 = bits(_T_2628, 21, 21) @[el2_lib.scala 256:36] + _T_2629[11] <= _T_2697 @[el2_lib.scala 256:30] + node _T_2698 = bits(_T_2628, 21, 21) @[el2_lib.scala 257:36] + _T_2630[11] <= _T_2698 @[el2_lib.scala 257:30] + node _T_2699 = bits(_T_2628, 21, 21) @[el2_lib.scala 258:36] + _T_2631[11] <= _T_2699 @[el2_lib.scala 258:30] + node _T_2700 = bits(_T_2628, 21, 21) @[el2_lib.scala 259:36] + _T_2632[8] <= _T_2700 @[el2_lib.scala 259:30] + node _T_2701 = bits(_T_2628, 22, 22) @[el2_lib.scala 257:36] + _T_2630[12] <= _T_2701 @[el2_lib.scala 257:30] + node _T_2702 = bits(_T_2628, 22, 22) @[el2_lib.scala 258:36] + _T_2631[12] <= _T_2702 @[el2_lib.scala 258:30] + node _T_2703 = bits(_T_2628, 22, 22) @[el2_lib.scala 259:36] + _T_2632[9] <= _T_2703 @[el2_lib.scala 259:30] + node _T_2704 = bits(_T_2628, 23, 23) @[el2_lib.scala 256:36] + _T_2629[12] <= _T_2704 @[el2_lib.scala 256:30] + node _T_2705 = bits(_T_2628, 23, 23) @[el2_lib.scala 258:36] + _T_2631[13] <= _T_2705 @[el2_lib.scala 258:30] + node _T_2706 = bits(_T_2628, 23, 23) @[el2_lib.scala 259:36] + _T_2632[10] <= _T_2706 @[el2_lib.scala 259:30] + node _T_2707 = bits(_T_2628, 24, 24) @[el2_lib.scala 258:36] + _T_2631[14] <= _T_2707 @[el2_lib.scala 258:30] + node _T_2708 = bits(_T_2628, 24, 24) @[el2_lib.scala 259:36] + _T_2632[11] <= _T_2708 @[el2_lib.scala 259:30] + node _T_2709 = bits(_T_2628, 25, 25) @[el2_lib.scala 256:36] + _T_2629[13] <= _T_2709 @[el2_lib.scala 256:30] + node _T_2710 = bits(_T_2628, 25, 25) @[el2_lib.scala 257:36] + _T_2630[13] <= _T_2710 @[el2_lib.scala 257:30] + node _T_2711 = bits(_T_2628, 25, 25) @[el2_lib.scala 259:36] + _T_2632[12] <= _T_2711 @[el2_lib.scala 259:30] + node _T_2712 = bits(_T_2628, 26, 26) @[el2_lib.scala 257:36] + _T_2630[14] <= _T_2712 @[el2_lib.scala 257:30] + node _T_2713 = bits(_T_2628, 26, 26) @[el2_lib.scala 259:36] + _T_2632[13] <= _T_2713 @[el2_lib.scala 259:30] + node _T_2714 = bits(_T_2628, 27, 27) @[el2_lib.scala 256:36] + _T_2629[14] <= _T_2714 @[el2_lib.scala 256:30] + node _T_2715 = bits(_T_2628, 27, 27) @[el2_lib.scala 259:36] + _T_2632[14] <= _T_2715 @[el2_lib.scala 259:30] + node _T_2716 = bits(_T_2628, 28, 28) @[el2_lib.scala 256:36] + _T_2629[15] <= _T_2716 @[el2_lib.scala 256:30] + node _T_2717 = bits(_T_2628, 28, 28) @[el2_lib.scala 257:36] + _T_2630[15] <= _T_2717 @[el2_lib.scala 257:30] + node _T_2718 = bits(_T_2628, 28, 28) @[el2_lib.scala 258:36] + _T_2631[15] <= _T_2718 @[el2_lib.scala 258:30] + node _T_2719 = bits(_T_2628, 29, 29) @[el2_lib.scala 257:36] + _T_2630[16] <= _T_2719 @[el2_lib.scala 257:30] + node _T_2720 = bits(_T_2628, 29, 29) @[el2_lib.scala 258:36] + _T_2631[16] <= _T_2720 @[el2_lib.scala 258:30] + node _T_2721 = bits(_T_2628, 30, 30) @[el2_lib.scala 256:36] + _T_2629[16] <= _T_2721 @[el2_lib.scala 256:30] + node _T_2722 = bits(_T_2628, 30, 30) @[el2_lib.scala 258:36] + _T_2631[17] <= _T_2722 @[el2_lib.scala 258:30] + node _T_2723 = bits(_T_2628, 31, 31) @[el2_lib.scala 256:36] + _T_2629[17] <= _T_2723 @[el2_lib.scala 256:30] + node _T_2724 = bits(_T_2628, 31, 31) @[el2_lib.scala 257:36] + _T_2630[17] <= _T_2724 @[el2_lib.scala 257:30] + node _T_2725 = cat(_T_2629[1], _T_2629[0]) @[el2_lib.scala 263:22] + node _T_2726 = cat(_T_2629[3], _T_2629[2]) @[el2_lib.scala 263:22] + node _T_2727 = cat(_T_2726, _T_2725) @[el2_lib.scala 263:22] + node _T_2728 = cat(_T_2629[5], _T_2629[4]) @[el2_lib.scala 263:22] + node _T_2729 = cat(_T_2629[8], _T_2629[7]) @[el2_lib.scala 263:22] + node _T_2730 = cat(_T_2729, _T_2629[6]) @[el2_lib.scala 263:22] + node _T_2731 = cat(_T_2730, _T_2728) @[el2_lib.scala 263:22] + node _T_2732 = cat(_T_2731, _T_2727) @[el2_lib.scala 263:22] + node _T_2733 = cat(_T_2629[10], _T_2629[9]) @[el2_lib.scala 263:22] + node _T_2734 = cat(_T_2629[12], _T_2629[11]) @[el2_lib.scala 263:22] + node _T_2735 = cat(_T_2734, _T_2733) @[el2_lib.scala 263:22] + node _T_2736 = cat(_T_2629[14], _T_2629[13]) @[el2_lib.scala 263:22] + node _T_2737 = cat(_T_2629[17], _T_2629[16]) @[el2_lib.scala 263:22] + node _T_2738 = cat(_T_2737, _T_2629[15]) @[el2_lib.scala 263:22] + node _T_2739 = cat(_T_2738, _T_2736) @[el2_lib.scala 263:22] + node _T_2740 = cat(_T_2739, _T_2735) @[el2_lib.scala 263:22] + node _T_2741 = cat(_T_2740, _T_2732) @[el2_lib.scala 263:22] + node _T_2742 = xorr(_T_2741) @[el2_lib.scala 263:29] + node _T_2743 = cat(_T_2630[1], _T_2630[0]) @[el2_lib.scala 263:39] + node _T_2744 = cat(_T_2630[3], _T_2630[2]) @[el2_lib.scala 263:39] + node _T_2745 = cat(_T_2744, _T_2743) @[el2_lib.scala 263:39] + node _T_2746 = cat(_T_2630[5], _T_2630[4]) @[el2_lib.scala 263:39] + node _T_2747 = cat(_T_2630[8], _T_2630[7]) @[el2_lib.scala 263:39] + node _T_2748 = cat(_T_2747, _T_2630[6]) @[el2_lib.scala 263:39] + node _T_2749 = cat(_T_2748, _T_2746) @[el2_lib.scala 263:39] + node _T_2750 = cat(_T_2749, _T_2745) @[el2_lib.scala 263:39] + node _T_2751 = cat(_T_2630[10], _T_2630[9]) @[el2_lib.scala 263:39] + node _T_2752 = cat(_T_2630[12], _T_2630[11]) @[el2_lib.scala 263:39] + node _T_2753 = cat(_T_2752, _T_2751) @[el2_lib.scala 263:39] + node _T_2754 = cat(_T_2630[14], _T_2630[13]) @[el2_lib.scala 263:39] + node _T_2755 = cat(_T_2630[17], _T_2630[16]) @[el2_lib.scala 263:39] + node _T_2756 = cat(_T_2755, _T_2630[15]) @[el2_lib.scala 263:39] + node _T_2757 = cat(_T_2756, _T_2754) @[el2_lib.scala 263:39] + node _T_2758 = cat(_T_2757, _T_2753) @[el2_lib.scala 263:39] + node _T_2759 = cat(_T_2758, _T_2750) @[el2_lib.scala 263:39] + node _T_2760 = xorr(_T_2759) @[el2_lib.scala 263:46] + node _T_2761 = cat(_T_2631[1], _T_2631[0]) @[el2_lib.scala 263:56] + node _T_2762 = cat(_T_2631[3], _T_2631[2]) @[el2_lib.scala 263:56] + node _T_2763 = cat(_T_2762, _T_2761) @[el2_lib.scala 263:56] + node _T_2764 = cat(_T_2631[5], _T_2631[4]) @[el2_lib.scala 263:56] + node _T_2765 = cat(_T_2631[8], _T_2631[7]) @[el2_lib.scala 263:56] + node _T_2766 = cat(_T_2765, _T_2631[6]) @[el2_lib.scala 263:56] + node _T_2767 = cat(_T_2766, _T_2764) @[el2_lib.scala 263:56] + node _T_2768 = cat(_T_2767, _T_2763) @[el2_lib.scala 263:56] + node _T_2769 = cat(_T_2631[10], _T_2631[9]) @[el2_lib.scala 263:56] + node _T_2770 = cat(_T_2631[12], _T_2631[11]) @[el2_lib.scala 263:56] + node _T_2771 = cat(_T_2770, _T_2769) @[el2_lib.scala 263:56] + node _T_2772 = cat(_T_2631[14], _T_2631[13]) @[el2_lib.scala 263:56] + node _T_2773 = cat(_T_2631[17], _T_2631[16]) @[el2_lib.scala 263:56] + node _T_2774 = cat(_T_2773, _T_2631[15]) @[el2_lib.scala 263:56] + node _T_2775 = cat(_T_2774, _T_2772) @[el2_lib.scala 263:56] + node _T_2776 = cat(_T_2775, _T_2771) @[el2_lib.scala 263:56] + node _T_2777 = cat(_T_2776, _T_2768) @[el2_lib.scala 263:56] + node _T_2778 = xorr(_T_2777) @[el2_lib.scala 263:63] + node _T_2779 = cat(_T_2632[2], _T_2632[1]) @[el2_lib.scala 263:73] + node _T_2780 = cat(_T_2779, _T_2632[0]) @[el2_lib.scala 263:73] + node _T_2781 = cat(_T_2632[4], _T_2632[3]) @[el2_lib.scala 263:73] + node _T_2782 = cat(_T_2632[6], _T_2632[5]) @[el2_lib.scala 263:73] + node _T_2783 = cat(_T_2782, _T_2781) @[el2_lib.scala 263:73] + node _T_2784 = cat(_T_2783, _T_2780) @[el2_lib.scala 263:73] + node _T_2785 = cat(_T_2632[8], _T_2632[7]) @[el2_lib.scala 263:73] + node _T_2786 = cat(_T_2632[10], _T_2632[9]) @[el2_lib.scala 263:73] + node _T_2787 = cat(_T_2786, _T_2785) @[el2_lib.scala 263:73] + node _T_2788 = cat(_T_2632[12], _T_2632[11]) @[el2_lib.scala 263:73] + node _T_2789 = cat(_T_2632[14], _T_2632[13]) @[el2_lib.scala 263:73] + node _T_2790 = cat(_T_2789, _T_2788) @[el2_lib.scala 263:73] + node _T_2791 = cat(_T_2790, _T_2787) @[el2_lib.scala 263:73] + node _T_2792 = cat(_T_2791, _T_2784) @[el2_lib.scala 263:73] + node _T_2793 = xorr(_T_2792) @[el2_lib.scala 263:80] + node _T_2794 = cat(_T_2633[2], _T_2633[1]) @[el2_lib.scala 263:90] + node _T_2795 = cat(_T_2794, _T_2633[0]) @[el2_lib.scala 263:90] + node _T_2796 = cat(_T_2633[4], _T_2633[3]) @[el2_lib.scala 263:90] + node _T_2797 = cat(_T_2633[6], _T_2633[5]) @[el2_lib.scala 263:90] + node _T_2798 = cat(_T_2797, _T_2796) @[el2_lib.scala 263:90] + node _T_2799 = cat(_T_2798, _T_2795) @[el2_lib.scala 263:90] + node _T_2800 = cat(_T_2633[8], _T_2633[7]) @[el2_lib.scala 263:90] + node _T_2801 = cat(_T_2633[10], _T_2633[9]) @[el2_lib.scala 263:90] + node _T_2802 = cat(_T_2801, _T_2800) @[el2_lib.scala 263:90] + node _T_2803 = cat(_T_2633[12], _T_2633[11]) @[el2_lib.scala 263:90] + node _T_2804 = cat(_T_2633[14], _T_2633[13]) @[el2_lib.scala 263:90] + node _T_2805 = cat(_T_2804, _T_2803) @[el2_lib.scala 263:90] + node _T_2806 = cat(_T_2805, _T_2802) @[el2_lib.scala 263:90] + node _T_2807 = cat(_T_2806, _T_2799) @[el2_lib.scala 263:90] + node _T_2808 = xorr(_T_2807) @[el2_lib.scala 263:97] + node _T_2809 = cat(_T_2634[2], _T_2634[1]) @[el2_lib.scala 263:107] + node _T_2810 = cat(_T_2809, _T_2634[0]) @[el2_lib.scala 263:107] + node _T_2811 = cat(_T_2634[5], _T_2634[4]) @[el2_lib.scala 263:107] + node _T_2812 = cat(_T_2811, _T_2634[3]) @[el2_lib.scala 263:107] + node _T_2813 = cat(_T_2812, _T_2810) @[el2_lib.scala 263:107] + node _T_2814 = xorr(_T_2813) @[el2_lib.scala 263:114] + node _T_2815 = cat(_T_2793, _T_2808) @[Cat.scala 29:58] + node _T_2816 = cat(_T_2815, _T_2814) @[Cat.scala 29:58] + node _T_2817 = cat(_T_2742, _T_2760) @[Cat.scala 29:58] + node _T_2818 = cat(_T_2817, _T_2778) @[Cat.scala 29:58] + node _T_2819 = cat(_T_2818, _T_2816) @[Cat.scala 29:58] + node _T_2820 = xorr(_T_2628) @[el2_lib.scala 264:13] + node _T_2821 = xorr(_T_2819) @[el2_lib.scala 264:23] + node _T_2822 = xor(_T_2820, _T_2821) @[el2_lib.scala 264:18] + node _T_2823 = cat(_T_2822, _T_2819) @[Cat.scala 29:58] + node _T_2824 = bits(io.dma_mem_wdata, 31, 0) @[el2_ifu_mem_ctl.scala 677:93] + wire _T_2825 : UInt<1>[18] @[el2_lib.scala 245:18] + wire _T_2826 : UInt<1>[18] @[el2_lib.scala 246:18] + wire _T_2827 : UInt<1>[18] @[el2_lib.scala 247:18] + wire _T_2828 : UInt<1>[15] @[el2_lib.scala 248:18] + wire _T_2829 : UInt<1>[15] @[el2_lib.scala 249:18] + wire _T_2830 : UInt<1>[6] @[el2_lib.scala 250:18] + node _T_2831 = bits(_T_2824, 0, 0) @[el2_lib.scala 257:36] + _T_2826[0] <= _T_2831 @[el2_lib.scala 257:30] + node _T_2832 = bits(_T_2824, 0, 0) @[el2_lib.scala 258:36] + _T_2827[0] <= _T_2832 @[el2_lib.scala 258:30] + node _T_2833 = bits(_T_2824, 0, 0) @[el2_lib.scala 261:36] + _T_2830[0] <= _T_2833 @[el2_lib.scala 261:30] + node _T_2834 = bits(_T_2824, 1, 1) @[el2_lib.scala 256:36] + _T_2825[0] <= _T_2834 @[el2_lib.scala 256:30] + node _T_2835 = bits(_T_2824, 1, 1) @[el2_lib.scala 258:36] + _T_2827[1] <= _T_2835 @[el2_lib.scala 258:30] + node _T_2836 = bits(_T_2824, 1, 1) @[el2_lib.scala 261:36] + _T_2830[1] <= _T_2836 @[el2_lib.scala 261:30] + node _T_2837 = bits(_T_2824, 2, 2) @[el2_lib.scala 258:36] + _T_2827[2] <= _T_2837 @[el2_lib.scala 258:30] + node _T_2838 = bits(_T_2824, 2, 2) @[el2_lib.scala 261:36] + _T_2830[2] <= _T_2838 @[el2_lib.scala 261:30] + node _T_2839 = bits(_T_2824, 3, 3) @[el2_lib.scala 256:36] + _T_2825[1] <= _T_2839 @[el2_lib.scala 256:30] + node _T_2840 = bits(_T_2824, 3, 3) @[el2_lib.scala 257:36] + _T_2826[1] <= _T_2840 @[el2_lib.scala 257:30] + node _T_2841 = bits(_T_2824, 3, 3) @[el2_lib.scala 261:36] + _T_2830[3] <= _T_2841 @[el2_lib.scala 261:30] + node _T_2842 = bits(_T_2824, 4, 4) @[el2_lib.scala 257:36] + _T_2826[2] <= _T_2842 @[el2_lib.scala 257:30] + node _T_2843 = bits(_T_2824, 4, 4) @[el2_lib.scala 261:36] + _T_2830[4] <= _T_2843 @[el2_lib.scala 261:30] + node _T_2844 = bits(_T_2824, 5, 5) @[el2_lib.scala 256:36] + _T_2825[2] <= _T_2844 @[el2_lib.scala 256:30] + node _T_2845 = bits(_T_2824, 5, 5) @[el2_lib.scala 261:36] + _T_2830[5] <= _T_2845 @[el2_lib.scala 261:30] + node _T_2846 = bits(_T_2824, 6, 6) @[el2_lib.scala 256:36] + _T_2825[3] <= _T_2846 @[el2_lib.scala 256:30] + node _T_2847 = bits(_T_2824, 6, 6) @[el2_lib.scala 257:36] + _T_2826[3] <= _T_2847 @[el2_lib.scala 257:30] + node _T_2848 = bits(_T_2824, 6, 6) @[el2_lib.scala 258:36] + _T_2827[3] <= _T_2848 @[el2_lib.scala 258:30] + node _T_2849 = bits(_T_2824, 6, 6) @[el2_lib.scala 259:36] + _T_2828[0] <= _T_2849 @[el2_lib.scala 259:30] + node _T_2850 = bits(_T_2824, 6, 6) @[el2_lib.scala 260:36] + _T_2829[0] <= _T_2850 @[el2_lib.scala 260:30] + node _T_2851 = bits(_T_2824, 7, 7) @[el2_lib.scala 257:36] + _T_2826[4] <= _T_2851 @[el2_lib.scala 257:30] + node _T_2852 = bits(_T_2824, 7, 7) @[el2_lib.scala 258:36] + _T_2827[4] <= _T_2852 @[el2_lib.scala 258:30] + node _T_2853 = bits(_T_2824, 7, 7) @[el2_lib.scala 259:36] + _T_2828[1] <= _T_2853 @[el2_lib.scala 259:30] + node _T_2854 = bits(_T_2824, 7, 7) @[el2_lib.scala 260:36] + _T_2829[1] <= _T_2854 @[el2_lib.scala 260:30] + node _T_2855 = bits(_T_2824, 8, 8) @[el2_lib.scala 256:36] + _T_2825[4] <= _T_2855 @[el2_lib.scala 256:30] + node _T_2856 = bits(_T_2824, 8, 8) @[el2_lib.scala 258:36] + _T_2827[5] <= _T_2856 @[el2_lib.scala 258:30] + node _T_2857 = bits(_T_2824, 8, 8) @[el2_lib.scala 259:36] + _T_2828[2] <= _T_2857 @[el2_lib.scala 259:30] + node _T_2858 = bits(_T_2824, 8, 8) @[el2_lib.scala 260:36] + _T_2829[2] <= _T_2858 @[el2_lib.scala 260:30] + node _T_2859 = bits(_T_2824, 9, 9) @[el2_lib.scala 258:36] + _T_2827[6] <= _T_2859 @[el2_lib.scala 258:30] + node _T_2860 = bits(_T_2824, 9, 9) @[el2_lib.scala 259:36] + _T_2828[3] <= _T_2860 @[el2_lib.scala 259:30] + node _T_2861 = bits(_T_2824, 9, 9) @[el2_lib.scala 260:36] + _T_2829[3] <= _T_2861 @[el2_lib.scala 260:30] + node _T_2862 = bits(_T_2824, 10, 10) @[el2_lib.scala 256:36] + _T_2825[5] <= _T_2862 @[el2_lib.scala 256:30] + node _T_2863 = bits(_T_2824, 10, 10) @[el2_lib.scala 257:36] + _T_2826[5] <= _T_2863 @[el2_lib.scala 257:30] + node _T_2864 = bits(_T_2824, 10, 10) @[el2_lib.scala 259:36] + _T_2828[4] <= _T_2864 @[el2_lib.scala 259:30] + node _T_2865 = bits(_T_2824, 10, 10) @[el2_lib.scala 260:36] + _T_2829[4] <= _T_2865 @[el2_lib.scala 260:30] + node _T_2866 = bits(_T_2824, 11, 11) @[el2_lib.scala 257:36] + _T_2826[6] <= _T_2866 @[el2_lib.scala 257:30] + node _T_2867 = bits(_T_2824, 11, 11) @[el2_lib.scala 259:36] + _T_2828[5] <= _T_2867 @[el2_lib.scala 259:30] + node _T_2868 = bits(_T_2824, 11, 11) @[el2_lib.scala 260:36] + _T_2829[5] <= _T_2868 @[el2_lib.scala 260:30] + node _T_2869 = bits(_T_2824, 12, 12) @[el2_lib.scala 256:36] + _T_2825[6] <= _T_2869 @[el2_lib.scala 256:30] + node _T_2870 = bits(_T_2824, 12, 12) @[el2_lib.scala 259:36] + _T_2828[6] <= _T_2870 @[el2_lib.scala 259:30] + node _T_2871 = bits(_T_2824, 12, 12) @[el2_lib.scala 260:36] + _T_2829[6] <= _T_2871 @[el2_lib.scala 260:30] + node _T_2872 = bits(_T_2824, 13, 13) @[el2_lib.scala 259:36] + _T_2828[7] <= _T_2872 @[el2_lib.scala 259:30] + node _T_2873 = bits(_T_2824, 13, 13) @[el2_lib.scala 260:36] + _T_2829[7] <= _T_2873 @[el2_lib.scala 260:30] + node _T_2874 = bits(_T_2824, 14, 14) @[el2_lib.scala 256:36] + _T_2825[7] <= _T_2874 @[el2_lib.scala 256:30] + node _T_2875 = bits(_T_2824, 14, 14) @[el2_lib.scala 257:36] + _T_2826[7] <= _T_2875 @[el2_lib.scala 257:30] + node _T_2876 = bits(_T_2824, 14, 14) @[el2_lib.scala 258:36] + _T_2827[7] <= _T_2876 @[el2_lib.scala 258:30] + node _T_2877 = bits(_T_2824, 14, 14) @[el2_lib.scala 260:36] + _T_2829[8] <= _T_2877 @[el2_lib.scala 260:30] + node _T_2878 = bits(_T_2824, 15, 15) @[el2_lib.scala 257:36] + _T_2826[8] <= _T_2878 @[el2_lib.scala 257:30] + node _T_2879 = bits(_T_2824, 15, 15) @[el2_lib.scala 258:36] + _T_2827[8] <= _T_2879 @[el2_lib.scala 258:30] + node _T_2880 = bits(_T_2824, 15, 15) @[el2_lib.scala 260:36] + _T_2829[9] <= _T_2880 @[el2_lib.scala 260:30] + node _T_2881 = bits(_T_2824, 16, 16) @[el2_lib.scala 256:36] + _T_2825[8] <= _T_2881 @[el2_lib.scala 256:30] + node _T_2882 = bits(_T_2824, 16, 16) @[el2_lib.scala 258:36] + _T_2827[9] <= _T_2882 @[el2_lib.scala 258:30] + node _T_2883 = bits(_T_2824, 16, 16) @[el2_lib.scala 260:36] + _T_2829[10] <= _T_2883 @[el2_lib.scala 260:30] + node _T_2884 = bits(_T_2824, 17, 17) @[el2_lib.scala 258:36] + _T_2827[10] <= _T_2884 @[el2_lib.scala 258:30] + node _T_2885 = bits(_T_2824, 17, 17) @[el2_lib.scala 260:36] + _T_2829[11] <= _T_2885 @[el2_lib.scala 260:30] + node _T_2886 = bits(_T_2824, 18, 18) @[el2_lib.scala 256:36] + _T_2825[9] <= _T_2886 @[el2_lib.scala 256:30] + node _T_2887 = bits(_T_2824, 18, 18) @[el2_lib.scala 257:36] + _T_2826[9] <= _T_2887 @[el2_lib.scala 257:30] + node _T_2888 = bits(_T_2824, 18, 18) @[el2_lib.scala 260:36] + _T_2829[12] <= _T_2888 @[el2_lib.scala 260:30] + node _T_2889 = bits(_T_2824, 19, 19) @[el2_lib.scala 257:36] + _T_2826[10] <= _T_2889 @[el2_lib.scala 257:30] + node _T_2890 = bits(_T_2824, 19, 19) @[el2_lib.scala 260:36] + _T_2829[13] <= _T_2890 @[el2_lib.scala 260:30] + node _T_2891 = bits(_T_2824, 20, 20) @[el2_lib.scala 256:36] + _T_2825[10] <= _T_2891 @[el2_lib.scala 256:30] + node _T_2892 = bits(_T_2824, 20, 20) @[el2_lib.scala 260:36] + _T_2829[14] <= _T_2892 @[el2_lib.scala 260:30] + node _T_2893 = bits(_T_2824, 21, 21) @[el2_lib.scala 256:36] + _T_2825[11] <= _T_2893 @[el2_lib.scala 256:30] + node _T_2894 = bits(_T_2824, 21, 21) @[el2_lib.scala 257:36] + _T_2826[11] <= _T_2894 @[el2_lib.scala 257:30] + node _T_2895 = bits(_T_2824, 21, 21) @[el2_lib.scala 258:36] + _T_2827[11] <= _T_2895 @[el2_lib.scala 258:30] + node _T_2896 = bits(_T_2824, 21, 21) @[el2_lib.scala 259:36] + _T_2828[8] <= _T_2896 @[el2_lib.scala 259:30] + node _T_2897 = bits(_T_2824, 22, 22) @[el2_lib.scala 257:36] + _T_2826[12] <= _T_2897 @[el2_lib.scala 257:30] + node _T_2898 = bits(_T_2824, 22, 22) @[el2_lib.scala 258:36] + _T_2827[12] <= _T_2898 @[el2_lib.scala 258:30] + node _T_2899 = bits(_T_2824, 22, 22) @[el2_lib.scala 259:36] + _T_2828[9] <= _T_2899 @[el2_lib.scala 259:30] + node _T_2900 = bits(_T_2824, 23, 23) @[el2_lib.scala 256:36] + _T_2825[12] <= _T_2900 @[el2_lib.scala 256:30] + node _T_2901 = bits(_T_2824, 23, 23) @[el2_lib.scala 258:36] + _T_2827[13] <= _T_2901 @[el2_lib.scala 258:30] + node _T_2902 = bits(_T_2824, 23, 23) @[el2_lib.scala 259:36] + _T_2828[10] <= _T_2902 @[el2_lib.scala 259:30] + node _T_2903 = bits(_T_2824, 24, 24) @[el2_lib.scala 258:36] + _T_2827[14] <= _T_2903 @[el2_lib.scala 258:30] + node _T_2904 = bits(_T_2824, 24, 24) @[el2_lib.scala 259:36] + _T_2828[11] <= _T_2904 @[el2_lib.scala 259:30] + node _T_2905 = bits(_T_2824, 25, 25) @[el2_lib.scala 256:36] + _T_2825[13] <= _T_2905 @[el2_lib.scala 256:30] + node _T_2906 = bits(_T_2824, 25, 25) @[el2_lib.scala 257:36] + _T_2826[13] <= _T_2906 @[el2_lib.scala 257:30] + node _T_2907 = bits(_T_2824, 25, 25) @[el2_lib.scala 259:36] + _T_2828[12] <= _T_2907 @[el2_lib.scala 259:30] + node _T_2908 = bits(_T_2824, 26, 26) @[el2_lib.scala 257:36] + _T_2826[14] <= _T_2908 @[el2_lib.scala 257:30] + node _T_2909 = bits(_T_2824, 26, 26) @[el2_lib.scala 259:36] + _T_2828[13] <= _T_2909 @[el2_lib.scala 259:30] + node _T_2910 = bits(_T_2824, 27, 27) @[el2_lib.scala 256:36] + _T_2825[14] <= _T_2910 @[el2_lib.scala 256:30] + node _T_2911 = bits(_T_2824, 27, 27) @[el2_lib.scala 259:36] + _T_2828[14] <= _T_2911 @[el2_lib.scala 259:30] + node _T_2912 = bits(_T_2824, 28, 28) @[el2_lib.scala 256:36] + _T_2825[15] <= _T_2912 @[el2_lib.scala 256:30] + node _T_2913 = bits(_T_2824, 28, 28) @[el2_lib.scala 257:36] + _T_2826[15] <= _T_2913 @[el2_lib.scala 257:30] + node _T_2914 = bits(_T_2824, 28, 28) @[el2_lib.scala 258:36] + _T_2827[15] <= _T_2914 @[el2_lib.scala 258:30] + node _T_2915 = bits(_T_2824, 29, 29) @[el2_lib.scala 257:36] + _T_2826[16] <= _T_2915 @[el2_lib.scala 257:30] + node _T_2916 = bits(_T_2824, 29, 29) @[el2_lib.scala 258:36] + _T_2827[16] <= _T_2916 @[el2_lib.scala 258:30] + node _T_2917 = bits(_T_2824, 30, 30) @[el2_lib.scala 256:36] + _T_2825[16] <= _T_2917 @[el2_lib.scala 256:30] + node _T_2918 = bits(_T_2824, 30, 30) @[el2_lib.scala 258:36] + _T_2827[17] <= _T_2918 @[el2_lib.scala 258:30] + node _T_2919 = bits(_T_2824, 31, 31) @[el2_lib.scala 256:36] + _T_2825[17] <= _T_2919 @[el2_lib.scala 256:30] + node _T_2920 = bits(_T_2824, 31, 31) @[el2_lib.scala 257:36] + _T_2826[17] <= _T_2920 @[el2_lib.scala 257:30] + node _T_2921 = cat(_T_2825[1], _T_2825[0]) @[el2_lib.scala 263:22] + node _T_2922 = cat(_T_2825[3], _T_2825[2]) @[el2_lib.scala 263:22] + node _T_2923 = cat(_T_2922, _T_2921) @[el2_lib.scala 263:22] + node _T_2924 = cat(_T_2825[5], _T_2825[4]) @[el2_lib.scala 263:22] + node _T_2925 = cat(_T_2825[8], _T_2825[7]) @[el2_lib.scala 263:22] + node _T_2926 = cat(_T_2925, _T_2825[6]) @[el2_lib.scala 263:22] + node _T_2927 = cat(_T_2926, _T_2924) @[el2_lib.scala 263:22] + node _T_2928 = cat(_T_2927, _T_2923) @[el2_lib.scala 263:22] + node _T_2929 = cat(_T_2825[10], _T_2825[9]) @[el2_lib.scala 263:22] + node _T_2930 = cat(_T_2825[12], _T_2825[11]) @[el2_lib.scala 263:22] + node _T_2931 = cat(_T_2930, _T_2929) @[el2_lib.scala 263:22] + node _T_2932 = cat(_T_2825[14], _T_2825[13]) @[el2_lib.scala 263:22] + node _T_2933 = cat(_T_2825[17], _T_2825[16]) @[el2_lib.scala 263:22] + node _T_2934 = cat(_T_2933, _T_2825[15]) @[el2_lib.scala 263:22] + node _T_2935 = cat(_T_2934, _T_2932) @[el2_lib.scala 263:22] + node _T_2936 = cat(_T_2935, _T_2931) @[el2_lib.scala 263:22] + node _T_2937 = cat(_T_2936, _T_2928) @[el2_lib.scala 263:22] + node _T_2938 = xorr(_T_2937) @[el2_lib.scala 263:29] + node _T_2939 = cat(_T_2826[1], _T_2826[0]) @[el2_lib.scala 263:39] + node _T_2940 = cat(_T_2826[3], _T_2826[2]) @[el2_lib.scala 263:39] + node _T_2941 = cat(_T_2940, _T_2939) @[el2_lib.scala 263:39] + node _T_2942 = cat(_T_2826[5], _T_2826[4]) @[el2_lib.scala 263:39] + node _T_2943 = cat(_T_2826[8], _T_2826[7]) @[el2_lib.scala 263:39] + node _T_2944 = cat(_T_2943, _T_2826[6]) @[el2_lib.scala 263:39] + node _T_2945 = cat(_T_2944, _T_2942) @[el2_lib.scala 263:39] + node _T_2946 = cat(_T_2945, _T_2941) @[el2_lib.scala 263:39] + node _T_2947 = cat(_T_2826[10], _T_2826[9]) @[el2_lib.scala 263:39] + node _T_2948 = cat(_T_2826[12], _T_2826[11]) @[el2_lib.scala 263:39] + node _T_2949 = cat(_T_2948, _T_2947) @[el2_lib.scala 263:39] + node _T_2950 = cat(_T_2826[14], _T_2826[13]) @[el2_lib.scala 263:39] + node _T_2951 = cat(_T_2826[17], _T_2826[16]) @[el2_lib.scala 263:39] + node _T_2952 = cat(_T_2951, _T_2826[15]) @[el2_lib.scala 263:39] + node _T_2953 = cat(_T_2952, _T_2950) @[el2_lib.scala 263:39] + node _T_2954 = cat(_T_2953, _T_2949) @[el2_lib.scala 263:39] + node _T_2955 = cat(_T_2954, _T_2946) @[el2_lib.scala 263:39] + node _T_2956 = xorr(_T_2955) @[el2_lib.scala 263:46] + node _T_2957 = cat(_T_2827[1], _T_2827[0]) @[el2_lib.scala 263:56] + node _T_2958 = cat(_T_2827[3], _T_2827[2]) @[el2_lib.scala 263:56] + node _T_2959 = cat(_T_2958, _T_2957) @[el2_lib.scala 263:56] + node _T_2960 = cat(_T_2827[5], _T_2827[4]) @[el2_lib.scala 263:56] + node _T_2961 = cat(_T_2827[8], _T_2827[7]) @[el2_lib.scala 263:56] + node _T_2962 = cat(_T_2961, _T_2827[6]) @[el2_lib.scala 263:56] + node _T_2963 = cat(_T_2962, _T_2960) @[el2_lib.scala 263:56] + node _T_2964 = cat(_T_2963, _T_2959) @[el2_lib.scala 263:56] + node _T_2965 = cat(_T_2827[10], _T_2827[9]) @[el2_lib.scala 263:56] + node _T_2966 = cat(_T_2827[12], _T_2827[11]) @[el2_lib.scala 263:56] + node _T_2967 = cat(_T_2966, _T_2965) @[el2_lib.scala 263:56] + node _T_2968 = cat(_T_2827[14], _T_2827[13]) @[el2_lib.scala 263:56] + node _T_2969 = cat(_T_2827[17], _T_2827[16]) @[el2_lib.scala 263:56] + node _T_2970 = cat(_T_2969, _T_2827[15]) @[el2_lib.scala 263:56] + node _T_2971 = cat(_T_2970, _T_2968) @[el2_lib.scala 263:56] + node _T_2972 = cat(_T_2971, _T_2967) @[el2_lib.scala 263:56] + node _T_2973 = cat(_T_2972, _T_2964) @[el2_lib.scala 263:56] + node _T_2974 = xorr(_T_2973) @[el2_lib.scala 263:63] + node _T_2975 = cat(_T_2828[2], _T_2828[1]) @[el2_lib.scala 263:73] + node _T_2976 = cat(_T_2975, _T_2828[0]) @[el2_lib.scala 263:73] + node _T_2977 = cat(_T_2828[4], _T_2828[3]) @[el2_lib.scala 263:73] + node _T_2978 = cat(_T_2828[6], _T_2828[5]) @[el2_lib.scala 263:73] + node _T_2979 = cat(_T_2978, _T_2977) @[el2_lib.scala 263:73] + node _T_2980 = cat(_T_2979, _T_2976) @[el2_lib.scala 263:73] + node _T_2981 = cat(_T_2828[8], _T_2828[7]) @[el2_lib.scala 263:73] + node _T_2982 = cat(_T_2828[10], _T_2828[9]) @[el2_lib.scala 263:73] + node _T_2983 = cat(_T_2982, _T_2981) @[el2_lib.scala 263:73] + node _T_2984 = cat(_T_2828[12], _T_2828[11]) @[el2_lib.scala 263:73] + node _T_2985 = cat(_T_2828[14], _T_2828[13]) @[el2_lib.scala 263:73] + node _T_2986 = cat(_T_2985, _T_2984) @[el2_lib.scala 263:73] + node _T_2987 = cat(_T_2986, _T_2983) @[el2_lib.scala 263:73] + node _T_2988 = cat(_T_2987, _T_2980) @[el2_lib.scala 263:73] + node _T_2989 = xorr(_T_2988) @[el2_lib.scala 263:80] + node _T_2990 = cat(_T_2829[2], _T_2829[1]) @[el2_lib.scala 263:90] + node _T_2991 = cat(_T_2990, _T_2829[0]) @[el2_lib.scala 263:90] + node _T_2992 = cat(_T_2829[4], _T_2829[3]) @[el2_lib.scala 263:90] + node _T_2993 = cat(_T_2829[6], _T_2829[5]) @[el2_lib.scala 263:90] + node _T_2994 = cat(_T_2993, _T_2992) @[el2_lib.scala 263:90] + node _T_2995 = cat(_T_2994, _T_2991) @[el2_lib.scala 263:90] + node _T_2996 = cat(_T_2829[8], _T_2829[7]) @[el2_lib.scala 263:90] + node _T_2997 = cat(_T_2829[10], _T_2829[9]) @[el2_lib.scala 263:90] + node _T_2998 = cat(_T_2997, _T_2996) @[el2_lib.scala 263:90] + node _T_2999 = cat(_T_2829[12], _T_2829[11]) @[el2_lib.scala 263:90] + node _T_3000 = cat(_T_2829[14], _T_2829[13]) @[el2_lib.scala 263:90] + node _T_3001 = cat(_T_3000, _T_2999) @[el2_lib.scala 263:90] + node _T_3002 = cat(_T_3001, _T_2998) @[el2_lib.scala 263:90] + node _T_3003 = cat(_T_3002, _T_2995) @[el2_lib.scala 263:90] + node _T_3004 = xorr(_T_3003) @[el2_lib.scala 263:97] + node _T_3005 = cat(_T_2830[2], _T_2830[1]) @[el2_lib.scala 263:107] + node _T_3006 = cat(_T_3005, _T_2830[0]) @[el2_lib.scala 263:107] + node _T_3007 = cat(_T_2830[5], _T_2830[4]) @[el2_lib.scala 263:107] + node _T_3008 = cat(_T_3007, _T_2830[3]) @[el2_lib.scala 263:107] + node _T_3009 = cat(_T_3008, _T_3006) @[el2_lib.scala 263:107] + node _T_3010 = xorr(_T_3009) @[el2_lib.scala 263:114] + node _T_3011 = cat(_T_2989, _T_3004) @[Cat.scala 29:58] + node _T_3012 = cat(_T_3011, _T_3010) @[Cat.scala 29:58] + node _T_3013 = cat(_T_2938, _T_2956) @[Cat.scala 29:58] + node _T_3014 = cat(_T_3013, _T_2974) @[Cat.scala 29:58] + node _T_3015 = cat(_T_3014, _T_3012) @[Cat.scala 29:58] + node _T_3016 = xorr(_T_2824) @[el2_lib.scala 264:13] + node _T_3017 = xorr(_T_3015) @[el2_lib.scala 264:23] + node _T_3018 = xor(_T_3016, _T_3017) @[el2_lib.scala 264:18] + node _T_3019 = cat(_T_3018, _T_3015) @[Cat.scala 29:58] + node dma_mem_ecc = cat(_T_2823, _T_3019) @[Cat.scala 29:58] + wire iccm_ecc_corr_data_ff : UInt<39> + iccm_ecc_corr_data_ff <= UInt<1>("h00") + node _T_3020 = and(iccm_ready, io.dma_iccm_req) @[el2_ifu_mem_ctl.scala 679:67] + node _T_3021 = eq(_T_3020, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 679:45] + node _T_3022 = and(iccm_correct_ecc, _T_3021) @[el2_ifu_mem_ctl.scala 679:43] + node _T_3023 = cat(iccm_ecc_corr_data_ff, iccm_ecc_corr_data_ff) @[Cat.scala 29:58] + node _T_3024 = bits(dma_mem_ecc, 13, 7) @[el2_ifu_mem_ctl.scala 680:20] + node _T_3025 = bits(io.dma_mem_wdata, 63, 32) @[el2_ifu_mem_ctl.scala 680:43] + node _T_3026 = bits(dma_mem_ecc, 6, 0) @[el2_ifu_mem_ctl.scala 680:63] + node _T_3027 = bits(io.dma_mem_wdata, 31, 0) @[el2_ifu_mem_ctl.scala 680:86] + node _T_3028 = cat(_T_3026, _T_3027) @[Cat.scala 29:58] + node _T_3029 = cat(_T_3024, _T_3025) @[Cat.scala 29:58] + node _T_3030 = cat(_T_3029, _T_3028) @[Cat.scala 29:58] + node _T_3031 = mux(_T_3022, _T_3023, _T_3030) @[el2_ifu_mem_ctl.scala 679:25] + io.iccm_wr_data <= _T_3031 @[el2_ifu_mem_ctl.scala 679:19] + wire iccm_corrected_data : UInt<32>[2] @[el2_ifu_mem_ctl.scala 681:33] + iccm_corrected_data[0] <= UInt<1>("h00") @[el2_ifu_mem_ctl.scala 682:26] + iccm_corrected_data[1] <= UInt<1>("h00") @[el2_ifu_mem_ctl.scala 683:26] + wire dma_mem_addr_ff : UInt<2> + dma_mem_addr_ff <= UInt<1>("h00") + node _T_3032 = bits(dma_mem_addr_ff, 0, 0) @[el2_ifu_mem_ctl.scala 685:51] + node _T_3033 = bits(_T_3032, 0, 0) @[el2_ifu_mem_ctl.scala 685:55] + node iccm_dma_rdata_1_muxed = mux(_T_3033, iccm_corrected_data[0], iccm_corrected_data[1]) @[el2_ifu_mem_ctl.scala 685:35] + wire iccm_double_ecc_error : UInt<2> + iccm_double_ecc_error <= UInt<1>("h00") + node iccm_dma_ecc_error_in = orr(iccm_double_ecc_error) @[el2_ifu_mem_ctl.scala 687:53] + node _T_3034 = cat(io.dma_mem_addr, io.dma_mem_addr) @[Cat.scala 29:58] + node _T_3035 = cat(iccm_dma_rdata_1_muxed, iccm_corrected_data[0]) @[Cat.scala 29:58] + node iccm_dma_rdata_in = mux(iccm_dma_ecc_error_in, _T_3034, _T_3035) @[el2_ifu_mem_ctl.scala 688:30] + reg dma_mem_tag_ff : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 689:54] + dma_mem_tag_ff <= io.dma_mem_tag @[el2_ifu_mem_ctl.scala 689:54] + reg iccm_dma_rtag : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 690:69] + iccm_dma_rtag <= dma_mem_tag_ff @[el2_ifu_mem_ctl.scala 690:69] + io.iccm_dma_rtag <= iccm_dma_rtag @[el2_ifu_mem_ctl.scala 691:20] + node _T_3036 = bits(io.dma_mem_addr, 3, 2) @[el2_ifu_mem_ctl.scala 693:69] + reg _T_3037 : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 693:53] + _T_3037 <= _T_3036 @[el2_ifu_mem_ctl.scala 693:53] + dma_mem_addr_ff <= _T_3037 @[el2_ifu_mem_ctl.scala 693:19] + reg iccm_dma_rvalid_in : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 694:59] + iccm_dma_rvalid_in <= iccm_dma_rden @[el2_ifu_mem_ctl.scala 694:59] + reg iccm_dma_rvalid : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 695:71] + iccm_dma_rvalid <= iccm_dma_rvalid_in @[el2_ifu_mem_ctl.scala 695:71] + io.iccm_dma_rvalid <= iccm_dma_rvalid @[el2_ifu_mem_ctl.scala 696:22] + reg iccm_dma_ecc_error : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 697:74] + iccm_dma_ecc_error <= iccm_dma_ecc_error_in @[el2_ifu_mem_ctl.scala 697:74] + io.iccm_dma_ecc_error <= iccm_dma_ecc_error_in @[el2_ifu_mem_ctl.scala 698:25] + reg iccm_dma_rdata : UInt, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_mem_ctl.scala 699:70] + iccm_dma_rdata <= iccm_dma_rdata_in @[el2_ifu_mem_ctl.scala 699:70] + io.iccm_dma_rdata <= iccm_dma_rdata @[el2_ifu_mem_ctl.scala 700:21] + wire iccm_ecc_corr_index_ff : UInt<14> + iccm_ecc_corr_index_ff <= UInt<1>("h00") + node _T_3038 = and(iccm_ready, io.dma_iccm_req) @[el2_ifu_mem_ctl.scala 702:46] + node _T_3039 = eq(iccm_correct_ecc, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 702:67] + node _T_3040 = and(_T_3038, _T_3039) @[el2_ifu_mem_ctl.scala 702:65] + node _T_3041 = and(iccm_ready, io.dma_iccm_req) @[el2_ifu_mem_ctl.scala 703:31] + node _T_3042 = eq(_T_3041, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 703:9] + node _T_3043 = and(_T_3042, iccm_correct_ecc) @[el2_ifu_mem_ctl.scala 703:50] + node _T_3044 = cat(iccm_ecc_corr_index_ff, UInt<1>("h00")) @[Cat.scala 29:58] + node _T_3045 = bits(io.ifc_fetch_addr_bf, 15, 0) @[el2_ifu_mem_ctl.scala 703:124] + node _T_3046 = mux(_T_3043, _T_3044, _T_3045) @[el2_ifu_mem_ctl.scala 703:8] + node _T_3047 = mux(_T_3040, io.dma_mem_addr, _T_3046) @[el2_ifu_mem_ctl.scala 702:25] + io.iccm_rw_addr <= _T_3047 @[el2_ifu_mem_ctl.scala 702:19] + node ic_fetch_val_int_f = cat(UInt<2>("h00"), io.ic_fetch_val_f) @[Cat.scala 29:58] + node _T_3048 = bits(ifu_fetch_addr_int_f, 0, 0) @[el2_ifu_mem_ctl.scala 705:76] + node ic_fetch_val_shift_right = dshl(ic_fetch_val_int_f, _T_3048) @[el2_ifu_mem_ctl.scala 705:53] + node _T_3049 = bits(ic_fetch_val_shift_right, 1, 0) @[el2_ifu_mem_ctl.scala 708:75] + node _T_3050 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 708:93] + node _T_3051 = and(_T_3049, _T_3050) @[el2_ifu_mem_ctl.scala 708:91] + node _T_3052 = and(_T_3051, fetch_req_iccm_f) @[el2_ifu_mem_ctl.scala 708:113] + node _T_3053 = or(_T_3052, iccm_dma_rvalid_in) @[el2_ifu_mem_ctl.scala 708:130] + node _T_3054 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 708:154] + node _T_3055 = and(_T_3053, _T_3054) @[el2_ifu_mem_ctl.scala 708:152] + node _T_3056 = bits(ic_fetch_val_shift_right, 3, 2) @[el2_ifu_mem_ctl.scala 708:75] + node _T_3057 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 708:93] + node _T_3058 = and(_T_3056, _T_3057) @[el2_ifu_mem_ctl.scala 708:91] + node _T_3059 = and(_T_3058, fetch_req_iccm_f) @[el2_ifu_mem_ctl.scala 708:113] + node _T_3060 = or(_T_3059, iccm_dma_rvalid_in) @[el2_ifu_mem_ctl.scala 708:130] + node _T_3061 = eq(io.dec_tlu_core_ecc_disable, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 708:154] + node _T_3062 = and(_T_3060, _T_3061) @[el2_ifu_mem_ctl.scala 708:152] + node iccm_ecc_word_enable = cat(_T_3062, _T_3055) @[Cat.scala 29:58] + node _T_3063 = bits(iccm_ecc_word_enable, 0, 0) @[el2_ifu_mem_ctl.scala 709:73] + node _T_3064 = bits(io.iccm_rd_data_ecc, 31, 0) @[el2_ifu_mem_ctl.scala 709:93] + node _T_3065 = bits(io.iccm_rd_data_ecc, 38, 32) @[el2_ifu_mem_ctl.scala 709:128] + wire _T_3066 : UInt<1>[18] @[el2_lib.scala 276:18] + wire _T_3067 : UInt<1>[18] @[el2_lib.scala 277:18] + wire _T_3068 : UInt<1>[18] @[el2_lib.scala 278:18] + wire _T_3069 : UInt<1>[15] @[el2_lib.scala 279:18] + wire _T_3070 : UInt<1>[15] @[el2_lib.scala 280:18] + wire _T_3071 : UInt<1>[6] @[el2_lib.scala 281:18] + node _T_3072 = bits(_T_3064, 0, 0) @[el2_lib.scala 288:36] + _T_3066[0] <= _T_3072 @[el2_lib.scala 288:30] + node _T_3073 = bits(_T_3064, 0, 0) @[el2_lib.scala 289:36] + _T_3067[0] <= _T_3073 @[el2_lib.scala 289:30] + node _T_3074 = bits(_T_3064, 1, 1) @[el2_lib.scala 288:36] + _T_3066[1] <= _T_3074 @[el2_lib.scala 288:30] + node _T_3075 = bits(_T_3064, 1, 1) @[el2_lib.scala 290:36] + _T_3068[0] <= _T_3075 @[el2_lib.scala 290:30] + node _T_3076 = bits(_T_3064, 2, 2) @[el2_lib.scala 289:36] + _T_3067[1] <= _T_3076 @[el2_lib.scala 289:30] + node _T_3077 = bits(_T_3064, 2, 2) @[el2_lib.scala 290:36] + _T_3068[1] <= _T_3077 @[el2_lib.scala 290:30] + node _T_3078 = bits(_T_3064, 3, 3) @[el2_lib.scala 288:36] + _T_3066[2] <= _T_3078 @[el2_lib.scala 288:30] + node _T_3079 = bits(_T_3064, 3, 3) @[el2_lib.scala 289:36] + _T_3067[2] <= _T_3079 @[el2_lib.scala 289:30] + node _T_3080 = bits(_T_3064, 3, 3) @[el2_lib.scala 290:36] + _T_3068[2] <= _T_3080 @[el2_lib.scala 290:30] + node _T_3081 = bits(_T_3064, 4, 4) @[el2_lib.scala 288:36] + _T_3066[3] <= _T_3081 @[el2_lib.scala 288:30] + node _T_3082 = bits(_T_3064, 4, 4) @[el2_lib.scala 291:36] + _T_3069[0] <= _T_3082 @[el2_lib.scala 291:30] + node _T_3083 = bits(_T_3064, 5, 5) @[el2_lib.scala 289:36] + _T_3067[3] <= _T_3083 @[el2_lib.scala 289:30] + node _T_3084 = bits(_T_3064, 5, 5) @[el2_lib.scala 291:36] + _T_3069[1] <= _T_3084 @[el2_lib.scala 291:30] + node _T_3085 = bits(_T_3064, 6, 6) @[el2_lib.scala 288:36] + _T_3066[4] <= _T_3085 @[el2_lib.scala 288:30] + node _T_3086 = bits(_T_3064, 6, 6) @[el2_lib.scala 289:36] + _T_3067[4] <= _T_3086 @[el2_lib.scala 289:30] + node _T_3087 = bits(_T_3064, 6, 6) @[el2_lib.scala 291:36] + _T_3069[2] <= _T_3087 @[el2_lib.scala 291:30] + node _T_3088 = bits(_T_3064, 7, 7) @[el2_lib.scala 290:36] + _T_3068[3] <= _T_3088 @[el2_lib.scala 290:30] + node _T_3089 = bits(_T_3064, 7, 7) @[el2_lib.scala 291:36] + _T_3069[3] <= _T_3089 @[el2_lib.scala 291:30] + node _T_3090 = bits(_T_3064, 8, 8) @[el2_lib.scala 288:36] + _T_3066[5] <= _T_3090 @[el2_lib.scala 288:30] + node _T_3091 = bits(_T_3064, 8, 8) @[el2_lib.scala 290:36] + _T_3068[4] <= _T_3091 @[el2_lib.scala 290:30] + node _T_3092 = bits(_T_3064, 8, 8) @[el2_lib.scala 291:36] + _T_3069[4] <= _T_3092 @[el2_lib.scala 291:30] + node _T_3093 = bits(_T_3064, 9, 9) @[el2_lib.scala 289:36] + _T_3067[5] <= _T_3093 @[el2_lib.scala 289:30] + node _T_3094 = bits(_T_3064, 9, 9) @[el2_lib.scala 290:36] + _T_3068[5] <= _T_3094 @[el2_lib.scala 290:30] + node _T_3095 = bits(_T_3064, 9, 9) @[el2_lib.scala 291:36] + _T_3069[5] <= _T_3095 @[el2_lib.scala 291:30] + node _T_3096 = bits(_T_3064, 10, 10) @[el2_lib.scala 288:36] + _T_3066[6] <= _T_3096 @[el2_lib.scala 288:30] + node _T_3097 = bits(_T_3064, 10, 10) @[el2_lib.scala 289:36] + _T_3067[6] <= _T_3097 @[el2_lib.scala 289:30] + node _T_3098 = bits(_T_3064, 10, 10) @[el2_lib.scala 290:36] + _T_3068[6] <= _T_3098 @[el2_lib.scala 290:30] + node _T_3099 = bits(_T_3064, 10, 10) @[el2_lib.scala 291:36] + _T_3069[6] <= _T_3099 @[el2_lib.scala 291:30] + node _T_3100 = bits(_T_3064, 11, 11) @[el2_lib.scala 288:36] + _T_3066[7] <= _T_3100 @[el2_lib.scala 288:30] + node _T_3101 = bits(_T_3064, 11, 11) @[el2_lib.scala 292:36] + _T_3070[0] <= _T_3101 @[el2_lib.scala 292:30] + node _T_3102 = bits(_T_3064, 12, 12) @[el2_lib.scala 289:36] + _T_3067[7] <= _T_3102 @[el2_lib.scala 289:30] + node _T_3103 = bits(_T_3064, 12, 12) @[el2_lib.scala 292:36] + _T_3070[1] <= _T_3103 @[el2_lib.scala 292:30] + node _T_3104 = bits(_T_3064, 13, 13) @[el2_lib.scala 288:36] + _T_3066[8] <= _T_3104 @[el2_lib.scala 288:30] + node _T_3105 = bits(_T_3064, 13, 13) @[el2_lib.scala 289:36] + _T_3067[8] <= _T_3105 @[el2_lib.scala 289:30] + node _T_3106 = bits(_T_3064, 13, 13) @[el2_lib.scala 292:36] + _T_3070[2] <= _T_3106 @[el2_lib.scala 292:30] + node _T_3107 = bits(_T_3064, 14, 14) @[el2_lib.scala 290:36] + _T_3068[7] <= _T_3107 @[el2_lib.scala 290:30] + node _T_3108 = bits(_T_3064, 14, 14) @[el2_lib.scala 292:36] + _T_3070[3] <= _T_3108 @[el2_lib.scala 292:30] + node _T_3109 = bits(_T_3064, 15, 15) @[el2_lib.scala 288:36] + _T_3066[9] <= _T_3109 @[el2_lib.scala 288:30] + node _T_3110 = bits(_T_3064, 15, 15) @[el2_lib.scala 290:36] + _T_3068[8] <= _T_3110 @[el2_lib.scala 290:30] + node _T_3111 = bits(_T_3064, 15, 15) @[el2_lib.scala 292:36] + _T_3070[4] <= _T_3111 @[el2_lib.scala 292:30] + node _T_3112 = bits(_T_3064, 16, 16) @[el2_lib.scala 289:36] + _T_3067[9] <= _T_3112 @[el2_lib.scala 289:30] + node _T_3113 = bits(_T_3064, 16, 16) @[el2_lib.scala 290:36] + _T_3068[9] <= _T_3113 @[el2_lib.scala 290:30] + node _T_3114 = bits(_T_3064, 16, 16) @[el2_lib.scala 292:36] + _T_3070[5] <= _T_3114 @[el2_lib.scala 292:30] + node _T_3115 = bits(_T_3064, 17, 17) @[el2_lib.scala 288:36] + _T_3066[10] <= _T_3115 @[el2_lib.scala 288:30] + node _T_3116 = bits(_T_3064, 17, 17) @[el2_lib.scala 289:36] + _T_3067[10] <= _T_3116 @[el2_lib.scala 289:30] + node _T_3117 = bits(_T_3064, 17, 17) @[el2_lib.scala 290:36] + _T_3068[10] <= _T_3117 @[el2_lib.scala 290:30] + node _T_3118 = bits(_T_3064, 17, 17) @[el2_lib.scala 292:36] + _T_3070[6] <= _T_3118 @[el2_lib.scala 292:30] + node _T_3119 = bits(_T_3064, 18, 18) @[el2_lib.scala 291:36] + _T_3069[7] <= _T_3119 @[el2_lib.scala 291:30] + node _T_3120 = bits(_T_3064, 18, 18) @[el2_lib.scala 292:36] + _T_3070[7] <= _T_3120 @[el2_lib.scala 292:30] + node _T_3121 = bits(_T_3064, 19, 19) @[el2_lib.scala 288:36] + _T_3066[11] <= _T_3121 @[el2_lib.scala 288:30] + node _T_3122 = bits(_T_3064, 19, 19) @[el2_lib.scala 291:36] + _T_3069[8] <= _T_3122 @[el2_lib.scala 291:30] + node _T_3123 = bits(_T_3064, 19, 19) @[el2_lib.scala 292:36] + _T_3070[8] <= _T_3123 @[el2_lib.scala 292:30] + node _T_3124 = bits(_T_3064, 20, 20) @[el2_lib.scala 289:36] + _T_3067[11] <= _T_3124 @[el2_lib.scala 289:30] + node _T_3125 = bits(_T_3064, 20, 20) @[el2_lib.scala 291:36] + _T_3069[9] <= _T_3125 @[el2_lib.scala 291:30] + node _T_3126 = bits(_T_3064, 20, 20) @[el2_lib.scala 292:36] + _T_3070[9] <= _T_3126 @[el2_lib.scala 292:30] + node _T_3127 = bits(_T_3064, 21, 21) @[el2_lib.scala 288:36] + _T_3066[12] <= _T_3127 @[el2_lib.scala 288:30] + node _T_3128 = bits(_T_3064, 21, 21) @[el2_lib.scala 289:36] + _T_3067[12] <= _T_3128 @[el2_lib.scala 289:30] + node _T_3129 = bits(_T_3064, 21, 21) @[el2_lib.scala 291:36] + _T_3069[10] <= _T_3129 @[el2_lib.scala 291:30] + node _T_3130 = bits(_T_3064, 21, 21) @[el2_lib.scala 292:36] + _T_3070[10] <= _T_3130 @[el2_lib.scala 292:30] + node _T_3131 = bits(_T_3064, 22, 22) @[el2_lib.scala 290:36] + _T_3068[11] <= _T_3131 @[el2_lib.scala 290:30] + node _T_3132 = bits(_T_3064, 22, 22) @[el2_lib.scala 291:36] + _T_3069[11] <= _T_3132 @[el2_lib.scala 291:30] + node _T_3133 = bits(_T_3064, 22, 22) @[el2_lib.scala 292:36] + _T_3070[11] <= _T_3133 @[el2_lib.scala 292:30] + node _T_3134 = bits(_T_3064, 23, 23) @[el2_lib.scala 288:36] + _T_3066[13] <= _T_3134 @[el2_lib.scala 288:30] + node _T_3135 = bits(_T_3064, 23, 23) @[el2_lib.scala 290:36] + _T_3068[12] <= _T_3135 @[el2_lib.scala 290:30] + node _T_3136 = bits(_T_3064, 23, 23) @[el2_lib.scala 291:36] + _T_3069[12] <= _T_3136 @[el2_lib.scala 291:30] + node _T_3137 = bits(_T_3064, 23, 23) @[el2_lib.scala 292:36] + _T_3070[12] <= _T_3137 @[el2_lib.scala 292:30] + node _T_3138 = bits(_T_3064, 24, 24) @[el2_lib.scala 289:36] + _T_3067[13] <= _T_3138 @[el2_lib.scala 289:30] + node _T_3139 = bits(_T_3064, 24, 24) @[el2_lib.scala 290:36] + _T_3068[13] <= _T_3139 @[el2_lib.scala 290:30] + node _T_3140 = bits(_T_3064, 24, 24) @[el2_lib.scala 291:36] + _T_3069[13] <= _T_3140 @[el2_lib.scala 291:30] + node _T_3141 = bits(_T_3064, 24, 24) @[el2_lib.scala 292:36] + _T_3070[13] <= _T_3141 @[el2_lib.scala 292:30] + node _T_3142 = bits(_T_3064, 25, 25) @[el2_lib.scala 288:36] + _T_3066[14] <= _T_3142 @[el2_lib.scala 288:30] + node _T_3143 = bits(_T_3064, 25, 25) @[el2_lib.scala 289:36] + _T_3067[14] <= _T_3143 @[el2_lib.scala 289:30] + node _T_3144 = bits(_T_3064, 25, 25) @[el2_lib.scala 290:36] + _T_3068[14] <= _T_3144 @[el2_lib.scala 290:30] + node _T_3145 = bits(_T_3064, 25, 25) @[el2_lib.scala 291:36] + _T_3069[14] <= _T_3145 @[el2_lib.scala 291:30] + node _T_3146 = bits(_T_3064, 25, 25) @[el2_lib.scala 292:36] + _T_3070[14] <= _T_3146 @[el2_lib.scala 292:30] + node _T_3147 = bits(_T_3064, 26, 26) @[el2_lib.scala 288:36] + _T_3066[15] <= _T_3147 @[el2_lib.scala 288:30] + node _T_3148 = bits(_T_3064, 26, 26) @[el2_lib.scala 293:36] + _T_3071[0] <= _T_3148 @[el2_lib.scala 293:30] + node _T_3149 = bits(_T_3064, 27, 27) @[el2_lib.scala 289:36] + _T_3067[15] <= _T_3149 @[el2_lib.scala 289:30] + node _T_3150 = bits(_T_3064, 27, 27) @[el2_lib.scala 293:36] + _T_3071[1] <= _T_3150 @[el2_lib.scala 293:30] + node _T_3151 = bits(_T_3064, 28, 28) @[el2_lib.scala 288:36] + _T_3066[16] <= _T_3151 @[el2_lib.scala 288:30] + node _T_3152 = bits(_T_3064, 28, 28) @[el2_lib.scala 289:36] + _T_3067[16] <= _T_3152 @[el2_lib.scala 289:30] + node _T_3153 = bits(_T_3064, 28, 28) @[el2_lib.scala 293:36] + _T_3071[2] <= _T_3153 @[el2_lib.scala 293:30] + node _T_3154 = bits(_T_3064, 29, 29) @[el2_lib.scala 290:36] + _T_3068[15] <= _T_3154 @[el2_lib.scala 290:30] + node _T_3155 = bits(_T_3064, 29, 29) @[el2_lib.scala 293:36] + _T_3071[3] <= _T_3155 @[el2_lib.scala 293:30] + node _T_3156 = bits(_T_3064, 30, 30) @[el2_lib.scala 288:36] + _T_3066[17] <= _T_3156 @[el2_lib.scala 288:30] + node _T_3157 = bits(_T_3064, 30, 30) @[el2_lib.scala 290:36] + _T_3068[16] <= _T_3157 @[el2_lib.scala 290:30] + node _T_3158 = bits(_T_3064, 30, 30) @[el2_lib.scala 293:36] + _T_3071[4] <= _T_3158 @[el2_lib.scala 293:30] + node _T_3159 = bits(_T_3064, 31, 31) @[el2_lib.scala 289:36] + _T_3067[17] <= _T_3159 @[el2_lib.scala 289:30] + node _T_3160 = bits(_T_3064, 31, 31) @[el2_lib.scala 290:36] + _T_3068[17] <= _T_3160 @[el2_lib.scala 290:30] + node _T_3161 = bits(_T_3064, 31, 31) @[el2_lib.scala 293:36] + _T_3071[5] <= _T_3161 @[el2_lib.scala 293:30] + node _T_3162 = xorr(_T_3064) @[el2_lib.scala 296:30] + node _T_3163 = xorr(_T_3065) @[el2_lib.scala 296:44] + node _T_3164 = xor(_T_3162, _T_3163) @[el2_lib.scala 296:35] + node _T_3165 = not(UInt<1>("h00")) @[el2_lib.scala 296:52] + node _T_3166 = and(_T_3164, _T_3165) @[el2_lib.scala 296:50] + node _T_3167 = bits(_T_3065, 5, 5) @[el2_lib.scala 296:68] + node _T_3168 = cat(_T_3071[2], _T_3071[1]) @[el2_lib.scala 296:76] + node _T_3169 = cat(_T_3168, _T_3071[0]) @[el2_lib.scala 296:76] + node _T_3170 = cat(_T_3071[5], _T_3071[4]) @[el2_lib.scala 296:76] + node _T_3171 = cat(_T_3170, _T_3071[3]) @[el2_lib.scala 296:76] + node _T_3172 = cat(_T_3171, _T_3169) @[el2_lib.scala 296:76] + node _T_3173 = xorr(_T_3172) @[el2_lib.scala 296:83] + node _T_3174 = xor(_T_3167, _T_3173) @[el2_lib.scala 296:71] + node _T_3175 = bits(_T_3065, 4, 4) @[el2_lib.scala 296:95] + node _T_3176 = cat(_T_3070[2], _T_3070[1]) @[el2_lib.scala 296:103] + node _T_3177 = cat(_T_3176, _T_3070[0]) @[el2_lib.scala 296:103] + node _T_3178 = cat(_T_3070[4], _T_3070[3]) @[el2_lib.scala 296:103] + node _T_3179 = cat(_T_3070[6], _T_3070[5]) @[el2_lib.scala 296:103] + node _T_3180 = cat(_T_3179, _T_3178) @[el2_lib.scala 296:103] + node _T_3181 = cat(_T_3180, _T_3177) @[el2_lib.scala 296:103] + node _T_3182 = cat(_T_3070[8], _T_3070[7]) @[el2_lib.scala 296:103] + node _T_3183 = cat(_T_3070[10], _T_3070[9]) @[el2_lib.scala 296:103] + node _T_3184 = cat(_T_3183, _T_3182) @[el2_lib.scala 296:103] + node _T_3185 = cat(_T_3070[12], _T_3070[11]) @[el2_lib.scala 296:103] + node _T_3186 = cat(_T_3070[14], _T_3070[13]) @[el2_lib.scala 296:103] + node _T_3187 = cat(_T_3186, _T_3185) @[el2_lib.scala 296:103] + node _T_3188 = cat(_T_3187, _T_3184) @[el2_lib.scala 296:103] + node _T_3189 = cat(_T_3188, _T_3181) @[el2_lib.scala 296:103] + node _T_3190 = xorr(_T_3189) @[el2_lib.scala 296:110] + node _T_3191 = xor(_T_3175, _T_3190) @[el2_lib.scala 296:98] + node _T_3192 = bits(_T_3065, 3, 3) @[el2_lib.scala 296:122] + node _T_3193 = cat(_T_3069[2], _T_3069[1]) @[el2_lib.scala 296:130] + node _T_3194 = cat(_T_3193, _T_3069[0]) @[el2_lib.scala 296:130] + node _T_3195 = cat(_T_3069[4], _T_3069[3]) @[el2_lib.scala 296:130] + node _T_3196 = cat(_T_3069[6], _T_3069[5]) @[el2_lib.scala 296:130] + node _T_3197 = cat(_T_3196, _T_3195) @[el2_lib.scala 296:130] + node _T_3198 = cat(_T_3197, _T_3194) @[el2_lib.scala 296:130] + node _T_3199 = cat(_T_3069[8], _T_3069[7]) @[el2_lib.scala 296:130] + node _T_3200 = cat(_T_3069[10], _T_3069[9]) @[el2_lib.scala 296:130] + node _T_3201 = cat(_T_3200, _T_3199) @[el2_lib.scala 296:130] + node _T_3202 = cat(_T_3069[12], _T_3069[11]) @[el2_lib.scala 296:130] + node _T_3203 = cat(_T_3069[14], _T_3069[13]) @[el2_lib.scala 296:130] + node _T_3204 = cat(_T_3203, _T_3202) @[el2_lib.scala 296:130] + node _T_3205 = cat(_T_3204, _T_3201) @[el2_lib.scala 296:130] + node _T_3206 = cat(_T_3205, _T_3198) @[el2_lib.scala 296:130] + node _T_3207 = xorr(_T_3206) @[el2_lib.scala 296:137] + node _T_3208 = xor(_T_3192, _T_3207) @[el2_lib.scala 296:125] + node _T_3209 = bits(_T_3065, 2, 2) @[el2_lib.scala 296:149] + node _T_3210 = cat(_T_3068[1], _T_3068[0]) @[el2_lib.scala 296:157] + node _T_3211 = cat(_T_3068[3], _T_3068[2]) @[el2_lib.scala 296:157] + node _T_3212 = cat(_T_3211, _T_3210) @[el2_lib.scala 296:157] + node _T_3213 = cat(_T_3068[5], _T_3068[4]) @[el2_lib.scala 296:157] + node _T_3214 = cat(_T_3068[8], _T_3068[7]) @[el2_lib.scala 296:157] + node _T_3215 = cat(_T_3214, _T_3068[6]) @[el2_lib.scala 296:157] + node _T_3216 = cat(_T_3215, _T_3213) @[el2_lib.scala 296:157] + node _T_3217 = cat(_T_3216, _T_3212) @[el2_lib.scala 296:157] + node _T_3218 = cat(_T_3068[10], _T_3068[9]) @[el2_lib.scala 296:157] + node _T_3219 = cat(_T_3068[12], _T_3068[11]) @[el2_lib.scala 296:157] + node _T_3220 = cat(_T_3219, _T_3218) @[el2_lib.scala 296:157] + node _T_3221 = cat(_T_3068[14], _T_3068[13]) @[el2_lib.scala 296:157] + node _T_3222 = cat(_T_3068[17], _T_3068[16]) @[el2_lib.scala 296:157] + node _T_3223 = cat(_T_3222, _T_3068[15]) @[el2_lib.scala 296:157] + node _T_3224 = cat(_T_3223, _T_3221) @[el2_lib.scala 296:157] + node _T_3225 = cat(_T_3224, _T_3220) @[el2_lib.scala 296:157] + node _T_3226 = cat(_T_3225, _T_3217) @[el2_lib.scala 296:157] + node _T_3227 = xorr(_T_3226) @[el2_lib.scala 296:164] + node _T_3228 = xor(_T_3209, _T_3227) @[el2_lib.scala 296:152] + node _T_3229 = bits(_T_3065, 1, 1) @[el2_lib.scala 296:176] + node _T_3230 = cat(_T_3067[1], _T_3067[0]) @[el2_lib.scala 296:184] + node _T_3231 = cat(_T_3067[3], _T_3067[2]) @[el2_lib.scala 296:184] + node _T_3232 = cat(_T_3231, _T_3230) @[el2_lib.scala 296:184] + node _T_3233 = cat(_T_3067[5], _T_3067[4]) @[el2_lib.scala 296:184] + node _T_3234 = cat(_T_3067[8], _T_3067[7]) @[el2_lib.scala 296:184] + node _T_3235 = cat(_T_3234, _T_3067[6]) @[el2_lib.scala 296:184] + node _T_3236 = cat(_T_3235, _T_3233) @[el2_lib.scala 296:184] + node _T_3237 = cat(_T_3236, _T_3232) @[el2_lib.scala 296:184] + node _T_3238 = cat(_T_3067[10], _T_3067[9]) @[el2_lib.scala 296:184] + node _T_3239 = cat(_T_3067[12], _T_3067[11]) @[el2_lib.scala 296:184] + node _T_3240 = cat(_T_3239, _T_3238) @[el2_lib.scala 296:184] + node _T_3241 = cat(_T_3067[14], _T_3067[13]) @[el2_lib.scala 296:184] + node _T_3242 = cat(_T_3067[17], _T_3067[16]) @[el2_lib.scala 296:184] + node _T_3243 = cat(_T_3242, _T_3067[15]) @[el2_lib.scala 296:184] + node _T_3244 = cat(_T_3243, _T_3241) @[el2_lib.scala 296:184] + node _T_3245 = cat(_T_3244, _T_3240) @[el2_lib.scala 296:184] + node _T_3246 = cat(_T_3245, _T_3237) @[el2_lib.scala 296:184] + node _T_3247 = xorr(_T_3246) @[el2_lib.scala 296:191] + node _T_3248 = xor(_T_3229, _T_3247) @[el2_lib.scala 296:179] + node _T_3249 = bits(_T_3065, 0, 0) @[el2_lib.scala 296:203] + node _T_3250 = cat(_T_3066[1], _T_3066[0]) @[el2_lib.scala 296:211] + node _T_3251 = cat(_T_3066[3], _T_3066[2]) @[el2_lib.scala 296:211] + node _T_3252 = cat(_T_3251, _T_3250) @[el2_lib.scala 296:211] + node _T_3253 = cat(_T_3066[5], _T_3066[4]) @[el2_lib.scala 296:211] + node _T_3254 = cat(_T_3066[8], _T_3066[7]) @[el2_lib.scala 296:211] + node _T_3255 = cat(_T_3254, _T_3066[6]) @[el2_lib.scala 296:211] + node _T_3256 = cat(_T_3255, _T_3253) @[el2_lib.scala 296:211] + node _T_3257 = cat(_T_3256, _T_3252) @[el2_lib.scala 296:211] + node _T_3258 = cat(_T_3066[10], _T_3066[9]) @[el2_lib.scala 296:211] + node _T_3259 = cat(_T_3066[12], _T_3066[11]) @[el2_lib.scala 296:211] + node _T_3260 = cat(_T_3259, _T_3258) @[el2_lib.scala 296:211] + node _T_3261 = cat(_T_3066[14], _T_3066[13]) @[el2_lib.scala 296:211] + node _T_3262 = cat(_T_3066[17], _T_3066[16]) @[el2_lib.scala 296:211] + node _T_3263 = cat(_T_3262, _T_3066[15]) @[el2_lib.scala 296:211] + node _T_3264 = cat(_T_3263, _T_3261) @[el2_lib.scala 296:211] + node _T_3265 = cat(_T_3264, _T_3260) @[el2_lib.scala 296:211] + node _T_3266 = cat(_T_3265, _T_3257) @[el2_lib.scala 296:211] + node _T_3267 = xorr(_T_3266) @[el2_lib.scala 296:218] + node _T_3268 = xor(_T_3249, _T_3267) @[el2_lib.scala 296:206] + node _T_3269 = cat(_T_3228, _T_3248) @[Cat.scala 29:58] + node _T_3270 = cat(_T_3269, _T_3268) @[Cat.scala 29:58] + node _T_3271 = cat(_T_3191, _T_3208) @[Cat.scala 29:58] + node _T_3272 = cat(_T_3166, _T_3174) @[Cat.scala 29:58] + node _T_3273 = cat(_T_3272, _T_3271) @[Cat.scala 29:58] + node _T_3274 = cat(_T_3273, _T_3270) @[Cat.scala 29:58] + node _T_3275 = neq(_T_3274, UInt<1>("h00")) @[el2_lib.scala 297:44] + node _T_3276 = and(_T_3063, _T_3275) @[el2_lib.scala 297:32] + node _T_3277 = bits(_T_3274, 6, 6) @[el2_lib.scala 297:64] + node _T_3278 = and(_T_3276, _T_3277) @[el2_lib.scala 297:53] + node _T_3279 = neq(_T_3274, UInt<1>("h00")) @[el2_lib.scala 298:44] + node _T_3280 = and(_T_3063, _T_3279) @[el2_lib.scala 298:32] + node _T_3281 = bits(_T_3274, 6, 6) @[el2_lib.scala 298:65] + node _T_3282 = not(_T_3281) @[el2_lib.scala 298:55] + node _T_3283 = and(_T_3280, _T_3282) @[el2_lib.scala 298:53] + wire _T_3284 : UInt<1>[39] @[el2_lib.scala 299:26] + node _T_3285 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3286 = eq(_T_3285, UInt<1>("h01")) @[el2_lib.scala 302:41] + _T_3284[0] <= _T_3286 @[el2_lib.scala 302:23] + node _T_3287 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3288 = eq(_T_3287, UInt<2>("h02")) @[el2_lib.scala 302:41] + _T_3284[1] <= _T_3288 @[el2_lib.scala 302:23] + node _T_3289 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3290 = eq(_T_3289, UInt<2>("h03")) @[el2_lib.scala 302:41] + _T_3284[2] <= _T_3290 @[el2_lib.scala 302:23] + node _T_3291 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3292 = eq(_T_3291, UInt<3>("h04")) @[el2_lib.scala 302:41] + _T_3284[3] <= _T_3292 @[el2_lib.scala 302:23] + node _T_3293 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3294 = eq(_T_3293, UInt<3>("h05")) @[el2_lib.scala 302:41] + _T_3284[4] <= _T_3294 @[el2_lib.scala 302:23] + node _T_3295 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3296 = eq(_T_3295, UInt<3>("h06")) @[el2_lib.scala 302:41] + _T_3284[5] <= _T_3296 @[el2_lib.scala 302:23] + node _T_3297 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3298 = eq(_T_3297, UInt<3>("h07")) @[el2_lib.scala 302:41] + _T_3284[6] <= _T_3298 @[el2_lib.scala 302:23] + node _T_3299 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3300 = eq(_T_3299, UInt<4>("h08")) @[el2_lib.scala 302:41] + _T_3284[7] <= _T_3300 @[el2_lib.scala 302:23] + node _T_3301 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3302 = eq(_T_3301, UInt<4>("h09")) @[el2_lib.scala 302:41] + _T_3284[8] <= _T_3302 @[el2_lib.scala 302:23] + node _T_3303 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3304 = eq(_T_3303, UInt<4>("h0a")) @[el2_lib.scala 302:41] + _T_3284[9] <= _T_3304 @[el2_lib.scala 302:23] + node _T_3305 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3306 = eq(_T_3305, UInt<4>("h0b")) @[el2_lib.scala 302:41] + _T_3284[10] <= _T_3306 @[el2_lib.scala 302:23] + node _T_3307 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3308 = eq(_T_3307, UInt<4>("h0c")) @[el2_lib.scala 302:41] + _T_3284[11] <= _T_3308 @[el2_lib.scala 302:23] + node _T_3309 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3310 = eq(_T_3309, UInt<4>("h0d")) @[el2_lib.scala 302:41] + _T_3284[12] <= _T_3310 @[el2_lib.scala 302:23] + node _T_3311 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3312 = eq(_T_3311, UInt<4>("h0e")) @[el2_lib.scala 302:41] + _T_3284[13] <= _T_3312 @[el2_lib.scala 302:23] + node _T_3313 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3314 = eq(_T_3313, UInt<4>("h0f")) @[el2_lib.scala 302:41] + _T_3284[14] <= _T_3314 @[el2_lib.scala 302:23] + node _T_3315 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3316 = eq(_T_3315, UInt<5>("h010")) @[el2_lib.scala 302:41] + _T_3284[15] <= _T_3316 @[el2_lib.scala 302:23] + node _T_3317 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3318 = eq(_T_3317, UInt<5>("h011")) @[el2_lib.scala 302:41] + _T_3284[16] <= _T_3318 @[el2_lib.scala 302:23] + node _T_3319 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3320 = eq(_T_3319, UInt<5>("h012")) @[el2_lib.scala 302:41] + _T_3284[17] <= _T_3320 @[el2_lib.scala 302:23] + node _T_3321 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3322 = eq(_T_3321, UInt<5>("h013")) @[el2_lib.scala 302:41] + _T_3284[18] <= _T_3322 @[el2_lib.scala 302:23] + node _T_3323 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3324 = eq(_T_3323, UInt<5>("h014")) @[el2_lib.scala 302:41] + _T_3284[19] <= _T_3324 @[el2_lib.scala 302:23] + node _T_3325 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3326 = eq(_T_3325, UInt<5>("h015")) @[el2_lib.scala 302:41] + _T_3284[20] <= _T_3326 @[el2_lib.scala 302:23] + node _T_3327 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3328 = eq(_T_3327, UInt<5>("h016")) @[el2_lib.scala 302:41] + _T_3284[21] <= _T_3328 @[el2_lib.scala 302:23] + node _T_3329 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3330 = eq(_T_3329, UInt<5>("h017")) @[el2_lib.scala 302:41] + _T_3284[22] <= _T_3330 @[el2_lib.scala 302:23] + node _T_3331 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3332 = eq(_T_3331, UInt<5>("h018")) @[el2_lib.scala 302:41] + _T_3284[23] <= _T_3332 @[el2_lib.scala 302:23] + node _T_3333 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3334 = eq(_T_3333, UInt<5>("h019")) @[el2_lib.scala 302:41] + _T_3284[24] <= _T_3334 @[el2_lib.scala 302:23] + node _T_3335 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3336 = eq(_T_3335, UInt<5>("h01a")) @[el2_lib.scala 302:41] + _T_3284[25] <= _T_3336 @[el2_lib.scala 302:23] + node _T_3337 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3338 = eq(_T_3337, UInt<5>("h01b")) @[el2_lib.scala 302:41] + _T_3284[26] <= _T_3338 @[el2_lib.scala 302:23] + node _T_3339 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3340 = eq(_T_3339, UInt<5>("h01c")) @[el2_lib.scala 302:41] + _T_3284[27] <= _T_3340 @[el2_lib.scala 302:23] + node _T_3341 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3342 = eq(_T_3341, UInt<5>("h01d")) @[el2_lib.scala 302:41] + _T_3284[28] <= _T_3342 @[el2_lib.scala 302:23] + node _T_3343 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3344 = eq(_T_3343, UInt<5>("h01e")) @[el2_lib.scala 302:41] + _T_3284[29] <= _T_3344 @[el2_lib.scala 302:23] + node _T_3345 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3346 = eq(_T_3345, UInt<5>("h01f")) @[el2_lib.scala 302:41] + _T_3284[30] <= _T_3346 @[el2_lib.scala 302:23] + node _T_3347 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3348 = eq(_T_3347, UInt<6>("h020")) @[el2_lib.scala 302:41] + _T_3284[31] <= _T_3348 @[el2_lib.scala 302:23] + node _T_3349 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3350 = eq(_T_3349, UInt<6>("h021")) @[el2_lib.scala 302:41] + _T_3284[32] <= _T_3350 @[el2_lib.scala 302:23] + node _T_3351 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3352 = eq(_T_3351, UInt<6>("h022")) @[el2_lib.scala 302:41] + _T_3284[33] <= _T_3352 @[el2_lib.scala 302:23] + node _T_3353 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3354 = eq(_T_3353, UInt<6>("h023")) @[el2_lib.scala 302:41] + _T_3284[34] <= _T_3354 @[el2_lib.scala 302:23] + node _T_3355 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3356 = eq(_T_3355, UInt<6>("h024")) @[el2_lib.scala 302:41] + _T_3284[35] <= _T_3356 @[el2_lib.scala 302:23] + node _T_3357 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3358 = eq(_T_3357, UInt<6>("h025")) @[el2_lib.scala 302:41] + _T_3284[36] <= _T_3358 @[el2_lib.scala 302:23] + node _T_3359 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3360 = eq(_T_3359, UInt<6>("h026")) @[el2_lib.scala 302:41] + _T_3284[37] <= _T_3360 @[el2_lib.scala 302:23] + node _T_3361 = bits(_T_3274, 5, 0) @[el2_lib.scala 302:35] + node _T_3362 = eq(_T_3361, UInt<6>("h027")) @[el2_lib.scala 302:41] + _T_3284[38] <= _T_3362 @[el2_lib.scala 302:23] + node _T_3363 = bits(_T_3065, 6, 6) @[el2_lib.scala 304:37] + node _T_3364 = bits(_T_3064, 31, 26) @[el2_lib.scala 304:45] + node _T_3365 = bits(_T_3065, 5, 5) @[el2_lib.scala 304:60] + node _T_3366 = bits(_T_3064, 25, 11) @[el2_lib.scala 304:68] + node _T_3367 = bits(_T_3065, 4, 4) @[el2_lib.scala 304:83] + node _T_3368 = bits(_T_3064, 10, 4) @[el2_lib.scala 304:91] + node _T_3369 = bits(_T_3065, 3, 3) @[el2_lib.scala 304:105] + node _T_3370 = bits(_T_3064, 3, 1) @[el2_lib.scala 304:113] + node _T_3371 = bits(_T_3065, 2, 2) @[el2_lib.scala 304:126] + node _T_3372 = bits(_T_3064, 0, 0) @[el2_lib.scala 304:134] + node _T_3373 = bits(_T_3065, 1, 0) @[el2_lib.scala 304:145] + node _T_3374 = cat(_T_3372, _T_3373) @[Cat.scala 29:58] + node _T_3375 = cat(_T_3369, _T_3370) @[Cat.scala 29:58] + node _T_3376 = cat(_T_3375, _T_3371) @[Cat.scala 29:58] + node _T_3377 = cat(_T_3376, _T_3374) @[Cat.scala 29:58] + node _T_3378 = cat(_T_3366, _T_3367) @[Cat.scala 29:58] + node _T_3379 = cat(_T_3378, _T_3368) @[Cat.scala 29:58] + node _T_3380 = cat(_T_3363, _T_3364) @[Cat.scala 29:58] + node _T_3381 = cat(_T_3380, _T_3365) @[Cat.scala 29:58] + node _T_3382 = cat(_T_3381, _T_3379) @[Cat.scala 29:58] + node _T_3383 = cat(_T_3382, _T_3377) @[Cat.scala 29:58] + node _T_3384 = bits(_T_3278, 0, 0) @[el2_lib.scala 305:49] + node _T_3385 = cat(_T_3284[1], _T_3284[0]) @[el2_lib.scala 305:69] + node _T_3386 = cat(_T_3284[3], _T_3284[2]) @[el2_lib.scala 305:69] + node _T_3387 = cat(_T_3386, _T_3385) @[el2_lib.scala 305:69] + node _T_3388 = cat(_T_3284[5], _T_3284[4]) @[el2_lib.scala 305:69] + node _T_3389 = cat(_T_3284[8], _T_3284[7]) @[el2_lib.scala 305:69] + node _T_3390 = cat(_T_3389, _T_3284[6]) @[el2_lib.scala 305:69] + node _T_3391 = cat(_T_3390, _T_3388) @[el2_lib.scala 305:69] + node _T_3392 = cat(_T_3391, _T_3387) @[el2_lib.scala 305:69] + node _T_3393 = cat(_T_3284[10], _T_3284[9]) @[el2_lib.scala 305:69] + node _T_3394 = cat(_T_3284[13], _T_3284[12]) @[el2_lib.scala 305:69] + node _T_3395 = cat(_T_3394, _T_3284[11]) @[el2_lib.scala 305:69] + node _T_3396 = cat(_T_3395, _T_3393) @[el2_lib.scala 305:69] + node _T_3397 = cat(_T_3284[15], _T_3284[14]) @[el2_lib.scala 305:69] + node _T_3398 = cat(_T_3284[18], _T_3284[17]) @[el2_lib.scala 305:69] + node _T_3399 = cat(_T_3398, _T_3284[16]) @[el2_lib.scala 305:69] + node _T_3400 = cat(_T_3399, _T_3397) @[el2_lib.scala 305:69] + node _T_3401 = cat(_T_3400, _T_3396) @[el2_lib.scala 305:69] + node _T_3402 = cat(_T_3401, _T_3392) @[el2_lib.scala 305:69] + node _T_3403 = cat(_T_3284[20], _T_3284[19]) @[el2_lib.scala 305:69] + node _T_3404 = cat(_T_3284[23], _T_3284[22]) @[el2_lib.scala 305:69] + node _T_3405 = cat(_T_3404, _T_3284[21]) @[el2_lib.scala 305:69] + node _T_3406 = cat(_T_3405, _T_3403) @[el2_lib.scala 305:69] + node _T_3407 = cat(_T_3284[25], _T_3284[24]) @[el2_lib.scala 305:69] + node _T_3408 = cat(_T_3284[28], _T_3284[27]) @[el2_lib.scala 305:69] + node _T_3409 = cat(_T_3408, _T_3284[26]) @[el2_lib.scala 305:69] + node _T_3410 = cat(_T_3409, _T_3407) @[el2_lib.scala 305:69] + node _T_3411 = cat(_T_3410, _T_3406) @[el2_lib.scala 305:69] + node _T_3412 = cat(_T_3284[30], _T_3284[29]) @[el2_lib.scala 305:69] + node _T_3413 = cat(_T_3284[33], _T_3284[32]) @[el2_lib.scala 305:69] + node _T_3414 = cat(_T_3413, _T_3284[31]) @[el2_lib.scala 305:69] + node _T_3415 = cat(_T_3414, _T_3412) @[el2_lib.scala 305:69] + node _T_3416 = cat(_T_3284[35], _T_3284[34]) @[el2_lib.scala 305:69] + node _T_3417 = cat(_T_3284[38], _T_3284[37]) @[el2_lib.scala 305:69] + node _T_3418 = cat(_T_3417, _T_3284[36]) @[el2_lib.scala 305:69] + node _T_3419 = cat(_T_3418, _T_3416) @[el2_lib.scala 305:69] + node _T_3420 = cat(_T_3419, _T_3415) @[el2_lib.scala 305:69] + node _T_3421 = cat(_T_3420, _T_3411) @[el2_lib.scala 305:69] + node _T_3422 = cat(_T_3421, _T_3402) @[el2_lib.scala 305:69] + node _T_3423 = xor(_T_3422, _T_3383) @[el2_lib.scala 305:76] + node _T_3424 = mux(_T_3384, _T_3423, _T_3383) @[el2_lib.scala 305:31] + node _T_3425 = bits(_T_3424, 37, 32) @[el2_lib.scala 307:37] + node _T_3426 = bits(_T_3424, 30, 16) @[el2_lib.scala 307:61] + node _T_3427 = bits(_T_3424, 14, 8) @[el2_lib.scala 307:86] + node _T_3428 = bits(_T_3424, 6, 4) @[el2_lib.scala 307:110] + node _T_3429 = bits(_T_3424, 2, 2) @[el2_lib.scala 307:133] + node _T_3430 = cat(_T_3428, _T_3429) @[Cat.scala 29:58] + node _T_3431 = cat(_T_3425, _T_3426) @[Cat.scala 29:58] + node _T_3432 = cat(_T_3431, _T_3427) @[Cat.scala 29:58] + node _T_3433 = cat(_T_3432, _T_3430) @[Cat.scala 29:58] + node _T_3434 = bits(_T_3424, 38, 38) @[el2_lib.scala 308:39] + node _T_3435 = bits(_T_3274, 6, 0) @[el2_lib.scala 308:56] + node _T_3436 = eq(_T_3435, UInt<7>("h040")) @[el2_lib.scala 308:62] + node _T_3437 = xor(_T_3434, _T_3436) @[el2_lib.scala 308:44] + node _T_3438 = bits(_T_3424, 31, 31) @[el2_lib.scala 308:102] + node _T_3439 = bits(_T_3424, 15, 15) @[el2_lib.scala 308:124] + node _T_3440 = bits(_T_3424, 7, 7) @[el2_lib.scala 308:146] + node _T_3441 = bits(_T_3424, 3, 3) @[el2_lib.scala 308:167] + node _T_3442 = bits(_T_3424, 1, 0) @[el2_lib.scala 308:188] + node _T_3443 = cat(_T_3440, _T_3441) @[Cat.scala 29:58] + node _T_3444 = cat(_T_3443, _T_3442) @[Cat.scala 29:58] + node _T_3445 = cat(_T_3437, _T_3438) @[Cat.scala 29:58] + node _T_3446 = cat(_T_3445, _T_3439) @[Cat.scala 29:58] + node _T_3447 = cat(_T_3446, _T_3444) @[Cat.scala 29:58] + node _T_3448 = bits(iccm_ecc_word_enable, 1, 1) @[el2_ifu_mem_ctl.scala 709:73] + node _T_3449 = bits(io.iccm_rd_data_ecc, 70, 39) @[el2_ifu_mem_ctl.scala 709:93] + node _T_3450 = bits(io.iccm_rd_data_ecc, 77, 71) @[el2_ifu_mem_ctl.scala 709:128] + wire _T_3451 : UInt<1>[18] @[el2_lib.scala 276:18] + wire _T_3452 : UInt<1>[18] @[el2_lib.scala 277:18] + wire _T_3453 : UInt<1>[18] @[el2_lib.scala 278:18] + wire _T_3454 : UInt<1>[15] @[el2_lib.scala 279:18] + wire _T_3455 : UInt<1>[15] @[el2_lib.scala 280:18] + wire _T_3456 : UInt<1>[6] @[el2_lib.scala 281:18] + node _T_3457 = bits(_T_3449, 0, 0) @[el2_lib.scala 288:36] + _T_3451[0] <= _T_3457 @[el2_lib.scala 288:30] + node _T_3458 = bits(_T_3449, 0, 0) @[el2_lib.scala 289:36] + _T_3452[0] <= _T_3458 @[el2_lib.scala 289:30] + node _T_3459 = bits(_T_3449, 1, 1) @[el2_lib.scala 288:36] + _T_3451[1] <= _T_3459 @[el2_lib.scala 288:30] + node _T_3460 = bits(_T_3449, 1, 1) @[el2_lib.scala 290:36] + _T_3453[0] <= _T_3460 @[el2_lib.scala 290:30] + node _T_3461 = bits(_T_3449, 2, 2) @[el2_lib.scala 289:36] + _T_3452[1] <= _T_3461 @[el2_lib.scala 289:30] + node _T_3462 = bits(_T_3449, 2, 2) @[el2_lib.scala 290:36] + _T_3453[1] <= _T_3462 @[el2_lib.scala 290:30] + node _T_3463 = bits(_T_3449, 3, 3) @[el2_lib.scala 288:36] + _T_3451[2] <= _T_3463 @[el2_lib.scala 288:30] + node _T_3464 = bits(_T_3449, 3, 3) @[el2_lib.scala 289:36] + _T_3452[2] <= _T_3464 @[el2_lib.scala 289:30] + node _T_3465 = bits(_T_3449, 3, 3) @[el2_lib.scala 290:36] + _T_3453[2] <= _T_3465 @[el2_lib.scala 290:30] + node _T_3466 = bits(_T_3449, 4, 4) @[el2_lib.scala 288:36] + _T_3451[3] <= _T_3466 @[el2_lib.scala 288:30] + node _T_3467 = bits(_T_3449, 4, 4) @[el2_lib.scala 291:36] + _T_3454[0] <= _T_3467 @[el2_lib.scala 291:30] + node _T_3468 = bits(_T_3449, 5, 5) @[el2_lib.scala 289:36] + _T_3452[3] <= _T_3468 @[el2_lib.scala 289:30] + node _T_3469 = bits(_T_3449, 5, 5) @[el2_lib.scala 291:36] + _T_3454[1] <= _T_3469 @[el2_lib.scala 291:30] + node _T_3470 = bits(_T_3449, 6, 6) @[el2_lib.scala 288:36] + _T_3451[4] <= _T_3470 @[el2_lib.scala 288:30] + node _T_3471 = bits(_T_3449, 6, 6) @[el2_lib.scala 289:36] + _T_3452[4] <= _T_3471 @[el2_lib.scala 289:30] + node _T_3472 = bits(_T_3449, 6, 6) @[el2_lib.scala 291:36] + _T_3454[2] <= _T_3472 @[el2_lib.scala 291:30] + node _T_3473 = bits(_T_3449, 7, 7) @[el2_lib.scala 290:36] + _T_3453[3] <= _T_3473 @[el2_lib.scala 290:30] + node _T_3474 = bits(_T_3449, 7, 7) @[el2_lib.scala 291:36] + _T_3454[3] <= _T_3474 @[el2_lib.scala 291:30] + node _T_3475 = bits(_T_3449, 8, 8) @[el2_lib.scala 288:36] + _T_3451[5] <= _T_3475 @[el2_lib.scala 288:30] + node _T_3476 = bits(_T_3449, 8, 8) @[el2_lib.scala 290:36] + _T_3453[4] <= _T_3476 @[el2_lib.scala 290:30] + node _T_3477 = bits(_T_3449, 8, 8) @[el2_lib.scala 291:36] + _T_3454[4] <= _T_3477 @[el2_lib.scala 291:30] + node _T_3478 = bits(_T_3449, 9, 9) @[el2_lib.scala 289:36] + _T_3452[5] <= _T_3478 @[el2_lib.scala 289:30] + node _T_3479 = bits(_T_3449, 9, 9) @[el2_lib.scala 290:36] + _T_3453[5] <= _T_3479 @[el2_lib.scala 290:30] + node _T_3480 = bits(_T_3449, 9, 9) @[el2_lib.scala 291:36] + _T_3454[5] <= _T_3480 @[el2_lib.scala 291:30] + node _T_3481 = bits(_T_3449, 10, 10) @[el2_lib.scala 288:36] + _T_3451[6] <= _T_3481 @[el2_lib.scala 288:30] + node _T_3482 = bits(_T_3449, 10, 10) @[el2_lib.scala 289:36] + _T_3452[6] <= _T_3482 @[el2_lib.scala 289:30] + node _T_3483 = bits(_T_3449, 10, 10) @[el2_lib.scala 290:36] + _T_3453[6] <= _T_3483 @[el2_lib.scala 290:30] + node _T_3484 = bits(_T_3449, 10, 10) @[el2_lib.scala 291:36] + _T_3454[6] <= _T_3484 @[el2_lib.scala 291:30] + node _T_3485 = bits(_T_3449, 11, 11) @[el2_lib.scala 288:36] + _T_3451[7] <= _T_3485 @[el2_lib.scala 288:30] + node _T_3486 = bits(_T_3449, 11, 11) @[el2_lib.scala 292:36] + _T_3455[0] <= _T_3486 @[el2_lib.scala 292:30] + node _T_3487 = bits(_T_3449, 12, 12) @[el2_lib.scala 289:36] + _T_3452[7] <= _T_3487 @[el2_lib.scala 289:30] + node _T_3488 = bits(_T_3449, 12, 12) @[el2_lib.scala 292:36] + _T_3455[1] <= _T_3488 @[el2_lib.scala 292:30] + node _T_3489 = bits(_T_3449, 13, 13) @[el2_lib.scala 288:36] + _T_3451[8] <= _T_3489 @[el2_lib.scala 288:30] + node _T_3490 = bits(_T_3449, 13, 13) @[el2_lib.scala 289:36] + _T_3452[8] <= _T_3490 @[el2_lib.scala 289:30] + node _T_3491 = bits(_T_3449, 13, 13) @[el2_lib.scala 292:36] + _T_3455[2] <= _T_3491 @[el2_lib.scala 292:30] + node _T_3492 = bits(_T_3449, 14, 14) @[el2_lib.scala 290:36] + _T_3453[7] <= _T_3492 @[el2_lib.scala 290:30] + node _T_3493 = bits(_T_3449, 14, 14) @[el2_lib.scala 292:36] + _T_3455[3] <= _T_3493 @[el2_lib.scala 292:30] + node _T_3494 = bits(_T_3449, 15, 15) @[el2_lib.scala 288:36] + _T_3451[9] <= _T_3494 @[el2_lib.scala 288:30] + node _T_3495 = bits(_T_3449, 15, 15) @[el2_lib.scala 290:36] + _T_3453[8] <= _T_3495 @[el2_lib.scala 290:30] + node _T_3496 = bits(_T_3449, 15, 15) @[el2_lib.scala 292:36] + _T_3455[4] <= _T_3496 @[el2_lib.scala 292:30] + node _T_3497 = bits(_T_3449, 16, 16) @[el2_lib.scala 289:36] + _T_3452[9] <= _T_3497 @[el2_lib.scala 289:30] + node _T_3498 = bits(_T_3449, 16, 16) @[el2_lib.scala 290:36] + _T_3453[9] <= _T_3498 @[el2_lib.scala 290:30] + node _T_3499 = bits(_T_3449, 16, 16) @[el2_lib.scala 292:36] + _T_3455[5] <= _T_3499 @[el2_lib.scala 292:30] + node _T_3500 = bits(_T_3449, 17, 17) @[el2_lib.scala 288:36] + _T_3451[10] <= _T_3500 @[el2_lib.scala 288:30] + node _T_3501 = bits(_T_3449, 17, 17) @[el2_lib.scala 289:36] + _T_3452[10] <= _T_3501 @[el2_lib.scala 289:30] + node _T_3502 = bits(_T_3449, 17, 17) @[el2_lib.scala 290:36] + _T_3453[10] <= _T_3502 @[el2_lib.scala 290:30] + node _T_3503 = bits(_T_3449, 17, 17) @[el2_lib.scala 292:36] + _T_3455[6] <= _T_3503 @[el2_lib.scala 292:30] + node _T_3504 = bits(_T_3449, 18, 18) @[el2_lib.scala 291:36] + _T_3454[7] <= _T_3504 @[el2_lib.scala 291:30] + node _T_3505 = bits(_T_3449, 18, 18) @[el2_lib.scala 292:36] + _T_3455[7] <= _T_3505 @[el2_lib.scala 292:30] + node _T_3506 = bits(_T_3449, 19, 19) @[el2_lib.scala 288:36] + _T_3451[11] <= _T_3506 @[el2_lib.scala 288:30] + node _T_3507 = bits(_T_3449, 19, 19) @[el2_lib.scala 291:36] + _T_3454[8] <= _T_3507 @[el2_lib.scala 291:30] + node _T_3508 = bits(_T_3449, 19, 19) @[el2_lib.scala 292:36] + _T_3455[8] <= _T_3508 @[el2_lib.scala 292:30] + node _T_3509 = bits(_T_3449, 20, 20) @[el2_lib.scala 289:36] + _T_3452[11] <= _T_3509 @[el2_lib.scala 289:30] + node _T_3510 = bits(_T_3449, 20, 20) @[el2_lib.scala 291:36] + _T_3454[9] <= _T_3510 @[el2_lib.scala 291:30] + node _T_3511 = bits(_T_3449, 20, 20) @[el2_lib.scala 292:36] + _T_3455[9] <= _T_3511 @[el2_lib.scala 292:30] + node _T_3512 = bits(_T_3449, 21, 21) @[el2_lib.scala 288:36] + _T_3451[12] <= _T_3512 @[el2_lib.scala 288:30] + node _T_3513 = bits(_T_3449, 21, 21) @[el2_lib.scala 289:36] + _T_3452[12] <= _T_3513 @[el2_lib.scala 289:30] + node _T_3514 = bits(_T_3449, 21, 21) @[el2_lib.scala 291:36] + _T_3454[10] <= _T_3514 @[el2_lib.scala 291:30] + node _T_3515 = bits(_T_3449, 21, 21) @[el2_lib.scala 292:36] + _T_3455[10] <= _T_3515 @[el2_lib.scala 292:30] + node _T_3516 = bits(_T_3449, 22, 22) @[el2_lib.scala 290:36] + _T_3453[11] <= _T_3516 @[el2_lib.scala 290:30] + node _T_3517 = bits(_T_3449, 22, 22) @[el2_lib.scala 291:36] + _T_3454[11] <= _T_3517 @[el2_lib.scala 291:30] + node _T_3518 = bits(_T_3449, 22, 22) @[el2_lib.scala 292:36] + _T_3455[11] <= _T_3518 @[el2_lib.scala 292:30] + node _T_3519 = bits(_T_3449, 23, 23) @[el2_lib.scala 288:36] + _T_3451[13] <= _T_3519 @[el2_lib.scala 288:30] + node _T_3520 = bits(_T_3449, 23, 23) @[el2_lib.scala 290:36] + _T_3453[12] <= _T_3520 @[el2_lib.scala 290:30] + node _T_3521 = bits(_T_3449, 23, 23) @[el2_lib.scala 291:36] + _T_3454[12] <= _T_3521 @[el2_lib.scala 291:30] + node _T_3522 = bits(_T_3449, 23, 23) @[el2_lib.scala 292:36] + _T_3455[12] <= _T_3522 @[el2_lib.scala 292:30] + node _T_3523 = bits(_T_3449, 24, 24) @[el2_lib.scala 289:36] + _T_3452[13] <= _T_3523 @[el2_lib.scala 289:30] + node _T_3524 = bits(_T_3449, 24, 24) @[el2_lib.scala 290:36] + _T_3453[13] <= _T_3524 @[el2_lib.scala 290:30] + node _T_3525 = bits(_T_3449, 24, 24) @[el2_lib.scala 291:36] + _T_3454[13] <= _T_3525 @[el2_lib.scala 291:30] + node _T_3526 = bits(_T_3449, 24, 24) @[el2_lib.scala 292:36] + _T_3455[13] <= _T_3526 @[el2_lib.scala 292:30] + node _T_3527 = bits(_T_3449, 25, 25) @[el2_lib.scala 288:36] + _T_3451[14] <= _T_3527 @[el2_lib.scala 288:30] + node _T_3528 = bits(_T_3449, 25, 25) @[el2_lib.scala 289:36] + _T_3452[14] <= _T_3528 @[el2_lib.scala 289:30] + node _T_3529 = bits(_T_3449, 25, 25) @[el2_lib.scala 290:36] + _T_3453[14] <= _T_3529 @[el2_lib.scala 290:30] + node _T_3530 = bits(_T_3449, 25, 25) @[el2_lib.scala 291:36] + _T_3454[14] <= _T_3530 @[el2_lib.scala 291:30] + node _T_3531 = bits(_T_3449, 25, 25) @[el2_lib.scala 292:36] + _T_3455[14] <= _T_3531 @[el2_lib.scala 292:30] + node _T_3532 = bits(_T_3449, 26, 26) @[el2_lib.scala 288:36] + _T_3451[15] <= _T_3532 @[el2_lib.scala 288:30] + node _T_3533 = bits(_T_3449, 26, 26) @[el2_lib.scala 293:36] + _T_3456[0] <= _T_3533 @[el2_lib.scala 293:30] + node _T_3534 = bits(_T_3449, 27, 27) @[el2_lib.scala 289:36] + _T_3452[15] <= _T_3534 @[el2_lib.scala 289:30] + node _T_3535 = bits(_T_3449, 27, 27) @[el2_lib.scala 293:36] + _T_3456[1] <= _T_3535 @[el2_lib.scala 293:30] + node _T_3536 = bits(_T_3449, 28, 28) @[el2_lib.scala 288:36] + _T_3451[16] <= _T_3536 @[el2_lib.scala 288:30] + node _T_3537 = bits(_T_3449, 28, 28) @[el2_lib.scala 289:36] + _T_3452[16] <= _T_3537 @[el2_lib.scala 289:30] + node _T_3538 = bits(_T_3449, 28, 28) @[el2_lib.scala 293:36] + _T_3456[2] <= _T_3538 @[el2_lib.scala 293:30] + node _T_3539 = bits(_T_3449, 29, 29) @[el2_lib.scala 290:36] + _T_3453[15] <= _T_3539 @[el2_lib.scala 290:30] + node _T_3540 = bits(_T_3449, 29, 29) @[el2_lib.scala 293:36] + _T_3456[3] <= _T_3540 @[el2_lib.scala 293:30] + node _T_3541 = bits(_T_3449, 30, 30) @[el2_lib.scala 288:36] + _T_3451[17] <= _T_3541 @[el2_lib.scala 288:30] + node _T_3542 = bits(_T_3449, 30, 30) @[el2_lib.scala 290:36] + _T_3453[16] <= _T_3542 @[el2_lib.scala 290:30] + node _T_3543 = bits(_T_3449, 30, 30) @[el2_lib.scala 293:36] + _T_3456[4] <= _T_3543 @[el2_lib.scala 293:30] + node _T_3544 = bits(_T_3449, 31, 31) @[el2_lib.scala 289:36] + _T_3452[17] <= _T_3544 @[el2_lib.scala 289:30] + node _T_3545 = bits(_T_3449, 31, 31) @[el2_lib.scala 290:36] + _T_3453[17] <= _T_3545 @[el2_lib.scala 290:30] + node _T_3546 = bits(_T_3449, 31, 31) @[el2_lib.scala 293:36] + _T_3456[5] <= _T_3546 @[el2_lib.scala 293:30] + node _T_3547 = xorr(_T_3449) @[el2_lib.scala 296:30] + node _T_3548 = xorr(_T_3450) @[el2_lib.scala 296:44] + node _T_3549 = xor(_T_3547, _T_3548) @[el2_lib.scala 296:35] + node _T_3550 = not(UInt<1>("h00")) @[el2_lib.scala 296:52] + node _T_3551 = and(_T_3549, _T_3550) @[el2_lib.scala 296:50] + node _T_3552 = bits(_T_3450, 5, 5) @[el2_lib.scala 296:68] + node _T_3553 = cat(_T_3456[2], _T_3456[1]) @[el2_lib.scala 296:76] + node _T_3554 = cat(_T_3553, _T_3456[0]) @[el2_lib.scala 296:76] + node _T_3555 = cat(_T_3456[5], _T_3456[4]) @[el2_lib.scala 296:76] + node _T_3556 = cat(_T_3555, _T_3456[3]) @[el2_lib.scala 296:76] + node _T_3557 = cat(_T_3556, _T_3554) @[el2_lib.scala 296:76] + node _T_3558 = xorr(_T_3557) @[el2_lib.scala 296:83] + node _T_3559 = xor(_T_3552, _T_3558) @[el2_lib.scala 296:71] + node _T_3560 = bits(_T_3450, 4, 4) @[el2_lib.scala 296:95] + node _T_3561 = cat(_T_3455[2], _T_3455[1]) @[el2_lib.scala 296:103] + node _T_3562 = cat(_T_3561, _T_3455[0]) @[el2_lib.scala 296:103] + node _T_3563 = cat(_T_3455[4], _T_3455[3]) @[el2_lib.scala 296:103] + node _T_3564 = cat(_T_3455[6], _T_3455[5]) @[el2_lib.scala 296:103] + node _T_3565 = cat(_T_3564, _T_3563) @[el2_lib.scala 296:103] + node _T_3566 = cat(_T_3565, _T_3562) @[el2_lib.scala 296:103] + node _T_3567 = cat(_T_3455[8], _T_3455[7]) @[el2_lib.scala 296:103] + node _T_3568 = cat(_T_3455[10], _T_3455[9]) @[el2_lib.scala 296:103] + node _T_3569 = cat(_T_3568, _T_3567) @[el2_lib.scala 296:103] + node _T_3570 = cat(_T_3455[12], _T_3455[11]) @[el2_lib.scala 296:103] + node _T_3571 = cat(_T_3455[14], _T_3455[13]) @[el2_lib.scala 296:103] + node _T_3572 = cat(_T_3571, _T_3570) @[el2_lib.scala 296:103] + node _T_3573 = cat(_T_3572, _T_3569) @[el2_lib.scala 296:103] + node _T_3574 = cat(_T_3573, _T_3566) @[el2_lib.scala 296:103] + node _T_3575 = xorr(_T_3574) @[el2_lib.scala 296:110] + node _T_3576 = xor(_T_3560, _T_3575) @[el2_lib.scala 296:98] + node _T_3577 = bits(_T_3450, 3, 3) @[el2_lib.scala 296:122] + node _T_3578 = cat(_T_3454[2], _T_3454[1]) @[el2_lib.scala 296:130] + node _T_3579 = cat(_T_3578, _T_3454[0]) @[el2_lib.scala 296:130] + node _T_3580 = cat(_T_3454[4], _T_3454[3]) @[el2_lib.scala 296:130] + node _T_3581 = cat(_T_3454[6], _T_3454[5]) @[el2_lib.scala 296:130] + node _T_3582 = cat(_T_3581, _T_3580) @[el2_lib.scala 296:130] + node _T_3583 = cat(_T_3582, _T_3579) @[el2_lib.scala 296:130] + node _T_3584 = cat(_T_3454[8], _T_3454[7]) @[el2_lib.scala 296:130] + node _T_3585 = cat(_T_3454[10], _T_3454[9]) @[el2_lib.scala 296:130] + node _T_3586 = cat(_T_3585, _T_3584) @[el2_lib.scala 296:130] + node _T_3587 = cat(_T_3454[12], _T_3454[11]) @[el2_lib.scala 296:130] + node _T_3588 = cat(_T_3454[14], _T_3454[13]) @[el2_lib.scala 296:130] + node _T_3589 = cat(_T_3588, _T_3587) @[el2_lib.scala 296:130] + node _T_3590 = cat(_T_3589, _T_3586) @[el2_lib.scala 296:130] + node _T_3591 = cat(_T_3590, _T_3583) @[el2_lib.scala 296:130] + node _T_3592 = xorr(_T_3591) @[el2_lib.scala 296:137] + node _T_3593 = xor(_T_3577, _T_3592) @[el2_lib.scala 296:125] + node _T_3594 = bits(_T_3450, 2, 2) @[el2_lib.scala 296:149] + node _T_3595 = cat(_T_3453[1], _T_3453[0]) @[el2_lib.scala 296:157] + node _T_3596 = cat(_T_3453[3], _T_3453[2]) @[el2_lib.scala 296:157] + node _T_3597 = cat(_T_3596, _T_3595) @[el2_lib.scala 296:157] + node _T_3598 = cat(_T_3453[5], _T_3453[4]) @[el2_lib.scala 296:157] + node _T_3599 = cat(_T_3453[8], _T_3453[7]) @[el2_lib.scala 296:157] + node _T_3600 = cat(_T_3599, _T_3453[6]) @[el2_lib.scala 296:157] + node _T_3601 = cat(_T_3600, _T_3598) @[el2_lib.scala 296:157] + node _T_3602 = cat(_T_3601, _T_3597) @[el2_lib.scala 296:157] + node _T_3603 = cat(_T_3453[10], _T_3453[9]) @[el2_lib.scala 296:157] + node _T_3604 = cat(_T_3453[12], _T_3453[11]) @[el2_lib.scala 296:157] + node _T_3605 = cat(_T_3604, _T_3603) @[el2_lib.scala 296:157] + node _T_3606 = cat(_T_3453[14], _T_3453[13]) @[el2_lib.scala 296:157] + node _T_3607 = cat(_T_3453[17], _T_3453[16]) @[el2_lib.scala 296:157] + node _T_3608 = cat(_T_3607, _T_3453[15]) @[el2_lib.scala 296:157] + node _T_3609 = cat(_T_3608, _T_3606) @[el2_lib.scala 296:157] + node _T_3610 = cat(_T_3609, _T_3605) @[el2_lib.scala 296:157] + node _T_3611 = cat(_T_3610, _T_3602) @[el2_lib.scala 296:157] + node _T_3612 = xorr(_T_3611) @[el2_lib.scala 296:164] + node _T_3613 = xor(_T_3594, _T_3612) @[el2_lib.scala 296:152] + node _T_3614 = bits(_T_3450, 1, 1) @[el2_lib.scala 296:176] + node _T_3615 = cat(_T_3452[1], _T_3452[0]) @[el2_lib.scala 296:184] + node _T_3616 = cat(_T_3452[3], _T_3452[2]) @[el2_lib.scala 296:184] + node _T_3617 = cat(_T_3616, _T_3615) @[el2_lib.scala 296:184] + node _T_3618 = cat(_T_3452[5], _T_3452[4]) @[el2_lib.scala 296:184] + node _T_3619 = cat(_T_3452[8], _T_3452[7]) @[el2_lib.scala 296:184] + node _T_3620 = cat(_T_3619, _T_3452[6]) @[el2_lib.scala 296:184] + node _T_3621 = cat(_T_3620, _T_3618) @[el2_lib.scala 296:184] + node _T_3622 = cat(_T_3621, _T_3617) @[el2_lib.scala 296:184] + node _T_3623 = cat(_T_3452[10], _T_3452[9]) @[el2_lib.scala 296:184] + node _T_3624 = cat(_T_3452[12], _T_3452[11]) @[el2_lib.scala 296:184] + node _T_3625 = cat(_T_3624, _T_3623) @[el2_lib.scala 296:184] + node _T_3626 = cat(_T_3452[14], _T_3452[13]) @[el2_lib.scala 296:184] + node _T_3627 = cat(_T_3452[17], _T_3452[16]) @[el2_lib.scala 296:184] + node _T_3628 = cat(_T_3627, _T_3452[15]) @[el2_lib.scala 296:184] + node _T_3629 = cat(_T_3628, _T_3626) @[el2_lib.scala 296:184] + node _T_3630 = cat(_T_3629, _T_3625) @[el2_lib.scala 296:184] + node _T_3631 = cat(_T_3630, _T_3622) @[el2_lib.scala 296:184] + node _T_3632 = xorr(_T_3631) @[el2_lib.scala 296:191] + node _T_3633 = xor(_T_3614, _T_3632) @[el2_lib.scala 296:179] + node _T_3634 = bits(_T_3450, 0, 0) @[el2_lib.scala 296:203] + node _T_3635 = cat(_T_3451[1], _T_3451[0]) @[el2_lib.scala 296:211] + node _T_3636 = cat(_T_3451[3], _T_3451[2]) @[el2_lib.scala 296:211] + node _T_3637 = cat(_T_3636, _T_3635) @[el2_lib.scala 296:211] + node _T_3638 = cat(_T_3451[5], _T_3451[4]) @[el2_lib.scala 296:211] + node _T_3639 = cat(_T_3451[8], _T_3451[7]) @[el2_lib.scala 296:211] + node _T_3640 = cat(_T_3639, _T_3451[6]) @[el2_lib.scala 296:211] + node _T_3641 = cat(_T_3640, _T_3638) @[el2_lib.scala 296:211] + node _T_3642 = cat(_T_3641, _T_3637) @[el2_lib.scala 296:211] + node _T_3643 = cat(_T_3451[10], _T_3451[9]) @[el2_lib.scala 296:211] + node _T_3644 = cat(_T_3451[12], _T_3451[11]) @[el2_lib.scala 296:211] + node _T_3645 = cat(_T_3644, _T_3643) @[el2_lib.scala 296:211] + node _T_3646 = cat(_T_3451[14], _T_3451[13]) @[el2_lib.scala 296:211] + node _T_3647 = cat(_T_3451[17], _T_3451[16]) @[el2_lib.scala 296:211] + node _T_3648 = cat(_T_3647, _T_3451[15]) @[el2_lib.scala 296:211] + node _T_3649 = cat(_T_3648, _T_3646) @[el2_lib.scala 296:211] + node _T_3650 = cat(_T_3649, _T_3645) @[el2_lib.scala 296:211] + node _T_3651 = cat(_T_3650, _T_3642) @[el2_lib.scala 296:211] + node _T_3652 = xorr(_T_3651) @[el2_lib.scala 296:218] + node _T_3653 = xor(_T_3634, _T_3652) @[el2_lib.scala 296:206] + node _T_3654 = cat(_T_3613, _T_3633) @[Cat.scala 29:58] + node _T_3655 = cat(_T_3654, _T_3653) @[Cat.scala 29:58] + node _T_3656 = cat(_T_3576, _T_3593) @[Cat.scala 29:58] + node _T_3657 = cat(_T_3551, _T_3559) @[Cat.scala 29:58] + node _T_3658 = cat(_T_3657, _T_3656) @[Cat.scala 29:58] + node _T_3659 = cat(_T_3658, _T_3655) @[Cat.scala 29:58] + node _T_3660 = neq(_T_3659, UInt<1>("h00")) @[el2_lib.scala 297:44] + node _T_3661 = and(_T_3448, _T_3660) @[el2_lib.scala 297:32] + node _T_3662 = bits(_T_3659, 6, 6) @[el2_lib.scala 297:64] + node _T_3663 = and(_T_3661, _T_3662) @[el2_lib.scala 297:53] + node _T_3664 = neq(_T_3659, UInt<1>("h00")) @[el2_lib.scala 298:44] + node _T_3665 = and(_T_3448, _T_3664) @[el2_lib.scala 298:32] + node _T_3666 = bits(_T_3659, 6, 6) @[el2_lib.scala 298:65] + node _T_3667 = not(_T_3666) @[el2_lib.scala 298:55] + node _T_3668 = and(_T_3665, _T_3667) @[el2_lib.scala 298:53] + wire _T_3669 : UInt<1>[39] @[el2_lib.scala 299:26] + node _T_3670 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3671 = eq(_T_3670, UInt<1>("h01")) @[el2_lib.scala 302:41] + _T_3669[0] <= _T_3671 @[el2_lib.scala 302:23] + node _T_3672 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3673 = eq(_T_3672, UInt<2>("h02")) @[el2_lib.scala 302:41] + _T_3669[1] <= _T_3673 @[el2_lib.scala 302:23] + node _T_3674 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3675 = eq(_T_3674, UInt<2>("h03")) @[el2_lib.scala 302:41] + _T_3669[2] <= _T_3675 @[el2_lib.scala 302:23] + node _T_3676 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3677 = eq(_T_3676, UInt<3>("h04")) @[el2_lib.scala 302:41] + _T_3669[3] <= _T_3677 @[el2_lib.scala 302:23] + node _T_3678 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3679 = eq(_T_3678, UInt<3>("h05")) @[el2_lib.scala 302:41] + _T_3669[4] <= _T_3679 @[el2_lib.scala 302:23] + node _T_3680 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3681 = eq(_T_3680, UInt<3>("h06")) @[el2_lib.scala 302:41] + _T_3669[5] <= _T_3681 @[el2_lib.scala 302:23] + node _T_3682 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3683 = eq(_T_3682, UInt<3>("h07")) @[el2_lib.scala 302:41] + _T_3669[6] <= _T_3683 @[el2_lib.scala 302:23] + node _T_3684 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3685 = eq(_T_3684, UInt<4>("h08")) @[el2_lib.scala 302:41] + _T_3669[7] <= _T_3685 @[el2_lib.scala 302:23] + node _T_3686 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3687 = eq(_T_3686, UInt<4>("h09")) @[el2_lib.scala 302:41] + _T_3669[8] <= _T_3687 @[el2_lib.scala 302:23] + node _T_3688 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3689 = eq(_T_3688, UInt<4>("h0a")) @[el2_lib.scala 302:41] + _T_3669[9] <= _T_3689 @[el2_lib.scala 302:23] + node _T_3690 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3691 = eq(_T_3690, UInt<4>("h0b")) @[el2_lib.scala 302:41] + _T_3669[10] <= _T_3691 @[el2_lib.scala 302:23] + node _T_3692 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3693 = eq(_T_3692, UInt<4>("h0c")) @[el2_lib.scala 302:41] + _T_3669[11] <= _T_3693 @[el2_lib.scala 302:23] + node _T_3694 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3695 = eq(_T_3694, UInt<4>("h0d")) @[el2_lib.scala 302:41] + _T_3669[12] <= _T_3695 @[el2_lib.scala 302:23] + node _T_3696 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3697 = eq(_T_3696, UInt<4>("h0e")) @[el2_lib.scala 302:41] + _T_3669[13] <= _T_3697 @[el2_lib.scala 302:23] + node _T_3698 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3699 = eq(_T_3698, UInt<4>("h0f")) @[el2_lib.scala 302:41] + _T_3669[14] <= _T_3699 @[el2_lib.scala 302:23] + node _T_3700 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3701 = eq(_T_3700, UInt<5>("h010")) @[el2_lib.scala 302:41] + _T_3669[15] <= _T_3701 @[el2_lib.scala 302:23] + node _T_3702 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3703 = eq(_T_3702, UInt<5>("h011")) @[el2_lib.scala 302:41] + _T_3669[16] <= _T_3703 @[el2_lib.scala 302:23] + node _T_3704 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3705 = eq(_T_3704, UInt<5>("h012")) @[el2_lib.scala 302:41] + _T_3669[17] <= _T_3705 @[el2_lib.scala 302:23] + node _T_3706 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3707 = eq(_T_3706, UInt<5>("h013")) @[el2_lib.scala 302:41] + _T_3669[18] <= _T_3707 @[el2_lib.scala 302:23] + node _T_3708 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3709 = eq(_T_3708, UInt<5>("h014")) @[el2_lib.scala 302:41] + _T_3669[19] <= _T_3709 @[el2_lib.scala 302:23] + node _T_3710 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3711 = eq(_T_3710, UInt<5>("h015")) @[el2_lib.scala 302:41] + _T_3669[20] <= _T_3711 @[el2_lib.scala 302:23] + node _T_3712 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3713 = eq(_T_3712, UInt<5>("h016")) @[el2_lib.scala 302:41] + _T_3669[21] <= _T_3713 @[el2_lib.scala 302:23] + node _T_3714 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3715 = eq(_T_3714, UInt<5>("h017")) @[el2_lib.scala 302:41] + _T_3669[22] <= _T_3715 @[el2_lib.scala 302:23] + node _T_3716 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3717 = eq(_T_3716, UInt<5>("h018")) @[el2_lib.scala 302:41] + _T_3669[23] <= _T_3717 @[el2_lib.scala 302:23] + node _T_3718 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3719 = eq(_T_3718, UInt<5>("h019")) @[el2_lib.scala 302:41] + _T_3669[24] <= _T_3719 @[el2_lib.scala 302:23] + node _T_3720 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3721 = eq(_T_3720, UInt<5>("h01a")) @[el2_lib.scala 302:41] + _T_3669[25] <= _T_3721 @[el2_lib.scala 302:23] + node _T_3722 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3723 = eq(_T_3722, UInt<5>("h01b")) @[el2_lib.scala 302:41] + _T_3669[26] <= _T_3723 @[el2_lib.scala 302:23] + node _T_3724 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3725 = eq(_T_3724, UInt<5>("h01c")) @[el2_lib.scala 302:41] + _T_3669[27] <= _T_3725 @[el2_lib.scala 302:23] + node _T_3726 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3727 = eq(_T_3726, UInt<5>("h01d")) @[el2_lib.scala 302:41] + _T_3669[28] <= _T_3727 @[el2_lib.scala 302:23] + node _T_3728 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3729 = eq(_T_3728, UInt<5>("h01e")) @[el2_lib.scala 302:41] + _T_3669[29] <= _T_3729 @[el2_lib.scala 302:23] + node _T_3730 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3731 = eq(_T_3730, UInt<5>("h01f")) @[el2_lib.scala 302:41] + _T_3669[30] <= _T_3731 @[el2_lib.scala 302:23] + node _T_3732 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3733 = eq(_T_3732, UInt<6>("h020")) @[el2_lib.scala 302:41] + _T_3669[31] <= _T_3733 @[el2_lib.scala 302:23] + node _T_3734 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3735 = eq(_T_3734, UInt<6>("h021")) @[el2_lib.scala 302:41] + _T_3669[32] <= _T_3735 @[el2_lib.scala 302:23] + node _T_3736 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3737 = eq(_T_3736, UInt<6>("h022")) @[el2_lib.scala 302:41] + _T_3669[33] <= _T_3737 @[el2_lib.scala 302:23] + node _T_3738 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3739 = eq(_T_3738, UInt<6>("h023")) @[el2_lib.scala 302:41] + _T_3669[34] <= _T_3739 @[el2_lib.scala 302:23] + node _T_3740 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3741 = eq(_T_3740, UInt<6>("h024")) @[el2_lib.scala 302:41] + _T_3669[35] <= _T_3741 @[el2_lib.scala 302:23] + node _T_3742 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3743 = eq(_T_3742, UInt<6>("h025")) @[el2_lib.scala 302:41] + _T_3669[36] <= _T_3743 @[el2_lib.scala 302:23] + node _T_3744 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3745 = eq(_T_3744, UInt<6>("h026")) @[el2_lib.scala 302:41] + _T_3669[37] <= _T_3745 @[el2_lib.scala 302:23] + node _T_3746 = bits(_T_3659, 5, 0) @[el2_lib.scala 302:35] + node _T_3747 = eq(_T_3746, UInt<6>("h027")) @[el2_lib.scala 302:41] + _T_3669[38] <= _T_3747 @[el2_lib.scala 302:23] + node _T_3748 = bits(_T_3450, 6, 6) @[el2_lib.scala 304:37] + node _T_3749 = bits(_T_3449, 31, 26) @[el2_lib.scala 304:45] + node _T_3750 = bits(_T_3450, 5, 5) @[el2_lib.scala 304:60] + node _T_3751 = bits(_T_3449, 25, 11) @[el2_lib.scala 304:68] + node _T_3752 = bits(_T_3450, 4, 4) @[el2_lib.scala 304:83] + node _T_3753 = bits(_T_3449, 10, 4) @[el2_lib.scala 304:91] + node _T_3754 = bits(_T_3450, 3, 3) @[el2_lib.scala 304:105] + node _T_3755 = bits(_T_3449, 3, 1) @[el2_lib.scala 304:113] + node _T_3756 = bits(_T_3450, 2, 2) @[el2_lib.scala 304:126] + node _T_3757 = bits(_T_3449, 0, 0) @[el2_lib.scala 304:134] + node _T_3758 = bits(_T_3450, 1, 0) @[el2_lib.scala 304:145] + node _T_3759 = cat(_T_3757, _T_3758) @[Cat.scala 29:58] + node _T_3760 = cat(_T_3754, _T_3755) @[Cat.scala 29:58] + node _T_3761 = cat(_T_3760, _T_3756) @[Cat.scala 29:58] + node _T_3762 = cat(_T_3761, _T_3759) @[Cat.scala 29:58] + node _T_3763 = cat(_T_3751, _T_3752) @[Cat.scala 29:58] + node _T_3764 = cat(_T_3763, _T_3753) @[Cat.scala 29:58] + node _T_3765 = cat(_T_3748, _T_3749) @[Cat.scala 29:58] + node _T_3766 = cat(_T_3765, _T_3750) @[Cat.scala 29:58] + node _T_3767 = cat(_T_3766, _T_3764) @[Cat.scala 29:58] + node _T_3768 = cat(_T_3767, _T_3762) @[Cat.scala 29:58] + node _T_3769 = bits(_T_3663, 0, 0) @[el2_lib.scala 305:49] + node _T_3770 = cat(_T_3669[1], _T_3669[0]) @[el2_lib.scala 305:69] + node _T_3771 = cat(_T_3669[3], _T_3669[2]) @[el2_lib.scala 305:69] + node _T_3772 = cat(_T_3771, _T_3770) @[el2_lib.scala 305:69] + node _T_3773 = cat(_T_3669[5], _T_3669[4]) @[el2_lib.scala 305:69] + node _T_3774 = cat(_T_3669[8], _T_3669[7]) @[el2_lib.scala 305:69] + node _T_3775 = cat(_T_3774, _T_3669[6]) @[el2_lib.scala 305:69] + node _T_3776 = cat(_T_3775, _T_3773) @[el2_lib.scala 305:69] + node _T_3777 = cat(_T_3776, _T_3772) @[el2_lib.scala 305:69] + node _T_3778 = cat(_T_3669[10], _T_3669[9]) @[el2_lib.scala 305:69] + node _T_3779 = cat(_T_3669[13], _T_3669[12]) @[el2_lib.scala 305:69] + node _T_3780 = cat(_T_3779, _T_3669[11]) @[el2_lib.scala 305:69] + node _T_3781 = cat(_T_3780, _T_3778) @[el2_lib.scala 305:69] + node _T_3782 = cat(_T_3669[15], _T_3669[14]) @[el2_lib.scala 305:69] + node _T_3783 = cat(_T_3669[18], _T_3669[17]) @[el2_lib.scala 305:69] + node _T_3784 = cat(_T_3783, _T_3669[16]) @[el2_lib.scala 305:69] + node _T_3785 = cat(_T_3784, _T_3782) @[el2_lib.scala 305:69] + node _T_3786 = cat(_T_3785, _T_3781) @[el2_lib.scala 305:69] + node _T_3787 = cat(_T_3786, _T_3777) @[el2_lib.scala 305:69] + node _T_3788 = cat(_T_3669[20], _T_3669[19]) @[el2_lib.scala 305:69] + node _T_3789 = cat(_T_3669[23], _T_3669[22]) @[el2_lib.scala 305:69] + node _T_3790 = cat(_T_3789, _T_3669[21]) @[el2_lib.scala 305:69] + node _T_3791 = cat(_T_3790, _T_3788) @[el2_lib.scala 305:69] + node _T_3792 = cat(_T_3669[25], _T_3669[24]) @[el2_lib.scala 305:69] + node _T_3793 = cat(_T_3669[28], _T_3669[27]) @[el2_lib.scala 305:69] + node _T_3794 = cat(_T_3793, _T_3669[26]) @[el2_lib.scala 305:69] + node _T_3795 = cat(_T_3794, _T_3792) @[el2_lib.scala 305:69] + node _T_3796 = cat(_T_3795, _T_3791) @[el2_lib.scala 305:69] + node _T_3797 = cat(_T_3669[30], _T_3669[29]) @[el2_lib.scala 305:69] + node _T_3798 = cat(_T_3669[33], _T_3669[32]) @[el2_lib.scala 305:69] + node _T_3799 = cat(_T_3798, _T_3669[31]) @[el2_lib.scala 305:69] + node _T_3800 = cat(_T_3799, _T_3797) @[el2_lib.scala 305:69] + node _T_3801 = cat(_T_3669[35], _T_3669[34]) @[el2_lib.scala 305:69] + node _T_3802 = cat(_T_3669[38], _T_3669[37]) @[el2_lib.scala 305:69] + node _T_3803 = cat(_T_3802, _T_3669[36]) @[el2_lib.scala 305:69] + node _T_3804 = cat(_T_3803, _T_3801) @[el2_lib.scala 305:69] + node _T_3805 = cat(_T_3804, _T_3800) @[el2_lib.scala 305:69] + node _T_3806 = cat(_T_3805, _T_3796) @[el2_lib.scala 305:69] + node _T_3807 = cat(_T_3806, _T_3787) @[el2_lib.scala 305:69] + node _T_3808 = xor(_T_3807, _T_3768) @[el2_lib.scala 305:76] + node _T_3809 = mux(_T_3769, _T_3808, _T_3768) @[el2_lib.scala 305:31] + node _T_3810 = bits(_T_3809, 37, 32) @[el2_lib.scala 307:37] + node _T_3811 = bits(_T_3809, 30, 16) @[el2_lib.scala 307:61] + node _T_3812 = bits(_T_3809, 14, 8) @[el2_lib.scala 307:86] + node _T_3813 = bits(_T_3809, 6, 4) @[el2_lib.scala 307:110] + node _T_3814 = bits(_T_3809, 2, 2) @[el2_lib.scala 307:133] + node _T_3815 = cat(_T_3813, _T_3814) @[Cat.scala 29:58] + node _T_3816 = cat(_T_3810, _T_3811) @[Cat.scala 29:58] + node _T_3817 = cat(_T_3816, _T_3812) @[Cat.scala 29:58] + node _T_3818 = cat(_T_3817, _T_3815) @[Cat.scala 29:58] + node _T_3819 = bits(_T_3809, 38, 38) @[el2_lib.scala 308:39] + node _T_3820 = bits(_T_3659, 6, 0) @[el2_lib.scala 308:56] + node _T_3821 = eq(_T_3820, UInt<7>("h040")) @[el2_lib.scala 308:62] + node _T_3822 = xor(_T_3819, _T_3821) @[el2_lib.scala 308:44] + node _T_3823 = bits(_T_3809, 31, 31) @[el2_lib.scala 308:102] + node _T_3824 = bits(_T_3809, 15, 15) @[el2_lib.scala 308:124] + node _T_3825 = bits(_T_3809, 7, 7) @[el2_lib.scala 308:146] + node _T_3826 = bits(_T_3809, 3, 3) @[el2_lib.scala 308:167] + node _T_3827 = bits(_T_3809, 1, 0) @[el2_lib.scala 308:188] + node _T_3828 = cat(_T_3825, _T_3826) @[Cat.scala 29:58] + node _T_3829 = cat(_T_3828, _T_3827) @[Cat.scala 29:58] + node _T_3830 = cat(_T_3822, _T_3823) @[Cat.scala 29:58] + node _T_3831 = cat(_T_3830, _T_3824) @[Cat.scala 29:58] + node _T_3832 = cat(_T_3831, _T_3829) @[Cat.scala 29:58] + wire iccm_corrected_ecc : UInt<7>[2] @[el2_ifu_mem_ctl.scala 710:32] + wire _T_3833 : UInt<7>[2] @[el2_ifu_mem_ctl.scala 711:32] + _T_3833[0] <= _T_3447 @[el2_ifu_mem_ctl.scala 711:32] + _T_3833[1] <= _T_3832 @[el2_ifu_mem_ctl.scala 711:32] + iccm_corrected_ecc[0] <= _T_3833[0] @[el2_ifu_mem_ctl.scala 711:22] + iccm_corrected_ecc[1] <= _T_3833[1] @[el2_ifu_mem_ctl.scala 711:22] + wire _T_3834 : UInt<32>[2] @[el2_ifu_mem_ctl.scala 712:33] + _T_3834[0] <= _T_3433 @[el2_ifu_mem_ctl.scala 712:33] + _T_3834[1] <= _T_3818 @[el2_ifu_mem_ctl.scala 712:33] + iccm_corrected_data[0] <= _T_3834[0] @[el2_ifu_mem_ctl.scala 712:23] + iccm_corrected_data[1] <= _T_3834[1] @[el2_ifu_mem_ctl.scala 712:23] + node _T_3835 = cat(_T_3278, _T_3663) @[Cat.scala 29:58] + iccm_single_ecc_error <= _T_3835 @[el2_ifu_mem_ctl.scala 713:25] + node _T_3836 = cat(_T_3283, _T_3668) @[Cat.scala 29:58] + iccm_double_ecc_error <= _T_3836 @[el2_ifu_mem_ctl.scala 714:25] + node _T_3837 = orr(iccm_single_ecc_error) @[el2_ifu_mem_ctl.scala 715:54] + node _T_3838 = and(_T_3837, ifc_iccm_access_f) @[el2_ifu_mem_ctl.scala 715:58] + node _T_3839 = and(_T_3838, ifc_fetch_req_f) @[el2_ifu_mem_ctl.scala 715:78] + io.iccm_rd_ecc_single_err <= _T_3839 @[el2_ifu_mem_ctl.scala 715:29] + node _T_3840 = orr(iccm_double_ecc_error) @[el2_ifu_mem_ctl.scala 716:54] + node _T_3841 = and(_T_3840, ifc_iccm_access_f) @[el2_ifu_mem_ctl.scala 716:58] + io.iccm_rd_ecc_double_err <= _T_3841 @[el2_ifu_mem_ctl.scala 716:29] + node _T_3842 = bits(iccm_single_ecc_error, 0, 0) @[el2_ifu_mem_ctl.scala 717:60] + node _T_3843 = bits(_T_3842, 0, 0) @[el2_ifu_mem_ctl.scala 717:64] + node iccm_corrected_data_f_mux = mux(_T_3843, iccm_corrected_data[0], iccm_corrected_data[1]) @[el2_ifu_mem_ctl.scala 717:38] + node _T_3844 = bits(iccm_single_ecc_error, 0, 0) @[el2_ifu_mem_ctl.scala 718:59] + node _T_3845 = bits(_T_3844, 0, 0) @[el2_ifu_mem_ctl.scala 718:63] + node iccm_corrected_ecc_f_mux = mux(_T_3845, iccm_corrected_ecc[0], iccm_corrected_ecc[1]) @[el2_ifu_mem_ctl.scala 718:37] + wire iccm_rd_ecc_single_err_ff : UInt<1> + iccm_rd_ecc_single_err_ff <= UInt<1>("h00") + node _T_3846 = eq(iccm_rd_ecc_single_err_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 720:61] + node _T_3847 = and(io.iccm_rd_ecc_single_err, _T_3846) @[el2_ifu_mem_ctl.scala 720:59] + node _T_3848 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 720:91] + node _T_3849 = and(_T_3847, _T_3848) @[el2_ifu_mem_ctl.scala 720:89] + node iccm_ecc_write_status = or(_T_3849, io.iccm_dma_sb_error) @[el2_ifu_mem_ctl.scala 720:112] + node _T_3850 = or(io.iccm_rd_ecc_single_err, iccm_rd_ecc_single_err_ff) @[el2_ifu_mem_ctl.scala 721:67] + node _T_3851 = eq(io.exu_flush_final, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 721:98] + node iccm_rd_ecc_single_err_hold_in = and(_T_3850, _T_3851) @[el2_ifu_mem_ctl.scala 721:96] + iccm_error_start <= io.iccm_rd_ecc_single_err @[el2_ifu_mem_ctl.scala 722:20] + wire iccm_rw_addr_f : UInt<14> + iccm_rw_addr_f <= UInt<1>("h00") + node _T_3852 = bits(iccm_single_ecc_error, 0, 0) @[el2_ifu_mem_ctl.scala 724:57] + node _T_3853 = bits(_T_3852, 0, 0) @[el2_ifu_mem_ctl.scala 724:67] + node _T_3854 = add(iccm_rw_addr_f, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 724:102] + node _T_3855 = tail(_T_3854, 1) @[el2_ifu_mem_ctl.scala 724:102] + node iccm_ecc_corr_index_in = mux(_T_3853, iccm_rw_addr_f, _T_3855) @[el2_ifu_mem_ctl.scala 724:35] + io.test <= iccm_corrected_ecc[0] @[el2_ifu_mem_ctl.scala 725:11] diff --git a/el2_ifu_mem_ctl.v b/el2_ifu_mem_ctl.v index fcb2eea1..bca9ac38 100644 --- a/el2_ifu_mem_ctl.v +++ b/el2_ifu_mem_ctl.v @@ -139,6 +139,7 @@ module el2_ifu_mem_ctl( output io_ifu_ic_debug_rd_data_valid, output io_iccm_buf_correct_ecc, output io_iccm_correction_state, + output [6:0] io_test, input io_scan_mode ); `ifdef RANDOMIZE_REG_INIT @@ -150,7 +151,50 @@ module el2_ifu_mem_ctl( reg [31:0] _RAND_5; reg [31:0] _RAND_6; reg [31:0] _RAND_7; - reg [95:0] _RAND_8; + reg [31:0] _RAND_8; + reg [31:0] _RAND_9; + reg [31:0] _RAND_10; + reg [31:0] _RAND_11; + reg [31:0] _RAND_12; + reg [31:0] _RAND_13; + reg [31:0] _RAND_14; + reg [31:0] _RAND_15; + reg [31:0] _RAND_16; + reg [31:0] _RAND_17; + reg [31:0] _RAND_18; + reg [31:0] _RAND_19; + reg [31:0] _RAND_20; + reg [31:0] _RAND_21; + reg [31:0] _RAND_22; + reg [31:0] _RAND_23; + reg [63:0] _RAND_24; + reg [63:0] _RAND_25; + reg [63:0] _RAND_26; + reg [63:0] _RAND_27; + reg [63:0] _RAND_28; + reg [63:0] _RAND_29; + reg [63:0] _RAND_30; + reg [63:0] _RAND_31; + reg [63:0] _RAND_32; + reg [63:0] _RAND_33; + reg [63:0] _RAND_34; + reg [63:0] _RAND_35; + reg [63:0] _RAND_36; + reg [63:0] _RAND_37; + reg [63:0] _RAND_38; + reg [63:0] _RAND_39; + reg [63:0] _RAND_40; + reg [31:0] _RAND_41; + reg [31:0] _RAND_42; + reg [95:0] _RAND_43; + reg [31:0] _RAND_44; + reg [31:0] _RAND_45; + reg [31:0] _RAND_46; + reg [31:0] _RAND_47; + reg [31:0] _RAND_48; + reg [31:0] _RAND_49; + reg [31:0] _RAND_50; + reg [63:0] _RAND_51; `endif // RANDOMIZE_REG_INIT wire rvclkhdr_io_clk; // @[el2_lib.scala 412:22] wire rvclkhdr_io_en; // @[el2_lib.scala 412:22] @@ -166,55 +210,305 @@ module el2_ifu_mem_ctl( reg [2:0] miss_state; // @[Reg.scala 27:20] wire miss_pending = miss_state != 3'h0; // @[el2_ifu_mem_ctl.scala 300:30] wire _T_1 = _T | miss_pending; // @[el2_ifu_mem_ctl.scala 235:71] - wire _T_26 = 3'h0 == miss_state; // @[Conditional.scala 37:30] + wire [3:0] ic_fetch_val_int_f = {2'h0,io_ic_fetch_val_f}; // @[Cat.scala 29:58] + reg [30:0] ifu_fetch_addr_int_f; // @[el2_ifu_mem_ctl.scala 355:34] + wire [4:0] _GEN_74 = {{1'd0}, ic_fetch_val_int_f}; // @[el2_ifu_mem_ctl.scala 705:53] + wire [4:0] ic_fetch_val_shift_right = _GEN_74 << ifu_fetch_addr_int_f[0]; // @[el2_ifu_mem_ctl.scala 705:53] + wire [1:0] _GEN_75 = {{1'd0}, _T_308}; // @[el2_ifu_mem_ctl.scala 708:91] + wire [1:0] _T_3058 = ic_fetch_val_shift_right[3:2] & _GEN_75; // @[el2_ifu_mem_ctl.scala 708:91] + reg ifc_iccm_access_f; // @[el2_ifu_mem_ctl.scala 369:31] + wire fetch_req_iccm_f = ifc_fetch_req_f & ifc_iccm_access_f; // @[el2_ifu_mem_ctl.scala 322:46] + wire [1:0] _GEN_76 = {{1'd0}, fetch_req_iccm_f}; // @[el2_ifu_mem_ctl.scala 708:113] + wire [1:0] _T_3059 = _T_3058 & _GEN_76; // @[el2_ifu_mem_ctl.scala 708:113] + reg iccm_dma_rvalid_in; // @[el2_ifu_mem_ctl.scala 694:59] + wire [1:0] _GEN_77 = {{1'd0}, iccm_dma_rvalid_in}; // @[el2_ifu_mem_ctl.scala 708:130] + wire [1:0] _T_3060 = _T_3059 | _GEN_77; // @[el2_ifu_mem_ctl.scala 708:130] + wire _T_3061 = ~io_dec_tlu_core_ecc_disable; // @[el2_ifu_mem_ctl.scala 708:154] + wire [1:0] _GEN_78 = {{1'd0}, _T_3061}; // @[el2_ifu_mem_ctl.scala 708:152] + wire [1:0] _T_3062 = _T_3060 & _GEN_78; // @[el2_ifu_mem_ctl.scala 708:152] + wire [1:0] _T_3051 = ic_fetch_val_shift_right[1:0] & _GEN_75; // @[el2_ifu_mem_ctl.scala 708:91] + wire [1:0] _T_3052 = _T_3051 & _GEN_76; // @[el2_ifu_mem_ctl.scala 708:113] + wire [1:0] _T_3053 = _T_3052 | _GEN_77; // @[el2_ifu_mem_ctl.scala 708:130] + wire [1:0] _T_3055 = _T_3053 & _GEN_78; // @[el2_ifu_mem_ctl.scala 708:152] + wire [3:0] iccm_ecc_word_enable = {_T_3062,_T_3055}; // @[Cat.scala 29:58] + wire _T_3162 = ^io_iccm_rd_data_ecc[31:0]; // @[el2_lib.scala 296:30] + wire _T_3163 = ^io_iccm_rd_data_ecc[38:32]; // @[el2_lib.scala 296:44] + wire _T_3164 = _T_3162 ^ _T_3163; // @[el2_lib.scala 296:35] + wire [5:0] _T_3172 = {io_iccm_rd_data_ecc[31],io_iccm_rd_data_ecc[30],io_iccm_rd_data_ecc[29],io_iccm_rd_data_ecc[28],io_iccm_rd_data_ecc[27],io_iccm_rd_data_ecc[26]}; // @[el2_lib.scala 296:76] + wire _T_3173 = ^_T_3172; // @[el2_lib.scala 296:83] + wire _T_3174 = io_iccm_rd_data_ecc[37] ^ _T_3173; // @[el2_lib.scala 296:71] + wire [6:0] _T_3181 = {io_iccm_rd_data_ecc[17],io_iccm_rd_data_ecc[16],io_iccm_rd_data_ecc[15],io_iccm_rd_data_ecc[14],io_iccm_rd_data_ecc[13],io_iccm_rd_data_ecc[12],io_iccm_rd_data_ecc[11]}; // @[el2_lib.scala 296:103] + wire [14:0] _T_3189 = {io_iccm_rd_data_ecc[25],io_iccm_rd_data_ecc[24],io_iccm_rd_data_ecc[23],io_iccm_rd_data_ecc[22],io_iccm_rd_data_ecc[21],io_iccm_rd_data_ecc[20],io_iccm_rd_data_ecc[19],io_iccm_rd_data_ecc[18],_T_3181}; // @[el2_lib.scala 296:103] + wire _T_3190 = ^_T_3189; // @[el2_lib.scala 296:110] + wire _T_3191 = io_iccm_rd_data_ecc[36] ^ _T_3190; // @[el2_lib.scala 296:98] + wire [6:0] _T_3198 = {io_iccm_rd_data_ecc[10],io_iccm_rd_data_ecc[9],io_iccm_rd_data_ecc[8],io_iccm_rd_data_ecc[7],io_iccm_rd_data_ecc[6],io_iccm_rd_data_ecc[5],io_iccm_rd_data_ecc[4]}; // @[el2_lib.scala 296:130] + wire [14:0] _T_3206 = {io_iccm_rd_data_ecc[25],io_iccm_rd_data_ecc[24],io_iccm_rd_data_ecc[23],io_iccm_rd_data_ecc[22],io_iccm_rd_data_ecc[21],io_iccm_rd_data_ecc[20],io_iccm_rd_data_ecc[19],io_iccm_rd_data_ecc[18],_T_3198}; // @[el2_lib.scala 296:130] + wire _T_3207 = ^_T_3206; // @[el2_lib.scala 296:137] + wire _T_3208 = io_iccm_rd_data_ecc[35] ^ _T_3207; // @[el2_lib.scala 296:125] + wire [8:0] _T_3217 = {io_iccm_rd_data_ecc[15],io_iccm_rd_data_ecc[14],io_iccm_rd_data_ecc[10],io_iccm_rd_data_ecc[9],io_iccm_rd_data_ecc[8],io_iccm_rd_data_ecc[7],io_iccm_rd_data_ecc[3],io_iccm_rd_data_ecc[2],io_iccm_rd_data_ecc[1]}; // @[el2_lib.scala 296:157] + wire [17:0] _T_3226 = {io_iccm_rd_data_ecc[31],io_iccm_rd_data_ecc[30],io_iccm_rd_data_ecc[29],io_iccm_rd_data_ecc[25],io_iccm_rd_data_ecc[24],io_iccm_rd_data_ecc[23],io_iccm_rd_data_ecc[22],io_iccm_rd_data_ecc[17],io_iccm_rd_data_ecc[16],_T_3217}; // @[el2_lib.scala 296:157] + wire _T_3227 = ^_T_3226; // @[el2_lib.scala 296:164] + wire _T_3228 = io_iccm_rd_data_ecc[34] ^ _T_3227; // @[el2_lib.scala 296:152] + wire [8:0] _T_3237 = {io_iccm_rd_data_ecc[13],io_iccm_rd_data_ecc[12],io_iccm_rd_data_ecc[10],io_iccm_rd_data_ecc[9],io_iccm_rd_data_ecc[6],io_iccm_rd_data_ecc[5],io_iccm_rd_data_ecc[3],io_iccm_rd_data_ecc[2],io_iccm_rd_data_ecc[0]}; // @[el2_lib.scala 296:184] + wire [17:0] _T_3246 = {io_iccm_rd_data_ecc[31],io_iccm_rd_data_ecc[28],io_iccm_rd_data_ecc[27],io_iccm_rd_data_ecc[25],io_iccm_rd_data_ecc[24],io_iccm_rd_data_ecc[21],io_iccm_rd_data_ecc[20],io_iccm_rd_data_ecc[17],io_iccm_rd_data_ecc[16],_T_3237}; // @[el2_lib.scala 296:184] + wire _T_3247 = ^_T_3246; // @[el2_lib.scala 296:191] + wire _T_3248 = io_iccm_rd_data_ecc[33] ^ _T_3247; // @[el2_lib.scala 296:179] + wire [8:0] _T_3257 = {io_iccm_rd_data_ecc[13],io_iccm_rd_data_ecc[11],io_iccm_rd_data_ecc[10],io_iccm_rd_data_ecc[8],io_iccm_rd_data_ecc[6],io_iccm_rd_data_ecc[4],io_iccm_rd_data_ecc[3],io_iccm_rd_data_ecc[1],io_iccm_rd_data_ecc[0]}; // @[el2_lib.scala 296:211] + wire [17:0] _T_3266 = {io_iccm_rd_data_ecc[30],io_iccm_rd_data_ecc[28],io_iccm_rd_data_ecc[26],io_iccm_rd_data_ecc[25],io_iccm_rd_data_ecc[23],io_iccm_rd_data_ecc[21],io_iccm_rd_data_ecc[19],io_iccm_rd_data_ecc[17],io_iccm_rd_data_ecc[15],_T_3257}; // @[el2_lib.scala 296:211] + wire _T_3267 = ^_T_3266; // @[el2_lib.scala 296:218] + wire _T_3268 = io_iccm_rd_data_ecc[32] ^ _T_3267; // @[el2_lib.scala 296:206] + wire [6:0] _T_3274 = {_T_3164,_T_3174,_T_3191,_T_3208,_T_3228,_T_3248,_T_3268}; // @[Cat.scala 29:58] + wire _T_3275 = _T_3274 != 7'h0; // @[el2_lib.scala 297:44] + wire _T_3276 = iccm_ecc_word_enable[0] & _T_3275; // @[el2_lib.scala 297:32] + wire _T_3278 = _T_3276 & _T_3274[6]; // @[el2_lib.scala 297:53] + wire _T_3547 = ^io_iccm_rd_data_ecc[70:39]; // @[el2_lib.scala 296:30] + wire _T_3548 = ^io_iccm_rd_data_ecc[77:71]; // @[el2_lib.scala 296:44] + wire _T_3549 = _T_3547 ^ _T_3548; // @[el2_lib.scala 296:35] + wire [5:0] _T_3557 = {io_iccm_rd_data_ecc[70],io_iccm_rd_data_ecc[69],io_iccm_rd_data_ecc[68],io_iccm_rd_data_ecc[67],io_iccm_rd_data_ecc[66],io_iccm_rd_data_ecc[65]}; // @[el2_lib.scala 296:76] + wire _T_3558 = ^_T_3557; // @[el2_lib.scala 296:83] + wire _T_3559 = io_iccm_rd_data_ecc[76] ^ _T_3558; // @[el2_lib.scala 296:71] + wire [6:0] _T_3566 = {io_iccm_rd_data_ecc[56],io_iccm_rd_data_ecc[55],io_iccm_rd_data_ecc[54],io_iccm_rd_data_ecc[53],io_iccm_rd_data_ecc[52],io_iccm_rd_data_ecc[51],io_iccm_rd_data_ecc[50]}; // @[el2_lib.scala 296:103] + wire [14:0] _T_3574 = {io_iccm_rd_data_ecc[64],io_iccm_rd_data_ecc[63],io_iccm_rd_data_ecc[62],io_iccm_rd_data_ecc[61],io_iccm_rd_data_ecc[60],io_iccm_rd_data_ecc[59],io_iccm_rd_data_ecc[58],io_iccm_rd_data_ecc[57],_T_3566}; // @[el2_lib.scala 296:103] + wire _T_3575 = ^_T_3574; // @[el2_lib.scala 296:110] + wire _T_3576 = io_iccm_rd_data_ecc[75] ^ _T_3575; // @[el2_lib.scala 296:98] + wire [6:0] _T_3583 = {io_iccm_rd_data_ecc[49],io_iccm_rd_data_ecc[48],io_iccm_rd_data_ecc[47],io_iccm_rd_data_ecc[46],io_iccm_rd_data_ecc[45],io_iccm_rd_data_ecc[44],io_iccm_rd_data_ecc[43]}; // @[el2_lib.scala 296:130] + wire [14:0] _T_3591 = {io_iccm_rd_data_ecc[64],io_iccm_rd_data_ecc[63],io_iccm_rd_data_ecc[62],io_iccm_rd_data_ecc[61],io_iccm_rd_data_ecc[60],io_iccm_rd_data_ecc[59],io_iccm_rd_data_ecc[58],io_iccm_rd_data_ecc[57],_T_3583}; // @[el2_lib.scala 296:130] + wire _T_3592 = ^_T_3591; // @[el2_lib.scala 296:137] + wire _T_3593 = io_iccm_rd_data_ecc[74] ^ _T_3592; // @[el2_lib.scala 296:125] + wire [8:0] _T_3602 = {io_iccm_rd_data_ecc[54],io_iccm_rd_data_ecc[53],io_iccm_rd_data_ecc[49],io_iccm_rd_data_ecc[48],io_iccm_rd_data_ecc[47],io_iccm_rd_data_ecc[46],io_iccm_rd_data_ecc[42],io_iccm_rd_data_ecc[41],io_iccm_rd_data_ecc[40]}; // @[el2_lib.scala 296:157] + wire [17:0] _T_3611 = {io_iccm_rd_data_ecc[70],io_iccm_rd_data_ecc[69],io_iccm_rd_data_ecc[68],io_iccm_rd_data_ecc[64],io_iccm_rd_data_ecc[63],io_iccm_rd_data_ecc[62],io_iccm_rd_data_ecc[61],io_iccm_rd_data_ecc[56],io_iccm_rd_data_ecc[55],_T_3602}; // @[el2_lib.scala 296:157] + wire _T_3612 = ^_T_3611; // @[el2_lib.scala 296:164] + wire _T_3613 = io_iccm_rd_data_ecc[73] ^ _T_3612; // @[el2_lib.scala 296:152] + wire [8:0] _T_3622 = {io_iccm_rd_data_ecc[52],io_iccm_rd_data_ecc[51],io_iccm_rd_data_ecc[49],io_iccm_rd_data_ecc[48],io_iccm_rd_data_ecc[45],io_iccm_rd_data_ecc[44],io_iccm_rd_data_ecc[42],io_iccm_rd_data_ecc[41],io_iccm_rd_data_ecc[39]}; // @[el2_lib.scala 296:184] + wire [17:0] _T_3631 = {io_iccm_rd_data_ecc[70],io_iccm_rd_data_ecc[67],io_iccm_rd_data_ecc[66],io_iccm_rd_data_ecc[64],io_iccm_rd_data_ecc[63],io_iccm_rd_data_ecc[60],io_iccm_rd_data_ecc[59],io_iccm_rd_data_ecc[56],io_iccm_rd_data_ecc[55],_T_3622}; // @[el2_lib.scala 296:184] + wire _T_3632 = ^_T_3631; // @[el2_lib.scala 296:191] + wire _T_3633 = io_iccm_rd_data_ecc[72] ^ _T_3632; // @[el2_lib.scala 296:179] + wire [8:0] _T_3642 = {io_iccm_rd_data_ecc[52],io_iccm_rd_data_ecc[50],io_iccm_rd_data_ecc[49],io_iccm_rd_data_ecc[47],io_iccm_rd_data_ecc[45],io_iccm_rd_data_ecc[43],io_iccm_rd_data_ecc[42],io_iccm_rd_data_ecc[40],io_iccm_rd_data_ecc[39]}; // @[el2_lib.scala 296:211] + wire [17:0] _T_3651 = {io_iccm_rd_data_ecc[69],io_iccm_rd_data_ecc[67],io_iccm_rd_data_ecc[65],io_iccm_rd_data_ecc[64],io_iccm_rd_data_ecc[62],io_iccm_rd_data_ecc[60],io_iccm_rd_data_ecc[58],io_iccm_rd_data_ecc[56],io_iccm_rd_data_ecc[54],_T_3642}; // @[el2_lib.scala 296:211] + wire _T_3652 = ^_T_3651; // @[el2_lib.scala 296:218] + wire _T_3653 = io_iccm_rd_data_ecc[71] ^ _T_3652; // @[el2_lib.scala 296:206] + wire [6:0] _T_3659 = {_T_3549,_T_3559,_T_3576,_T_3593,_T_3613,_T_3633,_T_3653}; // @[Cat.scala 29:58] + wire _T_3660 = _T_3659 != 7'h0; // @[el2_lib.scala 297:44] + wire _T_3661 = iccm_ecc_word_enable[1] & _T_3660; // @[el2_lib.scala 297:32] + wire _T_3663 = _T_3661 & _T_3659[6]; // @[el2_lib.scala 297:53] + wire [1:0] iccm_single_ecc_error = {_T_3278,_T_3663}; // @[Cat.scala 29:58] + wire _T_4 = |iccm_single_ecc_error; // @[el2_ifu_mem_ctl.scala 239:52] + reg dma_iccm_req_f; // @[el2_ifu_mem_ctl.scala 672:51] + wire _T_7 = io_iccm_rd_ecc_single_err | io_ic_error_start; // @[el2_ifu_mem_ctl.scala 240:57] + reg [2:0] perr_state; // @[Reg.scala 27:20] + wire _T_8 = perr_state == 3'h4; // @[el2_ifu_mem_ctl.scala 241:54] + wire iccm_correct_ecc = perr_state == 3'h3; // @[el2_ifu_mem_ctl.scala 520:34] + wire _T_9 = iccm_correct_ecc | _T_8; // @[el2_ifu_mem_ctl.scala 241:40] + reg [1:0] err_stop_state; // @[Reg.scala 27:20] + wire _T_10 = err_stop_state == 2'h3; // @[el2_ifu_mem_ctl.scala 241:90] + wire _T_11 = _T_9 | _T_10; // @[el2_ifu_mem_ctl.scala 241:72] + wire _T_2429 = 2'h0 == err_stop_state; // @[Conditional.scala 37:30] + wire _T_2434 = 2'h1 == err_stop_state; // @[Conditional.scala 37:30] + wire _T_2454 = io_ifu_fetch_val == 2'h3; // @[el2_ifu_mem_ctl.scala 568:48] + wire two_byte_instr = io_ic_rd_data[1:0] != 2'h3; // @[el2_ifu_mem_ctl.scala 436:39] + wire _T_2456 = io_ifu_fetch_val[0] & two_byte_instr; // @[el2_ifu_mem_ctl.scala 568:79] + wire _T_2457 = _T_2454 | _T_2456; // @[el2_ifu_mem_ctl.scala 568:56] + wire _T_2458 = io_exu_flush_final | io_dec_tlu_i0_commit_cmt; // @[el2_ifu_mem_ctl.scala 568:122] + wire _T_2459 = ~_T_2458; // @[el2_ifu_mem_ctl.scala 568:101] + wire _T_2460 = _T_2457 & _T_2459; // @[el2_ifu_mem_ctl.scala 568:99] + wire _T_2461 = 2'h2 == err_stop_state; // @[Conditional.scala 37:30] + wire _T_2475 = io_ifu_fetch_val[0] & _T_308; // @[el2_ifu_mem_ctl.scala 575:45] + wire _T_2476 = ~io_dec_tlu_i0_commit_cmt; // @[el2_ifu_mem_ctl.scala 575:69] + wire _T_2477 = _T_2475 & _T_2476; // @[el2_ifu_mem_ctl.scala 575:67] + wire _T_2478 = 2'h3 == err_stop_state; // @[Conditional.scala 37:30] + wire _GEN_54 = _T_2461 ? _T_2477 : _T_2478; // @[Conditional.scala 39:67] + wire _GEN_58 = _T_2434 ? _T_2460 : _GEN_54; // @[Conditional.scala 39:67] + wire err_stop_fetch = _T_2429 ? 1'h0 : _GEN_58; // @[Conditional.scala 40:58] + wire _T_12 = _T_11 | err_stop_fetch; // @[el2_ifu_mem_ctl.scala 241:112] + wire _T_14 = io_ifu_axi_rvalid & io_ifu_bus_clk_en; // @[el2_ifu_mem_ctl.scala 242:44] + wire _T_15 = _T_14 & io_ifu_axi_rready; // @[el2_ifu_mem_ctl.scala 242:65] wire _T_219 = |io_ic_rd_hit; // @[el2_ifu_mem_ctl.scala 330:37] wire _T_220 = ~_T_219; // @[el2_ifu_mem_ctl.scala 330:23] - reg ifc_iccm_access_f; // @[el2_ifu_mem_ctl.scala 369:31] wire _T_199 = ~ifc_iccm_access_f; // @[el2_ifu_mem_ctl.scala 321:48] wire fetch_req_icache_f = ifc_fetch_req_f & _T_199; // @[el2_ifu_mem_ctl.scala 321:46] wire _T_222 = _T_220 & fetch_req_icache_f; // @[el2_ifu_mem_ctl.scala 330:59] wire _T_223 = ~miss_pending; // @[el2_ifu_mem_ctl.scala 330:82] wire ic_act_miss_f = _T_222 & _T_223; // @[el2_ifu_mem_ctl.scala 330:80] + reg ifu_bus_rvalid_unq_ff; // @[Reg.scala 27:20] + reg bus_ifu_bus_clk_en_ff; // @[el2_ifu_mem_ctl.scala 588:61] + wire ifu_bus_rvalid_ff = ifu_bus_rvalid_unq_ff & bus_ifu_bus_clk_en_ff; // @[el2_ifu_mem_ctl.scala 629:49] + wire bus_ifu_wr_en_ff = ifu_bus_rvalid_ff & miss_pending; // @[el2_ifu_mem_ctl.scala 656:41] + reg uncacheable_miss_ff; // @[el2_ifu_mem_ctl.scala 357:33] + reg [2:0] bus_data_beat_count; // @[el2_ifu_mem_ctl.scala 637:56] + wire _T_2578 = bus_data_beat_count == 3'h1; // @[el2_ifu_mem_ctl.scala 654:69] + wire _T_2579 = &bus_data_beat_count; // @[el2_ifu_mem_ctl.scala 654:101] + wire bus_last_data_beat = uncacheable_miss_ff ? _T_2578 : _T_2579; // @[el2_ifu_mem_ctl.scala 654:28] + wire _T_2525 = bus_ifu_wr_en_ff & bus_last_data_beat; // @[el2_ifu_mem_ctl.scala 633:68] + wire _T_2526 = ic_act_miss_f | _T_2525; // @[el2_ifu_mem_ctl.scala 633:48] + wire bus_reset_data_beat_cnt = _T_2526 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 633:91] + wire _T_2522 = ~bus_last_data_beat; // @[el2_ifu_mem_ctl.scala 632:50] + wire _T_2523 = bus_ifu_wr_en_ff & _T_2522; // @[el2_ifu_mem_ctl.scala 632:48] + wire _T_2524 = ~io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 632:72] + wire bus_inc_data_beat_cnt = _T_2523 & _T_2524; // @[el2_ifu_mem_ctl.scala 632:70] + wire [2:0] _T_2530 = bus_data_beat_count + 3'h1; // @[el2_ifu_mem_ctl.scala 636:115] + wire [2:0] _T_2532 = bus_inc_data_beat_cnt ? _T_2530 : 3'h0; // @[Mux.scala 27:72] + wire _T_2527 = ~bus_inc_data_beat_cnt; // @[el2_ifu_mem_ctl.scala 634:32] + wire _T_2528 = ~bus_reset_data_beat_cnt; // @[el2_ifu_mem_ctl.scala 634:57] + wire bus_hold_data_beat_cnt = _T_2527 & _T_2528; // @[el2_ifu_mem_ctl.scala 634:55] + wire [2:0] _T_2533 = bus_hold_data_beat_cnt ? bus_data_beat_count : 3'h0; // @[Mux.scala 27:72] + wire [2:0] bus_new_data_beat_count = _T_2532 | _T_2533; // @[Mux.scala 27:72] + wire _T_16 = &bus_new_data_beat_count; // @[el2_ifu_mem_ctl.scala 242:111] + wire _T_17 = _T_15 & _T_16; // @[el2_ifu_mem_ctl.scala 242:85] + wire _T_18 = miss_state == 3'h5; // @[el2_ifu_mem_ctl.scala 243:39] + wire _T_26 = 3'h0 == miss_state; // @[Conditional.scala 37:30] wire _T_28 = ic_act_miss_f & _T_308; // @[el2_ifu_mem_ctl.scala 249:43] wire [2:0] _T_30 = _T_28 ? 3'h1 : 3'h2; // @[el2_ifu_mem_ctl.scala 249:27] wire _T_33 = 3'h1 == miss_state; // @[Conditional.scala 37:30] - reg uncacheable_miss_ff; // @[el2_ifu_mem_ctl.scala 357:33] + wire [4:0] byp_fetch_index = ifu_fetch_addr_int_f[4:0]; // @[el2_ifu_mem_ctl.scala 472:45] + wire _T_2097 = byp_fetch_index[4:2] == 3'h0; // @[el2_ifu_mem_ctl.scala 493:127] + reg [7:0] ic_miss_buff_data_valid; // @[el2_ifu_mem_ctl.scala 449:60] + wire _T_2128 = _T_2097 & ic_miss_buff_data_valid[0]; // @[Mux.scala 27:72] + wire _T_2101 = byp_fetch_index[4:2] == 3'h1; // @[el2_ifu_mem_ctl.scala 493:127] + wire _T_2129 = _T_2101 & ic_miss_buff_data_valid[1]; // @[Mux.scala 27:72] + wire _T_2136 = _T_2128 | _T_2129; // @[Mux.scala 27:72] + wire _T_2105 = byp_fetch_index[4:2] == 3'h2; // @[el2_ifu_mem_ctl.scala 493:127] + wire _T_2130 = _T_2105 & ic_miss_buff_data_valid[2]; // @[Mux.scala 27:72] + wire _T_2137 = _T_2136 | _T_2130; // @[Mux.scala 27:72] + wire _T_2109 = byp_fetch_index[4:2] == 3'h3; // @[el2_ifu_mem_ctl.scala 493:127] + wire _T_2131 = _T_2109 & ic_miss_buff_data_valid[3]; // @[Mux.scala 27:72] + wire _T_2138 = _T_2137 | _T_2131; // @[Mux.scala 27:72] + wire _T_2113 = byp_fetch_index[4:2] == 3'h4; // @[el2_ifu_mem_ctl.scala 493:127] + wire _T_2132 = _T_2113 & ic_miss_buff_data_valid[4]; // @[Mux.scala 27:72] + wire _T_2139 = _T_2138 | _T_2132; // @[Mux.scala 27:72] + wire _T_2117 = byp_fetch_index[4:2] == 3'h5; // @[el2_ifu_mem_ctl.scala 493:127] + wire _T_2133 = _T_2117 & ic_miss_buff_data_valid[5]; // @[Mux.scala 27:72] + wire _T_2140 = _T_2139 | _T_2133; // @[Mux.scala 27:72] + wire _T_2121 = byp_fetch_index[4:2] == 3'h6; // @[el2_ifu_mem_ctl.scala 493:127] + wire _T_2134 = _T_2121 & ic_miss_buff_data_valid[6]; // @[Mux.scala 27:72] + wire _T_2141 = _T_2140 | _T_2134; // @[Mux.scala 27:72] + wire _T_2125 = byp_fetch_index[4:2] == 3'h7; // @[el2_ifu_mem_ctl.scala 493:127] + wire _T_2135 = _T_2125 & ic_miss_buff_data_valid[7]; // @[Mux.scala 27:72] + wire ic_miss_buff_data_valid_bypass_index = _T_2141 | _T_2135; // @[Mux.scala 27:72] + wire _T_2183 = ~byp_fetch_index[1]; // @[el2_ifu_mem_ctl.scala 495:69] + wire _T_2184 = ic_miss_buff_data_valid_bypass_index & _T_2183; // @[el2_ifu_mem_ctl.scala 495:67] + wire _T_2186 = ~byp_fetch_index[0]; // @[el2_ifu_mem_ctl.scala 495:91] + wire _T_2187 = _T_2184 & _T_2186; // @[el2_ifu_mem_ctl.scala 495:89] + wire _T_2192 = _T_2184 & byp_fetch_index[0]; // @[el2_ifu_mem_ctl.scala 496:65] + wire _T_2193 = _T_2187 | _T_2192; // @[el2_ifu_mem_ctl.scala 495:112] + wire _T_2195 = ic_miss_buff_data_valid_bypass_index & byp_fetch_index[1]; // @[el2_ifu_mem_ctl.scala 497:43] + wire _T_2198 = _T_2195 & _T_2186; // @[el2_ifu_mem_ctl.scala 497:65] + wire _T_2199 = _T_2193 | _T_2198; // @[el2_ifu_mem_ctl.scala 496:88] + wire _T_2203 = _T_2195 & byp_fetch_index[0]; // @[el2_ifu_mem_ctl.scala 498:65] + wire [2:0] byp_fetch_index_inc = ifu_fetch_addr_int_f[4:2] + 3'h1; // @[el2_ifu_mem_ctl.scala 475:75] + wire _T_2143 = byp_fetch_index_inc == 3'h0; // @[el2_ifu_mem_ctl.scala 494:110] + wire _T_2167 = _T_2143 & ic_miss_buff_data_valid[0]; // @[Mux.scala 27:72] + wire _T_2146 = byp_fetch_index_inc == 3'h1; // @[el2_ifu_mem_ctl.scala 494:110] + wire _T_2168 = _T_2146 & ic_miss_buff_data_valid[1]; // @[Mux.scala 27:72] + wire _T_2175 = _T_2167 | _T_2168; // @[Mux.scala 27:72] + wire _T_2149 = byp_fetch_index_inc == 3'h2; // @[el2_ifu_mem_ctl.scala 494:110] + wire _T_2169 = _T_2149 & ic_miss_buff_data_valid[2]; // @[Mux.scala 27:72] + wire _T_2176 = _T_2175 | _T_2169; // @[Mux.scala 27:72] + wire _T_2152 = byp_fetch_index_inc == 3'h3; // @[el2_ifu_mem_ctl.scala 494:110] + wire _T_2170 = _T_2152 & ic_miss_buff_data_valid[3]; // @[Mux.scala 27:72] + wire _T_2177 = _T_2176 | _T_2170; // @[Mux.scala 27:72] + wire _T_2155 = byp_fetch_index_inc == 3'h4; // @[el2_ifu_mem_ctl.scala 494:110] + wire _T_2171 = _T_2155 & ic_miss_buff_data_valid[4]; // @[Mux.scala 27:72] + wire _T_2178 = _T_2177 | _T_2171; // @[Mux.scala 27:72] + wire _T_2158 = byp_fetch_index_inc == 3'h5; // @[el2_ifu_mem_ctl.scala 494:110] + wire _T_2172 = _T_2158 & ic_miss_buff_data_valid[5]; // @[Mux.scala 27:72] + wire _T_2179 = _T_2178 | _T_2172; // @[Mux.scala 27:72] + wire _T_2161 = byp_fetch_index_inc == 3'h6; // @[el2_ifu_mem_ctl.scala 494:110] + wire _T_2173 = _T_2161 & ic_miss_buff_data_valid[6]; // @[Mux.scala 27:72] + wire _T_2180 = _T_2179 | _T_2173; // @[Mux.scala 27:72] + wire _T_2164 = byp_fetch_index_inc == 3'h7; // @[el2_ifu_mem_ctl.scala 494:110] + wire _T_2174 = _T_2164 & ic_miss_buff_data_valid[7]; // @[Mux.scala 27:72] + wire ic_miss_buff_data_valid_inc_bypass_index = _T_2180 | _T_2174; // @[Mux.scala 27:72] + wire _T_2204 = _T_2203 & ic_miss_buff_data_valid_inc_bypass_index; // @[el2_ifu_mem_ctl.scala 498:87] + wire _T_2205 = _T_2199 | _T_2204; // @[el2_ifu_mem_ctl.scala 497:88] + wire _T_2215 = _T_2187 & _T_2125; // @[el2_ifu_mem_ctl.scala 499:87] + wire miss_buff_hit_unq_f = _T_2205 | _T_2215; // @[el2_ifu_mem_ctl.scala 498:131] + wire _T_2230 = miss_state == 3'h4; // @[el2_ifu_mem_ctl.scala 504:55] + wire _T_2231 = miss_state == 3'h1; // @[el2_ifu_mem_ctl.scala 504:87] + wire _T_2232 = _T_2230 | _T_2231; // @[el2_ifu_mem_ctl.scala 504:74] + wire crit_byp_hit_f = miss_buff_hit_unq_f & _T_2232; // @[el2_ifu_mem_ctl.scala 504:41] + wire _T_2216 = miss_state == 3'h6; // @[el2_ifu_mem_ctl.scala 501:30] + reg [30:0] imb_ff; // @[el2_ifu_mem_ctl.scala 358:20] + wire miss_wrap_f = imb_ff[5] != ifu_fetch_addr_int_f[6]; // @[el2_ifu_mem_ctl.scala 492:51] + wire _T_2217 = ~miss_wrap_f; // @[el2_ifu_mem_ctl.scala 501:68] + wire _T_2218 = miss_buff_hit_unq_f & _T_2217; // @[el2_ifu_mem_ctl.scala 501:66] + wire stream_hit_f = _T_2216 & _T_2218; // @[el2_ifu_mem_ctl.scala 501:43] + wire _T_207 = crit_byp_hit_f | stream_hit_f; // @[el2_ifu_mem_ctl.scala 325:35] + wire _T_208 = _T_207 & fetch_req_icache_f; // @[el2_ifu_mem_ctl.scala 325:52] + wire ic_byp_hit_f = _T_208 & miss_pending; // @[el2_ifu_mem_ctl.scala 325:73] + reg last_data_recieved_ff; // @[el2_ifu_mem_ctl.scala 639:58] + wire last_beat = bus_last_data_beat & bus_ifu_wr_en_ff; // @[el2_ifu_mem_ctl.scala 666:35] + wire _T_34 = bus_ifu_wr_en_ff & last_beat; // @[el2_ifu_mem_ctl.scala 252:112] + wire _T_35 = last_data_recieved_ff | _T_34; // @[el2_ifu_mem_ctl.scala 252:92] + wire _T_36 = ic_byp_hit_f & _T_35; // @[el2_ifu_mem_ctl.scala 252:66] + wire _T_37 = _T_36 & uncacheable_miss_ff; // @[el2_ifu_mem_ctl.scala 252:126] + wire _T_38 = io_dec_tlu_force_halt | _T_37; // @[el2_ifu_mem_ctl.scala 252:51] + wire _T_40 = ~last_data_recieved_ff; // @[el2_ifu_mem_ctl.scala 253:30] + wire _T_41 = ic_byp_hit_f & _T_40; // @[el2_ifu_mem_ctl.scala 253:27] + wire _T_42 = _T_41 & uncacheable_miss_ff; // @[el2_ifu_mem_ctl.scala 253:53] + wire _T_44 = ~ic_byp_hit_f; // @[el2_ifu_mem_ctl.scala 254:16] + wire _T_46 = _T_44 & _T_308; // @[el2_ifu_mem_ctl.scala 254:30] + wire _T_48 = _T_46 & _T_34; // @[el2_ifu_mem_ctl.scala 254:52] + wire _T_49 = _T_48 & uncacheable_miss_ff; // @[el2_ifu_mem_ctl.scala 254:85] wire _T_52 = ~uncacheable_miss_ff; // @[el2_ifu_mem_ctl.scala 255:51] + wire _T_53 = _T_34 & _T_52; // @[el2_ifu_mem_ctl.scala 255:49] + wire _T_55 = ic_byp_hit_f | bus_ifu_wr_en_ff; // @[el2_ifu_mem_ctl.scala 256:34] + wire _T_57 = _T_55 & _T_308; // @[el2_ifu_mem_ctl.scala 256:54] + wire _T_59 = ~_T_34; // @[el2_ifu_mem_ctl.scala 256:78] + wire _T_60 = _T_57 & _T_59; // @[el2_ifu_mem_ctl.scala 256:76] wire ifu_bp_hit_taken_q_f = io_ifu_bp_hit_taken_f & io_ic_hit_f; // @[el2_ifu_mem_ctl.scala 245:52] + wire _T_61 = ~ifu_bp_hit_taken_q_f; // @[el2_ifu_mem_ctl.scala 256:112] + wire _T_62 = _T_60 & _T_61; // @[el2_ifu_mem_ctl.scala 256:110] + wire _T_64 = _T_62 & _T_52; // @[el2_ifu_mem_ctl.scala 256:134] + wire _T_72 = _T_48 & _T_52; // @[el2_ifu_mem_ctl.scala 257:100] wire _T_74 = io_exu_flush_final | ifu_bp_hit_taken_q_f; // @[el2_ifu_mem_ctl.scala 258:44] - wire [2:0] _T_79 = _T_74 ? 3'h2 : 3'h0; // @[el2_ifu_mem_ctl.scala 258:22] - wire [2:0] _T_85 = io_dec_tlu_force_halt ? 3'h0 : _T_79; // @[el2_ifu_mem_ctl.scala 252:27] + wire _T_77 = _T_74 & _T_59; // @[el2_ifu_mem_ctl.scala 258:68] + wire [2:0] _T_79 = _T_77 ? 3'h2 : 3'h0; // @[el2_ifu_mem_ctl.scala 258:22] + wire [2:0] _T_80 = _T_72 ? 3'h0 : _T_79; // @[el2_ifu_mem_ctl.scala 257:20] + wire [2:0] _T_81 = _T_64 ? 3'h6 : _T_80; // @[el2_ifu_mem_ctl.scala 256:18] + wire [2:0] _T_82 = _T_53 ? 3'h0 : _T_81; // @[el2_ifu_mem_ctl.scala 255:16] + wire [2:0] _T_83 = _T_49 ? 3'h1 : _T_82; // @[el2_ifu_mem_ctl.scala 254:14] + wire [2:0] _T_84 = _T_42 ? 3'h3 : _T_83; // @[el2_ifu_mem_ctl.scala 253:12] + wire [2:0] _T_85 = _T_38 ? 3'h0 : _T_84; // @[el2_ifu_mem_ctl.scala 252:27] wire _T_94 = 3'h4 == miss_state; // @[Conditional.scala 37:30] wire _T_98 = 3'h6 == miss_state; // @[Conditional.scala 37:30] - wire _T_104 = ~io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 266:124] - wire _T_105 = _T_74 & _T_104; // @[el2_ifu_mem_ctl.scala 266:122] + wire _T_2227 = byp_fetch_index[4:1] == 4'h7; // @[el2_ifu_mem_ctl.scala 503:60] + wire _T_2228 = _T_2227 & ifc_fetch_req_f; // @[el2_ifu_mem_ctl.scala 503:92] + wire stream_eol_f = _T_2228 & stream_hit_f; // @[el2_ifu_mem_ctl.scala 503:110] + wire _T_100 = _T_74 | stream_eol_f; // @[el2_ifu_mem_ctl.scala 266:72] + wire _T_103 = _T_100 & _T_59; // @[el2_ifu_mem_ctl.scala 266:87] + wire _T_105 = _T_103 & _T_2524; // @[el2_ifu_mem_ctl.scala 266:122] wire [2:0] _T_107 = _T_105 ? 3'h2 : 3'h0; // @[el2_ifu_mem_ctl.scala 266:27] wire _T_113 = 3'h3 == miss_state; // @[Conditional.scala 37:30] - wire _T_118 = io_exu_flush_final & _T_104; // @[el2_ifu_mem_ctl.scala 270:82] + wire _T_116 = io_exu_flush_final & _T_59; // @[el2_ifu_mem_ctl.scala 270:48] + wire _T_118 = _T_116 & _T_2524; // @[el2_ifu_mem_ctl.scala 270:82] wire [2:0] _T_120 = _T_118 ? 3'h2 : 3'h0; // @[el2_ifu_mem_ctl.scala 270:27] wire _T_124 = 3'h2 == miss_state; // @[Conditional.scala 37:30] wire _T_228 = io_ic_rd_hit == 2'h0; // @[el2_ifu_mem_ctl.scala 331:28] wire _T_230 = _T_228 & fetch_req_icache_f; // @[el2_ifu_mem_ctl.scala 331:60] wire _T_231 = miss_state == 3'h2; // @[el2_ifu_mem_ctl.scala 331:94] wire _T_232 = _T_230 & _T_231; // @[el2_ifu_mem_ctl.scala 331:81] - reg [30:0] imb_ff; // @[el2_ifu_mem_ctl.scala 358:20] - reg [30:0] ifu_fetch_addr_int_f; // @[el2_ifu_mem_ctl.scala 355:34] wire _T_235 = imb_ff[30:5] != ifu_fetch_addr_int_f[30:5]; // @[el2_ifu_mem_ctl.scala 332:39] wire _T_236 = _T_232 & _T_235; // @[el2_ifu_mem_ctl.scala 331:111] - wire ic_miss_under_miss_f = _T_236 & _T_52; // @[el2_ifu_mem_ctl.scala 332:91] - wire _T_129 = ic_miss_under_miss_f & _T_104; // @[el2_ifu_mem_ctl.scala 274:84] + wire _T_238 = _T_236 & _T_52; // @[el2_ifu_mem_ctl.scala 332:91] + reg sel_mb_addr_ff; // @[el2_ifu_mem_ctl.scala 385:51] + wire _T_239 = ~sel_mb_addr_ff; // @[el2_ifu_mem_ctl.scala 332:116] + wire ic_miss_under_miss_f = _T_238 & _T_239; // @[el2_ifu_mem_ctl.scala 332:114] + wire _T_127 = ic_miss_under_miss_f & _T_59; // @[el2_ifu_mem_ctl.scala 274:50] + wire _T_129 = _T_127 & _T_2524; // @[el2_ifu_mem_ctl.scala 274:84] wire _T_248 = _T_222 & _T_231; // @[el2_ifu_mem_ctl.scala 333:85] wire _T_251 = imb_ff[30:5] == ifu_fetch_addr_int_f[30:5]; // @[el2_ifu_mem_ctl.scala 334:39] wire _T_252 = _T_251 | uncacheable_miss_ff; // @[el2_ifu_mem_ctl.scala 334:91] wire ic_ignore_2nd_miss_f = _T_248 & _T_252; // @[el2_ifu_mem_ctl.scala 333:117] - wire _T_135 = ic_ignore_2nd_miss_f & _T_104; // @[el2_ifu_mem_ctl.scala 275:69] + wire _T_133 = ic_ignore_2nd_miss_f & _T_59; // @[el2_ifu_mem_ctl.scala 275:35] + wire _T_135 = _T_133 & _T_2524; // @[el2_ifu_mem_ctl.scala 275:69] wire [2:0] _T_137 = _T_135 ? 3'h7 : 3'h0; // @[el2_ifu_mem_ctl.scala 275:12] wire [2:0] _T_138 = _T_129 ? 3'h5 : _T_137; // @[el2_ifu_mem_ctl.scala 274:27] wire _T_143 = 3'h5 == miss_state; // @[Conditional.scala 37:30] - wire [2:0] _T_147 = io_exu_flush_final ? 3'h2 : 3'h1; // @[el2_ifu_mem_ctl.scala 279:62] + wire [2:0] _T_146 = _T_34 ? 3'h0 : 3'h2; // @[el2_ifu_mem_ctl.scala 280:12] + wire [2:0] _T_147 = io_exu_flush_final ? _T_146 : 3'h1; // @[el2_ifu_mem_ctl.scala 279:62] wire [2:0] _T_148 = io_dec_tlu_force_halt ? 3'h0 : _T_147; // @[el2_ifu_mem_ctl.scala 279:27] wire _T_152 = 3'h7 == miss_state; // @[Conditional.scala 37:30] - wire [2:0] _T_156 = io_exu_flush_final ? 3'h2 : 3'h0; // @[el2_ifu_mem_ctl.scala 284:62] + wire [2:0] _T_156 = io_exu_flush_final ? _T_146 : 3'h0; // @[el2_ifu_mem_ctl.scala 284:62] wire [2:0] _T_157 = io_dec_tlu_force_halt ? 3'h0 : _T_156; // @[el2_ifu_mem_ctl.scala 284:27] wire [2:0] _GEN_0 = _T_152 ? _T_157 : 3'h0; // @[Conditional.scala 39:67] wire [2:0] _GEN_2 = _T_143 ? _T_148 : _GEN_0; // @[Conditional.scala 39:67] @@ -224,45 +518,723 @@ module el2_ifu_mem_ctl( wire [2:0] _GEN_10 = _T_94 ? 3'h0 : _GEN_8; // @[Conditional.scala 39:67] wire [2:0] _GEN_12 = _T_33 ? _T_85 : _GEN_10; // @[Conditional.scala 39:67] wire [2:0] miss_nxtstate = _T_26 ? _T_30 : _GEN_12; // @[Conditional.scala 40:58] - wire _T_32 = ic_act_miss_f & _T_104; // @[el2_ifu_mem_ctl.scala 250:38] + wire _T_19 = miss_nxtstate == 3'h5; // @[el2_ifu_mem_ctl.scala 243:71] + wire _T_20 = _T_18 | _T_19; // @[el2_ifu_mem_ctl.scala 243:55] + wire _T_21 = uncacheable_miss_ff >> _T_20; // @[el2_ifu_mem_ctl.scala 243:26] + wire _T_23 = ~_T_21; // @[el2_ifu_mem_ctl.scala 243:5] + wire _T_24 = _T_17 & _T_23; // @[el2_ifu_mem_ctl.scala 242:116] + wire scnd_miss_req_in = _T_24 & _T_308; // @[el2_ifu_mem_ctl.scala 243:89] + wire _T_32 = ic_act_miss_f & _T_2524; // @[el2_ifu_mem_ctl.scala 250:38] wire _T_86 = io_dec_tlu_force_halt | io_exu_flush_final; // @[el2_ifu_mem_ctl.scala 259:46] - wire _T_88 = _T_86 | ifu_bp_hit_taken_q_f; // @[el2_ifu_mem_ctl.scala 259:82] + wire _T_87 = _T_86 | ic_byp_hit_f; // @[el2_ifu_mem_ctl.scala 259:67] + wire _T_88 = _T_87 | ifu_bp_hit_taken_q_f; // @[el2_ifu_mem_ctl.scala 259:82] + wire _T_90 = _T_88 | _T_34; // @[el2_ifu_mem_ctl.scala 259:105] + wire _T_92 = bus_ifu_wr_en_ff & _T_52; // @[el2_ifu_mem_ctl.scala 259:158] + wire _T_93 = _T_90 | _T_92; // @[el2_ifu_mem_ctl.scala 259:138] wire _T_95 = io_exu_flush_final | flush_final_f; // @[el2_ifu_mem_ctl.scala 263:43] - wire _T_97 = _T_95 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 263:74] - wire _T_112 = _T_74 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 267:118] - wire _T_123 = io_exu_flush_final | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 271:76] - wire _T_141 = ic_miss_under_miss_f | ic_ignore_2nd_miss_f; // @[el2_ifu_mem_ctl.scala 276:78] + wire _T_96 = _T_95 | ic_byp_hit_f; // @[el2_ifu_mem_ctl.scala 263:59] + wire _T_97 = _T_96 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 263:74] + wire _T_111 = _T_100 | _T_34; // @[el2_ifu_mem_ctl.scala 267:84] + wire _T_112 = _T_111 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 267:118] + wire _T_122 = io_exu_flush_final | _T_34; // @[el2_ifu_mem_ctl.scala 271:43] + wire _T_123 = _T_122 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 271:76] + wire _T_140 = _T_34 | ic_miss_under_miss_f; // @[el2_ifu_mem_ctl.scala 276:55] + wire _T_141 = _T_140 | ic_ignore_2nd_miss_f; // @[el2_ifu_mem_ctl.scala 276:78] wire _T_142 = _T_141 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 276:101] - wire _GEN_1 = _T_152 & _T_123; // @[Conditional.scala 39:67] - wire _GEN_3 = _T_143 ? _T_123 : _GEN_1; // @[Conditional.scala 39:67] + wire _T_150 = _T_34 | io_exu_flush_final; // @[el2_ifu_mem_ctl.scala 281:55] + wire _T_151 = _T_150 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 281:76] + wire _GEN_1 = _T_152 & _T_151; // @[Conditional.scala 39:67] + wire _GEN_3 = _T_143 ? _T_151 : _GEN_1; // @[Conditional.scala 39:67] wire _GEN_5 = _T_124 ? _T_142 : _GEN_3; // @[Conditional.scala 39:67] wire _GEN_7 = _T_113 ? _T_123 : _GEN_5; // @[Conditional.scala 39:67] wire _GEN_9 = _T_98 ? _T_112 : _GEN_7; // @[Conditional.scala 39:67] wire _GEN_11 = _T_94 ? _T_97 : _GEN_9; // @[Conditional.scala 39:67] - wire _GEN_13 = _T_33 ? _T_88 : _GEN_11; // @[Conditional.scala 39:67] + wire _GEN_13 = _T_33 ? _T_93 : _GEN_11; // @[Conditional.scala 39:67] wire miss_state_en = _T_26 ? _T_32 : _GEN_13; // @[Conditional.scala 40:58] - wire _T_165 = miss_state == 3'h4; // @[el2_ifu_mem_ctl.scala 301:73] - wire _T_172 = _T_165 & io_exu_flush_final; // @[el2_ifu_mem_ctl.scala 302:106] + wire _T_166 = ~flush_final_f; // @[el2_ifu_mem_ctl.scala 301:95] + wire _T_167 = _T_2230 & _T_166; // @[el2_ifu_mem_ctl.scala 301:93] + wire crit_wd_byp_ok_ff = _T_2231 | _T_167; // @[el2_ifu_mem_ctl.scala 301:58] + wire _T_170 = miss_pending & _T_59; // @[el2_ifu_mem_ctl.scala 302:36] + wire _T_172 = _T_2230 & io_exu_flush_final; // @[el2_ifu_mem_ctl.scala 302:106] wire _T_173 = ~_T_172; // @[el2_ifu_mem_ctl.scala 302:72] - wire _T_174 = miss_pending & _T_173; // @[el2_ifu_mem_ctl.scala 302:70] - wire _T_179 = _T_174 | ic_act_miss_f; // @[el2_ifu_mem_ctl.scala 303:77] + wire _T_174 = _T_170 & _T_173; // @[el2_ifu_mem_ctl.scala 302:70] + wire _T_176 = _T_2230 & crit_byp_hit_f; // @[el2_ifu_mem_ctl.scala 303:57] + wire _T_177 = ~_T_176; // @[el2_ifu_mem_ctl.scala 303:23] + wire _T_178 = _T_174 & _T_177; // @[el2_ifu_mem_ctl.scala 302:128] + wire _T_179 = _T_178 | ic_act_miss_f; // @[el2_ifu_mem_ctl.scala 303:77] wire _T_180 = miss_nxtstate == 3'h4; // @[el2_ifu_mem_ctl.scala 304:36] wire _T_181 = miss_pending & _T_180; // @[el2_ifu_mem_ctl.scala 304:19] wire sel_hold_imb = _T_179 | _T_181; // @[el2_ifu_mem_ctl.scala 303:93] - wire fetch_req_iccm_f = ifc_fetch_req_f & ifc_iccm_access_f; // @[el2_ifu_mem_ctl.scala 322:46] + wire _T_183 = _T_18 | ic_miss_under_miss_f; // @[el2_ifu_mem_ctl.scala 306:57] + wire sel_hold_imb_scnd = _T_183 & _T_166; // @[el2_ifu_mem_ctl.scala 306:81] + reg [30:0] imb_scnd_ff; // @[el2_ifu_mem_ctl.scala 313:25] + reg [2:0] ifu_bus_rid_ff; // @[Reg.scala 27:20] wire _T_204 = _T_223 | _T_231; // @[el2_ifu_mem_ctl.scala 323:59] - wire _T_205 = miss_state == 3'h6; // @[el2_ifu_mem_ctl.scala 323:105] - wire _T_206 = _T_204 | _T_205; // @[el2_ifu_mem_ctl.scala 323:91] + wire _T_206 = _T_204 | _T_2216; // @[el2_ifu_mem_ctl.scala 323:91] wire ic_iccm_hit_f = fetch_req_iccm_f & _T_206; // @[el2_ifu_mem_ctl.scala 323:41] wire _T_211 = _T_219 & fetch_req_icache_f; // @[el2_ifu_mem_ctl.scala 329:39] - wire ic_act_hit_f = _T_211 & _T_204; // @[el2_ifu_mem_ctl.scala 329:78] - wire _T_304 = _T_165 & flush_final_f; // @[el2_ifu_mem_ctl.scala 366:87] + wire _T_217 = _T_211 & _T_204; // @[el2_ifu_mem_ctl.scala 329:78] + wire ic_act_hit_f = _T_217 & _T_239; // @[el2_ifu_mem_ctl.scala 329:126] + wire _T_254 = ic_act_hit_f | ic_byp_hit_f; // @[el2_ifu_mem_ctl.scala 336:31] + wire uncacheable_miss_in = sel_hold_imb ? uncacheable_miss_ff : io_ifc_fetch_uncacheable_bf; // @[el2_ifu_mem_ctl.scala 337:84] + reg scnd_miss_req_q; // @[el2_ifu_mem_ctl.scala 589:52] + reg [25:0] miss_addr; // @[el2_ifu_mem_ctl.scala 362:23] + wire _T_304 = _T_2230 & flush_final_f; // @[el2_ifu_mem_ctl.scala 366:87] wire _T_305 = ~_T_304; // @[el2_ifu_mem_ctl.scala 366:55] - wire ifc_fetch_req_qual_bf = io_ifc_fetch_req_bf & _T_305; // @[el2_ifu_mem_ctl.scala 366:53] + wire _T_306 = io_ifc_fetch_req_bf & _T_305; // @[el2_ifu_mem_ctl.scala 366:53] + wire stream_miss_f = stream_hit_f & ifc_fetch_req_f; // @[el2_ifu_mem_ctl.scala 502:83] + wire _T_307 = ~stream_miss_f; // @[el2_ifu_mem_ctl.scala 366:106] + wire ifc_fetch_req_qual_bf = _T_306 & _T_307; // @[el2_ifu_mem_ctl.scala 366:104] reg ifc_region_acc_fault_f; // @[el2_ifu_mem_ctl.scala 372:39] - wire _T_1179 = |io_ic_eccerr; // @[el2_ifu_mem_ctl.scala 391:56] - reg [70:0] _T_1192; // @[el2_ifu_mem_ctl.scala 397:37] - wire [1:0] _T_1256 = ifc_region_acc_fault_f ? 2'h2 : 2'h0; // @[el2_ifu_mem_ctl.scala 429:8] + reg [2:0] bus_rd_addr_count; // @[Reg.scala 27:20] + wire [28:0] ifu_ic_req_addr_f = {miss_addr,bus_rd_addr_count}; // @[Cat.scala 29:58] + wire _T_2236 = ~ifu_bus_rid_ff[0]; // @[el2_ifu_mem_ctl.scala 507:55] + wire [2:0] other_tag = {ifu_bus_rid_ff[2:1],_T_2236}; // @[Cat.scala 29:58] + wire _T_2237 = other_tag == 3'h0; // @[el2_ifu_mem_ctl.scala 508:81] + wire _T_2261 = _T_2237 & ic_miss_buff_data_valid[0]; // @[Mux.scala 27:72] + wire _T_2240 = other_tag == 3'h1; // @[el2_ifu_mem_ctl.scala 508:81] + wire _T_2262 = _T_2240 & ic_miss_buff_data_valid[1]; // @[Mux.scala 27:72] + wire _T_2269 = _T_2261 | _T_2262; // @[Mux.scala 27:72] + wire _T_2243 = other_tag == 3'h2; // @[el2_ifu_mem_ctl.scala 508:81] + wire _T_2263 = _T_2243 & ic_miss_buff_data_valid[2]; // @[Mux.scala 27:72] + wire _T_2270 = _T_2269 | _T_2263; // @[Mux.scala 27:72] + wire _T_2246 = other_tag == 3'h3; // @[el2_ifu_mem_ctl.scala 508:81] + wire _T_2264 = _T_2246 & ic_miss_buff_data_valid[3]; // @[Mux.scala 27:72] + wire _T_2271 = _T_2270 | _T_2264; // @[Mux.scala 27:72] + wire _T_2249 = other_tag == 3'h4; // @[el2_ifu_mem_ctl.scala 508:81] + wire _T_2265 = _T_2249 & ic_miss_buff_data_valid[4]; // @[Mux.scala 27:72] + wire _T_2272 = _T_2271 | _T_2265; // @[Mux.scala 27:72] + wire _T_2252 = other_tag == 3'h5; // @[el2_ifu_mem_ctl.scala 508:81] + wire _T_2266 = _T_2252 & ic_miss_buff_data_valid[5]; // @[Mux.scala 27:72] + wire _T_2273 = _T_2272 | _T_2266; // @[Mux.scala 27:72] + wire _T_2255 = other_tag == 3'h6; // @[el2_ifu_mem_ctl.scala 508:81] + wire _T_2267 = _T_2255 & ic_miss_buff_data_valid[6]; // @[Mux.scala 27:72] + wire _T_2274 = _T_2273 | _T_2267; // @[Mux.scala 27:72] + wire _T_2258 = other_tag == 3'h7; // @[el2_ifu_mem_ctl.scala 508:81] + wire _T_2268 = _T_2258 & ic_miss_buff_data_valid[7]; // @[Mux.scala 27:72] + wire second_half_available = _T_2274 | _T_2268; // @[Mux.scala 27:72] + wire write_ic_16_bytes = second_half_available & bus_ifu_wr_en_ff; // @[el2_ifu_mem_ctl.scala 509:46] + wire _T_319 = miss_pending & write_ic_16_bytes; // @[el2_ifu_mem_ctl.scala 378:35] + wire _T_321 = _T_319 & _T_52; // @[el2_ifu_mem_ctl.scala 378:55] + reg ic_act_miss_f_delayed; // @[el2_ifu_mem_ctl.scala 659:61] + wire _T_2593 = ic_act_miss_f_delayed & _T_2231; // @[el2_ifu_mem_ctl.scala 660:53] + wire reset_tag_valid_for_miss = _T_2593 & _T_52; // @[el2_ifu_mem_ctl.scala 660:84] + wire sel_mb_addr = _T_321 | reset_tag_valid_for_miss; // @[el2_ifu_mem_ctl.scala 378:79] + reg [63:0] ifu_bus_rdata_ff; // @[Reg.scala 27:20] + wire [7:0] _T_559 = {ifu_bus_rdata_ff[11],ifu_bus_rdata_ff[10],ifu_bus_rdata_ff[8],ifu_bus_rdata_ff[6],ifu_bus_rdata_ff[4],ifu_bus_rdata_ff[3],ifu_bus_rdata_ff[1],ifu_bus_rdata_ff[0]}; // @[el2_lib.scala 343:27] + wire [16:0] _T_568 = {ifu_bus_rdata_ff[28],ifu_bus_rdata_ff[26],ifu_bus_rdata_ff[25],ifu_bus_rdata_ff[23],ifu_bus_rdata_ff[21],ifu_bus_rdata_ff[19],ifu_bus_rdata_ff[17],ifu_bus_rdata_ff[15],ifu_bus_rdata_ff[13],_T_559}; // @[el2_lib.scala 343:27] + wire [8:0] _T_576 = {ifu_bus_rdata_ff[46],ifu_bus_rdata_ff[44],ifu_bus_rdata_ff[42],ifu_bus_rdata_ff[40],ifu_bus_rdata_ff[38],ifu_bus_rdata_ff[36],ifu_bus_rdata_ff[34],ifu_bus_rdata_ff[32],ifu_bus_rdata_ff[30]}; // @[el2_lib.scala 343:27] + wire [17:0] _T_585 = {ifu_bus_rdata_ff[63],ifu_bus_rdata_ff[61],ifu_bus_rdata_ff[59],ifu_bus_rdata_ff[57],ifu_bus_rdata_ff[56],ifu_bus_rdata_ff[54],ifu_bus_rdata_ff[52],ifu_bus_rdata_ff[50],ifu_bus_rdata_ff[48],_T_576}; // @[el2_lib.scala 343:27] + wire [34:0] _T_586 = {_T_585,_T_568}; // @[el2_lib.scala 343:27] + wire _T_587 = ^_T_586; // @[el2_lib.scala 343:34] + wire [7:0] _T_594 = {ifu_bus_rdata_ff[12],ifu_bus_rdata_ff[10],ifu_bus_rdata_ff[9],ifu_bus_rdata_ff[6],ifu_bus_rdata_ff[5],ifu_bus_rdata_ff[3],ifu_bus_rdata_ff[2],ifu_bus_rdata_ff[0]}; // @[el2_lib.scala 343:44] + wire [16:0] _T_603 = {ifu_bus_rdata_ff[28],ifu_bus_rdata_ff[27],ifu_bus_rdata_ff[25],ifu_bus_rdata_ff[24],ifu_bus_rdata_ff[21],ifu_bus_rdata_ff[20],ifu_bus_rdata_ff[17],ifu_bus_rdata_ff[16],ifu_bus_rdata_ff[13],_T_594}; // @[el2_lib.scala 343:44] + wire [8:0] _T_611 = {ifu_bus_rdata_ff[47],ifu_bus_rdata_ff[44],ifu_bus_rdata_ff[43],ifu_bus_rdata_ff[40],ifu_bus_rdata_ff[39],ifu_bus_rdata_ff[36],ifu_bus_rdata_ff[35],ifu_bus_rdata_ff[32],ifu_bus_rdata_ff[31]}; // @[el2_lib.scala 343:44] + wire [17:0] _T_620 = {ifu_bus_rdata_ff[63],ifu_bus_rdata_ff[62],ifu_bus_rdata_ff[59],ifu_bus_rdata_ff[58],ifu_bus_rdata_ff[56],ifu_bus_rdata_ff[55],ifu_bus_rdata_ff[52],ifu_bus_rdata_ff[51],ifu_bus_rdata_ff[48],_T_611}; // @[el2_lib.scala 343:44] + wire [34:0] _T_621 = {_T_620,_T_603}; // @[el2_lib.scala 343:44] + wire _T_622 = ^_T_621; // @[el2_lib.scala 343:51] + wire [7:0] _T_629 = {ifu_bus_rdata_ff[14],ifu_bus_rdata_ff[10],ifu_bus_rdata_ff[9],ifu_bus_rdata_ff[8],ifu_bus_rdata_ff[7],ifu_bus_rdata_ff[3],ifu_bus_rdata_ff[2],ifu_bus_rdata_ff[1]}; // @[el2_lib.scala 343:61] + wire [16:0] _T_638 = {ifu_bus_rdata_ff[30],ifu_bus_rdata_ff[29],ifu_bus_rdata_ff[25],ifu_bus_rdata_ff[24],ifu_bus_rdata_ff[23],ifu_bus_rdata_ff[22],ifu_bus_rdata_ff[17],ifu_bus_rdata_ff[16],ifu_bus_rdata_ff[15],_T_629}; // @[el2_lib.scala 343:61] + wire [8:0] _T_646 = {ifu_bus_rdata_ff[47],ifu_bus_rdata_ff[46],ifu_bus_rdata_ff[45],ifu_bus_rdata_ff[40],ifu_bus_rdata_ff[39],ifu_bus_rdata_ff[38],ifu_bus_rdata_ff[37],ifu_bus_rdata_ff[32],ifu_bus_rdata_ff[31]}; // @[el2_lib.scala 343:61] + wire [17:0] _T_655 = {ifu_bus_rdata_ff[63],ifu_bus_rdata_ff[62],ifu_bus_rdata_ff[61],ifu_bus_rdata_ff[60],ifu_bus_rdata_ff[56],ifu_bus_rdata_ff[55],ifu_bus_rdata_ff[54],ifu_bus_rdata_ff[53],ifu_bus_rdata_ff[48],_T_646}; // @[el2_lib.scala 343:61] + wire [34:0] _T_656 = {_T_655,_T_638}; // @[el2_lib.scala 343:61] + wire _T_657 = ^_T_656; // @[el2_lib.scala 343:68] + wire [6:0] _T_663 = {ifu_bus_rdata_ff[10],ifu_bus_rdata_ff[9],ifu_bus_rdata_ff[8],ifu_bus_rdata_ff[7],ifu_bus_rdata_ff[6],ifu_bus_rdata_ff[5],ifu_bus_rdata_ff[4]}; // @[el2_lib.scala 343:78] + wire [14:0] _T_671 = {ifu_bus_rdata_ff[25],ifu_bus_rdata_ff[24],ifu_bus_rdata_ff[23],ifu_bus_rdata_ff[22],ifu_bus_rdata_ff[21],ifu_bus_rdata_ff[20],ifu_bus_rdata_ff[19],ifu_bus_rdata_ff[18],_T_663}; // @[el2_lib.scala 343:78] + wire [7:0] _T_678 = {ifu_bus_rdata_ff[40],ifu_bus_rdata_ff[39],ifu_bus_rdata_ff[38],ifu_bus_rdata_ff[37],ifu_bus_rdata_ff[36],ifu_bus_rdata_ff[35],ifu_bus_rdata_ff[34],ifu_bus_rdata_ff[33]}; // @[el2_lib.scala 343:78] + wire [30:0] _T_687 = {ifu_bus_rdata_ff[56],ifu_bus_rdata_ff[55],ifu_bus_rdata_ff[54],ifu_bus_rdata_ff[53],ifu_bus_rdata_ff[52],ifu_bus_rdata_ff[51],ifu_bus_rdata_ff[50],ifu_bus_rdata_ff[49],_T_678,_T_671}; // @[el2_lib.scala 343:78] + wire _T_688 = ^_T_687; // @[el2_lib.scala 343:85] + wire [6:0] _T_694 = {ifu_bus_rdata_ff[17],ifu_bus_rdata_ff[16],ifu_bus_rdata_ff[15],ifu_bus_rdata_ff[14],ifu_bus_rdata_ff[13],ifu_bus_rdata_ff[12],ifu_bus_rdata_ff[11]}; // @[el2_lib.scala 343:95] + wire [14:0] _T_702 = {ifu_bus_rdata_ff[25],ifu_bus_rdata_ff[24],ifu_bus_rdata_ff[23],ifu_bus_rdata_ff[22],ifu_bus_rdata_ff[21],ifu_bus_rdata_ff[20],ifu_bus_rdata_ff[19],ifu_bus_rdata_ff[18],_T_694}; // @[el2_lib.scala 343:95] + wire [7:0] _T_709 = {ifu_bus_rdata_ff[48],ifu_bus_rdata_ff[47],ifu_bus_rdata_ff[46],ifu_bus_rdata_ff[45],ifu_bus_rdata_ff[44],ifu_bus_rdata_ff[43],ifu_bus_rdata_ff[42],ifu_bus_rdata_ff[41]}; // @[el2_lib.scala 343:95] + wire [30:0] _T_718 = {ifu_bus_rdata_ff[56],ifu_bus_rdata_ff[55],ifu_bus_rdata_ff[54],ifu_bus_rdata_ff[53],ifu_bus_rdata_ff[52],ifu_bus_rdata_ff[51],ifu_bus_rdata_ff[50],ifu_bus_rdata_ff[49],_T_709,_T_702}; // @[el2_lib.scala 343:95] + wire _T_719 = ^_T_718; // @[el2_lib.scala 343:102] + wire [6:0] _T_725 = {ifu_bus_rdata_ff[32],ifu_bus_rdata_ff[31],ifu_bus_rdata_ff[30],ifu_bus_rdata_ff[29],ifu_bus_rdata_ff[28],ifu_bus_rdata_ff[27],ifu_bus_rdata_ff[26]}; // @[el2_lib.scala 343:112] + wire [14:0] _T_733 = {ifu_bus_rdata_ff[40],ifu_bus_rdata_ff[39],ifu_bus_rdata_ff[38],ifu_bus_rdata_ff[37],ifu_bus_rdata_ff[36],ifu_bus_rdata_ff[35],ifu_bus_rdata_ff[34],ifu_bus_rdata_ff[33],_T_725}; // @[el2_lib.scala 343:112] + wire [30:0] _T_749 = {ifu_bus_rdata_ff[56],ifu_bus_rdata_ff[55],ifu_bus_rdata_ff[54],ifu_bus_rdata_ff[53],ifu_bus_rdata_ff[52],ifu_bus_rdata_ff[51],ifu_bus_rdata_ff[50],ifu_bus_rdata_ff[49],_T_709,_T_733}; // @[el2_lib.scala 343:112] + wire _T_750 = ^_T_749; // @[el2_lib.scala 343:119] + wire [6:0] _T_756 = {ifu_bus_rdata_ff[63],ifu_bus_rdata_ff[62],ifu_bus_rdata_ff[61],ifu_bus_rdata_ff[60],ifu_bus_rdata_ff[59],ifu_bus_rdata_ff[58],ifu_bus_rdata_ff[57]}; // @[el2_lib.scala 343:129] + wire _T_757 = ^_T_756; // @[el2_lib.scala 343:136] + wire [3:0] _T_2277 = {ifu_bus_rid_ff[2:1],_T_2236,1'h1}; // @[Cat.scala 29:58] + wire _T_2278 = _T_2277 == 4'h0; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1284; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_0 = _T_1284[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 445:26] + wire [31:0] _T_2325 = _T_2278 ? ic_miss_buff_data_0 : 32'h0; // @[Mux.scala 27:72] + wire _T_2281 = _T_2277 == 4'h1; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1286; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_1 = _T_1286[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 446:28] + wire [31:0] _T_2326 = _T_2281 ? ic_miss_buff_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2341 = _T_2325 | _T_2326; // @[Mux.scala 27:72] + wire _T_2284 = _T_2277 == 4'h2; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1288; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_2 = _T_1288[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 445:26] + wire [31:0] _T_2327 = _T_2284 ? ic_miss_buff_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2342 = _T_2341 | _T_2327; // @[Mux.scala 27:72] + wire _T_2287 = _T_2277 == 4'h3; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1290; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_3 = _T_1290[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 446:28] + wire [31:0] _T_2328 = _T_2287 ? ic_miss_buff_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2343 = _T_2342 | _T_2328; // @[Mux.scala 27:72] + wire _T_2290 = _T_2277 == 4'h4; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1292; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_4 = _T_1292[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 445:26] + wire [31:0] _T_2329 = _T_2290 ? ic_miss_buff_data_4 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2344 = _T_2343 | _T_2329; // @[Mux.scala 27:72] + wire _T_2293 = _T_2277 == 4'h5; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1294; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_5 = _T_1294[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 446:28] + wire [31:0] _T_2330 = _T_2293 ? ic_miss_buff_data_5 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2345 = _T_2344 | _T_2330; // @[Mux.scala 27:72] + wire _T_2296 = _T_2277 == 4'h6; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1296; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_6 = _T_1296[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 445:26] + wire [31:0] _T_2331 = _T_2296 ? ic_miss_buff_data_6 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2346 = _T_2345 | _T_2331; // @[Mux.scala 27:72] + wire _T_2299 = _T_2277 == 4'h7; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1298; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_7 = _T_1298[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 446:28] + wire [31:0] _T_2332 = _T_2299 ? ic_miss_buff_data_7 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2347 = _T_2346 | _T_2332; // @[Mux.scala 27:72] + wire _T_2302 = _T_2277 == 4'h8; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1300; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_8 = _T_1300[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 445:26] + wire [31:0] _T_2333 = _T_2302 ? ic_miss_buff_data_8 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2348 = _T_2347 | _T_2333; // @[Mux.scala 27:72] + wire _T_2305 = _T_2277 == 4'h9; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1302; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_9 = _T_1302[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 446:28] + wire [31:0] _T_2334 = _T_2305 ? ic_miss_buff_data_9 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2349 = _T_2348 | _T_2334; // @[Mux.scala 27:72] + wire _T_2308 = _T_2277 == 4'ha; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1304; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_10 = _T_1304[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 445:26] + wire [31:0] _T_2335 = _T_2308 ? ic_miss_buff_data_10 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2350 = _T_2349 | _T_2335; // @[Mux.scala 27:72] + wire _T_2311 = _T_2277 == 4'hb; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1306; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_11 = _T_1306[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 446:28] + wire [31:0] _T_2336 = _T_2311 ? ic_miss_buff_data_11 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2351 = _T_2350 | _T_2336; // @[Mux.scala 27:72] + wire _T_2314 = _T_2277 == 4'hc; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1308; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_12 = _T_1308[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 445:26] + wire [31:0] _T_2337 = _T_2314 ? ic_miss_buff_data_12 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2352 = _T_2351 | _T_2337; // @[Mux.scala 27:72] + wire _T_2317 = _T_2277 == 4'hd; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1310; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_13 = _T_1310[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 446:28] + wire [31:0] _T_2338 = _T_2317 ? ic_miss_buff_data_13 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2353 = _T_2352 | _T_2338; // @[Mux.scala 27:72] + wire _T_2320 = _T_2277 == 4'he; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1312; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_14 = _T_1312[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 445:26] + wire [31:0] _T_2339 = _T_2320 ? ic_miss_buff_data_14 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2354 = _T_2353 | _T_2339; // @[Mux.scala 27:72] + wire _T_2323 = _T_2277 == 4'hf; // @[el2_ifu_mem_ctl.scala 510:89] + reg [63:0] _T_1314; // @[Reg.scala 27:20] + wire [31:0] ic_miss_buff_data_15 = _T_1314[31:0]; // @[el2_ifu_mem_ctl.scala 443:31 el2_ifu_mem_ctl.scala 446:28] + wire [31:0] _T_2340 = _T_2323 ? ic_miss_buff_data_15 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2355 = _T_2354 | _T_2340; // @[Mux.scala 27:72] + wire [3:0] _T_2357 = {ifu_bus_rid_ff[2:1],_T_2236,1'h0}; // @[Cat.scala 29:58] + wire _T_2358 = _T_2357 == 4'h0; // @[el2_ifu_mem_ctl.scala 511:64] + wire [31:0] _T_2381 = _T_2358 ? ic_miss_buff_data_0 : 32'h0; // @[Mux.scala 27:72] + wire _T_2361 = _T_2357 == 4'h1; // @[el2_ifu_mem_ctl.scala 511:64] + wire [31:0] _T_2382 = _T_2361 ? ic_miss_buff_data_1 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2389 = _T_2381 | _T_2382; // @[Mux.scala 27:72] + wire _T_2364 = _T_2357 == 4'h2; // @[el2_ifu_mem_ctl.scala 511:64] + wire [31:0] _T_2383 = _T_2364 ? ic_miss_buff_data_2 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2390 = _T_2389 | _T_2383; // @[Mux.scala 27:72] + wire _T_2367 = _T_2357 == 4'h3; // @[el2_ifu_mem_ctl.scala 511:64] + wire [31:0] _T_2384 = _T_2367 ? ic_miss_buff_data_3 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2391 = _T_2390 | _T_2384; // @[Mux.scala 27:72] + wire _T_2370 = _T_2357 == 4'h4; // @[el2_ifu_mem_ctl.scala 511:64] + wire [31:0] _T_2385 = _T_2370 ? ic_miss_buff_data_4 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2392 = _T_2391 | _T_2385; // @[Mux.scala 27:72] + wire _T_2373 = _T_2357 == 4'h5; // @[el2_ifu_mem_ctl.scala 511:64] + wire [31:0] _T_2386 = _T_2373 ? ic_miss_buff_data_5 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2393 = _T_2392 | _T_2386; // @[Mux.scala 27:72] + wire _T_2376 = _T_2357 == 4'h6; // @[el2_ifu_mem_ctl.scala 511:64] + wire [31:0] _T_2387 = _T_2376 ? ic_miss_buff_data_6 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2394 = _T_2393 | _T_2387; // @[Mux.scala 27:72] + wire _T_2379 = _T_2357 == 4'h7; // @[el2_ifu_mem_ctl.scala 511:64] + wire [31:0] _T_2388 = _T_2379 ? ic_miss_buff_data_7 : 32'h0; // @[Mux.scala 27:72] + wire [31:0] _T_2395 = _T_2394 | _T_2388; // @[Mux.scala 27:72] + wire [63:0] ic_miss_buff_half = {_T_2355,_T_2395}; // @[Cat.scala 29:58] + wire [7:0] _T_981 = {ic_miss_buff_half[11],ic_miss_buff_half[10],ic_miss_buff_half[8],ic_miss_buff_half[6],ic_miss_buff_half[4],ic_miss_buff_half[3],ic_miss_buff_half[1],ic_miss_buff_half[0]}; // @[el2_lib.scala 343:27] + wire [16:0] _T_990 = {ic_miss_buff_half[28],ic_miss_buff_half[26],ic_miss_buff_half[25],ic_miss_buff_half[23],ic_miss_buff_half[21],ic_miss_buff_half[19],ic_miss_buff_half[17],ic_miss_buff_half[15],ic_miss_buff_half[13],_T_981}; // @[el2_lib.scala 343:27] + wire [8:0] _T_998 = {ic_miss_buff_half[46],ic_miss_buff_half[44],ic_miss_buff_half[42],ic_miss_buff_half[40],ic_miss_buff_half[38],ic_miss_buff_half[36],ic_miss_buff_half[34],ic_miss_buff_half[32],ic_miss_buff_half[30]}; // @[el2_lib.scala 343:27] + wire [17:0] _T_1007 = {ic_miss_buff_half[63],ic_miss_buff_half[61],ic_miss_buff_half[59],ic_miss_buff_half[57],ic_miss_buff_half[56],ic_miss_buff_half[54],ic_miss_buff_half[52],ic_miss_buff_half[50],ic_miss_buff_half[48],_T_998}; // @[el2_lib.scala 343:27] + wire [34:0] _T_1008 = {_T_1007,_T_990}; // @[el2_lib.scala 343:27] + wire _T_1009 = ^_T_1008; // @[el2_lib.scala 343:34] + wire [7:0] _T_1016 = {ic_miss_buff_half[12],ic_miss_buff_half[10],ic_miss_buff_half[9],ic_miss_buff_half[6],ic_miss_buff_half[5],ic_miss_buff_half[3],ic_miss_buff_half[2],ic_miss_buff_half[0]}; // @[el2_lib.scala 343:44] + wire [16:0] _T_1025 = {ic_miss_buff_half[28],ic_miss_buff_half[27],ic_miss_buff_half[25],ic_miss_buff_half[24],ic_miss_buff_half[21],ic_miss_buff_half[20],ic_miss_buff_half[17],ic_miss_buff_half[16],ic_miss_buff_half[13],_T_1016}; // @[el2_lib.scala 343:44] + wire [8:0] _T_1033 = {ic_miss_buff_half[47],ic_miss_buff_half[44],ic_miss_buff_half[43],ic_miss_buff_half[40],ic_miss_buff_half[39],ic_miss_buff_half[36],ic_miss_buff_half[35],ic_miss_buff_half[32],ic_miss_buff_half[31]}; // @[el2_lib.scala 343:44] + wire [17:0] _T_1042 = {ic_miss_buff_half[63],ic_miss_buff_half[62],ic_miss_buff_half[59],ic_miss_buff_half[58],ic_miss_buff_half[56],ic_miss_buff_half[55],ic_miss_buff_half[52],ic_miss_buff_half[51],ic_miss_buff_half[48],_T_1033}; // @[el2_lib.scala 343:44] + wire [34:0] _T_1043 = {_T_1042,_T_1025}; // @[el2_lib.scala 343:44] + wire _T_1044 = ^_T_1043; // @[el2_lib.scala 343:51] + wire [7:0] _T_1051 = {ic_miss_buff_half[14],ic_miss_buff_half[10],ic_miss_buff_half[9],ic_miss_buff_half[8],ic_miss_buff_half[7],ic_miss_buff_half[3],ic_miss_buff_half[2],ic_miss_buff_half[1]}; // @[el2_lib.scala 343:61] + wire [16:0] _T_1060 = {ic_miss_buff_half[30],ic_miss_buff_half[29],ic_miss_buff_half[25],ic_miss_buff_half[24],ic_miss_buff_half[23],ic_miss_buff_half[22],ic_miss_buff_half[17],ic_miss_buff_half[16],ic_miss_buff_half[15],_T_1051}; // @[el2_lib.scala 343:61] + wire [8:0] _T_1068 = {ic_miss_buff_half[47],ic_miss_buff_half[46],ic_miss_buff_half[45],ic_miss_buff_half[40],ic_miss_buff_half[39],ic_miss_buff_half[38],ic_miss_buff_half[37],ic_miss_buff_half[32],ic_miss_buff_half[31]}; // @[el2_lib.scala 343:61] + wire [17:0] _T_1077 = {ic_miss_buff_half[63],ic_miss_buff_half[62],ic_miss_buff_half[61],ic_miss_buff_half[60],ic_miss_buff_half[56],ic_miss_buff_half[55],ic_miss_buff_half[54],ic_miss_buff_half[53],ic_miss_buff_half[48],_T_1068}; // @[el2_lib.scala 343:61] + wire [34:0] _T_1078 = {_T_1077,_T_1060}; // @[el2_lib.scala 343:61] + wire _T_1079 = ^_T_1078; // @[el2_lib.scala 343:68] + wire [6:0] _T_1085 = {ic_miss_buff_half[10],ic_miss_buff_half[9],ic_miss_buff_half[8],ic_miss_buff_half[7],ic_miss_buff_half[6],ic_miss_buff_half[5],ic_miss_buff_half[4]}; // @[el2_lib.scala 343:78] + wire [14:0] _T_1093 = {ic_miss_buff_half[25],ic_miss_buff_half[24],ic_miss_buff_half[23],ic_miss_buff_half[22],ic_miss_buff_half[21],ic_miss_buff_half[20],ic_miss_buff_half[19],ic_miss_buff_half[18],_T_1085}; // @[el2_lib.scala 343:78] + wire [7:0] _T_1100 = {ic_miss_buff_half[40],ic_miss_buff_half[39],ic_miss_buff_half[38],ic_miss_buff_half[37],ic_miss_buff_half[36],ic_miss_buff_half[35],ic_miss_buff_half[34],ic_miss_buff_half[33]}; // @[el2_lib.scala 343:78] + wire [30:0] _T_1109 = {ic_miss_buff_half[56],ic_miss_buff_half[55],ic_miss_buff_half[54],ic_miss_buff_half[53],ic_miss_buff_half[52],ic_miss_buff_half[51],ic_miss_buff_half[50],ic_miss_buff_half[49],_T_1100,_T_1093}; // @[el2_lib.scala 343:78] + wire _T_1110 = ^_T_1109; // @[el2_lib.scala 343:85] + wire [6:0] _T_1116 = {ic_miss_buff_half[17],ic_miss_buff_half[16],ic_miss_buff_half[15],ic_miss_buff_half[14],ic_miss_buff_half[13],ic_miss_buff_half[12],ic_miss_buff_half[11]}; // @[el2_lib.scala 343:95] + wire [14:0] _T_1124 = {ic_miss_buff_half[25],ic_miss_buff_half[24],ic_miss_buff_half[23],ic_miss_buff_half[22],ic_miss_buff_half[21],ic_miss_buff_half[20],ic_miss_buff_half[19],ic_miss_buff_half[18],_T_1116}; // @[el2_lib.scala 343:95] + wire [7:0] _T_1131 = {ic_miss_buff_half[48],ic_miss_buff_half[47],ic_miss_buff_half[46],ic_miss_buff_half[45],ic_miss_buff_half[44],ic_miss_buff_half[43],ic_miss_buff_half[42],ic_miss_buff_half[41]}; // @[el2_lib.scala 343:95] + wire [30:0] _T_1140 = {ic_miss_buff_half[56],ic_miss_buff_half[55],ic_miss_buff_half[54],ic_miss_buff_half[53],ic_miss_buff_half[52],ic_miss_buff_half[51],ic_miss_buff_half[50],ic_miss_buff_half[49],_T_1131,_T_1124}; // @[el2_lib.scala 343:95] + wire _T_1141 = ^_T_1140; // @[el2_lib.scala 343:102] + wire [6:0] _T_1147 = {ic_miss_buff_half[32],ic_miss_buff_half[31],ic_miss_buff_half[30],ic_miss_buff_half[29],ic_miss_buff_half[28],ic_miss_buff_half[27],ic_miss_buff_half[26]}; // @[el2_lib.scala 343:112] + wire [14:0] _T_1155 = {ic_miss_buff_half[40],ic_miss_buff_half[39],ic_miss_buff_half[38],ic_miss_buff_half[37],ic_miss_buff_half[36],ic_miss_buff_half[35],ic_miss_buff_half[34],ic_miss_buff_half[33],_T_1147}; // @[el2_lib.scala 343:112] + wire [30:0] _T_1171 = {ic_miss_buff_half[56],ic_miss_buff_half[55],ic_miss_buff_half[54],ic_miss_buff_half[53],ic_miss_buff_half[52],ic_miss_buff_half[51],ic_miss_buff_half[50],ic_miss_buff_half[49],_T_1131,_T_1155}; // @[el2_lib.scala 343:112] + wire _T_1172 = ^_T_1171; // @[el2_lib.scala 343:119] + wire [6:0] _T_1178 = {ic_miss_buff_half[63],ic_miss_buff_half[62],ic_miss_buff_half[61],ic_miss_buff_half[60],ic_miss_buff_half[59],ic_miss_buff_half[58],ic_miss_buff_half[57]}; // @[el2_lib.scala 343:129] + wire _T_1179 = ^_T_1178; // @[el2_lib.scala 343:136] + wire [70:0] _T_1226 = {_T_587,_T_622,_T_657,_T_688,_T_719,_T_750,_T_757,ifu_bus_rdata_ff}; // @[Cat.scala 29:58] + wire [70:0] _T_1225 = {_T_1009,_T_1044,_T_1079,_T_1110,_T_1141,_T_1172,_T_1179,_T_2355,_T_2395}; // @[Cat.scala 29:58] + wire [141:0] _T_1227 = {_T_587,_T_622,_T_657,_T_688,_T_719,_T_750,_T_757,ifu_bus_rdata_ff,_T_1225}; // @[Cat.scala 29:58] + wire [141:0] _T_1230 = {_T_1009,_T_1044,_T_1079,_T_1110,_T_1141,_T_1172,_T_1179,_T_2355,_T_2395,_T_1226}; // @[Cat.scala 29:58] + wire [141:0] ic_wr_16bytes_data = ifu_bus_rid_ff[0] ? _T_1227 : _T_1230; // @[el2_ifu_mem_ctl.scala 404:28] + wire _T_1187 = |io_ic_eccerr; // @[el2_ifu_mem_ctl.scala 394:56] + wire _T_1188 = _T_1187 & ic_act_hit_f; // @[el2_ifu_mem_ctl.scala 394:83] + wire [4:0] bypass_index = imb_ff[4:0]; // @[el2_ifu_mem_ctl.scala 457:28] + wire _T_1390 = bypass_index[4:2] == 3'h0; // @[el2_ifu_mem_ctl.scala 459:114] + wire bus_ifu_wr_en = _T_14 & miss_pending; // @[el2_ifu_mem_ctl.scala 655:35] + wire _T_1275 = io_ifu_axi_rid == 3'h0; // @[el2_ifu_mem_ctl.scala 442:91] + wire write_fill_data_0 = bus_ifu_wr_en & _T_1275; // @[el2_ifu_mem_ctl.scala 442:73] + wire _T_1316 = ~ic_act_miss_f; // @[el2_ifu_mem_ctl.scala 448:118] + wire _T_1317 = ic_miss_buff_data_valid[0] & _T_1316; // @[el2_ifu_mem_ctl.scala 448:116] + wire ic_miss_buff_data_valid_in_0 = write_fill_data_0 | _T_1317; // @[el2_ifu_mem_ctl.scala 448:88] + wire _T_1413 = _T_1390 & ic_miss_buff_data_valid_in_0; // @[Mux.scala 27:72] + wire _T_1393 = bypass_index[4:2] == 3'h1; // @[el2_ifu_mem_ctl.scala 459:114] + wire _T_1276 = io_ifu_axi_rid == 3'h1; // @[el2_ifu_mem_ctl.scala 442:91] + wire write_fill_data_1 = bus_ifu_wr_en & _T_1276; // @[el2_ifu_mem_ctl.scala 442:73] + wire _T_1320 = ic_miss_buff_data_valid[1] & _T_1316; // @[el2_ifu_mem_ctl.scala 448:116] + wire ic_miss_buff_data_valid_in_1 = write_fill_data_1 | _T_1320; // @[el2_ifu_mem_ctl.scala 448:88] + wire _T_1414 = _T_1393 & ic_miss_buff_data_valid_in_1; // @[Mux.scala 27:72] + wire _T_1421 = _T_1413 | _T_1414; // @[Mux.scala 27:72] + wire _T_1396 = bypass_index[4:2] == 3'h2; // @[el2_ifu_mem_ctl.scala 459:114] + wire _T_1277 = io_ifu_axi_rid == 3'h2; // @[el2_ifu_mem_ctl.scala 442:91] + wire write_fill_data_2 = bus_ifu_wr_en & _T_1277; // @[el2_ifu_mem_ctl.scala 442:73] + wire _T_1323 = ic_miss_buff_data_valid[2] & _T_1316; // @[el2_ifu_mem_ctl.scala 448:116] + wire ic_miss_buff_data_valid_in_2 = write_fill_data_2 | _T_1323; // @[el2_ifu_mem_ctl.scala 448:88] + wire _T_1415 = _T_1396 & ic_miss_buff_data_valid_in_2; // @[Mux.scala 27:72] + wire _T_1422 = _T_1421 | _T_1415; // @[Mux.scala 27:72] + wire _T_1399 = bypass_index[4:2] == 3'h3; // @[el2_ifu_mem_ctl.scala 459:114] + wire _T_1278 = io_ifu_axi_rid == 3'h3; // @[el2_ifu_mem_ctl.scala 442:91] + wire write_fill_data_3 = bus_ifu_wr_en & _T_1278; // @[el2_ifu_mem_ctl.scala 442:73] + wire _T_1326 = ic_miss_buff_data_valid[3] & _T_1316; // @[el2_ifu_mem_ctl.scala 448:116] + wire ic_miss_buff_data_valid_in_3 = write_fill_data_3 | _T_1326; // @[el2_ifu_mem_ctl.scala 448:88] + wire _T_1416 = _T_1399 & ic_miss_buff_data_valid_in_3; // @[Mux.scala 27:72] + wire _T_1423 = _T_1422 | _T_1416; // @[Mux.scala 27:72] + wire _T_1402 = bypass_index[4:2] == 3'h4; // @[el2_ifu_mem_ctl.scala 459:114] + wire _T_1279 = io_ifu_axi_rid == 3'h4; // @[el2_ifu_mem_ctl.scala 442:91] + wire write_fill_data_4 = bus_ifu_wr_en & _T_1279; // @[el2_ifu_mem_ctl.scala 442:73] + wire _T_1329 = ic_miss_buff_data_valid[4] & _T_1316; // @[el2_ifu_mem_ctl.scala 448:116] + wire ic_miss_buff_data_valid_in_4 = write_fill_data_4 | _T_1329; // @[el2_ifu_mem_ctl.scala 448:88] + wire _T_1417 = _T_1402 & ic_miss_buff_data_valid_in_4; // @[Mux.scala 27:72] + wire _T_1424 = _T_1423 | _T_1417; // @[Mux.scala 27:72] + wire _T_1405 = bypass_index[4:2] == 3'h5; // @[el2_ifu_mem_ctl.scala 459:114] + wire _T_1280 = io_ifu_axi_rid == 3'h5; // @[el2_ifu_mem_ctl.scala 442:91] + wire write_fill_data_5 = bus_ifu_wr_en & _T_1280; // @[el2_ifu_mem_ctl.scala 442:73] + wire _T_1332 = ic_miss_buff_data_valid[5] & _T_1316; // @[el2_ifu_mem_ctl.scala 448:116] + wire ic_miss_buff_data_valid_in_5 = write_fill_data_5 | _T_1332; // @[el2_ifu_mem_ctl.scala 448:88] + wire _T_1418 = _T_1405 & ic_miss_buff_data_valid_in_5; // @[Mux.scala 27:72] + wire _T_1425 = _T_1424 | _T_1418; // @[Mux.scala 27:72] + wire _T_1408 = bypass_index[4:2] == 3'h6; // @[el2_ifu_mem_ctl.scala 459:114] + wire _T_1281 = io_ifu_axi_rid == 3'h6; // @[el2_ifu_mem_ctl.scala 442:91] + wire write_fill_data_6 = bus_ifu_wr_en & _T_1281; // @[el2_ifu_mem_ctl.scala 442:73] + wire _T_1335 = ic_miss_buff_data_valid[6] & _T_1316; // @[el2_ifu_mem_ctl.scala 448:116] + wire ic_miss_buff_data_valid_in_6 = write_fill_data_6 | _T_1335; // @[el2_ifu_mem_ctl.scala 448:88] + wire _T_1419 = _T_1408 & ic_miss_buff_data_valid_in_6; // @[Mux.scala 27:72] + wire _T_1426 = _T_1425 | _T_1419; // @[Mux.scala 27:72] + wire _T_1411 = bypass_index[4:2] == 3'h7; // @[el2_ifu_mem_ctl.scala 459:114] + wire _T_1282 = io_ifu_axi_rid == 3'h7; // @[el2_ifu_mem_ctl.scala 442:91] + wire write_fill_data_7 = bus_ifu_wr_en & _T_1282; // @[el2_ifu_mem_ctl.scala 442:73] + wire _T_1338 = ic_miss_buff_data_valid[7] & _T_1316; // @[el2_ifu_mem_ctl.scala 448:116] + wire ic_miss_buff_data_valid_in_7 = write_fill_data_7 | _T_1338; // @[el2_ifu_mem_ctl.scala 448:88] + wire _T_1420 = _T_1411 & ic_miss_buff_data_valid_in_7; // @[Mux.scala 27:72] + wire bypass_valid_value_check = _T_1426 | _T_1420; // @[Mux.scala 27:72] + wire _T_1429 = ~bypass_index[1]; // @[el2_ifu_mem_ctl.scala 460:58] + wire _T_1430 = bypass_valid_value_check & _T_1429; // @[el2_ifu_mem_ctl.scala 460:56] + wire _T_1432 = ~bypass_index[0]; // @[el2_ifu_mem_ctl.scala 460:77] + wire _T_1433 = _T_1430 & _T_1432; // @[el2_ifu_mem_ctl.scala 460:75] + wire _T_1438 = _T_1430 & bypass_index[0]; // @[el2_ifu_mem_ctl.scala 461:75] + wire _T_1439 = _T_1433 | _T_1438; // @[el2_ifu_mem_ctl.scala 460:95] + wire _T_1441 = bypass_valid_value_check & bypass_index[1]; // @[el2_ifu_mem_ctl.scala 462:56] + wire _T_1444 = _T_1441 & _T_1432; // @[el2_ifu_mem_ctl.scala 462:74] + wire _T_1445 = _T_1439 | _T_1444; // @[el2_ifu_mem_ctl.scala 461:94] + wire _T_1449 = _T_1441 & bypass_index[0]; // @[el2_ifu_mem_ctl.scala 463:51] + wire [2:0] bypass_index_5_3_inc = bypass_index[4:2] + 3'h1; // @[el2_ifu_mem_ctl.scala 458:70] + wire _T_1450 = bypass_index_5_3_inc == 3'h0; // @[el2_ifu_mem_ctl.scala 463:132] + wire _T_1466 = _T_1450 & ic_miss_buff_data_valid_in_0; // @[Mux.scala 27:72] + wire _T_1452 = bypass_index_5_3_inc == 3'h1; // @[el2_ifu_mem_ctl.scala 463:132] + wire _T_1467 = _T_1452 & ic_miss_buff_data_valid_in_1; // @[Mux.scala 27:72] + wire _T_1474 = _T_1466 | _T_1467; // @[Mux.scala 27:72] + wire _T_1454 = bypass_index_5_3_inc == 3'h2; // @[el2_ifu_mem_ctl.scala 463:132] + wire _T_1468 = _T_1454 & ic_miss_buff_data_valid_in_2; // @[Mux.scala 27:72] + wire _T_1475 = _T_1474 | _T_1468; // @[Mux.scala 27:72] + wire _T_1456 = bypass_index_5_3_inc == 3'h3; // @[el2_ifu_mem_ctl.scala 463:132] + wire _T_1469 = _T_1456 & ic_miss_buff_data_valid_in_3; // @[Mux.scala 27:72] + wire _T_1476 = _T_1475 | _T_1469; // @[Mux.scala 27:72] + wire _T_1458 = bypass_index_5_3_inc == 3'h4; // @[el2_ifu_mem_ctl.scala 463:132] + wire _T_1470 = _T_1458 & ic_miss_buff_data_valid_in_4; // @[Mux.scala 27:72] + wire _T_1477 = _T_1476 | _T_1470; // @[Mux.scala 27:72] + wire _T_1460 = bypass_index_5_3_inc == 3'h5; // @[el2_ifu_mem_ctl.scala 463:132] + wire _T_1471 = _T_1460 & ic_miss_buff_data_valid_in_5; // @[Mux.scala 27:72] + wire _T_1478 = _T_1477 | _T_1471; // @[Mux.scala 27:72] + wire _T_1462 = bypass_index_5_3_inc == 3'h6; // @[el2_ifu_mem_ctl.scala 463:132] + wire _T_1472 = _T_1462 & ic_miss_buff_data_valid_in_6; // @[Mux.scala 27:72] + wire _T_1479 = _T_1478 | _T_1472; // @[Mux.scala 27:72] + wire _T_1464 = bypass_index_5_3_inc == 3'h7; // @[el2_ifu_mem_ctl.scala 463:132] + wire _T_1473 = _T_1464 & ic_miss_buff_data_valid_in_7; // @[Mux.scala 27:72] + wire _T_1480 = _T_1479 | _T_1473; // @[Mux.scala 27:72] + wire _T_1482 = _T_1449 & _T_1480; // @[el2_ifu_mem_ctl.scala 463:69] + wire _T_1483 = _T_1445 | _T_1482; // @[el2_ifu_mem_ctl.scala 462:94] + wire [4:0] _GEN_83 = {{2'd0}, bypass_index[4:2]}; // @[el2_ifu_mem_ctl.scala 464:95] + wire _T_1486 = _GEN_83 == 5'h1f; // @[el2_ifu_mem_ctl.scala 464:95] + wire _T_1487 = bypass_valid_value_check & _T_1486; // @[el2_ifu_mem_ctl.scala 464:56] + wire bypass_data_ready_in = _T_1483 | _T_1487; // @[el2_ifu_mem_ctl.scala 463:181] + wire _T_1488 = bypass_data_ready_in & crit_wd_byp_ok_ff; // @[el2_ifu_mem_ctl.scala 468:53] + wire _T_1489 = _T_1488 & uncacheable_miss_ff; // @[el2_ifu_mem_ctl.scala 468:73] + wire _T_1491 = _T_1489 & _T_308; // @[el2_ifu_mem_ctl.scala 468:96] + wire _T_1493 = _T_1491 & _T_61; // @[el2_ifu_mem_ctl.scala 468:118] + wire _T_1495 = crit_wd_byp_ok_ff & _T_52; // @[el2_ifu_mem_ctl.scala 469:73] + wire _T_1497 = _T_1495 & _T_308; // @[el2_ifu_mem_ctl.scala 469:96] + wire _T_1499 = _T_1497 & _T_61; // @[el2_ifu_mem_ctl.scala 469:118] + wire _T_1500 = _T_1493 | _T_1499; // @[el2_ifu_mem_ctl.scala 468:143] + reg ic_crit_wd_rdy_new_ff; // @[el2_ifu_mem_ctl.scala 471:58] + wire _T_1501 = ic_crit_wd_rdy_new_ff & crit_wd_byp_ok_ff; // @[el2_ifu_mem_ctl.scala 470:54] + wire _T_1502 = ~fetch_req_icache_f; // @[el2_ifu_mem_ctl.scala 470:76] + wire _T_1503 = _T_1501 & _T_1502; // @[el2_ifu_mem_ctl.scala 470:74] + wire _T_1505 = _T_1503 & _T_308; // @[el2_ifu_mem_ctl.scala 470:96] + wire ic_crit_wd_rdy_new_in = _T_1500 | _T_1505; // @[el2_ifu_mem_ctl.scala 469:143] + wire ic_crit_wd_rdy = ic_crit_wd_rdy_new_in | ic_crit_wd_rdy_new_ff; // @[el2_ifu_mem_ctl.scala 665:43] + wire _T_1242 = ic_crit_wd_rdy | _T_2216; // @[el2_ifu_mem_ctl.scala 416:38] + wire _T_1244 = _T_1242 | _T_2231; // @[el2_ifu_mem_ctl.scala 416:64] + wire _T_1245 = ~_T_1244; // @[el2_ifu_mem_ctl.scala 416:21] + wire _T_1246 = ~fetch_req_iccm_f; // @[el2_ifu_mem_ctl.scala 416:98] + wire sel_ic_data = _T_1245 & _T_1246; // @[el2_ifu_mem_ctl.scala 416:96] + wire _T_2398 = io_ic_tag_perr & sel_ic_data; // @[el2_ifu_mem_ctl.scala 513:44] + wire _T_1599 = ifu_fetch_addr_int_f[1] & ifu_fetch_addr_int_f[0]; // @[el2_ifu_mem_ctl.scala 482:31] + reg [7:0] ic_miss_buff_data_error; // @[el2_ifu_mem_ctl.scala 454:60] + wire _T_1543 = _T_1390 & ic_miss_buff_data_error[0]; // @[Mux.scala 27:72] + wire _T_1544 = _T_1393 & ic_miss_buff_data_error[1]; // @[Mux.scala 27:72] + wire _T_1551 = _T_1543 | _T_1544; // @[Mux.scala 27:72] + wire _T_1545 = _T_1396 & ic_miss_buff_data_error[2]; // @[Mux.scala 27:72] + wire _T_1552 = _T_1551 | _T_1545; // @[Mux.scala 27:72] + wire _T_1546 = _T_1399 & ic_miss_buff_data_error[3]; // @[Mux.scala 27:72] + wire _T_1553 = _T_1552 | _T_1546; // @[Mux.scala 27:72] + wire _T_1547 = _T_1402 & ic_miss_buff_data_error[4]; // @[Mux.scala 27:72] + wire _T_1554 = _T_1553 | _T_1547; // @[Mux.scala 27:72] + wire _T_1548 = _T_1405 & ic_miss_buff_data_error[5]; // @[Mux.scala 27:72] + wire _T_1555 = _T_1554 | _T_1548; // @[Mux.scala 27:72] + wire _T_1549 = _T_1408 & ic_miss_buff_data_error[6]; // @[Mux.scala 27:72] + wire _T_1556 = _T_1555 | _T_1549; // @[Mux.scala 27:72] + wire _T_1550 = _T_1411 & ic_miss_buff_data_error[7]; // @[Mux.scala 27:72] + wire ic_miss_buff_data_error_bypass = _T_1556 | _T_1550; // @[Mux.scala 27:72] + wire _T_1582 = _T_2143 & ic_miss_buff_data_error[0]; // @[Mux.scala 27:72] + wire _T_1583 = _T_2146 & ic_miss_buff_data_error[1]; // @[Mux.scala 27:72] + wire _T_1590 = _T_1582 | _T_1583; // @[Mux.scala 27:72] + wire _T_1584 = _T_2149 & ic_miss_buff_data_error[2]; // @[Mux.scala 27:72] + wire _T_1591 = _T_1590 | _T_1584; // @[Mux.scala 27:72] + wire _T_1585 = _T_2152 & ic_miss_buff_data_error[3]; // @[Mux.scala 27:72] + wire _T_1592 = _T_1591 | _T_1585; // @[Mux.scala 27:72] + wire _T_1586 = _T_2155 & ic_miss_buff_data_error[4]; // @[Mux.scala 27:72] + wire _T_1593 = _T_1592 | _T_1586; // @[Mux.scala 27:72] + wire _T_1587 = _T_2158 & ic_miss_buff_data_error[5]; // @[Mux.scala 27:72] + wire _T_1594 = _T_1593 | _T_1587; // @[Mux.scala 27:72] + wire _T_1588 = _T_2161 & ic_miss_buff_data_error[6]; // @[Mux.scala 27:72] + wire _T_1595 = _T_1594 | _T_1588; // @[Mux.scala 27:72] + wire _T_1589 = _T_2164 & ic_miss_buff_data_error[7]; // @[Mux.scala 27:72] + wire ic_miss_buff_data_error_bypass_inc = _T_1595 | _T_1589; // @[Mux.scala 27:72] + wire _T_1600 = ic_miss_buff_data_error_bypass | ic_miss_buff_data_error_bypass_inc; // @[el2_ifu_mem_ctl.scala 484:70] + wire ifu_byp_data_err_new = _T_1599 ? ic_miss_buff_data_error_bypass : _T_1600; // @[el2_ifu_mem_ctl.scala 482:56] + wire ifc_bus_acc_fault_f = ic_byp_hit_f & ifu_byp_data_err_new; // @[el2_ifu_mem_ctl.scala 426:42] + wire _T_2400 = ~ifc_bus_acc_fault_f; // @[el2_ifu_mem_ctl.scala 513:60] + wire ic_rd_parity_final_err = _T_2398 & _T_2400; // @[el2_ifu_mem_ctl.scala 513:58] + reg [70:0] _T_1200; // @[el2_ifu_mem_ctl.scala 400:37] + wire fetch_req_f_qual = io_ic_hit_f & _T_308; // @[el2_ifu_mem_ctl.scala 428:38] + wire [1:0] _T_1264 = ifc_region_acc_fault_f ? 2'h2 : 2'h0; // @[el2_ifu_mem_ctl.scala 432:8] + wire [7:0] _T_1345 = {ic_miss_buff_data_valid_in_7,ic_miss_buff_data_valid_in_6,ic_miss_buff_data_valid_in_5,ic_miss_buff_data_valid_in_4,ic_miss_buff_data_valid_in_3,ic_miss_buff_data_valid_in_2,ic_miss_buff_data_valid_in_1,ic_miss_buff_data_valid_in_0}; // @[Cat.scala 29:58] + wire _T_1350 = ic_miss_buff_data_error[0] & _T_1316; // @[el2_ifu_mem_ctl.scala 453:32] + wire _T_2596 = |io_ifu_axi_rresp; // @[el2_ifu_mem_ctl.scala 661:47] + wire _T_2597 = _T_2596 & _T_14; // @[el2_ifu_mem_ctl.scala 661:50] + wire bus_ifu_wr_data_error = _T_2597 & miss_pending; // @[el2_ifu_mem_ctl.scala 661:68] + wire ic_miss_buff_data_error_in_0 = write_fill_data_0 ? bus_ifu_wr_data_error : _T_1350; // @[el2_ifu_mem_ctl.scala 452:72] + wire _T_1354 = ic_miss_buff_data_error[1] & _T_1316; // @[el2_ifu_mem_ctl.scala 453:32] + wire ic_miss_buff_data_error_in_1 = write_fill_data_1 ? bus_ifu_wr_data_error : _T_1354; // @[el2_ifu_mem_ctl.scala 452:72] + wire _T_1358 = ic_miss_buff_data_error[2] & _T_1316; // @[el2_ifu_mem_ctl.scala 453:32] + wire ic_miss_buff_data_error_in_2 = write_fill_data_2 ? bus_ifu_wr_data_error : _T_1358; // @[el2_ifu_mem_ctl.scala 452:72] + wire _T_1362 = ic_miss_buff_data_error[3] & _T_1316; // @[el2_ifu_mem_ctl.scala 453:32] + wire ic_miss_buff_data_error_in_3 = write_fill_data_3 ? bus_ifu_wr_data_error : _T_1362; // @[el2_ifu_mem_ctl.scala 452:72] + wire _T_1366 = ic_miss_buff_data_error[4] & _T_1316; // @[el2_ifu_mem_ctl.scala 453:32] + wire ic_miss_buff_data_error_in_4 = write_fill_data_4 ? bus_ifu_wr_data_error : _T_1366; // @[el2_ifu_mem_ctl.scala 452:72] + wire _T_1370 = ic_miss_buff_data_error[5] & _T_1316; // @[el2_ifu_mem_ctl.scala 453:32] + wire ic_miss_buff_data_error_in_5 = write_fill_data_5 ? bus_ifu_wr_data_error : _T_1370; // @[el2_ifu_mem_ctl.scala 452:72] + wire _T_1374 = ic_miss_buff_data_error[6] & _T_1316; // @[el2_ifu_mem_ctl.scala 453:32] + wire ic_miss_buff_data_error_in_6 = write_fill_data_6 ? bus_ifu_wr_data_error : _T_1374; // @[el2_ifu_mem_ctl.scala 452:72] + wire _T_1378 = ic_miss_buff_data_error[7] & _T_1316; // @[el2_ifu_mem_ctl.scala 453:32] + wire ic_miss_buff_data_error_in_7 = write_fill_data_7 ? bus_ifu_wr_data_error : _T_1378; // @[el2_ifu_mem_ctl.scala 452:72] + wire [7:0] _T_1385 = {ic_miss_buff_data_error_in_7,ic_miss_buff_data_error_in_6,ic_miss_buff_data_error_in_5,ic_miss_buff_data_error_in_4,ic_miss_buff_data_error_in_3,ic_miss_buff_data_error_in_2,ic_miss_buff_data_error_in_1,ic_miss_buff_data_error_in_0}; // @[Cat.scala 29:58] + wire _T_2404 = 3'h0 == perr_state; // @[Conditional.scala 37:30] + wire _T_2412 = _T_7 & _T_308; // @[el2_ifu_mem_ctl.scala 531:65] + wire _T_2413 = _T_2412 | io_iccm_dma_sb_error; // @[el2_ifu_mem_ctl.scala 531:88] + wire _T_2415 = _T_2413 & _T_2524; // @[el2_ifu_mem_ctl.scala 531:112] + wire _T_2416 = 3'h1 == perr_state; // @[Conditional.scala 37:30] + wire _T_2417 = io_dec_tlu_flush_lower_wb | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 536:50] + wire _T_2419 = 3'h2 == perr_state; // @[Conditional.scala 37:30] + wire _T_2425 = 3'h4 == perr_state; // @[Conditional.scala 37:30] + wire _T_2427 = 3'h3 == perr_state; // @[Conditional.scala 37:30] + wire _GEN_38 = _T_2425 | _T_2427; // @[Conditional.scala 39:67] + wire _GEN_40 = _T_2419 ? _T_2417 : _GEN_38; // @[Conditional.scala 39:67] + wire _GEN_42 = _T_2416 ? _T_2417 : _GEN_40; // @[Conditional.scala 39:67] + wire perr_state_en = _T_2404 ? _T_2415 : _GEN_42; // @[Conditional.scala 40:58] + wire _T_2406 = io_ic_error_start & _T_308; // @[el2_ifu_mem_ctl.scala 530:87] + wire _T_2420 = io_dec_tlu_flush_err_wb & io_dec_tlu_flush_lower_wb; // @[el2_ifu_mem_ctl.scala 540:54] + wire _T_2421 = _T_2420 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 540:84] + wire _T_2430 = perr_state == 3'h2; // @[el2_ifu_mem_ctl.scala 561:66] + wire _T_2431 = io_dec_tlu_flush_err_wb & _T_2430; // @[el2_ifu_mem_ctl.scala 561:52] + wire _T_2433 = _T_2431 & _T_2524; // @[el2_ifu_mem_ctl.scala 561:81] + wire _T_2435 = io_dec_tlu_flush_lower_wb | io_dec_tlu_i0_commit_cmt; // @[el2_ifu_mem_ctl.scala 564:59] + wire _T_2436 = _T_2435 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 564:86] + wire _T_2450 = _T_2435 | io_ifu_fetch_val[0]; // @[el2_ifu_mem_ctl.scala 567:81] + wire _T_2451 = _T_2450 | ifu_bp_hit_taken_q_f; // @[el2_ifu_mem_ctl.scala 567:103] + wire _T_2452 = _T_2451 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 567:126] + wire _T_2472 = _T_2450 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 574:103] + wire _T_2479 = ~io_dec_tlu_flush_err_wb; // @[el2_ifu_mem_ctl.scala 579:62] + wire _T_2480 = io_dec_tlu_flush_lower_wb & _T_2479; // @[el2_ifu_mem_ctl.scala 579:60] + wire _T_2481 = _T_2480 | io_dec_tlu_i0_commit_cmt; // @[el2_ifu_mem_ctl.scala 579:88] + wire _T_2482 = _T_2481 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 579:115] + wire _GEN_50 = _T_2478 & _T_2436; // @[Conditional.scala 39:67] + wire _GEN_53 = _T_2461 ? _T_2472 : _GEN_50; // @[Conditional.scala 39:67] + wire _GEN_57 = _T_2434 ? _T_2452 : _GEN_53; // @[Conditional.scala 39:67] + wire err_stop_state_en = _T_2429 ? _T_2433 : _GEN_57; // @[Conditional.scala 40:58] + reg ifu_bus_cmd_valid; // @[Reg.scala 27:20] + wire _T_2492 = ic_act_miss_f | ifu_bus_cmd_valid; // @[el2_ifu_mem_ctl.scala 595:64] + wire _T_2494 = _T_2492 & _T_2524; // @[el2_ifu_mem_ctl.scala 595:85] + reg [2:0] bus_cmd_beat_count; // @[Reg.scala 27:20] + wire _T_2496 = bus_cmd_beat_count == 3'h7; // @[el2_ifu_mem_ctl.scala 595:133] + wire _T_2497 = _T_2496 & ifu_bus_cmd_valid; // @[el2_ifu_mem_ctl.scala 595:164] + wire _T_2498 = _T_2497 & io_ifu_axi_arready; // @[el2_ifu_mem_ctl.scala 595:184] + wire _T_2499 = _T_2498 & miss_pending; // @[el2_ifu_mem_ctl.scala 595:204] + wire _T_2500 = ~_T_2499; // @[el2_ifu_mem_ctl.scala 595:112] + wire ifc_bus_ic_req_ff_in = _T_2494 & _T_2500; // @[el2_ifu_mem_ctl.scala 595:110] + wire _T_2501 = io_ifu_bus_clk_en | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 596:80] + wire ifu_bus_arready = io_ifu_axi_arready & io_ifu_bus_clk_en; // @[el2_ifu_mem_ctl.scala 627:45] + wire _T_2518 = io_ifu_axi_arvalid & ifu_bus_arready; // @[el2_ifu_mem_ctl.scala 630:35] + wire _T_2519 = _T_2518 & miss_pending; // @[el2_ifu_mem_ctl.scala 630:53] + wire bus_cmd_sent = _T_2519 & _T_2524; // @[el2_ifu_mem_ctl.scala 630:68] + wire [2:0] _T_2509 = ifu_bus_cmd_valid ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [31:0] _T_2511 = {miss_addr,bus_rd_addr_count,3'h0}; // @[Cat.scala 29:58] + wire [31:0] _T_2513 = ifu_bus_cmd_valid ? 32'hffffffff : 32'h0; // @[Bitwise.scala 72:12] + wire _T_2542 = last_data_recieved_ff & _T_1316; // @[el2_ifu_mem_ctl.scala 638:114] + wire last_data_recieved_in = _T_2525 | _T_2542; // @[el2_ifu_mem_ctl.scala 638:89] + wire [2:0] _T_2548 = bus_rd_addr_count + 3'h1; // @[el2_ifu_mem_ctl.scala 643:45] + wire _T_2551 = io_ifu_bus_clk_en | ic_act_miss_f; // @[el2_ifu_mem_ctl.scala 644:81] + wire _T_2552 = _T_2551 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 644:97] + wire _T_2554 = ifu_bus_cmd_valid & io_ifu_axi_arready; // @[el2_ifu_mem_ctl.scala 646:48] + wire _T_2555 = _T_2554 & miss_pending; // @[el2_ifu_mem_ctl.scala 646:68] + wire bus_inc_cmd_beat_cnt = _T_2555 & _T_2524; // @[el2_ifu_mem_ctl.scala 646:83] + wire bus_reset_cmd_beat_cnt_secondlast = ic_act_miss_f & uncacheable_miss_in; // @[el2_ifu_mem_ctl.scala 648:57] + wire _T_2559 = ~bus_inc_cmd_beat_cnt; // @[el2_ifu_mem_ctl.scala 649:31] + wire _T_2561 = ic_act_miss_f | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 649:87] + wire _T_2562 = ~_T_2561; // @[el2_ifu_mem_ctl.scala 649:55] + wire bus_hold_cmd_beat_cnt = _T_2559 & _T_2562; // @[el2_ifu_mem_ctl.scala 649:53] + wire _T_2563 = bus_inc_cmd_beat_cnt | ic_act_miss_f; // @[el2_ifu_mem_ctl.scala 650:46] + wire bus_cmd_beat_en = _T_2563 | io_dec_tlu_force_halt; // @[el2_ifu_mem_ctl.scala 650:62] + wire [2:0] _T_2566 = bus_cmd_beat_count + 3'h1; // @[el2_ifu_mem_ctl.scala 652:46] + wire [2:0] _T_2568 = bus_reset_cmd_beat_cnt_secondlast ? 3'h6 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_2569 = bus_inc_cmd_beat_cnt ? _T_2566 : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_2570 = bus_hold_cmd_beat_cnt ? bus_cmd_beat_count : 3'h0; // @[Mux.scala 27:72] + wire [2:0] _T_2572 = _T_2568 | _T_2569; // @[Mux.scala 27:72] + wire [2:0] bus_new_cmd_beat_count = _T_2572 | _T_2570; // @[Mux.scala 27:72] + wire _T_2576 = _T_2552 & bus_cmd_beat_en; // @[el2_ifu_mem_ctl.scala 653:125] + reg ifc_dma_access_ok_prev; // @[el2_ifu_mem_ctl.scala 664:62] + wire _T_2604 = ~iccm_correct_ecc; // @[el2_ifu_mem_ctl.scala 669:50] + wire _T_2605 = io_ifc_dma_access_ok & _T_2604; // @[el2_ifu_mem_ctl.scala 669:47] + wire _T_2606 = ~io_iccm_dma_sb_error; // @[el2_ifu_mem_ctl.scala 669:70] + wire ifc_dma_access_ok_d = _T_2605 & _T_2606; // @[el2_ifu_mem_ctl.scala 669:68] + wire _T_2610 = _T_2605 & ifc_dma_access_ok_prev; // @[el2_ifu_mem_ctl.scala 670:72] + wire _T_2611 = perr_state == 3'h0; // @[el2_ifu_mem_ctl.scala 670:111] + wire _T_2612 = _T_2610 & _T_2611; // @[el2_ifu_mem_ctl.scala 670:97] + wire iccm_ready = _T_2612 & _T_2606; // @[el2_ifu_mem_ctl.scala 670:127] + wire _T_2615 = iccm_ready & io_dma_iccm_req; // @[el2_ifu_mem_ctl.scala 673:40] + wire _T_2616 = _T_2615 & io_dma_mem_write; // @[el2_ifu_mem_ctl.scala 673:58] + wire _T_2619 = ~io_dma_mem_write; // @[el2_ifu_mem_ctl.scala 674:60] + wire _T_2620 = _T_2615 & _T_2619; // @[el2_ifu_mem_ctl.scala 674:58] + wire _T_2621 = io_ifc_iccm_access_bf & io_ifc_fetch_req_bf; // @[el2_ifu_mem_ctl.scala 674:104] + wire [2:0] _T_2626 = io_dma_iccm_req ? 3'h7 : 3'h0; // @[Bitwise.scala 72:12] + wire [8:0] _T_2732 = {io_dma_mem_wdata[48],io_dma_mem_wdata[46],io_dma_mem_wdata[44],io_dma_mem_wdata[42],io_dma_mem_wdata[40],io_dma_mem_wdata[38],io_dma_mem_wdata[37],io_dma_mem_wdata[35],io_dma_mem_wdata[33]}; // @[el2_lib.scala 263:22] + wire [17:0] _T_2741 = {io_dma_mem_wdata[63],io_dma_mem_wdata[62],io_dma_mem_wdata[60],io_dma_mem_wdata[59],io_dma_mem_wdata[57],io_dma_mem_wdata[55],io_dma_mem_wdata[53],io_dma_mem_wdata[52],io_dma_mem_wdata[50],_T_2732}; // @[el2_lib.scala 263:22] + wire _T_2742 = ^_T_2741; // @[el2_lib.scala 263:29] + wire [8:0] _T_2750 = {io_dma_mem_wdata[47],io_dma_mem_wdata[46],io_dma_mem_wdata[43],io_dma_mem_wdata[42],io_dma_mem_wdata[39],io_dma_mem_wdata[38],io_dma_mem_wdata[36],io_dma_mem_wdata[35],io_dma_mem_wdata[32]}; // @[el2_lib.scala 263:39] + wire [17:0] _T_2759 = {io_dma_mem_wdata[63],io_dma_mem_wdata[61],io_dma_mem_wdata[60],io_dma_mem_wdata[58],io_dma_mem_wdata[57],io_dma_mem_wdata[54],io_dma_mem_wdata[53],io_dma_mem_wdata[51],io_dma_mem_wdata[50],_T_2750}; // @[el2_lib.scala 263:39] + wire _T_2760 = ^_T_2759; // @[el2_lib.scala 263:46] + wire [8:0] _T_2768 = {io_dma_mem_wdata[47],io_dma_mem_wdata[46],io_dma_mem_wdata[41],io_dma_mem_wdata[40],io_dma_mem_wdata[39],io_dma_mem_wdata[38],io_dma_mem_wdata[34],io_dma_mem_wdata[33],io_dma_mem_wdata[32]}; // @[el2_lib.scala 263:56] + wire [17:0] _T_2777 = {io_dma_mem_wdata[62],io_dma_mem_wdata[61],io_dma_mem_wdata[60],io_dma_mem_wdata[56],io_dma_mem_wdata[55],io_dma_mem_wdata[54],io_dma_mem_wdata[53],io_dma_mem_wdata[49],io_dma_mem_wdata[48],_T_2768}; // @[el2_lib.scala 263:56] + wire _T_2778 = ^_T_2777; // @[el2_lib.scala 263:63] + wire [6:0] _T_2784 = {io_dma_mem_wdata[44],io_dma_mem_wdata[43],io_dma_mem_wdata[42],io_dma_mem_wdata[41],io_dma_mem_wdata[40],io_dma_mem_wdata[39],io_dma_mem_wdata[38]}; // @[el2_lib.scala 263:73] + wire [14:0] _T_2792 = {io_dma_mem_wdata[59],io_dma_mem_wdata[58],io_dma_mem_wdata[57],io_dma_mem_wdata[56],io_dma_mem_wdata[55],io_dma_mem_wdata[54],io_dma_mem_wdata[53],io_dma_mem_wdata[45],_T_2784}; // @[el2_lib.scala 263:73] + wire _T_2793 = ^_T_2792; // @[el2_lib.scala 263:80] + wire [14:0] _T_2807 = {io_dma_mem_wdata[52],io_dma_mem_wdata[51],io_dma_mem_wdata[50],io_dma_mem_wdata[49],io_dma_mem_wdata[48],io_dma_mem_wdata[47],io_dma_mem_wdata[46],io_dma_mem_wdata[45],_T_2784}; // @[el2_lib.scala 263:90] + wire _T_2808 = ^_T_2807; // @[el2_lib.scala 263:97] + wire [5:0] _T_2813 = {io_dma_mem_wdata[37],io_dma_mem_wdata[36],io_dma_mem_wdata[35],io_dma_mem_wdata[34],io_dma_mem_wdata[33],io_dma_mem_wdata[32]}; // @[el2_lib.scala 263:107] + wire _T_2814 = ^_T_2813; // @[el2_lib.scala 263:114] + wire [5:0] _T_2819 = {_T_2742,_T_2760,_T_2778,_T_2793,_T_2808,_T_2814}; // @[Cat.scala 29:58] + wire _T_2820 = ^io_dma_mem_wdata[63:32]; // @[el2_lib.scala 264:13] + wire _T_2821 = ^_T_2819; // @[el2_lib.scala 264:23] + wire _T_2822 = _T_2820 ^ _T_2821; // @[el2_lib.scala 264:18] + wire [8:0] _T_2928 = {io_dma_mem_wdata[16],io_dma_mem_wdata[14],io_dma_mem_wdata[12],io_dma_mem_wdata[10],io_dma_mem_wdata[8],io_dma_mem_wdata[6],io_dma_mem_wdata[5],io_dma_mem_wdata[3],io_dma_mem_wdata[1]}; // @[el2_lib.scala 263:22] + wire [17:0] _T_2937 = {io_dma_mem_wdata[31],io_dma_mem_wdata[30],io_dma_mem_wdata[28],io_dma_mem_wdata[27],io_dma_mem_wdata[25],io_dma_mem_wdata[23],io_dma_mem_wdata[21],io_dma_mem_wdata[20],io_dma_mem_wdata[18],_T_2928}; // @[el2_lib.scala 263:22] + wire _T_2938 = ^_T_2937; // @[el2_lib.scala 263:29] + wire [8:0] _T_2946 = {io_dma_mem_wdata[15],io_dma_mem_wdata[14],io_dma_mem_wdata[11],io_dma_mem_wdata[10],io_dma_mem_wdata[7],io_dma_mem_wdata[6],io_dma_mem_wdata[4],io_dma_mem_wdata[3],io_dma_mem_wdata[0]}; // @[el2_lib.scala 263:39] + wire [17:0] _T_2955 = {io_dma_mem_wdata[31],io_dma_mem_wdata[29],io_dma_mem_wdata[28],io_dma_mem_wdata[26],io_dma_mem_wdata[25],io_dma_mem_wdata[22],io_dma_mem_wdata[21],io_dma_mem_wdata[19],io_dma_mem_wdata[18],_T_2946}; // @[el2_lib.scala 263:39] + wire _T_2956 = ^_T_2955; // @[el2_lib.scala 263:46] + wire [8:0] _T_2964 = {io_dma_mem_wdata[15],io_dma_mem_wdata[14],io_dma_mem_wdata[9],io_dma_mem_wdata[8],io_dma_mem_wdata[7],io_dma_mem_wdata[6],io_dma_mem_wdata[2],io_dma_mem_wdata[1],io_dma_mem_wdata[0]}; // @[el2_lib.scala 263:56] + wire [17:0] _T_2973 = {io_dma_mem_wdata[30],io_dma_mem_wdata[29],io_dma_mem_wdata[28],io_dma_mem_wdata[24],io_dma_mem_wdata[23],io_dma_mem_wdata[22],io_dma_mem_wdata[21],io_dma_mem_wdata[17],io_dma_mem_wdata[16],_T_2964}; // @[el2_lib.scala 263:56] + wire _T_2974 = ^_T_2973; // @[el2_lib.scala 263:63] + wire [6:0] _T_2980 = {io_dma_mem_wdata[12],io_dma_mem_wdata[11],io_dma_mem_wdata[10],io_dma_mem_wdata[9],io_dma_mem_wdata[8],io_dma_mem_wdata[7],io_dma_mem_wdata[6]}; // @[el2_lib.scala 263:73] + wire [14:0] _T_2988 = {io_dma_mem_wdata[27],io_dma_mem_wdata[26],io_dma_mem_wdata[25],io_dma_mem_wdata[24],io_dma_mem_wdata[23],io_dma_mem_wdata[22],io_dma_mem_wdata[21],io_dma_mem_wdata[13],_T_2980}; // @[el2_lib.scala 263:73] + wire _T_2989 = ^_T_2988; // @[el2_lib.scala 263:80] + wire [14:0] _T_3003 = {io_dma_mem_wdata[20],io_dma_mem_wdata[19],io_dma_mem_wdata[18],io_dma_mem_wdata[17],io_dma_mem_wdata[16],io_dma_mem_wdata[15],io_dma_mem_wdata[14],io_dma_mem_wdata[13],_T_2980}; // @[el2_lib.scala 263:90] + wire _T_3004 = ^_T_3003; // @[el2_lib.scala 263:97] + wire [5:0] _T_3009 = {io_dma_mem_wdata[5],io_dma_mem_wdata[4],io_dma_mem_wdata[3],io_dma_mem_wdata[2],io_dma_mem_wdata[1],io_dma_mem_wdata[0]}; // @[el2_lib.scala 263:107] + wire _T_3010 = ^_T_3009; // @[el2_lib.scala 263:114] + wire [5:0] _T_3015 = {_T_2938,_T_2956,_T_2974,_T_2989,_T_3004,_T_3010}; // @[Cat.scala 29:58] + wire _T_3016 = ^io_dma_mem_wdata[31:0]; // @[el2_lib.scala 264:13] + wire _T_3017 = ^_T_3015; // @[el2_lib.scala 264:23] + wire _T_3018 = _T_3016 ^ _T_3017; // @[el2_lib.scala 264:18] + wire [6:0] _T_3019 = {_T_3018,_T_2938,_T_2956,_T_2974,_T_2989,_T_3004,_T_3010}; // @[Cat.scala 29:58] + wire [13:0] dma_mem_ecc = {_T_2822,_T_2742,_T_2760,_T_2778,_T_2793,_T_2808,_T_2814,_T_3019}; // @[Cat.scala 29:58] + wire _T_3021 = ~_T_2615; // @[el2_ifu_mem_ctl.scala 679:45] + wire _T_3022 = iccm_correct_ecc & _T_3021; // @[el2_ifu_mem_ctl.scala 679:43] + wire [77:0] _T_3030 = {dma_mem_ecc[13:7],io_dma_mem_wdata[63:32],dma_mem_ecc[6:0],io_dma_mem_wdata[31:0]}; // @[Cat.scala 29:58] + reg [1:0] dma_mem_addr_ff; // @[el2_ifu_mem_ctl.scala 693:53] + wire _T_3362 = _T_3274[5:0] == 6'h27; // @[el2_lib.scala 302:41] + wire _T_3360 = _T_3274[5:0] == 6'h26; // @[el2_lib.scala 302:41] + wire _T_3358 = _T_3274[5:0] == 6'h25; // @[el2_lib.scala 302:41] + wire _T_3356 = _T_3274[5:0] == 6'h24; // @[el2_lib.scala 302:41] + wire _T_3354 = _T_3274[5:0] == 6'h23; // @[el2_lib.scala 302:41] + wire _T_3352 = _T_3274[5:0] == 6'h22; // @[el2_lib.scala 302:41] + wire _T_3350 = _T_3274[5:0] == 6'h21; // @[el2_lib.scala 302:41] + wire _T_3348 = _T_3274[5:0] == 6'h20; // @[el2_lib.scala 302:41] + wire _T_3346 = _T_3274[5:0] == 6'h1f; // @[el2_lib.scala 302:41] + wire _T_3344 = _T_3274[5:0] == 6'h1e; // @[el2_lib.scala 302:41] + wire [9:0] _T_3420 = {_T_3362,_T_3360,_T_3358,_T_3356,_T_3354,_T_3352,_T_3350,_T_3348,_T_3346,_T_3344}; // @[el2_lib.scala 305:69] + wire _T_3342 = _T_3274[5:0] == 6'h1d; // @[el2_lib.scala 302:41] + wire _T_3340 = _T_3274[5:0] == 6'h1c; // @[el2_lib.scala 302:41] + wire _T_3338 = _T_3274[5:0] == 6'h1b; // @[el2_lib.scala 302:41] + wire _T_3336 = _T_3274[5:0] == 6'h1a; // @[el2_lib.scala 302:41] + wire _T_3334 = _T_3274[5:0] == 6'h19; // @[el2_lib.scala 302:41] + wire _T_3332 = _T_3274[5:0] == 6'h18; // @[el2_lib.scala 302:41] + wire _T_3330 = _T_3274[5:0] == 6'h17; // @[el2_lib.scala 302:41] + wire _T_3328 = _T_3274[5:0] == 6'h16; // @[el2_lib.scala 302:41] + wire _T_3326 = _T_3274[5:0] == 6'h15; // @[el2_lib.scala 302:41] + wire _T_3324 = _T_3274[5:0] == 6'h14; // @[el2_lib.scala 302:41] + wire [9:0] _T_3411 = {_T_3342,_T_3340,_T_3338,_T_3336,_T_3334,_T_3332,_T_3330,_T_3328,_T_3326,_T_3324}; // @[el2_lib.scala 305:69] + wire _T_3322 = _T_3274[5:0] == 6'h13; // @[el2_lib.scala 302:41] + wire _T_3320 = _T_3274[5:0] == 6'h12; // @[el2_lib.scala 302:41] + wire _T_3318 = _T_3274[5:0] == 6'h11; // @[el2_lib.scala 302:41] + wire _T_3316 = _T_3274[5:0] == 6'h10; // @[el2_lib.scala 302:41] + wire _T_3314 = _T_3274[5:0] == 6'hf; // @[el2_lib.scala 302:41] + wire _T_3312 = _T_3274[5:0] == 6'he; // @[el2_lib.scala 302:41] + wire _T_3310 = _T_3274[5:0] == 6'hd; // @[el2_lib.scala 302:41] + wire _T_3308 = _T_3274[5:0] == 6'hc; // @[el2_lib.scala 302:41] + wire _T_3306 = _T_3274[5:0] == 6'hb; // @[el2_lib.scala 302:41] + wire _T_3304 = _T_3274[5:0] == 6'ha; // @[el2_lib.scala 302:41] + wire [9:0] _T_3401 = {_T_3322,_T_3320,_T_3318,_T_3316,_T_3314,_T_3312,_T_3310,_T_3308,_T_3306,_T_3304}; // @[el2_lib.scala 305:69] + wire _T_3302 = _T_3274[5:0] == 6'h9; // @[el2_lib.scala 302:41] + wire _T_3300 = _T_3274[5:0] == 6'h8; // @[el2_lib.scala 302:41] + wire _T_3298 = _T_3274[5:0] == 6'h7; // @[el2_lib.scala 302:41] + wire _T_3296 = _T_3274[5:0] == 6'h6; // @[el2_lib.scala 302:41] + wire _T_3294 = _T_3274[5:0] == 6'h5; // @[el2_lib.scala 302:41] + wire _T_3292 = _T_3274[5:0] == 6'h4; // @[el2_lib.scala 302:41] + wire _T_3290 = _T_3274[5:0] == 6'h3; // @[el2_lib.scala 302:41] + wire _T_3288 = _T_3274[5:0] == 6'h2; // @[el2_lib.scala 302:41] + wire _T_3286 = _T_3274[5:0] == 6'h1; // @[el2_lib.scala 302:41] + wire [18:0] _T_3402 = {_T_3401,_T_3302,_T_3300,_T_3298,_T_3296,_T_3294,_T_3292,_T_3290,_T_3288,_T_3286}; // @[el2_lib.scala 305:69] + wire [38:0] _T_3422 = {_T_3420,_T_3411,_T_3402}; // @[el2_lib.scala 305:69] + wire [7:0] _T_3377 = {io_iccm_rd_data_ecc[35],io_iccm_rd_data_ecc[3:1],io_iccm_rd_data_ecc[34],io_iccm_rd_data_ecc[0],io_iccm_rd_data_ecc[33:32]}; // @[Cat.scala 29:58] + wire [38:0] _T_3383 = {io_iccm_rd_data_ecc[38],io_iccm_rd_data_ecc[31:26],io_iccm_rd_data_ecc[37],io_iccm_rd_data_ecc[25:11],io_iccm_rd_data_ecc[36],io_iccm_rd_data_ecc[10:4],_T_3377}; // @[Cat.scala 29:58] + wire [38:0] _T_3423 = _T_3422 ^ _T_3383; // @[el2_lib.scala 305:76] + wire [38:0] _T_3424 = _T_3278 ? _T_3423 : _T_3383; // @[el2_lib.scala 305:31] + wire [31:0] iccm_corrected_data_0 = {_T_3424[37:32],_T_3424[30:16],_T_3424[14:8],_T_3424[6:4],_T_3424[2]}; // @[Cat.scala 29:58] + wire _T_3747 = _T_3659[5:0] == 6'h27; // @[el2_lib.scala 302:41] + wire _T_3745 = _T_3659[5:0] == 6'h26; // @[el2_lib.scala 302:41] + wire _T_3743 = _T_3659[5:0] == 6'h25; // @[el2_lib.scala 302:41] + wire _T_3741 = _T_3659[5:0] == 6'h24; // @[el2_lib.scala 302:41] + wire _T_3739 = _T_3659[5:0] == 6'h23; // @[el2_lib.scala 302:41] + wire _T_3737 = _T_3659[5:0] == 6'h22; // @[el2_lib.scala 302:41] + wire _T_3735 = _T_3659[5:0] == 6'h21; // @[el2_lib.scala 302:41] + wire _T_3733 = _T_3659[5:0] == 6'h20; // @[el2_lib.scala 302:41] + wire _T_3731 = _T_3659[5:0] == 6'h1f; // @[el2_lib.scala 302:41] + wire _T_3729 = _T_3659[5:0] == 6'h1e; // @[el2_lib.scala 302:41] + wire [9:0] _T_3805 = {_T_3747,_T_3745,_T_3743,_T_3741,_T_3739,_T_3737,_T_3735,_T_3733,_T_3731,_T_3729}; // @[el2_lib.scala 305:69] + wire _T_3727 = _T_3659[5:0] == 6'h1d; // @[el2_lib.scala 302:41] + wire _T_3725 = _T_3659[5:0] == 6'h1c; // @[el2_lib.scala 302:41] + wire _T_3723 = _T_3659[5:0] == 6'h1b; // @[el2_lib.scala 302:41] + wire _T_3721 = _T_3659[5:0] == 6'h1a; // @[el2_lib.scala 302:41] + wire _T_3719 = _T_3659[5:0] == 6'h19; // @[el2_lib.scala 302:41] + wire _T_3717 = _T_3659[5:0] == 6'h18; // @[el2_lib.scala 302:41] + wire _T_3715 = _T_3659[5:0] == 6'h17; // @[el2_lib.scala 302:41] + wire _T_3713 = _T_3659[5:0] == 6'h16; // @[el2_lib.scala 302:41] + wire _T_3711 = _T_3659[5:0] == 6'h15; // @[el2_lib.scala 302:41] + wire _T_3709 = _T_3659[5:0] == 6'h14; // @[el2_lib.scala 302:41] + wire [9:0] _T_3796 = {_T_3727,_T_3725,_T_3723,_T_3721,_T_3719,_T_3717,_T_3715,_T_3713,_T_3711,_T_3709}; // @[el2_lib.scala 305:69] + wire _T_3707 = _T_3659[5:0] == 6'h13; // @[el2_lib.scala 302:41] + wire _T_3705 = _T_3659[5:0] == 6'h12; // @[el2_lib.scala 302:41] + wire _T_3703 = _T_3659[5:0] == 6'h11; // @[el2_lib.scala 302:41] + wire _T_3701 = _T_3659[5:0] == 6'h10; // @[el2_lib.scala 302:41] + wire _T_3699 = _T_3659[5:0] == 6'hf; // @[el2_lib.scala 302:41] + wire _T_3697 = _T_3659[5:0] == 6'he; // @[el2_lib.scala 302:41] + wire _T_3695 = _T_3659[5:0] == 6'hd; // @[el2_lib.scala 302:41] + wire _T_3693 = _T_3659[5:0] == 6'hc; // @[el2_lib.scala 302:41] + wire _T_3691 = _T_3659[5:0] == 6'hb; // @[el2_lib.scala 302:41] + wire _T_3689 = _T_3659[5:0] == 6'ha; // @[el2_lib.scala 302:41] + wire [9:0] _T_3786 = {_T_3707,_T_3705,_T_3703,_T_3701,_T_3699,_T_3697,_T_3695,_T_3693,_T_3691,_T_3689}; // @[el2_lib.scala 305:69] + wire _T_3687 = _T_3659[5:0] == 6'h9; // @[el2_lib.scala 302:41] + wire _T_3685 = _T_3659[5:0] == 6'h8; // @[el2_lib.scala 302:41] + wire _T_3683 = _T_3659[5:0] == 6'h7; // @[el2_lib.scala 302:41] + wire _T_3681 = _T_3659[5:0] == 6'h6; // @[el2_lib.scala 302:41] + wire _T_3679 = _T_3659[5:0] == 6'h5; // @[el2_lib.scala 302:41] + wire _T_3677 = _T_3659[5:0] == 6'h4; // @[el2_lib.scala 302:41] + wire _T_3675 = _T_3659[5:0] == 6'h3; // @[el2_lib.scala 302:41] + wire _T_3673 = _T_3659[5:0] == 6'h2; // @[el2_lib.scala 302:41] + wire _T_3671 = _T_3659[5:0] == 6'h1; // @[el2_lib.scala 302:41] + wire [18:0] _T_3787 = {_T_3786,_T_3687,_T_3685,_T_3683,_T_3681,_T_3679,_T_3677,_T_3675,_T_3673,_T_3671}; // @[el2_lib.scala 305:69] + wire [38:0] _T_3807 = {_T_3805,_T_3796,_T_3787}; // @[el2_lib.scala 305:69] + wire [7:0] _T_3762 = {io_iccm_rd_data_ecc[74],io_iccm_rd_data_ecc[42:40],io_iccm_rd_data_ecc[73],io_iccm_rd_data_ecc[39],io_iccm_rd_data_ecc[72:71]}; // @[Cat.scala 29:58] + wire [38:0] _T_3768 = {io_iccm_rd_data_ecc[77],io_iccm_rd_data_ecc[70:65],io_iccm_rd_data_ecc[76],io_iccm_rd_data_ecc[64:50],io_iccm_rd_data_ecc[75],io_iccm_rd_data_ecc[49:43],_T_3762}; // @[Cat.scala 29:58] + wire [38:0] _T_3808 = _T_3807 ^ _T_3768; // @[el2_lib.scala 305:76] + wire [38:0] _T_3809 = _T_3663 ? _T_3808 : _T_3768; // @[el2_lib.scala 305:31] + wire [31:0] iccm_corrected_data_1 = {_T_3809[37:32],_T_3809[30:16],_T_3809[14:8],_T_3809[6:4],_T_3809[2]}; // @[Cat.scala 29:58] + wire [31:0] iccm_dma_rdata_1_muxed = dma_mem_addr_ff[0] ? iccm_corrected_data_0 : iccm_corrected_data_1; // @[el2_ifu_mem_ctl.scala 685:35] + wire _T_3282 = ~_T_3274[6]; // @[el2_lib.scala 298:55] + wire _T_3283 = _T_3276 & _T_3282; // @[el2_lib.scala 298:53] + wire _T_3667 = ~_T_3659[6]; // @[el2_lib.scala 298:55] + wire _T_3668 = _T_3661 & _T_3667; // @[el2_lib.scala 298:53] + wire [1:0] iccm_double_ecc_error = {_T_3283,_T_3668}; // @[Cat.scala 29:58] + wire iccm_dma_ecc_error_in = |iccm_double_ecc_error; // @[el2_ifu_mem_ctl.scala 687:53] + wire [63:0] _T_3034 = {io_dma_mem_addr,io_dma_mem_addr}; // @[Cat.scala 29:58] + wire [63:0] _T_3035 = {iccm_dma_rdata_1_muxed,_T_3424[37:32],_T_3424[30:16],_T_3424[14:8],_T_3424[6:4],_T_3424[2]}; // @[Cat.scala 29:58] + reg [2:0] dma_mem_tag_ff; // @[el2_ifu_mem_ctl.scala 689:54] + reg [2:0] iccm_dma_rtag; // @[el2_ifu_mem_ctl.scala 690:69] + reg iccm_dma_rvalid; // @[el2_ifu_mem_ctl.scala 695:71] + reg [63:0] iccm_dma_rdata; // @[el2_ifu_mem_ctl.scala 699:70] + wire _T_3040 = _T_2615 & _T_2604; // @[el2_ifu_mem_ctl.scala 702:65] + wire _T_3043 = _T_3021 & iccm_correct_ecc; // @[el2_ifu_mem_ctl.scala 703:50] + wire [15:0] _T_3046 = _T_3043 ? 16'h0 : io_ifc_fetch_addr_bf[15:0]; // @[el2_ifu_mem_ctl.scala 703:8] + wire [31:0] _T_3047 = _T_3040 ? io_dma_mem_addr : {{16'd0}, _T_3046}; // @[el2_ifu_mem_ctl.scala 702:25] + wire _T_3436 = _T_3274 == 7'h40; // @[el2_lib.scala 308:62] + wire _T_3437 = _T_3424[38] ^ _T_3436; // @[el2_lib.scala 308:44] + wire [3:0] _T_3444 = {_T_3424[7],_T_3424[3],_T_3424[1:0]}; // @[Cat.scala 29:58] + wire [2:0] _T_3446 = {_T_3437,_T_3424[31],_T_3424[15]}; // @[Cat.scala 29:58] + wire _T_3838 = _T_4 & ifc_iccm_access_f; // @[el2_ifu_mem_ctl.scala 715:58] rvclkhdr rvclkhdr ( // @[el2_lib.scala 412:22] .io_clk(rvclkhdr_io_clk), .io_en(rvclkhdr_io_en), @@ -275,7 +1247,7 @@ module el2_ifu_mem_ctl( ); assign io_ifu_miss_state_idle = 1'h0; // @[el2_ifu_mem_ctl.scala 131:25] assign io_ifu_ic_mb_empty = 1'h0; // @[el2_ifu_mem_ctl.scala 132:21] - assign io_ic_dma_active = io_dec_tlu_flush_err_wb; // @[el2_ifu_mem_ctl.scala 133:19 el2_ifu_mem_ctl.scala 241:20] + assign io_ic_dma_active = _T_12 | io_dec_tlu_flush_err_wb; // @[el2_ifu_mem_ctl.scala 133:19 el2_ifu_mem_ctl.scala 241:20] assign io_ic_write_stall = 1'h0; // @[el2_ifu_mem_ctl.scala 134:20] assign io_ifu_pmu_ic_miss = 1'h0; // @[el2_ifu_mem_ctl.scala 135:21] assign io_ifu_pmu_ic_hit = 1'h0; // @[el2_ifu_mem_ctl.scala 136:20] @@ -298,56 +1270,57 @@ module el2_ifu_mem_ctl( assign io_ifu_axi_wstrb = 8'h0; // @[el2_ifu_mem_ctl.scala 152:19] assign io_ifu_axi_wlast = 1'h0; // @[el2_ifu_mem_ctl.scala 153:19] assign io_ifu_axi_bready = 1'h0; // @[el2_ifu_mem_ctl.scala 154:20] - assign io_ifu_axi_arvalid = 1'h0; // @[el2_ifu_mem_ctl.scala 155:21] - assign io_ifu_axi_arid = 3'h0; // @[el2_ifu_mem_ctl.scala 157:18] - assign io_ifu_axi_araddr = 32'h0; // @[el2_ifu_mem_ctl.scala 158:20] - assign io_ifu_axi_arregion = 4'h0; // @[el2_ifu_mem_ctl.scala 159:22] + assign io_ifu_axi_arvalid = ifu_bus_cmd_valid; // @[el2_ifu_mem_ctl.scala 155:21 el2_ifu_mem_ctl.scala 601:22] + assign io_ifu_axi_arid = bus_rd_addr_count & _T_2509; // @[el2_ifu_mem_ctl.scala 157:18 el2_ifu_mem_ctl.scala 602:19] + assign io_ifu_axi_araddr = _T_2511 & _T_2513; // @[el2_ifu_mem_ctl.scala 158:20 el2_ifu_mem_ctl.scala 603:21] + assign io_ifu_axi_arregion = ifu_ic_req_addr_f[28:25]; // @[el2_ifu_mem_ctl.scala 159:22 el2_ifu_mem_ctl.scala 606:23] assign io_ifu_axi_arlen = 8'h0; // @[el2_ifu_mem_ctl.scala 160:19] - assign io_ifu_axi_arsize = 3'h0; // @[el2_ifu_mem_ctl.scala 161:20] - assign io_ifu_axi_arburst = 2'h0; // @[el2_ifu_mem_ctl.scala 162:21] + assign io_ifu_axi_arsize = 3'h3; // @[el2_ifu_mem_ctl.scala 161:20 el2_ifu_mem_ctl.scala 604:21] + assign io_ifu_axi_arburst = 2'h1; // @[el2_ifu_mem_ctl.scala 162:21 el2_ifu_mem_ctl.scala 607:22] assign io_ifu_axi_arlock = 1'h0; // @[el2_ifu_mem_ctl.scala 163:20] - assign io_ifu_axi_arcache = 4'h0; // @[el2_ifu_mem_ctl.scala 164:21] + assign io_ifu_axi_arcache = 4'hf; // @[el2_ifu_mem_ctl.scala 164:21 el2_ifu_mem_ctl.scala 605:22] assign io_ifu_axi_arprot = 3'h0; // @[el2_ifu_mem_ctl.scala 165:20] assign io_ifu_axi_arqos = 4'h0; // @[el2_ifu_mem_ctl.scala 166:19] - assign io_ifu_axi_rready = 1'h0; // @[el2_ifu_mem_ctl.scala 167:20] - assign io_iccm_dma_ecc_error = 1'h0; // @[el2_ifu_mem_ctl.scala 168:24] - assign io_iccm_dma_rvalid = 1'h0; // @[el2_ifu_mem_ctl.scala 169:21] - assign io_iccm_dma_rdata = 64'h0; // @[el2_ifu_mem_ctl.scala 170:20] - assign io_iccm_dma_rtag = 3'h0; // @[el2_ifu_mem_ctl.scala 171:19] + assign io_ifu_axi_rready = 1'h1; // @[el2_ifu_mem_ctl.scala 167:20 el2_ifu_mem_ctl.scala 608:21] + assign io_iccm_dma_ecc_error = |iccm_double_ecc_error; // @[el2_ifu_mem_ctl.scala 168:24 el2_ifu_mem_ctl.scala 698:25] + assign io_iccm_dma_rvalid = iccm_dma_rvalid; // @[el2_ifu_mem_ctl.scala 169:21 el2_ifu_mem_ctl.scala 696:22] + assign io_iccm_dma_rdata = iccm_dma_rdata; // @[el2_ifu_mem_ctl.scala 170:20 el2_ifu_mem_ctl.scala 700:21] + assign io_iccm_dma_rtag = iccm_dma_rtag; // @[el2_ifu_mem_ctl.scala 171:19 el2_ifu_mem_ctl.scala 691:20] assign io_iccm_ready = 1'h0; // @[el2_ifu_mem_ctl.scala 172:16] assign io_ic_rw_addr = 31'h0; // @[el2_ifu_mem_ctl.scala 173:16] assign io_ic_wr_en = 2'h0; // @[el2_ifu_mem_ctl.scala 174:14] assign io_ic_rd_en = 1'h0; // @[el2_ifu_mem_ctl.scala 175:14] - assign io_ic_wr_data_0 = 71'h0; // @[el2_ifu_mem_ctl.scala 176:16 el2_ifu_mem_ctl.scala 388:17] - assign io_ic_wr_data_1 = 71'h0; // @[el2_ifu_mem_ctl.scala 176:16 el2_ifu_mem_ctl.scala 388:17] - assign io_ic_debug_wr_data = io_dec_tlu_ic_diag_pkt_icache_wrdata; // @[el2_ifu_mem_ctl.scala 177:22 el2_ifu_mem_ctl.scala 389:23] - assign io_ifu_ic_debug_rd_data = _T_1192; // @[el2_ifu_mem_ctl.scala 178:26 el2_ifu_mem_ctl.scala 397:27] + assign io_ic_wr_data_0 = ic_wr_16bytes_data[70:0]; // @[el2_ifu_mem_ctl.scala 176:16 el2_ifu_mem_ctl.scala 391:17] + assign io_ic_wr_data_1 = ic_wr_16bytes_data[141:71]; // @[el2_ifu_mem_ctl.scala 176:16 el2_ifu_mem_ctl.scala 391:17] + assign io_ic_debug_wr_data = io_dec_tlu_ic_diag_pkt_icache_wrdata; // @[el2_ifu_mem_ctl.scala 177:22 el2_ifu_mem_ctl.scala 392:23] + assign io_ifu_ic_debug_rd_data = _T_1200; // @[el2_ifu_mem_ctl.scala 178:26 el2_ifu_mem_ctl.scala 400:27] assign io_ic_debug_addr = 10'h0; // @[el2_ifu_mem_ctl.scala 156:19] assign io_ic_debug_rd_en = 1'h0; // @[el2_ifu_mem_ctl.scala 128:20] assign io_ic_debug_wr_en = 1'h0; // @[el2_ifu_mem_ctl.scala 129:20] assign io_ic_debug_tag_array = 1'h0; // @[el2_ifu_mem_ctl.scala 130:24] assign io_ic_debug_way = 2'h0; // @[el2_ifu_mem_ctl.scala 200:18] assign io_ic_tag_valid = 2'h0; // @[el2_ifu_mem_ctl.scala 179:18] - assign io_iccm_rw_addr = 15'h0; // @[el2_ifu_mem_ctl.scala 180:18] - assign io_iccm_wren = 1'h0; // @[el2_ifu_mem_ctl.scala 181:15] - assign io_iccm_rden = 1'h0; // @[el2_ifu_mem_ctl.scala 182:15] - assign io_iccm_wr_data = 78'h0; // @[el2_ifu_mem_ctl.scala 183:18] - assign io_iccm_wr_size = 3'h0; // @[el2_ifu_mem_ctl.scala 184:18] - assign io_ic_hit_f = ic_act_hit_f | ic_iccm_hit_f; // @[el2_ifu_mem_ctl.scala 185:14 el2_ifu_mem_ctl.scala 336:15] - assign io_ic_access_fault_f = 1'h0; // @[el2_ifu_mem_ctl.scala 186:23 el2_ifu_mem_ctl.scala 427:24] - assign io_ic_access_fault_type_f = io_iccm_rd_ecc_double_err ? 2'h1 : _T_1256; // @[el2_ifu_mem_ctl.scala 187:28 el2_ifu_mem_ctl.scala 428:29] - assign io_iccm_rd_ecc_single_err = 1'h0; // @[el2_ifu_mem_ctl.scala 188:28] - assign io_iccm_rd_ecc_double_err = 1'h0; // @[el2_ifu_mem_ctl.scala 189:28] - assign io_ic_error_start = _T_1179 & ic_act_hit_f; // @[el2_ifu_mem_ctl.scala 190:20 el2_ifu_mem_ctl.scala 391:21] + assign io_iccm_rw_addr = _T_3047[14:0]; // @[el2_ifu_mem_ctl.scala 180:18 el2_ifu_mem_ctl.scala 702:19] + assign io_iccm_wren = _T_2616 | iccm_correct_ecc; // @[el2_ifu_mem_ctl.scala 181:15 el2_ifu_mem_ctl.scala 673:16] + assign io_iccm_rden = _T_2620 | _T_2621; // @[el2_ifu_mem_ctl.scala 182:15 el2_ifu_mem_ctl.scala 674:16] + assign io_iccm_wr_data = _T_3022 ? 78'h0 : _T_3030; // @[el2_ifu_mem_ctl.scala 183:18 el2_ifu_mem_ctl.scala 679:19] + assign io_iccm_wr_size = _T_2626 & io_dma_mem_sz; // @[el2_ifu_mem_ctl.scala 184:18 el2_ifu_mem_ctl.scala 676:19] + assign io_ic_hit_f = _T_254 | ic_iccm_hit_f; // @[el2_ifu_mem_ctl.scala 185:14 el2_ifu_mem_ctl.scala 336:15] + assign io_ic_access_fault_f = ifc_bus_acc_fault_f & _T_308; // @[el2_ifu_mem_ctl.scala 186:23 el2_ifu_mem_ctl.scala 430:24] + assign io_ic_access_fault_type_f = io_iccm_rd_ecc_double_err ? 2'h1 : _T_1264; // @[el2_ifu_mem_ctl.scala 187:28 el2_ifu_mem_ctl.scala 431:29] + assign io_iccm_rd_ecc_single_err = _T_3838 & ifc_fetch_req_f; // @[el2_ifu_mem_ctl.scala 188:28 el2_ifu_mem_ctl.scala 715:29] + assign io_iccm_rd_ecc_double_err = iccm_dma_ecc_error_in & ifc_iccm_access_f; // @[el2_ifu_mem_ctl.scala 189:28 el2_ifu_mem_ctl.scala 716:29] + assign io_ic_error_start = _T_1188 | ic_rd_parity_final_err; // @[el2_ifu_mem_ctl.scala 190:20 el2_ifu_mem_ctl.scala 394:21] assign io_ifu_async_error_start = io_iccm_rd_ecc_single_err | io_ic_error_start; // @[el2_ifu_mem_ctl.scala 191:27 el2_ifu_mem_ctl.scala 240:28] - assign io_iccm_dma_sb_error = 1'h0; // @[el2_ifu_mem_ctl.scala 192:23 el2_ifu_mem_ctl.scala 239:24] - assign io_ic_fetch_val_f = 2'h0; // @[el2_ifu_mem_ctl.scala 193:20] + assign io_iccm_dma_sb_error = _T_4 & dma_iccm_req_f; // @[el2_ifu_mem_ctl.scala 192:23 el2_ifu_mem_ctl.scala 239:24] + assign io_ic_fetch_val_f = {1'h0,fetch_req_f_qual}; // @[el2_ifu_mem_ctl.scala 193:20 el2_ifu_mem_ctl.scala 435:21] assign io_ic_data_f = 32'h0; // @[el2_ifu_mem_ctl.scala 194:15] assign io_ic_premux_data = 64'h0; // @[el2_ifu_mem_ctl.scala 195:20] assign io_ic_sel_premux_data = 1'h0; // @[el2_ifu_mem_ctl.scala 196:24] assign io_ifu_ic_debug_rd_data_valid = 1'h0; // @[el2_ifu_mem_ctl.scala 197:32] assign io_iccm_buf_correct_ecc = 1'h0; // @[el2_ifu_mem_ctl.scala 198:26] assign io_iccm_correction_state = 1'h0; // @[el2_ifu_mem_ctl.scala 199:27] + assign io_test = {_T_3446,_T_3444}; // @[el2_ifu_mem_ctl.scala 466:11 el2_ifu_mem_ctl.scala 725:11] assign rvclkhdr_io_clk = clock; // @[el2_lib.scala 413:17] assign rvclkhdr_io_en = io_ic_debug_rd_en | io_ic_debug_wr_en; // @[el2_lib.scala 414:16] assign rvclkhdr_io_scan_mode = io_scan_mode; // @[el2_lib.scala 415:23] @@ -396,17 +1369,103 @@ initial begin _RAND_2 = {1{`RANDOM}}; miss_state = _RAND_2[2:0]; _RAND_3 = {1{`RANDOM}}; - ifc_iccm_access_f = _RAND_3[0:0]; + ifu_fetch_addr_int_f = _RAND_3[30:0]; _RAND_4 = {1{`RANDOM}}; - uncacheable_miss_ff = _RAND_4[0:0]; + ifc_iccm_access_f = _RAND_4[0:0]; _RAND_5 = {1{`RANDOM}}; - imb_ff = _RAND_5[30:0]; + iccm_dma_rvalid_in = _RAND_5[0:0]; _RAND_6 = {1{`RANDOM}}; - ifu_fetch_addr_int_f = _RAND_6[30:0]; + dma_iccm_req_f = _RAND_6[0:0]; _RAND_7 = {1{`RANDOM}}; - ifc_region_acc_fault_f = _RAND_7[0:0]; - _RAND_8 = {3{`RANDOM}}; - _T_1192 = _RAND_8[70:0]; + perr_state = _RAND_7[2:0]; + _RAND_8 = {1{`RANDOM}}; + err_stop_state = _RAND_8[1:0]; + _RAND_9 = {1{`RANDOM}}; + ifu_bus_rvalid_unq_ff = _RAND_9[0:0]; + _RAND_10 = {1{`RANDOM}}; + bus_ifu_bus_clk_en_ff = _RAND_10[0:0]; + _RAND_11 = {1{`RANDOM}}; + uncacheable_miss_ff = _RAND_11[0:0]; + _RAND_12 = {1{`RANDOM}}; + bus_data_beat_count = _RAND_12[2:0]; + _RAND_13 = {1{`RANDOM}}; + ic_miss_buff_data_valid = _RAND_13[7:0]; + _RAND_14 = {1{`RANDOM}}; + imb_ff = _RAND_14[30:0]; + _RAND_15 = {1{`RANDOM}}; + last_data_recieved_ff = _RAND_15[0:0]; + _RAND_16 = {1{`RANDOM}}; + sel_mb_addr_ff = _RAND_16[0:0]; + _RAND_17 = {1{`RANDOM}}; + imb_scnd_ff = _RAND_17[30:0]; + _RAND_18 = {1{`RANDOM}}; + ifu_bus_rid_ff = _RAND_18[2:0]; + _RAND_19 = {1{`RANDOM}}; + scnd_miss_req_q = _RAND_19[0:0]; + _RAND_20 = {1{`RANDOM}}; + miss_addr = _RAND_20[25:0]; + _RAND_21 = {1{`RANDOM}}; + ifc_region_acc_fault_f = _RAND_21[0:0]; + _RAND_22 = {1{`RANDOM}}; + bus_rd_addr_count = _RAND_22[2:0]; + _RAND_23 = {1{`RANDOM}}; + ic_act_miss_f_delayed = _RAND_23[0:0]; + _RAND_24 = {2{`RANDOM}}; + ifu_bus_rdata_ff = _RAND_24[63:0]; + _RAND_25 = {2{`RANDOM}}; + _T_1284 = _RAND_25[63:0]; + _RAND_26 = {2{`RANDOM}}; + _T_1286 = _RAND_26[63:0]; + _RAND_27 = {2{`RANDOM}}; + _T_1288 = _RAND_27[63:0]; + _RAND_28 = {2{`RANDOM}}; + _T_1290 = _RAND_28[63:0]; + _RAND_29 = {2{`RANDOM}}; + _T_1292 = _RAND_29[63:0]; + _RAND_30 = {2{`RANDOM}}; + _T_1294 = _RAND_30[63:0]; + _RAND_31 = {2{`RANDOM}}; + _T_1296 = _RAND_31[63:0]; + _RAND_32 = {2{`RANDOM}}; + _T_1298 = _RAND_32[63:0]; + _RAND_33 = {2{`RANDOM}}; + _T_1300 = _RAND_33[63:0]; + _RAND_34 = {2{`RANDOM}}; + _T_1302 = _RAND_34[63:0]; + _RAND_35 = {2{`RANDOM}}; + _T_1304 = _RAND_35[63:0]; + _RAND_36 = {2{`RANDOM}}; + _T_1306 = _RAND_36[63:0]; + _RAND_37 = {2{`RANDOM}}; + _T_1308 = _RAND_37[63:0]; + _RAND_38 = {2{`RANDOM}}; + _T_1310 = _RAND_38[63:0]; + _RAND_39 = {2{`RANDOM}}; + _T_1312 = _RAND_39[63:0]; + _RAND_40 = {2{`RANDOM}}; + _T_1314 = _RAND_40[63:0]; + _RAND_41 = {1{`RANDOM}}; + ic_crit_wd_rdy_new_ff = _RAND_41[0:0]; + _RAND_42 = {1{`RANDOM}}; + ic_miss_buff_data_error = _RAND_42[7:0]; + _RAND_43 = {3{`RANDOM}}; + _T_1200 = _RAND_43[70:0]; + _RAND_44 = {1{`RANDOM}}; + ifu_bus_cmd_valid = _RAND_44[0:0]; + _RAND_45 = {1{`RANDOM}}; + bus_cmd_beat_count = _RAND_45[2:0]; + _RAND_46 = {1{`RANDOM}}; + ifc_dma_access_ok_prev = _RAND_46[0:0]; + _RAND_47 = {1{`RANDOM}}; + dma_mem_addr_ff = _RAND_47[1:0]; + _RAND_48 = {1{`RANDOM}}; + dma_mem_tag_ff = _RAND_48[2:0]; + _RAND_49 = {1{`RANDOM}}; + iccm_dma_rtag = _RAND_49[2:0]; + _RAND_50 = {1{`RANDOM}}; + iccm_dma_rvalid = _RAND_50[0:0]; + _RAND_51 = {2{`RANDOM}}; + iccm_dma_rdata = _RAND_51[63:0]; `endif // RANDOMIZE_REG_INIT `endif // RANDOMIZE end // initial @@ -435,9 +1494,19 @@ end // initial miss_state <= 3'h2; end end else if (_T_33) begin - if (io_dec_tlu_force_halt) begin + if (_T_38) begin miss_state <= 3'h0; - end else if (_T_74) begin + end else if (_T_42) begin + miss_state <= 3'h3; + end else if (_T_49) begin + miss_state <= 3'h1; + end else if (_T_53) begin + miss_state <= 3'h0; + end else if (_T_64) begin + miss_state <= 3'h6; + end else if (_T_72) begin + miss_state <= 3'h0; + end else if (_T_77) begin miss_state <= 3'h2; end else begin miss_state <= 3'h0; @@ -468,7 +1537,11 @@ end // initial if (io_dec_tlu_force_halt) begin miss_state <= 3'h0; end else if (io_exu_flush_final) begin - miss_state <= 3'h2; + if (_T_34) begin + miss_state <= 3'h0; + end else begin + miss_state <= 3'h2; + end end else begin miss_state <= 3'h1; end @@ -476,7 +1549,11 @@ end // initial if (io_dec_tlu_force_halt) begin miss_state <= 3'h0; end else if (io_exu_flush_final) begin - miss_state <= 3'h2; + if (_T_34) begin + miss_state <= 3'h0; + end else begin + miss_state <= 3'h2; + end end else begin miss_state <= 3'h0; end @@ -484,11 +1561,21 @@ end // initial miss_state <= 3'h0; end end + if (reset) begin + ifu_fetch_addr_int_f <= 31'h0; + end else begin + ifu_fetch_addr_int_f <= io_ifc_fetch_addr_bf; + end if (reset) begin ifc_iccm_access_f <= 1'h0; end else begin ifc_iccm_access_f <= io_ifc_iccm_access_bf; end + if (reset) begin + ifu_bus_rvalid_unq_ff <= 1'h0; + end else if (io_ifu_bus_clk_en) begin + ifu_bus_rvalid_unq_ff <= io_ifu_axi_rvalid; + end if (reset) begin uncacheable_miss_ff <= 1'h0; end else if (!(sel_hold_imb)) begin @@ -498,9 +1585,21 @@ end // initial imb_ff <= io_ifc_fetch_addr_bf; end if (reset) begin - ifu_fetch_addr_int_f <= 31'h0; - end else begin - ifu_fetch_addr_int_f <= io_ifc_fetch_addr_bf; + imb_scnd_ff <= 31'h0; + end else if (!(sel_hold_imb_scnd)) begin + imb_scnd_ff <= io_ifc_fetch_addr_bf; + end + if (reset) begin + ifu_bus_rid_ff <= 3'h0; + end else if (io_ifu_bus_clk_en) begin + ifu_bus_rid_ff <= io_ifu_axi_rid; + end + if (reset) begin + miss_addr <= 26'h0; + end else if (_T_223) begin + miss_addr <= imb_ff[30:5]; + end else if (scnd_miss_req_q) begin + miss_addr <= imb_scnd_ff[30:5]; end if (reset) begin ifc_region_acc_fault_f <= 1'h0; @@ -508,9 +1607,268 @@ end // initial ifc_region_acc_fault_f <= io_ifc_region_acc_fault_bf; end if (reset) begin - _T_1192 <= 71'h0; + bus_rd_addr_count <= 3'h0; + end else if (_T_2552) begin + if (_T_223) begin + bus_rd_addr_count <= imb_ff[4:2]; + end else if (scnd_miss_req_q) begin + bus_rd_addr_count <= imb_scnd_ff[4:2]; + end else if (bus_cmd_sent) begin + bus_rd_addr_count <= _T_2548; + end + end + if (reset) begin + ifu_bus_rdata_ff <= 64'h0; + end else if (io_ifu_bus_clk_en) begin + ifu_bus_rdata_ff <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1284 <= 64'h0; + end else if (write_fill_data_0) begin + _T_1284 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1286 <= 64'h0; + end else if (write_fill_data_0) begin + _T_1286 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1288 <= 64'h0; + end else if (write_fill_data_1) begin + _T_1288 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1290 <= 64'h0; + end else if (write_fill_data_1) begin + _T_1290 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1292 <= 64'h0; + end else if (write_fill_data_2) begin + _T_1292 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1294 <= 64'h0; + end else if (write_fill_data_2) begin + _T_1294 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1296 <= 64'h0; + end else if (write_fill_data_3) begin + _T_1296 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1298 <= 64'h0; + end else if (write_fill_data_3) begin + _T_1298 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1300 <= 64'h0; + end else if (write_fill_data_4) begin + _T_1300 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1302 <= 64'h0; + end else if (write_fill_data_4) begin + _T_1302 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1304 <= 64'h0; + end else if (write_fill_data_5) begin + _T_1304 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1306 <= 64'h0; + end else if (write_fill_data_5) begin + _T_1306 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1308 <= 64'h0; + end else if (write_fill_data_6) begin + _T_1308 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1310 <= 64'h0; + end else if (write_fill_data_6) begin + _T_1310 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1312 <= 64'h0; + end else if (write_fill_data_7) begin + _T_1312 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1314 <= 64'h0; + end else if (write_fill_data_7) begin + _T_1314 <= io_ifu_axi_rdata; + end + if (reset) begin + _T_1200 <= 71'h0; end else begin - _T_1192 <= io_ic_debug_rd_data; + _T_1200 <= io_ic_debug_rd_data; + end + if (reset) begin + ifu_bus_cmd_valid <= 1'h0; + end else if (_T_2501) begin + ifu_bus_cmd_valid <= ifc_bus_ic_req_ff_in; + end + if (reset) begin + bus_cmd_beat_count <= 3'h0; + end else if (_T_2576) begin + bus_cmd_beat_count <= bus_new_cmd_beat_count; + end + end + always @(posedge io_free_clk) begin + if (reset) begin + iccm_dma_rvalid_in <= 1'h0; + end else begin + iccm_dma_rvalid_in <= _T_2620; + end + if (reset) begin + dma_iccm_req_f <= 1'h0; + end else begin + dma_iccm_req_f <= io_dma_iccm_req; + end + if (reset) begin + perr_state <= 3'h0; + end else if (perr_state_en) begin + if (_T_2404) begin + if (io_iccm_dma_sb_error) begin + perr_state <= 3'h4; + end else if (_T_2406) begin + perr_state <= 3'h1; + end else begin + perr_state <= 3'h2; + end + end else if (_T_2416) begin + perr_state <= 3'h0; + end else if (_T_2419) begin + if (_T_2421) begin + perr_state <= 3'h0; + end else begin + perr_state <= 3'h3; + end + end else if (_T_2425) begin + if (io_dec_tlu_force_halt) begin + perr_state <= 3'h0; + end else begin + perr_state <= 3'h3; + end + end else begin + perr_state <= 3'h0; + end + end + if (reset) begin + err_stop_state <= 2'h0; + end else if (err_stop_state_en) begin + if (_T_2429) begin + err_stop_state <= 2'h1; + end else if (_T_2434) begin + if (_T_2436) begin + err_stop_state <= 2'h0; + end else if (_T_2457) begin + err_stop_state <= 2'h3; + end else if (io_ifu_fetch_val[0]) begin + err_stop_state <= 2'h2; + end else begin + err_stop_state <= 2'h1; + end + end else if (_T_2461) begin + if (_T_2436) begin + err_stop_state <= 2'h0; + end else if (io_ifu_fetch_val[0]) begin + err_stop_state <= 2'h3; + end else begin + err_stop_state <= 2'h2; + end + end else if (_T_2478) begin + if (_T_2482) begin + err_stop_state <= 2'h0; + end else if (io_dec_tlu_flush_err_wb) begin + err_stop_state <= 2'h1; + end else begin + err_stop_state <= 2'h3; + end + end else begin + err_stop_state <= 2'h0; + end + end + if (reset) begin + bus_ifu_bus_clk_en_ff <= 1'h0; + end else begin + bus_ifu_bus_clk_en_ff <= io_ifu_bus_clk_en; + end + if (reset) begin + bus_data_beat_count <= 3'h0; + end else begin + bus_data_beat_count <= bus_new_data_beat_count; + end + if (reset) begin + ic_miss_buff_data_valid <= 8'h0; + end else begin + ic_miss_buff_data_valid <= _T_1345; + end + if (reset) begin + last_data_recieved_ff <= 1'h0; + end else begin + last_data_recieved_ff <= last_data_recieved_in; + end + if (reset) begin + sel_mb_addr_ff <= 1'h0; + end else begin + sel_mb_addr_ff <= sel_mb_addr; + end + if (reset) begin + scnd_miss_req_q <= 1'h0; + end else begin + scnd_miss_req_q <= scnd_miss_req_in; + end + if (reset) begin + ic_act_miss_f_delayed <= 1'h0; + end else begin + ic_act_miss_f_delayed <= ic_act_miss_f; + end + if (reset) begin + ic_crit_wd_rdy_new_ff <= 1'h0; + end else begin + ic_crit_wd_rdy_new_ff <= ic_crit_wd_rdy_new_in; + end + if (reset) begin + ic_miss_buff_data_error <= 8'h0; + end else begin + ic_miss_buff_data_error <= _T_1385; + end + if (reset) begin + ifc_dma_access_ok_prev <= 1'h0; + end else begin + ifc_dma_access_ok_prev <= ifc_dma_access_ok_d; + end + if (reset) begin + dma_mem_addr_ff <= 2'h0; + end else begin + dma_mem_addr_ff <= io_dma_mem_addr[3:2]; + end + if (reset) begin + dma_mem_tag_ff <= 3'h0; + end else begin + dma_mem_tag_ff <= io_dma_mem_tag; + end + if (reset) begin + iccm_dma_rtag <= 3'h0; + end else begin + iccm_dma_rtag <= dma_mem_tag_ff; + end + if (reset) begin + iccm_dma_rvalid <= 1'h0; + end else begin + iccm_dma_rvalid <= iccm_dma_rvalid_in; + end + if (reset) begin + iccm_dma_rdata <= 64'h0; + end else if (iccm_dma_ecc_error_in) begin + iccm_dma_rdata <= _T_3034; + end else begin + iccm_dma_rdata <= _T_3035; end end endmodule diff --git a/src/main/scala/ifu/el2_ifu_bp_ctl.scala b/src/main/scala/ifu/el2_ifu_bp_ctl.scala index 14ffe012..69775e39 100644 --- a/src/main/scala/ifu/el2_ifu_bp_ctl.scala +++ b/src/main/scala/ifu/el2_ifu_bp_ctl.scala @@ -376,8 +376,6 @@ class el2_ifu_bp_ctl extends Module with el2_lib with RequireAsyncReset { (bht_wr_en2(i) & ((bht_wr_addr2(BHT_ADDR_HI-BHT_ADDR_LO,NUM_BHT_LOOP_OUTER_LO-2)===k.U) | BHT_NO_ADDR_MATCH.B)) } -// val bht_bank_clk = (0 until 2).map(i=>(0 until BHT_ARRAY_DEPTH/NUM_BHT_LOOP).map(k=> -// rvclkhdr(clock, bht_bank_clken(i)(k), 1.U.asBool))) val bht_bank_wr_data = (0 until 2).map(i=>(0 until BHT_ARRAY_DEPTH/NUM_BHT_LOOP).map(k=>(0 until NUM_BHT_LOOP).map(j=> Mux((bht_wr_en2(i)&(bht_wr_addr2(NUM_BHT_LOOP_INNER_HI-BHT_ADDR_LO,0)===j.asUInt)&(bht_wr_addr2(BHT_ADDR_HI-NUM_BHT_LOOP_OUTER_LO+1,NUM_BHT_LOOP_OUTER_LO-BHT_ADDR_LO)===k.asUInt)|BHT_NO_ADDR_MATCH.B).asBool, bht_wr_data2, bht_wr_data0)))) diff --git a/src/main/scala/ifu/el2_ifu_mem_ctl.scala b/src/main/scala/ifu/el2_ifu_mem_ctl.scala index a74fcc93..f49040fa 100644 --- a/src/main/scala/ifu/el2_ifu_mem_ctl.scala +++ b/src/main/scala/ifu/el2_ifu_mem_ctl.scala @@ -122,7 +122,7 @@ class el2_ifu_mem_ctl extends Module with el2_lib { val ifu_ic_debug_rd_data_valid = Output(Bool()) val iccm_buf_correct_ecc = Output(Bool()) val iccm_correction_state = Output(Bool()) - + val test = Output(UInt()) val scan_mode = Input(Bool()) }) io.ic_debug_rd_en:=0.U @@ -206,30 +206,30 @@ class el2_ifu_mem_ctl extends Module with el2_lib { val iccm_single_ecc_error = WireInit(UInt(2.W), 0.U) val ifc_fetch_req_f = WireInit(Bool(), 0.U) - val miss_pending = WireInit(Bool(), 0.U) - val scnd_miss_req = WireInit(Bool(), 0.U) - val dma_iccm_req_f = WireInit(Bool(), 0.U) - val iccm_correct_ecc = WireInit(Bool(), 0.U) + val miss_pending = WireInit(Bool(), false.B) + val scnd_miss_req = WireInit(Bool(), false.B) + val dma_iccm_req_f = WireInit(Bool(), false.B) + val iccm_correct_ecc = WireInit(Bool(), false.B) val perr_state = WireInit(UInt(3.W), 0.U) val err_stop_state = WireInit(UInt(2.W), 0.U) - val err_stop_fetch = WireInit(Bool(), 0.U) + val err_stop_fetch = WireInit(Bool(), false.B) val miss_state = WireInit(UInt(3.W), 0.U) val miss_nxtstate = WireInit(UInt(3.W), 0.U) - val miss_state_en = WireInit(Bool(), 0.U) - val ifu_bus_rsp_valid = WireInit(Bool(), 0.U) - val bus_ifu_bus_clk_en = WireInit(Bool(), 0.U) - val ifu_bus_rsp_ready = WireInit(Bool(), 0.U) - val uncacheable_miss_ff = WireInit(Bool(), 0.U) - val ic_act_miss_f = WireInit(Bool(), 0.U) - val ic_byp_hit_f = WireInit(Bool(), 0.U) + val miss_state_en = WireInit(Bool(), false.B) + val ifu_bus_rsp_valid = WireInit(Bool(), false.B) + val bus_ifu_bus_clk_en = WireInit(Bool(), false.B) + val ifu_bus_rsp_ready = WireInit(Bool(), false.B) + val uncacheable_miss_ff = WireInit(Bool(), false.B) + val ic_act_miss_f = WireInit(Bool(), false.B) + val ic_byp_hit_f = WireInit(Bool(), false.B) val bus_new_data_beat_count = WireInit(UInt(ICACHE_BEAT_BITS.W), 0.U) - val bus_ifu_wr_en_ff = WireInit(Bool(), 0.U) - val last_beat = WireInit(Bool(), 0.U) - val last_data_recieved_ff = WireInit(Bool(), 0.U) + val bus_ifu_wr_en_ff = WireInit(Bool(), false.B) + val last_beat = WireInit(Bool(), false.B) + val last_data_recieved_ff = WireInit(Bool(), false.B) //val flush_final_f = WireInit(Bool(), 0.U) - val stream_eol_f = WireInit(Bool(), 0.U) - val ic_miss_under_miss_f = WireInit(Bool(), 0.U) - val ic_ignore_2nd_miss_f = WireInit(Bool(), 0.U) + val stream_eol_f = WireInit(Bool(), false.B) + val ic_miss_under_miss_f = WireInit(Bool(), false.B) + val ic_ignore_2nd_miss_f = WireInit(Bool(), false.B) val flush_final_f = RegNext(io.exu_flush_final, 0.U) val fetch_bf_f_c1_clken = io.ifc_fetch_req_bf_raw | ifc_fetch_req_f | miss_pending | io.exu_flush_final | scnd_miss_req @@ -243,7 +243,7 @@ class el2_ifu_mem_ctl extends Module with el2_lib { !uncacheable_miss_ff ((miss_state === scnd_miss_C)|(miss_nxtstate === scnd_miss_C)) & !io.exu_flush_final val ifu_bp_hit_taken_q_f = io.ifu_bp_hit_taken_f & io.ic_hit_f - + ///////////////////////////////// MISS FSM ///////////////////////////////// switch(miss_state){ is (idle_C){ miss_nxtstate := Mux((ic_act_miss_f & !io.exu_flush_final).asBool, crit_byp_ok_C, hit_u_miss_C) @@ -347,8 +347,8 @@ class el2_ifu_mem_ctl extends Module with el2_lib { val tagv_mb_ff = WireInit(UInt(ICACHE_NUM_WAYS.W), 0.U) val tagv_mb_in = Mux(scnd_miss_req.asBool, tagv_mb_scnd_ff | (Fill(ICACHE_NUM_WAYS, scnd_miss_index_match) & replace_way_mb_any), Mux(miss_pending.asBool, tagv_mb_ff, ic_tag_valid & Fill(ICACHE_NUM_WAYS, !reset_all_tags))) - val scnd_miss_req_q = WireInit(Bool(), 0.U) - val reset_ic_ff = WireInit(Bool(), 0.U) + val scnd_miss_req_q = WireInit(Bool(), false.B) + val reset_ic_ff = WireInit(Bool(), false.B) val reset_ic_in = miss_pending & !scnd_miss_req_q & (reset_all_tags | reset_ic_ff) reset_ic_ff := RegNext(reset_ic_in) val fetch_uncacheable_ff = RegNext(io.ifc_fetch_uncacheable_bf, 0.U) @@ -373,11 +373,14 @@ class el2_ifu_mem_ctl extends Module with el2_lib { val ifu_ic_req_addr_f = Cat(miss_addr, ic_req_addr_bits_hi_3) val ifu_ic_mb_empty = (((miss_state===hit_u_miss_C) | (miss_state===stream_C)) & !(bus_ifu_wr_en_ff & last_beat)) | !miss_pending val ifu_miss_state_idle = miss_state === idle_C - val write_ic_16_bytes = WireInit(Bool(), 0.U) - val reset_tag_valid_for_miss = WireInit(Bool(), 0.U) + val write_ic_16_bytes = WireInit(Bool(), false.B) + val reset_tag_valid_for_miss = WireInit(Bool(), false.B) val sel_mb_addr = (miss_pending & write_ic_16_bytes & !uncacheable_miss_ff) | reset_tag_valid_for_miss val ifu_ic_rw_int_addr = Mux1H(Seq(sel_mb_addr.asBool->Cat(imb_ff(30,ICACHE_BEAT_ADDR_HI) , ic_wr_addr_bits_hi_3 , imb_ff(1,0)), !sel_mb_addr.asBool->ifu_fetch_addr_int_f)) + val bus_ifu_wr_en_ff_q = WireInit(Bool(), false.B) + val sel_mb_status_addr = miss_pending & write_ic_16_bytes & !uncacheable_miss_ff & last_beat & bus_ifu_wr_en_ff_q + val ifu_status_wr_addr = Mux(sel_mb_status_addr, Cat(imb_ff(30, ICACHE_BEAT_ADDR_HI),ic_wr_addr_bits_hi_3, imb_ff(1,0)), ifu_fetch_addr_int_f) val ic_rw_addr = ifu_ic_rw_int_addr sel_mb_addr_ff := withClock(io.free_clk){RegNext(sel_mb_addr, 0.U)} val ifu_bus_rdata_ff = WireInit(UInt(64.W), 0.U) @@ -432,6 +435,294 @@ class el2_ifu_mem_ctl extends Module with el2_lib { io.ic_fetch_val_f := Cat(fetch_req_f_qual & ifu_bp_inst_mask_f & !(vaddr_f===Fill(ICACHE_BEAT_ADDR_HI,1.U)) & (err_stop_state=/=err_fetch2_C), fetch_req_f_qual) val two_byte_instr = ic_data_f(1,0) =/= 3.U //// Creating full buffer + val ifu_bus_rsp_rdata = WireInit(UInt(64.W), 0.U) + val ic_miss_buff_data_in = ifu_bus_rsp_rdata + val ifu_bus_rsp_tag = WireInit(UInt(IFU_BUS_TAG.W), 0.U) + val bus_ifu_wr_en = WireInit(Bool(), 0.U) + val write_fill_data = (0 until ICACHE_NUM_BEATS).map(i=>bus_ifu_wr_en & (ifu_bus_rsp_tag===i.U)) + val ic_miss_buff_data = Wire(Vec(2*ICACHE_NUM_BEATS, UInt(32.W))) + for(i<- 0 until ICACHE_NUM_BEATS){ + ic_miss_buff_data(2*i) := RegEnable(ic_miss_buff_data_in, 0.U, write_fill_data(i).asBool()) + ic_miss_buff_data(2*i+1) := RegEnable(ic_miss_buff_data_in, 0.U, write_fill_data(i).asBool())} + val ic_miss_buff_data_valid = WireInit(UInt(ICACHE_NUM_BEATS.W), 0.U) + val ic_miss_buff_data_valid_in = (0 until ICACHE_NUM_BEATS).map(i=>write_fill_data(i)|(ic_miss_buff_data_valid(i)&(!ic_act_miss_f))) + ic_miss_buff_data_valid := withClock(io.free_clk){RegNext(ic_miss_buff_data_valid_in.reverse.reduce(Cat(_,_)), 0.U)} + val bus_ifu_wr_data_error = WireInit(Bool(), 0.U) + val ic_miss_buff_data_error = WireInit(UInt(ICACHE_NUM_BEATS.W), 0.U) + val ic_miss_buff_data_error_in =(0 until ICACHE_NUM_BEATS).map(i=>Mux(write_fill_data(i).asBool,bus_ifu_wr_data_error, + ic_miss_buff_data_error(i) & !ic_act_miss_f)) + ic_miss_buff_data_error := withClock(io.free_clk){RegNext(ic_miss_buff_data_error_in.reverse.reduce(Cat(_,_)), 0.U)} + + // New Bypass ready + val bypass_index = imb_ff(ICACHE_BEAT_ADDR_HI-1, 0) + val bypass_index_5_3_inc = bypass_index(bypass_index.getWidth-1,2) + 1.U + val bypass_valid_value_check = Mux1H((0 until ICACHE_NUM_BEATS).map(i=>(bypass_index(bypass_index.getWidth-1,2)===i.U).asBool->ic_miss_buff_data_valid_in(i))) + val bypass_data_ready_in = (bypass_valid_value_check & !bypass_index(1) & !bypass_index(0)) | + (bypass_valid_value_check & !bypass_index(1) & bypass_index(0)) | + (bypass_valid_value_check & bypass_index(1) & !bypass_index(0)) | + (bypass_valid_value_check & bypass_index(1) & bypass_index(0) & Mux1H((0 until ICACHE_NUM_BEATS).map(i=>(bypass_index_5_3_inc===i.U).asBool->ic_miss_buff_data_valid_in(i)))) | + (bypass_valid_value_check & bypass_index(ICACHE_BEAT_ADDR_HI-1,2)===Fill(ICACHE_BEAT_ADDR_HI,1.U)) + + io.test := bypass_data_ready_in + val ic_crit_wd_rdy_new_ff = WireInit(Bool(), 0.U) + val ic_crit_wd_rdy_new_in = (bypass_data_ready_in & crit_wd_byp_ok_ff & uncacheable_miss_ff & !io.exu_flush_final & !ifu_bp_hit_taken_q_f) | + ( crit_wd_byp_ok_ff & !uncacheable_miss_ff & !io.exu_flush_final & !ifu_bp_hit_taken_q_f) | + (ic_crit_wd_rdy_new_ff & crit_wd_byp_ok_ff & !fetch_req_icache_f & !io.exu_flush_final) + ic_crit_wd_rdy_new_ff := withClock(io.free_clk){RegNext(ic_crit_wd_rdy_new_in, 0.U)} + val byp_fetch_index = ifu_fetch_addr_int_f(ICACHE_BEAT_ADDR_HI-1,0) + val byp_fetch_index_0 = Cat(ifu_fetch_addr_int_f(ICACHE_BEAT_ADDR_HI-1,2), 0.U) + val byp_fetch_index_1 = Cat(ifu_fetch_addr_int_f(ICACHE_BEAT_ADDR_HI-1,2), 1.U) + val byp_fetch_index_inc = ifu_fetch_addr_int_f(ICACHE_BEAT_ADDR_HI-1,2) + 1.U + val byp_fetch_index_inc_0 = Cat(byp_fetch_index_inc, 0.U) + val byp_fetch_index_inc_1 = Cat(byp_fetch_index_inc, 1.U) + val ic_miss_buff_data_error_bypass = Mux1H((0 until ICACHE_NUM_BEATS).map(i=>(bypass_index(ICACHE_BEAT_ADDR_HI-1,2)===i.U).asBool->ic_miss_buff_data_error(i))) + val ic_miss_buff_data_error_bypass_inc = Mux1H((0 until ICACHE_NUM_BEATS).map(i=>(byp_fetch_index_inc===i.U).asBool->ic_miss_buff_data_error(i))) + + + when(ifu_fetch_addr_int_f(1)&ifu_fetch_addr_int_f(0)){ + ifu_byp_data_err_new := ic_miss_buff_data_error_bypass + } otherwise{ifu_byp_data_err_new := ic_miss_buff_data_error_bypass | ic_miss_buff_data_error_bypass_inc} + + val ic_byp_data_only_pre_new = Mux(!ifu_fetch_addr_int_f(0).asBool, + Cat(Mux1H((0 until 2*ICACHE_NUM_BEATS).map(i=>(byp_fetch_index_inc_0===i.U).asBool->ic_miss_buff_data(i)(15,0))), Mux1H((0 until 2*ICACHE_NUM_BEATS).map(i=>(byp_fetch_index_1===i.U).asBool->ic_miss_buff_data(i)(31,0))), Mux1H((0 until 2*ICACHE_NUM_BEATS).map(i=>(byp_fetch_index_0===i.U).asBool->ic_miss_buff_data(i)(31,0)))), + Cat(Mux1H((0 until 2*ICACHE_NUM_BEATS).map(i=>(byp_fetch_index_inc_1===i.U).asBool->ic_miss_buff_data(i)(15,0))), Mux1H((0 until 2*ICACHE_NUM_BEATS).map(i=>(byp_fetch_index_inc_0===i.U).asBool->ic_miss_buff_data(i)(31,0))), Mux1H((0 until 2*ICACHE_NUM_BEATS).map(i=>(byp_fetch_index_1===i.U).asBool->ic_miss_buff_data(i)(31,0))))) + + ic_byp_data_only_new := Mux(!ifu_fetch_addr_int_f(0).asBool(),ic_byp_data_only_pre_new,Cat(0.U(16.W),ic_byp_data_only_pre_new(79,16))) + + val miss_wrap_f = imb_ff(ICACHE_TAG_INDEX_LO-1) =/= ifu_fetch_addr_int_f(ICACHE_TAG_INDEX_LO) + val ic_miss_buff_data_valid_bypass_index = Mux1H((0 until ICACHE_NUM_BEATS).map(i=>(byp_fetch_index(ICACHE_BEAT_ADDR_HI-1,2)===i.U).asBool->ic_miss_buff_data_valid(i))) + val ic_miss_buff_data_valid_inc_bypass_index = Mux1H((0 until ICACHE_NUM_BEATS).map(i=>(byp_fetch_index_inc===i.U).asBool->ic_miss_buff_data_valid(i))) + val miss_buff_hit_unq_f = (ic_miss_buff_data_valid_bypass_index & !byp_fetch_index(1) & !byp_fetch_index(0)) | + (ic_miss_buff_data_valid_bypass_index & !byp_fetch_index(1) & byp_fetch_index(0)) | + (ic_miss_buff_data_valid_bypass_index & byp_fetch_index(1) & !byp_fetch_index(0)) | + (ic_miss_buff_data_valid_bypass_index & byp_fetch_index(1) & byp_fetch_index(0) & ic_miss_buff_data_valid_inc_bypass_index) | + (ic_miss_buff_data_valid_bypass_index & !byp_fetch_index(1) & !byp_fetch_index(0) & (byp_fetch_index(ICACHE_BEAT_ADDR_HI-1,2) === Fill(ICACHE_BEAT_BITS,1.U))) + + stream_hit_f := (miss_state===stream_C) & (miss_buff_hit_unq_f & !miss_wrap_f) + stream_miss_f := (miss_state===stream_C) & (miss_buff_hit_unq_f & !miss_wrap_f) & ifc_fetch_req_f + stream_eol_f := (byp_fetch_index(ICACHE_BEAT_ADDR_HI-1,1)===Fill(ICACHE_BEAT_BITS, 1.U)) & ifc_fetch_req_f & stream_hit_f + crit_byp_hit_f := miss_buff_hit_unq_f & ((miss_state===crit_wrd_rdy_C) | (miss_state===crit_byp_ok_C)) + + + val other_tag = Cat(ifu_bus_rid_ff(IFU_BUS_TAG-1,1),!ifu_bus_rid_ff(0)) + val second_half_available = Mux1H((0 until ICACHE_NUM_BEATS).map(i=>(other_tag===i.U).asBool->ic_miss_buff_data_valid(i))) + write_ic_16_bytes := second_half_available & bus_ifu_wr_en_ff + ic_miss_buff_half := Cat(Mux1H((0 until 2*ICACHE_NUM_BEATS).map(i=>(Cat(other_tag,1.U)===i.U).asBool->ic_miss_buff_data(i))), + Mux1H((0 until ICACHE_NUM_BEATS).map(i=>(Cat(other_tag,0.U)===i.U).asBool->ic_miss_buff_data(i)))) + + ic_rd_parity_final_err := io.ic_tag_perr & sel_ic_data & !(ifc_region_acc_fault_final_f | ifc_bus_acc_fault_f) + val ifu_ic_rw_int_addr_ff = WireInit(UInt((ICACHE_INDEX_HI-ICACHE_TAG_INDEX_LO-1).W), 0.U) + + val perr_sb_write_status = WireInit(Bool(), false.B) + val perr_ic_index_ff = RegEnable(ifu_ic_rw_int_addr_ff, 0.U, perr_sb_write_status) + val perr_sel_invalidate = WireInit(Bool(), false.B) + val perr_err_inv_way = Fill(ICACHE_NUM_WAYS, perr_sel_invalidate) + iccm_correct_ecc := perr_state === ecc_cor_C + val dma_sb_err_state = perr_state === dma_sb_err_C + val dma_sb_err_state_ff = withClock(io.active_clk){RegNext(dma_sb_err_state, 0.U)} + + ///////////////////////////////// ERROR FSM ///////////////////////////////// + val perr_nxtstate = WireInit(UInt(3.W), 0.U) + val perr_state_en = WireInit(Bool(), false.B) + val iccm_error_start = WireInit(Bool(), false.B) + switch(perr_state){ + is(err_idle_C){ + perr_nxtstate := Mux(io.iccm_dma_sb_error, dma_sb_err_C, Mux((io.ic_error_start & !io.exu_flush_final).asBool, ic_wff_C, ecc_wff_C)) + perr_state_en := (((iccm_error_start | io.ic_error_start) & !io.exu_flush_final) | io.iccm_dma_sb_error) & !io.dec_tlu_force_halt + perr_sb_write_status := perr_state_en + } + is(ic_wff_C){ + perr_nxtstate := err_idle_C + perr_state_en := io.dec_tlu_flush_lower_wb | io.dec_tlu_force_halt + perr_sel_invalidate := io.dec_tlu_flush_lower_wb & io.dec_tlu_force_halt + } + is(ecc_wff_C){ + perr_nxtstate := Mux(((io.dec_tlu_flush_err_wb & io.dec_tlu_flush_lower_wb ) | io.dec_tlu_force_halt).asBool(), err_idle_C, ecc_cor_C) + perr_state_en := io.dec_tlu_flush_lower_wb | io.dec_tlu_force_halt + } + is(dma_sb_err_C){ + perr_nxtstate := Mux(io.dec_tlu_force_halt, err_idle_C, ecc_cor_C) + perr_state_en := true.B + } + is(ecc_cor_C){ + perr_nxtstate := err_idle_C + perr_state_en := true.B + } + } + perr_state := withClock(io.free_clk){RegEnable(perr_nxtstate, 0.U, perr_state_en)} + ///////////////////////////////// STOP FETCH FSM ///////////////////////////////// + val err_stop_nxtstate = WireInit(UInt(2.W), 0.U) + val err_stop_state_en = WireInit(Bool(), false.B) +// val err_stop_fetch := WireInit(Bool(), false.B) + val iccm_correction_state = WireInit(Bool(), false.B) + switch(err_stop_state){ + is(err_stop_idle_C){ + err_stop_nxtstate := err_fetch1_C + err_stop_state_en := io.dec_tlu_flush_err_wb & (perr_state === ecc_wff_C) & !io.dec_tlu_force_halt + } + is(err_fetch1_C){ + err_stop_nxtstate := Mux((io.dec_tlu_flush_lower_wb | io.dec_tlu_i0_commit_cmt | io.dec_tlu_force_halt).asBool(), err_stop_idle_C, + Mux(((io.ifu_fetch_val===3.U)|(io.ifu_fetch_val(0)&two_byte_instr)).asBool(), err_stop_fetch_C, + Mux(io.ifu_fetch_val(0).asBool(), err_fetch2_C, err_fetch1_C))) + err_stop_state_en := io.dec_tlu_flush_lower_wb | io.dec_tlu_i0_commit_cmt | io.ifu_fetch_val(0) | ifu_bp_hit_taken_q_f | io.dec_tlu_force_halt + err_stop_fetch := ((io.ifu_fetch_val(1,0)===3.U) | (io.ifu_fetch_val(0) & two_byte_instr)) & !(io.exu_flush_final | io.dec_tlu_i0_commit_cmt) + iccm_correction_state := true.B + } + is(err_fetch2_C){ + err_stop_nxtstate := Mux((io.dec_tlu_flush_lower_wb | io.dec_tlu_i0_commit_cmt | io.dec_tlu_force_halt).asBool, + err_stop_idle_C, Mux(io.ifu_fetch_val(0).asBool, err_stop_fetch_C, err_fetch2_C)) + err_stop_state_en := io.dec_tlu_flush_lower_wb | io.dec_tlu_i0_commit_cmt | io.ifu_fetch_val(0) | io.dec_tlu_force_halt + err_stop_fetch := io.ifu_fetch_val(0) & !io.exu_flush_final & !io.dec_tlu_i0_commit_cmt + iccm_correction_state := true.B + } + is(err_stop_fetch_C){ + err_stop_nxtstate := Mux(((io.dec_tlu_flush_lower_wb & !io.dec_tlu_flush_err_wb) | io.dec_tlu_i0_commit_cmt | io.dec_tlu_force_halt).asBool, + err_stop_idle_C, Mux(io.dec_tlu_flush_err_wb.asBool(), err_fetch1_C, err_stop_fetch_C)) + err_stop_state_en := io.dec_tlu_flush_lower_wb | io.dec_tlu_i0_commit_cmt | io.dec_tlu_force_halt + err_stop_fetch := true.B + iccm_correction_state := true.B + } + } + err_stop_state := withClock(io.free_clk){RegEnable(err_stop_nxtstate, 0.U, err_stop_state_en)} + bus_ifu_bus_clk_en := io.ifu_bus_clk_en + val bus_ifu_bus_clk_en_ff = withClock(io.free_clk){RegNext(bus_ifu_bus_clk_en, 0.U)} + scnd_miss_req_q := withClock(io.free_clk){RegNext(scnd_miss_req_in, 0.U)} + val scnd_miss_req_ff2 = withClock(io.free_clk){RegNext(scnd_miss_req, 0.U)} + val bus_cmd_req_hold = WireInit(Bool(), false.B) + val ifu_bus_cmd_valid = WireInit(Bool(), false.B) + val bus_cmd_beat_count = WireInit(UInt(ICACHE_BEAT_BITS.W), 0.U) + val ifu_bus_cmd_ready = WireInit(Bool(), false.B) + val ifc_bus_ic_req_ff_in = (ic_act_miss_f | bus_cmd_req_hold | ifu_bus_cmd_valid) & !io.dec_tlu_force_halt & !((bus_cmd_beat_count===Fill(ICACHE_BEAT_BITS,1.U)) & ifu_bus_cmd_valid & ifu_bus_cmd_ready & miss_pending) + ifu_bus_cmd_valid := RegEnable(ifc_bus_ic_req_ff_in, 0.U, bus_ifu_bus_clk_en | io.dec_tlu_force_halt) + val bus_cmd_sent = WireInit(Bool(), false.B) + val bus_cmd_req_in = (ic_act_miss_f | bus_cmd_req_hold) & !bus_cmd_sent & !io.dec_tlu_force_halt + bus_cmd_sent := withClock(io.free_clk){RegNext(bus_cmd_req_in, false.B)} + // AXI Read-Channel + io.ifu_axi_arvalid := ifu_bus_cmd_valid + io.ifu_axi_arid := bus_rd_addr_count & Fill(IFU_BUS_TAG, ifu_bus_cmd_valid) + io.ifu_axi_araddr := Cat(ifu_ic_req_addr_f, 0.U(3.W)) & Fill(32, ifu_bus_cmd_valid) + io.ifu_axi_arsize := 3.U(3.W) + io.ifu_axi_arcache := 15.U + io.ifu_axi_arregion := ifu_ic_req_addr_f(28,25) + io.ifu_axi_arburst := 1.U + io.ifu_axi_rready := true.B + + val ifu_bus_arready_unq = io.ifu_axi_arready + val ifu_bus_rvalid_unq = io.ifu_axi_rvalid + val ifu_bus_arvalid = io.ifu_axi_arvalid + bus_ifu_bus_clk_en + val ifu_bus_arready_unq_ff = RegEnable(ifu_bus_arready_unq, false.B, bus_ifu_bus_clk_en) + val ifu_bus_rvalid_unq_ff = RegEnable(ifu_bus_rvalid_unq, false.B, bus_ifu_bus_clk_en) + val ifu_bus_arvalid_ff = RegEnable(ifu_bus_arvalid, false.B, bus_ifu_bus_clk_en) + val ifu_bus_rresp_ff = RegEnable(io.ifu_axi_rresp, 0.U, bus_ifu_bus_clk_en) + ifu_bus_rdata_ff := RegEnable(io.ifu_axi_rdata, 0.U, bus_ifu_bus_clk_en) + ifu_bus_rid_ff := RegEnable(io.ifu_axi_rid, 0.U, bus_ifu_bus_clk_en) + ifu_bus_cmd_ready := io.ifu_axi_arready + ifu_bus_rsp_valid := io.ifu_axi_rvalid + ifu_bus_rsp_ready := io.ifu_axi_rready + ifu_bus_rsp_tag := io.ifu_axi_rid + ifu_bus_rsp_rdata := io.ifu_axi_rdata + val ifu_bus_rsp_opc = io.ifu_axi_rresp + val ifu_bus_rvalid = ifu_bus_rsp_valid & bus_ifu_bus_clk_en + val ifu_bus_arready = ifu_bus_arready_unq & bus_ifu_bus_clk_en + val ifu_bus_arready_ff = ifu_bus_arready_unq_ff & bus_ifu_bus_clk_en_ff + val ifu_bus_rvalid_ff = ifu_bus_rvalid_unq_ff & bus_ifu_bus_clk_en_ff + bus_cmd_sent := ifu_bus_arvalid & ifu_bus_arready & miss_pending & !io.dec_tlu_force_halt + val bus_last_data_beat = WireInit(Bool(), false.B) + val bus_inc_data_beat_cnt = bus_ifu_wr_en_ff & !bus_last_data_beat & !io.dec_tlu_force_halt + val bus_reset_data_beat_cnt = ic_act_miss_f | (bus_ifu_wr_en_ff & bus_last_data_beat) | io.dec_tlu_force_halt + val bus_hold_data_beat_cnt = !bus_inc_data_beat_cnt & !bus_reset_data_beat_cnt + val bus_data_beat_count = WireInit(UInt(ICACHE_BEAT_BITS.W), 0.U) + bus_new_data_beat_count := Mux1H(Seq(bus_reset_data_beat_cnt->0.U, bus_inc_data_beat_cnt-> (bus_data_beat_count + 1.U), bus_hold_data_beat_cnt->bus_data_beat_count)) + bus_data_beat_count := withClock(io.free_clk){RegNext(bus_new_data_beat_count, 0.U)} + val last_data_recieved_in = (bus_ifu_wr_en_ff & bus_last_data_beat & !scnd_miss_req) | (last_data_recieved_ff & !ic_act_miss_f) + last_data_recieved_ff := withClock(io.free_clk){RegNext(last_data_recieved_in, 0.U)} + // Request Address Count + val bus_new_rd_addr_count = Mux(!miss_pending, imb_ff(ICACHE_BEAT_ADDR_HI-1, 2), + Mux(scnd_miss_req_q, imb_scnd_ff(ICACHE_BEAT_ADDR_HI-1, 2), + Mux(bus_cmd_sent, bus_rd_addr_count + 1.U, bus_rd_addr_count))) + bus_rd_addr_count := RegEnable(bus_new_rd_addr_count, 0.U, bus_ifu_bus_clk_en | ic_act_miss_f | io.dec_tlu_force_halt) + // Command beat Count + val bus_inc_cmd_beat_cnt = ifu_bus_cmd_valid & ifu_bus_cmd_ready & miss_pending & !io.dec_tlu_force_halt + val bus_reset_cmd_beat_cnt_0 = (ic_act_miss_f & !uncacheable_miss_in) | io.dec_tlu_force_halt + val bus_reset_cmd_beat_cnt_secondlast = ic_act_miss_f & uncacheable_miss_in + val bus_hold_cmd_beat_cnt = !bus_inc_cmd_beat_cnt & !(ic_act_miss_f | scnd_miss_req | io.dec_tlu_force_halt) + val bus_cmd_beat_en = bus_inc_cmd_beat_cnt | ic_act_miss_f | io.dec_tlu_force_halt + val bus_new_cmd_beat_count = Mux1H(Seq(bus_reset_cmd_beat_cnt_0->0.U, bus_reset_cmd_beat_cnt_secondlast.asBool->ICACHE_SCND_LAST.U, + bus_inc_cmd_beat_cnt->(bus_cmd_beat_count+1.U), bus_hold_cmd_beat_cnt->bus_cmd_beat_count)) + bus_cmd_beat_count := RegEnable(bus_new_cmd_beat_count, 0.U, (bus_ifu_bus_clk_en | ic_act_miss_f | io.dec_tlu_force_halt) & bus_cmd_beat_en) + bus_last_data_beat := Mux(uncacheable_miss_ff, bus_data_beat_count===1.U, bus_data_beat_count.andR()) + bus_ifu_wr_en := ifu_bus_rvalid & miss_pending + bus_ifu_wr_en_ff := ifu_bus_rvalid_ff & miss_pending + bus_ifu_wr_en_ff_q := ifu_bus_rvalid_ff & miss_pending & !uncacheable_miss_ff & !(ifu_bus_rresp_ff.orR) & write_ic_16_bytes + val bus_ifu_wr_en_ff_wo_err = ifu_bus_rvalid_ff & miss_pending & !uncacheable_miss_ff + val ic_act_miss_f_delayed = withClock(io.free_clk){RegNext(ic_act_miss_f, false.B)} + reset_tag_valid_for_miss := ic_act_miss_f_delayed & (miss_state===crit_byp_ok_C) & !uncacheable_miss_ff + bus_ifu_wr_data_error := ifu_bus_rsp_opc.orR() & ifu_bus_rvalid & miss_pending + bus_ifu_wr_data_error_ff := ifu_bus_rresp_ff.orR & ifu_bus_rvalid_ff & miss_pending + val ifc_dma_access_ok_d = WireInit(Bool(), false.B) + val ifc_dma_access_ok_prev = withClock(io.free_clk){RegNext(ifc_dma_access_ok_d, false.B)} + ic_crit_wd_rdy := ic_crit_wd_rdy_new_in | ic_crit_wd_rdy_new_ff + last_beat := bus_last_data_beat & bus_ifu_wr_en_ff + reset_beat_cnt := bus_reset_data_beat_cnt + // DMA + ifc_dma_access_ok_d := io.ifc_dma_access_ok & !iccm_correct_ecc & !io.iccm_dma_sb_error + val ifc_dma_access_q_ok = io.ifc_dma_access_ok & !iccm_correct_ecc & ifc_dma_access_ok_prev & (perr_state===err_idle_C) & !io.iccm_dma_sb_error + val iccm_ready = ifc_dma_access_q_ok + dma_iccm_req_f := withClock(io.free_clk){RegNext(io.dma_iccm_req, false.B)} + io.iccm_wren := (ifc_dma_access_q_ok & io.dma_iccm_req & io.dma_mem_write) | iccm_correct_ecc + io.iccm_rden := (ifc_dma_access_q_ok & io.dma_iccm_req & !io.dma_mem_write) | (io.ifc_iccm_access_bf & io.ifc_fetch_req_bf) + val iccm_dma_rden = ifc_dma_access_q_ok & io.dma_iccm_req & !io.dma_mem_write + io.iccm_wr_size := Fill(3, io.dma_iccm_req) & io.dma_mem_sz + val dma_mem_ecc = Cat(rvecc_encode(io.dma_mem_wdata(63,32)), rvecc_encode(io.dma_mem_wdata(31,0))) + val iccm_ecc_corr_data_ff = WireInit(UInt(39.W), 0.U) + io.iccm_wr_data := Mux(iccm_correct_ecc & !(ifc_dma_access_q_ok & io.dma_iccm_req), Fill(2,iccm_ecc_corr_data_ff), + Cat(dma_mem_ecc(13,7),io.dma_mem_wdata(63,32), dma_mem_ecc(6,0), io.dma_mem_wdata(31,0))) + val iccm_corrected_data = Wire(Vec(2, UInt(32.W))) + iccm_corrected_data(0) := 0.U + iccm_corrected_data(1) := 0.U + val dma_mem_addr_ff = WireInit(UInt(2.W), 0.U) + val iccm_dma_rdata_1_muxed = Mux(dma_mem_addr_ff(0).asBool, iccm_corrected_data(0), iccm_corrected_data(1)) + val iccm_double_ecc_error = WireInit(UInt(2.W), 0.U) + val iccm_dma_ecc_error_in = iccm_double_ecc_error.orR + val iccm_dma_rdata_in = Mux(iccm_dma_ecc_error_in, Fill(2, io.dma_mem_addr), Cat(iccm_dma_rdata_1_muxed, iccm_corrected_data(0))) + val dma_mem_tag_ff = withClock(io.free_clk){RegNext(io.dma_mem_tag, 0.U)} + val iccm_dma_rtag = if(ICCM_ENABLE) withClock(io.free_clk){RegNext(dma_mem_tag_ff, 0.U)} else 0.U + io.iccm_dma_rtag := iccm_dma_rtag + + dma_mem_addr_ff := withClock(io.free_clk) {RegNext(io.dma_mem_addr(3,2), 0.U)} + val iccm_dma_rvalid_in = withClock(io.free_clk) {RegNext(iccm_dma_rden, false.B)} + val iccm_dma_rvalid = if(ICCM_ENABLE) withClock(io.free_clk){RegNext(iccm_dma_rvalid_in, false.B)} else 0.U + io.iccm_dma_rvalid := iccm_dma_rvalid + val iccm_dma_ecc_error = if(ICCM_ENABLE) withClock(io.free_clk){RegNext(iccm_dma_ecc_error_in, false.B)} else 0.U + io.iccm_dma_ecc_error := iccm_dma_ecc_error_in + val iccm_dma_rdata = if(ICCM_ENABLE) withClock(io.free_clk){RegNext(iccm_dma_rdata_in, 0.U)} else 0.U + io.iccm_dma_rdata := iccm_dma_rdata + val iccm_ecc_corr_index_ff = WireInit(UInt((ICCM_BITS-2).W), 0.U) + io.iccm_rw_addr := Mux(ifc_dma_access_q_ok & io.dma_iccm_req & !iccm_correct_ecc, io.dma_mem_addr, + Mux(!(ifc_dma_access_q_ok & io.dma_iccm_req) & iccm_correct_ecc, Cat(iccm_ecc_corr_index_ff, 0.U), io.ifc_fetch_addr_bf(ICCM_BITS-1,0))) + val ic_fetch_val_int_f = Cat(0.U(2.W), io.ic_fetch_val_f) + val ic_fetch_val_shift_right = ic_fetch_val_int_f << ifu_fetch_addr_int_f(0) + val iccm_rdmux_data = io.iccm_rd_data_ecc + + val iccm_ecc_word_enable = (0 until 2).map(i=>((ic_fetch_val_shift_right((2*i+1),(2*i)) & !io.exu_flush_final & sel_iccm_data) | iccm_dma_rvalid_in) & !io.dec_tlu_core_ecc_disable).reverse.reduce(Cat(_,_)) + val ecc_decoded = (0 until 2).map(i=>rvecc_decode(iccm_ecc_word_enable(i), iccm_rdmux_data((39*i+31),(39*i)), iccm_rdmux_data((39*i+38),(39*i+32)), 0.U)) + val iccm_corrected_ecc = Wire(Vec(2, UInt(7.W))) + iccm_corrected_ecc := VecInit(ecc_decoded(0)._1,ecc_decoded(1)._1) + iccm_corrected_data := VecInit(ecc_decoded(0)._2,ecc_decoded(1)._2) + iccm_single_ecc_error := Cat(ecc_decoded(0)._3,ecc_decoded(1)._3) + iccm_double_ecc_error := Cat(ecc_decoded(0)._4,ecc_decoded(1)._4) + io.iccm_rd_ecc_single_err := iccm_single_ecc_error.orR & ifc_iccm_access_f & ifc_fetch_req_f + io.iccm_rd_ecc_double_err := iccm_double_ecc_error.orR & ifc_iccm_access_f + val iccm_corrected_data_f_mux = Mux(iccm_single_ecc_error(0).asBool, iccm_corrected_data(0), iccm_corrected_data(1)) + val iccm_corrected_ecc_f_mux = Mux(iccm_single_ecc_error(0).asBool, iccm_corrected_ecc(0), iccm_corrected_ecc(1)) + val iccm_rd_ecc_single_err_ff = WireInit(Bool(), false.B) + val iccm_ecc_write_status = ((io.iccm_rd_ecc_single_err & !iccm_rd_ecc_single_err_ff) & !io.exu_flush_final) | io.iccm_dma_sb_error + val iccm_rd_ecc_single_err_hold_in = (io.iccm_rd_ecc_single_err | iccm_rd_ecc_single_err_ff) & !io.exu_flush_final + iccm_error_start := io.iccm_rd_ecc_single_err + val iccm_rw_addr_f = WireInit(UInt((ICCM_BITS-2).W), 0.U) + val iccm_ecc_corr_index_in = Mux(iccm_single_ecc_error(0).asBool(), iccm_rw_addr_f, iccm_rw_addr_f + 1.U) + io.test := iccm_corrected_ecc(0) } object ifu_mem extends App { println((new chisel3.stage.ChiselStage).emitVerilog(new el2_ifu_mem_ctl())) diff --git a/target/scala-2.12/classes/META-INF/chisel-module-template.kotlin_module b/target/scala-2.12/classes/META-INF/chisel-module-template.kotlin_module deleted file mode 100644 index a49347af..00000000 Binary files a/target/scala-2.12/classes/META-INF/chisel-module-template.kotlin_module and /dev/null differ diff --git a/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl.class b/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl.class index 820770e1..b0d550db 100644 Binary files a/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl.class and b/target/scala-2.12/classes/ifu/el2_ifu_bp_ctl.class differ diff --git a/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl$$anon$1.class b/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl$$anon$1.class index 6882a82a..4551039e 100644 Binary files a/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl$$anon$1.class and b/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl$$anon$1.class differ diff --git a/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class b/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class index d7e64294..4af45104 100644 Binary files a/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class and b/target/scala-2.12/classes/ifu/el2_ifu_mem_ctl.class differ diff --git a/target/scala-2.12/classes/ifu/ifu_bp$.class b/target/scala-2.12/classes/ifu/ifu_bp$.class index 6afc13b1..5bc3b01e 100644 Binary files a/target/scala-2.12/classes/ifu/ifu_bp$.class and b/target/scala-2.12/classes/ifu/ifu_bp$.class differ diff --git a/target/scala-2.12/classes/ifu/ifu_bp$delayedInit$body.class b/target/scala-2.12/classes/ifu/ifu_bp$delayedInit$body.class index baf39911..a72c0817 100644 Binary files a/target/scala-2.12/classes/ifu/ifu_bp$delayedInit$body.class and b/target/scala-2.12/classes/ifu/ifu_bp$delayedInit$body.class differ diff --git a/target/scala-2.12/classes/ifu/ifu_mem$.class b/target/scala-2.12/classes/ifu/ifu_mem$.class index 365f2e37..9a080818 100644 Binary files a/target/scala-2.12/classes/ifu/ifu_mem$.class and b/target/scala-2.12/classes/ifu/ifu_mem$.class differ diff --git a/target/scala-2.12/classes/ifu/ifu_mem$delayedInit$body.class b/target/scala-2.12/classes/ifu/ifu_mem$delayedInit$body.class index 47b7f4bf..fe1143cc 100644 Binary files a/target/scala-2.12/classes/ifu/ifu_mem$delayedInit$body.class and b/target/scala-2.12/classes/ifu/ifu_mem$delayedInit$body.class differ