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axi to ahb update

This commit is contained in:
​Laraib Khan 2020-12-01 17:00:36 +05:00
parent eff5d74c44
commit e816ea5776
1 changed files with 0 additions and 1 deletions
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src/main/scala/lib/axi4_to_ahb.scala
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@ -168,7 +168,6 @@ class axi4_to_ahb extends Module with el2_lib with RequireAsyncReset with Config
("b01".U & (Fill(2, ((byteen(7, 0) === "hc0".U) | (byteen(7, 0) === "h30".U) | (byteen(7, 0) === "h0c".U) | (byteen(7, 0) === "h03".U)))))
size
}
def get_write_addr(byteen_e: UInt) = {
val byteen_e = WireInit(0.U(8.W))
val addr = ("h0".U & (Fill(3, ((byteen_e(7, 0) === "hff".U) | (byteen_e(7, 0) === "h0f".U) | (byteen_e(7, 0) === "h03".U))))) |