Debug rd data
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@ -12576,261 +12576,261 @@ circuit el2_ifu_mem_ctl :
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skip @[Reg.scala 28:19]
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skip @[Reg.scala 28:19]
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ic_tag_valid_out[1][127] <= _T_8501 @[el2_ifu_mem_ctl.scala 761:39]
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ic_tag_valid_out[1][127] <= _T_8501 @[el2_ifu_mem_ctl.scala 761:39]
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node _T_8502 = eq(ifu_ic_rw_int_addr_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8502 = eq(ifu_ic_rw_int_addr_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8503 = mux(_T_8502, UInt<1>("h00"), ic_tag_valid_out[0][0]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8503 = mux(_T_8502, ic_tag_valid_out[0][0], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8504 = eq(ifu_ic_rw_int_addr_ff, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8504 = eq(ifu_ic_rw_int_addr_ff, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8505 = mux(_T_8504, UInt<1>("h00"), ic_tag_valid_out[0][1]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8505 = mux(_T_8504, ic_tag_valid_out[0][1], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8506 = eq(ifu_ic_rw_int_addr_ff, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8506 = eq(ifu_ic_rw_int_addr_ff, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8507 = mux(_T_8506, UInt<1>("h00"), ic_tag_valid_out[0][2]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8507 = mux(_T_8506, ic_tag_valid_out[0][2], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8508 = eq(ifu_ic_rw_int_addr_ff, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8508 = eq(ifu_ic_rw_int_addr_ff, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8509 = mux(_T_8508, UInt<1>("h00"), ic_tag_valid_out[0][3]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8509 = mux(_T_8508, ic_tag_valid_out[0][3], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8510 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8510 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8511 = mux(_T_8510, UInt<1>("h00"), ic_tag_valid_out[0][4]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8511 = mux(_T_8510, ic_tag_valid_out[0][4], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8512 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8512 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8513 = mux(_T_8512, UInt<1>("h00"), ic_tag_valid_out[0][5]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8513 = mux(_T_8512, ic_tag_valid_out[0][5], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8514 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8514 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8515 = mux(_T_8514, UInt<1>("h00"), ic_tag_valid_out[0][6]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8515 = mux(_T_8514, ic_tag_valid_out[0][6], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8516 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8516 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8517 = mux(_T_8516, UInt<1>("h00"), ic_tag_valid_out[0][7]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8517 = mux(_T_8516, ic_tag_valid_out[0][7], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8518 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8518 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8519 = mux(_T_8518, UInt<1>("h00"), ic_tag_valid_out[0][8]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8519 = mux(_T_8518, ic_tag_valid_out[0][8], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8520 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8520 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8521 = mux(_T_8520, UInt<1>("h00"), ic_tag_valid_out[0][9]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8521 = mux(_T_8520, ic_tag_valid_out[0][9], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8522 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8522 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8523 = mux(_T_8522, UInt<1>("h00"), ic_tag_valid_out[0][10]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8523 = mux(_T_8522, ic_tag_valid_out[0][10], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8524 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8524 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8525 = mux(_T_8524, UInt<1>("h00"), ic_tag_valid_out[0][11]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8525 = mux(_T_8524, ic_tag_valid_out[0][11], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8526 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8526 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8527 = mux(_T_8526, UInt<1>("h00"), ic_tag_valid_out[0][12]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8527 = mux(_T_8526, ic_tag_valid_out[0][12], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8528 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8528 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8529 = mux(_T_8528, UInt<1>("h00"), ic_tag_valid_out[0][13]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8529 = mux(_T_8528, ic_tag_valid_out[0][13], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8530 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8530 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8531 = mux(_T_8530, UInt<1>("h00"), ic_tag_valid_out[0][14]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8531 = mux(_T_8530, ic_tag_valid_out[0][14], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8532 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8532 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8533 = mux(_T_8532, UInt<1>("h00"), ic_tag_valid_out[0][15]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8533 = mux(_T_8532, ic_tag_valid_out[0][15], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8534 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h010")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8534 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h010")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8535 = mux(_T_8534, UInt<1>("h00"), ic_tag_valid_out[0][16]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8535 = mux(_T_8534, ic_tag_valid_out[0][16], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8536 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h011")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8536 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h011")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8537 = mux(_T_8536, UInt<1>("h00"), ic_tag_valid_out[0][17]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8537 = mux(_T_8536, ic_tag_valid_out[0][17], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8538 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h012")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8538 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h012")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8539 = mux(_T_8538, UInt<1>("h00"), ic_tag_valid_out[0][18]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8539 = mux(_T_8538, ic_tag_valid_out[0][18], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8540 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h013")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8540 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h013")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8541 = mux(_T_8540, UInt<1>("h00"), ic_tag_valid_out[0][19]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8541 = mux(_T_8540, ic_tag_valid_out[0][19], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8542 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h014")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8542 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h014")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8543 = mux(_T_8542, UInt<1>("h00"), ic_tag_valid_out[0][20]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8543 = mux(_T_8542, ic_tag_valid_out[0][20], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8544 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h015")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8544 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h015")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8545 = mux(_T_8544, UInt<1>("h00"), ic_tag_valid_out[0][21]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8545 = mux(_T_8544, ic_tag_valid_out[0][21], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8546 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h016")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8546 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h016")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8547 = mux(_T_8546, UInt<1>("h00"), ic_tag_valid_out[0][22]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8547 = mux(_T_8546, ic_tag_valid_out[0][22], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8548 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h017")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8548 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h017")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8549 = mux(_T_8548, UInt<1>("h00"), ic_tag_valid_out[0][23]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8549 = mux(_T_8548, ic_tag_valid_out[0][23], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8550 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h018")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8550 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h018")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8551 = mux(_T_8550, UInt<1>("h00"), ic_tag_valid_out[0][24]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8551 = mux(_T_8550, ic_tag_valid_out[0][24], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8552 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h019")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8552 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h019")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8553 = mux(_T_8552, UInt<1>("h00"), ic_tag_valid_out[0][25]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8553 = mux(_T_8552, ic_tag_valid_out[0][25], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8554 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01a")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8554 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01a")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8555 = mux(_T_8554, UInt<1>("h00"), ic_tag_valid_out[0][26]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8555 = mux(_T_8554, ic_tag_valid_out[0][26], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8556 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01b")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8556 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01b")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8557 = mux(_T_8556, UInt<1>("h00"), ic_tag_valid_out[0][27]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8557 = mux(_T_8556, ic_tag_valid_out[0][27], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8558 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01c")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8558 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01c")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8559 = mux(_T_8558, UInt<1>("h00"), ic_tag_valid_out[0][28]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8559 = mux(_T_8558, ic_tag_valid_out[0][28], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8560 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01d")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8560 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01d")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8561 = mux(_T_8560, UInt<1>("h00"), ic_tag_valid_out[0][29]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8561 = mux(_T_8560, ic_tag_valid_out[0][29], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8562 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01e")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8562 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01e")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8563 = mux(_T_8562, UInt<1>("h00"), ic_tag_valid_out[0][30]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8563 = mux(_T_8562, ic_tag_valid_out[0][30], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8564 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01f")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8564 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01f")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8565 = mux(_T_8564, UInt<1>("h00"), ic_tag_valid_out[0][31]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8565 = mux(_T_8564, ic_tag_valid_out[0][31], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8566 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h020")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8566 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h020")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8567 = mux(_T_8566, UInt<1>("h00"), ic_tag_valid_out[0][32]) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8567 = mux(_T_8566, ic_tag_valid_out[0][32], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
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node _T_8568 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h021")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8568 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h021")) @[el2_ifu_mem_ctl.scala 765:33]
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node _T_8569 = mux(_T_8568, UInt<1>("h00"), ic_tag_valid_out[0][33]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8569 = mux(_T_8568, ic_tag_valid_out[0][33], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8570 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h022")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8570 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h022")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8571 = mux(_T_8570, UInt<1>("h00"), ic_tag_valid_out[0][34]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8571 = mux(_T_8570, ic_tag_valid_out[0][34], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8572 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h023")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8572 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h023")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8573 = mux(_T_8572, UInt<1>("h00"), ic_tag_valid_out[0][35]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8573 = mux(_T_8572, ic_tag_valid_out[0][35], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8574 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h024")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8574 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h024")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8575 = mux(_T_8574, UInt<1>("h00"), ic_tag_valid_out[0][36]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8575 = mux(_T_8574, ic_tag_valid_out[0][36], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8576 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h025")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8576 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h025")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8577 = mux(_T_8576, UInt<1>("h00"), ic_tag_valid_out[0][37]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8577 = mux(_T_8576, ic_tag_valid_out[0][37], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8578 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h026")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8578 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h026")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8579 = mux(_T_8578, UInt<1>("h00"), ic_tag_valid_out[0][38]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8579 = mux(_T_8578, ic_tag_valid_out[0][38], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8580 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h027")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8580 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h027")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8581 = mux(_T_8580, UInt<1>("h00"), ic_tag_valid_out[0][39]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8581 = mux(_T_8580, ic_tag_valid_out[0][39], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8582 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h028")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8582 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h028")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8583 = mux(_T_8582, UInt<1>("h00"), ic_tag_valid_out[0][40]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8583 = mux(_T_8582, ic_tag_valid_out[0][40], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8584 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h029")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8584 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h029")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8585 = mux(_T_8584, UInt<1>("h00"), ic_tag_valid_out[0][41]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8585 = mux(_T_8584, ic_tag_valid_out[0][41], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8586 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8586 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8587 = mux(_T_8586, UInt<1>("h00"), ic_tag_valid_out[0][42]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8587 = mux(_T_8586, ic_tag_valid_out[0][42], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8588 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8588 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8589 = mux(_T_8588, UInt<1>("h00"), ic_tag_valid_out[0][43]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8589 = mux(_T_8588, ic_tag_valid_out[0][43], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8590 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8590 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8591 = mux(_T_8590, UInt<1>("h00"), ic_tag_valid_out[0][44]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8591 = mux(_T_8590, ic_tag_valid_out[0][44], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8592 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8592 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8593 = mux(_T_8592, UInt<1>("h00"), ic_tag_valid_out[0][45]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8593 = mux(_T_8592, ic_tag_valid_out[0][45], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8594 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8594 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8595 = mux(_T_8594, UInt<1>("h00"), ic_tag_valid_out[0][46]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8595 = mux(_T_8594, ic_tag_valid_out[0][46], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8596 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8596 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8597 = mux(_T_8596, UInt<1>("h00"), ic_tag_valid_out[0][47]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8597 = mux(_T_8596, ic_tag_valid_out[0][47], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8598 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h030")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8598 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h030")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8599 = mux(_T_8598, UInt<1>("h00"), ic_tag_valid_out[0][48]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8599 = mux(_T_8598, ic_tag_valid_out[0][48], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8600 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h031")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8600 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h031")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8601 = mux(_T_8600, UInt<1>("h00"), ic_tag_valid_out[0][49]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8601 = mux(_T_8600, ic_tag_valid_out[0][49], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8602 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h032")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8602 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h032")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8603 = mux(_T_8602, UInt<1>("h00"), ic_tag_valid_out[0][50]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8603 = mux(_T_8602, ic_tag_valid_out[0][50], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8604 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h033")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8604 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h033")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8605 = mux(_T_8604, UInt<1>("h00"), ic_tag_valid_out[0][51]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8605 = mux(_T_8604, ic_tag_valid_out[0][51], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8606 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h034")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8606 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h034")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8607 = mux(_T_8606, UInt<1>("h00"), ic_tag_valid_out[0][52]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8607 = mux(_T_8606, ic_tag_valid_out[0][52], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8608 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h035")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8608 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h035")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8609 = mux(_T_8608, UInt<1>("h00"), ic_tag_valid_out[0][53]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8609 = mux(_T_8608, ic_tag_valid_out[0][53], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8610 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h036")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8610 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h036")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8611 = mux(_T_8610, UInt<1>("h00"), ic_tag_valid_out[0][54]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8611 = mux(_T_8610, ic_tag_valid_out[0][54], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8612 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h037")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8612 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h037")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8613 = mux(_T_8612, UInt<1>("h00"), ic_tag_valid_out[0][55]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8613 = mux(_T_8612, ic_tag_valid_out[0][55], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8614 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h038")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8614 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h038")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8615 = mux(_T_8614, UInt<1>("h00"), ic_tag_valid_out[0][56]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8615 = mux(_T_8614, ic_tag_valid_out[0][56], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8616 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h039")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8616 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h039")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8617 = mux(_T_8616, UInt<1>("h00"), ic_tag_valid_out[0][57]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8617 = mux(_T_8616, ic_tag_valid_out[0][57], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8618 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8618 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8619 = mux(_T_8618, UInt<1>("h00"), ic_tag_valid_out[0][58]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8619 = mux(_T_8618, ic_tag_valid_out[0][58], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8620 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8620 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8621 = mux(_T_8620, UInt<1>("h00"), ic_tag_valid_out[0][59]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8621 = mux(_T_8620, ic_tag_valid_out[0][59], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8622 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8622 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8623 = mux(_T_8622, UInt<1>("h00"), ic_tag_valid_out[0][60]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8623 = mux(_T_8622, ic_tag_valid_out[0][60], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8624 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8624 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8625 = mux(_T_8624, UInt<1>("h00"), ic_tag_valid_out[0][61]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8625 = mux(_T_8624, ic_tag_valid_out[0][61], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8626 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8626 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8627 = mux(_T_8626, UInt<1>("h00"), ic_tag_valid_out[0][62]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8627 = mux(_T_8626, ic_tag_valid_out[0][62], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8628 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8628 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8629 = mux(_T_8628, UInt<1>("h00"), ic_tag_valid_out[0][63]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8629 = mux(_T_8628, ic_tag_valid_out[0][63], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8630 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h040")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8630 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h040")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8631 = mux(_T_8630, UInt<1>("h00"), ic_tag_valid_out[0][64]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8631 = mux(_T_8630, ic_tag_valid_out[0][64], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8632 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h041")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8632 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h041")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8633 = mux(_T_8632, UInt<1>("h00"), ic_tag_valid_out[0][65]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8633 = mux(_T_8632, ic_tag_valid_out[0][65], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8634 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h042")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8634 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h042")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8635 = mux(_T_8634, UInt<1>("h00"), ic_tag_valid_out[0][66]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8635 = mux(_T_8634, ic_tag_valid_out[0][66], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8636 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h043")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8636 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h043")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8637 = mux(_T_8636, UInt<1>("h00"), ic_tag_valid_out[0][67]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8637 = mux(_T_8636, ic_tag_valid_out[0][67], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8638 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h044")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8638 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h044")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8639 = mux(_T_8638, UInt<1>("h00"), ic_tag_valid_out[0][68]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8639 = mux(_T_8638, ic_tag_valid_out[0][68], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8640 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h045")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8640 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h045")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8641 = mux(_T_8640, UInt<1>("h00"), ic_tag_valid_out[0][69]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8641 = mux(_T_8640, ic_tag_valid_out[0][69], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8642 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h046")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8642 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h046")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8643 = mux(_T_8642, UInt<1>("h00"), ic_tag_valid_out[0][70]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8643 = mux(_T_8642, ic_tag_valid_out[0][70], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8644 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h047")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8644 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h047")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8645 = mux(_T_8644, UInt<1>("h00"), ic_tag_valid_out[0][71]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8645 = mux(_T_8644, ic_tag_valid_out[0][71], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8646 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h048")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8646 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h048")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8647 = mux(_T_8646, UInt<1>("h00"), ic_tag_valid_out[0][72]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8647 = mux(_T_8646, ic_tag_valid_out[0][72], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8648 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h049")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8648 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h049")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8649 = mux(_T_8648, UInt<1>("h00"), ic_tag_valid_out[0][73]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8649 = mux(_T_8648, ic_tag_valid_out[0][73], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8650 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8650 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8651 = mux(_T_8650, UInt<1>("h00"), ic_tag_valid_out[0][74]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8651 = mux(_T_8650, ic_tag_valid_out[0][74], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8652 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8652 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8653 = mux(_T_8652, UInt<1>("h00"), ic_tag_valid_out[0][75]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8653 = mux(_T_8652, ic_tag_valid_out[0][75], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8654 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8654 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8655 = mux(_T_8654, UInt<1>("h00"), ic_tag_valid_out[0][76]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8655 = mux(_T_8654, ic_tag_valid_out[0][76], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8656 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8656 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8657 = mux(_T_8656, UInt<1>("h00"), ic_tag_valid_out[0][77]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8657 = mux(_T_8656, ic_tag_valid_out[0][77], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8658 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8658 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8659 = mux(_T_8658, UInt<1>("h00"), ic_tag_valid_out[0][78]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8659 = mux(_T_8658, ic_tag_valid_out[0][78], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8660 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8660 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8661 = mux(_T_8660, UInt<1>("h00"), ic_tag_valid_out[0][79]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8661 = mux(_T_8660, ic_tag_valid_out[0][79], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8662 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h050")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8662 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h050")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8663 = mux(_T_8662, UInt<1>("h00"), ic_tag_valid_out[0][80]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8663 = mux(_T_8662, ic_tag_valid_out[0][80], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8664 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h051")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8664 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h051")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8665 = mux(_T_8664, UInt<1>("h00"), ic_tag_valid_out[0][81]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8665 = mux(_T_8664, ic_tag_valid_out[0][81], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8666 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h052")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8666 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h052")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8667 = mux(_T_8666, UInt<1>("h00"), ic_tag_valid_out[0][82]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8667 = mux(_T_8666, ic_tag_valid_out[0][82], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8668 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h053")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8668 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h053")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8669 = mux(_T_8668, UInt<1>("h00"), ic_tag_valid_out[0][83]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8669 = mux(_T_8668, ic_tag_valid_out[0][83], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8670 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h054")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8670 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h054")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8671 = mux(_T_8670, UInt<1>("h00"), ic_tag_valid_out[0][84]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8671 = mux(_T_8670, ic_tag_valid_out[0][84], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8672 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h055")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8672 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h055")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8673 = mux(_T_8672, UInt<1>("h00"), ic_tag_valid_out[0][85]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8673 = mux(_T_8672, ic_tag_valid_out[0][85], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8674 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h056")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8674 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h056")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8675 = mux(_T_8674, UInt<1>("h00"), ic_tag_valid_out[0][86]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8675 = mux(_T_8674, ic_tag_valid_out[0][86], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8676 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h057")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8676 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h057")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8677 = mux(_T_8676, UInt<1>("h00"), ic_tag_valid_out[0][87]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8677 = mux(_T_8676, ic_tag_valid_out[0][87], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8678 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h058")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8678 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h058")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8679 = mux(_T_8678, UInt<1>("h00"), ic_tag_valid_out[0][88]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8679 = mux(_T_8678, ic_tag_valid_out[0][88], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8680 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h059")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8680 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h059")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8681 = mux(_T_8680, UInt<1>("h00"), ic_tag_valid_out[0][89]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8681 = mux(_T_8680, ic_tag_valid_out[0][89], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8682 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8682 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8683 = mux(_T_8682, UInt<1>("h00"), ic_tag_valid_out[0][90]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8683 = mux(_T_8682, ic_tag_valid_out[0][90], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8684 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8684 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8685 = mux(_T_8684, UInt<1>("h00"), ic_tag_valid_out[0][91]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8685 = mux(_T_8684, ic_tag_valid_out[0][91], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8686 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8686 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8687 = mux(_T_8686, UInt<1>("h00"), ic_tag_valid_out[0][92]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8687 = mux(_T_8686, ic_tag_valid_out[0][92], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8688 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8688 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8689 = mux(_T_8688, UInt<1>("h00"), ic_tag_valid_out[0][93]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8689 = mux(_T_8688, ic_tag_valid_out[0][93], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8690 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8690 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8691 = mux(_T_8690, UInt<1>("h00"), ic_tag_valid_out[0][94]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8691 = mux(_T_8690, ic_tag_valid_out[0][94], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8692 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8692 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8693 = mux(_T_8692, UInt<1>("h00"), ic_tag_valid_out[0][95]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8693 = mux(_T_8692, ic_tag_valid_out[0][95], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8694 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h060")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8694 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h060")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8695 = mux(_T_8694, UInt<1>("h00"), ic_tag_valid_out[0][96]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8695 = mux(_T_8694, ic_tag_valid_out[0][96], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8696 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h061")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8696 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h061")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8697 = mux(_T_8696, UInt<1>("h00"), ic_tag_valid_out[0][97]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8697 = mux(_T_8696, ic_tag_valid_out[0][97], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8698 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h062")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8698 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h062")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8699 = mux(_T_8698, UInt<1>("h00"), ic_tag_valid_out[0][98]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8699 = mux(_T_8698, ic_tag_valid_out[0][98], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8700 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h063")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8700 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h063")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8701 = mux(_T_8700, UInt<1>("h00"), ic_tag_valid_out[0][99]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8701 = mux(_T_8700, ic_tag_valid_out[0][99], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8702 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h064")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8702 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h064")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8703 = mux(_T_8702, UInt<1>("h00"), ic_tag_valid_out[0][100]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8703 = mux(_T_8702, ic_tag_valid_out[0][100], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8704 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h065")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8704 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h065")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8705 = mux(_T_8704, UInt<1>("h00"), ic_tag_valid_out[0][101]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8705 = mux(_T_8704, ic_tag_valid_out[0][101], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8706 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h066")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8706 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h066")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8707 = mux(_T_8706, UInt<1>("h00"), ic_tag_valid_out[0][102]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8707 = mux(_T_8706, ic_tag_valid_out[0][102], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8708 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h067")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8708 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h067")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8709 = mux(_T_8708, UInt<1>("h00"), ic_tag_valid_out[0][103]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8709 = mux(_T_8708, ic_tag_valid_out[0][103], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8710 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h068")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8710 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h068")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8711 = mux(_T_8710, UInt<1>("h00"), ic_tag_valid_out[0][104]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8711 = mux(_T_8710, ic_tag_valid_out[0][104], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8712 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h069")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8712 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h069")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8713 = mux(_T_8712, UInt<1>("h00"), ic_tag_valid_out[0][105]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8713 = mux(_T_8712, ic_tag_valid_out[0][105], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8714 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8714 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8715 = mux(_T_8714, UInt<1>("h00"), ic_tag_valid_out[0][106]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8715 = mux(_T_8714, ic_tag_valid_out[0][106], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8716 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8716 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8717 = mux(_T_8716, UInt<1>("h00"), ic_tag_valid_out[0][107]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8717 = mux(_T_8716, ic_tag_valid_out[0][107], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8718 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8718 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8719 = mux(_T_8718, UInt<1>("h00"), ic_tag_valid_out[0][108]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8719 = mux(_T_8718, ic_tag_valid_out[0][108], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8720 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8720 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8721 = mux(_T_8720, UInt<1>("h00"), ic_tag_valid_out[0][109]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8721 = mux(_T_8720, ic_tag_valid_out[0][109], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8722 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8722 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8723 = mux(_T_8722, UInt<1>("h00"), ic_tag_valid_out[0][110]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8723 = mux(_T_8722, ic_tag_valid_out[0][110], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8724 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8724 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8725 = mux(_T_8724, UInt<1>("h00"), ic_tag_valid_out[0][111]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8725 = mux(_T_8724, ic_tag_valid_out[0][111], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8726 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h070")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8726 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h070")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8727 = mux(_T_8726, UInt<1>("h00"), ic_tag_valid_out[0][112]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8727 = mux(_T_8726, ic_tag_valid_out[0][112], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8728 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h071")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8728 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h071")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8729 = mux(_T_8728, UInt<1>("h00"), ic_tag_valid_out[0][113]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8729 = mux(_T_8728, ic_tag_valid_out[0][113], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8730 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h072")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8730 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h072")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8731 = mux(_T_8730, UInt<1>("h00"), ic_tag_valid_out[0][114]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8731 = mux(_T_8730, ic_tag_valid_out[0][114], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8732 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h073")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8732 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h073")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8733 = mux(_T_8732, UInt<1>("h00"), ic_tag_valid_out[0][115]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8733 = mux(_T_8732, ic_tag_valid_out[0][115], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8734 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h074")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8734 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h074")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8735 = mux(_T_8734, UInt<1>("h00"), ic_tag_valid_out[0][116]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8735 = mux(_T_8734, ic_tag_valid_out[0][116], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8736 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h075")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8736 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h075")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8737 = mux(_T_8736, UInt<1>("h00"), ic_tag_valid_out[0][117]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8737 = mux(_T_8736, ic_tag_valid_out[0][117], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8738 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h076")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8738 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h076")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8739 = mux(_T_8738, UInt<1>("h00"), ic_tag_valid_out[0][118]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8739 = mux(_T_8738, ic_tag_valid_out[0][118], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8740 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h077")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8740 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h077")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8741 = mux(_T_8740, UInt<1>("h00"), ic_tag_valid_out[0][119]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8741 = mux(_T_8740, ic_tag_valid_out[0][119], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8742 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h078")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8742 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h078")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8743 = mux(_T_8742, UInt<1>("h00"), ic_tag_valid_out[0][120]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8743 = mux(_T_8742, ic_tag_valid_out[0][120], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8744 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h079")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8744 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h079")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8745 = mux(_T_8744, UInt<1>("h00"), ic_tag_valid_out[0][121]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8745 = mux(_T_8744, ic_tag_valid_out[0][121], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8746 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8746 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8747 = mux(_T_8746, UInt<1>("h00"), ic_tag_valid_out[0][122]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8747 = mux(_T_8746, ic_tag_valid_out[0][122], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8748 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8748 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8749 = mux(_T_8748, UInt<1>("h00"), ic_tag_valid_out[0][123]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8749 = mux(_T_8748, ic_tag_valid_out[0][123], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8750 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8750 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8751 = mux(_T_8750, UInt<1>("h00"), ic_tag_valid_out[0][124]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8751 = mux(_T_8750, ic_tag_valid_out[0][124], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8752 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8752 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8753 = mux(_T_8752, UInt<1>("h00"), ic_tag_valid_out[0][125]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8753 = mux(_T_8752, ic_tag_valid_out[0][125], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8754 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8754 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8755 = mux(_T_8754, UInt<1>("h00"), ic_tag_valid_out[0][126]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8755 = mux(_T_8754, ic_tag_valid_out[0][126], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8756 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8756 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8757 = mux(_T_8756, UInt<1>("h00"), ic_tag_valid_out[0][127]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8757 = mux(_T_8756, ic_tag_valid_out[0][127], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8758 = or(_T_8503, _T_8505) @[el2_ifu_mem_ctl.scala 765:91]
|
node _T_8758 = or(_T_8503, _T_8505) @[el2_ifu_mem_ctl.scala 765:91]
|
||||||
node _T_8759 = or(_T_8758, _T_8507) @[el2_ifu_mem_ctl.scala 765:91]
|
node _T_8759 = or(_T_8758, _T_8507) @[el2_ifu_mem_ctl.scala 765:91]
|
||||||
node _T_8760 = or(_T_8759, _T_8509) @[el2_ifu_mem_ctl.scala 765:91]
|
node _T_8760 = or(_T_8759, _T_8509) @[el2_ifu_mem_ctl.scala 765:91]
|
||||||
|
@ -12959,261 +12959,261 @@ circuit el2_ifu_mem_ctl :
|
||||||
node _T_8883 = or(_T_8882, _T_8755) @[el2_ifu_mem_ctl.scala 765:91]
|
node _T_8883 = or(_T_8882, _T_8755) @[el2_ifu_mem_ctl.scala 765:91]
|
||||||
node _T_8884 = or(_T_8883, _T_8757) @[el2_ifu_mem_ctl.scala 765:91]
|
node _T_8884 = or(_T_8883, _T_8757) @[el2_ifu_mem_ctl.scala 765:91]
|
||||||
node _T_8885 = eq(ifu_ic_rw_int_addr_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8885 = eq(ifu_ic_rw_int_addr_ff, UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8886 = mux(_T_8885, UInt<1>("h00"), ic_tag_valid_out[1][0]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8886 = mux(_T_8885, ic_tag_valid_out[1][0], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8887 = eq(ifu_ic_rw_int_addr_ff, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8887 = eq(ifu_ic_rw_int_addr_ff, UInt<1>("h01")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8888 = mux(_T_8887, UInt<1>("h00"), ic_tag_valid_out[1][1]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8888 = mux(_T_8887, ic_tag_valid_out[1][1], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8889 = eq(ifu_ic_rw_int_addr_ff, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8889 = eq(ifu_ic_rw_int_addr_ff, UInt<2>("h02")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8890 = mux(_T_8889, UInt<1>("h00"), ic_tag_valid_out[1][2]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8890 = mux(_T_8889, ic_tag_valid_out[1][2], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8891 = eq(ifu_ic_rw_int_addr_ff, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8891 = eq(ifu_ic_rw_int_addr_ff, UInt<2>("h03")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8892 = mux(_T_8891, UInt<1>("h00"), ic_tag_valid_out[1][3]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8892 = mux(_T_8891, ic_tag_valid_out[1][3], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8893 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8893 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h04")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8894 = mux(_T_8893, UInt<1>("h00"), ic_tag_valid_out[1][4]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8894 = mux(_T_8893, ic_tag_valid_out[1][4], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8895 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8895 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h05")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8896 = mux(_T_8895, UInt<1>("h00"), ic_tag_valid_out[1][5]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8896 = mux(_T_8895, ic_tag_valid_out[1][5], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8897 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8897 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h06")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8898 = mux(_T_8897, UInt<1>("h00"), ic_tag_valid_out[1][6]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8898 = mux(_T_8897, ic_tag_valid_out[1][6], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8899 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8899 = eq(ifu_ic_rw_int_addr_ff, UInt<3>("h07")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8900 = mux(_T_8899, UInt<1>("h00"), ic_tag_valid_out[1][7]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8900 = mux(_T_8899, ic_tag_valid_out[1][7], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8901 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8901 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h08")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8902 = mux(_T_8901, UInt<1>("h00"), ic_tag_valid_out[1][8]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8902 = mux(_T_8901, ic_tag_valid_out[1][8], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8903 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8903 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h09")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8904 = mux(_T_8903, UInt<1>("h00"), ic_tag_valid_out[1][9]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8904 = mux(_T_8903, ic_tag_valid_out[1][9], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8905 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8905 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8906 = mux(_T_8905, UInt<1>("h00"), ic_tag_valid_out[1][10]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8906 = mux(_T_8905, ic_tag_valid_out[1][10], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8907 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8907 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8908 = mux(_T_8907, UInt<1>("h00"), ic_tag_valid_out[1][11]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8908 = mux(_T_8907, ic_tag_valid_out[1][11], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8909 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8909 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8910 = mux(_T_8909, UInt<1>("h00"), ic_tag_valid_out[1][12]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8910 = mux(_T_8909, ic_tag_valid_out[1][12], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8911 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8911 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8912 = mux(_T_8911, UInt<1>("h00"), ic_tag_valid_out[1][13]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8912 = mux(_T_8911, ic_tag_valid_out[1][13], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8913 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8913 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8914 = mux(_T_8913, UInt<1>("h00"), ic_tag_valid_out[1][14]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8914 = mux(_T_8913, ic_tag_valid_out[1][14], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8915 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8915 = eq(ifu_ic_rw_int_addr_ff, UInt<4>("h0f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8916 = mux(_T_8915, UInt<1>("h00"), ic_tag_valid_out[1][15]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8916 = mux(_T_8915, ic_tag_valid_out[1][15], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8917 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h010")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8917 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h010")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8918 = mux(_T_8917, UInt<1>("h00"), ic_tag_valid_out[1][16]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8918 = mux(_T_8917, ic_tag_valid_out[1][16], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8919 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h011")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8919 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h011")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8920 = mux(_T_8919, UInt<1>("h00"), ic_tag_valid_out[1][17]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8920 = mux(_T_8919, ic_tag_valid_out[1][17], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8921 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h012")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8921 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h012")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8922 = mux(_T_8921, UInt<1>("h00"), ic_tag_valid_out[1][18]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8922 = mux(_T_8921, ic_tag_valid_out[1][18], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8923 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h013")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8923 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h013")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8924 = mux(_T_8923, UInt<1>("h00"), ic_tag_valid_out[1][19]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8924 = mux(_T_8923, ic_tag_valid_out[1][19], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8925 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h014")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8925 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h014")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8926 = mux(_T_8925, UInt<1>("h00"), ic_tag_valid_out[1][20]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8926 = mux(_T_8925, ic_tag_valid_out[1][20], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8927 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h015")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8927 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h015")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8928 = mux(_T_8927, UInt<1>("h00"), ic_tag_valid_out[1][21]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8928 = mux(_T_8927, ic_tag_valid_out[1][21], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8929 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h016")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8929 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h016")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8930 = mux(_T_8929, UInt<1>("h00"), ic_tag_valid_out[1][22]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8930 = mux(_T_8929, ic_tag_valid_out[1][22], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8931 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h017")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8931 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h017")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8932 = mux(_T_8931, UInt<1>("h00"), ic_tag_valid_out[1][23]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8932 = mux(_T_8931, ic_tag_valid_out[1][23], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8933 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h018")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8933 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h018")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8934 = mux(_T_8933, UInt<1>("h00"), ic_tag_valid_out[1][24]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8934 = mux(_T_8933, ic_tag_valid_out[1][24], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8935 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h019")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8935 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h019")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8936 = mux(_T_8935, UInt<1>("h00"), ic_tag_valid_out[1][25]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8936 = mux(_T_8935, ic_tag_valid_out[1][25], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8937 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8937 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8938 = mux(_T_8937, UInt<1>("h00"), ic_tag_valid_out[1][26]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8938 = mux(_T_8937, ic_tag_valid_out[1][26], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8939 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8939 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8940 = mux(_T_8939, UInt<1>("h00"), ic_tag_valid_out[1][27]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8940 = mux(_T_8939, ic_tag_valid_out[1][27], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8941 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8941 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8942 = mux(_T_8941, UInt<1>("h00"), ic_tag_valid_out[1][28]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8942 = mux(_T_8941, ic_tag_valid_out[1][28], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8943 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8943 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8944 = mux(_T_8943, UInt<1>("h00"), ic_tag_valid_out[1][29]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8944 = mux(_T_8943, ic_tag_valid_out[1][29], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8945 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8945 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8946 = mux(_T_8945, UInt<1>("h00"), ic_tag_valid_out[1][30]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8946 = mux(_T_8945, ic_tag_valid_out[1][30], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8947 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8947 = eq(ifu_ic_rw_int_addr_ff, UInt<5>("h01f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8948 = mux(_T_8947, UInt<1>("h00"), ic_tag_valid_out[1][31]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8948 = mux(_T_8947, ic_tag_valid_out[1][31], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8949 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h020")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8949 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h020")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8950 = mux(_T_8949, UInt<1>("h00"), ic_tag_valid_out[1][32]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8950 = mux(_T_8949, ic_tag_valid_out[1][32], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8951 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h021")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8951 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h021")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8952 = mux(_T_8951, UInt<1>("h00"), ic_tag_valid_out[1][33]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8952 = mux(_T_8951, ic_tag_valid_out[1][33], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8953 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h022")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8953 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h022")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8954 = mux(_T_8953, UInt<1>("h00"), ic_tag_valid_out[1][34]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8954 = mux(_T_8953, ic_tag_valid_out[1][34], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8955 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h023")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8955 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h023")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8956 = mux(_T_8955, UInt<1>("h00"), ic_tag_valid_out[1][35]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8956 = mux(_T_8955, ic_tag_valid_out[1][35], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8957 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h024")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8957 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h024")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8958 = mux(_T_8957, UInt<1>("h00"), ic_tag_valid_out[1][36]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8958 = mux(_T_8957, ic_tag_valid_out[1][36], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8959 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h025")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8959 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h025")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8960 = mux(_T_8959, UInt<1>("h00"), ic_tag_valid_out[1][37]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8960 = mux(_T_8959, ic_tag_valid_out[1][37], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8961 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h026")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8961 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h026")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8962 = mux(_T_8961, UInt<1>("h00"), ic_tag_valid_out[1][38]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8962 = mux(_T_8961, ic_tag_valid_out[1][38], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8963 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h027")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8963 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h027")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8964 = mux(_T_8963, UInt<1>("h00"), ic_tag_valid_out[1][39]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8964 = mux(_T_8963, ic_tag_valid_out[1][39], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8965 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h028")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8965 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h028")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8966 = mux(_T_8965, UInt<1>("h00"), ic_tag_valid_out[1][40]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8966 = mux(_T_8965, ic_tag_valid_out[1][40], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8967 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h029")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8967 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h029")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8968 = mux(_T_8967, UInt<1>("h00"), ic_tag_valid_out[1][41]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8968 = mux(_T_8967, ic_tag_valid_out[1][41], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8969 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8969 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8970 = mux(_T_8969, UInt<1>("h00"), ic_tag_valid_out[1][42]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8970 = mux(_T_8969, ic_tag_valid_out[1][42], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8971 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8971 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8972 = mux(_T_8971, UInt<1>("h00"), ic_tag_valid_out[1][43]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8972 = mux(_T_8971, ic_tag_valid_out[1][43], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8973 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8973 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8974 = mux(_T_8973, UInt<1>("h00"), ic_tag_valid_out[1][44]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8974 = mux(_T_8973, ic_tag_valid_out[1][44], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8975 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8975 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8976 = mux(_T_8975, UInt<1>("h00"), ic_tag_valid_out[1][45]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8976 = mux(_T_8975, ic_tag_valid_out[1][45], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8977 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8977 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8978 = mux(_T_8977, UInt<1>("h00"), ic_tag_valid_out[1][46]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8978 = mux(_T_8977, ic_tag_valid_out[1][46], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8979 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8979 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h02f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8980 = mux(_T_8979, UInt<1>("h00"), ic_tag_valid_out[1][47]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8980 = mux(_T_8979, ic_tag_valid_out[1][47], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8981 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h030")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8981 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h030")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8982 = mux(_T_8981, UInt<1>("h00"), ic_tag_valid_out[1][48]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8982 = mux(_T_8981, ic_tag_valid_out[1][48], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8983 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h031")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8983 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h031")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8984 = mux(_T_8983, UInt<1>("h00"), ic_tag_valid_out[1][49]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8984 = mux(_T_8983, ic_tag_valid_out[1][49], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8985 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h032")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8985 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h032")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8986 = mux(_T_8985, UInt<1>("h00"), ic_tag_valid_out[1][50]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8986 = mux(_T_8985, ic_tag_valid_out[1][50], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8987 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h033")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8987 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h033")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8988 = mux(_T_8987, UInt<1>("h00"), ic_tag_valid_out[1][51]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8988 = mux(_T_8987, ic_tag_valid_out[1][51], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8989 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h034")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8989 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h034")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8990 = mux(_T_8989, UInt<1>("h00"), ic_tag_valid_out[1][52]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8990 = mux(_T_8989, ic_tag_valid_out[1][52], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8991 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h035")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8991 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h035")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8992 = mux(_T_8991, UInt<1>("h00"), ic_tag_valid_out[1][53]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8992 = mux(_T_8991, ic_tag_valid_out[1][53], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8993 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h036")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8993 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h036")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8994 = mux(_T_8993, UInt<1>("h00"), ic_tag_valid_out[1][54]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8994 = mux(_T_8993, ic_tag_valid_out[1][54], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8995 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h037")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8995 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h037")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8996 = mux(_T_8995, UInt<1>("h00"), ic_tag_valid_out[1][55]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8996 = mux(_T_8995, ic_tag_valid_out[1][55], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8997 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h038")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8997 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h038")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_8998 = mux(_T_8997, UInt<1>("h00"), ic_tag_valid_out[1][56]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_8998 = mux(_T_8997, ic_tag_valid_out[1][56], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_8999 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h039")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_8999 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h039")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9000 = mux(_T_8999, UInt<1>("h00"), ic_tag_valid_out[1][57]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9000 = mux(_T_8999, ic_tag_valid_out[1][57], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9001 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9001 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9002 = mux(_T_9001, UInt<1>("h00"), ic_tag_valid_out[1][58]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9002 = mux(_T_9001, ic_tag_valid_out[1][58], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9003 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9003 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9004 = mux(_T_9003, UInt<1>("h00"), ic_tag_valid_out[1][59]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9004 = mux(_T_9003, ic_tag_valid_out[1][59], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9005 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9005 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9006 = mux(_T_9005, UInt<1>("h00"), ic_tag_valid_out[1][60]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9006 = mux(_T_9005, ic_tag_valid_out[1][60], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9007 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9007 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9008 = mux(_T_9007, UInt<1>("h00"), ic_tag_valid_out[1][61]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9008 = mux(_T_9007, ic_tag_valid_out[1][61], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9009 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9009 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9010 = mux(_T_9009, UInt<1>("h00"), ic_tag_valid_out[1][62]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9010 = mux(_T_9009, ic_tag_valid_out[1][62], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9011 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9011 = eq(ifu_ic_rw_int_addr_ff, UInt<6>("h03f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9012 = mux(_T_9011, UInt<1>("h00"), ic_tag_valid_out[1][63]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9012 = mux(_T_9011, ic_tag_valid_out[1][63], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9013 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h040")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9013 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h040")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9014 = mux(_T_9013, UInt<1>("h00"), ic_tag_valid_out[1][64]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9014 = mux(_T_9013, ic_tag_valid_out[1][64], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9015 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h041")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9015 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h041")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9016 = mux(_T_9015, UInt<1>("h00"), ic_tag_valid_out[1][65]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9016 = mux(_T_9015, ic_tag_valid_out[1][65], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9017 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h042")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9017 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h042")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9018 = mux(_T_9017, UInt<1>("h00"), ic_tag_valid_out[1][66]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9018 = mux(_T_9017, ic_tag_valid_out[1][66], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9019 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h043")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9019 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h043")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9020 = mux(_T_9019, UInt<1>("h00"), ic_tag_valid_out[1][67]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9020 = mux(_T_9019, ic_tag_valid_out[1][67], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9021 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h044")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9021 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h044")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9022 = mux(_T_9021, UInt<1>("h00"), ic_tag_valid_out[1][68]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9022 = mux(_T_9021, ic_tag_valid_out[1][68], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9023 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h045")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9023 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h045")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9024 = mux(_T_9023, UInt<1>("h00"), ic_tag_valid_out[1][69]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9024 = mux(_T_9023, ic_tag_valid_out[1][69], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9025 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h046")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9025 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h046")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9026 = mux(_T_9025, UInt<1>("h00"), ic_tag_valid_out[1][70]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9026 = mux(_T_9025, ic_tag_valid_out[1][70], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9027 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h047")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9027 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h047")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9028 = mux(_T_9027, UInt<1>("h00"), ic_tag_valid_out[1][71]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9028 = mux(_T_9027, ic_tag_valid_out[1][71], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9029 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h048")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9029 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h048")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9030 = mux(_T_9029, UInt<1>("h00"), ic_tag_valid_out[1][72]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9030 = mux(_T_9029, ic_tag_valid_out[1][72], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9031 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h049")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9031 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h049")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9032 = mux(_T_9031, UInt<1>("h00"), ic_tag_valid_out[1][73]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9032 = mux(_T_9031, ic_tag_valid_out[1][73], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9033 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9033 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9034 = mux(_T_9033, UInt<1>("h00"), ic_tag_valid_out[1][74]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9034 = mux(_T_9033, ic_tag_valid_out[1][74], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9035 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9035 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9036 = mux(_T_9035, UInt<1>("h00"), ic_tag_valid_out[1][75]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9036 = mux(_T_9035, ic_tag_valid_out[1][75], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9037 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9037 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9038 = mux(_T_9037, UInt<1>("h00"), ic_tag_valid_out[1][76]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9038 = mux(_T_9037, ic_tag_valid_out[1][76], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9039 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9039 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9040 = mux(_T_9039, UInt<1>("h00"), ic_tag_valid_out[1][77]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9040 = mux(_T_9039, ic_tag_valid_out[1][77], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9041 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9041 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9042 = mux(_T_9041, UInt<1>("h00"), ic_tag_valid_out[1][78]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9042 = mux(_T_9041, ic_tag_valid_out[1][78], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9043 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9043 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h04f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9044 = mux(_T_9043, UInt<1>("h00"), ic_tag_valid_out[1][79]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9044 = mux(_T_9043, ic_tag_valid_out[1][79], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9045 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h050")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9045 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h050")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9046 = mux(_T_9045, UInt<1>("h00"), ic_tag_valid_out[1][80]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9046 = mux(_T_9045, ic_tag_valid_out[1][80], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9047 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h051")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9047 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h051")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9048 = mux(_T_9047, UInt<1>("h00"), ic_tag_valid_out[1][81]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9048 = mux(_T_9047, ic_tag_valid_out[1][81], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9049 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h052")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9049 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h052")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9050 = mux(_T_9049, UInt<1>("h00"), ic_tag_valid_out[1][82]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9050 = mux(_T_9049, ic_tag_valid_out[1][82], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9051 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h053")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9051 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h053")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9052 = mux(_T_9051, UInt<1>("h00"), ic_tag_valid_out[1][83]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9052 = mux(_T_9051, ic_tag_valid_out[1][83], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9053 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h054")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9053 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h054")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9054 = mux(_T_9053, UInt<1>("h00"), ic_tag_valid_out[1][84]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9054 = mux(_T_9053, ic_tag_valid_out[1][84], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9055 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h055")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9055 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h055")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9056 = mux(_T_9055, UInt<1>("h00"), ic_tag_valid_out[1][85]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9056 = mux(_T_9055, ic_tag_valid_out[1][85], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9057 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h056")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9057 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h056")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9058 = mux(_T_9057, UInt<1>("h00"), ic_tag_valid_out[1][86]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9058 = mux(_T_9057, ic_tag_valid_out[1][86], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9059 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h057")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9059 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h057")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9060 = mux(_T_9059, UInt<1>("h00"), ic_tag_valid_out[1][87]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9060 = mux(_T_9059, ic_tag_valid_out[1][87], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9061 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h058")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9061 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h058")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9062 = mux(_T_9061, UInt<1>("h00"), ic_tag_valid_out[1][88]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9062 = mux(_T_9061, ic_tag_valid_out[1][88], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9063 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h059")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9063 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h059")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9064 = mux(_T_9063, UInt<1>("h00"), ic_tag_valid_out[1][89]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9064 = mux(_T_9063, ic_tag_valid_out[1][89], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9065 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9065 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9066 = mux(_T_9065, UInt<1>("h00"), ic_tag_valid_out[1][90]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9066 = mux(_T_9065, ic_tag_valid_out[1][90], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9067 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9067 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9068 = mux(_T_9067, UInt<1>("h00"), ic_tag_valid_out[1][91]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9068 = mux(_T_9067, ic_tag_valid_out[1][91], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9069 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9069 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9070 = mux(_T_9069, UInt<1>("h00"), ic_tag_valid_out[1][92]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9070 = mux(_T_9069, ic_tag_valid_out[1][92], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9071 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9071 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9072 = mux(_T_9071, UInt<1>("h00"), ic_tag_valid_out[1][93]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9072 = mux(_T_9071, ic_tag_valid_out[1][93], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9073 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9073 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9074 = mux(_T_9073, UInt<1>("h00"), ic_tag_valid_out[1][94]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9074 = mux(_T_9073, ic_tag_valid_out[1][94], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9075 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9075 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h05f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9076 = mux(_T_9075, UInt<1>("h00"), ic_tag_valid_out[1][95]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9076 = mux(_T_9075, ic_tag_valid_out[1][95], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9077 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h060")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9077 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h060")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9078 = mux(_T_9077, UInt<1>("h00"), ic_tag_valid_out[1][96]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9078 = mux(_T_9077, ic_tag_valid_out[1][96], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9079 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h061")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9079 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h061")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9080 = mux(_T_9079, UInt<1>("h00"), ic_tag_valid_out[1][97]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9080 = mux(_T_9079, ic_tag_valid_out[1][97], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9081 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h062")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9081 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h062")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9082 = mux(_T_9081, UInt<1>("h00"), ic_tag_valid_out[1][98]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9082 = mux(_T_9081, ic_tag_valid_out[1][98], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9083 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h063")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9083 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h063")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9084 = mux(_T_9083, UInt<1>("h00"), ic_tag_valid_out[1][99]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9084 = mux(_T_9083, ic_tag_valid_out[1][99], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9085 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h064")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9085 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h064")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9086 = mux(_T_9085, UInt<1>("h00"), ic_tag_valid_out[1][100]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9086 = mux(_T_9085, ic_tag_valid_out[1][100], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9087 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h065")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9087 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h065")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9088 = mux(_T_9087, UInt<1>("h00"), ic_tag_valid_out[1][101]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9088 = mux(_T_9087, ic_tag_valid_out[1][101], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9089 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h066")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9089 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h066")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9090 = mux(_T_9089, UInt<1>("h00"), ic_tag_valid_out[1][102]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9090 = mux(_T_9089, ic_tag_valid_out[1][102], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9091 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h067")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9091 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h067")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9092 = mux(_T_9091, UInt<1>("h00"), ic_tag_valid_out[1][103]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9092 = mux(_T_9091, ic_tag_valid_out[1][103], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9093 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h068")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9093 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h068")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9094 = mux(_T_9093, UInt<1>("h00"), ic_tag_valid_out[1][104]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9094 = mux(_T_9093, ic_tag_valid_out[1][104], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9095 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h069")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9095 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h069")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9096 = mux(_T_9095, UInt<1>("h00"), ic_tag_valid_out[1][105]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9096 = mux(_T_9095, ic_tag_valid_out[1][105], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9097 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9097 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9098 = mux(_T_9097, UInt<1>("h00"), ic_tag_valid_out[1][106]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9098 = mux(_T_9097, ic_tag_valid_out[1][106], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9099 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9099 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9100 = mux(_T_9099, UInt<1>("h00"), ic_tag_valid_out[1][107]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9100 = mux(_T_9099, ic_tag_valid_out[1][107], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9101 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9101 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9102 = mux(_T_9101, UInt<1>("h00"), ic_tag_valid_out[1][108]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9102 = mux(_T_9101, ic_tag_valid_out[1][108], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9103 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9103 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9104 = mux(_T_9103, UInt<1>("h00"), ic_tag_valid_out[1][109]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9104 = mux(_T_9103, ic_tag_valid_out[1][109], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9105 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9105 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9106 = mux(_T_9105, UInt<1>("h00"), ic_tag_valid_out[1][110]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9106 = mux(_T_9105, ic_tag_valid_out[1][110], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9107 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9107 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h06f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9108 = mux(_T_9107, UInt<1>("h00"), ic_tag_valid_out[1][111]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9108 = mux(_T_9107, ic_tag_valid_out[1][111], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9109 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h070")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9109 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h070")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9110 = mux(_T_9109, UInt<1>("h00"), ic_tag_valid_out[1][112]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9110 = mux(_T_9109, ic_tag_valid_out[1][112], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9111 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h071")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9111 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h071")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9112 = mux(_T_9111, UInt<1>("h00"), ic_tag_valid_out[1][113]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9112 = mux(_T_9111, ic_tag_valid_out[1][113], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9113 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h072")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9113 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h072")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9114 = mux(_T_9113, UInt<1>("h00"), ic_tag_valid_out[1][114]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9114 = mux(_T_9113, ic_tag_valid_out[1][114], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9115 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h073")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9115 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h073")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9116 = mux(_T_9115, UInt<1>("h00"), ic_tag_valid_out[1][115]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9116 = mux(_T_9115, ic_tag_valid_out[1][115], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9117 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h074")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9117 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h074")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9118 = mux(_T_9117, UInt<1>("h00"), ic_tag_valid_out[1][116]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9118 = mux(_T_9117, ic_tag_valid_out[1][116], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9119 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h075")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9119 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h075")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9120 = mux(_T_9119, UInt<1>("h00"), ic_tag_valid_out[1][117]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9120 = mux(_T_9119, ic_tag_valid_out[1][117], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9121 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h076")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9121 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h076")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9122 = mux(_T_9121, UInt<1>("h00"), ic_tag_valid_out[1][118]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9122 = mux(_T_9121, ic_tag_valid_out[1][118], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9123 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h077")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9123 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h077")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9124 = mux(_T_9123, UInt<1>("h00"), ic_tag_valid_out[1][119]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9124 = mux(_T_9123, ic_tag_valid_out[1][119], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9125 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h078")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9125 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h078")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9126 = mux(_T_9125, UInt<1>("h00"), ic_tag_valid_out[1][120]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9126 = mux(_T_9125, ic_tag_valid_out[1][120], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9127 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h079")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9127 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h079")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9128 = mux(_T_9127, UInt<1>("h00"), ic_tag_valid_out[1][121]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9128 = mux(_T_9127, ic_tag_valid_out[1][121], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9129 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07a")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9129 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07a")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9130 = mux(_T_9129, UInt<1>("h00"), ic_tag_valid_out[1][122]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9130 = mux(_T_9129, ic_tag_valid_out[1][122], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9131 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07b")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9131 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07b")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9132 = mux(_T_9131, UInt<1>("h00"), ic_tag_valid_out[1][123]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9132 = mux(_T_9131, ic_tag_valid_out[1][123], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9133 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07c")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9133 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07c")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9134 = mux(_T_9133, UInt<1>("h00"), ic_tag_valid_out[1][124]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9134 = mux(_T_9133, ic_tag_valid_out[1][124], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9135 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07d")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9135 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07d")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9136 = mux(_T_9135, UInt<1>("h00"), ic_tag_valid_out[1][125]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9136 = mux(_T_9135, ic_tag_valid_out[1][125], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9137 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07e")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9137 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07e")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9138 = mux(_T_9137, UInt<1>("h00"), ic_tag_valid_out[1][126]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9138 = mux(_T_9137, ic_tag_valid_out[1][126], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9139 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07f")) @[el2_ifu_mem_ctl.scala 765:33]
|
node _T_9139 = eq(ifu_ic_rw_int_addr_ff, UInt<7>("h07f")) @[el2_ifu_mem_ctl.scala 765:33]
|
||||||
node _T_9140 = mux(_T_9139, UInt<1>("h00"), ic_tag_valid_out[1][127]) @[el2_ifu_mem_ctl.scala 765:10]
|
node _T_9140 = mux(_T_9139, ic_tag_valid_out[1][127], UInt<1>("h00")) @[el2_ifu_mem_ctl.scala 765:10]
|
||||||
node _T_9141 = or(_T_8886, _T_8888) @[el2_ifu_mem_ctl.scala 765:91]
|
node _T_9141 = or(_T_8886, _T_8888) @[el2_ifu_mem_ctl.scala 765:91]
|
||||||
node _T_9142 = or(_T_9141, _T_8890) @[el2_ifu_mem_ctl.scala 765:91]
|
node _T_9142 = or(_T_9141, _T_8890) @[el2_ifu_mem_ctl.scala 765:91]
|
||||||
node _T_9143 = or(_T_9142, _T_8892) @[el2_ifu_mem_ctl.scala 765:91]
|
node _T_9143 = or(_T_9142, _T_8892) @[el2_ifu_mem_ctl.scala 765:91]
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -762,7 +762,7 @@ class el2_ifu_mem_ctl extends Module with el2_lib {
|
||||||
(((ifu_ic_rw_int_addr_ff === (k + (32 * i)).U) & ifu_tag_wren_ff(j)) | ((perr_ic_index_ff === (k + (32 * i)).U) & ifu_tag_wren_ff(j))&tag_valid_clken(i)(j)).asBool)
|
(((ifu_ic_rw_int_addr_ff === (k + (32 * i)).U) & ifu_tag_wren_ff(j)) | ((perr_ic_index_ff === (k + (32 * i)).U) & ifu_tag_wren_ff(j))&tag_valid_clken(i)(j)).asBool)
|
||||||
|
|
||||||
val ic_tag_valid_unq = (0 until ICACHE_NUM_WAYS).map(k => (0 until ICACHE_TAG_DEPTH).map(j =>
|
val ic_tag_valid_unq = (0 until ICACHE_NUM_WAYS).map(k => (0 until ICACHE_TAG_DEPTH).map(j =>
|
||||||
Mux(ifu_ic_rw_int_addr_ff === j.U, false.B, ic_tag_valid_out(k)(j)).asUInt).reduce(_|_)).reverse.reduce(Cat(_,_))
|
Mux(ifu_ic_rw_int_addr_ff === j.U, ic_tag_valid_out(k)(j), false.B).asUInt).reduce(_|_)).reverse.reduce(Cat(_,_))
|
||||||
|
|
||||||
// Making a sudo LRU
|
// Making a sudo LRU
|
||||||
// val replace_way_mb_any = Wire(Vec(ICACHE_NUM_WAYS, Bool()))
|
// val replace_way_mb_any = Wire(Vec(ICACHE_NUM_WAYS, Bool()))
|
||||||
|
|
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Reference in New Issue