From f59510b304ef5ab349b394fb989e1c7566ae5b7e Mon Sep 17 00:00:00 2001 From: waleed-lm Date: Thu, 10 Dec 2020 17:35:23 +0500 Subject: [PATCH] snapshot removed --- firrtl_black_box_resource_files.f | 4 +- quasar_wrapper.fir | 1106 ++++++++--------- quasar_wrapper.v | 708 +++++------ src/main/scala/lsu/lsu_bus_intf.scala | 1 - src/main/scala/lsu/lsu_clkdomain.scala | 1 - .../classes/lsu/lsu_bus_intf$$anon$1.class | Bin 7108 -> 7108 bytes .../scala-2.12/classes/lsu/lsu_bus_intf.class | Bin 170396 -> 170395 bytes .../classes/lsu/lsu_clkdomain$$anon$1.class | Bin 5553 -> 5553 bytes .../classes/lsu/lsu_clkdomain.class | Bin 91694 -> 91694 bytes 9 files changed, 910 insertions(+), 910 deletions(-) diff --git a/firrtl_black_box_resource_files.f b/firrtl_black_box_resource_files.f index d4456bc6..40eae7ce 100644 --- a/firrtl_black_box_resource_files.f +++ b/firrtl_black_box_resource_files.f @@ -1 +1,3 @@ -/home/waleedbinehsan/Desktop/Quasar/gated_latch.v \ No newline at end of file +/home/waleedbinehsan/Desktop/Quasar/gated_latch.v +/home/waleedbinehsan/Desktop/Quasar/dmi_wrapper.sv +/home/waleedbinehsan/Desktop/Quasar/mem.sv \ No newline at end of file diff --git a/quasar_wrapper.fir b/quasar_wrapper.fir index f0cab509..73543600 100644 --- a/quasar_wrapper.fir +++ b/quasar_wrapper.fir @@ -94484,152 +94484,152 @@ circuit quasar_wrapper : input reset : AsyncReset output io : {flip free_clk : Clock, flip clk_override : UInt<1>, flip addr_in_dccm_m : UInt<1>, flip dma_dccm_req : UInt<1>, flip ldst_stbuf_reqvld_r : UInt<1>, flip stbuf_reqvld_any : UInt<1>, flip stbuf_reqvld_flushed_any : UInt<1>, flip lsu_busreq_r : UInt<1>, flip lsu_bus_buffer_pend_any : UInt<1>, flip lsu_bus_buffer_empty_any : UInt<1>, flip lsu_stbuf_empty_any : UInt<1>, flip lsu_bus_clk_en : UInt<1>, flip lsu_p : {valid : UInt<1>, bits : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>}}, flip lsu_pkt_d : {valid : UInt<1>, bits : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>}}, flip lsu_pkt_m : {valid : UInt<1>, bits : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>}}, flip lsu_pkt_r : {valid : UInt<1>, bits : {fast_int : UInt<1>, by : UInt<1>, half : UInt<1>, word : UInt<1>, dword : UInt<1>, load : UInt<1>, store : UInt<1>, unsign : UInt<1>, dma : UInt<1>, store_data_bypass_d : UInt<1>, load_ldst_bypass_d : UInt<1>, store_data_bypass_m : UInt<1>}}, lsu_c1_m_clk : Clock, lsu_c1_r_clk : Clock, lsu_c2_m_clk : Clock, lsu_c2_r_clk : Clock, lsu_store_c1_m_clk : Clock, lsu_store_c1_r_clk : Clock, lsu_stbuf_c1_clk : Clock, lsu_bus_obuf_c1_clk : Clock, lsu_bus_ibuf_c1_clk : Clock, lsu_bus_buf_c1_clk : Clock, lsu_busm_clk : Clock, lsu_free_c2_clk : Clock, flip scan_mode : UInt<1>} - wire lsu_c1_d_clken_q : UInt<1> @[lsu_clkdomain.scala 58:36] - wire lsu_c1_m_clken_q : UInt<1> @[lsu_clkdomain.scala 59:36] - wire lsu_c1_r_clken_q : UInt<1> @[lsu_clkdomain.scala 60:36] - wire lsu_free_c1_clken_q : UInt<1> @[lsu_clkdomain.scala 61:36] - node _T = or(io.lsu_p.valid, io.dma_dccm_req) @[lsu_clkdomain.scala 63:51] - node lsu_c1_d_clken = or(_T, io.clk_override) @[lsu_clkdomain.scala 63:70] - node _T_1 = or(io.lsu_pkt_d.valid, lsu_c1_d_clken_q) @[lsu_clkdomain.scala 64:51] - node lsu_c1_m_clken = or(_T_1, io.clk_override) @[lsu_clkdomain.scala 64:70] - node _T_2 = or(io.lsu_pkt_m.valid, lsu_c1_m_clken_q) @[lsu_clkdomain.scala 65:51] - node lsu_c1_r_clken = or(_T_2, io.clk_override) @[lsu_clkdomain.scala 65:70] - node _T_3 = or(lsu_c1_m_clken, lsu_c1_m_clken_q) @[lsu_clkdomain.scala 67:47] - node lsu_c2_m_clken = or(_T_3, io.clk_override) @[lsu_clkdomain.scala 67:66] - node _T_4 = or(lsu_c1_r_clken, lsu_c1_r_clken_q) @[lsu_clkdomain.scala 68:47] - node lsu_c2_r_clken = or(_T_4, io.clk_override) @[lsu_clkdomain.scala 68:66] - node _T_5 = and(lsu_c1_m_clken, io.lsu_pkt_d.bits.store) @[lsu_clkdomain.scala 70:49] - node lsu_store_c1_m_clken = or(_T_5, io.clk_override) @[lsu_clkdomain.scala 70:76] - node _T_6 = and(lsu_c1_r_clken, io.lsu_pkt_m.bits.store) @[lsu_clkdomain.scala 71:49] - node lsu_store_c1_r_clken = or(_T_6, io.clk_override) @[lsu_clkdomain.scala 71:76] - node _T_7 = or(io.ldst_stbuf_reqvld_r, io.stbuf_reqvld_any) @[lsu_clkdomain.scala 72:55] - node _T_8 = or(_T_7, io.stbuf_reqvld_flushed_any) @[lsu_clkdomain.scala 72:77] - node lsu_stbuf_c1_clken = or(_T_8, io.clk_override) @[lsu_clkdomain.scala 72:107] - node lsu_bus_ibuf_c1_clken = or(io.lsu_busreq_r, io.clk_override) @[lsu_clkdomain.scala 73:49] - node _T_9 = or(io.lsu_bus_buffer_pend_any, io.lsu_busreq_r) @[lsu_clkdomain.scala 74:61] - node _T_10 = or(_T_9, io.clk_override) @[lsu_clkdomain.scala 74:79] - node lsu_bus_obuf_c1_clken = and(_T_10, io.lsu_bus_clk_en) @[lsu_clkdomain.scala 74:98] - node _T_11 = eq(io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[lsu_clkdomain.scala 75:32] - node _T_12 = or(_T_11, io.lsu_busreq_r) @[lsu_clkdomain.scala 75:61] - node lsu_bus_buf_c1_clken = or(_T_12, io.clk_override) @[lsu_clkdomain.scala 75:79] - node _T_13 = or(io.lsu_p.valid, io.lsu_pkt_d.valid) @[lsu_clkdomain.scala 77:48] - node _T_14 = or(_T_13, io.lsu_pkt_m.valid) @[lsu_clkdomain.scala 77:69] - node _T_15 = or(_T_14, io.lsu_pkt_r.valid) @[lsu_clkdomain.scala 77:90] - node _T_16 = eq(io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[lsu_clkdomain.scala 77:114] - node _T_17 = or(_T_15, _T_16) @[lsu_clkdomain.scala 77:112] - node _T_18 = eq(io.lsu_stbuf_empty_any, UInt<1>("h00")) @[lsu_clkdomain.scala 77:145] - node _T_19 = or(_T_17, _T_18) @[lsu_clkdomain.scala 77:143] - node lsu_free_c1_clken = or(_T_19, io.clk_override) @[lsu_clkdomain.scala 77:169] - node _T_20 = or(lsu_free_c1_clken, lsu_free_c1_clken_q) @[lsu_clkdomain.scala 78:50] - node lsu_free_c2_clken = or(_T_20, io.clk_override) @[lsu_clkdomain.scala 78:72] - reg _T_21 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_clkdomain.scala 81:60] - _T_21 <= lsu_free_c1_clken @[lsu_clkdomain.scala 81:60] - lsu_free_c1_clken_q <= _T_21 @[lsu_clkdomain.scala 81:26] - reg _T_22 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_clkdomain.scala 82:67] - _T_22 <= lsu_c1_d_clken @[lsu_clkdomain.scala 82:67] - lsu_c1_d_clken_q <= _T_22 @[lsu_clkdomain.scala 82:26] - reg _T_23 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_clkdomain.scala 83:67] - _T_23 <= lsu_c1_m_clken @[lsu_clkdomain.scala 83:67] - lsu_c1_m_clken_q <= _T_23 @[lsu_clkdomain.scala 83:26] - reg _T_24 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_clkdomain.scala 84:67] - _T_24 <= lsu_c1_r_clken @[lsu_clkdomain.scala 84:67] - lsu_c1_r_clken_q <= _T_24 @[lsu_clkdomain.scala 84:26] - node _T_25 = bits(lsu_c1_m_clken, 0, 0) @[lsu_clkdomain.scala 86:59] + wire lsu_c1_d_clken_q : UInt<1> @[lsu_clkdomain.scala 57:36] + wire lsu_c1_m_clken_q : UInt<1> @[lsu_clkdomain.scala 58:36] + wire lsu_c1_r_clken_q : UInt<1> @[lsu_clkdomain.scala 59:36] + wire lsu_free_c1_clken_q : UInt<1> @[lsu_clkdomain.scala 60:36] + node _T = or(io.lsu_p.valid, io.dma_dccm_req) @[lsu_clkdomain.scala 62:51] + node lsu_c1_d_clken = or(_T, io.clk_override) @[lsu_clkdomain.scala 62:70] + node _T_1 = or(io.lsu_pkt_d.valid, lsu_c1_d_clken_q) @[lsu_clkdomain.scala 63:51] + node lsu_c1_m_clken = or(_T_1, io.clk_override) @[lsu_clkdomain.scala 63:70] + node _T_2 = or(io.lsu_pkt_m.valid, lsu_c1_m_clken_q) @[lsu_clkdomain.scala 64:51] + node lsu_c1_r_clken = or(_T_2, io.clk_override) @[lsu_clkdomain.scala 64:70] + node _T_3 = or(lsu_c1_m_clken, lsu_c1_m_clken_q) @[lsu_clkdomain.scala 66:47] + node lsu_c2_m_clken = or(_T_3, io.clk_override) @[lsu_clkdomain.scala 66:66] + node _T_4 = or(lsu_c1_r_clken, lsu_c1_r_clken_q) @[lsu_clkdomain.scala 67:47] + node lsu_c2_r_clken = or(_T_4, io.clk_override) @[lsu_clkdomain.scala 67:66] + node _T_5 = and(lsu_c1_m_clken, io.lsu_pkt_d.bits.store) @[lsu_clkdomain.scala 69:49] + node lsu_store_c1_m_clken = or(_T_5, io.clk_override) @[lsu_clkdomain.scala 69:76] + node _T_6 = and(lsu_c1_r_clken, io.lsu_pkt_m.bits.store) @[lsu_clkdomain.scala 70:49] + node lsu_store_c1_r_clken = or(_T_6, io.clk_override) @[lsu_clkdomain.scala 70:76] + node _T_7 = or(io.ldst_stbuf_reqvld_r, io.stbuf_reqvld_any) @[lsu_clkdomain.scala 71:55] + node _T_8 = or(_T_7, io.stbuf_reqvld_flushed_any) @[lsu_clkdomain.scala 71:77] + node lsu_stbuf_c1_clken = or(_T_8, io.clk_override) @[lsu_clkdomain.scala 71:107] + node lsu_bus_ibuf_c1_clken = or(io.lsu_busreq_r, io.clk_override) @[lsu_clkdomain.scala 72:49] + node _T_9 = or(io.lsu_bus_buffer_pend_any, io.lsu_busreq_r) @[lsu_clkdomain.scala 73:61] + node _T_10 = or(_T_9, io.clk_override) @[lsu_clkdomain.scala 73:79] + node lsu_bus_obuf_c1_clken = and(_T_10, io.lsu_bus_clk_en) @[lsu_clkdomain.scala 73:98] + node _T_11 = eq(io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[lsu_clkdomain.scala 74:32] + node _T_12 = or(_T_11, io.lsu_busreq_r) @[lsu_clkdomain.scala 74:61] + node lsu_bus_buf_c1_clken = or(_T_12, io.clk_override) @[lsu_clkdomain.scala 74:79] + node _T_13 = or(io.lsu_p.valid, io.lsu_pkt_d.valid) @[lsu_clkdomain.scala 76:48] + node _T_14 = or(_T_13, io.lsu_pkt_m.valid) @[lsu_clkdomain.scala 76:69] + node _T_15 = or(_T_14, io.lsu_pkt_r.valid) @[lsu_clkdomain.scala 76:90] + node _T_16 = eq(io.lsu_bus_buffer_empty_any, UInt<1>("h00")) @[lsu_clkdomain.scala 76:114] + node _T_17 = or(_T_15, _T_16) @[lsu_clkdomain.scala 76:112] + node _T_18 = eq(io.lsu_stbuf_empty_any, UInt<1>("h00")) @[lsu_clkdomain.scala 76:145] + node _T_19 = or(_T_17, _T_18) @[lsu_clkdomain.scala 76:143] + node lsu_free_c1_clken = or(_T_19, io.clk_override) @[lsu_clkdomain.scala 76:169] + node _T_20 = or(lsu_free_c1_clken, lsu_free_c1_clken_q) @[lsu_clkdomain.scala 77:50] + node lsu_free_c2_clken = or(_T_20, io.clk_override) @[lsu_clkdomain.scala 77:72] + reg _T_21 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_clkdomain.scala 80:60] + _T_21 <= lsu_free_c1_clken @[lsu_clkdomain.scala 80:60] + lsu_free_c1_clken_q <= _T_21 @[lsu_clkdomain.scala 80:26] + reg _T_22 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_clkdomain.scala 81:67] + _T_22 <= lsu_c1_d_clken @[lsu_clkdomain.scala 81:67] + lsu_c1_d_clken_q <= _T_22 @[lsu_clkdomain.scala 81:26] + reg _T_23 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_clkdomain.scala 82:67] + _T_23 <= lsu_c1_m_clken @[lsu_clkdomain.scala 82:67] + lsu_c1_m_clken_q <= _T_23 @[lsu_clkdomain.scala 82:26] + reg _T_24 : UInt<1>, io.lsu_free_c2_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_clkdomain.scala 83:67] + _T_24 <= lsu_c1_r_clken @[lsu_clkdomain.scala 83:67] + lsu_c1_r_clken_q <= _T_24 @[lsu_clkdomain.scala 83:26] + node _T_25 = bits(lsu_c1_m_clken, 0, 0) @[lsu_clkdomain.scala 85:59] inst rvclkhdr of rvclkhdr_800 @[lib.scala 327:22] rvclkhdr.clock <= clock rvclkhdr.reset <= reset rvclkhdr.io.clk <= clock @[lib.scala 328:17] rvclkhdr.io.en <= _T_25 @[lib.scala 329:16] rvclkhdr.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_c1_m_clk <= rvclkhdr.io.l1clk @[lsu_clkdomain.scala 86:26] - node _T_26 = bits(lsu_c1_r_clken, 0, 0) @[lsu_clkdomain.scala 87:59] + io.lsu_c1_m_clk <= rvclkhdr.io.l1clk @[lsu_clkdomain.scala 85:26] + node _T_26 = bits(lsu_c1_r_clken, 0, 0) @[lsu_clkdomain.scala 86:59] inst rvclkhdr_1 of rvclkhdr_801 @[lib.scala 327:22] rvclkhdr_1.clock <= clock rvclkhdr_1.reset <= reset rvclkhdr_1.io.clk <= clock @[lib.scala 328:17] rvclkhdr_1.io.en <= _T_26 @[lib.scala 329:16] rvclkhdr_1.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_c1_r_clk <= rvclkhdr_1.io.l1clk @[lsu_clkdomain.scala 87:26] - node _T_27 = bits(lsu_c2_m_clken, 0, 0) @[lsu_clkdomain.scala 88:59] + io.lsu_c1_r_clk <= rvclkhdr_1.io.l1clk @[lsu_clkdomain.scala 86:26] + node _T_27 = bits(lsu_c2_m_clken, 0, 0) @[lsu_clkdomain.scala 87:59] inst rvclkhdr_2 of rvclkhdr_802 @[lib.scala 327:22] rvclkhdr_2.clock <= clock rvclkhdr_2.reset <= reset rvclkhdr_2.io.clk <= clock @[lib.scala 328:17] rvclkhdr_2.io.en <= _T_27 @[lib.scala 329:16] rvclkhdr_2.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_c2_m_clk <= rvclkhdr_2.io.l1clk @[lsu_clkdomain.scala 88:26] - node _T_28 = bits(lsu_c2_r_clken, 0, 0) @[lsu_clkdomain.scala 89:59] + io.lsu_c2_m_clk <= rvclkhdr_2.io.l1clk @[lsu_clkdomain.scala 87:26] + node _T_28 = bits(lsu_c2_r_clken, 0, 0) @[lsu_clkdomain.scala 88:59] inst rvclkhdr_3 of rvclkhdr_803 @[lib.scala 327:22] rvclkhdr_3.clock <= clock rvclkhdr_3.reset <= reset rvclkhdr_3.io.clk <= clock @[lib.scala 328:17] rvclkhdr_3.io.en <= _T_28 @[lib.scala 329:16] rvclkhdr_3.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_c2_r_clk <= rvclkhdr_3.io.l1clk @[lsu_clkdomain.scala 89:26] - node _T_29 = bits(lsu_store_c1_m_clken, 0, 0) @[lsu_clkdomain.scala 90:65] + io.lsu_c2_r_clk <= rvclkhdr_3.io.l1clk @[lsu_clkdomain.scala 88:26] + node _T_29 = bits(lsu_store_c1_m_clken, 0, 0) @[lsu_clkdomain.scala 89:65] inst rvclkhdr_4 of rvclkhdr_804 @[lib.scala 327:22] rvclkhdr_4.clock <= clock rvclkhdr_4.reset <= reset rvclkhdr_4.io.clk <= clock @[lib.scala 328:17] rvclkhdr_4.io.en <= _T_29 @[lib.scala 329:16] rvclkhdr_4.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_store_c1_m_clk <= rvclkhdr_4.io.l1clk @[lsu_clkdomain.scala 90:26] - node _T_30 = bits(lsu_store_c1_r_clken, 0, 0) @[lsu_clkdomain.scala 91:65] + io.lsu_store_c1_m_clk <= rvclkhdr_4.io.l1clk @[lsu_clkdomain.scala 89:26] + node _T_30 = bits(lsu_store_c1_r_clken, 0, 0) @[lsu_clkdomain.scala 90:65] inst rvclkhdr_5 of rvclkhdr_805 @[lib.scala 327:22] rvclkhdr_5.clock <= clock rvclkhdr_5.reset <= reset rvclkhdr_5.io.clk <= clock @[lib.scala 328:17] rvclkhdr_5.io.en <= _T_30 @[lib.scala 329:16] rvclkhdr_5.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_store_c1_r_clk <= rvclkhdr_5.io.l1clk @[lsu_clkdomain.scala 91:26] - node _T_31 = bits(lsu_stbuf_c1_clken, 0, 0) @[lsu_clkdomain.scala 92:63] + io.lsu_store_c1_r_clk <= rvclkhdr_5.io.l1clk @[lsu_clkdomain.scala 90:26] + node _T_31 = bits(lsu_stbuf_c1_clken, 0, 0) @[lsu_clkdomain.scala 91:63] inst rvclkhdr_6 of rvclkhdr_806 @[lib.scala 327:22] rvclkhdr_6.clock <= clock rvclkhdr_6.reset <= reset rvclkhdr_6.io.clk <= clock @[lib.scala 328:17] rvclkhdr_6.io.en <= _T_31 @[lib.scala 329:16] rvclkhdr_6.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_stbuf_c1_clk <= rvclkhdr_6.io.l1clk @[lsu_clkdomain.scala 92:26] - node _T_32 = bits(lsu_bus_ibuf_c1_clken, 0, 0) @[lsu_clkdomain.scala 93:66] + io.lsu_stbuf_c1_clk <= rvclkhdr_6.io.l1clk @[lsu_clkdomain.scala 91:26] + node _T_32 = bits(lsu_bus_ibuf_c1_clken, 0, 0) @[lsu_clkdomain.scala 92:66] inst rvclkhdr_7 of rvclkhdr_807 @[lib.scala 327:22] rvclkhdr_7.clock <= clock rvclkhdr_7.reset <= reset rvclkhdr_7.io.clk <= clock @[lib.scala 328:17] rvclkhdr_7.io.en <= _T_32 @[lib.scala 329:16] rvclkhdr_7.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_bus_ibuf_c1_clk <= rvclkhdr_7.io.l1clk @[lsu_clkdomain.scala 93:26] - node _T_33 = bits(lsu_bus_obuf_c1_clken, 0, 0) @[lsu_clkdomain.scala 94:66] + io.lsu_bus_ibuf_c1_clk <= rvclkhdr_7.io.l1clk @[lsu_clkdomain.scala 92:26] + node _T_33 = bits(lsu_bus_obuf_c1_clken, 0, 0) @[lsu_clkdomain.scala 93:66] inst rvclkhdr_8 of rvclkhdr_808 @[lib.scala 327:22] rvclkhdr_8.clock <= clock rvclkhdr_8.reset <= reset rvclkhdr_8.io.clk <= clock @[lib.scala 328:17] rvclkhdr_8.io.en <= _T_33 @[lib.scala 329:16] rvclkhdr_8.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_bus_obuf_c1_clk <= rvclkhdr_8.io.l1clk @[lsu_clkdomain.scala 94:26] - node _T_34 = bits(lsu_bus_buf_c1_clken, 0, 0) @[lsu_clkdomain.scala 95:65] + io.lsu_bus_obuf_c1_clk <= rvclkhdr_8.io.l1clk @[lsu_clkdomain.scala 93:26] + node _T_34 = bits(lsu_bus_buf_c1_clken, 0, 0) @[lsu_clkdomain.scala 94:65] inst rvclkhdr_9 of rvclkhdr_809 @[lib.scala 327:22] rvclkhdr_9.clock <= clock rvclkhdr_9.reset <= reset rvclkhdr_9.io.clk <= clock @[lib.scala 328:17] rvclkhdr_9.io.en <= _T_34 @[lib.scala 329:16] rvclkhdr_9.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_bus_buf_c1_clk <= rvclkhdr_9.io.l1clk @[lsu_clkdomain.scala 95:26] - node _T_35 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_clkdomain.scala 96:62] + io.lsu_bus_buf_c1_clk <= rvclkhdr_9.io.l1clk @[lsu_clkdomain.scala 94:26] + node _T_35 = bits(io.lsu_bus_clk_en, 0, 0) @[lsu_clkdomain.scala 95:62] inst rvclkhdr_10 of rvclkhdr_810 @[lib.scala 327:22] rvclkhdr_10.clock <= clock rvclkhdr_10.reset <= reset rvclkhdr_10.io.clk <= clock @[lib.scala 328:17] rvclkhdr_10.io.en <= _T_35 @[lib.scala 329:16] rvclkhdr_10.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_busm_clk <= rvclkhdr_10.io.l1clk @[lsu_clkdomain.scala 96:26] - node _T_36 = bits(lsu_free_c2_clken, 0, 0) @[lsu_clkdomain.scala 97:62] + io.lsu_busm_clk <= rvclkhdr_10.io.l1clk @[lsu_clkdomain.scala 95:26] + node _T_36 = bits(lsu_free_c2_clken, 0, 0) @[lsu_clkdomain.scala 96:62] inst rvclkhdr_11 of rvclkhdr_811 @[lib.scala 327:22] rvclkhdr_11.clock <= clock rvclkhdr_11.reset <= reset rvclkhdr_11.io.clk <= clock @[lib.scala 328:17] rvclkhdr_11.io.en <= _T_36 @[lib.scala 329:16] rvclkhdr_11.io.scan_mode <= io.scan_mode @[lib.scala 330:23] - io.lsu_free_c2_clk <= rvclkhdr_11.io.l1clk @[lsu_clkdomain.scala 97:26] + io.lsu_free_c2_clk <= rvclkhdr_11.io.l1clk @[lsu_clkdomain.scala 96:26] extmodule gated_latch_812 : output Q : Clock @@ -101230,132 +101230,132 @@ circuit quasar_wrapper : ld_full_hit_lo_m <= UInt<1>("h01") wire ld_full_hit_m : UInt<1> ld_full_hit_m <= UInt<1>("h00") - inst bus_buffer of lsu_bus_buffer @[lsu_bus_intf.scala 102:39] + inst bus_buffer of lsu_bus_buffer @[lsu_bus_intf.scala 101:39] bus_buffer.clock <= clock bus_buffer.reset <= reset - bus_buffer.io.scan_mode <= io.scan_mode @[lsu_bus_intf.scala 104:29] - io.tlu_busbuff.lsu_imprecise_error_addr_any <= bus_buffer.io.tlu_busbuff.lsu_imprecise_error_addr_any @[lsu_bus_intf.scala 105:18] - io.tlu_busbuff.lsu_imprecise_error_store_any <= bus_buffer.io.tlu_busbuff.lsu_imprecise_error_store_any @[lsu_bus_intf.scala 105:18] - io.tlu_busbuff.lsu_imprecise_error_load_any <= bus_buffer.io.tlu_busbuff.lsu_imprecise_error_load_any @[lsu_bus_intf.scala 105:18] - bus_buffer.io.tlu_busbuff.dec_tlu_sideeffect_posted_disable <= io.tlu_busbuff.dec_tlu_sideeffect_posted_disable @[lsu_bus_intf.scala 105:18] - bus_buffer.io.tlu_busbuff.dec_tlu_wb_coalescing_disable <= io.tlu_busbuff.dec_tlu_wb_coalescing_disable @[lsu_bus_intf.scala 105:18] - bus_buffer.io.tlu_busbuff.dec_tlu_external_ldfwd_disable <= io.tlu_busbuff.dec_tlu_external_ldfwd_disable @[lsu_bus_intf.scala 105:18] - io.tlu_busbuff.lsu_pmu_bus_busy <= bus_buffer.io.tlu_busbuff.lsu_pmu_bus_busy @[lsu_bus_intf.scala 105:18] - io.tlu_busbuff.lsu_pmu_bus_error <= bus_buffer.io.tlu_busbuff.lsu_pmu_bus_error @[lsu_bus_intf.scala 105:18] - io.tlu_busbuff.lsu_pmu_bus_misaligned <= bus_buffer.io.tlu_busbuff.lsu_pmu_bus_misaligned @[lsu_bus_intf.scala 105:18] - io.tlu_busbuff.lsu_pmu_bus_trxn <= bus_buffer.io.tlu_busbuff.lsu_pmu_bus_trxn @[lsu_bus_intf.scala 105:18] - bus_buffer.io.dec_tlu_force_halt <= io.dec_tlu_force_halt @[lsu_bus_intf.scala 107:51] - bus_buffer.io.lsu_c2_r_clk <= io.lsu_c2_r_clk @[lsu_bus_intf.scala 108:51] - bus_buffer.io.lsu_bus_ibuf_c1_clk <= io.lsu_bus_ibuf_c1_clk @[lsu_bus_intf.scala 109:51] - bus_buffer.io.lsu_bus_obuf_c1_clk <= io.lsu_bus_obuf_c1_clk @[lsu_bus_intf.scala 110:51] - bus_buffer.io.lsu_bus_buf_c1_clk <= io.lsu_bus_buf_c1_clk @[lsu_bus_intf.scala 111:51] - bus_buffer.io.lsu_free_c2_clk <= io.lsu_free_c2_clk @[lsu_bus_intf.scala 112:51] - bus_buffer.io.lsu_busm_clk <= io.lsu_busm_clk @[lsu_bus_intf.scala 113:51] - bus_buffer.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[lsu_bus_intf.scala 114:51] - bus_buffer.io.lsu_pkt_m.bits.store_data_bypass_m <= io.lsu_pkt_m.bits.store_data_bypass_m @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.load_ldst_bypass_d <= io.lsu_pkt_m.bits.load_ldst_bypass_d @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.store_data_bypass_d <= io.lsu_pkt_m.bits.store_data_bypass_d @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.dma <= io.lsu_pkt_m.bits.dma @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.unsign <= io.lsu_pkt_m.bits.unsign @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.store <= io.lsu_pkt_m.bits.store @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.load <= io.lsu_pkt_m.bits.load @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.dword <= io.lsu_pkt_m.bits.dword @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.word <= io.lsu_pkt_m.bits.word @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.half <= io.lsu_pkt_m.bits.half @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.by <= io.lsu_pkt_m.bits.by @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.bits.fast_int <= io.lsu_pkt_m.bits.fast_int @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_m.valid <= io.lsu_pkt_m.valid @[lsu_bus_intf.scala 117:27] - bus_buffer.io.lsu_pkt_r.bits.store_data_bypass_m <= io.lsu_pkt_r.bits.store_data_bypass_m @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.load_ldst_bypass_d <= io.lsu_pkt_r.bits.load_ldst_bypass_d @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.store_data_bypass_d <= io.lsu_pkt_r.bits.store_data_bypass_d @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.dma <= io.lsu_pkt_r.bits.dma @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.unsign <= io.lsu_pkt_r.bits.unsign @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.store <= io.lsu_pkt_r.bits.store @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.load <= io.lsu_pkt_r.bits.load @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.dword <= io.lsu_pkt_r.bits.dword @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.word <= io.lsu_pkt_r.bits.word @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.half <= io.lsu_pkt_r.bits.half @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.by <= io.lsu_pkt_r.bits.by @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.bits.fast_int <= io.lsu_pkt_r.bits.fast_int @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_pkt_r.valid <= io.lsu_pkt_r.valid @[lsu_bus_intf.scala 118:27] - bus_buffer.io.lsu_addr_m <= io.lsu_addr_m @[lsu_bus_intf.scala 121:51] - bus_buffer.io.end_addr_m <= io.end_addr_m @[lsu_bus_intf.scala 122:51] - bus_buffer.io.lsu_addr_r <= io.lsu_addr_r @[lsu_bus_intf.scala 123:51] - bus_buffer.io.end_addr_r <= io.end_addr_r @[lsu_bus_intf.scala 124:51] - bus_buffer.io.store_data_r <= io.store_data_r @[lsu_bus_intf.scala 125:51] - bus_buffer.io.lsu_busreq_m <= io.lsu_busreq_m @[lsu_bus_intf.scala 127:51] - bus_buffer.io.flush_m_up <= io.flush_m_up @[lsu_bus_intf.scala 128:51] - bus_buffer.io.flush_r <= io.flush_r @[lsu_bus_intf.scala 129:51] - bus_buffer.io.lsu_commit_r <= io.lsu_commit_r @[lsu_bus_intf.scala 130:51] - bus_buffer.io.lsu_axi.r.bits.last <= io.axi.r.bits.last @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.r.bits.resp <= io.axi.r.bits.resp @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.r.bits.data <= io.axi.r.bits.data @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.r.bits.id <= io.axi.r.bits.id @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.r.valid <= io.axi.r.valid @[lsu_bus_intf.scala 131:43] - io.axi.r.ready <= bus_buffer.io.lsu_axi.r.ready @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.qos <= bus_buffer.io.lsu_axi.ar.bits.qos @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.prot <= bus_buffer.io.lsu_axi.ar.bits.prot @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.cache <= bus_buffer.io.lsu_axi.ar.bits.cache @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.lock <= bus_buffer.io.lsu_axi.ar.bits.lock @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.burst <= bus_buffer.io.lsu_axi.ar.bits.burst @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.size <= bus_buffer.io.lsu_axi.ar.bits.size @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.len <= bus_buffer.io.lsu_axi.ar.bits.len @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.region <= bus_buffer.io.lsu_axi.ar.bits.region @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.addr <= bus_buffer.io.lsu_axi.ar.bits.addr @[lsu_bus_intf.scala 131:43] - io.axi.ar.bits.id <= bus_buffer.io.lsu_axi.ar.bits.id @[lsu_bus_intf.scala 131:43] - io.axi.ar.valid <= bus_buffer.io.lsu_axi.ar.valid @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.ar.ready <= io.axi.ar.ready @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.b.bits.id <= io.axi.b.bits.id @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.b.bits.resp <= io.axi.b.bits.resp @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.b.valid <= io.axi.b.valid @[lsu_bus_intf.scala 131:43] - io.axi.b.ready <= bus_buffer.io.lsu_axi.b.ready @[lsu_bus_intf.scala 131:43] - io.axi.w.bits.last <= bus_buffer.io.lsu_axi.w.bits.last @[lsu_bus_intf.scala 131:43] - io.axi.w.bits.strb <= bus_buffer.io.lsu_axi.w.bits.strb @[lsu_bus_intf.scala 131:43] - io.axi.w.bits.data <= bus_buffer.io.lsu_axi.w.bits.data @[lsu_bus_intf.scala 131:43] - io.axi.w.valid <= bus_buffer.io.lsu_axi.w.valid @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.w.ready <= io.axi.w.ready @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.qos <= bus_buffer.io.lsu_axi.aw.bits.qos @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.prot <= bus_buffer.io.lsu_axi.aw.bits.prot @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.cache <= bus_buffer.io.lsu_axi.aw.bits.cache @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.lock <= bus_buffer.io.lsu_axi.aw.bits.lock @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.burst <= bus_buffer.io.lsu_axi.aw.bits.burst @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.size <= bus_buffer.io.lsu_axi.aw.bits.size @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.len <= bus_buffer.io.lsu_axi.aw.bits.len @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.region <= bus_buffer.io.lsu_axi.aw.bits.region @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.addr <= bus_buffer.io.lsu_axi.aw.bits.addr @[lsu_bus_intf.scala 131:43] - io.axi.aw.bits.id <= bus_buffer.io.lsu_axi.aw.bits.id @[lsu_bus_intf.scala 131:43] - io.axi.aw.valid <= bus_buffer.io.lsu_axi.aw.valid @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_axi.aw.ready <= io.axi.aw.ready @[lsu_bus_intf.scala 131:43] - bus_buffer.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[lsu_bus_intf.scala 132:51] - io.lsu_busreq_r <= bus_buffer.io.lsu_busreq_r @[lsu_bus_intf.scala 134:38] - io.lsu_bus_buffer_pend_any <= bus_buffer.io.lsu_bus_buffer_pend_any @[lsu_bus_intf.scala 135:38] - io.lsu_bus_buffer_full_any <= bus_buffer.io.lsu_bus_buffer_full_any @[lsu_bus_intf.scala 136:38] - io.lsu_bus_buffer_empty_any <= bus_buffer.io.lsu_bus_buffer_empty_any @[lsu_bus_intf.scala 137:38] - io.lsu_bus_idle_any <= bus_buffer.io.lsu_bus_idle_any @[lsu_bus_intf.scala 138:38] - ld_byte_hit_buf_lo <= bus_buffer.io.ld_byte_hit_buf_lo @[lsu_bus_intf.scala 139:38] - ld_byte_hit_buf_hi <= bus_buffer.io.ld_byte_hit_buf_hi @[lsu_bus_intf.scala 140:38] - ld_fwddata_buf_lo <= bus_buffer.io.ld_fwddata_buf_lo @[lsu_bus_intf.scala 141:38] - ld_fwddata_buf_hi <= bus_buffer.io.ld_fwddata_buf_hi @[lsu_bus_intf.scala 142:38] - io.dctl_busbuff.lsu_nonblock_load_data <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_data @[lsu_bus_intf.scala 143:19] - io.dctl_busbuff.lsu_nonblock_load_data_tag <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_data_tag @[lsu_bus_intf.scala 143:19] - io.dctl_busbuff.lsu_nonblock_load_data_error <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_data_error @[lsu_bus_intf.scala 143:19] - io.dctl_busbuff.lsu_nonblock_load_data_valid <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_data_valid @[lsu_bus_intf.scala 143:19] - io.dctl_busbuff.lsu_nonblock_load_inv_tag_r <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_inv_tag_r @[lsu_bus_intf.scala 143:19] - io.dctl_busbuff.lsu_nonblock_load_inv_r <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_inv_r @[lsu_bus_intf.scala 143:19] - io.dctl_busbuff.lsu_nonblock_load_tag_m <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_tag_m @[lsu_bus_intf.scala 143:19] - io.dctl_busbuff.lsu_nonblock_load_valid_m <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_valid_m @[lsu_bus_intf.scala 143:19] - bus_buffer.io.no_word_merge_r <= no_word_merge_r @[lsu_bus_intf.scala 144:51] - bus_buffer.io.no_dword_merge_r <= no_dword_merge_r @[lsu_bus_intf.scala 145:51] - bus_buffer.io.is_sideeffects_r <= is_sideeffects_r @[lsu_bus_intf.scala 146:51] - bus_buffer.io.ldst_dual_d <= ldst_dual_d @[lsu_bus_intf.scala 147:51] - bus_buffer.io.ldst_dual_m <= ldst_dual_m @[lsu_bus_intf.scala 148:51] - bus_buffer.io.ldst_dual_r <= ldst_dual_r @[lsu_bus_intf.scala 149:51] - bus_buffer.io.ldst_byteen_ext_m <= ldst_byteen_ext_m @[lsu_bus_intf.scala 150:51] - bus_buffer.io.ld_full_hit_m <= ld_full_hit_m @[lsu_bus_intf.scala 151:51] - bus_buffer.io.lsu_bus_clk_en_q <= lsu_bus_clk_en_q @[lsu_bus_intf.scala 152:51] - node _T = bits(io.lsu_pkt_m.bits.word, 0, 0) @[lsu_bus_intf.scala 154:63] - node _T_1 = bits(io.lsu_pkt_m.bits.half, 0, 0) @[lsu_bus_intf.scala 154:107] - node _T_2 = bits(io.lsu_pkt_m.bits.by, 0, 0) @[lsu_bus_intf.scala 154:148] + bus_buffer.io.scan_mode <= io.scan_mode @[lsu_bus_intf.scala 103:29] + io.tlu_busbuff.lsu_imprecise_error_addr_any <= bus_buffer.io.tlu_busbuff.lsu_imprecise_error_addr_any @[lsu_bus_intf.scala 104:18] + io.tlu_busbuff.lsu_imprecise_error_store_any <= bus_buffer.io.tlu_busbuff.lsu_imprecise_error_store_any @[lsu_bus_intf.scala 104:18] + io.tlu_busbuff.lsu_imprecise_error_load_any <= bus_buffer.io.tlu_busbuff.lsu_imprecise_error_load_any @[lsu_bus_intf.scala 104:18] + bus_buffer.io.tlu_busbuff.dec_tlu_sideeffect_posted_disable <= io.tlu_busbuff.dec_tlu_sideeffect_posted_disable @[lsu_bus_intf.scala 104:18] + bus_buffer.io.tlu_busbuff.dec_tlu_wb_coalescing_disable <= io.tlu_busbuff.dec_tlu_wb_coalescing_disable @[lsu_bus_intf.scala 104:18] + bus_buffer.io.tlu_busbuff.dec_tlu_external_ldfwd_disable <= io.tlu_busbuff.dec_tlu_external_ldfwd_disable @[lsu_bus_intf.scala 104:18] + io.tlu_busbuff.lsu_pmu_bus_busy <= bus_buffer.io.tlu_busbuff.lsu_pmu_bus_busy @[lsu_bus_intf.scala 104:18] + io.tlu_busbuff.lsu_pmu_bus_error <= bus_buffer.io.tlu_busbuff.lsu_pmu_bus_error @[lsu_bus_intf.scala 104:18] + io.tlu_busbuff.lsu_pmu_bus_misaligned <= bus_buffer.io.tlu_busbuff.lsu_pmu_bus_misaligned @[lsu_bus_intf.scala 104:18] + io.tlu_busbuff.lsu_pmu_bus_trxn <= bus_buffer.io.tlu_busbuff.lsu_pmu_bus_trxn @[lsu_bus_intf.scala 104:18] + bus_buffer.io.dec_tlu_force_halt <= io.dec_tlu_force_halt @[lsu_bus_intf.scala 106:51] + bus_buffer.io.lsu_c2_r_clk <= io.lsu_c2_r_clk @[lsu_bus_intf.scala 107:51] + bus_buffer.io.lsu_bus_ibuf_c1_clk <= io.lsu_bus_ibuf_c1_clk @[lsu_bus_intf.scala 108:51] + bus_buffer.io.lsu_bus_obuf_c1_clk <= io.lsu_bus_obuf_c1_clk @[lsu_bus_intf.scala 109:51] + bus_buffer.io.lsu_bus_buf_c1_clk <= io.lsu_bus_buf_c1_clk @[lsu_bus_intf.scala 110:51] + bus_buffer.io.lsu_free_c2_clk <= io.lsu_free_c2_clk @[lsu_bus_intf.scala 111:51] + bus_buffer.io.lsu_busm_clk <= io.lsu_busm_clk @[lsu_bus_intf.scala 112:51] + bus_buffer.io.dec_lsu_valid_raw_d <= io.dec_lsu_valid_raw_d @[lsu_bus_intf.scala 113:51] + bus_buffer.io.lsu_pkt_m.bits.store_data_bypass_m <= io.lsu_pkt_m.bits.store_data_bypass_m @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.load_ldst_bypass_d <= io.lsu_pkt_m.bits.load_ldst_bypass_d @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.store_data_bypass_d <= io.lsu_pkt_m.bits.store_data_bypass_d @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.dma <= io.lsu_pkt_m.bits.dma @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.unsign <= io.lsu_pkt_m.bits.unsign @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.store <= io.lsu_pkt_m.bits.store @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.load <= io.lsu_pkt_m.bits.load @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.dword <= io.lsu_pkt_m.bits.dword @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.word <= io.lsu_pkt_m.bits.word @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.half <= io.lsu_pkt_m.bits.half @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.by <= io.lsu_pkt_m.bits.by @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.bits.fast_int <= io.lsu_pkt_m.bits.fast_int @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_m.valid <= io.lsu_pkt_m.valid @[lsu_bus_intf.scala 116:27] + bus_buffer.io.lsu_pkt_r.bits.store_data_bypass_m <= io.lsu_pkt_r.bits.store_data_bypass_m @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.load_ldst_bypass_d <= io.lsu_pkt_r.bits.load_ldst_bypass_d @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.store_data_bypass_d <= io.lsu_pkt_r.bits.store_data_bypass_d @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.dma <= io.lsu_pkt_r.bits.dma @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.unsign <= io.lsu_pkt_r.bits.unsign @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.store <= io.lsu_pkt_r.bits.store @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.load <= io.lsu_pkt_r.bits.load @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.dword <= io.lsu_pkt_r.bits.dword @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.word <= io.lsu_pkt_r.bits.word @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.half <= io.lsu_pkt_r.bits.half @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.by <= io.lsu_pkt_r.bits.by @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.bits.fast_int <= io.lsu_pkt_r.bits.fast_int @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_pkt_r.valid <= io.lsu_pkt_r.valid @[lsu_bus_intf.scala 117:27] + bus_buffer.io.lsu_addr_m <= io.lsu_addr_m @[lsu_bus_intf.scala 120:51] + bus_buffer.io.end_addr_m <= io.end_addr_m @[lsu_bus_intf.scala 121:51] + bus_buffer.io.lsu_addr_r <= io.lsu_addr_r @[lsu_bus_intf.scala 122:51] + bus_buffer.io.end_addr_r <= io.end_addr_r @[lsu_bus_intf.scala 123:51] + bus_buffer.io.store_data_r <= io.store_data_r @[lsu_bus_intf.scala 124:51] + bus_buffer.io.lsu_busreq_m <= io.lsu_busreq_m @[lsu_bus_intf.scala 126:51] + bus_buffer.io.flush_m_up <= io.flush_m_up @[lsu_bus_intf.scala 127:51] + bus_buffer.io.flush_r <= io.flush_r @[lsu_bus_intf.scala 128:51] + bus_buffer.io.lsu_commit_r <= io.lsu_commit_r @[lsu_bus_intf.scala 129:51] + bus_buffer.io.lsu_axi.r.bits.last <= io.axi.r.bits.last @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.r.bits.resp <= io.axi.r.bits.resp @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.r.bits.data <= io.axi.r.bits.data @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.r.bits.id <= io.axi.r.bits.id @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.r.valid <= io.axi.r.valid @[lsu_bus_intf.scala 130:43] + io.axi.r.ready <= bus_buffer.io.lsu_axi.r.ready @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.qos <= bus_buffer.io.lsu_axi.ar.bits.qos @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.prot <= bus_buffer.io.lsu_axi.ar.bits.prot @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.cache <= bus_buffer.io.lsu_axi.ar.bits.cache @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.lock <= bus_buffer.io.lsu_axi.ar.bits.lock @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.burst <= bus_buffer.io.lsu_axi.ar.bits.burst @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.size <= bus_buffer.io.lsu_axi.ar.bits.size @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.len <= bus_buffer.io.lsu_axi.ar.bits.len @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.region <= bus_buffer.io.lsu_axi.ar.bits.region @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.addr <= bus_buffer.io.lsu_axi.ar.bits.addr @[lsu_bus_intf.scala 130:43] + io.axi.ar.bits.id <= bus_buffer.io.lsu_axi.ar.bits.id @[lsu_bus_intf.scala 130:43] + io.axi.ar.valid <= bus_buffer.io.lsu_axi.ar.valid @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.ar.ready <= io.axi.ar.ready @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.b.bits.id <= io.axi.b.bits.id @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.b.bits.resp <= io.axi.b.bits.resp @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.b.valid <= io.axi.b.valid @[lsu_bus_intf.scala 130:43] + io.axi.b.ready <= bus_buffer.io.lsu_axi.b.ready @[lsu_bus_intf.scala 130:43] + io.axi.w.bits.last <= bus_buffer.io.lsu_axi.w.bits.last @[lsu_bus_intf.scala 130:43] + io.axi.w.bits.strb <= bus_buffer.io.lsu_axi.w.bits.strb @[lsu_bus_intf.scala 130:43] + io.axi.w.bits.data <= bus_buffer.io.lsu_axi.w.bits.data @[lsu_bus_intf.scala 130:43] + io.axi.w.valid <= bus_buffer.io.lsu_axi.w.valid @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.w.ready <= io.axi.w.ready @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.qos <= bus_buffer.io.lsu_axi.aw.bits.qos @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.prot <= bus_buffer.io.lsu_axi.aw.bits.prot @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.cache <= bus_buffer.io.lsu_axi.aw.bits.cache @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.lock <= bus_buffer.io.lsu_axi.aw.bits.lock @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.burst <= bus_buffer.io.lsu_axi.aw.bits.burst @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.size <= bus_buffer.io.lsu_axi.aw.bits.size @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.len <= bus_buffer.io.lsu_axi.aw.bits.len @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.region <= bus_buffer.io.lsu_axi.aw.bits.region @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.addr <= bus_buffer.io.lsu_axi.aw.bits.addr @[lsu_bus_intf.scala 130:43] + io.axi.aw.bits.id <= bus_buffer.io.lsu_axi.aw.bits.id @[lsu_bus_intf.scala 130:43] + io.axi.aw.valid <= bus_buffer.io.lsu_axi.aw.valid @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_axi.aw.ready <= io.axi.aw.ready @[lsu_bus_intf.scala 130:43] + bus_buffer.io.lsu_bus_clk_en <= io.lsu_bus_clk_en @[lsu_bus_intf.scala 131:51] + io.lsu_busreq_r <= bus_buffer.io.lsu_busreq_r @[lsu_bus_intf.scala 133:38] + io.lsu_bus_buffer_pend_any <= bus_buffer.io.lsu_bus_buffer_pend_any @[lsu_bus_intf.scala 134:38] + io.lsu_bus_buffer_full_any <= bus_buffer.io.lsu_bus_buffer_full_any @[lsu_bus_intf.scala 135:38] + io.lsu_bus_buffer_empty_any <= bus_buffer.io.lsu_bus_buffer_empty_any @[lsu_bus_intf.scala 136:38] + io.lsu_bus_idle_any <= bus_buffer.io.lsu_bus_idle_any @[lsu_bus_intf.scala 137:38] + ld_byte_hit_buf_lo <= bus_buffer.io.ld_byte_hit_buf_lo @[lsu_bus_intf.scala 138:38] + ld_byte_hit_buf_hi <= bus_buffer.io.ld_byte_hit_buf_hi @[lsu_bus_intf.scala 139:38] + ld_fwddata_buf_lo <= bus_buffer.io.ld_fwddata_buf_lo @[lsu_bus_intf.scala 140:38] + ld_fwddata_buf_hi <= bus_buffer.io.ld_fwddata_buf_hi @[lsu_bus_intf.scala 141:38] + io.dctl_busbuff.lsu_nonblock_load_data <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_data @[lsu_bus_intf.scala 142:19] + io.dctl_busbuff.lsu_nonblock_load_data_tag <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_data_tag @[lsu_bus_intf.scala 142:19] + io.dctl_busbuff.lsu_nonblock_load_data_error <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_data_error @[lsu_bus_intf.scala 142:19] + io.dctl_busbuff.lsu_nonblock_load_data_valid <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_data_valid @[lsu_bus_intf.scala 142:19] + io.dctl_busbuff.lsu_nonblock_load_inv_tag_r <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_inv_tag_r @[lsu_bus_intf.scala 142:19] + io.dctl_busbuff.lsu_nonblock_load_inv_r <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_inv_r @[lsu_bus_intf.scala 142:19] + io.dctl_busbuff.lsu_nonblock_load_tag_m <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_tag_m @[lsu_bus_intf.scala 142:19] + io.dctl_busbuff.lsu_nonblock_load_valid_m <= bus_buffer.io.dctl_busbuff.lsu_nonblock_load_valid_m @[lsu_bus_intf.scala 142:19] + bus_buffer.io.no_word_merge_r <= no_word_merge_r @[lsu_bus_intf.scala 143:51] + bus_buffer.io.no_dword_merge_r <= no_dword_merge_r @[lsu_bus_intf.scala 144:51] + bus_buffer.io.is_sideeffects_r <= is_sideeffects_r @[lsu_bus_intf.scala 145:51] + bus_buffer.io.ldst_dual_d <= ldst_dual_d @[lsu_bus_intf.scala 146:51] + bus_buffer.io.ldst_dual_m <= ldst_dual_m @[lsu_bus_intf.scala 147:51] + bus_buffer.io.ldst_dual_r <= ldst_dual_r @[lsu_bus_intf.scala 148:51] + bus_buffer.io.ldst_byteen_ext_m <= ldst_byteen_ext_m @[lsu_bus_intf.scala 149:51] + bus_buffer.io.ld_full_hit_m <= ld_full_hit_m @[lsu_bus_intf.scala 150:51] + bus_buffer.io.lsu_bus_clk_en_q <= lsu_bus_clk_en_q @[lsu_bus_intf.scala 151:51] + node _T = bits(io.lsu_pkt_m.bits.word, 0, 0) @[lsu_bus_intf.scala 153:63] + node _T_1 = bits(io.lsu_pkt_m.bits.half, 0, 0) @[lsu_bus_intf.scala 153:107] + node _T_2 = bits(io.lsu_pkt_m.bits.by, 0, 0) @[lsu_bus_intf.scala 153:148] node _T_3 = mux(_T, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72] node _T_4 = mux(_T_1, UInt<4>("h03"), UInt<1>("h00")) @[Mux.scala 27:72] node _T_5 = mux(_T_2, UInt<4>("h01"), UInt<1>("h00")) @[Mux.scala 27:72] @@ -101363,279 +101363,279 @@ circuit quasar_wrapper : node _T_7 = or(_T_6, _T_5) @[Mux.scala 27:72] wire _T_8 : UInt<4> @[Mux.scala 27:72] _T_8 <= _T_7 @[Mux.scala 27:72] - ldst_byteen_m <= _T_8 @[lsu_bus_intf.scala 154:27] - node _T_9 = bits(io.lsu_addr_d, 2, 2) @[lsu_bus_intf.scala 155:43] - node _T_10 = bits(io.end_addr_d, 2, 2) @[lsu_bus_intf.scala 155:64] - node _T_11 = neq(_T_9, _T_10) @[lsu_bus_intf.scala 155:47] - ldst_dual_d <= _T_11 @[lsu_bus_intf.scala 155:27] - node _T_12 = bits(io.lsu_addr_r, 31, 3) @[lsu_bus_intf.scala 156:44] - node _T_13 = bits(io.lsu_addr_m, 31, 3) @[lsu_bus_intf.scala 156:68] - node _T_14 = eq(_T_12, _T_13) @[lsu_bus_intf.scala 156:51] - addr_match_dw_lo_r_m <= _T_14 @[lsu_bus_intf.scala 156:27] - node _T_15 = bits(io.lsu_addr_r, 2, 2) @[lsu_bus_intf.scala 157:68] - node _T_16 = bits(io.lsu_addr_m, 2, 2) @[lsu_bus_intf.scala 157:85] - node _T_17 = xor(_T_15, _T_16) @[lsu_bus_intf.scala 157:71] - node _T_18 = eq(_T_17, UInt<1>("h00")) @[lsu_bus_intf.scala 157:53] - node _T_19 = and(addr_match_dw_lo_r_m, _T_18) @[lsu_bus_intf.scala 157:51] - addr_match_word_lo_r_m <= _T_19 @[lsu_bus_intf.scala 157:27] - node _T_20 = eq(ldst_dual_r, UInt<1>("h00")) @[lsu_bus_intf.scala 158:48] - node _T_21 = and(io.lsu_busreq_r, _T_20) @[lsu_bus_intf.scala 158:46] - node _T_22 = and(_T_21, io.lsu_busreq_m) @[lsu_bus_intf.scala 158:61] - node _T_23 = eq(addr_match_word_lo_r_m, UInt<1>("h00")) @[lsu_bus_intf.scala 158:107] - node _T_24 = or(io.lsu_pkt_m.bits.load, _T_23) @[lsu_bus_intf.scala 158:105] - node _T_25 = and(_T_22, _T_24) @[lsu_bus_intf.scala 158:79] - no_word_merge_r <= _T_25 @[lsu_bus_intf.scala 158:27] - node _T_26 = eq(ldst_dual_r, UInt<1>("h00")) @[lsu_bus_intf.scala 159:48] - node _T_27 = and(io.lsu_busreq_r, _T_26) @[lsu_bus_intf.scala 159:46] - node _T_28 = and(_T_27, io.lsu_busreq_m) @[lsu_bus_intf.scala 159:61] - node _T_29 = eq(addr_match_dw_lo_r_m, UInt<1>("h00")) @[lsu_bus_intf.scala 159:107] - node _T_30 = or(io.lsu_pkt_m.bits.load, _T_29) @[lsu_bus_intf.scala 159:105] - node _T_31 = and(_T_28, _T_30) @[lsu_bus_intf.scala 159:79] - no_dword_merge_r <= _T_31 @[lsu_bus_intf.scala 159:27] - node _T_32 = bits(ldst_byteen_m, 3, 0) @[lsu_bus_intf.scala 161:43] - node _T_33 = bits(io.lsu_addr_m, 1, 0) @[lsu_bus_intf.scala 161:65] - node _T_34 = dshl(_T_32, _T_33) @[lsu_bus_intf.scala 161:49] - ldst_byteen_ext_m <= _T_34 @[lsu_bus_intf.scala 161:27] - node _T_35 = bits(ldst_byteen_r, 3, 0) @[lsu_bus_intf.scala 162:43] - node _T_36 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_intf.scala 162:65] - node _T_37 = dshl(_T_35, _T_36) @[lsu_bus_intf.scala 162:49] - ldst_byteen_ext_r <= _T_37 @[lsu_bus_intf.scala 162:27] - node _T_38 = bits(io.store_data_r, 31, 0) @[lsu_bus_intf.scala 163:45] - node _T_39 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_intf.scala 163:72] + ldst_byteen_m <= _T_8 @[lsu_bus_intf.scala 153:27] + node _T_9 = bits(io.lsu_addr_d, 2, 2) @[lsu_bus_intf.scala 154:43] + node _T_10 = bits(io.end_addr_d, 2, 2) @[lsu_bus_intf.scala 154:64] + node _T_11 = neq(_T_9, _T_10) @[lsu_bus_intf.scala 154:47] + ldst_dual_d <= _T_11 @[lsu_bus_intf.scala 154:27] + node _T_12 = bits(io.lsu_addr_r, 31, 3) @[lsu_bus_intf.scala 155:44] + node _T_13 = bits(io.lsu_addr_m, 31, 3) @[lsu_bus_intf.scala 155:68] + node _T_14 = eq(_T_12, _T_13) @[lsu_bus_intf.scala 155:51] + addr_match_dw_lo_r_m <= _T_14 @[lsu_bus_intf.scala 155:27] + node _T_15 = bits(io.lsu_addr_r, 2, 2) @[lsu_bus_intf.scala 156:68] + node _T_16 = bits(io.lsu_addr_m, 2, 2) @[lsu_bus_intf.scala 156:85] + node _T_17 = xor(_T_15, _T_16) @[lsu_bus_intf.scala 156:71] + node _T_18 = eq(_T_17, UInt<1>("h00")) @[lsu_bus_intf.scala 156:53] + node _T_19 = and(addr_match_dw_lo_r_m, _T_18) @[lsu_bus_intf.scala 156:51] + addr_match_word_lo_r_m <= _T_19 @[lsu_bus_intf.scala 156:27] + node _T_20 = eq(ldst_dual_r, UInt<1>("h00")) @[lsu_bus_intf.scala 157:48] + node _T_21 = and(io.lsu_busreq_r, _T_20) @[lsu_bus_intf.scala 157:46] + node _T_22 = and(_T_21, io.lsu_busreq_m) @[lsu_bus_intf.scala 157:61] + node _T_23 = eq(addr_match_word_lo_r_m, UInt<1>("h00")) @[lsu_bus_intf.scala 157:107] + node _T_24 = or(io.lsu_pkt_m.bits.load, _T_23) @[lsu_bus_intf.scala 157:105] + node _T_25 = and(_T_22, _T_24) @[lsu_bus_intf.scala 157:79] + no_word_merge_r <= _T_25 @[lsu_bus_intf.scala 157:27] + node _T_26 = eq(ldst_dual_r, UInt<1>("h00")) @[lsu_bus_intf.scala 158:48] + node _T_27 = and(io.lsu_busreq_r, _T_26) @[lsu_bus_intf.scala 158:46] + node _T_28 = and(_T_27, io.lsu_busreq_m) @[lsu_bus_intf.scala 158:61] + node _T_29 = eq(addr_match_dw_lo_r_m, UInt<1>("h00")) @[lsu_bus_intf.scala 158:107] + node _T_30 = or(io.lsu_pkt_m.bits.load, _T_29) @[lsu_bus_intf.scala 158:105] + node _T_31 = and(_T_28, _T_30) @[lsu_bus_intf.scala 158:79] + no_dword_merge_r <= _T_31 @[lsu_bus_intf.scala 158:27] + node _T_32 = bits(ldst_byteen_m, 3, 0) @[lsu_bus_intf.scala 160:43] + node _T_33 = bits(io.lsu_addr_m, 1, 0) @[lsu_bus_intf.scala 160:65] + node _T_34 = dshl(_T_32, _T_33) @[lsu_bus_intf.scala 160:49] + ldst_byteen_ext_m <= _T_34 @[lsu_bus_intf.scala 160:27] + node _T_35 = bits(ldst_byteen_r, 3, 0) @[lsu_bus_intf.scala 161:43] + node _T_36 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_intf.scala 161:65] + node _T_37 = dshl(_T_35, _T_36) @[lsu_bus_intf.scala 161:49] + ldst_byteen_ext_r <= _T_37 @[lsu_bus_intf.scala 161:27] + node _T_38 = bits(io.store_data_r, 31, 0) @[lsu_bus_intf.scala 162:45] + node _T_39 = bits(io.lsu_addr_r, 1, 0) @[lsu_bus_intf.scala 162:72] node _T_40 = cat(_T_39, UInt<3>("h00")) @[Cat.scala 29:58] - node _T_41 = dshl(_T_38, _T_40) @[lsu_bus_intf.scala 163:52] - store_data_ext_r <= _T_41 @[lsu_bus_intf.scala 163:27] - node _T_42 = bits(ldst_byteen_ext_m, 7, 4) @[lsu_bus_intf.scala 164:47] - ldst_byteen_hi_m <= _T_42 @[lsu_bus_intf.scala 164:27] - node _T_43 = bits(ldst_byteen_ext_m, 3, 0) @[lsu_bus_intf.scala 165:47] - ldst_byteen_lo_m <= _T_43 @[lsu_bus_intf.scala 165:27] - node _T_44 = bits(ldst_byteen_ext_r, 7, 4) @[lsu_bus_intf.scala 166:47] - ldst_byteen_hi_r <= _T_44 @[lsu_bus_intf.scala 166:27] - node _T_45 = bits(ldst_byteen_ext_r, 3, 0) @[lsu_bus_intf.scala 167:47] - ldst_byteen_lo_r <= _T_45 @[lsu_bus_intf.scala 167:27] - node _T_46 = bits(store_data_ext_r, 63, 32) @[lsu_bus_intf.scala 169:46] - store_data_hi_r <= _T_46 @[lsu_bus_intf.scala 169:27] - node _T_47 = bits(store_data_ext_r, 31, 0) @[lsu_bus_intf.scala 170:46] - store_data_lo_r <= _T_47 @[lsu_bus_intf.scala 170:27] - node _T_48 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_intf.scala 171:44] - node _T_49 = bits(io.lsu_addr_r, 31, 2) @[lsu_bus_intf.scala 171:68] - node _T_50 = eq(_T_48, _T_49) @[lsu_bus_intf.scala 171:51] - node _T_51 = and(_T_50, io.lsu_pkt_r.valid) @[lsu_bus_intf.scala 171:76] - node _T_52 = and(_T_51, io.lsu_pkt_r.bits.store) @[lsu_bus_intf.scala 171:97] - node _T_53 = and(_T_52, io.lsu_busreq_m) @[lsu_bus_intf.scala 171:123] - ld_addr_rhit_lo_lo <= _T_53 @[lsu_bus_intf.scala 171:27] - node _T_54 = bits(io.end_addr_m, 31, 2) @[lsu_bus_intf.scala 172:44] - node _T_55 = bits(io.lsu_addr_r, 31, 2) @[lsu_bus_intf.scala 172:68] - node _T_56 = eq(_T_54, _T_55) @[lsu_bus_intf.scala 172:51] - node _T_57 = and(_T_56, io.lsu_pkt_r.valid) @[lsu_bus_intf.scala 172:76] - node _T_58 = and(_T_57, io.lsu_pkt_r.bits.store) @[lsu_bus_intf.scala 172:97] - node _T_59 = and(_T_58, io.lsu_busreq_m) @[lsu_bus_intf.scala 172:123] - ld_addr_rhit_lo_hi <= _T_59 @[lsu_bus_intf.scala 172:27] - node _T_60 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_intf.scala 173:44] - node _T_61 = bits(io.end_addr_r, 31, 2) @[lsu_bus_intf.scala 173:68] - node _T_62 = eq(_T_60, _T_61) @[lsu_bus_intf.scala 173:51] - node _T_63 = and(_T_62, io.lsu_pkt_r.valid) @[lsu_bus_intf.scala 173:76] - node _T_64 = and(_T_63, io.lsu_pkt_r.bits.store) @[lsu_bus_intf.scala 173:97] - node _T_65 = and(_T_64, io.lsu_busreq_m) @[lsu_bus_intf.scala 173:123] - ld_addr_rhit_hi_lo <= _T_65 @[lsu_bus_intf.scala 173:27] - node _T_66 = bits(io.end_addr_m, 31, 2) @[lsu_bus_intf.scala 174:44] - node _T_67 = bits(io.end_addr_r, 31, 2) @[lsu_bus_intf.scala 174:68] - node _T_68 = eq(_T_66, _T_67) @[lsu_bus_intf.scala 174:51] - node _T_69 = and(_T_68, io.lsu_pkt_r.valid) @[lsu_bus_intf.scala 174:76] - node _T_70 = and(_T_69, io.lsu_pkt_r.bits.store) @[lsu_bus_intf.scala 174:97] - node _T_71 = and(_T_70, io.lsu_busreq_m) @[lsu_bus_intf.scala 174:123] - ld_addr_rhit_hi_hi <= _T_71 @[lsu_bus_intf.scala 174:27] - node _T_72 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_intf.scala 176:88] - node _T_73 = and(ld_addr_rhit_lo_lo, _T_72) @[lsu_bus_intf.scala 176:70] - node _T_74 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_intf.scala 176:110] - node _T_75 = and(_T_73, _T_74) @[lsu_bus_intf.scala 176:92] - node _T_76 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_intf.scala 176:88] - node _T_77 = and(ld_addr_rhit_lo_lo, _T_76) @[lsu_bus_intf.scala 176:70] - node _T_78 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_intf.scala 176:110] - node _T_79 = and(_T_77, _T_78) @[lsu_bus_intf.scala 176:92] - node _T_80 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_intf.scala 176:88] - node _T_81 = and(ld_addr_rhit_lo_lo, _T_80) @[lsu_bus_intf.scala 176:70] - node _T_82 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_intf.scala 176:110] - node _T_83 = and(_T_81, _T_82) @[lsu_bus_intf.scala 176:92] - node _T_84 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_intf.scala 176:88] - node _T_85 = and(ld_addr_rhit_lo_lo, _T_84) @[lsu_bus_intf.scala 176:70] - node _T_86 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_intf.scala 176:110] - node _T_87 = and(_T_85, _T_86) @[lsu_bus_intf.scala 176:92] + node _T_41 = dshl(_T_38, _T_40) @[lsu_bus_intf.scala 162:52] + store_data_ext_r <= _T_41 @[lsu_bus_intf.scala 162:27] + node _T_42 = bits(ldst_byteen_ext_m, 7, 4) @[lsu_bus_intf.scala 163:47] + ldst_byteen_hi_m <= _T_42 @[lsu_bus_intf.scala 163:27] + node _T_43 = bits(ldst_byteen_ext_m, 3, 0) @[lsu_bus_intf.scala 164:47] + ldst_byteen_lo_m <= _T_43 @[lsu_bus_intf.scala 164:27] + node _T_44 = bits(ldst_byteen_ext_r, 7, 4) @[lsu_bus_intf.scala 165:47] + ldst_byteen_hi_r <= _T_44 @[lsu_bus_intf.scala 165:27] + node _T_45 = bits(ldst_byteen_ext_r, 3, 0) @[lsu_bus_intf.scala 166:47] + ldst_byteen_lo_r <= _T_45 @[lsu_bus_intf.scala 166:27] + node _T_46 = bits(store_data_ext_r, 63, 32) @[lsu_bus_intf.scala 168:46] + store_data_hi_r <= _T_46 @[lsu_bus_intf.scala 168:27] + node _T_47 = bits(store_data_ext_r, 31, 0) @[lsu_bus_intf.scala 169:46] + store_data_lo_r <= _T_47 @[lsu_bus_intf.scala 169:27] + node _T_48 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_intf.scala 170:44] + node _T_49 = bits(io.lsu_addr_r, 31, 2) @[lsu_bus_intf.scala 170:68] + node _T_50 = eq(_T_48, _T_49) @[lsu_bus_intf.scala 170:51] + node _T_51 = and(_T_50, io.lsu_pkt_r.valid) @[lsu_bus_intf.scala 170:76] + node _T_52 = and(_T_51, io.lsu_pkt_r.bits.store) @[lsu_bus_intf.scala 170:97] + node _T_53 = and(_T_52, io.lsu_busreq_m) @[lsu_bus_intf.scala 170:123] + ld_addr_rhit_lo_lo <= _T_53 @[lsu_bus_intf.scala 170:27] + node _T_54 = bits(io.end_addr_m, 31, 2) @[lsu_bus_intf.scala 171:44] + node _T_55 = bits(io.lsu_addr_r, 31, 2) @[lsu_bus_intf.scala 171:68] + node _T_56 = eq(_T_54, _T_55) @[lsu_bus_intf.scala 171:51] + node _T_57 = and(_T_56, io.lsu_pkt_r.valid) @[lsu_bus_intf.scala 171:76] + node _T_58 = and(_T_57, io.lsu_pkt_r.bits.store) @[lsu_bus_intf.scala 171:97] + node _T_59 = and(_T_58, io.lsu_busreq_m) @[lsu_bus_intf.scala 171:123] + ld_addr_rhit_lo_hi <= _T_59 @[lsu_bus_intf.scala 171:27] + node _T_60 = bits(io.lsu_addr_m, 31, 2) @[lsu_bus_intf.scala 172:44] + node _T_61 = bits(io.end_addr_r, 31, 2) @[lsu_bus_intf.scala 172:68] + node _T_62 = eq(_T_60, _T_61) @[lsu_bus_intf.scala 172:51] + node _T_63 = and(_T_62, io.lsu_pkt_r.valid) @[lsu_bus_intf.scala 172:76] + node _T_64 = and(_T_63, io.lsu_pkt_r.bits.store) @[lsu_bus_intf.scala 172:97] + node _T_65 = and(_T_64, io.lsu_busreq_m) @[lsu_bus_intf.scala 172:123] + ld_addr_rhit_hi_lo <= _T_65 @[lsu_bus_intf.scala 172:27] + node _T_66 = bits(io.end_addr_m, 31, 2) @[lsu_bus_intf.scala 173:44] + node _T_67 = bits(io.end_addr_r, 31, 2) @[lsu_bus_intf.scala 173:68] + node _T_68 = eq(_T_66, _T_67) @[lsu_bus_intf.scala 173:51] + node _T_69 = and(_T_68, io.lsu_pkt_r.valid) @[lsu_bus_intf.scala 173:76] + node _T_70 = and(_T_69, io.lsu_pkt_r.bits.store) @[lsu_bus_intf.scala 173:97] + node _T_71 = and(_T_70, io.lsu_busreq_m) @[lsu_bus_intf.scala 173:123] + ld_addr_rhit_hi_hi <= _T_71 @[lsu_bus_intf.scala 173:27] + node _T_72 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_intf.scala 175:88] + node _T_73 = and(ld_addr_rhit_lo_lo, _T_72) @[lsu_bus_intf.scala 175:70] + node _T_74 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_intf.scala 175:110] + node _T_75 = and(_T_73, _T_74) @[lsu_bus_intf.scala 175:92] + node _T_76 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_intf.scala 175:88] + node _T_77 = and(ld_addr_rhit_lo_lo, _T_76) @[lsu_bus_intf.scala 175:70] + node _T_78 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_intf.scala 175:110] + node _T_79 = and(_T_77, _T_78) @[lsu_bus_intf.scala 175:92] + node _T_80 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_intf.scala 175:88] + node _T_81 = and(ld_addr_rhit_lo_lo, _T_80) @[lsu_bus_intf.scala 175:70] + node _T_82 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_intf.scala 175:110] + node _T_83 = and(_T_81, _T_82) @[lsu_bus_intf.scala 175:92] + node _T_84 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_intf.scala 175:88] + node _T_85 = and(ld_addr_rhit_lo_lo, _T_84) @[lsu_bus_intf.scala 175:70] + node _T_86 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_intf.scala 175:110] + node _T_87 = and(_T_85, _T_86) @[lsu_bus_intf.scala 175:92] node _T_88 = cat(_T_87, _T_83) @[Cat.scala 29:58] node _T_89 = cat(_T_88, _T_79) @[Cat.scala 29:58] node _T_90 = cat(_T_89, _T_75) @[Cat.scala 29:58] - ld_byte_rhit_lo_lo <= _T_90 @[lsu_bus_intf.scala 176:27] - node _T_91 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_intf.scala 177:88] - node _T_92 = and(ld_addr_rhit_lo_hi, _T_91) @[lsu_bus_intf.scala 177:70] - node _T_93 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_intf.scala 177:110] - node _T_94 = and(_T_92, _T_93) @[lsu_bus_intf.scala 177:92] - node _T_95 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_intf.scala 177:88] - node _T_96 = and(ld_addr_rhit_lo_hi, _T_95) @[lsu_bus_intf.scala 177:70] - node _T_97 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_intf.scala 177:110] - node _T_98 = and(_T_96, _T_97) @[lsu_bus_intf.scala 177:92] - node _T_99 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_intf.scala 177:88] - node _T_100 = and(ld_addr_rhit_lo_hi, _T_99) @[lsu_bus_intf.scala 177:70] - node _T_101 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_intf.scala 177:110] - node _T_102 = and(_T_100, _T_101) @[lsu_bus_intf.scala 177:92] - node _T_103 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_intf.scala 177:88] - node _T_104 = and(ld_addr_rhit_lo_hi, _T_103) @[lsu_bus_intf.scala 177:70] - node _T_105 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_intf.scala 177:110] - node _T_106 = and(_T_104, _T_105) @[lsu_bus_intf.scala 177:92] + ld_byte_rhit_lo_lo <= _T_90 @[lsu_bus_intf.scala 175:27] + node _T_91 = bits(ldst_byteen_lo_r, 0, 0) @[lsu_bus_intf.scala 176:88] + node _T_92 = and(ld_addr_rhit_lo_hi, _T_91) @[lsu_bus_intf.scala 176:70] + node _T_93 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_intf.scala 176:110] + node _T_94 = and(_T_92, _T_93) @[lsu_bus_intf.scala 176:92] + node _T_95 = bits(ldst_byteen_lo_r, 1, 1) @[lsu_bus_intf.scala 176:88] + node _T_96 = and(ld_addr_rhit_lo_hi, _T_95) @[lsu_bus_intf.scala 176:70] + node _T_97 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_intf.scala 176:110] + node _T_98 = and(_T_96, _T_97) @[lsu_bus_intf.scala 176:92] + node _T_99 = bits(ldst_byteen_lo_r, 2, 2) @[lsu_bus_intf.scala 176:88] + node _T_100 = and(ld_addr_rhit_lo_hi, _T_99) @[lsu_bus_intf.scala 176:70] + node _T_101 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_intf.scala 176:110] + node _T_102 = and(_T_100, _T_101) @[lsu_bus_intf.scala 176:92] + node _T_103 = bits(ldst_byteen_lo_r, 3, 3) @[lsu_bus_intf.scala 176:88] + node _T_104 = and(ld_addr_rhit_lo_hi, _T_103) @[lsu_bus_intf.scala 176:70] + node _T_105 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_intf.scala 176:110] + node _T_106 = and(_T_104, _T_105) @[lsu_bus_intf.scala 176:92] node _T_107 = cat(_T_106, _T_102) @[Cat.scala 29:58] node _T_108 = cat(_T_107, _T_98) @[Cat.scala 29:58] node _T_109 = cat(_T_108, _T_94) @[Cat.scala 29:58] - ld_byte_rhit_lo_hi <= _T_109 @[lsu_bus_intf.scala 177:27] - node _T_110 = bits(ldst_byteen_hi_r, 0, 0) @[lsu_bus_intf.scala 178:88] - node _T_111 = and(ld_addr_rhit_hi_lo, _T_110) @[lsu_bus_intf.scala 178:70] - node _T_112 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_intf.scala 178:110] - node _T_113 = and(_T_111, _T_112) @[lsu_bus_intf.scala 178:92] - node _T_114 = bits(ldst_byteen_hi_r, 1, 1) @[lsu_bus_intf.scala 178:88] - node _T_115 = and(ld_addr_rhit_hi_lo, _T_114) @[lsu_bus_intf.scala 178:70] - node _T_116 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_intf.scala 178:110] - node _T_117 = and(_T_115, _T_116) @[lsu_bus_intf.scala 178:92] - node _T_118 = bits(ldst_byteen_hi_r, 2, 2) @[lsu_bus_intf.scala 178:88] - node _T_119 = and(ld_addr_rhit_hi_lo, _T_118) @[lsu_bus_intf.scala 178:70] - node _T_120 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_intf.scala 178:110] - node _T_121 = and(_T_119, _T_120) @[lsu_bus_intf.scala 178:92] - node _T_122 = bits(ldst_byteen_hi_r, 3, 3) @[lsu_bus_intf.scala 178:88] - node _T_123 = and(ld_addr_rhit_hi_lo, _T_122) @[lsu_bus_intf.scala 178:70] - node _T_124 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_intf.scala 178:110] - node _T_125 = and(_T_123, _T_124) @[lsu_bus_intf.scala 178:92] + ld_byte_rhit_lo_hi <= _T_109 @[lsu_bus_intf.scala 176:27] + node _T_110 = bits(ldst_byteen_hi_r, 0, 0) @[lsu_bus_intf.scala 177:88] + node _T_111 = and(ld_addr_rhit_hi_lo, _T_110) @[lsu_bus_intf.scala 177:70] + node _T_112 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_intf.scala 177:110] + node _T_113 = and(_T_111, _T_112) @[lsu_bus_intf.scala 177:92] + node _T_114 = bits(ldst_byteen_hi_r, 1, 1) @[lsu_bus_intf.scala 177:88] + node _T_115 = and(ld_addr_rhit_hi_lo, _T_114) @[lsu_bus_intf.scala 177:70] + node _T_116 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_intf.scala 177:110] + node _T_117 = and(_T_115, _T_116) @[lsu_bus_intf.scala 177:92] + node _T_118 = bits(ldst_byteen_hi_r, 2, 2) @[lsu_bus_intf.scala 177:88] + node _T_119 = and(ld_addr_rhit_hi_lo, _T_118) @[lsu_bus_intf.scala 177:70] + node _T_120 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_intf.scala 177:110] + node _T_121 = and(_T_119, _T_120) @[lsu_bus_intf.scala 177:92] + node _T_122 = bits(ldst_byteen_hi_r, 3, 3) @[lsu_bus_intf.scala 177:88] + node _T_123 = and(ld_addr_rhit_hi_lo, _T_122) @[lsu_bus_intf.scala 177:70] + node _T_124 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_intf.scala 177:110] + node _T_125 = and(_T_123, _T_124) @[lsu_bus_intf.scala 177:92] node _T_126 = cat(_T_125, _T_121) @[Cat.scala 29:58] node _T_127 = cat(_T_126, _T_117) @[Cat.scala 29:58] node _T_128 = cat(_T_127, _T_113) @[Cat.scala 29:58] - ld_byte_rhit_hi_lo <= _T_128 @[lsu_bus_intf.scala 178:27] - node _T_129 = bits(ldst_byteen_hi_r, 0, 0) @[lsu_bus_intf.scala 179:88] - node _T_130 = and(ld_addr_rhit_hi_hi, _T_129) @[lsu_bus_intf.scala 179:70] - node _T_131 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_intf.scala 179:110] - node _T_132 = and(_T_130, _T_131) @[lsu_bus_intf.scala 179:92] - node _T_133 = bits(ldst_byteen_hi_r, 1, 1) @[lsu_bus_intf.scala 179:88] - node _T_134 = and(ld_addr_rhit_hi_hi, _T_133) @[lsu_bus_intf.scala 179:70] - node _T_135 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_intf.scala 179:110] - node _T_136 = and(_T_134, _T_135) @[lsu_bus_intf.scala 179:92] - node _T_137 = bits(ldst_byteen_hi_r, 2, 2) @[lsu_bus_intf.scala 179:88] - node _T_138 = and(ld_addr_rhit_hi_hi, _T_137) @[lsu_bus_intf.scala 179:70] - node _T_139 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_intf.scala 179:110] - node _T_140 = and(_T_138, _T_139) @[lsu_bus_intf.scala 179:92] - node _T_141 = bits(ldst_byteen_hi_r, 3, 3) @[lsu_bus_intf.scala 179:88] - node _T_142 = and(ld_addr_rhit_hi_hi, _T_141) @[lsu_bus_intf.scala 179:70] - node _T_143 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_intf.scala 179:110] - node _T_144 = and(_T_142, _T_143) @[lsu_bus_intf.scala 179:92] + ld_byte_rhit_hi_lo <= _T_128 @[lsu_bus_intf.scala 177:27] + node _T_129 = bits(ldst_byteen_hi_r, 0, 0) @[lsu_bus_intf.scala 178:88] + node _T_130 = and(ld_addr_rhit_hi_hi, _T_129) @[lsu_bus_intf.scala 178:70] + node _T_131 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_intf.scala 178:110] + node _T_132 = and(_T_130, _T_131) @[lsu_bus_intf.scala 178:92] + node _T_133 = bits(ldst_byteen_hi_r, 1, 1) @[lsu_bus_intf.scala 178:88] + node _T_134 = and(ld_addr_rhit_hi_hi, _T_133) @[lsu_bus_intf.scala 178:70] + node _T_135 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_intf.scala 178:110] + node _T_136 = and(_T_134, _T_135) @[lsu_bus_intf.scala 178:92] + node _T_137 = bits(ldst_byteen_hi_r, 2, 2) @[lsu_bus_intf.scala 178:88] + node _T_138 = and(ld_addr_rhit_hi_hi, _T_137) @[lsu_bus_intf.scala 178:70] + node _T_139 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_intf.scala 178:110] + node _T_140 = and(_T_138, _T_139) @[lsu_bus_intf.scala 178:92] + node _T_141 = bits(ldst_byteen_hi_r, 3, 3) @[lsu_bus_intf.scala 178:88] + node _T_142 = and(ld_addr_rhit_hi_hi, _T_141) @[lsu_bus_intf.scala 178:70] + node _T_143 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_intf.scala 178:110] + node _T_144 = and(_T_142, _T_143) @[lsu_bus_intf.scala 178:92] node _T_145 = cat(_T_144, _T_140) @[Cat.scala 29:58] node _T_146 = cat(_T_145, _T_136) @[Cat.scala 29:58] node _T_147 = cat(_T_146, _T_132) @[Cat.scala 29:58] - ld_byte_rhit_hi_hi <= _T_147 @[lsu_bus_intf.scala 179:27] - node _T_148 = bits(ld_byte_rhit_lo_lo, 0, 0) @[lsu_bus_intf.scala 181:69] - node _T_149 = bits(ld_byte_rhit_hi_lo, 0, 0) @[lsu_bus_intf.scala 181:93] - node _T_150 = or(_T_148, _T_149) @[lsu_bus_intf.scala 181:73] - node _T_151 = bits(ld_byte_hit_buf_lo, 0, 0) @[lsu_bus_intf.scala 181:117] - node _T_152 = or(_T_150, _T_151) @[lsu_bus_intf.scala 181:97] - node _T_153 = bits(ld_byte_rhit_lo_lo, 1, 1) @[lsu_bus_intf.scala 181:69] - node _T_154 = bits(ld_byte_rhit_hi_lo, 1, 1) @[lsu_bus_intf.scala 181:93] - node _T_155 = or(_T_153, _T_154) @[lsu_bus_intf.scala 181:73] - node _T_156 = bits(ld_byte_hit_buf_lo, 1, 1) @[lsu_bus_intf.scala 181:117] - node _T_157 = or(_T_155, _T_156) @[lsu_bus_intf.scala 181:97] - node _T_158 = bits(ld_byte_rhit_lo_lo, 2, 2) @[lsu_bus_intf.scala 181:69] - node _T_159 = bits(ld_byte_rhit_hi_lo, 2, 2) @[lsu_bus_intf.scala 181:93] - node _T_160 = or(_T_158, _T_159) @[lsu_bus_intf.scala 181:73] - node _T_161 = bits(ld_byte_hit_buf_lo, 2, 2) @[lsu_bus_intf.scala 181:117] - node _T_162 = or(_T_160, _T_161) @[lsu_bus_intf.scala 181:97] - node _T_163 = bits(ld_byte_rhit_lo_lo, 3, 3) @[lsu_bus_intf.scala 181:69] - node _T_164 = bits(ld_byte_rhit_hi_lo, 3, 3) @[lsu_bus_intf.scala 181:93] - node _T_165 = or(_T_163, _T_164) @[lsu_bus_intf.scala 181:73] - node _T_166 = bits(ld_byte_hit_buf_lo, 3, 3) @[lsu_bus_intf.scala 181:117] - node _T_167 = or(_T_165, _T_166) @[lsu_bus_intf.scala 181:97] + ld_byte_rhit_hi_hi <= _T_147 @[lsu_bus_intf.scala 178:27] + node _T_148 = bits(ld_byte_rhit_lo_lo, 0, 0) @[lsu_bus_intf.scala 180:69] + node _T_149 = bits(ld_byte_rhit_hi_lo, 0, 0) @[lsu_bus_intf.scala 180:93] + node _T_150 = or(_T_148, _T_149) @[lsu_bus_intf.scala 180:73] + node _T_151 = bits(ld_byte_hit_buf_lo, 0, 0) @[lsu_bus_intf.scala 180:117] + node _T_152 = or(_T_150, _T_151) @[lsu_bus_intf.scala 180:97] + node _T_153 = bits(ld_byte_rhit_lo_lo, 1, 1) @[lsu_bus_intf.scala 180:69] + node _T_154 = bits(ld_byte_rhit_hi_lo, 1, 1) @[lsu_bus_intf.scala 180:93] + node _T_155 = or(_T_153, _T_154) @[lsu_bus_intf.scala 180:73] + node _T_156 = bits(ld_byte_hit_buf_lo, 1, 1) @[lsu_bus_intf.scala 180:117] + node _T_157 = or(_T_155, _T_156) @[lsu_bus_intf.scala 180:97] + node _T_158 = bits(ld_byte_rhit_lo_lo, 2, 2) @[lsu_bus_intf.scala 180:69] + node _T_159 = bits(ld_byte_rhit_hi_lo, 2, 2) @[lsu_bus_intf.scala 180:93] + node _T_160 = or(_T_158, _T_159) @[lsu_bus_intf.scala 180:73] + node _T_161 = bits(ld_byte_hit_buf_lo, 2, 2) @[lsu_bus_intf.scala 180:117] + node _T_162 = or(_T_160, _T_161) @[lsu_bus_intf.scala 180:97] + node _T_163 = bits(ld_byte_rhit_lo_lo, 3, 3) @[lsu_bus_intf.scala 180:69] + node _T_164 = bits(ld_byte_rhit_hi_lo, 3, 3) @[lsu_bus_intf.scala 180:93] + node _T_165 = or(_T_163, _T_164) @[lsu_bus_intf.scala 180:73] + node _T_166 = bits(ld_byte_hit_buf_lo, 3, 3) @[lsu_bus_intf.scala 180:117] + node _T_167 = or(_T_165, _T_166) @[lsu_bus_intf.scala 180:97] node _T_168 = cat(_T_167, _T_162) @[Cat.scala 29:58] node _T_169 = cat(_T_168, _T_157) @[Cat.scala 29:58] node _T_170 = cat(_T_169, _T_152) @[Cat.scala 29:58] - ld_byte_hit_lo <= _T_170 @[lsu_bus_intf.scala 181:27] - node _T_171 = bits(ld_byte_rhit_lo_hi, 0, 0) @[lsu_bus_intf.scala 182:69] - node _T_172 = bits(ld_byte_rhit_hi_hi, 0, 0) @[lsu_bus_intf.scala 182:93] - node _T_173 = or(_T_171, _T_172) @[lsu_bus_intf.scala 182:73] - node _T_174 = bits(ld_byte_hit_buf_hi, 0, 0) @[lsu_bus_intf.scala 182:117] - node _T_175 = or(_T_173, _T_174) @[lsu_bus_intf.scala 182:97] - node _T_176 = bits(ld_byte_rhit_lo_hi, 1, 1) @[lsu_bus_intf.scala 182:69] - node _T_177 = bits(ld_byte_rhit_hi_hi, 1, 1) @[lsu_bus_intf.scala 182:93] - node _T_178 = or(_T_176, _T_177) @[lsu_bus_intf.scala 182:73] - node _T_179 = bits(ld_byte_hit_buf_hi, 1, 1) @[lsu_bus_intf.scala 182:117] - node _T_180 = or(_T_178, _T_179) @[lsu_bus_intf.scala 182:97] - node _T_181 = bits(ld_byte_rhit_lo_hi, 2, 2) @[lsu_bus_intf.scala 182:69] - node _T_182 = bits(ld_byte_rhit_hi_hi, 2, 2) @[lsu_bus_intf.scala 182:93] - node _T_183 = or(_T_181, _T_182) @[lsu_bus_intf.scala 182:73] - node _T_184 = bits(ld_byte_hit_buf_hi, 2, 2) @[lsu_bus_intf.scala 182:117] - node _T_185 = or(_T_183, _T_184) @[lsu_bus_intf.scala 182:97] - node _T_186 = bits(ld_byte_rhit_lo_hi, 3, 3) @[lsu_bus_intf.scala 182:69] - node _T_187 = bits(ld_byte_rhit_hi_hi, 3, 3) @[lsu_bus_intf.scala 182:93] - node _T_188 = or(_T_186, _T_187) @[lsu_bus_intf.scala 182:73] - node _T_189 = bits(ld_byte_hit_buf_hi, 3, 3) @[lsu_bus_intf.scala 182:117] - node _T_190 = or(_T_188, _T_189) @[lsu_bus_intf.scala 182:97] + ld_byte_hit_lo <= _T_170 @[lsu_bus_intf.scala 180:27] + node _T_171 = bits(ld_byte_rhit_lo_hi, 0, 0) @[lsu_bus_intf.scala 181:69] + node _T_172 = bits(ld_byte_rhit_hi_hi, 0, 0) @[lsu_bus_intf.scala 181:93] + node _T_173 = or(_T_171, _T_172) @[lsu_bus_intf.scala 181:73] + node _T_174 = bits(ld_byte_hit_buf_hi, 0, 0) @[lsu_bus_intf.scala 181:117] + node _T_175 = or(_T_173, _T_174) @[lsu_bus_intf.scala 181:97] + node _T_176 = bits(ld_byte_rhit_lo_hi, 1, 1) @[lsu_bus_intf.scala 181:69] + node _T_177 = bits(ld_byte_rhit_hi_hi, 1, 1) @[lsu_bus_intf.scala 181:93] + node _T_178 = or(_T_176, _T_177) @[lsu_bus_intf.scala 181:73] + node _T_179 = bits(ld_byte_hit_buf_hi, 1, 1) @[lsu_bus_intf.scala 181:117] + node _T_180 = or(_T_178, _T_179) @[lsu_bus_intf.scala 181:97] + node _T_181 = bits(ld_byte_rhit_lo_hi, 2, 2) @[lsu_bus_intf.scala 181:69] + node _T_182 = bits(ld_byte_rhit_hi_hi, 2, 2) @[lsu_bus_intf.scala 181:93] + node _T_183 = or(_T_181, _T_182) @[lsu_bus_intf.scala 181:73] + node _T_184 = bits(ld_byte_hit_buf_hi, 2, 2) @[lsu_bus_intf.scala 181:117] + node _T_185 = or(_T_183, _T_184) @[lsu_bus_intf.scala 181:97] + node _T_186 = bits(ld_byte_rhit_lo_hi, 3, 3) @[lsu_bus_intf.scala 181:69] + node _T_187 = bits(ld_byte_rhit_hi_hi, 3, 3) @[lsu_bus_intf.scala 181:93] + node _T_188 = or(_T_186, _T_187) @[lsu_bus_intf.scala 181:73] + node _T_189 = bits(ld_byte_hit_buf_hi, 3, 3) @[lsu_bus_intf.scala 181:117] + node _T_190 = or(_T_188, _T_189) @[lsu_bus_intf.scala 181:97] node _T_191 = cat(_T_190, _T_185) @[Cat.scala 29:58] node _T_192 = cat(_T_191, _T_180) @[Cat.scala 29:58] node _T_193 = cat(_T_192, _T_175) @[Cat.scala 29:58] - ld_byte_hit_hi <= _T_193 @[lsu_bus_intf.scala 182:27] - node _T_194 = bits(ld_byte_rhit_lo_lo, 0, 0) @[lsu_bus_intf.scala 183:69] - node _T_195 = bits(ld_byte_rhit_hi_lo, 0, 0) @[lsu_bus_intf.scala 183:93] - node _T_196 = or(_T_194, _T_195) @[lsu_bus_intf.scala 183:73] - node _T_197 = bits(ld_byte_rhit_lo_lo, 1, 1) @[lsu_bus_intf.scala 183:69] - node _T_198 = bits(ld_byte_rhit_hi_lo, 1, 1) @[lsu_bus_intf.scala 183:93] - node _T_199 = or(_T_197, _T_198) @[lsu_bus_intf.scala 183:73] - node _T_200 = bits(ld_byte_rhit_lo_lo, 2, 2) @[lsu_bus_intf.scala 183:69] - node _T_201 = bits(ld_byte_rhit_hi_lo, 2, 2) @[lsu_bus_intf.scala 183:93] - node _T_202 = or(_T_200, _T_201) @[lsu_bus_intf.scala 183:73] - node _T_203 = bits(ld_byte_rhit_lo_lo, 3, 3) @[lsu_bus_intf.scala 183:69] - node _T_204 = bits(ld_byte_rhit_hi_lo, 3, 3) @[lsu_bus_intf.scala 183:93] - node _T_205 = or(_T_203, _T_204) @[lsu_bus_intf.scala 183:73] + ld_byte_hit_hi <= _T_193 @[lsu_bus_intf.scala 181:27] + node _T_194 = bits(ld_byte_rhit_lo_lo, 0, 0) @[lsu_bus_intf.scala 182:69] + node _T_195 = bits(ld_byte_rhit_hi_lo, 0, 0) @[lsu_bus_intf.scala 182:93] + node _T_196 = or(_T_194, _T_195) @[lsu_bus_intf.scala 182:73] + node _T_197 = bits(ld_byte_rhit_lo_lo, 1, 1) @[lsu_bus_intf.scala 182:69] + node _T_198 = bits(ld_byte_rhit_hi_lo, 1, 1) @[lsu_bus_intf.scala 182:93] + node _T_199 = or(_T_197, _T_198) @[lsu_bus_intf.scala 182:73] + node _T_200 = bits(ld_byte_rhit_lo_lo, 2, 2) @[lsu_bus_intf.scala 182:69] + node _T_201 = bits(ld_byte_rhit_hi_lo, 2, 2) @[lsu_bus_intf.scala 182:93] + node _T_202 = or(_T_200, _T_201) @[lsu_bus_intf.scala 182:73] + node _T_203 = bits(ld_byte_rhit_lo_lo, 3, 3) @[lsu_bus_intf.scala 182:69] + node _T_204 = bits(ld_byte_rhit_hi_lo, 3, 3) @[lsu_bus_intf.scala 182:93] + node _T_205 = or(_T_203, _T_204) @[lsu_bus_intf.scala 182:73] node _T_206 = cat(_T_205, _T_202) @[Cat.scala 29:58] node _T_207 = cat(_T_206, _T_199) @[Cat.scala 29:58] node _T_208 = cat(_T_207, _T_196) @[Cat.scala 29:58] - ld_byte_rhit_lo <= _T_208 @[lsu_bus_intf.scala 183:27] - node _T_209 = bits(ld_byte_rhit_lo_hi, 0, 0) @[lsu_bus_intf.scala 184:69] - node _T_210 = bits(ld_byte_rhit_hi_hi, 0, 0) @[lsu_bus_intf.scala 184:93] - node _T_211 = or(_T_209, _T_210) @[lsu_bus_intf.scala 184:73] - node _T_212 = bits(ld_byte_rhit_lo_hi, 1, 1) @[lsu_bus_intf.scala 184:69] - node _T_213 = bits(ld_byte_rhit_hi_hi, 1, 1) @[lsu_bus_intf.scala 184:93] - node _T_214 = or(_T_212, _T_213) @[lsu_bus_intf.scala 184:73] - node _T_215 = bits(ld_byte_rhit_lo_hi, 2, 2) @[lsu_bus_intf.scala 184:69] - node _T_216 = bits(ld_byte_rhit_hi_hi, 2, 2) @[lsu_bus_intf.scala 184:93] - node _T_217 = or(_T_215, _T_216) @[lsu_bus_intf.scala 184:73] - node _T_218 = bits(ld_byte_rhit_lo_hi, 3, 3) @[lsu_bus_intf.scala 184:69] - node _T_219 = bits(ld_byte_rhit_hi_hi, 3, 3) @[lsu_bus_intf.scala 184:93] - node _T_220 = or(_T_218, _T_219) @[lsu_bus_intf.scala 184:73] + ld_byte_rhit_lo <= _T_208 @[lsu_bus_intf.scala 182:27] + node _T_209 = bits(ld_byte_rhit_lo_hi, 0, 0) @[lsu_bus_intf.scala 183:69] + node _T_210 = bits(ld_byte_rhit_hi_hi, 0, 0) @[lsu_bus_intf.scala 183:93] + node _T_211 = or(_T_209, _T_210) @[lsu_bus_intf.scala 183:73] + node _T_212 = bits(ld_byte_rhit_lo_hi, 1, 1) @[lsu_bus_intf.scala 183:69] + node _T_213 = bits(ld_byte_rhit_hi_hi, 1, 1) @[lsu_bus_intf.scala 183:93] + node _T_214 = or(_T_212, _T_213) @[lsu_bus_intf.scala 183:73] + node _T_215 = bits(ld_byte_rhit_lo_hi, 2, 2) @[lsu_bus_intf.scala 183:69] + node _T_216 = bits(ld_byte_rhit_hi_hi, 2, 2) @[lsu_bus_intf.scala 183:93] + node _T_217 = or(_T_215, _T_216) @[lsu_bus_intf.scala 183:73] + node _T_218 = bits(ld_byte_rhit_lo_hi, 3, 3) @[lsu_bus_intf.scala 183:69] + node _T_219 = bits(ld_byte_rhit_hi_hi, 3, 3) @[lsu_bus_intf.scala 183:93] + node _T_220 = or(_T_218, _T_219) @[lsu_bus_intf.scala 183:73] node _T_221 = cat(_T_220, _T_217) @[Cat.scala 29:58] node _T_222 = cat(_T_221, _T_214) @[Cat.scala 29:58] node _T_223 = cat(_T_222, _T_211) @[Cat.scala 29:58] - ld_byte_rhit_hi <= _T_223 @[lsu_bus_intf.scala 184:27] - node _T_224 = bits(ld_byte_rhit_lo_lo, 0, 0) @[lsu_bus_intf.scala 185:79] - node _T_225 = bits(store_data_lo_r, 7, 0) @[lsu_bus_intf.scala 185:101] - node _T_226 = bits(ld_byte_rhit_hi_lo, 0, 0) @[lsu_bus_intf.scala 185:136] - node _T_227 = bits(store_data_hi_r, 7, 0) @[lsu_bus_intf.scala 185:158] + ld_byte_rhit_hi <= _T_223 @[lsu_bus_intf.scala 183:27] + node _T_224 = bits(ld_byte_rhit_lo_lo, 0, 0) @[lsu_bus_intf.scala 184:79] + node _T_225 = bits(store_data_lo_r, 7, 0) @[lsu_bus_intf.scala 184:101] + node _T_226 = bits(ld_byte_rhit_hi_lo, 0, 0) @[lsu_bus_intf.scala 184:136] + node _T_227 = bits(store_data_hi_r, 7, 0) @[lsu_bus_intf.scala 184:158] node _T_228 = mux(_T_224, _T_225, UInt<1>("h00")) @[Mux.scala 27:72] node _T_229 = mux(_T_226, _T_227, UInt<1>("h00")) @[Mux.scala 27:72] node _T_230 = or(_T_228, _T_229) @[Mux.scala 27:72] wire _T_231 : UInt<8> @[Mux.scala 27:72] _T_231 <= _T_230 @[Mux.scala 27:72] - node _T_232 = bits(ld_byte_rhit_lo_lo, 1, 1) @[lsu_bus_intf.scala 185:79] - node _T_233 = bits(store_data_lo_r, 15, 8) @[lsu_bus_intf.scala 185:101] - node _T_234 = bits(ld_byte_rhit_hi_lo, 1, 1) @[lsu_bus_intf.scala 185:136] - node _T_235 = bits(store_data_hi_r, 15, 8) @[lsu_bus_intf.scala 185:158] + node _T_232 = bits(ld_byte_rhit_lo_lo, 1, 1) @[lsu_bus_intf.scala 184:79] + node _T_233 = bits(store_data_lo_r, 15, 8) @[lsu_bus_intf.scala 184:101] + node _T_234 = bits(ld_byte_rhit_hi_lo, 1, 1) @[lsu_bus_intf.scala 184:136] + node _T_235 = bits(store_data_hi_r, 15, 8) @[lsu_bus_intf.scala 184:158] node _T_236 = mux(_T_232, _T_233, UInt<1>("h00")) @[Mux.scala 27:72] node _T_237 = mux(_T_234, _T_235, UInt<1>("h00")) @[Mux.scala 27:72] node _T_238 = or(_T_236, _T_237) @[Mux.scala 27:72] wire _T_239 : UInt<8> @[Mux.scala 27:72] _T_239 <= _T_238 @[Mux.scala 27:72] - node _T_240 = bits(ld_byte_rhit_lo_lo, 2, 2) @[lsu_bus_intf.scala 185:79] - node _T_241 = bits(store_data_lo_r, 23, 16) @[lsu_bus_intf.scala 185:101] - node _T_242 = bits(ld_byte_rhit_hi_lo, 2, 2) @[lsu_bus_intf.scala 185:136] - node _T_243 = bits(store_data_hi_r, 23, 16) @[lsu_bus_intf.scala 185:158] + node _T_240 = bits(ld_byte_rhit_lo_lo, 2, 2) @[lsu_bus_intf.scala 184:79] + node _T_241 = bits(store_data_lo_r, 23, 16) @[lsu_bus_intf.scala 184:101] + node _T_242 = bits(ld_byte_rhit_hi_lo, 2, 2) @[lsu_bus_intf.scala 184:136] + node _T_243 = bits(store_data_hi_r, 23, 16) @[lsu_bus_intf.scala 184:158] node _T_244 = mux(_T_240, _T_241, UInt<1>("h00")) @[Mux.scala 27:72] node _T_245 = mux(_T_242, _T_243, UInt<1>("h00")) @[Mux.scala 27:72] node _T_246 = or(_T_244, _T_245) @[Mux.scala 27:72] wire _T_247 : UInt<8> @[Mux.scala 27:72] _T_247 <= _T_246 @[Mux.scala 27:72] - node _T_248 = bits(ld_byte_rhit_lo_lo, 3, 3) @[lsu_bus_intf.scala 185:79] - node _T_249 = bits(store_data_lo_r, 31, 24) @[lsu_bus_intf.scala 185:101] - node _T_250 = bits(ld_byte_rhit_hi_lo, 3, 3) @[lsu_bus_intf.scala 185:136] - node _T_251 = bits(store_data_hi_r, 31, 24) @[lsu_bus_intf.scala 185:158] + node _T_248 = bits(ld_byte_rhit_lo_lo, 3, 3) @[lsu_bus_intf.scala 184:79] + node _T_249 = bits(store_data_lo_r, 31, 24) @[lsu_bus_intf.scala 184:101] + node _T_250 = bits(ld_byte_rhit_hi_lo, 3, 3) @[lsu_bus_intf.scala 184:136] + node _T_251 = bits(store_data_hi_r, 31, 24) @[lsu_bus_intf.scala 184:158] node _T_252 = mux(_T_248, _T_249, UInt<1>("h00")) @[Mux.scala 27:72] node _T_253 = mux(_T_250, _T_251, UInt<1>("h00")) @[Mux.scala 27:72] node _T_254 = or(_T_252, _T_253) @[Mux.scala 27:72] @@ -101644,38 +101644,38 @@ circuit quasar_wrapper : node _T_256 = cat(_T_255, _T_247) @[Cat.scala 29:58] node _T_257 = cat(_T_256, _T_239) @[Cat.scala 29:58] node _T_258 = cat(_T_257, _T_231) @[Cat.scala 29:58] - ld_fwddata_rpipe_lo <= _T_258 @[lsu_bus_intf.scala 185:27] - node _T_259 = bits(ld_byte_rhit_lo_hi, 0, 0) @[lsu_bus_intf.scala 186:79] - node _T_260 = bits(store_data_lo_r, 7, 0) @[lsu_bus_intf.scala 186:101] - node _T_261 = bits(ld_byte_rhit_hi_hi, 0, 0) @[lsu_bus_intf.scala 186:136] - node _T_262 = bits(store_data_hi_r, 7, 0) @[lsu_bus_intf.scala 186:158] + ld_fwddata_rpipe_lo <= _T_258 @[lsu_bus_intf.scala 184:27] + node _T_259 = bits(ld_byte_rhit_lo_hi, 0, 0) @[lsu_bus_intf.scala 185:79] + node _T_260 = bits(store_data_lo_r, 7, 0) @[lsu_bus_intf.scala 185:101] + node _T_261 = bits(ld_byte_rhit_hi_hi, 0, 0) @[lsu_bus_intf.scala 185:136] + node _T_262 = bits(store_data_hi_r, 7, 0) @[lsu_bus_intf.scala 185:158] node _T_263 = mux(_T_259, _T_260, UInt<1>("h00")) @[Mux.scala 27:72] node _T_264 = mux(_T_261, _T_262, UInt<1>("h00")) @[Mux.scala 27:72] node _T_265 = or(_T_263, _T_264) @[Mux.scala 27:72] wire _T_266 : UInt<8> @[Mux.scala 27:72] _T_266 <= _T_265 @[Mux.scala 27:72] - node _T_267 = bits(ld_byte_rhit_lo_hi, 1, 1) @[lsu_bus_intf.scala 186:79] - node _T_268 = bits(store_data_lo_r, 15, 8) @[lsu_bus_intf.scala 186:101] - node _T_269 = bits(ld_byte_rhit_hi_hi, 1, 1) @[lsu_bus_intf.scala 186:136] - node _T_270 = bits(store_data_hi_r, 15, 8) @[lsu_bus_intf.scala 186:158] + node _T_267 = bits(ld_byte_rhit_lo_hi, 1, 1) @[lsu_bus_intf.scala 185:79] + node _T_268 = bits(store_data_lo_r, 15, 8) @[lsu_bus_intf.scala 185:101] + node _T_269 = bits(ld_byte_rhit_hi_hi, 1, 1) @[lsu_bus_intf.scala 185:136] + node _T_270 = bits(store_data_hi_r, 15, 8) @[lsu_bus_intf.scala 185:158] node _T_271 = mux(_T_267, _T_268, UInt<1>("h00")) @[Mux.scala 27:72] node _T_272 = mux(_T_269, _T_270, UInt<1>("h00")) @[Mux.scala 27:72] node _T_273 = or(_T_271, _T_272) @[Mux.scala 27:72] wire _T_274 : UInt<8> @[Mux.scala 27:72] _T_274 <= _T_273 @[Mux.scala 27:72] - node _T_275 = bits(ld_byte_rhit_lo_hi, 2, 2) @[lsu_bus_intf.scala 186:79] - node _T_276 = bits(store_data_lo_r, 23, 16) @[lsu_bus_intf.scala 186:101] - node _T_277 = bits(ld_byte_rhit_hi_hi, 2, 2) @[lsu_bus_intf.scala 186:136] - node _T_278 = bits(store_data_hi_r, 23, 16) @[lsu_bus_intf.scala 186:158] + node _T_275 = bits(ld_byte_rhit_lo_hi, 2, 2) @[lsu_bus_intf.scala 185:79] + node _T_276 = bits(store_data_lo_r, 23, 16) @[lsu_bus_intf.scala 185:101] + node _T_277 = bits(ld_byte_rhit_hi_hi, 2, 2) @[lsu_bus_intf.scala 185:136] + node _T_278 = bits(store_data_hi_r, 23, 16) @[lsu_bus_intf.scala 185:158] node _T_279 = mux(_T_275, _T_276, UInt<1>("h00")) @[Mux.scala 27:72] node _T_280 = mux(_T_277, _T_278, UInt<1>("h00")) @[Mux.scala 27:72] node _T_281 = or(_T_279, _T_280) @[Mux.scala 27:72] wire _T_282 : UInt<8> @[Mux.scala 27:72] _T_282 <= _T_281 @[Mux.scala 27:72] - node _T_283 = bits(ld_byte_rhit_lo_hi, 3, 3) @[lsu_bus_intf.scala 186:79] - node _T_284 = bits(store_data_lo_r, 31, 24) @[lsu_bus_intf.scala 186:101] - node _T_285 = bits(ld_byte_rhit_hi_hi, 3, 3) @[lsu_bus_intf.scala 186:136] - node _T_286 = bits(store_data_hi_r, 31, 24) @[lsu_bus_intf.scala 186:158] + node _T_283 = bits(ld_byte_rhit_lo_hi, 3, 3) @[lsu_bus_intf.scala 185:79] + node _T_284 = bits(store_data_lo_r, 31, 24) @[lsu_bus_intf.scala 185:101] + node _T_285 = bits(ld_byte_rhit_hi_hi, 3, 3) @[lsu_bus_intf.scala 185:136] + node _T_286 = bits(store_data_hi_r, 31, 24) @[lsu_bus_intf.scala 185:158] node _T_287 = mux(_T_283, _T_284, UInt<1>("h00")) @[Mux.scala 27:72] node _T_288 = mux(_T_285, _T_286, UInt<1>("h00")) @[Mux.scala 27:72] node _T_289 = or(_T_287, _T_288) @[Mux.scala 27:72] @@ -101684,117 +101684,117 @@ circuit quasar_wrapper : node _T_291 = cat(_T_290, _T_282) @[Cat.scala 29:58] node _T_292 = cat(_T_291, _T_274) @[Cat.scala 29:58] node _T_293 = cat(_T_292, _T_266) @[Cat.scala 29:58] - ld_fwddata_rpipe_hi <= _T_293 @[lsu_bus_intf.scala 186:27] - node _T_294 = bits(ld_byte_rhit_lo, 0, 0) @[lsu_bus_intf.scala 187:70] - node _T_295 = bits(ld_fwddata_rpipe_lo, 7, 0) @[lsu_bus_intf.scala 187:94] - node _T_296 = bits(ld_fwddata_buf_lo, 7, 0) @[lsu_bus_intf.scala 187:128] - node _T_297 = mux(_T_294, _T_295, _T_296) @[lsu_bus_intf.scala 187:54] - node _T_298 = bits(ld_byte_rhit_lo, 1, 1) @[lsu_bus_intf.scala 187:70] - node _T_299 = bits(ld_fwddata_rpipe_lo, 15, 8) @[lsu_bus_intf.scala 187:94] - node _T_300 = bits(ld_fwddata_buf_lo, 15, 8) @[lsu_bus_intf.scala 187:128] - node _T_301 = mux(_T_298, _T_299, _T_300) @[lsu_bus_intf.scala 187:54] - node _T_302 = bits(ld_byte_rhit_lo, 2, 2) @[lsu_bus_intf.scala 187:70] - node _T_303 = bits(ld_fwddata_rpipe_lo, 23, 16) @[lsu_bus_intf.scala 187:94] - node _T_304 = bits(ld_fwddata_buf_lo, 23, 16) @[lsu_bus_intf.scala 187:128] - node _T_305 = mux(_T_302, _T_303, _T_304) @[lsu_bus_intf.scala 187:54] - node _T_306 = bits(ld_byte_rhit_lo, 3, 3) @[lsu_bus_intf.scala 187:70] - node _T_307 = bits(ld_fwddata_rpipe_lo, 31, 24) @[lsu_bus_intf.scala 187:94] - node _T_308 = bits(ld_fwddata_buf_lo, 31, 24) @[lsu_bus_intf.scala 187:128] - node _T_309 = mux(_T_306, _T_307, _T_308) @[lsu_bus_intf.scala 187:54] + ld_fwddata_rpipe_hi <= _T_293 @[lsu_bus_intf.scala 185:27] + node _T_294 = bits(ld_byte_rhit_lo, 0, 0) @[lsu_bus_intf.scala 186:70] + node _T_295 = bits(ld_fwddata_rpipe_lo, 7, 0) @[lsu_bus_intf.scala 186:94] + node _T_296 = bits(ld_fwddata_buf_lo, 7, 0) @[lsu_bus_intf.scala 186:128] + node _T_297 = mux(_T_294, _T_295, _T_296) @[lsu_bus_intf.scala 186:54] + node _T_298 = bits(ld_byte_rhit_lo, 1, 1) @[lsu_bus_intf.scala 186:70] + node _T_299 = bits(ld_fwddata_rpipe_lo, 15, 8) @[lsu_bus_intf.scala 186:94] + node _T_300 = bits(ld_fwddata_buf_lo, 15, 8) @[lsu_bus_intf.scala 186:128] + node _T_301 = mux(_T_298, _T_299, _T_300) @[lsu_bus_intf.scala 186:54] + node _T_302 = bits(ld_byte_rhit_lo, 2, 2) @[lsu_bus_intf.scala 186:70] + node _T_303 = bits(ld_fwddata_rpipe_lo, 23, 16) @[lsu_bus_intf.scala 186:94] + node _T_304 = bits(ld_fwddata_buf_lo, 23, 16) @[lsu_bus_intf.scala 186:128] + node _T_305 = mux(_T_302, _T_303, _T_304) @[lsu_bus_intf.scala 186:54] + node _T_306 = bits(ld_byte_rhit_lo, 3, 3) @[lsu_bus_intf.scala 186:70] + node _T_307 = bits(ld_fwddata_rpipe_lo, 31, 24) @[lsu_bus_intf.scala 186:94] + node _T_308 = bits(ld_fwddata_buf_lo, 31, 24) @[lsu_bus_intf.scala 186:128] + node _T_309 = mux(_T_306, _T_307, _T_308) @[lsu_bus_intf.scala 186:54] node _T_310 = cat(_T_309, _T_305) @[Cat.scala 29:58] node _T_311 = cat(_T_310, _T_301) @[Cat.scala 29:58] node _T_312 = cat(_T_311, _T_297) @[Cat.scala 29:58] - ld_fwddata_lo <= _T_312 @[lsu_bus_intf.scala 187:27] - node _T_313 = bits(ld_byte_rhit_hi, 0, 0) @[lsu_bus_intf.scala 188:70] - node _T_314 = bits(ld_fwddata_rpipe_hi, 7, 0) @[lsu_bus_intf.scala 188:94] - node _T_315 = bits(ld_fwddata_buf_hi, 7, 0) @[lsu_bus_intf.scala 188:128] - node _T_316 = mux(_T_313, _T_314, _T_315) @[lsu_bus_intf.scala 188:54] - node _T_317 = bits(ld_byte_rhit_hi, 1, 1) @[lsu_bus_intf.scala 188:70] - node _T_318 = bits(ld_fwddata_rpipe_hi, 15, 8) @[lsu_bus_intf.scala 188:94] - node _T_319 = bits(ld_fwddata_buf_hi, 15, 8) @[lsu_bus_intf.scala 188:128] - node _T_320 = mux(_T_317, _T_318, _T_319) @[lsu_bus_intf.scala 188:54] - node _T_321 = bits(ld_byte_rhit_hi, 2, 2) @[lsu_bus_intf.scala 188:70] - node _T_322 = bits(ld_fwddata_rpipe_hi, 23, 16) @[lsu_bus_intf.scala 188:94] - node _T_323 = bits(ld_fwddata_buf_hi, 23, 16) @[lsu_bus_intf.scala 188:128] - node _T_324 = mux(_T_321, _T_322, _T_323) @[lsu_bus_intf.scala 188:54] - node _T_325 = bits(ld_byte_rhit_hi, 3, 3) @[lsu_bus_intf.scala 188:70] - node _T_326 = bits(ld_fwddata_rpipe_hi, 31, 24) @[lsu_bus_intf.scala 188:94] - node _T_327 = bits(ld_fwddata_buf_hi, 31, 24) @[lsu_bus_intf.scala 188:128] - node _T_328 = mux(_T_325, _T_326, _T_327) @[lsu_bus_intf.scala 188:54] + ld_fwddata_lo <= _T_312 @[lsu_bus_intf.scala 186:27] + node _T_313 = bits(ld_byte_rhit_hi, 0, 0) @[lsu_bus_intf.scala 187:70] + node _T_314 = bits(ld_fwddata_rpipe_hi, 7, 0) @[lsu_bus_intf.scala 187:94] + node _T_315 = bits(ld_fwddata_buf_hi, 7, 0) @[lsu_bus_intf.scala 187:128] + node _T_316 = mux(_T_313, _T_314, _T_315) @[lsu_bus_intf.scala 187:54] + node _T_317 = bits(ld_byte_rhit_hi, 1, 1) @[lsu_bus_intf.scala 187:70] + node _T_318 = bits(ld_fwddata_rpipe_hi, 15, 8) @[lsu_bus_intf.scala 187:94] + node _T_319 = bits(ld_fwddata_buf_hi, 15, 8) @[lsu_bus_intf.scala 187:128] + node _T_320 = mux(_T_317, _T_318, _T_319) @[lsu_bus_intf.scala 187:54] + node _T_321 = bits(ld_byte_rhit_hi, 2, 2) @[lsu_bus_intf.scala 187:70] + node _T_322 = bits(ld_fwddata_rpipe_hi, 23, 16) @[lsu_bus_intf.scala 187:94] + node _T_323 = bits(ld_fwddata_buf_hi, 23, 16) @[lsu_bus_intf.scala 187:128] + node _T_324 = mux(_T_321, _T_322, _T_323) @[lsu_bus_intf.scala 187:54] + node _T_325 = bits(ld_byte_rhit_hi, 3, 3) @[lsu_bus_intf.scala 187:70] + node _T_326 = bits(ld_fwddata_rpipe_hi, 31, 24) @[lsu_bus_intf.scala 187:94] + node _T_327 = bits(ld_fwddata_buf_hi, 31, 24) @[lsu_bus_intf.scala 187:128] + node _T_328 = mux(_T_325, _T_326, _T_327) @[lsu_bus_intf.scala 187:54] node _T_329 = cat(_T_328, _T_324) @[Cat.scala 29:58] node _T_330 = cat(_T_329, _T_320) @[Cat.scala 29:58] node _T_331 = cat(_T_330, _T_316) @[Cat.scala 29:58] - ld_fwddata_hi <= _T_331 @[lsu_bus_intf.scala 188:27] - node _T_332 = bits(ld_byte_hit_lo, 0, 0) @[lsu_bus_intf.scala 189:66] - node _T_333 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_intf.scala 189:89] - node _T_334 = eq(_T_333, UInt<1>("h00")) @[lsu_bus_intf.scala 189:72] - node _T_335 = or(_T_332, _T_334) @[lsu_bus_intf.scala 189:70] - node _T_336 = bits(ld_byte_hit_lo, 1, 1) @[lsu_bus_intf.scala 189:66] - node _T_337 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_intf.scala 189:89] - node _T_338 = eq(_T_337, UInt<1>("h00")) @[lsu_bus_intf.scala 189:72] - node _T_339 = or(_T_336, _T_338) @[lsu_bus_intf.scala 189:70] - node _T_340 = bits(ld_byte_hit_lo, 2, 2) @[lsu_bus_intf.scala 189:66] - node _T_341 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_intf.scala 189:89] - node _T_342 = eq(_T_341, UInt<1>("h00")) @[lsu_bus_intf.scala 189:72] - node _T_343 = or(_T_340, _T_342) @[lsu_bus_intf.scala 189:70] - node _T_344 = bits(ld_byte_hit_lo, 3, 3) @[lsu_bus_intf.scala 189:66] - node _T_345 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_intf.scala 189:89] - node _T_346 = eq(_T_345, UInt<1>("h00")) @[lsu_bus_intf.scala 189:72] - node _T_347 = or(_T_344, _T_346) @[lsu_bus_intf.scala 189:70] - node _T_348 = and(_T_335, _T_339) @[lsu_bus_intf.scala 189:111] - node _T_349 = and(_T_348, _T_343) @[lsu_bus_intf.scala 189:111] - node _T_350 = and(_T_349, _T_347) @[lsu_bus_intf.scala 189:111] - ld_full_hit_lo_m <= _T_350 @[lsu_bus_intf.scala 189:27] - node _T_351 = bits(ld_byte_hit_hi, 0, 0) @[lsu_bus_intf.scala 190:66] - node _T_352 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_intf.scala 190:89] - node _T_353 = eq(_T_352, UInt<1>("h00")) @[lsu_bus_intf.scala 190:72] - node _T_354 = or(_T_351, _T_353) @[lsu_bus_intf.scala 190:70] - node _T_355 = bits(ld_byte_hit_hi, 1, 1) @[lsu_bus_intf.scala 190:66] - node _T_356 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_intf.scala 190:89] - node _T_357 = eq(_T_356, UInt<1>("h00")) @[lsu_bus_intf.scala 190:72] - node _T_358 = or(_T_355, _T_357) @[lsu_bus_intf.scala 190:70] - node _T_359 = bits(ld_byte_hit_hi, 2, 2) @[lsu_bus_intf.scala 190:66] - node _T_360 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_intf.scala 190:89] - node _T_361 = eq(_T_360, UInt<1>("h00")) @[lsu_bus_intf.scala 190:72] - node _T_362 = or(_T_359, _T_361) @[lsu_bus_intf.scala 190:70] - node _T_363 = bits(ld_byte_hit_hi, 3, 3) @[lsu_bus_intf.scala 190:66] - node _T_364 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_intf.scala 190:89] - node _T_365 = eq(_T_364, UInt<1>("h00")) @[lsu_bus_intf.scala 190:72] - node _T_366 = or(_T_363, _T_365) @[lsu_bus_intf.scala 190:70] - node _T_367 = and(_T_354, _T_358) @[lsu_bus_intf.scala 190:111] - node _T_368 = and(_T_367, _T_362) @[lsu_bus_intf.scala 190:111] - node _T_369 = and(_T_368, _T_366) @[lsu_bus_intf.scala 190:111] - ld_full_hit_hi_m <= _T_369 @[lsu_bus_intf.scala 190:27] - node _T_370 = and(ld_full_hit_lo_m, ld_full_hit_hi_m) @[lsu_bus_intf.scala 191:47] - node _T_371 = and(_T_370, io.lsu_busreq_m) @[lsu_bus_intf.scala 191:66] - node _T_372 = and(_T_371, io.lsu_pkt_m.bits.load) @[lsu_bus_intf.scala 191:84] - node _T_373 = eq(io.is_sideeffects_m, UInt<1>("h00")) @[lsu_bus_intf.scala 191:111] - node _T_374 = and(_T_372, _T_373) @[lsu_bus_intf.scala 191:109] - ld_full_hit_m <= _T_374 @[lsu_bus_intf.scala 191:27] - node _T_375 = bits(ld_fwddata_hi, 31, 0) @[lsu_bus_intf.scala 192:47] - node _T_376 = bits(ld_fwddata_lo, 31, 0) @[lsu_bus_intf.scala 192:68] + ld_fwddata_hi <= _T_331 @[lsu_bus_intf.scala 187:27] + node _T_332 = bits(ld_byte_hit_lo, 0, 0) @[lsu_bus_intf.scala 188:66] + node _T_333 = bits(ldst_byteen_lo_m, 0, 0) @[lsu_bus_intf.scala 188:89] + node _T_334 = eq(_T_333, UInt<1>("h00")) @[lsu_bus_intf.scala 188:72] + node _T_335 = or(_T_332, _T_334) @[lsu_bus_intf.scala 188:70] + node _T_336 = bits(ld_byte_hit_lo, 1, 1) @[lsu_bus_intf.scala 188:66] + node _T_337 = bits(ldst_byteen_lo_m, 1, 1) @[lsu_bus_intf.scala 188:89] + node _T_338 = eq(_T_337, UInt<1>("h00")) @[lsu_bus_intf.scala 188:72] + node _T_339 = or(_T_336, _T_338) @[lsu_bus_intf.scala 188:70] + node _T_340 = bits(ld_byte_hit_lo, 2, 2) @[lsu_bus_intf.scala 188:66] + node _T_341 = bits(ldst_byteen_lo_m, 2, 2) @[lsu_bus_intf.scala 188:89] + node _T_342 = eq(_T_341, UInt<1>("h00")) @[lsu_bus_intf.scala 188:72] + node _T_343 = or(_T_340, _T_342) @[lsu_bus_intf.scala 188:70] + node _T_344 = bits(ld_byte_hit_lo, 3, 3) @[lsu_bus_intf.scala 188:66] + node _T_345 = bits(ldst_byteen_lo_m, 3, 3) @[lsu_bus_intf.scala 188:89] + node _T_346 = eq(_T_345, UInt<1>("h00")) @[lsu_bus_intf.scala 188:72] + node _T_347 = or(_T_344, _T_346) @[lsu_bus_intf.scala 188:70] + node _T_348 = and(_T_335, _T_339) @[lsu_bus_intf.scala 188:111] + node _T_349 = and(_T_348, _T_343) @[lsu_bus_intf.scala 188:111] + node _T_350 = and(_T_349, _T_347) @[lsu_bus_intf.scala 188:111] + ld_full_hit_lo_m <= _T_350 @[lsu_bus_intf.scala 188:27] + node _T_351 = bits(ld_byte_hit_hi, 0, 0) @[lsu_bus_intf.scala 189:66] + node _T_352 = bits(ldst_byteen_hi_m, 0, 0) @[lsu_bus_intf.scala 189:89] + node _T_353 = eq(_T_352, UInt<1>("h00")) @[lsu_bus_intf.scala 189:72] + node _T_354 = or(_T_351, _T_353) @[lsu_bus_intf.scala 189:70] + node _T_355 = bits(ld_byte_hit_hi, 1, 1) @[lsu_bus_intf.scala 189:66] + node _T_356 = bits(ldst_byteen_hi_m, 1, 1) @[lsu_bus_intf.scala 189:89] + node _T_357 = eq(_T_356, UInt<1>("h00")) @[lsu_bus_intf.scala 189:72] + node _T_358 = or(_T_355, _T_357) @[lsu_bus_intf.scala 189:70] + node _T_359 = bits(ld_byte_hit_hi, 2, 2) @[lsu_bus_intf.scala 189:66] + node _T_360 = bits(ldst_byteen_hi_m, 2, 2) @[lsu_bus_intf.scala 189:89] + node _T_361 = eq(_T_360, UInt<1>("h00")) @[lsu_bus_intf.scala 189:72] + node _T_362 = or(_T_359, _T_361) @[lsu_bus_intf.scala 189:70] + node _T_363 = bits(ld_byte_hit_hi, 3, 3) @[lsu_bus_intf.scala 189:66] + node _T_364 = bits(ldst_byteen_hi_m, 3, 3) @[lsu_bus_intf.scala 189:89] + node _T_365 = eq(_T_364, UInt<1>("h00")) @[lsu_bus_intf.scala 189:72] + node _T_366 = or(_T_363, _T_365) @[lsu_bus_intf.scala 189:70] + node _T_367 = and(_T_354, _T_358) @[lsu_bus_intf.scala 189:111] + node _T_368 = and(_T_367, _T_362) @[lsu_bus_intf.scala 189:111] + node _T_369 = and(_T_368, _T_366) @[lsu_bus_intf.scala 189:111] + ld_full_hit_hi_m <= _T_369 @[lsu_bus_intf.scala 189:27] + node _T_370 = and(ld_full_hit_lo_m, ld_full_hit_hi_m) @[lsu_bus_intf.scala 190:47] + node _T_371 = and(_T_370, io.lsu_busreq_m) @[lsu_bus_intf.scala 190:66] + node _T_372 = and(_T_371, io.lsu_pkt_m.bits.load) @[lsu_bus_intf.scala 190:84] + node _T_373 = eq(io.is_sideeffects_m, UInt<1>("h00")) @[lsu_bus_intf.scala 190:111] + node _T_374 = and(_T_372, _T_373) @[lsu_bus_intf.scala 190:109] + ld_full_hit_m <= _T_374 @[lsu_bus_intf.scala 190:27] + node _T_375 = bits(ld_fwddata_hi, 31, 0) @[lsu_bus_intf.scala 191:47] + node _T_376 = bits(ld_fwddata_lo, 31, 0) @[lsu_bus_intf.scala 191:68] node _T_377 = cat(_T_375, _T_376) @[Cat.scala 29:58] - node _T_378 = bits(io.lsu_addr_m, 1, 0) @[lsu_bus_intf.scala 192:97] - node _T_379 = mul(UInt<4>("h08"), _T_378) @[lsu_bus_intf.scala 192:83] - node _T_380 = dshr(_T_377, _T_379) @[lsu_bus_intf.scala 192:76] - ld_fwddata_m <= _T_380 @[lsu_bus_intf.scala 192:27] - node _T_381 = bits(ld_fwddata_m, 31, 0) @[lsu_bus_intf.scala 193:42] - io.bus_read_data_m <= _T_381 @[lsu_bus_intf.scala 193:27] - reg _T_382 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_intf.scala 196:32] - _T_382 <= io.lsu_bus_clk_en @[lsu_bus_intf.scala 196:32] - lsu_bus_clk_en_q <= _T_382 @[lsu_bus_intf.scala 196:22] - reg _T_383 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_intf.scala 199:27] - _T_383 <= ldst_dual_d @[lsu_bus_intf.scala 199:27] - ldst_dual_m <= _T_383 @[lsu_bus_intf.scala 199:17] - reg _T_384 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_intf.scala 202:33] - _T_384 <= ldst_dual_m @[lsu_bus_intf.scala 202:33] - ldst_dual_r <= _T_384 @[lsu_bus_intf.scala 202:23] - reg _T_385 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_intf.scala 203:33] - _T_385 <= io.is_sideeffects_m @[lsu_bus_intf.scala 203:33] - is_sideeffects_r <= _T_385 @[lsu_bus_intf.scala 203:23] - reg _T_386 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<4>("h00"))) @[lsu_bus_intf.scala 204:33] - _T_386 <= ldst_byteen_m @[lsu_bus_intf.scala 204:33] - ldst_byteen_r <= _T_386 @[lsu_bus_intf.scala 204:23] + node _T_378 = bits(io.lsu_addr_m, 1, 0) @[lsu_bus_intf.scala 191:97] + node _T_379 = mul(UInt<4>("h08"), _T_378) @[lsu_bus_intf.scala 191:83] + node _T_380 = dshr(_T_377, _T_379) @[lsu_bus_intf.scala 191:76] + ld_fwddata_m <= _T_380 @[lsu_bus_intf.scala 191:27] + node _T_381 = bits(ld_fwddata_m, 31, 0) @[lsu_bus_intf.scala 192:42] + io.bus_read_data_m <= _T_381 @[lsu_bus_intf.scala 192:27] + reg _T_382 : UInt<1>, io.free_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_intf.scala 195:32] + _T_382 <= io.lsu_bus_clk_en @[lsu_bus_intf.scala 195:32] + lsu_bus_clk_en_q <= _T_382 @[lsu_bus_intf.scala 195:22] + reg _T_383 : UInt<1>, io.lsu_c1_m_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_intf.scala 198:27] + _T_383 <= ldst_dual_d @[lsu_bus_intf.scala 198:27] + ldst_dual_m <= _T_383 @[lsu_bus_intf.scala 198:17] + reg _T_384 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_intf.scala 201:33] + _T_384 <= ldst_dual_m @[lsu_bus_intf.scala 201:33] + ldst_dual_r <= _T_384 @[lsu_bus_intf.scala 201:23] + reg _T_385 : UInt<1>, io.lsu_c1_r_clk with : (reset => (reset, UInt<1>("h00"))) @[lsu_bus_intf.scala 202:33] + _T_385 <= io.is_sideeffects_m @[lsu_bus_intf.scala 202:33] + is_sideeffects_r <= _T_385 @[lsu_bus_intf.scala 202:23] + reg _T_386 : UInt, io.lsu_c1_r_clk with : (reset => (reset, UInt<4>("h00"))) @[lsu_bus_intf.scala 203:33] + _T_386 <= ldst_byteen_m @[lsu_bus_intf.scala 203:33] + ldst_byteen_r <= _T_386 @[lsu_bus_intf.scala 203:23] module lsu : input clock : Clock @@ -102068,7 +102068,7 @@ circuit quasar_wrapper : io.lsu_pic.picm_rden <= dccm_ctl.io.lsu_pic.picm_rden @[lsu.scala 196:14] io.lsu_pic.picm_wren <= dccm_ctl.io.lsu_pic.picm_wren @[lsu.scala 196:14] stbuf.io.lsu_c1_m_clk <= clkdomain.io.lsu_c1_m_clk @[lsu.scala 199:49] - stbuf.io.lsu_c1_r_clk <= clkdomain.io.lsu_c1_m_clk @[lsu.scala 200:48] + stbuf.io.lsu_c1_r_clk <= clkdomain.io.lsu_c1_r_clk @[lsu.scala 200:48] stbuf.io.lsu_stbuf_c1_clk <= clkdomain.io.lsu_stbuf_c1_clk @[lsu.scala 201:54] stbuf.io.lsu_free_c2_clk <= clkdomain.io.lsu_free_c2_clk @[lsu.scala 202:54] stbuf.io.lsu_pkt_m.bits.store_data_bypass_m <= lsu_lsc_ctl.io.lsu_pkt_m.bits.store_data_bypass_m @[lsu.scala 203:48] diff --git a/quasar_wrapper.v b/quasar_wrapper.v index 76a2e207..58f085d8 100644 --- a/quasar_wrapper.v +++ b/quasar_wrapper.v @@ -67840,33 +67840,33 @@ module lsu_clkdomain( wire rvclkhdr_11_io_clk; // @[lib.scala 327:22] wire rvclkhdr_11_io_en; // @[lib.scala 327:22] wire rvclkhdr_11_io_scan_mode; // @[lib.scala 327:22] - wire _T = io_lsu_p_valid | io_dma_dccm_req; // @[lsu_clkdomain.scala 63:51] - reg lsu_c1_d_clken_q; // @[lsu_clkdomain.scala 82:67] - wire _T_1 = io_lsu_pkt_d_valid | lsu_c1_d_clken_q; // @[lsu_clkdomain.scala 64:51] - wire lsu_c1_m_clken = _T_1 | io_clk_override; // @[lsu_clkdomain.scala 64:70] - reg lsu_c1_m_clken_q; // @[lsu_clkdomain.scala 83:67] - wire _T_2 = io_lsu_pkt_m_valid | lsu_c1_m_clken_q; // @[lsu_clkdomain.scala 65:51] - wire lsu_c1_r_clken = _T_2 | io_clk_override; // @[lsu_clkdomain.scala 65:70] - wire _T_3 = lsu_c1_m_clken | lsu_c1_m_clken_q; // @[lsu_clkdomain.scala 67:47] - reg lsu_c1_r_clken_q; // @[lsu_clkdomain.scala 84:67] - wire _T_4 = lsu_c1_r_clken | lsu_c1_r_clken_q; // @[lsu_clkdomain.scala 68:47] - wire _T_5 = lsu_c1_m_clken & io_lsu_pkt_d_bits_store; // @[lsu_clkdomain.scala 70:49] - wire _T_6 = lsu_c1_r_clken & io_lsu_pkt_m_bits_store; // @[lsu_clkdomain.scala 71:49] - wire _T_7 = io_ldst_stbuf_reqvld_r | io_stbuf_reqvld_any; // @[lsu_clkdomain.scala 72:55] - wire _T_8 = _T_7 | io_stbuf_reqvld_flushed_any; // @[lsu_clkdomain.scala 72:77] - wire _T_9 = io_lsu_bus_buffer_pend_any | io_lsu_busreq_r; // @[lsu_clkdomain.scala 74:61] - wire _T_10 = _T_9 | io_clk_override; // @[lsu_clkdomain.scala 74:79] - wire _T_11 = ~io_lsu_bus_buffer_empty_any; // @[lsu_clkdomain.scala 75:32] - wire _T_12 = _T_11 | io_lsu_busreq_r; // @[lsu_clkdomain.scala 75:61] - wire _T_13 = io_lsu_p_valid | io_lsu_pkt_d_valid; // @[lsu_clkdomain.scala 77:48] - wire _T_14 = _T_13 | io_lsu_pkt_m_valid; // @[lsu_clkdomain.scala 77:69] - wire _T_15 = _T_14 | io_lsu_pkt_r_valid; // @[lsu_clkdomain.scala 77:90] - wire _T_17 = _T_15 | _T_11; // @[lsu_clkdomain.scala 77:112] - wire _T_18 = ~io_lsu_stbuf_empty_any; // @[lsu_clkdomain.scala 77:145] - wire _T_19 = _T_17 | _T_18; // @[lsu_clkdomain.scala 77:143] - wire lsu_free_c1_clken = _T_19 | io_clk_override; // @[lsu_clkdomain.scala 77:169] - reg lsu_free_c1_clken_q; // @[lsu_clkdomain.scala 81:60] - wire _T_20 = lsu_free_c1_clken | lsu_free_c1_clken_q; // @[lsu_clkdomain.scala 78:50] + wire _T = io_lsu_p_valid | io_dma_dccm_req; // @[lsu_clkdomain.scala 62:51] + reg lsu_c1_d_clken_q; // @[lsu_clkdomain.scala 81:67] + wire _T_1 = io_lsu_pkt_d_valid | lsu_c1_d_clken_q; // @[lsu_clkdomain.scala 63:51] + wire lsu_c1_m_clken = _T_1 | io_clk_override; // @[lsu_clkdomain.scala 63:70] + reg lsu_c1_m_clken_q; // @[lsu_clkdomain.scala 82:67] + wire _T_2 = io_lsu_pkt_m_valid | lsu_c1_m_clken_q; // @[lsu_clkdomain.scala 64:51] + wire lsu_c1_r_clken = _T_2 | io_clk_override; // @[lsu_clkdomain.scala 64:70] + wire _T_3 = lsu_c1_m_clken | lsu_c1_m_clken_q; // @[lsu_clkdomain.scala 66:47] + reg lsu_c1_r_clken_q; // @[lsu_clkdomain.scala 83:67] + wire _T_4 = lsu_c1_r_clken | lsu_c1_r_clken_q; // @[lsu_clkdomain.scala 67:47] + wire _T_5 = lsu_c1_m_clken & io_lsu_pkt_d_bits_store; // @[lsu_clkdomain.scala 69:49] + wire _T_6 = lsu_c1_r_clken & io_lsu_pkt_m_bits_store; // @[lsu_clkdomain.scala 70:49] + wire _T_7 = io_ldst_stbuf_reqvld_r | io_stbuf_reqvld_any; // @[lsu_clkdomain.scala 71:55] + wire _T_8 = _T_7 | io_stbuf_reqvld_flushed_any; // @[lsu_clkdomain.scala 71:77] + wire _T_9 = io_lsu_bus_buffer_pend_any | io_lsu_busreq_r; // @[lsu_clkdomain.scala 73:61] + wire _T_10 = _T_9 | io_clk_override; // @[lsu_clkdomain.scala 73:79] + wire _T_11 = ~io_lsu_bus_buffer_empty_any; // @[lsu_clkdomain.scala 74:32] + wire _T_12 = _T_11 | io_lsu_busreq_r; // @[lsu_clkdomain.scala 74:61] + wire _T_13 = io_lsu_p_valid | io_lsu_pkt_d_valid; // @[lsu_clkdomain.scala 76:48] + wire _T_14 = _T_13 | io_lsu_pkt_m_valid; // @[lsu_clkdomain.scala 76:69] + wire _T_15 = _T_14 | io_lsu_pkt_r_valid; // @[lsu_clkdomain.scala 76:90] + wire _T_17 = _T_15 | _T_11; // @[lsu_clkdomain.scala 76:112] + wire _T_18 = ~io_lsu_stbuf_empty_any; // @[lsu_clkdomain.scala 76:145] + wire _T_19 = _T_17 | _T_18; // @[lsu_clkdomain.scala 76:143] + wire lsu_free_c1_clken = _T_19 | io_clk_override; // @[lsu_clkdomain.scala 76:169] + reg lsu_free_c1_clken_q; // @[lsu_clkdomain.scala 80:60] + wire _T_20 = lsu_free_c1_clken | lsu_free_c1_clken_q; // @[lsu_clkdomain.scala 77:50] rvclkhdr rvclkhdr ( // @[lib.scala 327:22] .io_l1clk(rvclkhdr_io_l1clk), .io_clk(rvclkhdr_io_clk), @@ -67939,18 +67939,18 @@ module lsu_clkdomain( .io_en(rvclkhdr_11_io_en), .io_scan_mode(rvclkhdr_11_io_scan_mode) ); - assign io_lsu_c1_m_clk = rvclkhdr_io_l1clk; // @[lsu_clkdomain.scala 86:26] - assign io_lsu_c1_r_clk = rvclkhdr_1_io_l1clk; // @[lsu_clkdomain.scala 87:26] - assign io_lsu_c2_m_clk = rvclkhdr_2_io_l1clk; // @[lsu_clkdomain.scala 88:26] - assign io_lsu_c2_r_clk = rvclkhdr_3_io_l1clk; // @[lsu_clkdomain.scala 89:26] - assign io_lsu_store_c1_m_clk = rvclkhdr_4_io_l1clk; // @[lsu_clkdomain.scala 90:26] - assign io_lsu_store_c1_r_clk = rvclkhdr_5_io_l1clk; // @[lsu_clkdomain.scala 91:26] - assign io_lsu_stbuf_c1_clk = rvclkhdr_6_io_l1clk; // @[lsu_clkdomain.scala 92:26] - assign io_lsu_bus_obuf_c1_clk = rvclkhdr_8_io_l1clk; // @[lsu_clkdomain.scala 94:26] - assign io_lsu_bus_ibuf_c1_clk = rvclkhdr_7_io_l1clk; // @[lsu_clkdomain.scala 93:26] - assign io_lsu_bus_buf_c1_clk = rvclkhdr_9_io_l1clk; // @[lsu_clkdomain.scala 95:26] - assign io_lsu_busm_clk = rvclkhdr_10_io_l1clk; // @[lsu_clkdomain.scala 96:26] - assign io_lsu_free_c2_clk = rvclkhdr_11_io_l1clk; // @[lsu_clkdomain.scala 97:26] + assign io_lsu_c1_m_clk = rvclkhdr_io_l1clk; // @[lsu_clkdomain.scala 85:26] + assign io_lsu_c1_r_clk = rvclkhdr_1_io_l1clk; // @[lsu_clkdomain.scala 86:26] + assign io_lsu_c2_m_clk = rvclkhdr_2_io_l1clk; // @[lsu_clkdomain.scala 87:26] + assign io_lsu_c2_r_clk = rvclkhdr_3_io_l1clk; // @[lsu_clkdomain.scala 88:26] + assign io_lsu_store_c1_m_clk = rvclkhdr_4_io_l1clk; // @[lsu_clkdomain.scala 89:26] + assign io_lsu_store_c1_r_clk = rvclkhdr_5_io_l1clk; // @[lsu_clkdomain.scala 90:26] + assign io_lsu_stbuf_c1_clk = rvclkhdr_6_io_l1clk; // @[lsu_clkdomain.scala 91:26] + assign io_lsu_bus_obuf_c1_clk = rvclkhdr_8_io_l1clk; // @[lsu_clkdomain.scala 93:26] + assign io_lsu_bus_ibuf_c1_clk = rvclkhdr_7_io_l1clk; // @[lsu_clkdomain.scala 92:26] + assign io_lsu_bus_buf_c1_clk = rvclkhdr_9_io_l1clk; // @[lsu_clkdomain.scala 94:26] + assign io_lsu_busm_clk = rvclkhdr_10_io_l1clk; // @[lsu_clkdomain.scala 95:26] + assign io_lsu_free_c2_clk = rvclkhdr_11_io_l1clk; // @[lsu_clkdomain.scala 96:26] assign rvclkhdr_io_clk = clock; // @[lib.scala 328:17] assign rvclkhdr_io_en = _T_1 | io_clk_override; // @[lib.scala 329:16] assign rvclkhdr_io_scan_mode = io_scan_mode; // @[lib.scala 330:23] @@ -72739,202 +72739,202 @@ module lsu_bus_intf( reg [31:0] _RAND_3; reg [31:0] _RAND_4; `endif // RANDOMIZE_REG_INIT - wire bus_buffer_clock; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_reset; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_scan_mode; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_tlu_busbuff_lsu_pmu_bus_trxn; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_tlu_busbuff_lsu_pmu_bus_misaligned; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_tlu_busbuff_lsu_pmu_bus_error; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_tlu_busbuff_lsu_pmu_bus_busy; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_tlu_busbuff_dec_tlu_external_ldfwd_disable; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_tlu_busbuff_dec_tlu_wb_coalescing_disable; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_tlu_busbuff_lsu_imprecise_error_load_any; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_tlu_busbuff_lsu_imprecise_error_store_any; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_tlu_busbuff_lsu_imprecise_error_addr_any; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_dctl_busbuff_lsu_nonblock_load_valid_m; // @[lsu_bus_intf.scala 102:39] - wire [1:0] bus_buffer_io_dctl_busbuff_lsu_nonblock_load_tag_m; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_dctl_busbuff_lsu_nonblock_load_inv_r; // @[lsu_bus_intf.scala 102:39] - wire [1:0] bus_buffer_io_dctl_busbuff_lsu_nonblock_load_inv_tag_r; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_valid; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_error; // @[lsu_bus_intf.scala 102:39] - wire [1:0] bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_tag; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_dec_tlu_force_halt; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_c2_r_clk; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_bus_ibuf_c1_clk; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_bus_obuf_c1_clk; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_bus_buf_c1_clk; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_free_c2_clk; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_busm_clk; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_dec_lsu_valid_raw_d; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_pkt_m_valid; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_pkt_m_bits_load; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_pkt_r_bits_by; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_pkt_r_bits_half; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_pkt_r_bits_word; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_pkt_r_bits_load; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_pkt_r_bits_unsign; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_lsu_addr_m; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_end_addr_m; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_lsu_addr_r; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_end_addr_r; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_store_data_r; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_no_word_merge_r; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_no_dword_merge_r; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_busreq_m; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_ld_full_hit_m; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_flush_m_up; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_flush_r; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_commit_r; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_is_sideeffects_r; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_ldst_dual_d; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_ldst_dual_m; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_ldst_dual_r; // @[lsu_bus_intf.scala 102:39] - wire [7:0] bus_buffer_io_ldst_byteen_ext_m; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_aw_ready; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_aw_valid; // @[lsu_bus_intf.scala 102:39] - wire [2:0] bus_buffer_io_lsu_axi_aw_bits_id; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_lsu_axi_aw_bits_addr; // @[lsu_bus_intf.scala 102:39] - wire [3:0] bus_buffer_io_lsu_axi_aw_bits_region; // @[lsu_bus_intf.scala 102:39] - wire [2:0] bus_buffer_io_lsu_axi_aw_bits_size; // @[lsu_bus_intf.scala 102:39] - wire [3:0] bus_buffer_io_lsu_axi_aw_bits_cache; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_w_ready; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_w_valid; // @[lsu_bus_intf.scala 102:39] - wire [63:0] bus_buffer_io_lsu_axi_w_bits_data; // @[lsu_bus_intf.scala 102:39] - wire [7:0] bus_buffer_io_lsu_axi_w_bits_strb; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_b_ready; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_b_valid; // @[lsu_bus_intf.scala 102:39] - wire [1:0] bus_buffer_io_lsu_axi_b_bits_resp; // @[lsu_bus_intf.scala 102:39] - wire [2:0] bus_buffer_io_lsu_axi_b_bits_id; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_ar_ready; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_ar_valid; // @[lsu_bus_intf.scala 102:39] - wire [2:0] bus_buffer_io_lsu_axi_ar_bits_id; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_lsu_axi_ar_bits_addr; // @[lsu_bus_intf.scala 102:39] - wire [3:0] bus_buffer_io_lsu_axi_ar_bits_region; // @[lsu_bus_intf.scala 102:39] - wire [2:0] bus_buffer_io_lsu_axi_ar_bits_size; // @[lsu_bus_intf.scala 102:39] - wire [3:0] bus_buffer_io_lsu_axi_ar_bits_cache; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_r_ready; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_axi_r_valid; // @[lsu_bus_intf.scala 102:39] - wire [2:0] bus_buffer_io_lsu_axi_r_bits_id; // @[lsu_bus_intf.scala 102:39] - wire [63:0] bus_buffer_io_lsu_axi_r_bits_data; // @[lsu_bus_intf.scala 102:39] - wire [1:0] bus_buffer_io_lsu_axi_r_bits_resp; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_bus_clk_en; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_bus_clk_en_q; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_busreq_r; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_bus_buffer_pend_any; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_bus_buffer_full_any; // @[lsu_bus_intf.scala 102:39] - wire bus_buffer_io_lsu_bus_buffer_empty_any; // @[lsu_bus_intf.scala 102:39] - wire [3:0] bus_buffer_io_ld_byte_hit_buf_lo; // @[lsu_bus_intf.scala 102:39] - wire [3:0] bus_buffer_io_ld_byte_hit_buf_hi; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_ld_fwddata_buf_lo; // @[lsu_bus_intf.scala 102:39] - wire [31:0] bus_buffer_io_ld_fwddata_buf_hi; // @[lsu_bus_intf.scala 102:39] + wire bus_buffer_clock; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_reset; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_scan_mode; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_tlu_busbuff_lsu_pmu_bus_trxn; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_tlu_busbuff_lsu_pmu_bus_misaligned; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_tlu_busbuff_lsu_pmu_bus_error; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_tlu_busbuff_lsu_pmu_bus_busy; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_tlu_busbuff_dec_tlu_external_ldfwd_disable; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_tlu_busbuff_dec_tlu_wb_coalescing_disable; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_tlu_busbuff_lsu_imprecise_error_load_any; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_tlu_busbuff_lsu_imprecise_error_store_any; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_tlu_busbuff_lsu_imprecise_error_addr_any; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_dctl_busbuff_lsu_nonblock_load_valid_m; // @[lsu_bus_intf.scala 101:39] + wire [1:0] bus_buffer_io_dctl_busbuff_lsu_nonblock_load_tag_m; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_dctl_busbuff_lsu_nonblock_load_inv_r; // @[lsu_bus_intf.scala 101:39] + wire [1:0] bus_buffer_io_dctl_busbuff_lsu_nonblock_load_inv_tag_r; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_valid; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_error; // @[lsu_bus_intf.scala 101:39] + wire [1:0] bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_tag; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_dec_tlu_force_halt; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_c2_r_clk; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_bus_ibuf_c1_clk; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_bus_obuf_c1_clk; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_bus_buf_c1_clk; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_free_c2_clk; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_busm_clk; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_dec_lsu_valid_raw_d; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_pkt_m_valid; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_pkt_m_bits_load; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_pkt_r_bits_by; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_pkt_r_bits_half; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_pkt_r_bits_word; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_pkt_r_bits_load; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_pkt_r_bits_unsign; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_lsu_addr_m; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_end_addr_m; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_lsu_addr_r; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_end_addr_r; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_store_data_r; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_no_word_merge_r; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_no_dword_merge_r; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_busreq_m; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_ld_full_hit_m; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_flush_m_up; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_flush_r; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_commit_r; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_is_sideeffects_r; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_ldst_dual_d; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_ldst_dual_m; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_ldst_dual_r; // @[lsu_bus_intf.scala 101:39] + wire [7:0] bus_buffer_io_ldst_byteen_ext_m; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_aw_ready; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_aw_valid; // @[lsu_bus_intf.scala 101:39] + wire [2:0] bus_buffer_io_lsu_axi_aw_bits_id; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_lsu_axi_aw_bits_addr; // @[lsu_bus_intf.scala 101:39] + wire [3:0] bus_buffer_io_lsu_axi_aw_bits_region; // @[lsu_bus_intf.scala 101:39] + wire [2:0] bus_buffer_io_lsu_axi_aw_bits_size; // @[lsu_bus_intf.scala 101:39] + wire [3:0] bus_buffer_io_lsu_axi_aw_bits_cache; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_w_ready; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_w_valid; // @[lsu_bus_intf.scala 101:39] + wire [63:0] bus_buffer_io_lsu_axi_w_bits_data; // @[lsu_bus_intf.scala 101:39] + wire [7:0] bus_buffer_io_lsu_axi_w_bits_strb; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_b_ready; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_b_valid; // @[lsu_bus_intf.scala 101:39] + wire [1:0] bus_buffer_io_lsu_axi_b_bits_resp; // @[lsu_bus_intf.scala 101:39] + wire [2:0] bus_buffer_io_lsu_axi_b_bits_id; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_ar_ready; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_ar_valid; // @[lsu_bus_intf.scala 101:39] + wire [2:0] bus_buffer_io_lsu_axi_ar_bits_id; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_lsu_axi_ar_bits_addr; // @[lsu_bus_intf.scala 101:39] + wire [3:0] bus_buffer_io_lsu_axi_ar_bits_region; // @[lsu_bus_intf.scala 101:39] + wire [2:0] bus_buffer_io_lsu_axi_ar_bits_size; // @[lsu_bus_intf.scala 101:39] + wire [3:0] bus_buffer_io_lsu_axi_ar_bits_cache; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_r_ready; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_axi_r_valid; // @[lsu_bus_intf.scala 101:39] + wire [2:0] bus_buffer_io_lsu_axi_r_bits_id; // @[lsu_bus_intf.scala 101:39] + wire [63:0] bus_buffer_io_lsu_axi_r_bits_data; // @[lsu_bus_intf.scala 101:39] + wire [1:0] bus_buffer_io_lsu_axi_r_bits_resp; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_bus_clk_en; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_bus_clk_en_q; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_busreq_r; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_bus_buffer_pend_any; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_bus_buffer_full_any; // @[lsu_bus_intf.scala 101:39] + wire bus_buffer_io_lsu_bus_buffer_empty_any; // @[lsu_bus_intf.scala 101:39] + wire [3:0] bus_buffer_io_ld_byte_hit_buf_lo; // @[lsu_bus_intf.scala 101:39] + wire [3:0] bus_buffer_io_ld_byte_hit_buf_hi; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_ld_fwddata_buf_lo; // @[lsu_bus_intf.scala 101:39] + wire [31:0] bus_buffer_io_ld_fwddata_buf_hi; // @[lsu_bus_intf.scala 101:39] wire [3:0] _T_3 = io_lsu_pkt_m_bits_word ? 4'hf : 4'h0; // @[Mux.scala 27:72] wire [3:0] _T_4 = io_lsu_pkt_m_bits_half ? 4'h3 : 4'h0; // @[Mux.scala 27:72] wire [3:0] _T_5 = io_lsu_pkt_m_bits_by ? 4'h1 : 4'h0; // @[Mux.scala 27:72] wire [3:0] _T_6 = _T_3 | _T_4; // @[Mux.scala 27:72] wire [3:0] ldst_byteen_m = _T_6 | _T_5; // @[Mux.scala 27:72] - wire addr_match_dw_lo_r_m = io_lsu_addr_r[31:3] == io_lsu_addr_m[31:3]; // @[lsu_bus_intf.scala 156:51] - wire _T_17 = io_lsu_addr_r[2] ^ io_lsu_addr_m[2]; // @[lsu_bus_intf.scala 157:71] - wire _T_18 = ~_T_17; // @[lsu_bus_intf.scala 157:53] - wire addr_match_word_lo_r_m = addr_match_dw_lo_r_m & _T_18; // @[lsu_bus_intf.scala 157:51] - reg ldst_dual_r; // @[lsu_bus_intf.scala 202:33] - wire _T_20 = ~ldst_dual_r; // @[lsu_bus_intf.scala 158:48] - wire _T_21 = io_lsu_busreq_r & _T_20; // @[lsu_bus_intf.scala 158:46] - wire _T_22 = _T_21 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 158:61] - wire _T_23 = ~addr_match_word_lo_r_m; // @[lsu_bus_intf.scala 158:107] - wire _T_24 = io_lsu_pkt_m_bits_load | _T_23; // @[lsu_bus_intf.scala 158:105] - wire _T_29 = ~addr_match_dw_lo_r_m; // @[lsu_bus_intf.scala 159:107] - wire _T_30 = io_lsu_pkt_m_bits_load | _T_29; // @[lsu_bus_intf.scala 159:105] - wire [6:0] _GEN_0 = {{3'd0}, ldst_byteen_m}; // @[lsu_bus_intf.scala 161:49] - wire [6:0] _T_34 = _GEN_0 << io_lsu_addr_m[1:0]; // @[lsu_bus_intf.scala 161:49] - reg [3:0] ldst_byteen_r; // @[lsu_bus_intf.scala 204:33] - wire [6:0] _GEN_1 = {{3'd0}, ldst_byteen_r}; // @[lsu_bus_intf.scala 162:49] - wire [6:0] _T_37 = _GEN_1 << io_lsu_addr_r[1:0]; // @[lsu_bus_intf.scala 162:49] + wire addr_match_dw_lo_r_m = io_lsu_addr_r[31:3] == io_lsu_addr_m[31:3]; // @[lsu_bus_intf.scala 155:51] + wire _T_17 = io_lsu_addr_r[2] ^ io_lsu_addr_m[2]; // @[lsu_bus_intf.scala 156:71] + wire _T_18 = ~_T_17; // @[lsu_bus_intf.scala 156:53] + wire addr_match_word_lo_r_m = addr_match_dw_lo_r_m & _T_18; // @[lsu_bus_intf.scala 156:51] + reg ldst_dual_r; // @[lsu_bus_intf.scala 201:33] + wire _T_20 = ~ldst_dual_r; // @[lsu_bus_intf.scala 157:48] + wire _T_21 = io_lsu_busreq_r & _T_20; // @[lsu_bus_intf.scala 157:46] + wire _T_22 = _T_21 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 157:61] + wire _T_23 = ~addr_match_word_lo_r_m; // @[lsu_bus_intf.scala 157:107] + wire _T_24 = io_lsu_pkt_m_bits_load | _T_23; // @[lsu_bus_intf.scala 157:105] + wire _T_29 = ~addr_match_dw_lo_r_m; // @[lsu_bus_intf.scala 158:107] + wire _T_30 = io_lsu_pkt_m_bits_load | _T_29; // @[lsu_bus_intf.scala 158:105] + wire [6:0] _GEN_0 = {{3'd0}, ldst_byteen_m}; // @[lsu_bus_intf.scala 160:49] + wire [6:0] _T_34 = _GEN_0 << io_lsu_addr_m[1:0]; // @[lsu_bus_intf.scala 160:49] + reg [3:0] ldst_byteen_r; // @[lsu_bus_intf.scala 203:33] + wire [6:0] _GEN_1 = {{3'd0}, ldst_byteen_r}; // @[lsu_bus_intf.scala 161:49] + wire [6:0] _T_37 = _GEN_1 << io_lsu_addr_r[1:0]; // @[lsu_bus_intf.scala 161:49] wire [4:0] _T_40 = {io_lsu_addr_r[1:0],3'h0}; // @[Cat.scala 29:58] - wire [62:0] _GEN_2 = {{31'd0}, io_store_data_r}; // @[lsu_bus_intf.scala 163:52] - wire [62:0] _T_41 = _GEN_2 << _T_40; // @[lsu_bus_intf.scala 163:52] - wire [7:0] ldst_byteen_ext_m = {{1'd0}, _T_34}; // @[lsu_bus_intf.scala 161:27] - wire [3:0] ldst_byteen_hi_m = ldst_byteen_ext_m[7:4]; // @[lsu_bus_intf.scala 164:47] - wire [3:0] ldst_byteen_lo_m = ldst_byteen_ext_m[3:0]; // @[lsu_bus_intf.scala 165:47] - wire [7:0] ldst_byteen_ext_r = {{1'd0}, _T_37}; // @[lsu_bus_intf.scala 162:27] - wire [3:0] ldst_byteen_hi_r = ldst_byteen_ext_r[7:4]; // @[lsu_bus_intf.scala 166:47] - wire [3:0] ldst_byteen_lo_r = ldst_byteen_ext_r[3:0]; // @[lsu_bus_intf.scala 167:47] - wire [63:0] store_data_ext_r = {{1'd0}, _T_41}; // @[lsu_bus_intf.scala 163:27] - wire [31:0] store_data_hi_r = store_data_ext_r[63:32]; // @[lsu_bus_intf.scala 169:46] - wire [31:0] store_data_lo_r = store_data_ext_r[31:0]; // @[lsu_bus_intf.scala 170:46] - wire _T_50 = io_lsu_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[lsu_bus_intf.scala 171:51] - wire _T_51 = _T_50 & io_lsu_pkt_r_valid; // @[lsu_bus_intf.scala 171:76] - wire _T_52 = _T_51 & io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 171:97] - wire ld_addr_rhit_lo_lo = _T_52 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 171:123] - wire _T_56 = io_end_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[lsu_bus_intf.scala 172:51] - wire _T_57 = _T_56 & io_lsu_pkt_r_valid; // @[lsu_bus_intf.scala 172:76] - wire _T_58 = _T_57 & io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 172:97] - wire ld_addr_rhit_lo_hi = _T_58 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 172:123] - wire _T_62 = io_lsu_addr_m[31:2] == io_end_addr_r[31:2]; // @[lsu_bus_intf.scala 173:51] - wire _T_63 = _T_62 & io_lsu_pkt_r_valid; // @[lsu_bus_intf.scala 173:76] - wire _T_64 = _T_63 & io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 173:97] - wire ld_addr_rhit_hi_lo = _T_64 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 173:123] - wire _T_68 = io_end_addr_m[31:2] == io_end_addr_r[31:2]; // @[lsu_bus_intf.scala 174:51] - wire _T_69 = _T_68 & io_lsu_pkt_r_valid; // @[lsu_bus_intf.scala 174:76] - wire _T_70 = _T_69 & io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 174:97] - wire ld_addr_rhit_hi_hi = _T_70 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 174:123] - wire _T_73 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[0]; // @[lsu_bus_intf.scala 176:70] - wire _T_75 = _T_73 & ldst_byteen_lo_m[0]; // @[lsu_bus_intf.scala 176:92] - wire _T_77 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[1]; // @[lsu_bus_intf.scala 176:70] - wire _T_79 = _T_77 & ldst_byteen_lo_m[1]; // @[lsu_bus_intf.scala 176:92] - wire _T_81 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[2]; // @[lsu_bus_intf.scala 176:70] - wire _T_83 = _T_81 & ldst_byteen_lo_m[2]; // @[lsu_bus_intf.scala 176:92] - wire _T_85 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[3]; // @[lsu_bus_intf.scala 176:70] - wire _T_87 = _T_85 & ldst_byteen_lo_m[3]; // @[lsu_bus_intf.scala 176:92] + wire [62:0] _GEN_2 = {{31'd0}, io_store_data_r}; // @[lsu_bus_intf.scala 162:52] + wire [62:0] _T_41 = _GEN_2 << _T_40; // @[lsu_bus_intf.scala 162:52] + wire [7:0] ldst_byteen_ext_m = {{1'd0}, _T_34}; // @[lsu_bus_intf.scala 160:27] + wire [3:0] ldst_byteen_hi_m = ldst_byteen_ext_m[7:4]; // @[lsu_bus_intf.scala 163:47] + wire [3:0] ldst_byteen_lo_m = ldst_byteen_ext_m[3:0]; // @[lsu_bus_intf.scala 164:47] + wire [7:0] ldst_byteen_ext_r = {{1'd0}, _T_37}; // @[lsu_bus_intf.scala 161:27] + wire [3:0] ldst_byteen_hi_r = ldst_byteen_ext_r[7:4]; // @[lsu_bus_intf.scala 165:47] + wire [3:0] ldst_byteen_lo_r = ldst_byteen_ext_r[3:0]; // @[lsu_bus_intf.scala 166:47] + wire [63:0] store_data_ext_r = {{1'd0}, _T_41}; // @[lsu_bus_intf.scala 162:27] + wire [31:0] store_data_hi_r = store_data_ext_r[63:32]; // @[lsu_bus_intf.scala 168:46] + wire [31:0] store_data_lo_r = store_data_ext_r[31:0]; // @[lsu_bus_intf.scala 169:46] + wire _T_50 = io_lsu_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[lsu_bus_intf.scala 170:51] + wire _T_51 = _T_50 & io_lsu_pkt_r_valid; // @[lsu_bus_intf.scala 170:76] + wire _T_52 = _T_51 & io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 170:97] + wire ld_addr_rhit_lo_lo = _T_52 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 170:123] + wire _T_56 = io_end_addr_m[31:2] == io_lsu_addr_r[31:2]; // @[lsu_bus_intf.scala 171:51] + wire _T_57 = _T_56 & io_lsu_pkt_r_valid; // @[lsu_bus_intf.scala 171:76] + wire _T_58 = _T_57 & io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 171:97] + wire ld_addr_rhit_lo_hi = _T_58 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 171:123] + wire _T_62 = io_lsu_addr_m[31:2] == io_end_addr_r[31:2]; // @[lsu_bus_intf.scala 172:51] + wire _T_63 = _T_62 & io_lsu_pkt_r_valid; // @[lsu_bus_intf.scala 172:76] + wire _T_64 = _T_63 & io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 172:97] + wire ld_addr_rhit_hi_lo = _T_64 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 172:123] + wire _T_68 = io_end_addr_m[31:2] == io_end_addr_r[31:2]; // @[lsu_bus_intf.scala 173:51] + wire _T_69 = _T_68 & io_lsu_pkt_r_valid; // @[lsu_bus_intf.scala 173:76] + wire _T_70 = _T_69 & io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 173:97] + wire ld_addr_rhit_hi_hi = _T_70 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 173:123] + wire _T_73 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[0]; // @[lsu_bus_intf.scala 175:70] + wire _T_75 = _T_73 & ldst_byteen_lo_m[0]; // @[lsu_bus_intf.scala 175:92] + wire _T_77 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[1]; // @[lsu_bus_intf.scala 175:70] + wire _T_79 = _T_77 & ldst_byteen_lo_m[1]; // @[lsu_bus_intf.scala 175:92] + wire _T_81 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[2]; // @[lsu_bus_intf.scala 175:70] + wire _T_83 = _T_81 & ldst_byteen_lo_m[2]; // @[lsu_bus_intf.scala 175:92] + wire _T_85 = ld_addr_rhit_lo_lo & ldst_byteen_lo_r[3]; // @[lsu_bus_intf.scala 175:70] + wire _T_87 = _T_85 & ldst_byteen_lo_m[3]; // @[lsu_bus_intf.scala 175:92] wire [3:0] ld_byte_rhit_lo_lo = {_T_87,_T_83,_T_79,_T_75}; // @[Cat.scala 29:58] - wire _T_92 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[0]; // @[lsu_bus_intf.scala 177:70] - wire _T_94 = _T_92 & ldst_byteen_hi_m[0]; // @[lsu_bus_intf.scala 177:92] - wire _T_96 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[1]; // @[lsu_bus_intf.scala 177:70] - wire _T_98 = _T_96 & ldst_byteen_hi_m[1]; // @[lsu_bus_intf.scala 177:92] - wire _T_100 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[2]; // @[lsu_bus_intf.scala 177:70] - wire _T_102 = _T_100 & ldst_byteen_hi_m[2]; // @[lsu_bus_intf.scala 177:92] - wire _T_104 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[3]; // @[lsu_bus_intf.scala 177:70] - wire _T_106 = _T_104 & ldst_byteen_hi_m[3]; // @[lsu_bus_intf.scala 177:92] + wire _T_92 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[0]; // @[lsu_bus_intf.scala 176:70] + wire _T_94 = _T_92 & ldst_byteen_hi_m[0]; // @[lsu_bus_intf.scala 176:92] + wire _T_96 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[1]; // @[lsu_bus_intf.scala 176:70] + wire _T_98 = _T_96 & ldst_byteen_hi_m[1]; // @[lsu_bus_intf.scala 176:92] + wire _T_100 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[2]; // @[lsu_bus_intf.scala 176:70] + wire _T_102 = _T_100 & ldst_byteen_hi_m[2]; // @[lsu_bus_intf.scala 176:92] + wire _T_104 = ld_addr_rhit_lo_hi & ldst_byteen_lo_r[3]; // @[lsu_bus_intf.scala 176:70] + wire _T_106 = _T_104 & ldst_byteen_hi_m[3]; // @[lsu_bus_intf.scala 176:92] wire [3:0] ld_byte_rhit_lo_hi = {_T_106,_T_102,_T_98,_T_94}; // @[Cat.scala 29:58] - wire _T_111 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[0]; // @[lsu_bus_intf.scala 178:70] - wire _T_113 = _T_111 & ldst_byteen_lo_m[0]; // @[lsu_bus_intf.scala 178:92] - wire _T_115 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[1]; // @[lsu_bus_intf.scala 178:70] - wire _T_117 = _T_115 & ldst_byteen_lo_m[1]; // @[lsu_bus_intf.scala 178:92] - wire _T_119 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[2]; // @[lsu_bus_intf.scala 178:70] - wire _T_121 = _T_119 & ldst_byteen_lo_m[2]; // @[lsu_bus_intf.scala 178:92] - wire _T_123 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[3]; // @[lsu_bus_intf.scala 178:70] - wire _T_125 = _T_123 & ldst_byteen_lo_m[3]; // @[lsu_bus_intf.scala 178:92] + wire _T_111 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[0]; // @[lsu_bus_intf.scala 177:70] + wire _T_113 = _T_111 & ldst_byteen_lo_m[0]; // @[lsu_bus_intf.scala 177:92] + wire _T_115 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[1]; // @[lsu_bus_intf.scala 177:70] + wire _T_117 = _T_115 & ldst_byteen_lo_m[1]; // @[lsu_bus_intf.scala 177:92] + wire _T_119 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[2]; // @[lsu_bus_intf.scala 177:70] + wire _T_121 = _T_119 & ldst_byteen_lo_m[2]; // @[lsu_bus_intf.scala 177:92] + wire _T_123 = ld_addr_rhit_hi_lo & ldst_byteen_hi_r[3]; // @[lsu_bus_intf.scala 177:70] + wire _T_125 = _T_123 & ldst_byteen_lo_m[3]; // @[lsu_bus_intf.scala 177:92] wire [3:0] ld_byte_rhit_hi_lo = {_T_125,_T_121,_T_117,_T_113}; // @[Cat.scala 29:58] - wire _T_130 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[0]; // @[lsu_bus_intf.scala 179:70] - wire _T_132 = _T_130 & ldst_byteen_hi_m[0]; // @[lsu_bus_intf.scala 179:92] - wire _T_134 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[1]; // @[lsu_bus_intf.scala 179:70] - wire _T_136 = _T_134 & ldst_byteen_hi_m[1]; // @[lsu_bus_intf.scala 179:92] - wire _T_138 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[2]; // @[lsu_bus_intf.scala 179:70] - wire _T_140 = _T_138 & ldst_byteen_hi_m[2]; // @[lsu_bus_intf.scala 179:92] - wire _T_142 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[3]; // @[lsu_bus_intf.scala 179:70] - wire _T_144 = _T_142 & ldst_byteen_hi_m[3]; // @[lsu_bus_intf.scala 179:92] + wire _T_130 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[0]; // @[lsu_bus_intf.scala 178:70] + wire _T_132 = _T_130 & ldst_byteen_hi_m[0]; // @[lsu_bus_intf.scala 178:92] + wire _T_134 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[1]; // @[lsu_bus_intf.scala 178:70] + wire _T_136 = _T_134 & ldst_byteen_hi_m[1]; // @[lsu_bus_intf.scala 178:92] + wire _T_138 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[2]; // @[lsu_bus_intf.scala 178:70] + wire _T_140 = _T_138 & ldst_byteen_hi_m[2]; // @[lsu_bus_intf.scala 178:92] + wire _T_142 = ld_addr_rhit_hi_hi & ldst_byteen_hi_r[3]; // @[lsu_bus_intf.scala 178:70] + wire _T_144 = _T_142 & ldst_byteen_hi_m[3]; // @[lsu_bus_intf.scala 178:92] wire [3:0] ld_byte_rhit_hi_hi = {_T_144,_T_140,_T_136,_T_132}; // @[Cat.scala 29:58] - wire _T_150 = ld_byte_rhit_lo_lo[0] | ld_byte_rhit_hi_lo[0]; // @[lsu_bus_intf.scala 181:73] - wire [3:0] ld_byte_hit_buf_lo = bus_buffer_io_ld_byte_hit_buf_lo; // @[lsu_bus_intf.scala 139:38] - wire _T_152 = _T_150 | ld_byte_hit_buf_lo[0]; // @[lsu_bus_intf.scala 181:97] - wire _T_155 = ld_byte_rhit_lo_lo[1] | ld_byte_rhit_hi_lo[1]; // @[lsu_bus_intf.scala 181:73] - wire _T_157 = _T_155 | ld_byte_hit_buf_lo[1]; // @[lsu_bus_intf.scala 181:97] - wire _T_160 = ld_byte_rhit_lo_lo[2] | ld_byte_rhit_hi_lo[2]; // @[lsu_bus_intf.scala 181:73] - wire _T_162 = _T_160 | ld_byte_hit_buf_lo[2]; // @[lsu_bus_intf.scala 181:97] - wire _T_165 = ld_byte_rhit_lo_lo[3] | ld_byte_rhit_hi_lo[3]; // @[lsu_bus_intf.scala 181:73] - wire _T_167 = _T_165 | ld_byte_hit_buf_lo[3]; // @[lsu_bus_intf.scala 181:97] + wire _T_150 = ld_byte_rhit_lo_lo[0] | ld_byte_rhit_hi_lo[0]; // @[lsu_bus_intf.scala 180:73] + wire [3:0] ld_byte_hit_buf_lo = bus_buffer_io_ld_byte_hit_buf_lo; // @[lsu_bus_intf.scala 138:38] + wire _T_152 = _T_150 | ld_byte_hit_buf_lo[0]; // @[lsu_bus_intf.scala 180:97] + wire _T_155 = ld_byte_rhit_lo_lo[1] | ld_byte_rhit_hi_lo[1]; // @[lsu_bus_intf.scala 180:73] + wire _T_157 = _T_155 | ld_byte_hit_buf_lo[1]; // @[lsu_bus_intf.scala 180:97] + wire _T_160 = ld_byte_rhit_lo_lo[2] | ld_byte_rhit_hi_lo[2]; // @[lsu_bus_intf.scala 180:73] + wire _T_162 = _T_160 | ld_byte_hit_buf_lo[2]; // @[lsu_bus_intf.scala 180:97] + wire _T_165 = ld_byte_rhit_lo_lo[3] | ld_byte_rhit_hi_lo[3]; // @[lsu_bus_intf.scala 180:73] + wire _T_167 = _T_165 | ld_byte_hit_buf_lo[3]; // @[lsu_bus_intf.scala 180:97] wire [3:0] ld_byte_hit_lo = {_T_167,_T_162,_T_157,_T_152}; // @[Cat.scala 29:58] - wire _T_173 = ld_byte_rhit_lo_hi[0] | ld_byte_rhit_hi_hi[0]; // @[lsu_bus_intf.scala 182:73] - wire [3:0] ld_byte_hit_buf_hi = bus_buffer_io_ld_byte_hit_buf_hi; // @[lsu_bus_intf.scala 140:38] - wire _T_175 = _T_173 | ld_byte_hit_buf_hi[0]; // @[lsu_bus_intf.scala 182:97] - wire _T_178 = ld_byte_rhit_lo_hi[1] | ld_byte_rhit_hi_hi[1]; // @[lsu_bus_intf.scala 182:73] - wire _T_180 = _T_178 | ld_byte_hit_buf_hi[1]; // @[lsu_bus_intf.scala 182:97] - wire _T_183 = ld_byte_rhit_lo_hi[2] | ld_byte_rhit_hi_hi[2]; // @[lsu_bus_intf.scala 182:73] - wire _T_185 = _T_183 | ld_byte_hit_buf_hi[2]; // @[lsu_bus_intf.scala 182:97] - wire _T_188 = ld_byte_rhit_lo_hi[3] | ld_byte_rhit_hi_hi[3]; // @[lsu_bus_intf.scala 182:73] - wire _T_190 = _T_188 | ld_byte_hit_buf_hi[3]; // @[lsu_bus_intf.scala 182:97] + wire _T_173 = ld_byte_rhit_lo_hi[0] | ld_byte_rhit_hi_hi[0]; // @[lsu_bus_intf.scala 181:73] + wire [3:0] ld_byte_hit_buf_hi = bus_buffer_io_ld_byte_hit_buf_hi; // @[lsu_bus_intf.scala 139:38] + wire _T_175 = _T_173 | ld_byte_hit_buf_hi[0]; // @[lsu_bus_intf.scala 181:97] + wire _T_178 = ld_byte_rhit_lo_hi[1] | ld_byte_rhit_hi_hi[1]; // @[lsu_bus_intf.scala 181:73] + wire _T_180 = _T_178 | ld_byte_hit_buf_hi[1]; // @[lsu_bus_intf.scala 181:97] + wire _T_183 = ld_byte_rhit_lo_hi[2] | ld_byte_rhit_hi_hi[2]; // @[lsu_bus_intf.scala 181:73] + wire _T_185 = _T_183 | ld_byte_hit_buf_hi[2]; // @[lsu_bus_intf.scala 181:97] + wire _T_188 = ld_byte_rhit_lo_hi[3] | ld_byte_rhit_hi_hi[3]; // @[lsu_bus_intf.scala 181:73] + wire _T_190 = _T_188 | ld_byte_hit_buf_hi[3]; // @[lsu_bus_intf.scala 181:97] wire [3:0] ld_byte_hit_hi = {_T_190,_T_185,_T_180,_T_175}; // @[Cat.scala 29:58] wire [3:0] ld_byte_rhit_lo = {_T_165,_T_160,_T_155,_T_150}; // @[Cat.scala 29:58] wire [3:0] ld_byte_rhit_hi = {_T_188,_T_183,_T_178,_T_173}; // @[Cat.scala 29:58] @@ -72964,54 +72964,54 @@ module lsu_bus_intf( wire [7:0] _T_288 = ld_byte_rhit_hi_hi[3] ? store_data_hi_r[31:24] : 8'h0; // @[Mux.scala 27:72] wire [7:0] _T_289 = _T_287 | _T_288; // @[Mux.scala 27:72] wire [31:0] ld_fwddata_rpipe_hi = {_T_289,_T_281,_T_273,_T_265}; // @[Cat.scala 29:58] - wire [31:0] ld_fwddata_buf_lo = bus_buffer_io_ld_fwddata_buf_lo; // @[lsu_bus_intf.scala 141:38] - wire [7:0] _T_297 = ld_byte_rhit_lo[0] ? ld_fwddata_rpipe_lo[7:0] : ld_fwddata_buf_lo[7:0]; // @[lsu_bus_intf.scala 187:54] - wire [7:0] _T_301 = ld_byte_rhit_lo[1] ? ld_fwddata_rpipe_lo[15:8] : ld_fwddata_buf_lo[15:8]; // @[lsu_bus_intf.scala 187:54] - wire [7:0] _T_305 = ld_byte_rhit_lo[2] ? ld_fwddata_rpipe_lo[23:16] : ld_fwddata_buf_lo[23:16]; // @[lsu_bus_intf.scala 187:54] - wire [7:0] _T_309 = ld_byte_rhit_lo[3] ? ld_fwddata_rpipe_lo[31:24] : ld_fwddata_buf_lo[31:24]; // @[lsu_bus_intf.scala 187:54] + wire [31:0] ld_fwddata_buf_lo = bus_buffer_io_ld_fwddata_buf_lo; // @[lsu_bus_intf.scala 140:38] + wire [7:0] _T_297 = ld_byte_rhit_lo[0] ? ld_fwddata_rpipe_lo[7:0] : ld_fwddata_buf_lo[7:0]; // @[lsu_bus_intf.scala 186:54] + wire [7:0] _T_301 = ld_byte_rhit_lo[1] ? ld_fwddata_rpipe_lo[15:8] : ld_fwddata_buf_lo[15:8]; // @[lsu_bus_intf.scala 186:54] + wire [7:0] _T_305 = ld_byte_rhit_lo[2] ? ld_fwddata_rpipe_lo[23:16] : ld_fwddata_buf_lo[23:16]; // @[lsu_bus_intf.scala 186:54] + wire [7:0] _T_309 = ld_byte_rhit_lo[3] ? ld_fwddata_rpipe_lo[31:24] : ld_fwddata_buf_lo[31:24]; // @[lsu_bus_intf.scala 186:54] wire [31:0] _T_312 = {_T_309,_T_305,_T_301,_T_297}; // @[Cat.scala 29:58] - wire [31:0] ld_fwddata_buf_hi = bus_buffer_io_ld_fwddata_buf_hi; // @[lsu_bus_intf.scala 142:38] - wire [7:0] _T_316 = ld_byte_rhit_hi[0] ? ld_fwddata_rpipe_hi[7:0] : ld_fwddata_buf_hi[7:0]; // @[lsu_bus_intf.scala 188:54] - wire [7:0] _T_320 = ld_byte_rhit_hi[1] ? ld_fwddata_rpipe_hi[15:8] : ld_fwddata_buf_hi[15:8]; // @[lsu_bus_intf.scala 188:54] - wire [7:0] _T_324 = ld_byte_rhit_hi[2] ? ld_fwddata_rpipe_hi[23:16] : ld_fwddata_buf_hi[23:16]; // @[lsu_bus_intf.scala 188:54] - wire [7:0] _T_328 = ld_byte_rhit_hi[3] ? ld_fwddata_rpipe_hi[31:24] : ld_fwddata_buf_hi[31:24]; // @[lsu_bus_intf.scala 188:54] + wire [31:0] ld_fwddata_buf_hi = bus_buffer_io_ld_fwddata_buf_hi; // @[lsu_bus_intf.scala 141:38] + wire [7:0] _T_316 = ld_byte_rhit_hi[0] ? ld_fwddata_rpipe_hi[7:0] : ld_fwddata_buf_hi[7:0]; // @[lsu_bus_intf.scala 187:54] + wire [7:0] _T_320 = ld_byte_rhit_hi[1] ? ld_fwddata_rpipe_hi[15:8] : ld_fwddata_buf_hi[15:8]; // @[lsu_bus_intf.scala 187:54] + wire [7:0] _T_324 = ld_byte_rhit_hi[2] ? ld_fwddata_rpipe_hi[23:16] : ld_fwddata_buf_hi[23:16]; // @[lsu_bus_intf.scala 187:54] + wire [7:0] _T_328 = ld_byte_rhit_hi[3] ? ld_fwddata_rpipe_hi[31:24] : ld_fwddata_buf_hi[31:24]; // @[lsu_bus_intf.scala 187:54] wire [31:0] _T_331 = {_T_328,_T_324,_T_320,_T_316}; // @[Cat.scala 29:58] - wire _T_334 = ~ldst_byteen_lo_m[0]; // @[lsu_bus_intf.scala 189:72] - wire _T_335 = ld_byte_hit_lo[0] | _T_334; // @[lsu_bus_intf.scala 189:70] - wire _T_338 = ~ldst_byteen_lo_m[1]; // @[lsu_bus_intf.scala 189:72] - wire _T_339 = ld_byte_hit_lo[1] | _T_338; // @[lsu_bus_intf.scala 189:70] - wire _T_342 = ~ldst_byteen_lo_m[2]; // @[lsu_bus_intf.scala 189:72] - wire _T_343 = ld_byte_hit_lo[2] | _T_342; // @[lsu_bus_intf.scala 189:70] - wire _T_346 = ~ldst_byteen_lo_m[3]; // @[lsu_bus_intf.scala 189:72] - wire _T_347 = ld_byte_hit_lo[3] | _T_346; // @[lsu_bus_intf.scala 189:70] - wire _T_348 = _T_335 & _T_339; // @[lsu_bus_intf.scala 189:111] - wire _T_349 = _T_348 & _T_343; // @[lsu_bus_intf.scala 189:111] - wire ld_full_hit_lo_m = _T_349 & _T_347; // @[lsu_bus_intf.scala 189:111] - wire _T_353 = ~ldst_byteen_hi_m[0]; // @[lsu_bus_intf.scala 190:72] - wire _T_354 = ld_byte_hit_hi[0] | _T_353; // @[lsu_bus_intf.scala 190:70] - wire _T_357 = ~ldst_byteen_hi_m[1]; // @[lsu_bus_intf.scala 190:72] - wire _T_358 = ld_byte_hit_hi[1] | _T_357; // @[lsu_bus_intf.scala 190:70] - wire _T_361 = ~ldst_byteen_hi_m[2]; // @[lsu_bus_intf.scala 190:72] - wire _T_362 = ld_byte_hit_hi[2] | _T_361; // @[lsu_bus_intf.scala 190:70] - wire _T_365 = ~ldst_byteen_hi_m[3]; // @[lsu_bus_intf.scala 190:72] - wire _T_366 = ld_byte_hit_hi[3] | _T_365; // @[lsu_bus_intf.scala 190:70] - wire _T_367 = _T_354 & _T_358; // @[lsu_bus_intf.scala 190:111] - wire _T_368 = _T_367 & _T_362; // @[lsu_bus_intf.scala 190:111] - wire ld_full_hit_hi_m = _T_368 & _T_366; // @[lsu_bus_intf.scala 190:111] - wire _T_370 = ld_full_hit_lo_m & ld_full_hit_hi_m; // @[lsu_bus_intf.scala 191:47] - wire _T_371 = _T_370 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 191:66] - wire _T_372 = _T_371 & io_lsu_pkt_m_bits_load; // @[lsu_bus_intf.scala 191:84] - wire _T_373 = ~io_is_sideeffects_m; // @[lsu_bus_intf.scala 191:111] - wire [63:0] ld_fwddata_hi = {{32'd0}, _T_331}; // @[lsu_bus_intf.scala 188:27] - wire [63:0] ld_fwddata_lo = {{32'd0}, _T_312}; // @[lsu_bus_intf.scala 187:27] + wire _T_334 = ~ldst_byteen_lo_m[0]; // @[lsu_bus_intf.scala 188:72] + wire _T_335 = ld_byte_hit_lo[0] | _T_334; // @[lsu_bus_intf.scala 188:70] + wire _T_338 = ~ldst_byteen_lo_m[1]; // @[lsu_bus_intf.scala 188:72] + wire _T_339 = ld_byte_hit_lo[1] | _T_338; // @[lsu_bus_intf.scala 188:70] + wire _T_342 = ~ldst_byteen_lo_m[2]; // @[lsu_bus_intf.scala 188:72] + wire _T_343 = ld_byte_hit_lo[2] | _T_342; // @[lsu_bus_intf.scala 188:70] + wire _T_346 = ~ldst_byteen_lo_m[3]; // @[lsu_bus_intf.scala 188:72] + wire _T_347 = ld_byte_hit_lo[3] | _T_346; // @[lsu_bus_intf.scala 188:70] + wire _T_348 = _T_335 & _T_339; // @[lsu_bus_intf.scala 188:111] + wire _T_349 = _T_348 & _T_343; // @[lsu_bus_intf.scala 188:111] + wire ld_full_hit_lo_m = _T_349 & _T_347; // @[lsu_bus_intf.scala 188:111] + wire _T_353 = ~ldst_byteen_hi_m[0]; // @[lsu_bus_intf.scala 189:72] + wire _T_354 = ld_byte_hit_hi[0] | _T_353; // @[lsu_bus_intf.scala 189:70] + wire _T_357 = ~ldst_byteen_hi_m[1]; // @[lsu_bus_intf.scala 189:72] + wire _T_358 = ld_byte_hit_hi[1] | _T_357; // @[lsu_bus_intf.scala 189:70] + wire _T_361 = ~ldst_byteen_hi_m[2]; // @[lsu_bus_intf.scala 189:72] + wire _T_362 = ld_byte_hit_hi[2] | _T_361; // @[lsu_bus_intf.scala 189:70] + wire _T_365 = ~ldst_byteen_hi_m[3]; // @[lsu_bus_intf.scala 189:72] + wire _T_366 = ld_byte_hit_hi[3] | _T_365; // @[lsu_bus_intf.scala 189:70] + wire _T_367 = _T_354 & _T_358; // @[lsu_bus_intf.scala 189:111] + wire _T_368 = _T_367 & _T_362; // @[lsu_bus_intf.scala 189:111] + wire ld_full_hit_hi_m = _T_368 & _T_366; // @[lsu_bus_intf.scala 189:111] + wire _T_370 = ld_full_hit_lo_m & ld_full_hit_hi_m; // @[lsu_bus_intf.scala 190:47] + wire _T_371 = _T_370 & io_lsu_busreq_m; // @[lsu_bus_intf.scala 190:66] + wire _T_372 = _T_371 & io_lsu_pkt_m_bits_load; // @[lsu_bus_intf.scala 190:84] + wire _T_373 = ~io_is_sideeffects_m; // @[lsu_bus_intf.scala 190:111] + wire [63:0] ld_fwddata_hi = {{32'd0}, _T_331}; // @[lsu_bus_intf.scala 187:27] + wire [63:0] ld_fwddata_lo = {{32'd0}, _T_312}; // @[lsu_bus_intf.scala 186:27] wire [63:0] _T_377 = {ld_fwddata_hi[31:0],ld_fwddata_lo[31:0]}; // @[Cat.scala 29:58] - wire [3:0] _GEN_3 = {{2'd0}, io_lsu_addr_m[1:0]}; // @[lsu_bus_intf.scala 192:83] - wire [5:0] _T_379 = 4'h8 * _GEN_3; // @[lsu_bus_intf.scala 192:83] - wire [63:0] ld_fwddata_m = _T_377 >> _T_379; // @[lsu_bus_intf.scala 192:76] - reg lsu_bus_clk_en_q; // @[lsu_bus_intf.scala 196:32] - reg ldst_dual_m; // @[lsu_bus_intf.scala 199:27] - reg is_sideeffects_r; // @[lsu_bus_intf.scala 203:33] - lsu_bus_buffer bus_buffer ( // @[lsu_bus_intf.scala 102:39] + wire [3:0] _GEN_3 = {{2'd0}, io_lsu_addr_m[1:0]}; // @[lsu_bus_intf.scala 191:83] + wire [5:0] _T_379 = 4'h8 * _GEN_3; // @[lsu_bus_intf.scala 191:83] + wire [63:0] ld_fwddata_m = _T_377 >> _T_379; // @[lsu_bus_intf.scala 191:76] + reg lsu_bus_clk_en_q; // @[lsu_bus_intf.scala 195:32] + reg ldst_dual_m; // @[lsu_bus_intf.scala 198:27] + reg is_sideeffects_r; // @[lsu_bus_intf.scala 202:33] + lsu_bus_buffer bus_buffer ( // @[lsu_bus_intf.scala 101:39] .clock(bus_buffer_clock), .reset(bus_buffer_reset), .io_scan_mode(bus_buffer_io_scan_mode), @@ -73104,92 +73104,92 @@ module lsu_bus_intf( .io_ld_fwddata_buf_lo(bus_buffer_io_ld_fwddata_buf_lo), .io_ld_fwddata_buf_hi(bus_buffer_io_ld_fwddata_buf_hi) ); - assign io_tlu_busbuff_lsu_pmu_bus_trxn = bus_buffer_io_tlu_busbuff_lsu_pmu_bus_trxn; // @[lsu_bus_intf.scala 105:18] - assign io_tlu_busbuff_lsu_pmu_bus_misaligned = bus_buffer_io_tlu_busbuff_lsu_pmu_bus_misaligned; // @[lsu_bus_intf.scala 105:18] - assign io_tlu_busbuff_lsu_pmu_bus_error = bus_buffer_io_tlu_busbuff_lsu_pmu_bus_error; // @[lsu_bus_intf.scala 105:18] - assign io_tlu_busbuff_lsu_pmu_bus_busy = bus_buffer_io_tlu_busbuff_lsu_pmu_bus_busy; // @[lsu_bus_intf.scala 105:18] - assign io_tlu_busbuff_lsu_imprecise_error_load_any = bus_buffer_io_tlu_busbuff_lsu_imprecise_error_load_any; // @[lsu_bus_intf.scala 105:18] - assign io_tlu_busbuff_lsu_imprecise_error_store_any = bus_buffer_io_tlu_busbuff_lsu_imprecise_error_store_any; // @[lsu_bus_intf.scala 105:18] - assign io_tlu_busbuff_lsu_imprecise_error_addr_any = bus_buffer_io_tlu_busbuff_lsu_imprecise_error_addr_any; // @[lsu_bus_intf.scala 105:18] - assign io_axi_aw_valid = bus_buffer_io_lsu_axi_aw_valid; // @[lsu_bus_intf.scala 131:43] - assign io_axi_aw_bits_id = bus_buffer_io_lsu_axi_aw_bits_id; // @[lsu_bus_intf.scala 131:43] - assign io_axi_aw_bits_addr = bus_buffer_io_lsu_axi_aw_bits_addr; // @[lsu_bus_intf.scala 131:43] - assign io_axi_aw_bits_region = bus_buffer_io_lsu_axi_aw_bits_region; // @[lsu_bus_intf.scala 131:43] - assign io_axi_aw_bits_size = bus_buffer_io_lsu_axi_aw_bits_size; // @[lsu_bus_intf.scala 131:43] - assign io_axi_aw_bits_cache = bus_buffer_io_lsu_axi_aw_bits_cache; // @[lsu_bus_intf.scala 131:43] - assign io_axi_w_valid = bus_buffer_io_lsu_axi_w_valid; // @[lsu_bus_intf.scala 131:43] - assign io_axi_w_bits_data = bus_buffer_io_lsu_axi_w_bits_data; // @[lsu_bus_intf.scala 131:43] - assign io_axi_w_bits_strb = bus_buffer_io_lsu_axi_w_bits_strb; // @[lsu_bus_intf.scala 131:43] - assign io_axi_ar_valid = bus_buffer_io_lsu_axi_ar_valid; // @[lsu_bus_intf.scala 131:43] - assign io_axi_ar_bits_id = bus_buffer_io_lsu_axi_ar_bits_id; // @[lsu_bus_intf.scala 131:43] - assign io_axi_ar_bits_addr = bus_buffer_io_lsu_axi_ar_bits_addr; // @[lsu_bus_intf.scala 131:43] - assign io_axi_ar_bits_region = bus_buffer_io_lsu_axi_ar_bits_region; // @[lsu_bus_intf.scala 131:43] - assign io_axi_ar_bits_size = bus_buffer_io_lsu_axi_ar_bits_size; // @[lsu_bus_intf.scala 131:43] - assign io_axi_ar_bits_cache = bus_buffer_io_lsu_axi_ar_bits_cache; // @[lsu_bus_intf.scala 131:43] - assign io_lsu_busreq_r = bus_buffer_io_lsu_busreq_r; // @[lsu_bus_intf.scala 134:38] - assign io_lsu_bus_buffer_pend_any = bus_buffer_io_lsu_bus_buffer_pend_any; // @[lsu_bus_intf.scala 135:38] - assign io_lsu_bus_buffer_full_any = bus_buffer_io_lsu_bus_buffer_full_any; // @[lsu_bus_intf.scala 136:38] - assign io_lsu_bus_buffer_empty_any = bus_buffer_io_lsu_bus_buffer_empty_any; // @[lsu_bus_intf.scala 137:38] - assign io_bus_read_data_m = ld_fwddata_m[31:0]; // @[lsu_bus_intf.scala 193:27] - assign io_dctl_busbuff_lsu_nonblock_load_valid_m = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_valid_m; // @[lsu_bus_intf.scala 143:19] - assign io_dctl_busbuff_lsu_nonblock_load_tag_m = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_tag_m; // @[lsu_bus_intf.scala 143:19] - assign io_dctl_busbuff_lsu_nonblock_load_inv_r = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_inv_r; // @[lsu_bus_intf.scala 143:19] - assign io_dctl_busbuff_lsu_nonblock_load_inv_tag_r = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_inv_tag_r; // @[lsu_bus_intf.scala 143:19] - assign io_dctl_busbuff_lsu_nonblock_load_data_valid = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_valid; // @[lsu_bus_intf.scala 143:19] - assign io_dctl_busbuff_lsu_nonblock_load_data_error = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_error; // @[lsu_bus_intf.scala 143:19] - assign io_dctl_busbuff_lsu_nonblock_load_data_tag = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_tag; // @[lsu_bus_intf.scala 143:19] - assign io_dctl_busbuff_lsu_nonblock_load_data = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data; // @[lsu_bus_intf.scala 143:19] + assign io_tlu_busbuff_lsu_pmu_bus_trxn = bus_buffer_io_tlu_busbuff_lsu_pmu_bus_trxn; // @[lsu_bus_intf.scala 104:18] + assign io_tlu_busbuff_lsu_pmu_bus_misaligned = bus_buffer_io_tlu_busbuff_lsu_pmu_bus_misaligned; // @[lsu_bus_intf.scala 104:18] + assign io_tlu_busbuff_lsu_pmu_bus_error = bus_buffer_io_tlu_busbuff_lsu_pmu_bus_error; // @[lsu_bus_intf.scala 104:18] + assign io_tlu_busbuff_lsu_pmu_bus_busy = bus_buffer_io_tlu_busbuff_lsu_pmu_bus_busy; // @[lsu_bus_intf.scala 104:18] + assign io_tlu_busbuff_lsu_imprecise_error_load_any = bus_buffer_io_tlu_busbuff_lsu_imprecise_error_load_any; // @[lsu_bus_intf.scala 104:18] + assign io_tlu_busbuff_lsu_imprecise_error_store_any = bus_buffer_io_tlu_busbuff_lsu_imprecise_error_store_any; // @[lsu_bus_intf.scala 104:18] + assign io_tlu_busbuff_lsu_imprecise_error_addr_any = bus_buffer_io_tlu_busbuff_lsu_imprecise_error_addr_any; // @[lsu_bus_intf.scala 104:18] + assign io_axi_aw_valid = bus_buffer_io_lsu_axi_aw_valid; // @[lsu_bus_intf.scala 130:43] + assign io_axi_aw_bits_id = bus_buffer_io_lsu_axi_aw_bits_id; // @[lsu_bus_intf.scala 130:43] + assign io_axi_aw_bits_addr = bus_buffer_io_lsu_axi_aw_bits_addr; // @[lsu_bus_intf.scala 130:43] + assign io_axi_aw_bits_region = bus_buffer_io_lsu_axi_aw_bits_region; // @[lsu_bus_intf.scala 130:43] + assign io_axi_aw_bits_size = bus_buffer_io_lsu_axi_aw_bits_size; // @[lsu_bus_intf.scala 130:43] + assign io_axi_aw_bits_cache = bus_buffer_io_lsu_axi_aw_bits_cache; // @[lsu_bus_intf.scala 130:43] + assign io_axi_w_valid = bus_buffer_io_lsu_axi_w_valid; // @[lsu_bus_intf.scala 130:43] + assign io_axi_w_bits_data = bus_buffer_io_lsu_axi_w_bits_data; // @[lsu_bus_intf.scala 130:43] + assign io_axi_w_bits_strb = bus_buffer_io_lsu_axi_w_bits_strb; // @[lsu_bus_intf.scala 130:43] + assign io_axi_ar_valid = bus_buffer_io_lsu_axi_ar_valid; // @[lsu_bus_intf.scala 130:43] + assign io_axi_ar_bits_id = bus_buffer_io_lsu_axi_ar_bits_id; // @[lsu_bus_intf.scala 130:43] + assign io_axi_ar_bits_addr = bus_buffer_io_lsu_axi_ar_bits_addr; // @[lsu_bus_intf.scala 130:43] + assign io_axi_ar_bits_region = bus_buffer_io_lsu_axi_ar_bits_region; // @[lsu_bus_intf.scala 130:43] + assign io_axi_ar_bits_size = bus_buffer_io_lsu_axi_ar_bits_size; // @[lsu_bus_intf.scala 130:43] + assign io_axi_ar_bits_cache = bus_buffer_io_lsu_axi_ar_bits_cache; // @[lsu_bus_intf.scala 130:43] + assign io_lsu_busreq_r = bus_buffer_io_lsu_busreq_r; // @[lsu_bus_intf.scala 133:38] + assign io_lsu_bus_buffer_pend_any = bus_buffer_io_lsu_bus_buffer_pend_any; // @[lsu_bus_intf.scala 134:38] + assign io_lsu_bus_buffer_full_any = bus_buffer_io_lsu_bus_buffer_full_any; // @[lsu_bus_intf.scala 135:38] + assign io_lsu_bus_buffer_empty_any = bus_buffer_io_lsu_bus_buffer_empty_any; // @[lsu_bus_intf.scala 136:38] + assign io_bus_read_data_m = ld_fwddata_m[31:0]; // @[lsu_bus_intf.scala 192:27] + assign io_dctl_busbuff_lsu_nonblock_load_valid_m = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_valid_m; // @[lsu_bus_intf.scala 142:19] + assign io_dctl_busbuff_lsu_nonblock_load_tag_m = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_tag_m; // @[lsu_bus_intf.scala 142:19] + assign io_dctl_busbuff_lsu_nonblock_load_inv_r = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_inv_r; // @[lsu_bus_intf.scala 142:19] + assign io_dctl_busbuff_lsu_nonblock_load_inv_tag_r = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_inv_tag_r; // @[lsu_bus_intf.scala 142:19] + assign io_dctl_busbuff_lsu_nonblock_load_data_valid = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_valid; // @[lsu_bus_intf.scala 142:19] + assign io_dctl_busbuff_lsu_nonblock_load_data_error = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_error; // @[lsu_bus_intf.scala 142:19] + assign io_dctl_busbuff_lsu_nonblock_load_data_tag = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data_tag; // @[lsu_bus_intf.scala 142:19] + assign io_dctl_busbuff_lsu_nonblock_load_data = bus_buffer_io_dctl_busbuff_lsu_nonblock_load_data; // @[lsu_bus_intf.scala 142:19] assign bus_buffer_clock = clock; assign bus_buffer_reset = reset; - assign bus_buffer_io_scan_mode = io_scan_mode; // @[lsu_bus_intf.scala 104:29] - assign bus_buffer_io_tlu_busbuff_dec_tlu_external_ldfwd_disable = io_tlu_busbuff_dec_tlu_external_ldfwd_disable; // @[lsu_bus_intf.scala 105:18] - assign bus_buffer_io_tlu_busbuff_dec_tlu_wb_coalescing_disable = io_tlu_busbuff_dec_tlu_wb_coalescing_disable; // @[lsu_bus_intf.scala 105:18] - assign bus_buffer_io_tlu_busbuff_dec_tlu_sideeffect_posted_disable = io_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu_bus_intf.scala 105:18] - assign bus_buffer_io_dec_tlu_force_halt = io_dec_tlu_force_halt; // @[lsu_bus_intf.scala 107:51] - assign bus_buffer_io_lsu_c2_r_clk = io_lsu_c2_r_clk; // @[lsu_bus_intf.scala 108:51] - assign bus_buffer_io_lsu_bus_ibuf_c1_clk = io_lsu_bus_ibuf_c1_clk; // @[lsu_bus_intf.scala 109:51] - assign bus_buffer_io_lsu_bus_obuf_c1_clk = io_lsu_bus_obuf_c1_clk; // @[lsu_bus_intf.scala 110:51] - assign bus_buffer_io_lsu_bus_buf_c1_clk = io_lsu_bus_buf_c1_clk; // @[lsu_bus_intf.scala 111:51] - assign bus_buffer_io_lsu_free_c2_clk = io_lsu_free_c2_clk; // @[lsu_bus_intf.scala 112:51] - assign bus_buffer_io_lsu_busm_clk = io_lsu_busm_clk; // @[lsu_bus_intf.scala 113:51] - assign bus_buffer_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[lsu_bus_intf.scala 114:51] - assign bus_buffer_io_lsu_pkt_m_valid = io_lsu_pkt_m_valid; // @[lsu_bus_intf.scala 117:27] - assign bus_buffer_io_lsu_pkt_m_bits_load = io_lsu_pkt_m_bits_load; // @[lsu_bus_intf.scala 117:27] - assign bus_buffer_io_lsu_pkt_r_bits_by = io_lsu_pkt_r_bits_by; // @[lsu_bus_intf.scala 118:27] - assign bus_buffer_io_lsu_pkt_r_bits_half = io_lsu_pkt_r_bits_half; // @[lsu_bus_intf.scala 118:27] - assign bus_buffer_io_lsu_pkt_r_bits_word = io_lsu_pkt_r_bits_word; // @[lsu_bus_intf.scala 118:27] - assign bus_buffer_io_lsu_pkt_r_bits_load = io_lsu_pkt_r_bits_load; // @[lsu_bus_intf.scala 118:27] - assign bus_buffer_io_lsu_pkt_r_bits_store = io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 118:27] - assign bus_buffer_io_lsu_pkt_r_bits_unsign = io_lsu_pkt_r_bits_unsign; // @[lsu_bus_intf.scala 118:27] - assign bus_buffer_io_lsu_addr_m = io_lsu_addr_m; // @[lsu_bus_intf.scala 121:51] - assign bus_buffer_io_end_addr_m = io_end_addr_m; // @[lsu_bus_intf.scala 122:51] - assign bus_buffer_io_lsu_addr_r = io_lsu_addr_r; // @[lsu_bus_intf.scala 123:51] - assign bus_buffer_io_end_addr_r = io_end_addr_r; // @[lsu_bus_intf.scala 124:51] - assign bus_buffer_io_store_data_r = io_store_data_r; // @[lsu_bus_intf.scala 125:51] - assign bus_buffer_io_no_word_merge_r = _T_22 & _T_24; // @[lsu_bus_intf.scala 144:51] - assign bus_buffer_io_no_dword_merge_r = _T_22 & _T_30; // @[lsu_bus_intf.scala 145:51] - assign bus_buffer_io_lsu_busreq_m = io_lsu_busreq_m; // @[lsu_bus_intf.scala 127:51] - assign bus_buffer_io_ld_full_hit_m = _T_372 & _T_373; // @[lsu_bus_intf.scala 151:51] - assign bus_buffer_io_flush_m_up = io_flush_m_up; // @[lsu_bus_intf.scala 128:51] - assign bus_buffer_io_flush_r = io_flush_r; // @[lsu_bus_intf.scala 129:51] - assign bus_buffer_io_lsu_commit_r = io_lsu_commit_r; // @[lsu_bus_intf.scala 130:51] - assign bus_buffer_io_is_sideeffects_r = is_sideeffects_r; // @[lsu_bus_intf.scala 146:51] - assign bus_buffer_io_ldst_dual_d = io_lsu_addr_d[2] != io_end_addr_d[2]; // @[lsu_bus_intf.scala 147:51] - assign bus_buffer_io_ldst_dual_m = ldst_dual_m; // @[lsu_bus_intf.scala 148:51] - assign bus_buffer_io_ldst_dual_r = ldst_dual_r; // @[lsu_bus_intf.scala 149:51] - assign bus_buffer_io_ldst_byteen_ext_m = {{1'd0}, _T_34}; // @[lsu_bus_intf.scala 150:51] - assign bus_buffer_io_lsu_axi_aw_ready = io_axi_aw_ready; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_axi_w_ready = io_axi_w_ready; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_axi_b_valid = io_axi_b_valid; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_axi_b_bits_resp = io_axi_b_bits_resp; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_axi_b_bits_id = io_axi_b_bits_id; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_axi_ar_ready = io_axi_ar_ready; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_axi_r_valid = io_axi_r_valid; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_axi_r_bits_id = io_axi_r_bits_id; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_axi_r_bits_data = io_axi_r_bits_data; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_axi_r_bits_resp = io_axi_r_bits_resp; // @[lsu_bus_intf.scala 131:43] - assign bus_buffer_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[lsu_bus_intf.scala 132:51] - assign bus_buffer_io_lsu_bus_clk_en_q = lsu_bus_clk_en_q; // @[lsu_bus_intf.scala 152:51] + assign bus_buffer_io_scan_mode = io_scan_mode; // @[lsu_bus_intf.scala 103:29] + assign bus_buffer_io_tlu_busbuff_dec_tlu_external_ldfwd_disable = io_tlu_busbuff_dec_tlu_external_ldfwd_disable; // @[lsu_bus_intf.scala 104:18] + assign bus_buffer_io_tlu_busbuff_dec_tlu_wb_coalescing_disable = io_tlu_busbuff_dec_tlu_wb_coalescing_disable; // @[lsu_bus_intf.scala 104:18] + assign bus_buffer_io_tlu_busbuff_dec_tlu_sideeffect_posted_disable = io_tlu_busbuff_dec_tlu_sideeffect_posted_disable; // @[lsu_bus_intf.scala 104:18] + assign bus_buffer_io_dec_tlu_force_halt = io_dec_tlu_force_halt; // @[lsu_bus_intf.scala 106:51] + assign bus_buffer_io_lsu_c2_r_clk = io_lsu_c2_r_clk; // @[lsu_bus_intf.scala 107:51] + assign bus_buffer_io_lsu_bus_ibuf_c1_clk = io_lsu_bus_ibuf_c1_clk; // @[lsu_bus_intf.scala 108:51] + assign bus_buffer_io_lsu_bus_obuf_c1_clk = io_lsu_bus_obuf_c1_clk; // @[lsu_bus_intf.scala 109:51] + assign bus_buffer_io_lsu_bus_buf_c1_clk = io_lsu_bus_buf_c1_clk; // @[lsu_bus_intf.scala 110:51] + assign bus_buffer_io_lsu_free_c2_clk = io_lsu_free_c2_clk; // @[lsu_bus_intf.scala 111:51] + assign bus_buffer_io_lsu_busm_clk = io_lsu_busm_clk; // @[lsu_bus_intf.scala 112:51] + assign bus_buffer_io_dec_lsu_valid_raw_d = io_dec_lsu_valid_raw_d; // @[lsu_bus_intf.scala 113:51] + assign bus_buffer_io_lsu_pkt_m_valid = io_lsu_pkt_m_valid; // @[lsu_bus_intf.scala 116:27] + assign bus_buffer_io_lsu_pkt_m_bits_load = io_lsu_pkt_m_bits_load; // @[lsu_bus_intf.scala 116:27] + assign bus_buffer_io_lsu_pkt_r_bits_by = io_lsu_pkt_r_bits_by; // @[lsu_bus_intf.scala 117:27] + assign bus_buffer_io_lsu_pkt_r_bits_half = io_lsu_pkt_r_bits_half; // @[lsu_bus_intf.scala 117:27] + assign bus_buffer_io_lsu_pkt_r_bits_word = io_lsu_pkt_r_bits_word; // @[lsu_bus_intf.scala 117:27] + assign bus_buffer_io_lsu_pkt_r_bits_load = io_lsu_pkt_r_bits_load; // @[lsu_bus_intf.scala 117:27] + assign bus_buffer_io_lsu_pkt_r_bits_store = io_lsu_pkt_r_bits_store; // @[lsu_bus_intf.scala 117:27] + assign bus_buffer_io_lsu_pkt_r_bits_unsign = io_lsu_pkt_r_bits_unsign; // @[lsu_bus_intf.scala 117:27] + assign bus_buffer_io_lsu_addr_m = io_lsu_addr_m; // @[lsu_bus_intf.scala 120:51] + assign bus_buffer_io_end_addr_m = io_end_addr_m; // @[lsu_bus_intf.scala 121:51] + assign bus_buffer_io_lsu_addr_r = io_lsu_addr_r; // @[lsu_bus_intf.scala 122:51] + assign bus_buffer_io_end_addr_r = io_end_addr_r; // @[lsu_bus_intf.scala 123:51] + assign bus_buffer_io_store_data_r = io_store_data_r; // @[lsu_bus_intf.scala 124:51] + assign bus_buffer_io_no_word_merge_r = _T_22 & _T_24; // @[lsu_bus_intf.scala 143:51] + assign bus_buffer_io_no_dword_merge_r = _T_22 & _T_30; // @[lsu_bus_intf.scala 144:51] + assign bus_buffer_io_lsu_busreq_m = io_lsu_busreq_m; // @[lsu_bus_intf.scala 126:51] + assign bus_buffer_io_ld_full_hit_m = _T_372 & _T_373; // @[lsu_bus_intf.scala 150:51] + assign bus_buffer_io_flush_m_up = io_flush_m_up; // @[lsu_bus_intf.scala 127:51] + assign bus_buffer_io_flush_r = io_flush_r; // @[lsu_bus_intf.scala 128:51] + assign bus_buffer_io_lsu_commit_r = io_lsu_commit_r; // @[lsu_bus_intf.scala 129:51] + assign bus_buffer_io_is_sideeffects_r = is_sideeffects_r; // @[lsu_bus_intf.scala 145:51] + assign bus_buffer_io_ldst_dual_d = io_lsu_addr_d[2] != io_end_addr_d[2]; // @[lsu_bus_intf.scala 146:51] + assign bus_buffer_io_ldst_dual_m = ldst_dual_m; // @[lsu_bus_intf.scala 147:51] + assign bus_buffer_io_ldst_dual_r = ldst_dual_r; // @[lsu_bus_intf.scala 148:51] + assign bus_buffer_io_ldst_byteen_ext_m = {{1'd0}, _T_34}; // @[lsu_bus_intf.scala 149:51] + assign bus_buffer_io_lsu_axi_aw_ready = io_axi_aw_ready; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_axi_w_ready = io_axi_w_ready; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_axi_b_valid = io_axi_b_valid; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_axi_b_bits_resp = io_axi_b_bits_resp; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_axi_b_bits_id = io_axi_b_bits_id; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_axi_ar_ready = io_axi_ar_ready; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_axi_r_valid = io_axi_r_valid; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_axi_r_bits_id = io_axi_r_bits_id; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_axi_r_bits_data = io_axi_r_bits_data; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_axi_r_bits_resp = io_axi_r_bits_resp; // @[lsu_bus_intf.scala 130:43] + assign bus_buffer_io_lsu_bus_clk_en = io_lsu_bus_clk_en; // @[lsu_bus_intf.scala 131:51] + assign bus_buffer_io_lsu_bus_clk_en_q = lsu_bus_clk_en_q; // @[lsu_bus_intf.scala 151:51] `ifdef RANDOMIZE_GARBAGE_ASSIGN `define RANDOMIZE `endif @@ -74539,7 +74539,7 @@ module lsu( assign stbuf_clock = clock; assign stbuf_reset = reset; assign stbuf_io_lsu_c1_m_clk = clkdomain_io_lsu_c1_m_clk; // @[lsu.scala 199:49] - assign stbuf_io_lsu_c1_r_clk = clkdomain_io_lsu_c1_m_clk; // @[lsu.scala 200:48] + assign stbuf_io_lsu_c1_r_clk = clkdomain_io_lsu_c1_r_clk; // @[lsu.scala 200:48] assign stbuf_io_lsu_stbuf_c1_clk = clkdomain_io_lsu_stbuf_c1_clk; // @[lsu.scala 201:54] assign stbuf_io_lsu_free_c2_clk = clkdomain_io_lsu_free_c2_clk; // @[lsu.scala 202:54] assign stbuf_io_lsu_pkt_m_valid = lsu_lsc_ctl_io_lsu_pkt_m_valid; // @[lsu.scala 203:48] diff --git a/src/main/scala/lsu/lsu_bus_intf.scala b/src/main/scala/lsu/lsu_bus_intf.scala index e1278475..81bc14bd 100644 --- a/src/main/scala/lsu/lsu_bus_intf.scala +++ b/src/main/scala/lsu/lsu_bus_intf.scala @@ -3,7 +3,6 @@ import chisel3._ import chisel3.util._ import lib._ import include._ -import snapshot._ import ifu._ class lsu_bus_intf extends Module with RequireAsyncReset with lib { diff --git a/src/main/scala/lsu/lsu_clkdomain.scala b/src/main/scala/lsu/lsu_clkdomain.scala index a66d2da6..65462f77 100644 --- a/src/main/scala/lsu/lsu_clkdomain.scala +++ b/src/main/scala/lsu/lsu_clkdomain.scala @@ -4,7 +4,6 @@ import chisel3.experimental.chiselName import chisel3.util._ import lib._ import include._ -import snapshot._ @chiselName class lsu_clkdomain extends Module with RequireAsyncReset with lib{ diff --git a/target/scala-2.12/classes/lsu/lsu_bus_intf$$anon$1.class b/target/scala-2.12/classes/lsu/lsu_bus_intf$$anon$1.class index d175930fb7cb4c02fcabddcec9bb25ff262e21b2..6a27210b74c73e741efa8d10322fdd05f7e1d9ea 100644 GIT binary patch delta 473 zcmW;GPe@cz6bA6`yi3GP&dhuB=G{myjT?2RgwQ6Um5AWR zgkjF2O*;w1Hj%mu37SO+)+VTkAc)rG#*GPnKJMao_`Z8Nx6|x2->l~(Ymy|kkyBgG zdHY58X#_sie(~qFSx!?J1q3J4KaR+8i?Z!K4wZ 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