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el2_ifu_mem_ctl.fir
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el2_ifu_mem_ctl.fir
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10096
el2_ifu_mem_ctl.v
10096
el2_ifu_mem_ctl.v
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@ -127,6 +127,7 @@ class mem_ctl_bundle extends Bundle with el2_lib{
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val iccm_correction_state = Output(Bool())
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val iccm_correction_state = Output(Bool())
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val scan_mode = Input(Bool())
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val scan_mode = Input(Bool())
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val data = Output(UInt())
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val data = Output(UInt())
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val ic_miss_buff_half = Output(UInt())
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val ic_wr_ecc = Output(UInt())
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val ic_wr_ecc = Output(UInt())
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}
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}
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class el2_ifu_mem_ctl extends Module with el2_lib {
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class el2_ifu_mem_ctl extends Module with el2_lib {
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@ -363,10 +364,10 @@ class el2_ifu_mem_ctl extends Module with el2_lib {
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val ic_wr_parity = (0 until 4).map(i=>rveven_paritygen(ifu_bus_rdata_ff((16*i)+15,16*i))).reverse.reduce(Cat(_,_))
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val ic_wr_parity = (0 until 4).map(i=>rveven_paritygen(ifu_bus_rdata_ff((16*i)+15,16*i))).reverse.reduce(Cat(_,_))
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val ic_miss_buff_parity = (0 until 4).map(i=>rveven_paritygen(ic_miss_buff_half((16*i)+15,16*i))).reverse.reduce(Cat(_,_))
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val ic_miss_buff_parity = (0 until 4).map(i=>rveven_paritygen(ic_miss_buff_half((16*i)+15,16*i))).reverse.reduce(Cat(_,_))
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ic_wr_16bytes_data := Mux(ifu_bus_rid_ff(0).asBool,Cat(if(ICACHE_ECC)ic_wr_ecc else ic_wr_parity, ifu_bus_rdata_ff(63,0) , if(ICACHE_ECC)ic_miss_buff_ecc else ic_miss_buff_parity, ic_miss_buff_half(63,0)),
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ic_wr_16bytes_data := Mux(ifu_bus_rid_ff(0).asBool,Cat(if(ICACHE_ECC)ic_wr_ecc else ic_wr_parity, ifu_bus_rdata_ff, if(ICACHE_ECC)ic_miss_buff_ecc else ic_miss_buff_parity, ic_miss_buff_half),
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Cat(if(ICACHE_ECC)ic_miss_buff_ecc else ic_miss_buff_parity, ic_miss_buff_half, if(ICACHE_ECC)ic_wr_ecc else ic_wr_parity, ifu_bus_rdata_ff))
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Cat(if(ICACHE_ECC)ic_miss_buff_ecc else ic_miss_buff_parity, ic_miss_buff_half, if(ICACHE_ECC)ic_wr_ecc else ic_wr_parity, ifu_bus_rdata_ff))
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io.ic_miss_buff_half := ic_miss_buff_half
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val bus_ifu_wr_data_error_ff = WireInit(Bool(), 0.U)
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val bus_ifu_wr_data_error_ff = WireInit(Bool(), 0.U)
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val ifu_wr_data_comb_err_ff = WireInit(Bool(), 0.U)
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val ifu_wr_data_comb_err_ff = WireInit(Bool(), 0.U)
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val reset_beat_cnt = WireInit(Bool(), 0.U)
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val reset_beat_cnt = WireInit(Bool(), 0.U)
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