colin
|
d61bc07515
|
Split RAM and ROM to 8 banks.
|
2022-03-23 14:33:06 +00:00 |
|
colin
|
fd6791eb26
|
Refine ahb mem to 8 banks.To avoid Synth error.
|
2022-03-22 06:08:34 +00:00 |
|
colin
|
b6a916aca4
|
Modify RAM and ROM to WIDTH=12 4K Byte.
|
2022-03-20 09:04:32 +00:00 |
|
colin
|
68653daa2c
|
Add clk out for fpga.
|
2022-03-15 11:38:18 +00:00 |
|
colin
|
85b5ac0f8b
|
Add clk output for led.
|
2022-03-11 03:05:36 +00:00 |
|
colin
|
2780c08c6a
|
Enable demo of jtag.
|
2022-03-10 13:12:28 +00:00 |
|
colin
|
896011449d
|
Add demo for veilator and fpga.
|
2022-03-10 04:53:38 +00:00 |