4 Commits

Author	SHA1	Message	Date
colin	d61bc07515	Split RAM and ROM to 8 banks.	2022-03-23 14:33:06 +00:00
colin	68653daa2c	Add clk out for fpga.	2022-03-15 11:38:18 +00:00
colin	2780c08c6a	Enable demo of jtag.	2022-03-10 13:12:28 +00:00
colin	896011449d	Add demo for veilator and fpga.	2022-03-10 04:53:38 +00:00