[
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_exc_mscause_d",
    "sources":[
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_misaligned_fault_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_dma",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_external_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_store",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_load",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_by",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_in_pic_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_word",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_half",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_rs1_region_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_dec_tlu_mrac_ff"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_external_d",
    "sources":[
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_misaligned_fault_d",
    "sources":[
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_dma",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_external_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_store",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_load",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_by",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_word",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_half",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_dec_tlu_mrac_ff"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_fir_nondccm_access_error_d",
    "sources":[
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_fast_int",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_in_dccm_d",
    "sources":[
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_fir_dccm_access_error_d",
    "sources":[
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_fast_int",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_in_pic_d",
    "sources":[
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d"
    ]
  },
  {
    "class":"firrtl.transforms.CombinationalPath",
    "sink":"~el2_lsu_addrcheck|el2_lsu_addrcheck>io_access_fault_d",
    "sources":[
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_valid",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_dma",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_addr_in_pic_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_lsu_pkt_d_word",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_start_addr_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_rs1_region_d",
      "~el2_lsu_addrcheck|el2_lsu_addrcheck>io_end_addr_d"
    ]
  },
  {
    "class":"firrtl.EmitCircuitAnnotation",
    "emitter":"firrtl.VerilogEmitter"
  },
  {
    "class":"firrtl.options.TargetDirAnnotation",
    "directory":"."
  },
  {
    "class":"firrtl.options.OutputAnnotationFileAnnotation",
    "file":"el2_lsu_addrcheck"
  },
  {
    "class":"firrtl.transforms.BlackBoxTargetDirAnno",
    "targetDir":"."
  }
]