;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10 circuit el2_exu_alu_ctl : module el2_exu_alu_ctl : input clock : Clock input reset : UInt<1> output io : {flip scan_mode : UInt<1>, flip flush_upper_x : UInt<1>, flip flush_lower_r : UInt<1>, flip enable : UInt<1>, flip valid_in : UInt<1>, flip ap : {land : UInt<1>, lor : UInt<1>, lxor : UInt<1>, sll : UInt<1>, srl : UInt<1>, sra : UInt<1>, beq : UInt<1>, bne : UInt<1>, blt : UInt<1>, bge : UInt<1>, add : UInt<1>, sub : UInt<1>, slt : UInt<1>, unsign : UInt<1>, jal : UInt<1>, predict_t : UInt<1>, predict_nt : UInt<1>, csr_write : UInt<1>, csr_imm : UInt<1>}, flip csr_ren_in : UInt<1>, flip a_in : UInt<32>, flip b_in : UInt<32>, flip pc_in : UInt<31>, flip pp_in : {misp : UInt<1>, ataken : UInt<1>, boffset : UInt<1>, pc4 : UInt<1>, hist : UInt<2>, toffset : UInt<12>, valid : UInt<1>, br_error : UInt<1>, br_start_error : UInt<1>, prett : UInt<32>, pcall : UInt<1>, pret : UInt<1>, pja : UInt<1>, way : UInt<1>}, flip brimm_in : UInt<12>, result_ff : UInt<32>, flush_upper_out : UInt<1>, flush_final_out : UInt<1>, flush_path_out : UInt<31>, pc_ff : UInt<31>, pred_correct_out : UInt<1>, predict_p_out : {misp : UInt<1>, ataken : UInt<1>, boffset : UInt<1>, pc4 : UInt<1>, hist : UInt<2>, toffset : UInt<12>, valid : UInt<1>, br_error : UInt<1>, br_start_error : UInt<1>, prett : UInt<32>, pcall : UInt<1>, pret : UInt<1>, pja : UInt<1>, way : UInt<1>}} reg _T : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] when io.enable : @[Reg.scala 28:19] _T <= io.pc_in @[Reg.scala 28:23] skip @[Reg.scala 28:19] io.pc_ff <= _T @[el2_exu_alu_ctl.scala 35:12] wire result : UInt<32> result <= UInt<1>("h00") reg _T_1 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20] when io.enable : @[Reg.scala 28:19] _T_1 <= result @[Reg.scala 28:23] skip @[Reg.scala 28:19] io.result_ff <= _T_1 @[el2_exu_alu_ctl.scala 37:16] node _T_2 = bits(io.ap.sub, 0, 0) @[el2_exu_alu_ctl.scala 39:29] node _T_3 = not(io.b_in) @[el2_exu_alu_ctl.scala 39:37] node bm = mux(_T_2, _T_3, io.b_in) @[el2_exu_alu_ctl.scala 39:17] wire aout : UInt<33> aout <= UInt<1>("h00") node _T_4 = bits(io.ap.sub, 0, 0) @[el2_exu_alu_ctl.scala 43:15] node _T_5 = cat(UInt<1>("h00"), io.a_in) @[Cat.scala 29:58] node _T_6 = not(io.b_in) @[el2_exu_alu_ctl.scala 43:63] node _T_7 = cat(UInt<1>("h00"), _T_6) @[Cat.scala 29:58] node _T_8 = add(_T_5, _T_7) @[el2_exu_alu_ctl.scala 43:48] node _T_9 = tail(_T_8, 1) @[el2_exu_alu_ctl.scala 43:48] node _T_10 = add(_T_9, UInt<1>("h01")) @[el2_exu_alu_ctl.scala 43:73] node _T_11 = tail(_T_10, 1) @[el2_exu_alu_ctl.scala 43:73] node _T_12 = bits(io.ap.sub, 0, 0) @[el2_exu_alu_ctl.scala 44:16] node _T_13 = eq(_T_12, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 44:5] node _T_14 = cat(UInt<1>("h00"), io.a_in) @[Cat.scala 29:58] node _T_15 = cat(UInt<1>("h00"), io.b_in) @[Cat.scala 29:58] node _T_16 = add(_T_14, _T_15) @[el2_exu_alu_ctl.scala 44:48] node _T_17 = tail(_T_16, 1) @[el2_exu_alu_ctl.scala 44:48] node _T_18 = mux(_T_4, _T_11, UInt<1>("h00")) @[Mux.scala 27:72] node _T_19 = mux(_T_13, _T_17, UInt<1>("h00")) @[Mux.scala 27:72] node _T_20 = or(_T_18, _T_19) @[Mux.scala 27:72] wire _T_21 : UInt<33> @[Mux.scala 27:72] _T_21 <= _T_20 @[Mux.scala 27:72] aout <= _T_21 @[el2_exu_alu_ctl.scala 42:8] node cout = bits(aout, 32, 32) @[el2_exu_alu_ctl.scala 46:18] node _T_22 = bits(io.a_in, 31, 31) @[el2_exu_alu_ctl.scala 48:22] node _T_23 = not(_T_22) @[el2_exu_alu_ctl.scala 48:14] node _T_24 = bits(bm, 31, 31) @[el2_exu_alu_ctl.scala 48:32] node _T_25 = not(_T_24) @[el2_exu_alu_ctl.scala 48:29] node _T_26 = and(_T_23, _T_25) @[el2_exu_alu_ctl.scala 48:27] node _T_27 = bits(aout, 31, 31) @[el2_exu_alu_ctl.scala 48:44] node _T_28 = and(_T_26, _T_27) @[el2_exu_alu_ctl.scala 48:37] node _T_29 = bits(io.a_in, 31, 31) @[el2_exu_alu_ctl.scala 48:61] node _T_30 = bits(bm, 31, 31) @[el2_exu_alu_ctl.scala 48:71] node _T_31 = and(_T_29, _T_30) @[el2_exu_alu_ctl.scala 48:66] node _T_32 = bits(aout, 31, 31) @[el2_exu_alu_ctl.scala 48:83] node _T_33 = not(_T_32) @[el2_exu_alu_ctl.scala 48:78] node _T_34 = and(_T_31, _T_33) @[el2_exu_alu_ctl.scala 48:76] node ov = or(_T_28, _T_34) @[el2_exu_alu_ctl.scala 48:50] node eq = eq(io.a_in, io.b_in) @[el2_exu_alu_ctl.scala 50:38] node ne = not(eq) @[el2_exu_alu_ctl.scala 51:29] node neg = bits(aout, 31, 31) @[el2_exu_alu_ctl.scala 52:34] node _T_35 = not(io.ap.unsign) @[el2_exu_alu_ctl.scala 53:30] node _T_36 = xor(neg, ov) @[el2_exu_alu_ctl.scala 53:51] node _T_37 = and(_T_35, _T_36) @[el2_exu_alu_ctl.scala 53:44] node _T_38 = not(cout) @[el2_exu_alu_ctl.scala 53:78] node _T_39 = and(io.ap.unsign, _T_38) @[el2_exu_alu_ctl.scala 53:76] node lt = or(_T_37, _T_39) @[el2_exu_alu_ctl.scala 53:58] node ge = not(lt) @[el2_exu_alu_ctl.scala 54:29] node _T_40 = bits(io.csr_ren_in, 0, 0) @[el2_exu_alu_ctl.scala 58:19] node _T_41 = bits(io.ap.land, 0, 0) @[el2_exu_alu_ctl.scala 59:16] node _T_42 = and(io.a_in, io.b_in) @[el2_exu_alu_ctl.scala 59:39] node _T_43 = bits(io.ap.lor, 0, 0) @[el2_exu_alu_ctl.scala 60:15] node _T_44 = or(io.a_in, io.b_in) @[el2_exu_alu_ctl.scala 60:39] node _T_45 = bits(io.ap.lxor, 0, 0) @[el2_exu_alu_ctl.scala 61:16] node _T_46 = xor(io.a_in, io.b_in) @[el2_exu_alu_ctl.scala 61:39] node _T_47 = mux(_T_40, io.b_in, UInt<1>("h00")) @[Mux.scala 27:72] node _T_48 = mux(_T_41, _T_42, UInt<1>("h00")) @[Mux.scala 27:72] node _T_49 = mux(_T_43, _T_44, UInt<1>("h00")) @[Mux.scala 27:72] node _T_50 = mux(_T_45, _T_46, UInt<1>("h00")) @[Mux.scala 27:72] node _T_51 = or(_T_47, _T_48) @[Mux.scala 27:72] node _T_52 = or(_T_51, _T_49) @[Mux.scala 27:72] node _T_53 = or(_T_52, _T_50) @[Mux.scala 27:72] wire lout : UInt<32> @[Mux.scala 27:72] lout <= _T_53 @[Mux.scala 27:72] node _T_54 = bits(io.ap.sll, 0, 0) @[el2_exu_alu_ctl.scala 64:15] node _T_55 = bits(io.b_in, 4, 0) @[el2_exu_alu_ctl.scala 64:60] node _T_56 = cat(UInt<1>("h00"), _T_55) @[Cat.scala 29:58] node _T_57 = sub(UInt<6>("h020"), _T_56) @[el2_exu_alu_ctl.scala 64:38] node _T_58 = tail(_T_57, 1) @[el2_exu_alu_ctl.scala 64:38] node _T_59 = bits(io.ap.srl, 0, 0) @[el2_exu_alu_ctl.scala 65:15] node _T_60 = bits(io.b_in, 4, 0) @[el2_exu_alu_ctl.scala 65:60] node _T_61 = cat(UInt<1>("h00"), _T_60) @[Cat.scala 29:58] node _T_62 = bits(io.ap.sra, 0, 0) @[el2_exu_alu_ctl.scala 66:15] node _T_63 = bits(io.b_in, 4, 0) @[el2_exu_alu_ctl.scala 66:60] node _T_64 = cat(UInt<1>("h00"), _T_63) @[Cat.scala 29:58] node _T_65 = mux(_T_54, _T_58, UInt<1>("h00")) @[Mux.scala 27:72] node _T_66 = mux(_T_59, _T_61, UInt<1>("h00")) @[Mux.scala 27:72] node _T_67 = mux(_T_62, _T_64, UInt<1>("h00")) @[Mux.scala 27:72] node _T_68 = or(_T_65, _T_66) @[Mux.scala 27:72] node _T_69 = or(_T_68, _T_67) @[Mux.scala 27:72] wire shift_amount : UInt<6> @[Mux.scala 27:72] shift_amount <= _T_69 @[Mux.scala 27:72] wire shift_mask : UInt<32> shift_mask <= UInt<1>("h00") wire _T_70 : UInt<1>[5] @[el2_lib.scala 178:24] _T_70[0] <= io.ap.sll @[el2_lib.scala 178:24] _T_70[1] <= io.ap.sll @[el2_lib.scala 178:24] _T_70[2] <= io.ap.sll @[el2_lib.scala 178:24] _T_70[3] <= io.ap.sll @[el2_lib.scala 178:24] _T_70[4] <= io.ap.sll @[el2_lib.scala 178:24] node _T_71 = cat(_T_70[0], _T_70[1]) @[Cat.scala 29:58] node _T_72 = cat(_T_71, _T_70[2]) @[Cat.scala 29:58] node _T_73 = cat(_T_72, _T_70[3]) @[Cat.scala 29:58] node _T_74 = cat(_T_73, _T_70[4]) @[Cat.scala 29:58] node _T_75 = bits(io.b_in, 4, 0) @[el2_exu_alu_ctl.scala 69:64] node _T_76 = and(_T_74, _T_75) @[el2_exu_alu_ctl.scala 69:55] node _T_77 = dshl(UInt<32>("h0ffffffff"), _T_76) @[el2_exu_alu_ctl.scala 69:33] shift_mask <= _T_77 @[el2_exu_alu_ctl.scala 69:14] wire shift_extend : UInt<63> shift_extend <= UInt<1>("h00") wire _T_78 : UInt<1>[31] @[el2_lib.scala 178:24] _T_78[0] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[1] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[2] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[3] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[4] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[5] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[6] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[7] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[8] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[9] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[10] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[11] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[12] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[13] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[14] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[15] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[16] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[17] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[18] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[19] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[20] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[21] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[22] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[23] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[24] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[25] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[26] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[27] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[28] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[29] <= io.ap.sra @[el2_lib.scala 178:24] _T_78[30] <= io.ap.sra @[el2_lib.scala 178:24] node _T_79 = cat(_T_78[0], _T_78[1]) @[Cat.scala 29:58] node _T_80 = cat(_T_79, _T_78[2]) @[Cat.scala 29:58] node _T_81 = cat(_T_80, _T_78[3]) @[Cat.scala 29:58] node _T_82 = cat(_T_81, _T_78[4]) @[Cat.scala 29:58] node _T_83 = cat(_T_82, _T_78[5]) @[Cat.scala 29:58] node _T_84 = cat(_T_83, _T_78[6]) @[Cat.scala 29:58] node _T_85 = cat(_T_84, _T_78[7]) @[Cat.scala 29:58] node _T_86 = cat(_T_85, _T_78[8]) @[Cat.scala 29:58] node _T_87 = cat(_T_86, _T_78[9]) @[Cat.scala 29:58] node _T_88 = cat(_T_87, _T_78[10]) @[Cat.scala 29:58] node _T_89 = cat(_T_88, _T_78[11]) @[Cat.scala 29:58] node _T_90 = cat(_T_89, _T_78[12]) @[Cat.scala 29:58] node _T_91 = cat(_T_90, _T_78[13]) @[Cat.scala 29:58] node _T_92 = cat(_T_91, _T_78[14]) @[Cat.scala 29:58] node _T_93 = cat(_T_92, _T_78[15]) @[Cat.scala 29:58] node _T_94 = cat(_T_93, _T_78[16]) @[Cat.scala 29:58] node _T_95 = cat(_T_94, _T_78[17]) @[Cat.scala 29:58] node _T_96 = cat(_T_95, _T_78[18]) @[Cat.scala 29:58] node _T_97 = cat(_T_96, _T_78[19]) @[Cat.scala 29:58] node _T_98 = cat(_T_97, _T_78[20]) @[Cat.scala 29:58] node _T_99 = cat(_T_98, _T_78[21]) @[Cat.scala 29:58] node _T_100 = cat(_T_99, _T_78[22]) @[Cat.scala 29:58] node _T_101 = cat(_T_100, _T_78[23]) @[Cat.scala 29:58] node _T_102 = cat(_T_101, _T_78[24]) @[Cat.scala 29:58] node _T_103 = cat(_T_102, _T_78[25]) @[Cat.scala 29:58] node _T_104 = cat(_T_103, _T_78[26]) @[Cat.scala 29:58] node _T_105 = cat(_T_104, _T_78[27]) @[Cat.scala 29:58] node _T_106 = cat(_T_105, _T_78[28]) @[Cat.scala 29:58] node _T_107 = cat(_T_106, _T_78[29]) @[Cat.scala 29:58] node _T_108 = cat(_T_107, _T_78[30]) @[Cat.scala 29:58] node _T_109 = bits(io.a_in, 31, 31) @[el2_exu_alu_ctl.scala 72:61] wire _T_110 : UInt<1>[31] @[el2_lib.scala 178:24] _T_110[0] <= _T_109 @[el2_lib.scala 178:24] _T_110[1] <= _T_109 @[el2_lib.scala 178:24] _T_110[2] <= _T_109 @[el2_lib.scala 178:24] _T_110[3] <= _T_109 @[el2_lib.scala 178:24] _T_110[4] <= _T_109 @[el2_lib.scala 178:24] _T_110[5] <= _T_109 @[el2_lib.scala 178:24] _T_110[6] <= _T_109 @[el2_lib.scala 178:24] _T_110[7] <= _T_109 @[el2_lib.scala 178:24] _T_110[8] <= _T_109 @[el2_lib.scala 178:24] _T_110[9] <= _T_109 @[el2_lib.scala 178:24] _T_110[10] <= _T_109 @[el2_lib.scala 178:24] _T_110[11] <= _T_109 @[el2_lib.scala 178:24] _T_110[12] <= _T_109 @[el2_lib.scala 178:24] _T_110[13] <= _T_109 @[el2_lib.scala 178:24] _T_110[14] <= _T_109 @[el2_lib.scala 178:24] _T_110[15] <= _T_109 @[el2_lib.scala 178:24] _T_110[16] <= _T_109 @[el2_lib.scala 178:24] _T_110[17] <= _T_109 @[el2_lib.scala 178:24] _T_110[18] <= _T_109 @[el2_lib.scala 178:24] _T_110[19] <= _T_109 @[el2_lib.scala 178:24] _T_110[20] <= _T_109 @[el2_lib.scala 178:24] _T_110[21] <= _T_109 @[el2_lib.scala 178:24] _T_110[22] <= _T_109 @[el2_lib.scala 178:24] _T_110[23] <= _T_109 @[el2_lib.scala 178:24] _T_110[24] <= _T_109 @[el2_lib.scala 178:24] _T_110[25] <= _T_109 @[el2_lib.scala 178:24] _T_110[26] <= _T_109 @[el2_lib.scala 178:24] _T_110[27] <= _T_109 @[el2_lib.scala 178:24] _T_110[28] <= _T_109 @[el2_lib.scala 178:24] _T_110[29] <= _T_109 @[el2_lib.scala 178:24] _T_110[30] <= _T_109 @[el2_lib.scala 178:24] node _T_111 = cat(_T_110[0], _T_110[1]) @[Cat.scala 29:58] node _T_112 = cat(_T_111, _T_110[2]) @[Cat.scala 29:58] node _T_113 = cat(_T_112, _T_110[3]) @[Cat.scala 29:58] node _T_114 = cat(_T_113, _T_110[4]) @[Cat.scala 29:58] node _T_115 = cat(_T_114, _T_110[5]) @[Cat.scala 29:58] node _T_116 = cat(_T_115, _T_110[6]) @[Cat.scala 29:58] node _T_117 = cat(_T_116, _T_110[7]) @[Cat.scala 29:58] node _T_118 = cat(_T_117, _T_110[8]) @[Cat.scala 29:58] node _T_119 = cat(_T_118, _T_110[9]) @[Cat.scala 29:58] node _T_120 = cat(_T_119, _T_110[10]) @[Cat.scala 29:58] node _T_121 = cat(_T_120, _T_110[11]) @[Cat.scala 29:58] node _T_122 = cat(_T_121, _T_110[12]) @[Cat.scala 29:58] node _T_123 = cat(_T_122, _T_110[13]) @[Cat.scala 29:58] node _T_124 = cat(_T_123, _T_110[14]) @[Cat.scala 29:58] node _T_125 = cat(_T_124, _T_110[15]) @[Cat.scala 29:58] node _T_126 = cat(_T_125, _T_110[16]) @[Cat.scala 29:58] node _T_127 = cat(_T_126, _T_110[17]) @[Cat.scala 29:58] node _T_128 = cat(_T_127, _T_110[18]) @[Cat.scala 29:58] node _T_129 = cat(_T_128, _T_110[19]) @[Cat.scala 29:58] node _T_130 = cat(_T_129, _T_110[20]) @[Cat.scala 29:58] node _T_131 = cat(_T_130, _T_110[21]) @[Cat.scala 29:58] node _T_132 = cat(_T_131, _T_110[22]) @[Cat.scala 29:58] node _T_133 = cat(_T_132, _T_110[23]) @[Cat.scala 29:58] node _T_134 = cat(_T_133, _T_110[24]) @[Cat.scala 29:58] node _T_135 = cat(_T_134, _T_110[25]) @[Cat.scala 29:58] node _T_136 = cat(_T_135, _T_110[26]) @[Cat.scala 29:58] node _T_137 = cat(_T_136, _T_110[27]) @[Cat.scala 29:58] node _T_138 = cat(_T_137, _T_110[28]) @[Cat.scala 29:58] node _T_139 = cat(_T_138, _T_110[29]) @[Cat.scala 29:58] node _T_140 = cat(_T_139, _T_110[30]) @[Cat.scala 29:58] node _T_141 = and(_T_108, _T_140) @[el2_exu_alu_ctl.scala 72:44] wire _T_142 : UInt<1>[31] @[el2_lib.scala 178:24] _T_142[0] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[1] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[2] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[3] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[4] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[5] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[6] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[7] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[8] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[9] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[10] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[11] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[12] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[13] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[14] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[15] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[16] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[17] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[18] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[19] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[20] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[21] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[22] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[23] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[24] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[25] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[26] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[27] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[28] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[29] <= io.ap.sll @[el2_lib.scala 178:24] _T_142[30] <= io.ap.sll @[el2_lib.scala 178:24] node _T_143 = cat(_T_142[0], _T_142[1]) @[Cat.scala 29:58] node _T_144 = cat(_T_143, _T_142[2]) @[Cat.scala 29:58] node _T_145 = cat(_T_144, _T_142[3]) @[Cat.scala 29:58] node _T_146 = cat(_T_145, _T_142[4]) @[Cat.scala 29:58] node _T_147 = cat(_T_146, _T_142[5]) @[Cat.scala 29:58] node _T_148 = cat(_T_147, _T_142[6]) @[Cat.scala 29:58] node _T_149 = cat(_T_148, _T_142[7]) @[Cat.scala 29:58] node _T_150 = cat(_T_149, _T_142[8]) @[Cat.scala 29:58] node _T_151 = cat(_T_150, _T_142[9]) @[Cat.scala 29:58] node _T_152 = cat(_T_151, _T_142[10]) @[Cat.scala 29:58] node _T_153 = cat(_T_152, _T_142[11]) @[Cat.scala 29:58] node _T_154 = cat(_T_153, _T_142[12]) @[Cat.scala 29:58] node _T_155 = cat(_T_154, _T_142[13]) @[Cat.scala 29:58] node _T_156 = cat(_T_155, _T_142[14]) @[Cat.scala 29:58] node _T_157 = cat(_T_156, _T_142[15]) @[Cat.scala 29:58] node _T_158 = cat(_T_157, _T_142[16]) @[Cat.scala 29:58] node _T_159 = cat(_T_158, _T_142[17]) @[Cat.scala 29:58] node _T_160 = cat(_T_159, _T_142[18]) @[Cat.scala 29:58] node _T_161 = cat(_T_160, _T_142[19]) @[Cat.scala 29:58] node _T_162 = cat(_T_161, _T_142[20]) @[Cat.scala 29:58] node _T_163 = cat(_T_162, _T_142[21]) @[Cat.scala 29:58] node _T_164 = cat(_T_163, _T_142[22]) @[Cat.scala 29:58] node _T_165 = cat(_T_164, _T_142[23]) @[Cat.scala 29:58] node _T_166 = cat(_T_165, _T_142[24]) @[Cat.scala 29:58] node _T_167 = cat(_T_166, _T_142[25]) @[Cat.scala 29:58] node _T_168 = cat(_T_167, _T_142[26]) @[Cat.scala 29:58] node _T_169 = cat(_T_168, _T_142[27]) @[Cat.scala 29:58] node _T_170 = cat(_T_169, _T_142[28]) @[Cat.scala 29:58] node _T_171 = cat(_T_170, _T_142[29]) @[Cat.scala 29:58] node _T_172 = cat(_T_171, _T_142[30]) @[Cat.scala 29:58] node _T_173 = bits(io.a_in, 30, 0) @[el2_exu_alu_ctl.scala 72:99] node _T_174 = and(_T_172, _T_173) @[el2_exu_alu_ctl.scala 72:90] node _T_175 = or(_T_141, _T_174) @[el2_exu_alu_ctl.scala 72:68] node _T_176 = cat(_T_175, io.a_in) @[Cat.scala 29:58] shift_extend <= _T_176 @[el2_exu_alu_ctl.scala 72:16] wire shift_long : UInt<63> shift_long <= UInt<1>("h00") node _T_177 = dshr(shift_extend, shift_amount) @[el2_exu_alu_ctl.scala 75:32] shift_long <= _T_177 @[el2_exu_alu_ctl.scala 75:14] node _T_178 = bits(shift_long, 31, 0) @[el2_exu_alu_ctl.scala 77:27] node _T_179 = bits(shift_mask, 31, 0) @[el2_exu_alu_ctl.scala 77:46] node sout = and(_T_178, _T_179) @[el2_exu_alu_ctl.scala 77:34] node _T_180 = or(io.ap.sll, io.ap.srl) @[el2_exu_alu_ctl.scala 80:41] node sel_shift = or(_T_180, io.ap.sra) @[el2_exu_alu_ctl.scala 80:53] node _T_181 = or(io.ap.add, io.ap.sub) @[el2_exu_alu_ctl.scala 81:41] node _T_182 = not(io.ap.slt) @[el2_exu_alu_ctl.scala 81:56] node sel_adder = and(_T_181, _T_182) @[el2_exu_alu_ctl.scala 81:54] node _T_183 = or(io.ap.jal, io.pp_in.pcall) @[el2_exu_alu_ctl.scala 82:41] node _T_184 = or(_T_183, io.pp_in.pja) @[el2_exu_alu_ctl.scala 82:58] node sel_pc = or(_T_184, io.pp_in.pret) @[el2_exu_alu_ctl.scala 82:73] node _T_185 = bits(io.ap.csr_imm, 0, 0) @[el2_exu_alu_ctl.scala 83:47] node csr_write_data = mux(_T_185, io.b_in, io.a_in) @[el2_exu_alu_ctl.scala 83:32] node slt_one = and(io.ap.slt, lt) @[el2_exu_alu_ctl.scala 85:40] node _T_186 = cat(io.pc_in, UInt<1>("h00")) @[Cat.scala 29:58] node _T_187 = cat(io.brimm_in, UInt<1>("h00")) @[Cat.scala 29:58] node _T_188 = bits(_T_186, 12, 1) @[el2_lib.scala 201:24] node _T_189 = bits(_T_187, 12, 1) @[el2_lib.scala 201:40] node _T_190 = add(_T_188, _T_189) @[el2_lib.scala 201:31] node _T_191 = bits(_T_186, 31, 13) @[el2_lib.scala 202:20] node _T_192 = add(_T_191, UInt<1>("h01")) @[el2_lib.scala 202:27] node _T_193 = tail(_T_192, 1) @[el2_lib.scala 202:27] node _T_194 = bits(_T_186, 31, 13) @[el2_lib.scala 203:20] node _T_195 = sub(_T_194, UInt<1>("h01")) @[el2_lib.scala 203:27] node _T_196 = tail(_T_195, 1) @[el2_lib.scala 203:27] node _T_197 = bits(_T_187, 12, 12) @[el2_lib.scala 204:22] node _T_198 = bits(_T_190, 12, 12) @[el2_lib.scala 205:38] node _T_199 = eq(_T_198, UInt<1>("h00")) @[el2_lib.scala 205:27] node _T_200 = xor(_T_197, _T_199) @[el2_lib.scala 205:25] node _T_201 = bits(_T_200, 0, 0) @[el2_lib.scala 205:63] node _T_202 = bits(_T_186, 31, 13) @[el2_lib.scala 205:75] node _T_203 = eq(_T_197, UInt<1>("h00")) @[el2_lib.scala 206:8] node _T_204 = bits(_T_190, 12, 12) @[el2_lib.scala 206:26] node _T_205 = and(_T_203, _T_204) @[el2_lib.scala 206:14] node _T_206 = bits(_T_205, 0, 0) @[el2_lib.scala 206:51] node _T_207 = bits(_T_190, 12, 12) @[el2_lib.scala 207:26] node _T_208 = eq(_T_207, UInt<1>("h00")) @[el2_lib.scala 207:15] node _T_209 = and(_T_197, _T_208) @[el2_lib.scala 207:13] node _T_210 = bits(_T_209, 0, 0) @[el2_lib.scala 207:51] node _T_211 = mux(_T_201, _T_202, UInt<1>("h00")) @[Mux.scala 27:72] node _T_212 = mux(_T_206, _T_193, UInt<1>("h00")) @[Mux.scala 27:72] node _T_213 = mux(_T_210, _T_196, UInt<1>("h00")) @[Mux.scala 27:72] node _T_214 = or(_T_211, _T_212) @[Mux.scala 27:72] node _T_215 = or(_T_214, _T_213) @[Mux.scala 27:72] wire _T_216 : UInt<19> @[Mux.scala 27:72] _T_216 <= _T_215 @[Mux.scala 27:72] node _T_217 = bits(_T_190, 11, 0) @[el2_lib.scala 207:83] node _T_218 = cat(_T_216, _T_217) @[Cat.scala 29:58] node pcout = cat(_T_218, UInt<1>("h00")) @[Cat.scala 29:58] node _T_219 = bits(lout, 31, 0) @[el2_exu_alu_ctl.scala 91:32] node _T_220 = bits(sel_shift, 0, 0) @[el2_exu_alu_ctl.scala 92:15] node _T_221 = bits(sout, 31, 0) @[el2_exu_alu_ctl.scala 92:41] node _T_222 = bits(sel_adder, 0, 0) @[el2_exu_alu_ctl.scala 93:15] node _T_223 = bits(aout, 31, 0) @[el2_exu_alu_ctl.scala 93:41] node _T_224 = bits(sel_pc, 0, 0) @[el2_exu_alu_ctl.scala 94:12] node _T_225 = bits(io.ap.csr_write, 0, 0) @[el2_exu_alu_ctl.scala 95:21] node _T_226 = bits(csr_write_data, 31, 0) @[el2_exu_alu_ctl.scala 95:51] node _T_227 = bits(slt_one, 0, 0) @[el2_exu_alu_ctl.scala 96:13] node _T_228 = cat(UInt<31>("h00"), slt_one) @[Cat.scala 29:58] node _T_229 = mux(_T_227, _T_228, _T_219) @[Mux.scala 98:16] node _T_230 = mux(_T_225, _T_226, _T_229) @[Mux.scala 98:16] node _T_231 = mux(_T_224, pcout, _T_230) @[Mux.scala 98:16] node _T_232 = mux(_T_222, _T_223, _T_231) @[Mux.scala 98:16] node _T_233 = mux(_T_220, _T_221, _T_232) @[Mux.scala 98:16] result <= _T_233 @[el2_exu_alu_ctl.scala 91:16] node _T_234 = or(io.ap.jal, io.pp_in.pcall) @[el2_exu_alu_ctl.scala 100:45] node _T_235 = or(_T_234, io.pp_in.pja) @[el2_exu_alu_ctl.scala 101:20] node any_jal = or(_T_235, io.pp_in.pret) @[el2_exu_alu_ctl.scala 102:20] node _T_236 = and(io.ap.beq, eq) @[el2_exu_alu_ctl.scala 105:40] node _T_237 = and(io.ap.bne, ne) @[el2_exu_alu_ctl.scala 105:59] node _T_238 = or(_T_236, _T_237) @[el2_exu_alu_ctl.scala 105:46] node _T_239 = and(io.ap.blt, lt) @[el2_exu_alu_ctl.scala 105:85] node _T_240 = or(_T_238, _T_239) @[el2_exu_alu_ctl.scala 105:72] node _T_241 = and(io.ap.bge, ge) @[el2_exu_alu_ctl.scala 105:104] node _T_242 = or(_T_240, _T_241) @[el2_exu_alu_ctl.scala 105:91] node actual_taken = or(_T_242, any_jal) @[el2_exu_alu_ctl.scala 105:110] node _T_243 = and(io.valid_in, io.ap.predict_nt) @[el2_exu_alu_ctl.scala 110:42] node _T_244 = eq(actual_taken, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 110:63] node _T_245 = and(_T_243, _T_244) @[el2_exu_alu_ctl.scala 110:61] node _T_246 = eq(any_jal, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 110:79] node _T_247 = and(_T_245, _T_246) @[el2_exu_alu_ctl.scala 110:77] node _T_248 = and(io.valid_in, io.ap.predict_t) @[el2_exu_alu_ctl.scala 110:104] node _T_249 = and(_T_248, actual_taken) @[el2_exu_alu_ctl.scala 110:123] node _T_250 = eq(any_jal, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 110:141] node _T_251 = and(_T_249, _T_250) @[el2_exu_alu_ctl.scala 110:139] node _T_252 = or(_T_247, _T_251) @[el2_exu_alu_ctl.scala 110:89] io.pred_correct_out <= _T_252 @[el2_exu_alu_ctl.scala 110:26] node _T_253 = bits(any_jal, 0, 0) @[el2_exu_alu_ctl.scala 112:37] node _T_254 = bits(aout, 31, 1) @[el2_exu_alu_ctl.scala 112:49] node _T_255 = bits(pcout, 31, 1) @[el2_exu_alu_ctl.scala 112:62] node _T_256 = mux(_T_253, _T_254, _T_255) @[el2_exu_alu_ctl.scala 112:28] io.flush_path_out <= _T_256 @[el2_exu_alu_ctl.scala 112:22] node _T_257 = eq(actual_taken, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 115:47] node _T_258 = and(io.ap.predict_t, _T_257) @[el2_exu_alu_ctl.scala 115:45] node _T_259 = and(io.ap.predict_nt, actual_taken) @[el2_exu_alu_ctl.scala 115:82] node cond_mispredict = or(_T_258, _T_259) @[el2_exu_alu_ctl.scala 115:62] node _T_260 = bits(io.pp_in.prett, 31, 1) @[el2_exu_alu_ctl.scala 118:61] node _T_261 = bits(aout, 31, 1) @[el2_exu_alu_ctl.scala 118:76] node _T_262 = neq(_T_260, _T_261) @[el2_exu_alu_ctl.scala 118:68] node target_mispredict = and(io.pp_in.pret, _T_262) @[el2_exu_alu_ctl.scala 118:44] node _T_263 = or(io.ap.jal, cond_mispredict) @[el2_exu_alu_ctl.scala 120:42] node _T_264 = or(_T_263, target_mispredict) @[el2_exu_alu_ctl.scala 120:60] node _T_265 = and(_T_264, io.valid_in) @[el2_exu_alu_ctl.scala 120:81] node _T_266 = eq(io.flush_upper_x, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 120:97] node _T_267 = and(_T_265, _T_266) @[el2_exu_alu_ctl.scala 120:95] node _T_268 = eq(io.flush_lower_r, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 120:119] node _T_269 = and(_T_267, _T_268) @[el2_exu_alu_ctl.scala 120:117] io.flush_upper_out <= _T_269 @[el2_exu_alu_ctl.scala 120:26] node _T_270 = or(io.ap.jal, cond_mispredict) @[el2_exu_alu_ctl.scala 122:42] node _T_271 = or(_T_270, target_mispredict) @[el2_exu_alu_ctl.scala 122:60] node _T_272 = and(_T_271, io.valid_in) @[el2_exu_alu_ctl.scala 122:81] node _T_273 = eq(io.flush_upper_x, UInt<1>("h00")) @[el2_exu_alu_ctl.scala 122:97] node _T_274 = and(_T_272, _T_273) @[el2_exu_alu_ctl.scala 122:95] node _T_275 = or(_T_274, io.flush_lower_r) @[el2_exu_alu_ctl.scala 122:117] io.flush_final_out <= _T_275 @[el2_exu_alu_ctl.scala 122:26] wire newhist : UInt<2> newhist <= UInt<1>("h00") node _T_276 = bits(io.pp_in.hist, 1, 1) @[el2_exu_alu_ctl.scala 126:35] node _T_277 = bits(io.pp_in.hist, 0, 0) @[el2_exu_alu_ctl.scala 126:55] node _T_278 = and(_T_276, _T_277) @[el2_exu_alu_ctl.scala 126:39] node _T_279 = bits(io.pp_in.hist, 0, 0) @[el2_exu_alu_ctl.scala 126:77] node _T_280 = not(_T_279) @[el2_exu_alu_ctl.scala 126:63] node _T_281 = and(_T_280, actual_taken) @[el2_exu_alu_ctl.scala 126:81] node _T_282 = or(_T_278, _T_281) @[el2_exu_alu_ctl.scala 126:60] node _T_283 = bits(io.pp_in.hist, 1, 1) @[el2_exu_alu_ctl.scala 127:20] node _T_284 = not(_T_283) @[el2_exu_alu_ctl.scala 127:6] node _T_285 = not(actual_taken) @[el2_exu_alu_ctl.scala 127:26] node _T_286 = and(_T_284, _T_285) @[el2_exu_alu_ctl.scala 127:24] node _T_287 = bits(io.pp_in.hist, 1, 1) @[el2_exu_alu_ctl.scala 127:58] node _T_288 = and(_T_287, actual_taken) @[el2_exu_alu_ctl.scala 127:62] node _T_289 = or(_T_286, _T_288) @[el2_exu_alu_ctl.scala 127:42] node _T_290 = cat(_T_282, _T_289) @[Cat.scala 29:58] newhist <= _T_290 @[el2_exu_alu_ctl.scala 126:14] io.predict_p_out.way <= io.pp_in.way @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.pja <= io.pp_in.pja @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.pret <= io.pp_in.pret @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.pcall <= io.pp_in.pcall @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.prett <= io.pp_in.prett @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.br_start_error <= io.pp_in.br_start_error @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.br_error <= io.pp_in.br_error @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.valid <= io.pp_in.valid @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.toffset <= io.pp_in.toffset @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.hist <= io.pp_in.hist @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.pc4 <= io.pp_in.pc4 @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.boffset <= io.pp_in.boffset @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.ataken <= io.pp_in.ataken @[el2_exu_alu_ctl.scala 129:30] io.predict_p_out.misp <= io.pp_in.misp @[el2_exu_alu_ctl.scala 129:30] node _T_291 = not(io.flush_upper_x) @[el2_exu_alu_ctl.scala 130:33] node _T_292 = not(io.flush_lower_r) @[el2_exu_alu_ctl.scala 130:53] node _T_293 = and(_T_291, _T_292) @[el2_exu_alu_ctl.scala 130:51] node _T_294 = or(cond_mispredict, target_mispredict) @[el2_exu_alu_ctl.scala 130:90] node _T_295 = and(_T_293, _T_294) @[el2_exu_alu_ctl.scala 130:71] io.predict_p_out.misp <= _T_295 @[el2_exu_alu_ctl.scala 130:30] io.predict_p_out.ataken <= actual_taken @[el2_exu_alu_ctl.scala 131:30] io.predict_p_out.hist <= newhist @[el2_exu_alu_ctl.scala 132:30]