[ { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_dma_rdata", "sources":[ "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_lsu_single_ecc_error_incr", "sources":[ "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r", "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_wren", "sources":[ "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_lsu_p_valid", "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", "~el2_lsu|el2_lsu>io_lsu_p_fast_int", "~el2_lsu|el2_lsu>io_lsu_p_load", "~el2_lsu|el2_lsu>io_lsu_p_store", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_wr_addr_hi", "sources":[ "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_rden", "sources":[ "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_lsu_p_valid", "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", "~el2_lsu|el2_lsu>io_lsu_p_fast_int", "~el2_lsu|el2_lsu>io_lsu_p_load", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_lsu_p_store", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_picm_rden", "sources":[ "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_lsu_p_valid", "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", "~el2_lsu|el2_lsu>io_lsu_p_fast_int", "~el2_lsu|el2_lsu>io_lsu_p_load", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_ready", "sources":[ "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_picm_wren", "sources":[ "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r", "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_lsu_trigger_match_m", "sources":[ "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_store", "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_store", "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_load", "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_select", "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_store", "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_store", "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_load", "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_select", "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_load", "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_select", "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_load", "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_select", "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_tdata2", "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_tdata2", "~el2_lsu|el2_lsu>io_trigger_pkt_any_0_match_", "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_tdata2", "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_tdata2", "~el2_lsu|el2_lsu>io_trigger_pkt_any_1_match_", "~el2_lsu|el2_lsu>io_trigger_pkt_any_3_match_", "~el2_lsu|el2_lsu>io_trigger_pkt_any_2_match_", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_picm_wraddr", "sources":[ "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_dma_ecc_error", "sources":[ "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_lsu_fastint_stall_any", "sources":[ "~el2_lsu|el2_lsu>io_dec_tlu_core_ecc_disable", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_rd_addr_lo", "sources":[ "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_rd_addr_hi", "sources":[ "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_picm_wr_data", "sources":[ "~el2_lsu|el2_lsu>io_dma_mem_wdata", "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_lsu_p_valid", "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", "~el2_lsu|el2_lsu>io_lsu_p_fast_int", "~el2_lsu|el2_lsu>io_lsu_p_load", "~el2_lsu|el2_lsu>io_lsu_p_store", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_picm_mken", "sources":[ "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_lsu_p_valid", "~el2_lsu|el2_lsu>io_dec_tlu_flush_lower_r", "~el2_lsu|el2_lsu>io_lsu_p_fast_int", "~el2_lsu|el2_lsu>io_lsu_p_store", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_wr_addr_lo", "sources":[ "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_picm_rdaddr", "sources":[ "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_wr_data_lo", "sources":[ "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_dma_mem_wdata", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_lsu_store_stall_any", "sources":[ "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_lsu|el2_lsu>io_dccm_wr_data_hi", "sources":[ "~el2_lsu|el2_lsu>io_dma_dccm_req", "~el2_lsu|el2_lsu>io_dma_mem_write", "~el2_lsu|el2_lsu>io_exu_lsu_rs1_d", "~el2_lsu|el2_lsu>io_dma_mem_addr", "~el2_lsu|el2_lsu>io_dec_lsu_offset_d", "~el2_lsu|el2_lsu>io_dec_lsu_valid_raw_d", "~el2_lsu|el2_lsu>io_lsu_p_load_ldst_bypass_d", "~el2_lsu|el2_lsu>io_lsu_p_dword", "~el2_lsu|el2_lsu>io_lsu_p_half", "~el2_lsu|el2_lsu>io_lsu_p_word", "~el2_lsu|el2_lsu>io_dma_mem_sz", "~el2_lsu|el2_lsu>io_dma_mem_wdata", "~el2_lsu|el2_lsu>io_picm_rd_data", "~el2_lsu|el2_lsu>io_dccm_rd_data_hi", "~el2_lsu|el2_lsu>io_dccm_rd_data_lo", "~el2_lsu|el2_lsu>io_dec_tlu_i0_kill_writeb_r" ] }, { "class":"firrtl.EmitCircuitAnnotation", "emitter":"firrtl.VerilogEmitter" }, { "class":"firrtl.transforms.BlackBoxResourceAnno", "target":"el2_lsu.TEC_RV_ICG", "resourceId":"/vsrc/TEC_RV_ICG.v" }, { "class":"firrtl.options.TargetDirAnnotation", "directory":"." }, { "class":"firrtl.options.OutputAnnotationFileAnnotation", "file":"el2_lsu" }, { "class":"firrtl.transforms.BlackBoxTargetDirAnno", "targetDir":"." } ]