[ { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_word", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_sz" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_load_ldst_bypass_d", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_load_ldst_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_fast_int", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_fast_int", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_end_addr_r", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_ldst_dual_r", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_addr_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_store", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_store", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_write" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_half", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_sz" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_fir_addr", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_ld_data_corr_r" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_end_addr_m", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_ldst_dual_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_addr_m" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_store_data_m", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_lsu_result_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_picm_mask_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_store_data_bypass_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_addr_in_pic_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_addr_external_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_bus_read_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_ld_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_by", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_store_data_bypass_d", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_store_data_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_addr_d", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_lsu_result_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_load_ldst_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_exu_lsu_rs1_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_addr", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_offset_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_load_ldst_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_addr_external_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_bus_read_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_ld_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_by", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_dma", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_dma", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_stack", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_stack", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_valid", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_dccm_req", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_valid", "~lsu_lsc_ctl|lsu_lsc_ctl>io_flush_m_up", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_fast_int" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_commit_r", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_dma", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_valid", "~lsu_lsc_ctl|lsu_lsc_ctl>io_flush_r", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_store", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_load" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_unsign", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_unsign", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_addr_in_pic_d", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_lsu_result_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_load_ldst_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_exu_lsu_rs1_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_addr", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_load_ldst_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_offset_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_addr_external_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_bus_read_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_ld_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_by", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_dword", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_dword", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_sz" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_lsu_result_m", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_addr_external_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_bus_read_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_ld_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_by", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_end_addr_d", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_lsu_result_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_load_ldst_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_exu_lsu_rs1_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_addr", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_load_ldst_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_addr_external_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_bus_read_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_ld_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_offset_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_by", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_dword", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_dword", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_sz" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_load", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_load", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_write" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_single_ecc_error_incr", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_valid", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_single_ecc_error_r", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_commit_r", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_dma", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_double_ecc_error_r", "~lsu_lsc_ctl|lsu_lsc_ctl>io_flush_r", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_store", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_load" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_dword", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_dword", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_sz" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_by", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_by", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_sz" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_store_data_bypass_m", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_store_data_bypass_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_addr_in_dccm_d", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_lsu_result_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_load_ldst_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_exu_exu_lsu_rs1_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_addr", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_valid_raw_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_load_ldst_bypass_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dec_lsu_offset_d", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_addr_external_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_bus_read_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_ld_data_m", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_by", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_m_bits_unsign", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_dword", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_d_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_dword", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_p_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_dma_lsc_ctl_dma_mem_sz" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_result_corr_r", "sources":[ "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_word", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_ld_data_corr_r", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_half", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_by", "~lsu_lsc_ctl|lsu_lsc_ctl>io_lsu_pkt_r_bits_unsign" ] }, { "class":"firrtl.EmitCircuitAnnotation", "emitter":"firrtl.VerilogEmitter" }, { "class":"firrtl.transforms.BlackBoxResourceAnno", "target":"lsu_lsc_ctl.gated_latch", "resourceId":"/vsrc/gated_latch.sv" }, { "class":"firrtl.options.TargetDirAnnotation", "directory":"." }, { "class":"firrtl.options.OutputAnnotationFileAnnotation", "file":"lsu_lsc_ctl" }, { "class":"firrtl.transforms.BlackBoxTargetDirAnno", "targetDir":"." } ]