[ { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_hist", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_hist", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pret", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pja", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pcall", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pred_correct_out", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_valid_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_nt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pret", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_t", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pja", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pcall", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_valid", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_valid" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_final_out", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_lower_r", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_valid_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_upper_x", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pret", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_prett", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_t", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_nt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pja", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pcall", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_ataken", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pret", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pja", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pcall", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_toffset", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_toffset" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_upper_out", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_lower_r", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_valid_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_upper_x", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pret", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_prett", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_t", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_nt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pja", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pcall", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_path_out", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pret", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pja", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pcall", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pc_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_brimm_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_pret", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pret" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_pja", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pja" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_pc4", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pc4" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_misp", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_upper_x", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_flush_lower_r", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pret", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_t", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_predict_nt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_prett", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bge", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pja", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_blt", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_jal", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pcall", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_sub", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_beq", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_bne", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_a_in", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_ap_unsign", "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_b_in" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_way", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_way" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_pcall", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_pcall" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_br_start_error", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_br_start_error" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_br_error", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_br_error" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_prett", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_prett" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_exu_alu_ctl|el2_exu_alu_ctl>io_predict_p_out_bits_boffset", "sources":[ "~el2_exu_alu_ctl|el2_exu_alu_ctl>io_pp_in_bits_boffset" ] }, { "class":"firrtl.EmitCircuitAnnotation", "emitter":"firrtl.VerilogEmitter" }, { "class":"firrtl.transforms.BlackBoxResourceAnno", "target":"el2_exu_alu_ctl.gated_latch", "resourceId":"/vsrc/gated_latch.v" }, { "class":"firrtl.options.TargetDirAnnotation", "directory":"." }, { "class":"firrtl.options.OutputAnnotationFileAnnotation", "file":"el2_exu_alu_ctl" }, { "class":"firrtl.transforms.BlackBoxTargetDirAnno", "targetDir":"." } ]