[ { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_dma_access_ok", "sources":[ "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_iccm_access_bf", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_bf", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_fb_consume2", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_fb_consume1", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_dec_tlu_flush_noredir_wb", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_bf", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_write_stall", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_bf_raw", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_dma_active", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_btb_target_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_path_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_hit_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_hit_taken_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_f" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_pmu_fetch_stall", "sources":[ "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_bf_raw", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_dma_active", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_fb_consume2", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_fb_consume1" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_bf", "sources":[ "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_btb_target_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_path_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_hit_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_hit_taken_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_f" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_iccm_access_bf", "sources":[ "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_bf", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_btb_target_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_path_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_hit_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_hit_taken_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_f" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_bf", "sources":[ "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_dec_tlu_flush_noredir_wb", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_write_stall", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_bf_raw", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_dma_active", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_fb_consume2", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_fb_consume1", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_hit_f" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_region_acc_fault_bf", "sources":[ "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_bf", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_btb_target_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_path_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_hit_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_hit_taken_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_f" ] }, { "class":"firrtl.transforms.CombinationalPath", "sink":"~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_uncacheable_bf", "sources":[ "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_dec_tlu_mrac_ff", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_bf", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_btb_target_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_path_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_addr_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ic_hit_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_exu_flush_final", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifu_bp_hit_taken_f", "~el2_ifu_ifc_ctl|el2_ifu_ifc_ctl>io_ifc_fetch_req_f" ] }, { "class":"firrtl.EmitCircuitAnnotation", "emitter":"firrtl.VerilogEmitter" }, { "class":"firrtl.transforms.BlackBoxResourceAnno", "target":"el2_ifu_ifc_ctl.gated_latch", "resourceId":"/vsrc/gated_latch.v" }, { "class":"firrtl.options.TargetDirAnnotation", "directory":"." }, { "class":"firrtl.options.OutputAnnotationFileAnnotation", "file":"el2_ifu_ifc_ctl" }, { "class":"firrtl.transforms.BlackBoxTargetDirAnno", "targetDir":"." } ]