set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/clk i:/WORK/quasar_wrapper/clock
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[10] i:/WORK/quasar_wrapper/io_core_id[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[11] i:/WORK/quasar_wrapper/io_core_id[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[12] i:/WORK/quasar_wrapper/io_core_id[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[13] i:/WORK/quasar_wrapper/io_core_id[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[14] i:/WORK/quasar_wrapper/io_core_id[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[15] i:/WORK/quasar_wrapper/io_core_id[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[16] i:/WORK/quasar_wrapper/io_core_id[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[17] i:/WORK/quasar_wrapper/io_core_id[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[18] i:/WORK/quasar_wrapper/io_core_id[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[19] i:/WORK/quasar_wrapper/io_core_id[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[20] i:/WORK/quasar_wrapper/io_core_id[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[21] i:/WORK/quasar_wrapper/io_core_id[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[22] i:/WORK/quasar_wrapper/io_core_id[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[23] i:/WORK/quasar_wrapper/io_core_id[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[24] i:/WORK/quasar_wrapper/io_core_id[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[25] i:/WORK/quasar_wrapper/io_core_id[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[26] i:/WORK/quasar_wrapper/io_core_id[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[27] i:/WORK/quasar_wrapper/io_core_id[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[28] i:/WORK/quasar_wrapper/io_core_id[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[29] i:/WORK/quasar_wrapper/io_core_id[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[30] i:/WORK/quasar_wrapper/io_core_id[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[31] i:/WORK/quasar_wrapper/io_core_id[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[4] i:/WORK/quasar_wrapper/io_core_id[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[5] i:/WORK/quasar_wrapper/io_core_id[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[6] i:/WORK/quasar_wrapper/io_core_id[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[7] i:/WORK/quasar_wrapper/io_core_id[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[8] i:/WORK/quasar_wrapper/io_core_id[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/core_id[9] i:/WORK/quasar_wrapper/io_core_id[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dbg_bus_clk_en  i:/WORK/quasar_wrapper/io_dbg_bus_clk_en
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dbg_rst_l  i:/WORK/quasar_wrapper/io_dbg_rst_l
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[BC1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_BC1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[BC2] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_BC2_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[DS] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_DS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[LS] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_LS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[RME] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RME_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[RM][0] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_0[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[RM][1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_0[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[RM][2] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_0[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[RM][3] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_0[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[SD] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_SD_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[TEST1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_TEST1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[0]\[TEST_RNM] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_TEST_RNM_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[BC1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_BC1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[BC2] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_BC2_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[DS] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_DS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[LS] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_LS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[RME] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RME_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[RM][0] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_1[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[RM][1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_1[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[RM][2] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_1[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[RM][3] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_1[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[SD] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_SD_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[TEST1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_TEST1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[1]\[TEST_RNM] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_TEST_RNM_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[BC1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_BC1_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[BC2] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_BC2_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[DS] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_DS_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[LS] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_LS_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[RME] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RME_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[RM][0] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_2[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[RM][1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_2[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[RM][2] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_2[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[RM][3] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_2[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[SD] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_SD_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[TEST1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_TEST1_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[2]\[TEST_RNM] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_TEST_RNM_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[BC1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_BC1_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[BC2] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_BC2_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[DS] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_DS_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[LS] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_LS_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[RME] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RME_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[RM][0] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_3[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[RM][1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_3[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[RM][2] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_3[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[RM][3] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_RM_3[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[SD] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_SD_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[TEST1] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_TEST1_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dccm_ext_in_pkt[3]\[TEST_RNM] i:/WORK/quasar_wrapper/io_dccm_ext_in_pkt_TEST_RNM_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[0] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[10] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[11] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[12] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[13] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[14] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[15] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[16] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[17] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[18] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[19] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[1] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[20] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[21] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[22] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[23] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[24] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[25] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[26] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[27] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[28] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[29] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[2] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[30] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[31] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[31]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[3] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[4] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[5] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[6] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[7] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[8] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_araddr[9] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_addr[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_arid[0] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_id
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_arsize[0] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_size[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_arsize[1] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_size[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_arsize[2] i:/WORK/quasar_wrapper/io_dma_brg_ar_bits_size[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_arvalid i:/WORK/quasar_wrapper/io_dma_brg_ar_valid
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[0] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[10] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[11] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[12] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[13] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[14] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[15] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[16] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[17] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[18] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[19] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[1] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[20] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[21] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[22] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[23] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[24] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[25] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[26] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[27] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[28] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[29] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[2] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[30] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[31] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[31]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[3] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[4] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[5] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[6] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[7] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[8] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awaddr[9] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_addr[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awid[0] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_id
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awsize[0] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_size[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awsize[1] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_size[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awsize[2] i:/WORK/quasar_wrapper/io_dma_brg_aw_bits_size[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_awvalid i:/WORK/quasar_wrapper/io_dma_brg_aw_valid
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_bready i:/WORK/quasar_wrapper/io_dma_brg_b_ready
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_rready i:/WORK/quasar_wrapper/io_dma_brg_r_ready
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[0] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[10] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[11] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[12] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[13] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[14] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[15] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[16] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[17] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[18] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[19] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[1] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[20] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[21] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[22] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[23] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[24] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[25] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[26] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[27] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[28] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[29] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[2] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[30] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[31] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[31]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[32] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[32]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[33] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[33]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[34] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[34]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[35] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[35]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[36] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[36]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[37] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[37]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[38] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[38]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[39] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[39]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[3] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[40] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[40]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[41] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[41]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[42] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[42]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[43] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[43]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[44] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[44]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[45] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[45]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[46] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[46]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[47] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[47]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[48] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[48]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[49] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[49]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[4] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[50] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[50]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[51] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[51]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[52] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[52]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[53] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[53]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[54] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[54]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[55] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[55]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[56] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[56]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[57] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[57]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[58] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[58]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[59] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[59]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[5] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[60] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[60]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[61] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[61]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[62] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[62]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[63] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[63]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[6] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[7] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[8] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wdata[9] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_data[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wstrb[0] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_strb[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wstrb[1] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_strb[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wstrb[2] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_strb[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wstrb[3] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_strb[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wstrb[4] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_strb[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wstrb[5] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_strb[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wstrb[6] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_strb[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wstrb[7] i:/WORK/quasar_wrapper/io_dma_brg_w_bits_strb[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_axi_wvalid i:/WORK/quasar_wrapper/io_dma_brg_w_valid
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/dma_bus_clk_en  i:/WORK/quasar_wrapper/io_dma_bus_clk_en
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[10] i:/WORK/quasar_wrapper/io_extintsrc_req[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[11] i:/WORK/quasar_wrapper/io_extintsrc_req[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[12] i:/WORK/quasar_wrapper/io_extintsrc_req[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[13] i:/WORK/quasar_wrapper/io_extintsrc_req[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[14] i:/WORK/quasar_wrapper/io_extintsrc_req[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[15] i:/WORK/quasar_wrapper/io_extintsrc_req[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[16] i:/WORK/quasar_wrapper/io_extintsrc_req[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[17] i:/WORK/quasar_wrapper/io_extintsrc_req[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[18] i:/WORK/quasar_wrapper/io_extintsrc_req[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[19] i:/WORK/quasar_wrapper/io_extintsrc_req[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[1] i:/WORK/quasar_wrapper/io_extintsrc_req[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[20] i:/WORK/quasar_wrapper/io_extintsrc_req[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[21] i:/WORK/quasar_wrapper/io_extintsrc_req[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[22] i:/WORK/quasar_wrapper/io_extintsrc_req[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[23] i:/WORK/quasar_wrapper/io_extintsrc_req[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[24] i:/WORK/quasar_wrapper/io_extintsrc_req[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[25] i:/WORK/quasar_wrapper/io_extintsrc_req[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[26] i:/WORK/quasar_wrapper/io_extintsrc_req[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[27] i:/WORK/quasar_wrapper/io_extintsrc_req[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[28] i:/WORK/quasar_wrapper/io_extintsrc_req[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[29] i:/WORK/quasar_wrapper/io_extintsrc_req[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[2] i:/WORK/quasar_wrapper/io_extintsrc_req[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[30] i:/WORK/quasar_wrapper/io_extintsrc_req[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[31] i:/WORK/quasar_wrapper/io_extintsrc_req[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[3] i:/WORK/quasar_wrapper/io_extintsrc_req[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[4] i:/WORK/quasar_wrapper/io_extintsrc_req[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[5] i:/WORK/quasar_wrapper/io_extintsrc_req[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[6] i:/WORK/quasar_wrapper/io_extintsrc_req[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[7] i:/WORK/quasar_wrapper/io_extintsrc_req[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[8] i:/WORK/quasar_wrapper/io_extintsrc_req[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/extintsrc_req[9] i:/WORK/quasar_wrapper/io_extintsrc_req[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/i_cpu_halt_req  i:/WORK/quasar_wrapper/io_i_cpu_halt_req
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/i_cpu_run_req  i:/WORK/quasar_wrapper/io_i_cpu_run_req
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[BC1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_BC1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[BC2] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_BC2_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[DS] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_DS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[LS] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_LS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[RME] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RME_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[RM][0] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RM_0[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[RM][1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RM_0[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[RM][2] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RM_0[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[RM][3] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RM_0[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[SD] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_SD_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[TEST1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_TEST1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][0]\[TEST_RNM] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_TEST_RNM_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[BC1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_BC1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[BC2] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_BC2_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[DS] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_DS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[LS] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_LS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[RME] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RME_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[RM][0] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RM_1[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[RM][1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RM_1[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[RM][2] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RM_1[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[RM][3] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_RM_1[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[SD] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_SD_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[TEST1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_TEST1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[0][1]\[TEST_RNM] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_0_TEST_RNM_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[BC1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_BC1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[BC2] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_BC2_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[DS] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_DS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[LS] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_LS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[RME] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RME_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[RM][0] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RM_0[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[RM][1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RM_0[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[RM][2] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RM_0[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[RM][3] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RM_0[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[SD] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_SD_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[TEST1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_TEST1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][0]\[TEST_RNM] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_TEST_RNM_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[BC1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_BC1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[BC2] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_BC2_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[DS] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_DS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[LS] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_LS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[RME] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RME_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[RM][0] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RM_1[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[RM][1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RM_1[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[RM][2] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RM_1[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[RM][3] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_RM_1[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[SD] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_SD_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[TEST1] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_TEST1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_data_ext_in_pkt[1][1]\[TEST_RNM] i:/WORK/quasar_wrapper/io_ic_data_ext_in_pkt_1_TEST_RNM_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[BC1] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_BC1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[BC2] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_BC2_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[DS] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_DS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[LS] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_LS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[RME] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RME_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[RM][0] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RM_0[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[RM][1] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RM_1[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[RM][2] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RM_0[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[RM][3] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RM_0[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[SD] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_SD_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[TEST1] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_TEST1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[0]\[TEST_RNM] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_TEST_RNM_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[BC1] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_BC1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[BC2] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_BC2_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[DS] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_DS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[LS] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_LS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[RME] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RME_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[RM][0] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RM_0[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[RM][1] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RM_1[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[RM][2] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RM_1[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[RM][3] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_RM_1[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[SD] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_SD_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[TEST1] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_TEST1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ic_tag_ext_in_pkt[1]\[TEST_RNM] i:/WORK/quasar_wrapper/io_ic_tag_ext_in_pkt_TEST_RNM_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[BC1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_BC1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[BC2] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_BC1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[DS] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_BC1_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[LS] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_BC1_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[RME] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_BC2_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[RM][0] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_0[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[RM][1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_1[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[RM][2] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_2[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[RM][3] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_3[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[SD] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_BC2_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[TEST1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_BC2_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[0]\[TEST_RNM] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_BC2_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[BC1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_DS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[BC2] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_DS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[DS] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_DS_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[LS] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_DS_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[RME] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_LS_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[RM][0] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_0[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[RM][1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_1[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[RM][2] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_2[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[RM][3] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_3[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[SD] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_LS_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[TEST1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_LS_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[1]\[TEST_RNM] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_LS_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[BC1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RME_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[BC2] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RME_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[DS] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RME_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[LS] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RME_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[RME] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_0[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[RM][0] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_0[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[RM][1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_1[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[RM][2] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_1[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[RM][3] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_2[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[SD] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_2[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[TEST1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_3[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[2]\[TEST_RNM] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_RM_3[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[BC1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_SD_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[BC2] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_SD_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[DS] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_SD_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[LS] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_SD_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[RME] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_TEST1_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[RM][0] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_TEST1_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[RM][1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_TEST1_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[RM][2] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_TEST1_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[RM][3] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_TEST_RNM_0
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[SD] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_TEST_RNM_1
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[TEST1] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_TEST_RNM_2
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/iccm_ext_in_pkt[3]\[TEST_RNM] i:/WORK/quasar_wrapper/io_iccm_ext_in_pkt_TEST_RNM_3
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_arready i:/WORK/quasar_wrapper/io_ifu_brg_ar_ready
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[0] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[10] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[11] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[12] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[13] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[14] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[15] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[16] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[17] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[18] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[19] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[1] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[20] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[21] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[22] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[23] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[24] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[25] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[26] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[27] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[28] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[29] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[2] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[30] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[31] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[31]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[32] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[32]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[33] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[33]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[34] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[34]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[35] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[35]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[36] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[36]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[37] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[37]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[38] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[38]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[39] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[39]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[3] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[40] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[40]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[41] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[41]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[42] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[42]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[43] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[43]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[44] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[44]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[45] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[45]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[46] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[46]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[47] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[47]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[48] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[48]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[49] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[49]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[4] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[50] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[50]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[51] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[51]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[52] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[52]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[53] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[53]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[54] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[54]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[55] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[55]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[56] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[56]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[57] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[57]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[58] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[58]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[59] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[59]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[5] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[60] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[60]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[61] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[61]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[62] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[62]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[63] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[63]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[6] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[7] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[8] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rdata[9] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_data[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rid[0] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_id[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rid[1] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_id[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rid[2] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_id[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rresp[0] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_resp[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rresp[1] i:/WORK/quasar_wrapper/io_ifu_brg_r_bits_resp[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_axi_rvalid i:/WORK/quasar_wrapper/io_ifu_brg_r_valid
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/ifu_bus_clk_en  i:/WORK/quasar_wrapper/io_ifu_bus_clk_en
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[10] i:/WORK/quasar_wrapper/io_jtag_id[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[11] i:/WORK/quasar_wrapper/io_jtag_id[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[12] i:/WORK/quasar_wrapper/io_jtag_id[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[13] i:/WORK/quasar_wrapper/io_jtag_id[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[14] i:/WORK/quasar_wrapper/io_jtag_id[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[15] i:/WORK/quasar_wrapper/io_jtag_id[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[16] i:/WORK/quasar_wrapper/io_jtag_id[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[17] i:/WORK/quasar_wrapper/io_jtag_id[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[18] i:/WORK/quasar_wrapper/io_jtag_id[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[19] i:/WORK/quasar_wrapper/io_jtag_id[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[1] i:/WORK/quasar_wrapper/io_jtag_id[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[20] i:/WORK/quasar_wrapper/io_jtag_id[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[21] i:/WORK/quasar_wrapper/io_jtag_id[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[22] i:/WORK/quasar_wrapper/io_jtag_id[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[23] i:/WORK/quasar_wrapper/io_jtag_id[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[24] i:/WORK/quasar_wrapper/io_jtag_id[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[25] i:/WORK/quasar_wrapper/io_jtag_id[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[26] i:/WORK/quasar_wrapper/io_jtag_id[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[27] i:/WORK/quasar_wrapper/io_jtag_id[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[28] i:/WORK/quasar_wrapper/io_jtag_id[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[29] i:/WORK/quasar_wrapper/io_jtag_id[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[2] i:/WORK/quasar_wrapper/io_jtag_id[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[30] i:/WORK/quasar_wrapper/io_jtag_id[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[31] i:/WORK/quasar_wrapper/io_jtag_id[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[3] i:/WORK/quasar_wrapper/io_jtag_id[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[4] i:/WORK/quasar_wrapper/io_jtag_id[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[5] i:/WORK/quasar_wrapper/io_jtag_id[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[6] i:/WORK/quasar_wrapper/io_jtag_id[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[7] i:/WORK/quasar_wrapper/io_jtag_id[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[8] i:/WORK/quasar_wrapper/io_jtag_id[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_id[9] i:/WORK/quasar_wrapper/io_jtag_id[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_tck  i:/WORK/quasar_wrapper/io_jtag_tck
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_tdi  i:/WORK/quasar_wrapper/io_jtag_tdi
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_tms  i:/WORK/quasar_wrapper/io_jtag_tms
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/jtag_trst_n  i:/WORK/quasar_wrapper/io_jtag_trst_n
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_arready i:/WORK/quasar_wrapper/io_lsu_brg_ar_ready
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_awready i:/WORK/quasar_wrapper/io_lsu_brg_aw_ready
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_bid[0] i:/WORK/quasar_wrapper/io_lsu_brg_b_bits_id[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_bid[1] i:/WORK/quasar_wrapper/io_lsu_brg_b_bits_id[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_bid[2] i:/WORK/quasar_wrapper/io_lsu_brg_b_bits_id[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_bresp[0] i:/WORK/quasar_wrapper/io_lsu_brg_b_bits_resp[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_bresp[1] i:/WORK/quasar_wrapper/io_lsu_brg_b_bits_resp[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_bvalid i:/WORK/quasar_wrapper/io_lsu_brg_b_valid
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[0] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[10] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[11] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[12] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[13] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[14] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[15] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[16] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[17] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[18] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[19] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[1] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[20] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[21] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[22] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[23] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[24] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[25] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[26] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[27] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[28] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[29] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[2] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[30] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[31] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[31]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[32] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[32]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[33] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[33]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[34] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[34]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[35] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[35]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[36] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[36]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[37] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[37]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[38] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[38]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[39] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[39]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[3] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[40] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[40]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[41] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[41]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[42] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[42]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[43] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[43]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[44] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[44]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[45] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[45]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[46] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[46]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[47] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[47]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[48] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[48]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[49] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[49]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[4] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[50] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[50]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[51] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[51]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[52] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[52]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[53] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[53]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[54] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[54]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[55] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[55]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[56] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[56]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[57] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[57]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[58] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[58]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[59] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[59]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[5] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[60] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[60]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[61] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[61]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[62] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[62]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[63] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[63]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[6] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[7] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[8] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rdata[9] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_data[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rid[0] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_id[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rid[1] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_id[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rid[2] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_id[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rresp[0] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_resp[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rresp[1] i:/WORK/quasar_wrapper/io_lsu_brg_r_bits_resp[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_rvalid i:/WORK/quasar_wrapper/io_lsu_brg_r_valid
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_axi_wready i:/WORK/quasar_wrapper/io_lsu_brg_w_ready
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/lsu_bus_clk_en  i:/WORK/quasar_wrapper/io_lsu_bus_clk_en
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/mpc_debug_halt_req  i:/WORK/quasar_wrapper/io_mpc_debug_halt_req
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/mpc_debug_run_req  i:/WORK/quasar_wrapper/io_mpc_debug_run_req
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/mpc_reset_run_req  i:/WORK/quasar_wrapper/io_mpc_reset_run_req
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_int  i:/WORK/quasar_wrapper/io_nmi_int
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[10] i:/WORK/quasar_wrapper/io_nmi_vec[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[11] i:/WORK/quasar_wrapper/io_nmi_vec[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[12] i:/WORK/quasar_wrapper/io_nmi_vec[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[13] i:/WORK/quasar_wrapper/io_nmi_vec[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[14] i:/WORK/quasar_wrapper/io_nmi_vec[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[15] i:/WORK/quasar_wrapper/io_nmi_vec[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[16] i:/WORK/quasar_wrapper/io_nmi_vec[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[17] i:/WORK/quasar_wrapper/io_nmi_vec[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[18] i:/WORK/quasar_wrapper/io_nmi_vec[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[19] i:/WORK/quasar_wrapper/io_nmi_vec[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[1] i:/WORK/quasar_wrapper/io_nmi_vec[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[20] i:/WORK/quasar_wrapper/io_nmi_vec[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[21] i:/WORK/quasar_wrapper/io_nmi_vec[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[22] i:/WORK/quasar_wrapper/io_nmi_vec[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[23] i:/WORK/quasar_wrapper/io_nmi_vec[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[24] i:/WORK/quasar_wrapper/io_nmi_vec[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[25] i:/WORK/quasar_wrapper/io_nmi_vec[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[26] i:/WORK/quasar_wrapper/io_nmi_vec[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[27] i:/WORK/quasar_wrapper/io_nmi_vec[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[28] i:/WORK/quasar_wrapper/io_nmi_vec[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[29] i:/WORK/quasar_wrapper/io_nmi_vec[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[2] i:/WORK/quasar_wrapper/io_nmi_vec[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[30] i:/WORK/quasar_wrapper/io_nmi_vec[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[31] i:/WORK/quasar_wrapper/io_nmi_vec[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[3] i:/WORK/quasar_wrapper/io_nmi_vec[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[4] i:/WORK/quasar_wrapper/io_nmi_vec[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[5] i:/WORK/quasar_wrapper/io_nmi_vec[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[6] i:/WORK/quasar_wrapper/io_nmi_vec[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[7] i:/WORK/quasar_wrapper/io_nmi_vec[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[8] i:/WORK/quasar_wrapper/io_nmi_vec[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/nmi_vec[9] i:/WORK/quasar_wrapper/io_nmi_vec[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_l i:/WORK/quasar_wrapper/reset
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[10] i:/WORK/quasar_wrapper/io_rst_vec[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[11] i:/WORK/quasar_wrapper/io_rst_vec[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[12] i:/WORK/quasar_wrapper/io_rst_vec[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[13] i:/WORK/quasar_wrapper/io_rst_vec[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[14] i:/WORK/quasar_wrapper/io_rst_vec[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[15] i:/WORK/quasar_wrapper/io_rst_vec[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[16] i:/WORK/quasar_wrapper/io_rst_vec[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[17] i:/WORK/quasar_wrapper/io_rst_vec[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[18] i:/WORK/quasar_wrapper/io_rst_vec[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[19] i:/WORK/quasar_wrapper/io_rst_vec[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[1] i:/WORK/quasar_wrapper/io_rst_vec[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[20] i:/WORK/quasar_wrapper/io_rst_vec[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[21] i:/WORK/quasar_wrapper/io_rst_vec[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[22] i:/WORK/quasar_wrapper/io_rst_vec[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[23] i:/WORK/quasar_wrapper/io_rst_vec[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[24] i:/WORK/quasar_wrapper/io_rst_vec[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[25] i:/WORK/quasar_wrapper/io_rst_vec[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[26] i:/WORK/quasar_wrapper/io_rst_vec[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[27] i:/WORK/quasar_wrapper/io_rst_vec[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[28] i:/WORK/quasar_wrapper/io_rst_vec[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[29] i:/WORK/quasar_wrapper/io_rst_vec[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[2] i:/WORK/quasar_wrapper/io_rst_vec[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[30] i:/WORK/quasar_wrapper/io_rst_vec[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[31] i:/WORK/quasar_wrapper/io_rst_vec[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[3] i:/WORK/quasar_wrapper/io_rst_vec[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[4] i:/WORK/quasar_wrapper/io_rst_vec[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[5] i:/WORK/quasar_wrapper/io_rst_vec[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[6] i:/WORK/quasar_wrapper/io_rst_vec[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[7] i:/WORK/quasar_wrapper/io_rst_vec[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[8] i:/WORK/quasar_wrapper/io_rst_vec[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/rst_vec[9] i:/WORK/quasar_wrapper/io_rst_vec[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_arready i:/WORK/quasar_wrapper/io_sb_brg_ar_ready
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_awready i:/WORK/quasar_wrapper/io_sb_brg_aw_ready
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_bresp[0] i:/WORK/quasar_wrapper/io_sb_brg_b_bits_resp[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_bresp[1] i:/WORK/quasar_wrapper/io_sb_brg_b_bits_resp[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_bvalid i:/WORK/quasar_wrapper/io_sb_brg_b_valid
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[0] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[10] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[10]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[11] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[11]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[12] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[12]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[13] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[13]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[14] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[14]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[15] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[15]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[16] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[16]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[17] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[17]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[18] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[18]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[19] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[19]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[1] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[20] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[20]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[21] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[21]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[22] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[22]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[23] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[23]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[24] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[24]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[25] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[25]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[26] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[26]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[27] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[27]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[28] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[28]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[29] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[29]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[2] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[2]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[30] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[30]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[31] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[31]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[32] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[32]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[33] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[33]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[34] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[34]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[35] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[35]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[36] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[36]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[37] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[37]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[38] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[38]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[39] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[39]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[3] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[3]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[40] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[40]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[41] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[41]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[42] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[42]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[43] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[43]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[44] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[44]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[45] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[45]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[46] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[46]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[47] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[47]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[48] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[48]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[49] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[49]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[4] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[4]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[50] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[50]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[51] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[51]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[52] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[52]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[53] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[53]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[54] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[54]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[55] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[55]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[56] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[56]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[57] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[57]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[58] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[58]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[59] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[59]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[5] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[5]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[60] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[60]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[61] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[61]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[62] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[62]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[63] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[63]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[6] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[6]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[7] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[7]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[8] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[8]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rdata[9] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_data[9]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rresp[0] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_resp[0]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rresp[1] i:/WORK/quasar_wrapper/io_sb_brg_r_bits_resp[1]
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_rvalid i:/WORK/quasar_wrapper/io_sb_brg_r_valid
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/sb_axi_wready i:/WORK/quasar_wrapper/io_sb_brg_w_ready
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/scan_mode  i:/WORK/quasar_wrapper/io_scan_mode
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/soft_int  i:/WORK/quasar_wrapper/io_soft_int
set_user_match -type port -noninverted r:/WORK/el2_swerv_wrapper/timer_int  i:/WORK/quasar_wrapper/io_timer_int