28735 lines
2.1 MiB
28735 lines
2.1 MiB
;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
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circuit el2_ifu_bp_ctl :
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module el2_ifu_bp_ctl :
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input clock : Clock
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input reset : UInt<1>
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output io : {flip ic_hit_f : UInt<1>, flip ifc_fetch_addr_f : UInt<31>, flip ifc_fetch_req_f : UInt<1>, flip dec_tlu_br0_r_pkt : {valid : UInt<1>, hist : UInt<2>, br_error : UInt<1>, br_start_error : UInt<1>, way : UInt<1>, middle : UInt<1>}, flip exu_i0_br_fghr_r : UInt<8>, flip exu_i0_br_index_r : UInt<8>, flip dec_tlu_flush_lower_wb : UInt<1>, flip dec_tlu_flush_leak_one_wb : UInt<1>, flip dec_tlu_bpred_disable : UInt<1>, flip exu_mp_pkt : {misp : UInt<1>, ataken : UInt<1>, boffset : UInt<1>, pc4 : UInt<1>, hist : UInt<2>, toffset : UInt<12>, valid : UInt<1>, br_error : UInt<1>, br_start_error : UInt<1>, prett : UInt<32>, pcall : UInt<1>, pret : UInt<1>, pja : UInt<1>, way : UInt<1>}, flip exu_mp_eghr : UInt<8>, flip exu_mp_fghr : UInt<8>, flip exu_mp_index : UInt<8>, flip exu_mp_btag : UInt<5>, flip exu_flush_final : UInt<1>, ifu_bp_hit_taken_f : UInt<1>, ifu_bp_btb_target_f : UInt<31>, ifu_bp_inst_mask_f : UInt<1>, ifu_bp_fghr_f : UInt<8>, ifu_bp_way_f : UInt<2>, ifu_bp_ret_f : UInt<2>, ifu_bp_hist1_f : UInt<2>, ifu_bp_hist0_f : UInt<2>, ifu_bp_pc4_f : UInt<2>, ifu_bp_valid_f : UInt<2>, ifu_bp_poffset_f : UInt<12>}
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wire leak_one_f : UInt<1>
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leak_one_f <= UInt<1>("h00")
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wire bht_dir_f : UInt<2>
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bht_dir_f <= UInt<1>("h00")
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wire dec_tlu_error_wb : UInt<1>
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dec_tlu_error_wb <= UInt<1>("h00")
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wire btb_error_addr_wb : UInt<7>
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btb_error_addr_wb <= UInt<1>("h00")
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wire btb_bank0_rd_data_way0_f : UInt<22>
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btb_bank0_rd_data_way0_f <= UInt<1>("h00")
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wire btb_bank0_rd_data_way1_f : UInt<22>
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btb_bank0_rd_data_way1_f <= UInt<1>("h00")
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wire btb_bank0_rd_data_way0_p1_f : UInt<22>
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btb_bank0_rd_data_way0_p1_f <= UInt<1>("h00")
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wire btb_bank0_rd_data_way1_p1_f : UInt<22>
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btb_bank0_rd_data_way1_p1_f <= UInt<1>("h00")
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wire eoc_mask : UInt<1>
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eoc_mask <= UInt<1>("h00")
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wire btb_lru_b0_f : UInt<256>
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btb_lru_b0_f <= UInt<1>("h00")
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wire dec_tlu_way_wb : UInt<1>
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dec_tlu_way_wb <= UInt<1>("h00")
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node _T = eq(leak_one_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 68:43]
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node exu_mp_valid = and(io.exu_mp_pkt.misp, _T) @[el2_ifu_bp_ctl.scala 68:41]
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node _T_1 = bits(io.ifc_fetch_addr_f, 9, 2) @[el2_lib.scala 182:12]
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node _T_2 = bits(io.ifc_fetch_addr_f, 17, 10) @[el2_lib.scala 182:46]
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node _T_3 = xor(_T_1, _T_2) @[el2_lib.scala 182:42]
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node _T_4 = bits(io.ifc_fetch_addr_f, 25, 18) @[el2_lib.scala 182:80]
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node btb_rd_addr_f = xor(_T_3, _T_4) @[el2_lib.scala 182:76]
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node _T_5 = add(io.ifc_fetch_addr_f, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 93:45]
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node fetch_addr_p1_f = tail(_T_5, 1) @[el2_ifu_bp_ctl.scala 93:45]
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node _T_6 = bits(fetch_addr_p1_f, 9, 2) @[el2_lib.scala 182:12]
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node _T_7 = bits(fetch_addr_p1_f, 17, 10) @[el2_lib.scala 182:46]
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node _T_8 = xor(_T_6, _T_7) @[el2_lib.scala 182:42]
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node _T_9 = bits(fetch_addr_p1_f, 25, 18) @[el2_lib.scala 182:80]
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node btb_rd_addr_p1_f = xor(_T_8, _T_9) @[el2_lib.scala 182:76]
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node _T_10 = bits(bht_dir_f, 0, 0) @[el2_ifu_bp_ctl.scala 98:33]
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node _T_11 = not(_T_10) @[el2_ifu_bp_ctl.scala 98:23]
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node _T_12 = bits(bht_dir_f, 0, 0) @[el2_ifu_bp_ctl.scala 98:46]
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node btb_sel_f = cat(_T_11, _T_12) @[Cat.scala 29:58]
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node _T_13 = bits(io.ifc_fetch_addr_f, 0, 0) @[el2_ifu_bp_ctl.scala 101:46]
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node _T_14 = bits(io.ifc_fetch_addr_f, 0, 0) @[el2_ifu_bp_ctl.scala 101:70]
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node _T_15 = not(_T_14) @[el2_ifu_bp_ctl.scala 101:50]
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node fetch_start_f = cat(_T_13, _T_15) @[Cat.scala 29:58]
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node _T_16 = eq(btb_error_addr_wb, btb_rd_addr_f) @[el2_ifu_bp_ctl.scala 104:72]
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node branch_error_collision_f = and(dec_tlu_error_wb, _T_16) @[el2_ifu_bp_ctl.scala 104:51]
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node _T_17 = eq(btb_error_addr_wb, btb_rd_addr_p1_f) @[el2_ifu_bp_ctl.scala 105:75]
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node branch_error_collision_p1_f = and(dec_tlu_error_wb, _T_17) @[el2_ifu_bp_ctl.scala 105:54]
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node branch_error_bank_conflict_f = and(branch_error_collision_f, dec_tlu_error_wb) @[el2_ifu_bp_ctl.scala 108:63]
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node branch_error_bank_conflict_p1_f = and(branch_error_collision_p1_f, dec_tlu_error_wb) @[el2_ifu_bp_ctl.scala 109:69]
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node _T_18 = bits(io.ifc_fetch_addr_f, 14, 10) @[el2_lib.scala 175:32]
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node _T_19 = bits(io.ifc_fetch_addr_f, 19, 15) @[el2_lib.scala 175:32]
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node _T_20 = bits(io.ifc_fetch_addr_f, 24, 20) @[el2_lib.scala 175:32]
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wire _T_21 : UInt<5>[3] @[el2_lib.scala 175:24]
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_T_21[0] <= _T_18 @[el2_lib.scala 175:24]
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_T_21[1] <= _T_19 @[el2_lib.scala 175:24]
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_T_21[2] <= _T_20 @[el2_lib.scala 175:24]
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node _T_22 = xor(_T_21[0], _T_21[1]) @[el2_lib.scala 175:111]
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node fetch_rd_tag_f = xor(_T_22, _T_21[2]) @[el2_lib.scala 175:111]
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node _T_23 = bits(fetch_addr_p1_f, 14, 10) @[el2_lib.scala 175:32]
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node _T_24 = bits(fetch_addr_p1_f, 19, 15) @[el2_lib.scala 175:32]
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node _T_25 = bits(fetch_addr_p1_f, 24, 20) @[el2_lib.scala 175:32]
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wire _T_26 : UInt<5>[3] @[el2_lib.scala 175:24]
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_T_26[0] <= _T_23 @[el2_lib.scala 175:24]
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_T_26[1] <= _T_24 @[el2_lib.scala 175:24]
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_T_26[2] <= _T_25 @[el2_lib.scala 175:24]
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node _T_27 = xor(_T_26[0], _T_26[1]) @[el2_lib.scala 175:111]
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node fetch_rd_tag_p1_f = xor(_T_27, _T_26[2]) @[el2_lib.scala 175:111]
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node _T_28 = eq(io.exu_mp_btag, fetch_rd_tag_f) @[el2_ifu_bp_ctl.scala 114:46]
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node _T_29 = and(_T_28, exu_mp_valid) @[el2_ifu_bp_ctl.scala 114:66]
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node _T_30 = and(_T_29, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 114:81]
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node _T_31 = eq(io.exu_mp_index, btb_rd_addr_f) @[el2_ifu_bp_ctl.scala 114:117]
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node fetch_mp_collision_f = and(_T_30, _T_31) @[el2_ifu_bp_ctl.scala 114:102]
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node _T_32 = eq(io.exu_mp_btag, fetch_rd_tag_p1_f) @[el2_ifu_bp_ctl.scala 115:49]
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node _T_33 = and(_T_32, exu_mp_valid) @[el2_ifu_bp_ctl.scala 115:72]
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node _T_34 = and(_T_33, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 115:87]
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node _T_35 = eq(io.exu_mp_index, btb_rd_addr_p1_f) @[el2_ifu_bp_ctl.scala 115:123]
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node fetch_mp_collision_p1_f = and(_T_34, _T_35) @[el2_ifu_bp_ctl.scala 115:108]
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reg leak_one_f_d1 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_bp_ctl.scala 117:30]
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leak_one_f_d1 <= leak_one_f @[el2_ifu_bp_ctl.scala 117:30]
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reg dec_tlu_way_wb_f : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_bp_ctl.scala 118:33]
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dec_tlu_way_wb_f <= dec_tlu_way_wb @[el2_ifu_bp_ctl.scala 118:33]
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reg exu_mp_way_f : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_bp_ctl.scala 119:29]
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exu_mp_way_f <= io.exu_mp_pkt.way @[el2_ifu_bp_ctl.scala 119:29]
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reg exu_flush_final_d1 : UInt<1>, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_bp_ctl.scala 120:35]
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exu_flush_final_d1 <= io.exu_flush_final @[el2_ifu_bp_ctl.scala 120:35]
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node _T_36 = and(io.dec_tlu_flush_leak_one_wb, io.dec_tlu_flush_lower_wb) @[el2_ifu_bp_ctl.scala 122:47]
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node _T_37 = and(leak_one_f_d1, io.dec_tlu_flush_lower_wb) @[el2_ifu_bp_ctl.scala 122:93]
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node _T_38 = or(_T_36, _T_37) @[el2_ifu_bp_ctl.scala 122:76]
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leak_one_f <= _T_38 @[el2_ifu_bp_ctl.scala 122:14]
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node _T_39 = bits(btb_bank0_rd_data_way0_f, 0, 0) @[el2_ifu_bp_ctl.scala 125:50]
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node _T_40 = bits(btb_bank0_rd_data_way0_f, 21, 17) @[el2_ifu_bp_ctl.scala 125:82]
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node _T_41 = eq(_T_40, fetch_rd_tag_f) @[el2_ifu_bp_ctl.scala 125:97]
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node _T_42 = and(_T_39, _T_41) @[el2_ifu_bp_ctl.scala 125:55]
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node _T_43 = and(dec_tlu_way_wb_f, branch_error_bank_conflict_f) @[el2_ifu_bp_ctl.scala 126:22]
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node _T_44 = eq(_T_43, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 126:3]
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node _T_45 = and(_T_42, _T_44) @[el2_ifu_bp_ctl.scala 125:117]
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node _T_46 = and(_T_45, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 126:54]
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node _T_47 = eq(leak_one_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 126:77]
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node tag_match_way0_f = and(_T_46, _T_47) @[el2_ifu_bp_ctl.scala 126:75]
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node _T_48 = bits(btb_bank0_rd_data_way1_f, 0, 0) @[el2_ifu_bp_ctl.scala 128:50]
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node _T_49 = bits(btb_bank0_rd_data_way1_f, 21, 17) @[el2_ifu_bp_ctl.scala 128:82]
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node _T_50 = eq(_T_49, fetch_rd_tag_f) @[el2_ifu_bp_ctl.scala 128:97]
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node _T_51 = and(_T_48, _T_50) @[el2_ifu_bp_ctl.scala 128:55]
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node _T_52 = and(dec_tlu_way_wb_f, branch_error_bank_conflict_f) @[el2_ifu_bp_ctl.scala 129:22]
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node _T_53 = eq(_T_52, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 129:3]
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node _T_54 = and(_T_51, _T_53) @[el2_ifu_bp_ctl.scala 128:117]
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node _T_55 = and(_T_54, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 129:54]
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node _T_56 = eq(leak_one_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 129:77]
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node tag_match_way1_f = and(_T_55, _T_56) @[el2_ifu_bp_ctl.scala 129:75]
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node _T_57 = bits(btb_bank0_rd_data_way0_p1_f, 0, 0) @[el2_ifu_bp_ctl.scala 131:56]
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node _T_58 = bits(btb_bank0_rd_data_way0_p1_f, 21, 17) @[el2_ifu_bp_ctl.scala 131:91]
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node _T_59 = eq(_T_58, fetch_rd_tag_p1_f) @[el2_ifu_bp_ctl.scala 131:106]
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node _T_60 = and(_T_57, _T_59) @[el2_ifu_bp_ctl.scala 131:61]
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node _T_61 = and(dec_tlu_way_wb_f, branch_error_bank_conflict_f) @[el2_ifu_bp_ctl.scala 132:24]
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node _T_62 = eq(_T_61, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 132:5]
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node _T_63 = and(_T_60, _T_62) @[el2_ifu_bp_ctl.scala 131:129]
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node _T_64 = and(_T_63, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 132:56]
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node _T_65 = eq(leak_one_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 132:79]
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node tag_match_way0_p1_f = and(_T_64, _T_65) @[el2_ifu_bp_ctl.scala 132:77]
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node _T_66 = bits(btb_bank0_rd_data_way1_p1_f, 0, 0) @[el2_ifu_bp_ctl.scala 134:56]
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node _T_67 = bits(btb_bank0_rd_data_way1_p1_f, 21, 17) @[el2_ifu_bp_ctl.scala 134:91]
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node _T_68 = eq(_T_67, fetch_rd_tag_p1_f) @[el2_ifu_bp_ctl.scala 134:106]
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node _T_69 = and(_T_66, _T_68) @[el2_ifu_bp_ctl.scala 134:61]
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node _T_70 = and(dec_tlu_way_wb_f, branch_error_bank_conflict_f) @[el2_ifu_bp_ctl.scala 135:24]
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node _T_71 = eq(_T_70, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 135:5]
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node _T_72 = and(_T_69, _T_71) @[el2_ifu_bp_ctl.scala 134:129]
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node _T_73 = and(_T_72, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 135:56]
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node _T_74 = eq(leak_one_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 135:79]
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node tag_match_way1_p1_f = and(_T_73, _T_74) @[el2_ifu_bp_ctl.scala 135:77]
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node _T_75 = bits(btb_bank0_rd_data_way0_f, 3, 3) @[el2_ifu_bp_ctl.scala 138:84]
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node _T_76 = bits(btb_bank0_rd_data_way0_f, 4, 4) @[el2_ifu_bp_ctl.scala 138:117]
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node _T_77 = xor(_T_75, _T_76) @[el2_ifu_bp_ctl.scala 138:91]
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node _T_78 = and(tag_match_way0_f, _T_77) @[el2_ifu_bp_ctl.scala 138:56]
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node _T_79 = bits(btb_bank0_rd_data_way0_f, 3, 3) @[el2_ifu_bp_ctl.scala 139:84]
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node _T_80 = bits(btb_bank0_rd_data_way0_f, 4, 4) @[el2_ifu_bp_ctl.scala 139:117]
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node _T_81 = xor(_T_79, _T_80) @[el2_ifu_bp_ctl.scala 139:91]
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node _T_82 = eq(_T_81, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 139:58]
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node _T_83 = and(tag_match_way0_f, _T_82) @[el2_ifu_bp_ctl.scala 139:56]
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node tag_match_way0_expanded_f = cat(_T_78, _T_83) @[Cat.scala 29:58]
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node _T_84 = bits(btb_bank0_rd_data_way1_f, 3, 3) @[el2_ifu_bp_ctl.scala 141:84]
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node _T_85 = bits(btb_bank0_rd_data_way1_f, 4, 4) @[el2_ifu_bp_ctl.scala 141:117]
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node _T_86 = xor(_T_84, _T_85) @[el2_ifu_bp_ctl.scala 141:91]
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node _T_87 = and(tag_match_way1_f, _T_86) @[el2_ifu_bp_ctl.scala 141:56]
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node _T_88 = bits(btb_bank0_rd_data_way1_f, 3, 3) @[el2_ifu_bp_ctl.scala 142:84]
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node _T_89 = bits(btb_bank0_rd_data_way1_f, 4, 4) @[el2_ifu_bp_ctl.scala 142:117]
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node _T_90 = xor(_T_88, _T_89) @[el2_ifu_bp_ctl.scala 142:91]
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node _T_91 = eq(_T_90, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 142:58]
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node _T_92 = and(tag_match_way1_f, _T_91) @[el2_ifu_bp_ctl.scala 142:56]
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node tag_match_way1_expanded_f = cat(_T_87, _T_92) @[Cat.scala 29:58]
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node _T_93 = bits(btb_bank0_rd_data_way0_p1_f, 3, 3) @[el2_ifu_bp_ctl.scala 145:93]
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node _T_94 = bits(btb_bank0_rd_data_way0_p1_f, 4, 4) @[el2_ifu_bp_ctl.scala 145:129]
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node _T_95 = xor(_T_93, _T_94) @[el2_ifu_bp_ctl.scala 145:100]
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node _T_96 = and(tag_match_way0_p1_f, _T_95) @[el2_ifu_bp_ctl.scala 145:62]
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node _T_97 = bits(btb_bank0_rd_data_way0_p1_f, 3, 3) @[el2_ifu_bp_ctl.scala 146:93]
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node _T_98 = bits(btb_bank0_rd_data_way0_p1_f, 4, 4) @[el2_ifu_bp_ctl.scala 146:129]
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node _T_99 = xor(_T_97, _T_98) @[el2_ifu_bp_ctl.scala 146:100]
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node _T_100 = eq(_T_99, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 146:64]
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node _T_101 = and(tag_match_way0_p1_f, _T_100) @[el2_ifu_bp_ctl.scala 146:62]
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node tag_match_way0_expanded_p1_f = cat(_T_96, _T_101) @[Cat.scala 29:58]
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node _T_102 = bits(btb_bank0_rd_data_way1_p1_f, 3, 3) @[el2_ifu_bp_ctl.scala 148:93]
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node _T_103 = bits(btb_bank0_rd_data_way1_p1_f, 4, 4) @[el2_ifu_bp_ctl.scala 148:129]
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node _T_104 = xor(_T_102, _T_103) @[el2_ifu_bp_ctl.scala 148:100]
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node _T_105 = and(tag_match_way1_p1_f, _T_104) @[el2_ifu_bp_ctl.scala 148:62]
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node _T_106 = bits(btb_bank0_rd_data_way1_p1_f, 3, 3) @[el2_ifu_bp_ctl.scala 149:93]
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node _T_107 = bits(btb_bank0_rd_data_way1_p1_f, 4, 4) @[el2_ifu_bp_ctl.scala 149:129]
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node _T_108 = xor(_T_106, _T_107) @[el2_ifu_bp_ctl.scala 149:100]
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node _T_109 = eq(_T_108, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 149:64]
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node _T_110 = and(tag_match_way1_p1_f, _T_109) @[el2_ifu_bp_ctl.scala 149:62]
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node tag_match_way1_expanded_p1_f = cat(_T_105, _T_110) @[Cat.scala 29:58]
|
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node wayhit_f = or(tag_match_way0_expanded_f, tag_match_way1_expanded_f) @[el2_ifu_bp_ctl.scala 151:44]
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node wayhit_p1_f = or(tag_match_way0_expanded_p1_f, tag_match_way1_expanded_p1_f) @[el2_ifu_bp_ctl.scala 153:50]
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node _T_111 = bits(tag_match_way0_expanded_f, 0, 0) @[el2_ifu_bp_ctl.scala 156:65]
|
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node _T_112 = bits(_T_111, 0, 0) @[el2_ifu_bp_ctl.scala 156:69]
|
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node _T_113 = bits(tag_match_way1_expanded_f, 0, 0) @[el2_ifu_bp_ctl.scala 157:30]
|
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node _T_114 = bits(_T_113, 0, 0) @[el2_ifu_bp_ctl.scala 157:34]
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node _T_115 = mux(_T_112, btb_bank0_rd_data_way0_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_116 = mux(_T_114, btb_bank0_rd_data_way1_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_117 = or(_T_115, _T_116) @[Mux.scala 27:72]
|
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wire btb_bank0e_rd_data_f : UInt<22> @[Mux.scala 27:72]
|
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btb_bank0e_rd_data_f <= _T_117 @[Mux.scala 27:72]
|
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node _T_118 = bits(tag_match_way0_expanded_f, 1, 1) @[el2_ifu_bp_ctl.scala 159:65]
|
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node _T_119 = bits(_T_118, 0, 0) @[el2_ifu_bp_ctl.scala 159:69]
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node _T_120 = bits(tag_match_way1_expanded_f, 1, 1) @[el2_ifu_bp_ctl.scala 160:30]
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node _T_121 = bits(_T_120, 0, 0) @[el2_ifu_bp_ctl.scala 160:34]
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node _T_122 = mux(_T_119, btb_bank0_rd_data_way0_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_123 = mux(_T_121, btb_bank0_rd_data_way1_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_124 = or(_T_122, _T_123) @[Mux.scala 27:72]
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wire btb_bank0o_rd_data_f : UInt<22> @[Mux.scala 27:72]
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btb_bank0o_rd_data_f <= _T_124 @[Mux.scala 27:72]
|
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node _T_125 = bits(tag_match_way0_expanded_p1_f, 0, 0) @[el2_ifu_bp_ctl.scala 162:71]
|
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node _T_126 = bits(_T_125, 0, 0) @[el2_ifu_bp_ctl.scala 162:75]
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node _T_127 = bits(tag_match_way1_expanded_p1_f, 1, 1) @[el2_ifu_bp_ctl.scala 163:33]
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node _T_128 = bits(_T_127, 0, 0) @[el2_ifu_bp_ctl.scala 163:37]
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node _T_129 = mux(_T_126, btb_bank0_rd_data_way0_p1_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_130 = mux(_T_128, btb_bank0_rd_data_way1_p1_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_131 = or(_T_129, _T_130) @[Mux.scala 27:72]
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wire btb_bank0e_rd_data_p1_f : UInt<22> @[Mux.scala 27:72]
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btb_bank0e_rd_data_p1_f <= _T_131 @[Mux.scala 27:72]
|
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node _T_132 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 166:60]
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node _T_133 = eq(_T_132, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 166:40]
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node _T_134 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 167:60]
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node _T_135 = mux(_T_133, btb_bank0e_rd_data_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_136 = mux(_T_134, btb_bank0o_rd_data_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_137 = or(_T_135, _T_136) @[Mux.scala 27:72]
|
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wire btb_vbank0_rd_data_f : UInt<22> @[Mux.scala 27:72]
|
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btb_vbank0_rd_data_f <= _T_137 @[Mux.scala 27:72]
|
|
node _T_138 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 169:60]
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node _T_139 = eq(_T_138, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 169:40]
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node _T_140 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 170:60]
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node _T_141 = mux(_T_139, btb_bank0o_rd_data_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_142 = mux(_T_140, btb_bank0e_rd_data_p1_f, UInt<1>("h00")) @[Mux.scala 27:72]
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node _T_143 = or(_T_141, _T_142) @[Mux.scala 27:72]
|
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wire btb_vbank1_rd_data_f : UInt<22> @[Mux.scala 27:72]
|
|
btb_vbank1_rd_data_f <= _T_143 @[Mux.scala 27:72]
|
|
node mp_wrindex_dec = dshl(UInt<1>("h00"), io.exu_mp_index) @[el2_ifu_bp_ctl.scala 173:38]
|
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node fetch_wrindex_dec = dshl(UInt<1>("h00"), btb_rd_addr_f) @[el2_ifu_bp_ctl.scala 175:41]
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node fetch_wrindex_p1_dec = dshl(UInt<1>("h00"), btb_rd_addr_p1_f) @[el2_ifu_bp_ctl.scala 177:44]
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node _T_144 = bits(exu_mp_valid, 0, 0) @[Bitwise.scala 72:15]
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node _T_145 = mux(_T_144, UInt<256>("h0ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff"), UInt<256>("h00")) @[Bitwise.scala 72:12]
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node mp_wrlru_b0 = and(mp_wrindex_dec, _T_145) @[el2_ifu_bp_ctl.scala 179:36]
|
|
node _T_146 = bits(io.ifc_fetch_addr_f, 0, 0) @[el2_ifu_bp_ctl.scala 181:49]
|
|
node _T_147 = bits(_T_146, 0, 0) @[el2_ifu_bp_ctl.scala 181:53]
|
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node _T_148 = not(_T_147) @[el2_ifu_bp_ctl.scala 181:29]
|
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node _T_149 = bits(io.ifc_fetch_addr_f, 0, 0) @[el2_ifu_bp_ctl.scala 182:24]
|
|
node _T_150 = bits(_T_149, 0, 0) @[el2_ifu_bp_ctl.scala 182:28]
|
|
node _T_151 = bits(wayhit_p1_f, 0, 0) @[el2_ifu_bp_ctl.scala 182:51]
|
|
node _T_152 = bits(wayhit_f, 1, 1) @[el2_ifu_bp_ctl.scala 182:64]
|
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node _T_153 = cat(_T_151, _T_152) @[Cat.scala 29:58]
|
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node _T_154 = mux(_T_148, wayhit_f, UInt<1>("h00")) @[Mux.scala 27:72]
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|
node _T_155 = mux(_T_150, _T_153, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_156 = or(_T_154, _T_155) @[Mux.scala 27:72]
|
|
wire _T_157 : UInt<2> @[Mux.scala 27:72]
|
|
_T_157 <= _T_156 @[Mux.scala 27:72]
|
|
node _T_158 = cat(eoc_mask, UInt<1>("h01")) @[Cat.scala 29:58]
|
|
node bht_valid_f = and(_T_157, _T_158) @[el2_ifu_bp_ctl.scala 182:71]
|
|
node _T_159 = bits(bht_valid_f, 0, 0) @[el2_ifu_bp_ctl.scala 184:38]
|
|
node _T_160 = bits(bht_valid_f, 1, 1) @[el2_ifu_bp_ctl.scala 184:53]
|
|
node _T_161 = or(_T_159, _T_160) @[el2_ifu_bp_ctl.scala 184:42]
|
|
node _T_162 = and(_T_161, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 184:58]
|
|
node _T_163 = eq(leak_one_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 184:81]
|
|
node lru_update_valid_f = and(_T_162, _T_163) @[el2_ifu_bp_ctl.scala 184:79]
|
|
node _T_164 = bits(lru_update_valid_f, 0, 0) @[Bitwise.scala 72:15]
|
|
node _T_165 = mux(_T_164, UInt<256>("h0ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff"), UInt<256>("h00")) @[Bitwise.scala 72:12]
|
|
node fetch_wrlru_b0 = and(fetch_wrindex_dec, _T_165) @[el2_ifu_bp_ctl.scala 186:42]
|
|
node _T_166 = bits(lru_update_valid_f, 0, 0) @[Bitwise.scala 72:15]
|
|
node _T_167 = mux(_T_166, UInt<256>("h0ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff"), UInt<256>("h00")) @[Bitwise.scala 72:12]
|
|
node fetch_wrlru_p1_b0 = and(fetch_wrindex_p1_dec, _T_167) @[el2_ifu_bp_ctl.scala 187:48]
|
|
node _T_168 = eq(mp_wrlru_b0, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 189:25]
|
|
node _T_169 = eq(fetch_wrlru_b0, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 189:40]
|
|
node btb_lru_b0_hold = and(_T_168, _T_169) @[el2_ifu_bp_ctl.scala 189:38]
|
|
node _T_170 = bits(io.exu_mp_pkt.way, 0, 0) @[el2_ifu_bp_ctl.scala 193:45]
|
|
node _T_171 = not(_T_170) @[el2_ifu_bp_ctl.scala 193:33]
|
|
node _T_172 = bits(tag_match_way0_f, 0, 0) @[el2_ifu_bp_ctl.scala 194:51]
|
|
node _T_173 = bits(tag_match_way0_p1_f, 0, 0) @[el2_ifu_bp_ctl.scala 195:54]
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node _T_174 = mux(_T_171, mp_wrlru_b0, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_175 = mux(_T_172, fetch_wrlru_b0, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_176 = mux(_T_173, fetch_wrlru_p1_b0, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_177 = or(_T_174, _T_175) @[Mux.scala 27:72]
|
|
node _T_178 = or(_T_177, _T_176) @[Mux.scala 27:72]
|
|
wire _T_179 : UInt<256> @[Mux.scala 27:72]
|
|
_T_179 <= _T_178 @[Mux.scala 27:72]
|
|
node _T_180 = and(btb_lru_b0_hold, btb_lru_b0_f) @[el2_ifu_bp_ctl.scala 195:100]
|
|
node btb_lru_b0_ns = or(_T_179, _T_180) @[el2_ifu_bp_ctl.scala 195:82]
|
|
node _T_181 = bits(fetch_mp_collision_f, 0, 0) @[el2_ifu_bp_ctl.scala 197:37]
|
|
node _T_182 = and(fetch_wrindex_dec, btb_lru_b0_f) @[el2_ifu_bp_ctl.scala 197:78]
|
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node _T_183 = orr(_T_182) @[el2_ifu_bp_ctl.scala 197:94]
|
|
node btb_lru_rd_f = mux(_T_181, exu_mp_way_f, _T_183) @[el2_ifu_bp_ctl.scala 197:25]
|
|
node _T_184 = bits(fetch_mp_collision_p1_f, 0, 0) @[el2_ifu_bp_ctl.scala 199:43]
|
|
node _T_185 = and(fetch_wrindex_p1_dec, btb_lru_b0_f) @[el2_ifu_bp_ctl.scala 199:87]
|
|
node _T_186 = orr(_T_185) @[el2_ifu_bp_ctl.scala 199:103]
|
|
node btb_lru_rd_p1_f = mux(_T_184, exu_mp_way_f, _T_186) @[el2_ifu_bp_ctl.scala 199:28]
|
|
node _T_187 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 201:53]
|
|
node _T_188 = eq(_T_187, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 201:33]
|
|
node _T_189 = cat(btb_lru_rd_f, btb_lru_rd_f) @[Cat.scala 29:58]
|
|
node _T_190 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 202:24]
|
|
node _T_191 = bits(_T_190, 0, 0) @[el2_ifu_bp_ctl.scala 202:28]
|
|
node _T_192 = cat(btb_lru_rd_p1_f, btb_lru_rd_f) @[Cat.scala 29:58]
|
|
node _T_193 = mux(_T_188, _T_189, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_194 = mux(_T_191, _T_192, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_195 = or(_T_193, _T_194) @[Mux.scala 27:72]
|
|
wire btb_vlru_rd_f : UInt @[Mux.scala 27:72]
|
|
btb_vlru_rd_f <= _T_195 @[Mux.scala 27:72]
|
|
node _T_196 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 204:66]
|
|
node _T_197 = bits(_T_196, 0, 0) @[el2_ifu_bp_ctl.scala 204:70]
|
|
node _T_198 = not(_T_197) @[el2_ifu_bp_ctl.scala 204:46]
|
|
node _T_199 = bits(io.ifc_fetch_addr_f, 1, 1) @[el2_ifu_bp_ctl.scala 205:24]
|
|
node _T_200 = bits(_T_199, 0, 0) @[el2_ifu_bp_ctl.scala 205:28]
|
|
node _T_201 = bits(tag_match_way1_expanded_p1_f, 0, 0) @[el2_ifu_bp_ctl.scala 205:68]
|
|
node _T_202 = bits(tag_match_way1_expanded_f, 1, 1) @[el2_ifu_bp_ctl.scala 205:97]
|
|
node _T_203 = cat(_T_201, _T_202) @[Cat.scala 29:58]
|
|
node _T_204 = mux(_T_198, tag_match_way1_expanded_f, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_205 = mux(_T_200, _T_203, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_206 = or(_T_204, _T_205) @[Mux.scala 27:72]
|
|
wire tag_match_vway1_expanded_f : UInt<2> @[Mux.scala 27:72]
|
|
tag_match_vway1_expanded_f <= _T_206 @[Mux.scala 27:72]
|
|
node _T_207 = eq(bht_valid_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 207:47]
|
|
node _T_208 = and(_T_207, btb_vlru_rd_f) @[el2_ifu_bp_ctl.scala 207:58]
|
|
node way_raw = or(tag_match_vway1_expanded_f, _T_208) @[el2_ifu_bp_ctl.scala 207:44]
|
|
node _T_209 = or(io.ifc_fetch_req_f, exu_mp_valid) @[el2_ifu_bp_ctl.scala 209:75]
|
|
node _T_210 = bits(_T_209, 0, 0) @[el2_ifu_bp_ctl.scala 209:90]
|
|
reg _T_211 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_210 : @[Reg.scala 28:19]
|
|
_T_211 <= btb_lru_b0_ns @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
btb_lru_b0_f <= _T_211 @[el2_ifu_bp_ctl.scala 209:16]
|
|
node _T_212 = bits(io.ifc_fetch_addr_f, 5, 3) @[el2_ifu_bp_ctl.scala 211:37]
|
|
node eoc_near = andr(_T_212) @[el2_ifu_bp_ctl.scala 211:62]
|
|
node _T_213 = eq(eoc_near, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 213:15]
|
|
node _T_214 = bits(io.ifc_fetch_addr_f, 1, 0) @[el2_ifu_bp_ctl.scala 213:48]
|
|
node _T_215 = orr(_T_214) @[el2_ifu_bp_ctl.scala 213:57]
|
|
node _T_216 = eq(_T_215, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 213:28]
|
|
node _T_217 = or(_T_213, _T_216) @[el2_ifu_bp_ctl.scala 213:25]
|
|
eoc_mask <= _T_217 @[el2_ifu_bp_ctl.scala 213:12]
|
|
wire btb_sel_data_f : UInt<17>
|
|
btb_sel_data_f <= UInt<1>("h00")
|
|
wire hist1_raw : UInt<2>
|
|
hist1_raw <= UInt<1>("h00")
|
|
node btb_rd_tgt_f = bits(btb_sel_data_f, 16, 5) @[el2_ifu_bp_ctl.scala 217:36]
|
|
node btb_rd_pc4_f = bits(btb_sel_data_f, 4, 4) @[el2_ifu_bp_ctl.scala 218:36]
|
|
node btb_rd_call_f = bits(btb_sel_data_f, 2, 2) @[el2_ifu_bp_ctl.scala 219:37]
|
|
node btb_rd_ret_f = bits(btb_sel_data_f, 1, 1) @[el2_ifu_bp_ctl.scala 220:36]
|
|
node _T_218 = bits(btb_sel_f, 1, 1) @[el2_ifu_bp_ctl.scala 222:40]
|
|
node _T_219 = bits(_T_218, 0, 0) @[el2_ifu_bp_ctl.scala 222:44]
|
|
node _T_220 = bits(btb_vbank1_rd_data_f, 16, 1) @[el2_ifu_bp_ctl.scala 222:73]
|
|
node _T_221 = bits(btb_sel_f, 0, 0) @[el2_ifu_bp_ctl.scala 223:40]
|
|
node _T_222 = bits(_T_221, 0, 0) @[el2_ifu_bp_ctl.scala 223:44]
|
|
node _T_223 = bits(btb_vbank1_rd_data_f, 16, 1) @[el2_ifu_bp_ctl.scala 223:73]
|
|
node _T_224 = mux(_T_219, _T_220, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_225 = mux(_T_222, _T_223, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_226 = or(_T_224, _T_225) @[Mux.scala 27:72]
|
|
wire _T_227 : UInt<16> @[Mux.scala 27:72]
|
|
_T_227 <= _T_226 @[Mux.scala 27:72]
|
|
btb_sel_data_f <= _T_227 @[el2_ifu_bp_ctl.scala 222:18]
|
|
node _T_228 = and(bht_valid_f, hist1_raw) @[el2_ifu_bp_ctl.scala 225:39]
|
|
node _T_229 = orr(_T_228) @[el2_ifu_bp_ctl.scala 225:52]
|
|
node _T_230 = and(_T_229, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 225:56]
|
|
node _T_231 = eq(leak_one_f_d1, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 225:79]
|
|
node _T_232 = and(_T_230, _T_231) @[el2_ifu_bp_ctl.scala 225:77]
|
|
node _T_233 = eq(io.dec_tlu_bpred_disable, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 225:96]
|
|
node _T_234 = and(_T_232, _T_233) @[el2_ifu_bp_ctl.scala 225:94]
|
|
io.ifu_bp_hit_taken_f <= _T_234 @[el2_ifu_bp_ctl.scala 225:25]
|
|
node _T_235 = bits(btb_vbank1_rd_data_f, 2, 2) @[el2_ifu_bp_ctl.scala 227:52]
|
|
node _T_236 = bits(btb_vbank1_rd_data_f, 1, 1) @[el2_ifu_bp_ctl.scala 227:81]
|
|
node _T_237 = or(_T_235, _T_236) @[el2_ifu_bp_ctl.scala 227:59]
|
|
node _T_238 = bits(btb_vbank0_rd_data_f, 2, 2) @[el2_ifu_bp_ctl.scala 228:52]
|
|
node _T_239 = bits(btb_vbank0_rd_data_f, 1, 1) @[el2_ifu_bp_ctl.scala 228:81]
|
|
node _T_240 = or(_T_238, _T_239) @[el2_ifu_bp_ctl.scala 228:59]
|
|
node bht_force_taken_f = cat(_T_237, _T_240) @[Cat.scala 29:58]
|
|
wire bht_bank1_rd_data_f : UInt<2>
|
|
bht_bank1_rd_data_f <= UInt<1>("h00")
|
|
wire bht_bank0_rd_data_f : UInt<2>
|
|
bht_bank0_rd_data_f <= UInt<1>("h00")
|
|
wire bht_bank0_rd_data_p1_f : UInt<2>
|
|
bht_bank0_rd_data_p1_f <= UInt<1>("h00")
|
|
node _T_241 = bits(io.ifc_fetch_addr_f, 0, 0) @[el2_ifu_bp_ctl.scala 236:60]
|
|
node _T_242 = bits(_T_241, 0, 0) @[el2_ifu_bp_ctl.scala 236:64]
|
|
node _T_243 = eq(_T_242, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 236:40]
|
|
node _T_244 = bits(io.ifc_fetch_addr_f, 0, 0) @[el2_ifu_bp_ctl.scala 237:60]
|
|
node _T_245 = bits(_T_244, 0, 0) @[el2_ifu_bp_ctl.scala 237:64]
|
|
node _T_246 = mux(_T_243, bht_bank0_rd_data_f, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_247 = mux(_T_245, bht_bank1_rd_data_f, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_248 = or(_T_246, _T_247) @[Mux.scala 27:72]
|
|
wire bht_vbank0_rd_data_f : UInt<2> @[Mux.scala 27:72]
|
|
bht_vbank0_rd_data_f <= _T_248 @[Mux.scala 27:72]
|
|
node _T_249 = bits(io.ifc_fetch_addr_f, 0, 0) @[el2_ifu_bp_ctl.scala 239:60]
|
|
node _T_250 = bits(_T_249, 0, 0) @[el2_ifu_bp_ctl.scala 239:64]
|
|
node _T_251 = eq(_T_250, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 239:40]
|
|
node _T_252 = bits(io.ifc_fetch_addr_f, 0, 0) @[el2_ifu_bp_ctl.scala 240:60]
|
|
node _T_253 = bits(_T_252, 0, 0) @[el2_ifu_bp_ctl.scala 240:64]
|
|
node _T_254 = mux(_T_251, bht_bank1_rd_data_f, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_255 = mux(_T_253, bht_bank0_rd_data_p1_f, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_256 = or(_T_254, _T_255) @[Mux.scala 27:72]
|
|
wire bht_vbank1_rd_data_f : UInt<2> @[Mux.scala 27:72]
|
|
bht_vbank1_rd_data_f <= _T_256 @[Mux.scala 27:72]
|
|
node _T_257 = bits(bht_force_taken_f, 1, 1) @[el2_ifu_bp_ctl.scala 242:38]
|
|
node _T_258 = bits(bht_vbank1_rd_data_f, 1, 1) @[el2_ifu_bp_ctl.scala 242:64]
|
|
node _T_259 = or(_T_257, _T_258) @[el2_ifu_bp_ctl.scala 242:42]
|
|
node _T_260 = bits(bht_valid_f, 1, 1) @[el2_ifu_bp_ctl.scala 242:82]
|
|
node _T_261 = and(_T_259, _T_260) @[el2_ifu_bp_ctl.scala 242:69]
|
|
node _T_262 = bits(bht_force_taken_f, 0, 0) @[el2_ifu_bp_ctl.scala 243:41]
|
|
node _T_263 = bits(bht_vbank0_rd_data_f, 1, 1) @[el2_ifu_bp_ctl.scala 243:67]
|
|
node _T_264 = or(_T_262, _T_263) @[el2_ifu_bp_ctl.scala 243:45]
|
|
node _T_265 = bits(bht_valid_f, 0, 0) @[el2_ifu_bp_ctl.scala 243:85]
|
|
node _T_266 = and(_T_264, _T_265) @[el2_ifu_bp_ctl.scala 243:72]
|
|
node _T_267 = cat(_T_261, _T_266) @[Cat.scala 29:58]
|
|
bht_dir_f <= _T_267 @[el2_ifu_bp_ctl.scala 242:13]
|
|
node _T_268 = bits(btb_sel_f, 1, 1) @[el2_ifu_bp_ctl.scala 245:62]
|
|
node _T_269 = and(io.ifu_bp_hit_taken_f, _T_268) @[el2_ifu_bp_ctl.scala 245:51]
|
|
node _T_270 = eq(io.ifu_bp_hit_taken_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 245:69]
|
|
node _T_271 = or(_T_269, _T_270) @[el2_ifu_bp_ctl.scala 245:67]
|
|
io.ifu_bp_inst_mask_f <= _T_271 @[el2_ifu_bp_ctl.scala 245:25]
|
|
node _T_272 = bits(bht_vbank1_rd_data_f, 1, 1) @[el2_ifu_bp_ctl.scala 248:60]
|
|
node _T_273 = bits(bht_vbank0_rd_data_f, 1, 1) @[el2_ifu_bp_ctl.scala 248:85]
|
|
node _T_274 = cat(_T_272, _T_273) @[Cat.scala 29:58]
|
|
node _T_275 = or(bht_force_taken_f, _T_274) @[el2_ifu_bp_ctl.scala 248:34]
|
|
hist1_raw <= _T_275 @[el2_ifu_bp_ctl.scala 248:13]
|
|
node _T_276 = bits(bht_vbank1_rd_data_f, 0, 0) @[el2_ifu_bp_ctl.scala 250:43]
|
|
node _T_277 = bits(bht_vbank0_rd_data_f, 0, 0) @[el2_ifu_bp_ctl.scala 250:68]
|
|
node hist0_raw = cat(_T_276, _T_277) @[Cat.scala 29:58]
|
|
node _T_278 = bits(bht_valid_f, 1, 1) @[el2_ifu_bp_ctl.scala 252:30]
|
|
node _T_279 = bits(btb_vbank1_rd_data_f, 4, 4) @[el2_ifu_bp_ctl.scala 252:56]
|
|
node _T_280 = and(_T_278, _T_279) @[el2_ifu_bp_ctl.scala 252:34]
|
|
node _T_281 = bits(bht_valid_f, 0, 0) @[el2_ifu_bp_ctl.scala 253:30]
|
|
node _T_282 = bits(btb_vbank0_rd_data_f, 4, 4) @[el2_ifu_bp_ctl.scala 253:56]
|
|
node _T_283 = and(_T_281, _T_282) @[el2_ifu_bp_ctl.scala 253:34]
|
|
node pc4_raw = cat(_T_280, _T_283) @[Cat.scala 29:58]
|
|
node _T_284 = bits(bht_valid_f, 1, 1) @[el2_ifu_bp_ctl.scala 255:31]
|
|
node _T_285 = bits(btb_vbank1_rd_data_f, 2, 2) @[el2_ifu_bp_ctl.scala 255:58]
|
|
node _T_286 = eq(_T_285, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 255:37]
|
|
node _T_287 = and(_T_284, _T_286) @[el2_ifu_bp_ctl.scala 255:35]
|
|
node _T_288 = bits(btb_vbank1_rd_data_f, 1, 1) @[el2_ifu_bp_ctl.scala 255:87]
|
|
node _T_289 = and(_T_287, _T_288) @[el2_ifu_bp_ctl.scala 255:65]
|
|
node _T_290 = bits(bht_valid_f, 0, 0) @[el2_ifu_bp_ctl.scala 256:31]
|
|
node _T_291 = bits(btb_vbank0_rd_data_f, 2, 2) @[el2_ifu_bp_ctl.scala 256:58]
|
|
node _T_292 = eq(_T_291, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 256:37]
|
|
node _T_293 = and(_T_290, _T_292) @[el2_ifu_bp_ctl.scala 256:35]
|
|
node _T_294 = bits(btb_vbank0_rd_data_f, 1, 1) @[el2_ifu_bp_ctl.scala 256:87]
|
|
node _T_295 = and(_T_293, _T_294) @[el2_ifu_bp_ctl.scala 256:65]
|
|
node pret_raw = cat(_T_289, _T_295) @[Cat.scala 29:58]
|
|
node _T_296 = bits(bht_valid_f, 1, 1) @[el2_ifu_bp_ctl.scala 259:31]
|
|
node _T_297 = bits(bht_valid_f, 0, 0) @[el2_ifu_bp_ctl.scala 259:49]
|
|
node num_valids = add(_T_296, _T_297) @[el2_ifu_bp_ctl.scala 259:35]
|
|
node _T_298 = and(btb_sel_f, bht_dir_f) @[el2_ifu_bp_ctl.scala 261:28]
|
|
node final_h = andr(_T_298) @[el2_ifu_bp_ctl.scala 261:41]
|
|
wire fghr : UInt<8>
|
|
fghr <= UInt<1>("h00")
|
|
node _T_299 = eq(num_valids, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 265:41]
|
|
node _T_300 = bits(_T_299, 0, 0) @[el2_ifu_bp_ctl.scala 265:49]
|
|
node _T_301 = bits(fghr, 5, 0) @[el2_ifu_bp_ctl.scala 265:65]
|
|
node _T_302 = cat(_T_301, UInt<1>("h00")) @[Cat.scala 29:58]
|
|
node _T_303 = cat(_T_302, final_h) @[Cat.scala 29:58]
|
|
node _T_304 = eq(num_valids, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 266:41]
|
|
node _T_305 = bits(_T_304, 0, 0) @[el2_ifu_bp_ctl.scala 266:49]
|
|
node _T_306 = bits(fghr, 6, 0) @[el2_ifu_bp_ctl.scala 266:65]
|
|
node _T_307 = cat(_T_306, final_h) @[Cat.scala 29:58]
|
|
node _T_308 = eq(num_valids, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 267:41]
|
|
node _T_309 = bits(_T_308, 0, 0) @[el2_ifu_bp_ctl.scala 267:49]
|
|
node _T_310 = bits(fghr, 7, 0) @[el2_ifu_bp_ctl.scala 267:65]
|
|
node _T_311 = mux(_T_300, _T_303, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_312 = mux(_T_305, _T_307, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_313 = mux(_T_309, _T_310, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_314 = or(_T_311, _T_312) @[Mux.scala 27:72]
|
|
node _T_315 = or(_T_314, _T_313) @[Mux.scala 27:72]
|
|
wire merged_ghr : UInt<8> @[Mux.scala 27:72]
|
|
merged_ghr <= _T_315 @[Mux.scala 27:72]
|
|
node _T_316 = bits(exu_flush_final_d1, 0, 0) @[el2_ifu_bp_ctl.scala 271:46]
|
|
node _T_317 = eq(exu_flush_final_d1, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 272:27]
|
|
node _T_318 = and(_T_317, io.ifc_fetch_req_f) @[el2_ifu_bp_ctl.scala 272:47]
|
|
node _T_319 = and(_T_318, io.ic_hit_f) @[el2_ifu_bp_ctl.scala 272:68]
|
|
node _T_320 = eq(leak_one_f_d1, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 272:84]
|
|
node _T_321 = and(_T_319, _T_320) @[el2_ifu_bp_ctl.scala 272:82]
|
|
node _T_322 = bits(_T_321, 0, 0) @[el2_ifu_bp_ctl.scala 272:100]
|
|
node _T_323 = eq(exu_flush_final_d1, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 273:27]
|
|
node _T_324 = and(io.ifc_fetch_req_f, io.ic_hit_f) @[el2_ifu_bp_ctl.scala 273:70]
|
|
node _T_325 = eq(leak_one_f_d1, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 273:86]
|
|
node _T_326 = and(_T_324, _T_325) @[el2_ifu_bp_ctl.scala 273:84]
|
|
node _T_327 = eq(_T_326, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 273:49]
|
|
node _T_328 = and(_T_323, _T_327) @[el2_ifu_bp_ctl.scala 273:47]
|
|
node _T_329 = bits(_T_328, 0, 0) @[el2_ifu_bp_ctl.scala 273:103]
|
|
node _T_330 = mux(_T_316, io.exu_mp_fghr, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_331 = mux(_T_322, merged_ghr, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_332 = mux(_T_329, fghr, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_333 = or(_T_330, _T_331) @[Mux.scala 27:72]
|
|
node _T_334 = or(_T_333, _T_332) @[Mux.scala 27:72]
|
|
wire fghr_ns : UInt<8> @[Mux.scala 27:72]
|
|
fghr_ns <= _T_334 @[Mux.scala 27:72]
|
|
reg _T_335 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[el2_ifu_bp_ctl.scala 275:18]
|
|
_T_335 <= fghr_ns @[el2_ifu_bp_ctl.scala 275:18]
|
|
fghr <= _T_335 @[el2_ifu_bp_ctl.scala 275:8]
|
|
io.ifu_bp_fghr_f <= fghr @[el2_ifu_bp_ctl.scala 277:20]
|
|
io.ifu_bp_way_f <= way_raw @[el2_ifu_bp_ctl.scala 279:19]
|
|
io.ifu_bp_hist1_f <= hist1_raw @[el2_ifu_bp_ctl.scala 280:21]
|
|
io.ifu_bp_hist0_f <= hist0_raw @[el2_ifu_bp_ctl.scala 281:21]
|
|
io.ifu_bp_pc4_f <= pc4_raw @[el2_ifu_bp_ctl.scala 282:19]
|
|
node _T_336 = bits(io.dec_tlu_bpred_disable, 0, 0) @[Bitwise.scala 72:15]
|
|
node _T_337 = mux(_T_336, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
|
node _T_338 = not(_T_337) @[el2_ifu_bp_ctl.scala 284:36]
|
|
node _T_339 = and(bht_valid_f, _T_338) @[el2_ifu_bp_ctl.scala 284:34]
|
|
io.ifu_bp_valid_f <= _T_339 @[el2_ifu_bp_ctl.scala 284:21]
|
|
io.ifu_bp_ret_f <= pret_raw @[el2_ifu_bp_ctl.scala 285:19]
|
|
node _T_340 = bits(bht_dir_f, 0, 0) @[el2_ifu_bp_ctl.scala 287:30]
|
|
node _T_341 = bits(fetch_start_f, 0, 0) @[el2_ifu_bp_ctl.scala 287:50]
|
|
node _T_342 = eq(_T_341, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 287:36]
|
|
node _T_343 = and(_T_340, _T_342) @[el2_ifu_bp_ctl.scala 287:34]
|
|
node _T_344 = bits(bht_dir_f, 0, 0) @[el2_ifu_bp_ctl.scala 287:68]
|
|
node _T_345 = eq(_T_344, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 287:58]
|
|
node _T_346 = bits(fetch_start_f, 0, 0) @[el2_ifu_bp_ctl.scala 287:87]
|
|
node _T_347 = and(_T_345, _T_346) @[el2_ifu_bp_ctl.scala 287:72]
|
|
node _T_348 = or(_T_343, _T_347) @[el2_ifu_bp_ctl.scala 287:55]
|
|
node _T_349 = bits(bht_dir_f, 0, 0) @[el2_ifu_bp_ctl.scala 288:15]
|
|
node _T_350 = bits(fetch_start_f, 0, 0) @[el2_ifu_bp_ctl.scala 288:34]
|
|
node _T_351 = and(_T_349, _T_350) @[el2_ifu_bp_ctl.scala 288:19]
|
|
node _T_352 = bits(bht_dir_f, 0, 0) @[el2_ifu_bp_ctl.scala 288:52]
|
|
node _T_353 = eq(_T_352, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 288:42]
|
|
node _T_354 = bits(fetch_start_f, 0, 0) @[el2_ifu_bp_ctl.scala 288:72]
|
|
node _T_355 = eq(_T_354, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 288:58]
|
|
node _T_356 = and(_T_353, _T_355) @[el2_ifu_bp_ctl.scala 288:56]
|
|
node _T_357 = or(_T_351, _T_356) @[el2_ifu_bp_ctl.scala 288:39]
|
|
node bloc_f = cat(_T_348, _T_357) @[Cat.scala 29:58]
|
|
node _T_358 = bits(bht_dir_f, 0, 0) @[el2_ifu_bp_ctl.scala 290:31]
|
|
node _T_359 = eq(_T_358, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 290:21]
|
|
node _T_360 = bits(io.ifc_fetch_addr_f, 0, 0) @[el2_ifu_bp_ctl.scala 290:56]
|
|
node _T_361 = and(_T_359, _T_360) @[el2_ifu_bp_ctl.scala 290:35]
|
|
node _T_362 = eq(btb_rd_pc4_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 290:62]
|
|
node use_fa_plus = and(_T_361, _T_362) @[el2_ifu_bp_ctl.scala 290:60]
|
|
node _T_363 = bits(fetch_start_f, 0, 0) @[el2_ifu_bp_ctl.scala 292:40]
|
|
node _T_364 = bits(btb_sel_f, 0, 0) @[el2_ifu_bp_ctl.scala 292:55]
|
|
node _T_365 = and(_T_363, _T_364) @[el2_ifu_bp_ctl.scala 292:44]
|
|
node btb_fg_crossing_f = and(_T_365, btb_rd_pc4_f) @[el2_ifu_bp_ctl.scala 292:59]
|
|
node _T_366 = bits(bloc_f, 1, 1) @[el2_ifu_bp_ctl.scala 293:40]
|
|
node bp_total_branch_offset_f = xor(_T_366, btb_rd_pc4_f) @[el2_ifu_bp_ctl.scala 293:43]
|
|
node _T_367 = eq(io.ifu_bp_hit_taken_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 295:89]
|
|
node _T_368 = and(io.ifc_fetch_req_f, _T_367) @[el2_ifu_bp_ctl.scala 295:87]
|
|
node _T_369 = and(_T_368, io.ic_hit_f) @[el2_ifu_bp_ctl.scala 295:112]
|
|
node _T_370 = bits(_T_369, 0, 0) @[el2_ifu_bp_ctl.scala 295:127]
|
|
reg ifc_fetch_adder_prior : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_370 : @[Reg.scala 28:19]
|
|
ifc_fetch_adder_prior <= io.ifc_fetch_addr_f @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
io.ifu_bp_poffset_f <= btb_rd_tgt_f @[el2_ifu_bp_ctl.scala 297:23]
|
|
node _T_371 = bits(use_fa_plus, 0, 0) @[el2_ifu_bp_ctl.scala 298:45]
|
|
node _T_372 = bits(btb_fg_crossing_f, 0, 0) @[el2_ifu_bp_ctl.scala 299:51]
|
|
node _T_373 = eq(btb_fg_crossing_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 300:32]
|
|
node _T_374 = eq(use_fa_plus, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 300:53]
|
|
node _T_375 = and(_T_373, _T_374) @[el2_ifu_bp_ctl.scala 300:51]
|
|
node _T_376 = bits(_T_375, 0, 0) @[el2_ifu_bp_ctl.scala 300:67]
|
|
node _T_377 = bits(io.ifc_fetch_addr_f, 30, 1) @[el2_ifu_bp_ctl.scala 300:94]
|
|
node _T_378 = mux(_T_371, fetch_addr_p1_f, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_379 = mux(_T_372, ifc_fetch_adder_prior, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_380 = mux(_T_376, _T_377, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_381 = or(_T_378, _T_379) @[Mux.scala 27:72]
|
|
node _T_382 = or(_T_381, _T_380) @[Mux.scala 27:72]
|
|
wire adder_pc_in_f : UInt @[Mux.scala 27:72]
|
|
adder_pc_in_f <= _T_382 @[Mux.scala 27:72]
|
|
node _T_383 = bits(adder_pc_in_f, 29, 0) @[el2_ifu_bp_ctl.scala 302:58]
|
|
node _T_384 = cat(_T_383, bp_total_branch_offset_f) @[Cat.scala 29:58]
|
|
node _T_385 = cat(_T_384, UInt<1>("h00")) @[Cat.scala 29:58]
|
|
node _T_386 = cat(btb_rd_tgt_f, UInt<1>("h00")) @[Cat.scala 29:58]
|
|
node _T_387 = bits(_T_385, 12, 1) @[el2_lib.scala 199:24]
|
|
node _T_388 = bits(_T_386, 12, 1) @[el2_lib.scala 199:40]
|
|
node _T_389 = add(_T_387, _T_388) @[el2_lib.scala 199:31]
|
|
node _T_390 = bits(_T_385, 31, 13) @[el2_lib.scala 200:20]
|
|
node _T_391 = add(_T_390, UInt<1>("h01")) @[el2_lib.scala 200:27]
|
|
node _T_392 = tail(_T_391, 1) @[el2_lib.scala 200:27]
|
|
node _T_393 = bits(_T_385, 31, 13) @[el2_lib.scala 201:20]
|
|
node _T_394 = add(_T_393, UInt<1>("h01")) @[el2_lib.scala 201:27]
|
|
node _T_395 = tail(_T_394, 1) @[el2_lib.scala 201:27]
|
|
node _T_396 = bits(_T_386, 12, 12) @[el2_lib.scala 202:22]
|
|
node _T_397 = bits(_T_389, 12, 12) @[el2_lib.scala 203:38]
|
|
node _T_398 = eq(_T_397, UInt<1>("h00")) @[el2_lib.scala 203:27]
|
|
node _T_399 = xor(_T_396, _T_398) @[el2_lib.scala 203:25]
|
|
node _T_400 = bits(_T_399, 0, 0) @[el2_lib.scala 203:63]
|
|
node _T_401 = bits(_T_385, 31, 13) @[el2_lib.scala 203:75]
|
|
node _T_402 = eq(_T_396, UInt<1>("h00")) @[el2_lib.scala 204:8]
|
|
node _T_403 = bits(_T_389, 12, 12) @[el2_lib.scala 204:26]
|
|
node _T_404 = and(_T_402, _T_403) @[el2_lib.scala 204:14]
|
|
node _T_405 = bits(_T_404, 0, 0) @[el2_lib.scala 204:51]
|
|
node _T_406 = bits(_T_389, 12, 12) @[el2_lib.scala 205:26]
|
|
node _T_407 = eq(_T_406, UInt<1>("h00")) @[el2_lib.scala 205:15]
|
|
node _T_408 = and(_T_396, _T_407) @[el2_lib.scala 205:13]
|
|
node _T_409 = bits(_T_408, 0, 0) @[el2_lib.scala 205:51]
|
|
node _T_410 = mux(_T_400, _T_401, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_411 = mux(_T_405, _T_392, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_412 = mux(_T_409, _T_395, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_413 = or(_T_410, _T_411) @[Mux.scala 27:72]
|
|
node _T_414 = or(_T_413, _T_412) @[Mux.scala 27:72]
|
|
wire _T_415 : UInt<19> @[Mux.scala 27:72]
|
|
_T_415 <= _T_414 @[Mux.scala 27:72]
|
|
node _T_416 = bits(_T_389, 11, 0) @[el2_lib.scala 205:83]
|
|
node _T_417 = cat(_T_415, _T_416) @[Cat.scala 29:58]
|
|
node bp_btb_target_adder_f = cat(_T_417, UInt<1>("h00")) @[Cat.scala 29:58]
|
|
wire rets_out : UInt<32>[8] @[el2_ifu_bp_ctl.scala 304:22]
|
|
rets_out[0] <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 305:12]
|
|
rets_out[1] <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 305:12]
|
|
rets_out[2] <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 305:12]
|
|
rets_out[3] <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 305:12]
|
|
rets_out[4] <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 305:12]
|
|
rets_out[5] <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 305:12]
|
|
rets_out[6] <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 305:12]
|
|
rets_out[7] <= UInt<1>("h00") @[el2_ifu_bp_ctl.scala 305:12]
|
|
node _T_418 = eq(btb_rd_call_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 307:49]
|
|
node _T_419 = and(btb_rd_ret_f, _T_418) @[el2_ifu_bp_ctl.scala 307:47]
|
|
node _T_420 = bits(rets_out[0], 0, 0) @[el2_ifu_bp_ctl.scala 307:77]
|
|
node _T_421 = and(_T_419, _T_420) @[el2_ifu_bp_ctl.scala 307:64]
|
|
node _T_422 = bits(_T_421, 0, 0) @[el2_ifu_bp_ctl.scala 307:82]
|
|
node _T_423 = bits(rets_out[0], 31, 1) @[el2_ifu_bp_ctl.scala 308:16]
|
|
node _T_424 = bits(bp_btb_target_adder_f, 31, 1) @[el2_ifu_bp_ctl.scala 308:44]
|
|
node _T_425 = mux(_T_422, _T_423, _T_424) @[el2_ifu_bp_ctl.scala 307:32]
|
|
io.ifu_bp_btb_target_f <= _T_425 @[el2_ifu_bp_ctl.scala 307:26]
|
|
node _T_426 = bits(adder_pc_in_f, 29, 0) @[el2_ifu_bp_ctl.scala 311:56]
|
|
node _T_427 = cat(_T_426, bp_total_branch_offset_f) @[Cat.scala 29:58]
|
|
node _T_428 = cat(_T_427, UInt<1>("h00")) @[Cat.scala 29:58]
|
|
node _T_429 = mux(UInt<1>("h00"), UInt<11>("h07ff"), UInt<11>("h00")) @[Bitwise.scala 72:12]
|
|
node _T_430 = not(btb_rd_pc4_f) @[el2_ifu_bp_ctl.scala 311:113]
|
|
node _T_431 = cat(_T_429, _T_430) @[Cat.scala 29:58]
|
|
node _T_432 = cat(_T_431, UInt<1>("h00")) @[Cat.scala 29:58]
|
|
node _T_433 = bits(_T_428, 12, 1) @[el2_lib.scala 199:24]
|
|
node _T_434 = bits(_T_432, 12, 1) @[el2_lib.scala 199:40]
|
|
node _T_435 = add(_T_433, _T_434) @[el2_lib.scala 199:31]
|
|
node _T_436 = bits(_T_428, 31, 13) @[el2_lib.scala 200:20]
|
|
node _T_437 = add(_T_436, UInt<1>("h01")) @[el2_lib.scala 200:27]
|
|
node _T_438 = tail(_T_437, 1) @[el2_lib.scala 200:27]
|
|
node _T_439 = bits(_T_428, 31, 13) @[el2_lib.scala 201:20]
|
|
node _T_440 = add(_T_439, UInt<1>("h01")) @[el2_lib.scala 201:27]
|
|
node _T_441 = tail(_T_440, 1) @[el2_lib.scala 201:27]
|
|
node _T_442 = bits(_T_432, 12, 12) @[el2_lib.scala 202:22]
|
|
node _T_443 = bits(_T_435, 12, 12) @[el2_lib.scala 203:38]
|
|
node _T_444 = eq(_T_443, UInt<1>("h00")) @[el2_lib.scala 203:27]
|
|
node _T_445 = xor(_T_442, _T_444) @[el2_lib.scala 203:25]
|
|
node _T_446 = bits(_T_445, 0, 0) @[el2_lib.scala 203:63]
|
|
node _T_447 = bits(_T_428, 31, 13) @[el2_lib.scala 203:75]
|
|
node _T_448 = eq(_T_442, UInt<1>("h00")) @[el2_lib.scala 204:8]
|
|
node _T_449 = bits(_T_435, 12, 12) @[el2_lib.scala 204:26]
|
|
node _T_450 = and(_T_448, _T_449) @[el2_lib.scala 204:14]
|
|
node _T_451 = bits(_T_450, 0, 0) @[el2_lib.scala 204:51]
|
|
node _T_452 = bits(_T_435, 12, 12) @[el2_lib.scala 205:26]
|
|
node _T_453 = eq(_T_452, UInt<1>("h00")) @[el2_lib.scala 205:15]
|
|
node _T_454 = and(_T_442, _T_453) @[el2_lib.scala 205:13]
|
|
node _T_455 = bits(_T_454, 0, 0) @[el2_lib.scala 205:51]
|
|
node _T_456 = mux(_T_446, _T_447, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_457 = mux(_T_451, _T_438, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_458 = mux(_T_455, _T_441, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_459 = or(_T_456, _T_457) @[Mux.scala 27:72]
|
|
node _T_460 = or(_T_459, _T_458) @[Mux.scala 27:72]
|
|
wire _T_461 : UInt<19> @[Mux.scala 27:72]
|
|
_T_461 <= _T_460 @[Mux.scala 27:72]
|
|
node _T_462 = bits(_T_435, 11, 0) @[el2_lib.scala 205:83]
|
|
node _T_463 = cat(_T_461, _T_462) @[Cat.scala 29:58]
|
|
node bp_rs_call_target_f = cat(_T_463, UInt<1>("h00")) @[Cat.scala 29:58]
|
|
node _T_464 = eq(btb_rd_ret_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 313:33]
|
|
node _T_465 = and(btb_rd_call_f, _T_464) @[el2_ifu_bp_ctl.scala 313:31]
|
|
node rs_push = and(_T_465, io.ifu_bp_hit_taken_f) @[el2_ifu_bp_ctl.scala 313:47]
|
|
node _T_466 = eq(btb_rd_call_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 314:31]
|
|
node _T_467 = and(btb_rd_ret_f, _T_466) @[el2_ifu_bp_ctl.scala 314:29]
|
|
node rs_pop = and(_T_467, io.ifu_bp_hit_taken_f) @[el2_ifu_bp_ctl.scala 314:46]
|
|
node _T_468 = eq(rs_push, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 315:17]
|
|
node _T_469 = eq(rs_pop, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 315:28]
|
|
node rs_hold = and(_T_468, _T_469) @[el2_ifu_bp_ctl.scala 315:26]
|
|
node rsenable_0 = eq(rs_hold, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 317:60]
|
|
node rsenable_1 = or(rs_push, rs_pop) @[el2_ifu_bp_ctl.scala 317:119]
|
|
node rsenable_2 = or(rs_push, rs_pop) @[el2_ifu_bp_ctl.scala 317:119]
|
|
node rsenable_3 = or(rs_push, rs_pop) @[el2_ifu_bp_ctl.scala 317:119]
|
|
node rsenable_4 = or(rs_push, rs_pop) @[el2_ifu_bp_ctl.scala 317:119]
|
|
node rsenable_5 = or(rs_push, rs_pop) @[el2_ifu_bp_ctl.scala 317:119]
|
|
node rsenable_6 = or(rs_push, rs_pop) @[el2_ifu_bp_ctl.scala 317:119]
|
|
node _T_470 = bits(rs_push, 0, 0) @[el2_ifu_bp_ctl.scala 320:23]
|
|
node _T_471 = bits(bp_rs_call_target_f, 31, 1) @[el2_ifu_bp_ctl.scala 320:56]
|
|
node _T_472 = cat(_T_471, UInt<1>("h01")) @[Cat.scala 29:58]
|
|
node _T_473 = bits(rs_pop, 0, 0) @[el2_ifu_bp_ctl.scala 321:22]
|
|
node _T_474 = mux(_T_470, _T_472, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_475 = mux(_T_473, rets_out[1], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_476 = or(_T_474, _T_475) @[Mux.scala 27:72]
|
|
wire rets_in_0 : UInt<32> @[Mux.scala 27:72]
|
|
rets_in_0 <= _T_476 @[Mux.scala 27:72]
|
|
node _T_477 = bits(rs_push, 0, 0) @[el2_ifu_bp_ctl.scala 323:28]
|
|
node _T_478 = bits(rs_pop, 0, 0) @[el2_ifu_bp_ctl.scala 324:27]
|
|
node _T_479 = mux(_T_477, rets_out[0], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_480 = mux(_T_478, rets_out[2], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_481 = or(_T_479, _T_480) @[Mux.scala 27:72]
|
|
wire rets_in_1 : UInt<32> @[Mux.scala 27:72]
|
|
rets_in_1 <= _T_481 @[Mux.scala 27:72]
|
|
node _T_482 = bits(rs_push, 0, 0) @[el2_ifu_bp_ctl.scala 323:28]
|
|
node _T_483 = bits(rs_pop, 0, 0) @[el2_ifu_bp_ctl.scala 324:27]
|
|
node _T_484 = mux(_T_482, rets_out[1], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_485 = mux(_T_483, rets_out[3], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_486 = or(_T_484, _T_485) @[Mux.scala 27:72]
|
|
wire rets_in_2 : UInt<32> @[Mux.scala 27:72]
|
|
rets_in_2 <= _T_486 @[Mux.scala 27:72]
|
|
node _T_487 = bits(rs_push, 0, 0) @[el2_ifu_bp_ctl.scala 323:28]
|
|
node _T_488 = bits(rs_pop, 0, 0) @[el2_ifu_bp_ctl.scala 324:27]
|
|
node _T_489 = mux(_T_487, rets_out[2], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_490 = mux(_T_488, rets_out[4], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_491 = or(_T_489, _T_490) @[Mux.scala 27:72]
|
|
wire rets_in_3 : UInt<32> @[Mux.scala 27:72]
|
|
rets_in_3 <= _T_491 @[Mux.scala 27:72]
|
|
node _T_492 = bits(rs_push, 0, 0) @[el2_ifu_bp_ctl.scala 323:28]
|
|
node _T_493 = bits(rs_pop, 0, 0) @[el2_ifu_bp_ctl.scala 324:27]
|
|
node _T_494 = mux(_T_492, rets_out[3], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_495 = mux(_T_493, rets_out[5], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_496 = or(_T_494, _T_495) @[Mux.scala 27:72]
|
|
wire rets_in_4 : UInt<32> @[Mux.scala 27:72]
|
|
rets_in_4 <= _T_496 @[Mux.scala 27:72]
|
|
node _T_497 = bits(rs_push, 0, 0) @[el2_ifu_bp_ctl.scala 323:28]
|
|
node _T_498 = bits(rs_pop, 0, 0) @[el2_ifu_bp_ctl.scala 324:27]
|
|
node _T_499 = mux(_T_497, rets_out[4], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_500 = mux(_T_498, rets_out[6], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_501 = or(_T_499, _T_500) @[Mux.scala 27:72]
|
|
wire rets_in_5 : UInt<32> @[Mux.scala 27:72]
|
|
rets_in_5 <= _T_501 @[Mux.scala 27:72]
|
|
node _T_502 = bits(rs_push, 0, 0) @[el2_ifu_bp_ctl.scala 323:28]
|
|
node _T_503 = bits(rs_pop, 0, 0) @[el2_ifu_bp_ctl.scala 324:27]
|
|
node _T_504 = mux(_T_502, rets_out[5], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_505 = mux(_T_503, rets_out[7], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_506 = or(_T_504, _T_505) @[Mux.scala 27:72]
|
|
wire rets_in_6 : UInt<32> @[Mux.scala 27:72]
|
|
rets_in_6 <= _T_506 @[Mux.scala 27:72]
|
|
node _T_507 = bits(rsenable_0, 0, 0) @[el2_ifu_bp_ctl.scala 326:84]
|
|
reg _T_508 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_507 : @[Reg.scala 28:19]
|
|
_T_508 <= rets_in_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_509 = bits(rsenable_1, 0, 0) @[el2_ifu_bp_ctl.scala 326:84]
|
|
reg _T_510 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_509 : @[Reg.scala 28:19]
|
|
_T_510 <= rets_in_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_511 = bits(rsenable_2, 0, 0) @[el2_ifu_bp_ctl.scala 326:84]
|
|
reg _T_512 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_511 : @[Reg.scala 28:19]
|
|
_T_512 <= rets_in_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_513 = bits(rsenable_3, 0, 0) @[el2_ifu_bp_ctl.scala 326:84]
|
|
reg _T_514 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_513 : @[Reg.scala 28:19]
|
|
_T_514 <= rets_in_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_515 = bits(rsenable_4, 0, 0) @[el2_ifu_bp_ctl.scala 326:84]
|
|
reg _T_516 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_515 : @[Reg.scala 28:19]
|
|
_T_516 <= rets_in_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_517 = bits(rsenable_5, 0, 0) @[el2_ifu_bp_ctl.scala 326:84]
|
|
reg _T_518 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_517 : @[Reg.scala 28:19]
|
|
_T_518 <= rets_in_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_519 = bits(rsenable_6, 0, 0) @[el2_ifu_bp_ctl.scala 326:84]
|
|
reg _T_520 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_519 : @[Reg.scala 28:19]
|
|
_T_520 <= rets_in_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_521 = bits(rs_push, 0, 0) @[el2_ifu_bp_ctl.scala 326:84]
|
|
reg _T_522 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_521 : @[Reg.scala 28:19]
|
|
_T_522 <= rets_out[6] @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
rets_out[0] <= _T_508 @[el2_ifu_bp_ctl.scala 326:12]
|
|
rets_out[1] <= _T_510 @[el2_ifu_bp_ctl.scala 326:12]
|
|
rets_out[2] <= _T_512 @[el2_ifu_bp_ctl.scala 326:12]
|
|
rets_out[3] <= _T_514 @[el2_ifu_bp_ctl.scala 326:12]
|
|
rets_out[4] <= _T_516 @[el2_ifu_bp_ctl.scala 326:12]
|
|
rets_out[5] <= _T_518 @[el2_ifu_bp_ctl.scala 326:12]
|
|
rets_out[6] <= _T_520 @[el2_ifu_bp_ctl.scala 326:12]
|
|
rets_out[7] <= _T_522 @[el2_ifu_bp_ctl.scala 326:12]
|
|
node _T_523 = or(io.dec_tlu_br0_r_pkt.br_start_error, io.dec_tlu_br0_r_pkt.br_error) @[el2_ifu_bp_ctl.scala 328:50]
|
|
dec_tlu_error_wb <= _T_523 @[el2_ifu_bp_ctl.scala 328:20]
|
|
btb_error_addr_wb <= io.exu_i0_br_index_r @[el2_ifu_bp_ctl.scala 329:21]
|
|
dec_tlu_way_wb <= io.dec_tlu_br0_r_pkt.way @[el2_ifu_bp_ctl.scala 330:18]
|
|
node _T_524 = eq(dec_tlu_error_wb, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 331:35]
|
|
node btb_valid = and(exu_mp_valid, _T_524) @[el2_ifu_bp_ctl.scala 331:32]
|
|
node _T_525 = or(io.exu_mp_pkt.pcall, io.exu_mp_pkt.pja) @[el2_ifu_bp_ctl.scala 334:89]
|
|
node _T_526 = or(io.exu_mp_pkt.pret, io.exu_mp_pkt.pja) @[el2_ifu_bp_ctl.scala 334:113]
|
|
node _T_527 = cat(_T_525, _T_526) @[Cat.scala 29:58]
|
|
node _T_528 = cat(_T_527, btb_valid) @[Cat.scala 29:58]
|
|
node _T_529 = cat(io.exu_mp_pkt.pc4, io.exu_mp_pkt.boffset) @[Cat.scala 29:58]
|
|
node _T_530 = cat(io.exu_mp_btag, io.exu_mp_pkt.toffset) @[Cat.scala 29:58]
|
|
node _T_531 = cat(_T_530, _T_529) @[Cat.scala 29:58]
|
|
node btb_wr_data = cat(_T_531, _T_528) @[Cat.scala 29:58]
|
|
node exu_mp_valid_write = and(exu_mp_valid, io.exu_mp_pkt.ataken) @[el2_ifu_bp_ctl.scala 335:41]
|
|
node _T_532 = eq(io.exu_mp_pkt.way, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 337:26]
|
|
node _T_533 = and(_T_532, exu_mp_valid_write) @[el2_ifu_bp_ctl.scala 337:39]
|
|
node _T_534 = eq(dec_tlu_error_wb, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 337:63]
|
|
node _T_535 = and(_T_533, _T_534) @[el2_ifu_bp_ctl.scala 337:60]
|
|
node _T_536 = eq(dec_tlu_way_wb, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 337:87]
|
|
node _T_537 = and(_T_536, dec_tlu_error_wb) @[el2_ifu_bp_ctl.scala 337:104]
|
|
node btb_wr_en_way0 = or(_T_535, _T_537) @[el2_ifu_bp_ctl.scala 337:83]
|
|
node _T_538 = and(io.exu_mp_pkt.way, exu_mp_valid_write) @[el2_ifu_bp_ctl.scala 338:36]
|
|
node _T_539 = eq(dec_tlu_error_wb, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 338:60]
|
|
node _T_540 = and(_T_538, _T_539) @[el2_ifu_bp_ctl.scala 338:57]
|
|
node _T_541 = and(dec_tlu_way_wb, dec_tlu_error_wb) @[el2_ifu_bp_ctl.scala 338:98]
|
|
node btb_wr_en_way1 = or(_T_540, _T_541) @[el2_ifu_bp_ctl.scala 338:80]
|
|
node _T_542 = bits(dec_tlu_error_wb, 0, 0) @[el2_ifu_bp_ctl.scala 340:42]
|
|
node btb_wr_addr = mux(_T_542, btb_error_addr_wb, io.exu_mp_index) @[el2_ifu_bp_ctl.scala 340:24]
|
|
node middle_of_bank = xor(io.exu_mp_pkt.pc4, io.exu_mp_pkt.boffset) @[el2_ifu_bp_ctl.scala 341:35]
|
|
node _T_543 = eq(io.exu_mp_pkt.pcall, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 342:43]
|
|
node _T_544 = and(exu_mp_valid, _T_543) @[el2_ifu_bp_ctl.scala 342:41]
|
|
node _T_545 = eq(io.exu_mp_pkt.pret, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 342:58]
|
|
node _T_546 = and(_T_544, _T_545) @[el2_ifu_bp_ctl.scala 342:56]
|
|
node _T_547 = eq(io.exu_mp_pkt.pja, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 342:72]
|
|
node _T_548 = and(_T_546, _T_547) @[el2_ifu_bp_ctl.scala 342:70]
|
|
node _T_549 = bits(_T_548, 0, 0) @[Bitwise.scala 72:15]
|
|
node _T_550 = mux(_T_549, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
|
node _T_551 = not(middle_of_bank) @[el2_ifu_bp_ctl.scala 342:106]
|
|
node _T_552 = cat(middle_of_bank, _T_551) @[Cat.scala 29:58]
|
|
node bht_wr_en0 = and(_T_550, _T_552) @[el2_ifu_bp_ctl.scala 342:84]
|
|
node _T_553 = bits(io.dec_tlu_br0_r_pkt.valid, 0, 0) @[Bitwise.scala 72:15]
|
|
node _T_554 = mux(_T_553, UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
|
|
node _T_555 = not(io.dec_tlu_br0_r_pkt.middle) @[el2_ifu_bp_ctl.scala 343:75]
|
|
node _T_556 = cat(io.dec_tlu_br0_r_pkt.middle, _T_555) @[Cat.scala 29:58]
|
|
node bht_wr_en2 = and(_T_554, _T_556) @[el2_ifu_bp_ctl.scala 343:46]
|
|
node _T_557 = cat(io.exu_mp_index, UInt<2>("h00")) @[Cat.scala 29:58]
|
|
node _T_558 = bits(_T_557, 9, 2) @[el2_lib.scala 186:16]
|
|
node _T_559 = bits(io.exu_mp_eghr, 7, 0) @[el2_lib.scala 186:40]
|
|
node bht_wr_addr0 = xor(_T_558, _T_559) @[el2_lib.scala 186:35]
|
|
node _T_560 = cat(io.exu_i0_br_index_r, UInt<2>("h00")) @[Cat.scala 29:58]
|
|
node _T_561 = bits(_T_560, 9, 2) @[el2_lib.scala 186:16]
|
|
node _T_562 = bits(io.exu_i0_br_fghr_r, 7, 0) @[el2_lib.scala 186:40]
|
|
node bht_wr_addr2 = xor(_T_561, _T_562) @[el2_lib.scala 186:35]
|
|
node _T_563 = cat(btb_rd_addr_f, UInt<2>("h00")) @[Cat.scala 29:58]
|
|
node _T_564 = bits(_T_563, 9, 2) @[el2_lib.scala 186:16]
|
|
node _T_565 = bits(fghr, 7, 0) @[el2_lib.scala 186:40]
|
|
node bht_rd_addr_f = xor(_T_564, _T_565) @[el2_lib.scala 186:35]
|
|
node _T_566 = cat(btb_rd_addr_p1_f, UInt<2>("h00")) @[Cat.scala 29:58]
|
|
node _T_567 = bits(_T_566, 9, 2) @[el2_lib.scala 186:16]
|
|
node _T_568 = bits(fghr, 7, 0) @[el2_lib.scala 186:40]
|
|
node bht_rd_addr_hashed_p1_f = xor(_T_567, _T_568) @[el2_lib.scala 186:35]
|
|
node _T_569 = eq(btb_wr_addr, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_570 = and(_T_569, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_571 = bits(_T_570, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_0 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_571 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_0 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_572 = eq(btb_wr_addr, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_573 = and(_T_572, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_574 = bits(_T_573, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_1 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_574 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_1 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_575 = eq(btb_wr_addr, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_576 = and(_T_575, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_577 = bits(_T_576, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_2 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_577 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_2 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_578 = eq(btb_wr_addr, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_579 = and(_T_578, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_580 = bits(_T_579, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_3 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_580 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_3 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_581 = eq(btb_wr_addr, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_582 = and(_T_581, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_583 = bits(_T_582, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_4 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_583 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_4 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_584 = eq(btb_wr_addr, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_585 = and(_T_584, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_586 = bits(_T_585, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_5 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_586 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_5 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_587 = eq(btb_wr_addr, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_588 = and(_T_587, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_589 = bits(_T_588, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_6 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_589 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_6 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_590 = eq(btb_wr_addr, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_591 = and(_T_590, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_592 = bits(_T_591, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_7 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_592 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_7 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_593 = eq(btb_wr_addr, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_594 = and(_T_593, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_595 = bits(_T_594, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_8 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_595 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_8 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_596 = eq(btb_wr_addr, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_597 = and(_T_596, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_598 = bits(_T_597, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_9 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_598 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_9 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_599 = eq(btb_wr_addr, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_600 = and(_T_599, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_601 = bits(_T_600, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_10 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_601 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_10 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_602 = eq(btb_wr_addr, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_603 = and(_T_602, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_604 = bits(_T_603, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_11 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_604 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_11 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_605 = eq(btb_wr_addr, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_606 = and(_T_605, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_607 = bits(_T_606, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_12 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_607 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_12 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_608 = eq(btb_wr_addr, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_609 = and(_T_608, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_610 = bits(_T_609, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_13 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_610 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_13 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_611 = eq(btb_wr_addr, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_612 = and(_T_611, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_613 = bits(_T_612, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_14 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_613 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_14 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_614 = eq(btb_wr_addr, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_615 = and(_T_614, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_616 = bits(_T_615, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_15 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_616 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_15 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_617 = eq(btb_wr_addr, UInt<5>("h010")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_618 = and(_T_617, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_619 = bits(_T_618, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_16 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_619 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_16 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_620 = eq(btb_wr_addr, UInt<5>("h011")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_621 = and(_T_620, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_622 = bits(_T_621, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_17 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_622 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_17 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_623 = eq(btb_wr_addr, UInt<5>("h012")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_624 = and(_T_623, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_625 = bits(_T_624, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_18 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_625 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_18 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_626 = eq(btb_wr_addr, UInt<5>("h013")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_627 = and(_T_626, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_628 = bits(_T_627, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_19 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_628 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_19 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_629 = eq(btb_wr_addr, UInt<5>("h014")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_630 = and(_T_629, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_631 = bits(_T_630, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_20 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_631 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_20 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_632 = eq(btb_wr_addr, UInt<5>("h015")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_633 = and(_T_632, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_634 = bits(_T_633, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_21 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_634 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_21 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_635 = eq(btb_wr_addr, UInt<5>("h016")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_636 = and(_T_635, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_637 = bits(_T_636, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_22 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_637 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_22 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_638 = eq(btb_wr_addr, UInt<5>("h017")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_639 = and(_T_638, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_640 = bits(_T_639, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_23 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_640 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_23 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_641 = eq(btb_wr_addr, UInt<5>("h018")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_642 = and(_T_641, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_643 = bits(_T_642, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_24 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_643 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_24 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_644 = eq(btb_wr_addr, UInt<5>("h019")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_645 = and(_T_644, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_646 = bits(_T_645, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_25 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_646 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_25 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_647 = eq(btb_wr_addr, UInt<5>("h01a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_648 = and(_T_647, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_649 = bits(_T_648, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_26 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_649 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_26 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_650 = eq(btb_wr_addr, UInt<5>("h01b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_651 = and(_T_650, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_652 = bits(_T_651, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_27 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_652 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_27 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_653 = eq(btb_wr_addr, UInt<5>("h01c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_654 = and(_T_653, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_655 = bits(_T_654, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_28 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_655 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_28 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_656 = eq(btb_wr_addr, UInt<5>("h01d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_657 = and(_T_656, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_658 = bits(_T_657, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_29 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_658 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_29 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_659 = eq(btb_wr_addr, UInt<5>("h01e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_660 = and(_T_659, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_661 = bits(_T_660, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_30 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_661 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_30 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_662 = eq(btb_wr_addr, UInt<5>("h01f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_663 = and(_T_662, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_664 = bits(_T_663, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_31 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_664 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_31 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_665 = eq(btb_wr_addr, UInt<6>("h020")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_666 = and(_T_665, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_667 = bits(_T_666, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_32 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_667 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_32 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_668 = eq(btb_wr_addr, UInt<6>("h021")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_669 = and(_T_668, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_670 = bits(_T_669, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_33 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_670 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_33 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_671 = eq(btb_wr_addr, UInt<6>("h022")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_672 = and(_T_671, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_673 = bits(_T_672, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_34 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_673 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_34 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_674 = eq(btb_wr_addr, UInt<6>("h023")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_675 = and(_T_674, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_676 = bits(_T_675, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_35 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_676 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_35 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_677 = eq(btb_wr_addr, UInt<6>("h024")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_678 = and(_T_677, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_679 = bits(_T_678, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_36 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_679 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_36 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_680 = eq(btb_wr_addr, UInt<6>("h025")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_681 = and(_T_680, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_682 = bits(_T_681, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_37 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_682 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_37 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_683 = eq(btb_wr_addr, UInt<6>("h026")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_684 = and(_T_683, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_685 = bits(_T_684, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_38 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_685 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_38 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_686 = eq(btb_wr_addr, UInt<6>("h027")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_687 = and(_T_686, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_688 = bits(_T_687, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_39 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_688 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_39 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_689 = eq(btb_wr_addr, UInt<6>("h028")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_690 = and(_T_689, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_691 = bits(_T_690, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_40 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_691 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_40 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_692 = eq(btb_wr_addr, UInt<6>("h029")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_693 = and(_T_692, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_694 = bits(_T_693, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_41 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_694 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_41 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_695 = eq(btb_wr_addr, UInt<6>("h02a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_696 = and(_T_695, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_697 = bits(_T_696, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_42 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_697 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_42 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_698 = eq(btb_wr_addr, UInt<6>("h02b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_699 = and(_T_698, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_700 = bits(_T_699, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_43 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_700 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_43 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_701 = eq(btb_wr_addr, UInt<6>("h02c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_702 = and(_T_701, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_703 = bits(_T_702, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_44 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_703 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_44 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_704 = eq(btb_wr_addr, UInt<6>("h02d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_705 = and(_T_704, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_706 = bits(_T_705, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_45 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_706 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_45 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_707 = eq(btb_wr_addr, UInt<6>("h02e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_708 = and(_T_707, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_709 = bits(_T_708, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_46 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_709 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_46 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_710 = eq(btb_wr_addr, UInt<6>("h02f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_711 = and(_T_710, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_712 = bits(_T_711, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_47 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_712 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_47 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_713 = eq(btb_wr_addr, UInt<6>("h030")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_714 = and(_T_713, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_715 = bits(_T_714, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_48 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_715 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_48 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_716 = eq(btb_wr_addr, UInt<6>("h031")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_717 = and(_T_716, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_718 = bits(_T_717, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_49 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_718 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_49 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_719 = eq(btb_wr_addr, UInt<6>("h032")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_720 = and(_T_719, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_721 = bits(_T_720, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_50 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_721 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_50 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_722 = eq(btb_wr_addr, UInt<6>("h033")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_723 = and(_T_722, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_724 = bits(_T_723, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_51 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_724 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_51 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_725 = eq(btb_wr_addr, UInt<6>("h034")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_726 = and(_T_725, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_727 = bits(_T_726, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_52 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_727 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_52 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_728 = eq(btb_wr_addr, UInt<6>("h035")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_729 = and(_T_728, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_730 = bits(_T_729, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_53 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_730 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_53 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_731 = eq(btb_wr_addr, UInt<6>("h036")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_732 = and(_T_731, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_733 = bits(_T_732, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_54 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_733 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_54 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_734 = eq(btb_wr_addr, UInt<6>("h037")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_735 = and(_T_734, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_736 = bits(_T_735, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_55 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_736 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_55 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_737 = eq(btb_wr_addr, UInt<6>("h038")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_738 = and(_T_737, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_739 = bits(_T_738, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_56 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_739 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_56 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_740 = eq(btb_wr_addr, UInt<6>("h039")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_741 = and(_T_740, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_742 = bits(_T_741, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_57 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_742 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_57 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_743 = eq(btb_wr_addr, UInt<6>("h03a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_744 = and(_T_743, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_745 = bits(_T_744, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_58 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_745 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_58 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_746 = eq(btb_wr_addr, UInt<6>("h03b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_747 = and(_T_746, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_748 = bits(_T_747, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_59 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_748 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_59 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_749 = eq(btb_wr_addr, UInt<6>("h03c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_750 = and(_T_749, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_751 = bits(_T_750, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_60 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_751 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_60 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_752 = eq(btb_wr_addr, UInt<6>("h03d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_753 = and(_T_752, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_754 = bits(_T_753, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_61 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_754 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_61 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_755 = eq(btb_wr_addr, UInt<6>("h03e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_756 = and(_T_755, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_757 = bits(_T_756, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_62 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_757 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_62 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_758 = eq(btb_wr_addr, UInt<6>("h03f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_759 = and(_T_758, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_760 = bits(_T_759, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_63 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_760 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_63 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_761 = eq(btb_wr_addr, UInt<7>("h040")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_762 = and(_T_761, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_763 = bits(_T_762, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_64 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_763 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_64 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_764 = eq(btb_wr_addr, UInt<7>("h041")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_765 = and(_T_764, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_766 = bits(_T_765, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_65 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_766 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_65 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_767 = eq(btb_wr_addr, UInt<7>("h042")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_768 = and(_T_767, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_769 = bits(_T_768, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_66 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_769 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_66 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_770 = eq(btb_wr_addr, UInt<7>("h043")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_771 = and(_T_770, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_772 = bits(_T_771, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_67 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_772 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_67 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_773 = eq(btb_wr_addr, UInt<7>("h044")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_774 = and(_T_773, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_775 = bits(_T_774, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_68 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_775 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_68 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_776 = eq(btb_wr_addr, UInt<7>("h045")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_777 = and(_T_776, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_778 = bits(_T_777, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_69 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_778 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_69 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_779 = eq(btb_wr_addr, UInt<7>("h046")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_780 = and(_T_779, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_781 = bits(_T_780, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_70 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_781 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_70 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_782 = eq(btb_wr_addr, UInt<7>("h047")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_783 = and(_T_782, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_784 = bits(_T_783, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_71 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_784 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_71 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_785 = eq(btb_wr_addr, UInt<7>("h048")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_786 = and(_T_785, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_787 = bits(_T_786, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_72 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_787 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_72 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_788 = eq(btb_wr_addr, UInt<7>("h049")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_789 = and(_T_788, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_790 = bits(_T_789, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_73 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_790 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_73 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_791 = eq(btb_wr_addr, UInt<7>("h04a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_792 = and(_T_791, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_793 = bits(_T_792, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_74 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_793 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_74 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_794 = eq(btb_wr_addr, UInt<7>("h04b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_795 = and(_T_794, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_796 = bits(_T_795, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_75 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_796 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_75 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_797 = eq(btb_wr_addr, UInt<7>("h04c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_798 = and(_T_797, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_799 = bits(_T_798, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_76 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_799 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_76 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_800 = eq(btb_wr_addr, UInt<7>("h04d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_801 = and(_T_800, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_802 = bits(_T_801, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_77 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_802 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_77 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_803 = eq(btb_wr_addr, UInt<7>("h04e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_804 = and(_T_803, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_805 = bits(_T_804, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_78 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_805 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_78 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_806 = eq(btb_wr_addr, UInt<7>("h04f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_807 = and(_T_806, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_808 = bits(_T_807, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_79 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_808 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_79 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_809 = eq(btb_wr_addr, UInt<7>("h050")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_810 = and(_T_809, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_811 = bits(_T_810, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_80 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_811 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_80 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_812 = eq(btb_wr_addr, UInt<7>("h051")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_813 = and(_T_812, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_814 = bits(_T_813, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_81 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_814 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_81 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_815 = eq(btb_wr_addr, UInt<7>("h052")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_816 = and(_T_815, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_817 = bits(_T_816, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_82 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_817 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_82 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_818 = eq(btb_wr_addr, UInt<7>("h053")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_819 = and(_T_818, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_820 = bits(_T_819, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_83 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_820 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_83 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_821 = eq(btb_wr_addr, UInt<7>("h054")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_822 = and(_T_821, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_823 = bits(_T_822, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_84 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_823 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_84 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_824 = eq(btb_wr_addr, UInt<7>("h055")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_825 = and(_T_824, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_826 = bits(_T_825, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_85 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_826 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_85 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_827 = eq(btb_wr_addr, UInt<7>("h056")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_828 = and(_T_827, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_829 = bits(_T_828, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_86 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_829 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_86 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_830 = eq(btb_wr_addr, UInt<7>("h057")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_831 = and(_T_830, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_832 = bits(_T_831, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_87 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_832 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_87 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_833 = eq(btb_wr_addr, UInt<7>("h058")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_834 = and(_T_833, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_835 = bits(_T_834, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_88 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_835 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_88 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_836 = eq(btb_wr_addr, UInt<7>("h059")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_837 = and(_T_836, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_838 = bits(_T_837, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_89 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_838 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_89 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_839 = eq(btb_wr_addr, UInt<7>("h05a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_840 = and(_T_839, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_841 = bits(_T_840, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_90 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_841 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_90 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_842 = eq(btb_wr_addr, UInt<7>("h05b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_843 = and(_T_842, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_844 = bits(_T_843, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_91 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_844 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_91 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_845 = eq(btb_wr_addr, UInt<7>("h05c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_846 = and(_T_845, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_847 = bits(_T_846, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_92 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_847 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_92 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_848 = eq(btb_wr_addr, UInt<7>("h05d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_849 = and(_T_848, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_850 = bits(_T_849, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_93 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_850 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_93 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_851 = eq(btb_wr_addr, UInt<7>("h05e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_852 = and(_T_851, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_853 = bits(_T_852, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_94 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_853 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_94 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_854 = eq(btb_wr_addr, UInt<7>("h05f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_855 = and(_T_854, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_856 = bits(_T_855, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_95 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_856 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_95 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_857 = eq(btb_wr_addr, UInt<7>("h060")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_858 = and(_T_857, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_859 = bits(_T_858, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_96 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_859 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_96 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_860 = eq(btb_wr_addr, UInt<7>("h061")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_861 = and(_T_860, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_862 = bits(_T_861, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_97 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_862 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_97 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_863 = eq(btb_wr_addr, UInt<7>("h062")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_864 = and(_T_863, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_865 = bits(_T_864, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_98 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_865 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_98 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_866 = eq(btb_wr_addr, UInt<7>("h063")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_867 = and(_T_866, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_868 = bits(_T_867, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_99 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_868 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_99 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_869 = eq(btb_wr_addr, UInt<7>("h064")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_870 = and(_T_869, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_871 = bits(_T_870, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_100 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_871 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_100 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_872 = eq(btb_wr_addr, UInt<7>("h065")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_873 = and(_T_872, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_874 = bits(_T_873, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_101 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_874 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_101 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_875 = eq(btb_wr_addr, UInt<7>("h066")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_876 = and(_T_875, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_877 = bits(_T_876, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_102 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_877 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_102 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_878 = eq(btb_wr_addr, UInt<7>("h067")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_879 = and(_T_878, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_880 = bits(_T_879, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_103 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_880 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_103 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_881 = eq(btb_wr_addr, UInt<7>("h068")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_882 = and(_T_881, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_883 = bits(_T_882, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_104 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_883 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_104 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_884 = eq(btb_wr_addr, UInt<7>("h069")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_885 = and(_T_884, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_886 = bits(_T_885, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_105 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_886 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_105 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_887 = eq(btb_wr_addr, UInt<7>("h06a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_888 = and(_T_887, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_889 = bits(_T_888, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_106 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_889 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_106 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_890 = eq(btb_wr_addr, UInt<7>("h06b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_891 = and(_T_890, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_892 = bits(_T_891, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_107 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_892 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_107 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_893 = eq(btb_wr_addr, UInt<7>("h06c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_894 = and(_T_893, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_895 = bits(_T_894, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_108 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_895 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_108 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_896 = eq(btb_wr_addr, UInt<7>("h06d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_897 = and(_T_896, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_898 = bits(_T_897, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_109 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_898 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_109 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_899 = eq(btb_wr_addr, UInt<7>("h06e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_900 = and(_T_899, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_901 = bits(_T_900, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_110 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_901 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_110 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_902 = eq(btb_wr_addr, UInt<7>("h06f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_903 = and(_T_902, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_904 = bits(_T_903, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_111 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_904 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_111 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_905 = eq(btb_wr_addr, UInt<7>("h070")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_906 = and(_T_905, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_907 = bits(_T_906, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_112 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_907 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_112 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_908 = eq(btb_wr_addr, UInt<7>("h071")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_909 = and(_T_908, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_910 = bits(_T_909, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_113 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_910 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_113 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_911 = eq(btb_wr_addr, UInt<7>("h072")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_912 = and(_T_911, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_913 = bits(_T_912, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_114 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_913 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_114 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_914 = eq(btb_wr_addr, UInt<7>("h073")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_915 = and(_T_914, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_916 = bits(_T_915, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_115 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_916 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_115 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_917 = eq(btb_wr_addr, UInt<7>("h074")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_918 = and(_T_917, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_919 = bits(_T_918, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_116 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_919 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_116 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_920 = eq(btb_wr_addr, UInt<7>("h075")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_921 = and(_T_920, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_922 = bits(_T_921, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_117 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_922 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_117 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_923 = eq(btb_wr_addr, UInt<7>("h076")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_924 = and(_T_923, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_925 = bits(_T_924, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_118 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_925 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_118 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_926 = eq(btb_wr_addr, UInt<7>("h077")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_927 = and(_T_926, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_928 = bits(_T_927, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_119 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_928 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_119 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_929 = eq(btb_wr_addr, UInt<7>("h078")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_930 = and(_T_929, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_931 = bits(_T_930, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_120 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_931 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_120 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_932 = eq(btb_wr_addr, UInt<7>("h079")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_933 = and(_T_932, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_934 = bits(_T_933, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_121 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_934 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_121 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_935 = eq(btb_wr_addr, UInt<7>("h07a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_936 = and(_T_935, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_937 = bits(_T_936, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_122 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_937 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_122 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_938 = eq(btb_wr_addr, UInt<7>("h07b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_939 = and(_T_938, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_940 = bits(_T_939, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_123 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_940 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_123 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_941 = eq(btb_wr_addr, UInt<7>("h07c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_942 = and(_T_941, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_943 = bits(_T_942, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_124 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_943 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_124 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_944 = eq(btb_wr_addr, UInt<7>("h07d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_945 = and(_T_944, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_946 = bits(_T_945, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_125 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_946 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_125 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_947 = eq(btb_wr_addr, UInt<7>("h07e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_948 = and(_T_947, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_949 = bits(_T_948, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_126 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_949 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_126 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_950 = eq(btb_wr_addr, UInt<7>("h07f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_951 = and(_T_950, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_952 = bits(_T_951, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_127 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_952 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_127 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_953 = eq(btb_wr_addr, UInt<8>("h080")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_954 = and(_T_953, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_955 = bits(_T_954, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_128 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_955 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_128 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_956 = eq(btb_wr_addr, UInt<8>("h081")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_957 = and(_T_956, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_958 = bits(_T_957, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_129 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_958 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_129 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_959 = eq(btb_wr_addr, UInt<8>("h082")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_960 = and(_T_959, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_961 = bits(_T_960, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_130 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_961 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_130 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_962 = eq(btb_wr_addr, UInt<8>("h083")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_963 = and(_T_962, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_964 = bits(_T_963, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_131 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_964 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_131 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_965 = eq(btb_wr_addr, UInt<8>("h084")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_966 = and(_T_965, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_967 = bits(_T_966, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_132 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_967 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_132 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_968 = eq(btb_wr_addr, UInt<8>("h085")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_969 = and(_T_968, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_970 = bits(_T_969, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_133 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_970 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_133 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_971 = eq(btb_wr_addr, UInt<8>("h086")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_972 = and(_T_971, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_973 = bits(_T_972, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_134 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_973 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_134 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_974 = eq(btb_wr_addr, UInt<8>("h087")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_975 = and(_T_974, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_976 = bits(_T_975, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_135 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_976 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_135 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_977 = eq(btb_wr_addr, UInt<8>("h088")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_978 = and(_T_977, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_979 = bits(_T_978, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_136 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_979 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_136 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_980 = eq(btb_wr_addr, UInt<8>("h089")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_981 = and(_T_980, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_982 = bits(_T_981, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_137 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_982 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_137 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_983 = eq(btb_wr_addr, UInt<8>("h08a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_984 = and(_T_983, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_985 = bits(_T_984, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_138 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_985 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_138 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_986 = eq(btb_wr_addr, UInt<8>("h08b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_987 = and(_T_986, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_988 = bits(_T_987, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_139 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_988 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_139 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_989 = eq(btb_wr_addr, UInt<8>("h08c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_990 = and(_T_989, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_991 = bits(_T_990, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_140 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_991 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_140 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_992 = eq(btb_wr_addr, UInt<8>("h08d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_993 = and(_T_992, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_994 = bits(_T_993, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_141 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_994 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_141 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_995 = eq(btb_wr_addr, UInt<8>("h08e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_996 = and(_T_995, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_997 = bits(_T_996, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_142 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_997 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_142 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_998 = eq(btb_wr_addr, UInt<8>("h08f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_999 = and(_T_998, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1000 = bits(_T_999, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_143 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1000 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_143 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1001 = eq(btb_wr_addr, UInt<8>("h090")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1002 = and(_T_1001, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1003 = bits(_T_1002, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_144 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1003 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_144 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1004 = eq(btb_wr_addr, UInt<8>("h091")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1005 = and(_T_1004, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1006 = bits(_T_1005, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_145 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1006 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_145 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1007 = eq(btb_wr_addr, UInt<8>("h092")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1008 = and(_T_1007, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1009 = bits(_T_1008, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_146 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1009 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_146 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1010 = eq(btb_wr_addr, UInt<8>("h093")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1011 = and(_T_1010, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1012 = bits(_T_1011, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_147 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1012 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_147 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1013 = eq(btb_wr_addr, UInt<8>("h094")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1014 = and(_T_1013, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1015 = bits(_T_1014, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_148 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1015 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_148 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1016 = eq(btb_wr_addr, UInt<8>("h095")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1017 = and(_T_1016, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1018 = bits(_T_1017, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_149 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1018 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_149 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1019 = eq(btb_wr_addr, UInt<8>("h096")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1020 = and(_T_1019, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1021 = bits(_T_1020, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_150 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1021 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_150 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1022 = eq(btb_wr_addr, UInt<8>("h097")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1023 = and(_T_1022, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1024 = bits(_T_1023, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_151 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1024 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_151 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1025 = eq(btb_wr_addr, UInt<8>("h098")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1026 = and(_T_1025, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1027 = bits(_T_1026, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_152 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1027 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_152 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1028 = eq(btb_wr_addr, UInt<8>("h099")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1029 = and(_T_1028, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1030 = bits(_T_1029, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_153 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1030 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_153 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1031 = eq(btb_wr_addr, UInt<8>("h09a")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1032 = and(_T_1031, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1033 = bits(_T_1032, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_154 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1033 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_154 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1034 = eq(btb_wr_addr, UInt<8>("h09b")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1035 = and(_T_1034, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1036 = bits(_T_1035, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_155 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1036 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_155 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1037 = eq(btb_wr_addr, UInt<8>("h09c")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1038 = and(_T_1037, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1039 = bits(_T_1038, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_156 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1039 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_156 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1040 = eq(btb_wr_addr, UInt<8>("h09d")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1041 = and(_T_1040, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1042 = bits(_T_1041, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_157 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1042 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_157 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1043 = eq(btb_wr_addr, UInt<8>("h09e")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1044 = and(_T_1043, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1045 = bits(_T_1044, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_158 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1045 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_158 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1046 = eq(btb_wr_addr, UInt<8>("h09f")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1047 = and(_T_1046, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1048 = bits(_T_1047, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_159 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1048 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_159 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1049 = eq(btb_wr_addr, UInt<8>("h0a0")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1050 = and(_T_1049, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1051 = bits(_T_1050, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_160 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1051 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_160 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1052 = eq(btb_wr_addr, UInt<8>("h0a1")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1053 = and(_T_1052, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1054 = bits(_T_1053, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_161 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1054 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_161 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1055 = eq(btb_wr_addr, UInt<8>("h0a2")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1056 = and(_T_1055, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1057 = bits(_T_1056, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_162 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1057 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_162 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1058 = eq(btb_wr_addr, UInt<8>("h0a3")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1059 = and(_T_1058, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1060 = bits(_T_1059, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_163 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1060 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_163 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1061 = eq(btb_wr_addr, UInt<8>("h0a4")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1062 = and(_T_1061, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1063 = bits(_T_1062, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_164 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1063 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_164 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1064 = eq(btb_wr_addr, UInt<8>("h0a5")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1065 = and(_T_1064, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1066 = bits(_T_1065, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_165 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1066 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_165 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1067 = eq(btb_wr_addr, UInt<8>("h0a6")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1068 = and(_T_1067, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1069 = bits(_T_1068, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_166 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1069 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_166 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1070 = eq(btb_wr_addr, UInt<8>("h0a7")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1071 = and(_T_1070, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1072 = bits(_T_1071, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_167 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1072 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_167 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1073 = eq(btb_wr_addr, UInt<8>("h0a8")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1074 = and(_T_1073, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1075 = bits(_T_1074, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_168 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1075 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_168 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1076 = eq(btb_wr_addr, UInt<8>("h0a9")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1077 = and(_T_1076, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1078 = bits(_T_1077, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_169 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1078 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_169 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1079 = eq(btb_wr_addr, UInt<8>("h0aa")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1080 = and(_T_1079, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1081 = bits(_T_1080, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_170 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1081 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_170 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1082 = eq(btb_wr_addr, UInt<8>("h0ab")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1083 = and(_T_1082, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1084 = bits(_T_1083, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_171 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1084 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_171 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1085 = eq(btb_wr_addr, UInt<8>("h0ac")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1086 = and(_T_1085, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1087 = bits(_T_1086, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_172 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1087 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_172 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1088 = eq(btb_wr_addr, UInt<8>("h0ad")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1089 = and(_T_1088, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1090 = bits(_T_1089, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_173 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1090 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_173 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1091 = eq(btb_wr_addr, UInt<8>("h0ae")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1092 = and(_T_1091, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1093 = bits(_T_1092, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_174 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1093 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_174 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1094 = eq(btb_wr_addr, UInt<8>("h0af")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1095 = and(_T_1094, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1096 = bits(_T_1095, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_175 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1096 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_175 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1097 = eq(btb_wr_addr, UInt<8>("h0b0")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1098 = and(_T_1097, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1099 = bits(_T_1098, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_176 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1099 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_176 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1100 = eq(btb_wr_addr, UInt<8>("h0b1")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1101 = and(_T_1100, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1102 = bits(_T_1101, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_177 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1102 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_177 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1103 = eq(btb_wr_addr, UInt<8>("h0b2")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1104 = and(_T_1103, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1105 = bits(_T_1104, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_178 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1105 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_178 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1106 = eq(btb_wr_addr, UInt<8>("h0b3")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1107 = and(_T_1106, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1108 = bits(_T_1107, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_179 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1108 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_179 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1109 = eq(btb_wr_addr, UInt<8>("h0b4")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1110 = and(_T_1109, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1111 = bits(_T_1110, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_180 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1111 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_180 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1112 = eq(btb_wr_addr, UInt<8>("h0b5")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1113 = and(_T_1112, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1114 = bits(_T_1113, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_181 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1114 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_181 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1115 = eq(btb_wr_addr, UInt<8>("h0b6")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1116 = and(_T_1115, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1117 = bits(_T_1116, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_182 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1117 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_182 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1118 = eq(btb_wr_addr, UInt<8>("h0b7")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1119 = and(_T_1118, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1120 = bits(_T_1119, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_183 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1120 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_183 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1121 = eq(btb_wr_addr, UInt<8>("h0b8")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1122 = and(_T_1121, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1123 = bits(_T_1122, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_184 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1123 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_184 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1124 = eq(btb_wr_addr, UInt<8>("h0b9")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1125 = and(_T_1124, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1126 = bits(_T_1125, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_185 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1126 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_185 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1127 = eq(btb_wr_addr, UInt<8>("h0ba")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1128 = and(_T_1127, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1129 = bits(_T_1128, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_186 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1129 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_186 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1130 = eq(btb_wr_addr, UInt<8>("h0bb")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1131 = and(_T_1130, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1132 = bits(_T_1131, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_187 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1132 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_187 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1133 = eq(btb_wr_addr, UInt<8>("h0bc")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1134 = and(_T_1133, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1135 = bits(_T_1134, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_188 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1135 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_188 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1136 = eq(btb_wr_addr, UInt<8>("h0bd")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1137 = and(_T_1136, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1138 = bits(_T_1137, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_189 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1138 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_189 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1139 = eq(btb_wr_addr, UInt<8>("h0be")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1140 = and(_T_1139, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1141 = bits(_T_1140, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_190 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1141 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_190 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1142 = eq(btb_wr_addr, UInt<8>("h0bf")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1143 = and(_T_1142, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1144 = bits(_T_1143, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_191 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1144 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_191 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1145 = eq(btb_wr_addr, UInt<8>("h0c0")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1146 = and(_T_1145, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1147 = bits(_T_1146, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_192 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1147 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_192 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1148 = eq(btb_wr_addr, UInt<8>("h0c1")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1149 = and(_T_1148, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1150 = bits(_T_1149, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_193 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1150 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_193 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1151 = eq(btb_wr_addr, UInt<8>("h0c2")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1152 = and(_T_1151, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1153 = bits(_T_1152, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_194 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1153 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_194 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1154 = eq(btb_wr_addr, UInt<8>("h0c3")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1155 = and(_T_1154, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1156 = bits(_T_1155, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_195 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1156 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_195 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1157 = eq(btb_wr_addr, UInt<8>("h0c4")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1158 = and(_T_1157, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1159 = bits(_T_1158, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_196 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1159 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_196 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1160 = eq(btb_wr_addr, UInt<8>("h0c5")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1161 = and(_T_1160, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1162 = bits(_T_1161, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_197 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1162 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_197 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1163 = eq(btb_wr_addr, UInt<8>("h0c6")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1164 = and(_T_1163, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1165 = bits(_T_1164, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_198 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1165 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_198 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1166 = eq(btb_wr_addr, UInt<8>("h0c7")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1167 = and(_T_1166, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1168 = bits(_T_1167, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_199 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1168 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_199 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1169 = eq(btb_wr_addr, UInt<8>("h0c8")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1170 = and(_T_1169, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1171 = bits(_T_1170, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_200 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1171 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_200 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1172 = eq(btb_wr_addr, UInt<8>("h0c9")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1173 = and(_T_1172, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1174 = bits(_T_1173, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_201 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1174 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_201 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1175 = eq(btb_wr_addr, UInt<8>("h0ca")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1176 = and(_T_1175, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1177 = bits(_T_1176, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_202 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1177 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_202 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1178 = eq(btb_wr_addr, UInt<8>("h0cb")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1179 = and(_T_1178, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1180 = bits(_T_1179, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_203 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1180 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_203 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1181 = eq(btb_wr_addr, UInt<8>("h0cc")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1182 = and(_T_1181, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1183 = bits(_T_1182, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_204 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1183 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_204 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1184 = eq(btb_wr_addr, UInt<8>("h0cd")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1185 = and(_T_1184, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1186 = bits(_T_1185, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_205 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1186 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_205 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1187 = eq(btb_wr_addr, UInt<8>("h0ce")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1188 = and(_T_1187, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1189 = bits(_T_1188, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_206 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1189 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_206 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1190 = eq(btb_wr_addr, UInt<8>("h0cf")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1191 = and(_T_1190, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1192 = bits(_T_1191, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_207 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1192 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_207 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1193 = eq(btb_wr_addr, UInt<8>("h0d0")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1194 = and(_T_1193, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1195 = bits(_T_1194, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_208 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1195 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_208 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1196 = eq(btb_wr_addr, UInt<8>("h0d1")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1197 = and(_T_1196, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1198 = bits(_T_1197, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_209 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1198 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_209 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1199 = eq(btb_wr_addr, UInt<8>("h0d2")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1200 = and(_T_1199, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1201 = bits(_T_1200, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_210 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1201 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_210 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1202 = eq(btb_wr_addr, UInt<8>("h0d3")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1203 = and(_T_1202, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1204 = bits(_T_1203, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_211 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1204 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_211 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1205 = eq(btb_wr_addr, UInt<8>("h0d4")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1206 = and(_T_1205, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1207 = bits(_T_1206, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_212 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1207 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_212 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1208 = eq(btb_wr_addr, UInt<8>("h0d5")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1209 = and(_T_1208, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1210 = bits(_T_1209, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_213 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1210 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_213 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1211 = eq(btb_wr_addr, UInt<8>("h0d6")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1212 = and(_T_1211, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1213 = bits(_T_1212, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_214 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1213 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_214 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1214 = eq(btb_wr_addr, UInt<8>("h0d7")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1215 = and(_T_1214, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1216 = bits(_T_1215, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_215 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1216 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_215 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1217 = eq(btb_wr_addr, UInt<8>("h0d8")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1218 = and(_T_1217, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1219 = bits(_T_1218, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_216 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1219 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_216 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1220 = eq(btb_wr_addr, UInt<8>("h0d9")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1221 = and(_T_1220, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1222 = bits(_T_1221, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_217 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1222 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_217 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1223 = eq(btb_wr_addr, UInt<8>("h0da")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1224 = and(_T_1223, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1225 = bits(_T_1224, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_218 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1225 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_218 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1226 = eq(btb_wr_addr, UInt<8>("h0db")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1227 = and(_T_1226, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1228 = bits(_T_1227, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_219 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1228 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_219 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1229 = eq(btb_wr_addr, UInt<8>("h0dc")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1230 = and(_T_1229, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1231 = bits(_T_1230, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_220 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1231 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_220 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1232 = eq(btb_wr_addr, UInt<8>("h0dd")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1233 = and(_T_1232, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1234 = bits(_T_1233, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_221 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1234 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_221 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1235 = eq(btb_wr_addr, UInt<8>("h0de")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1236 = and(_T_1235, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1237 = bits(_T_1236, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_222 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1237 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_222 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1238 = eq(btb_wr_addr, UInt<8>("h0df")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1239 = and(_T_1238, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1240 = bits(_T_1239, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_223 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1240 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_223 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1241 = eq(btb_wr_addr, UInt<8>("h0e0")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1242 = and(_T_1241, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1243 = bits(_T_1242, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_224 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1243 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_224 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1244 = eq(btb_wr_addr, UInt<8>("h0e1")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1245 = and(_T_1244, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1246 = bits(_T_1245, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_225 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1246 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_225 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1247 = eq(btb_wr_addr, UInt<8>("h0e2")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1248 = and(_T_1247, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1249 = bits(_T_1248, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_226 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1249 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_226 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1250 = eq(btb_wr_addr, UInt<8>("h0e3")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1251 = and(_T_1250, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1252 = bits(_T_1251, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_227 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1252 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_227 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1253 = eq(btb_wr_addr, UInt<8>("h0e4")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1254 = and(_T_1253, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1255 = bits(_T_1254, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_228 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1255 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_228 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1256 = eq(btb_wr_addr, UInt<8>("h0e5")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1257 = and(_T_1256, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1258 = bits(_T_1257, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_229 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1258 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_229 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1259 = eq(btb_wr_addr, UInt<8>("h0e6")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1260 = and(_T_1259, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1261 = bits(_T_1260, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_230 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1261 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_230 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1262 = eq(btb_wr_addr, UInt<8>("h0e7")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1263 = and(_T_1262, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1264 = bits(_T_1263, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_231 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1264 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_231 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1265 = eq(btb_wr_addr, UInt<8>("h0e8")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1266 = and(_T_1265, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1267 = bits(_T_1266, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_232 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1267 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_232 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1268 = eq(btb_wr_addr, UInt<8>("h0e9")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1269 = and(_T_1268, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1270 = bits(_T_1269, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_233 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1270 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_233 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1271 = eq(btb_wr_addr, UInt<8>("h0ea")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1272 = and(_T_1271, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1273 = bits(_T_1272, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_234 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1273 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_234 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1274 = eq(btb_wr_addr, UInt<8>("h0eb")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1275 = and(_T_1274, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1276 = bits(_T_1275, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_235 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1276 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_235 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1277 = eq(btb_wr_addr, UInt<8>("h0ec")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1278 = and(_T_1277, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1279 = bits(_T_1278, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_236 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1279 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_236 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1280 = eq(btb_wr_addr, UInt<8>("h0ed")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1281 = and(_T_1280, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1282 = bits(_T_1281, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_237 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1282 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_237 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1283 = eq(btb_wr_addr, UInt<8>("h0ee")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1284 = and(_T_1283, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1285 = bits(_T_1284, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_238 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1285 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_238 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1286 = eq(btb_wr_addr, UInt<8>("h0ef")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1287 = and(_T_1286, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1288 = bits(_T_1287, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_239 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1288 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_239 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1289 = eq(btb_wr_addr, UInt<8>("h0f0")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1290 = and(_T_1289, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1291 = bits(_T_1290, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_240 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1291 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_240 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1292 = eq(btb_wr_addr, UInt<8>("h0f1")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1293 = and(_T_1292, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1294 = bits(_T_1293, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_241 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1294 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_241 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1295 = eq(btb_wr_addr, UInt<8>("h0f2")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1296 = and(_T_1295, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1297 = bits(_T_1296, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_242 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1297 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_242 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1298 = eq(btb_wr_addr, UInt<8>("h0f3")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1299 = and(_T_1298, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1300 = bits(_T_1299, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_243 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1300 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_243 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1301 = eq(btb_wr_addr, UInt<8>("h0f4")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1302 = and(_T_1301, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1303 = bits(_T_1302, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_244 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1303 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_244 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1304 = eq(btb_wr_addr, UInt<8>("h0f5")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1305 = and(_T_1304, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1306 = bits(_T_1305, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_245 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1306 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_245 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1307 = eq(btb_wr_addr, UInt<8>("h0f6")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1308 = and(_T_1307, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1309 = bits(_T_1308, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_246 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1309 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_246 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1310 = eq(btb_wr_addr, UInt<8>("h0f7")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1311 = and(_T_1310, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1312 = bits(_T_1311, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_247 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1312 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_247 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1313 = eq(btb_wr_addr, UInt<8>("h0f8")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1314 = and(_T_1313, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1315 = bits(_T_1314, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_248 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1315 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_248 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1316 = eq(btb_wr_addr, UInt<8>("h0f9")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1317 = and(_T_1316, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1318 = bits(_T_1317, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_249 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1318 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_249 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1319 = eq(btb_wr_addr, UInt<8>("h0fa")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1320 = and(_T_1319, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1321 = bits(_T_1320, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_250 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1321 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_250 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1322 = eq(btb_wr_addr, UInt<8>("h0fb")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1323 = and(_T_1322, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1324 = bits(_T_1323, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_251 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1324 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_251 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1325 = eq(btb_wr_addr, UInt<8>("h0fc")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1326 = and(_T_1325, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1327 = bits(_T_1326, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_252 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1327 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_252 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1328 = eq(btb_wr_addr, UInt<8>("h0fd")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1329 = and(_T_1328, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1330 = bits(_T_1329, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_253 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1330 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_253 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1331 = eq(btb_wr_addr, UInt<8>("h0fe")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1332 = and(_T_1331, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1333 = bits(_T_1332, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_254 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1333 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_254 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1334 = eq(btb_wr_addr, UInt<8>("h0ff")) @[el2_ifu_bp_ctl.scala 360:101]
|
|
node _T_1335 = and(_T_1334, btb_wr_en_way0) @[el2_ifu_bp_ctl.scala 360:109]
|
|
node _T_1336 = bits(_T_1335, 0, 0) @[el2_ifu_bp_ctl.scala 360:127]
|
|
reg btb_bank0_rd_data_way0_out_255 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1336 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way0_out_255 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1337 = eq(btb_wr_addr, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1338 = and(_T_1337, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1339 = bits(_T_1338, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_0 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1339 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_0 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1340 = eq(btb_wr_addr, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1341 = and(_T_1340, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1342 = bits(_T_1341, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_1 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1342 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_1 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1343 = eq(btb_wr_addr, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1344 = and(_T_1343, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1345 = bits(_T_1344, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_2 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1345 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_2 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1346 = eq(btb_wr_addr, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1347 = and(_T_1346, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1348 = bits(_T_1347, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_3 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1348 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_3 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1349 = eq(btb_wr_addr, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1350 = and(_T_1349, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1351 = bits(_T_1350, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_4 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1351 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_4 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1352 = eq(btb_wr_addr, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1353 = and(_T_1352, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1354 = bits(_T_1353, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_5 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1354 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_5 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1355 = eq(btb_wr_addr, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1356 = and(_T_1355, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1357 = bits(_T_1356, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_6 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1357 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_6 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1358 = eq(btb_wr_addr, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1359 = and(_T_1358, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1360 = bits(_T_1359, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_7 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1360 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_7 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1361 = eq(btb_wr_addr, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1362 = and(_T_1361, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1363 = bits(_T_1362, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_8 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1363 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_8 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1364 = eq(btb_wr_addr, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1365 = and(_T_1364, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1366 = bits(_T_1365, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_9 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1366 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_9 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1367 = eq(btb_wr_addr, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1368 = and(_T_1367, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1369 = bits(_T_1368, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_10 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1369 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_10 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1370 = eq(btb_wr_addr, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1371 = and(_T_1370, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1372 = bits(_T_1371, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_11 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1372 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_11 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1373 = eq(btb_wr_addr, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1374 = and(_T_1373, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1375 = bits(_T_1374, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_12 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1375 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_12 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1376 = eq(btb_wr_addr, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1377 = and(_T_1376, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1378 = bits(_T_1377, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_13 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1378 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_13 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1379 = eq(btb_wr_addr, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1380 = and(_T_1379, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1381 = bits(_T_1380, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_14 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1381 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_14 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1382 = eq(btb_wr_addr, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1383 = and(_T_1382, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1384 = bits(_T_1383, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_15 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1384 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_15 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1385 = eq(btb_wr_addr, UInt<5>("h010")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1386 = and(_T_1385, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1387 = bits(_T_1386, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_16 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1387 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_16 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1388 = eq(btb_wr_addr, UInt<5>("h011")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1389 = and(_T_1388, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1390 = bits(_T_1389, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_17 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1390 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_17 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1391 = eq(btb_wr_addr, UInt<5>("h012")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1392 = and(_T_1391, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1393 = bits(_T_1392, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_18 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1393 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_18 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1394 = eq(btb_wr_addr, UInt<5>("h013")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1395 = and(_T_1394, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1396 = bits(_T_1395, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_19 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1396 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_19 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1397 = eq(btb_wr_addr, UInt<5>("h014")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1398 = and(_T_1397, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1399 = bits(_T_1398, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_20 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1399 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_20 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1400 = eq(btb_wr_addr, UInt<5>("h015")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1401 = and(_T_1400, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1402 = bits(_T_1401, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_21 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1402 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_21 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1403 = eq(btb_wr_addr, UInt<5>("h016")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1404 = and(_T_1403, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1405 = bits(_T_1404, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_22 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1405 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_22 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1406 = eq(btb_wr_addr, UInt<5>("h017")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1407 = and(_T_1406, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1408 = bits(_T_1407, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_23 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1408 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_23 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1409 = eq(btb_wr_addr, UInt<5>("h018")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1410 = and(_T_1409, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1411 = bits(_T_1410, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_24 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1411 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_24 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1412 = eq(btb_wr_addr, UInt<5>("h019")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1413 = and(_T_1412, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1414 = bits(_T_1413, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_25 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1414 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_25 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1415 = eq(btb_wr_addr, UInt<5>("h01a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1416 = and(_T_1415, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1417 = bits(_T_1416, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_26 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1417 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_26 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1418 = eq(btb_wr_addr, UInt<5>("h01b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1419 = and(_T_1418, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1420 = bits(_T_1419, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_27 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1420 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_27 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1421 = eq(btb_wr_addr, UInt<5>("h01c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1422 = and(_T_1421, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1423 = bits(_T_1422, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_28 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1423 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_28 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1424 = eq(btb_wr_addr, UInt<5>("h01d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1425 = and(_T_1424, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1426 = bits(_T_1425, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_29 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1426 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_29 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1427 = eq(btb_wr_addr, UInt<5>("h01e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1428 = and(_T_1427, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1429 = bits(_T_1428, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_30 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1429 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_30 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1430 = eq(btb_wr_addr, UInt<5>("h01f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1431 = and(_T_1430, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1432 = bits(_T_1431, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_31 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1432 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_31 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1433 = eq(btb_wr_addr, UInt<6>("h020")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1434 = and(_T_1433, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1435 = bits(_T_1434, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_32 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1435 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_32 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1436 = eq(btb_wr_addr, UInt<6>("h021")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1437 = and(_T_1436, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1438 = bits(_T_1437, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_33 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1438 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_33 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1439 = eq(btb_wr_addr, UInt<6>("h022")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1440 = and(_T_1439, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1441 = bits(_T_1440, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_34 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1441 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_34 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1442 = eq(btb_wr_addr, UInt<6>("h023")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1443 = and(_T_1442, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1444 = bits(_T_1443, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_35 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1444 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_35 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1445 = eq(btb_wr_addr, UInt<6>("h024")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1446 = and(_T_1445, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1447 = bits(_T_1446, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_36 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1447 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_36 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1448 = eq(btb_wr_addr, UInt<6>("h025")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1449 = and(_T_1448, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1450 = bits(_T_1449, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_37 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1450 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_37 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1451 = eq(btb_wr_addr, UInt<6>("h026")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1452 = and(_T_1451, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1453 = bits(_T_1452, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_38 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1453 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_38 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1454 = eq(btb_wr_addr, UInt<6>("h027")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1455 = and(_T_1454, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1456 = bits(_T_1455, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_39 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1456 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_39 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1457 = eq(btb_wr_addr, UInt<6>("h028")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1458 = and(_T_1457, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1459 = bits(_T_1458, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_40 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1459 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_40 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1460 = eq(btb_wr_addr, UInt<6>("h029")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1461 = and(_T_1460, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1462 = bits(_T_1461, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_41 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1462 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_41 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1463 = eq(btb_wr_addr, UInt<6>("h02a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1464 = and(_T_1463, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1465 = bits(_T_1464, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_42 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1465 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_42 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1466 = eq(btb_wr_addr, UInt<6>("h02b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1467 = and(_T_1466, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1468 = bits(_T_1467, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_43 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1468 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_43 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1469 = eq(btb_wr_addr, UInt<6>("h02c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1470 = and(_T_1469, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1471 = bits(_T_1470, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_44 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1471 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_44 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1472 = eq(btb_wr_addr, UInt<6>("h02d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1473 = and(_T_1472, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1474 = bits(_T_1473, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_45 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1474 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_45 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1475 = eq(btb_wr_addr, UInt<6>("h02e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1476 = and(_T_1475, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1477 = bits(_T_1476, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_46 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1477 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_46 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1478 = eq(btb_wr_addr, UInt<6>("h02f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1479 = and(_T_1478, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1480 = bits(_T_1479, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_47 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1480 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_47 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1481 = eq(btb_wr_addr, UInt<6>("h030")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1482 = and(_T_1481, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1483 = bits(_T_1482, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_48 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1483 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_48 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1484 = eq(btb_wr_addr, UInt<6>("h031")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1485 = and(_T_1484, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1486 = bits(_T_1485, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_49 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1486 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_49 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1487 = eq(btb_wr_addr, UInt<6>("h032")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1488 = and(_T_1487, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1489 = bits(_T_1488, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_50 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1489 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_50 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1490 = eq(btb_wr_addr, UInt<6>("h033")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1491 = and(_T_1490, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1492 = bits(_T_1491, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_51 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1492 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_51 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1493 = eq(btb_wr_addr, UInt<6>("h034")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1494 = and(_T_1493, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1495 = bits(_T_1494, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_52 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1495 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_52 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1496 = eq(btb_wr_addr, UInt<6>("h035")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1497 = and(_T_1496, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1498 = bits(_T_1497, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_53 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1498 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_53 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1499 = eq(btb_wr_addr, UInt<6>("h036")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1500 = and(_T_1499, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1501 = bits(_T_1500, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_54 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1501 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_54 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1502 = eq(btb_wr_addr, UInt<6>("h037")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1503 = and(_T_1502, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1504 = bits(_T_1503, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_55 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1504 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_55 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1505 = eq(btb_wr_addr, UInt<6>("h038")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1506 = and(_T_1505, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1507 = bits(_T_1506, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_56 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1507 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_56 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1508 = eq(btb_wr_addr, UInt<6>("h039")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1509 = and(_T_1508, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1510 = bits(_T_1509, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_57 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1510 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_57 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1511 = eq(btb_wr_addr, UInt<6>("h03a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1512 = and(_T_1511, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1513 = bits(_T_1512, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_58 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1513 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_58 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1514 = eq(btb_wr_addr, UInt<6>("h03b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1515 = and(_T_1514, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1516 = bits(_T_1515, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_59 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1516 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_59 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1517 = eq(btb_wr_addr, UInt<6>("h03c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1518 = and(_T_1517, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1519 = bits(_T_1518, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_60 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1519 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_60 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1520 = eq(btb_wr_addr, UInt<6>("h03d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1521 = and(_T_1520, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1522 = bits(_T_1521, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_61 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1522 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_61 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1523 = eq(btb_wr_addr, UInt<6>("h03e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1524 = and(_T_1523, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1525 = bits(_T_1524, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_62 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1525 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_62 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1526 = eq(btb_wr_addr, UInt<6>("h03f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1527 = and(_T_1526, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1528 = bits(_T_1527, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_63 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1528 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_63 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1529 = eq(btb_wr_addr, UInt<7>("h040")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1530 = and(_T_1529, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1531 = bits(_T_1530, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_64 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1531 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_64 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1532 = eq(btb_wr_addr, UInt<7>("h041")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1533 = and(_T_1532, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1534 = bits(_T_1533, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_65 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1534 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_65 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1535 = eq(btb_wr_addr, UInt<7>("h042")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1536 = and(_T_1535, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1537 = bits(_T_1536, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_66 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1537 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_66 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1538 = eq(btb_wr_addr, UInt<7>("h043")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1539 = and(_T_1538, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1540 = bits(_T_1539, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_67 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1540 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_67 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1541 = eq(btb_wr_addr, UInt<7>("h044")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1542 = and(_T_1541, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1543 = bits(_T_1542, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_68 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1543 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_68 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1544 = eq(btb_wr_addr, UInt<7>("h045")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1545 = and(_T_1544, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1546 = bits(_T_1545, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_69 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1546 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_69 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1547 = eq(btb_wr_addr, UInt<7>("h046")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1548 = and(_T_1547, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1549 = bits(_T_1548, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_70 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1549 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_70 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1550 = eq(btb_wr_addr, UInt<7>("h047")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1551 = and(_T_1550, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1552 = bits(_T_1551, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_71 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1552 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_71 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1553 = eq(btb_wr_addr, UInt<7>("h048")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1554 = and(_T_1553, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1555 = bits(_T_1554, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_72 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1555 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_72 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1556 = eq(btb_wr_addr, UInt<7>("h049")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1557 = and(_T_1556, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1558 = bits(_T_1557, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_73 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1558 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_73 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1559 = eq(btb_wr_addr, UInt<7>("h04a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1560 = and(_T_1559, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1561 = bits(_T_1560, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_74 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1561 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_74 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1562 = eq(btb_wr_addr, UInt<7>("h04b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1563 = and(_T_1562, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1564 = bits(_T_1563, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_75 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1564 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_75 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1565 = eq(btb_wr_addr, UInt<7>("h04c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1566 = and(_T_1565, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1567 = bits(_T_1566, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_76 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1567 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_76 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1568 = eq(btb_wr_addr, UInt<7>("h04d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1569 = and(_T_1568, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1570 = bits(_T_1569, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_77 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1570 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_77 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1571 = eq(btb_wr_addr, UInt<7>("h04e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1572 = and(_T_1571, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1573 = bits(_T_1572, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_78 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1573 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_78 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1574 = eq(btb_wr_addr, UInt<7>("h04f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1575 = and(_T_1574, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1576 = bits(_T_1575, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_79 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1576 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_79 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1577 = eq(btb_wr_addr, UInt<7>("h050")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1578 = and(_T_1577, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1579 = bits(_T_1578, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_80 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1579 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_80 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1580 = eq(btb_wr_addr, UInt<7>("h051")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1581 = and(_T_1580, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1582 = bits(_T_1581, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_81 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1582 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_81 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1583 = eq(btb_wr_addr, UInt<7>("h052")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1584 = and(_T_1583, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1585 = bits(_T_1584, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_82 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1585 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_82 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1586 = eq(btb_wr_addr, UInt<7>("h053")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1587 = and(_T_1586, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1588 = bits(_T_1587, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_83 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1588 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_83 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1589 = eq(btb_wr_addr, UInt<7>("h054")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1590 = and(_T_1589, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1591 = bits(_T_1590, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_84 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1591 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_84 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1592 = eq(btb_wr_addr, UInt<7>("h055")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1593 = and(_T_1592, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1594 = bits(_T_1593, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_85 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1594 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_85 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1595 = eq(btb_wr_addr, UInt<7>("h056")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1596 = and(_T_1595, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1597 = bits(_T_1596, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_86 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1597 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_86 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1598 = eq(btb_wr_addr, UInt<7>("h057")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1599 = and(_T_1598, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1600 = bits(_T_1599, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_87 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1600 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_87 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1601 = eq(btb_wr_addr, UInt<7>("h058")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1602 = and(_T_1601, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1603 = bits(_T_1602, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_88 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1603 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_88 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1604 = eq(btb_wr_addr, UInt<7>("h059")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1605 = and(_T_1604, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1606 = bits(_T_1605, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_89 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1606 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_89 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1607 = eq(btb_wr_addr, UInt<7>("h05a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1608 = and(_T_1607, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1609 = bits(_T_1608, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_90 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1609 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_90 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1610 = eq(btb_wr_addr, UInt<7>("h05b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1611 = and(_T_1610, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1612 = bits(_T_1611, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_91 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1612 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_91 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1613 = eq(btb_wr_addr, UInt<7>("h05c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1614 = and(_T_1613, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1615 = bits(_T_1614, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_92 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1615 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_92 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1616 = eq(btb_wr_addr, UInt<7>("h05d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1617 = and(_T_1616, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1618 = bits(_T_1617, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_93 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1618 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_93 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1619 = eq(btb_wr_addr, UInt<7>("h05e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1620 = and(_T_1619, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1621 = bits(_T_1620, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_94 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1621 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_94 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1622 = eq(btb_wr_addr, UInt<7>("h05f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1623 = and(_T_1622, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1624 = bits(_T_1623, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_95 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1624 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_95 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1625 = eq(btb_wr_addr, UInt<7>("h060")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1626 = and(_T_1625, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1627 = bits(_T_1626, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_96 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1627 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_96 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1628 = eq(btb_wr_addr, UInt<7>("h061")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1629 = and(_T_1628, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1630 = bits(_T_1629, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_97 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1630 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_97 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1631 = eq(btb_wr_addr, UInt<7>("h062")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1632 = and(_T_1631, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1633 = bits(_T_1632, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_98 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1633 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_98 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1634 = eq(btb_wr_addr, UInt<7>("h063")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1635 = and(_T_1634, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1636 = bits(_T_1635, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_99 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1636 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_99 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1637 = eq(btb_wr_addr, UInt<7>("h064")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1638 = and(_T_1637, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1639 = bits(_T_1638, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_100 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1639 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_100 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1640 = eq(btb_wr_addr, UInt<7>("h065")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1641 = and(_T_1640, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1642 = bits(_T_1641, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_101 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1642 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_101 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1643 = eq(btb_wr_addr, UInt<7>("h066")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1644 = and(_T_1643, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1645 = bits(_T_1644, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_102 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1645 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_102 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1646 = eq(btb_wr_addr, UInt<7>("h067")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1647 = and(_T_1646, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1648 = bits(_T_1647, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_103 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1648 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_103 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1649 = eq(btb_wr_addr, UInt<7>("h068")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1650 = and(_T_1649, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1651 = bits(_T_1650, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_104 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1651 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_104 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1652 = eq(btb_wr_addr, UInt<7>("h069")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1653 = and(_T_1652, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1654 = bits(_T_1653, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_105 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1654 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_105 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1655 = eq(btb_wr_addr, UInt<7>("h06a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1656 = and(_T_1655, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1657 = bits(_T_1656, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_106 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1657 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_106 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1658 = eq(btb_wr_addr, UInt<7>("h06b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1659 = and(_T_1658, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1660 = bits(_T_1659, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_107 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1660 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_107 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1661 = eq(btb_wr_addr, UInt<7>("h06c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1662 = and(_T_1661, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1663 = bits(_T_1662, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_108 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1663 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_108 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1664 = eq(btb_wr_addr, UInt<7>("h06d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1665 = and(_T_1664, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1666 = bits(_T_1665, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_109 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1666 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_109 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1667 = eq(btb_wr_addr, UInt<7>("h06e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1668 = and(_T_1667, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1669 = bits(_T_1668, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_110 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1669 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_110 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1670 = eq(btb_wr_addr, UInt<7>("h06f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1671 = and(_T_1670, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1672 = bits(_T_1671, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_111 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1672 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_111 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1673 = eq(btb_wr_addr, UInt<7>("h070")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1674 = and(_T_1673, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1675 = bits(_T_1674, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_112 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1675 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_112 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1676 = eq(btb_wr_addr, UInt<7>("h071")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1677 = and(_T_1676, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1678 = bits(_T_1677, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_113 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1678 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_113 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1679 = eq(btb_wr_addr, UInt<7>("h072")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1680 = and(_T_1679, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1681 = bits(_T_1680, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_114 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1681 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_114 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1682 = eq(btb_wr_addr, UInt<7>("h073")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1683 = and(_T_1682, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1684 = bits(_T_1683, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_115 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1684 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_115 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1685 = eq(btb_wr_addr, UInt<7>("h074")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1686 = and(_T_1685, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1687 = bits(_T_1686, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_116 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1687 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_116 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1688 = eq(btb_wr_addr, UInt<7>("h075")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1689 = and(_T_1688, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1690 = bits(_T_1689, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_117 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1690 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_117 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1691 = eq(btb_wr_addr, UInt<7>("h076")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1692 = and(_T_1691, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1693 = bits(_T_1692, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_118 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1693 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_118 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1694 = eq(btb_wr_addr, UInt<7>("h077")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1695 = and(_T_1694, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1696 = bits(_T_1695, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_119 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1696 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_119 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1697 = eq(btb_wr_addr, UInt<7>("h078")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1698 = and(_T_1697, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1699 = bits(_T_1698, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_120 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1699 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_120 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1700 = eq(btb_wr_addr, UInt<7>("h079")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1701 = and(_T_1700, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1702 = bits(_T_1701, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_121 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1702 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_121 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1703 = eq(btb_wr_addr, UInt<7>("h07a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1704 = and(_T_1703, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1705 = bits(_T_1704, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_122 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1705 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_122 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1706 = eq(btb_wr_addr, UInt<7>("h07b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1707 = and(_T_1706, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1708 = bits(_T_1707, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_123 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1708 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_123 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1709 = eq(btb_wr_addr, UInt<7>("h07c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1710 = and(_T_1709, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1711 = bits(_T_1710, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_124 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1711 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_124 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1712 = eq(btb_wr_addr, UInt<7>("h07d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1713 = and(_T_1712, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1714 = bits(_T_1713, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_125 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1714 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_125 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1715 = eq(btb_wr_addr, UInt<7>("h07e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1716 = and(_T_1715, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1717 = bits(_T_1716, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_126 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1717 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_126 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1718 = eq(btb_wr_addr, UInt<7>("h07f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1719 = and(_T_1718, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1720 = bits(_T_1719, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_127 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1720 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_127 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1721 = eq(btb_wr_addr, UInt<8>("h080")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1722 = and(_T_1721, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1723 = bits(_T_1722, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_128 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1723 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_128 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1724 = eq(btb_wr_addr, UInt<8>("h081")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1725 = and(_T_1724, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1726 = bits(_T_1725, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_129 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1726 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_129 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1727 = eq(btb_wr_addr, UInt<8>("h082")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1728 = and(_T_1727, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1729 = bits(_T_1728, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_130 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1729 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_130 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1730 = eq(btb_wr_addr, UInt<8>("h083")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1731 = and(_T_1730, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1732 = bits(_T_1731, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_131 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1732 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_131 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1733 = eq(btb_wr_addr, UInt<8>("h084")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1734 = and(_T_1733, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1735 = bits(_T_1734, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_132 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1735 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_132 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1736 = eq(btb_wr_addr, UInt<8>("h085")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1737 = and(_T_1736, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1738 = bits(_T_1737, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_133 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1738 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_133 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1739 = eq(btb_wr_addr, UInt<8>("h086")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1740 = and(_T_1739, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1741 = bits(_T_1740, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_134 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1741 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_134 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1742 = eq(btb_wr_addr, UInt<8>("h087")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1743 = and(_T_1742, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1744 = bits(_T_1743, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_135 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1744 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_135 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1745 = eq(btb_wr_addr, UInt<8>("h088")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1746 = and(_T_1745, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1747 = bits(_T_1746, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_136 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1747 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_136 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1748 = eq(btb_wr_addr, UInt<8>("h089")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1749 = and(_T_1748, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1750 = bits(_T_1749, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_137 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1750 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_137 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1751 = eq(btb_wr_addr, UInt<8>("h08a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1752 = and(_T_1751, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1753 = bits(_T_1752, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_138 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1753 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_138 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1754 = eq(btb_wr_addr, UInt<8>("h08b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1755 = and(_T_1754, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1756 = bits(_T_1755, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_139 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1756 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_139 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1757 = eq(btb_wr_addr, UInt<8>("h08c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1758 = and(_T_1757, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1759 = bits(_T_1758, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_140 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1759 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_140 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1760 = eq(btb_wr_addr, UInt<8>("h08d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1761 = and(_T_1760, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1762 = bits(_T_1761, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_141 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1762 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_141 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1763 = eq(btb_wr_addr, UInt<8>("h08e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1764 = and(_T_1763, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1765 = bits(_T_1764, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_142 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1765 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_142 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1766 = eq(btb_wr_addr, UInt<8>("h08f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1767 = and(_T_1766, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1768 = bits(_T_1767, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_143 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1768 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_143 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1769 = eq(btb_wr_addr, UInt<8>("h090")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1770 = and(_T_1769, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1771 = bits(_T_1770, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_144 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1771 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_144 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1772 = eq(btb_wr_addr, UInt<8>("h091")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1773 = and(_T_1772, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1774 = bits(_T_1773, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_145 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1774 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_145 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1775 = eq(btb_wr_addr, UInt<8>("h092")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1776 = and(_T_1775, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1777 = bits(_T_1776, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_146 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1777 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_146 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1778 = eq(btb_wr_addr, UInt<8>("h093")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1779 = and(_T_1778, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1780 = bits(_T_1779, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_147 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1780 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_147 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1781 = eq(btb_wr_addr, UInt<8>("h094")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1782 = and(_T_1781, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1783 = bits(_T_1782, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_148 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1783 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_148 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1784 = eq(btb_wr_addr, UInt<8>("h095")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1785 = and(_T_1784, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1786 = bits(_T_1785, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_149 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1786 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_149 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1787 = eq(btb_wr_addr, UInt<8>("h096")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1788 = and(_T_1787, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1789 = bits(_T_1788, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_150 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1789 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_150 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1790 = eq(btb_wr_addr, UInt<8>("h097")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1791 = and(_T_1790, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1792 = bits(_T_1791, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_151 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1792 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_151 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1793 = eq(btb_wr_addr, UInt<8>("h098")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1794 = and(_T_1793, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1795 = bits(_T_1794, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_152 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1795 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_152 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1796 = eq(btb_wr_addr, UInt<8>("h099")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1797 = and(_T_1796, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1798 = bits(_T_1797, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_153 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1798 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_153 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1799 = eq(btb_wr_addr, UInt<8>("h09a")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1800 = and(_T_1799, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1801 = bits(_T_1800, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_154 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1801 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_154 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1802 = eq(btb_wr_addr, UInt<8>("h09b")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1803 = and(_T_1802, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1804 = bits(_T_1803, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_155 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1804 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_155 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1805 = eq(btb_wr_addr, UInt<8>("h09c")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1806 = and(_T_1805, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1807 = bits(_T_1806, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_156 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1807 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_156 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1808 = eq(btb_wr_addr, UInt<8>("h09d")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1809 = and(_T_1808, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1810 = bits(_T_1809, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_157 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1810 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_157 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1811 = eq(btb_wr_addr, UInt<8>("h09e")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1812 = and(_T_1811, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1813 = bits(_T_1812, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_158 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1813 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_158 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1814 = eq(btb_wr_addr, UInt<8>("h09f")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1815 = and(_T_1814, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1816 = bits(_T_1815, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_159 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1816 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_159 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1817 = eq(btb_wr_addr, UInt<8>("h0a0")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1818 = and(_T_1817, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1819 = bits(_T_1818, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_160 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1819 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_160 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1820 = eq(btb_wr_addr, UInt<8>("h0a1")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1821 = and(_T_1820, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1822 = bits(_T_1821, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_161 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1822 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_161 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1823 = eq(btb_wr_addr, UInt<8>("h0a2")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1824 = and(_T_1823, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1825 = bits(_T_1824, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_162 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1825 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_162 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1826 = eq(btb_wr_addr, UInt<8>("h0a3")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1827 = and(_T_1826, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1828 = bits(_T_1827, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_163 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1828 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_163 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1829 = eq(btb_wr_addr, UInt<8>("h0a4")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1830 = and(_T_1829, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1831 = bits(_T_1830, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_164 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1831 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_164 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1832 = eq(btb_wr_addr, UInt<8>("h0a5")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1833 = and(_T_1832, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1834 = bits(_T_1833, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_165 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1834 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_165 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1835 = eq(btb_wr_addr, UInt<8>("h0a6")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1836 = and(_T_1835, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1837 = bits(_T_1836, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_166 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1837 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_166 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1838 = eq(btb_wr_addr, UInt<8>("h0a7")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1839 = and(_T_1838, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1840 = bits(_T_1839, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_167 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1840 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_167 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1841 = eq(btb_wr_addr, UInt<8>("h0a8")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1842 = and(_T_1841, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1843 = bits(_T_1842, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_168 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1843 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_168 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1844 = eq(btb_wr_addr, UInt<8>("h0a9")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1845 = and(_T_1844, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1846 = bits(_T_1845, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_169 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1846 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_169 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1847 = eq(btb_wr_addr, UInt<8>("h0aa")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1848 = and(_T_1847, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1849 = bits(_T_1848, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_170 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1849 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_170 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1850 = eq(btb_wr_addr, UInt<8>("h0ab")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1851 = and(_T_1850, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1852 = bits(_T_1851, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_171 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1852 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_171 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1853 = eq(btb_wr_addr, UInt<8>("h0ac")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1854 = and(_T_1853, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1855 = bits(_T_1854, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_172 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1855 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_172 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1856 = eq(btb_wr_addr, UInt<8>("h0ad")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1857 = and(_T_1856, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1858 = bits(_T_1857, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_173 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1858 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_173 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1859 = eq(btb_wr_addr, UInt<8>("h0ae")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1860 = and(_T_1859, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1861 = bits(_T_1860, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_174 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1861 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_174 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1862 = eq(btb_wr_addr, UInt<8>("h0af")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1863 = and(_T_1862, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1864 = bits(_T_1863, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_175 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1864 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_175 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1865 = eq(btb_wr_addr, UInt<8>("h0b0")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1866 = and(_T_1865, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1867 = bits(_T_1866, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_176 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1867 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_176 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1868 = eq(btb_wr_addr, UInt<8>("h0b1")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1869 = and(_T_1868, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1870 = bits(_T_1869, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_177 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1870 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_177 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1871 = eq(btb_wr_addr, UInt<8>("h0b2")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1872 = and(_T_1871, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1873 = bits(_T_1872, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_178 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1873 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_178 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1874 = eq(btb_wr_addr, UInt<8>("h0b3")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1875 = and(_T_1874, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1876 = bits(_T_1875, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_179 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1876 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_179 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1877 = eq(btb_wr_addr, UInt<8>("h0b4")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1878 = and(_T_1877, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1879 = bits(_T_1878, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_180 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1879 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_180 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1880 = eq(btb_wr_addr, UInt<8>("h0b5")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1881 = and(_T_1880, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1882 = bits(_T_1881, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_181 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1882 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_181 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1883 = eq(btb_wr_addr, UInt<8>("h0b6")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1884 = and(_T_1883, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1885 = bits(_T_1884, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_182 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1885 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_182 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1886 = eq(btb_wr_addr, UInt<8>("h0b7")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1887 = and(_T_1886, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1888 = bits(_T_1887, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_183 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1888 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_183 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1889 = eq(btb_wr_addr, UInt<8>("h0b8")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1890 = and(_T_1889, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1891 = bits(_T_1890, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_184 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1891 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_184 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1892 = eq(btb_wr_addr, UInt<8>("h0b9")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1893 = and(_T_1892, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1894 = bits(_T_1893, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_185 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1894 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_185 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1895 = eq(btb_wr_addr, UInt<8>("h0ba")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1896 = and(_T_1895, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1897 = bits(_T_1896, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_186 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1897 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_186 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1898 = eq(btb_wr_addr, UInt<8>("h0bb")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1899 = and(_T_1898, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1900 = bits(_T_1899, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_187 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1900 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_187 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1901 = eq(btb_wr_addr, UInt<8>("h0bc")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1902 = and(_T_1901, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1903 = bits(_T_1902, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_188 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1903 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_188 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1904 = eq(btb_wr_addr, UInt<8>("h0bd")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1905 = and(_T_1904, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1906 = bits(_T_1905, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_189 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1906 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_189 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1907 = eq(btb_wr_addr, UInt<8>("h0be")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1908 = and(_T_1907, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1909 = bits(_T_1908, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_190 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1909 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_190 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1910 = eq(btb_wr_addr, UInt<8>("h0bf")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1911 = and(_T_1910, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1912 = bits(_T_1911, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_191 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1912 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_191 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1913 = eq(btb_wr_addr, UInt<8>("h0c0")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1914 = and(_T_1913, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1915 = bits(_T_1914, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_192 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1915 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_192 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1916 = eq(btb_wr_addr, UInt<8>("h0c1")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1917 = and(_T_1916, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1918 = bits(_T_1917, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_193 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1918 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_193 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1919 = eq(btb_wr_addr, UInt<8>("h0c2")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1920 = and(_T_1919, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1921 = bits(_T_1920, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_194 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1921 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_194 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1922 = eq(btb_wr_addr, UInt<8>("h0c3")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1923 = and(_T_1922, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1924 = bits(_T_1923, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_195 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1924 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_195 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1925 = eq(btb_wr_addr, UInt<8>("h0c4")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1926 = and(_T_1925, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1927 = bits(_T_1926, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_196 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1927 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_196 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1928 = eq(btb_wr_addr, UInt<8>("h0c5")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1929 = and(_T_1928, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1930 = bits(_T_1929, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_197 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1930 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_197 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1931 = eq(btb_wr_addr, UInt<8>("h0c6")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1932 = and(_T_1931, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1933 = bits(_T_1932, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_198 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1933 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_198 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1934 = eq(btb_wr_addr, UInt<8>("h0c7")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1935 = and(_T_1934, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1936 = bits(_T_1935, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_199 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1936 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_199 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1937 = eq(btb_wr_addr, UInt<8>("h0c8")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1938 = and(_T_1937, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1939 = bits(_T_1938, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_200 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1939 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_200 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1940 = eq(btb_wr_addr, UInt<8>("h0c9")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1941 = and(_T_1940, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1942 = bits(_T_1941, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_201 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1942 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_201 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1943 = eq(btb_wr_addr, UInt<8>("h0ca")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1944 = and(_T_1943, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1945 = bits(_T_1944, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_202 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1945 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_202 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1946 = eq(btb_wr_addr, UInt<8>("h0cb")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1947 = and(_T_1946, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1948 = bits(_T_1947, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_203 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1948 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_203 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1949 = eq(btb_wr_addr, UInt<8>("h0cc")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1950 = and(_T_1949, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1951 = bits(_T_1950, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_204 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1951 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_204 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1952 = eq(btb_wr_addr, UInt<8>("h0cd")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1953 = and(_T_1952, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1954 = bits(_T_1953, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_205 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1954 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_205 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1955 = eq(btb_wr_addr, UInt<8>("h0ce")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1956 = and(_T_1955, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1957 = bits(_T_1956, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_206 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1957 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_206 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1958 = eq(btb_wr_addr, UInt<8>("h0cf")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1959 = and(_T_1958, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1960 = bits(_T_1959, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_207 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1960 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_207 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1961 = eq(btb_wr_addr, UInt<8>("h0d0")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1962 = and(_T_1961, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1963 = bits(_T_1962, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_208 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1963 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_208 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1964 = eq(btb_wr_addr, UInt<8>("h0d1")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1965 = and(_T_1964, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1966 = bits(_T_1965, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_209 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1966 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_209 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1967 = eq(btb_wr_addr, UInt<8>("h0d2")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1968 = and(_T_1967, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1969 = bits(_T_1968, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_210 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1969 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_210 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1970 = eq(btb_wr_addr, UInt<8>("h0d3")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1971 = and(_T_1970, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1972 = bits(_T_1971, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_211 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1972 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_211 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1973 = eq(btb_wr_addr, UInt<8>("h0d4")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1974 = and(_T_1973, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1975 = bits(_T_1974, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_212 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1975 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_212 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1976 = eq(btb_wr_addr, UInt<8>("h0d5")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1977 = and(_T_1976, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1978 = bits(_T_1977, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_213 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1978 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_213 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1979 = eq(btb_wr_addr, UInt<8>("h0d6")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1980 = and(_T_1979, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1981 = bits(_T_1980, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_214 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1981 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_214 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1982 = eq(btb_wr_addr, UInt<8>("h0d7")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1983 = and(_T_1982, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1984 = bits(_T_1983, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_215 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1984 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_215 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1985 = eq(btb_wr_addr, UInt<8>("h0d8")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1986 = and(_T_1985, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1987 = bits(_T_1986, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_216 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1987 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_216 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1988 = eq(btb_wr_addr, UInt<8>("h0d9")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1989 = and(_T_1988, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1990 = bits(_T_1989, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_217 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1990 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_217 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1991 = eq(btb_wr_addr, UInt<8>("h0da")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1992 = and(_T_1991, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1993 = bits(_T_1992, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_218 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1993 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_218 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1994 = eq(btb_wr_addr, UInt<8>("h0db")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1995 = and(_T_1994, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1996 = bits(_T_1995, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_219 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1996 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_219 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_1997 = eq(btb_wr_addr, UInt<8>("h0dc")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_1998 = and(_T_1997, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_1999 = bits(_T_1998, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_220 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_1999 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_220 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2000 = eq(btb_wr_addr, UInt<8>("h0dd")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2001 = and(_T_2000, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2002 = bits(_T_2001, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_221 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2002 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_221 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2003 = eq(btb_wr_addr, UInt<8>("h0de")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2004 = and(_T_2003, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2005 = bits(_T_2004, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_222 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2005 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_222 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2006 = eq(btb_wr_addr, UInt<8>("h0df")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2007 = and(_T_2006, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2008 = bits(_T_2007, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_223 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2008 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_223 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2009 = eq(btb_wr_addr, UInt<8>("h0e0")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2010 = and(_T_2009, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2011 = bits(_T_2010, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_224 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2011 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_224 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2012 = eq(btb_wr_addr, UInt<8>("h0e1")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2013 = and(_T_2012, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2014 = bits(_T_2013, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_225 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2014 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_225 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2015 = eq(btb_wr_addr, UInt<8>("h0e2")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2016 = and(_T_2015, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2017 = bits(_T_2016, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_226 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2017 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_226 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2018 = eq(btb_wr_addr, UInt<8>("h0e3")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2019 = and(_T_2018, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2020 = bits(_T_2019, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_227 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2020 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_227 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2021 = eq(btb_wr_addr, UInt<8>("h0e4")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2022 = and(_T_2021, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2023 = bits(_T_2022, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_228 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2023 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_228 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2024 = eq(btb_wr_addr, UInt<8>("h0e5")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2025 = and(_T_2024, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2026 = bits(_T_2025, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_229 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2026 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_229 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2027 = eq(btb_wr_addr, UInt<8>("h0e6")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2028 = and(_T_2027, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2029 = bits(_T_2028, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_230 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2029 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_230 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2030 = eq(btb_wr_addr, UInt<8>("h0e7")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2031 = and(_T_2030, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2032 = bits(_T_2031, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_231 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2032 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_231 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2033 = eq(btb_wr_addr, UInt<8>("h0e8")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2034 = and(_T_2033, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2035 = bits(_T_2034, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_232 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2035 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_232 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2036 = eq(btb_wr_addr, UInt<8>("h0e9")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2037 = and(_T_2036, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2038 = bits(_T_2037, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_233 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2038 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_233 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2039 = eq(btb_wr_addr, UInt<8>("h0ea")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2040 = and(_T_2039, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2041 = bits(_T_2040, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_234 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2041 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_234 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2042 = eq(btb_wr_addr, UInt<8>("h0eb")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2043 = and(_T_2042, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2044 = bits(_T_2043, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_235 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2044 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_235 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2045 = eq(btb_wr_addr, UInt<8>("h0ec")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2046 = and(_T_2045, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2047 = bits(_T_2046, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_236 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2047 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_236 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2048 = eq(btb_wr_addr, UInt<8>("h0ed")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2049 = and(_T_2048, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2050 = bits(_T_2049, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_237 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2050 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_237 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2051 = eq(btb_wr_addr, UInt<8>("h0ee")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2052 = and(_T_2051, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2053 = bits(_T_2052, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_238 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2053 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_238 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2054 = eq(btb_wr_addr, UInt<8>("h0ef")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2055 = and(_T_2054, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2056 = bits(_T_2055, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_239 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2056 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_239 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2057 = eq(btb_wr_addr, UInt<8>("h0f0")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2058 = and(_T_2057, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2059 = bits(_T_2058, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_240 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2059 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_240 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2060 = eq(btb_wr_addr, UInt<8>("h0f1")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2061 = and(_T_2060, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2062 = bits(_T_2061, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_241 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2062 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_241 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2063 = eq(btb_wr_addr, UInt<8>("h0f2")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2064 = and(_T_2063, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2065 = bits(_T_2064, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_242 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2065 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_242 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2066 = eq(btb_wr_addr, UInt<8>("h0f3")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2067 = and(_T_2066, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2068 = bits(_T_2067, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_243 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2068 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_243 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2069 = eq(btb_wr_addr, UInt<8>("h0f4")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2070 = and(_T_2069, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2071 = bits(_T_2070, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_244 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2071 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_244 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2072 = eq(btb_wr_addr, UInt<8>("h0f5")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2073 = and(_T_2072, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2074 = bits(_T_2073, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_245 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2074 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_245 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2075 = eq(btb_wr_addr, UInt<8>("h0f6")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2076 = and(_T_2075, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2077 = bits(_T_2076, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_246 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2077 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_246 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2078 = eq(btb_wr_addr, UInt<8>("h0f7")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2079 = and(_T_2078, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2080 = bits(_T_2079, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_247 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2080 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_247 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2081 = eq(btb_wr_addr, UInt<8>("h0f8")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2082 = and(_T_2081, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2083 = bits(_T_2082, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_248 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2083 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_248 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2084 = eq(btb_wr_addr, UInt<8>("h0f9")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2085 = and(_T_2084, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2086 = bits(_T_2085, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_249 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2086 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_249 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2087 = eq(btb_wr_addr, UInt<8>("h0fa")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2088 = and(_T_2087, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2089 = bits(_T_2088, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_250 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2089 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_250 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2090 = eq(btb_wr_addr, UInt<8>("h0fb")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2091 = and(_T_2090, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2092 = bits(_T_2091, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_251 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2092 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_251 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2093 = eq(btb_wr_addr, UInt<8>("h0fc")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2094 = and(_T_2093, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2095 = bits(_T_2094, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_252 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2095 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_252 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2096 = eq(btb_wr_addr, UInt<8>("h0fd")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2097 = and(_T_2096, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2098 = bits(_T_2097, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_253 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2098 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_253 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2099 = eq(btb_wr_addr, UInt<8>("h0fe")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2100 = and(_T_2099, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2101 = bits(_T_2100, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_254 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2101 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_254 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2102 = eq(btb_wr_addr, UInt<8>("h0ff")) @[el2_ifu_bp_ctl.scala 361:101]
|
|
node _T_2103 = and(_T_2102, btb_wr_en_way1) @[el2_ifu_bp_ctl.scala 361:109]
|
|
node _T_2104 = bits(_T_2103, 0, 0) @[el2_ifu_bp_ctl.scala 361:127]
|
|
reg btb_bank0_rd_data_way1_out_255 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when _T_2104 : @[Reg.scala 28:19]
|
|
btb_bank0_rd_data_way1_out_255 <= btb_wr_data @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
node _T_2105 = eq(btb_rd_addr_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2106 = bits(_T_2105, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2107 = eq(btb_rd_addr_f, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2108 = bits(_T_2107, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2109 = eq(btb_rd_addr_f, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2110 = bits(_T_2109, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2111 = eq(btb_rd_addr_f, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2112 = bits(_T_2111, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2113 = eq(btb_rd_addr_f, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2114 = bits(_T_2113, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2115 = eq(btb_rd_addr_f, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2116 = bits(_T_2115, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2117 = eq(btb_rd_addr_f, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2118 = bits(_T_2117, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2119 = eq(btb_rd_addr_f, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2120 = bits(_T_2119, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2121 = eq(btb_rd_addr_f, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2122 = bits(_T_2121, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2123 = eq(btb_rd_addr_f, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2124 = bits(_T_2123, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2125 = eq(btb_rd_addr_f, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2126 = bits(_T_2125, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2127 = eq(btb_rd_addr_f, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2128 = bits(_T_2127, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2129 = eq(btb_rd_addr_f, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2130 = bits(_T_2129, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2131 = eq(btb_rd_addr_f, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2132 = bits(_T_2131, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2133 = eq(btb_rd_addr_f, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2134 = bits(_T_2133, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2135 = eq(btb_rd_addr_f, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2136 = bits(_T_2135, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2137 = eq(btb_rd_addr_f, UInt<5>("h010")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2138 = bits(_T_2137, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2139 = eq(btb_rd_addr_f, UInt<5>("h011")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2140 = bits(_T_2139, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2141 = eq(btb_rd_addr_f, UInt<5>("h012")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2142 = bits(_T_2141, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2143 = eq(btb_rd_addr_f, UInt<5>("h013")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2144 = bits(_T_2143, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2145 = eq(btb_rd_addr_f, UInt<5>("h014")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2146 = bits(_T_2145, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2147 = eq(btb_rd_addr_f, UInt<5>("h015")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2148 = bits(_T_2147, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2149 = eq(btb_rd_addr_f, UInt<5>("h016")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2150 = bits(_T_2149, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2151 = eq(btb_rd_addr_f, UInt<5>("h017")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2152 = bits(_T_2151, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2153 = eq(btb_rd_addr_f, UInt<5>("h018")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2154 = bits(_T_2153, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2155 = eq(btb_rd_addr_f, UInt<5>("h019")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2156 = bits(_T_2155, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2157 = eq(btb_rd_addr_f, UInt<5>("h01a")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2158 = bits(_T_2157, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2159 = eq(btb_rd_addr_f, UInt<5>("h01b")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2160 = bits(_T_2159, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2161 = eq(btb_rd_addr_f, UInt<5>("h01c")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2162 = bits(_T_2161, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2163 = eq(btb_rd_addr_f, UInt<5>("h01d")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2164 = bits(_T_2163, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2165 = eq(btb_rd_addr_f, UInt<5>("h01e")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2166 = bits(_T_2165, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2167 = eq(btb_rd_addr_f, UInt<5>("h01f")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2168 = bits(_T_2167, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2169 = eq(btb_rd_addr_f, UInt<6>("h020")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2170 = bits(_T_2169, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2171 = eq(btb_rd_addr_f, UInt<6>("h021")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2172 = bits(_T_2171, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2173 = eq(btb_rd_addr_f, UInt<6>("h022")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2174 = bits(_T_2173, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2175 = eq(btb_rd_addr_f, UInt<6>("h023")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2176 = bits(_T_2175, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2177 = eq(btb_rd_addr_f, UInt<6>("h024")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2178 = bits(_T_2177, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2179 = eq(btb_rd_addr_f, UInt<6>("h025")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2180 = bits(_T_2179, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2181 = eq(btb_rd_addr_f, UInt<6>("h026")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2182 = bits(_T_2181, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2183 = eq(btb_rd_addr_f, UInt<6>("h027")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2184 = bits(_T_2183, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2185 = eq(btb_rd_addr_f, UInt<6>("h028")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2186 = bits(_T_2185, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2187 = eq(btb_rd_addr_f, UInt<6>("h029")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2188 = bits(_T_2187, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2189 = eq(btb_rd_addr_f, UInt<6>("h02a")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2190 = bits(_T_2189, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2191 = eq(btb_rd_addr_f, UInt<6>("h02b")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2192 = bits(_T_2191, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2193 = eq(btb_rd_addr_f, UInt<6>("h02c")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2194 = bits(_T_2193, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2195 = eq(btb_rd_addr_f, UInt<6>("h02d")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2196 = bits(_T_2195, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2197 = eq(btb_rd_addr_f, UInt<6>("h02e")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2198 = bits(_T_2197, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2199 = eq(btb_rd_addr_f, UInt<6>("h02f")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2200 = bits(_T_2199, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2201 = eq(btb_rd_addr_f, UInt<6>("h030")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2202 = bits(_T_2201, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2203 = eq(btb_rd_addr_f, UInt<6>("h031")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2204 = bits(_T_2203, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2205 = eq(btb_rd_addr_f, UInt<6>("h032")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2206 = bits(_T_2205, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2207 = eq(btb_rd_addr_f, UInt<6>("h033")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2208 = bits(_T_2207, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2209 = eq(btb_rd_addr_f, UInt<6>("h034")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2210 = bits(_T_2209, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2211 = eq(btb_rd_addr_f, UInt<6>("h035")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2212 = bits(_T_2211, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2213 = eq(btb_rd_addr_f, UInt<6>("h036")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2214 = bits(_T_2213, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2215 = eq(btb_rd_addr_f, UInt<6>("h037")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2216 = bits(_T_2215, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2217 = eq(btb_rd_addr_f, UInt<6>("h038")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2218 = bits(_T_2217, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2219 = eq(btb_rd_addr_f, UInt<6>("h039")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2220 = bits(_T_2219, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2221 = eq(btb_rd_addr_f, UInt<6>("h03a")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2222 = bits(_T_2221, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2223 = eq(btb_rd_addr_f, UInt<6>("h03b")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2224 = bits(_T_2223, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2225 = eq(btb_rd_addr_f, UInt<6>("h03c")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2226 = bits(_T_2225, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2227 = eq(btb_rd_addr_f, UInt<6>("h03d")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2228 = bits(_T_2227, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2229 = eq(btb_rd_addr_f, UInt<6>("h03e")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2230 = bits(_T_2229, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2231 = eq(btb_rd_addr_f, UInt<6>("h03f")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2232 = bits(_T_2231, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2233 = eq(btb_rd_addr_f, UInt<7>("h040")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2234 = bits(_T_2233, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2235 = eq(btb_rd_addr_f, UInt<7>("h041")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2236 = bits(_T_2235, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2237 = eq(btb_rd_addr_f, UInt<7>("h042")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2238 = bits(_T_2237, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2239 = eq(btb_rd_addr_f, UInt<7>("h043")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2240 = bits(_T_2239, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2241 = eq(btb_rd_addr_f, UInt<7>("h044")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2242 = bits(_T_2241, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2243 = eq(btb_rd_addr_f, UInt<7>("h045")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2244 = bits(_T_2243, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2245 = eq(btb_rd_addr_f, UInt<7>("h046")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2246 = bits(_T_2245, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2247 = eq(btb_rd_addr_f, UInt<7>("h047")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2248 = bits(_T_2247, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2249 = eq(btb_rd_addr_f, UInt<7>("h048")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2250 = bits(_T_2249, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2251 = eq(btb_rd_addr_f, UInt<7>("h049")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2252 = bits(_T_2251, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2253 = eq(btb_rd_addr_f, UInt<7>("h04a")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2254 = bits(_T_2253, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2255 = eq(btb_rd_addr_f, UInt<7>("h04b")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2256 = bits(_T_2255, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2257 = eq(btb_rd_addr_f, UInt<7>("h04c")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2258 = bits(_T_2257, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2259 = eq(btb_rd_addr_f, UInt<7>("h04d")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2260 = bits(_T_2259, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2261 = eq(btb_rd_addr_f, UInt<7>("h04e")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2262 = bits(_T_2261, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2263 = eq(btb_rd_addr_f, UInt<7>("h04f")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2264 = bits(_T_2263, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2265 = eq(btb_rd_addr_f, UInt<7>("h050")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2266 = bits(_T_2265, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2267 = eq(btb_rd_addr_f, UInt<7>("h051")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2268 = bits(_T_2267, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2269 = eq(btb_rd_addr_f, UInt<7>("h052")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2270 = bits(_T_2269, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2271 = eq(btb_rd_addr_f, UInt<7>("h053")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2272 = bits(_T_2271, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2273 = eq(btb_rd_addr_f, UInt<7>("h054")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2274 = bits(_T_2273, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2275 = eq(btb_rd_addr_f, UInt<7>("h055")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2276 = bits(_T_2275, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2277 = eq(btb_rd_addr_f, UInt<7>("h056")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2278 = bits(_T_2277, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2279 = eq(btb_rd_addr_f, UInt<7>("h057")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2280 = bits(_T_2279, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2281 = eq(btb_rd_addr_f, UInt<7>("h058")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2282 = bits(_T_2281, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2283 = eq(btb_rd_addr_f, UInt<7>("h059")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2284 = bits(_T_2283, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2285 = eq(btb_rd_addr_f, UInt<7>("h05a")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2286 = bits(_T_2285, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2287 = eq(btb_rd_addr_f, UInt<7>("h05b")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2288 = bits(_T_2287, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2289 = eq(btb_rd_addr_f, UInt<7>("h05c")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2290 = bits(_T_2289, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2291 = eq(btb_rd_addr_f, UInt<7>("h05d")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2292 = bits(_T_2291, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2293 = eq(btb_rd_addr_f, UInt<7>("h05e")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2294 = bits(_T_2293, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2295 = eq(btb_rd_addr_f, UInt<7>("h05f")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2296 = bits(_T_2295, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2297 = eq(btb_rd_addr_f, UInt<7>("h060")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2298 = bits(_T_2297, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2299 = eq(btb_rd_addr_f, UInt<7>("h061")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2300 = bits(_T_2299, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2301 = eq(btb_rd_addr_f, UInt<7>("h062")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2302 = bits(_T_2301, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2303 = eq(btb_rd_addr_f, UInt<7>("h063")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2304 = bits(_T_2303, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2305 = eq(btb_rd_addr_f, UInt<7>("h064")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2306 = bits(_T_2305, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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|
node _T_2307 = eq(btb_rd_addr_f, UInt<7>("h065")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2308 = bits(_T_2307, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2309 = eq(btb_rd_addr_f, UInt<7>("h066")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2310 = bits(_T_2309, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2311 = eq(btb_rd_addr_f, UInt<7>("h067")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2312 = bits(_T_2311, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2313 = eq(btb_rd_addr_f, UInt<7>("h068")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2314 = bits(_T_2313, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2315 = eq(btb_rd_addr_f, UInt<7>("h069")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2316 = bits(_T_2315, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2317 = eq(btb_rd_addr_f, UInt<7>("h06a")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2318 = bits(_T_2317, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2319 = eq(btb_rd_addr_f, UInt<7>("h06b")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2320 = bits(_T_2319, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2321 = eq(btb_rd_addr_f, UInt<7>("h06c")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2322 = bits(_T_2321, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2323 = eq(btb_rd_addr_f, UInt<7>("h06d")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2324 = bits(_T_2323, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2325 = eq(btb_rd_addr_f, UInt<7>("h06e")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2326 = bits(_T_2325, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2327 = eq(btb_rd_addr_f, UInt<7>("h06f")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2328 = bits(_T_2327, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
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node _T_2329 = eq(btb_rd_addr_f, UInt<7>("h070")) @[el2_ifu_bp_ctl.scala 363:77]
|
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node _T_2330 = bits(_T_2329, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2331 = eq(btb_rd_addr_f, UInt<7>("h071")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2332 = bits(_T_2331, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
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node _T_2333 = eq(btb_rd_addr_f, UInt<7>("h072")) @[el2_ifu_bp_ctl.scala 363:77]
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node _T_2334 = bits(_T_2333, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2335 = eq(btb_rd_addr_f, UInt<7>("h073")) @[el2_ifu_bp_ctl.scala 363:77]
|
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node _T_2336 = bits(_T_2335, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2337 = eq(btb_rd_addr_f, UInt<7>("h074")) @[el2_ifu_bp_ctl.scala 363:77]
|
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node _T_2338 = bits(_T_2337, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2339 = eq(btb_rd_addr_f, UInt<7>("h075")) @[el2_ifu_bp_ctl.scala 363:77]
|
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node _T_2340 = bits(_T_2339, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2341 = eq(btb_rd_addr_f, UInt<7>("h076")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2342 = bits(_T_2341, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2343 = eq(btb_rd_addr_f, UInt<7>("h077")) @[el2_ifu_bp_ctl.scala 363:77]
|
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node _T_2344 = bits(_T_2343, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2345 = eq(btb_rd_addr_f, UInt<7>("h078")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2346 = bits(_T_2345, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2347 = eq(btb_rd_addr_f, UInt<7>("h079")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2348 = bits(_T_2347, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2349 = eq(btb_rd_addr_f, UInt<7>("h07a")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2350 = bits(_T_2349, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2351 = eq(btb_rd_addr_f, UInt<7>("h07b")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2352 = bits(_T_2351, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2353 = eq(btb_rd_addr_f, UInt<7>("h07c")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2354 = bits(_T_2353, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2355 = eq(btb_rd_addr_f, UInt<7>("h07d")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2356 = bits(_T_2355, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2357 = eq(btb_rd_addr_f, UInt<7>("h07e")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2358 = bits(_T_2357, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2359 = eq(btb_rd_addr_f, UInt<7>("h07f")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2360 = bits(_T_2359, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2361 = eq(btb_rd_addr_f, UInt<8>("h080")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2362 = bits(_T_2361, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2363 = eq(btb_rd_addr_f, UInt<8>("h081")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2364 = bits(_T_2363, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2365 = eq(btb_rd_addr_f, UInt<8>("h082")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2366 = bits(_T_2365, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2367 = eq(btb_rd_addr_f, UInt<8>("h083")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2368 = bits(_T_2367, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2369 = eq(btb_rd_addr_f, UInt<8>("h084")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2370 = bits(_T_2369, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2371 = eq(btb_rd_addr_f, UInt<8>("h085")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2372 = bits(_T_2371, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2373 = eq(btb_rd_addr_f, UInt<8>("h086")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2374 = bits(_T_2373, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2375 = eq(btb_rd_addr_f, UInt<8>("h087")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2376 = bits(_T_2375, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2377 = eq(btb_rd_addr_f, UInt<8>("h088")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2378 = bits(_T_2377, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2379 = eq(btb_rd_addr_f, UInt<8>("h089")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2380 = bits(_T_2379, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2381 = eq(btb_rd_addr_f, UInt<8>("h08a")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2382 = bits(_T_2381, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2383 = eq(btb_rd_addr_f, UInt<8>("h08b")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2384 = bits(_T_2383, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2385 = eq(btb_rd_addr_f, UInt<8>("h08c")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2386 = bits(_T_2385, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2387 = eq(btb_rd_addr_f, UInt<8>("h08d")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2388 = bits(_T_2387, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2389 = eq(btb_rd_addr_f, UInt<8>("h08e")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2390 = bits(_T_2389, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2391 = eq(btb_rd_addr_f, UInt<8>("h08f")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2392 = bits(_T_2391, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2393 = eq(btb_rd_addr_f, UInt<8>("h090")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2394 = bits(_T_2393, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2395 = eq(btb_rd_addr_f, UInt<8>("h091")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2396 = bits(_T_2395, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2397 = eq(btb_rd_addr_f, UInt<8>("h092")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2398 = bits(_T_2397, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2399 = eq(btb_rd_addr_f, UInt<8>("h093")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2400 = bits(_T_2399, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2401 = eq(btb_rd_addr_f, UInt<8>("h094")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2402 = bits(_T_2401, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2403 = eq(btb_rd_addr_f, UInt<8>("h095")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2404 = bits(_T_2403, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2405 = eq(btb_rd_addr_f, UInt<8>("h096")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2406 = bits(_T_2405, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2407 = eq(btb_rd_addr_f, UInt<8>("h097")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2408 = bits(_T_2407, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2409 = eq(btb_rd_addr_f, UInt<8>("h098")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2410 = bits(_T_2409, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2411 = eq(btb_rd_addr_f, UInt<8>("h099")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2412 = bits(_T_2411, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2413 = eq(btb_rd_addr_f, UInt<8>("h09a")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2414 = bits(_T_2413, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2415 = eq(btb_rd_addr_f, UInt<8>("h09b")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2416 = bits(_T_2415, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2417 = eq(btb_rd_addr_f, UInt<8>("h09c")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2418 = bits(_T_2417, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2419 = eq(btb_rd_addr_f, UInt<8>("h09d")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2420 = bits(_T_2419, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2421 = eq(btb_rd_addr_f, UInt<8>("h09e")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2422 = bits(_T_2421, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2423 = eq(btb_rd_addr_f, UInt<8>("h09f")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2424 = bits(_T_2423, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2425 = eq(btb_rd_addr_f, UInt<8>("h0a0")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2426 = bits(_T_2425, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2427 = eq(btb_rd_addr_f, UInt<8>("h0a1")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2428 = bits(_T_2427, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2429 = eq(btb_rd_addr_f, UInt<8>("h0a2")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2430 = bits(_T_2429, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2431 = eq(btb_rd_addr_f, UInt<8>("h0a3")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2432 = bits(_T_2431, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2433 = eq(btb_rd_addr_f, UInt<8>("h0a4")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2434 = bits(_T_2433, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2435 = eq(btb_rd_addr_f, UInt<8>("h0a5")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2436 = bits(_T_2435, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2437 = eq(btb_rd_addr_f, UInt<8>("h0a6")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2438 = bits(_T_2437, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2439 = eq(btb_rd_addr_f, UInt<8>("h0a7")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2440 = bits(_T_2439, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2441 = eq(btb_rd_addr_f, UInt<8>("h0a8")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2442 = bits(_T_2441, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2443 = eq(btb_rd_addr_f, UInt<8>("h0a9")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2444 = bits(_T_2443, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2445 = eq(btb_rd_addr_f, UInt<8>("h0aa")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2446 = bits(_T_2445, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2447 = eq(btb_rd_addr_f, UInt<8>("h0ab")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2448 = bits(_T_2447, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2449 = eq(btb_rd_addr_f, UInt<8>("h0ac")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2450 = bits(_T_2449, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2451 = eq(btb_rd_addr_f, UInt<8>("h0ad")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2452 = bits(_T_2451, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2453 = eq(btb_rd_addr_f, UInt<8>("h0ae")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2454 = bits(_T_2453, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2455 = eq(btb_rd_addr_f, UInt<8>("h0af")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2456 = bits(_T_2455, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2457 = eq(btb_rd_addr_f, UInt<8>("h0b0")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2458 = bits(_T_2457, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2459 = eq(btb_rd_addr_f, UInt<8>("h0b1")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2460 = bits(_T_2459, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2461 = eq(btb_rd_addr_f, UInt<8>("h0b2")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2462 = bits(_T_2461, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2463 = eq(btb_rd_addr_f, UInt<8>("h0b3")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2464 = bits(_T_2463, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2465 = eq(btb_rd_addr_f, UInt<8>("h0b4")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2466 = bits(_T_2465, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2467 = eq(btb_rd_addr_f, UInt<8>("h0b5")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2468 = bits(_T_2467, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2469 = eq(btb_rd_addr_f, UInt<8>("h0b6")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2470 = bits(_T_2469, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2471 = eq(btb_rd_addr_f, UInt<8>("h0b7")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2472 = bits(_T_2471, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2473 = eq(btb_rd_addr_f, UInt<8>("h0b8")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2474 = bits(_T_2473, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2475 = eq(btb_rd_addr_f, UInt<8>("h0b9")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2476 = bits(_T_2475, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2477 = eq(btb_rd_addr_f, UInt<8>("h0ba")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2478 = bits(_T_2477, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2479 = eq(btb_rd_addr_f, UInt<8>("h0bb")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2480 = bits(_T_2479, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2481 = eq(btb_rd_addr_f, UInt<8>("h0bc")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2482 = bits(_T_2481, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2483 = eq(btb_rd_addr_f, UInt<8>("h0bd")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2484 = bits(_T_2483, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2485 = eq(btb_rd_addr_f, UInt<8>("h0be")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2486 = bits(_T_2485, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2487 = eq(btb_rd_addr_f, UInt<8>("h0bf")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2488 = bits(_T_2487, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2489 = eq(btb_rd_addr_f, UInt<8>("h0c0")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2490 = bits(_T_2489, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2491 = eq(btb_rd_addr_f, UInt<8>("h0c1")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2492 = bits(_T_2491, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2493 = eq(btb_rd_addr_f, UInt<8>("h0c2")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2494 = bits(_T_2493, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2495 = eq(btb_rd_addr_f, UInt<8>("h0c3")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2496 = bits(_T_2495, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2497 = eq(btb_rd_addr_f, UInt<8>("h0c4")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2498 = bits(_T_2497, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2499 = eq(btb_rd_addr_f, UInt<8>("h0c5")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2500 = bits(_T_2499, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2501 = eq(btb_rd_addr_f, UInt<8>("h0c6")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2502 = bits(_T_2501, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2503 = eq(btb_rd_addr_f, UInt<8>("h0c7")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2504 = bits(_T_2503, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2505 = eq(btb_rd_addr_f, UInt<8>("h0c8")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2506 = bits(_T_2505, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2507 = eq(btb_rd_addr_f, UInt<8>("h0c9")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2508 = bits(_T_2507, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2509 = eq(btb_rd_addr_f, UInt<8>("h0ca")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2510 = bits(_T_2509, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2511 = eq(btb_rd_addr_f, UInt<8>("h0cb")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2512 = bits(_T_2511, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2513 = eq(btb_rd_addr_f, UInt<8>("h0cc")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2514 = bits(_T_2513, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2515 = eq(btb_rd_addr_f, UInt<8>("h0cd")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2516 = bits(_T_2515, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2517 = eq(btb_rd_addr_f, UInt<8>("h0ce")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2518 = bits(_T_2517, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2519 = eq(btb_rd_addr_f, UInt<8>("h0cf")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2520 = bits(_T_2519, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2521 = eq(btb_rd_addr_f, UInt<8>("h0d0")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2522 = bits(_T_2521, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2523 = eq(btb_rd_addr_f, UInt<8>("h0d1")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2524 = bits(_T_2523, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2525 = eq(btb_rd_addr_f, UInt<8>("h0d2")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2526 = bits(_T_2525, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2527 = eq(btb_rd_addr_f, UInt<8>("h0d3")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2528 = bits(_T_2527, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2529 = eq(btb_rd_addr_f, UInt<8>("h0d4")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2530 = bits(_T_2529, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2531 = eq(btb_rd_addr_f, UInt<8>("h0d5")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2532 = bits(_T_2531, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2533 = eq(btb_rd_addr_f, UInt<8>("h0d6")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2534 = bits(_T_2533, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2535 = eq(btb_rd_addr_f, UInt<8>("h0d7")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2536 = bits(_T_2535, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2537 = eq(btb_rd_addr_f, UInt<8>("h0d8")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2538 = bits(_T_2537, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2539 = eq(btb_rd_addr_f, UInt<8>("h0d9")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2540 = bits(_T_2539, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2541 = eq(btb_rd_addr_f, UInt<8>("h0da")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2542 = bits(_T_2541, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2543 = eq(btb_rd_addr_f, UInt<8>("h0db")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2544 = bits(_T_2543, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2545 = eq(btb_rd_addr_f, UInt<8>("h0dc")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2546 = bits(_T_2545, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2547 = eq(btb_rd_addr_f, UInt<8>("h0dd")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2548 = bits(_T_2547, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2549 = eq(btb_rd_addr_f, UInt<8>("h0de")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2550 = bits(_T_2549, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2551 = eq(btb_rd_addr_f, UInt<8>("h0df")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2552 = bits(_T_2551, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2553 = eq(btb_rd_addr_f, UInt<8>("h0e0")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2554 = bits(_T_2553, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2555 = eq(btb_rd_addr_f, UInt<8>("h0e1")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2556 = bits(_T_2555, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2557 = eq(btb_rd_addr_f, UInt<8>("h0e2")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2558 = bits(_T_2557, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2559 = eq(btb_rd_addr_f, UInt<8>("h0e3")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2560 = bits(_T_2559, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2561 = eq(btb_rd_addr_f, UInt<8>("h0e4")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2562 = bits(_T_2561, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2563 = eq(btb_rd_addr_f, UInt<8>("h0e5")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2564 = bits(_T_2563, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2565 = eq(btb_rd_addr_f, UInt<8>("h0e6")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2566 = bits(_T_2565, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2567 = eq(btb_rd_addr_f, UInt<8>("h0e7")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2568 = bits(_T_2567, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2569 = eq(btb_rd_addr_f, UInt<8>("h0e8")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2570 = bits(_T_2569, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2571 = eq(btb_rd_addr_f, UInt<8>("h0e9")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2572 = bits(_T_2571, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2573 = eq(btb_rd_addr_f, UInt<8>("h0ea")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2574 = bits(_T_2573, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2575 = eq(btb_rd_addr_f, UInt<8>("h0eb")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2576 = bits(_T_2575, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2577 = eq(btb_rd_addr_f, UInt<8>("h0ec")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2578 = bits(_T_2577, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2579 = eq(btb_rd_addr_f, UInt<8>("h0ed")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2580 = bits(_T_2579, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2581 = eq(btb_rd_addr_f, UInt<8>("h0ee")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2582 = bits(_T_2581, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2583 = eq(btb_rd_addr_f, UInt<8>("h0ef")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2584 = bits(_T_2583, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2585 = eq(btb_rd_addr_f, UInt<8>("h0f0")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2586 = bits(_T_2585, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2587 = eq(btb_rd_addr_f, UInt<8>("h0f1")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2588 = bits(_T_2587, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2589 = eq(btb_rd_addr_f, UInt<8>("h0f2")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2590 = bits(_T_2589, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2591 = eq(btb_rd_addr_f, UInt<8>("h0f3")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2592 = bits(_T_2591, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2593 = eq(btb_rd_addr_f, UInt<8>("h0f4")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2594 = bits(_T_2593, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2595 = eq(btb_rd_addr_f, UInt<8>("h0f5")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2596 = bits(_T_2595, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2597 = eq(btb_rd_addr_f, UInt<8>("h0f6")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2598 = bits(_T_2597, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2599 = eq(btb_rd_addr_f, UInt<8>("h0f7")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2600 = bits(_T_2599, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2601 = eq(btb_rd_addr_f, UInt<8>("h0f8")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2602 = bits(_T_2601, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2603 = eq(btb_rd_addr_f, UInt<8>("h0f9")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2604 = bits(_T_2603, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2605 = eq(btb_rd_addr_f, UInt<8>("h0fa")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2606 = bits(_T_2605, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2607 = eq(btb_rd_addr_f, UInt<8>("h0fb")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2608 = bits(_T_2607, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2609 = eq(btb_rd_addr_f, UInt<8>("h0fc")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2610 = bits(_T_2609, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2611 = eq(btb_rd_addr_f, UInt<8>("h0fd")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2612 = bits(_T_2611, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2613 = eq(btb_rd_addr_f, UInt<8>("h0fe")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2614 = bits(_T_2613, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2615 = eq(btb_rd_addr_f, UInt<8>("h0ff")) @[el2_ifu_bp_ctl.scala 363:77]
|
|
node _T_2616 = bits(_T_2615, 0, 0) @[el2_ifu_bp_ctl.scala 363:85]
|
|
node _T_2617 = mux(_T_2106, btb_bank0_rd_data_way0_out_0, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2618 = mux(_T_2108, btb_bank0_rd_data_way0_out_1, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2619 = mux(_T_2110, btb_bank0_rd_data_way0_out_2, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2620 = mux(_T_2112, btb_bank0_rd_data_way0_out_3, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2621 = mux(_T_2114, btb_bank0_rd_data_way0_out_4, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2622 = mux(_T_2116, btb_bank0_rd_data_way0_out_5, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2623 = mux(_T_2118, btb_bank0_rd_data_way0_out_6, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2624 = mux(_T_2120, btb_bank0_rd_data_way0_out_7, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2625 = mux(_T_2122, btb_bank0_rd_data_way0_out_8, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2626 = mux(_T_2124, btb_bank0_rd_data_way0_out_9, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2627 = mux(_T_2126, btb_bank0_rd_data_way0_out_10, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2628 = mux(_T_2128, btb_bank0_rd_data_way0_out_11, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2629 = mux(_T_2130, btb_bank0_rd_data_way0_out_12, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2630 = mux(_T_2132, btb_bank0_rd_data_way0_out_13, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2631 = mux(_T_2134, btb_bank0_rd_data_way0_out_14, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2632 = mux(_T_2136, btb_bank0_rd_data_way0_out_15, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2633 = mux(_T_2138, btb_bank0_rd_data_way0_out_16, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2634 = mux(_T_2140, btb_bank0_rd_data_way0_out_17, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2635 = mux(_T_2142, btb_bank0_rd_data_way0_out_18, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2636 = mux(_T_2144, btb_bank0_rd_data_way0_out_19, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2637 = mux(_T_2146, btb_bank0_rd_data_way0_out_20, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2638 = mux(_T_2148, btb_bank0_rd_data_way0_out_21, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2639 = mux(_T_2150, btb_bank0_rd_data_way0_out_22, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2640 = mux(_T_2152, btb_bank0_rd_data_way0_out_23, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2641 = mux(_T_2154, btb_bank0_rd_data_way0_out_24, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2642 = mux(_T_2156, btb_bank0_rd_data_way0_out_25, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2643 = mux(_T_2158, btb_bank0_rd_data_way0_out_26, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2644 = mux(_T_2160, btb_bank0_rd_data_way0_out_27, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2645 = mux(_T_2162, btb_bank0_rd_data_way0_out_28, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2646 = mux(_T_2164, btb_bank0_rd_data_way0_out_29, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2647 = mux(_T_2166, btb_bank0_rd_data_way0_out_30, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2648 = mux(_T_2168, btb_bank0_rd_data_way0_out_31, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2649 = mux(_T_2170, btb_bank0_rd_data_way0_out_32, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2650 = mux(_T_2172, btb_bank0_rd_data_way0_out_33, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2651 = mux(_T_2174, btb_bank0_rd_data_way0_out_34, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2652 = mux(_T_2176, btb_bank0_rd_data_way0_out_35, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2653 = mux(_T_2178, btb_bank0_rd_data_way0_out_36, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2654 = mux(_T_2180, btb_bank0_rd_data_way0_out_37, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2655 = mux(_T_2182, btb_bank0_rd_data_way0_out_38, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2656 = mux(_T_2184, btb_bank0_rd_data_way0_out_39, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2657 = mux(_T_2186, btb_bank0_rd_data_way0_out_40, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2658 = mux(_T_2188, btb_bank0_rd_data_way0_out_41, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2659 = mux(_T_2190, btb_bank0_rd_data_way0_out_42, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2660 = mux(_T_2192, btb_bank0_rd_data_way0_out_43, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2661 = mux(_T_2194, btb_bank0_rd_data_way0_out_44, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2662 = mux(_T_2196, btb_bank0_rd_data_way0_out_45, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2663 = mux(_T_2198, btb_bank0_rd_data_way0_out_46, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2664 = mux(_T_2200, btb_bank0_rd_data_way0_out_47, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2665 = mux(_T_2202, btb_bank0_rd_data_way0_out_48, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2666 = mux(_T_2204, btb_bank0_rd_data_way0_out_49, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2667 = mux(_T_2206, btb_bank0_rd_data_way0_out_50, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2668 = mux(_T_2208, btb_bank0_rd_data_way0_out_51, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2669 = mux(_T_2210, btb_bank0_rd_data_way0_out_52, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2670 = mux(_T_2212, btb_bank0_rd_data_way0_out_53, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2671 = mux(_T_2214, btb_bank0_rd_data_way0_out_54, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2672 = mux(_T_2216, btb_bank0_rd_data_way0_out_55, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2673 = mux(_T_2218, btb_bank0_rd_data_way0_out_56, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2674 = mux(_T_2220, btb_bank0_rd_data_way0_out_57, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2675 = mux(_T_2222, btb_bank0_rd_data_way0_out_58, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2676 = mux(_T_2224, btb_bank0_rd_data_way0_out_59, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2677 = mux(_T_2226, btb_bank0_rd_data_way0_out_60, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2678 = mux(_T_2228, btb_bank0_rd_data_way0_out_61, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2679 = mux(_T_2230, btb_bank0_rd_data_way0_out_62, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2680 = mux(_T_2232, btb_bank0_rd_data_way0_out_63, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2681 = mux(_T_2234, btb_bank0_rd_data_way0_out_64, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2682 = mux(_T_2236, btb_bank0_rd_data_way0_out_65, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2683 = mux(_T_2238, btb_bank0_rd_data_way0_out_66, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2684 = mux(_T_2240, btb_bank0_rd_data_way0_out_67, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2685 = mux(_T_2242, btb_bank0_rd_data_way0_out_68, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2686 = mux(_T_2244, btb_bank0_rd_data_way0_out_69, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2687 = mux(_T_2246, btb_bank0_rd_data_way0_out_70, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2688 = mux(_T_2248, btb_bank0_rd_data_way0_out_71, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2689 = mux(_T_2250, btb_bank0_rd_data_way0_out_72, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2690 = mux(_T_2252, btb_bank0_rd_data_way0_out_73, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2691 = mux(_T_2254, btb_bank0_rd_data_way0_out_74, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2692 = mux(_T_2256, btb_bank0_rd_data_way0_out_75, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2693 = mux(_T_2258, btb_bank0_rd_data_way0_out_76, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2694 = mux(_T_2260, btb_bank0_rd_data_way0_out_77, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2695 = mux(_T_2262, btb_bank0_rd_data_way0_out_78, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2696 = mux(_T_2264, btb_bank0_rd_data_way0_out_79, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2697 = mux(_T_2266, btb_bank0_rd_data_way0_out_80, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2698 = mux(_T_2268, btb_bank0_rd_data_way0_out_81, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2699 = mux(_T_2270, btb_bank0_rd_data_way0_out_82, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2700 = mux(_T_2272, btb_bank0_rd_data_way0_out_83, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2701 = mux(_T_2274, btb_bank0_rd_data_way0_out_84, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2702 = mux(_T_2276, btb_bank0_rd_data_way0_out_85, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2703 = mux(_T_2278, btb_bank0_rd_data_way0_out_86, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2704 = mux(_T_2280, btb_bank0_rd_data_way0_out_87, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2705 = mux(_T_2282, btb_bank0_rd_data_way0_out_88, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2706 = mux(_T_2284, btb_bank0_rd_data_way0_out_89, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2707 = mux(_T_2286, btb_bank0_rd_data_way0_out_90, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2708 = mux(_T_2288, btb_bank0_rd_data_way0_out_91, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2709 = mux(_T_2290, btb_bank0_rd_data_way0_out_92, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2710 = mux(_T_2292, btb_bank0_rd_data_way0_out_93, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2711 = mux(_T_2294, btb_bank0_rd_data_way0_out_94, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2712 = mux(_T_2296, btb_bank0_rd_data_way0_out_95, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2713 = mux(_T_2298, btb_bank0_rd_data_way0_out_96, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2714 = mux(_T_2300, btb_bank0_rd_data_way0_out_97, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2715 = mux(_T_2302, btb_bank0_rd_data_way0_out_98, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2716 = mux(_T_2304, btb_bank0_rd_data_way0_out_99, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2717 = mux(_T_2306, btb_bank0_rd_data_way0_out_100, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2718 = mux(_T_2308, btb_bank0_rd_data_way0_out_101, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2719 = mux(_T_2310, btb_bank0_rd_data_way0_out_102, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2720 = mux(_T_2312, btb_bank0_rd_data_way0_out_103, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2721 = mux(_T_2314, btb_bank0_rd_data_way0_out_104, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2722 = mux(_T_2316, btb_bank0_rd_data_way0_out_105, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2723 = mux(_T_2318, btb_bank0_rd_data_way0_out_106, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2724 = mux(_T_2320, btb_bank0_rd_data_way0_out_107, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2725 = mux(_T_2322, btb_bank0_rd_data_way0_out_108, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2726 = mux(_T_2324, btb_bank0_rd_data_way0_out_109, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2727 = mux(_T_2326, btb_bank0_rd_data_way0_out_110, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2728 = mux(_T_2328, btb_bank0_rd_data_way0_out_111, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2729 = mux(_T_2330, btb_bank0_rd_data_way0_out_112, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2730 = mux(_T_2332, btb_bank0_rd_data_way0_out_113, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2731 = mux(_T_2334, btb_bank0_rd_data_way0_out_114, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2732 = mux(_T_2336, btb_bank0_rd_data_way0_out_115, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2733 = mux(_T_2338, btb_bank0_rd_data_way0_out_116, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2734 = mux(_T_2340, btb_bank0_rd_data_way0_out_117, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2735 = mux(_T_2342, btb_bank0_rd_data_way0_out_118, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2736 = mux(_T_2344, btb_bank0_rd_data_way0_out_119, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2737 = mux(_T_2346, btb_bank0_rd_data_way0_out_120, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2738 = mux(_T_2348, btb_bank0_rd_data_way0_out_121, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2739 = mux(_T_2350, btb_bank0_rd_data_way0_out_122, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2740 = mux(_T_2352, btb_bank0_rd_data_way0_out_123, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2741 = mux(_T_2354, btb_bank0_rd_data_way0_out_124, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2742 = mux(_T_2356, btb_bank0_rd_data_way0_out_125, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2743 = mux(_T_2358, btb_bank0_rd_data_way0_out_126, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2744 = mux(_T_2360, btb_bank0_rd_data_way0_out_127, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2745 = mux(_T_2362, btb_bank0_rd_data_way0_out_128, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2746 = mux(_T_2364, btb_bank0_rd_data_way0_out_129, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2747 = mux(_T_2366, btb_bank0_rd_data_way0_out_130, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2748 = mux(_T_2368, btb_bank0_rd_data_way0_out_131, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2749 = mux(_T_2370, btb_bank0_rd_data_way0_out_132, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2750 = mux(_T_2372, btb_bank0_rd_data_way0_out_133, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2751 = mux(_T_2374, btb_bank0_rd_data_way0_out_134, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2752 = mux(_T_2376, btb_bank0_rd_data_way0_out_135, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2753 = mux(_T_2378, btb_bank0_rd_data_way0_out_136, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2754 = mux(_T_2380, btb_bank0_rd_data_way0_out_137, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2755 = mux(_T_2382, btb_bank0_rd_data_way0_out_138, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2756 = mux(_T_2384, btb_bank0_rd_data_way0_out_139, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2757 = mux(_T_2386, btb_bank0_rd_data_way0_out_140, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2758 = mux(_T_2388, btb_bank0_rd_data_way0_out_141, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2759 = mux(_T_2390, btb_bank0_rd_data_way0_out_142, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2760 = mux(_T_2392, btb_bank0_rd_data_way0_out_143, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2761 = mux(_T_2394, btb_bank0_rd_data_way0_out_144, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2762 = mux(_T_2396, btb_bank0_rd_data_way0_out_145, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2763 = mux(_T_2398, btb_bank0_rd_data_way0_out_146, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2764 = mux(_T_2400, btb_bank0_rd_data_way0_out_147, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2765 = mux(_T_2402, btb_bank0_rd_data_way0_out_148, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2766 = mux(_T_2404, btb_bank0_rd_data_way0_out_149, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2767 = mux(_T_2406, btb_bank0_rd_data_way0_out_150, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2768 = mux(_T_2408, btb_bank0_rd_data_way0_out_151, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2769 = mux(_T_2410, btb_bank0_rd_data_way0_out_152, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2770 = mux(_T_2412, btb_bank0_rd_data_way0_out_153, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2771 = mux(_T_2414, btb_bank0_rd_data_way0_out_154, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2772 = mux(_T_2416, btb_bank0_rd_data_way0_out_155, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2773 = mux(_T_2418, btb_bank0_rd_data_way0_out_156, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2774 = mux(_T_2420, btb_bank0_rd_data_way0_out_157, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2775 = mux(_T_2422, btb_bank0_rd_data_way0_out_158, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2776 = mux(_T_2424, btb_bank0_rd_data_way0_out_159, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2777 = mux(_T_2426, btb_bank0_rd_data_way0_out_160, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2778 = mux(_T_2428, btb_bank0_rd_data_way0_out_161, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2779 = mux(_T_2430, btb_bank0_rd_data_way0_out_162, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2780 = mux(_T_2432, btb_bank0_rd_data_way0_out_163, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2781 = mux(_T_2434, btb_bank0_rd_data_way0_out_164, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2782 = mux(_T_2436, btb_bank0_rd_data_way0_out_165, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2783 = mux(_T_2438, btb_bank0_rd_data_way0_out_166, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2784 = mux(_T_2440, btb_bank0_rd_data_way0_out_167, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2785 = mux(_T_2442, btb_bank0_rd_data_way0_out_168, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2786 = mux(_T_2444, btb_bank0_rd_data_way0_out_169, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2787 = mux(_T_2446, btb_bank0_rd_data_way0_out_170, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2788 = mux(_T_2448, btb_bank0_rd_data_way0_out_171, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2789 = mux(_T_2450, btb_bank0_rd_data_way0_out_172, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2790 = mux(_T_2452, btb_bank0_rd_data_way0_out_173, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2791 = mux(_T_2454, btb_bank0_rd_data_way0_out_174, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2792 = mux(_T_2456, btb_bank0_rd_data_way0_out_175, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2793 = mux(_T_2458, btb_bank0_rd_data_way0_out_176, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2794 = mux(_T_2460, btb_bank0_rd_data_way0_out_177, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2795 = mux(_T_2462, btb_bank0_rd_data_way0_out_178, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2796 = mux(_T_2464, btb_bank0_rd_data_way0_out_179, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2797 = mux(_T_2466, btb_bank0_rd_data_way0_out_180, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2798 = mux(_T_2468, btb_bank0_rd_data_way0_out_181, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2799 = mux(_T_2470, btb_bank0_rd_data_way0_out_182, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2800 = mux(_T_2472, btb_bank0_rd_data_way0_out_183, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2801 = mux(_T_2474, btb_bank0_rd_data_way0_out_184, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2802 = mux(_T_2476, btb_bank0_rd_data_way0_out_185, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2803 = mux(_T_2478, btb_bank0_rd_data_way0_out_186, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2804 = mux(_T_2480, btb_bank0_rd_data_way0_out_187, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2805 = mux(_T_2482, btb_bank0_rd_data_way0_out_188, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2806 = mux(_T_2484, btb_bank0_rd_data_way0_out_189, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2807 = mux(_T_2486, btb_bank0_rd_data_way0_out_190, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2808 = mux(_T_2488, btb_bank0_rd_data_way0_out_191, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2809 = mux(_T_2490, btb_bank0_rd_data_way0_out_192, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2810 = mux(_T_2492, btb_bank0_rd_data_way0_out_193, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2811 = mux(_T_2494, btb_bank0_rd_data_way0_out_194, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2812 = mux(_T_2496, btb_bank0_rd_data_way0_out_195, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2813 = mux(_T_2498, btb_bank0_rd_data_way0_out_196, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2814 = mux(_T_2500, btb_bank0_rd_data_way0_out_197, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2815 = mux(_T_2502, btb_bank0_rd_data_way0_out_198, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2816 = mux(_T_2504, btb_bank0_rd_data_way0_out_199, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2817 = mux(_T_2506, btb_bank0_rd_data_way0_out_200, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2818 = mux(_T_2508, btb_bank0_rd_data_way0_out_201, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2819 = mux(_T_2510, btb_bank0_rd_data_way0_out_202, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2820 = mux(_T_2512, btb_bank0_rd_data_way0_out_203, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2821 = mux(_T_2514, btb_bank0_rd_data_way0_out_204, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2822 = mux(_T_2516, btb_bank0_rd_data_way0_out_205, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2823 = mux(_T_2518, btb_bank0_rd_data_way0_out_206, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2824 = mux(_T_2520, btb_bank0_rd_data_way0_out_207, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2825 = mux(_T_2522, btb_bank0_rd_data_way0_out_208, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2826 = mux(_T_2524, btb_bank0_rd_data_way0_out_209, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2827 = mux(_T_2526, btb_bank0_rd_data_way0_out_210, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2828 = mux(_T_2528, btb_bank0_rd_data_way0_out_211, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2829 = mux(_T_2530, btb_bank0_rd_data_way0_out_212, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2830 = mux(_T_2532, btb_bank0_rd_data_way0_out_213, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2831 = mux(_T_2534, btb_bank0_rd_data_way0_out_214, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2832 = mux(_T_2536, btb_bank0_rd_data_way0_out_215, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2833 = mux(_T_2538, btb_bank0_rd_data_way0_out_216, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2834 = mux(_T_2540, btb_bank0_rd_data_way0_out_217, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2835 = mux(_T_2542, btb_bank0_rd_data_way0_out_218, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2836 = mux(_T_2544, btb_bank0_rd_data_way0_out_219, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2837 = mux(_T_2546, btb_bank0_rd_data_way0_out_220, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2838 = mux(_T_2548, btb_bank0_rd_data_way0_out_221, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2839 = mux(_T_2550, btb_bank0_rd_data_way0_out_222, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2840 = mux(_T_2552, btb_bank0_rd_data_way0_out_223, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2841 = mux(_T_2554, btb_bank0_rd_data_way0_out_224, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2842 = mux(_T_2556, btb_bank0_rd_data_way0_out_225, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2843 = mux(_T_2558, btb_bank0_rd_data_way0_out_226, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2844 = mux(_T_2560, btb_bank0_rd_data_way0_out_227, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2845 = mux(_T_2562, btb_bank0_rd_data_way0_out_228, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2846 = mux(_T_2564, btb_bank0_rd_data_way0_out_229, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2847 = mux(_T_2566, btb_bank0_rd_data_way0_out_230, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2848 = mux(_T_2568, btb_bank0_rd_data_way0_out_231, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2849 = mux(_T_2570, btb_bank0_rd_data_way0_out_232, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2850 = mux(_T_2572, btb_bank0_rd_data_way0_out_233, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2851 = mux(_T_2574, btb_bank0_rd_data_way0_out_234, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2852 = mux(_T_2576, btb_bank0_rd_data_way0_out_235, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2853 = mux(_T_2578, btb_bank0_rd_data_way0_out_236, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2854 = mux(_T_2580, btb_bank0_rd_data_way0_out_237, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2855 = mux(_T_2582, btb_bank0_rd_data_way0_out_238, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2856 = mux(_T_2584, btb_bank0_rd_data_way0_out_239, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2857 = mux(_T_2586, btb_bank0_rd_data_way0_out_240, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2858 = mux(_T_2588, btb_bank0_rd_data_way0_out_241, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2859 = mux(_T_2590, btb_bank0_rd_data_way0_out_242, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2860 = mux(_T_2592, btb_bank0_rd_data_way0_out_243, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2861 = mux(_T_2594, btb_bank0_rd_data_way0_out_244, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2862 = mux(_T_2596, btb_bank0_rd_data_way0_out_245, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2863 = mux(_T_2598, btb_bank0_rd_data_way0_out_246, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2864 = mux(_T_2600, btb_bank0_rd_data_way0_out_247, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2865 = mux(_T_2602, btb_bank0_rd_data_way0_out_248, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2866 = mux(_T_2604, btb_bank0_rd_data_way0_out_249, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2867 = mux(_T_2606, btb_bank0_rd_data_way0_out_250, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2868 = mux(_T_2608, btb_bank0_rd_data_way0_out_251, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2869 = mux(_T_2610, btb_bank0_rd_data_way0_out_252, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2870 = mux(_T_2612, btb_bank0_rd_data_way0_out_253, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2871 = mux(_T_2614, btb_bank0_rd_data_way0_out_254, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2872 = mux(_T_2616, btb_bank0_rd_data_way0_out_255, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_2873 = or(_T_2617, _T_2618) @[Mux.scala 27:72]
|
|
node _T_2874 = or(_T_2873, _T_2619) @[Mux.scala 27:72]
|
|
node _T_2875 = or(_T_2874, _T_2620) @[Mux.scala 27:72]
|
|
node _T_2876 = or(_T_2875, _T_2621) @[Mux.scala 27:72]
|
|
node _T_2877 = or(_T_2876, _T_2622) @[Mux.scala 27:72]
|
|
node _T_2878 = or(_T_2877, _T_2623) @[Mux.scala 27:72]
|
|
node _T_2879 = or(_T_2878, _T_2624) @[Mux.scala 27:72]
|
|
node _T_2880 = or(_T_2879, _T_2625) @[Mux.scala 27:72]
|
|
node _T_2881 = or(_T_2880, _T_2626) @[Mux.scala 27:72]
|
|
node _T_2882 = or(_T_2881, _T_2627) @[Mux.scala 27:72]
|
|
node _T_2883 = or(_T_2882, _T_2628) @[Mux.scala 27:72]
|
|
node _T_2884 = or(_T_2883, _T_2629) @[Mux.scala 27:72]
|
|
node _T_2885 = or(_T_2884, _T_2630) @[Mux.scala 27:72]
|
|
node _T_2886 = or(_T_2885, _T_2631) @[Mux.scala 27:72]
|
|
node _T_2887 = or(_T_2886, _T_2632) @[Mux.scala 27:72]
|
|
node _T_2888 = or(_T_2887, _T_2633) @[Mux.scala 27:72]
|
|
node _T_2889 = or(_T_2888, _T_2634) @[Mux.scala 27:72]
|
|
node _T_2890 = or(_T_2889, _T_2635) @[Mux.scala 27:72]
|
|
node _T_2891 = or(_T_2890, _T_2636) @[Mux.scala 27:72]
|
|
node _T_2892 = or(_T_2891, _T_2637) @[Mux.scala 27:72]
|
|
node _T_2893 = or(_T_2892, _T_2638) @[Mux.scala 27:72]
|
|
node _T_2894 = or(_T_2893, _T_2639) @[Mux.scala 27:72]
|
|
node _T_2895 = or(_T_2894, _T_2640) @[Mux.scala 27:72]
|
|
node _T_2896 = or(_T_2895, _T_2641) @[Mux.scala 27:72]
|
|
node _T_2897 = or(_T_2896, _T_2642) @[Mux.scala 27:72]
|
|
node _T_2898 = or(_T_2897, _T_2643) @[Mux.scala 27:72]
|
|
node _T_2899 = or(_T_2898, _T_2644) @[Mux.scala 27:72]
|
|
node _T_2900 = or(_T_2899, _T_2645) @[Mux.scala 27:72]
|
|
node _T_2901 = or(_T_2900, _T_2646) @[Mux.scala 27:72]
|
|
node _T_2902 = or(_T_2901, _T_2647) @[Mux.scala 27:72]
|
|
node _T_2903 = or(_T_2902, _T_2648) @[Mux.scala 27:72]
|
|
node _T_2904 = or(_T_2903, _T_2649) @[Mux.scala 27:72]
|
|
node _T_2905 = or(_T_2904, _T_2650) @[Mux.scala 27:72]
|
|
node _T_2906 = or(_T_2905, _T_2651) @[Mux.scala 27:72]
|
|
node _T_2907 = or(_T_2906, _T_2652) @[Mux.scala 27:72]
|
|
node _T_2908 = or(_T_2907, _T_2653) @[Mux.scala 27:72]
|
|
node _T_2909 = or(_T_2908, _T_2654) @[Mux.scala 27:72]
|
|
node _T_2910 = or(_T_2909, _T_2655) @[Mux.scala 27:72]
|
|
node _T_2911 = or(_T_2910, _T_2656) @[Mux.scala 27:72]
|
|
node _T_2912 = or(_T_2911, _T_2657) @[Mux.scala 27:72]
|
|
node _T_2913 = or(_T_2912, _T_2658) @[Mux.scala 27:72]
|
|
node _T_2914 = or(_T_2913, _T_2659) @[Mux.scala 27:72]
|
|
node _T_2915 = or(_T_2914, _T_2660) @[Mux.scala 27:72]
|
|
node _T_2916 = or(_T_2915, _T_2661) @[Mux.scala 27:72]
|
|
node _T_2917 = or(_T_2916, _T_2662) @[Mux.scala 27:72]
|
|
node _T_2918 = or(_T_2917, _T_2663) @[Mux.scala 27:72]
|
|
node _T_2919 = or(_T_2918, _T_2664) @[Mux.scala 27:72]
|
|
node _T_2920 = or(_T_2919, _T_2665) @[Mux.scala 27:72]
|
|
node _T_2921 = or(_T_2920, _T_2666) @[Mux.scala 27:72]
|
|
node _T_2922 = or(_T_2921, _T_2667) @[Mux.scala 27:72]
|
|
node _T_2923 = or(_T_2922, _T_2668) @[Mux.scala 27:72]
|
|
node _T_2924 = or(_T_2923, _T_2669) @[Mux.scala 27:72]
|
|
node _T_2925 = or(_T_2924, _T_2670) @[Mux.scala 27:72]
|
|
node _T_2926 = or(_T_2925, _T_2671) @[Mux.scala 27:72]
|
|
node _T_2927 = or(_T_2926, _T_2672) @[Mux.scala 27:72]
|
|
node _T_2928 = or(_T_2927, _T_2673) @[Mux.scala 27:72]
|
|
node _T_2929 = or(_T_2928, _T_2674) @[Mux.scala 27:72]
|
|
node _T_2930 = or(_T_2929, _T_2675) @[Mux.scala 27:72]
|
|
node _T_2931 = or(_T_2930, _T_2676) @[Mux.scala 27:72]
|
|
node _T_2932 = or(_T_2931, _T_2677) @[Mux.scala 27:72]
|
|
node _T_2933 = or(_T_2932, _T_2678) @[Mux.scala 27:72]
|
|
node _T_2934 = or(_T_2933, _T_2679) @[Mux.scala 27:72]
|
|
node _T_2935 = or(_T_2934, _T_2680) @[Mux.scala 27:72]
|
|
node _T_2936 = or(_T_2935, _T_2681) @[Mux.scala 27:72]
|
|
node _T_2937 = or(_T_2936, _T_2682) @[Mux.scala 27:72]
|
|
node _T_2938 = or(_T_2937, _T_2683) @[Mux.scala 27:72]
|
|
node _T_2939 = or(_T_2938, _T_2684) @[Mux.scala 27:72]
|
|
node _T_2940 = or(_T_2939, _T_2685) @[Mux.scala 27:72]
|
|
node _T_2941 = or(_T_2940, _T_2686) @[Mux.scala 27:72]
|
|
node _T_2942 = or(_T_2941, _T_2687) @[Mux.scala 27:72]
|
|
node _T_2943 = or(_T_2942, _T_2688) @[Mux.scala 27:72]
|
|
node _T_2944 = or(_T_2943, _T_2689) @[Mux.scala 27:72]
|
|
node _T_2945 = or(_T_2944, _T_2690) @[Mux.scala 27:72]
|
|
node _T_2946 = or(_T_2945, _T_2691) @[Mux.scala 27:72]
|
|
node _T_2947 = or(_T_2946, _T_2692) @[Mux.scala 27:72]
|
|
node _T_2948 = or(_T_2947, _T_2693) @[Mux.scala 27:72]
|
|
node _T_2949 = or(_T_2948, _T_2694) @[Mux.scala 27:72]
|
|
node _T_2950 = or(_T_2949, _T_2695) @[Mux.scala 27:72]
|
|
node _T_2951 = or(_T_2950, _T_2696) @[Mux.scala 27:72]
|
|
node _T_2952 = or(_T_2951, _T_2697) @[Mux.scala 27:72]
|
|
node _T_2953 = or(_T_2952, _T_2698) @[Mux.scala 27:72]
|
|
node _T_2954 = or(_T_2953, _T_2699) @[Mux.scala 27:72]
|
|
node _T_2955 = or(_T_2954, _T_2700) @[Mux.scala 27:72]
|
|
node _T_2956 = or(_T_2955, _T_2701) @[Mux.scala 27:72]
|
|
node _T_2957 = or(_T_2956, _T_2702) @[Mux.scala 27:72]
|
|
node _T_2958 = or(_T_2957, _T_2703) @[Mux.scala 27:72]
|
|
node _T_2959 = or(_T_2958, _T_2704) @[Mux.scala 27:72]
|
|
node _T_2960 = or(_T_2959, _T_2705) @[Mux.scala 27:72]
|
|
node _T_2961 = or(_T_2960, _T_2706) @[Mux.scala 27:72]
|
|
node _T_2962 = or(_T_2961, _T_2707) @[Mux.scala 27:72]
|
|
node _T_2963 = or(_T_2962, _T_2708) @[Mux.scala 27:72]
|
|
node _T_2964 = or(_T_2963, _T_2709) @[Mux.scala 27:72]
|
|
node _T_2965 = or(_T_2964, _T_2710) @[Mux.scala 27:72]
|
|
node _T_2966 = or(_T_2965, _T_2711) @[Mux.scala 27:72]
|
|
node _T_2967 = or(_T_2966, _T_2712) @[Mux.scala 27:72]
|
|
node _T_2968 = or(_T_2967, _T_2713) @[Mux.scala 27:72]
|
|
node _T_2969 = or(_T_2968, _T_2714) @[Mux.scala 27:72]
|
|
node _T_2970 = or(_T_2969, _T_2715) @[Mux.scala 27:72]
|
|
node _T_2971 = or(_T_2970, _T_2716) @[Mux.scala 27:72]
|
|
node _T_2972 = or(_T_2971, _T_2717) @[Mux.scala 27:72]
|
|
node _T_2973 = or(_T_2972, _T_2718) @[Mux.scala 27:72]
|
|
node _T_2974 = or(_T_2973, _T_2719) @[Mux.scala 27:72]
|
|
node _T_2975 = or(_T_2974, _T_2720) @[Mux.scala 27:72]
|
|
node _T_2976 = or(_T_2975, _T_2721) @[Mux.scala 27:72]
|
|
node _T_2977 = or(_T_2976, _T_2722) @[Mux.scala 27:72]
|
|
node _T_2978 = or(_T_2977, _T_2723) @[Mux.scala 27:72]
|
|
node _T_2979 = or(_T_2978, _T_2724) @[Mux.scala 27:72]
|
|
node _T_2980 = or(_T_2979, _T_2725) @[Mux.scala 27:72]
|
|
node _T_2981 = or(_T_2980, _T_2726) @[Mux.scala 27:72]
|
|
node _T_2982 = or(_T_2981, _T_2727) @[Mux.scala 27:72]
|
|
node _T_2983 = or(_T_2982, _T_2728) @[Mux.scala 27:72]
|
|
node _T_2984 = or(_T_2983, _T_2729) @[Mux.scala 27:72]
|
|
node _T_2985 = or(_T_2984, _T_2730) @[Mux.scala 27:72]
|
|
node _T_2986 = or(_T_2985, _T_2731) @[Mux.scala 27:72]
|
|
node _T_2987 = or(_T_2986, _T_2732) @[Mux.scala 27:72]
|
|
node _T_2988 = or(_T_2987, _T_2733) @[Mux.scala 27:72]
|
|
node _T_2989 = or(_T_2988, _T_2734) @[Mux.scala 27:72]
|
|
node _T_2990 = or(_T_2989, _T_2735) @[Mux.scala 27:72]
|
|
node _T_2991 = or(_T_2990, _T_2736) @[Mux.scala 27:72]
|
|
node _T_2992 = or(_T_2991, _T_2737) @[Mux.scala 27:72]
|
|
node _T_2993 = or(_T_2992, _T_2738) @[Mux.scala 27:72]
|
|
node _T_2994 = or(_T_2993, _T_2739) @[Mux.scala 27:72]
|
|
node _T_2995 = or(_T_2994, _T_2740) @[Mux.scala 27:72]
|
|
node _T_2996 = or(_T_2995, _T_2741) @[Mux.scala 27:72]
|
|
node _T_2997 = or(_T_2996, _T_2742) @[Mux.scala 27:72]
|
|
node _T_2998 = or(_T_2997, _T_2743) @[Mux.scala 27:72]
|
|
node _T_2999 = or(_T_2998, _T_2744) @[Mux.scala 27:72]
|
|
node _T_3000 = or(_T_2999, _T_2745) @[Mux.scala 27:72]
|
|
node _T_3001 = or(_T_3000, _T_2746) @[Mux.scala 27:72]
|
|
node _T_3002 = or(_T_3001, _T_2747) @[Mux.scala 27:72]
|
|
node _T_3003 = or(_T_3002, _T_2748) @[Mux.scala 27:72]
|
|
node _T_3004 = or(_T_3003, _T_2749) @[Mux.scala 27:72]
|
|
node _T_3005 = or(_T_3004, _T_2750) @[Mux.scala 27:72]
|
|
node _T_3006 = or(_T_3005, _T_2751) @[Mux.scala 27:72]
|
|
node _T_3007 = or(_T_3006, _T_2752) @[Mux.scala 27:72]
|
|
node _T_3008 = or(_T_3007, _T_2753) @[Mux.scala 27:72]
|
|
node _T_3009 = or(_T_3008, _T_2754) @[Mux.scala 27:72]
|
|
node _T_3010 = or(_T_3009, _T_2755) @[Mux.scala 27:72]
|
|
node _T_3011 = or(_T_3010, _T_2756) @[Mux.scala 27:72]
|
|
node _T_3012 = or(_T_3011, _T_2757) @[Mux.scala 27:72]
|
|
node _T_3013 = or(_T_3012, _T_2758) @[Mux.scala 27:72]
|
|
node _T_3014 = or(_T_3013, _T_2759) @[Mux.scala 27:72]
|
|
node _T_3015 = or(_T_3014, _T_2760) @[Mux.scala 27:72]
|
|
node _T_3016 = or(_T_3015, _T_2761) @[Mux.scala 27:72]
|
|
node _T_3017 = or(_T_3016, _T_2762) @[Mux.scala 27:72]
|
|
node _T_3018 = or(_T_3017, _T_2763) @[Mux.scala 27:72]
|
|
node _T_3019 = or(_T_3018, _T_2764) @[Mux.scala 27:72]
|
|
node _T_3020 = or(_T_3019, _T_2765) @[Mux.scala 27:72]
|
|
node _T_3021 = or(_T_3020, _T_2766) @[Mux.scala 27:72]
|
|
node _T_3022 = or(_T_3021, _T_2767) @[Mux.scala 27:72]
|
|
node _T_3023 = or(_T_3022, _T_2768) @[Mux.scala 27:72]
|
|
node _T_3024 = or(_T_3023, _T_2769) @[Mux.scala 27:72]
|
|
node _T_3025 = or(_T_3024, _T_2770) @[Mux.scala 27:72]
|
|
node _T_3026 = or(_T_3025, _T_2771) @[Mux.scala 27:72]
|
|
node _T_3027 = or(_T_3026, _T_2772) @[Mux.scala 27:72]
|
|
node _T_3028 = or(_T_3027, _T_2773) @[Mux.scala 27:72]
|
|
node _T_3029 = or(_T_3028, _T_2774) @[Mux.scala 27:72]
|
|
node _T_3030 = or(_T_3029, _T_2775) @[Mux.scala 27:72]
|
|
node _T_3031 = or(_T_3030, _T_2776) @[Mux.scala 27:72]
|
|
node _T_3032 = or(_T_3031, _T_2777) @[Mux.scala 27:72]
|
|
node _T_3033 = or(_T_3032, _T_2778) @[Mux.scala 27:72]
|
|
node _T_3034 = or(_T_3033, _T_2779) @[Mux.scala 27:72]
|
|
node _T_3035 = or(_T_3034, _T_2780) @[Mux.scala 27:72]
|
|
node _T_3036 = or(_T_3035, _T_2781) @[Mux.scala 27:72]
|
|
node _T_3037 = or(_T_3036, _T_2782) @[Mux.scala 27:72]
|
|
node _T_3038 = or(_T_3037, _T_2783) @[Mux.scala 27:72]
|
|
node _T_3039 = or(_T_3038, _T_2784) @[Mux.scala 27:72]
|
|
node _T_3040 = or(_T_3039, _T_2785) @[Mux.scala 27:72]
|
|
node _T_3041 = or(_T_3040, _T_2786) @[Mux.scala 27:72]
|
|
node _T_3042 = or(_T_3041, _T_2787) @[Mux.scala 27:72]
|
|
node _T_3043 = or(_T_3042, _T_2788) @[Mux.scala 27:72]
|
|
node _T_3044 = or(_T_3043, _T_2789) @[Mux.scala 27:72]
|
|
node _T_3045 = or(_T_3044, _T_2790) @[Mux.scala 27:72]
|
|
node _T_3046 = or(_T_3045, _T_2791) @[Mux.scala 27:72]
|
|
node _T_3047 = or(_T_3046, _T_2792) @[Mux.scala 27:72]
|
|
node _T_3048 = or(_T_3047, _T_2793) @[Mux.scala 27:72]
|
|
node _T_3049 = or(_T_3048, _T_2794) @[Mux.scala 27:72]
|
|
node _T_3050 = or(_T_3049, _T_2795) @[Mux.scala 27:72]
|
|
node _T_3051 = or(_T_3050, _T_2796) @[Mux.scala 27:72]
|
|
node _T_3052 = or(_T_3051, _T_2797) @[Mux.scala 27:72]
|
|
node _T_3053 = or(_T_3052, _T_2798) @[Mux.scala 27:72]
|
|
node _T_3054 = or(_T_3053, _T_2799) @[Mux.scala 27:72]
|
|
node _T_3055 = or(_T_3054, _T_2800) @[Mux.scala 27:72]
|
|
node _T_3056 = or(_T_3055, _T_2801) @[Mux.scala 27:72]
|
|
node _T_3057 = or(_T_3056, _T_2802) @[Mux.scala 27:72]
|
|
node _T_3058 = or(_T_3057, _T_2803) @[Mux.scala 27:72]
|
|
node _T_3059 = or(_T_3058, _T_2804) @[Mux.scala 27:72]
|
|
node _T_3060 = or(_T_3059, _T_2805) @[Mux.scala 27:72]
|
|
node _T_3061 = or(_T_3060, _T_2806) @[Mux.scala 27:72]
|
|
node _T_3062 = or(_T_3061, _T_2807) @[Mux.scala 27:72]
|
|
node _T_3063 = or(_T_3062, _T_2808) @[Mux.scala 27:72]
|
|
node _T_3064 = or(_T_3063, _T_2809) @[Mux.scala 27:72]
|
|
node _T_3065 = or(_T_3064, _T_2810) @[Mux.scala 27:72]
|
|
node _T_3066 = or(_T_3065, _T_2811) @[Mux.scala 27:72]
|
|
node _T_3067 = or(_T_3066, _T_2812) @[Mux.scala 27:72]
|
|
node _T_3068 = or(_T_3067, _T_2813) @[Mux.scala 27:72]
|
|
node _T_3069 = or(_T_3068, _T_2814) @[Mux.scala 27:72]
|
|
node _T_3070 = or(_T_3069, _T_2815) @[Mux.scala 27:72]
|
|
node _T_3071 = or(_T_3070, _T_2816) @[Mux.scala 27:72]
|
|
node _T_3072 = or(_T_3071, _T_2817) @[Mux.scala 27:72]
|
|
node _T_3073 = or(_T_3072, _T_2818) @[Mux.scala 27:72]
|
|
node _T_3074 = or(_T_3073, _T_2819) @[Mux.scala 27:72]
|
|
node _T_3075 = or(_T_3074, _T_2820) @[Mux.scala 27:72]
|
|
node _T_3076 = or(_T_3075, _T_2821) @[Mux.scala 27:72]
|
|
node _T_3077 = or(_T_3076, _T_2822) @[Mux.scala 27:72]
|
|
node _T_3078 = or(_T_3077, _T_2823) @[Mux.scala 27:72]
|
|
node _T_3079 = or(_T_3078, _T_2824) @[Mux.scala 27:72]
|
|
node _T_3080 = or(_T_3079, _T_2825) @[Mux.scala 27:72]
|
|
node _T_3081 = or(_T_3080, _T_2826) @[Mux.scala 27:72]
|
|
node _T_3082 = or(_T_3081, _T_2827) @[Mux.scala 27:72]
|
|
node _T_3083 = or(_T_3082, _T_2828) @[Mux.scala 27:72]
|
|
node _T_3084 = or(_T_3083, _T_2829) @[Mux.scala 27:72]
|
|
node _T_3085 = or(_T_3084, _T_2830) @[Mux.scala 27:72]
|
|
node _T_3086 = or(_T_3085, _T_2831) @[Mux.scala 27:72]
|
|
node _T_3087 = or(_T_3086, _T_2832) @[Mux.scala 27:72]
|
|
node _T_3088 = or(_T_3087, _T_2833) @[Mux.scala 27:72]
|
|
node _T_3089 = or(_T_3088, _T_2834) @[Mux.scala 27:72]
|
|
node _T_3090 = or(_T_3089, _T_2835) @[Mux.scala 27:72]
|
|
node _T_3091 = or(_T_3090, _T_2836) @[Mux.scala 27:72]
|
|
node _T_3092 = or(_T_3091, _T_2837) @[Mux.scala 27:72]
|
|
node _T_3093 = or(_T_3092, _T_2838) @[Mux.scala 27:72]
|
|
node _T_3094 = or(_T_3093, _T_2839) @[Mux.scala 27:72]
|
|
node _T_3095 = or(_T_3094, _T_2840) @[Mux.scala 27:72]
|
|
node _T_3096 = or(_T_3095, _T_2841) @[Mux.scala 27:72]
|
|
node _T_3097 = or(_T_3096, _T_2842) @[Mux.scala 27:72]
|
|
node _T_3098 = or(_T_3097, _T_2843) @[Mux.scala 27:72]
|
|
node _T_3099 = or(_T_3098, _T_2844) @[Mux.scala 27:72]
|
|
node _T_3100 = or(_T_3099, _T_2845) @[Mux.scala 27:72]
|
|
node _T_3101 = or(_T_3100, _T_2846) @[Mux.scala 27:72]
|
|
node _T_3102 = or(_T_3101, _T_2847) @[Mux.scala 27:72]
|
|
node _T_3103 = or(_T_3102, _T_2848) @[Mux.scala 27:72]
|
|
node _T_3104 = or(_T_3103, _T_2849) @[Mux.scala 27:72]
|
|
node _T_3105 = or(_T_3104, _T_2850) @[Mux.scala 27:72]
|
|
node _T_3106 = or(_T_3105, _T_2851) @[Mux.scala 27:72]
|
|
node _T_3107 = or(_T_3106, _T_2852) @[Mux.scala 27:72]
|
|
node _T_3108 = or(_T_3107, _T_2853) @[Mux.scala 27:72]
|
|
node _T_3109 = or(_T_3108, _T_2854) @[Mux.scala 27:72]
|
|
node _T_3110 = or(_T_3109, _T_2855) @[Mux.scala 27:72]
|
|
node _T_3111 = or(_T_3110, _T_2856) @[Mux.scala 27:72]
|
|
node _T_3112 = or(_T_3111, _T_2857) @[Mux.scala 27:72]
|
|
node _T_3113 = or(_T_3112, _T_2858) @[Mux.scala 27:72]
|
|
node _T_3114 = or(_T_3113, _T_2859) @[Mux.scala 27:72]
|
|
node _T_3115 = or(_T_3114, _T_2860) @[Mux.scala 27:72]
|
|
node _T_3116 = or(_T_3115, _T_2861) @[Mux.scala 27:72]
|
|
node _T_3117 = or(_T_3116, _T_2862) @[Mux.scala 27:72]
|
|
node _T_3118 = or(_T_3117, _T_2863) @[Mux.scala 27:72]
|
|
node _T_3119 = or(_T_3118, _T_2864) @[Mux.scala 27:72]
|
|
node _T_3120 = or(_T_3119, _T_2865) @[Mux.scala 27:72]
|
|
node _T_3121 = or(_T_3120, _T_2866) @[Mux.scala 27:72]
|
|
node _T_3122 = or(_T_3121, _T_2867) @[Mux.scala 27:72]
|
|
node _T_3123 = or(_T_3122, _T_2868) @[Mux.scala 27:72]
|
|
node _T_3124 = or(_T_3123, _T_2869) @[Mux.scala 27:72]
|
|
node _T_3125 = or(_T_3124, _T_2870) @[Mux.scala 27:72]
|
|
node _T_3126 = or(_T_3125, _T_2871) @[Mux.scala 27:72]
|
|
node _T_3127 = or(_T_3126, _T_2872) @[Mux.scala 27:72]
|
|
wire _T_3128 : UInt @[Mux.scala 27:72]
|
|
_T_3128 <= _T_3127 @[Mux.scala 27:72]
|
|
btb_bank0_rd_data_way0_f <= _T_3128 @[el2_ifu_bp_ctl.scala 363:28]
|
|
node _T_3129 = eq(btb_rd_addr_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3130 = bits(_T_3129, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3131 = eq(btb_rd_addr_f, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3132 = bits(_T_3131, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3133 = eq(btb_rd_addr_f, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3134 = bits(_T_3133, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3135 = eq(btb_rd_addr_f, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3136 = bits(_T_3135, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3137 = eq(btb_rd_addr_f, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3138 = bits(_T_3137, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3139 = eq(btb_rd_addr_f, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3140 = bits(_T_3139, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3141 = eq(btb_rd_addr_f, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3142 = bits(_T_3141, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3143 = eq(btb_rd_addr_f, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3144 = bits(_T_3143, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3145 = eq(btb_rd_addr_f, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3146 = bits(_T_3145, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3147 = eq(btb_rd_addr_f, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3148 = bits(_T_3147, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3149 = eq(btb_rd_addr_f, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3150 = bits(_T_3149, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3151 = eq(btb_rd_addr_f, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3152 = bits(_T_3151, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3153 = eq(btb_rd_addr_f, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3154 = bits(_T_3153, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3155 = eq(btb_rd_addr_f, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3156 = bits(_T_3155, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3157 = eq(btb_rd_addr_f, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3158 = bits(_T_3157, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3159 = eq(btb_rd_addr_f, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3160 = bits(_T_3159, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3161 = eq(btb_rd_addr_f, UInt<5>("h010")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3162 = bits(_T_3161, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3163 = eq(btb_rd_addr_f, UInt<5>("h011")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3164 = bits(_T_3163, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3165 = eq(btb_rd_addr_f, UInt<5>("h012")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3166 = bits(_T_3165, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3167 = eq(btb_rd_addr_f, UInt<5>("h013")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3168 = bits(_T_3167, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3169 = eq(btb_rd_addr_f, UInt<5>("h014")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3170 = bits(_T_3169, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3171 = eq(btb_rd_addr_f, UInt<5>("h015")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3172 = bits(_T_3171, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3173 = eq(btb_rd_addr_f, UInt<5>("h016")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3174 = bits(_T_3173, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3175 = eq(btb_rd_addr_f, UInt<5>("h017")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3176 = bits(_T_3175, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3177 = eq(btb_rd_addr_f, UInt<5>("h018")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3178 = bits(_T_3177, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3179 = eq(btb_rd_addr_f, UInt<5>("h019")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3180 = bits(_T_3179, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3181 = eq(btb_rd_addr_f, UInt<5>("h01a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3182 = bits(_T_3181, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3183 = eq(btb_rd_addr_f, UInt<5>("h01b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3184 = bits(_T_3183, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3185 = eq(btb_rd_addr_f, UInt<5>("h01c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3186 = bits(_T_3185, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3187 = eq(btb_rd_addr_f, UInt<5>("h01d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3188 = bits(_T_3187, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3189 = eq(btb_rd_addr_f, UInt<5>("h01e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3190 = bits(_T_3189, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3191 = eq(btb_rd_addr_f, UInt<5>("h01f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3192 = bits(_T_3191, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3193 = eq(btb_rd_addr_f, UInt<6>("h020")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3194 = bits(_T_3193, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3195 = eq(btb_rd_addr_f, UInt<6>("h021")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3196 = bits(_T_3195, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3197 = eq(btb_rd_addr_f, UInt<6>("h022")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3198 = bits(_T_3197, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3199 = eq(btb_rd_addr_f, UInt<6>("h023")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3200 = bits(_T_3199, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3201 = eq(btb_rd_addr_f, UInt<6>("h024")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3202 = bits(_T_3201, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3203 = eq(btb_rd_addr_f, UInt<6>("h025")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3204 = bits(_T_3203, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3205 = eq(btb_rd_addr_f, UInt<6>("h026")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3206 = bits(_T_3205, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3207 = eq(btb_rd_addr_f, UInt<6>("h027")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3208 = bits(_T_3207, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3209 = eq(btb_rd_addr_f, UInt<6>("h028")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3210 = bits(_T_3209, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3211 = eq(btb_rd_addr_f, UInt<6>("h029")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3212 = bits(_T_3211, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3213 = eq(btb_rd_addr_f, UInt<6>("h02a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3214 = bits(_T_3213, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3215 = eq(btb_rd_addr_f, UInt<6>("h02b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3216 = bits(_T_3215, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3217 = eq(btb_rd_addr_f, UInt<6>("h02c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3218 = bits(_T_3217, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3219 = eq(btb_rd_addr_f, UInt<6>("h02d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3220 = bits(_T_3219, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3221 = eq(btb_rd_addr_f, UInt<6>("h02e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3222 = bits(_T_3221, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3223 = eq(btb_rd_addr_f, UInt<6>("h02f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3224 = bits(_T_3223, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3225 = eq(btb_rd_addr_f, UInt<6>("h030")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3226 = bits(_T_3225, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3227 = eq(btb_rd_addr_f, UInt<6>("h031")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3228 = bits(_T_3227, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3229 = eq(btb_rd_addr_f, UInt<6>("h032")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3230 = bits(_T_3229, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3231 = eq(btb_rd_addr_f, UInt<6>("h033")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3232 = bits(_T_3231, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3233 = eq(btb_rd_addr_f, UInt<6>("h034")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3234 = bits(_T_3233, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3235 = eq(btb_rd_addr_f, UInt<6>("h035")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3236 = bits(_T_3235, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3237 = eq(btb_rd_addr_f, UInt<6>("h036")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3238 = bits(_T_3237, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3239 = eq(btb_rd_addr_f, UInt<6>("h037")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3240 = bits(_T_3239, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3241 = eq(btb_rd_addr_f, UInt<6>("h038")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3242 = bits(_T_3241, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3243 = eq(btb_rd_addr_f, UInt<6>("h039")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3244 = bits(_T_3243, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3245 = eq(btb_rd_addr_f, UInt<6>("h03a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3246 = bits(_T_3245, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3247 = eq(btb_rd_addr_f, UInt<6>("h03b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3248 = bits(_T_3247, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3249 = eq(btb_rd_addr_f, UInt<6>("h03c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3250 = bits(_T_3249, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3251 = eq(btb_rd_addr_f, UInt<6>("h03d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3252 = bits(_T_3251, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3253 = eq(btb_rd_addr_f, UInt<6>("h03e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3254 = bits(_T_3253, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3255 = eq(btb_rd_addr_f, UInt<6>("h03f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3256 = bits(_T_3255, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3257 = eq(btb_rd_addr_f, UInt<7>("h040")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3258 = bits(_T_3257, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3259 = eq(btb_rd_addr_f, UInt<7>("h041")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3260 = bits(_T_3259, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3261 = eq(btb_rd_addr_f, UInt<7>("h042")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3262 = bits(_T_3261, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3263 = eq(btb_rd_addr_f, UInt<7>("h043")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3264 = bits(_T_3263, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3265 = eq(btb_rd_addr_f, UInt<7>("h044")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3266 = bits(_T_3265, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3267 = eq(btb_rd_addr_f, UInt<7>("h045")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3268 = bits(_T_3267, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3269 = eq(btb_rd_addr_f, UInt<7>("h046")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3270 = bits(_T_3269, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3271 = eq(btb_rd_addr_f, UInt<7>("h047")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3272 = bits(_T_3271, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3273 = eq(btb_rd_addr_f, UInt<7>("h048")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3274 = bits(_T_3273, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3275 = eq(btb_rd_addr_f, UInt<7>("h049")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3276 = bits(_T_3275, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3277 = eq(btb_rd_addr_f, UInt<7>("h04a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3278 = bits(_T_3277, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3279 = eq(btb_rd_addr_f, UInt<7>("h04b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3280 = bits(_T_3279, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3281 = eq(btb_rd_addr_f, UInt<7>("h04c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3282 = bits(_T_3281, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3283 = eq(btb_rd_addr_f, UInt<7>("h04d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3284 = bits(_T_3283, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3285 = eq(btb_rd_addr_f, UInt<7>("h04e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3286 = bits(_T_3285, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3287 = eq(btb_rd_addr_f, UInt<7>("h04f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3288 = bits(_T_3287, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3289 = eq(btb_rd_addr_f, UInt<7>("h050")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3290 = bits(_T_3289, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3291 = eq(btb_rd_addr_f, UInt<7>("h051")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3292 = bits(_T_3291, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3293 = eq(btb_rd_addr_f, UInt<7>("h052")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3294 = bits(_T_3293, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3295 = eq(btb_rd_addr_f, UInt<7>("h053")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3296 = bits(_T_3295, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3297 = eq(btb_rd_addr_f, UInt<7>("h054")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3298 = bits(_T_3297, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3299 = eq(btb_rd_addr_f, UInt<7>("h055")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3300 = bits(_T_3299, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3301 = eq(btb_rd_addr_f, UInt<7>("h056")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3302 = bits(_T_3301, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3303 = eq(btb_rd_addr_f, UInt<7>("h057")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3304 = bits(_T_3303, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3305 = eq(btb_rd_addr_f, UInt<7>("h058")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3306 = bits(_T_3305, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3307 = eq(btb_rd_addr_f, UInt<7>("h059")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3308 = bits(_T_3307, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3309 = eq(btb_rd_addr_f, UInt<7>("h05a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3310 = bits(_T_3309, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3311 = eq(btb_rd_addr_f, UInt<7>("h05b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3312 = bits(_T_3311, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3313 = eq(btb_rd_addr_f, UInt<7>("h05c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3314 = bits(_T_3313, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3315 = eq(btb_rd_addr_f, UInt<7>("h05d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3316 = bits(_T_3315, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3317 = eq(btb_rd_addr_f, UInt<7>("h05e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3318 = bits(_T_3317, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3319 = eq(btb_rd_addr_f, UInt<7>("h05f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3320 = bits(_T_3319, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3321 = eq(btb_rd_addr_f, UInt<7>("h060")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3322 = bits(_T_3321, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3323 = eq(btb_rd_addr_f, UInt<7>("h061")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3324 = bits(_T_3323, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3325 = eq(btb_rd_addr_f, UInt<7>("h062")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3326 = bits(_T_3325, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3327 = eq(btb_rd_addr_f, UInt<7>("h063")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3328 = bits(_T_3327, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3329 = eq(btb_rd_addr_f, UInt<7>("h064")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3330 = bits(_T_3329, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3331 = eq(btb_rd_addr_f, UInt<7>("h065")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3332 = bits(_T_3331, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3333 = eq(btb_rd_addr_f, UInt<7>("h066")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3334 = bits(_T_3333, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3335 = eq(btb_rd_addr_f, UInt<7>("h067")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3336 = bits(_T_3335, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3337 = eq(btb_rd_addr_f, UInt<7>("h068")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3338 = bits(_T_3337, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3339 = eq(btb_rd_addr_f, UInt<7>("h069")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3340 = bits(_T_3339, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3341 = eq(btb_rd_addr_f, UInt<7>("h06a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3342 = bits(_T_3341, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3343 = eq(btb_rd_addr_f, UInt<7>("h06b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3344 = bits(_T_3343, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3345 = eq(btb_rd_addr_f, UInt<7>("h06c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3346 = bits(_T_3345, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3347 = eq(btb_rd_addr_f, UInt<7>("h06d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3348 = bits(_T_3347, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3349 = eq(btb_rd_addr_f, UInt<7>("h06e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3350 = bits(_T_3349, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3351 = eq(btb_rd_addr_f, UInt<7>("h06f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3352 = bits(_T_3351, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3353 = eq(btb_rd_addr_f, UInt<7>("h070")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3354 = bits(_T_3353, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3355 = eq(btb_rd_addr_f, UInt<7>("h071")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3356 = bits(_T_3355, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3357 = eq(btb_rd_addr_f, UInt<7>("h072")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3358 = bits(_T_3357, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3359 = eq(btb_rd_addr_f, UInt<7>("h073")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3360 = bits(_T_3359, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3361 = eq(btb_rd_addr_f, UInt<7>("h074")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3362 = bits(_T_3361, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3363 = eq(btb_rd_addr_f, UInt<7>("h075")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3364 = bits(_T_3363, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3365 = eq(btb_rd_addr_f, UInt<7>("h076")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3366 = bits(_T_3365, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3367 = eq(btb_rd_addr_f, UInt<7>("h077")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3368 = bits(_T_3367, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3369 = eq(btb_rd_addr_f, UInt<7>("h078")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3370 = bits(_T_3369, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3371 = eq(btb_rd_addr_f, UInt<7>("h079")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3372 = bits(_T_3371, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3373 = eq(btb_rd_addr_f, UInt<7>("h07a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3374 = bits(_T_3373, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3375 = eq(btb_rd_addr_f, UInt<7>("h07b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3376 = bits(_T_3375, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3377 = eq(btb_rd_addr_f, UInt<7>("h07c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3378 = bits(_T_3377, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3379 = eq(btb_rd_addr_f, UInt<7>("h07d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3380 = bits(_T_3379, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3381 = eq(btb_rd_addr_f, UInt<7>("h07e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3382 = bits(_T_3381, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3383 = eq(btb_rd_addr_f, UInt<7>("h07f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3384 = bits(_T_3383, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3385 = eq(btb_rd_addr_f, UInt<8>("h080")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3386 = bits(_T_3385, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3387 = eq(btb_rd_addr_f, UInt<8>("h081")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3388 = bits(_T_3387, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3389 = eq(btb_rd_addr_f, UInt<8>("h082")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3390 = bits(_T_3389, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3391 = eq(btb_rd_addr_f, UInt<8>("h083")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3392 = bits(_T_3391, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3393 = eq(btb_rd_addr_f, UInt<8>("h084")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3394 = bits(_T_3393, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3395 = eq(btb_rd_addr_f, UInt<8>("h085")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3396 = bits(_T_3395, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3397 = eq(btb_rd_addr_f, UInt<8>("h086")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3398 = bits(_T_3397, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3399 = eq(btb_rd_addr_f, UInt<8>("h087")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3400 = bits(_T_3399, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3401 = eq(btb_rd_addr_f, UInt<8>("h088")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3402 = bits(_T_3401, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3403 = eq(btb_rd_addr_f, UInt<8>("h089")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3404 = bits(_T_3403, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3405 = eq(btb_rd_addr_f, UInt<8>("h08a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3406 = bits(_T_3405, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3407 = eq(btb_rd_addr_f, UInt<8>("h08b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3408 = bits(_T_3407, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3409 = eq(btb_rd_addr_f, UInt<8>("h08c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3410 = bits(_T_3409, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3411 = eq(btb_rd_addr_f, UInt<8>("h08d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3412 = bits(_T_3411, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3413 = eq(btb_rd_addr_f, UInt<8>("h08e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3414 = bits(_T_3413, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3415 = eq(btb_rd_addr_f, UInt<8>("h08f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3416 = bits(_T_3415, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3417 = eq(btb_rd_addr_f, UInt<8>("h090")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3418 = bits(_T_3417, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3419 = eq(btb_rd_addr_f, UInt<8>("h091")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3420 = bits(_T_3419, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3421 = eq(btb_rd_addr_f, UInt<8>("h092")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3422 = bits(_T_3421, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3423 = eq(btb_rd_addr_f, UInt<8>("h093")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3424 = bits(_T_3423, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3425 = eq(btb_rd_addr_f, UInt<8>("h094")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3426 = bits(_T_3425, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3427 = eq(btb_rd_addr_f, UInt<8>("h095")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3428 = bits(_T_3427, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3429 = eq(btb_rd_addr_f, UInt<8>("h096")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3430 = bits(_T_3429, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3431 = eq(btb_rd_addr_f, UInt<8>("h097")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3432 = bits(_T_3431, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3433 = eq(btb_rd_addr_f, UInt<8>("h098")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3434 = bits(_T_3433, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3435 = eq(btb_rd_addr_f, UInt<8>("h099")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3436 = bits(_T_3435, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3437 = eq(btb_rd_addr_f, UInt<8>("h09a")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3438 = bits(_T_3437, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3439 = eq(btb_rd_addr_f, UInt<8>("h09b")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3440 = bits(_T_3439, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3441 = eq(btb_rd_addr_f, UInt<8>("h09c")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3442 = bits(_T_3441, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3443 = eq(btb_rd_addr_f, UInt<8>("h09d")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3444 = bits(_T_3443, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3445 = eq(btb_rd_addr_f, UInt<8>("h09e")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3446 = bits(_T_3445, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3447 = eq(btb_rd_addr_f, UInt<8>("h09f")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3448 = bits(_T_3447, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3449 = eq(btb_rd_addr_f, UInt<8>("h0a0")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3450 = bits(_T_3449, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3451 = eq(btb_rd_addr_f, UInt<8>("h0a1")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3452 = bits(_T_3451, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3453 = eq(btb_rd_addr_f, UInt<8>("h0a2")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3454 = bits(_T_3453, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3455 = eq(btb_rd_addr_f, UInt<8>("h0a3")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3456 = bits(_T_3455, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3457 = eq(btb_rd_addr_f, UInt<8>("h0a4")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3458 = bits(_T_3457, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3459 = eq(btb_rd_addr_f, UInt<8>("h0a5")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3460 = bits(_T_3459, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3461 = eq(btb_rd_addr_f, UInt<8>("h0a6")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3462 = bits(_T_3461, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3463 = eq(btb_rd_addr_f, UInt<8>("h0a7")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3464 = bits(_T_3463, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3465 = eq(btb_rd_addr_f, UInt<8>("h0a8")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3466 = bits(_T_3465, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3467 = eq(btb_rd_addr_f, UInt<8>("h0a9")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3468 = bits(_T_3467, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3469 = eq(btb_rd_addr_f, UInt<8>("h0aa")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3470 = bits(_T_3469, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3471 = eq(btb_rd_addr_f, UInt<8>("h0ab")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3472 = bits(_T_3471, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3473 = eq(btb_rd_addr_f, UInt<8>("h0ac")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3474 = bits(_T_3473, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3475 = eq(btb_rd_addr_f, UInt<8>("h0ad")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3476 = bits(_T_3475, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3477 = eq(btb_rd_addr_f, UInt<8>("h0ae")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3478 = bits(_T_3477, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3479 = eq(btb_rd_addr_f, UInt<8>("h0af")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3480 = bits(_T_3479, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3481 = eq(btb_rd_addr_f, UInt<8>("h0b0")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3482 = bits(_T_3481, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3483 = eq(btb_rd_addr_f, UInt<8>("h0b1")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3484 = bits(_T_3483, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3485 = eq(btb_rd_addr_f, UInt<8>("h0b2")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3486 = bits(_T_3485, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3487 = eq(btb_rd_addr_f, UInt<8>("h0b3")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3488 = bits(_T_3487, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3489 = eq(btb_rd_addr_f, UInt<8>("h0b4")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3490 = bits(_T_3489, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3491 = eq(btb_rd_addr_f, UInt<8>("h0b5")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3492 = bits(_T_3491, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3493 = eq(btb_rd_addr_f, UInt<8>("h0b6")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3494 = bits(_T_3493, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3495 = eq(btb_rd_addr_f, UInt<8>("h0b7")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3496 = bits(_T_3495, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3497 = eq(btb_rd_addr_f, UInt<8>("h0b8")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3498 = bits(_T_3497, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3499 = eq(btb_rd_addr_f, UInt<8>("h0b9")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3500 = bits(_T_3499, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3501 = eq(btb_rd_addr_f, UInt<8>("h0ba")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3502 = bits(_T_3501, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3503 = eq(btb_rd_addr_f, UInt<8>("h0bb")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3504 = bits(_T_3503, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3505 = eq(btb_rd_addr_f, UInt<8>("h0bc")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3506 = bits(_T_3505, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3507 = eq(btb_rd_addr_f, UInt<8>("h0bd")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3508 = bits(_T_3507, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3509 = eq(btb_rd_addr_f, UInt<8>("h0be")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3510 = bits(_T_3509, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3511 = eq(btb_rd_addr_f, UInt<8>("h0bf")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3512 = bits(_T_3511, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3513 = eq(btb_rd_addr_f, UInt<8>("h0c0")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3514 = bits(_T_3513, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3515 = eq(btb_rd_addr_f, UInt<8>("h0c1")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3516 = bits(_T_3515, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3517 = eq(btb_rd_addr_f, UInt<8>("h0c2")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3518 = bits(_T_3517, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3519 = eq(btb_rd_addr_f, UInt<8>("h0c3")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3520 = bits(_T_3519, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3521 = eq(btb_rd_addr_f, UInt<8>("h0c4")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3522 = bits(_T_3521, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3523 = eq(btb_rd_addr_f, UInt<8>("h0c5")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3524 = bits(_T_3523, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3525 = eq(btb_rd_addr_f, UInt<8>("h0c6")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3526 = bits(_T_3525, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3527 = eq(btb_rd_addr_f, UInt<8>("h0c7")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3528 = bits(_T_3527, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3529 = eq(btb_rd_addr_f, UInt<8>("h0c8")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3530 = bits(_T_3529, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3531 = eq(btb_rd_addr_f, UInt<8>("h0c9")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3532 = bits(_T_3531, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3533 = eq(btb_rd_addr_f, UInt<8>("h0ca")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3534 = bits(_T_3533, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3535 = eq(btb_rd_addr_f, UInt<8>("h0cb")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3536 = bits(_T_3535, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3537 = eq(btb_rd_addr_f, UInt<8>("h0cc")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3538 = bits(_T_3537, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3539 = eq(btb_rd_addr_f, UInt<8>("h0cd")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3540 = bits(_T_3539, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3541 = eq(btb_rd_addr_f, UInt<8>("h0ce")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3542 = bits(_T_3541, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3543 = eq(btb_rd_addr_f, UInt<8>("h0cf")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3544 = bits(_T_3543, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3545 = eq(btb_rd_addr_f, UInt<8>("h0d0")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3546 = bits(_T_3545, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3547 = eq(btb_rd_addr_f, UInt<8>("h0d1")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3548 = bits(_T_3547, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3549 = eq(btb_rd_addr_f, UInt<8>("h0d2")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3550 = bits(_T_3549, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3551 = eq(btb_rd_addr_f, UInt<8>("h0d3")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3552 = bits(_T_3551, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3553 = eq(btb_rd_addr_f, UInt<8>("h0d4")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3554 = bits(_T_3553, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3555 = eq(btb_rd_addr_f, UInt<8>("h0d5")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3556 = bits(_T_3555, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3557 = eq(btb_rd_addr_f, UInt<8>("h0d6")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3558 = bits(_T_3557, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3559 = eq(btb_rd_addr_f, UInt<8>("h0d7")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3560 = bits(_T_3559, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3561 = eq(btb_rd_addr_f, UInt<8>("h0d8")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3562 = bits(_T_3561, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3563 = eq(btb_rd_addr_f, UInt<8>("h0d9")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3564 = bits(_T_3563, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3565 = eq(btb_rd_addr_f, UInt<8>("h0da")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3566 = bits(_T_3565, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3567 = eq(btb_rd_addr_f, UInt<8>("h0db")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3568 = bits(_T_3567, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3569 = eq(btb_rd_addr_f, UInt<8>("h0dc")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3570 = bits(_T_3569, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3571 = eq(btb_rd_addr_f, UInt<8>("h0dd")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3572 = bits(_T_3571, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3573 = eq(btb_rd_addr_f, UInt<8>("h0de")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3574 = bits(_T_3573, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3575 = eq(btb_rd_addr_f, UInt<8>("h0df")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3576 = bits(_T_3575, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3577 = eq(btb_rd_addr_f, UInt<8>("h0e0")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3578 = bits(_T_3577, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3579 = eq(btb_rd_addr_f, UInt<8>("h0e1")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3580 = bits(_T_3579, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3581 = eq(btb_rd_addr_f, UInt<8>("h0e2")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3582 = bits(_T_3581, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3583 = eq(btb_rd_addr_f, UInt<8>("h0e3")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3584 = bits(_T_3583, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3585 = eq(btb_rd_addr_f, UInt<8>("h0e4")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3586 = bits(_T_3585, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3587 = eq(btb_rd_addr_f, UInt<8>("h0e5")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3588 = bits(_T_3587, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3589 = eq(btb_rd_addr_f, UInt<8>("h0e6")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3590 = bits(_T_3589, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3591 = eq(btb_rd_addr_f, UInt<8>("h0e7")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3592 = bits(_T_3591, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3593 = eq(btb_rd_addr_f, UInt<8>("h0e8")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3594 = bits(_T_3593, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3595 = eq(btb_rd_addr_f, UInt<8>("h0e9")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3596 = bits(_T_3595, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3597 = eq(btb_rd_addr_f, UInt<8>("h0ea")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3598 = bits(_T_3597, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3599 = eq(btb_rd_addr_f, UInt<8>("h0eb")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3600 = bits(_T_3599, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3601 = eq(btb_rd_addr_f, UInt<8>("h0ec")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3602 = bits(_T_3601, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3603 = eq(btb_rd_addr_f, UInt<8>("h0ed")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3604 = bits(_T_3603, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3605 = eq(btb_rd_addr_f, UInt<8>("h0ee")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3606 = bits(_T_3605, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3607 = eq(btb_rd_addr_f, UInt<8>("h0ef")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3608 = bits(_T_3607, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3609 = eq(btb_rd_addr_f, UInt<8>("h0f0")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3610 = bits(_T_3609, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3611 = eq(btb_rd_addr_f, UInt<8>("h0f1")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3612 = bits(_T_3611, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3613 = eq(btb_rd_addr_f, UInt<8>("h0f2")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3614 = bits(_T_3613, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3615 = eq(btb_rd_addr_f, UInt<8>("h0f3")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3616 = bits(_T_3615, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3617 = eq(btb_rd_addr_f, UInt<8>("h0f4")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3618 = bits(_T_3617, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3619 = eq(btb_rd_addr_f, UInt<8>("h0f5")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3620 = bits(_T_3619, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3621 = eq(btb_rd_addr_f, UInt<8>("h0f6")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3622 = bits(_T_3621, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3623 = eq(btb_rd_addr_f, UInt<8>("h0f7")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3624 = bits(_T_3623, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3625 = eq(btb_rd_addr_f, UInt<8>("h0f8")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3626 = bits(_T_3625, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3627 = eq(btb_rd_addr_f, UInt<8>("h0f9")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3628 = bits(_T_3627, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3629 = eq(btb_rd_addr_f, UInt<8>("h0fa")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3630 = bits(_T_3629, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3631 = eq(btb_rd_addr_f, UInt<8>("h0fb")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3632 = bits(_T_3631, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3633 = eq(btb_rd_addr_f, UInt<8>("h0fc")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3634 = bits(_T_3633, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3635 = eq(btb_rd_addr_f, UInt<8>("h0fd")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3636 = bits(_T_3635, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3637 = eq(btb_rd_addr_f, UInt<8>("h0fe")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3638 = bits(_T_3637, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3639 = eq(btb_rd_addr_f, UInt<8>("h0ff")) @[el2_ifu_bp_ctl.scala 364:77]
|
|
node _T_3640 = bits(_T_3639, 0, 0) @[el2_ifu_bp_ctl.scala 364:85]
|
|
node _T_3641 = mux(_T_3130, btb_bank0_rd_data_way1_out_0, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3642 = mux(_T_3132, btb_bank0_rd_data_way1_out_1, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3643 = mux(_T_3134, btb_bank0_rd_data_way1_out_2, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3644 = mux(_T_3136, btb_bank0_rd_data_way1_out_3, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3645 = mux(_T_3138, btb_bank0_rd_data_way1_out_4, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3646 = mux(_T_3140, btb_bank0_rd_data_way1_out_5, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3647 = mux(_T_3142, btb_bank0_rd_data_way1_out_6, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3648 = mux(_T_3144, btb_bank0_rd_data_way1_out_7, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3649 = mux(_T_3146, btb_bank0_rd_data_way1_out_8, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3650 = mux(_T_3148, btb_bank0_rd_data_way1_out_9, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3651 = mux(_T_3150, btb_bank0_rd_data_way1_out_10, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3652 = mux(_T_3152, btb_bank0_rd_data_way1_out_11, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3653 = mux(_T_3154, btb_bank0_rd_data_way1_out_12, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3654 = mux(_T_3156, btb_bank0_rd_data_way1_out_13, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3655 = mux(_T_3158, btb_bank0_rd_data_way1_out_14, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3656 = mux(_T_3160, btb_bank0_rd_data_way1_out_15, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3657 = mux(_T_3162, btb_bank0_rd_data_way1_out_16, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3658 = mux(_T_3164, btb_bank0_rd_data_way1_out_17, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3659 = mux(_T_3166, btb_bank0_rd_data_way1_out_18, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3660 = mux(_T_3168, btb_bank0_rd_data_way1_out_19, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3661 = mux(_T_3170, btb_bank0_rd_data_way1_out_20, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3662 = mux(_T_3172, btb_bank0_rd_data_way1_out_21, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3663 = mux(_T_3174, btb_bank0_rd_data_way1_out_22, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3664 = mux(_T_3176, btb_bank0_rd_data_way1_out_23, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3665 = mux(_T_3178, btb_bank0_rd_data_way1_out_24, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3666 = mux(_T_3180, btb_bank0_rd_data_way1_out_25, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3667 = mux(_T_3182, btb_bank0_rd_data_way1_out_26, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3668 = mux(_T_3184, btb_bank0_rd_data_way1_out_27, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3669 = mux(_T_3186, btb_bank0_rd_data_way1_out_28, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3670 = mux(_T_3188, btb_bank0_rd_data_way1_out_29, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3671 = mux(_T_3190, btb_bank0_rd_data_way1_out_30, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3672 = mux(_T_3192, btb_bank0_rd_data_way1_out_31, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3673 = mux(_T_3194, btb_bank0_rd_data_way1_out_32, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3674 = mux(_T_3196, btb_bank0_rd_data_way1_out_33, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3675 = mux(_T_3198, btb_bank0_rd_data_way1_out_34, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3676 = mux(_T_3200, btb_bank0_rd_data_way1_out_35, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3677 = mux(_T_3202, btb_bank0_rd_data_way1_out_36, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3678 = mux(_T_3204, btb_bank0_rd_data_way1_out_37, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3679 = mux(_T_3206, btb_bank0_rd_data_way1_out_38, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3680 = mux(_T_3208, btb_bank0_rd_data_way1_out_39, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3681 = mux(_T_3210, btb_bank0_rd_data_way1_out_40, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3682 = mux(_T_3212, btb_bank0_rd_data_way1_out_41, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3683 = mux(_T_3214, btb_bank0_rd_data_way1_out_42, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3684 = mux(_T_3216, btb_bank0_rd_data_way1_out_43, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3685 = mux(_T_3218, btb_bank0_rd_data_way1_out_44, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3686 = mux(_T_3220, btb_bank0_rd_data_way1_out_45, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3687 = mux(_T_3222, btb_bank0_rd_data_way1_out_46, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3688 = mux(_T_3224, btb_bank0_rd_data_way1_out_47, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3689 = mux(_T_3226, btb_bank0_rd_data_way1_out_48, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3690 = mux(_T_3228, btb_bank0_rd_data_way1_out_49, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3691 = mux(_T_3230, btb_bank0_rd_data_way1_out_50, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3692 = mux(_T_3232, btb_bank0_rd_data_way1_out_51, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3693 = mux(_T_3234, btb_bank0_rd_data_way1_out_52, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3694 = mux(_T_3236, btb_bank0_rd_data_way1_out_53, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3695 = mux(_T_3238, btb_bank0_rd_data_way1_out_54, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3696 = mux(_T_3240, btb_bank0_rd_data_way1_out_55, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3697 = mux(_T_3242, btb_bank0_rd_data_way1_out_56, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3698 = mux(_T_3244, btb_bank0_rd_data_way1_out_57, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3699 = mux(_T_3246, btb_bank0_rd_data_way1_out_58, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3700 = mux(_T_3248, btb_bank0_rd_data_way1_out_59, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3701 = mux(_T_3250, btb_bank0_rd_data_way1_out_60, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3702 = mux(_T_3252, btb_bank0_rd_data_way1_out_61, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3703 = mux(_T_3254, btb_bank0_rd_data_way1_out_62, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3704 = mux(_T_3256, btb_bank0_rd_data_way1_out_63, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3705 = mux(_T_3258, btb_bank0_rd_data_way1_out_64, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3706 = mux(_T_3260, btb_bank0_rd_data_way1_out_65, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3707 = mux(_T_3262, btb_bank0_rd_data_way1_out_66, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3708 = mux(_T_3264, btb_bank0_rd_data_way1_out_67, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3709 = mux(_T_3266, btb_bank0_rd_data_way1_out_68, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3710 = mux(_T_3268, btb_bank0_rd_data_way1_out_69, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3711 = mux(_T_3270, btb_bank0_rd_data_way1_out_70, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3712 = mux(_T_3272, btb_bank0_rd_data_way1_out_71, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3713 = mux(_T_3274, btb_bank0_rd_data_way1_out_72, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3714 = mux(_T_3276, btb_bank0_rd_data_way1_out_73, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3715 = mux(_T_3278, btb_bank0_rd_data_way1_out_74, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3716 = mux(_T_3280, btb_bank0_rd_data_way1_out_75, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3717 = mux(_T_3282, btb_bank0_rd_data_way1_out_76, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3718 = mux(_T_3284, btb_bank0_rd_data_way1_out_77, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3719 = mux(_T_3286, btb_bank0_rd_data_way1_out_78, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3720 = mux(_T_3288, btb_bank0_rd_data_way1_out_79, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3721 = mux(_T_3290, btb_bank0_rd_data_way1_out_80, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3722 = mux(_T_3292, btb_bank0_rd_data_way1_out_81, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3723 = mux(_T_3294, btb_bank0_rd_data_way1_out_82, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3724 = mux(_T_3296, btb_bank0_rd_data_way1_out_83, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3725 = mux(_T_3298, btb_bank0_rd_data_way1_out_84, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3726 = mux(_T_3300, btb_bank0_rd_data_way1_out_85, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3727 = mux(_T_3302, btb_bank0_rd_data_way1_out_86, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3728 = mux(_T_3304, btb_bank0_rd_data_way1_out_87, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3729 = mux(_T_3306, btb_bank0_rd_data_way1_out_88, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3730 = mux(_T_3308, btb_bank0_rd_data_way1_out_89, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3731 = mux(_T_3310, btb_bank0_rd_data_way1_out_90, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3732 = mux(_T_3312, btb_bank0_rd_data_way1_out_91, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3733 = mux(_T_3314, btb_bank0_rd_data_way1_out_92, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3734 = mux(_T_3316, btb_bank0_rd_data_way1_out_93, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3735 = mux(_T_3318, btb_bank0_rd_data_way1_out_94, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3736 = mux(_T_3320, btb_bank0_rd_data_way1_out_95, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3737 = mux(_T_3322, btb_bank0_rd_data_way1_out_96, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3738 = mux(_T_3324, btb_bank0_rd_data_way1_out_97, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3739 = mux(_T_3326, btb_bank0_rd_data_way1_out_98, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3740 = mux(_T_3328, btb_bank0_rd_data_way1_out_99, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3741 = mux(_T_3330, btb_bank0_rd_data_way1_out_100, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3742 = mux(_T_3332, btb_bank0_rd_data_way1_out_101, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3743 = mux(_T_3334, btb_bank0_rd_data_way1_out_102, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3744 = mux(_T_3336, btb_bank0_rd_data_way1_out_103, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3745 = mux(_T_3338, btb_bank0_rd_data_way1_out_104, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3746 = mux(_T_3340, btb_bank0_rd_data_way1_out_105, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3747 = mux(_T_3342, btb_bank0_rd_data_way1_out_106, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3748 = mux(_T_3344, btb_bank0_rd_data_way1_out_107, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3749 = mux(_T_3346, btb_bank0_rd_data_way1_out_108, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3750 = mux(_T_3348, btb_bank0_rd_data_way1_out_109, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3751 = mux(_T_3350, btb_bank0_rd_data_way1_out_110, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3752 = mux(_T_3352, btb_bank0_rd_data_way1_out_111, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3753 = mux(_T_3354, btb_bank0_rd_data_way1_out_112, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3754 = mux(_T_3356, btb_bank0_rd_data_way1_out_113, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3755 = mux(_T_3358, btb_bank0_rd_data_way1_out_114, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3756 = mux(_T_3360, btb_bank0_rd_data_way1_out_115, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3757 = mux(_T_3362, btb_bank0_rd_data_way1_out_116, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3758 = mux(_T_3364, btb_bank0_rd_data_way1_out_117, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3759 = mux(_T_3366, btb_bank0_rd_data_way1_out_118, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3760 = mux(_T_3368, btb_bank0_rd_data_way1_out_119, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3761 = mux(_T_3370, btb_bank0_rd_data_way1_out_120, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3762 = mux(_T_3372, btb_bank0_rd_data_way1_out_121, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3763 = mux(_T_3374, btb_bank0_rd_data_way1_out_122, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3764 = mux(_T_3376, btb_bank0_rd_data_way1_out_123, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3765 = mux(_T_3378, btb_bank0_rd_data_way1_out_124, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3766 = mux(_T_3380, btb_bank0_rd_data_way1_out_125, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3767 = mux(_T_3382, btb_bank0_rd_data_way1_out_126, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3768 = mux(_T_3384, btb_bank0_rd_data_way1_out_127, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3769 = mux(_T_3386, btb_bank0_rd_data_way1_out_128, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3770 = mux(_T_3388, btb_bank0_rd_data_way1_out_129, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3771 = mux(_T_3390, btb_bank0_rd_data_way1_out_130, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3772 = mux(_T_3392, btb_bank0_rd_data_way1_out_131, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3773 = mux(_T_3394, btb_bank0_rd_data_way1_out_132, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3774 = mux(_T_3396, btb_bank0_rd_data_way1_out_133, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3775 = mux(_T_3398, btb_bank0_rd_data_way1_out_134, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3776 = mux(_T_3400, btb_bank0_rd_data_way1_out_135, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3777 = mux(_T_3402, btb_bank0_rd_data_way1_out_136, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3778 = mux(_T_3404, btb_bank0_rd_data_way1_out_137, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3779 = mux(_T_3406, btb_bank0_rd_data_way1_out_138, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3780 = mux(_T_3408, btb_bank0_rd_data_way1_out_139, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3781 = mux(_T_3410, btb_bank0_rd_data_way1_out_140, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3782 = mux(_T_3412, btb_bank0_rd_data_way1_out_141, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3783 = mux(_T_3414, btb_bank0_rd_data_way1_out_142, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3784 = mux(_T_3416, btb_bank0_rd_data_way1_out_143, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3785 = mux(_T_3418, btb_bank0_rd_data_way1_out_144, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3786 = mux(_T_3420, btb_bank0_rd_data_way1_out_145, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3787 = mux(_T_3422, btb_bank0_rd_data_way1_out_146, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3788 = mux(_T_3424, btb_bank0_rd_data_way1_out_147, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3789 = mux(_T_3426, btb_bank0_rd_data_way1_out_148, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3790 = mux(_T_3428, btb_bank0_rd_data_way1_out_149, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3791 = mux(_T_3430, btb_bank0_rd_data_way1_out_150, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3792 = mux(_T_3432, btb_bank0_rd_data_way1_out_151, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3793 = mux(_T_3434, btb_bank0_rd_data_way1_out_152, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3794 = mux(_T_3436, btb_bank0_rd_data_way1_out_153, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3795 = mux(_T_3438, btb_bank0_rd_data_way1_out_154, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3796 = mux(_T_3440, btb_bank0_rd_data_way1_out_155, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3797 = mux(_T_3442, btb_bank0_rd_data_way1_out_156, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3798 = mux(_T_3444, btb_bank0_rd_data_way1_out_157, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3799 = mux(_T_3446, btb_bank0_rd_data_way1_out_158, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3800 = mux(_T_3448, btb_bank0_rd_data_way1_out_159, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3801 = mux(_T_3450, btb_bank0_rd_data_way1_out_160, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3802 = mux(_T_3452, btb_bank0_rd_data_way1_out_161, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3803 = mux(_T_3454, btb_bank0_rd_data_way1_out_162, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3804 = mux(_T_3456, btb_bank0_rd_data_way1_out_163, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3805 = mux(_T_3458, btb_bank0_rd_data_way1_out_164, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3806 = mux(_T_3460, btb_bank0_rd_data_way1_out_165, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3807 = mux(_T_3462, btb_bank0_rd_data_way1_out_166, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3808 = mux(_T_3464, btb_bank0_rd_data_way1_out_167, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3809 = mux(_T_3466, btb_bank0_rd_data_way1_out_168, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3810 = mux(_T_3468, btb_bank0_rd_data_way1_out_169, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3811 = mux(_T_3470, btb_bank0_rd_data_way1_out_170, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3812 = mux(_T_3472, btb_bank0_rd_data_way1_out_171, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3813 = mux(_T_3474, btb_bank0_rd_data_way1_out_172, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3814 = mux(_T_3476, btb_bank0_rd_data_way1_out_173, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3815 = mux(_T_3478, btb_bank0_rd_data_way1_out_174, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3816 = mux(_T_3480, btb_bank0_rd_data_way1_out_175, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3817 = mux(_T_3482, btb_bank0_rd_data_way1_out_176, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3818 = mux(_T_3484, btb_bank0_rd_data_way1_out_177, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3819 = mux(_T_3486, btb_bank0_rd_data_way1_out_178, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3820 = mux(_T_3488, btb_bank0_rd_data_way1_out_179, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3821 = mux(_T_3490, btb_bank0_rd_data_way1_out_180, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3822 = mux(_T_3492, btb_bank0_rd_data_way1_out_181, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3823 = mux(_T_3494, btb_bank0_rd_data_way1_out_182, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3824 = mux(_T_3496, btb_bank0_rd_data_way1_out_183, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3825 = mux(_T_3498, btb_bank0_rd_data_way1_out_184, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3826 = mux(_T_3500, btb_bank0_rd_data_way1_out_185, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3827 = mux(_T_3502, btb_bank0_rd_data_way1_out_186, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3828 = mux(_T_3504, btb_bank0_rd_data_way1_out_187, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3829 = mux(_T_3506, btb_bank0_rd_data_way1_out_188, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3830 = mux(_T_3508, btb_bank0_rd_data_way1_out_189, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3831 = mux(_T_3510, btb_bank0_rd_data_way1_out_190, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3832 = mux(_T_3512, btb_bank0_rd_data_way1_out_191, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3833 = mux(_T_3514, btb_bank0_rd_data_way1_out_192, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3834 = mux(_T_3516, btb_bank0_rd_data_way1_out_193, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3835 = mux(_T_3518, btb_bank0_rd_data_way1_out_194, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3836 = mux(_T_3520, btb_bank0_rd_data_way1_out_195, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3837 = mux(_T_3522, btb_bank0_rd_data_way1_out_196, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3838 = mux(_T_3524, btb_bank0_rd_data_way1_out_197, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3839 = mux(_T_3526, btb_bank0_rd_data_way1_out_198, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3840 = mux(_T_3528, btb_bank0_rd_data_way1_out_199, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3841 = mux(_T_3530, btb_bank0_rd_data_way1_out_200, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3842 = mux(_T_3532, btb_bank0_rd_data_way1_out_201, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3843 = mux(_T_3534, btb_bank0_rd_data_way1_out_202, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3844 = mux(_T_3536, btb_bank0_rd_data_way1_out_203, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3845 = mux(_T_3538, btb_bank0_rd_data_way1_out_204, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3846 = mux(_T_3540, btb_bank0_rd_data_way1_out_205, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3847 = mux(_T_3542, btb_bank0_rd_data_way1_out_206, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3848 = mux(_T_3544, btb_bank0_rd_data_way1_out_207, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3849 = mux(_T_3546, btb_bank0_rd_data_way1_out_208, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3850 = mux(_T_3548, btb_bank0_rd_data_way1_out_209, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3851 = mux(_T_3550, btb_bank0_rd_data_way1_out_210, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3852 = mux(_T_3552, btb_bank0_rd_data_way1_out_211, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3853 = mux(_T_3554, btb_bank0_rd_data_way1_out_212, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3854 = mux(_T_3556, btb_bank0_rd_data_way1_out_213, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3855 = mux(_T_3558, btb_bank0_rd_data_way1_out_214, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3856 = mux(_T_3560, btb_bank0_rd_data_way1_out_215, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3857 = mux(_T_3562, btb_bank0_rd_data_way1_out_216, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3858 = mux(_T_3564, btb_bank0_rd_data_way1_out_217, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3859 = mux(_T_3566, btb_bank0_rd_data_way1_out_218, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3860 = mux(_T_3568, btb_bank0_rd_data_way1_out_219, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3861 = mux(_T_3570, btb_bank0_rd_data_way1_out_220, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3862 = mux(_T_3572, btb_bank0_rd_data_way1_out_221, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3863 = mux(_T_3574, btb_bank0_rd_data_way1_out_222, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3864 = mux(_T_3576, btb_bank0_rd_data_way1_out_223, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3865 = mux(_T_3578, btb_bank0_rd_data_way1_out_224, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3866 = mux(_T_3580, btb_bank0_rd_data_way1_out_225, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3867 = mux(_T_3582, btb_bank0_rd_data_way1_out_226, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3868 = mux(_T_3584, btb_bank0_rd_data_way1_out_227, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3869 = mux(_T_3586, btb_bank0_rd_data_way1_out_228, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3870 = mux(_T_3588, btb_bank0_rd_data_way1_out_229, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3871 = mux(_T_3590, btb_bank0_rd_data_way1_out_230, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3872 = mux(_T_3592, btb_bank0_rd_data_way1_out_231, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3873 = mux(_T_3594, btb_bank0_rd_data_way1_out_232, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3874 = mux(_T_3596, btb_bank0_rd_data_way1_out_233, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3875 = mux(_T_3598, btb_bank0_rd_data_way1_out_234, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3876 = mux(_T_3600, btb_bank0_rd_data_way1_out_235, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3877 = mux(_T_3602, btb_bank0_rd_data_way1_out_236, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3878 = mux(_T_3604, btb_bank0_rd_data_way1_out_237, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3879 = mux(_T_3606, btb_bank0_rd_data_way1_out_238, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3880 = mux(_T_3608, btb_bank0_rd_data_way1_out_239, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3881 = mux(_T_3610, btb_bank0_rd_data_way1_out_240, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3882 = mux(_T_3612, btb_bank0_rd_data_way1_out_241, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3883 = mux(_T_3614, btb_bank0_rd_data_way1_out_242, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3884 = mux(_T_3616, btb_bank0_rd_data_way1_out_243, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3885 = mux(_T_3618, btb_bank0_rd_data_way1_out_244, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3886 = mux(_T_3620, btb_bank0_rd_data_way1_out_245, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3887 = mux(_T_3622, btb_bank0_rd_data_way1_out_246, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3888 = mux(_T_3624, btb_bank0_rd_data_way1_out_247, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3889 = mux(_T_3626, btb_bank0_rd_data_way1_out_248, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3890 = mux(_T_3628, btb_bank0_rd_data_way1_out_249, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3891 = mux(_T_3630, btb_bank0_rd_data_way1_out_250, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3892 = mux(_T_3632, btb_bank0_rd_data_way1_out_251, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3893 = mux(_T_3634, btb_bank0_rd_data_way1_out_252, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3894 = mux(_T_3636, btb_bank0_rd_data_way1_out_253, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3895 = mux(_T_3638, btb_bank0_rd_data_way1_out_254, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3896 = mux(_T_3640, btb_bank0_rd_data_way1_out_255, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_3897 = or(_T_3641, _T_3642) @[Mux.scala 27:72]
|
|
node _T_3898 = or(_T_3897, _T_3643) @[Mux.scala 27:72]
|
|
node _T_3899 = or(_T_3898, _T_3644) @[Mux.scala 27:72]
|
|
node _T_3900 = or(_T_3899, _T_3645) @[Mux.scala 27:72]
|
|
node _T_3901 = or(_T_3900, _T_3646) @[Mux.scala 27:72]
|
|
node _T_3902 = or(_T_3901, _T_3647) @[Mux.scala 27:72]
|
|
node _T_3903 = or(_T_3902, _T_3648) @[Mux.scala 27:72]
|
|
node _T_3904 = or(_T_3903, _T_3649) @[Mux.scala 27:72]
|
|
node _T_3905 = or(_T_3904, _T_3650) @[Mux.scala 27:72]
|
|
node _T_3906 = or(_T_3905, _T_3651) @[Mux.scala 27:72]
|
|
node _T_3907 = or(_T_3906, _T_3652) @[Mux.scala 27:72]
|
|
node _T_3908 = or(_T_3907, _T_3653) @[Mux.scala 27:72]
|
|
node _T_3909 = or(_T_3908, _T_3654) @[Mux.scala 27:72]
|
|
node _T_3910 = or(_T_3909, _T_3655) @[Mux.scala 27:72]
|
|
node _T_3911 = or(_T_3910, _T_3656) @[Mux.scala 27:72]
|
|
node _T_3912 = or(_T_3911, _T_3657) @[Mux.scala 27:72]
|
|
node _T_3913 = or(_T_3912, _T_3658) @[Mux.scala 27:72]
|
|
node _T_3914 = or(_T_3913, _T_3659) @[Mux.scala 27:72]
|
|
node _T_3915 = or(_T_3914, _T_3660) @[Mux.scala 27:72]
|
|
node _T_3916 = or(_T_3915, _T_3661) @[Mux.scala 27:72]
|
|
node _T_3917 = or(_T_3916, _T_3662) @[Mux.scala 27:72]
|
|
node _T_3918 = or(_T_3917, _T_3663) @[Mux.scala 27:72]
|
|
node _T_3919 = or(_T_3918, _T_3664) @[Mux.scala 27:72]
|
|
node _T_3920 = or(_T_3919, _T_3665) @[Mux.scala 27:72]
|
|
node _T_3921 = or(_T_3920, _T_3666) @[Mux.scala 27:72]
|
|
node _T_3922 = or(_T_3921, _T_3667) @[Mux.scala 27:72]
|
|
node _T_3923 = or(_T_3922, _T_3668) @[Mux.scala 27:72]
|
|
node _T_3924 = or(_T_3923, _T_3669) @[Mux.scala 27:72]
|
|
node _T_3925 = or(_T_3924, _T_3670) @[Mux.scala 27:72]
|
|
node _T_3926 = or(_T_3925, _T_3671) @[Mux.scala 27:72]
|
|
node _T_3927 = or(_T_3926, _T_3672) @[Mux.scala 27:72]
|
|
node _T_3928 = or(_T_3927, _T_3673) @[Mux.scala 27:72]
|
|
node _T_3929 = or(_T_3928, _T_3674) @[Mux.scala 27:72]
|
|
node _T_3930 = or(_T_3929, _T_3675) @[Mux.scala 27:72]
|
|
node _T_3931 = or(_T_3930, _T_3676) @[Mux.scala 27:72]
|
|
node _T_3932 = or(_T_3931, _T_3677) @[Mux.scala 27:72]
|
|
node _T_3933 = or(_T_3932, _T_3678) @[Mux.scala 27:72]
|
|
node _T_3934 = or(_T_3933, _T_3679) @[Mux.scala 27:72]
|
|
node _T_3935 = or(_T_3934, _T_3680) @[Mux.scala 27:72]
|
|
node _T_3936 = or(_T_3935, _T_3681) @[Mux.scala 27:72]
|
|
node _T_3937 = or(_T_3936, _T_3682) @[Mux.scala 27:72]
|
|
node _T_3938 = or(_T_3937, _T_3683) @[Mux.scala 27:72]
|
|
node _T_3939 = or(_T_3938, _T_3684) @[Mux.scala 27:72]
|
|
node _T_3940 = or(_T_3939, _T_3685) @[Mux.scala 27:72]
|
|
node _T_3941 = or(_T_3940, _T_3686) @[Mux.scala 27:72]
|
|
node _T_3942 = or(_T_3941, _T_3687) @[Mux.scala 27:72]
|
|
node _T_3943 = or(_T_3942, _T_3688) @[Mux.scala 27:72]
|
|
node _T_3944 = or(_T_3943, _T_3689) @[Mux.scala 27:72]
|
|
node _T_3945 = or(_T_3944, _T_3690) @[Mux.scala 27:72]
|
|
node _T_3946 = or(_T_3945, _T_3691) @[Mux.scala 27:72]
|
|
node _T_3947 = or(_T_3946, _T_3692) @[Mux.scala 27:72]
|
|
node _T_3948 = or(_T_3947, _T_3693) @[Mux.scala 27:72]
|
|
node _T_3949 = or(_T_3948, _T_3694) @[Mux.scala 27:72]
|
|
node _T_3950 = or(_T_3949, _T_3695) @[Mux.scala 27:72]
|
|
node _T_3951 = or(_T_3950, _T_3696) @[Mux.scala 27:72]
|
|
node _T_3952 = or(_T_3951, _T_3697) @[Mux.scala 27:72]
|
|
node _T_3953 = or(_T_3952, _T_3698) @[Mux.scala 27:72]
|
|
node _T_3954 = or(_T_3953, _T_3699) @[Mux.scala 27:72]
|
|
node _T_3955 = or(_T_3954, _T_3700) @[Mux.scala 27:72]
|
|
node _T_3956 = or(_T_3955, _T_3701) @[Mux.scala 27:72]
|
|
node _T_3957 = or(_T_3956, _T_3702) @[Mux.scala 27:72]
|
|
node _T_3958 = or(_T_3957, _T_3703) @[Mux.scala 27:72]
|
|
node _T_3959 = or(_T_3958, _T_3704) @[Mux.scala 27:72]
|
|
node _T_3960 = or(_T_3959, _T_3705) @[Mux.scala 27:72]
|
|
node _T_3961 = or(_T_3960, _T_3706) @[Mux.scala 27:72]
|
|
node _T_3962 = or(_T_3961, _T_3707) @[Mux.scala 27:72]
|
|
node _T_3963 = or(_T_3962, _T_3708) @[Mux.scala 27:72]
|
|
node _T_3964 = or(_T_3963, _T_3709) @[Mux.scala 27:72]
|
|
node _T_3965 = or(_T_3964, _T_3710) @[Mux.scala 27:72]
|
|
node _T_3966 = or(_T_3965, _T_3711) @[Mux.scala 27:72]
|
|
node _T_3967 = or(_T_3966, _T_3712) @[Mux.scala 27:72]
|
|
node _T_3968 = or(_T_3967, _T_3713) @[Mux.scala 27:72]
|
|
node _T_3969 = or(_T_3968, _T_3714) @[Mux.scala 27:72]
|
|
node _T_3970 = or(_T_3969, _T_3715) @[Mux.scala 27:72]
|
|
node _T_3971 = or(_T_3970, _T_3716) @[Mux.scala 27:72]
|
|
node _T_3972 = or(_T_3971, _T_3717) @[Mux.scala 27:72]
|
|
node _T_3973 = or(_T_3972, _T_3718) @[Mux.scala 27:72]
|
|
node _T_3974 = or(_T_3973, _T_3719) @[Mux.scala 27:72]
|
|
node _T_3975 = or(_T_3974, _T_3720) @[Mux.scala 27:72]
|
|
node _T_3976 = or(_T_3975, _T_3721) @[Mux.scala 27:72]
|
|
node _T_3977 = or(_T_3976, _T_3722) @[Mux.scala 27:72]
|
|
node _T_3978 = or(_T_3977, _T_3723) @[Mux.scala 27:72]
|
|
node _T_3979 = or(_T_3978, _T_3724) @[Mux.scala 27:72]
|
|
node _T_3980 = or(_T_3979, _T_3725) @[Mux.scala 27:72]
|
|
node _T_3981 = or(_T_3980, _T_3726) @[Mux.scala 27:72]
|
|
node _T_3982 = or(_T_3981, _T_3727) @[Mux.scala 27:72]
|
|
node _T_3983 = or(_T_3982, _T_3728) @[Mux.scala 27:72]
|
|
node _T_3984 = or(_T_3983, _T_3729) @[Mux.scala 27:72]
|
|
node _T_3985 = or(_T_3984, _T_3730) @[Mux.scala 27:72]
|
|
node _T_3986 = or(_T_3985, _T_3731) @[Mux.scala 27:72]
|
|
node _T_3987 = or(_T_3986, _T_3732) @[Mux.scala 27:72]
|
|
node _T_3988 = or(_T_3987, _T_3733) @[Mux.scala 27:72]
|
|
node _T_3989 = or(_T_3988, _T_3734) @[Mux.scala 27:72]
|
|
node _T_3990 = or(_T_3989, _T_3735) @[Mux.scala 27:72]
|
|
node _T_3991 = or(_T_3990, _T_3736) @[Mux.scala 27:72]
|
|
node _T_3992 = or(_T_3991, _T_3737) @[Mux.scala 27:72]
|
|
node _T_3993 = or(_T_3992, _T_3738) @[Mux.scala 27:72]
|
|
node _T_3994 = or(_T_3993, _T_3739) @[Mux.scala 27:72]
|
|
node _T_3995 = or(_T_3994, _T_3740) @[Mux.scala 27:72]
|
|
node _T_3996 = or(_T_3995, _T_3741) @[Mux.scala 27:72]
|
|
node _T_3997 = or(_T_3996, _T_3742) @[Mux.scala 27:72]
|
|
node _T_3998 = or(_T_3997, _T_3743) @[Mux.scala 27:72]
|
|
node _T_3999 = or(_T_3998, _T_3744) @[Mux.scala 27:72]
|
|
node _T_4000 = or(_T_3999, _T_3745) @[Mux.scala 27:72]
|
|
node _T_4001 = or(_T_4000, _T_3746) @[Mux.scala 27:72]
|
|
node _T_4002 = or(_T_4001, _T_3747) @[Mux.scala 27:72]
|
|
node _T_4003 = or(_T_4002, _T_3748) @[Mux.scala 27:72]
|
|
node _T_4004 = or(_T_4003, _T_3749) @[Mux.scala 27:72]
|
|
node _T_4005 = or(_T_4004, _T_3750) @[Mux.scala 27:72]
|
|
node _T_4006 = or(_T_4005, _T_3751) @[Mux.scala 27:72]
|
|
node _T_4007 = or(_T_4006, _T_3752) @[Mux.scala 27:72]
|
|
node _T_4008 = or(_T_4007, _T_3753) @[Mux.scala 27:72]
|
|
node _T_4009 = or(_T_4008, _T_3754) @[Mux.scala 27:72]
|
|
node _T_4010 = or(_T_4009, _T_3755) @[Mux.scala 27:72]
|
|
node _T_4011 = or(_T_4010, _T_3756) @[Mux.scala 27:72]
|
|
node _T_4012 = or(_T_4011, _T_3757) @[Mux.scala 27:72]
|
|
node _T_4013 = or(_T_4012, _T_3758) @[Mux.scala 27:72]
|
|
node _T_4014 = or(_T_4013, _T_3759) @[Mux.scala 27:72]
|
|
node _T_4015 = or(_T_4014, _T_3760) @[Mux.scala 27:72]
|
|
node _T_4016 = or(_T_4015, _T_3761) @[Mux.scala 27:72]
|
|
node _T_4017 = or(_T_4016, _T_3762) @[Mux.scala 27:72]
|
|
node _T_4018 = or(_T_4017, _T_3763) @[Mux.scala 27:72]
|
|
node _T_4019 = or(_T_4018, _T_3764) @[Mux.scala 27:72]
|
|
node _T_4020 = or(_T_4019, _T_3765) @[Mux.scala 27:72]
|
|
node _T_4021 = or(_T_4020, _T_3766) @[Mux.scala 27:72]
|
|
node _T_4022 = or(_T_4021, _T_3767) @[Mux.scala 27:72]
|
|
node _T_4023 = or(_T_4022, _T_3768) @[Mux.scala 27:72]
|
|
node _T_4024 = or(_T_4023, _T_3769) @[Mux.scala 27:72]
|
|
node _T_4025 = or(_T_4024, _T_3770) @[Mux.scala 27:72]
|
|
node _T_4026 = or(_T_4025, _T_3771) @[Mux.scala 27:72]
|
|
node _T_4027 = or(_T_4026, _T_3772) @[Mux.scala 27:72]
|
|
node _T_4028 = or(_T_4027, _T_3773) @[Mux.scala 27:72]
|
|
node _T_4029 = or(_T_4028, _T_3774) @[Mux.scala 27:72]
|
|
node _T_4030 = or(_T_4029, _T_3775) @[Mux.scala 27:72]
|
|
node _T_4031 = or(_T_4030, _T_3776) @[Mux.scala 27:72]
|
|
node _T_4032 = or(_T_4031, _T_3777) @[Mux.scala 27:72]
|
|
node _T_4033 = or(_T_4032, _T_3778) @[Mux.scala 27:72]
|
|
node _T_4034 = or(_T_4033, _T_3779) @[Mux.scala 27:72]
|
|
node _T_4035 = or(_T_4034, _T_3780) @[Mux.scala 27:72]
|
|
node _T_4036 = or(_T_4035, _T_3781) @[Mux.scala 27:72]
|
|
node _T_4037 = or(_T_4036, _T_3782) @[Mux.scala 27:72]
|
|
node _T_4038 = or(_T_4037, _T_3783) @[Mux.scala 27:72]
|
|
node _T_4039 = or(_T_4038, _T_3784) @[Mux.scala 27:72]
|
|
node _T_4040 = or(_T_4039, _T_3785) @[Mux.scala 27:72]
|
|
node _T_4041 = or(_T_4040, _T_3786) @[Mux.scala 27:72]
|
|
node _T_4042 = or(_T_4041, _T_3787) @[Mux.scala 27:72]
|
|
node _T_4043 = or(_T_4042, _T_3788) @[Mux.scala 27:72]
|
|
node _T_4044 = or(_T_4043, _T_3789) @[Mux.scala 27:72]
|
|
node _T_4045 = or(_T_4044, _T_3790) @[Mux.scala 27:72]
|
|
node _T_4046 = or(_T_4045, _T_3791) @[Mux.scala 27:72]
|
|
node _T_4047 = or(_T_4046, _T_3792) @[Mux.scala 27:72]
|
|
node _T_4048 = or(_T_4047, _T_3793) @[Mux.scala 27:72]
|
|
node _T_4049 = or(_T_4048, _T_3794) @[Mux.scala 27:72]
|
|
node _T_4050 = or(_T_4049, _T_3795) @[Mux.scala 27:72]
|
|
node _T_4051 = or(_T_4050, _T_3796) @[Mux.scala 27:72]
|
|
node _T_4052 = or(_T_4051, _T_3797) @[Mux.scala 27:72]
|
|
node _T_4053 = or(_T_4052, _T_3798) @[Mux.scala 27:72]
|
|
node _T_4054 = or(_T_4053, _T_3799) @[Mux.scala 27:72]
|
|
node _T_4055 = or(_T_4054, _T_3800) @[Mux.scala 27:72]
|
|
node _T_4056 = or(_T_4055, _T_3801) @[Mux.scala 27:72]
|
|
node _T_4057 = or(_T_4056, _T_3802) @[Mux.scala 27:72]
|
|
node _T_4058 = or(_T_4057, _T_3803) @[Mux.scala 27:72]
|
|
node _T_4059 = or(_T_4058, _T_3804) @[Mux.scala 27:72]
|
|
node _T_4060 = or(_T_4059, _T_3805) @[Mux.scala 27:72]
|
|
node _T_4061 = or(_T_4060, _T_3806) @[Mux.scala 27:72]
|
|
node _T_4062 = or(_T_4061, _T_3807) @[Mux.scala 27:72]
|
|
node _T_4063 = or(_T_4062, _T_3808) @[Mux.scala 27:72]
|
|
node _T_4064 = or(_T_4063, _T_3809) @[Mux.scala 27:72]
|
|
node _T_4065 = or(_T_4064, _T_3810) @[Mux.scala 27:72]
|
|
node _T_4066 = or(_T_4065, _T_3811) @[Mux.scala 27:72]
|
|
node _T_4067 = or(_T_4066, _T_3812) @[Mux.scala 27:72]
|
|
node _T_4068 = or(_T_4067, _T_3813) @[Mux.scala 27:72]
|
|
node _T_4069 = or(_T_4068, _T_3814) @[Mux.scala 27:72]
|
|
node _T_4070 = or(_T_4069, _T_3815) @[Mux.scala 27:72]
|
|
node _T_4071 = or(_T_4070, _T_3816) @[Mux.scala 27:72]
|
|
node _T_4072 = or(_T_4071, _T_3817) @[Mux.scala 27:72]
|
|
node _T_4073 = or(_T_4072, _T_3818) @[Mux.scala 27:72]
|
|
node _T_4074 = or(_T_4073, _T_3819) @[Mux.scala 27:72]
|
|
node _T_4075 = or(_T_4074, _T_3820) @[Mux.scala 27:72]
|
|
node _T_4076 = or(_T_4075, _T_3821) @[Mux.scala 27:72]
|
|
node _T_4077 = or(_T_4076, _T_3822) @[Mux.scala 27:72]
|
|
node _T_4078 = or(_T_4077, _T_3823) @[Mux.scala 27:72]
|
|
node _T_4079 = or(_T_4078, _T_3824) @[Mux.scala 27:72]
|
|
node _T_4080 = or(_T_4079, _T_3825) @[Mux.scala 27:72]
|
|
node _T_4081 = or(_T_4080, _T_3826) @[Mux.scala 27:72]
|
|
node _T_4082 = or(_T_4081, _T_3827) @[Mux.scala 27:72]
|
|
node _T_4083 = or(_T_4082, _T_3828) @[Mux.scala 27:72]
|
|
node _T_4084 = or(_T_4083, _T_3829) @[Mux.scala 27:72]
|
|
node _T_4085 = or(_T_4084, _T_3830) @[Mux.scala 27:72]
|
|
node _T_4086 = or(_T_4085, _T_3831) @[Mux.scala 27:72]
|
|
node _T_4087 = or(_T_4086, _T_3832) @[Mux.scala 27:72]
|
|
node _T_4088 = or(_T_4087, _T_3833) @[Mux.scala 27:72]
|
|
node _T_4089 = or(_T_4088, _T_3834) @[Mux.scala 27:72]
|
|
node _T_4090 = or(_T_4089, _T_3835) @[Mux.scala 27:72]
|
|
node _T_4091 = or(_T_4090, _T_3836) @[Mux.scala 27:72]
|
|
node _T_4092 = or(_T_4091, _T_3837) @[Mux.scala 27:72]
|
|
node _T_4093 = or(_T_4092, _T_3838) @[Mux.scala 27:72]
|
|
node _T_4094 = or(_T_4093, _T_3839) @[Mux.scala 27:72]
|
|
node _T_4095 = or(_T_4094, _T_3840) @[Mux.scala 27:72]
|
|
node _T_4096 = or(_T_4095, _T_3841) @[Mux.scala 27:72]
|
|
node _T_4097 = or(_T_4096, _T_3842) @[Mux.scala 27:72]
|
|
node _T_4098 = or(_T_4097, _T_3843) @[Mux.scala 27:72]
|
|
node _T_4099 = or(_T_4098, _T_3844) @[Mux.scala 27:72]
|
|
node _T_4100 = or(_T_4099, _T_3845) @[Mux.scala 27:72]
|
|
node _T_4101 = or(_T_4100, _T_3846) @[Mux.scala 27:72]
|
|
node _T_4102 = or(_T_4101, _T_3847) @[Mux.scala 27:72]
|
|
node _T_4103 = or(_T_4102, _T_3848) @[Mux.scala 27:72]
|
|
node _T_4104 = or(_T_4103, _T_3849) @[Mux.scala 27:72]
|
|
node _T_4105 = or(_T_4104, _T_3850) @[Mux.scala 27:72]
|
|
node _T_4106 = or(_T_4105, _T_3851) @[Mux.scala 27:72]
|
|
node _T_4107 = or(_T_4106, _T_3852) @[Mux.scala 27:72]
|
|
node _T_4108 = or(_T_4107, _T_3853) @[Mux.scala 27:72]
|
|
node _T_4109 = or(_T_4108, _T_3854) @[Mux.scala 27:72]
|
|
node _T_4110 = or(_T_4109, _T_3855) @[Mux.scala 27:72]
|
|
node _T_4111 = or(_T_4110, _T_3856) @[Mux.scala 27:72]
|
|
node _T_4112 = or(_T_4111, _T_3857) @[Mux.scala 27:72]
|
|
node _T_4113 = or(_T_4112, _T_3858) @[Mux.scala 27:72]
|
|
node _T_4114 = or(_T_4113, _T_3859) @[Mux.scala 27:72]
|
|
node _T_4115 = or(_T_4114, _T_3860) @[Mux.scala 27:72]
|
|
node _T_4116 = or(_T_4115, _T_3861) @[Mux.scala 27:72]
|
|
node _T_4117 = or(_T_4116, _T_3862) @[Mux.scala 27:72]
|
|
node _T_4118 = or(_T_4117, _T_3863) @[Mux.scala 27:72]
|
|
node _T_4119 = or(_T_4118, _T_3864) @[Mux.scala 27:72]
|
|
node _T_4120 = or(_T_4119, _T_3865) @[Mux.scala 27:72]
|
|
node _T_4121 = or(_T_4120, _T_3866) @[Mux.scala 27:72]
|
|
node _T_4122 = or(_T_4121, _T_3867) @[Mux.scala 27:72]
|
|
node _T_4123 = or(_T_4122, _T_3868) @[Mux.scala 27:72]
|
|
node _T_4124 = or(_T_4123, _T_3869) @[Mux.scala 27:72]
|
|
node _T_4125 = or(_T_4124, _T_3870) @[Mux.scala 27:72]
|
|
node _T_4126 = or(_T_4125, _T_3871) @[Mux.scala 27:72]
|
|
node _T_4127 = or(_T_4126, _T_3872) @[Mux.scala 27:72]
|
|
node _T_4128 = or(_T_4127, _T_3873) @[Mux.scala 27:72]
|
|
node _T_4129 = or(_T_4128, _T_3874) @[Mux.scala 27:72]
|
|
node _T_4130 = or(_T_4129, _T_3875) @[Mux.scala 27:72]
|
|
node _T_4131 = or(_T_4130, _T_3876) @[Mux.scala 27:72]
|
|
node _T_4132 = or(_T_4131, _T_3877) @[Mux.scala 27:72]
|
|
node _T_4133 = or(_T_4132, _T_3878) @[Mux.scala 27:72]
|
|
node _T_4134 = or(_T_4133, _T_3879) @[Mux.scala 27:72]
|
|
node _T_4135 = or(_T_4134, _T_3880) @[Mux.scala 27:72]
|
|
node _T_4136 = or(_T_4135, _T_3881) @[Mux.scala 27:72]
|
|
node _T_4137 = or(_T_4136, _T_3882) @[Mux.scala 27:72]
|
|
node _T_4138 = or(_T_4137, _T_3883) @[Mux.scala 27:72]
|
|
node _T_4139 = or(_T_4138, _T_3884) @[Mux.scala 27:72]
|
|
node _T_4140 = or(_T_4139, _T_3885) @[Mux.scala 27:72]
|
|
node _T_4141 = or(_T_4140, _T_3886) @[Mux.scala 27:72]
|
|
node _T_4142 = or(_T_4141, _T_3887) @[Mux.scala 27:72]
|
|
node _T_4143 = or(_T_4142, _T_3888) @[Mux.scala 27:72]
|
|
node _T_4144 = or(_T_4143, _T_3889) @[Mux.scala 27:72]
|
|
node _T_4145 = or(_T_4144, _T_3890) @[Mux.scala 27:72]
|
|
node _T_4146 = or(_T_4145, _T_3891) @[Mux.scala 27:72]
|
|
node _T_4147 = or(_T_4146, _T_3892) @[Mux.scala 27:72]
|
|
node _T_4148 = or(_T_4147, _T_3893) @[Mux.scala 27:72]
|
|
node _T_4149 = or(_T_4148, _T_3894) @[Mux.scala 27:72]
|
|
node _T_4150 = or(_T_4149, _T_3895) @[Mux.scala 27:72]
|
|
node _T_4151 = or(_T_4150, _T_3896) @[Mux.scala 27:72]
|
|
wire _T_4152 : UInt @[Mux.scala 27:72]
|
|
_T_4152 <= _T_4151 @[Mux.scala 27:72]
|
|
btb_bank0_rd_data_way1_f <= _T_4152 @[el2_ifu_bp_ctl.scala 364:28]
|
|
node _T_4153 = eq(btb_rd_addr_p1_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4154 = bits(_T_4153, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4155 = eq(btb_rd_addr_p1_f, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4156 = bits(_T_4155, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4157 = eq(btb_rd_addr_p1_f, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4158 = bits(_T_4157, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4159 = eq(btb_rd_addr_p1_f, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4160 = bits(_T_4159, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4161 = eq(btb_rd_addr_p1_f, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4162 = bits(_T_4161, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4163 = eq(btb_rd_addr_p1_f, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4164 = bits(_T_4163, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4165 = eq(btb_rd_addr_p1_f, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4166 = bits(_T_4165, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4167 = eq(btb_rd_addr_p1_f, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4168 = bits(_T_4167, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4169 = eq(btb_rd_addr_p1_f, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4170 = bits(_T_4169, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4171 = eq(btb_rd_addr_p1_f, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4172 = bits(_T_4171, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4173 = eq(btb_rd_addr_p1_f, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4174 = bits(_T_4173, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4175 = eq(btb_rd_addr_p1_f, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4176 = bits(_T_4175, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4177 = eq(btb_rd_addr_p1_f, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4178 = bits(_T_4177, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4179 = eq(btb_rd_addr_p1_f, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4180 = bits(_T_4179, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4181 = eq(btb_rd_addr_p1_f, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4182 = bits(_T_4181, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4183 = eq(btb_rd_addr_p1_f, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4184 = bits(_T_4183, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4185 = eq(btb_rd_addr_p1_f, UInt<5>("h010")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4186 = bits(_T_4185, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4187 = eq(btb_rd_addr_p1_f, UInt<5>("h011")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4188 = bits(_T_4187, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4189 = eq(btb_rd_addr_p1_f, UInt<5>("h012")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4190 = bits(_T_4189, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4191 = eq(btb_rd_addr_p1_f, UInt<5>("h013")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4192 = bits(_T_4191, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4193 = eq(btb_rd_addr_p1_f, UInt<5>("h014")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4194 = bits(_T_4193, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4195 = eq(btb_rd_addr_p1_f, UInt<5>("h015")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4196 = bits(_T_4195, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4197 = eq(btb_rd_addr_p1_f, UInt<5>("h016")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4198 = bits(_T_4197, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4199 = eq(btb_rd_addr_p1_f, UInt<5>("h017")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4200 = bits(_T_4199, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4201 = eq(btb_rd_addr_p1_f, UInt<5>("h018")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4202 = bits(_T_4201, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4203 = eq(btb_rd_addr_p1_f, UInt<5>("h019")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4204 = bits(_T_4203, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4205 = eq(btb_rd_addr_p1_f, UInt<5>("h01a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4206 = bits(_T_4205, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4207 = eq(btb_rd_addr_p1_f, UInt<5>("h01b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4208 = bits(_T_4207, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4209 = eq(btb_rd_addr_p1_f, UInt<5>("h01c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4210 = bits(_T_4209, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4211 = eq(btb_rd_addr_p1_f, UInt<5>("h01d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4212 = bits(_T_4211, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4213 = eq(btb_rd_addr_p1_f, UInt<5>("h01e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4214 = bits(_T_4213, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4215 = eq(btb_rd_addr_p1_f, UInt<5>("h01f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4216 = bits(_T_4215, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4217 = eq(btb_rd_addr_p1_f, UInt<6>("h020")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4218 = bits(_T_4217, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4219 = eq(btb_rd_addr_p1_f, UInt<6>("h021")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4220 = bits(_T_4219, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4221 = eq(btb_rd_addr_p1_f, UInt<6>("h022")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4222 = bits(_T_4221, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4223 = eq(btb_rd_addr_p1_f, UInt<6>("h023")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4224 = bits(_T_4223, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4225 = eq(btb_rd_addr_p1_f, UInt<6>("h024")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4226 = bits(_T_4225, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4227 = eq(btb_rd_addr_p1_f, UInt<6>("h025")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4228 = bits(_T_4227, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4229 = eq(btb_rd_addr_p1_f, UInt<6>("h026")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4230 = bits(_T_4229, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4231 = eq(btb_rd_addr_p1_f, UInt<6>("h027")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4232 = bits(_T_4231, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4233 = eq(btb_rd_addr_p1_f, UInt<6>("h028")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4234 = bits(_T_4233, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4235 = eq(btb_rd_addr_p1_f, UInt<6>("h029")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4236 = bits(_T_4235, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4237 = eq(btb_rd_addr_p1_f, UInt<6>("h02a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4238 = bits(_T_4237, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4239 = eq(btb_rd_addr_p1_f, UInt<6>("h02b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4240 = bits(_T_4239, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4241 = eq(btb_rd_addr_p1_f, UInt<6>("h02c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4242 = bits(_T_4241, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4243 = eq(btb_rd_addr_p1_f, UInt<6>("h02d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4244 = bits(_T_4243, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4245 = eq(btb_rd_addr_p1_f, UInt<6>("h02e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4246 = bits(_T_4245, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4247 = eq(btb_rd_addr_p1_f, UInt<6>("h02f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4248 = bits(_T_4247, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4249 = eq(btb_rd_addr_p1_f, UInt<6>("h030")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4250 = bits(_T_4249, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4251 = eq(btb_rd_addr_p1_f, UInt<6>("h031")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4252 = bits(_T_4251, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4253 = eq(btb_rd_addr_p1_f, UInt<6>("h032")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4254 = bits(_T_4253, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4255 = eq(btb_rd_addr_p1_f, UInt<6>("h033")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4256 = bits(_T_4255, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4257 = eq(btb_rd_addr_p1_f, UInt<6>("h034")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4258 = bits(_T_4257, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4259 = eq(btb_rd_addr_p1_f, UInt<6>("h035")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4260 = bits(_T_4259, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4261 = eq(btb_rd_addr_p1_f, UInt<6>("h036")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4262 = bits(_T_4261, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4263 = eq(btb_rd_addr_p1_f, UInt<6>("h037")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4264 = bits(_T_4263, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4265 = eq(btb_rd_addr_p1_f, UInt<6>("h038")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4266 = bits(_T_4265, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4267 = eq(btb_rd_addr_p1_f, UInt<6>("h039")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4268 = bits(_T_4267, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4269 = eq(btb_rd_addr_p1_f, UInt<6>("h03a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4270 = bits(_T_4269, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4271 = eq(btb_rd_addr_p1_f, UInt<6>("h03b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4272 = bits(_T_4271, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4273 = eq(btb_rd_addr_p1_f, UInt<6>("h03c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4274 = bits(_T_4273, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4275 = eq(btb_rd_addr_p1_f, UInt<6>("h03d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4276 = bits(_T_4275, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4277 = eq(btb_rd_addr_p1_f, UInt<6>("h03e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4278 = bits(_T_4277, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4279 = eq(btb_rd_addr_p1_f, UInt<6>("h03f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4280 = bits(_T_4279, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4281 = eq(btb_rd_addr_p1_f, UInt<7>("h040")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4282 = bits(_T_4281, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4283 = eq(btb_rd_addr_p1_f, UInt<7>("h041")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4284 = bits(_T_4283, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4285 = eq(btb_rd_addr_p1_f, UInt<7>("h042")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4286 = bits(_T_4285, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4287 = eq(btb_rd_addr_p1_f, UInt<7>("h043")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4288 = bits(_T_4287, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4289 = eq(btb_rd_addr_p1_f, UInt<7>("h044")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4290 = bits(_T_4289, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4291 = eq(btb_rd_addr_p1_f, UInt<7>("h045")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4292 = bits(_T_4291, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4293 = eq(btb_rd_addr_p1_f, UInt<7>("h046")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4294 = bits(_T_4293, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4295 = eq(btb_rd_addr_p1_f, UInt<7>("h047")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4296 = bits(_T_4295, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4297 = eq(btb_rd_addr_p1_f, UInt<7>("h048")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4298 = bits(_T_4297, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4299 = eq(btb_rd_addr_p1_f, UInt<7>("h049")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4300 = bits(_T_4299, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4301 = eq(btb_rd_addr_p1_f, UInt<7>("h04a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4302 = bits(_T_4301, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4303 = eq(btb_rd_addr_p1_f, UInt<7>("h04b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4304 = bits(_T_4303, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4305 = eq(btb_rd_addr_p1_f, UInt<7>("h04c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4306 = bits(_T_4305, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4307 = eq(btb_rd_addr_p1_f, UInt<7>("h04d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4308 = bits(_T_4307, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4309 = eq(btb_rd_addr_p1_f, UInt<7>("h04e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4310 = bits(_T_4309, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4311 = eq(btb_rd_addr_p1_f, UInt<7>("h04f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4312 = bits(_T_4311, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4313 = eq(btb_rd_addr_p1_f, UInt<7>("h050")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4314 = bits(_T_4313, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4315 = eq(btb_rd_addr_p1_f, UInt<7>("h051")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4316 = bits(_T_4315, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4317 = eq(btb_rd_addr_p1_f, UInt<7>("h052")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4318 = bits(_T_4317, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4319 = eq(btb_rd_addr_p1_f, UInt<7>("h053")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4320 = bits(_T_4319, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4321 = eq(btb_rd_addr_p1_f, UInt<7>("h054")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4322 = bits(_T_4321, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4323 = eq(btb_rd_addr_p1_f, UInt<7>("h055")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4324 = bits(_T_4323, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4325 = eq(btb_rd_addr_p1_f, UInt<7>("h056")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4326 = bits(_T_4325, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4327 = eq(btb_rd_addr_p1_f, UInt<7>("h057")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4328 = bits(_T_4327, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4329 = eq(btb_rd_addr_p1_f, UInt<7>("h058")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4330 = bits(_T_4329, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4331 = eq(btb_rd_addr_p1_f, UInt<7>("h059")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4332 = bits(_T_4331, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4333 = eq(btb_rd_addr_p1_f, UInt<7>("h05a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4334 = bits(_T_4333, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4335 = eq(btb_rd_addr_p1_f, UInt<7>("h05b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4336 = bits(_T_4335, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4337 = eq(btb_rd_addr_p1_f, UInt<7>("h05c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4338 = bits(_T_4337, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4339 = eq(btb_rd_addr_p1_f, UInt<7>("h05d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4340 = bits(_T_4339, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4341 = eq(btb_rd_addr_p1_f, UInt<7>("h05e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4342 = bits(_T_4341, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4343 = eq(btb_rd_addr_p1_f, UInt<7>("h05f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4344 = bits(_T_4343, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4345 = eq(btb_rd_addr_p1_f, UInt<7>("h060")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4346 = bits(_T_4345, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4347 = eq(btb_rd_addr_p1_f, UInt<7>("h061")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4348 = bits(_T_4347, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4349 = eq(btb_rd_addr_p1_f, UInt<7>("h062")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4350 = bits(_T_4349, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4351 = eq(btb_rd_addr_p1_f, UInt<7>("h063")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4352 = bits(_T_4351, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4353 = eq(btb_rd_addr_p1_f, UInt<7>("h064")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4354 = bits(_T_4353, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4355 = eq(btb_rd_addr_p1_f, UInt<7>("h065")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4356 = bits(_T_4355, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4357 = eq(btb_rd_addr_p1_f, UInt<7>("h066")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4358 = bits(_T_4357, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4359 = eq(btb_rd_addr_p1_f, UInt<7>("h067")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4360 = bits(_T_4359, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4361 = eq(btb_rd_addr_p1_f, UInt<7>("h068")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4362 = bits(_T_4361, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4363 = eq(btb_rd_addr_p1_f, UInt<7>("h069")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4364 = bits(_T_4363, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4365 = eq(btb_rd_addr_p1_f, UInt<7>("h06a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4366 = bits(_T_4365, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4367 = eq(btb_rd_addr_p1_f, UInt<7>("h06b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4368 = bits(_T_4367, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4369 = eq(btb_rd_addr_p1_f, UInt<7>("h06c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4370 = bits(_T_4369, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4371 = eq(btb_rd_addr_p1_f, UInt<7>("h06d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4372 = bits(_T_4371, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4373 = eq(btb_rd_addr_p1_f, UInt<7>("h06e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4374 = bits(_T_4373, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4375 = eq(btb_rd_addr_p1_f, UInt<7>("h06f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4376 = bits(_T_4375, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4377 = eq(btb_rd_addr_p1_f, UInt<7>("h070")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4378 = bits(_T_4377, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4379 = eq(btb_rd_addr_p1_f, UInt<7>("h071")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4380 = bits(_T_4379, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4381 = eq(btb_rd_addr_p1_f, UInt<7>("h072")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4382 = bits(_T_4381, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4383 = eq(btb_rd_addr_p1_f, UInt<7>("h073")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4384 = bits(_T_4383, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4385 = eq(btb_rd_addr_p1_f, UInt<7>("h074")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4386 = bits(_T_4385, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4387 = eq(btb_rd_addr_p1_f, UInt<7>("h075")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4388 = bits(_T_4387, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4389 = eq(btb_rd_addr_p1_f, UInt<7>("h076")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4390 = bits(_T_4389, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4391 = eq(btb_rd_addr_p1_f, UInt<7>("h077")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4392 = bits(_T_4391, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4393 = eq(btb_rd_addr_p1_f, UInt<7>("h078")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4394 = bits(_T_4393, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4395 = eq(btb_rd_addr_p1_f, UInt<7>("h079")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4396 = bits(_T_4395, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4397 = eq(btb_rd_addr_p1_f, UInt<7>("h07a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4398 = bits(_T_4397, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4399 = eq(btb_rd_addr_p1_f, UInt<7>("h07b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4400 = bits(_T_4399, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4401 = eq(btb_rd_addr_p1_f, UInt<7>("h07c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4402 = bits(_T_4401, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4403 = eq(btb_rd_addr_p1_f, UInt<7>("h07d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4404 = bits(_T_4403, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4405 = eq(btb_rd_addr_p1_f, UInt<7>("h07e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4406 = bits(_T_4405, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4407 = eq(btb_rd_addr_p1_f, UInt<7>("h07f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4408 = bits(_T_4407, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4409 = eq(btb_rd_addr_p1_f, UInt<8>("h080")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4410 = bits(_T_4409, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4411 = eq(btb_rd_addr_p1_f, UInt<8>("h081")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4412 = bits(_T_4411, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4413 = eq(btb_rd_addr_p1_f, UInt<8>("h082")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4414 = bits(_T_4413, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4415 = eq(btb_rd_addr_p1_f, UInt<8>("h083")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4416 = bits(_T_4415, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4417 = eq(btb_rd_addr_p1_f, UInt<8>("h084")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4418 = bits(_T_4417, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4419 = eq(btb_rd_addr_p1_f, UInt<8>("h085")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4420 = bits(_T_4419, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4421 = eq(btb_rd_addr_p1_f, UInt<8>("h086")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4422 = bits(_T_4421, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4423 = eq(btb_rd_addr_p1_f, UInt<8>("h087")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4424 = bits(_T_4423, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4425 = eq(btb_rd_addr_p1_f, UInt<8>("h088")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4426 = bits(_T_4425, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4427 = eq(btb_rd_addr_p1_f, UInt<8>("h089")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4428 = bits(_T_4427, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4429 = eq(btb_rd_addr_p1_f, UInt<8>("h08a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4430 = bits(_T_4429, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4431 = eq(btb_rd_addr_p1_f, UInt<8>("h08b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4432 = bits(_T_4431, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4433 = eq(btb_rd_addr_p1_f, UInt<8>("h08c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4434 = bits(_T_4433, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4435 = eq(btb_rd_addr_p1_f, UInt<8>("h08d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4436 = bits(_T_4435, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4437 = eq(btb_rd_addr_p1_f, UInt<8>("h08e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4438 = bits(_T_4437, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4439 = eq(btb_rd_addr_p1_f, UInt<8>("h08f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4440 = bits(_T_4439, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4441 = eq(btb_rd_addr_p1_f, UInt<8>("h090")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4442 = bits(_T_4441, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4443 = eq(btb_rd_addr_p1_f, UInt<8>("h091")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4444 = bits(_T_4443, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4445 = eq(btb_rd_addr_p1_f, UInt<8>("h092")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4446 = bits(_T_4445, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4447 = eq(btb_rd_addr_p1_f, UInt<8>("h093")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4448 = bits(_T_4447, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4449 = eq(btb_rd_addr_p1_f, UInt<8>("h094")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4450 = bits(_T_4449, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4451 = eq(btb_rd_addr_p1_f, UInt<8>("h095")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4452 = bits(_T_4451, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4453 = eq(btb_rd_addr_p1_f, UInt<8>("h096")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4454 = bits(_T_4453, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4455 = eq(btb_rd_addr_p1_f, UInt<8>("h097")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4456 = bits(_T_4455, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4457 = eq(btb_rd_addr_p1_f, UInt<8>("h098")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4458 = bits(_T_4457, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4459 = eq(btb_rd_addr_p1_f, UInt<8>("h099")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4460 = bits(_T_4459, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4461 = eq(btb_rd_addr_p1_f, UInt<8>("h09a")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4462 = bits(_T_4461, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4463 = eq(btb_rd_addr_p1_f, UInt<8>("h09b")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4464 = bits(_T_4463, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4465 = eq(btb_rd_addr_p1_f, UInt<8>("h09c")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4466 = bits(_T_4465, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4467 = eq(btb_rd_addr_p1_f, UInt<8>("h09d")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4468 = bits(_T_4467, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4469 = eq(btb_rd_addr_p1_f, UInt<8>("h09e")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4470 = bits(_T_4469, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4471 = eq(btb_rd_addr_p1_f, UInt<8>("h09f")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4472 = bits(_T_4471, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4473 = eq(btb_rd_addr_p1_f, UInt<8>("h0a0")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4474 = bits(_T_4473, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4475 = eq(btb_rd_addr_p1_f, UInt<8>("h0a1")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4476 = bits(_T_4475, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4477 = eq(btb_rd_addr_p1_f, UInt<8>("h0a2")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4478 = bits(_T_4477, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4479 = eq(btb_rd_addr_p1_f, UInt<8>("h0a3")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4480 = bits(_T_4479, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4481 = eq(btb_rd_addr_p1_f, UInt<8>("h0a4")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4482 = bits(_T_4481, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4483 = eq(btb_rd_addr_p1_f, UInt<8>("h0a5")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4484 = bits(_T_4483, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4485 = eq(btb_rd_addr_p1_f, UInt<8>("h0a6")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4486 = bits(_T_4485, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4487 = eq(btb_rd_addr_p1_f, UInt<8>("h0a7")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4488 = bits(_T_4487, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4489 = eq(btb_rd_addr_p1_f, UInt<8>("h0a8")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4490 = bits(_T_4489, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4491 = eq(btb_rd_addr_p1_f, UInt<8>("h0a9")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4492 = bits(_T_4491, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4493 = eq(btb_rd_addr_p1_f, UInt<8>("h0aa")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4494 = bits(_T_4493, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4495 = eq(btb_rd_addr_p1_f, UInt<8>("h0ab")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4496 = bits(_T_4495, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4497 = eq(btb_rd_addr_p1_f, UInt<8>("h0ac")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4498 = bits(_T_4497, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4499 = eq(btb_rd_addr_p1_f, UInt<8>("h0ad")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4500 = bits(_T_4499, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4501 = eq(btb_rd_addr_p1_f, UInt<8>("h0ae")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4502 = bits(_T_4501, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4503 = eq(btb_rd_addr_p1_f, UInt<8>("h0af")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4504 = bits(_T_4503, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4505 = eq(btb_rd_addr_p1_f, UInt<8>("h0b0")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4506 = bits(_T_4505, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4507 = eq(btb_rd_addr_p1_f, UInt<8>("h0b1")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4508 = bits(_T_4507, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4509 = eq(btb_rd_addr_p1_f, UInt<8>("h0b2")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4510 = bits(_T_4509, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4511 = eq(btb_rd_addr_p1_f, UInt<8>("h0b3")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4512 = bits(_T_4511, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4513 = eq(btb_rd_addr_p1_f, UInt<8>("h0b4")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4514 = bits(_T_4513, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4515 = eq(btb_rd_addr_p1_f, UInt<8>("h0b5")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4516 = bits(_T_4515, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4517 = eq(btb_rd_addr_p1_f, UInt<8>("h0b6")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4518 = bits(_T_4517, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4519 = eq(btb_rd_addr_p1_f, UInt<8>("h0b7")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4520 = bits(_T_4519, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4521 = eq(btb_rd_addr_p1_f, UInt<8>("h0b8")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4522 = bits(_T_4521, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4523 = eq(btb_rd_addr_p1_f, UInt<8>("h0b9")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4524 = bits(_T_4523, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4525 = eq(btb_rd_addr_p1_f, UInt<8>("h0ba")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4526 = bits(_T_4525, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4527 = eq(btb_rd_addr_p1_f, UInt<8>("h0bb")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4528 = bits(_T_4527, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4529 = eq(btb_rd_addr_p1_f, UInt<8>("h0bc")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4530 = bits(_T_4529, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4531 = eq(btb_rd_addr_p1_f, UInt<8>("h0bd")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4532 = bits(_T_4531, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4533 = eq(btb_rd_addr_p1_f, UInt<8>("h0be")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4534 = bits(_T_4533, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4535 = eq(btb_rd_addr_p1_f, UInt<8>("h0bf")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4536 = bits(_T_4535, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4537 = eq(btb_rd_addr_p1_f, UInt<8>("h0c0")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4538 = bits(_T_4537, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4539 = eq(btb_rd_addr_p1_f, UInt<8>("h0c1")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4540 = bits(_T_4539, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4541 = eq(btb_rd_addr_p1_f, UInt<8>("h0c2")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4542 = bits(_T_4541, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4543 = eq(btb_rd_addr_p1_f, UInt<8>("h0c3")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4544 = bits(_T_4543, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4545 = eq(btb_rd_addr_p1_f, UInt<8>("h0c4")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4546 = bits(_T_4545, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4547 = eq(btb_rd_addr_p1_f, UInt<8>("h0c5")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4548 = bits(_T_4547, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4549 = eq(btb_rd_addr_p1_f, UInt<8>("h0c6")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4550 = bits(_T_4549, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4551 = eq(btb_rd_addr_p1_f, UInt<8>("h0c7")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4552 = bits(_T_4551, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4553 = eq(btb_rd_addr_p1_f, UInt<8>("h0c8")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4554 = bits(_T_4553, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4555 = eq(btb_rd_addr_p1_f, UInt<8>("h0c9")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4556 = bits(_T_4555, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4557 = eq(btb_rd_addr_p1_f, UInt<8>("h0ca")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4558 = bits(_T_4557, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4559 = eq(btb_rd_addr_p1_f, UInt<8>("h0cb")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4560 = bits(_T_4559, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4561 = eq(btb_rd_addr_p1_f, UInt<8>("h0cc")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4562 = bits(_T_4561, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4563 = eq(btb_rd_addr_p1_f, UInt<8>("h0cd")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4564 = bits(_T_4563, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4565 = eq(btb_rd_addr_p1_f, UInt<8>("h0ce")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4566 = bits(_T_4565, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4567 = eq(btb_rd_addr_p1_f, UInt<8>("h0cf")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4568 = bits(_T_4567, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4569 = eq(btb_rd_addr_p1_f, UInt<8>("h0d0")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4570 = bits(_T_4569, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4571 = eq(btb_rd_addr_p1_f, UInt<8>("h0d1")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4572 = bits(_T_4571, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4573 = eq(btb_rd_addr_p1_f, UInt<8>("h0d2")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4574 = bits(_T_4573, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4575 = eq(btb_rd_addr_p1_f, UInt<8>("h0d3")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4576 = bits(_T_4575, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4577 = eq(btb_rd_addr_p1_f, UInt<8>("h0d4")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4578 = bits(_T_4577, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4579 = eq(btb_rd_addr_p1_f, UInt<8>("h0d5")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4580 = bits(_T_4579, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4581 = eq(btb_rd_addr_p1_f, UInt<8>("h0d6")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4582 = bits(_T_4581, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4583 = eq(btb_rd_addr_p1_f, UInt<8>("h0d7")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4584 = bits(_T_4583, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4585 = eq(btb_rd_addr_p1_f, UInt<8>("h0d8")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4586 = bits(_T_4585, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4587 = eq(btb_rd_addr_p1_f, UInt<8>("h0d9")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4588 = bits(_T_4587, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4589 = eq(btb_rd_addr_p1_f, UInt<8>("h0da")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4590 = bits(_T_4589, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4591 = eq(btb_rd_addr_p1_f, UInt<8>("h0db")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4592 = bits(_T_4591, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4593 = eq(btb_rd_addr_p1_f, UInt<8>("h0dc")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4594 = bits(_T_4593, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4595 = eq(btb_rd_addr_p1_f, UInt<8>("h0dd")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4596 = bits(_T_4595, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4597 = eq(btb_rd_addr_p1_f, UInt<8>("h0de")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4598 = bits(_T_4597, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4599 = eq(btb_rd_addr_p1_f, UInt<8>("h0df")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4600 = bits(_T_4599, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4601 = eq(btb_rd_addr_p1_f, UInt<8>("h0e0")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4602 = bits(_T_4601, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4603 = eq(btb_rd_addr_p1_f, UInt<8>("h0e1")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4604 = bits(_T_4603, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4605 = eq(btb_rd_addr_p1_f, UInt<8>("h0e2")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4606 = bits(_T_4605, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4607 = eq(btb_rd_addr_p1_f, UInt<8>("h0e3")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4608 = bits(_T_4607, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4609 = eq(btb_rd_addr_p1_f, UInt<8>("h0e4")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4610 = bits(_T_4609, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4611 = eq(btb_rd_addr_p1_f, UInt<8>("h0e5")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4612 = bits(_T_4611, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4613 = eq(btb_rd_addr_p1_f, UInt<8>("h0e6")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4614 = bits(_T_4613, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4615 = eq(btb_rd_addr_p1_f, UInt<8>("h0e7")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4616 = bits(_T_4615, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4617 = eq(btb_rd_addr_p1_f, UInt<8>("h0e8")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4618 = bits(_T_4617, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4619 = eq(btb_rd_addr_p1_f, UInt<8>("h0e9")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4620 = bits(_T_4619, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4621 = eq(btb_rd_addr_p1_f, UInt<8>("h0ea")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4622 = bits(_T_4621, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4623 = eq(btb_rd_addr_p1_f, UInt<8>("h0eb")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4624 = bits(_T_4623, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4625 = eq(btb_rd_addr_p1_f, UInt<8>("h0ec")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4626 = bits(_T_4625, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4627 = eq(btb_rd_addr_p1_f, UInt<8>("h0ed")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4628 = bits(_T_4627, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4629 = eq(btb_rd_addr_p1_f, UInt<8>("h0ee")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4630 = bits(_T_4629, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4631 = eq(btb_rd_addr_p1_f, UInt<8>("h0ef")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4632 = bits(_T_4631, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4633 = eq(btb_rd_addr_p1_f, UInt<8>("h0f0")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4634 = bits(_T_4633, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4635 = eq(btb_rd_addr_p1_f, UInt<8>("h0f1")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4636 = bits(_T_4635, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4637 = eq(btb_rd_addr_p1_f, UInt<8>("h0f2")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4638 = bits(_T_4637, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4639 = eq(btb_rd_addr_p1_f, UInt<8>("h0f3")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4640 = bits(_T_4639, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4641 = eq(btb_rd_addr_p1_f, UInt<8>("h0f4")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4642 = bits(_T_4641, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4643 = eq(btb_rd_addr_p1_f, UInt<8>("h0f5")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4644 = bits(_T_4643, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4645 = eq(btb_rd_addr_p1_f, UInt<8>("h0f6")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4646 = bits(_T_4645, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4647 = eq(btb_rd_addr_p1_f, UInt<8>("h0f7")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4648 = bits(_T_4647, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4649 = eq(btb_rd_addr_p1_f, UInt<8>("h0f8")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4650 = bits(_T_4649, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4651 = eq(btb_rd_addr_p1_f, UInt<8>("h0f9")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4652 = bits(_T_4651, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4653 = eq(btb_rd_addr_p1_f, UInt<8>("h0fa")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4654 = bits(_T_4653, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4655 = eq(btb_rd_addr_p1_f, UInt<8>("h0fb")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4656 = bits(_T_4655, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4657 = eq(btb_rd_addr_p1_f, UInt<8>("h0fc")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4658 = bits(_T_4657, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4659 = eq(btb_rd_addr_p1_f, UInt<8>("h0fd")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4660 = bits(_T_4659, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4661 = eq(btb_rd_addr_p1_f, UInt<8>("h0fe")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4662 = bits(_T_4661, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4663 = eq(btb_rd_addr_p1_f, UInt<8>("h0ff")) @[el2_ifu_bp_ctl.scala 366:83]
|
|
node _T_4664 = bits(_T_4663, 0, 0) @[el2_ifu_bp_ctl.scala 366:91]
|
|
node _T_4665 = mux(_T_4154, btb_bank0_rd_data_way0_out_0, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4666 = mux(_T_4156, btb_bank0_rd_data_way0_out_1, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4667 = mux(_T_4158, btb_bank0_rd_data_way0_out_2, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4668 = mux(_T_4160, btb_bank0_rd_data_way0_out_3, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4669 = mux(_T_4162, btb_bank0_rd_data_way0_out_4, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4670 = mux(_T_4164, btb_bank0_rd_data_way0_out_5, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4671 = mux(_T_4166, btb_bank0_rd_data_way0_out_6, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4672 = mux(_T_4168, btb_bank0_rd_data_way0_out_7, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4673 = mux(_T_4170, btb_bank0_rd_data_way0_out_8, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4674 = mux(_T_4172, btb_bank0_rd_data_way0_out_9, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4675 = mux(_T_4174, btb_bank0_rd_data_way0_out_10, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4676 = mux(_T_4176, btb_bank0_rd_data_way0_out_11, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4677 = mux(_T_4178, btb_bank0_rd_data_way0_out_12, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4678 = mux(_T_4180, btb_bank0_rd_data_way0_out_13, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4679 = mux(_T_4182, btb_bank0_rd_data_way0_out_14, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4680 = mux(_T_4184, btb_bank0_rd_data_way0_out_15, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4681 = mux(_T_4186, btb_bank0_rd_data_way0_out_16, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4682 = mux(_T_4188, btb_bank0_rd_data_way0_out_17, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4683 = mux(_T_4190, btb_bank0_rd_data_way0_out_18, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4684 = mux(_T_4192, btb_bank0_rd_data_way0_out_19, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4685 = mux(_T_4194, btb_bank0_rd_data_way0_out_20, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4686 = mux(_T_4196, btb_bank0_rd_data_way0_out_21, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4687 = mux(_T_4198, btb_bank0_rd_data_way0_out_22, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4688 = mux(_T_4200, btb_bank0_rd_data_way0_out_23, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4689 = mux(_T_4202, btb_bank0_rd_data_way0_out_24, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4690 = mux(_T_4204, btb_bank0_rd_data_way0_out_25, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4691 = mux(_T_4206, btb_bank0_rd_data_way0_out_26, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4692 = mux(_T_4208, btb_bank0_rd_data_way0_out_27, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4693 = mux(_T_4210, btb_bank0_rd_data_way0_out_28, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4694 = mux(_T_4212, btb_bank0_rd_data_way0_out_29, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4695 = mux(_T_4214, btb_bank0_rd_data_way0_out_30, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4696 = mux(_T_4216, btb_bank0_rd_data_way0_out_31, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4697 = mux(_T_4218, btb_bank0_rd_data_way0_out_32, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4698 = mux(_T_4220, btb_bank0_rd_data_way0_out_33, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4699 = mux(_T_4222, btb_bank0_rd_data_way0_out_34, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4700 = mux(_T_4224, btb_bank0_rd_data_way0_out_35, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4701 = mux(_T_4226, btb_bank0_rd_data_way0_out_36, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4702 = mux(_T_4228, btb_bank0_rd_data_way0_out_37, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4703 = mux(_T_4230, btb_bank0_rd_data_way0_out_38, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4704 = mux(_T_4232, btb_bank0_rd_data_way0_out_39, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4705 = mux(_T_4234, btb_bank0_rd_data_way0_out_40, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4706 = mux(_T_4236, btb_bank0_rd_data_way0_out_41, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4707 = mux(_T_4238, btb_bank0_rd_data_way0_out_42, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4708 = mux(_T_4240, btb_bank0_rd_data_way0_out_43, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4709 = mux(_T_4242, btb_bank0_rd_data_way0_out_44, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4710 = mux(_T_4244, btb_bank0_rd_data_way0_out_45, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4711 = mux(_T_4246, btb_bank0_rd_data_way0_out_46, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4712 = mux(_T_4248, btb_bank0_rd_data_way0_out_47, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4713 = mux(_T_4250, btb_bank0_rd_data_way0_out_48, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4714 = mux(_T_4252, btb_bank0_rd_data_way0_out_49, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4715 = mux(_T_4254, btb_bank0_rd_data_way0_out_50, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4716 = mux(_T_4256, btb_bank0_rd_data_way0_out_51, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4717 = mux(_T_4258, btb_bank0_rd_data_way0_out_52, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4718 = mux(_T_4260, btb_bank0_rd_data_way0_out_53, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4719 = mux(_T_4262, btb_bank0_rd_data_way0_out_54, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4720 = mux(_T_4264, btb_bank0_rd_data_way0_out_55, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4721 = mux(_T_4266, btb_bank0_rd_data_way0_out_56, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4722 = mux(_T_4268, btb_bank0_rd_data_way0_out_57, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4723 = mux(_T_4270, btb_bank0_rd_data_way0_out_58, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4724 = mux(_T_4272, btb_bank0_rd_data_way0_out_59, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4725 = mux(_T_4274, btb_bank0_rd_data_way0_out_60, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4726 = mux(_T_4276, btb_bank0_rd_data_way0_out_61, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4727 = mux(_T_4278, btb_bank0_rd_data_way0_out_62, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4728 = mux(_T_4280, btb_bank0_rd_data_way0_out_63, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4729 = mux(_T_4282, btb_bank0_rd_data_way0_out_64, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4730 = mux(_T_4284, btb_bank0_rd_data_way0_out_65, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4731 = mux(_T_4286, btb_bank0_rd_data_way0_out_66, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4732 = mux(_T_4288, btb_bank0_rd_data_way0_out_67, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4733 = mux(_T_4290, btb_bank0_rd_data_way0_out_68, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4734 = mux(_T_4292, btb_bank0_rd_data_way0_out_69, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4735 = mux(_T_4294, btb_bank0_rd_data_way0_out_70, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4736 = mux(_T_4296, btb_bank0_rd_data_way0_out_71, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4737 = mux(_T_4298, btb_bank0_rd_data_way0_out_72, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4738 = mux(_T_4300, btb_bank0_rd_data_way0_out_73, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4739 = mux(_T_4302, btb_bank0_rd_data_way0_out_74, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4740 = mux(_T_4304, btb_bank0_rd_data_way0_out_75, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4741 = mux(_T_4306, btb_bank0_rd_data_way0_out_76, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4742 = mux(_T_4308, btb_bank0_rd_data_way0_out_77, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4743 = mux(_T_4310, btb_bank0_rd_data_way0_out_78, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4744 = mux(_T_4312, btb_bank0_rd_data_way0_out_79, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4745 = mux(_T_4314, btb_bank0_rd_data_way0_out_80, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4746 = mux(_T_4316, btb_bank0_rd_data_way0_out_81, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4747 = mux(_T_4318, btb_bank0_rd_data_way0_out_82, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4748 = mux(_T_4320, btb_bank0_rd_data_way0_out_83, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4749 = mux(_T_4322, btb_bank0_rd_data_way0_out_84, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4750 = mux(_T_4324, btb_bank0_rd_data_way0_out_85, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4751 = mux(_T_4326, btb_bank0_rd_data_way0_out_86, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4752 = mux(_T_4328, btb_bank0_rd_data_way0_out_87, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4753 = mux(_T_4330, btb_bank0_rd_data_way0_out_88, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4754 = mux(_T_4332, btb_bank0_rd_data_way0_out_89, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4755 = mux(_T_4334, btb_bank0_rd_data_way0_out_90, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4756 = mux(_T_4336, btb_bank0_rd_data_way0_out_91, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4757 = mux(_T_4338, btb_bank0_rd_data_way0_out_92, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4758 = mux(_T_4340, btb_bank0_rd_data_way0_out_93, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4759 = mux(_T_4342, btb_bank0_rd_data_way0_out_94, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4760 = mux(_T_4344, btb_bank0_rd_data_way0_out_95, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4761 = mux(_T_4346, btb_bank0_rd_data_way0_out_96, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4762 = mux(_T_4348, btb_bank0_rd_data_way0_out_97, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4763 = mux(_T_4350, btb_bank0_rd_data_way0_out_98, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4764 = mux(_T_4352, btb_bank0_rd_data_way0_out_99, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4765 = mux(_T_4354, btb_bank0_rd_data_way0_out_100, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4766 = mux(_T_4356, btb_bank0_rd_data_way0_out_101, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4767 = mux(_T_4358, btb_bank0_rd_data_way0_out_102, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4768 = mux(_T_4360, btb_bank0_rd_data_way0_out_103, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4769 = mux(_T_4362, btb_bank0_rd_data_way0_out_104, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4770 = mux(_T_4364, btb_bank0_rd_data_way0_out_105, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4771 = mux(_T_4366, btb_bank0_rd_data_way0_out_106, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4772 = mux(_T_4368, btb_bank0_rd_data_way0_out_107, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4773 = mux(_T_4370, btb_bank0_rd_data_way0_out_108, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4774 = mux(_T_4372, btb_bank0_rd_data_way0_out_109, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4775 = mux(_T_4374, btb_bank0_rd_data_way0_out_110, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4776 = mux(_T_4376, btb_bank0_rd_data_way0_out_111, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4777 = mux(_T_4378, btb_bank0_rd_data_way0_out_112, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4778 = mux(_T_4380, btb_bank0_rd_data_way0_out_113, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4779 = mux(_T_4382, btb_bank0_rd_data_way0_out_114, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4780 = mux(_T_4384, btb_bank0_rd_data_way0_out_115, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4781 = mux(_T_4386, btb_bank0_rd_data_way0_out_116, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4782 = mux(_T_4388, btb_bank0_rd_data_way0_out_117, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4783 = mux(_T_4390, btb_bank0_rd_data_way0_out_118, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4784 = mux(_T_4392, btb_bank0_rd_data_way0_out_119, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4785 = mux(_T_4394, btb_bank0_rd_data_way0_out_120, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4786 = mux(_T_4396, btb_bank0_rd_data_way0_out_121, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4787 = mux(_T_4398, btb_bank0_rd_data_way0_out_122, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4788 = mux(_T_4400, btb_bank0_rd_data_way0_out_123, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4789 = mux(_T_4402, btb_bank0_rd_data_way0_out_124, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4790 = mux(_T_4404, btb_bank0_rd_data_way0_out_125, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4791 = mux(_T_4406, btb_bank0_rd_data_way0_out_126, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4792 = mux(_T_4408, btb_bank0_rd_data_way0_out_127, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4793 = mux(_T_4410, btb_bank0_rd_data_way0_out_128, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4794 = mux(_T_4412, btb_bank0_rd_data_way0_out_129, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4795 = mux(_T_4414, btb_bank0_rd_data_way0_out_130, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4796 = mux(_T_4416, btb_bank0_rd_data_way0_out_131, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4797 = mux(_T_4418, btb_bank0_rd_data_way0_out_132, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4798 = mux(_T_4420, btb_bank0_rd_data_way0_out_133, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4799 = mux(_T_4422, btb_bank0_rd_data_way0_out_134, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4800 = mux(_T_4424, btb_bank0_rd_data_way0_out_135, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4801 = mux(_T_4426, btb_bank0_rd_data_way0_out_136, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4802 = mux(_T_4428, btb_bank0_rd_data_way0_out_137, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4803 = mux(_T_4430, btb_bank0_rd_data_way0_out_138, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4804 = mux(_T_4432, btb_bank0_rd_data_way0_out_139, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4805 = mux(_T_4434, btb_bank0_rd_data_way0_out_140, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4806 = mux(_T_4436, btb_bank0_rd_data_way0_out_141, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4807 = mux(_T_4438, btb_bank0_rd_data_way0_out_142, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4808 = mux(_T_4440, btb_bank0_rd_data_way0_out_143, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4809 = mux(_T_4442, btb_bank0_rd_data_way0_out_144, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4810 = mux(_T_4444, btb_bank0_rd_data_way0_out_145, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4811 = mux(_T_4446, btb_bank0_rd_data_way0_out_146, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4812 = mux(_T_4448, btb_bank0_rd_data_way0_out_147, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4813 = mux(_T_4450, btb_bank0_rd_data_way0_out_148, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4814 = mux(_T_4452, btb_bank0_rd_data_way0_out_149, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4815 = mux(_T_4454, btb_bank0_rd_data_way0_out_150, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4816 = mux(_T_4456, btb_bank0_rd_data_way0_out_151, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4817 = mux(_T_4458, btb_bank0_rd_data_way0_out_152, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4818 = mux(_T_4460, btb_bank0_rd_data_way0_out_153, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4819 = mux(_T_4462, btb_bank0_rd_data_way0_out_154, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4820 = mux(_T_4464, btb_bank0_rd_data_way0_out_155, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4821 = mux(_T_4466, btb_bank0_rd_data_way0_out_156, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4822 = mux(_T_4468, btb_bank0_rd_data_way0_out_157, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4823 = mux(_T_4470, btb_bank0_rd_data_way0_out_158, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4824 = mux(_T_4472, btb_bank0_rd_data_way0_out_159, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4825 = mux(_T_4474, btb_bank0_rd_data_way0_out_160, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4826 = mux(_T_4476, btb_bank0_rd_data_way0_out_161, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4827 = mux(_T_4478, btb_bank0_rd_data_way0_out_162, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4828 = mux(_T_4480, btb_bank0_rd_data_way0_out_163, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4829 = mux(_T_4482, btb_bank0_rd_data_way0_out_164, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4830 = mux(_T_4484, btb_bank0_rd_data_way0_out_165, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4831 = mux(_T_4486, btb_bank0_rd_data_way0_out_166, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4832 = mux(_T_4488, btb_bank0_rd_data_way0_out_167, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4833 = mux(_T_4490, btb_bank0_rd_data_way0_out_168, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4834 = mux(_T_4492, btb_bank0_rd_data_way0_out_169, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4835 = mux(_T_4494, btb_bank0_rd_data_way0_out_170, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4836 = mux(_T_4496, btb_bank0_rd_data_way0_out_171, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4837 = mux(_T_4498, btb_bank0_rd_data_way0_out_172, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4838 = mux(_T_4500, btb_bank0_rd_data_way0_out_173, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4839 = mux(_T_4502, btb_bank0_rd_data_way0_out_174, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4840 = mux(_T_4504, btb_bank0_rd_data_way0_out_175, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4841 = mux(_T_4506, btb_bank0_rd_data_way0_out_176, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4842 = mux(_T_4508, btb_bank0_rd_data_way0_out_177, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4843 = mux(_T_4510, btb_bank0_rd_data_way0_out_178, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4844 = mux(_T_4512, btb_bank0_rd_data_way0_out_179, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4845 = mux(_T_4514, btb_bank0_rd_data_way0_out_180, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4846 = mux(_T_4516, btb_bank0_rd_data_way0_out_181, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4847 = mux(_T_4518, btb_bank0_rd_data_way0_out_182, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4848 = mux(_T_4520, btb_bank0_rd_data_way0_out_183, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4849 = mux(_T_4522, btb_bank0_rd_data_way0_out_184, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4850 = mux(_T_4524, btb_bank0_rd_data_way0_out_185, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4851 = mux(_T_4526, btb_bank0_rd_data_way0_out_186, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4852 = mux(_T_4528, btb_bank0_rd_data_way0_out_187, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4853 = mux(_T_4530, btb_bank0_rd_data_way0_out_188, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4854 = mux(_T_4532, btb_bank0_rd_data_way0_out_189, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4855 = mux(_T_4534, btb_bank0_rd_data_way0_out_190, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4856 = mux(_T_4536, btb_bank0_rd_data_way0_out_191, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4857 = mux(_T_4538, btb_bank0_rd_data_way0_out_192, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4858 = mux(_T_4540, btb_bank0_rd_data_way0_out_193, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4859 = mux(_T_4542, btb_bank0_rd_data_way0_out_194, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4860 = mux(_T_4544, btb_bank0_rd_data_way0_out_195, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4861 = mux(_T_4546, btb_bank0_rd_data_way0_out_196, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4862 = mux(_T_4548, btb_bank0_rd_data_way0_out_197, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4863 = mux(_T_4550, btb_bank0_rd_data_way0_out_198, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4864 = mux(_T_4552, btb_bank0_rd_data_way0_out_199, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4865 = mux(_T_4554, btb_bank0_rd_data_way0_out_200, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4866 = mux(_T_4556, btb_bank0_rd_data_way0_out_201, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4867 = mux(_T_4558, btb_bank0_rd_data_way0_out_202, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4868 = mux(_T_4560, btb_bank0_rd_data_way0_out_203, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4869 = mux(_T_4562, btb_bank0_rd_data_way0_out_204, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4870 = mux(_T_4564, btb_bank0_rd_data_way0_out_205, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4871 = mux(_T_4566, btb_bank0_rd_data_way0_out_206, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4872 = mux(_T_4568, btb_bank0_rd_data_way0_out_207, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4873 = mux(_T_4570, btb_bank0_rd_data_way0_out_208, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4874 = mux(_T_4572, btb_bank0_rd_data_way0_out_209, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4875 = mux(_T_4574, btb_bank0_rd_data_way0_out_210, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4876 = mux(_T_4576, btb_bank0_rd_data_way0_out_211, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4877 = mux(_T_4578, btb_bank0_rd_data_way0_out_212, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4878 = mux(_T_4580, btb_bank0_rd_data_way0_out_213, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4879 = mux(_T_4582, btb_bank0_rd_data_way0_out_214, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4880 = mux(_T_4584, btb_bank0_rd_data_way0_out_215, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4881 = mux(_T_4586, btb_bank0_rd_data_way0_out_216, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4882 = mux(_T_4588, btb_bank0_rd_data_way0_out_217, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4883 = mux(_T_4590, btb_bank0_rd_data_way0_out_218, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4884 = mux(_T_4592, btb_bank0_rd_data_way0_out_219, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4885 = mux(_T_4594, btb_bank0_rd_data_way0_out_220, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4886 = mux(_T_4596, btb_bank0_rd_data_way0_out_221, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4887 = mux(_T_4598, btb_bank0_rd_data_way0_out_222, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4888 = mux(_T_4600, btb_bank0_rd_data_way0_out_223, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4889 = mux(_T_4602, btb_bank0_rd_data_way0_out_224, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4890 = mux(_T_4604, btb_bank0_rd_data_way0_out_225, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4891 = mux(_T_4606, btb_bank0_rd_data_way0_out_226, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4892 = mux(_T_4608, btb_bank0_rd_data_way0_out_227, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4893 = mux(_T_4610, btb_bank0_rd_data_way0_out_228, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4894 = mux(_T_4612, btb_bank0_rd_data_way0_out_229, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4895 = mux(_T_4614, btb_bank0_rd_data_way0_out_230, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4896 = mux(_T_4616, btb_bank0_rd_data_way0_out_231, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4897 = mux(_T_4618, btb_bank0_rd_data_way0_out_232, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4898 = mux(_T_4620, btb_bank0_rd_data_way0_out_233, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4899 = mux(_T_4622, btb_bank0_rd_data_way0_out_234, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4900 = mux(_T_4624, btb_bank0_rd_data_way0_out_235, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4901 = mux(_T_4626, btb_bank0_rd_data_way0_out_236, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4902 = mux(_T_4628, btb_bank0_rd_data_way0_out_237, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4903 = mux(_T_4630, btb_bank0_rd_data_way0_out_238, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4904 = mux(_T_4632, btb_bank0_rd_data_way0_out_239, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4905 = mux(_T_4634, btb_bank0_rd_data_way0_out_240, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4906 = mux(_T_4636, btb_bank0_rd_data_way0_out_241, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4907 = mux(_T_4638, btb_bank0_rd_data_way0_out_242, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4908 = mux(_T_4640, btb_bank0_rd_data_way0_out_243, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4909 = mux(_T_4642, btb_bank0_rd_data_way0_out_244, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4910 = mux(_T_4644, btb_bank0_rd_data_way0_out_245, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4911 = mux(_T_4646, btb_bank0_rd_data_way0_out_246, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4912 = mux(_T_4648, btb_bank0_rd_data_way0_out_247, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4913 = mux(_T_4650, btb_bank0_rd_data_way0_out_248, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4914 = mux(_T_4652, btb_bank0_rd_data_way0_out_249, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4915 = mux(_T_4654, btb_bank0_rd_data_way0_out_250, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4916 = mux(_T_4656, btb_bank0_rd_data_way0_out_251, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4917 = mux(_T_4658, btb_bank0_rd_data_way0_out_252, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4918 = mux(_T_4660, btb_bank0_rd_data_way0_out_253, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4919 = mux(_T_4662, btb_bank0_rd_data_way0_out_254, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4920 = mux(_T_4664, btb_bank0_rd_data_way0_out_255, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_4921 = or(_T_4665, _T_4666) @[Mux.scala 27:72]
|
|
node _T_4922 = or(_T_4921, _T_4667) @[Mux.scala 27:72]
|
|
node _T_4923 = or(_T_4922, _T_4668) @[Mux.scala 27:72]
|
|
node _T_4924 = or(_T_4923, _T_4669) @[Mux.scala 27:72]
|
|
node _T_4925 = or(_T_4924, _T_4670) @[Mux.scala 27:72]
|
|
node _T_4926 = or(_T_4925, _T_4671) @[Mux.scala 27:72]
|
|
node _T_4927 = or(_T_4926, _T_4672) @[Mux.scala 27:72]
|
|
node _T_4928 = or(_T_4927, _T_4673) @[Mux.scala 27:72]
|
|
node _T_4929 = or(_T_4928, _T_4674) @[Mux.scala 27:72]
|
|
node _T_4930 = or(_T_4929, _T_4675) @[Mux.scala 27:72]
|
|
node _T_4931 = or(_T_4930, _T_4676) @[Mux.scala 27:72]
|
|
node _T_4932 = or(_T_4931, _T_4677) @[Mux.scala 27:72]
|
|
node _T_4933 = or(_T_4932, _T_4678) @[Mux.scala 27:72]
|
|
node _T_4934 = or(_T_4933, _T_4679) @[Mux.scala 27:72]
|
|
node _T_4935 = or(_T_4934, _T_4680) @[Mux.scala 27:72]
|
|
node _T_4936 = or(_T_4935, _T_4681) @[Mux.scala 27:72]
|
|
node _T_4937 = or(_T_4936, _T_4682) @[Mux.scala 27:72]
|
|
node _T_4938 = or(_T_4937, _T_4683) @[Mux.scala 27:72]
|
|
node _T_4939 = or(_T_4938, _T_4684) @[Mux.scala 27:72]
|
|
node _T_4940 = or(_T_4939, _T_4685) @[Mux.scala 27:72]
|
|
node _T_4941 = or(_T_4940, _T_4686) @[Mux.scala 27:72]
|
|
node _T_4942 = or(_T_4941, _T_4687) @[Mux.scala 27:72]
|
|
node _T_4943 = or(_T_4942, _T_4688) @[Mux.scala 27:72]
|
|
node _T_4944 = or(_T_4943, _T_4689) @[Mux.scala 27:72]
|
|
node _T_4945 = or(_T_4944, _T_4690) @[Mux.scala 27:72]
|
|
node _T_4946 = or(_T_4945, _T_4691) @[Mux.scala 27:72]
|
|
node _T_4947 = or(_T_4946, _T_4692) @[Mux.scala 27:72]
|
|
node _T_4948 = or(_T_4947, _T_4693) @[Mux.scala 27:72]
|
|
node _T_4949 = or(_T_4948, _T_4694) @[Mux.scala 27:72]
|
|
node _T_4950 = or(_T_4949, _T_4695) @[Mux.scala 27:72]
|
|
node _T_4951 = or(_T_4950, _T_4696) @[Mux.scala 27:72]
|
|
node _T_4952 = or(_T_4951, _T_4697) @[Mux.scala 27:72]
|
|
node _T_4953 = or(_T_4952, _T_4698) @[Mux.scala 27:72]
|
|
node _T_4954 = or(_T_4953, _T_4699) @[Mux.scala 27:72]
|
|
node _T_4955 = or(_T_4954, _T_4700) @[Mux.scala 27:72]
|
|
node _T_4956 = or(_T_4955, _T_4701) @[Mux.scala 27:72]
|
|
node _T_4957 = or(_T_4956, _T_4702) @[Mux.scala 27:72]
|
|
node _T_4958 = or(_T_4957, _T_4703) @[Mux.scala 27:72]
|
|
node _T_4959 = or(_T_4958, _T_4704) @[Mux.scala 27:72]
|
|
node _T_4960 = or(_T_4959, _T_4705) @[Mux.scala 27:72]
|
|
node _T_4961 = or(_T_4960, _T_4706) @[Mux.scala 27:72]
|
|
node _T_4962 = or(_T_4961, _T_4707) @[Mux.scala 27:72]
|
|
node _T_4963 = or(_T_4962, _T_4708) @[Mux.scala 27:72]
|
|
node _T_4964 = or(_T_4963, _T_4709) @[Mux.scala 27:72]
|
|
node _T_4965 = or(_T_4964, _T_4710) @[Mux.scala 27:72]
|
|
node _T_4966 = or(_T_4965, _T_4711) @[Mux.scala 27:72]
|
|
node _T_4967 = or(_T_4966, _T_4712) @[Mux.scala 27:72]
|
|
node _T_4968 = or(_T_4967, _T_4713) @[Mux.scala 27:72]
|
|
node _T_4969 = or(_T_4968, _T_4714) @[Mux.scala 27:72]
|
|
node _T_4970 = or(_T_4969, _T_4715) @[Mux.scala 27:72]
|
|
node _T_4971 = or(_T_4970, _T_4716) @[Mux.scala 27:72]
|
|
node _T_4972 = or(_T_4971, _T_4717) @[Mux.scala 27:72]
|
|
node _T_4973 = or(_T_4972, _T_4718) @[Mux.scala 27:72]
|
|
node _T_4974 = or(_T_4973, _T_4719) @[Mux.scala 27:72]
|
|
node _T_4975 = or(_T_4974, _T_4720) @[Mux.scala 27:72]
|
|
node _T_4976 = or(_T_4975, _T_4721) @[Mux.scala 27:72]
|
|
node _T_4977 = or(_T_4976, _T_4722) @[Mux.scala 27:72]
|
|
node _T_4978 = or(_T_4977, _T_4723) @[Mux.scala 27:72]
|
|
node _T_4979 = or(_T_4978, _T_4724) @[Mux.scala 27:72]
|
|
node _T_4980 = or(_T_4979, _T_4725) @[Mux.scala 27:72]
|
|
node _T_4981 = or(_T_4980, _T_4726) @[Mux.scala 27:72]
|
|
node _T_4982 = or(_T_4981, _T_4727) @[Mux.scala 27:72]
|
|
node _T_4983 = or(_T_4982, _T_4728) @[Mux.scala 27:72]
|
|
node _T_4984 = or(_T_4983, _T_4729) @[Mux.scala 27:72]
|
|
node _T_4985 = or(_T_4984, _T_4730) @[Mux.scala 27:72]
|
|
node _T_4986 = or(_T_4985, _T_4731) @[Mux.scala 27:72]
|
|
node _T_4987 = or(_T_4986, _T_4732) @[Mux.scala 27:72]
|
|
node _T_4988 = or(_T_4987, _T_4733) @[Mux.scala 27:72]
|
|
node _T_4989 = or(_T_4988, _T_4734) @[Mux.scala 27:72]
|
|
node _T_4990 = or(_T_4989, _T_4735) @[Mux.scala 27:72]
|
|
node _T_4991 = or(_T_4990, _T_4736) @[Mux.scala 27:72]
|
|
node _T_4992 = or(_T_4991, _T_4737) @[Mux.scala 27:72]
|
|
node _T_4993 = or(_T_4992, _T_4738) @[Mux.scala 27:72]
|
|
node _T_4994 = or(_T_4993, _T_4739) @[Mux.scala 27:72]
|
|
node _T_4995 = or(_T_4994, _T_4740) @[Mux.scala 27:72]
|
|
node _T_4996 = or(_T_4995, _T_4741) @[Mux.scala 27:72]
|
|
node _T_4997 = or(_T_4996, _T_4742) @[Mux.scala 27:72]
|
|
node _T_4998 = or(_T_4997, _T_4743) @[Mux.scala 27:72]
|
|
node _T_4999 = or(_T_4998, _T_4744) @[Mux.scala 27:72]
|
|
node _T_5000 = or(_T_4999, _T_4745) @[Mux.scala 27:72]
|
|
node _T_5001 = or(_T_5000, _T_4746) @[Mux.scala 27:72]
|
|
node _T_5002 = or(_T_5001, _T_4747) @[Mux.scala 27:72]
|
|
node _T_5003 = or(_T_5002, _T_4748) @[Mux.scala 27:72]
|
|
node _T_5004 = or(_T_5003, _T_4749) @[Mux.scala 27:72]
|
|
node _T_5005 = or(_T_5004, _T_4750) @[Mux.scala 27:72]
|
|
node _T_5006 = or(_T_5005, _T_4751) @[Mux.scala 27:72]
|
|
node _T_5007 = or(_T_5006, _T_4752) @[Mux.scala 27:72]
|
|
node _T_5008 = or(_T_5007, _T_4753) @[Mux.scala 27:72]
|
|
node _T_5009 = or(_T_5008, _T_4754) @[Mux.scala 27:72]
|
|
node _T_5010 = or(_T_5009, _T_4755) @[Mux.scala 27:72]
|
|
node _T_5011 = or(_T_5010, _T_4756) @[Mux.scala 27:72]
|
|
node _T_5012 = or(_T_5011, _T_4757) @[Mux.scala 27:72]
|
|
node _T_5013 = or(_T_5012, _T_4758) @[Mux.scala 27:72]
|
|
node _T_5014 = or(_T_5013, _T_4759) @[Mux.scala 27:72]
|
|
node _T_5015 = or(_T_5014, _T_4760) @[Mux.scala 27:72]
|
|
node _T_5016 = or(_T_5015, _T_4761) @[Mux.scala 27:72]
|
|
node _T_5017 = or(_T_5016, _T_4762) @[Mux.scala 27:72]
|
|
node _T_5018 = or(_T_5017, _T_4763) @[Mux.scala 27:72]
|
|
node _T_5019 = or(_T_5018, _T_4764) @[Mux.scala 27:72]
|
|
node _T_5020 = or(_T_5019, _T_4765) @[Mux.scala 27:72]
|
|
node _T_5021 = or(_T_5020, _T_4766) @[Mux.scala 27:72]
|
|
node _T_5022 = or(_T_5021, _T_4767) @[Mux.scala 27:72]
|
|
node _T_5023 = or(_T_5022, _T_4768) @[Mux.scala 27:72]
|
|
node _T_5024 = or(_T_5023, _T_4769) @[Mux.scala 27:72]
|
|
node _T_5025 = or(_T_5024, _T_4770) @[Mux.scala 27:72]
|
|
node _T_5026 = or(_T_5025, _T_4771) @[Mux.scala 27:72]
|
|
node _T_5027 = or(_T_5026, _T_4772) @[Mux.scala 27:72]
|
|
node _T_5028 = or(_T_5027, _T_4773) @[Mux.scala 27:72]
|
|
node _T_5029 = or(_T_5028, _T_4774) @[Mux.scala 27:72]
|
|
node _T_5030 = or(_T_5029, _T_4775) @[Mux.scala 27:72]
|
|
node _T_5031 = or(_T_5030, _T_4776) @[Mux.scala 27:72]
|
|
node _T_5032 = or(_T_5031, _T_4777) @[Mux.scala 27:72]
|
|
node _T_5033 = or(_T_5032, _T_4778) @[Mux.scala 27:72]
|
|
node _T_5034 = or(_T_5033, _T_4779) @[Mux.scala 27:72]
|
|
node _T_5035 = or(_T_5034, _T_4780) @[Mux.scala 27:72]
|
|
node _T_5036 = or(_T_5035, _T_4781) @[Mux.scala 27:72]
|
|
node _T_5037 = or(_T_5036, _T_4782) @[Mux.scala 27:72]
|
|
node _T_5038 = or(_T_5037, _T_4783) @[Mux.scala 27:72]
|
|
node _T_5039 = or(_T_5038, _T_4784) @[Mux.scala 27:72]
|
|
node _T_5040 = or(_T_5039, _T_4785) @[Mux.scala 27:72]
|
|
node _T_5041 = or(_T_5040, _T_4786) @[Mux.scala 27:72]
|
|
node _T_5042 = or(_T_5041, _T_4787) @[Mux.scala 27:72]
|
|
node _T_5043 = or(_T_5042, _T_4788) @[Mux.scala 27:72]
|
|
node _T_5044 = or(_T_5043, _T_4789) @[Mux.scala 27:72]
|
|
node _T_5045 = or(_T_5044, _T_4790) @[Mux.scala 27:72]
|
|
node _T_5046 = or(_T_5045, _T_4791) @[Mux.scala 27:72]
|
|
node _T_5047 = or(_T_5046, _T_4792) @[Mux.scala 27:72]
|
|
node _T_5048 = or(_T_5047, _T_4793) @[Mux.scala 27:72]
|
|
node _T_5049 = or(_T_5048, _T_4794) @[Mux.scala 27:72]
|
|
node _T_5050 = or(_T_5049, _T_4795) @[Mux.scala 27:72]
|
|
node _T_5051 = or(_T_5050, _T_4796) @[Mux.scala 27:72]
|
|
node _T_5052 = or(_T_5051, _T_4797) @[Mux.scala 27:72]
|
|
node _T_5053 = or(_T_5052, _T_4798) @[Mux.scala 27:72]
|
|
node _T_5054 = or(_T_5053, _T_4799) @[Mux.scala 27:72]
|
|
node _T_5055 = or(_T_5054, _T_4800) @[Mux.scala 27:72]
|
|
node _T_5056 = or(_T_5055, _T_4801) @[Mux.scala 27:72]
|
|
node _T_5057 = or(_T_5056, _T_4802) @[Mux.scala 27:72]
|
|
node _T_5058 = or(_T_5057, _T_4803) @[Mux.scala 27:72]
|
|
node _T_5059 = or(_T_5058, _T_4804) @[Mux.scala 27:72]
|
|
node _T_5060 = or(_T_5059, _T_4805) @[Mux.scala 27:72]
|
|
node _T_5061 = or(_T_5060, _T_4806) @[Mux.scala 27:72]
|
|
node _T_5062 = or(_T_5061, _T_4807) @[Mux.scala 27:72]
|
|
node _T_5063 = or(_T_5062, _T_4808) @[Mux.scala 27:72]
|
|
node _T_5064 = or(_T_5063, _T_4809) @[Mux.scala 27:72]
|
|
node _T_5065 = or(_T_5064, _T_4810) @[Mux.scala 27:72]
|
|
node _T_5066 = or(_T_5065, _T_4811) @[Mux.scala 27:72]
|
|
node _T_5067 = or(_T_5066, _T_4812) @[Mux.scala 27:72]
|
|
node _T_5068 = or(_T_5067, _T_4813) @[Mux.scala 27:72]
|
|
node _T_5069 = or(_T_5068, _T_4814) @[Mux.scala 27:72]
|
|
node _T_5070 = or(_T_5069, _T_4815) @[Mux.scala 27:72]
|
|
node _T_5071 = or(_T_5070, _T_4816) @[Mux.scala 27:72]
|
|
node _T_5072 = or(_T_5071, _T_4817) @[Mux.scala 27:72]
|
|
node _T_5073 = or(_T_5072, _T_4818) @[Mux.scala 27:72]
|
|
node _T_5074 = or(_T_5073, _T_4819) @[Mux.scala 27:72]
|
|
node _T_5075 = or(_T_5074, _T_4820) @[Mux.scala 27:72]
|
|
node _T_5076 = or(_T_5075, _T_4821) @[Mux.scala 27:72]
|
|
node _T_5077 = or(_T_5076, _T_4822) @[Mux.scala 27:72]
|
|
node _T_5078 = or(_T_5077, _T_4823) @[Mux.scala 27:72]
|
|
node _T_5079 = or(_T_5078, _T_4824) @[Mux.scala 27:72]
|
|
node _T_5080 = or(_T_5079, _T_4825) @[Mux.scala 27:72]
|
|
node _T_5081 = or(_T_5080, _T_4826) @[Mux.scala 27:72]
|
|
node _T_5082 = or(_T_5081, _T_4827) @[Mux.scala 27:72]
|
|
node _T_5083 = or(_T_5082, _T_4828) @[Mux.scala 27:72]
|
|
node _T_5084 = or(_T_5083, _T_4829) @[Mux.scala 27:72]
|
|
node _T_5085 = or(_T_5084, _T_4830) @[Mux.scala 27:72]
|
|
node _T_5086 = or(_T_5085, _T_4831) @[Mux.scala 27:72]
|
|
node _T_5087 = or(_T_5086, _T_4832) @[Mux.scala 27:72]
|
|
node _T_5088 = or(_T_5087, _T_4833) @[Mux.scala 27:72]
|
|
node _T_5089 = or(_T_5088, _T_4834) @[Mux.scala 27:72]
|
|
node _T_5090 = or(_T_5089, _T_4835) @[Mux.scala 27:72]
|
|
node _T_5091 = or(_T_5090, _T_4836) @[Mux.scala 27:72]
|
|
node _T_5092 = or(_T_5091, _T_4837) @[Mux.scala 27:72]
|
|
node _T_5093 = or(_T_5092, _T_4838) @[Mux.scala 27:72]
|
|
node _T_5094 = or(_T_5093, _T_4839) @[Mux.scala 27:72]
|
|
node _T_5095 = or(_T_5094, _T_4840) @[Mux.scala 27:72]
|
|
node _T_5096 = or(_T_5095, _T_4841) @[Mux.scala 27:72]
|
|
node _T_5097 = or(_T_5096, _T_4842) @[Mux.scala 27:72]
|
|
node _T_5098 = or(_T_5097, _T_4843) @[Mux.scala 27:72]
|
|
node _T_5099 = or(_T_5098, _T_4844) @[Mux.scala 27:72]
|
|
node _T_5100 = or(_T_5099, _T_4845) @[Mux.scala 27:72]
|
|
node _T_5101 = or(_T_5100, _T_4846) @[Mux.scala 27:72]
|
|
node _T_5102 = or(_T_5101, _T_4847) @[Mux.scala 27:72]
|
|
node _T_5103 = or(_T_5102, _T_4848) @[Mux.scala 27:72]
|
|
node _T_5104 = or(_T_5103, _T_4849) @[Mux.scala 27:72]
|
|
node _T_5105 = or(_T_5104, _T_4850) @[Mux.scala 27:72]
|
|
node _T_5106 = or(_T_5105, _T_4851) @[Mux.scala 27:72]
|
|
node _T_5107 = or(_T_5106, _T_4852) @[Mux.scala 27:72]
|
|
node _T_5108 = or(_T_5107, _T_4853) @[Mux.scala 27:72]
|
|
node _T_5109 = or(_T_5108, _T_4854) @[Mux.scala 27:72]
|
|
node _T_5110 = or(_T_5109, _T_4855) @[Mux.scala 27:72]
|
|
node _T_5111 = or(_T_5110, _T_4856) @[Mux.scala 27:72]
|
|
node _T_5112 = or(_T_5111, _T_4857) @[Mux.scala 27:72]
|
|
node _T_5113 = or(_T_5112, _T_4858) @[Mux.scala 27:72]
|
|
node _T_5114 = or(_T_5113, _T_4859) @[Mux.scala 27:72]
|
|
node _T_5115 = or(_T_5114, _T_4860) @[Mux.scala 27:72]
|
|
node _T_5116 = or(_T_5115, _T_4861) @[Mux.scala 27:72]
|
|
node _T_5117 = or(_T_5116, _T_4862) @[Mux.scala 27:72]
|
|
node _T_5118 = or(_T_5117, _T_4863) @[Mux.scala 27:72]
|
|
node _T_5119 = or(_T_5118, _T_4864) @[Mux.scala 27:72]
|
|
node _T_5120 = or(_T_5119, _T_4865) @[Mux.scala 27:72]
|
|
node _T_5121 = or(_T_5120, _T_4866) @[Mux.scala 27:72]
|
|
node _T_5122 = or(_T_5121, _T_4867) @[Mux.scala 27:72]
|
|
node _T_5123 = or(_T_5122, _T_4868) @[Mux.scala 27:72]
|
|
node _T_5124 = or(_T_5123, _T_4869) @[Mux.scala 27:72]
|
|
node _T_5125 = or(_T_5124, _T_4870) @[Mux.scala 27:72]
|
|
node _T_5126 = or(_T_5125, _T_4871) @[Mux.scala 27:72]
|
|
node _T_5127 = or(_T_5126, _T_4872) @[Mux.scala 27:72]
|
|
node _T_5128 = or(_T_5127, _T_4873) @[Mux.scala 27:72]
|
|
node _T_5129 = or(_T_5128, _T_4874) @[Mux.scala 27:72]
|
|
node _T_5130 = or(_T_5129, _T_4875) @[Mux.scala 27:72]
|
|
node _T_5131 = or(_T_5130, _T_4876) @[Mux.scala 27:72]
|
|
node _T_5132 = or(_T_5131, _T_4877) @[Mux.scala 27:72]
|
|
node _T_5133 = or(_T_5132, _T_4878) @[Mux.scala 27:72]
|
|
node _T_5134 = or(_T_5133, _T_4879) @[Mux.scala 27:72]
|
|
node _T_5135 = or(_T_5134, _T_4880) @[Mux.scala 27:72]
|
|
node _T_5136 = or(_T_5135, _T_4881) @[Mux.scala 27:72]
|
|
node _T_5137 = or(_T_5136, _T_4882) @[Mux.scala 27:72]
|
|
node _T_5138 = or(_T_5137, _T_4883) @[Mux.scala 27:72]
|
|
node _T_5139 = or(_T_5138, _T_4884) @[Mux.scala 27:72]
|
|
node _T_5140 = or(_T_5139, _T_4885) @[Mux.scala 27:72]
|
|
node _T_5141 = or(_T_5140, _T_4886) @[Mux.scala 27:72]
|
|
node _T_5142 = or(_T_5141, _T_4887) @[Mux.scala 27:72]
|
|
node _T_5143 = or(_T_5142, _T_4888) @[Mux.scala 27:72]
|
|
node _T_5144 = or(_T_5143, _T_4889) @[Mux.scala 27:72]
|
|
node _T_5145 = or(_T_5144, _T_4890) @[Mux.scala 27:72]
|
|
node _T_5146 = or(_T_5145, _T_4891) @[Mux.scala 27:72]
|
|
node _T_5147 = or(_T_5146, _T_4892) @[Mux.scala 27:72]
|
|
node _T_5148 = or(_T_5147, _T_4893) @[Mux.scala 27:72]
|
|
node _T_5149 = or(_T_5148, _T_4894) @[Mux.scala 27:72]
|
|
node _T_5150 = or(_T_5149, _T_4895) @[Mux.scala 27:72]
|
|
node _T_5151 = or(_T_5150, _T_4896) @[Mux.scala 27:72]
|
|
node _T_5152 = or(_T_5151, _T_4897) @[Mux.scala 27:72]
|
|
node _T_5153 = or(_T_5152, _T_4898) @[Mux.scala 27:72]
|
|
node _T_5154 = or(_T_5153, _T_4899) @[Mux.scala 27:72]
|
|
node _T_5155 = or(_T_5154, _T_4900) @[Mux.scala 27:72]
|
|
node _T_5156 = or(_T_5155, _T_4901) @[Mux.scala 27:72]
|
|
node _T_5157 = or(_T_5156, _T_4902) @[Mux.scala 27:72]
|
|
node _T_5158 = or(_T_5157, _T_4903) @[Mux.scala 27:72]
|
|
node _T_5159 = or(_T_5158, _T_4904) @[Mux.scala 27:72]
|
|
node _T_5160 = or(_T_5159, _T_4905) @[Mux.scala 27:72]
|
|
node _T_5161 = or(_T_5160, _T_4906) @[Mux.scala 27:72]
|
|
node _T_5162 = or(_T_5161, _T_4907) @[Mux.scala 27:72]
|
|
node _T_5163 = or(_T_5162, _T_4908) @[Mux.scala 27:72]
|
|
node _T_5164 = or(_T_5163, _T_4909) @[Mux.scala 27:72]
|
|
node _T_5165 = or(_T_5164, _T_4910) @[Mux.scala 27:72]
|
|
node _T_5166 = or(_T_5165, _T_4911) @[Mux.scala 27:72]
|
|
node _T_5167 = or(_T_5166, _T_4912) @[Mux.scala 27:72]
|
|
node _T_5168 = or(_T_5167, _T_4913) @[Mux.scala 27:72]
|
|
node _T_5169 = or(_T_5168, _T_4914) @[Mux.scala 27:72]
|
|
node _T_5170 = or(_T_5169, _T_4915) @[Mux.scala 27:72]
|
|
node _T_5171 = or(_T_5170, _T_4916) @[Mux.scala 27:72]
|
|
node _T_5172 = or(_T_5171, _T_4917) @[Mux.scala 27:72]
|
|
node _T_5173 = or(_T_5172, _T_4918) @[Mux.scala 27:72]
|
|
node _T_5174 = or(_T_5173, _T_4919) @[Mux.scala 27:72]
|
|
node _T_5175 = or(_T_5174, _T_4920) @[Mux.scala 27:72]
|
|
wire _T_5176 : UInt @[Mux.scala 27:72]
|
|
_T_5176 <= _T_5175 @[Mux.scala 27:72]
|
|
btb_bank0_rd_data_way0_p1_f <= _T_5176 @[el2_ifu_bp_ctl.scala 366:31]
|
|
node _T_5177 = eq(btb_rd_addr_p1_f, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5178 = bits(_T_5177, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5179 = eq(btb_rd_addr_p1_f, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5180 = bits(_T_5179, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5181 = eq(btb_rd_addr_p1_f, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5182 = bits(_T_5181, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5183 = eq(btb_rd_addr_p1_f, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5184 = bits(_T_5183, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5185 = eq(btb_rd_addr_p1_f, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5186 = bits(_T_5185, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5187 = eq(btb_rd_addr_p1_f, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5188 = bits(_T_5187, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5189 = eq(btb_rd_addr_p1_f, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5190 = bits(_T_5189, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5191 = eq(btb_rd_addr_p1_f, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5192 = bits(_T_5191, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5193 = eq(btb_rd_addr_p1_f, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5194 = bits(_T_5193, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5195 = eq(btb_rd_addr_p1_f, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5196 = bits(_T_5195, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5197 = eq(btb_rd_addr_p1_f, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5198 = bits(_T_5197, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5199 = eq(btb_rd_addr_p1_f, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5200 = bits(_T_5199, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5201 = eq(btb_rd_addr_p1_f, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5202 = bits(_T_5201, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5203 = eq(btb_rd_addr_p1_f, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5204 = bits(_T_5203, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5205 = eq(btb_rd_addr_p1_f, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5206 = bits(_T_5205, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5207 = eq(btb_rd_addr_p1_f, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5208 = bits(_T_5207, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5209 = eq(btb_rd_addr_p1_f, UInt<5>("h010")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5210 = bits(_T_5209, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5211 = eq(btb_rd_addr_p1_f, UInt<5>("h011")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5212 = bits(_T_5211, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5213 = eq(btb_rd_addr_p1_f, UInt<5>("h012")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5214 = bits(_T_5213, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5215 = eq(btb_rd_addr_p1_f, UInt<5>("h013")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5216 = bits(_T_5215, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5217 = eq(btb_rd_addr_p1_f, UInt<5>("h014")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5218 = bits(_T_5217, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5219 = eq(btb_rd_addr_p1_f, UInt<5>("h015")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5220 = bits(_T_5219, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5221 = eq(btb_rd_addr_p1_f, UInt<5>("h016")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5222 = bits(_T_5221, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5223 = eq(btb_rd_addr_p1_f, UInt<5>("h017")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5224 = bits(_T_5223, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5225 = eq(btb_rd_addr_p1_f, UInt<5>("h018")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5226 = bits(_T_5225, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5227 = eq(btb_rd_addr_p1_f, UInt<5>("h019")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5228 = bits(_T_5227, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5229 = eq(btb_rd_addr_p1_f, UInt<5>("h01a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5230 = bits(_T_5229, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5231 = eq(btb_rd_addr_p1_f, UInt<5>("h01b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5232 = bits(_T_5231, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5233 = eq(btb_rd_addr_p1_f, UInt<5>("h01c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5234 = bits(_T_5233, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5235 = eq(btb_rd_addr_p1_f, UInt<5>("h01d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5236 = bits(_T_5235, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5237 = eq(btb_rd_addr_p1_f, UInt<5>("h01e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5238 = bits(_T_5237, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5239 = eq(btb_rd_addr_p1_f, UInt<5>("h01f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5240 = bits(_T_5239, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5241 = eq(btb_rd_addr_p1_f, UInt<6>("h020")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5242 = bits(_T_5241, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5243 = eq(btb_rd_addr_p1_f, UInt<6>("h021")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5244 = bits(_T_5243, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5245 = eq(btb_rd_addr_p1_f, UInt<6>("h022")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5246 = bits(_T_5245, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5247 = eq(btb_rd_addr_p1_f, UInt<6>("h023")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5248 = bits(_T_5247, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5249 = eq(btb_rd_addr_p1_f, UInt<6>("h024")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5250 = bits(_T_5249, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5251 = eq(btb_rd_addr_p1_f, UInt<6>("h025")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5252 = bits(_T_5251, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5253 = eq(btb_rd_addr_p1_f, UInt<6>("h026")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5254 = bits(_T_5253, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5255 = eq(btb_rd_addr_p1_f, UInt<6>("h027")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5256 = bits(_T_5255, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5257 = eq(btb_rd_addr_p1_f, UInt<6>("h028")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5258 = bits(_T_5257, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5259 = eq(btb_rd_addr_p1_f, UInt<6>("h029")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5260 = bits(_T_5259, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5261 = eq(btb_rd_addr_p1_f, UInt<6>("h02a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5262 = bits(_T_5261, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5263 = eq(btb_rd_addr_p1_f, UInt<6>("h02b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5264 = bits(_T_5263, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5265 = eq(btb_rd_addr_p1_f, UInt<6>("h02c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5266 = bits(_T_5265, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5267 = eq(btb_rd_addr_p1_f, UInt<6>("h02d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5268 = bits(_T_5267, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5269 = eq(btb_rd_addr_p1_f, UInt<6>("h02e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5270 = bits(_T_5269, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5271 = eq(btb_rd_addr_p1_f, UInt<6>("h02f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5272 = bits(_T_5271, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5273 = eq(btb_rd_addr_p1_f, UInt<6>("h030")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5274 = bits(_T_5273, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5275 = eq(btb_rd_addr_p1_f, UInt<6>("h031")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5276 = bits(_T_5275, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5277 = eq(btb_rd_addr_p1_f, UInt<6>("h032")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5278 = bits(_T_5277, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5279 = eq(btb_rd_addr_p1_f, UInt<6>("h033")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5280 = bits(_T_5279, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5281 = eq(btb_rd_addr_p1_f, UInt<6>("h034")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5282 = bits(_T_5281, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5283 = eq(btb_rd_addr_p1_f, UInt<6>("h035")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5284 = bits(_T_5283, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5285 = eq(btb_rd_addr_p1_f, UInt<6>("h036")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5286 = bits(_T_5285, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5287 = eq(btb_rd_addr_p1_f, UInt<6>("h037")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5288 = bits(_T_5287, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5289 = eq(btb_rd_addr_p1_f, UInt<6>("h038")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5290 = bits(_T_5289, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5291 = eq(btb_rd_addr_p1_f, UInt<6>("h039")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5292 = bits(_T_5291, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5293 = eq(btb_rd_addr_p1_f, UInt<6>("h03a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5294 = bits(_T_5293, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5295 = eq(btb_rd_addr_p1_f, UInt<6>("h03b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5296 = bits(_T_5295, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5297 = eq(btb_rd_addr_p1_f, UInt<6>("h03c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5298 = bits(_T_5297, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5299 = eq(btb_rd_addr_p1_f, UInt<6>("h03d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5300 = bits(_T_5299, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5301 = eq(btb_rd_addr_p1_f, UInt<6>("h03e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5302 = bits(_T_5301, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5303 = eq(btb_rd_addr_p1_f, UInt<6>("h03f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5304 = bits(_T_5303, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5305 = eq(btb_rd_addr_p1_f, UInt<7>("h040")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5306 = bits(_T_5305, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5307 = eq(btb_rd_addr_p1_f, UInt<7>("h041")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5308 = bits(_T_5307, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5309 = eq(btb_rd_addr_p1_f, UInt<7>("h042")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5310 = bits(_T_5309, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5311 = eq(btb_rd_addr_p1_f, UInt<7>("h043")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5312 = bits(_T_5311, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5313 = eq(btb_rd_addr_p1_f, UInt<7>("h044")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5314 = bits(_T_5313, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5315 = eq(btb_rd_addr_p1_f, UInt<7>("h045")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5316 = bits(_T_5315, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5317 = eq(btb_rd_addr_p1_f, UInt<7>("h046")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5318 = bits(_T_5317, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5319 = eq(btb_rd_addr_p1_f, UInt<7>("h047")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5320 = bits(_T_5319, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5321 = eq(btb_rd_addr_p1_f, UInt<7>("h048")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5322 = bits(_T_5321, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5323 = eq(btb_rd_addr_p1_f, UInt<7>("h049")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5324 = bits(_T_5323, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5325 = eq(btb_rd_addr_p1_f, UInt<7>("h04a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5326 = bits(_T_5325, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5327 = eq(btb_rd_addr_p1_f, UInt<7>("h04b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5328 = bits(_T_5327, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5329 = eq(btb_rd_addr_p1_f, UInt<7>("h04c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5330 = bits(_T_5329, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5331 = eq(btb_rd_addr_p1_f, UInt<7>("h04d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5332 = bits(_T_5331, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5333 = eq(btb_rd_addr_p1_f, UInt<7>("h04e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5334 = bits(_T_5333, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5335 = eq(btb_rd_addr_p1_f, UInt<7>("h04f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5336 = bits(_T_5335, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5337 = eq(btb_rd_addr_p1_f, UInt<7>("h050")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5338 = bits(_T_5337, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5339 = eq(btb_rd_addr_p1_f, UInt<7>("h051")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5340 = bits(_T_5339, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5341 = eq(btb_rd_addr_p1_f, UInt<7>("h052")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5342 = bits(_T_5341, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5343 = eq(btb_rd_addr_p1_f, UInt<7>("h053")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5344 = bits(_T_5343, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5345 = eq(btb_rd_addr_p1_f, UInt<7>("h054")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5346 = bits(_T_5345, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5347 = eq(btb_rd_addr_p1_f, UInt<7>("h055")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5348 = bits(_T_5347, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5349 = eq(btb_rd_addr_p1_f, UInt<7>("h056")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5350 = bits(_T_5349, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5351 = eq(btb_rd_addr_p1_f, UInt<7>("h057")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5352 = bits(_T_5351, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5353 = eq(btb_rd_addr_p1_f, UInt<7>("h058")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5354 = bits(_T_5353, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5355 = eq(btb_rd_addr_p1_f, UInt<7>("h059")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5356 = bits(_T_5355, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5357 = eq(btb_rd_addr_p1_f, UInt<7>("h05a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5358 = bits(_T_5357, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5359 = eq(btb_rd_addr_p1_f, UInt<7>("h05b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5360 = bits(_T_5359, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5361 = eq(btb_rd_addr_p1_f, UInt<7>("h05c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5362 = bits(_T_5361, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5363 = eq(btb_rd_addr_p1_f, UInt<7>("h05d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5364 = bits(_T_5363, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5365 = eq(btb_rd_addr_p1_f, UInt<7>("h05e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5366 = bits(_T_5365, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5367 = eq(btb_rd_addr_p1_f, UInt<7>("h05f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5368 = bits(_T_5367, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5369 = eq(btb_rd_addr_p1_f, UInt<7>("h060")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5370 = bits(_T_5369, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5371 = eq(btb_rd_addr_p1_f, UInt<7>("h061")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5372 = bits(_T_5371, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5373 = eq(btb_rd_addr_p1_f, UInt<7>("h062")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5374 = bits(_T_5373, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5375 = eq(btb_rd_addr_p1_f, UInt<7>("h063")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5376 = bits(_T_5375, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5377 = eq(btb_rd_addr_p1_f, UInt<7>("h064")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5378 = bits(_T_5377, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5379 = eq(btb_rd_addr_p1_f, UInt<7>("h065")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5380 = bits(_T_5379, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5381 = eq(btb_rd_addr_p1_f, UInt<7>("h066")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5382 = bits(_T_5381, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5383 = eq(btb_rd_addr_p1_f, UInt<7>("h067")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5384 = bits(_T_5383, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5385 = eq(btb_rd_addr_p1_f, UInt<7>("h068")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5386 = bits(_T_5385, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5387 = eq(btb_rd_addr_p1_f, UInt<7>("h069")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5388 = bits(_T_5387, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5389 = eq(btb_rd_addr_p1_f, UInt<7>("h06a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5390 = bits(_T_5389, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5391 = eq(btb_rd_addr_p1_f, UInt<7>("h06b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5392 = bits(_T_5391, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5393 = eq(btb_rd_addr_p1_f, UInt<7>("h06c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5394 = bits(_T_5393, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5395 = eq(btb_rd_addr_p1_f, UInt<7>("h06d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5396 = bits(_T_5395, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5397 = eq(btb_rd_addr_p1_f, UInt<7>("h06e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5398 = bits(_T_5397, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5399 = eq(btb_rd_addr_p1_f, UInt<7>("h06f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5400 = bits(_T_5399, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5401 = eq(btb_rd_addr_p1_f, UInt<7>("h070")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5402 = bits(_T_5401, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5403 = eq(btb_rd_addr_p1_f, UInt<7>("h071")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5404 = bits(_T_5403, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5405 = eq(btb_rd_addr_p1_f, UInt<7>("h072")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5406 = bits(_T_5405, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5407 = eq(btb_rd_addr_p1_f, UInt<7>("h073")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5408 = bits(_T_5407, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5409 = eq(btb_rd_addr_p1_f, UInt<7>("h074")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5410 = bits(_T_5409, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5411 = eq(btb_rd_addr_p1_f, UInt<7>("h075")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5412 = bits(_T_5411, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5413 = eq(btb_rd_addr_p1_f, UInt<7>("h076")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5414 = bits(_T_5413, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5415 = eq(btb_rd_addr_p1_f, UInt<7>("h077")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5416 = bits(_T_5415, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5417 = eq(btb_rd_addr_p1_f, UInt<7>("h078")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5418 = bits(_T_5417, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5419 = eq(btb_rd_addr_p1_f, UInt<7>("h079")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5420 = bits(_T_5419, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5421 = eq(btb_rd_addr_p1_f, UInt<7>("h07a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5422 = bits(_T_5421, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5423 = eq(btb_rd_addr_p1_f, UInt<7>("h07b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5424 = bits(_T_5423, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5425 = eq(btb_rd_addr_p1_f, UInt<7>("h07c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5426 = bits(_T_5425, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5427 = eq(btb_rd_addr_p1_f, UInt<7>("h07d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5428 = bits(_T_5427, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5429 = eq(btb_rd_addr_p1_f, UInt<7>("h07e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5430 = bits(_T_5429, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5431 = eq(btb_rd_addr_p1_f, UInt<7>("h07f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5432 = bits(_T_5431, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5433 = eq(btb_rd_addr_p1_f, UInt<8>("h080")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5434 = bits(_T_5433, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5435 = eq(btb_rd_addr_p1_f, UInt<8>("h081")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5436 = bits(_T_5435, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5437 = eq(btb_rd_addr_p1_f, UInt<8>("h082")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5438 = bits(_T_5437, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5439 = eq(btb_rd_addr_p1_f, UInt<8>("h083")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5440 = bits(_T_5439, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5441 = eq(btb_rd_addr_p1_f, UInt<8>("h084")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5442 = bits(_T_5441, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5443 = eq(btb_rd_addr_p1_f, UInt<8>("h085")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5444 = bits(_T_5443, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5445 = eq(btb_rd_addr_p1_f, UInt<8>("h086")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5446 = bits(_T_5445, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5447 = eq(btb_rd_addr_p1_f, UInt<8>("h087")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5448 = bits(_T_5447, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5449 = eq(btb_rd_addr_p1_f, UInt<8>("h088")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5450 = bits(_T_5449, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5451 = eq(btb_rd_addr_p1_f, UInt<8>("h089")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5452 = bits(_T_5451, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5453 = eq(btb_rd_addr_p1_f, UInt<8>("h08a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5454 = bits(_T_5453, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5455 = eq(btb_rd_addr_p1_f, UInt<8>("h08b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5456 = bits(_T_5455, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5457 = eq(btb_rd_addr_p1_f, UInt<8>("h08c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5458 = bits(_T_5457, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5459 = eq(btb_rd_addr_p1_f, UInt<8>("h08d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5460 = bits(_T_5459, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5461 = eq(btb_rd_addr_p1_f, UInt<8>("h08e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5462 = bits(_T_5461, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5463 = eq(btb_rd_addr_p1_f, UInt<8>("h08f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5464 = bits(_T_5463, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5465 = eq(btb_rd_addr_p1_f, UInt<8>("h090")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5466 = bits(_T_5465, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5467 = eq(btb_rd_addr_p1_f, UInt<8>("h091")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5468 = bits(_T_5467, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5469 = eq(btb_rd_addr_p1_f, UInt<8>("h092")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5470 = bits(_T_5469, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5471 = eq(btb_rd_addr_p1_f, UInt<8>("h093")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5472 = bits(_T_5471, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5473 = eq(btb_rd_addr_p1_f, UInt<8>("h094")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5474 = bits(_T_5473, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5475 = eq(btb_rd_addr_p1_f, UInt<8>("h095")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5476 = bits(_T_5475, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5477 = eq(btb_rd_addr_p1_f, UInt<8>("h096")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5478 = bits(_T_5477, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5479 = eq(btb_rd_addr_p1_f, UInt<8>("h097")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5480 = bits(_T_5479, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5481 = eq(btb_rd_addr_p1_f, UInt<8>("h098")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5482 = bits(_T_5481, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5483 = eq(btb_rd_addr_p1_f, UInt<8>("h099")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5484 = bits(_T_5483, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5485 = eq(btb_rd_addr_p1_f, UInt<8>("h09a")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5486 = bits(_T_5485, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5487 = eq(btb_rd_addr_p1_f, UInt<8>("h09b")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5488 = bits(_T_5487, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5489 = eq(btb_rd_addr_p1_f, UInt<8>("h09c")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5490 = bits(_T_5489, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5491 = eq(btb_rd_addr_p1_f, UInt<8>("h09d")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5492 = bits(_T_5491, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5493 = eq(btb_rd_addr_p1_f, UInt<8>("h09e")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5494 = bits(_T_5493, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5495 = eq(btb_rd_addr_p1_f, UInt<8>("h09f")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5496 = bits(_T_5495, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5497 = eq(btb_rd_addr_p1_f, UInt<8>("h0a0")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5498 = bits(_T_5497, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5499 = eq(btb_rd_addr_p1_f, UInt<8>("h0a1")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5500 = bits(_T_5499, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5501 = eq(btb_rd_addr_p1_f, UInt<8>("h0a2")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5502 = bits(_T_5501, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5503 = eq(btb_rd_addr_p1_f, UInt<8>("h0a3")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5504 = bits(_T_5503, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5505 = eq(btb_rd_addr_p1_f, UInt<8>("h0a4")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5506 = bits(_T_5505, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5507 = eq(btb_rd_addr_p1_f, UInt<8>("h0a5")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5508 = bits(_T_5507, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5509 = eq(btb_rd_addr_p1_f, UInt<8>("h0a6")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5510 = bits(_T_5509, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5511 = eq(btb_rd_addr_p1_f, UInt<8>("h0a7")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5512 = bits(_T_5511, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5513 = eq(btb_rd_addr_p1_f, UInt<8>("h0a8")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5514 = bits(_T_5513, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5515 = eq(btb_rd_addr_p1_f, UInt<8>("h0a9")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5516 = bits(_T_5515, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5517 = eq(btb_rd_addr_p1_f, UInt<8>("h0aa")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5518 = bits(_T_5517, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5519 = eq(btb_rd_addr_p1_f, UInt<8>("h0ab")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5520 = bits(_T_5519, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5521 = eq(btb_rd_addr_p1_f, UInt<8>("h0ac")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5522 = bits(_T_5521, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5523 = eq(btb_rd_addr_p1_f, UInt<8>("h0ad")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5524 = bits(_T_5523, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5525 = eq(btb_rd_addr_p1_f, UInt<8>("h0ae")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5526 = bits(_T_5525, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5527 = eq(btb_rd_addr_p1_f, UInt<8>("h0af")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5528 = bits(_T_5527, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5529 = eq(btb_rd_addr_p1_f, UInt<8>("h0b0")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5530 = bits(_T_5529, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5531 = eq(btb_rd_addr_p1_f, UInt<8>("h0b1")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5532 = bits(_T_5531, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5533 = eq(btb_rd_addr_p1_f, UInt<8>("h0b2")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5534 = bits(_T_5533, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5535 = eq(btb_rd_addr_p1_f, UInt<8>("h0b3")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5536 = bits(_T_5535, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5537 = eq(btb_rd_addr_p1_f, UInt<8>("h0b4")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5538 = bits(_T_5537, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5539 = eq(btb_rd_addr_p1_f, UInt<8>("h0b5")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5540 = bits(_T_5539, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5541 = eq(btb_rd_addr_p1_f, UInt<8>("h0b6")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5542 = bits(_T_5541, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5543 = eq(btb_rd_addr_p1_f, UInt<8>("h0b7")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5544 = bits(_T_5543, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5545 = eq(btb_rd_addr_p1_f, UInt<8>("h0b8")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5546 = bits(_T_5545, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5547 = eq(btb_rd_addr_p1_f, UInt<8>("h0b9")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5548 = bits(_T_5547, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5549 = eq(btb_rd_addr_p1_f, UInt<8>("h0ba")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5550 = bits(_T_5549, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5551 = eq(btb_rd_addr_p1_f, UInt<8>("h0bb")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5552 = bits(_T_5551, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5553 = eq(btb_rd_addr_p1_f, UInt<8>("h0bc")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5554 = bits(_T_5553, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5555 = eq(btb_rd_addr_p1_f, UInt<8>("h0bd")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5556 = bits(_T_5555, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5557 = eq(btb_rd_addr_p1_f, UInt<8>("h0be")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5558 = bits(_T_5557, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5559 = eq(btb_rd_addr_p1_f, UInt<8>("h0bf")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5560 = bits(_T_5559, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5561 = eq(btb_rd_addr_p1_f, UInt<8>("h0c0")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5562 = bits(_T_5561, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5563 = eq(btb_rd_addr_p1_f, UInt<8>("h0c1")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5564 = bits(_T_5563, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5565 = eq(btb_rd_addr_p1_f, UInt<8>("h0c2")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5566 = bits(_T_5565, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5567 = eq(btb_rd_addr_p1_f, UInt<8>("h0c3")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5568 = bits(_T_5567, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5569 = eq(btb_rd_addr_p1_f, UInt<8>("h0c4")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5570 = bits(_T_5569, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5571 = eq(btb_rd_addr_p1_f, UInt<8>("h0c5")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5572 = bits(_T_5571, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5573 = eq(btb_rd_addr_p1_f, UInt<8>("h0c6")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5574 = bits(_T_5573, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5575 = eq(btb_rd_addr_p1_f, UInt<8>("h0c7")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5576 = bits(_T_5575, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5577 = eq(btb_rd_addr_p1_f, UInt<8>("h0c8")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5578 = bits(_T_5577, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5579 = eq(btb_rd_addr_p1_f, UInt<8>("h0c9")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5580 = bits(_T_5579, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5581 = eq(btb_rd_addr_p1_f, UInt<8>("h0ca")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5582 = bits(_T_5581, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5583 = eq(btb_rd_addr_p1_f, UInt<8>("h0cb")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5584 = bits(_T_5583, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5585 = eq(btb_rd_addr_p1_f, UInt<8>("h0cc")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5586 = bits(_T_5585, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5587 = eq(btb_rd_addr_p1_f, UInt<8>("h0cd")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5588 = bits(_T_5587, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5589 = eq(btb_rd_addr_p1_f, UInt<8>("h0ce")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5590 = bits(_T_5589, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5591 = eq(btb_rd_addr_p1_f, UInt<8>("h0cf")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5592 = bits(_T_5591, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5593 = eq(btb_rd_addr_p1_f, UInt<8>("h0d0")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5594 = bits(_T_5593, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5595 = eq(btb_rd_addr_p1_f, UInt<8>("h0d1")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5596 = bits(_T_5595, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5597 = eq(btb_rd_addr_p1_f, UInt<8>("h0d2")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5598 = bits(_T_5597, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5599 = eq(btb_rd_addr_p1_f, UInt<8>("h0d3")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5600 = bits(_T_5599, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5601 = eq(btb_rd_addr_p1_f, UInt<8>("h0d4")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5602 = bits(_T_5601, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5603 = eq(btb_rd_addr_p1_f, UInt<8>("h0d5")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5604 = bits(_T_5603, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5605 = eq(btb_rd_addr_p1_f, UInt<8>("h0d6")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5606 = bits(_T_5605, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5607 = eq(btb_rd_addr_p1_f, UInt<8>("h0d7")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5608 = bits(_T_5607, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5609 = eq(btb_rd_addr_p1_f, UInt<8>("h0d8")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5610 = bits(_T_5609, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5611 = eq(btb_rd_addr_p1_f, UInt<8>("h0d9")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5612 = bits(_T_5611, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5613 = eq(btb_rd_addr_p1_f, UInt<8>("h0da")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5614 = bits(_T_5613, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5615 = eq(btb_rd_addr_p1_f, UInt<8>("h0db")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5616 = bits(_T_5615, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5617 = eq(btb_rd_addr_p1_f, UInt<8>("h0dc")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5618 = bits(_T_5617, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5619 = eq(btb_rd_addr_p1_f, UInt<8>("h0dd")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5620 = bits(_T_5619, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5621 = eq(btb_rd_addr_p1_f, UInt<8>("h0de")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5622 = bits(_T_5621, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5623 = eq(btb_rd_addr_p1_f, UInt<8>("h0df")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5624 = bits(_T_5623, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5625 = eq(btb_rd_addr_p1_f, UInt<8>("h0e0")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5626 = bits(_T_5625, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5627 = eq(btb_rd_addr_p1_f, UInt<8>("h0e1")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5628 = bits(_T_5627, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5629 = eq(btb_rd_addr_p1_f, UInt<8>("h0e2")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5630 = bits(_T_5629, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5631 = eq(btb_rd_addr_p1_f, UInt<8>("h0e3")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5632 = bits(_T_5631, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5633 = eq(btb_rd_addr_p1_f, UInt<8>("h0e4")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5634 = bits(_T_5633, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5635 = eq(btb_rd_addr_p1_f, UInt<8>("h0e5")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5636 = bits(_T_5635, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5637 = eq(btb_rd_addr_p1_f, UInt<8>("h0e6")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5638 = bits(_T_5637, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5639 = eq(btb_rd_addr_p1_f, UInt<8>("h0e7")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5640 = bits(_T_5639, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5641 = eq(btb_rd_addr_p1_f, UInt<8>("h0e8")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5642 = bits(_T_5641, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5643 = eq(btb_rd_addr_p1_f, UInt<8>("h0e9")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5644 = bits(_T_5643, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5645 = eq(btb_rd_addr_p1_f, UInt<8>("h0ea")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5646 = bits(_T_5645, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5647 = eq(btb_rd_addr_p1_f, UInt<8>("h0eb")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5648 = bits(_T_5647, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5649 = eq(btb_rd_addr_p1_f, UInt<8>("h0ec")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5650 = bits(_T_5649, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5651 = eq(btb_rd_addr_p1_f, UInt<8>("h0ed")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5652 = bits(_T_5651, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5653 = eq(btb_rd_addr_p1_f, UInt<8>("h0ee")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5654 = bits(_T_5653, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5655 = eq(btb_rd_addr_p1_f, UInt<8>("h0ef")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5656 = bits(_T_5655, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5657 = eq(btb_rd_addr_p1_f, UInt<8>("h0f0")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5658 = bits(_T_5657, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5659 = eq(btb_rd_addr_p1_f, UInt<8>("h0f1")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5660 = bits(_T_5659, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5661 = eq(btb_rd_addr_p1_f, UInt<8>("h0f2")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5662 = bits(_T_5661, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5663 = eq(btb_rd_addr_p1_f, UInt<8>("h0f3")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5664 = bits(_T_5663, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5665 = eq(btb_rd_addr_p1_f, UInt<8>("h0f4")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5666 = bits(_T_5665, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5667 = eq(btb_rd_addr_p1_f, UInt<8>("h0f5")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5668 = bits(_T_5667, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5669 = eq(btb_rd_addr_p1_f, UInt<8>("h0f6")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5670 = bits(_T_5669, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5671 = eq(btb_rd_addr_p1_f, UInt<8>("h0f7")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5672 = bits(_T_5671, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5673 = eq(btb_rd_addr_p1_f, UInt<8>("h0f8")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5674 = bits(_T_5673, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5675 = eq(btb_rd_addr_p1_f, UInt<8>("h0f9")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5676 = bits(_T_5675, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5677 = eq(btb_rd_addr_p1_f, UInt<8>("h0fa")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5678 = bits(_T_5677, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5679 = eq(btb_rd_addr_p1_f, UInt<8>("h0fb")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5680 = bits(_T_5679, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5681 = eq(btb_rd_addr_p1_f, UInt<8>("h0fc")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5682 = bits(_T_5681, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5683 = eq(btb_rd_addr_p1_f, UInt<8>("h0fd")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5684 = bits(_T_5683, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5685 = eq(btb_rd_addr_p1_f, UInt<8>("h0fe")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5686 = bits(_T_5685, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5687 = eq(btb_rd_addr_p1_f, UInt<8>("h0ff")) @[el2_ifu_bp_ctl.scala 367:83]
|
|
node _T_5688 = bits(_T_5687, 0, 0) @[el2_ifu_bp_ctl.scala 367:91]
|
|
node _T_5689 = mux(_T_5178, btb_bank0_rd_data_way1_out_0, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5690 = mux(_T_5180, btb_bank0_rd_data_way1_out_1, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5691 = mux(_T_5182, btb_bank0_rd_data_way1_out_2, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5692 = mux(_T_5184, btb_bank0_rd_data_way1_out_3, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5693 = mux(_T_5186, btb_bank0_rd_data_way1_out_4, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5694 = mux(_T_5188, btb_bank0_rd_data_way1_out_5, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5695 = mux(_T_5190, btb_bank0_rd_data_way1_out_6, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5696 = mux(_T_5192, btb_bank0_rd_data_way1_out_7, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5697 = mux(_T_5194, btb_bank0_rd_data_way1_out_8, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5698 = mux(_T_5196, btb_bank0_rd_data_way1_out_9, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5699 = mux(_T_5198, btb_bank0_rd_data_way1_out_10, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5700 = mux(_T_5200, btb_bank0_rd_data_way1_out_11, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5701 = mux(_T_5202, btb_bank0_rd_data_way1_out_12, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5702 = mux(_T_5204, btb_bank0_rd_data_way1_out_13, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5703 = mux(_T_5206, btb_bank0_rd_data_way1_out_14, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5704 = mux(_T_5208, btb_bank0_rd_data_way1_out_15, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5705 = mux(_T_5210, btb_bank0_rd_data_way1_out_16, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5706 = mux(_T_5212, btb_bank0_rd_data_way1_out_17, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5707 = mux(_T_5214, btb_bank0_rd_data_way1_out_18, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5708 = mux(_T_5216, btb_bank0_rd_data_way1_out_19, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5709 = mux(_T_5218, btb_bank0_rd_data_way1_out_20, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5710 = mux(_T_5220, btb_bank0_rd_data_way1_out_21, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5711 = mux(_T_5222, btb_bank0_rd_data_way1_out_22, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5712 = mux(_T_5224, btb_bank0_rd_data_way1_out_23, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5713 = mux(_T_5226, btb_bank0_rd_data_way1_out_24, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5714 = mux(_T_5228, btb_bank0_rd_data_way1_out_25, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5715 = mux(_T_5230, btb_bank0_rd_data_way1_out_26, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5716 = mux(_T_5232, btb_bank0_rd_data_way1_out_27, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5717 = mux(_T_5234, btb_bank0_rd_data_way1_out_28, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5718 = mux(_T_5236, btb_bank0_rd_data_way1_out_29, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5719 = mux(_T_5238, btb_bank0_rd_data_way1_out_30, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5720 = mux(_T_5240, btb_bank0_rd_data_way1_out_31, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5721 = mux(_T_5242, btb_bank0_rd_data_way1_out_32, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5722 = mux(_T_5244, btb_bank0_rd_data_way1_out_33, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5723 = mux(_T_5246, btb_bank0_rd_data_way1_out_34, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5724 = mux(_T_5248, btb_bank0_rd_data_way1_out_35, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5725 = mux(_T_5250, btb_bank0_rd_data_way1_out_36, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5726 = mux(_T_5252, btb_bank0_rd_data_way1_out_37, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5727 = mux(_T_5254, btb_bank0_rd_data_way1_out_38, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5728 = mux(_T_5256, btb_bank0_rd_data_way1_out_39, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5729 = mux(_T_5258, btb_bank0_rd_data_way1_out_40, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5730 = mux(_T_5260, btb_bank0_rd_data_way1_out_41, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5731 = mux(_T_5262, btb_bank0_rd_data_way1_out_42, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5732 = mux(_T_5264, btb_bank0_rd_data_way1_out_43, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5733 = mux(_T_5266, btb_bank0_rd_data_way1_out_44, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5734 = mux(_T_5268, btb_bank0_rd_data_way1_out_45, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5735 = mux(_T_5270, btb_bank0_rd_data_way1_out_46, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5736 = mux(_T_5272, btb_bank0_rd_data_way1_out_47, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5737 = mux(_T_5274, btb_bank0_rd_data_way1_out_48, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5738 = mux(_T_5276, btb_bank0_rd_data_way1_out_49, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5739 = mux(_T_5278, btb_bank0_rd_data_way1_out_50, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5740 = mux(_T_5280, btb_bank0_rd_data_way1_out_51, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5741 = mux(_T_5282, btb_bank0_rd_data_way1_out_52, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5742 = mux(_T_5284, btb_bank0_rd_data_way1_out_53, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5743 = mux(_T_5286, btb_bank0_rd_data_way1_out_54, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5744 = mux(_T_5288, btb_bank0_rd_data_way1_out_55, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5745 = mux(_T_5290, btb_bank0_rd_data_way1_out_56, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5746 = mux(_T_5292, btb_bank0_rd_data_way1_out_57, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5747 = mux(_T_5294, btb_bank0_rd_data_way1_out_58, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5748 = mux(_T_5296, btb_bank0_rd_data_way1_out_59, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5749 = mux(_T_5298, btb_bank0_rd_data_way1_out_60, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5750 = mux(_T_5300, btb_bank0_rd_data_way1_out_61, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5751 = mux(_T_5302, btb_bank0_rd_data_way1_out_62, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5752 = mux(_T_5304, btb_bank0_rd_data_way1_out_63, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5753 = mux(_T_5306, btb_bank0_rd_data_way1_out_64, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5754 = mux(_T_5308, btb_bank0_rd_data_way1_out_65, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5755 = mux(_T_5310, btb_bank0_rd_data_way1_out_66, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5756 = mux(_T_5312, btb_bank0_rd_data_way1_out_67, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5757 = mux(_T_5314, btb_bank0_rd_data_way1_out_68, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5758 = mux(_T_5316, btb_bank0_rd_data_way1_out_69, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5759 = mux(_T_5318, btb_bank0_rd_data_way1_out_70, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5760 = mux(_T_5320, btb_bank0_rd_data_way1_out_71, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5761 = mux(_T_5322, btb_bank0_rd_data_way1_out_72, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5762 = mux(_T_5324, btb_bank0_rd_data_way1_out_73, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5763 = mux(_T_5326, btb_bank0_rd_data_way1_out_74, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5764 = mux(_T_5328, btb_bank0_rd_data_way1_out_75, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5765 = mux(_T_5330, btb_bank0_rd_data_way1_out_76, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5766 = mux(_T_5332, btb_bank0_rd_data_way1_out_77, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5767 = mux(_T_5334, btb_bank0_rd_data_way1_out_78, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5768 = mux(_T_5336, btb_bank0_rd_data_way1_out_79, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5769 = mux(_T_5338, btb_bank0_rd_data_way1_out_80, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5770 = mux(_T_5340, btb_bank0_rd_data_way1_out_81, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5771 = mux(_T_5342, btb_bank0_rd_data_way1_out_82, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5772 = mux(_T_5344, btb_bank0_rd_data_way1_out_83, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5773 = mux(_T_5346, btb_bank0_rd_data_way1_out_84, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5774 = mux(_T_5348, btb_bank0_rd_data_way1_out_85, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5775 = mux(_T_5350, btb_bank0_rd_data_way1_out_86, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5776 = mux(_T_5352, btb_bank0_rd_data_way1_out_87, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5777 = mux(_T_5354, btb_bank0_rd_data_way1_out_88, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5778 = mux(_T_5356, btb_bank0_rd_data_way1_out_89, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5779 = mux(_T_5358, btb_bank0_rd_data_way1_out_90, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5780 = mux(_T_5360, btb_bank0_rd_data_way1_out_91, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5781 = mux(_T_5362, btb_bank0_rd_data_way1_out_92, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5782 = mux(_T_5364, btb_bank0_rd_data_way1_out_93, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5783 = mux(_T_5366, btb_bank0_rd_data_way1_out_94, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5784 = mux(_T_5368, btb_bank0_rd_data_way1_out_95, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5785 = mux(_T_5370, btb_bank0_rd_data_way1_out_96, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5786 = mux(_T_5372, btb_bank0_rd_data_way1_out_97, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5787 = mux(_T_5374, btb_bank0_rd_data_way1_out_98, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5788 = mux(_T_5376, btb_bank0_rd_data_way1_out_99, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5789 = mux(_T_5378, btb_bank0_rd_data_way1_out_100, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5790 = mux(_T_5380, btb_bank0_rd_data_way1_out_101, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5791 = mux(_T_5382, btb_bank0_rd_data_way1_out_102, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5792 = mux(_T_5384, btb_bank0_rd_data_way1_out_103, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5793 = mux(_T_5386, btb_bank0_rd_data_way1_out_104, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5794 = mux(_T_5388, btb_bank0_rd_data_way1_out_105, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5795 = mux(_T_5390, btb_bank0_rd_data_way1_out_106, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5796 = mux(_T_5392, btb_bank0_rd_data_way1_out_107, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5797 = mux(_T_5394, btb_bank0_rd_data_way1_out_108, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5798 = mux(_T_5396, btb_bank0_rd_data_way1_out_109, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5799 = mux(_T_5398, btb_bank0_rd_data_way1_out_110, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5800 = mux(_T_5400, btb_bank0_rd_data_way1_out_111, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5801 = mux(_T_5402, btb_bank0_rd_data_way1_out_112, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5802 = mux(_T_5404, btb_bank0_rd_data_way1_out_113, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5803 = mux(_T_5406, btb_bank0_rd_data_way1_out_114, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5804 = mux(_T_5408, btb_bank0_rd_data_way1_out_115, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5805 = mux(_T_5410, btb_bank0_rd_data_way1_out_116, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5806 = mux(_T_5412, btb_bank0_rd_data_way1_out_117, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5807 = mux(_T_5414, btb_bank0_rd_data_way1_out_118, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5808 = mux(_T_5416, btb_bank0_rd_data_way1_out_119, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5809 = mux(_T_5418, btb_bank0_rd_data_way1_out_120, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5810 = mux(_T_5420, btb_bank0_rd_data_way1_out_121, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5811 = mux(_T_5422, btb_bank0_rd_data_way1_out_122, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5812 = mux(_T_5424, btb_bank0_rd_data_way1_out_123, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5813 = mux(_T_5426, btb_bank0_rd_data_way1_out_124, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5814 = mux(_T_5428, btb_bank0_rd_data_way1_out_125, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5815 = mux(_T_5430, btb_bank0_rd_data_way1_out_126, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5816 = mux(_T_5432, btb_bank0_rd_data_way1_out_127, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5817 = mux(_T_5434, btb_bank0_rd_data_way1_out_128, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5818 = mux(_T_5436, btb_bank0_rd_data_way1_out_129, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5819 = mux(_T_5438, btb_bank0_rd_data_way1_out_130, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5820 = mux(_T_5440, btb_bank0_rd_data_way1_out_131, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5821 = mux(_T_5442, btb_bank0_rd_data_way1_out_132, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5822 = mux(_T_5444, btb_bank0_rd_data_way1_out_133, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5823 = mux(_T_5446, btb_bank0_rd_data_way1_out_134, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5824 = mux(_T_5448, btb_bank0_rd_data_way1_out_135, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5825 = mux(_T_5450, btb_bank0_rd_data_way1_out_136, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5826 = mux(_T_5452, btb_bank0_rd_data_way1_out_137, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5827 = mux(_T_5454, btb_bank0_rd_data_way1_out_138, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5828 = mux(_T_5456, btb_bank0_rd_data_way1_out_139, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5829 = mux(_T_5458, btb_bank0_rd_data_way1_out_140, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5830 = mux(_T_5460, btb_bank0_rd_data_way1_out_141, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5831 = mux(_T_5462, btb_bank0_rd_data_way1_out_142, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5832 = mux(_T_5464, btb_bank0_rd_data_way1_out_143, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5833 = mux(_T_5466, btb_bank0_rd_data_way1_out_144, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5834 = mux(_T_5468, btb_bank0_rd_data_way1_out_145, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5835 = mux(_T_5470, btb_bank0_rd_data_way1_out_146, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5836 = mux(_T_5472, btb_bank0_rd_data_way1_out_147, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5837 = mux(_T_5474, btb_bank0_rd_data_way1_out_148, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5838 = mux(_T_5476, btb_bank0_rd_data_way1_out_149, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5839 = mux(_T_5478, btb_bank0_rd_data_way1_out_150, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5840 = mux(_T_5480, btb_bank0_rd_data_way1_out_151, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5841 = mux(_T_5482, btb_bank0_rd_data_way1_out_152, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5842 = mux(_T_5484, btb_bank0_rd_data_way1_out_153, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5843 = mux(_T_5486, btb_bank0_rd_data_way1_out_154, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5844 = mux(_T_5488, btb_bank0_rd_data_way1_out_155, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5845 = mux(_T_5490, btb_bank0_rd_data_way1_out_156, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5846 = mux(_T_5492, btb_bank0_rd_data_way1_out_157, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5847 = mux(_T_5494, btb_bank0_rd_data_way1_out_158, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5848 = mux(_T_5496, btb_bank0_rd_data_way1_out_159, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5849 = mux(_T_5498, btb_bank0_rd_data_way1_out_160, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5850 = mux(_T_5500, btb_bank0_rd_data_way1_out_161, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5851 = mux(_T_5502, btb_bank0_rd_data_way1_out_162, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5852 = mux(_T_5504, btb_bank0_rd_data_way1_out_163, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5853 = mux(_T_5506, btb_bank0_rd_data_way1_out_164, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5854 = mux(_T_5508, btb_bank0_rd_data_way1_out_165, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5855 = mux(_T_5510, btb_bank0_rd_data_way1_out_166, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5856 = mux(_T_5512, btb_bank0_rd_data_way1_out_167, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5857 = mux(_T_5514, btb_bank0_rd_data_way1_out_168, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5858 = mux(_T_5516, btb_bank0_rd_data_way1_out_169, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5859 = mux(_T_5518, btb_bank0_rd_data_way1_out_170, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5860 = mux(_T_5520, btb_bank0_rd_data_way1_out_171, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5861 = mux(_T_5522, btb_bank0_rd_data_way1_out_172, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5862 = mux(_T_5524, btb_bank0_rd_data_way1_out_173, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5863 = mux(_T_5526, btb_bank0_rd_data_way1_out_174, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5864 = mux(_T_5528, btb_bank0_rd_data_way1_out_175, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5865 = mux(_T_5530, btb_bank0_rd_data_way1_out_176, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5866 = mux(_T_5532, btb_bank0_rd_data_way1_out_177, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5867 = mux(_T_5534, btb_bank0_rd_data_way1_out_178, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5868 = mux(_T_5536, btb_bank0_rd_data_way1_out_179, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5869 = mux(_T_5538, btb_bank0_rd_data_way1_out_180, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5870 = mux(_T_5540, btb_bank0_rd_data_way1_out_181, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5871 = mux(_T_5542, btb_bank0_rd_data_way1_out_182, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5872 = mux(_T_5544, btb_bank0_rd_data_way1_out_183, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5873 = mux(_T_5546, btb_bank0_rd_data_way1_out_184, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5874 = mux(_T_5548, btb_bank0_rd_data_way1_out_185, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5875 = mux(_T_5550, btb_bank0_rd_data_way1_out_186, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5876 = mux(_T_5552, btb_bank0_rd_data_way1_out_187, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5877 = mux(_T_5554, btb_bank0_rd_data_way1_out_188, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5878 = mux(_T_5556, btb_bank0_rd_data_way1_out_189, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5879 = mux(_T_5558, btb_bank0_rd_data_way1_out_190, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5880 = mux(_T_5560, btb_bank0_rd_data_way1_out_191, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5881 = mux(_T_5562, btb_bank0_rd_data_way1_out_192, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5882 = mux(_T_5564, btb_bank0_rd_data_way1_out_193, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5883 = mux(_T_5566, btb_bank0_rd_data_way1_out_194, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5884 = mux(_T_5568, btb_bank0_rd_data_way1_out_195, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5885 = mux(_T_5570, btb_bank0_rd_data_way1_out_196, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5886 = mux(_T_5572, btb_bank0_rd_data_way1_out_197, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5887 = mux(_T_5574, btb_bank0_rd_data_way1_out_198, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5888 = mux(_T_5576, btb_bank0_rd_data_way1_out_199, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5889 = mux(_T_5578, btb_bank0_rd_data_way1_out_200, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5890 = mux(_T_5580, btb_bank0_rd_data_way1_out_201, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5891 = mux(_T_5582, btb_bank0_rd_data_way1_out_202, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5892 = mux(_T_5584, btb_bank0_rd_data_way1_out_203, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5893 = mux(_T_5586, btb_bank0_rd_data_way1_out_204, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5894 = mux(_T_5588, btb_bank0_rd_data_way1_out_205, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5895 = mux(_T_5590, btb_bank0_rd_data_way1_out_206, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5896 = mux(_T_5592, btb_bank0_rd_data_way1_out_207, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5897 = mux(_T_5594, btb_bank0_rd_data_way1_out_208, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5898 = mux(_T_5596, btb_bank0_rd_data_way1_out_209, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5899 = mux(_T_5598, btb_bank0_rd_data_way1_out_210, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5900 = mux(_T_5600, btb_bank0_rd_data_way1_out_211, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5901 = mux(_T_5602, btb_bank0_rd_data_way1_out_212, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5902 = mux(_T_5604, btb_bank0_rd_data_way1_out_213, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5903 = mux(_T_5606, btb_bank0_rd_data_way1_out_214, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5904 = mux(_T_5608, btb_bank0_rd_data_way1_out_215, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5905 = mux(_T_5610, btb_bank0_rd_data_way1_out_216, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5906 = mux(_T_5612, btb_bank0_rd_data_way1_out_217, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5907 = mux(_T_5614, btb_bank0_rd_data_way1_out_218, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5908 = mux(_T_5616, btb_bank0_rd_data_way1_out_219, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5909 = mux(_T_5618, btb_bank0_rd_data_way1_out_220, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5910 = mux(_T_5620, btb_bank0_rd_data_way1_out_221, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5911 = mux(_T_5622, btb_bank0_rd_data_way1_out_222, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5912 = mux(_T_5624, btb_bank0_rd_data_way1_out_223, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5913 = mux(_T_5626, btb_bank0_rd_data_way1_out_224, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5914 = mux(_T_5628, btb_bank0_rd_data_way1_out_225, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5915 = mux(_T_5630, btb_bank0_rd_data_way1_out_226, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5916 = mux(_T_5632, btb_bank0_rd_data_way1_out_227, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5917 = mux(_T_5634, btb_bank0_rd_data_way1_out_228, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5918 = mux(_T_5636, btb_bank0_rd_data_way1_out_229, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5919 = mux(_T_5638, btb_bank0_rd_data_way1_out_230, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5920 = mux(_T_5640, btb_bank0_rd_data_way1_out_231, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5921 = mux(_T_5642, btb_bank0_rd_data_way1_out_232, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5922 = mux(_T_5644, btb_bank0_rd_data_way1_out_233, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5923 = mux(_T_5646, btb_bank0_rd_data_way1_out_234, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5924 = mux(_T_5648, btb_bank0_rd_data_way1_out_235, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5925 = mux(_T_5650, btb_bank0_rd_data_way1_out_236, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5926 = mux(_T_5652, btb_bank0_rd_data_way1_out_237, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5927 = mux(_T_5654, btb_bank0_rd_data_way1_out_238, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5928 = mux(_T_5656, btb_bank0_rd_data_way1_out_239, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5929 = mux(_T_5658, btb_bank0_rd_data_way1_out_240, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5930 = mux(_T_5660, btb_bank0_rd_data_way1_out_241, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5931 = mux(_T_5662, btb_bank0_rd_data_way1_out_242, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5932 = mux(_T_5664, btb_bank0_rd_data_way1_out_243, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5933 = mux(_T_5666, btb_bank0_rd_data_way1_out_244, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5934 = mux(_T_5668, btb_bank0_rd_data_way1_out_245, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5935 = mux(_T_5670, btb_bank0_rd_data_way1_out_246, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5936 = mux(_T_5672, btb_bank0_rd_data_way1_out_247, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5937 = mux(_T_5674, btb_bank0_rd_data_way1_out_248, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5938 = mux(_T_5676, btb_bank0_rd_data_way1_out_249, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5939 = mux(_T_5678, btb_bank0_rd_data_way1_out_250, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5940 = mux(_T_5680, btb_bank0_rd_data_way1_out_251, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5941 = mux(_T_5682, btb_bank0_rd_data_way1_out_252, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5942 = mux(_T_5684, btb_bank0_rd_data_way1_out_253, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5943 = mux(_T_5686, btb_bank0_rd_data_way1_out_254, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5944 = mux(_T_5688, btb_bank0_rd_data_way1_out_255, UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_5945 = or(_T_5689, _T_5690) @[Mux.scala 27:72]
|
|
node _T_5946 = or(_T_5945, _T_5691) @[Mux.scala 27:72]
|
|
node _T_5947 = or(_T_5946, _T_5692) @[Mux.scala 27:72]
|
|
node _T_5948 = or(_T_5947, _T_5693) @[Mux.scala 27:72]
|
|
node _T_5949 = or(_T_5948, _T_5694) @[Mux.scala 27:72]
|
|
node _T_5950 = or(_T_5949, _T_5695) @[Mux.scala 27:72]
|
|
node _T_5951 = or(_T_5950, _T_5696) @[Mux.scala 27:72]
|
|
node _T_5952 = or(_T_5951, _T_5697) @[Mux.scala 27:72]
|
|
node _T_5953 = or(_T_5952, _T_5698) @[Mux.scala 27:72]
|
|
node _T_5954 = or(_T_5953, _T_5699) @[Mux.scala 27:72]
|
|
node _T_5955 = or(_T_5954, _T_5700) @[Mux.scala 27:72]
|
|
node _T_5956 = or(_T_5955, _T_5701) @[Mux.scala 27:72]
|
|
node _T_5957 = or(_T_5956, _T_5702) @[Mux.scala 27:72]
|
|
node _T_5958 = or(_T_5957, _T_5703) @[Mux.scala 27:72]
|
|
node _T_5959 = or(_T_5958, _T_5704) @[Mux.scala 27:72]
|
|
node _T_5960 = or(_T_5959, _T_5705) @[Mux.scala 27:72]
|
|
node _T_5961 = or(_T_5960, _T_5706) @[Mux.scala 27:72]
|
|
node _T_5962 = or(_T_5961, _T_5707) @[Mux.scala 27:72]
|
|
node _T_5963 = or(_T_5962, _T_5708) @[Mux.scala 27:72]
|
|
node _T_5964 = or(_T_5963, _T_5709) @[Mux.scala 27:72]
|
|
node _T_5965 = or(_T_5964, _T_5710) @[Mux.scala 27:72]
|
|
node _T_5966 = or(_T_5965, _T_5711) @[Mux.scala 27:72]
|
|
node _T_5967 = or(_T_5966, _T_5712) @[Mux.scala 27:72]
|
|
node _T_5968 = or(_T_5967, _T_5713) @[Mux.scala 27:72]
|
|
node _T_5969 = or(_T_5968, _T_5714) @[Mux.scala 27:72]
|
|
node _T_5970 = or(_T_5969, _T_5715) @[Mux.scala 27:72]
|
|
node _T_5971 = or(_T_5970, _T_5716) @[Mux.scala 27:72]
|
|
node _T_5972 = or(_T_5971, _T_5717) @[Mux.scala 27:72]
|
|
node _T_5973 = or(_T_5972, _T_5718) @[Mux.scala 27:72]
|
|
node _T_5974 = or(_T_5973, _T_5719) @[Mux.scala 27:72]
|
|
node _T_5975 = or(_T_5974, _T_5720) @[Mux.scala 27:72]
|
|
node _T_5976 = or(_T_5975, _T_5721) @[Mux.scala 27:72]
|
|
node _T_5977 = or(_T_5976, _T_5722) @[Mux.scala 27:72]
|
|
node _T_5978 = or(_T_5977, _T_5723) @[Mux.scala 27:72]
|
|
node _T_5979 = or(_T_5978, _T_5724) @[Mux.scala 27:72]
|
|
node _T_5980 = or(_T_5979, _T_5725) @[Mux.scala 27:72]
|
|
node _T_5981 = or(_T_5980, _T_5726) @[Mux.scala 27:72]
|
|
node _T_5982 = or(_T_5981, _T_5727) @[Mux.scala 27:72]
|
|
node _T_5983 = or(_T_5982, _T_5728) @[Mux.scala 27:72]
|
|
node _T_5984 = or(_T_5983, _T_5729) @[Mux.scala 27:72]
|
|
node _T_5985 = or(_T_5984, _T_5730) @[Mux.scala 27:72]
|
|
node _T_5986 = or(_T_5985, _T_5731) @[Mux.scala 27:72]
|
|
node _T_5987 = or(_T_5986, _T_5732) @[Mux.scala 27:72]
|
|
node _T_5988 = or(_T_5987, _T_5733) @[Mux.scala 27:72]
|
|
node _T_5989 = or(_T_5988, _T_5734) @[Mux.scala 27:72]
|
|
node _T_5990 = or(_T_5989, _T_5735) @[Mux.scala 27:72]
|
|
node _T_5991 = or(_T_5990, _T_5736) @[Mux.scala 27:72]
|
|
node _T_5992 = or(_T_5991, _T_5737) @[Mux.scala 27:72]
|
|
node _T_5993 = or(_T_5992, _T_5738) @[Mux.scala 27:72]
|
|
node _T_5994 = or(_T_5993, _T_5739) @[Mux.scala 27:72]
|
|
node _T_5995 = or(_T_5994, _T_5740) @[Mux.scala 27:72]
|
|
node _T_5996 = or(_T_5995, _T_5741) @[Mux.scala 27:72]
|
|
node _T_5997 = or(_T_5996, _T_5742) @[Mux.scala 27:72]
|
|
node _T_5998 = or(_T_5997, _T_5743) @[Mux.scala 27:72]
|
|
node _T_5999 = or(_T_5998, _T_5744) @[Mux.scala 27:72]
|
|
node _T_6000 = or(_T_5999, _T_5745) @[Mux.scala 27:72]
|
|
node _T_6001 = or(_T_6000, _T_5746) @[Mux.scala 27:72]
|
|
node _T_6002 = or(_T_6001, _T_5747) @[Mux.scala 27:72]
|
|
node _T_6003 = or(_T_6002, _T_5748) @[Mux.scala 27:72]
|
|
node _T_6004 = or(_T_6003, _T_5749) @[Mux.scala 27:72]
|
|
node _T_6005 = or(_T_6004, _T_5750) @[Mux.scala 27:72]
|
|
node _T_6006 = or(_T_6005, _T_5751) @[Mux.scala 27:72]
|
|
node _T_6007 = or(_T_6006, _T_5752) @[Mux.scala 27:72]
|
|
node _T_6008 = or(_T_6007, _T_5753) @[Mux.scala 27:72]
|
|
node _T_6009 = or(_T_6008, _T_5754) @[Mux.scala 27:72]
|
|
node _T_6010 = or(_T_6009, _T_5755) @[Mux.scala 27:72]
|
|
node _T_6011 = or(_T_6010, _T_5756) @[Mux.scala 27:72]
|
|
node _T_6012 = or(_T_6011, _T_5757) @[Mux.scala 27:72]
|
|
node _T_6013 = or(_T_6012, _T_5758) @[Mux.scala 27:72]
|
|
node _T_6014 = or(_T_6013, _T_5759) @[Mux.scala 27:72]
|
|
node _T_6015 = or(_T_6014, _T_5760) @[Mux.scala 27:72]
|
|
node _T_6016 = or(_T_6015, _T_5761) @[Mux.scala 27:72]
|
|
node _T_6017 = or(_T_6016, _T_5762) @[Mux.scala 27:72]
|
|
node _T_6018 = or(_T_6017, _T_5763) @[Mux.scala 27:72]
|
|
node _T_6019 = or(_T_6018, _T_5764) @[Mux.scala 27:72]
|
|
node _T_6020 = or(_T_6019, _T_5765) @[Mux.scala 27:72]
|
|
node _T_6021 = or(_T_6020, _T_5766) @[Mux.scala 27:72]
|
|
node _T_6022 = or(_T_6021, _T_5767) @[Mux.scala 27:72]
|
|
node _T_6023 = or(_T_6022, _T_5768) @[Mux.scala 27:72]
|
|
node _T_6024 = or(_T_6023, _T_5769) @[Mux.scala 27:72]
|
|
node _T_6025 = or(_T_6024, _T_5770) @[Mux.scala 27:72]
|
|
node _T_6026 = or(_T_6025, _T_5771) @[Mux.scala 27:72]
|
|
node _T_6027 = or(_T_6026, _T_5772) @[Mux.scala 27:72]
|
|
node _T_6028 = or(_T_6027, _T_5773) @[Mux.scala 27:72]
|
|
node _T_6029 = or(_T_6028, _T_5774) @[Mux.scala 27:72]
|
|
node _T_6030 = or(_T_6029, _T_5775) @[Mux.scala 27:72]
|
|
node _T_6031 = or(_T_6030, _T_5776) @[Mux.scala 27:72]
|
|
node _T_6032 = or(_T_6031, _T_5777) @[Mux.scala 27:72]
|
|
node _T_6033 = or(_T_6032, _T_5778) @[Mux.scala 27:72]
|
|
node _T_6034 = or(_T_6033, _T_5779) @[Mux.scala 27:72]
|
|
node _T_6035 = or(_T_6034, _T_5780) @[Mux.scala 27:72]
|
|
node _T_6036 = or(_T_6035, _T_5781) @[Mux.scala 27:72]
|
|
node _T_6037 = or(_T_6036, _T_5782) @[Mux.scala 27:72]
|
|
node _T_6038 = or(_T_6037, _T_5783) @[Mux.scala 27:72]
|
|
node _T_6039 = or(_T_6038, _T_5784) @[Mux.scala 27:72]
|
|
node _T_6040 = or(_T_6039, _T_5785) @[Mux.scala 27:72]
|
|
node _T_6041 = or(_T_6040, _T_5786) @[Mux.scala 27:72]
|
|
node _T_6042 = or(_T_6041, _T_5787) @[Mux.scala 27:72]
|
|
node _T_6043 = or(_T_6042, _T_5788) @[Mux.scala 27:72]
|
|
node _T_6044 = or(_T_6043, _T_5789) @[Mux.scala 27:72]
|
|
node _T_6045 = or(_T_6044, _T_5790) @[Mux.scala 27:72]
|
|
node _T_6046 = or(_T_6045, _T_5791) @[Mux.scala 27:72]
|
|
node _T_6047 = or(_T_6046, _T_5792) @[Mux.scala 27:72]
|
|
node _T_6048 = or(_T_6047, _T_5793) @[Mux.scala 27:72]
|
|
node _T_6049 = or(_T_6048, _T_5794) @[Mux.scala 27:72]
|
|
node _T_6050 = or(_T_6049, _T_5795) @[Mux.scala 27:72]
|
|
node _T_6051 = or(_T_6050, _T_5796) @[Mux.scala 27:72]
|
|
node _T_6052 = or(_T_6051, _T_5797) @[Mux.scala 27:72]
|
|
node _T_6053 = or(_T_6052, _T_5798) @[Mux.scala 27:72]
|
|
node _T_6054 = or(_T_6053, _T_5799) @[Mux.scala 27:72]
|
|
node _T_6055 = or(_T_6054, _T_5800) @[Mux.scala 27:72]
|
|
node _T_6056 = or(_T_6055, _T_5801) @[Mux.scala 27:72]
|
|
node _T_6057 = or(_T_6056, _T_5802) @[Mux.scala 27:72]
|
|
node _T_6058 = or(_T_6057, _T_5803) @[Mux.scala 27:72]
|
|
node _T_6059 = or(_T_6058, _T_5804) @[Mux.scala 27:72]
|
|
node _T_6060 = or(_T_6059, _T_5805) @[Mux.scala 27:72]
|
|
node _T_6061 = or(_T_6060, _T_5806) @[Mux.scala 27:72]
|
|
node _T_6062 = or(_T_6061, _T_5807) @[Mux.scala 27:72]
|
|
node _T_6063 = or(_T_6062, _T_5808) @[Mux.scala 27:72]
|
|
node _T_6064 = or(_T_6063, _T_5809) @[Mux.scala 27:72]
|
|
node _T_6065 = or(_T_6064, _T_5810) @[Mux.scala 27:72]
|
|
node _T_6066 = or(_T_6065, _T_5811) @[Mux.scala 27:72]
|
|
node _T_6067 = or(_T_6066, _T_5812) @[Mux.scala 27:72]
|
|
node _T_6068 = or(_T_6067, _T_5813) @[Mux.scala 27:72]
|
|
node _T_6069 = or(_T_6068, _T_5814) @[Mux.scala 27:72]
|
|
node _T_6070 = or(_T_6069, _T_5815) @[Mux.scala 27:72]
|
|
node _T_6071 = or(_T_6070, _T_5816) @[Mux.scala 27:72]
|
|
node _T_6072 = or(_T_6071, _T_5817) @[Mux.scala 27:72]
|
|
node _T_6073 = or(_T_6072, _T_5818) @[Mux.scala 27:72]
|
|
node _T_6074 = or(_T_6073, _T_5819) @[Mux.scala 27:72]
|
|
node _T_6075 = or(_T_6074, _T_5820) @[Mux.scala 27:72]
|
|
node _T_6076 = or(_T_6075, _T_5821) @[Mux.scala 27:72]
|
|
node _T_6077 = or(_T_6076, _T_5822) @[Mux.scala 27:72]
|
|
node _T_6078 = or(_T_6077, _T_5823) @[Mux.scala 27:72]
|
|
node _T_6079 = or(_T_6078, _T_5824) @[Mux.scala 27:72]
|
|
node _T_6080 = or(_T_6079, _T_5825) @[Mux.scala 27:72]
|
|
node _T_6081 = or(_T_6080, _T_5826) @[Mux.scala 27:72]
|
|
node _T_6082 = or(_T_6081, _T_5827) @[Mux.scala 27:72]
|
|
node _T_6083 = or(_T_6082, _T_5828) @[Mux.scala 27:72]
|
|
node _T_6084 = or(_T_6083, _T_5829) @[Mux.scala 27:72]
|
|
node _T_6085 = or(_T_6084, _T_5830) @[Mux.scala 27:72]
|
|
node _T_6086 = or(_T_6085, _T_5831) @[Mux.scala 27:72]
|
|
node _T_6087 = or(_T_6086, _T_5832) @[Mux.scala 27:72]
|
|
node _T_6088 = or(_T_6087, _T_5833) @[Mux.scala 27:72]
|
|
node _T_6089 = or(_T_6088, _T_5834) @[Mux.scala 27:72]
|
|
node _T_6090 = or(_T_6089, _T_5835) @[Mux.scala 27:72]
|
|
node _T_6091 = or(_T_6090, _T_5836) @[Mux.scala 27:72]
|
|
node _T_6092 = or(_T_6091, _T_5837) @[Mux.scala 27:72]
|
|
node _T_6093 = or(_T_6092, _T_5838) @[Mux.scala 27:72]
|
|
node _T_6094 = or(_T_6093, _T_5839) @[Mux.scala 27:72]
|
|
node _T_6095 = or(_T_6094, _T_5840) @[Mux.scala 27:72]
|
|
node _T_6096 = or(_T_6095, _T_5841) @[Mux.scala 27:72]
|
|
node _T_6097 = or(_T_6096, _T_5842) @[Mux.scala 27:72]
|
|
node _T_6098 = or(_T_6097, _T_5843) @[Mux.scala 27:72]
|
|
node _T_6099 = or(_T_6098, _T_5844) @[Mux.scala 27:72]
|
|
node _T_6100 = or(_T_6099, _T_5845) @[Mux.scala 27:72]
|
|
node _T_6101 = or(_T_6100, _T_5846) @[Mux.scala 27:72]
|
|
node _T_6102 = or(_T_6101, _T_5847) @[Mux.scala 27:72]
|
|
node _T_6103 = or(_T_6102, _T_5848) @[Mux.scala 27:72]
|
|
node _T_6104 = or(_T_6103, _T_5849) @[Mux.scala 27:72]
|
|
node _T_6105 = or(_T_6104, _T_5850) @[Mux.scala 27:72]
|
|
node _T_6106 = or(_T_6105, _T_5851) @[Mux.scala 27:72]
|
|
node _T_6107 = or(_T_6106, _T_5852) @[Mux.scala 27:72]
|
|
node _T_6108 = or(_T_6107, _T_5853) @[Mux.scala 27:72]
|
|
node _T_6109 = or(_T_6108, _T_5854) @[Mux.scala 27:72]
|
|
node _T_6110 = or(_T_6109, _T_5855) @[Mux.scala 27:72]
|
|
node _T_6111 = or(_T_6110, _T_5856) @[Mux.scala 27:72]
|
|
node _T_6112 = or(_T_6111, _T_5857) @[Mux.scala 27:72]
|
|
node _T_6113 = or(_T_6112, _T_5858) @[Mux.scala 27:72]
|
|
node _T_6114 = or(_T_6113, _T_5859) @[Mux.scala 27:72]
|
|
node _T_6115 = or(_T_6114, _T_5860) @[Mux.scala 27:72]
|
|
node _T_6116 = or(_T_6115, _T_5861) @[Mux.scala 27:72]
|
|
node _T_6117 = or(_T_6116, _T_5862) @[Mux.scala 27:72]
|
|
node _T_6118 = or(_T_6117, _T_5863) @[Mux.scala 27:72]
|
|
node _T_6119 = or(_T_6118, _T_5864) @[Mux.scala 27:72]
|
|
node _T_6120 = or(_T_6119, _T_5865) @[Mux.scala 27:72]
|
|
node _T_6121 = or(_T_6120, _T_5866) @[Mux.scala 27:72]
|
|
node _T_6122 = or(_T_6121, _T_5867) @[Mux.scala 27:72]
|
|
node _T_6123 = or(_T_6122, _T_5868) @[Mux.scala 27:72]
|
|
node _T_6124 = or(_T_6123, _T_5869) @[Mux.scala 27:72]
|
|
node _T_6125 = or(_T_6124, _T_5870) @[Mux.scala 27:72]
|
|
node _T_6126 = or(_T_6125, _T_5871) @[Mux.scala 27:72]
|
|
node _T_6127 = or(_T_6126, _T_5872) @[Mux.scala 27:72]
|
|
node _T_6128 = or(_T_6127, _T_5873) @[Mux.scala 27:72]
|
|
node _T_6129 = or(_T_6128, _T_5874) @[Mux.scala 27:72]
|
|
node _T_6130 = or(_T_6129, _T_5875) @[Mux.scala 27:72]
|
|
node _T_6131 = or(_T_6130, _T_5876) @[Mux.scala 27:72]
|
|
node _T_6132 = or(_T_6131, _T_5877) @[Mux.scala 27:72]
|
|
node _T_6133 = or(_T_6132, _T_5878) @[Mux.scala 27:72]
|
|
node _T_6134 = or(_T_6133, _T_5879) @[Mux.scala 27:72]
|
|
node _T_6135 = or(_T_6134, _T_5880) @[Mux.scala 27:72]
|
|
node _T_6136 = or(_T_6135, _T_5881) @[Mux.scala 27:72]
|
|
node _T_6137 = or(_T_6136, _T_5882) @[Mux.scala 27:72]
|
|
node _T_6138 = or(_T_6137, _T_5883) @[Mux.scala 27:72]
|
|
node _T_6139 = or(_T_6138, _T_5884) @[Mux.scala 27:72]
|
|
node _T_6140 = or(_T_6139, _T_5885) @[Mux.scala 27:72]
|
|
node _T_6141 = or(_T_6140, _T_5886) @[Mux.scala 27:72]
|
|
node _T_6142 = or(_T_6141, _T_5887) @[Mux.scala 27:72]
|
|
node _T_6143 = or(_T_6142, _T_5888) @[Mux.scala 27:72]
|
|
node _T_6144 = or(_T_6143, _T_5889) @[Mux.scala 27:72]
|
|
node _T_6145 = or(_T_6144, _T_5890) @[Mux.scala 27:72]
|
|
node _T_6146 = or(_T_6145, _T_5891) @[Mux.scala 27:72]
|
|
node _T_6147 = or(_T_6146, _T_5892) @[Mux.scala 27:72]
|
|
node _T_6148 = or(_T_6147, _T_5893) @[Mux.scala 27:72]
|
|
node _T_6149 = or(_T_6148, _T_5894) @[Mux.scala 27:72]
|
|
node _T_6150 = or(_T_6149, _T_5895) @[Mux.scala 27:72]
|
|
node _T_6151 = or(_T_6150, _T_5896) @[Mux.scala 27:72]
|
|
node _T_6152 = or(_T_6151, _T_5897) @[Mux.scala 27:72]
|
|
node _T_6153 = or(_T_6152, _T_5898) @[Mux.scala 27:72]
|
|
node _T_6154 = or(_T_6153, _T_5899) @[Mux.scala 27:72]
|
|
node _T_6155 = or(_T_6154, _T_5900) @[Mux.scala 27:72]
|
|
node _T_6156 = or(_T_6155, _T_5901) @[Mux.scala 27:72]
|
|
node _T_6157 = or(_T_6156, _T_5902) @[Mux.scala 27:72]
|
|
node _T_6158 = or(_T_6157, _T_5903) @[Mux.scala 27:72]
|
|
node _T_6159 = or(_T_6158, _T_5904) @[Mux.scala 27:72]
|
|
node _T_6160 = or(_T_6159, _T_5905) @[Mux.scala 27:72]
|
|
node _T_6161 = or(_T_6160, _T_5906) @[Mux.scala 27:72]
|
|
node _T_6162 = or(_T_6161, _T_5907) @[Mux.scala 27:72]
|
|
node _T_6163 = or(_T_6162, _T_5908) @[Mux.scala 27:72]
|
|
node _T_6164 = or(_T_6163, _T_5909) @[Mux.scala 27:72]
|
|
node _T_6165 = or(_T_6164, _T_5910) @[Mux.scala 27:72]
|
|
node _T_6166 = or(_T_6165, _T_5911) @[Mux.scala 27:72]
|
|
node _T_6167 = or(_T_6166, _T_5912) @[Mux.scala 27:72]
|
|
node _T_6168 = or(_T_6167, _T_5913) @[Mux.scala 27:72]
|
|
node _T_6169 = or(_T_6168, _T_5914) @[Mux.scala 27:72]
|
|
node _T_6170 = or(_T_6169, _T_5915) @[Mux.scala 27:72]
|
|
node _T_6171 = or(_T_6170, _T_5916) @[Mux.scala 27:72]
|
|
node _T_6172 = or(_T_6171, _T_5917) @[Mux.scala 27:72]
|
|
node _T_6173 = or(_T_6172, _T_5918) @[Mux.scala 27:72]
|
|
node _T_6174 = or(_T_6173, _T_5919) @[Mux.scala 27:72]
|
|
node _T_6175 = or(_T_6174, _T_5920) @[Mux.scala 27:72]
|
|
node _T_6176 = or(_T_6175, _T_5921) @[Mux.scala 27:72]
|
|
node _T_6177 = or(_T_6176, _T_5922) @[Mux.scala 27:72]
|
|
node _T_6178 = or(_T_6177, _T_5923) @[Mux.scala 27:72]
|
|
node _T_6179 = or(_T_6178, _T_5924) @[Mux.scala 27:72]
|
|
node _T_6180 = or(_T_6179, _T_5925) @[Mux.scala 27:72]
|
|
node _T_6181 = or(_T_6180, _T_5926) @[Mux.scala 27:72]
|
|
node _T_6182 = or(_T_6181, _T_5927) @[Mux.scala 27:72]
|
|
node _T_6183 = or(_T_6182, _T_5928) @[Mux.scala 27:72]
|
|
node _T_6184 = or(_T_6183, _T_5929) @[Mux.scala 27:72]
|
|
node _T_6185 = or(_T_6184, _T_5930) @[Mux.scala 27:72]
|
|
node _T_6186 = or(_T_6185, _T_5931) @[Mux.scala 27:72]
|
|
node _T_6187 = or(_T_6186, _T_5932) @[Mux.scala 27:72]
|
|
node _T_6188 = or(_T_6187, _T_5933) @[Mux.scala 27:72]
|
|
node _T_6189 = or(_T_6188, _T_5934) @[Mux.scala 27:72]
|
|
node _T_6190 = or(_T_6189, _T_5935) @[Mux.scala 27:72]
|
|
node _T_6191 = or(_T_6190, _T_5936) @[Mux.scala 27:72]
|
|
node _T_6192 = or(_T_6191, _T_5937) @[Mux.scala 27:72]
|
|
node _T_6193 = or(_T_6192, _T_5938) @[Mux.scala 27:72]
|
|
node _T_6194 = or(_T_6193, _T_5939) @[Mux.scala 27:72]
|
|
node _T_6195 = or(_T_6194, _T_5940) @[Mux.scala 27:72]
|
|
node _T_6196 = or(_T_6195, _T_5941) @[Mux.scala 27:72]
|
|
node _T_6197 = or(_T_6196, _T_5942) @[Mux.scala 27:72]
|
|
node _T_6198 = or(_T_6197, _T_5943) @[Mux.scala 27:72]
|
|
node _T_6199 = or(_T_6198, _T_5944) @[Mux.scala 27:72]
|
|
wire _T_6200 : UInt @[Mux.scala 27:72]
|
|
_T_6200 <= _T_6199 @[Mux.scala 27:72]
|
|
btb_bank0_rd_data_way1_p1_f <= _T_6200 @[el2_ifu_bp_ctl.scala 367:31]
|
|
node _T_6201 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6202 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6203 = eq(_T_6202, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6204 = and(_T_6201, _T_6203) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6205 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6206 = eq(_T_6205, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6207 = and(_T_6204, _T_6206) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6208 = or(_T_6207, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6209 = bits(_T_6208, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_0 = mux(_T_6209, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6210 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6211 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6212 = eq(_T_6211, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6213 = and(_T_6210, _T_6212) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6214 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6215 = eq(_T_6214, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6216 = and(_T_6213, _T_6215) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6217 = or(_T_6216, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6218 = bits(_T_6217, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_1 = mux(_T_6218, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6219 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6220 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6221 = eq(_T_6220, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6222 = and(_T_6219, _T_6221) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6223 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6224 = eq(_T_6223, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6225 = and(_T_6222, _T_6224) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6226 = or(_T_6225, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6227 = bits(_T_6226, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_2 = mux(_T_6227, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6228 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6229 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6230 = eq(_T_6229, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6231 = and(_T_6228, _T_6230) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6232 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6233 = eq(_T_6232, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6234 = and(_T_6231, _T_6233) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6235 = or(_T_6234, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6236 = bits(_T_6235, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_3 = mux(_T_6236, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6237 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6238 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6239 = eq(_T_6238, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6240 = and(_T_6237, _T_6239) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6241 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6242 = eq(_T_6241, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6243 = and(_T_6240, _T_6242) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6244 = or(_T_6243, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6245 = bits(_T_6244, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_4 = mux(_T_6245, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6246 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6247 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6248 = eq(_T_6247, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6249 = and(_T_6246, _T_6248) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6250 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6251 = eq(_T_6250, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6252 = and(_T_6249, _T_6251) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6253 = or(_T_6252, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6254 = bits(_T_6253, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_5 = mux(_T_6254, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6255 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6256 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6257 = eq(_T_6256, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6258 = and(_T_6255, _T_6257) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6259 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6260 = eq(_T_6259, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6261 = and(_T_6258, _T_6260) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6262 = or(_T_6261, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6263 = bits(_T_6262, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_6 = mux(_T_6263, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6264 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6265 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6266 = eq(_T_6265, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6267 = and(_T_6264, _T_6266) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6268 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6269 = eq(_T_6268, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6270 = and(_T_6267, _T_6269) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6271 = or(_T_6270, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6272 = bits(_T_6271, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_7 = mux(_T_6272, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6273 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6274 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6275 = eq(_T_6274, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6276 = and(_T_6273, _T_6275) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6277 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6278 = eq(_T_6277, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6279 = and(_T_6276, _T_6278) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6280 = or(_T_6279, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6281 = bits(_T_6280, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_8 = mux(_T_6281, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6282 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6283 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6284 = eq(_T_6283, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6285 = and(_T_6282, _T_6284) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6286 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6287 = eq(_T_6286, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6288 = and(_T_6285, _T_6287) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6289 = or(_T_6288, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6290 = bits(_T_6289, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_9 = mux(_T_6290, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6291 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6292 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6293 = eq(_T_6292, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6294 = and(_T_6291, _T_6293) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6295 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6296 = eq(_T_6295, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6297 = and(_T_6294, _T_6296) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6298 = or(_T_6297, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6299 = bits(_T_6298, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_10 = mux(_T_6299, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6300 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6301 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6302 = eq(_T_6301, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6303 = and(_T_6300, _T_6302) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6304 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6305 = eq(_T_6304, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6306 = and(_T_6303, _T_6305) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6307 = or(_T_6306, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6308 = bits(_T_6307, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_11 = mux(_T_6308, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6309 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6310 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6311 = eq(_T_6310, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6312 = and(_T_6309, _T_6311) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6313 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6314 = eq(_T_6313, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6315 = and(_T_6312, _T_6314) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6316 = or(_T_6315, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6317 = bits(_T_6316, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_12 = mux(_T_6317, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6318 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6319 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6320 = eq(_T_6319, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6321 = and(_T_6318, _T_6320) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6322 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6323 = eq(_T_6322, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6324 = and(_T_6321, _T_6323) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6325 = or(_T_6324, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6326 = bits(_T_6325, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_13 = mux(_T_6326, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6327 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6328 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6329 = eq(_T_6328, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6330 = and(_T_6327, _T_6329) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6331 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6332 = eq(_T_6331, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6333 = and(_T_6330, _T_6332) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6334 = or(_T_6333, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6335 = bits(_T_6334, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_14 = mux(_T_6335, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6336 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6337 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6338 = eq(_T_6337, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6339 = and(_T_6336, _T_6338) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6340 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6341 = eq(_T_6340, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6342 = and(_T_6339, _T_6341) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6343 = or(_T_6342, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6344 = bits(_T_6343, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_0_15 = mux(_T_6344, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6345 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6346 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6347 = eq(_T_6346, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6348 = and(_T_6345, _T_6347) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6349 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6350 = eq(_T_6349, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6351 = and(_T_6348, _T_6350) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6352 = or(_T_6351, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6353 = bits(_T_6352, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_0 = mux(_T_6353, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6354 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6355 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6356 = eq(_T_6355, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6357 = and(_T_6354, _T_6356) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6358 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6359 = eq(_T_6358, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6360 = and(_T_6357, _T_6359) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6361 = or(_T_6360, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6362 = bits(_T_6361, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_1 = mux(_T_6362, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6363 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6364 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6365 = eq(_T_6364, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6366 = and(_T_6363, _T_6365) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6367 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6368 = eq(_T_6367, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6369 = and(_T_6366, _T_6368) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6370 = or(_T_6369, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6371 = bits(_T_6370, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_2 = mux(_T_6371, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6372 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6373 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6374 = eq(_T_6373, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6375 = and(_T_6372, _T_6374) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6376 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6377 = eq(_T_6376, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6378 = and(_T_6375, _T_6377) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6379 = or(_T_6378, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6380 = bits(_T_6379, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_3 = mux(_T_6380, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6381 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6382 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6383 = eq(_T_6382, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6384 = and(_T_6381, _T_6383) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6385 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6386 = eq(_T_6385, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6387 = and(_T_6384, _T_6386) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6388 = or(_T_6387, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6389 = bits(_T_6388, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_4 = mux(_T_6389, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6390 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6391 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6392 = eq(_T_6391, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6393 = and(_T_6390, _T_6392) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6394 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6395 = eq(_T_6394, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6396 = and(_T_6393, _T_6395) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6397 = or(_T_6396, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6398 = bits(_T_6397, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_5 = mux(_T_6398, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6399 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6400 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6401 = eq(_T_6400, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6402 = and(_T_6399, _T_6401) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6403 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6404 = eq(_T_6403, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6405 = and(_T_6402, _T_6404) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6406 = or(_T_6405, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6407 = bits(_T_6406, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_6 = mux(_T_6407, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6408 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6409 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6410 = eq(_T_6409, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6411 = and(_T_6408, _T_6410) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6412 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6413 = eq(_T_6412, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6414 = and(_T_6411, _T_6413) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6415 = or(_T_6414, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6416 = bits(_T_6415, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_7 = mux(_T_6416, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6417 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6418 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6419 = eq(_T_6418, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6420 = and(_T_6417, _T_6419) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6421 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6422 = eq(_T_6421, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6423 = and(_T_6420, _T_6422) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6424 = or(_T_6423, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6425 = bits(_T_6424, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_8 = mux(_T_6425, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6426 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6427 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6428 = eq(_T_6427, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6429 = and(_T_6426, _T_6428) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6430 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6431 = eq(_T_6430, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6432 = and(_T_6429, _T_6431) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6433 = or(_T_6432, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6434 = bits(_T_6433, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_9 = mux(_T_6434, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6435 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6436 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6437 = eq(_T_6436, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6438 = and(_T_6435, _T_6437) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6439 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6440 = eq(_T_6439, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6441 = and(_T_6438, _T_6440) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6442 = or(_T_6441, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6443 = bits(_T_6442, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_10 = mux(_T_6443, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6444 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6445 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6446 = eq(_T_6445, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6447 = and(_T_6444, _T_6446) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6448 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6449 = eq(_T_6448, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6450 = and(_T_6447, _T_6449) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6451 = or(_T_6450, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6452 = bits(_T_6451, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_11 = mux(_T_6452, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6453 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6454 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6455 = eq(_T_6454, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6456 = and(_T_6453, _T_6455) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6457 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6458 = eq(_T_6457, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6459 = and(_T_6456, _T_6458) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6460 = or(_T_6459, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6461 = bits(_T_6460, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_12 = mux(_T_6461, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6462 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6463 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6464 = eq(_T_6463, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6465 = and(_T_6462, _T_6464) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6466 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6467 = eq(_T_6466, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6468 = and(_T_6465, _T_6467) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6469 = or(_T_6468, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6470 = bits(_T_6469, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_13 = mux(_T_6470, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6471 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6472 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6473 = eq(_T_6472, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6474 = and(_T_6471, _T_6473) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6475 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6476 = eq(_T_6475, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6477 = and(_T_6474, _T_6476) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6478 = or(_T_6477, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6479 = bits(_T_6478, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_14 = mux(_T_6479, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6480 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6481 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6482 = eq(_T_6481, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6483 = and(_T_6480, _T_6482) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6484 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6485 = eq(_T_6484, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6486 = and(_T_6483, _T_6485) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6487 = or(_T_6486, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6488 = bits(_T_6487, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_1_15 = mux(_T_6488, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6489 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6490 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6491 = eq(_T_6490, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6492 = and(_T_6489, _T_6491) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6493 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6494 = eq(_T_6493, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6495 = and(_T_6492, _T_6494) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6496 = or(_T_6495, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6497 = bits(_T_6496, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_0 = mux(_T_6497, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6498 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6499 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6500 = eq(_T_6499, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6501 = and(_T_6498, _T_6500) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6502 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6503 = eq(_T_6502, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6504 = and(_T_6501, _T_6503) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6505 = or(_T_6504, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6506 = bits(_T_6505, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_1 = mux(_T_6506, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6507 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6508 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6509 = eq(_T_6508, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6510 = and(_T_6507, _T_6509) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6511 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6512 = eq(_T_6511, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6513 = and(_T_6510, _T_6512) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6514 = or(_T_6513, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6515 = bits(_T_6514, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_2 = mux(_T_6515, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6516 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6517 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6518 = eq(_T_6517, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6519 = and(_T_6516, _T_6518) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6520 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6521 = eq(_T_6520, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6522 = and(_T_6519, _T_6521) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6523 = or(_T_6522, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6524 = bits(_T_6523, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_3 = mux(_T_6524, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6525 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6526 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6527 = eq(_T_6526, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6528 = and(_T_6525, _T_6527) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6529 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6530 = eq(_T_6529, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6531 = and(_T_6528, _T_6530) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6532 = or(_T_6531, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6533 = bits(_T_6532, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_4 = mux(_T_6533, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6534 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6535 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6536 = eq(_T_6535, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6537 = and(_T_6534, _T_6536) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6538 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6539 = eq(_T_6538, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6540 = and(_T_6537, _T_6539) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6541 = or(_T_6540, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6542 = bits(_T_6541, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_5 = mux(_T_6542, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6543 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6544 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6545 = eq(_T_6544, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6546 = and(_T_6543, _T_6545) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6547 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6548 = eq(_T_6547, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6549 = and(_T_6546, _T_6548) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6550 = or(_T_6549, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6551 = bits(_T_6550, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_6 = mux(_T_6551, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6552 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6553 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6554 = eq(_T_6553, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6555 = and(_T_6552, _T_6554) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6556 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6557 = eq(_T_6556, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6558 = and(_T_6555, _T_6557) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6559 = or(_T_6558, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6560 = bits(_T_6559, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_7 = mux(_T_6560, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6561 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6562 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6563 = eq(_T_6562, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6564 = and(_T_6561, _T_6563) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6565 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6566 = eq(_T_6565, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6567 = and(_T_6564, _T_6566) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6568 = or(_T_6567, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6569 = bits(_T_6568, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_8 = mux(_T_6569, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6570 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6571 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6572 = eq(_T_6571, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6573 = and(_T_6570, _T_6572) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6574 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6575 = eq(_T_6574, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6576 = and(_T_6573, _T_6575) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6577 = or(_T_6576, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6578 = bits(_T_6577, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_9 = mux(_T_6578, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6579 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6580 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6581 = eq(_T_6580, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6582 = and(_T_6579, _T_6581) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6583 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6584 = eq(_T_6583, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6585 = and(_T_6582, _T_6584) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6586 = or(_T_6585, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6587 = bits(_T_6586, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_10 = mux(_T_6587, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6588 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6589 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6590 = eq(_T_6589, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6591 = and(_T_6588, _T_6590) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6592 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6593 = eq(_T_6592, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6594 = and(_T_6591, _T_6593) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6595 = or(_T_6594, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6596 = bits(_T_6595, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_11 = mux(_T_6596, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6597 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6598 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6599 = eq(_T_6598, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6600 = and(_T_6597, _T_6599) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6601 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6602 = eq(_T_6601, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6603 = and(_T_6600, _T_6602) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6604 = or(_T_6603, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6605 = bits(_T_6604, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_12 = mux(_T_6605, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6606 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6607 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6608 = eq(_T_6607, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6609 = and(_T_6606, _T_6608) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6610 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6611 = eq(_T_6610, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6612 = and(_T_6609, _T_6611) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6613 = or(_T_6612, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6614 = bits(_T_6613, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_13 = mux(_T_6614, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6615 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6616 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6617 = eq(_T_6616, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6618 = and(_T_6615, _T_6617) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6619 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6620 = eq(_T_6619, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6621 = and(_T_6618, _T_6620) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6622 = or(_T_6621, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6623 = bits(_T_6622, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_14 = mux(_T_6623, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6624 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6625 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6626 = eq(_T_6625, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6627 = and(_T_6624, _T_6626) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6628 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6629 = eq(_T_6628, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6630 = and(_T_6627, _T_6629) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6631 = or(_T_6630, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6632 = bits(_T_6631, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_2_15 = mux(_T_6632, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6633 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6634 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6635 = eq(_T_6634, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6636 = and(_T_6633, _T_6635) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6637 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6638 = eq(_T_6637, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6639 = and(_T_6636, _T_6638) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6640 = or(_T_6639, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6641 = bits(_T_6640, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_0 = mux(_T_6641, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6642 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6643 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6644 = eq(_T_6643, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6645 = and(_T_6642, _T_6644) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6646 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6647 = eq(_T_6646, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6648 = and(_T_6645, _T_6647) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6649 = or(_T_6648, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6650 = bits(_T_6649, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_1 = mux(_T_6650, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6651 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6652 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6653 = eq(_T_6652, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6654 = and(_T_6651, _T_6653) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6655 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6656 = eq(_T_6655, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6657 = and(_T_6654, _T_6656) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6658 = or(_T_6657, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6659 = bits(_T_6658, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_2 = mux(_T_6659, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6660 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6661 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6662 = eq(_T_6661, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6663 = and(_T_6660, _T_6662) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6664 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6665 = eq(_T_6664, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6666 = and(_T_6663, _T_6665) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6667 = or(_T_6666, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6668 = bits(_T_6667, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_3 = mux(_T_6668, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6669 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6670 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6671 = eq(_T_6670, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6672 = and(_T_6669, _T_6671) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6673 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6674 = eq(_T_6673, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6675 = and(_T_6672, _T_6674) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6676 = or(_T_6675, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6677 = bits(_T_6676, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_4 = mux(_T_6677, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6678 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6679 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6680 = eq(_T_6679, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6681 = and(_T_6678, _T_6680) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6682 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6683 = eq(_T_6682, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6684 = and(_T_6681, _T_6683) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6685 = or(_T_6684, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6686 = bits(_T_6685, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_5 = mux(_T_6686, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6687 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6688 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6689 = eq(_T_6688, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6690 = and(_T_6687, _T_6689) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6691 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6692 = eq(_T_6691, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6693 = and(_T_6690, _T_6692) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6694 = or(_T_6693, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6695 = bits(_T_6694, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_6 = mux(_T_6695, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6696 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6697 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6698 = eq(_T_6697, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6699 = and(_T_6696, _T_6698) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6700 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6701 = eq(_T_6700, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6702 = and(_T_6699, _T_6701) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6703 = or(_T_6702, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6704 = bits(_T_6703, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_7 = mux(_T_6704, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6705 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6706 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6707 = eq(_T_6706, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6708 = and(_T_6705, _T_6707) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6709 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6710 = eq(_T_6709, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6711 = and(_T_6708, _T_6710) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6712 = or(_T_6711, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6713 = bits(_T_6712, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_8 = mux(_T_6713, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6714 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6715 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6716 = eq(_T_6715, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6717 = and(_T_6714, _T_6716) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6718 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6719 = eq(_T_6718, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6720 = and(_T_6717, _T_6719) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6721 = or(_T_6720, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6722 = bits(_T_6721, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_9 = mux(_T_6722, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6723 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6724 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6725 = eq(_T_6724, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6726 = and(_T_6723, _T_6725) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6727 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6728 = eq(_T_6727, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6729 = and(_T_6726, _T_6728) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6730 = or(_T_6729, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6731 = bits(_T_6730, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_10 = mux(_T_6731, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6732 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6733 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6734 = eq(_T_6733, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6735 = and(_T_6732, _T_6734) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6736 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6737 = eq(_T_6736, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6738 = and(_T_6735, _T_6737) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6739 = or(_T_6738, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6740 = bits(_T_6739, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_11 = mux(_T_6740, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6741 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6742 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6743 = eq(_T_6742, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6744 = and(_T_6741, _T_6743) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6745 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6746 = eq(_T_6745, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6747 = and(_T_6744, _T_6746) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6748 = or(_T_6747, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6749 = bits(_T_6748, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_12 = mux(_T_6749, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6750 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6751 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6752 = eq(_T_6751, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6753 = and(_T_6750, _T_6752) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6754 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6755 = eq(_T_6754, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6756 = and(_T_6753, _T_6755) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6757 = or(_T_6756, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6758 = bits(_T_6757, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_13 = mux(_T_6758, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6759 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6760 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6761 = eq(_T_6760, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6762 = and(_T_6759, _T_6761) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6763 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6764 = eq(_T_6763, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6765 = and(_T_6762, _T_6764) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6766 = or(_T_6765, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6767 = bits(_T_6766, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_14 = mux(_T_6767, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6768 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6769 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6770 = eq(_T_6769, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6771 = and(_T_6768, _T_6770) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6772 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6773 = eq(_T_6772, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6774 = and(_T_6771, _T_6773) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6775 = or(_T_6774, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6776 = bits(_T_6775, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_3_15 = mux(_T_6776, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6777 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6778 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6779 = eq(_T_6778, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6780 = and(_T_6777, _T_6779) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6781 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6782 = eq(_T_6781, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6783 = and(_T_6780, _T_6782) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6784 = or(_T_6783, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6785 = bits(_T_6784, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_0 = mux(_T_6785, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6786 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6787 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6788 = eq(_T_6787, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6789 = and(_T_6786, _T_6788) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6790 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6791 = eq(_T_6790, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6792 = and(_T_6789, _T_6791) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6793 = or(_T_6792, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6794 = bits(_T_6793, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_1 = mux(_T_6794, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6795 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6796 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6797 = eq(_T_6796, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6798 = and(_T_6795, _T_6797) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6799 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6800 = eq(_T_6799, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6801 = and(_T_6798, _T_6800) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6802 = or(_T_6801, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6803 = bits(_T_6802, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_2 = mux(_T_6803, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6804 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6805 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6806 = eq(_T_6805, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6807 = and(_T_6804, _T_6806) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6808 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6809 = eq(_T_6808, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6810 = and(_T_6807, _T_6809) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6811 = or(_T_6810, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6812 = bits(_T_6811, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_3 = mux(_T_6812, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6813 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6814 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6815 = eq(_T_6814, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6816 = and(_T_6813, _T_6815) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6817 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6818 = eq(_T_6817, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6819 = and(_T_6816, _T_6818) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6820 = or(_T_6819, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6821 = bits(_T_6820, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_4 = mux(_T_6821, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6822 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6823 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6824 = eq(_T_6823, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6825 = and(_T_6822, _T_6824) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6826 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6827 = eq(_T_6826, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6828 = and(_T_6825, _T_6827) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6829 = or(_T_6828, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6830 = bits(_T_6829, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_5 = mux(_T_6830, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6831 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6832 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6833 = eq(_T_6832, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6834 = and(_T_6831, _T_6833) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6835 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6836 = eq(_T_6835, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6837 = and(_T_6834, _T_6836) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6838 = or(_T_6837, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6839 = bits(_T_6838, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_6 = mux(_T_6839, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6840 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6841 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6842 = eq(_T_6841, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6843 = and(_T_6840, _T_6842) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6844 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6845 = eq(_T_6844, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6846 = and(_T_6843, _T_6845) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6847 = or(_T_6846, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6848 = bits(_T_6847, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_7 = mux(_T_6848, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6849 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6850 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6851 = eq(_T_6850, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6852 = and(_T_6849, _T_6851) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6853 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6854 = eq(_T_6853, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6855 = and(_T_6852, _T_6854) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6856 = or(_T_6855, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6857 = bits(_T_6856, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_8 = mux(_T_6857, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6858 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6859 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6860 = eq(_T_6859, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6861 = and(_T_6858, _T_6860) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6862 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6863 = eq(_T_6862, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6864 = and(_T_6861, _T_6863) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6865 = or(_T_6864, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6866 = bits(_T_6865, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_9 = mux(_T_6866, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6867 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6868 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6869 = eq(_T_6868, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6870 = and(_T_6867, _T_6869) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6871 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6872 = eq(_T_6871, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6873 = and(_T_6870, _T_6872) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6874 = or(_T_6873, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6875 = bits(_T_6874, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_10 = mux(_T_6875, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6876 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6877 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6878 = eq(_T_6877, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6879 = and(_T_6876, _T_6878) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6880 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6881 = eq(_T_6880, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6882 = and(_T_6879, _T_6881) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6883 = or(_T_6882, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6884 = bits(_T_6883, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_11 = mux(_T_6884, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6885 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6886 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6887 = eq(_T_6886, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6888 = and(_T_6885, _T_6887) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6889 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6890 = eq(_T_6889, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6891 = and(_T_6888, _T_6890) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6892 = or(_T_6891, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6893 = bits(_T_6892, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_12 = mux(_T_6893, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6894 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6895 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6896 = eq(_T_6895, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6897 = and(_T_6894, _T_6896) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6898 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6899 = eq(_T_6898, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6900 = and(_T_6897, _T_6899) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6901 = or(_T_6900, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6902 = bits(_T_6901, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_13 = mux(_T_6902, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6903 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6904 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6905 = eq(_T_6904, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6906 = and(_T_6903, _T_6905) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6907 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6908 = eq(_T_6907, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6909 = and(_T_6906, _T_6908) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6910 = or(_T_6909, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6911 = bits(_T_6910, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_14 = mux(_T_6911, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6912 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6913 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6914 = eq(_T_6913, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6915 = and(_T_6912, _T_6914) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6916 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6917 = eq(_T_6916, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6918 = and(_T_6915, _T_6917) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6919 = or(_T_6918, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6920 = bits(_T_6919, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_4_15 = mux(_T_6920, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6921 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6922 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6923 = eq(_T_6922, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6924 = and(_T_6921, _T_6923) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6925 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6926 = eq(_T_6925, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6927 = and(_T_6924, _T_6926) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6928 = or(_T_6927, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6929 = bits(_T_6928, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_0 = mux(_T_6929, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6930 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6931 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6932 = eq(_T_6931, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6933 = and(_T_6930, _T_6932) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6934 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6935 = eq(_T_6934, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6936 = and(_T_6933, _T_6935) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6937 = or(_T_6936, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6938 = bits(_T_6937, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_1 = mux(_T_6938, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6939 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6940 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6941 = eq(_T_6940, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6942 = and(_T_6939, _T_6941) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6943 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6944 = eq(_T_6943, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6945 = and(_T_6942, _T_6944) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6946 = or(_T_6945, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6947 = bits(_T_6946, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_2 = mux(_T_6947, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6948 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6949 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6950 = eq(_T_6949, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6951 = and(_T_6948, _T_6950) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6952 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6953 = eq(_T_6952, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6954 = and(_T_6951, _T_6953) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6955 = or(_T_6954, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6956 = bits(_T_6955, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_3 = mux(_T_6956, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6957 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6958 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6959 = eq(_T_6958, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6960 = and(_T_6957, _T_6959) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6961 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6962 = eq(_T_6961, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6963 = and(_T_6960, _T_6962) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6964 = or(_T_6963, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6965 = bits(_T_6964, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_4 = mux(_T_6965, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6966 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6967 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6968 = eq(_T_6967, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6969 = and(_T_6966, _T_6968) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6970 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6971 = eq(_T_6970, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6972 = and(_T_6969, _T_6971) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6973 = or(_T_6972, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6974 = bits(_T_6973, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_5 = mux(_T_6974, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6975 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6976 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6977 = eq(_T_6976, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6978 = and(_T_6975, _T_6977) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6979 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6980 = eq(_T_6979, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6981 = and(_T_6978, _T_6980) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6982 = or(_T_6981, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6983 = bits(_T_6982, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_6 = mux(_T_6983, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6984 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6985 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6986 = eq(_T_6985, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6987 = and(_T_6984, _T_6986) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6988 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6989 = eq(_T_6988, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6990 = and(_T_6987, _T_6989) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_6991 = or(_T_6990, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_6992 = bits(_T_6991, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_7 = mux(_T_6992, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_6993 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_6994 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_6995 = eq(_T_6994, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_6996 = and(_T_6993, _T_6995) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_6997 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_6998 = eq(_T_6997, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_6999 = and(_T_6996, _T_6998) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7000 = or(_T_6999, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7001 = bits(_T_7000, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_8 = mux(_T_7001, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7002 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7003 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7004 = eq(_T_7003, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7005 = and(_T_7002, _T_7004) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7006 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7007 = eq(_T_7006, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7008 = and(_T_7005, _T_7007) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7009 = or(_T_7008, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7010 = bits(_T_7009, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_9 = mux(_T_7010, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7011 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7012 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7013 = eq(_T_7012, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7014 = and(_T_7011, _T_7013) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7015 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7016 = eq(_T_7015, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7017 = and(_T_7014, _T_7016) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7018 = or(_T_7017, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7019 = bits(_T_7018, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_10 = mux(_T_7019, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7020 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7021 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7022 = eq(_T_7021, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7023 = and(_T_7020, _T_7022) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7024 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7025 = eq(_T_7024, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7026 = and(_T_7023, _T_7025) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7027 = or(_T_7026, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7028 = bits(_T_7027, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_11 = mux(_T_7028, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7029 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7030 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7031 = eq(_T_7030, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7032 = and(_T_7029, _T_7031) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7033 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7034 = eq(_T_7033, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7035 = and(_T_7032, _T_7034) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7036 = or(_T_7035, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7037 = bits(_T_7036, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_12 = mux(_T_7037, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7038 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7039 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7040 = eq(_T_7039, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7041 = and(_T_7038, _T_7040) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7042 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7043 = eq(_T_7042, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7044 = and(_T_7041, _T_7043) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7045 = or(_T_7044, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7046 = bits(_T_7045, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_13 = mux(_T_7046, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7047 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7048 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7049 = eq(_T_7048, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7050 = and(_T_7047, _T_7049) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7051 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7052 = eq(_T_7051, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7053 = and(_T_7050, _T_7052) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7054 = or(_T_7053, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7055 = bits(_T_7054, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_14 = mux(_T_7055, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7056 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7057 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7058 = eq(_T_7057, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7059 = and(_T_7056, _T_7058) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7060 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7061 = eq(_T_7060, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7062 = and(_T_7059, _T_7061) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7063 = or(_T_7062, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7064 = bits(_T_7063, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_5_15 = mux(_T_7064, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7065 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7066 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7067 = eq(_T_7066, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7068 = and(_T_7065, _T_7067) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7069 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7070 = eq(_T_7069, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7071 = and(_T_7068, _T_7070) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7072 = or(_T_7071, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7073 = bits(_T_7072, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_0 = mux(_T_7073, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7074 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7075 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7076 = eq(_T_7075, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7077 = and(_T_7074, _T_7076) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7078 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7079 = eq(_T_7078, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7080 = and(_T_7077, _T_7079) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7081 = or(_T_7080, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7082 = bits(_T_7081, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_1 = mux(_T_7082, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7083 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7084 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7085 = eq(_T_7084, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7086 = and(_T_7083, _T_7085) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7087 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7088 = eq(_T_7087, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7089 = and(_T_7086, _T_7088) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7090 = or(_T_7089, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7091 = bits(_T_7090, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_2 = mux(_T_7091, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7092 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7093 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7094 = eq(_T_7093, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7095 = and(_T_7092, _T_7094) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7096 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7097 = eq(_T_7096, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7098 = and(_T_7095, _T_7097) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7099 = or(_T_7098, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7100 = bits(_T_7099, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_3 = mux(_T_7100, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7101 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7102 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7103 = eq(_T_7102, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7104 = and(_T_7101, _T_7103) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7105 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7106 = eq(_T_7105, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7107 = and(_T_7104, _T_7106) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7108 = or(_T_7107, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7109 = bits(_T_7108, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_4 = mux(_T_7109, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7110 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7111 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7112 = eq(_T_7111, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7113 = and(_T_7110, _T_7112) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7114 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7115 = eq(_T_7114, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7116 = and(_T_7113, _T_7115) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7117 = or(_T_7116, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7118 = bits(_T_7117, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_5 = mux(_T_7118, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7119 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7120 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7121 = eq(_T_7120, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7122 = and(_T_7119, _T_7121) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7123 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7124 = eq(_T_7123, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7125 = and(_T_7122, _T_7124) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7126 = or(_T_7125, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7127 = bits(_T_7126, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_6 = mux(_T_7127, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7128 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7129 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7130 = eq(_T_7129, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7131 = and(_T_7128, _T_7130) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7132 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7133 = eq(_T_7132, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7134 = and(_T_7131, _T_7133) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7135 = or(_T_7134, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7136 = bits(_T_7135, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_7 = mux(_T_7136, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7137 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7138 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7139 = eq(_T_7138, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7140 = and(_T_7137, _T_7139) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7141 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7142 = eq(_T_7141, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7143 = and(_T_7140, _T_7142) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7144 = or(_T_7143, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7145 = bits(_T_7144, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_8 = mux(_T_7145, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7146 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7147 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7148 = eq(_T_7147, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7149 = and(_T_7146, _T_7148) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7150 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7151 = eq(_T_7150, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7152 = and(_T_7149, _T_7151) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7153 = or(_T_7152, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7154 = bits(_T_7153, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_9 = mux(_T_7154, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7155 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7156 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7157 = eq(_T_7156, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7158 = and(_T_7155, _T_7157) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7159 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7160 = eq(_T_7159, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7161 = and(_T_7158, _T_7160) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7162 = or(_T_7161, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7163 = bits(_T_7162, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_10 = mux(_T_7163, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7164 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7165 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7166 = eq(_T_7165, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7167 = and(_T_7164, _T_7166) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7168 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7169 = eq(_T_7168, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7170 = and(_T_7167, _T_7169) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7171 = or(_T_7170, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7172 = bits(_T_7171, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_11 = mux(_T_7172, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7173 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7174 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7175 = eq(_T_7174, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7176 = and(_T_7173, _T_7175) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7177 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7178 = eq(_T_7177, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7179 = and(_T_7176, _T_7178) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7180 = or(_T_7179, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7181 = bits(_T_7180, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_12 = mux(_T_7181, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7182 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7183 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7184 = eq(_T_7183, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7185 = and(_T_7182, _T_7184) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7186 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7187 = eq(_T_7186, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7188 = and(_T_7185, _T_7187) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7189 = or(_T_7188, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7190 = bits(_T_7189, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_13 = mux(_T_7190, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7191 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7192 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7193 = eq(_T_7192, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7194 = and(_T_7191, _T_7193) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7195 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7196 = eq(_T_7195, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7197 = and(_T_7194, _T_7196) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7198 = or(_T_7197, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7199 = bits(_T_7198, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_14 = mux(_T_7199, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7200 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7201 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7202 = eq(_T_7201, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7203 = and(_T_7200, _T_7202) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7204 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7205 = eq(_T_7204, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7206 = and(_T_7203, _T_7205) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7207 = or(_T_7206, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7208 = bits(_T_7207, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_6_15 = mux(_T_7208, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7209 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7210 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7211 = eq(_T_7210, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7212 = and(_T_7209, _T_7211) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7213 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7214 = eq(_T_7213, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7215 = and(_T_7212, _T_7214) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7216 = or(_T_7215, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7217 = bits(_T_7216, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_0 = mux(_T_7217, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7218 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7219 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7220 = eq(_T_7219, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7221 = and(_T_7218, _T_7220) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7222 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7223 = eq(_T_7222, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7224 = and(_T_7221, _T_7223) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7225 = or(_T_7224, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7226 = bits(_T_7225, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_1 = mux(_T_7226, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7227 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7228 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7229 = eq(_T_7228, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7230 = and(_T_7227, _T_7229) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7231 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7232 = eq(_T_7231, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7233 = and(_T_7230, _T_7232) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7234 = or(_T_7233, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7235 = bits(_T_7234, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_2 = mux(_T_7235, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7236 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7237 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7238 = eq(_T_7237, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7239 = and(_T_7236, _T_7238) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7240 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7241 = eq(_T_7240, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7242 = and(_T_7239, _T_7241) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7243 = or(_T_7242, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7244 = bits(_T_7243, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_3 = mux(_T_7244, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7245 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7246 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7247 = eq(_T_7246, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7248 = and(_T_7245, _T_7247) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7249 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7250 = eq(_T_7249, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7251 = and(_T_7248, _T_7250) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7252 = or(_T_7251, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7253 = bits(_T_7252, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_4 = mux(_T_7253, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7254 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7255 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7256 = eq(_T_7255, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7257 = and(_T_7254, _T_7256) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7258 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7259 = eq(_T_7258, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7260 = and(_T_7257, _T_7259) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7261 = or(_T_7260, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7262 = bits(_T_7261, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_5 = mux(_T_7262, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7263 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7264 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7265 = eq(_T_7264, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7266 = and(_T_7263, _T_7265) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7267 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7268 = eq(_T_7267, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7269 = and(_T_7266, _T_7268) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7270 = or(_T_7269, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7271 = bits(_T_7270, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_6 = mux(_T_7271, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7272 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7273 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7274 = eq(_T_7273, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7275 = and(_T_7272, _T_7274) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7276 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7277 = eq(_T_7276, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7278 = and(_T_7275, _T_7277) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7279 = or(_T_7278, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7280 = bits(_T_7279, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_7 = mux(_T_7280, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7281 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7282 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7283 = eq(_T_7282, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7284 = and(_T_7281, _T_7283) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7285 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7286 = eq(_T_7285, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7287 = and(_T_7284, _T_7286) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7288 = or(_T_7287, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7289 = bits(_T_7288, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_8 = mux(_T_7289, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7290 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7291 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7292 = eq(_T_7291, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7293 = and(_T_7290, _T_7292) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7294 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7295 = eq(_T_7294, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7296 = and(_T_7293, _T_7295) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7297 = or(_T_7296, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7298 = bits(_T_7297, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_9 = mux(_T_7298, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7299 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7300 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7301 = eq(_T_7300, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7302 = and(_T_7299, _T_7301) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7303 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7304 = eq(_T_7303, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7305 = and(_T_7302, _T_7304) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7306 = or(_T_7305, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7307 = bits(_T_7306, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_10 = mux(_T_7307, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7308 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7309 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7310 = eq(_T_7309, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7311 = and(_T_7308, _T_7310) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7312 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7313 = eq(_T_7312, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7314 = and(_T_7311, _T_7313) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7315 = or(_T_7314, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7316 = bits(_T_7315, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_11 = mux(_T_7316, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7317 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7318 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7319 = eq(_T_7318, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7320 = and(_T_7317, _T_7319) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7321 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7322 = eq(_T_7321, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7323 = and(_T_7320, _T_7322) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7324 = or(_T_7323, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7325 = bits(_T_7324, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_12 = mux(_T_7325, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7326 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7327 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7328 = eq(_T_7327, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7329 = and(_T_7326, _T_7328) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7330 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7331 = eq(_T_7330, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7332 = and(_T_7329, _T_7331) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7333 = or(_T_7332, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7334 = bits(_T_7333, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_13 = mux(_T_7334, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7335 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7336 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7337 = eq(_T_7336, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7338 = and(_T_7335, _T_7337) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7339 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7340 = eq(_T_7339, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7341 = and(_T_7338, _T_7340) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7342 = or(_T_7341, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7343 = bits(_T_7342, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_14 = mux(_T_7343, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7344 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7345 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7346 = eq(_T_7345, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7347 = and(_T_7344, _T_7346) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7348 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7349 = eq(_T_7348, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7350 = and(_T_7347, _T_7349) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7351 = or(_T_7350, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7352 = bits(_T_7351, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_7_15 = mux(_T_7352, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7353 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7354 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7355 = eq(_T_7354, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7356 = and(_T_7353, _T_7355) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7357 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7358 = eq(_T_7357, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7359 = and(_T_7356, _T_7358) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7360 = or(_T_7359, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7361 = bits(_T_7360, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_0 = mux(_T_7361, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7362 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7363 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7364 = eq(_T_7363, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7365 = and(_T_7362, _T_7364) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7366 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7367 = eq(_T_7366, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7368 = and(_T_7365, _T_7367) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7369 = or(_T_7368, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7370 = bits(_T_7369, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_1 = mux(_T_7370, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7371 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7372 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7373 = eq(_T_7372, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7374 = and(_T_7371, _T_7373) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7375 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7376 = eq(_T_7375, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7377 = and(_T_7374, _T_7376) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7378 = or(_T_7377, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7379 = bits(_T_7378, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_2 = mux(_T_7379, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7380 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7381 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7382 = eq(_T_7381, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7383 = and(_T_7380, _T_7382) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7384 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7385 = eq(_T_7384, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7386 = and(_T_7383, _T_7385) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7387 = or(_T_7386, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7388 = bits(_T_7387, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_3 = mux(_T_7388, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7389 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7390 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7391 = eq(_T_7390, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7392 = and(_T_7389, _T_7391) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7393 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7394 = eq(_T_7393, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7395 = and(_T_7392, _T_7394) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7396 = or(_T_7395, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7397 = bits(_T_7396, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_4 = mux(_T_7397, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7398 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7399 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7400 = eq(_T_7399, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7401 = and(_T_7398, _T_7400) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7402 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7403 = eq(_T_7402, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7404 = and(_T_7401, _T_7403) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7405 = or(_T_7404, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7406 = bits(_T_7405, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_5 = mux(_T_7406, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7407 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7408 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7409 = eq(_T_7408, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7410 = and(_T_7407, _T_7409) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7411 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7412 = eq(_T_7411, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7413 = and(_T_7410, _T_7412) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7414 = or(_T_7413, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7415 = bits(_T_7414, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_6 = mux(_T_7415, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7416 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7417 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7418 = eq(_T_7417, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7419 = and(_T_7416, _T_7418) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7420 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7421 = eq(_T_7420, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7422 = and(_T_7419, _T_7421) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7423 = or(_T_7422, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7424 = bits(_T_7423, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_7 = mux(_T_7424, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7425 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7426 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7427 = eq(_T_7426, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7428 = and(_T_7425, _T_7427) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7429 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7430 = eq(_T_7429, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7431 = and(_T_7428, _T_7430) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7432 = or(_T_7431, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7433 = bits(_T_7432, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_8 = mux(_T_7433, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7434 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7435 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7436 = eq(_T_7435, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7437 = and(_T_7434, _T_7436) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7438 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7439 = eq(_T_7438, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7440 = and(_T_7437, _T_7439) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7441 = or(_T_7440, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7442 = bits(_T_7441, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_9 = mux(_T_7442, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7443 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7444 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7445 = eq(_T_7444, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7446 = and(_T_7443, _T_7445) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7447 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7448 = eq(_T_7447, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7449 = and(_T_7446, _T_7448) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7450 = or(_T_7449, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7451 = bits(_T_7450, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_10 = mux(_T_7451, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7452 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7453 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7454 = eq(_T_7453, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7455 = and(_T_7452, _T_7454) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7456 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7457 = eq(_T_7456, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7458 = and(_T_7455, _T_7457) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7459 = or(_T_7458, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7460 = bits(_T_7459, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_11 = mux(_T_7460, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7461 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7462 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7463 = eq(_T_7462, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7464 = and(_T_7461, _T_7463) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7465 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7466 = eq(_T_7465, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7467 = and(_T_7464, _T_7466) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7468 = or(_T_7467, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7469 = bits(_T_7468, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_12 = mux(_T_7469, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7470 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7471 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7472 = eq(_T_7471, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7473 = and(_T_7470, _T_7472) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7474 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7475 = eq(_T_7474, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7476 = and(_T_7473, _T_7475) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7477 = or(_T_7476, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7478 = bits(_T_7477, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_13 = mux(_T_7478, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7479 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7480 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7481 = eq(_T_7480, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7482 = and(_T_7479, _T_7481) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7483 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7484 = eq(_T_7483, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7485 = and(_T_7482, _T_7484) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7486 = or(_T_7485, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7487 = bits(_T_7486, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_14 = mux(_T_7487, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7488 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7489 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7490 = eq(_T_7489, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7491 = and(_T_7488, _T_7490) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7492 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7493 = eq(_T_7492, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7494 = and(_T_7491, _T_7493) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7495 = or(_T_7494, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7496 = bits(_T_7495, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_8_15 = mux(_T_7496, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7497 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7498 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7499 = eq(_T_7498, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7500 = and(_T_7497, _T_7499) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7501 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7502 = eq(_T_7501, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7503 = and(_T_7500, _T_7502) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7504 = or(_T_7503, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7505 = bits(_T_7504, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_9_0 = mux(_T_7505, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7506 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_7507 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_7508 = eq(_T_7507, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7509 = and(_T_7506, _T_7508) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7510 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7511 = eq(_T_7510, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7512 = and(_T_7509, _T_7511) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_7513 = or(_T_7512, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7514 = bits(_T_7513, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_1 = mux(_T_7514, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7515 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_7516 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7517 = eq(_T_7516, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7518 = and(_T_7515, _T_7517) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_7519 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7520 = eq(_T_7519, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7521 = and(_T_7518, _T_7520) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_7522 = or(_T_7521, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7523 = bits(_T_7522, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_0_9_2 = mux(_T_7523, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7524 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_7525 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7526 = eq(_T_7525, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7527 = and(_T_7524, _T_7526) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7528 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7529 = eq(_T_7528, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7530 = and(_T_7527, _T_7529) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7531 = or(_T_7530, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7532 = bits(_T_7531, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_3 = mux(_T_7532, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7533 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7534 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7535 = eq(_T_7534, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7536 = and(_T_7533, _T_7535) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7537 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7538 = eq(_T_7537, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7539 = and(_T_7536, _T_7538) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7540 = or(_T_7539, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7541 = bits(_T_7540, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_4 = mux(_T_7541, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7542 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7543 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7544 = eq(_T_7543, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7545 = and(_T_7542, _T_7544) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7546 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7547 = eq(_T_7546, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7548 = and(_T_7545, _T_7547) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7549 = or(_T_7548, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7550 = bits(_T_7549, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_5 = mux(_T_7550, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7551 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7552 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7553 = eq(_T_7552, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7554 = and(_T_7551, _T_7553) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7555 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7556 = eq(_T_7555, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7557 = and(_T_7554, _T_7556) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7558 = or(_T_7557, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7559 = bits(_T_7558, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_6 = mux(_T_7559, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7560 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7561 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7562 = eq(_T_7561, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7563 = and(_T_7560, _T_7562) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7564 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7565 = eq(_T_7564, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7566 = and(_T_7563, _T_7565) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7567 = or(_T_7566, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7568 = bits(_T_7567, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_7 = mux(_T_7568, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_7569 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7570 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7571 = eq(_T_7570, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7572 = and(_T_7569, _T_7571) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7573 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7574 = eq(_T_7573, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7575 = and(_T_7572, _T_7574) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_7576 = or(_T_7575, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7577 = bits(_T_7576, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_8 = mux(_T_7577, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7578 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7579 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7580 = eq(_T_7579, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7581 = and(_T_7578, _T_7580) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_7582 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7583 = eq(_T_7582, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7584 = and(_T_7581, _T_7583) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7585 = or(_T_7584, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7586 = bits(_T_7585, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_9 = mux(_T_7586, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7587 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7588 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7589 = eq(_T_7588, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7590 = and(_T_7587, _T_7589) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7591 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7592 = eq(_T_7591, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7593 = and(_T_7590, _T_7592) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7594 = or(_T_7593, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7595 = bits(_T_7594, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_10 = mux(_T_7595, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7596 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7597 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7598 = eq(_T_7597, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7599 = and(_T_7596, _T_7598) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7600 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7601 = eq(_T_7600, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7602 = and(_T_7599, _T_7601) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7603 = or(_T_7602, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7604 = bits(_T_7603, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_9_11 = mux(_T_7604, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7605 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7606 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7607 = eq(_T_7606, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7608 = and(_T_7605, _T_7607) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7609 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7610 = eq(_T_7609, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7611 = and(_T_7608, _T_7610) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7612 = or(_T_7611, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7613 = bits(_T_7612, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_12 = mux(_T_7613, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7614 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7615 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7616 = eq(_T_7615, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7617 = and(_T_7614, _T_7616) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7618 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7619 = eq(_T_7618, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7620 = and(_T_7617, _T_7619) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7621 = or(_T_7620, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7622 = bits(_T_7621, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_9_13 = mux(_T_7622, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7623 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7624 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7625 = eq(_T_7624, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7626 = and(_T_7623, _T_7625) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7627 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7628 = eq(_T_7627, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7629 = and(_T_7626, _T_7628) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7630 = or(_T_7629, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7631 = bits(_T_7630, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_9_14 = mux(_T_7631, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7632 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7633 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7634 = eq(_T_7633, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7635 = and(_T_7632, _T_7634) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7636 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7637 = eq(_T_7636, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7638 = and(_T_7635, _T_7637) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7639 = or(_T_7638, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7640 = bits(_T_7639, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_9_15 = mux(_T_7640, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7641 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7642 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7643 = eq(_T_7642, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7644 = and(_T_7641, _T_7643) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7645 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7646 = eq(_T_7645, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7647 = and(_T_7644, _T_7646) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7648 = or(_T_7647, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7649 = bits(_T_7648, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_0 = mux(_T_7649, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7650 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7651 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7652 = eq(_T_7651, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7653 = and(_T_7650, _T_7652) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7654 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7655 = eq(_T_7654, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7656 = and(_T_7653, _T_7655) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7657 = or(_T_7656, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7658 = bits(_T_7657, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_1 = mux(_T_7658, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7659 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7660 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7661 = eq(_T_7660, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7662 = and(_T_7659, _T_7661) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7663 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7664 = eq(_T_7663, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7665 = and(_T_7662, _T_7664) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7666 = or(_T_7665, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7667 = bits(_T_7666, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_2 = mux(_T_7667, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7668 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7669 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7670 = eq(_T_7669, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7671 = and(_T_7668, _T_7670) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7672 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7673 = eq(_T_7672, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7674 = and(_T_7671, _T_7673) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7675 = or(_T_7674, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7676 = bits(_T_7675, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_3 = mux(_T_7676, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7677 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7678 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7679 = eq(_T_7678, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7680 = and(_T_7677, _T_7679) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7681 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7682 = eq(_T_7681, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7683 = and(_T_7680, _T_7682) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7684 = or(_T_7683, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7685 = bits(_T_7684, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_4 = mux(_T_7685, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7686 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7687 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7688 = eq(_T_7687, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7689 = and(_T_7686, _T_7688) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7690 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7691 = eq(_T_7690, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7692 = and(_T_7689, _T_7691) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7693 = or(_T_7692, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7694 = bits(_T_7693, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_5 = mux(_T_7694, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7695 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7696 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7697 = eq(_T_7696, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7698 = and(_T_7695, _T_7697) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7699 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7700 = eq(_T_7699, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7701 = and(_T_7698, _T_7700) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7702 = or(_T_7701, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7703 = bits(_T_7702, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_6 = mux(_T_7703, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7704 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7705 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7706 = eq(_T_7705, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7707 = and(_T_7704, _T_7706) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7708 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7709 = eq(_T_7708, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7710 = and(_T_7707, _T_7709) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7711 = or(_T_7710, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7712 = bits(_T_7711, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_7 = mux(_T_7712, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7713 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7714 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7715 = eq(_T_7714, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7716 = and(_T_7713, _T_7715) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7717 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7718 = eq(_T_7717, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7719 = and(_T_7716, _T_7718) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7720 = or(_T_7719, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7721 = bits(_T_7720, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_8 = mux(_T_7721, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7722 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7723 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7724 = eq(_T_7723, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7725 = and(_T_7722, _T_7724) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7726 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7727 = eq(_T_7726, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7728 = and(_T_7725, _T_7727) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7729 = or(_T_7728, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7730 = bits(_T_7729, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_9 = mux(_T_7730, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7731 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7732 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7733 = eq(_T_7732, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7734 = and(_T_7731, _T_7733) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7735 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7736 = eq(_T_7735, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7737 = and(_T_7734, _T_7736) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7738 = or(_T_7737, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7739 = bits(_T_7738, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_10 = mux(_T_7739, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7740 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7741 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7742 = eq(_T_7741, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7743 = and(_T_7740, _T_7742) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7744 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7745 = eq(_T_7744, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7746 = and(_T_7743, _T_7745) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7747 = or(_T_7746, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7748 = bits(_T_7747, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_11 = mux(_T_7748, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7749 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7750 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7751 = eq(_T_7750, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7752 = and(_T_7749, _T_7751) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7753 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7754 = eq(_T_7753, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7755 = and(_T_7752, _T_7754) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7756 = or(_T_7755, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7757 = bits(_T_7756, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_12 = mux(_T_7757, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7758 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7759 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7760 = eq(_T_7759, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7761 = and(_T_7758, _T_7760) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7762 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7763 = eq(_T_7762, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7764 = and(_T_7761, _T_7763) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7765 = or(_T_7764, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7766 = bits(_T_7765, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_13 = mux(_T_7766, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7767 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7768 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7769 = eq(_T_7768, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7770 = and(_T_7767, _T_7769) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7771 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7772 = eq(_T_7771, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7773 = and(_T_7770, _T_7772) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7774 = or(_T_7773, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7775 = bits(_T_7774, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_14 = mux(_T_7775, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7776 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7777 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7778 = eq(_T_7777, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7779 = and(_T_7776, _T_7778) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7780 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7781 = eq(_T_7780, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7782 = and(_T_7779, _T_7781) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7783 = or(_T_7782, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7784 = bits(_T_7783, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_10_15 = mux(_T_7784, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7785 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7786 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7787 = eq(_T_7786, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7788 = and(_T_7785, _T_7787) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7789 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7790 = eq(_T_7789, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7791 = and(_T_7788, _T_7790) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7792 = or(_T_7791, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7793 = bits(_T_7792, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_11_0 = mux(_T_7793, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7794 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7795 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7796 = eq(_T_7795, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7797 = and(_T_7794, _T_7796) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7798 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7799 = eq(_T_7798, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7800 = and(_T_7797, _T_7799) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7801 = or(_T_7800, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7802 = bits(_T_7801, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_11_1 = mux(_T_7802, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7803 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_7804 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7805 = eq(_T_7804, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7806 = and(_T_7803, _T_7805) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_7807 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7808 = eq(_T_7807, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7809 = and(_T_7806, _T_7808) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_7810 = or(_T_7809, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7811 = bits(_T_7810, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_2 = mux(_T_7811, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7812 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_7813 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_7814 = eq(_T_7813, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7815 = and(_T_7812, _T_7814) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_7816 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7817 = eq(_T_7816, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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node _T_7818 = and(_T_7815, _T_7817) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_7819 = or(_T_7818, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7820 = bits(_T_7819, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_0_11_3 = mux(_T_7820, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7821 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_7822 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_7823 = eq(_T_7822, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7824 = and(_T_7821, _T_7823) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_7825 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7826 = eq(_T_7825, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7827 = and(_T_7824, _T_7826) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_7828 = or(_T_7827, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7829 = bits(_T_7828, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_4 = mux(_T_7829, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7830 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_7831 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7832 = eq(_T_7831, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7833 = and(_T_7830, _T_7832) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_7834 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7835 = eq(_T_7834, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7836 = and(_T_7833, _T_7835) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_7837 = or(_T_7836, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7838 = bits(_T_7837, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_5 = mux(_T_7838, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7839 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7840 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7841 = eq(_T_7840, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7842 = and(_T_7839, _T_7841) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_7843 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7844 = eq(_T_7843, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7845 = and(_T_7842, _T_7844) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7846 = or(_T_7845, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7847 = bits(_T_7846, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_6 = mux(_T_7847, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7848 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7849 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7850 = eq(_T_7849, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7851 = and(_T_7848, _T_7850) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_7852 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7853 = eq(_T_7852, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7854 = and(_T_7851, _T_7853) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_7855 = or(_T_7854, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7856 = bits(_T_7855, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_7 = mux(_T_7856, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7857 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_7858 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7859 = eq(_T_7858, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7860 = and(_T_7857, _T_7859) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7861 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7862 = eq(_T_7861, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7863 = and(_T_7860, _T_7862) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_7864 = or(_T_7863, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7865 = bits(_T_7864, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_8 = mux(_T_7865, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7866 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_7867 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7868 = eq(_T_7867, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7869 = and(_T_7866, _T_7868) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_7870 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_7871 = eq(_T_7870, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7872 = and(_T_7869, _T_7871) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_7873 = or(_T_7872, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7874 = bits(_T_7873, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_9 = mux(_T_7874, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7875 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_7876 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_7877 = eq(_T_7876, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7878 = and(_T_7875, _T_7877) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_7879 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7880 = eq(_T_7879, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_7881 = and(_T_7878, _T_7880) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_7882 = or(_T_7881, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_7883 = bits(_T_7882, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_10 = mux(_T_7883, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_7884 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7885 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7886 = eq(_T_7885, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_7887 = and(_T_7884, _T_7886) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7888 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7889 = eq(_T_7888, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7890 = and(_T_7887, _T_7889) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7891 = or(_T_7890, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7892 = bits(_T_7891, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_11 = mux(_T_7892, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7893 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7894 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7895 = eq(_T_7894, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7896 = and(_T_7893, _T_7895) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7897 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7898 = eq(_T_7897, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7899 = and(_T_7896, _T_7898) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7900 = or(_T_7899, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7901 = bits(_T_7900, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_11_12 = mux(_T_7901, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7902 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7903 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7904 = eq(_T_7903, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7905 = and(_T_7902, _T_7904) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7906 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7907 = eq(_T_7906, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7908 = and(_T_7905, _T_7907) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7909 = or(_T_7908, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7910 = bits(_T_7909, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_11_13 = mux(_T_7910, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7911 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7912 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7913 = eq(_T_7912, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7914 = and(_T_7911, _T_7913) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7915 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7916 = eq(_T_7915, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7917 = and(_T_7914, _T_7916) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7918 = or(_T_7917, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7919 = bits(_T_7918, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_11_14 = mux(_T_7919, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7920 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7921 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7922 = eq(_T_7921, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7923 = and(_T_7920, _T_7922) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7924 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7925 = eq(_T_7924, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7926 = and(_T_7923, _T_7925) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7927 = or(_T_7926, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7928 = bits(_T_7927, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_11_15 = mux(_T_7928, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7929 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7930 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7931 = eq(_T_7930, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7932 = and(_T_7929, _T_7931) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7933 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7934 = eq(_T_7933, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7935 = and(_T_7932, _T_7934) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7936 = or(_T_7935, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7937 = bits(_T_7936, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_0 = mux(_T_7937, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7938 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7939 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7940 = eq(_T_7939, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7941 = and(_T_7938, _T_7940) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7942 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7943 = eq(_T_7942, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7944 = and(_T_7941, _T_7943) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7945 = or(_T_7944, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7946 = bits(_T_7945, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_1 = mux(_T_7946, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7947 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7948 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7949 = eq(_T_7948, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7950 = and(_T_7947, _T_7949) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7951 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7952 = eq(_T_7951, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7953 = and(_T_7950, _T_7952) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7954 = or(_T_7953, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7955 = bits(_T_7954, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_2 = mux(_T_7955, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7956 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7957 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7958 = eq(_T_7957, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7959 = and(_T_7956, _T_7958) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7960 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7961 = eq(_T_7960, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7962 = and(_T_7959, _T_7961) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7963 = or(_T_7962, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7964 = bits(_T_7963, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_3 = mux(_T_7964, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7965 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7966 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7967 = eq(_T_7966, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7968 = and(_T_7965, _T_7967) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7969 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7970 = eq(_T_7969, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7971 = and(_T_7968, _T_7970) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7972 = or(_T_7971, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7973 = bits(_T_7972, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_4 = mux(_T_7973, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7974 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7975 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7976 = eq(_T_7975, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7977 = and(_T_7974, _T_7976) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7978 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7979 = eq(_T_7978, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7980 = and(_T_7977, _T_7979) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7981 = or(_T_7980, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7982 = bits(_T_7981, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_5 = mux(_T_7982, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7983 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7984 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7985 = eq(_T_7984, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7986 = and(_T_7983, _T_7985) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7987 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7988 = eq(_T_7987, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7989 = and(_T_7986, _T_7988) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7990 = or(_T_7989, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_7991 = bits(_T_7990, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_6 = mux(_T_7991, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_7992 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_7993 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_7994 = eq(_T_7993, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_7995 = and(_T_7992, _T_7994) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_7996 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_7997 = eq(_T_7996, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_7998 = and(_T_7995, _T_7997) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_7999 = or(_T_7998, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8000 = bits(_T_7999, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_7 = mux(_T_8000, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8001 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8002 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8003 = eq(_T_8002, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8004 = and(_T_8001, _T_8003) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8005 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8006 = eq(_T_8005, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8007 = and(_T_8004, _T_8006) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8008 = or(_T_8007, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8009 = bits(_T_8008, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_8 = mux(_T_8009, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8010 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8011 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8012 = eq(_T_8011, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8013 = and(_T_8010, _T_8012) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8014 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8015 = eq(_T_8014, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8016 = and(_T_8013, _T_8015) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8017 = or(_T_8016, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8018 = bits(_T_8017, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_9 = mux(_T_8018, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8019 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8020 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8021 = eq(_T_8020, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8022 = and(_T_8019, _T_8021) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8023 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8024 = eq(_T_8023, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8025 = and(_T_8022, _T_8024) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8026 = or(_T_8025, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8027 = bits(_T_8026, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_10 = mux(_T_8027, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8028 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8029 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8030 = eq(_T_8029, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8031 = and(_T_8028, _T_8030) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8032 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8033 = eq(_T_8032, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8034 = and(_T_8031, _T_8033) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8035 = or(_T_8034, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8036 = bits(_T_8035, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_11 = mux(_T_8036, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8037 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8038 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8039 = eq(_T_8038, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8040 = and(_T_8037, _T_8039) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8041 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8042 = eq(_T_8041, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8043 = and(_T_8040, _T_8042) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8044 = or(_T_8043, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8045 = bits(_T_8044, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_12 = mux(_T_8045, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8046 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8047 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8048 = eq(_T_8047, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8049 = and(_T_8046, _T_8048) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8050 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8051 = eq(_T_8050, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8052 = and(_T_8049, _T_8051) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8053 = or(_T_8052, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8054 = bits(_T_8053, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_13 = mux(_T_8054, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8055 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8056 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8057 = eq(_T_8056, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8058 = and(_T_8055, _T_8057) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8059 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8060 = eq(_T_8059, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8061 = and(_T_8058, _T_8060) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8062 = or(_T_8061, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8063 = bits(_T_8062, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_14 = mux(_T_8063, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8064 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8065 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8066 = eq(_T_8065, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8067 = and(_T_8064, _T_8066) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8068 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8069 = eq(_T_8068, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8070 = and(_T_8067, _T_8069) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8071 = or(_T_8070, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8072 = bits(_T_8071, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_12_15 = mux(_T_8072, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8073 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8074 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8075 = eq(_T_8074, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8076 = and(_T_8073, _T_8075) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8077 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8078 = eq(_T_8077, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8079 = and(_T_8076, _T_8078) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8080 = or(_T_8079, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8081 = bits(_T_8080, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_0 = mux(_T_8081, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8082 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8083 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8084 = eq(_T_8083, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8085 = and(_T_8082, _T_8084) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8086 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8087 = eq(_T_8086, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8088 = and(_T_8085, _T_8087) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8089 = or(_T_8088, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8090 = bits(_T_8089, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_1 = mux(_T_8090, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8091 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8092 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8093 = eq(_T_8092, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8094 = and(_T_8091, _T_8093) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8095 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8096 = eq(_T_8095, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8097 = and(_T_8094, _T_8096) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8098 = or(_T_8097, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8099 = bits(_T_8098, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_2 = mux(_T_8099, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_8100 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_8101 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8102 = eq(_T_8101, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8103 = and(_T_8100, _T_8102) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8104 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8105 = eq(_T_8104, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8106 = and(_T_8103, _T_8105) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8107 = or(_T_8106, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8108 = bits(_T_8107, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_13_3 = mux(_T_8108, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8109 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8110 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8111 = eq(_T_8110, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8112 = and(_T_8109, _T_8111) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8113 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8114 = eq(_T_8113, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8115 = and(_T_8112, _T_8114) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8116 = or(_T_8115, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8117 = bits(_T_8116, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_13_4 = mux(_T_8117, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8118 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8119 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8120 = eq(_T_8119, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8121 = and(_T_8118, _T_8120) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8122 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8123 = eq(_T_8122, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8124 = and(_T_8121, _T_8123) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8125 = or(_T_8124, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8126 = bits(_T_8125, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_13_5 = mux(_T_8126, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8127 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8128 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8129 = eq(_T_8128, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8130 = and(_T_8127, _T_8129) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8131 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8132 = eq(_T_8131, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8133 = and(_T_8130, _T_8132) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8134 = or(_T_8133, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8135 = bits(_T_8134, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_6 = mux(_T_8135, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8136 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8137 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8138 = eq(_T_8137, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8139 = and(_T_8136, _T_8138) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8140 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8141 = eq(_T_8140, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8142 = and(_T_8139, _T_8141) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8143 = or(_T_8142, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8144 = bits(_T_8143, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_7 = mux(_T_8144, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8145 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8146 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8147 = eq(_T_8146, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8148 = and(_T_8145, _T_8147) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8149 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8150 = eq(_T_8149, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8151 = and(_T_8148, _T_8150) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8152 = or(_T_8151, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8153 = bits(_T_8152, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_8 = mux(_T_8153, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8154 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8155 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8156 = eq(_T_8155, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8157 = and(_T_8154, _T_8156) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8158 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8159 = eq(_T_8158, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8160 = and(_T_8157, _T_8159) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8161 = or(_T_8160, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8162 = bits(_T_8161, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_9 = mux(_T_8162, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8163 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8164 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8165 = eq(_T_8164, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8166 = and(_T_8163, _T_8165) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8167 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8168 = eq(_T_8167, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8169 = and(_T_8166, _T_8168) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8170 = or(_T_8169, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8171 = bits(_T_8170, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_13_10 = mux(_T_8171, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8172 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8173 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8174 = eq(_T_8173, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8175 = and(_T_8172, _T_8174) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8176 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8177 = eq(_T_8176, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8178 = and(_T_8175, _T_8177) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8179 = or(_T_8178, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8180 = bits(_T_8179, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_11 = mux(_T_8180, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8181 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8182 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8183 = eq(_T_8182, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8184 = and(_T_8181, _T_8183) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8185 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8186 = eq(_T_8185, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8187 = and(_T_8184, _T_8186) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8188 = or(_T_8187, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8189 = bits(_T_8188, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_12 = mux(_T_8189, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8190 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8191 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8192 = eq(_T_8191, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8193 = and(_T_8190, _T_8192) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8194 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8195 = eq(_T_8194, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8196 = and(_T_8193, _T_8195) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8197 = or(_T_8196, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8198 = bits(_T_8197, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_13 = mux(_T_8198, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8199 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8200 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8201 = eq(_T_8200, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8202 = and(_T_8199, _T_8201) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8203 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8204 = eq(_T_8203, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8205 = and(_T_8202, _T_8204) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8206 = or(_T_8205, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8207 = bits(_T_8206, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_14 = mux(_T_8207, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8208 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8209 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8210 = eq(_T_8209, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8211 = and(_T_8208, _T_8210) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8212 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8213 = eq(_T_8212, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8214 = and(_T_8211, _T_8213) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8215 = or(_T_8214, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8216 = bits(_T_8215, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_13_15 = mux(_T_8216, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8217 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8218 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8219 = eq(_T_8218, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8220 = and(_T_8217, _T_8219) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8221 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8222 = eq(_T_8221, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8223 = and(_T_8220, _T_8222) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8224 = or(_T_8223, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8225 = bits(_T_8224, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_0 = mux(_T_8225, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8226 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8227 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8228 = eq(_T_8227, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8229 = and(_T_8226, _T_8228) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8230 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8231 = eq(_T_8230, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8232 = and(_T_8229, _T_8231) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8233 = or(_T_8232, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8234 = bits(_T_8233, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_1 = mux(_T_8234, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8235 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8236 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8237 = eq(_T_8236, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8238 = and(_T_8235, _T_8237) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8239 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8240 = eq(_T_8239, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8241 = and(_T_8238, _T_8240) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8242 = or(_T_8241, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8243 = bits(_T_8242, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_2 = mux(_T_8243, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8244 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8245 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8246 = eq(_T_8245, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8247 = and(_T_8244, _T_8246) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8248 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8249 = eq(_T_8248, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8250 = and(_T_8247, _T_8249) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8251 = or(_T_8250, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8252 = bits(_T_8251, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_3 = mux(_T_8252, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8253 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8254 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8255 = eq(_T_8254, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8256 = and(_T_8253, _T_8255) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8257 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8258 = eq(_T_8257, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8259 = and(_T_8256, _T_8258) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8260 = or(_T_8259, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8261 = bits(_T_8260, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_4 = mux(_T_8261, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8262 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8263 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8264 = eq(_T_8263, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8265 = and(_T_8262, _T_8264) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8266 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8267 = eq(_T_8266, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8268 = and(_T_8265, _T_8267) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8269 = or(_T_8268, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8270 = bits(_T_8269, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_5 = mux(_T_8270, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8271 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8272 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8273 = eq(_T_8272, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8274 = and(_T_8271, _T_8273) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8275 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8276 = eq(_T_8275, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8277 = and(_T_8274, _T_8276) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8278 = or(_T_8277, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8279 = bits(_T_8278, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_6 = mux(_T_8279, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8280 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8281 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8282 = eq(_T_8281, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8283 = and(_T_8280, _T_8282) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8284 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8285 = eq(_T_8284, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8286 = and(_T_8283, _T_8285) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8287 = or(_T_8286, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8288 = bits(_T_8287, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_7 = mux(_T_8288, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8289 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8290 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8291 = eq(_T_8290, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8292 = and(_T_8289, _T_8291) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8293 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8294 = eq(_T_8293, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8295 = and(_T_8292, _T_8294) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8296 = or(_T_8295, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8297 = bits(_T_8296, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_8 = mux(_T_8297, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8298 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8299 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8300 = eq(_T_8299, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8301 = and(_T_8298, _T_8300) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8302 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8303 = eq(_T_8302, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8304 = and(_T_8301, _T_8303) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8305 = or(_T_8304, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8306 = bits(_T_8305, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_9 = mux(_T_8306, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8307 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8308 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8309 = eq(_T_8308, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8310 = and(_T_8307, _T_8309) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8311 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8312 = eq(_T_8311, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8313 = and(_T_8310, _T_8312) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8314 = or(_T_8313, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8315 = bits(_T_8314, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_10 = mux(_T_8315, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8316 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8317 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8318 = eq(_T_8317, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8319 = and(_T_8316, _T_8318) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8320 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8321 = eq(_T_8320, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8322 = and(_T_8319, _T_8321) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8323 = or(_T_8322, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8324 = bits(_T_8323, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_11 = mux(_T_8324, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8325 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8326 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8327 = eq(_T_8326, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8328 = and(_T_8325, _T_8327) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8329 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8330 = eq(_T_8329, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8331 = and(_T_8328, _T_8330) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8332 = or(_T_8331, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8333 = bits(_T_8332, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_12 = mux(_T_8333, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8334 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8335 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8336 = eq(_T_8335, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8337 = and(_T_8334, _T_8336) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8338 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8339 = eq(_T_8338, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8340 = and(_T_8337, _T_8339) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8341 = or(_T_8340, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8342 = bits(_T_8341, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_13 = mux(_T_8342, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8343 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8344 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8345 = eq(_T_8344, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8346 = and(_T_8343, _T_8345) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8347 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8348 = eq(_T_8347, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8349 = and(_T_8346, _T_8348) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8350 = or(_T_8349, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8351 = bits(_T_8350, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_14 = mux(_T_8351, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8352 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8353 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8354 = eq(_T_8353, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8355 = and(_T_8352, _T_8354) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8356 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8357 = eq(_T_8356, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8358 = and(_T_8355, _T_8357) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8359 = or(_T_8358, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8360 = bits(_T_8359, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_14_15 = mux(_T_8360, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8361 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8362 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8363 = eq(_T_8362, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8364 = and(_T_8361, _T_8363) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8365 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8366 = eq(_T_8365, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8367 = and(_T_8364, _T_8366) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8368 = or(_T_8367, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8369 = bits(_T_8368, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_0 = mux(_T_8369, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8370 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8371 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8372 = eq(_T_8371, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8373 = and(_T_8370, _T_8372) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8374 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8375 = eq(_T_8374, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8376 = and(_T_8373, _T_8375) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8377 = or(_T_8376, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8378 = bits(_T_8377, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_1 = mux(_T_8378, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8379 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8380 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8381 = eq(_T_8380, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8382 = and(_T_8379, _T_8381) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8383 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8384 = eq(_T_8383, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8385 = and(_T_8382, _T_8384) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8386 = or(_T_8385, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8387 = bits(_T_8386, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_2 = mux(_T_8387, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8388 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8389 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8390 = eq(_T_8389, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8391 = and(_T_8388, _T_8390) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8392 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8393 = eq(_T_8392, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8394 = and(_T_8391, _T_8393) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8395 = or(_T_8394, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8396 = bits(_T_8395, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_3 = mux(_T_8396, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_8397 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8398 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8399 = eq(_T_8398, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8400 = and(_T_8397, _T_8399) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8401 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8402 = eq(_T_8401, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8403 = and(_T_8400, _T_8402) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8404 = or(_T_8403, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8405 = bits(_T_8404, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_15_4 = mux(_T_8405, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8406 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8407 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8408 = eq(_T_8407, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8409 = and(_T_8406, _T_8408) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8410 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8411 = eq(_T_8410, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8412 = and(_T_8409, _T_8411) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8413 = or(_T_8412, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8414 = bits(_T_8413, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_15_5 = mux(_T_8414, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8415 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8416 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8417 = eq(_T_8416, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8418 = and(_T_8415, _T_8417) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8419 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8420 = eq(_T_8419, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8421 = and(_T_8418, _T_8420) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8422 = or(_T_8421, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8423 = bits(_T_8422, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_6 = mux(_T_8423, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8424 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8425 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8426 = eq(_T_8425, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8427 = and(_T_8424, _T_8426) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8428 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8429 = eq(_T_8428, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8430 = and(_T_8427, _T_8429) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8431 = or(_T_8430, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8432 = bits(_T_8431, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_7 = mux(_T_8432, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8433 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8434 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8435 = eq(_T_8434, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8436 = and(_T_8433, _T_8435) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8437 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8438 = eq(_T_8437, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8439 = and(_T_8436, _T_8438) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8440 = or(_T_8439, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8441 = bits(_T_8440, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_8 = mux(_T_8441, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8442 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8443 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8444 = eq(_T_8443, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8445 = and(_T_8442, _T_8444) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8446 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8447 = eq(_T_8446, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8448 = and(_T_8445, _T_8447) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8449 = or(_T_8448, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8450 = bits(_T_8449, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_9 = mux(_T_8450, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8451 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8452 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8453 = eq(_T_8452, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_8454 = and(_T_8451, _T_8453) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8455 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8456 = eq(_T_8455, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8457 = and(_T_8454, _T_8456) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8458 = or(_T_8457, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8459 = bits(_T_8458, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_0_15_10 = mux(_T_8459, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8460 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8461 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8462 = eq(_T_8461, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8463 = and(_T_8460, _T_8462) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8464 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8465 = eq(_T_8464, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8466 = and(_T_8463, _T_8465) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8467 = or(_T_8466, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8468 = bits(_T_8467, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_11 = mux(_T_8468, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8469 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8470 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8471 = eq(_T_8470, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_8472 = and(_T_8469, _T_8471) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8473 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8474 = eq(_T_8473, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8475 = and(_T_8472, _T_8474) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8476 = or(_T_8475, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8477 = bits(_T_8476, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_12 = mux(_T_8477, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8478 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8479 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8480 = eq(_T_8479, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8481 = and(_T_8478, _T_8480) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8482 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8483 = eq(_T_8482, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8484 = and(_T_8481, _T_8483) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8485 = or(_T_8484, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8486 = bits(_T_8485, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_13 = mux(_T_8486, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8487 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8488 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8489 = eq(_T_8488, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8490 = and(_T_8487, _T_8489) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8491 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8492 = eq(_T_8491, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8493 = and(_T_8490, _T_8492) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8494 = or(_T_8493, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8495 = bits(_T_8494, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_14 = mux(_T_8495, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8496 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8497 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8498 = eq(_T_8497, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8499 = and(_T_8496, _T_8498) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8500 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8501 = eq(_T_8500, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8502 = and(_T_8499, _T_8501) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8503 = or(_T_8502, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8504 = bits(_T_8503, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_0_15_15 = mux(_T_8504, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8505 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8506 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8507 = eq(_T_8506, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8508 = and(_T_8505, _T_8507) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8509 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8510 = eq(_T_8509, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8511 = and(_T_8508, _T_8510) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8512 = or(_T_8511, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8513 = bits(_T_8512, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_0 = mux(_T_8513, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8514 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8515 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8516 = eq(_T_8515, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8517 = and(_T_8514, _T_8516) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8518 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8519 = eq(_T_8518, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8520 = and(_T_8517, _T_8519) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8521 = or(_T_8520, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8522 = bits(_T_8521, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_1 = mux(_T_8522, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8523 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8524 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8525 = eq(_T_8524, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8526 = and(_T_8523, _T_8525) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8527 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8528 = eq(_T_8527, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8529 = and(_T_8526, _T_8528) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8530 = or(_T_8529, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8531 = bits(_T_8530, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_2 = mux(_T_8531, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8532 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8533 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8534 = eq(_T_8533, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8535 = and(_T_8532, _T_8534) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8536 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8537 = eq(_T_8536, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8538 = and(_T_8535, _T_8537) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8539 = or(_T_8538, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8540 = bits(_T_8539, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_3 = mux(_T_8540, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8541 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8542 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8543 = eq(_T_8542, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8544 = and(_T_8541, _T_8543) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8545 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8546 = eq(_T_8545, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8547 = and(_T_8544, _T_8546) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8548 = or(_T_8547, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8549 = bits(_T_8548, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_4 = mux(_T_8549, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8550 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8551 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8552 = eq(_T_8551, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8553 = and(_T_8550, _T_8552) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8554 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8555 = eq(_T_8554, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8556 = and(_T_8553, _T_8555) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8557 = or(_T_8556, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8558 = bits(_T_8557, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_5 = mux(_T_8558, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8559 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8560 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8561 = eq(_T_8560, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8562 = and(_T_8559, _T_8561) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8563 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8564 = eq(_T_8563, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8565 = and(_T_8562, _T_8564) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8566 = or(_T_8565, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8567 = bits(_T_8566, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_6 = mux(_T_8567, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8568 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8569 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8570 = eq(_T_8569, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8571 = and(_T_8568, _T_8570) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8572 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8573 = eq(_T_8572, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8574 = and(_T_8571, _T_8573) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8575 = or(_T_8574, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8576 = bits(_T_8575, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_7 = mux(_T_8576, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8577 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8578 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8579 = eq(_T_8578, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8580 = and(_T_8577, _T_8579) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8581 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8582 = eq(_T_8581, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8583 = and(_T_8580, _T_8582) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8584 = or(_T_8583, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8585 = bits(_T_8584, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_8 = mux(_T_8585, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8586 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8587 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8588 = eq(_T_8587, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8589 = and(_T_8586, _T_8588) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8590 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8591 = eq(_T_8590, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8592 = and(_T_8589, _T_8591) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8593 = or(_T_8592, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8594 = bits(_T_8593, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_9 = mux(_T_8594, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8595 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8596 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8597 = eq(_T_8596, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8598 = and(_T_8595, _T_8597) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8599 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8600 = eq(_T_8599, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8601 = and(_T_8598, _T_8600) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8602 = or(_T_8601, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8603 = bits(_T_8602, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_10 = mux(_T_8603, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8604 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8605 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8606 = eq(_T_8605, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8607 = and(_T_8604, _T_8606) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8608 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8609 = eq(_T_8608, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8610 = and(_T_8607, _T_8609) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8611 = or(_T_8610, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8612 = bits(_T_8611, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_11 = mux(_T_8612, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8613 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8614 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8615 = eq(_T_8614, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8616 = and(_T_8613, _T_8615) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8617 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8618 = eq(_T_8617, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8619 = and(_T_8616, _T_8618) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8620 = or(_T_8619, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8621 = bits(_T_8620, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_12 = mux(_T_8621, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8622 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8623 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8624 = eq(_T_8623, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8625 = and(_T_8622, _T_8624) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8626 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8627 = eq(_T_8626, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8628 = and(_T_8625, _T_8627) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8629 = or(_T_8628, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8630 = bits(_T_8629, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_13 = mux(_T_8630, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8631 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8632 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8633 = eq(_T_8632, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8634 = and(_T_8631, _T_8633) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8635 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8636 = eq(_T_8635, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8637 = and(_T_8634, _T_8636) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8638 = or(_T_8637, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8639 = bits(_T_8638, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_14 = mux(_T_8639, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8640 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8641 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8642 = eq(_T_8641, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8643 = and(_T_8640, _T_8642) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8644 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8645 = eq(_T_8644, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8646 = and(_T_8643, _T_8645) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8647 = or(_T_8646, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8648 = bits(_T_8647, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_0_15 = mux(_T_8648, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8649 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8650 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8651 = eq(_T_8650, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8652 = and(_T_8649, _T_8651) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8653 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8654 = eq(_T_8653, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8655 = and(_T_8652, _T_8654) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8656 = or(_T_8655, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8657 = bits(_T_8656, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_0 = mux(_T_8657, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8658 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8659 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8660 = eq(_T_8659, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8661 = and(_T_8658, _T_8660) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8662 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8663 = eq(_T_8662, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8664 = and(_T_8661, _T_8663) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8665 = or(_T_8664, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8666 = bits(_T_8665, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_1 = mux(_T_8666, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8667 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8668 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8669 = eq(_T_8668, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8670 = and(_T_8667, _T_8669) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8671 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8672 = eq(_T_8671, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8673 = and(_T_8670, _T_8672) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8674 = or(_T_8673, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8675 = bits(_T_8674, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_2 = mux(_T_8675, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8676 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8677 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8678 = eq(_T_8677, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8679 = and(_T_8676, _T_8678) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8680 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8681 = eq(_T_8680, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8682 = and(_T_8679, _T_8681) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8683 = or(_T_8682, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8684 = bits(_T_8683, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_3 = mux(_T_8684, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8685 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8686 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8687 = eq(_T_8686, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8688 = and(_T_8685, _T_8687) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8689 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8690 = eq(_T_8689, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8691 = and(_T_8688, _T_8690) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8692 = or(_T_8691, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8693 = bits(_T_8692, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_4 = mux(_T_8693, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_8694 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_8695 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8696 = eq(_T_8695, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8697 = and(_T_8694, _T_8696) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8698 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8699 = eq(_T_8698, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8700 = and(_T_8697, _T_8699) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8701 = or(_T_8700, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8702 = bits(_T_8701, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_1_5 = mux(_T_8702, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8703 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8704 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8705 = eq(_T_8704, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8706 = and(_T_8703, _T_8705) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8707 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8708 = eq(_T_8707, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8709 = and(_T_8706, _T_8708) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8710 = or(_T_8709, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8711 = bits(_T_8710, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_1_6 = mux(_T_8711, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8712 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8713 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8714 = eq(_T_8713, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8715 = and(_T_8712, _T_8714) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8716 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8717 = eq(_T_8716, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8718 = and(_T_8715, _T_8717) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8719 = or(_T_8718, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8720 = bits(_T_8719, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_1_7 = mux(_T_8720, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8721 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8722 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8723 = eq(_T_8722, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8724 = and(_T_8721, _T_8723) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8725 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8726 = eq(_T_8725, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8727 = and(_T_8724, _T_8726) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8728 = or(_T_8727, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8729 = bits(_T_8728, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_8 = mux(_T_8729, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8730 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8731 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8732 = eq(_T_8731, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8733 = and(_T_8730, _T_8732) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8734 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8735 = eq(_T_8734, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8736 = and(_T_8733, _T_8735) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8737 = or(_T_8736, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8738 = bits(_T_8737, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_9 = mux(_T_8738, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8739 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8740 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8741 = eq(_T_8740, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8742 = and(_T_8739, _T_8741) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8743 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8744 = eq(_T_8743, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8745 = and(_T_8742, _T_8744) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8746 = or(_T_8745, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8747 = bits(_T_8746, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_10 = mux(_T_8747, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8748 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8749 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8750 = eq(_T_8749, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8751 = and(_T_8748, _T_8750) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8752 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8753 = eq(_T_8752, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8754 = and(_T_8751, _T_8753) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8755 = or(_T_8754, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8756 = bits(_T_8755, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_1_11 = mux(_T_8756, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_8757 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8758 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8759 = eq(_T_8758, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8760 = and(_T_8757, _T_8759) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8761 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8762 = eq(_T_8761, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8763 = and(_T_8760, _T_8762) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8764 = or(_T_8763, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8765 = bits(_T_8764, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_1_12 = mux(_T_8765, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_8766 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8767 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8768 = eq(_T_8767, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_8769 = and(_T_8766, _T_8768) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8770 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8771 = eq(_T_8770, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8772 = and(_T_8769, _T_8771) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8773 = or(_T_8772, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8774 = bits(_T_8773, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_1_13 = mux(_T_8774, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8775 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8776 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8777 = eq(_T_8776, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8778 = and(_T_8775, _T_8777) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8779 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8780 = eq(_T_8779, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8781 = and(_T_8778, _T_8780) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8782 = or(_T_8781, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8783 = bits(_T_8782, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_14 = mux(_T_8783, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8784 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8785 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8786 = eq(_T_8785, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8787 = and(_T_8784, _T_8786) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8788 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8789 = eq(_T_8788, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8790 = and(_T_8787, _T_8789) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8791 = or(_T_8790, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8792 = bits(_T_8791, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_1_15 = mux(_T_8792, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8793 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8794 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8795 = eq(_T_8794, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8796 = and(_T_8793, _T_8795) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8797 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8798 = eq(_T_8797, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8799 = and(_T_8796, _T_8798) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8800 = or(_T_8799, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8801 = bits(_T_8800, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_0 = mux(_T_8801, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8802 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8803 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8804 = eq(_T_8803, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8805 = and(_T_8802, _T_8804) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8806 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8807 = eq(_T_8806, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8808 = and(_T_8805, _T_8807) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8809 = or(_T_8808, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8810 = bits(_T_8809, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_1 = mux(_T_8810, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8811 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8812 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8813 = eq(_T_8812, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8814 = and(_T_8811, _T_8813) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8815 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8816 = eq(_T_8815, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8817 = and(_T_8814, _T_8816) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8818 = or(_T_8817, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8819 = bits(_T_8818, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_2 = mux(_T_8819, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8820 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8821 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8822 = eq(_T_8821, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8823 = and(_T_8820, _T_8822) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8824 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8825 = eq(_T_8824, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8826 = and(_T_8823, _T_8825) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8827 = or(_T_8826, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8828 = bits(_T_8827, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_3 = mux(_T_8828, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8829 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8830 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8831 = eq(_T_8830, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8832 = and(_T_8829, _T_8831) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8833 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8834 = eq(_T_8833, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8835 = and(_T_8832, _T_8834) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8836 = or(_T_8835, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8837 = bits(_T_8836, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_4 = mux(_T_8837, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8838 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8839 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8840 = eq(_T_8839, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8841 = and(_T_8838, _T_8840) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8842 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8843 = eq(_T_8842, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8844 = and(_T_8841, _T_8843) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8845 = or(_T_8844, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8846 = bits(_T_8845, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_5 = mux(_T_8846, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8847 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8848 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8849 = eq(_T_8848, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8850 = and(_T_8847, _T_8849) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8851 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8852 = eq(_T_8851, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8853 = and(_T_8850, _T_8852) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8854 = or(_T_8853, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8855 = bits(_T_8854, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_6 = mux(_T_8855, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8856 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8857 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8858 = eq(_T_8857, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8859 = and(_T_8856, _T_8858) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8860 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8861 = eq(_T_8860, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8862 = and(_T_8859, _T_8861) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8863 = or(_T_8862, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8864 = bits(_T_8863, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_7 = mux(_T_8864, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8865 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8866 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8867 = eq(_T_8866, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8868 = and(_T_8865, _T_8867) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8869 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8870 = eq(_T_8869, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8871 = and(_T_8868, _T_8870) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8872 = or(_T_8871, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8873 = bits(_T_8872, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_8 = mux(_T_8873, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8874 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8875 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8876 = eq(_T_8875, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8877 = and(_T_8874, _T_8876) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8878 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8879 = eq(_T_8878, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8880 = and(_T_8877, _T_8879) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8881 = or(_T_8880, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8882 = bits(_T_8881, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_9 = mux(_T_8882, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8883 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8884 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8885 = eq(_T_8884, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8886 = and(_T_8883, _T_8885) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8887 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8888 = eq(_T_8887, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8889 = and(_T_8886, _T_8888) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8890 = or(_T_8889, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8891 = bits(_T_8890, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_10 = mux(_T_8891, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8892 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8893 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8894 = eq(_T_8893, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8895 = and(_T_8892, _T_8894) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8896 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8897 = eq(_T_8896, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8898 = and(_T_8895, _T_8897) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8899 = or(_T_8898, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8900 = bits(_T_8899, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_11 = mux(_T_8900, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8901 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8902 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8903 = eq(_T_8902, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8904 = and(_T_8901, _T_8903) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8905 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8906 = eq(_T_8905, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8907 = and(_T_8904, _T_8906) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8908 = or(_T_8907, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8909 = bits(_T_8908, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_12 = mux(_T_8909, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8910 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8911 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8912 = eq(_T_8911, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8913 = and(_T_8910, _T_8912) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8914 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8915 = eq(_T_8914, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8916 = and(_T_8913, _T_8915) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8917 = or(_T_8916, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8918 = bits(_T_8917, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_13 = mux(_T_8918, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8919 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8920 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8921 = eq(_T_8920, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8922 = and(_T_8919, _T_8921) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8923 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8924 = eq(_T_8923, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8925 = and(_T_8922, _T_8924) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8926 = or(_T_8925, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8927 = bits(_T_8926, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_14 = mux(_T_8927, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8928 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8929 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8930 = eq(_T_8929, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8931 = and(_T_8928, _T_8930) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8932 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8933 = eq(_T_8932, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8934 = and(_T_8931, _T_8933) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8935 = or(_T_8934, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8936 = bits(_T_8935, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_2_15 = mux(_T_8936, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8937 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8938 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8939 = eq(_T_8938, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8940 = and(_T_8937, _T_8939) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8941 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8942 = eq(_T_8941, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8943 = and(_T_8940, _T_8942) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8944 = or(_T_8943, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8945 = bits(_T_8944, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_0 = mux(_T_8945, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8946 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8947 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8948 = eq(_T_8947, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8949 = and(_T_8946, _T_8948) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8950 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8951 = eq(_T_8950, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8952 = and(_T_8949, _T_8951) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8953 = or(_T_8952, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8954 = bits(_T_8953, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_1 = mux(_T_8954, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8955 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8956 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8957 = eq(_T_8956, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8958 = and(_T_8955, _T_8957) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8959 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8960 = eq(_T_8959, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8961 = and(_T_8958, _T_8960) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8962 = or(_T_8961, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8963 = bits(_T_8962, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_2 = mux(_T_8963, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8964 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8965 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8966 = eq(_T_8965, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8967 = and(_T_8964, _T_8966) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8968 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8969 = eq(_T_8968, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8970 = and(_T_8967, _T_8969) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8971 = or(_T_8970, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8972 = bits(_T_8971, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_3 = mux(_T_8972, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8973 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8974 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8975 = eq(_T_8974, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8976 = and(_T_8973, _T_8975) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8977 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8978 = eq(_T_8977, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8979 = and(_T_8976, _T_8978) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8980 = or(_T_8979, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8981 = bits(_T_8980, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_4 = mux(_T_8981, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_8982 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8983 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_8984 = eq(_T_8983, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8985 = and(_T_8982, _T_8984) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8986 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8987 = eq(_T_8986, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8988 = and(_T_8985, _T_8987) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8989 = or(_T_8988, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8990 = bits(_T_8989, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_5 = mux(_T_8990, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_8991 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_8992 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_8993 = eq(_T_8992, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_8994 = and(_T_8991, _T_8993) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_8995 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_8996 = eq(_T_8995, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_8997 = and(_T_8994, _T_8996) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_8998 = or(_T_8997, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_8999 = bits(_T_8998, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_3_6 = mux(_T_8999, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9000 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9001 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9002 = eq(_T_9001, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9003 = and(_T_9000, _T_9002) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9004 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9005 = eq(_T_9004, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9006 = and(_T_9003, _T_9005) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9007 = or(_T_9006, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9008 = bits(_T_9007, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_3_7 = mux(_T_9008, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9009 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9010 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9011 = eq(_T_9010, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9012 = and(_T_9009, _T_9011) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9013 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9014 = eq(_T_9013, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9015 = and(_T_9012, _T_9014) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9016 = or(_T_9015, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9017 = bits(_T_9016, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_3_8 = mux(_T_9017, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9018 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9019 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9020 = eq(_T_9019, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9021 = and(_T_9018, _T_9020) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9022 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9023 = eq(_T_9022, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9024 = and(_T_9021, _T_9023) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9025 = or(_T_9024, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9026 = bits(_T_9025, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_9 = mux(_T_9026, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9027 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9028 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9029 = eq(_T_9028, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9030 = and(_T_9027, _T_9029) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9031 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9032 = eq(_T_9031, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9033 = and(_T_9030, _T_9032) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9034 = or(_T_9033, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9035 = bits(_T_9034, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_10 = mux(_T_9035, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9036 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9037 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9038 = eq(_T_9037, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9039 = and(_T_9036, _T_9038) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9040 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9041 = eq(_T_9040, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9042 = and(_T_9039, _T_9041) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9043 = or(_T_9042, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9044 = bits(_T_9043, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_11 = mux(_T_9044, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9045 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9046 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9047 = eq(_T_9046, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9048 = and(_T_9045, _T_9047) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9049 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9050 = eq(_T_9049, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9051 = and(_T_9048, _T_9050) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9052 = or(_T_9051, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9053 = bits(_T_9052, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_3_12 = mux(_T_9053, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9054 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9055 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9056 = eq(_T_9055, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9057 = and(_T_9054, _T_9056) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9058 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9059 = eq(_T_9058, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_9060 = and(_T_9057, _T_9059) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9061 = or(_T_9060, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9062 = bits(_T_9061, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_3_13 = mux(_T_9062, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9063 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9064 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9065 = eq(_T_9064, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9066 = and(_T_9063, _T_9065) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9067 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9068 = eq(_T_9067, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9069 = and(_T_9066, _T_9068) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9070 = or(_T_9069, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9071 = bits(_T_9070, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_3_14 = mux(_T_9071, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9072 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9073 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9074 = eq(_T_9073, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9075 = and(_T_9072, _T_9074) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9076 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9077 = eq(_T_9076, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9078 = and(_T_9075, _T_9077) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9079 = or(_T_9078, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9080 = bits(_T_9079, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_3_15 = mux(_T_9080, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9081 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9082 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9083 = eq(_T_9082, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9084 = and(_T_9081, _T_9083) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9085 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9086 = eq(_T_9085, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9087 = and(_T_9084, _T_9086) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9088 = or(_T_9087, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9089 = bits(_T_9088, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_0 = mux(_T_9089, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9090 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9091 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9092 = eq(_T_9091, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9093 = and(_T_9090, _T_9092) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9094 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9095 = eq(_T_9094, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9096 = and(_T_9093, _T_9095) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9097 = or(_T_9096, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9098 = bits(_T_9097, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_1 = mux(_T_9098, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9099 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9100 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9101 = eq(_T_9100, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9102 = and(_T_9099, _T_9101) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9103 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9104 = eq(_T_9103, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9105 = and(_T_9102, _T_9104) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9106 = or(_T_9105, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9107 = bits(_T_9106, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_2 = mux(_T_9107, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9108 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9109 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9110 = eq(_T_9109, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9111 = and(_T_9108, _T_9110) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9112 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9113 = eq(_T_9112, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9114 = and(_T_9111, _T_9113) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9115 = or(_T_9114, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9116 = bits(_T_9115, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_3 = mux(_T_9116, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9117 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9118 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9119 = eq(_T_9118, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9120 = and(_T_9117, _T_9119) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9121 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9122 = eq(_T_9121, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9123 = and(_T_9120, _T_9122) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9124 = or(_T_9123, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9125 = bits(_T_9124, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_4 = mux(_T_9125, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9126 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9127 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9128 = eq(_T_9127, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9129 = and(_T_9126, _T_9128) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9130 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9131 = eq(_T_9130, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9132 = and(_T_9129, _T_9131) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9133 = or(_T_9132, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9134 = bits(_T_9133, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_5 = mux(_T_9134, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9135 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9136 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9137 = eq(_T_9136, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9138 = and(_T_9135, _T_9137) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9139 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9140 = eq(_T_9139, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9141 = and(_T_9138, _T_9140) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9142 = or(_T_9141, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9143 = bits(_T_9142, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_6 = mux(_T_9143, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9144 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9145 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9146 = eq(_T_9145, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9147 = and(_T_9144, _T_9146) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9148 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9149 = eq(_T_9148, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9150 = and(_T_9147, _T_9149) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9151 = or(_T_9150, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9152 = bits(_T_9151, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_7 = mux(_T_9152, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9153 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9154 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9155 = eq(_T_9154, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9156 = and(_T_9153, _T_9155) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9157 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9158 = eq(_T_9157, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9159 = and(_T_9156, _T_9158) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9160 = or(_T_9159, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9161 = bits(_T_9160, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_8 = mux(_T_9161, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9162 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9163 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9164 = eq(_T_9163, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9165 = and(_T_9162, _T_9164) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9166 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9167 = eq(_T_9166, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9168 = and(_T_9165, _T_9167) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9169 = or(_T_9168, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9170 = bits(_T_9169, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_9 = mux(_T_9170, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9171 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9172 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9173 = eq(_T_9172, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9174 = and(_T_9171, _T_9173) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9175 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9176 = eq(_T_9175, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9177 = and(_T_9174, _T_9176) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9178 = or(_T_9177, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9179 = bits(_T_9178, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_10 = mux(_T_9179, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9180 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9181 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9182 = eq(_T_9181, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9183 = and(_T_9180, _T_9182) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9184 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9185 = eq(_T_9184, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9186 = and(_T_9183, _T_9185) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9187 = or(_T_9186, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9188 = bits(_T_9187, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_11 = mux(_T_9188, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9189 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9190 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9191 = eq(_T_9190, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9192 = and(_T_9189, _T_9191) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9193 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9194 = eq(_T_9193, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9195 = and(_T_9192, _T_9194) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9196 = or(_T_9195, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9197 = bits(_T_9196, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_12 = mux(_T_9197, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9198 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9199 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9200 = eq(_T_9199, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9201 = and(_T_9198, _T_9200) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9202 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9203 = eq(_T_9202, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9204 = and(_T_9201, _T_9203) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9205 = or(_T_9204, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9206 = bits(_T_9205, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_13 = mux(_T_9206, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9207 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9208 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9209 = eq(_T_9208, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9210 = and(_T_9207, _T_9209) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9211 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9212 = eq(_T_9211, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9213 = and(_T_9210, _T_9212) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9214 = or(_T_9213, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9215 = bits(_T_9214, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_14 = mux(_T_9215, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9216 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9217 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9218 = eq(_T_9217, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9219 = and(_T_9216, _T_9218) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9220 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9221 = eq(_T_9220, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9222 = and(_T_9219, _T_9221) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9223 = or(_T_9222, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9224 = bits(_T_9223, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_4_15 = mux(_T_9224, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9225 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9226 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9227 = eq(_T_9226, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9228 = and(_T_9225, _T_9227) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9229 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9230 = eq(_T_9229, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9231 = and(_T_9228, _T_9230) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9232 = or(_T_9231, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9233 = bits(_T_9232, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_0 = mux(_T_9233, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9234 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9235 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9236 = eq(_T_9235, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9237 = and(_T_9234, _T_9236) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9238 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9239 = eq(_T_9238, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9240 = and(_T_9237, _T_9239) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9241 = or(_T_9240, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9242 = bits(_T_9241, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_1 = mux(_T_9242, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9243 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9244 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9245 = eq(_T_9244, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9246 = and(_T_9243, _T_9245) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9247 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9248 = eq(_T_9247, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9249 = and(_T_9246, _T_9248) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9250 = or(_T_9249, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9251 = bits(_T_9250, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_2 = mux(_T_9251, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9252 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9253 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9254 = eq(_T_9253, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9255 = and(_T_9252, _T_9254) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9256 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9257 = eq(_T_9256, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9258 = and(_T_9255, _T_9257) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9259 = or(_T_9258, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9260 = bits(_T_9259, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_3 = mux(_T_9260, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9261 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9262 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9263 = eq(_T_9262, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9264 = and(_T_9261, _T_9263) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9265 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9266 = eq(_T_9265, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9267 = and(_T_9264, _T_9266) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9268 = or(_T_9267, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9269 = bits(_T_9268, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_4 = mux(_T_9269, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9270 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9271 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9272 = eq(_T_9271, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9273 = and(_T_9270, _T_9272) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9274 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9275 = eq(_T_9274, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9276 = and(_T_9273, _T_9275) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9277 = or(_T_9276, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9278 = bits(_T_9277, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_5 = mux(_T_9278, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9279 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9280 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9281 = eq(_T_9280, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9282 = and(_T_9279, _T_9281) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9283 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9284 = eq(_T_9283, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9285 = and(_T_9282, _T_9284) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9286 = or(_T_9285, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9287 = bits(_T_9286, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_6 = mux(_T_9287, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9288 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9289 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9290 = eq(_T_9289, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9291 = and(_T_9288, _T_9290) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9292 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9293 = eq(_T_9292, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9294 = and(_T_9291, _T_9293) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9295 = or(_T_9294, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9296 = bits(_T_9295, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_7 = mux(_T_9296, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9297 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9298 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9299 = eq(_T_9298, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9300 = and(_T_9297, _T_9299) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9301 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9302 = eq(_T_9301, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9303 = and(_T_9300, _T_9302) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9304 = or(_T_9303, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9305 = bits(_T_9304, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_8 = mux(_T_9305, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9306 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9307 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9308 = eq(_T_9307, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9309 = and(_T_9306, _T_9308) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9310 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9311 = eq(_T_9310, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9312 = and(_T_9309, _T_9311) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9313 = or(_T_9312, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9314 = bits(_T_9313, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_9 = mux(_T_9314, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9315 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9316 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9317 = eq(_T_9316, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9318 = and(_T_9315, _T_9317) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9319 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9320 = eq(_T_9319, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9321 = and(_T_9318, _T_9320) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9322 = or(_T_9321, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9323 = bits(_T_9322, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_10 = mux(_T_9323, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9324 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9325 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9326 = eq(_T_9325, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9327 = and(_T_9324, _T_9326) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9328 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9329 = eq(_T_9328, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9330 = and(_T_9327, _T_9329) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9331 = or(_T_9330, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9332 = bits(_T_9331, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_11 = mux(_T_9332, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9333 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9334 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9335 = eq(_T_9334, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9336 = and(_T_9333, _T_9335) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9337 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9338 = eq(_T_9337, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9339 = and(_T_9336, _T_9338) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9340 = or(_T_9339, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9341 = bits(_T_9340, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_12 = mux(_T_9341, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9342 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9343 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9344 = eq(_T_9343, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9345 = and(_T_9342, _T_9344) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9346 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9347 = eq(_T_9346, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9348 = and(_T_9345, _T_9347) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9349 = or(_T_9348, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9350 = bits(_T_9349, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_13 = mux(_T_9350, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9351 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9352 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9353 = eq(_T_9352, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9354 = and(_T_9351, _T_9353) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9355 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9356 = eq(_T_9355, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9357 = and(_T_9354, _T_9356) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9358 = or(_T_9357, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9359 = bits(_T_9358, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_14 = mux(_T_9359, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9360 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9361 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9362 = eq(_T_9361, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9363 = and(_T_9360, _T_9362) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9364 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9365 = eq(_T_9364, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9366 = and(_T_9363, _T_9365) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9367 = or(_T_9366, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9368 = bits(_T_9367, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_5_15 = mux(_T_9368, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9369 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9370 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9371 = eq(_T_9370, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9372 = and(_T_9369, _T_9371) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9373 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9374 = eq(_T_9373, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9375 = and(_T_9372, _T_9374) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9376 = or(_T_9375, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9377 = bits(_T_9376, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_0 = mux(_T_9377, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9378 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9379 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9380 = eq(_T_9379, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9381 = and(_T_9378, _T_9380) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9382 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9383 = eq(_T_9382, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9384 = and(_T_9381, _T_9383) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9385 = or(_T_9384, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9386 = bits(_T_9385, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_1 = mux(_T_9386, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9387 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9388 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9389 = eq(_T_9388, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9390 = and(_T_9387, _T_9389) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9391 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9392 = eq(_T_9391, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9393 = and(_T_9390, _T_9392) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9394 = or(_T_9393, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9395 = bits(_T_9394, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_2 = mux(_T_9395, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9396 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9397 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9398 = eq(_T_9397, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9399 = and(_T_9396, _T_9398) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9400 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9401 = eq(_T_9400, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9402 = and(_T_9399, _T_9401) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9403 = or(_T_9402, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9404 = bits(_T_9403, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_3 = mux(_T_9404, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9405 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9406 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9407 = eq(_T_9406, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9408 = and(_T_9405, _T_9407) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9409 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9410 = eq(_T_9409, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9411 = and(_T_9408, _T_9410) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9412 = or(_T_9411, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9413 = bits(_T_9412, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_4 = mux(_T_9413, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9414 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9415 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9416 = eq(_T_9415, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9417 = and(_T_9414, _T_9416) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9418 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9419 = eq(_T_9418, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9420 = and(_T_9417, _T_9419) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9421 = or(_T_9420, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9422 = bits(_T_9421, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_5 = mux(_T_9422, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9423 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9424 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9425 = eq(_T_9424, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9426 = and(_T_9423, _T_9425) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9427 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9428 = eq(_T_9427, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9429 = and(_T_9426, _T_9428) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9430 = or(_T_9429, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9431 = bits(_T_9430, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_6 = mux(_T_9431, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9432 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9433 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9434 = eq(_T_9433, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9435 = and(_T_9432, _T_9434) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9436 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9437 = eq(_T_9436, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9438 = and(_T_9435, _T_9437) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9439 = or(_T_9438, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9440 = bits(_T_9439, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_7 = mux(_T_9440, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9441 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9442 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9443 = eq(_T_9442, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9444 = and(_T_9441, _T_9443) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9445 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9446 = eq(_T_9445, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9447 = and(_T_9444, _T_9446) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9448 = or(_T_9447, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9449 = bits(_T_9448, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_8 = mux(_T_9449, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9450 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9451 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9452 = eq(_T_9451, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9453 = and(_T_9450, _T_9452) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9454 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9455 = eq(_T_9454, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9456 = and(_T_9453, _T_9455) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9457 = or(_T_9456, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9458 = bits(_T_9457, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_9 = mux(_T_9458, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9459 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9460 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9461 = eq(_T_9460, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9462 = and(_T_9459, _T_9461) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9463 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9464 = eq(_T_9463, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9465 = and(_T_9462, _T_9464) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9466 = or(_T_9465, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9467 = bits(_T_9466, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_10 = mux(_T_9467, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9468 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9469 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9470 = eq(_T_9469, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9471 = and(_T_9468, _T_9470) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9472 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9473 = eq(_T_9472, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9474 = and(_T_9471, _T_9473) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9475 = or(_T_9474, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9476 = bits(_T_9475, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_11 = mux(_T_9476, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9477 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9478 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9479 = eq(_T_9478, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9480 = and(_T_9477, _T_9479) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9481 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9482 = eq(_T_9481, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9483 = and(_T_9480, _T_9482) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9484 = or(_T_9483, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9485 = bits(_T_9484, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_12 = mux(_T_9485, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9486 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9487 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9488 = eq(_T_9487, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9489 = and(_T_9486, _T_9488) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9490 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9491 = eq(_T_9490, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9492 = and(_T_9489, _T_9491) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9493 = or(_T_9492, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9494 = bits(_T_9493, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_13 = mux(_T_9494, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9495 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9496 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9497 = eq(_T_9496, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9498 = and(_T_9495, _T_9497) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9499 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9500 = eq(_T_9499, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9501 = and(_T_9498, _T_9500) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9502 = or(_T_9501, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9503 = bits(_T_9502, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_14 = mux(_T_9503, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9504 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9505 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9506 = eq(_T_9505, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9507 = and(_T_9504, _T_9506) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9508 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9509 = eq(_T_9508, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9510 = and(_T_9507, _T_9509) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9511 = or(_T_9510, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9512 = bits(_T_9511, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_6_15 = mux(_T_9512, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9513 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9514 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9515 = eq(_T_9514, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9516 = and(_T_9513, _T_9515) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9517 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9518 = eq(_T_9517, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9519 = and(_T_9516, _T_9518) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9520 = or(_T_9519, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9521 = bits(_T_9520, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_0 = mux(_T_9521, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9522 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9523 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9524 = eq(_T_9523, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9525 = and(_T_9522, _T_9524) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9526 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9527 = eq(_T_9526, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9528 = and(_T_9525, _T_9527) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9529 = or(_T_9528, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9530 = bits(_T_9529, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_1 = mux(_T_9530, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9531 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9532 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9533 = eq(_T_9532, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9534 = and(_T_9531, _T_9533) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9535 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9536 = eq(_T_9535, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9537 = and(_T_9534, _T_9536) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9538 = or(_T_9537, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9539 = bits(_T_9538, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_2 = mux(_T_9539, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9540 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9541 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9542 = eq(_T_9541, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9543 = and(_T_9540, _T_9542) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9544 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9545 = eq(_T_9544, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9546 = and(_T_9543, _T_9545) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9547 = or(_T_9546, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9548 = bits(_T_9547, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_3 = mux(_T_9548, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9549 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9550 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9551 = eq(_T_9550, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9552 = and(_T_9549, _T_9551) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9553 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9554 = eq(_T_9553, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9555 = and(_T_9552, _T_9554) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9556 = or(_T_9555, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9557 = bits(_T_9556, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_4 = mux(_T_9557, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9558 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9559 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9560 = eq(_T_9559, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9561 = and(_T_9558, _T_9560) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9562 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9563 = eq(_T_9562, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9564 = and(_T_9561, _T_9563) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9565 = or(_T_9564, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9566 = bits(_T_9565, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_5 = mux(_T_9566, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9567 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9568 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9569 = eq(_T_9568, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9570 = and(_T_9567, _T_9569) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9571 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9572 = eq(_T_9571, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9573 = and(_T_9570, _T_9572) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9574 = or(_T_9573, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9575 = bits(_T_9574, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_6 = mux(_T_9575, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9576 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9577 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9578 = eq(_T_9577, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9579 = and(_T_9576, _T_9578) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9580 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9581 = eq(_T_9580, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9582 = and(_T_9579, _T_9581) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9583 = or(_T_9582, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9584 = bits(_T_9583, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_7 = mux(_T_9584, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9585 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9586 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9587 = eq(_T_9586, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9588 = and(_T_9585, _T_9587) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9589 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9590 = eq(_T_9589, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9591 = and(_T_9588, _T_9590) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9592 = or(_T_9591, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9593 = bits(_T_9592, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_7_8 = mux(_T_9593, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9594 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9595 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9596 = eq(_T_9595, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9597 = and(_T_9594, _T_9596) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9598 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9599 = eq(_T_9598, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9600 = and(_T_9597, _T_9599) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9601 = or(_T_9600, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9602 = bits(_T_9601, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_7_9 = mux(_T_9602, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9603 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9604 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9605 = eq(_T_9604, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9606 = and(_T_9603, _T_9605) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9607 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9608 = eq(_T_9607, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9609 = and(_T_9606, _T_9608) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9610 = or(_T_9609, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9611 = bits(_T_9610, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_7_10 = mux(_T_9611, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9612 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9613 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9614 = eq(_T_9613, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9615 = and(_T_9612, _T_9614) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9616 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9617 = eq(_T_9616, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9618 = and(_T_9615, _T_9617) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9619 = or(_T_9618, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9620 = bits(_T_9619, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_7_11 = mux(_T_9620, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9621 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9622 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9623 = eq(_T_9622, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9624 = and(_T_9621, _T_9623) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9625 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9626 = eq(_T_9625, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9627 = and(_T_9624, _T_9626) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9628 = or(_T_9627, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9629 = bits(_T_9628, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_12 = mux(_T_9629, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9630 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9631 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9632 = eq(_T_9631, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9633 = and(_T_9630, _T_9632) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9634 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9635 = eq(_T_9634, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9636 = and(_T_9633, _T_9635) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9637 = or(_T_9636, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9638 = bits(_T_9637, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_7_13 = mux(_T_9638, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9639 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9640 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9641 = eq(_T_9640, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9642 = and(_T_9639, _T_9641) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9643 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9644 = eq(_T_9643, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9645 = and(_T_9642, _T_9644) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9646 = or(_T_9645, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9647 = bits(_T_9646, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_7_14 = mux(_T_9647, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9648 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9649 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9650 = eq(_T_9649, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9651 = and(_T_9648, _T_9650) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9652 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9653 = eq(_T_9652, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_9654 = and(_T_9651, _T_9653) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9655 = or(_T_9654, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9656 = bits(_T_9655, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_7_15 = mux(_T_9656, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9657 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9658 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9659 = eq(_T_9658, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9660 = and(_T_9657, _T_9659) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9661 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9662 = eq(_T_9661, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9663 = and(_T_9660, _T_9662) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9664 = or(_T_9663, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9665 = bits(_T_9664, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_8_0 = mux(_T_9665, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9666 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9667 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9668 = eq(_T_9667, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9669 = and(_T_9666, _T_9668) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9670 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9671 = eq(_T_9670, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9672 = and(_T_9669, _T_9671) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9673 = or(_T_9672, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9674 = bits(_T_9673, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_1 = mux(_T_9674, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9675 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9676 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9677 = eq(_T_9676, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9678 = and(_T_9675, _T_9677) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9679 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9680 = eq(_T_9679, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9681 = and(_T_9678, _T_9680) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9682 = or(_T_9681, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9683 = bits(_T_9682, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_2 = mux(_T_9683, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9684 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9685 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9686 = eq(_T_9685, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9687 = and(_T_9684, _T_9686) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9688 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9689 = eq(_T_9688, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9690 = and(_T_9687, _T_9689) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9691 = or(_T_9690, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9692 = bits(_T_9691, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_3 = mux(_T_9692, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9693 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9694 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9695 = eq(_T_9694, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9696 = and(_T_9693, _T_9695) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9697 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9698 = eq(_T_9697, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9699 = and(_T_9696, _T_9698) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9700 = or(_T_9699, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9701 = bits(_T_9700, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_4 = mux(_T_9701, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9702 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9703 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9704 = eq(_T_9703, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9705 = and(_T_9702, _T_9704) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9706 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9707 = eq(_T_9706, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9708 = and(_T_9705, _T_9707) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9709 = or(_T_9708, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9710 = bits(_T_9709, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_5 = mux(_T_9710, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9711 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9712 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9713 = eq(_T_9712, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9714 = and(_T_9711, _T_9713) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9715 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9716 = eq(_T_9715, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9717 = and(_T_9714, _T_9716) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9718 = or(_T_9717, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9719 = bits(_T_9718, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_6 = mux(_T_9719, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9720 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9721 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9722 = eq(_T_9721, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9723 = and(_T_9720, _T_9722) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9724 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9725 = eq(_T_9724, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9726 = and(_T_9723, _T_9725) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9727 = or(_T_9726, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9728 = bits(_T_9727, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_7 = mux(_T_9728, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9729 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9730 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9731 = eq(_T_9730, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9732 = and(_T_9729, _T_9731) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9733 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9734 = eq(_T_9733, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9735 = and(_T_9732, _T_9734) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9736 = or(_T_9735, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9737 = bits(_T_9736, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_8 = mux(_T_9737, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9738 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9739 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9740 = eq(_T_9739, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9741 = and(_T_9738, _T_9740) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9742 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9743 = eq(_T_9742, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9744 = and(_T_9741, _T_9743) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9745 = or(_T_9744, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9746 = bits(_T_9745, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_9 = mux(_T_9746, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9747 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9748 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9749 = eq(_T_9748, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9750 = and(_T_9747, _T_9749) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9751 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9752 = eq(_T_9751, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9753 = and(_T_9750, _T_9752) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9754 = or(_T_9753, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9755 = bits(_T_9754, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_10 = mux(_T_9755, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9756 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9757 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9758 = eq(_T_9757, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9759 = and(_T_9756, _T_9758) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9760 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9761 = eq(_T_9760, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9762 = and(_T_9759, _T_9761) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9763 = or(_T_9762, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9764 = bits(_T_9763, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_11 = mux(_T_9764, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9765 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9766 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9767 = eq(_T_9766, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9768 = and(_T_9765, _T_9767) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9769 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9770 = eq(_T_9769, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9771 = and(_T_9768, _T_9770) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9772 = or(_T_9771, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9773 = bits(_T_9772, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_12 = mux(_T_9773, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9774 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9775 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9776 = eq(_T_9775, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9777 = and(_T_9774, _T_9776) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9778 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9779 = eq(_T_9778, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9780 = and(_T_9777, _T_9779) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9781 = or(_T_9780, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9782 = bits(_T_9781, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_13 = mux(_T_9782, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9783 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9784 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9785 = eq(_T_9784, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9786 = and(_T_9783, _T_9785) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9787 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9788 = eq(_T_9787, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9789 = and(_T_9786, _T_9788) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9790 = or(_T_9789, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9791 = bits(_T_9790, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_14 = mux(_T_9791, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9792 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9793 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9794 = eq(_T_9793, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9795 = and(_T_9792, _T_9794) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9796 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9797 = eq(_T_9796, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9798 = and(_T_9795, _T_9797) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9799 = or(_T_9798, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9800 = bits(_T_9799, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_8_15 = mux(_T_9800, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9801 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9802 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9803 = eq(_T_9802, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9804 = and(_T_9801, _T_9803) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9805 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9806 = eq(_T_9805, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9807 = and(_T_9804, _T_9806) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9808 = or(_T_9807, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9809 = bits(_T_9808, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_9_0 = mux(_T_9809, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9810 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9811 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9812 = eq(_T_9811, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9813 = and(_T_9810, _T_9812) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9814 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9815 = eq(_T_9814, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9816 = and(_T_9813, _T_9815) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9817 = or(_T_9816, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9818 = bits(_T_9817, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_9_1 = mux(_T_9818, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9819 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9820 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9821 = eq(_T_9820, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9822 = and(_T_9819, _T_9821) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9823 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9824 = eq(_T_9823, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9825 = and(_T_9822, _T_9824) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9826 = or(_T_9825, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9827 = bits(_T_9826, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_9_2 = mux(_T_9827, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9828 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9829 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9830 = eq(_T_9829, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9831 = and(_T_9828, _T_9830) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9832 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9833 = eq(_T_9832, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9834 = and(_T_9831, _T_9833) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9835 = or(_T_9834, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9836 = bits(_T_9835, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_9_3 = mux(_T_9836, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9837 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9838 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9839 = eq(_T_9838, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9840 = and(_T_9837, _T_9839) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9841 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9842 = eq(_T_9841, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9843 = and(_T_9840, _T_9842) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9844 = or(_T_9843, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9845 = bits(_T_9844, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_9_4 = mux(_T_9845, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9846 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9847 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9848 = eq(_T_9847, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9849 = and(_T_9846, _T_9848) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9850 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9851 = eq(_T_9850, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9852 = and(_T_9849, _T_9851) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9853 = or(_T_9852, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9854 = bits(_T_9853, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_9_5 = mux(_T_9854, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9855 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9856 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9857 = eq(_T_9856, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9858 = and(_T_9855, _T_9857) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9859 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9860 = eq(_T_9859, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9861 = and(_T_9858, _T_9860) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9862 = or(_T_9861, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9863 = bits(_T_9862, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_9_6 = mux(_T_9863, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9864 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9865 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9866 = eq(_T_9865, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9867 = and(_T_9864, _T_9866) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9868 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9869 = eq(_T_9868, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9870 = and(_T_9867, _T_9869) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9871 = or(_T_9870, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9872 = bits(_T_9871, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_9_7 = mux(_T_9872, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_9873 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9874 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_9875 = eq(_T_9874, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_9876 = and(_T_9873, _T_9875) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_9877 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_9878 = eq(_T_9877, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9879 = and(_T_9876, _T_9878) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9880 = or(_T_9879, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9881 = bits(_T_9880, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_9_8 = mux(_T_9881, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_9882 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_9883 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_9884 = eq(_T_9883, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_9885 = and(_T_9882, _T_9884) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_9886 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9887 = eq(_T_9886, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
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node _T_9888 = and(_T_9885, _T_9887) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_9889 = or(_T_9888, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_9890 = bits(_T_9889, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_9_9 = mux(_T_9890, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_9891 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_9892 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_9893 = eq(_T_9892, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_9894 = and(_T_9891, _T_9893) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_9895 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9896 = eq(_T_9895, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
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node _T_9897 = and(_T_9894, _T_9896) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_9898 = or(_T_9897, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_9899 = bits(_T_9898, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_9_10 = mux(_T_9899, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_9900 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_9901 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_9902 = eq(_T_9901, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_9903 = and(_T_9900, _T_9902) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_9904 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9905 = eq(_T_9904, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9906 = and(_T_9903, _T_9905) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9907 = or(_T_9906, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9908 = bits(_T_9907, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_9_11 = mux(_T_9908, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9909 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9910 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9911 = eq(_T_9910, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9912 = and(_T_9909, _T_9911) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9913 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9914 = eq(_T_9913, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_9915 = and(_T_9912, _T_9914) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9916 = or(_T_9915, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9917 = bits(_T_9916, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_9_12 = mux(_T_9917, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9918 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_9919 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9920 = eq(_T_9919, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9921 = and(_T_9918, _T_9920) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9922 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9923 = eq(_T_9922, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9924 = and(_T_9921, _T_9923) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9925 = or(_T_9924, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9926 = bits(_T_9925, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_9_13 = mux(_T_9926, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9927 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9928 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9929 = eq(_T_9928, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9930 = and(_T_9927, _T_9929) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9931 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9932 = eq(_T_9931, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_9933 = and(_T_9930, _T_9932) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9934 = or(_T_9933, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9935 = bits(_T_9934, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_9_14 = mux(_T_9935, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9936 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9937 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9938 = eq(_T_9937, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9939 = and(_T_9936, _T_9938) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9940 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9941 = eq(_T_9940, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_9942 = and(_T_9939, _T_9941) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9943 = or(_T_9942, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9944 = bits(_T_9943, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_9_15 = mux(_T_9944, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_9945 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9946 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9947 = eq(_T_9946, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9948 = and(_T_9945, _T_9947) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9949 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9950 = eq(_T_9949, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_9951 = and(_T_9948, _T_9950) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9952 = or(_T_9951, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9953 = bits(_T_9952, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_10_0 = mux(_T_9953, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_9954 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9955 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_9956 = eq(_T_9955, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9957 = and(_T_9954, _T_9956) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9958 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9959 = eq(_T_9958, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_9960 = and(_T_9957, _T_9959) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9961 = or(_T_9960, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_9962 = bits(_T_9961, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_10_1 = mux(_T_9962, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_9963 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9964 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_9965 = eq(_T_9964, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9966 = and(_T_9963, _T_9965) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9967 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9968 = eq(_T_9967, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9969 = and(_T_9966, _T_9968) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9970 = or(_T_9969, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9971 = bits(_T_9970, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_10_2 = mux(_T_9971, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_9972 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9973 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9974 = eq(_T_9973, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9975 = and(_T_9972, _T_9974) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9976 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9977 = eq(_T_9976, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9978 = and(_T_9975, _T_9977) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9979 = or(_T_9978, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9980 = bits(_T_9979, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_10_3 = mux(_T_9980, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_9981 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9982 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9983 = eq(_T_9982, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9984 = and(_T_9981, _T_9983) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9985 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9986 = eq(_T_9985, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_9987 = and(_T_9984, _T_9986) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_9988 = or(_T_9987, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_9989 = bits(_T_9988, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_10_4 = mux(_T_9989, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_9990 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_9991 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_9992 = eq(_T_9991, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_9993 = and(_T_9990, _T_9992) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_9994 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_9995 = eq(_T_9994, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_9996 = and(_T_9993, _T_9995) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_9997 = or(_T_9996, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_9998 = bits(_T_9997, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_10_5 = mux(_T_9998, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_9999 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10000 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10001 = eq(_T_10000, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10002 = and(_T_9999, _T_10001) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_10003 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10004 = eq(_T_10003, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10005 = and(_T_10002, _T_10004) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10006 = or(_T_10005, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10007 = bits(_T_10006, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_10_6 = mux(_T_10007, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10008 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10009 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10010 = eq(_T_10009, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10011 = and(_T_10008, _T_10010) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10012 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10013 = eq(_T_10012, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10014 = and(_T_10011, _T_10013) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10015 = or(_T_10014, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10016 = bits(_T_10015, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_10_7 = mux(_T_10016, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10017 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10018 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10019 = eq(_T_10018, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10020 = and(_T_10017, _T_10019) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10021 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10022 = eq(_T_10021, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10023 = and(_T_10020, _T_10022) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10024 = or(_T_10023, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10025 = bits(_T_10024, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_10_8 = mux(_T_10025, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10026 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10027 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10028 = eq(_T_10027, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10029 = and(_T_10026, _T_10028) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10030 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10031 = eq(_T_10030, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10032 = and(_T_10029, _T_10031) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10033 = or(_T_10032, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10034 = bits(_T_10033, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_10_9 = mux(_T_10034, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10035 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10036 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10037 = eq(_T_10036, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10038 = and(_T_10035, _T_10037) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10039 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10040 = eq(_T_10039, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10041 = and(_T_10038, _T_10040) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10042 = or(_T_10041, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10043 = bits(_T_10042, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_10_10 = mux(_T_10043, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10044 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10045 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10046 = eq(_T_10045, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10047 = and(_T_10044, _T_10046) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10048 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10049 = eq(_T_10048, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10050 = and(_T_10047, _T_10049) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10051 = or(_T_10050, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10052 = bits(_T_10051, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_10_11 = mux(_T_10052, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10053 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10054 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10055 = eq(_T_10054, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10056 = and(_T_10053, _T_10055) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10057 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10058 = eq(_T_10057, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10059 = and(_T_10056, _T_10058) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10060 = or(_T_10059, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10061 = bits(_T_10060, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_10_12 = mux(_T_10061, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10062 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10063 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10064 = eq(_T_10063, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10065 = and(_T_10062, _T_10064) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10066 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10067 = eq(_T_10066, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10068 = and(_T_10065, _T_10067) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10069 = or(_T_10068, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10070 = bits(_T_10069, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_10_13 = mux(_T_10070, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10071 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10072 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10073 = eq(_T_10072, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10074 = and(_T_10071, _T_10073) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10075 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10076 = eq(_T_10075, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10077 = and(_T_10074, _T_10076) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10078 = or(_T_10077, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10079 = bits(_T_10078, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_10_14 = mux(_T_10079, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10080 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10081 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10082 = eq(_T_10081, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10083 = and(_T_10080, _T_10082) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10084 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10085 = eq(_T_10084, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10086 = and(_T_10083, _T_10085) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10087 = or(_T_10086, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10088 = bits(_T_10087, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_10_15 = mux(_T_10088, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10089 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10090 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10091 = eq(_T_10090, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10092 = and(_T_10089, _T_10091) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10093 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10094 = eq(_T_10093, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10095 = and(_T_10092, _T_10094) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10096 = or(_T_10095, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10097 = bits(_T_10096, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_0 = mux(_T_10097, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10098 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10099 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10100 = eq(_T_10099, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10101 = and(_T_10098, _T_10100) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10102 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10103 = eq(_T_10102, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10104 = and(_T_10101, _T_10103) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10105 = or(_T_10104, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10106 = bits(_T_10105, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_1 = mux(_T_10106, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10107 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10108 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10109 = eq(_T_10108, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10110 = and(_T_10107, _T_10109) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10111 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10112 = eq(_T_10111, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10113 = and(_T_10110, _T_10112) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10114 = or(_T_10113, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10115 = bits(_T_10114, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_2 = mux(_T_10115, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10116 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10117 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10118 = eq(_T_10117, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10119 = and(_T_10116, _T_10118) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10120 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10121 = eq(_T_10120, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10122 = and(_T_10119, _T_10121) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10123 = or(_T_10122, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10124 = bits(_T_10123, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_3 = mux(_T_10124, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10125 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10126 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10127 = eq(_T_10126, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10128 = and(_T_10125, _T_10127) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10129 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10130 = eq(_T_10129, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10131 = and(_T_10128, _T_10130) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10132 = or(_T_10131, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10133 = bits(_T_10132, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_4 = mux(_T_10133, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10134 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10135 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10136 = eq(_T_10135, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10137 = and(_T_10134, _T_10136) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10138 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10139 = eq(_T_10138, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10140 = and(_T_10137, _T_10139) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10141 = or(_T_10140, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10142 = bits(_T_10141, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_5 = mux(_T_10142, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10143 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10144 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10145 = eq(_T_10144, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10146 = and(_T_10143, _T_10145) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10147 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10148 = eq(_T_10147, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10149 = and(_T_10146, _T_10148) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10150 = or(_T_10149, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10151 = bits(_T_10150, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_6 = mux(_T_10151, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10152 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10153 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10154 = eq(_T_10153, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10155 = and(_T_10152, _T_10154) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10156 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10157 = eq(_T_10156, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10158 = and(_T_10155, _T_10157) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10159 = or(_T_10158, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10160 = bits(_T_10159, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_7 = mux(_T_10160, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10161 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10162 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10163 = eq(_T_10162, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10164 = and(_T_10161, _T_10163) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10165 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10166 = eq(_T_10165, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10167 = and(_T_10164, _T_10166) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10168 = or(_T_10167, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10169 = bits(_T_10168, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_8 = mux(_T_10169, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10170 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10171 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10172 = eq(_T_10171, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10173 = and(_T_10170, _T_10172) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10174 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10175 = eq(_T_10174, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10176 = and(_T_10173, _T_10175) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10177 = or(_T_10176, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10178 = bits(_T_10177, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_11_9 = mux(_T_10178, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10179 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10180 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10181 = eq(_T_10180, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10182 = and(_T_10179, _T_10181) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10183 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10184 = eq(_T_10183, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10185 = and(_T_10182, _T_10184) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10186 = or(_T_10185, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10187 = bits(_T_10186, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_11_10 = mux(_T_10187, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10188 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10189 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10190 = eq(_T_10189, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10191 = and(_T_10188, _T_10190) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10192 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10193 = eq(_T_10192, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10194 = and(_T_10191, _T_10193) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10195 = or(_T_10194, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10196 = bits(_T_10195, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_11_11 = mux(_T_10196, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10197 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10198 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10199 = eq(_T_10198, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10200 = and(_T_10197, _T_10199) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_10201 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10202 = eq(_T_10201, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10203 = and(_T_10200, _T_10202) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10204 = or(_T_10203, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10205 = bits(_T_10204, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_11_12 = mux(_T_10205, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10206 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10207 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10208 = eq(_T_10207, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10209 = and(_T_10206, _T_10208) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10210 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10211 = eq(_T_10210, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10212 = and(_T_10209, _T_10211) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10213 = or(_T_10212, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10214 = bits(_T_10213, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_11_13 = mux(_T_10214, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10215 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10216 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10217 = eq(_T_10216, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10218 = and(_T_10215, _T_10217) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10219 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10220 = eq(_T_10219, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10221 = and(_T_10218, _T_10220) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10222 = or(_T_10221, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10223 = bits(_T_10222, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_11_14 = mux(_T_10223, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10224 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10225 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10226 = eq(_T_10225, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10227 = and(_T_10224, _T_10226) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_10228 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10229 = eq(_T_10228, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10230 = and(_T_10227, _T_10229) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10231 = or(_T_10230, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10232 = bits(_T_10231, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_11_15 = mux(_T_10232, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10233 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10234 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10235 = eq(_T_10234, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10236 = and(_T_10233, _T_10235) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10237 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10238 = eq(_T_10237, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10239 = and(_T_10236, _T_10238) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10240 = or(_T_10239, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10241 = bits(_T_10240, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_12_0 = mux(_T_10241, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10242 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10243 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10244 = eq(_T_10243, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10245 = and(_T_10242, _T_10244) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10246 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10247 = eq(_T_10246, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10248 = and(_T_10245, _T_10247) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10249 = or(_T_10248, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10250 = bits(_T_10249, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_12_1 = mux(_T_10250, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10251 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10252 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10253 = eq(_T_10252, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10254 = and(_T_10251, _T_10253) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_10255 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10256 = eq(_T_10255, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10257 = and(_T_10254, _T_10256) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10258 = or(_T_10257, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10259 = bits(_T_10258, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_12_2 = mux(_T_10259, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10260 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10261 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10262 = eq(_T_10261, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10263 = and(_T_10260, _T_10262) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10264 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10265 = eq(_T_10264, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10266 = and(_T_10263, _T_10265) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10267 = or(_T_10266, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10268 = bits(_T_10267, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_12_3 = mux(_T_10268, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10269 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10270 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10271 = eq(_T_10270, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10272 = and(_T_10269, _T_10271) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10273 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10274 = eq(_T_10273, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10275 = and(_T_10272, _T_10274) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10276 = or(_T_10275, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10277 = bits(_T_10276, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_12_4 = mux(_T_10277, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10278 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10279 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10280 = eq(_T_10279, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10281 = and(_T_10278, _T_10280) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_10282 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10283 = eq(_T_10282, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10284 = and(_T_10281, _T_10283) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10285 = or(_T_10284, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10286 = bits(_T_10285, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_12_5 = mux(_T_10286, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10287 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10288 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10289 = eq(_T_10288, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10290 = and(_T_10287, _T_10289) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_10291 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10292 = eq(_T_10291, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10293 = and(_T_10290, _T_10292) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10294 = or(_T_10293, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10295 = bits(_T_10294, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_12_6 = mux(_T_10295, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10296 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10297 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10298 = eq(_T_10297, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10299 = and(_T_10296, _T_10298) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10300 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10301 = eq(_T_10300, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10302 = and(_T_10299, _T_10301) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10303 = or(_T_10302, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10304 = bits(_T_10303, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_12_7 = mux(_T_10304, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10305 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10306 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10307 = eq(_T_10306, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10308 = and(_T_10305, _T_10307) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10309 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10310 = eq(_T_10309, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10311 = and(_T_10308, _T_10310) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10312 = or(_T_10311, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10313 = bits(_T_10312, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_12_8 = mux(_T_10313, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10314 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10315 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10316 = eq(_T_10315, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10317 = and(_T_10314, _T_10316) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10318 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10319 = eq(_T_10318, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10320 = and(_T_10317, _T_10319) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10321 = or(_T_10320, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10322 = bits(_T_10321, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_12_9 = mux(_T_10322, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10323 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10324 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10325 = eq(_T_10324, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10326 = and(_T_10323, _T_10325) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10327 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10328 = eq(_T_10327, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10329 = and(_T_10326, _T_10328) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10330 = or(_T_10329, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10331 = bits(_T_10330, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_12_10 = mux(_T_10331, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10332 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10333 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10334 = eq(_T_10333, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10335 = and(_T_10332, _T_10334) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10336 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10337 = eq(_T_10336, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10338 = and(_T_10335, _T_10337) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10339 = or(_T_10338, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10340 = bits(_T_10339, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_12_11 = mux(_T_10340, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10341 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10342 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10343 = eq(_T_10342, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10344 = and(_T_10341, _T_10343) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10345 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10346 = eq(_T_10345, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10347 = and(_T_10344, _T_10346) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10348 = or(_T_10347, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10349 = bits(_T_10348, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_12_12 = mux(_T_10349, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10350 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10351 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10352 = eq(_T_10351, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10353 = and(_T_10350, _T_10352) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10354 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10355 = eq(_T_10354, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10356 = and(_T_10353, _T_10355) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10357 = or(_T_10356, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10358 = bits(_T_10357, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_12_13 = mux(_T_10358, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10359 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10360 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10361 = eq(_T_10360, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10362 = and(_T_10359, _T_10361) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10363 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10364 = eq(_T_10363, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10365 = and(_T_10362, _T_10364) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10366 = or(_T_10365, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10367 = bits(_T_10366, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_12_14 = mux(_T_10367, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10368 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10369 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10370 = eq(_T_10369, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10371 = and(_T_10368, _T_10370) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10372 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10373 = eq(_T_10372, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10374 = and(_T_10371, _T_10373) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10375 = or(_T_10374, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10376 = bits(_T_10375, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_12_15 = mux(_T_10376, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10377 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10378 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10379 = eq(_T_10378, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10380 = and(_T_10377, _T_10379) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10381 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10382 = eq(_T_10381, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10383 = and(_T_10380, _T_10382) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10384 = or(_T_10383, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10385 = bits(_T_10384, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_0 = mux(_T_10385, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10386 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10387 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10388 = eq(_T_10387, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10389 = and(_T_10386, _T_10388) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10390 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10391 = eq(_T_10390, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10392 = and(_T_10389, _T_10391) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10393 = or(_T_10392, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10394 = bits(_T_10393, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_1 = mux(_T_10394, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10395 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10396 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10397 = eq(_T_10396, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10398 = and(_T_10395, _T_10397) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10399 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10400 = eq(_T_10399, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10401 = and(_T_10398, _T_10400) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10402 = or(_T_10401, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10403 = bits(_T_10402, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_2 = mux(_T_10403, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10404 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10405 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10406 = eq(_T_10405, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10407 = and(_T_10404, _T_10406) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10408 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10409 = eq(_T_10408, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10410 = and(_T_10407, _T_10409) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10411 = or(_T_10410, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10412 = bits(_T_10411, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_3 = mux(_T_10412, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10413 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10414 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10415 = eq(_T_10414, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10416 = and(_T_10413, _T_10415) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10417 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10418 = eq(_T_10417, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10419 = and(_T_10416, _T_10418) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10420 = or(_T_10419, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10421 = bits(_T_10420, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_4 = mux(_T_10421, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10422 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10423 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10424 = eq(_T_10423, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10425 = and(_T_10422, _T_10424) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10426 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10427 = eq(_T_10426, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10428 = and(_T_10425, _T_10427) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10429 = or(_T_10428, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10430 = bits(_T_10429, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_5 = mux(_T_10430, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10431 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10432 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10433 = eq(_T_10432, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10434 = and(_T_10431, _T_10433) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10435 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10436 = eq(_T_10435, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10437 = and(_T_10434, _T_10436) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10438 = or(_T_10437, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10439 = bits(_T_10438, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_6 = mux(_T_10439, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10440 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10441 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10442 = eq(_T_10441, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10443 = and(_T_10440, _T_10442) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10444 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10445 = eq(_T_10444, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10446 = and(_T_10443, _T_10445) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10447 = or(_T_10446, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10448 = bits(_T_10447, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_7 = mux(_T_10448, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10449 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10450 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10451 = eq(_T_10450, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10452 = and(_T_10449, _T_10451) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10453 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10454 = eq(_T_10453, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10455 = and(_T_10452, _T_10454) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10456 = or(_T_10455, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10457 = bits(_T_10456, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_8 = mux(_T_10457, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10458 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10459 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10460 = eq(_T_10459, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10461 = and(_T_10458, _T_10460) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10462 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10463 = eq(_T_10462, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10464 = and(_T_10461, _T_10463) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10465 = or(_T_10464, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10466 = bits(_T_10465, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_9 = mux(_T_10466, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10467 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10468 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10469 = eq(_T_10468, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10470 = and(_T_10467, _T_10469) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10471 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10472 = eq(_T_10471, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10473 = and(_T_10470, _T_10472) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10474 = or(_T_10473, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10475 = bits(_T_10474, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_13_10 = mux(_T_10475, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10476 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10477 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10478 = eq(_T_10477, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10479 = and(_T_10476, _T_10478) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10480 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10481 = eq(_T_10480, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10482 = and(_T_10479, _T_10481) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10483 = or(_T_10482, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10484 = bits(_T_10483, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_13_11 = mux(_T_10484, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10485 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10486 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10487 = eq(_T_10486, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10488 = and(_T_10485, _T_10487) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10489 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10490 = eq(_T_10489, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10491 = and(_T_10488, _T_10490) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10492 = or(_T_10491, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10493 = bits(_T_10492, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_13_12 = mux(_T_10493, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10494 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10495 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10496 = eq(_T_10495, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10497 = and(_T_10494, _T_10496) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10498 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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node _T_10499 = eq(_T_10498, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10500 = and(_T_10497, _T_10499) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10501 = or(_T_10500, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10502 = bits(_T_10501, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_13_13 = mux(_T_10502, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10503 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10504 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10505 = eq(_T_10504, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10506 = and(_T_10503, _T_10505) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_10507 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10508 = eq(_T_10507, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10509 = and(_T_10506, _T_10508) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10510 = or(_T_10509, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10511 = bits(_T_10510, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_13_14 = mux(_T_10511, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10512 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10513 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10514 = eq(_T_10513, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10515 = and(_T_10512, _T_10514) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10516 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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node _T_10517 = eq(_T_10516, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:171]
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node _T_10518 = and(_T_10515, _T_10517) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10519 = or(_T_10518, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10520 = bits(_T_10519, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_13_15 = mux(_T_10520, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10521 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10522 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10523 = eq(_T_10522, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10524 = and(_T_10521, _T_10523) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10525 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10526 = eq(_T_10525, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10527 = and(_T_10524, _T_10526) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10528 = or(_T_10527, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10529 = bits(_T_10528, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_14_0 = mux(_T_10529, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10530 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10531 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10532 = eq(_T_10531, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10533 = and(_T_10530, _T_10532) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_10534 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10535 = eq(_T_10534, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10536 = and(_T_10533, _T_10535) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10537 = or(_T_10536, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10538 = bits(_T_10537, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_14_1 = mux(_T_10538, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10539 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10540 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10541 = eq(_T_10540, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10542 = and(_T_10539, _T_10541) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10543 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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node _T_10544 = eq(_T_10543, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
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node _T_10545 = and(_T_10542, _T_10544) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10546 = or(_T_10545, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10547 = bits(_T_10546, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_14_2 = mux(_T_10547, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10548 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10549 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10550 = eq(_T_10549, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10551 = and(_T_10548, _T_10550) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10552 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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node _T_10553 = eq(_T_10552, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10554 = and(_T_10551, _T_10553) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10555 = or(_T_10554, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10556 = bits(_T_10555, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_14_3 = mux(_T_10556, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10557 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10558 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10559 = eq(_T_10558, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10560 = and(_T_10557, _T_10559) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10561 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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node _T_10562 = eq(_T_10561, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10563 = and(_T_10560, _T_10562) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10564 = or(_T_10563, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10565 = bits(_T_10564, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_14_4 = mux(_T_10565, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10566 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10567 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10568 = eq(_T_10567, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10569 = and(_T_10566, _T_10568) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10570 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10571 = eq(_T_10570, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10572 = and(_T_10569, _T_10571) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10573 = or(_T_10572, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10574 = bits(_T_10573, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_14_5 = mux(_T_10574, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10575 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10576 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10577 = eq(_T_10576, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10578 = and(_T_10575, _T_10577) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10579 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10580 = eq(_T_10579, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10581 = and(_T_10578, _T_10580) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10582 = or(_T_10581, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10583 = bits(_T_10582, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_14_6 = mux(_T_10583, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10584 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10585 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10586 = eq(_T_10585, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10587 = and(_T_10584, _T_10586) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10588 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10589 = eq(_T_10588, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10590 = and(_T_10587, _T_10589) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10591 = or(_T_10590, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10592 = bits(_T_10591, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_14_7 = mux(_T_10592, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10593 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10594 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10595 = eq(_T_10594, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10596 = and(_T_10593, _T_10595) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10597 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10598 = eq(_T_10597, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10599 = and(_T_10596, _T_10598) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10600 = or(_T_10599, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10601 = bits(_T_10600, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_14_8 = mux(_T_10601, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10602 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10603 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10604 = eq(_T_10603, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10605 = and(_T_10602, _T_10604) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10606 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10607 = eq(_T_10606, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10608 = and(_T_10605, _T_10607) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10609 = or(_T_10608, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10610 = bits(_T_10609, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_14_9 = mux(_T_10610, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10611 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10612 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10613 = eq(_T_10612, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10614 = and(_T_10611, _T_10613) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10615 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10616 = eq(_T_10615, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10617 = and(_T_10614, _T_10616) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10618 = or(_T_10617, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10619 = bits(_T_10618, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_14_10 = mux(_T_10619, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10620 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10621 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10622 = eq(_T_10621, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10623 = and(_T_10620, _T_10622) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10624 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10625 = eq(_T_10624, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10626 = and(_T_10623, _T_10625) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10627 = or(_T_10626, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10628 = bits(_T_10627, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_14_11 = mux(_T_10628, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10629 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10630 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10631 = eq(_T_10630, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10632 = and(_T_10629, _T_10631) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10633 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10634 = eq(_T_10633, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10635 = and(_T_10632, _T_10634) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10636 = or(_T_10635, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10637 = bits(_T_10636, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_14_12 = mux(_T_10637, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10638 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10639 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10640 = eq(_T_10639, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10641 = and(_T_10638, _T_10640) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10642 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10643 = eq(_T_10642, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10644 = and(_T_10641, _T_10643) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10645 = or(_T_10644, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10646 = bits(_T_10645, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_14_13 = mux(_T_10646, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10647 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10648 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10649 = eq(_T_10648, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10650 = and(_T_10647, _T_10649) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10651 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10652 = eq(_T_10651, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10653 = and(_T_10650, _T_10652) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10654 = or(_T_10653, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10655 = bits(_T_10654, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_14_14 = mux(_T_10655, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10656 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10657 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10658 = eq(_T_10657, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10659 = and(_T_10656, _T_10658) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10660 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10661 = eq(_T_10660, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10662 = and(_T_10659, _T_10661) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10663 = or(_T_10662, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10664 = bits(_T_10663, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_14_15 = mux(_T_10664, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10665 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10666 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10667 = eq(_T_10666, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10668 = and(_T_10665, _T_10667) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10669 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10670 = eq(_T_10669, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10671 = and(_T_10668, _T_10670) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10672 = or(_T_10671, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10673 = bits(_T_10672, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_0 = mux(_T_10673, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10674 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10675 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10676 = eq(_T_10675, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10677 = and(_T_10674, _T_10676) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10678 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10679 = eq(_T_10678, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10680 = and(_T_10677, _T_10679) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10681 = or(_T_10680, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10682 = bits(_T_10681, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_1 = mux(_T_10682, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10683 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10684 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10685 = eq(_T_10684, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10686 = and(_T_10683, _T_10685) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10687 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10688 = eq(_T_10687, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10689 = and(_T_10686, _T_10688) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10690 = or(_T_10689, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10691 = bits(_T_10690, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_2 = mux(_T_10691, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10692 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10693 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10694 = eq(_T_10693, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10695 = and(_T_10692, _T_10694) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10696 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10697 = eq(_T_10696, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10698 = and(_T_10695, _T_10697) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10699 = or(_T_10698, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10700 = bits(_T_10699, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_3 = mux(_T_10700, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10701 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10702 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10703 = eq(_T_10702, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10704 = and(_T_10701, _T_10703) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10705 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10706 = eq(_T_10705, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10707 = and(_T_10704, _T_10706) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10708 = or(_T_10707, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10709 = bits(_T_10708, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_4 = mux(_T_10709, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10710 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10711 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10712 = eq(_T_10711, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10713 = and(_T_10710, _T_10712) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10714 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10715 = eq(_T_10714, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10716 = and(_T_10713, _T_10715) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10717 = or(_T_10716, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10718 = bits(_T_10717, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_5 = mux(_T_10718, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10719 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10720 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10721 = eq(_T_10720, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10722 = and(_T_10719, _T_10721) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10723 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10724 = eq(_T_10723, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10725 = and(_T_10722, _T_10724) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10726 = or(_T_10725, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10727 = bits(_T_10726, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_6 = mux(_T_10727, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10728 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10729 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10730 = eq(_T_10729, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10731 = and(_T_10728, _T_10730) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10732 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10733 = eq(_T_10732, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10734 = and(_T_10731, _T_10733) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10735 = or(_T_10734, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10736 = bits(_T_10735, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_7 = mux(_T_10736, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10737 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10738 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10739 = eq(_T_10738, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10740 = and(_T_10737, _T_10739) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10741 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10742 = eq(_T_10741, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10743 = and(_T_10740, _T_10742) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10744 = or(_T_10743, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10745 = bits(_T_10744, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_8 = mux(_T_10745, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10746 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10747 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10748 = eq(_T_10747, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10749 = and(_T_10746, _T_10748) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10750 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10751 = eq(_T_10750, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10752 = and(_T_10749, _T_10751) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10753 = or(_T_10752, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10754 = bits(_T_10753, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_9 = mux(_T_10754, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10755 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10756 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10757 = eq(_T_10756, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10758 = and(_T_10755, _T_10757) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10759 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10760 = eq(_T_10759, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10761 = and(_T_10758, _T_10760) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10762 = or(_T_10761, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10763 = bits(_T_10762, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_10 = mux(_T_10763, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
|
|
node _T_10764 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
|
|
node _T_10765 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
|
|
node _T_10766 = eq(_T_10765, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 370:74]
|
|
node _T_10767 = and(_T_10764, _T_10766) @[el2_ifu_bp_ctl.scala 370:23]
|
|
node _T_10768 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
|
|
node _T_10769 = eq(_T_10768, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
|
|
node _T_10770 = and(_T_10767, _T_10769) @[el2_ifu_bp_ctl.scala 370:86]
|
|
node _T_10771 = or(_T_10770, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
|
|
node _T_10772 = bits(_T_10771, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
|
|
node bht_bank_wr_data_1_15_11 = mux(_T_10772, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10773 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10774 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10775 = eq(_T_10774, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10776 = and(_T_10773, _T_10775) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10777 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10778 = eq(_T_10777, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10779 = and(_T_10776, _T_10778) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10780 = or(_T_10779, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10781 = bits(_T_10780, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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|
node bht_bank_wr_data_1_15_12 = mux(_T_10781, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10782 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10783 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10784 = eq(_T_10783, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10785 = and(_T_10782, _T_10784) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10786 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10787 = eq(_T_10786, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
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node _T_10788 = and(_T_10785, _T_10787) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10789 = or(_T_10788, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10790 = bits(_T_10789, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_15_13 = mux(_T_10790, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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node _T_10791 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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node _T_10792 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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node _T_10793 = eq(_T_10792, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 370:74]
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node _T_10794 = and(_T_10791, _T_10793) @[el2_ifu_bp_ctl.scala 370:23]
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node _T_10795 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10796 = eq(_T_10795, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10797 = and(_T_10794, _T_10796) @[el2_ifu_bp_ctl.scala 370:86]
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node _T_10798 = or(_T_10797, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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node _T_10799 = bits(_T_10798, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_15_14 = mux(_T_10799, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10800 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 370:20]
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|
node _T_10801 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 370:37]
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|
node _T_10802 = eq(_T_10801, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:74]
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|
node _T_10803 = and(_T_10800, _T_10802) @[el2_ifu_bp_ctl.scala 370:23]
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|
node _T_10804 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 370:100]
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|
node _T_10805 = eq(_T_10804, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 370:171]
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|
node _T_10806 = and(_T_10803, _T_10805) @[el2_ifu_bp_ctl.scala 370:86]
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|
node _T_10807 = or(_T_10806, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 370:183]
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|
node _T_10808 = bits(_T_10807, 0, 0) @[el2_ifu_bp_ctl.scala 370:205]
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node bht_bank_wr_data_1_15_15 = mux(_T_10808, io.dec_tlu_br0_r_pkt.hist, io.exu_mp_pkt.hist) @[el2_ifu_bp_ctl.scala 370:8]
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|
node _T_10809 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
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|
node _T_10810 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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|
node _T_10811 = eq(_T_10810, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
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|
node _T_10812 = and(_T_10809, _T_10811) @[el2_ifu_bp_ctl.scala 373:17]
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node _T_10813 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
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|
node _T_10814 = eq(_T_10813, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
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|
node _T_10815 = and(_T_10812, _T_10814) @[el2_ifu_bp_ctl.scala 373:82]
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|
node _T_10816 = or(_T_10815, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
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node _T_10817 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
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|
node _T_10818 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
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|
node _T_10819 = eq(_T_10818, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
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|
node _T_10820 = and(_T_10817, _T_10819) @[el2_ifu_bp_ctl.scala 373:220]
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|
node _T_10821 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
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|
node _T_10822 = eq(_T_10821, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
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|
node _T_10823 = and(_T_10820, _T_10822) @[el2_ifu_bp_ctl.scala 374:74]
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node _T_10824 = or(_T_10816, _T_10823) @[el2_ifu_bp_ctl.scala 373:204]
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|
node bht_bank_sel_0_0_0 = or(_T_10824, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
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node _T_10825 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
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|
node _T_10826 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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|
node _T_10827 = eq(_T_10826, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
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|
node _T_10828 = and(_T_10825, _T_10827) @[el2_ifu_bp_ctl.scala 373:17]
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|
node _T_10829 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
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|
node _T_10830 = eq(_T_10829, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
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|
node _T_10831 = and(_T_10828, _T_10830) @[el2_ifu_bp_ctl.scala 373:82]
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|
node _T_10832 = or(_T_10831, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
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|
node _T_10833 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
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|
node _T_10834 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
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|
node _T_10835 = eq(_T_10834, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
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|
node _T_10836 = and(_T_10833, _T_10835) @[el2_ifu_bp_ctl.scala 373:220]
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|
node _T_10837 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
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|
node _T_10838 = eq(_T_10837, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
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|
node _T_10839 = and(_T_10836, _T_10838) @[el2_ifu_bp_ctl.scala 374:74]
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node _T_10840 = or(_T_10832, _T_10839) @[el2_ifu_bp_ctl.scala 373:204]
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|
node bht_bank_sel_0_0_1 = or(_T_10840, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
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node _T_10841 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
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|
node _T_10842 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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|
node _T_10843 = eq(_T_10842, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
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node _T_10844 = and(_T_10841, _T_10843) @[el2_ifu_bp_ctl.scala 373:17]
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node _T_10845 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
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node _T_10846 = eq(_T_10845, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
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|
node _T_10847 = and(_T_10844, _T_10846) @[el2_ifu_bp_ctl.scala 373:82]
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node _T_10848 = or(_T_10847, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
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node _T_10849 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
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|
node _T_10850 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
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|
node _T_10851 = eq(_T_10850, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
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|
node _T_10852 = and(_T_10849, _T_10851) @[el2_ifu_bp_ctl.scala 373:220]
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|
node _T_10853 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
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|
node _T_10854 = eq(_T_10853, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
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|
node _T_10855 = and(_T_10852, _T_10854) @[el2_ifu_bp_ctl.scala 374:74]
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|
node _T_10856 = or(_T_10848, _T_10855) @[el2_ifu_bp_ctl.scala 373:204]
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|
node bht_bank_sel_0_0_2 = or(_T_10856, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
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node _T_10857 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
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|
node _T_10858 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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|
node _T_10859 = eq(_T_10858, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
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node _T_10860 = and(_T_10857, _T_10859) @[el2_ifu_bp_ctl.scala 373:17]
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|
node _T_10861 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
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|
node _T_10862 = eq(_T_10861, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
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|
node _T_10863 = and(_T_10860, _T_10862) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_10864 = or(_T_10863, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_10865 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_10866 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_10867 = eq(_T_10866, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
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|
node _T_10868 = and(_T_10865, _T_10867) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_10869 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_10870 = eq(_T_10869, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_10871 = and(_T_10868, _T_10870) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_10872 = or(_T_10864, _T_10871) @[el2_ifu_bp_ctl.scala 373:204]
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|
node bht_bank_sel_0_0_3 = or(_T_10872, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
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node _T_10873 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_10874 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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|
node _T_10875 = eq(_T_10874, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
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|
node _T_10876 = and(_T_10873, _T_10875) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_10877 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_10878 = eq(_T_10877, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_10879 = and(_T_10876, _T_10878) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_10880 = or(_T_10879, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
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|
node _T_10881 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_10882 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
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|
node _T_10883 = eq(_T_10882, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
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|
node _T_10884 = and(_T_10881, _T_10883) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_10885 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_10886 = eq(_T_10885, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_10887 = and(_T_10884, _T_10886) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_10888 = or(_T_10880, _T_10887) @[el2_ifu_bp_ctl.scala 373:204]
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|
node bht_bank_sel_0_0_4 = or(_T_10888, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_10889 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_10890 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_10891 = eq(_T_10890, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
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|
node _T_10892 = and(_T_10889, _T_10891) @[el2_ifu_bp_ctl.scala 373:17]
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|
node _T_10893 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_10894 = eq(_T_10893, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_10895 = and(_T_10892, _T_10894) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_10896 = or(_T_10895, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_10897 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_10898 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_10899 = eq(_T_10898, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_10900 = and(_T_10897, _T_10899) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_10901 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_10902 = eq(_T_10901, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_10903 = and(_T_10900, _T_10902) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_10904 = or(_T_10896, _T_10903) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_5 = or(_T_10904, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_10905 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_10906 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_10907 = eq(_T_10906, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_10908 = and(_T_10905, _T_10907) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_10909 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_10910 = eq(_T_10909, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_10911 = and(_T_10908, _T_10910) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_10912 = or(_T_10911, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_10913 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_10914 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_10915 = eq(_T_10914, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_10916 = and(_T_10913, _T_10915) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_10917 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_10918 = eq(_T_10917, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_10919 = and(_T_10916, _T_10918) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_10920 = or(_T_10912, _T_10919) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_6 = or(_T_10920, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_10921 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_10922 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_10923 = eq(_T_10922, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_10924 = and(_T_10921, _T_10923) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_10925 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_10926 = eq(_T_10925, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_10927 = and(_T_10924, _T_10926) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_10928 = or(_T_10927, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_10929 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_10930 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_10931 = eq(_T_10930, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_10932 = and(_T_10929, _T_10931) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_10933 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_10934 = eq(_T_10933, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_10935 = and(_T_10932, _T_10934) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_10936 = or(_T_10928, _T_10935) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_7 = or(_T_10936, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_10937 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_10938 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_10939 = eq(_T_10938, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_10940 = and(_T_10937, _T_10939) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_10941 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_10942 = eq(_T_10941, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_10943 = and(_T_10940, _T_10942) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_10944 = or(_T_10943, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_10945 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_10946 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_10947 = eq(_T_10946, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_10948 = and(_T_10945, _T_10947) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_10949 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_10950 = eq(_T_10949, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_10951 = and(_T_10948, _T_10950) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_10952 = or(_T_10944, _T_10951) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_8 = or(_T_10952, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_10953 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_10954 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_10955 = eq(_T_10954, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_10956 = and(_T_10953, _T_10955) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_10957 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_10958 = eq(_T_10957, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_10959 = and(_T_10956, _T_10958) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_10960 = or(_T_10959, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_10961 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_10962 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_10963 = eq(_T_10962, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_10964 = and(_T_10961, _T_10963) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_10965 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_10966 = eq(_T_10965, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_10967 = and(_T_10964, _T_10966) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_10968 = or(_T_10960, _T_10967) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_9 = or(_T_10968, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_10969 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_10970 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_10971 = eq(_T_10970, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_10972 = and(_T_10969, _T_10971) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_10973 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_10974 = eq(_T_10973, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_10975 = and(_T_10972, _T_10974) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_10976 = or(_T_10975, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_10977 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_10978 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_10979 = eq(_T_10978, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_10980 = and(_T_10977, _T_10979) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_10981 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_10982 = eq(_T_10981, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_10983 = and(_T_10980, _T_10982) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_10984 = or(_T_10976, _T_10983) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_10 = or(_T_10984, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_10985 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_10986 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_10987 = eq(_T_10986, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_10988 = and(_T_10985, _T_10987) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_10989 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_10990 = eq(_T_10989, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_10991 = and(_T_10988, _T_10990) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_10992 = or(_T_10991, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_10993 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_10994 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_10995 = eq(_T_10994, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_10996 = and(_T_10993, _T_10995) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_10997 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_10998 = eq(_T_10997, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_10999 = and(_T_10996, _T_10998) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11000 = or(_T_10992, _T_10999) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_11 = or(_T_11000, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11001 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11002 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11003 = eq(_T_11002, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11004 = and(_T_11001, _T_11003) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11005 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11006 = eq(_T_11005, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11007 = and(_T_11004, _T_11006) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11008 = or(_T_11007, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11009 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11010 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11011 = eq(_T_11010, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11012 = and(_T_11009, _T_11011) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11013 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11014 = eq(_T_11013, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11015 = and(_T_11012, _T_11014) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11016 = or(_T_11008, _T_11015) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_12 = or(_T_11016, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11017 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11018 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11019 = eq(_T_11018, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11020 = and(_T_11017, _T_11019) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11021 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11022 = eq(_T_11021, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11023 = and(_T_11020, _T_11022) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11024 = or(_T_11023, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11025 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11026 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11027 = eq(_T_11026, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11028 = and(_T_11025, _T_11027) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11029 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11030 = eq(_T_11029, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11031 = and(_T_11028, _T_11030) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11032 = or(_T_11024, _T_11031) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_13 = or(_T_11032, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11033 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11034 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11035 = eq(_T_11034, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11036 = and(_T_11033, _T_11035) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11037 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11038 = eq(_T_11037, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11039 = and(_T_11036, _T_11038) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11040 = or(_T_11039, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11041 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11042 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11043 = eq(_T_11042, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11044 = and(_T_11041, _T_11043) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11045 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11046 = eq(_T_11045, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11047 = and(_T_11044, _T_11046) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11048 = or(_T_11040, _T_11047) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_14 = or(_T_11048, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11049 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11050 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11051 = eq(_T_11050, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11052 = and(_T_11049, _T_11051) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11053 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11054 = eq(_T_11053, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11055 = and(_T_11052, _T_11054) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11056 = or(_T_11055, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11057 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11058 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11059 = eq(_T_11058, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11060 = and(_T_11057, _T_11059) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11061 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11062 = eq(_T_11061, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11063 = and(_T_11060, _T_11062) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11064 = or(_T_11056, _T_11063) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_0_15 = or(_T_11064, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11065 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11066 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11067 = eq(_T_11066, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11068 = and(_T_11065, _T_11067) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11069 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11070 = eq(_T_11069, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11071 = and(_T_11068, _T_11070) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11072 = or(_T_11071, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11073 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11074 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11075 = eq(_T_11074, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11076 = and(_T_11073, _T_11075) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11077 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11078 = eq(_T_11077, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11079 = and(_T_11076, _T_11078) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11080 = or(_T_11072, _T_11079) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_0 = or(_T_11080, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11081 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11082 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11083 = eq(_T_11082, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11084 = and(_T_11081, _T_11083) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11085 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11086 = eq(_T_11085, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11087 = and(_T_11084, _T_11086) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11088 = or(_T_11087, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11089 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11090 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11091 = eq(_T_11090, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11092 = and(_T_11089, _T_11091) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11093 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11094 = eq(_T_11093, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11095 = and(_T_11092, _T_11094) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11096 = or(_T_11088, _T_11095) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_1 = or(_T_11096, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11097 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11098 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11099 = eq(_T_11098, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11100 = and(_T_11097, _T_11099) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11101 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11102 = eq(_T_11101, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11103 = and(_T_11100, _T_11102) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11104 = or(_T_11103, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11105 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11106 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11107 = eq(_T_11106, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11108 = and(_T_11105, _T_11107) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11109 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11110 = eq(_T_11109, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11111 = and(_T_11108, _T_11110) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11112 = or(_T_11104, _T_11111) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_2 = or(_T_11112, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11113 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11114 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11115 = eq(_T_11114, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11116 = and(_T_11113, _T_11115) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11117 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11118 = eq(_T_11117, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11119 = and(_T_11116, _T_11118) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11120 = or(_T_11119, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11121 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11122 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11123 = eq(_T_11122, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11124 = and(_T_11121, _T_11123) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11125 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11126 = eq(_T_11125, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11127 = and(_T_11124, _T_11126) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11128 = or(_T_11120, _T_11127) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_3 = or(_T_11128, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11129 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11130 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11131 = eq(_T_11130, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11132 = and(_T_11129, _T_11131) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11133 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11134 = eq(_T_11133, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11135 = and(_T_11132, _T_11134) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11136 = or(_T_11135, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11137 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11138 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11139 = eq(_T_11138, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11140 = and(_T_11137, _T_11139) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11141 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11142 = eq(_T_11141, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11143 = and(_T_11140, _T_11142) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11144 = or(_T_11136, _T_11143) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_4 = or(_T_11144, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11145 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11146 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11147 = eq(_T_11146, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11148 = and(_T_11145, _T_11147) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11149 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11150 = eq(_T_11149, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11151 = and(_T_11148, _T_11150) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11152 = or(_T_11151, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11153 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11154 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11155 = eq(_T_11154, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11156 = and(_T_11153, _T_11155) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11157 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11158 = eq(_T_11157, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11159 = and(_T_11156, _T_11158) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11160 = or(_T_11152, _T_11159) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_5 = or(_T_11160, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11161 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11162 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11163 = eq(_T_11162, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11164 = and(_T_11161, _T_11163) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11165 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11166 = eq(_T_11165, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11167 = and(_T_11164, _T_11166) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11168 = or(_T_11167, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11169 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11170 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11171 = eq(_T_11170, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11172 = and(_T_11169, _T_11171) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11173 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11174 = eq(_T_11173, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11175 = and(_T_11172, _T_11174) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11176 = or(_T_11168, _T_11175) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_6 = or(_T_11176, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11177 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11178 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11179 = eq(_T_11178, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11180 = and(_T_11177, _T_11179) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11181 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11182 = eq(_T_11181, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11183 = and(_T_11180, _T_11182) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11184 = or(_T_11183, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11185 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11186 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11187 = eq(_T_11186, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11188 = and(_T_11185, _T_11187) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11189 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11190 = eq(_T_11189, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11191 = and(_T_11188, _T_11190) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11192 = or(_T_11184, _T_11191) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_7 = or(_T_11192, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11193 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11194 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11195 = eq(_T_11194, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11196 = and(_T_11193, _T_11195) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11197 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11198 = eq(_T_11197, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11199 = and(_T_11196, _T_11198) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11200 = or(_T_11199, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11201 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11202 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11203 = eq(_T_11202, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11204 = and(_T_11201, _T_11203) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11205 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11206 = eq(_T_11205, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11207 = and(_T_11204, _T_11206) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11208 = or(_T_11200, _T_11207) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_8 = or(_T_11208, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11209 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11210 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11211 = eq(_T_11210, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11212 = and(_T_11209, _T_11211) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11213 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11214 = eq(_T_11213, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11215 = and(_T_11212, _T_11214) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11216 = or(_T_11215, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11217 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11218 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11219 = eq(_T_11218, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11220 = and(_T_11217, _T_11219) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11221 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11222 = eq(_T_11221, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11223 = and(_T_11220, _T_11222) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11224 = or(_T_11216, _T_11223) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_9 = or(_T_11224, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11225 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11226 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11227 = eq(_T_11226, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11228 = and(_T_11225, _T_11227) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11229 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11230 = eq(_T_11229, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11231 = and(_T_11228, _T_11230) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11232 = or(_T_11231, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11233 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11234 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11235 = eq(_T_11234, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11236 = and(_T_11233, _T_11235) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11237 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11238 = eq(_T_11237, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11239 = and(_T_11236, _T_11238) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11240 = or(_T_11232, _T_11239) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_10 = or(_T_11240, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11241 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11242 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11243 = eq(_T_11242, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11244 = and(_T_11241, _T_11243) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11245 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11246 = eq(_T_11245, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11247 = and(_T_11244, _T_11246) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11248 = or(_T_11247, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11249 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11250 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11251 = eq(_T_11250, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11252 = and(_T_11249, _T_11251) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11253 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11254 = eq(_T_11253, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11255 = and(_T_11252, _T_11254) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11256 = or(_T_11248, _T_11255) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_11 = or(_T_11256, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11257 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11258 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11259 = eq(_T_11258, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11260 = and(_T_11257, _T_11259) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11261 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11262 = eq(_T_11261, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11263 = and(_T_11260, _T_11262) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11264 = or(_T_11263, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11265 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11266 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11267 = eq(_T_11266, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11268 = and(_T_11265, _T_11267) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11269 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11270 = eq(_T_11269, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11271 = and(_T_11268, _T_11270) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11272 = or(_T_11264, _T_11271) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_12 = or(_T_11272, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11273 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11274 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11275 = eq(_T_11274, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11276 = and(_T_11273, _T_11275) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11277 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11278 = eq(_T_11277, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11279 = and(_T_11276, _T_11278) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11280 = or(_T_11279, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11281 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11282 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11283 = eq(_T_11282, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11284 = and(_T_11281, _T_11283) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11285 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11286 = eq(_T_11285, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11287 = and(_T_11284, _T_11286) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11288 = or(_T_11280, _T_11287) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_13 = or(_T_11288, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11289 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11290 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11291 = eq(_T_11290, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11292 = and(_T_11289, _T_11291) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11293 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11294 = eq(_T_11293, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11295 = and(_T_11292, _T_11294) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11296 = or(_T_11295, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11297 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11298 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11299 = eq(_T_11298, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11300 = and(_T_11297, _T_11299) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11301 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11302 = eq(_T_11301, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11303 = and(_T_11300, _T_11302) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11304 = or(_T_11296, _T_11303) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_14 = or(_T_11304, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11305 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11306 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11307 = eq(_T_11306, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11308 = and(_T_11305, _T_11307) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11309 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11310 = eq(_T_11309, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11311 = and(_T_11308, _T_11310) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11312 = or(_T_11311, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11313 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11314 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11315 = eq(_T_11314, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11316 = and(_T_11313, _T_11315) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11317 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11318 = eq(_T_11317, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11319 = and(_T_11316, _T_11318) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11320 = or(_T_11312, _T_11319) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_1_15 = or(_T_11320, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11321 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11322 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11323 = eq(_T_11322, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11324 = and(_T_11321, _T_11323) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11325 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11326 = eq(_T_11325, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11327 = and(_T_11324, _T_11326) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11328 = or(_T_11327, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11329 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11330 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11331 = eq(_T_11330, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11332 = and(_T_11329, _T_11331) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11333 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11334 = eq(_T_11333, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11335 = and(_T_11332, _T_11334) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11336 = or(_T_11328, _T_11335) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_0 = or(_T_11336, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11337 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11338 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11339 = eq(_T_11338, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11340 = and(_T_11337, _T_11339) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11341 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11342 = eq(_T_11341, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11343 = and(_T_11340, _T_11342) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11344 = or(_T_11343, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11345 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11346 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11347 = eq(_T_11346, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11348 = and(_T_11345, _T_11347) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11349 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11350 = eq(_T_11349, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11351 = and(_T_11348, _T_11350) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11352 = or(_T_11344, _T_11351) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_1 = or(_T_11352, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11353 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11354 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11355 = eq(_T_11354, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11356 = and(_T_11353, _T_11355) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11357 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11358 = eq(_T_11357, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11359 = and(_T_11356, _T_11358) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11360 = or(_T_11359, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11361 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11362 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11363 = eq(_T_11362, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11364 = and(_T_11361, _T_11363) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11365 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11366 = eq(_T_11365, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11367 = and(_T_11364, _T_11366) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11368 = or(_T_11360, _T_11367) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_2 = or(_T_11368, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11369 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11370 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11371 = eq(_T_11370, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11372 = and(_T_11369, _T_11371) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11373 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11374 = eq(_T_11373, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11375 = and(_T_11372, _T_11374) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11376 = or(_T_11375, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11377 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11378 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11379 = eq(_T_11378, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11380 = and(_T_11377, _T_11379) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11381 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11382 = eq(_T_11381, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11383 = and(_T_11380, _T_11382) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11384 = or(_T_11376, _T_11383) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_3 = or(_T_11384, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11385 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11386 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11387 = eq(_T_11386, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11388 = and(_T_11385, _T_11387) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11389 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11390 = eq(_T_11389, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11391 = and(_T_11388, _T_11390) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11392 = or(_T_11391, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11393 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11394 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11395 = eq(_T_11394, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11396 = and(_T_11393, _T_11395) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11397 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11398 = eq(_T_11397, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11399 = and(_T_11396, _T_11398) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11400 = or(_T_11392, _T_11399) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_4 = or(_T_11400, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11401 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11402 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11403 = eq(_T_11402, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11404 = and(_T_11401, _T_11403) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11405 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11406 = eq(_T_11405, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11407 = and(_T_11404, _T_11406) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11408 = or(_T_11407, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11409 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11410 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11411 = eq(_T_11410, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11412 = and(_T_11409, _T_11411) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11413 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11414 = eq(_T_11413, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11415 = and(_T_11412, _T_11414) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11416 = or(_T_11408, _T_11415) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_5 = or(_T_11416, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11417 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11418 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11419 = eq(_T_11418, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11420 = and(_T_11417, _T_11419) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11421 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11422 = eq(_T_11421, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11423 = and(_T_11420, _T_11422) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11424 = or(_T_11423, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11425 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11426 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11427 = eq(_T_11426, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11428 = and(_T_11425, _T_11427) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11429 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11430 = eq(_T_11429, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11431 = and(_T_11428, _T_11430) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11432 = or(_T_11424, _T_11431) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_6 = or(_T_11432, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11433 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11434 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11435 = eq(_T_11434, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11436 = and(_T_11433, _T_11435) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11437 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11438 = eq(_T_11437, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11439 = and(_T_11436, _T_11438) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11440 = or(_T_11439, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11441 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11442 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11443 = eq(_T_11442, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11444 = and(_T_11441, _T_11443) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11445 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11446 = eq(_T_11445, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11447 = and(_T_11444, _T_11446) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11448 = or(_T_11440, _T_11447) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_7 = or(_T_11448, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11449 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11450 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11451 = eq(_T_11450, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11452 = and(_T_11449, _T_11451) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11453 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11454 = eq(_T_11453, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11455 = and(_T_11452, _T_11454) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11456 = or(_T_11455, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11457 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11458 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11459 = eq(_T_11458, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11460 = and(_T_11457, _T_11459) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11461 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11462 = eq(_T_11461, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11463 = and(_T_11460, _T_11462) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11464 = or(_T_11456, _T_11463) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_8 = or(_T_11464, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11465 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11466 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11467 = eq(_T_11466, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11468 = and(_T_11465, _T_11467) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11469 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11470 = eq(_T_11469, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11471 = and(_T_11468, _T_11470) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11472 = or(_T_11471, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11473 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11474 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11475 = eq(_T_11474, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11476 = and(_T_11473, _T_11475) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11477 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11478 = eq(_T_11477, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11479 = and(_T_11476, _T_11478) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11480 = or(_T_11472, _T_11479) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_9 = or(_T_11480, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11481 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11482 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11483 = eq(_T_11482, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11484 = and(_T_11481, _T_11483) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11485 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11486 = eq(_T_11485, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11487 = and(_T_11484, _T_11486) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11488 = or(_T_11487, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11489 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11490 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11491 = eq(_T_11490, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11492 = and(_T_11489, _T_11491) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11493 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11494 = eq(_T_11493, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11495 = and(_T_11492, _T_11494) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11496 = or(_T_11488, _T_11495) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_10 = or(_T_11496, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11497 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11498 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11499 = eq(_T_11498, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11500 = and(_T_11497, _T_11499) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11501 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11502 = eq(_T_11501, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11503 = and(_T_11500, _T_11502) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11504 = or(_T_11503, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11505 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11506 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11507 = eq(_T_11506, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11508 = and(_T_11505, _T_11507) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11509 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11510 = eq(_T_11509, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11511 = and(_T_11508, _T_11510) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11512 = or(_T_11504, _T_11511) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_11 = or(_T_11512, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11513 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11514 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11515 = eq(_T_11514, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11516 = and(_T_11513, _T_11515) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11517 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11518 = eq(_T_11517, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11519 = and(_T_11516, _T_11518) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11520 = or(_T_11519, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11521 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11522 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11523 = eq(_T_11522, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11524 = and(_T_11521, _T_11523) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11525 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11526 = eq(_T_11525, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11527 = and(_T_11524, _T_11526) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11528 = or(_T_11520, _T_11527) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_12 = or(_T_11528, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11529 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11530 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11531 = eq(_T_11530, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11532 = and(_T_11529, _T_11531) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11533 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11534 = eq(_T_11533, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11535 = and(_T_11532, _T_11534) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11536 = or(_T_11535, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11537 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11538 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11539 = eq(_T_11538, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11540 = and(_T_11537, _T_11539) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11541 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11542 = eq(_T_11541, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11543 = and(_T_11540, _T_11542) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11544 = or(_T_11536, _T_11543) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_13 = or(_T_11544, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11545 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11546 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11547 = eq(_T_11546, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11548 = and(_T_11545, _T_11547) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11549 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11550 = eq(_T_11549, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11551 = and(_T_11548, _T_11550) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11552 = or(_T_11551, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11553 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11554 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11555 = eq(_T_11554, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11556 = and(_T_11553, _T_11555) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11557 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11558 = eq(_T_11557, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11559 = and(_T_11556, _T_11558) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11560 = or(_T_11552, _T_11559) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_14 = or(_T_11560, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11561 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11562 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11563 = eq(_T_11562, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11564 = and(_T_11561, _T_11563) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11565 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11566 = eq(_T_11565, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11567 = and(_T_11564, _T_11566) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11568 = or(_T_11567, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11569 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11570 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11571 = eq(_T_11570, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11572 = and(_T_11569, _T_11571) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11573 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11574 = eq(_T_11573, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11575 = and(_T_11572, _T_11574) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11576 = or(_T_11568, _T_11575) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_2_15 = or(_T_11576, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11577 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11578 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11579 = eq(_T_11578, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11580 = and(_T_11577, _T_11579) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11581 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11582 = eq(_T_11581, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11583 = and(_T_11580, _T_11582) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11584 = or(_T_11583, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11585 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11586 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11587 = eq(_T_11586, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11588 = and(_T_11585, _T_11587) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11589 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11590 = eq(_T_11589, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11591 = and(_T_11588, _T_11590) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11592 = or(_T_11584, _T_11591) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_0 = or(_T_11592, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11593 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11594 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11595 = eq(_T_11594, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11596 = and(_T_11593, _T_11595) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11597 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11598 = eq(_T_11597, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11599 = and(_T_11596, _T_11598) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11600 = or(_T_11599, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11601 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11602 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11603 = eq(_T_11602, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11604 = and(_T_11601, _T_11603) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11605 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11606 = eq(_T_11605, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11607 = and(_T_11604, _T_11606) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11608 = or(_T_11600, _T_11607) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_1 = or(_T_11608, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11609 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11610 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11611 = eq(_T_11610, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11612 = and(_T_11609, _T_11611) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11613 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11614 = eq(_T_11613, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11615 = and(_T_11612, _T_11614) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11616 = or(_T_11615, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11617 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11618 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11619 = eq(_T_11618, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11620 = and(_T_11617, _T_11619) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11621 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11622 = eq(_T_11621, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11623 = and(_T_11620, _T_11622) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11624 = or(_T_11616, _T_11623) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_2 = or(_T_11624, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11625 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11626 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11627 = eq(_T_11626, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11628 = and(_T_11625, _T_11627) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11629 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11630 = eq(_T_11629, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11631 = and(_T_11628, _T_11630) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11632 = or(_T_11631, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11633 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11634 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11635 = eq(_T_11634, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11636 = and(_T_11633, _T_11635) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11637 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11638 = eq(_T_11637, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11639 = and(_T_11636, _T_11638) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11640 = or(_T_11632, _T_11639) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_3 = or(_T_11640, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11641 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11642 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11643 = eq(_T_11642, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11644 = and(_T_11641, _T_11643) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11645 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11646 = eq(_T_11645, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11647 = and(_T_11644, _T_11646) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11648 = or(_T_11647, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11649 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11650 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11651 = eq(_T_11650, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11652 = and(_T_11649, _T_11651) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11653 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11654 = eq(_T_11653, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11655 = and(_T_11652, _T_11654) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11656 = or(_T_11648, _T_11655) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_4 = or(_T_11656, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11657 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11658 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11659 = eq(_T_11658, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11660 = and(_T_11657, _T_11659) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11661 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11662 = eq(_T_11661, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11663 = and(_T_11660, _T_11662) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11664 = or(_T_11663, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11665 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11666 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11667 = eq(_T_11666, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11668 = and(_T_11665, _T_11667) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11669 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11670 = eq(_T_11669, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11671 = and(_T_11668, _T_11670) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11672 = or(_T_11664, _T_11671) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_5 = or(_T_11672, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11673 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11674 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11675 = eq(_T_11674, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11676 = and(_T_11673, _T_11675) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11677 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11678 = eq(_T_11677, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11679 = and(_T_11676, _T_11678) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11680 = or(_T_11679, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11681 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11682 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11683 = eq(_T_11682, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11684 = and(_T_11681, _T_11683) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11685 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11686 = eq(_T_11685, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11687 = and(_T_11684, _T_11686) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11688 = or(_T_11680, _T_11687) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_6 = or(_T_11688, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11689 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11690 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11691 = eq(_T_11690, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11692 = and(_T_11689, _T_11691) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11693 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11694 = eq(_T_11693, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11695 = and(_T_11692, _T_11694) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11696 = or(_T_11695, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11697 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11698 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11699 = eq(_T_11698, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11700 = and(_T_11697, _T_11699) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11701 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11702 = eq(_T_11701, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11703 = and(_T_11700, _T_11702) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11704 = or(_T_11696, _T_11703) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_7 = or(_T_11704, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11705 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11706 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11707 = eq(_T_11706, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11708 = and(_T_11705, _T_11707) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11709 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11710 = eq(_T_11709, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11711 = and(_T_11708, _T_11710) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11712 = or(_T_11711, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11713 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11714 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11715 = eq(_T_11714, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11716 = and(_T_11713, _T_11715) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11717 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11718 = eq(_T_11717, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11719 = and(_T_11716, _T_11718) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11720 = or(_T_11712, _T_11719) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_8 = or(_T_11720, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11721 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11722 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11723 = eq(_T_11722, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11724 = and(_T_11721, _T_11723) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11725 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11726 = eq(_T_11725, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11727 = and(_T_11724, _T_11726) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11728 = or(_T_11727, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11729 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11730 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11731 = eq(_T_11730, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11732 = and(_T_11729, _T_11731) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11733 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11734 = eq(_T_11733, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11735 = and(_T_11732, _T_11734) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11736 = or(_T_11728, _T_11735) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_9 = or(_T_11736, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11737 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11738 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11739 = eq(_T_11738, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11740 = and(_T_11737, _T_11739) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11741 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11742 = eq(_T_11741, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11743 = and(_T_11740, _T_11742) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11744 = or(_T_11743, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11745 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11746 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11747 = eq(_T_11746, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11748 = and(_T_11745, _T_11747) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11749 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11750 = eq(_T_11749, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11751 = and(_T_11748, _T_11750) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11752 = or(_T_11744, _T_11751) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_10 = or(_T_11752, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11753 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11754 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11755 = eq(_T_11754, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11756 = and(_T_11753, _T_11755) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11757 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11758 = eq(_T_11757, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11759 = and(_T_11756, _T_11758) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11760 = or(_T_11759, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11761 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11762 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11763 = eq(_T_11762, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11764 = and(_T_11761, _T_11763) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11765 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11766 = eq(_T_11765, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11767 = and(_T_11764, _T_11766) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11768 = or(_T_11760, _T_11767) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_11 = or(_T_11768, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11769 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11770 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11771 = eq(_T_11770, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11772 = and(_T_11769, _T_11771) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11773 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11774 = eq(_T_11773, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11775 = and(_T_11772, _T_11774) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11776 = or(_T_11775, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11777 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11778 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11779 = eq(_T_11778, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11780 = and(_T_11777, _T_11779) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11781 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11782 = eq(_T_11781, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11783 = and(_T_11780, _T_11782) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11784 = or(_T_11776, _T_11783) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_12 = or(_T_11784, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11785 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11786 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11787 = eq(_T_11786, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11788 = and(_T_11785, _T_11787) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11789 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11790 = eq(_T_11789, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11791 = and(_T_11788, _T_11790) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11792 = or(_T_11791, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11793 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11794 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11795 = eq(_T_11794, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11796 = and(_T_11793, _T_11795) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11797 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11798 = eq(_T_11797, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11799 = and(_T_11796, _T_11798) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11800 = or(_T_11792, _T_11799) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_13 = or(_T_11800, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11801 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11802 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11803 = eq(_T_11802, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11804 = and(_T_11801, _T_11803) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11805 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11806 = eq(_T_11805, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11807 = and(_T_11804, _T_11806) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11808 = or(_T_11807, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11809 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11810 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11811 = eq(_T_11810, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11812 = and(_T_11809, _T_11811) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11813 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11814 = eq(_T_11813, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11815 = and(_T_11812, _T_11814) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11816 = or(_T_11808, _T_11815) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_14 = or(_T_11816, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11817 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11818 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11819 = eq(_T_11818, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11820 = and(_T_11817, _T_11819) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11821 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11822 = eq(_T_11821, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11823 = and(_T_11820, _T_11822) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11824 = or(_T_11823, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11825 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11826 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11827 = eq(_T_11826, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11828 = and(_T_11825, _T_11827) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11829 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11830 = eq(_T_11829, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11831 = and(_T_11828, _T_11830) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11832 = or(_T_11824, _T_11831) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_3_15 = or(_T_11832, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11833 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11834 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11835 = eq(_T_11834, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11836 = and(_T_11833, _T_11835) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11837 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11838 = eq(_T_11837, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11839 = and(_T_11836, _T_11838) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11840 = or(_T_11839, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11841 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11842 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11843 = eq(_T_11842, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11844 = and(_T_11841, _T_11843) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11845 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11846 = eq(_T_11845, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11847 = and(_T_11844, _T_11846) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11848 = or(_T_11840, _T_11847) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_0 = or(_T_11848, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11849 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11850 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11851 = eq(_T_11850, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11852 = and(_T_11849, _T_11851) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11853 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11854 = eq(_T_11853, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11855 = and(_T_11852, _T_11854) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11856 = or(_T_11855, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11857 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11858 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11859 = eq(_T_11858, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11860 = and(_T_11857, _T_11859) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11861 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11862 = eq(_T_11861, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11863 = and(_T_11860, _T_11862) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11864 = or(_T_11856, _T_11863) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_1 = or(_T_11864, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11865 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11866 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11867 = eq(_T_11866, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11868 = and(_T_11865, _T_11867) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11869 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11870 = eq(_T_11869, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11871 = and(_T_11868, _T_11870) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11872 = or(_T_11871, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11873 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11874 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11875 = eq(_T_11874, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11876 = and(_T_11873, _T_11875) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11877 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11878 = eq(_T_11877, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11879 = and(_T_11876, _T_11878) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11880 = or(_T_11872, _T_11879) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_2 = or(_T_11880, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11881 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11882 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11883 = eq(_T_11882, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11884 = and(_T_11881, _T_11883) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11885 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11886 = eq(_T_11885, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11887 = and(_T_11884, _T_11886) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11888 = or(_T_11887, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11889 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11890 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11891 = eq(_T_11890, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11892 = and(_T_11889, _T_11891) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11893 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11894 = eq(_T_11893, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11895 = and(_T_11892, _T_11894) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11896 = or(_T_11888, _T_11895) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_3 = or(_T_11896, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11897 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11898 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11899 = eq(_T_11898, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11900 = and(_T_11897, _T_11899) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11901 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11902 = eq(_T_11901, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11903 = and(_T_11900, _T_11902) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11904 = or(_T_11903, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11905 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11906 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11907 = eq(_T_11906, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11908 = and(_T_11905, _T_11907) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11909 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11910 = eq(_T_11909, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11911 = and(_T_11908, _T_11910) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11912 = or(_T_11904, _T_11911) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_4 = or(_T_11912, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11913 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11914 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11915 = eq(_T_11914, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11916 = and(_T_11913, _T_11915) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11917 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11918 = eq(_T_11917, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11919 = and(_T_11916, _T_11918) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11920 = or(_T_11919, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11921 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11922 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11923 = eq(_T_11922, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11924 = and(_T_11921, _T_11923) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11925 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11926 = eq(_T_11925, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11927 = and(_T_11924, _T_11926) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11928 = or(_T_11920, _T_11927) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_5 = or(_T_11928, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11929 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11930 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11931 = eq(_T_11930, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11932 = and(_T_11929, _T_11931) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11933 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11934 = eq(_T_11933, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11935 = and(_T_11932, _T_11934) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11936 = or(_T_11935, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11937 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11938 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11939 = eq(_T_11938, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11940 = and(_T_11937, _T_11939) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11941 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11942 = eq(_T_11941, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11943 = and(_T_11940, _T_11942) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11944 = or(_T_11936, _T_11943) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_6 = or(_T_11944, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11945 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11946 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11947 = eq(_T_11946, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11948 = and(_T_11945, _T_11947) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11949 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11950 = eq(_T_11949, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11951 = and(_T_11948, _T_11950) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11952 = or(_T_11951, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11953 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11954 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11955 = eq(_T_11954, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11956 = and(_T_11953, _T_11955) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11957 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11958 = eq(_T_11957, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11959 = and(_T_11956, _T_11958) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11960 = or(_T_11952, _T_11959) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_7 = or(_T_11960, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11961 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11962 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11963 = eq(_T_11962, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11964 = and(_T_11961, _T_11963) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11965 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11966 = eq(_T_11965, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11967 = and(_T_11964, _T_11966) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11968 = or(_T_11967, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11969 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11970 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11971 = eq(_T_11970, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11972 = and(_T_11969, _T_11971) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11973 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11974 = eq(_T_11973, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11975 = and(_T_11972, _T_11974) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11976 = or(_T_11968, _T_11975) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_8 = or(_T_11976, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11977 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11978 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11979 = eq(_T_11978, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11980 = and(_T_11977, _T_11979) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11981 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11982 = eq(_T_11981, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11983 = and(_T_11980, _T_11982) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_11984 = or(_T_11983, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_11985 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_11986 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_11987 = eq(_T_11986, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_11988 = and(_T_11985, _T_11987) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_11989 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_11990 = eq(_T_11989, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_11991 = and(_T_11988, _T_11990) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_11992 = or(_T_11984, _T_11991) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_9 = or(_T_11992, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_11993 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_11994 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_11995 = eq(_T_11994, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_11996 = and(_T_11993, _T_11995) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_11997 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_11998 = eq(_T_11997, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_11999 = and(_T_11996, _T_11998) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12000 = or(_T_11999, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12001 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12002 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12003 = eq(_T_12002, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12004 = and(_T_12001, _T_12003) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12005 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12006 = eq(_T_12005, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12007 = and(_T_12004, _T_12006) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12008 = or(_T_12000, _T_12007) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_10 = or(_T_12008, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12009 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12010 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12011 = eq(_T_12010, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12012 = and(_T_12009, _T_12011) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12013 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12014 = eq(_T_12013, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12015 = and(_T_12012, _T_12014) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12016 = or(_T_12015, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12017 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12018 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12019 = eq(_T_12018, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12020 = and(_T_12017, _T_12019) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12021 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12022 = eq(_T_12021, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12023 = and(_T_12020, _T_12022) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12024 = or(_T_12016, _T_12023) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_11 = or(_T_12024, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12025 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12026 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12027 = eq(_T_12026, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12028 = and(_T_12025, _T_12027) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12029 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12030 = eq(_T_12029, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12031 = and(_T_12028, _T_12030) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12032 = or(_T_12031, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12033 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12034 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12035 = eq(_T_12034, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12036 = and(_T_12033, _T_12035) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12037 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12038 = eq(_T_12037, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12039 = and(_T_12036, _T_12038) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12040 = or(_T_12032, _T_12039) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_12 = or(_T_12040, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12041 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12042 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12043 = eq(_T_12042, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12044 = and(_T_12041, _T_12043) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12045 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12046 = eq(_T_12045, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12047 = and(_T_12044, _T_12046) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12048 = or(_T_12047, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12049 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12050 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12051 = eq(_T_12050, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12052 = and(_T_12049, _T_12051) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12053 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12054 = eq(_T_12053, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12055 = and(_T_12052, _T_12054) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12056 = or(_T_12048, _T_12055) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_13 = or(_T_12056, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12057 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12058 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12059 = eq(_T_12058, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12060 = and(_T_12057, _T_12059) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12061 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12062 = eq(_T_12061, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12063 = and(_T_12060, _T_12062) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12064 = or(_T_12063, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12065 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12066 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12067 = eq(_T_12066, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12068 = and(_T_12065, _T_12067) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12069 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12070 = eq(_T_12069, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12071 = and(_T_12068, _T_12070) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12072 = or(_T_12064, _T_12071) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_14 = or(_T_12072, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12073 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12074 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12075 = eq(_T_12074, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12076 = and(_T_12073, _T_12075) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12077 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12078 = eq(_T_12077, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12079 = and(_T_12076, _T_12078) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12080 = or(_T_12079, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12081 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12082 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12083 = eq(_T_12082, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12084 = and(_T_12081, _T_12083) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12085 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12086 = eq(_T_12085, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12087 = and(_T_12084, _T_12086) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12088 = or(_T_12080, _T_12087) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_4_15 = or(_T_12088, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12089 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12090 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12091 = eq(_T_12090, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12092 = and(_T_12089, _T_12091) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12093 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12094 = eq(_T_12093, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12095 = and(_T_12092, _T_12094) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12096 = or(_T_12095, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12097 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12098 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12099 = eq(_T_12098, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12100 = and(_T_12097, _T_12099) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12101 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12102 = eq(_T_12101, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12103 = and(_T_12100, _T_12102) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12104 = or(_T_12096, _T_12103) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_0 = or(_T_12104, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12105 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12106 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12107 = eq(_T_12106, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12108 = and(_T_12105, _T_12107) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12109 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12110 = eq(_T_12109, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12111 = and(_T_12108, _T_12110) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12112 = or(_T_12111, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12113 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12114 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12115 = eq(_T_12114, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12116 = and(_T_12113, _T_12115) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12117 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12118 = eq(_T_12117, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12119 = and(_T_12116, _T_12118) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12120 = or(_T_12112, _T_12119) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_1 = or(_T_12120, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12121 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12122 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12123 = eq(_T_12122, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12124 = and(_T_12121, _T_12123) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12125 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12126 = eq(_T_12125, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12127 = and(_T_12124, _T_12126) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12128 = or(_T_12127, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12129 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12130 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12131 = eq(_T_12130, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12132 = and(_T_12129, _T_12131) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12133 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12134 = eq(_T_12133, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12135 = and(_T_12132, _T_12134) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12136 = or(_T_12128, _T_12135) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_2 = or(_T_12136, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12137 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12138 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12139 = eq(_T_12138, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12140 = and(_T_12137, _T_12139) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12141 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12142 = eq(_T_12141, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12143 = and(_T_12140, _T_12142) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12144 = or(_T_12143, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12145 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12146 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12147 = eq(_T_12146, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12148 = and(_T_12145, _T_12147) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12149 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12150 = eq(_T_12149, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12151 = and(_T_12148, _T_12150) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12152 = or(_T_12144, _T_12151) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_3 = or(_T_12152, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12153 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12154 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12155 = eq(_T_12154, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12156 = and(_T_12153, _T_12155) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12157 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12158 = eq(_T_12157, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12159 = and(_T_12156, _T_12158) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12160 = or(_T_12159, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12161 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12162 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12163 = eq(_T_12162, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12164 = and(_T_12161, _T_12163) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12165 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12166 = eq(_T_12165, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12167 = and(_T_12164, _T_12166) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12168 = or(_T_12160, _T_12167) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_4 = or(_T_12168, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12169 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12170 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12171 = eq(_T_12170, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12172 = and(_T_12169, _T_12171) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12173 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12174 = eq(_T_12173, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12175 = and(_T_12172, _T_12174) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12176 = or(_T_12175, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12177 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12178 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12179 = eq(_T_12178, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12180 = and(_T_12177, _T_12179) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12181 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12182 = eq(_T_12181, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12183 = and(_T_12180, _T_12182) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12184 = or(_T_12176, _T_12183) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_5 = or(_T_12184, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12185 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12186 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12187 = eq(_T_12186, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12188 = and(_T_12185, _T_12187) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12189 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12190 = eq(_T_12189, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12191 = and(_T_12188, _T_12190) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12192 = or(_T_12191, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12193 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12194 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12195 = eq(_T_12194, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12196 = and(_T_12193, _T_12195) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12197 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12198 = eq(_T_12197, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12199 = and(_T_12196, _T_12198) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12200 = or(_T_12192, _T_12199) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_6 = or(_T_12200, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12201 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12202 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12203 = eq(_T_12202, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12204 = and(_T_12201, _T_12203) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12205 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12206 = eq(_T_12205, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12207 = and(_T_12204, _T_12206) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12208 = or(_T_12207, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12209 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12210 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12211 = eq(_T_12210, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12212 = and(_T_12209, _T_12211) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12213 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12214 = eq(_T_12213, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12215 = and(_T_12212, _T_12214) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12216 = or(_T_12208, _T_12215) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_7 = or(_T_12216, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12217 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12218 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12219 = eq(_T_12218, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12220 = and(_T_12217, _T_12219) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12221 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12222 = eq(_T_12221, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12223 = and(_T_12220, _T_12222) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12224 = or(_T_12223, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12225 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12226 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12227 = eq(_T_12226, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12228 = and(_T_12225, _T_12227) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12229 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12230 = eq(_T_12229, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12231 = and(_T_12228, _T_12230) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12232 = or(_T_12224, _T_12231) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_8 = or(_T_12232, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12233 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12234 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12235 = eq(_T_12234, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12236 = and(_T_12233, _T_12235) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12237 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12238 = eq(_T_12237, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12239 = and(_T_12236, _T_12238) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12240 = or(_T_12239, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12241 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12242 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12243 = eq(_T_12242, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12244 = and(_T_12241, _T_12243) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12245 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12246 = eq(_T_12245, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12247 = and(_T_12244, _T_12246) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12248 = or(_T_12240, _T_12247) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_9 = or(_T_12248, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12249 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12250 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12251 = eq(_T_12250, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12252 = and(_T_12249, _T_12251) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12253 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12254 = eq(_T_12253, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12255 = and(_T_12252, _T_12254) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12256 = or(_T_12255, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12257 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12258 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12259 = eq(_T_12258, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12260 = and(_T_12257, _T_12259) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12261 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12262 = eq(_T_12261, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12263 = and(_T_12260, _T_12262) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12264 = or(_T_12256, _T_12263) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_10 = or(_T_12264, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12265 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12266 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12267 = eq(_T_12266, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12268 = and(_T_12265, _T_12267) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12269 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12270 = eq(_T_12269, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12271 = and(_T_12268, _T_12270) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12272 = or(_T_12271, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12273 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12274 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12275 = eq(_T_12274, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12276 = and(_T_12273, _T_12275) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12277 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12278 = eq(_T_12277, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12279 = and(_T_12276, _T_12278) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12280 = or(_T_12272, _T_12279) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_11 = or(_T_12280, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12281 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12282 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12283 = eq(_T_12282, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12284 = and(_T_12281, _T_12283) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12285 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12286 = eq(_T_12285, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12287 = and(_T_12284, _T_12286) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12288 = or(_T_12287, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12289 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12290 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12291 = eq(_T_12290, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12292 = and(_T_12289, _T_12291) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12293 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12294 = eq(_T_12293, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12295 = and(_T_12292, _T_12294) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12296 = or(_T_12288, _T_12295) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_12 = or(_T_12296, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12297 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12298 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12299 = eq(_T_12298, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12300 = and(_T_12297, _T_12299) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12301 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12302 = eq(_T_12301, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12303 = and(_T_12300, _T_12302) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12304 = or(_T_12303, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12305 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12306 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12307 = eq(_T_12306, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12308 = and(_T_12305, _T_12307) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12309 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12310 = eq(_T_12309, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12311 = and(_T_12308, _T_12310) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12312 = or(_T_12304, _T_12311) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_13 = or(_T_12312, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12313 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12314 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12315 = eq(_T_12314, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12316 = and(_T_12313, _T_12315) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12317 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12318 = eq(_T_12317, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12319 = and(_T_12316, _T_12318) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12320 = or(_T_12319, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12321 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12322 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12323 = eq(_T_12322, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12324 = and(_T_12321, _T_12323) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12325 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12326 = eq(_T_12325, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12327 = and(_T_12324, _T_12326) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12328 = or(_T_12320, _T_12327) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_14 = or(_T_12328, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12329 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12330 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12331 = eq(_T_12330, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12332 = and(_T_12329, _T_12331) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12333 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12334 = eq(_T_12333, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12335 = and(_T_12332, _T_12334) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12336 = or(_T_12335, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12337 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12338 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12339 = eq(_T_12338, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12340 = and(_T_12337, _T_12339) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12341 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12342 = eq(_T_12341, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12343 = and(_T_12340, _T_12342) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12344 = or(_T_12336, _T_12343) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_5_15 = or(_T_12344, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12345 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12346 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12347 = eq(_T_12346, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12348 = and(_T_12345, _T_12347) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12349 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12350 = eq(_T_12349, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12351 = and(_T_12348, _T_12350) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12352 = or(_T_12351, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12353 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12354 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12355 = eq(_T_12354, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12356 = and(_T_12353, _T_12355) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12357 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12358 = eq(_T_12357, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12359 = and(_T_12356, _T_12358) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12360 = or(_T_12352, _T_12359) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_0 = or(_T_12360, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12361 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12362 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12363 = eq(_T_12362, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12364 = and(_T_12361, _T_12363) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12365 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12366 = eq(_T_12365, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12367 = and(_T_12364, _T_12366) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12368 = or(_T_12367, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12369 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12370 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12371 = eq(_T_12370, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12372 = and(_T_12369, _T_12371) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12373 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12374 = eq(_T_12373, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12375 = and(_T_12372, _T_12374) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12376 = or(_T_12368, _T_12375) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_1 = or(_T_12376, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12377 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12378 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12379 = eq(_T_12378, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12380 = and(_T_12377, _T_12379) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12381 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12382 = eq(_T_12381, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12383 = and(_T_12380, _T_12382) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12384 = or(_T_12383, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12385 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12386 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12387 = eq(_T_12386, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12388 = and(_T_12385, _T_12387) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12389 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12390 = eq(_T_12389, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12391 = and(_T_12388, _T_12390) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12392 = or(_T_12384, _T_12391) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_2 = or(_T_12392, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12393 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12394 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12395 = eq(_T_12394, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12396 = and(_T_12393, _T_12395) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12397 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12398 = eq(_T_12397, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12399 = and(_T_12396, _T_12398) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12400 = or(_T_12399, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12401 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12402 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12403 = eq(_T_12402, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12404 = and(_T_12401, _T_12403) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12405 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12406 = eq(_T_12405, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12407 = and(_T_12404, _T_12406) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12408 = or(_T_12400, _T_12407) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_3 = or(_T_12408, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12409 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12410 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12411 = eq(_T_12410, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12412 = and(_T_12409, _T_12411) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12413 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12414 = eq(_T_12413, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12415 = and(_T_12412, _T_12414) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12416 = or(_T_12415, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12417 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12418 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12419 = eq(_T_12418, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12420 = and(_T_12417, _T_12419) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12421 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12422 = eq(_T_12421, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12423 = and(_T_12420, _T_12422) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12424 = or(_T_12416, _T_12423) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_4 = or(_T_12424, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12425 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12426 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12427 = eq(_T_12426, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12428 = and(_T_12425, _T_12427) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12429 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12430 = eq(_T_12429, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12431 = and(_T_12428, _T_12430) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12432 = or(_T_12431, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12433 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12434 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12435 = eq(_T_12434, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12436 = and(_T_12433, _T_12435) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12437 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12438 = eq(_T_12437, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12439 = and(_T_12436, _T_12438) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12440 = or(_T_12432, _T_12439) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_5 = or(_T_12440, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12441 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12442 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12443 = eq(_T_12442, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12444 = and(_T_12441, _T_12443) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12445 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12446 = eq(_T_12445, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12447 = and(_T_12444, _T_12446) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12448 = or(_T_12447, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12449 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12450 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12451 = eq(_T_12450, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12452 = and(_T_12449, _T_12451) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12453 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12454 = eq(_T_12453, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12455 = and(_T_12452, _T_12454) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12456 = or(_T_12448, _T_12455) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_6 = or(_T_12456, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12457 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12458 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12459 = eq(_T_12458, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12460 = and(_T_12457, _T_12459) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12461 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12462 = eq(_T_12461, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12463 = and(_T_12460, _T_12462) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12464 = or(_T_12463, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12465 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12466 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12467 = eq(_T_12466, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12468 = and(_T_12465, _T_12467) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12469 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12470 = eq(_T_12469, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12471 = and(_T_12468, _T_12470) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12472 = or(_T_12464, _T_12471) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_7 = or(_T_12472, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12473 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12474 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12475 = eq(_T_12474, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12476 = and(_T_12473, _T_12475) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12477 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12478 = eq(_T_12477, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12479 = and(_T_12476, _T_12478) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12480 = or(_T_12479, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12481 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12482 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12483 = eq(_T_12482, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12484 = and(_T_12481, _T_12483) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12485 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12486 = eq(_T_12485, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12487 = and(_T_12484, _T_12486) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12488 = or(_T_12480, _T_12487) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_8 = or(_T_12488, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12489 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12490 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12491 = eq(_T_12490, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12492 = and(_T_12489, _T_12491) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12493 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12494 = eq(_T_12493, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12495 = and(_T_12492, _T_12494) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12496 = or(_T_12495, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12497 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12498 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12499 = eq(_T_12498, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12500 = and(_T_12497, _T_12499) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12501 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12502 = eq(_T_12501, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12503 = and(_T_12500, _T_12502) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12504 = or(_T_12496, _T_12503) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_9 = or(_T_12504, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12505 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12506 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12507 = eq(_T_12506, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12508 = and(_T_12505, _T_12507) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12509 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12510 = eq(_T_12509, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12511 = and(_T_12508, _T_12510) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12512 = or(_T_12511, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12513 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12514 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12515 = eq(_T_12514, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12516 = and(_T_12513, _T_12515) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12517 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12518 = eq(_T_12517, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12519 = and(_T_12516, _T_12518) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12520 = or(_T_12512, _T_12519) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_10 = or(_T_12520, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12521 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12522 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12523 = eq(_T_12522, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12524 = and(_T_12521, _T_12523) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12525 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12526 = eq(_T_12525, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12527 = and(_T_12524, _T_12526) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12528 = or(_T_12527, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12529 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12530 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12531 = eq(_T_12530, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12532 = and(_T_12529, _T_12531) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12533 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12534 = eq(_T_12533, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12535 = and(_T_12532, _T_12534) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12536 = or(_T_12528, _T_12535) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_11 = or(_T_12536, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12537 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12538 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12539 = eq(_T_12538, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12540 = and(_T_12537, _T_12539) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12541 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12542 = eq(_T_12541, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12543 = and(_T_12540, _T_12542) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12544 = or(_T_12543, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12545 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12546 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12547 = eq(_T_12546, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12548 = and(_T_12545, _T_12547) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12549 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12550 = eq(_T_12549, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12551 = and(_T_12548, _T_12550) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12552 = or(_T_12544, _T_12551) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_12 = or(_T_12552, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12553 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12554 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12555 = eq(_T_12554, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12556 = and(_T_12553, _T_12555) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12557 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12558 = eq(_T_12557, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12559 = and(_T_12556, _T_12558) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12560 = or(_T_12559, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12561 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12562 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12563 = eq(_T_12562, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12564 = and(_T_12561, _T_12563) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12565 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12566 = eq(_T_12565, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12567 = and(_T_12564, _T_12566) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12568 = or(_T_12560, _T_12567) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_13 = or(_T_12568, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12569 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12570 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12571 = eq(_T_12570, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12572 = and(_T_12569, _T_12571) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12573 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12574 = eq(_T_12573, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12575 = and(_T_12572, _T_12574) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12576 = or(_T_12575, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12577 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12578 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12579 = eq(_T_12578, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12580 = and(_T_12577, _T_12579) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12581 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12582 = eq(_T_12581, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12583 = and(_T_12580, _T_12582) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12584 = or(_T_12576, _T_12583) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_14 = or(_T_12584, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12585 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12586 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12587 = eq(_T_12586, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12588 = and(_T_12585, _T_12587) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12589 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12590 = eq(_T_12589, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12591 = and(_T_12588, _T_12590) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12592 = or(_T_12591, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12593 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12594 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12595 = eq(_T_12594, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12596 = and(_T_12593, _T_12595) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12597 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12598 = eq(_T_12597, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12599 = and(_T_12596, _T_12598) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12600 = or(_T_12592, _T_12599) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_6_15 = or(_T_12600, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12601 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12602 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12603 = eq(_T_12602, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12604 = and(_T_12601, _T_12603) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12605 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12606 = eq(_T_12605, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12607 = and(_T_12604, _T_12606) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12608 = or(_T_12607, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12609 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12610 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12611 = eq(_T_12610, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12612 = and(_T_12609, _T_12611) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12613 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12614 = eq(_T_12613, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12615 = and(_T_12612, _T_12614) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12616 = or(_T_12608, _T_12615) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_0 = or(_T_12616, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12617 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12618 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12619 = eq(_T_12618, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12620 = and(_T_12617, _T_12619) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12621 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12622 = eq(_T_12621, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12623 = and(_T_12620, _T_12622) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12624 = or(_T_12623, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12625 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12626 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12627 = eq(_T_12626, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12628 = and(_T_12625, _T_12627) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12629 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12630 = eq(_T_12629, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12631 = and(_T_12628, _T_12630) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12632 = or(_T_12624, _T_12631) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_1 = or(_T_12632, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12633 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12634 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12635 = eq(_T_12634, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12636 = and(_T_12633, _T_12635) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12637 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12638 = eq(_T_12637, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12639 = and(_T_12636, _T_12638) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12640 = or(_T_12639, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12641 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12642 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12643 = eq(_T_12642, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12644 = and(_T_12641, _T_12643) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12645 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12646 = eq(_T_12645, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12647 = and(_T_12644, _T_12646) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12648 = or(_T_12640, _T_12647) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_2 = or(_T_12648, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12649 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12650 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12651 = eq(_T_12650, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12652 = and(_T_12649, _T_12651) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12653 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12654 = eq(_T_12653, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12655 = and(_T_12652, _T_12654) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12656 = or(_T_12655, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12657 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12658 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12659 = eq(_T_12658, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12660 = and(_T_12657, _T_12659) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12661 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12662 = eq(_T_12661, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12663 = and(_T_12660, _T_12662) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12664 = or(_T_12656, _T_12663) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_3 = or(_T_12664, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12665 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12666 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12667 = eq(_T_12666, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12668 = and(_T_12665, _T_12667) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12669 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12670 = eq(_T_12669, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12671 = and(_T_12668, _T_12670) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12672 = or(_T_12671, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12673 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12674 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12675 = eq(_T_12674, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12676 = and(_T_12673, _T_12675) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12677 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12678 = eq(_T_12677, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12679 = and(_T_12676, _T_12678) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12680 = or(_T_12672, _T_12679) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_4 = or(_T_12680, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12681 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12682 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12683 = eq(_T_12682, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12684 = and(_T_12681, _T_12683) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12685 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12686 = eq(_T_12685, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12687 = and(_T_12684, _T_12686) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12688 = or(_T_12687, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12689 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12690 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12691 = eq(_T_12690, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12692 = and(_T_12689, _T_12691) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12693 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12694 = eq(_T_12693, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12695 = and(_T_12692, _T_12694) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12696 = or(_T_12688, _T_12695) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_5 = or(_T_12696, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12697 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12698 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12699 = eq(_T_12698, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12700 = and(_T_12697, _T_12699) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12701 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12702 = eq(_T_12701, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12703 = and(_T_12700, _T_12702) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12704 = or(_T_12703, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12705 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12706 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12707 = eq(_T_12706, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12708 = and(_T_12705, _T_12707) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12709 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12710 = eq(_T_12709, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12711 = and(_T_12708, _T_12710) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12712 = or(_T_12704, _T_12711) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_6 = or(_T_12712, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12713 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12714 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12715 = eq(_T_12714, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12716 = and(_T_12713, _T_12715) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12717 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12718 = eq(_T_12717, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12719 = and(_T_12716, _T_12718) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12720 = or(_T_12719, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12721 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12722 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12723 = eq(_T_12722, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12724 = and(_T_12721, _T_12723) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12725 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12726 = eq(_T_12725, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12727 = and(_T_12724, _T_12726) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12728 = or(_T_12720, _T_12727) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_7 = or(_T_12728, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12729 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12730 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12731 = eq(_T_12730, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12732 = and(_T_12729, _T_12731) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12733 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12734 = eq(_T_12733, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12735 = and(_T_12732, _T_12734) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12736 = or(_T_12735, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12737 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12738 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12739 = eq(_T_12738, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12740 = and(_T_12737, _T_12739) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12741 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12742 = eq(_T_12741, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12743 = and(_T_12740, _T_12742) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12744 = or(_T_12736, _T_12743) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_8 = or(_T_12744, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12745 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12746 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12747 = eq(_T_12746, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12748 = and(_T_12745, _T_12747) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12749 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12750 = eq(_T_12749, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12751 = and(_T_12748, _T_12750) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12752 = or(_T_12751, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12753 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12754 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12755 = eq(_T_12754, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12756 = and(_T_12753, _T_12755) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12757 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12758 = eq(_T_12757, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12759 = and(_T_12756, _T_12758) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12760 = or(_T_12752, _T_12759) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_9 = or(_T_12760, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12761 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12762 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12763 = eq(_T_12762, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12764 = and(_T_12761, _T_12763) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12765 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12766 = eq(_T_12765, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12767 = and(_T_12764, _T_12766) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12768 = or(_T_12767, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12769 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12770 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12771 = eq(_T_12770, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12772 = and(_T_12769, _T_12771) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12773 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12774 = eq(_T_12773, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12775 = and(_T_12772, _T_12774) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12776 = or(_T_12768, _T_12775) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_10 = or(_T_12776, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12777 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12778 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12779 = eq(_T_12778, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12780 = and(_T_12777, _T_12779) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12781 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12782 = eq(_T_12781, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12783 = and(_T_12780, _T_12782) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12784 = or(_T_12783, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12785 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12786 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12787 = eq(_T_12786, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12788 = and(_T_12785, _T_12787) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12789 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12790 = eq(_T_12789, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12791 = and(_T_12788, _T_12790) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12792 = or(_T_12784, _T_12791) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_11 = or(_T_12792, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12793 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12794 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12795 = eq(_T_12794, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12796 = and(_T_12793, _T_12795) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12797 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12798 = eq(_T_12797, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12799 = and(_T_12796, _T_12798) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12800 = or(_T_12799, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12801 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12802 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12803 = eq(_T_12802, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12804 = and(_T_12801, _T_12803) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12805 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12806 = eq(_T_12805, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12807 = and(_T_12804, _T_12806) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12808 = or(_T_12800, _T_12807) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_12 = or(_T_12808, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12809 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12810 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12811 = eq(_T_12810, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12812 = and(_T_12809, _T_12811) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12813 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12814 = eq(_T_12813, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12815 = and(_T_12812, _T_12814) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12816 = or(_T_12815, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12817 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12818 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12819 = eq(_T_12818, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12820 = and(_T_12817, _T_12819) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12821 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12822 = eq(_T_12821, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12823 = and(_T_12820, _T_12822) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12824 = or(_T_12816, _T_12823) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_13 = or(_T_12824, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12825 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12826 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12827 = eq(_T_12826, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12828 = and(_T_12825, _T_12827) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12829 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12830 = eq(_T_12829, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12831 = and(_T_12828, _T_12830) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12832 = or(_T_12831, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12833 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12834 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12835 = eq(_T_12834, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12836 = and(_T_12833, _T_12835) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12837 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12838 = eq(_T_12837, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12839 = and(_T_12836, _T_12838) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12840 = or(_T_12832, _T_12839) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_14 = or(_T_12840, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12841 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12842 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12843 = eq(_T_12842, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12844 = and(_T_12841, _T_12843) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12845 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12846 = eq(_T_12845, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12847 = and(_T_12844, _T_12846) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12848 = or(_T_12847, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12849 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12850 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12851 = eq(_T_12850, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12852 = and(_T_12849, _T_12851) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12853 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12854 = eq(_T_12853, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12855 = and(_T_12852, _T_12854) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12856 = or(_T_12848, _T_12855) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_7_15 = or(_T_12856, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12857 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12858 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12859 = eq(_T_12858, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12860 = and(_T_12857, _T_12859) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12861 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12862 = eq(_T_12861, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12863 = and(_T_12860, _T_12862) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12864 = or(_T_12863, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12865 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12866 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12867 = eq(_T_12866, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12868 = and(_T_12865, _T_12867) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12869 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12870 = eq(_T_12869, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12871 = and(_T_12868, _T_12870) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12872 = or(_T_12864, _T_12871) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_0 = or(_T_12872, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12873 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12874 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12875 = eq(_T_12874, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12876 = and(_T_12873, _T_12875) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12877 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12878 = eq(_T_12877, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12879 = and(_T_12876, _T_12878) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12880 = or(_T_12879, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12881 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12882 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12883 = eq(_T_12882, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12884 = and(_T_12881, _T_12883) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12885 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12886 = eq(_T_12885, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12887 = and(_T_12884, _T_12886) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12888 = or(_T_12880, _T_12887) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_1 = or(_T_12888, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12889 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12890 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12891 = eq(_T_12890, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12892 = and(_T_12889, _T_12891) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12893 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12894 = eq(_T_12893, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12895 = and(_T_12892, _T_12894) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12896 = or(_T_12895, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12897 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12898 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12899 = eq(_T_12898, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12900 = and(_T_12897, _T_12899) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12901 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12902 = eq(_T_12901, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12903 = and(_T_12900, _T_12902) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12904 = or(_T_12896, _T_12903) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_2 = or(_T_12904, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12905 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12906 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12907 = eq(_T_12906, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12908 = and(_T_12905, _T_12907) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12909 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12910 = eq(_T_12909, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12911 = and(_T_12908, _T_12910) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12912 = or(_T_12911, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12913 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12914 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12915 = eq(_T_12914, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12916 = and(_T_12913, _T_12915) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12917 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12918 = eq(_T_12917, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12919 = and(_T_12916, _T_12918) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12920 = or(_T_12912, _T_12919) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_3 = or(_T_12920, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12921 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12922 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12923 = eq(_T_12922, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12924 = and(_T_12921, _T_12923) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12925 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12926 = eq(_T_12925, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12927 = and(_T_12924, _T_12926) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12928 = or(_T_12927, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12929 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12930 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12931 = eq(_T_12930, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12932 = and(_T_12929, _T_12931) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12933 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12934 = eq(_T_12933, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12935 = and(_T_12932, _T_12934) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12936 = or(_T_12928, _T_12935) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_4 = or(_T_12936, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12937 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12938 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12939 = eq(_T_12938, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12940 = and(_T_12937, _T_12939) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12941 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12942 = eq(_T_12941, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12943 = and(_T_12940, _T_12942) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12944 = or(_T_12943, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12945 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12946 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12947 = eq(_T_12946, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12948 = and(_T_12945, _T_12947) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12949 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12950 = eq(_T_12949, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12951 = and(_T_12948, _T_12950) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12952 = or(_T_12944, _T_12951) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_5 = or(_T_12952, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12953 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12954 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12955 = eq(_T_12954, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12956 = and(_T_12953, _T_12955) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12957 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12958 = eq(_T_12957, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12959 = and(_T_12956, _T_12958) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12960 = or(_T_12959, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12961 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12962 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12963 = eq(_T_12962, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12964 = and(_T_12961, _T_12963) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12965 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12966 = eq(_T_12965, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12967 = and(_T_12964, _T_12966) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12968 = or(_T_12960, _T_12967) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_6 = or(_T_12968, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12969 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12970 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12971 = eq(_T_12970, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12972 = and(_T_12969, _T_12971) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12973 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12974 = eq(_T_12973, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12975 = and(_T_12972, _T_12974) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12976 = or(_T_12975, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12977 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12978 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12979 = eq(_T_12978, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12980 = and(_T_12977, _T_12979) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12981 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12982 = eq(_T_12981, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12983 = and(_T_12980, _T_12982) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_12984 = or(_T_12976, _T_12983) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_7 = or(_T_12984, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_12985 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_12986 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_12987 = eq(_T_12986, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_12988 = and(_T_12985, _T_12987) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_12989 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_12990 = eq(_T_12989, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_12991 = and(_T_12988, _T_12990) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_12992 = or(_T_12991, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_12993 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_12994 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_12995 = eq(_T_12994, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_12996 = and(_T_12993, _T_12995) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_12997 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_12998 = eq(_T_12997, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_12999 = and(_T_12996, _T_12998) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13000 = or(_T_12992, _T_12999) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_8 = or(_T_13000, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13001 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13002 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13003 = eq(_T_13002, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13004 = and(_T_13001, _T_13003) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13005 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13006 = eq(_T_13005, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13007 = and(_T_13004, _T_13006) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13008 = or(_T_13007, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13009 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13010 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13011 = eq(_T_13010, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13012 = and(_T_13009, _T_13011) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13013 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13014 = eq(_T_13013, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13015 = and(_T_13012, _T_13014) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13016 = or(_T_13008, _T_13015) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_9 = or(_T_13016, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13017 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13018 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13019 = eq(_T_13018, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13020 = and(_T_13017, _T_13019) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13021 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13022 = eq(_T_13021, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13023 = and(_T_13020, _T_13022) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13024 = or(_T_13023, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13025 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13026 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13027 = eq(_T_13026, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13028 = and(_T_13025, _T_13027) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13029 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13030 = eq(_T_13029, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13031 = and(_T_13028, _T_13030) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13032 = or(_T_13024, _T_13031) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_10 = or(_T_13032, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13033 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13034 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13035 = eq(_T_13034, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13036 = and(_T_13033, _T_13035) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13037 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13038 = eq(_T_13037, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13039 = and(_T_13036, _T_13038) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13040 = or(_T_13039, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13041 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13042 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13043 = eq(_T_13042, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13044 = and(_T_13041, _T_13043) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13045 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13046 = eq(_T_13045, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13047 = and(_T_13044, _T_13046) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13048 = or(_T_13040, _T_13047) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_11 = or(_T_13048, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13049 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13050 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13051 = eq(_T_13050, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13052 = and(_T_13049, _T_13051) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13053 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13054 = eq(_T_13053, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13055 = and(_T_13052, _T_13054) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13056 = or(_T_13055, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13057 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13058 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13059 = eq(_T_13058, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13060 = and(_T_13057, _T_13059) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13061 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13062 = eq(_T_13061, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13063 = and(_T_13060, _T_13062) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13064 = or(_T_13056, _T_13063) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_12 = or(_T_13064, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13065 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13066 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13067 = eq(_T_13066, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13068 = and(_T_13065, _T_13067) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13069 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13070 = eq(_T_13069, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13071 = and(_T_13068, _T_13070) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13072 = or(_T_13071, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13073 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13074 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13075 = eq(_T_13074, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13076 = and(_T_13073, _T_13075) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13077 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13078 = eq(_T_13077, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13079 = and(_T_13076, _T_13078) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13080 = or(_T_13072, _T_13079) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_13 = or(_T_13080, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13081 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13082 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13083 = eq(_T_13082, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13084 = and(_T_13081, _T_13083) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13085 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13086 = eq(_T_13085, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13087 = and(_T_13084, _T_13086) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13088 = or(_T_13087, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13089 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13090 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13091 = eq(_T_13090, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13092 = and(_T_13089, _T_13091) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13093 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13094 = eq(_T_13093, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13095 = and(_T_13092, _T_13094) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13096 = or(_T_13088, _T_13095) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_14 = or(_T_13096, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13097 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13098 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13099 = eq(_T_13098, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13100 = and(_T_13097, _T_13099) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13101 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13102 = eq(_T_13101, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13103 = and(_T_13100, _T_13102) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13104 = or(_T_13103, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13105 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13106 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13107 = eq(_T_13106, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13108 = and(_T_13105, _T_13107) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13109 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13110 = eq(_T_13109, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13111 = and(_T_13108, _T_13110) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13112 = or(_T_13104, _T_13111) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_8_15 = or(_T_13112, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13113 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13114 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13115 = eq(_T_13114, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13116 = and(_T_13113, _T_13115) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13117 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13118 = eq(_T_13117, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13119 = and(_T_13116, _T_13118) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13120 = or(_T_13119, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13121 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13122 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13123 = eq(_T_13122, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13124 = and(_T_13121, _T_13123) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13125 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13126 = eq(_T_13125, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13127 = and(_T_13124, _T_13126) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13128 = or(_T_13120, _T_13127) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_0 = or(_T_13128, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13129 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13130 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13131 = eq(_T_13130, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13132 = and(_T_13129, _T_13131) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13133 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13134 = eq(_T_13133, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13135 = and(_T_13132, _T_13134) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13136 = or(_T_13135, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13137 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13138 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13139 = eq(_T_13138, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13140 = and(_T_13137, _T_13139) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13141 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13142 = eq(_T_13141, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13143 = and(_T_13140, _T_13142) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13144 = or(_T_13136, _T_13143) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_1 = or(_T_13144, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13145 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13146 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13147 = eq(_T_13146, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13148 = and(_T_13145, _T_13147) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13149 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13150 = eq(_T_13149, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13151 = and(_T_13148, _T_13150) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13152 = or(_T_13151, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13153 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13154 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13155 = eq(_T_13154, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13156 = and(_T_13153, _T_13155) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13157 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13158 = eq(_T_13157, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13159 = and(_T_13156, _T_13158) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13160 = or(_T_13152, _T_13159) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_2 = or(_T_13160, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13161 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13162 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13163 = eq(_T_13162, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13164 = and(_T_13161, _T_13163) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13165 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13166 = eq(_T_13165, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13167 = and(_T_13164, _T_13166) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13168 = or(_T_13167, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13169 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13170 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13171 = eq(_T_13170, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13172 = and(_T_13169, _T_13171) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13173 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13174 = eq(_T_13173, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13175 = and(_T_13172, _T_13174) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13176 = or(_T_13168, _T_13175) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_3 = or(_T_13176, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13177 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13178 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13179 = eq(_T_13178, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13180 = and(_T_13177, _T_13179) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13181 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13182 = eq(_T_13181, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13183 = and(_T_13180, _T_13182) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13184 = or(_T_13183, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13185 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13186 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13187 = eq(_T_13186, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13188 = and(_T_13185, _T_13187) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13189 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13190 = eq(_T_13189, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13191 = and(_T_13188, _T_13190) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13192 = or(_T_13184, _T_13191) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_4 = or(_T_13192, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13193 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13194 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13195 = eq(_T_13194, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13196 = and(_T_13193, _T_13195) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13197 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13198 = eq(_T_13197, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13199 = and(_T_13196, _T_13198) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13200 = or(_T_13199, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13201 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13202 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13203 = eq(_T_13202, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13204 = and(_T_13201, _T_13203) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13205 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13206 = eq(_T_13205, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13207 = and(_T_13204, _T_13206) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13208 = or(_T_13200, _T_13207) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_5 = or(_T_13208, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13209 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13210 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13211 = eq(_T_13210, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13212 = and(_T_13209, _T_13211) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13213 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13214 = eq(_T_13213, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13215 = and(_T_13212, _T_13214) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13216 = or(_T_13215, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13217 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13218 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13219 = eq(_T_13218, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13220 = and(_T_13217, _T_13219) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13221 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13222 = eq(_T_13221, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13223 = and(_T_13220, _T_13222) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13224 = or(_T_13216, _T_13223) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_6 = or(_T_13224, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13225 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13226 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13227 = eq(_T_13226, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13228 = and(_T_13225, _T_13227) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13229 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13230 = eq(_T_13229, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13231 = and(_T_13228, _T_13230) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13232 = or(_T_13231, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13233 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13234 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13235 = eq(_T_13234, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13236 = and(_T_13233, _T_13235) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13237 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13238 = eq(_T_13237, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13239 = and(_T_13236, _T_13238) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13240 = or(_T_13232, _T_13239) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_7 = or(_T_13240, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13241 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13242 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13243 = eq(_T_13242, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13244 = and(_T_13241, _T_13243) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13245 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13246 = eq(_T_13245, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13247 = and(_T_13244, _T_13246) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13248 = or(_T_13247, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13249 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13250 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13251 = eq(_T_13250, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13252 = and(_T_13249, _T_13251) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13253 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13254 = eq(_T_13253, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13255 = and(_T_13252, _T_13254) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13256 = or(_T_13248, _T_13255) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_8 = or(_T_13256, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13257 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13258 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13259 = eq(_T_13258, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13260 = and(_T_13257, _T_13259) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13261 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13262 = eq(_T_13261, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13263 = and(_T_13260, _T_13262) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13264 = or(_T_13263, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13265 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13266 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13267 = eq(_T_13266, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13268 = and(_T_13265, _T_13267) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13269 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13270 = eq(_T_13269, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13271 = and(_T_13268, _T_13270) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13272 = or(_T_13264, _T_13271) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_9 = or(_T_13272, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13273 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13274 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13275 = eq(_T_13274, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13276 = and(_T_13273, _T_13275) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13277 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13278 = eq(_T_13277, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13279 = and(_T_13276, _T_13278) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13280 = or(_T_13279, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13281 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13282 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13283 = eq(_T_13282, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13284 = and(_T_13281, _T_13283) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13285 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13286 = eq(_T_13285, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13287 = and(_T_13284, _T_13286) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13288 = or(_T_13280, _T_13287) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_10 = or(_T_13288, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13289 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13290 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13291 = eq(_T_13290, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13292 = and(_T_13289, _T_13291) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13293 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13294 = eq(_T_13293, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13295 = and(_T_13292, _T_13294) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13296 = or(_T_13295, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13297 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13298 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13299 = eq(_T_13298, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13300 = and(_T_13297, _T_13299) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13301 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13302 = eq(_T_13301, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13303 = and(_T_13300, _T_13302) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13304 = or(_T_13296, _T_13303) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_11 = or(_T_13304, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13305 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13306 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13307 = eq(_T_13306, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13308 = and(_T_13305, _T_13307) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13309 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13310 = eq(_T_13309, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13311 = and(_T_13308, _T_13310) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13312 = or(_T_13311, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13313 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13314 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13315 = eq(_T_13314, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13316 = and(_T_13313, _T_13315) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13317 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13318 = eq(_T_13317, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13319 = and(_T_13316, _T_13318) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13320 = or(_T_13312, _T_13319) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_12 = or(_T_13320, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13321 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13322 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13323 = eq(_T_13322, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13324 = and(_T_13321, _T_13323) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13325 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13326 = eq(_T_13325, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13327 = and(_T_13324, _T_13326) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13328 = or(_T_13327, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13329 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13330 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13331 = eq(_T_13330, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13332 = and(_T_13329, _T_13331) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13333 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13334 = eq(_T_13333, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13335 = and(_T_13332, _T_13334) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13336 = or(_T_13328, _T_13335) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_13 = or(_T_13336, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13337 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13338 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13339 = eq(_T_13338, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13340 = and(_T_13337, _T_13339) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13341 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13342 = eq(_T_13341, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13343 = and(_T_13340, _T_13342) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13344 = or(_T_13343, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13345 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13346 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13347 = eq(_T_13346, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13348 = and(_T_13345, _T_13347) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13349 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13350 = eq(_T_13349, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13351 = and(_T_13348, _T_13350) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13352 = or(_T_13344, _T_13351) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_14 = or(_T_13352, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13353 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13354 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13355 = eq(_T_13354, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13356 = and(_T_13353, _T_13355) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13357 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13358 = eq(_T_13357, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13359 = and(_T_13356, _T_13358) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13360 = or(_T_13359, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13361 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13362 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13363 = eq(_T_13362, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13364 = and(_T_13361, _T_13363) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13365 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13366 = eq(_T_13365, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13367 = and(_T_13364, _T_13366) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13368 = or(_T_13360, _T_13367) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_9_15 = or(_T_13368, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13369 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13370 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13371 = eq(_T_13370, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13372 = and(_T_13369, _T_13371) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13373 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13374 = eq(_T_13373, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13375 = and(_T_13372, _T_13374) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13376 = or(_T_13375, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13377 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13378 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13379 = eq(_T_13378, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13380 = and(_T_13377, _T_13379) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13381 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13382 = eq(_T_13381, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13383 = and(_T_13380, _T_13382) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13384 = or(_T_13376, _T_13383) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_0 = or(_T_13384, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13385 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13386 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13387 = eq(_T_13386, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13388 = and(_T_13385, _T_13387) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13389 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13390 = eq(_T_13389, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13391 = and(_T_13388, _T_13390) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13392 = or(_T_13391, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13393 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13394 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13395 = eq(_T_13394, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13396 = and(_T_13393, _T_13395) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13397 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13398 = eq(_T_13397, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13399 = and(_T_13396, _T_13398) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13400 = or(_T_13392, _T_13399) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_1 = or(_T_13400, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13401 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13402 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13403 = eq(_T_13402, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13404 = and(_T_13401, _T_13403) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13405 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13406 = eq(_T_13405, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13407 = and(_T_13404, _T_13406) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13408 = or(_T_13407, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13409 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13410 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13411 = eq(_T_13410, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13412 = and(_T_13409, _T_13411) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13413 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13414 = eq(_T_13413, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13415 = and(_T_13412, _T_13414) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13416 = or(_T_13408, _T_13415) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_2 = or(_T_13416, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13417 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13418 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13419 = eq(_T_13418, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13420 = and(_T_13417, _T_13419) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13421 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13422 = eq(_T_13421, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13423 = and(_T_13420, _T_13422) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13424 = or(_T_13423, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13425 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13426 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13427 = eq(_T_13426, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13428 = and(_T_13425, _T_13427) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13429 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13430 = eq(_T_13429, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13431 = and(_T_13428, _T_13430) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13432 = or(_T_13424, _T_13431) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_3 = or(_T_13432, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13433 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13434 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13435 = eq(_T_13434, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13436 = and(_T_13433, _T_13435) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13437 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13438 = eq(_T_13437, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13439 = and(_T_13436, _T_13438) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13440 = or(_T_13439, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13441 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13442 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13443 = eq(_T_13442, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13444 = and(_T_13441, _T_13443) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13445 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13446 = eq(_T_13445, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13447 = and(_T_13444, _T_13446) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13448 = or(_T_13440, _T_13447) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_4 = or(_T_13448, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13449 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13450 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13451 = eq(_T_13450, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13452 = and(_T_13449, _T_13451) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13453 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13454 = eq(_T_13453, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13455 = and(_T_13452, _T_13454) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13456 = or(_T_13455, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13457 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13458 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13459 = eq(_T_13458, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13460 = and(_T_13457, _T_13459) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13461 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13462 = eq(_T_13461, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13463 = and(_T_13460, _T_13462) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13464 = or(_T_13456, _T_13463) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_5 = or(_T_13464, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13465 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13466 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13467 = eq(_T_13466, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13468 = and(_T_13465, _T_13467) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13469 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13470 = eq(_T_13469, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13471 = and(_T_13468, _T_13470) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13472 = or(_T_13471, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13473 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13474 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13475 = eq(_T_13474, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13476 = and(_T_13473, _T_13475) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13477 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13478 = eq(_T_13477, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13479 = and(_T_13476, _T_13478) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13480 = or(_T_13472, _T_13479) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_6 = or(_T_13480, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13481 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13482 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13483 = eq(_T_13482, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13484 = and(_T_13481, _T_13483) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13485 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13486 = eq(_T_13485, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13487 = and(_T_13484, _T_13486) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13488 = or(_T_13487, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13489 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13490 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13491 = eq(_T_13490, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13492 = and(_T_13489, _T_13491) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13493 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13494 = eq(_T_13493, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13495 = and(_T_13492, _T_13494) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13496 = or(_T_13488, _T_13495) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_7 = or(_T_13496, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13497 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13498 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13499 = eq(_T_13498, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13500 = and(_T_13497, _T_13499) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13501 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13502 = eq(_T_13501, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13503 = and(_T_13500, _T_13502) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13504 = or(_T_13503, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13505 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13506 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13507 = eq(_T_13506, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13508 = and(_T_13505, _T_13507) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13509 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13510 = eq(_T_13509, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13511 = and(_T_13508, _T_13510) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13512 = or(_T_13504, _T_13511) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_8 = or(_T_13512, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13513 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13514 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13515 = eq(_T_13514, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13516 = and(_T_13513, _T_13515) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13517 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13518 = eq(_T_13517, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13519 = and(_T_13516, _T_13518) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13520 = or(_T_13519, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13521 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13522 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13523 = eq(_T_13522, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13524 = and(_T_13521, _T_13523) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13525 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13526 = eq(_T_13525, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13527 = and(_T_13524, _T_13526) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13528 = or(_T_13520, _T_13527) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_9 = or(_T_13528, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13529 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13530 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13531 = eq(_T_13530, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13532 = and(_T_13529, _T_13531) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13533 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13534 = eq(_T_13533, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13535 = and(_T_13532, _T_13534) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13536 = or(_T_13535, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13537 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13538 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13539 = eq(_T_13538, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13540 = and(_T_13537, _T_13539) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13541 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13542 = eq(_T_13541, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13543 = and(_T_13540, _T_13542) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13544 = or(_T_13536, _T_13543) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_10 = or(_T_13544, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13545 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13546 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13547 = eq(_T_13546, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13548 = and(_T_13545, _T_13547) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13549 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13550 = eq(_T_13549, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13551 = and(_T_13548, _T_13550) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13552 = or(_T_13551, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13553 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13554 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13555 = eq(_T_13554, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13556 = and(_T_13553, _T_13555) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13557 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13558 = eq(_T_13557, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13559 = and(_T_13556, _T_13558) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13560 = or(_T_13552, _T_13559) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_11 = or(_T_13560, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13561 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13562 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13563 = eq(_T_13562, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13564 = and(_T_13561, _T_13563) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13565 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13566 = eq(_T_13565, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13567 = and(_T_13564, _T_13566) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13568 = or(_T_13567, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13569 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13570 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13571 = eq(_T_13570, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13572 = and(_T_13569, _T_13571) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13573 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13574 = eq(_T_13573, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13575 = and(_T_13572, _T_13574) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13576 = or(_T_13568, _T_13575) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_12 = or(_T_13576, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13577 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13578 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13579 = eq(_T_13578, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13580 = and(_T_13577, _T_13579) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13581 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13582 = eq(_T_13581, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13583 = and(_T_13580, _T_13582) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13584 = or(_T_13583, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13585 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13586 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13587 = eq(_T_13586, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13588 = and(_T_13585, _T_13587) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13589 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13590 = eq(_T_13589, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13591 = and(_T_13588, _T_13590) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13592 = or(_T_13584, _T_13591) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_13 = or(_T_13592, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13593 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13594 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13595 = eq(_T_13594, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13596 = and(_T_13593, _T_13595) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13597 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13598 = eq(_T_13597, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13599 = and(_T_13596, _T_13598) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13600 = or(_T_13599, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13601 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13602 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13603 = eq(_T_13602, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13604 = and(_T_13601, _T_13603) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13605 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13606 = eq(_T_13605, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13607 = and(_T_13604, _T_13606) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13608 = or(_T_13600, _T_13607) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_14 = or(_T_13608, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13609 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13610 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13611 = eq(_T_13610, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13612 = and(_T_13609, _T_13611) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13613 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13614 = eq(_T_13613, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13615 = and(_T_13612, _T_13614) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13616 = or(_T_13615, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13617 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13618 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13619 = eq(_T_13618, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13620 = and(_T_13617, _T_13619) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13621 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13622 = eq(_T_13621, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13623 = and(_T_13620, _T_13622) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13624 = or(_T_13616, _T_13623) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_10_15 = or(_T_13624, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13625 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13626 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13627 = eq(_T_13626, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13628 = and(_T_13625, _T_13627) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13629 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13630 = eq(_T_13629, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13631 = and(_T_13628, _T_13630) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13632 = or(_T_13631, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13633 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13634 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13635 = eq(_T_13634, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13636 = and(_T_13633, _T_13635) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13637 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13638 = eq(_T_13637, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13639 = and(_T_13636, _T_13638) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13640 = or(_T_13632, _T_13639) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_0 = or(_T_13640, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13641 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13642 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13643 = eq(_T_13642, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13644 = and(_T_13641, _T_13643) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13645 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13646 = eq(_T_13645, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13647 = and(_T_13644, _T_13646) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13648 = or(_T_13647, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13649 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13650 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13651 = eq(_T_13650, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13652 = and(_T_13649, _T_13651) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13653 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13654 = eq(_T_13653, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13655 = and(_T_13652, _T_13654) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13656 = or(_T_13648, _T_13655) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_1 = or(_T_13656, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13657 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13658 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13659 = eq(_T_13658, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13660 = and(_T_13657, _T_13659) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13661 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13662 = eq(_T_13661, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13663 = and(_T_13660, _T_13662) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13664 = or(_T_13663, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13665 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13666 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13667 = eq(_T_13666, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13668 = and(_T_13665, _T_13667) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13669 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13670 = eq(_T_13669, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13671 = and(_T_13668, _T_13670) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13672 = or(_T_13664, _T_13671) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_2 = or(_T_13672, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13673 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13674 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13675 = eq(_T_13674, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13676 = and(_T_13673, _T_13675) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13677 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13678 = eq(_T_13677, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13679 = and(_T_13676, _T_13678) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13680 = or(_T_13679, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13681 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13682 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13683 = eq(_T_13682, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13684 = and(_T_13681, _T_13683) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13685 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13686 = eq(_T_13685, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13687 = and(_T_13684, _T_13686) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13688 = or(_T_13680, _T_13687) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_3 = or(_T_13688, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13689 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13690 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13691 = eq(_T_13690, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13692 = and(_T_13689, _T_13691) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13693 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13694 = eq(_T_13693, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13695 = and(_T_13692, _T_13694) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13696 = or(_T_13695, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13697 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13698 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13699 = eq(_T_13698, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13700 = and(_T_13697, _T_13699) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13701 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13702 = eq(_T_13701, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13703 = and(_T_13700, _T_13702) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13704 = or(_T_13696, _T_13703) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_4 = or(_T_13704, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13705 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13706 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13707 = eq(_T_13706, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13708 = and(_T_13705, _T_13707) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13709 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13710 = eq(_T_13709, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13711 = and(_T_13708, _T_13710) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13712 = or(_T_13711, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13713 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13714 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13715 = eq(_T_13714, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13716 = and(_T_13713, _T_13715) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13717 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13718 = eq(_T_13717, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13719 = and(_T_13716, _T_13718) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13720 = or(_T_13712, _T_13719) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_5 = or(_T_13720, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13721 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13722 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13723 = eq(_T_13722, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13724 = and(_T_13721, _T_13723) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13725 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13726 = eq(_T_13725, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13727 = and(_T_13724, _T_13726) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13728 = or(_T_13727, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13729 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13730 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13731 = eq(_T_13730, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13732 = and(_T_13729, _T_13731) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13733 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13734 = eq(_T_13733, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13735 = and(_T_13732, _T_13734) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13736 = or(_T_13728, _T_13735) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_6 = or(_T_13736, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13737 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13738 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13739 = eq(_T_13738, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13740 = and(_T_13737, _T_13739) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13741 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13742 = eq(_T_13741, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13743 = and(_T_13740, _T_13742) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13744 = or(_T_13743, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13745 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13746 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13747 = eq(_T_13746, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13748 = and(_T_13745, _T_13747) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13749 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13750 = eq(_T_13749, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13751 = and(_T_13748, _T_13750) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13752 = or(_T_13744, _T_13751) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_7 = or(_T_13752, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13753 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13754 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13755 = eq(_T_13754, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13756 = and(_T_13753, _T_13755) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13757 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13758 = eq(_T_13757, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13759 = and(_T_13756, _T_13758) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13760 = or(_T_13759, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13761 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13762 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13763 = eq(_T_13762, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13764 = and(_T_13761, _T_13763) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13765 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13766 = eq(_T_13765, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13767 = and(_T_13764, _T_13766) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13768 = or(_T_13760, _T_13767) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_8 = or(_T_13768, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13769 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13770 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13771 = eq(_T_13770, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13772 = and(_T_13769, _T_13771) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13773 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13774 = eq(_T_13773, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13775 = and(_T_13772, _T_13774) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13776 = or(_T_13775, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13777 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13778 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13779 = eq(_T_13778, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13780 = and(_T_13777, _T_13779) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13781 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13782 = eq(_T_13781, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13783 = and(_T_13780, _T_13782) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13784 = or(_T_13776, _T_13783) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_9 = or(_T_13784, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13785 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13786 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13787 = eq(_T_13786, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13788 = and(_T_13785, _T_13787) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13789 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13790 = eq(_T_13789, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13791 = and(_T_13788, _T_13790) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13792 = or(_T_13791, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13793 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13794 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13795 = eq(_T_13794, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13796 = and(_T_13793, _T_13795) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13797 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13798 = eq(_T_13797, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13799 = and(_T_13796, _T_13798) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13800 = or(_T_13792, _T_13799) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_10 = or(_T_13800, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13801 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13802 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13803 = eq(_T_13802, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13804 = and(_T_13801, _T_13803) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13805 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13806 = eq(_T_13805, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13807 = and(_T_13804, _T_13806) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13808 = or(_T_13807, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13809 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13810 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13811 = eq(_T_13810, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13812 = and(_T_13809, _T_13811) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13813 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13814 = eq(_T_13813, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13815 = and(_T_13812, _T_13814) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13816 = or(_T_13808, _T_13815) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_11 = or(_T_13816, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13817 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13818 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13819 = eq(_T_13818, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13820 = and(_T_13817, _T_13819) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13821 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13822 = eq(_T_13821, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13823 = and(_T_13820, _T_13822) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13824 = or(_T_13823, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13825 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13826 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13827 = eq(_T_13826, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13828 = and(_T_13825, _T_13827) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13829 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13830 = eq(_T_13829, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13831 = and(_T_13828, _T_13830) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13832 = or(_T_13824, _T_13831) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_12 = or(_T_13832, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13833 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13834 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13835 = eq(_T_13834, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13836 = and(_T_13833, _T_13835) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13837 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13838 = eq(_T_13837, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13839 = and(_T_13836, _T_13838) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13840 = or(_T_13839, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13841 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13842 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13843 = eq(_T_13842, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13844 = and(_T_13841, _T_13843) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13845 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13846 = eq(_T_13845, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13847 = and(_T_13844, _T_13846) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13848 = or(_T_13840, _T_13847) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_13 = or(_T_13848, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13849 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13850 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13851 = eq(_T_13850, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13852 = and(_T_13849, _T_13851) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13853 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13854 = eq(_T_13853, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13855 = and(_T_13852, _T_13854) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13856 = or(_T_13855, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13857 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13858 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13859 = eq(_T_13858, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13860 = and(_T_13857, _T_13859) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13861 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13862 = eq(_T_13861, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13863 = and(_T_13860, _T_13862) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13864 = or(_T_13856, _T_13863) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_14 = or(_T_13864, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13865 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13866 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13867 = eq(_T_13866, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13868 = and(_T_13865, _T_13867) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13869 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13870 = eq(_T_13869, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13871 = and(_T_13868, _T_13870) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13872 = or(_T_13871, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13873 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13874 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13875 = eq(_T_13874, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13876 = and(_T_13873, _T_13875) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13877 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13878 = eq(_T_13877, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13879 = and(_T_13876, _T_13878) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13880 = or(_T_13872, _T_13879) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_11_15 = or(_T_13880, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13881 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13882 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13883 = eq(_T_13882, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13884 = and(_T_13881, _T_13883) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13885 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13886 = eq(_T_13885, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13887 = and(_T_13884, _T_13886) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13888 = or(_T_13887, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13889 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13890 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13891 = eq(_T_13890, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13892 = and(_T_13889, _T_13891) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13893 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13894 = eq(_T_13893, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13895 = and(_T_13892, _T_13894) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13896 = or(_T_13888, _T_13895) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_0 = or(_T_13896, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13897 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13898 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13899 = eq(_T_13898, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13900 = and(_T_13897, _T_13899) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13901 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13902 = eq(_T_13901, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13903 = and(_T_13900, _T_13902) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13904 = or(_T_13903, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13905 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13906 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13907 = eq(_T_13906, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13908 = and(_T_13905, _T_13907) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13909 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13910 = eq(_T_13909, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13911 = and(_T_13908, _T_13910) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13912 = or(_T_13904, _T_13911) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_1 = or(_T_13912, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13913 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13914 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13915 = eq(_T_13914, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13916 = and(_T_13913, _T_13915) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13917 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13918 = eq(_T_13917, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13919 = and(_T_13916, _T_13918) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13920 = or(_T_13919, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13921 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13922 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13923 = eq(_T_13922, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13924 = and(_T_13921, _T_13923) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13925 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13926 = eq(_T_13925, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13927 = and(_T_13924, _T_13926) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13928 = or(_T_13920, _T_13927) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_2 = or(_T_13928, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13929 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13930 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13931 = eq(_T_13930, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13932 = and(_T_13929, _T_13931) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13933 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13934 = eq(_T_13933, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13935 = and(_T_13932, _T_13934) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13936 = or(_T_13935, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13937 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13938 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13939 = eq(_T_13938, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13940 = and(_T_13937, _T_13939) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13941 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13942 = eq(_T_13941, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13943 = and(_T_13940, _T_13942) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13944 = or(_T_13936, _T_13943) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_3 = or(_T_13944, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13945 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13946 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13947 = eq(_T_13946, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13948 = and(_T_13945, _T_13947) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13949 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13950 = eq(_T_13949, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13951 = and(_T_13948, _T_13950) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13952 = or(_T_13951, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13953 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13954 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13955 = eq(_T_13954, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13956 = and(_T_13953, _T_13955) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13957 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13958 = eq(_T_13957, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13959 = and(_T_13956, _T_13958) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13960 = or(_T_13952, _T_13959) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_4 = or(_T_13960, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13961 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13962 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13963 = eq(_T_13962, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13964 = and(_T_13961, _T_13963) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13965 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13966 = eq(_T_13965, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13967 = and(_T_13964, _T_13966) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13968 = or(_T_13967, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13969 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13970 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13971 = eq(_T_13970, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13972 = and(_T_13969, _T_13971) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13973 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13974 = eq(_T_13973, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13975 = and(_T_13972, _T_13974) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13976 = or(_T_13968, _T_13975) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_5 = or(_T_13976, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13977 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13978 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13979 = eq(_T_13978, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13980 = and(_T_13977, _T_13979) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13981 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13982 = eq(_T_13981, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13983 = and(_T_13980, _T_13982) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_13984 = or(_T_13983, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_13985 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_13986 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_13987 = eq(_T_13986, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_13988 = and(_T_13985, _T_13987) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_13989 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_13990 = eq(_T_13989, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_13991 = and(_T_13988, _T_13990) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_13992 = or(_T_13984, _T_13991) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_6 = or(_T_13992, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_13993 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_13994 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_13995 = eq(_T_13994, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_13996 = and(_T_13993, _T_13995) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_13997 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_13998 = eq(_T_13997, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_13999 = and(_T_13996, _T_13998) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14000 = or(_T_13999, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14001 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14002 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14003 = eq(_T_14002, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14004 = and(_T_14001, _T_14003) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14005 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14006 = eq(_T_14005, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14007 = and(_T_14004, _T_14006) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14008 = or(_T_14000, _T_14007) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_7 = or(_T_14008, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14009 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14010 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14011 = eq(_T_14010, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14012 = and(_T_14009, _T_14011) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14013 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14014 = eq(_T_14013, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14015 = and(_T_14012, _T_14014) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14016 = or(_T_14015, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14017 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14018 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14019 = eq(_T_14018, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14020 = and(_T_14017, _T_14019) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14021 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14022 = eq(_T_14021, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14023 = and(_T_14020, _T_14022) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14024 = or(_T_14016, _T_14023) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_8 = or(_T_14024, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14025 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14026 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14027 = eq(_T_14026, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14028 = and(_T_14025, _T_14027) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14029 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14030 = eq(_T_14029, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14031 = and(_T_14028, _T_14030) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14032 = or(_T_14031, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14033 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14034 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14035 = eq(_T_14034, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14036 = and(_T_14033, _T_14035) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14037 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14038 = eq(_T_14037, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14039 = and(_T_14036, _T_14038) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14040 = or(_T_14032, _T_14039) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_9 = or(_T_14040, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14041 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14042 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14043 = eq(_T_14042, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14044 = and(_T_14041, _T_14043) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14045 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14046 = eq(_T_14045, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14047 = and(_T_14044, _T_14046) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14048 = or(_T_14047, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14049 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14050 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14051 = eq(_T_14050, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14052 = and(_T_14049, _T_14051) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14053 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14054 = eq(_T_14053, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14055 = and(_T_14052, _T_14054) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14056 = or(_T_14048, _T_14055) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_10 = or(_T_14056, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14057 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14058 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14059 = eq(_T_14058, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14060 = and(_T_14057, _T_14059) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14061 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14062 = eq(_T_14061, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14063 = and(_T_14060, _T_14062) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14064 = or(_T_14063, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14065 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14066 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14067 = eq(_T_14066, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14068 = and(_T_14065, _T_14067) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14069 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14070 = eq(_T_14069, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14071 = and(_T_14068, _T_14070) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14072 = or(_T_14064, _T_14071) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_11 = or(_T_14072, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14073 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14074 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14075 = eq(_T_14074, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14076 = and(_T_14073, _T_14075) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14077 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14078 = eq(_T_14077, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14079 = and(_T_14076, _T_14078) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14080 = or(_T_14079, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14081 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14082 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14083 = eq(_T_14082, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14084 = and(_T_14081, _T_14083) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14085 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14086 = eq(_T_14085, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14087 = and(_T_14084, _T_14086) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14088 = or(_T_14080, _T_14087) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_12 = or(_T_14088, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14089 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14090 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14091 = eq(_T_14090, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14092 = and(_T_14089, _T_14091) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14093 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14094 = eq(_T_14093, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14095 = and(_T_14092, _T_14094) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14096 = or(_T_14095, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14097 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14098 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14099 = eq(_T_14098, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14100 = and(_T_14097, _T_14099) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14101 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14102 = eq(_T_14101, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14103 = and(_T_14100, _T_14102) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14104 = or(_T_14096, _T_14103) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_13 = or(_T_14104, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14105 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14106 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14107 = eq(_T_14106, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14108 = and(_T_14105, _T_14107) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14109 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14110 = eq(_T_14109, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14111 = and(_T_14108, _T_14110) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14112 = or(_T_14111, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14113 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14114 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14115 = eq(_T_14114, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14116 = and(_T_14113, _T_14115) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14117 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14118 = eq(_T_14117, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14119 = and(_T_14116, _T_14118) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14120 = or(_T_14112, _T_14119) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_14 = or(_T_14120, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14121 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14122 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14123 = eq(_T_14122, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14124 = and(_T_14121, _T_14123) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14125 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14126 = eq(_T_14125, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14127 = and(_T_14124, _T_14126) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14128 = or(_T_14127, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14129 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14130 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14131 = eq(_T_14130, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14132 = and(_T_14129, _T_14131) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14133 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14134 = eq(_T_14133, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14135 = and(_T_14132, _T_14134) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14136 = or(_T_14128, _T_14135) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_12_15 = or(_T_14136, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14137 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14138 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14139 = eq(_T_14138, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14140 = and(_T_14137, _T_14139) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14141 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14142 = eq(_T_14141, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14143 = and(_T_14140, _T_14142) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14144 = or(_T_14143, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14145 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14146 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14147 = eq(_T_14146, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14148 = and(_T_14145, _T_14147) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14149 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14150 = eq(_T_14149, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14151 = and(_T_14148, _T_14150) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14152 = or(_T_14144, _T_14151) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_0 = or(_T_14152, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14153 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14154 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14155 = eq(_T_14154, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14156 = and(_T_14153, _T_14155) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14157 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14158 = eq(_T_14157, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14159 = and(_T_14156, _T_14158) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14160 = or(_T_14159, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14161 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14162 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14163 = eq(_T_14162, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14164 = and(_T_14161, _T_14163) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14165 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14166 = eq(_T_14165, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14167 = and(_T_14164, _T_14166) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14168 = or(_T_14160, _T_14167) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_1 = or(_T_14168, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14169 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14170 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14171 = eq(_T_14170, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14172 = and(_T_14169, _T_14171) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14173 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14174 = eq(_T_14173, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14175 = and(_T_14172, _T_14174) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14176 = or(_T_14175, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14177 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14178 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14179 = eq(_T_14178, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14180 = and(_T_14177, _T_14179) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14181 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14182 = eq(_T_14181, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14183 = and(_T_14180, _T_14182) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14184 = or(_T_14176, _T_14183) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_2 = or(_T_14184, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14185 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14186 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14187 = eq(_T_14186, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14188 = and(_T_14185, _T_14187) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14189 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14190 = eq(_T_14189, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14191 = and(_T_14188, _T_14190) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14192 = or(_T_14191, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14193 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14194 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14195 = eq(_T_14194, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14196 = and(_T_14193, _T_14195) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14197 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14198 = eq(_T_14197, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14199 = and(_T_14196, _T_14198) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14200 = or(_T_14192, _T_14199) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_3 = or(_T_14200, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14201 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14202 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14203 = eq(_T_14202, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14204 = and(_T_14201, _T_14203) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14205 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14206 = eq(_T_14205, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14207 = and(_T_14204, _T_14206) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14208 = or(_T_14207, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14209 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14210 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14211 = eq(_T_14210, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14212 = and(_T_14209, _T_14211) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14213 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14214 = eq(_T_14213, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14215 = and(_T_14212, _T_14214) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14216 = or(_T_14208, _T_14215) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_4 = or(_T_14216, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14217 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14218 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14219 = eq(_T_14218, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14220 = and(_T_14217, _T_14219) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14221 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14222 = eq(_T_14221, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14223 = and(_T_14220, _T_14222) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14224 = or(_T_14223, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14225 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14226 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14227 = eq(_T_14226, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14228 = and(_T_14225, _T_14227) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14229 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14230 = eq(_T_14229, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14231 = and(_T_14228, _T_14230) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14232 = or(_T_14224, _T_14231) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_5 = or(_T_14232, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14233 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14234 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14235 = eq(_T_14234, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14236 = and(_T_14233, _T_14235) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14237 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14238 = eq(_T_14237, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14239 = and(_T_14236, _T_14238) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14240 = or(_T_14239, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14241 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14242 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14243 = eq(_T_14242, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14244 = and(_T_14241, _T_14243) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14245 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14246 = eq(_T_14245, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14247 = and(_T_14244, _T_14246) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14248 = or(_T_14240, _T_14247) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_6 = or(_T_14248, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14249 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14250 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14251 = eq(_T_14250, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14252 = and(_T_14249, _T_14251) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14253 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14254 = eq(_T_14253, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14255 = and(_T_14252, _T_14254) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14256 = or(_T_14255, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14257 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14258 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14259 = eq(_T_14258, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14260 = and(_T_14257, _T_14259) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14261 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14262 = eq(_T_14261, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14263 = and(_T_14260, _T_14262) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14264 = or(_T_14256, _T_14263) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_7 = or(_T_14264, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14265 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14266 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14267 = eq(_T_14266, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14268 = and(_T_14265, _T_14267) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14269 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14270 = eq(_T_14269, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14271 = and(_T_14268, _T_14270) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14272 = or(_T_14271, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14273 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14274 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14275 = eq(_T_14274, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14276 = and(_T_14273, _T_14275) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14277 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14278 = eq(_T_14277, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14279 = and(_T_14276, _T_14278) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14280 = or(_T_14272, _T_14279) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_8 = or(_T_14280, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14281 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14282 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14283 = eq(_T_14282, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14284 = and(_T_14281, _T_14283) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14285 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14286 = eq(_T_14285, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14287 = and(_T_14284, _T_14286) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14288 = or(_T_14287, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14289 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14290 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14291 = eq(_T_14290, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14292 = and(_T_14289, _T_14291) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14293 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14294 = eq(_T_14293, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14295 = and(_T_14292, _T_14294) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14296 = or(_T_14288, _T_14295) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_9 = or(_T_14296, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14297 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14298 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14299 = eq(_T_14298, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14300 = and(_T_14297, _T_14299) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14301 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14302 = eq(_T_14301, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14303 = and(_T_14300, _T_14302) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14304 = or(_T_14303, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14305 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14306 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14307 = eq(_T_14306, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14308 = and(_T_14305, _T_14307) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14309 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14310 = eq(_T_14309, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14311 = and(_T_14308, _T_14310) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14312 = or(_T_14304, _T_14311) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_10 = or(_T_14312, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14313 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14314 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14315 = eq(_T_14314, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14316 = and(_T_14313, _T_14315) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14317 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14318 = eq(_T_14317, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14319 = and(_T_14316, _T_14318) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14320 = or(_T_14319, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14321 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14322 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14323 = eq(_T_14322, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14324 = and(_T_14321, _T_14323) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14325 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14326 = eq(_T_14325, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14327 = and(_T_14324, _T_14326) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14328 = or(_T_14320, _T_14327) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_11 = or(_T_14328, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14329 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14330 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14331 = eq(_T_14330, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14332 = and(_T_14329, _T_14331) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14333 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14334 = eq(_T_14333, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14335 = and(_T_14332, _T_14334) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14336 = or(_T_14335, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14337 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14338 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14339 = eq(_T_14338, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14340 = and(_T_14337, _T_14339) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14341 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14342 = eq(_T_14341, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14343 = and(_T_14340, _T_14342) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14344 = or(_T_14336, _T_14343) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_12 = or(_T_14344, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14345 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14346 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14347 = eq(_T_14346, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14348 = and(_T_14345, _T_14347) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14349 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14350 = eq(_T_14349, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14351 = and(_T_14348, _T_14350) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14352 = or(_T_14351, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14353 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14354 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14355 = eq(_T_14354, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14356 = and(_T_14353, _T_14355) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14357 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14358 = eq(_T_14357, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14359 = and(_T_14356, _T_14358) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14360 = or(_T_14352, _T_14359) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_13 = or(_T_14360, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14361 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14362 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14363 = eq(_T_14362, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14364 = and(_T_14361, _T_14363) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14365 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14366 = eq(_T_14365, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14367 = and(_T_14364, _T_14366) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14368 = or(_T_14367, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14369 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14370 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14371 = eq(_T_14370, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14372 = and(_T_14369, _T_14371) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14373 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14374 = eq(_T_14373, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14375 = and(_T_14372, _T_14374) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14376 = or(_T_14368, _T_14375) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_14 = or(_T_14376, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14377 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14378 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14379 = eq(_T_14378, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14380 = and(_T_14377, _T_14379) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14381 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14382 = eq(_T_14381, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14383 = and(_T_14380, _T_14382) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14384 = or(_T_14383, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14385 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14386 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14387 = eq(_T_14386, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14388 = and(_T_14385, _T_14387) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14389 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14390 = eq(_T_14389, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14391 = and(_T_14388, _T_14390) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14392 = or(_T_14384, _T_14391) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_13_15 = or(_T_14392, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14393 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14394 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14395 = eq(_T_14394, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14396 = and(_T_14393, _T_14395) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14397 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14398 = eq(_T_14397, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14399 = and(_T_14396, _T_14398) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14400 = or(_T_14399, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14401 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14402 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14403 = eq(_T_14402, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14404 = and(_T_14401, _T_14403) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14405 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14406 = eq(_T_14405, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14407 = and(_T_14404, _T_14406) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14408 = or(_T_14400, _T_14407) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_0 = or(_T_14408, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14409 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14410 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14411 = eq(_T_14410, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14412 = and(_T_14409, _T_14411) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14413 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14414 = eq(_T_14413, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14415 = and(_T_14412, _T_14414) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14416 = or(_T_14415, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14417 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14418 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14419 = eq(_T_14418, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14420 = and(_T_14417, _T_14419) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14421 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14422 = eq(_T_14421, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14423 = and(_T_14420, _T_14422) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14424 = or(_T_14416, _T_14423) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_1 = or(_T_14424, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14425 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14426 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14427 = eq(_T_14426, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14428 = and(_T_14425, _T_14427) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14429 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14430 = eq(_T_14429, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14431 = and(_T_14428, _T_14430) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14432 = or(_T_14431, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14433 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14434 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14435 = eq(_T_14434, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14436 = and(_T_14433, _T_14435) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14437 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14438 = eq(_T_14437, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14439 = and(_T_14436, _T_14438) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14440 = or(_T_14432, _T_14439) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_2 = or(_T_14440, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14441 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14442 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14443 = eq(_T_14442, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14444 = and(_T_14441, _T_14443) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14445 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14446 = eq(_T_14445, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14447 = and(_T_14444, _T_14446) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14448 = or(_T_14447, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14449 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14450 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14451 = eq(_T_14450, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14452 = and(_T_14449, _T_14451) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14453 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14454 = eq(_T_14453, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14455 = and(_T_14452, _T_14454) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14456 = or(_T_14448, _T_14455) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_3 = or(_T_14456, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14457 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14458 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14459 = eq(_T_14458, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14460 = and(_T_14457, _T_14459) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14461 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14462 = eq(_T_14461, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14463 = and(_T_14460, _T_14462) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14464 = or(_T_14463, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14465 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14466 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14467 = eq(_T_14466, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14468 = and(_T_14465, _T_14467) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14469 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14470 = eq(_T_14469, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14471 = and(_T_14468, _T_14470) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14472 = or(_T_14464, _T_14471) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_4 = or(_T_14472, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14473 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14474 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14475 = eq(_T_14474, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14476 = and(_T_14473, _T_14475) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14477 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14478 = eq(_T_14477, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14479 = and(_T_14476, _T_14478) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14480 = or(_T_14479, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14481 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14482 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14483 = eq(_T_14482, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14484 = and(_T_14481, _T_14483) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14485 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14486 = eq(_T_14485, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14487 = and(_T_14484, _T_14486) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14488 = or(_T_14480, _T_14487) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_5 = or(_T_14488, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14489 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14490 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14491 = eq(_T_14490, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14492 = and(_T_14489, _T_14491) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14493 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14494 = eq(_T_14493, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14495 = and(_T_14492, _T_14494) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14496 = or(_T_14495, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14497 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14498 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14499 = eq(_T_14498, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14500 = and(_T_14497, _T_14499) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14501 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14502 = eq(_T_14501, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14503 = and(_T_14500, _T_14502) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14504 = or(_T_14496, _T_14503) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_6 = or(_T_14504, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14505 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14506 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14507 = eq(_T_14506, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14508 = and(_T_14505, _T_14507) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14509 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14510 = eq(_T_14509, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14511 = and(_T_14508, _T_14510) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14512 = or(_T_14511, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14513 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14514 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14515 = eq(_T_14514, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14516 = and(_T_14513, _T_14515) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14517 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14518 = eq(_T_14517, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14519 = and(_T_14516, _T_14518) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14520 = or(_T_14512, _T_14519) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_7 = or(_T_14520, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14521 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14522 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14523 = eq(_T_14522, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14524 = and(_T_14521, _T_14523) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14525 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14526 = eq(_T_14525, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14527 = and(_T_14524, _T_14526) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14528 = or(_T_14527, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14529 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14530 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14531 = eq(_T_14530, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14532 = and(_T_14529, _T_14531) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14533 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14534 = eq(_T_14533, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14535 = and(_T_14532, _T_14534) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14536 = or(_T_14528, _T_14535) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_8 = or(_T_14536, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14537 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14538 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14539 = eq(_T_14538, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14540 = and(_T_14537, _T_14539) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14541 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14542 = eq(_T_14541, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14543 = and(_T_14540, _T_14542) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14544 = or(_T_14543, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14545 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14546 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14547 = eq(_T_14546, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14548 = and(_T_14545, _T_14547) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14549 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14550 = eq(_T_14549, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14551 = and(_T_14548, _T_14550) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14552 = or(_T_14544, _T_14551) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_9 = or(_T_14552, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14553 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14554 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14555 = eq(_T_14554, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14556 = and(_T_14553, _T_14555) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14557 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14558 = eq(_T_14557, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14559 = and(_T_14556, _T_14558) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14560 = or(_T_14559, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14561 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14562 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14563 = eq(_T_14562, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14564 = and(_T_14561, _T_14563) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14565 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14566 = eq(_T_14565, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14567 = and(_T_14564, _T_14566) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14568 = or(_T_14560, _T_14567) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_10 = or(_T_14568, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14569 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14570 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14571 = eq(_T_14570, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14572 = and(_T_14569, _T_14571) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14573 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14574 = eq(_T_14573, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14575 = and(_T_14572, _T_14574) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14576 = or(_T_14575, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14577 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14578 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14579 = eq(_T_14578, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14580 = and(_T_14577, _T_14579) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14581 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14582 = eq(_T_14581, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14583 = and(_T_14580, _T_14582) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14584 = or(_T_14576, _T_14583) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_11 = or(_T_14584, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14585 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14586 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14587 = eq(_T_14586, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14588 = and(_T_14585, _T_14587) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14589 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14590 = eq(_T_14589, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14591 = and(_T_14588, _T_14590) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14592 = or(_T_14591, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14593 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14594 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14595 = eq(_T_14594, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14596 = and(_T_14593, _T_14595) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14597 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14598 = eq(_T_14597, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14599 = and(_T_14596, _T_14598) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14600 = or(_T_14592, _T_14599) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_12 = or(_T_14600, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14601 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14602 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14603 = eq(_T_14602, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14604 = and(_T_14601, _T_14603) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14605 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14606 = eq(_T_14605, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14607 = and(_T_14604, _T_14606) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14608 = or(_T_14607, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14609 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14610 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14611 = eq(_T_14610, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14612 = and(_T_14609, _T_14611) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14613 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14614 = eq(_T_14613, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14615 = and(_T_14612, _T_14614) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14616 = or(_T_14608, _T_14615) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_13 = or(_T_14616, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14617 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14618 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14619 = eq(_T_14618, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14620 = and(_T_14617, _T_14619) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14621 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14622 = eq(_T_14621, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14623 = and(_T_14620, _T_14622) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14624 = or(_T_14623, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14625 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14626 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14627 = eq(_T_14626, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14628 = and(_T_14625, _T_14627) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14629 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14630 = eq(_T_14629, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14631 = and(_T_14628, _T_14630) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14632 = or(_T_14624, _T_14631) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_14 = or(_T_14632, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14633 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14634 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14635 = eq(_T_14634, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14636 = and(_T_14633, _T_14635) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14637 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14638 = eq(_T_14637, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14639 = and(_T_14636, _T_14638) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14640 = or(_T_14639, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14641 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14642 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14643 = eq(_T_14642, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14644 = and(_T_14641, _T_14643) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14645 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14646 = eq(_T_14645, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14647 = and(_T_14644, _T_14646) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14648 = or(_T_14640, _T_14647) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_14_15 = or(_T_14648, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14649 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14650 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14651 = eq(_T_14650, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14652 = and(_T_14649, _T_14651) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14653 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14654 = eq(_T_14653, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14655 = and(_T_14652, _T_14654) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14656 = or(_T_14655, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14657 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14658 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14659 = eq(_T_14658, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14660 = and(_T_14657, _T_14659) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14661 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14662 = eq(_T_14661, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14663 = and(_T_14660, _T_14662) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14664 = or(_T_14656, _T_14663) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_0 = or(_T_14664, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14665 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14666 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14667 = eq(_T_14666, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14668 = and(_T_14665, _T_14667) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14669 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14670 = eq(_T_14669, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14671 = and(_T_14668, _T_14670) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14672 = or(_T_14671, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14673 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14674 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14675 = eq(_T_14674, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14676 = and(_T_14673, _T_14675) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14677 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14678 = eq(_T_14677, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14679 = and(_T_14676, _T_14678) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14680 = or(_T_14672, _T_14679) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_1 = or(_T_14680, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14681 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14682 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14683 = eq(_T_14682, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14684 = and(_T_14681, _T_14683) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14685 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14686 = eq(_T_14685, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14687 = and(_T_14684, _T_14686) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14688 = or(_T_14687, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14689 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14690 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14691 = eq(_T_14690, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14692 = and(_T_14689, _T_14691) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14693 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14694 = eq(_T_14693, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14695 = and(_T_14692, _T_14694) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14696 = or(_T_14688, _T_14695) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_2 = or(_T_14696, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14697 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14698 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14699 = eq(_T_14698, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14700 = and(_T_14697, _T_14699) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14701 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14702 = eq(_T_14701, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14703 = and(_T_14700, _T_14702) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14704 = or(_T_14703, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14705 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14706 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14707 = eq(_T_14706, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14708 = and(_T_14705, _T_14707) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14709 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14710 = eq(_T_14709, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14711 = and(_T_14708, _T_14710) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14712 = or(_T_14704, _T_14711) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_3 = or(_T_14712, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14713 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14714 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14715 = eq(_T_14714, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14716 = and(_T_14713, _T_14715) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14717 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14718 = eq(_T_14717, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14719 = and(_T_14716, _T_14718) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14720 = or(_T_14719, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14721 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14722 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14723 = eq(_T_14722, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14724 = and(_T_14721, _T_14723) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14725 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14726 = eq(_T_14725, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14727 = and(_T_14724, _T_14726) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14728 = or(_T_14720, _T_14727) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_4 = or(_T_14728, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14729 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14730 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14731 = eq(_T_14730, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14732 = and(_T_14729, _T_14731) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14733 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14734 = eq(_T_14733, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14735 = and(_T_14732, _T_14734) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14736 = or(_T_14735, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14737 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14738 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14739 = eq(_T_14738, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14740 = and(_T_14737, _T_14739) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14741 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14742 = eq(_T_14741, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14743 = and(_T_14740, _T_14742) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14744 = or(_T_14736, _T_14743) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_5 = or(_T_14744, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14745 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14746 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14747 = eq(_T_14746, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14748 = and(_T_14745, _T_14747) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14749 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14750 = eq(_T_14749, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14751 = and(_T_14748, _T_14750) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14752 = or(_T_14751, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14753 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14754 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14755 = eq(_T_14754, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14756 = and(_T_14753, _T_14755) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14757 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14758 = eq(_T_14757, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14759 = and(_T_14756, _T_14758) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14760 = or(_T_14752, _T_14759) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_6 = or(_T_14760, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14761 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14762 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14763 = eq(_T_14762, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14764 = and(_T_14761, _T_14763) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14765 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14766 = eq(_T_14765, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14767 = and(_T_14764, _T_14766) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14768 = or(_T_14767, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14769 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14770 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14771 = eq(_T_14770, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14772 = and(_T_14769, _T_14771) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14773 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14774 = eq(_T_14773, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14775 = and(_T_14772, _T_14774) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14776 = or(_T_14768, _T_14775) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_7 = or(_T_14776, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14777 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14778 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14779 = eq(_T_14778, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14780 = and(_T_14777, _T_14779) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14781 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14782 = eq(_T_14781, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14783 = and(_T_14780, _T_14782) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14784 = or(_T_14783, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14785 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14786 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14787 = eq(_T_14786, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14788 = and(_T_14785, _T_14787) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14789 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14790 = eq(_T_14789, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14791 = and(_T_14788, _T_14790) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14792 = or(_T_14784, _T_14791) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_8 = or(_T_14792, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14793 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14794 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14795 = eq(_T_14794, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14796 = and(_T_14793, _T_14795) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14797 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14798 = eq(_T_14797, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14799 = and(_T_14796, _T_14798) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14800 = or(_T_14799, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14801 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14802 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14803 = eq(_T_14802, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14804 = and(_T_14801, _T_14803) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14805 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14806 = eq(_T_14805, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14807 = and(_T_14804, _T_14806) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14808 = or(_T_14800, _T_14807) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_9 = or(_T_14808, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14809 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14810 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14811 = eq(_T_14810, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14812 = and(_T_14809, _T_14811) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14813 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14814 = eq(_T_14813, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14815 = and(_T_14812, _T_14814) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14816 = or(_T_14815, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14817 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14818 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14819 = eq(_T_14818, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14820 = and(_T_14817, _T_14819) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14821 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14822 = eq(_T_14821, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14823 = and(_T_14820, _T_14822) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14824 = or(_T_14816, _T_14823) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_10 = or(_T_14824, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14825 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14826 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14827 = eq(_T_14826, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14828 = and(_T_14825, _T_14827) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14829 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14830 = eq(_T_14829, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14831 = and(_T_14828, _T_14830) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14832 = or(_T_14831, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14833 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14834 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14835 = eq(_T_14834, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14836 = and(_T_14833, _T_14835) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14837 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14838 = eq(_T_14837, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14839 = and(_T_14836, _T_14838) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14840 = or(_T_14832, _T_14839) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_11 = or(_T_14840, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14841 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14842 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14843 = eq(_T_14842, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14844 = and(_T_14841, _T_14843) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14845 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14846 = eq(_T_14845, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14847 = and(_T_14844, _T_14846) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14848 = or(_T_14847, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14849 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14850 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14851 = eq(_T_14850, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14852 = and(_T_14849, _T_14851) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14853 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14854 = eq(_T_14853, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14855 = and(_T_14852, _T_14854) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14856 = or(_T_14848, _T_14855) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_12 = or(_T_14856, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14857 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14858 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14859 = eq(_T_14858, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14860 = and(_T_14857, _T_14859) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14861 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14862 = eq(_T_14861, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14863 = and(_T_14860, _T_14862) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14864 = or(_T_14863, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14865 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14866 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14867 = eq(_T_14866, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14868 = and(_T_14865, _T_14867) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14869 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14870 = eq(_T_14869, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14871 = and(_T_14868, _T_14870) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14872 = or(_T_14864, _T_14871) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_13 = or(_T_14872, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14873 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14874 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14875 = eq(_T_14874, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14876 = and(_T_14873, _T_14875) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14877 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14878 = eq(_T_14877, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14879 = and(_T_14876, _T_14878) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14880 = or(_T_14879, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14881 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14882 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14883 = eq(_T_14882, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14884 = and(_T_14881, _T_14883) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14885 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14886 = eq(_T_14885, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14887 = and(_T_14884, _T_14886) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14888 = or(_T_14880, _T_14887) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_14 = or(_T_14888, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14889 = bits(bht_wr_en0, 0, 0) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14890 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14891 = eq(_T_14890, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14892 = and(_T_14889, _T_14891) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14893 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14894 = eq(_T_14893, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14895 = and(_T_14892, _T_14894) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14896 = or(_T_14895, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14897 = bits(bht_wr_en2, 0, 0) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14898 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14899 = eq(_T_14898, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14900 = and(_T_14897, _T_14899) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14901 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14902 = eq(_T_14901, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14903 = and(_T_14900, _T_14902) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14904 = or(_T_14896, _T_14903) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_0_15_15 = or(_T_14904, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14905 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14906 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14907 = eq(_T_14906, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14908 = and(_T_14905, _T_14907) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14909 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14910 = eq(_T_14909, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14911 = and(_T_14908, _T_14910) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14912 = or(_T_14911, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14913 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14914 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14915 = eq(_T_14914, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14916 = and(_T_14913, _T_14915) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14917 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14918 = eq(_T_14917, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14919 = and(_T_14916, _T_14918) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14920 = or(_T_14912, _T_14919) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_0 = or(_T_14920, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14921 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14922 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14923 = eq(_T_14922, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14924 = and(_T_14921, _T_14923) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14925 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14926 = eq(_T_14925, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14927 = and(_T_14924, _T_14926) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14928 = or(_T_14927, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14929 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14930 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14931 = eq(_T_14930, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14932 = and(_T_14929, _T_14931) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14933 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14934 = eq(_T_14933, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14935 = and(_T_14932, _T_14934) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14936 = or(_T_14928, _T_14935) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_1 = or(_T_14936, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14937 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14938 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14939 = eq(_T_14938, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14940 = and(_T_14937, _T_14939) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14941 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14942 = eq(_T_14941, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14943 = and(_T_14940, _T_14942) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14944 = or(_T_14943, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14945 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14946 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14947 = eq(_T_14946, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14948 = and(_T_14945, _T_14947) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14949 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14950 = eq(_T_14949, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14951 = and(_T_14948, _T_14950) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14952 = or(_T_14944, _T_14951) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_2 = or(_T_14952, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14953 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14954 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14955 = eq(_T_14954, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14956 = and(_T_14953, _T_14955) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14957 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14958 = eq(_T_14957, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14959 = and(_T_14956, _T_14958) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14960 = or(_T_14959, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14961 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14962 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14963 = eq(_T_14962, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14964 = and(_T_14961, _T_14963) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14965 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14966 = eq(_T_14965, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14967 = and(_T_14964, _T_14966) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14968 = or(_T_14960, _T_14967) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_3 = or(_T_14968, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14969 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14970 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14971 = eq(_T_14970, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14972 = and(_T_14969, _T_14971) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14973 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14974 = eq(_T_14973, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14975 = and(_T_14972, _T_14974) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14976 = or(_T_14975, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14977 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14978 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14979 = eq(_T_14978, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14980 = and(_T_14977, _T_14979) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14981 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14982 = eq(_T_14981, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14983 = and(_T_14980, _T_14982) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_14984 = or(_T_14976, _T_14983) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_4 = or(_T_14984, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_14985 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_14986 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_14987 = eq(_T_14986, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_14988 = and(_T_14985, _T_14987) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_14989 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_14990 = eq(_T_14989, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_14991 = and(_T_14988, _T_14990) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_14992 = or(_T_14991, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_14993 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_14994 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_14995 = eq(_T_14994, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_14996 = and(_T_14993, _T_14995) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_14997 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_14998 = eq(_T_14997, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_14999 = and(_T_14996, _T_14998) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15000 = or(_T_14992, _T_14999) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_5 = or(_T_15000, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15001 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15002 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15003 = eq(_T_15002, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15004 = and(_T_15001, _T_15003) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15005 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15006 = eq(_T_15005, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15007 = and(_T_15004, _T_15006) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15008 = or(_T_15007, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15009 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15010 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15011 = eq(_T_15010, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15012 = and(_T_15009, _T_15011) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15013 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15014 = eq(_T_15013, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15015 = and(_T_15012, _T_15014) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15016 = or(_T_15008, _T_15015) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_6 = or(_T_15016, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15017 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15018 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15019 = eq(_T_15018, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15020 = and(_T_15017, _T_15019) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15021 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15022 = eq(_T_15021, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15023 = and(_T_15020, _T_15022) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15024 = or(_T_15023, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15025 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15026 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15027 = eq(_T_15026, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15028 = and(_T_15025, _T_15027) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15029 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15030 = eq(_T_15029, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15031 = and(_T_15028, _T_15030) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15032 = or(_T_15024, _T_15031) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_7 = or(_T_15032, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15033 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15034 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15035 = eq(_T_15034, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15036 = and(_T_15033, _T_15035) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15037 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15038 = eq(_T_15037, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15039 = and(_T_15036, _T_15038) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15040 = or(_T_15039, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15041 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15042 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15043 = eq(_T_15042, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15044 = and(_T_15041, _T_15043) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15045 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15046 = eq(_T_15045, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15047 = and(_T_15044, _T_15046) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15048 = or(_T_15040, _T_15047) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_8 = or(_T_15048, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15049 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15050 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15051 = eq(_T_15050, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15052 = and(_T_15049, _T_15051) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15053 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15054 = eq(_T_15053, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15055 = and(_T_15052, _T_15054) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15056 = or(_T_15055, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15057 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15058 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15059 = eq(_T_15058, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15060 = and(_T_15057, _T_15059) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15061 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15062 = eq(_T_15061, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15063 = and(_T_15060, _T_15062) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15064 = or(_T_15056, _T_15063) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_9 = or(_T_15064, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15065 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15066 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15067 = eq(_T_15066, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15068 = and(_T_15065, _T_15067) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15069 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15070 = eq(_T_15069, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15071 = and(_T_15068, _T_15070) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15072 = or(_T_15071, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15073 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15074 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15075 = eq(_T_15074, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15076 = and(_T_15073, _T_15075) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15077 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15078 = eq(_T_15077, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15079 = and(_T_15076, _T_15078) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15080 = or(_T_15072, _T_15079) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_10 = or(_T_15080, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15081 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15082 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15083 = eq(_T_15082, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15084 = and(_T_15081, _T_15083) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15085 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15086 = eq(_T_15085, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15087 = and(_T_15084, _T_15086) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15088 = or(_T_15087, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15089 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15090 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15091 = eq(_T_15090, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15092 = and(_T_15089, _T_15091) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15093 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15094 = eq(_T_15093, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15095 = and(_T_15092, _T_15094) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15096 = or(_T_15088, _T_15095) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_11 = or(_T_15096, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15097 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15098 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15099 = eq(_T_15098, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15100 = and(_T_15097, _T_15099) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15101 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15102 = eq(_T_15101, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15103 = and(_T_15100, _T_15102) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15104 = or(_T_15103, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15105 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15106 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15107 = eq(_T_15106, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15108 = and(_T_15105, _T_15107) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15109 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15110 = eq(_T_15109, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15111 = and(_T_15108, _T_15110) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15112 = or(_T_15104, _T_15111) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_12 = or(_T_15112, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15113 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15114 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15115 = eq(_T_15114, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15116 = and(_T_15113, _T_15115) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15117 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15118 = eq(_T_15117, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15119 = and(_T_15116, _T_15118) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15120 = or(_T_15119, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15121 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15122 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15123 = eq(_T_15122, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15124 = and(_T_15121, _T_15123) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15125 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15126 = eq(_T_15125, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15127 = and(_T_15124, _T_15126) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15128 = or(_T_15120, _T_15127) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_13 = or(_T_15128, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15129 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15130 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15131 = eq(_T_15130, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15132 = and(_T_15129, _T_15131) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15133 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15134 = eq(_T_15133, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15135 = and(_T_15132, _T_15134) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15136 = or(_T_15135, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15137 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15138 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15139 = eq(_T_15138, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15140 = and(_T_15137, _T_15139) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15141 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15142 = eq(_T_15141, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15143 = and(_T_15140, _T_15142) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15144 = or(_T_15136, _T_15143) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_14 = or(_T_15144, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15145 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15146 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15147 = eq(_T_15146, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15148 = and(_T_15145, _T_15147) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15149 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15150 = eq(_T_15149, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15151 = and(_T_15148, _T_15150) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15152 = or(_T_15151, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15153 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15154 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15155 = eq(_T_15154, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15156 = and(_T_15153, _T_15155) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15157 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15158 = eq(_T_15157, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15159 = and(_T_15156, _T_15158) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15160 = or(_T_15152, _T_15159) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_0_15 = or(_T_15160, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15161 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15162 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15163 = eq(_T_15162, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15164 = and(_T_15161, _T_15163) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15165 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15166 = eq(_T_15165, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15167 = and(_T_15164, _T_15166) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15168 = or(_T_15167, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15169 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15170 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15171 = eq(_T_15170, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15172 = and(_T_15169, _T_15171) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15173 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15174 = eq(_T_15173, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15175 = and(_T_15172, _T_15174) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15176 = or(_T_15168, _T_15175) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_0 = or(_T_15176, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15177 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15178 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15179 = eq(_T_15178, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15180 = and(_T_15177, _T_15179) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15181 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15182 = eq(_T_15181, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15183 = and(_T_15180, _T_15182) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15184 = or(_T_15183, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15185 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15186 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15187 = eq(_T_15186, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15188 = and(_T_15185, _T_15187) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15189 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15190 = eq(_T_15189, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15191 = and(_T_15188, _T_15190) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15192 = or(_T_15184, _T_15191) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_1 = or(_T_15192, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15193 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15194 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15195 = eq(_T_15194, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15196 = and(_T_15193, _T_15195) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15197 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15198 = eq(_T_15197, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15199 = and(_T_15196, _T_15198) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15200 = or(_T_15199, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15201 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15202 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15203 = eq(_T_15202, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15204 = and(_T_15201, _T_15203) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15205 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15206 = eq(_T_15205, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15207 = and(_T_15204, _T_15206) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15208 = or(_T_15200, _T_15207) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_2 = or(_T_15208, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15209 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15210 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15211 = eq(_T_15210, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15212 = and(_T_15209, _T_15211) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15213 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15214 = eq(_T_15213, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15215 = and(_T_15212, _T_15214) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15216 = or(_T_15215, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15217 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15218 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15219 = eq(_T_15218, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15220 = and(_T_15217, _T_15219) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15221 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15222 = eq(_T_15221, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15223 = and(_T_15220, _T_15222) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15224 = or(_T_15216, _T_15223) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_3 = or(_T_15224, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15225 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15226 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15227 = eq(_T_15226, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15228 = and(_T_15225, _T_15227) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15229 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15230 = eq(_T_15229, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15231 = and(_T_15228, _T_15230) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15232 = or(_T_15231, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15233 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15234 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15235 = eq(_T_15234, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15236 = and(_T_15233, _T_15235) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15237 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15238 = eq(_T_15237, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15239 = and(_T_15236, _T_15238) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15240 = or(_T_15232, _T_15239) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_4 = or(_T_15240, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15241 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15242 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15243 = eq(_T_15242, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15244 = and(_T_15241, _T_15243) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15245 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15246 = eq(_T_15245, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15247 = and(_T_15244, _T_15246) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15248 = or(_T_15247, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15249 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15250 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15251 = eq(_T_15250, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15252 = and(_T_15249, _T_15251) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15253 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15254 = eq(_T_15253, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15255 = and(_T_15252, _T_15254) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15256 = or(_T_15248, _T_15255) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_5 = or(_T_15256, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15257 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15258 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15259 = eq(_T_15258, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15260 = and(_T_15257, _T_15259) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15261 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15262 = eq(_T_15261, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15263 = and(_T_15260, _T_15262) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15264 = or(_T_15263, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15265 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15266 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15267 = eq(_T_15266, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15268 = and(_T_15265, _T_15267) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15269 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15270 = eq(_T_15269, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15271 = and(_T_15268, _T_15270) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15272 = or(_T_15264, _T_15271) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_6 = or(_T_15272, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15273 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15274 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15275 = eq(_T_15274, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15276 = and(_T_15273, _T_15275) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15277 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15278 = eq(_T_15277, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15279 = and(_T_15276, _T_15278) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15280 = or(_T_15279, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15281 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15282 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15283 = eq(_T_15282, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15284 = and(_T_15281, _T_15283) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15285 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15286 = eq(_T_15285, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15287 = and(_T_15284, _T_15286) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15288 = or(_T_15280, _T_15287) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_7 = or(_T_15288, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15289 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15290 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15291 = eq(_T_15290, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15292 = and(_T_15289, _T_15291) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15293 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15294 = eq(_T_15293, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15295 = and(_T_15292, _T_15294) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15296 = or(_T_15295, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15297 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15298 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15299 = eq(_T_15298, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15300 = and(_T_15297, _T_15299) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15301 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15302 = eq(_T_15301, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15303 = and(_T_15300, _T_15302) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15304 = or(_T_15296, _T_15303) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_8 = or(_T_15304, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15305 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15306 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15307 = eq(_T_15306, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15308 = and(_T_15305, _T_15307) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15309 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15310 = eq(_T_15309, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15311 = and(_T_15308, _T_15310) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15312 = or(_T_15311, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15313 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15314 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15315 = eq(_T_15314, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15316 = and(_T_15313, _T_15315) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15317 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15318 = eq(_T_15317, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15319 = and(_T_15316, _T_15318) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15320 = or(_T_15312, _T_15319) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_9 = or(_T_15320, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15321 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15322 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15323 = eq(_T_15322, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15324 = and(_T_15321, _T_15323) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15325 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15326 = eq(_T_15325, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15327 = and(_T_15324, _T_15326) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15328 = or(_T_15327, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15329 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15330 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15331 = eq(_T_15330, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15332 = and(_T_15329, _T_15331) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15333 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15334 = eq(_T_15333, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15335 = and(_T_15332, _T_15334) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15336 = or(_T_15328, _T_15335) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_10 = or(_T_15336, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15337 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15338 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15339 = eq(_T_15338, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15340 = and(_T_15337, _T_15339) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15341 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15342 = eq(_T_15341, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15343 = and(_T_15340, _T_15342) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15344 = or(_T_15343, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15345 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15346 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15347 = eq(_T_15346, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15348 = and(_T_15345, _T_15347) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15349 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15350 = eq(_T_15349, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15351 = and(_T_15348, _T_15350) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15352 = or(_T_15344, _T_15351) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_11 = or(_T_15352, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15353 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15354 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15355 = eq(_T_15354, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15356 = and(_T_15353, _T_15355) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15357 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15358 = eq(_T_15357, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15359 = and(_T_15356, _T_15358) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15360 = or(_T_15359, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15361 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15362 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15363 = eq(_T_15362, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15364 = and(_T_15361, _T_15363) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15365 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15366 = eq(_T_15365, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15367 = and(_T_15364, _T_15366) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15368 = or(_T_15360, _T_15367) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_12 = or(_T_15368, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15369 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15370 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15371 = eq(_T_15370, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15372 = and(_T_15369, _T_15371) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15373 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15374 = eq(_T_15373, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15375 = and(_T_15372, _T_15374) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15376 = or(_T_15375, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15377 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15378 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15379 = eq(_T_15378, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15380 = and(_T_15377, _T_15379) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15381 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15382 = eq(_T_15381, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15383 = and(_T_15380, _T_15382) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15384 = or(_T_15376, _T_15383) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_13 = or(_T_15384, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15385 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15386 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15387 = eq(_T_15386, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15388 = and(_T_15385, _T_15387) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15389 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15390 = eq(_T_15389, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15391 = and(_T_15388, _T_15390) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15392 = or(_T_15391, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15393 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15394 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15395 = eq(_T_15394, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15396 = and(_T_15393, _T_15395) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15397 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15398 = eq(_T_15397, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15399 = and(_T_15396, _T_15398) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15400 = or(_T_15392, _T_15399) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_14 = or(_T_15400, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15401 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15402 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15403 = eq(_T_15402, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15404 = and(_T_15401, _T_15403) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15405 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15406 = eq(_T_15405, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15407 = and(_T_15404, _T_15406) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15408 = or(_T_15407, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15409 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15410 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15411 = eq(_T_15410, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15412 = and(_T_15409, _T_15411) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15413 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15414 = eq(_T_15413, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15415 = and(_T_15412, _T_15414) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15416 = or(_T_15408, _T_15415) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_1_15 = or(_T_15416, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15417 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15418 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15419 = eq(_T_15418, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15420 = and(_T_15417, _T_15419) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15421 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15422 = eq(_T_15421, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15423 = and(_T_15420, _T_15422) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15424 = or(_T_15423, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15425 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15426 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15427 = eq(_T_15426, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15428 = and(_T_15425, _T_15427) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15429 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15430 = eq(_T_15429, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15431 = and(_T_15428, _T_15430) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15432 = or(_T_15424, _T_15431) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_0 = or(_T_15432, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15433 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15434 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15435 = eq(_T_15434, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15436 = and(_T_15433, _T_15435) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15437 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15438 = eq(_T_15437, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15439 = and(_T_15436, _T_15438) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15440 = or(_T_15439, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15441 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15442 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15443 = eq(_T_15442, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15444 = and(_T_15441, _T_15443) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15445 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15446 = eq(_T_15445, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15447 = and(_T_15444, _T_15446) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15448 = or(_T_15440, _T_15447) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_1 = or(_T_15448, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15449 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15450 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15451 = eq(_T_15450, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15452 = and(_T_15449, _T_15451) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15453 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15454 = eq(_T_15453, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15455 = and(_T_15452, _T_15454) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15456 = or(_T_15455, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15457 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15458 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15459 = eq(_T_15458, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15460 = and(_T_15457, _T_15459) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15461 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15462 = eq(_T_15461, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15463 = and(_T_15460, _T_15462) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15464 = or(_T_15456, _T_15463) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_2 = or(_T_15464, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15465 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15466 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15467 = eq(_T_15466, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15468 = and(_T_15465, _T_15467) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15469 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15470 = eq(_T_15469, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15471 = and(_T_15468, _T_15470) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15472 = or(_T_15471, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15473 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15474 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15475 = eq(_T_15474, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15476 = and(_T_15473, _T_15475) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15477 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15478 = eq(_T_15477, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15479 = and(_T_15476, _T_15478) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15480 = or(_T_15472, _T_15479) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_3 = or(_T_15480, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15481 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15482 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15483 = eq(_T_15482, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15484 = and(_T_15481, _T_15483) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15485 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15486 = eq(_T_15485, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15487 = and(_T_15484, _T_15486) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15488 = or(_T_15487, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15489 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15490 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15491 = eq(_T_15490, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15492 = and(_T_15489, _T_15491) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15493 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15494 = eq(_T_15493, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15495 = and(_T_15492, _T_15494) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15496 = or(_T_15488, _T_15495) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_4 = or(_T_15496, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15497 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15498 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15499 = eq(_T_15498, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15500 = and(_T_15497, _T_15499) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15501 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15502 = eq(_T_15501, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15503 = and(_T_15500, _T_15502) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15504 = or(_T_15503, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15505 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15506 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15507 = eq(_T_15506, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15508 = and(_T_15505, _T_15507) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15509 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15510 = eq(_T_15509, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15511 = and(_T_15508, _T_15510) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15512 = or(_T_15504, _T_15511) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_5 = or(_T_15512, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15513 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15514 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15515 = eq(_T_15514, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15516 = and(_T_15513, _T_15515) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15517 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15518 = eq(_T_15517, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15519 = and(_T_15516, _T_15518) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15520 = or(_T_15519, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15521 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15522 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15523 = eq(_T_15522, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15524 = and(_T_15521, _T_15523) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15525 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15526 = eq(_T_15525, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15527 = and(_T_15524, _T_15526) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15528 = or(_T_15520, _T_15527) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_6 = or(_T_15528, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15529 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15530 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15531 = eq(_T_15530, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15532 = and(_T_15529, _T_15531) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15533 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15534 = eq(_T_15533, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15535 = and(_T_15532, _T_15534) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15536 = or(_T_15535, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15537 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15538 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15539 = eq(_T_15538, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15540 = and(_T_15537, _T_15539) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15541 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15542 = eq(_T_15541, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15543 = and(_T_15540, _T_15542) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15544 = or(_T_15536, _T_15543) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_7 = or(_T_15544, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15545 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15546 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15547 = eq(_T_15546, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15548 = and(_T_15545, _T_15547) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15549 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15550 = eq(_T_15549, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15551 = and(_T_15548, _T_15550) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15552 = or(_T_15551, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15553 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15554 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15555 = eq(_T_15554, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15556 = and(_T_15553, _T_15555) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15557 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15558 = eq(_T_15557, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15559 = and(_T_15556, _T_15558) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15560 = or(_T_15552, _T_15559) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_8 = or(_T_15560, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15561 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15562 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15563 = eq(_T_15562, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15564 = and(_T_15561, _T_15563) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15565 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15566 = eq(_T_15565, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15567 = and(_T_15564, _T_15566) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15568 = or(_T_15567, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15569 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15570 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15571 = eq(_T_15570, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15572 = and(_T_15569, _T_15571) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15573 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15574 = eq(_T_15573, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15575 = and(_T_15572, _T_15574) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15576 = or(_T_15568, _T_15575) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_9 = or(_T_15576, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15577 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15578 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15579 = eq(_T_15578, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15580 = and(_T_15577, _T_15579) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15581 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15582 = eq(_T_15581, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15583 = and(_T_15580, _T_15582) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15584 = or(_T_15583, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15585 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15586 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15587 = eq(_T_15586, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15588 = and(_T_15585, _T_15587) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15589 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15590 = eq(_T_15589, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15591 = and(_T_15588, _T_15590) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15592 = or(_T_15584, _T_15591) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_10 = or(_T_15592, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15593 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15594 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15595 = eq(_T_15594, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15596 = and(_T_15593, _T_15595) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15597 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15598 = eq(_T_15597, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15599 = and(_T_15596, _T_15598) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15600 = or(_T_15599, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15601 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15602 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15603 = eq(_T_15602, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15604 = and(_T_15601, _T_15603) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15605 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15606 = eq(_T_15605, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15607 = and(_T_15604, _T_15606) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15608 = or(_T_15600, _T_15607) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_11 = or(_T_15608, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15609 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15610 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15611 = eq(_T_15610, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15612 = and(_T_15609, _T_15611) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15613 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15614 = eq(_T_15613, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15615 = and(_T_15612, _T_15614) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15616 = or(_T_15615, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15617 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15618 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15619 = eq(_T_15618, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15620 = and(_T_15617, _T_15619) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15621 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15622 = eq(_T_15621, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15623 = and(_T_15620, _T_15622) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15624 = or(_T_15616, _T_15623) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_12 = or(_T_15624, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15625 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15626 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15627 = eq(_T_15626, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15628 = and(_T_15625, _T_15627) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15629 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15630 = eq(_T_15629, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15631 = and(_T_15628, _T_15630) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15632 = or(_T_15631, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15633 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15634 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15635 = eq(_T_15634, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15636 = and(_T_15633, _T_15635) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15637 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15638 = eq(_T_15637, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15639 = and(_T_15636, _T_15638) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15640 = or(_T_15632, _T_15639) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_13 = or(_T_15640, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15641 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15642 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15643 = eq(_T_15642, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15644 = and(_T_15641, _T_15643) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15645 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15646 = eq(_T_15645, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15647 = and(_T_15644, _T_15646) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15648 = or(_T_15647, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15649 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15650 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15651 = eq(_T_15650, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15652 = and(_T_15649, _T_15651) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15653 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15654 = eq(_T_15653, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15655 = and(_T_15652, _T_15654) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15656 = or(_T_15648, _T_15655) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_14 = or(_T_15656, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15657 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15658 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15659 = eq(_T_15658, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15660 = and(_T_15657, _T_15659) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15661 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15662 = eq(_T_15661, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15663 = and(_T_15660, _T_15662) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15664 = or(_T_15663, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15665 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15666 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15667 = eq(_T_15666, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15668 = and(_T_15665, _T_15667) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15669 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15670 = eq(_T_15669, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15671 = and(_T_15668, _T_15670) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15672 = or(_T_15664, _T_15671) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_2_15 = or(_T_15672, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15673 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15674 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15675 = eq(_T_15674, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15676 = and(_T_15673, _T_15675) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15677 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15678 = eq(_T_15677, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15679 = and(_T_15676, _T_15678) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15680 = or(_T_15679, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15681 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15682 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15683 = eq(_T_15682, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15684 = and(_T_15681, _T_15683) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15685 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15686 = eq(_T_15685, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15687 = and(_T_15684, _T_15686) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15688 = or(_T_15680, _T_15687) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_0 = or(_T_15688, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15689 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15690 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15691 = eq(_T_15690, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15692 = and(_T_15689, _T_15691) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15693 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15694 = eq(_T_15693, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15695 = and(_T_15692, _T_15694) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15696 = or(_T_15695, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15697 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15698 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15699 = eq(_T_15698, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15700 = and(_T_15697, _T_15699) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15701 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15702 = eq(_T_15701, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15703 = and(_T_15700, _T_15702) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15704 = or(_T_15696, _T_15703) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_1 = or(_T_15704, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15705 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15706 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15707 = eq(_T_15706, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15708 = and(_T_15705, _T_15707) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15709 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15710 = eq(_T_15709, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15711 = and(_T_15708, _T_15710) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15712 = or(_T_15711, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15713 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15714 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15715 = eq(_T_15714, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15716 = and(_T_15713, _T_15715) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15717 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15718 = eq(_T_15717, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15719 = and(_T_15716, _T_15718) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15720 = or(_T_15712, _T_15719) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_2 = or(_T_15720, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15721 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15722 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15723 = eq(_T_15722, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15724 = and(_T_15721, _T_15723) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15725 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15726 = eq(_T_15725, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15727 = and(_T_15724, _T_15726) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15728 = or(_T_15727, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15729 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15730 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15731 = eq(_T_15730, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15732 = and(_T_15729, _T_15731) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15733 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15734 = eq(_T_15733, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15735 = and(_T_15732, _T_15734) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15736 = or(_T_15728, _T_15735) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_3 = or(_T_15736, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15737 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15738 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15739 = eq(_T_15738, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15740 = and(_T_15737, _T_15739) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15741 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15742 = eq(_T_15741, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15743 = and(_T_15740, _T_15742) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15744 = or(_T_15743, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15745 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15746 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15747 = eq(_T_15746, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15748 = and(_T_15745, _T_15747) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15749 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15750 = eq(_T_15749, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15751 = and(_T_15748, _T_15750) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15752 = or(_T_15744, _T_15751) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_4 = or(_T_15752, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15753 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15754 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15755 = eq(_T_15754, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15756 = and(_T_15753, _T_15755) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15757 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15758 = eq(_T_15757, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15759 = and(_T_15756, _T_15758) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15760 = or(_T_15759, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15761 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15762 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15763 = eq(_T_15762, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15764 = and(_T_15761, _T_15763) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15765 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15766 = eq(_T_15765, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15767 = and(_T_15764, _T_15766) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15768 = or(_T_15760, _T_15767) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_5 = or(_T_15768, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15769 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15770 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15771 = eq(_T_15770, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15772 = and(_T_15769, _T_15771) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15773 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15774 = eq(_T_15773, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15775 = and(_T_15772, _T_15774) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15776 = or(_T_15775, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15777 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15778 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15779 = eq(_T_15778, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15780 = and(_T_15777, _T_15779) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15781 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15782 = eq(_T_15781, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15783 = and(_T_15780, _T_15782) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15784 = or(_T_15776, _T_15783) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_6 = or(_T_15784, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15785 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15786 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15787 = eq(_T_15786, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15788 = and(_T_15785, _T_15787) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15789 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15790 = eq(_T_15789, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15791 = and(_T_15788, _T_15790) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15792 = or(_T_15791, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15793 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15794 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15795 = eq(_T_15794, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15796 = and(_T_15793, _T_15795) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15797 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15798 = eq(_T_15797, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15799 = and(_T_15796, _T_15798) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15800 = or(_T_15792, _T_15799) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_7 = or(_T_15800, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15801 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15802 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15803 = eq(_T_15802, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15804 = and(_T_15801, _T_15803) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15805 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15806 = eq(_T_15805, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15807 = and(_T_15804, _T_15806) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15808 = or(_T_15807, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15809 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15810 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15811 = eq(_T_15810, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15812 = and(_T_15809, _T_15811) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15813 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15814 = eq(_T_15813, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15815 = and(_T_15812, _T_15814) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15816 = or(_T_15808, _T_15815) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_8 = or(_T_15816, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15817 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15818 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15819 = eq(_T_15818, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15820 = and(_T_15817, _T_15819) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15821 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15822 = eq(_T_15821, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15823 = and(_T_15820, _T_15822) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15824 = or(_T_15823, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15825 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15826 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15827 = eq(_T_15826, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15828 = and(_T_15825, _T_15827) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15829 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15830 = eq(_T_15829, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15831 = and(_T_15828, _T_15830) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15832 = or(_T_15824, _T_15831) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_9 = or(_T_15832, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15833 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15834 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15835 = eq(_T_15834, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15836 = and(_T_15833, _T_15835) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15837 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15838 = eq(_T_15837, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15839 = and(_T_15836, _T_15838) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15840 = or(_T_15839, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15841 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15842 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15843 = eq(_T_15842, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15844 = and(_T_15841, _T_15843) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15845 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15846 = eq(_T_15845, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15847 = and(_T_15844, _T_15846) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15848 = or(_T_15840, _T_15847) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_10 = or(_T_15848, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15849 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15850 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15851 = eq(_T_15850, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15852 = and(_T_15849, _T_15851) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15853 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15854 = eq(_T_15853, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15855 = and(_T_15852, _T_15854) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15856 = or(_T_15855, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15857 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15858 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15859 = eq(_T_15858, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15860 = and(_T_15857, _T_15859) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15861 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15862 = eq(_T_15861, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15863 = and(_T_15860, _T_15862) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15864 = or(_T_15856, _T_15863) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_11 = or(_T_15864, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15865 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15866 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15867 = eq(_T_15866, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15868 = and(_T_15865, _T_15867) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15869 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15870 = eq(_T_15869, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15871 = and(_T_15868, _T_15870) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15872 = or(_T_15871, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15873 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15874 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15875 = eq(_T_15874, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15876 = and(_T_15873, _T_15875) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15877 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15878 = eq(_T_15877, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15879 = and(_T_15876, _T_15878) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15880 = or(_T_15872, _T_15879) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_12 = or(_T_15880, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15881 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15882 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15883 = eq(_T_15882, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15884 = and(_T_15881, _T_15883) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15885 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15886 = eq(_T_15885, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15887 = and(_T_15884, _T_15886) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15888 = or(_T_15887, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15889 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15890 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15891 = eq(_T_15890, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15892 = and(_T_15889, _T_15891) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15893 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15894 = eq(_T_15893, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15895 = and(_T_15892, _T_15894) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15896 = or(_T_15888, _T_15895) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_13 = or(_T_15896, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15897 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15898 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15899 = eq(_T_15898, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15900 = and(_T_15897, _T_15899) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15901 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15902 = eq(_T_15901, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15903 = and(_T_15900, _T_15902) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15904 = or(_T_15903, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15905 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15906 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15907 = eq(_T_15906, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15908 = and(_T_15905, _T_15907) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15909 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15910 = eq(_T_15909, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15911 = and(_T_15908, _T_15910) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15912 = or(_T_15904, _T_15911) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_14 = or(_T_15912, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15913 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15914 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15915 = eq(_T_15914, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15916 = and(_T_15913, _T_15915) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15917 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15918 = eq(_T_15917, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15919 = and(_T_15916, _T_15918) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15920 = or(_T_15919, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15921 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15922 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15923 = eq(_T_15922, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15924 = and(_T_15921, _T_15923) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15925 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15926 = eq(_T_15925, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15927 = and(_T_15924, _T_15926) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15928 = or(_T_15920, _T_15927) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_3_15 = or(_T_15928, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15929 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15930 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15931 = eq(_T_15930, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15932 = and(_T_15929, _T_15931) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15933 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15934 = eq(_T_15933, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15935 = and(_T_15932, _T_15934) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15936 = or(_T_15935, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15937 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15938 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15939 = eq(_T_15938, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15940 = and(_T_15937, _T_15939) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15941 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15942 = eq(_T_15941, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15943 = and(_T_15940, _T_15942) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15944 = or(_T_15936, _T_15943) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_0 = or(_T_15944, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15945 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15946 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15947 = eq(_T_15946, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15948 = and(_T_15945, _T_15947) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15949 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15950 = eq(_T_15949, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15951 = and(_T_15948, _T_15950) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15952 = or(_T_15951, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15953 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15954 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15955 = eq(_T_15954, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15956 = and(_T_15953, _T_15955) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15957 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15958 = eq(_T_15957, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15959 = and(_T_15956, _T_15958) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15960 = or(_T_15952, _T_15959) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_1 = or(_T_15960, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15961 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15962 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15963 = eq(_T_15962, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15964 = and(_T_15961, _T_15963) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15965 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15966 = eq(_T_15965, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15967 = and(_T_15964, _T_15966) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15968 = or(_T_15967, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15969 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15970 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15971 = eq(_T_15970, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15972 = and(_T_15969, _T_15971) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15973 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15974 = eq(_T_15973, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15975 = and(_T_15972, _T_15974) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15976 = or(_T_15968, _T_15975) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_2 = or(_T_15976, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15977 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15978 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15979 = eq(_T_15978, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15980 = and(_T_15977, _T_15979) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15981 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15982 = eq(_T_15981, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15983 = and(_T_15980, _T_15982) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_15984 = or(_T_15983, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_15985 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_15986 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_15987 = eq(_T_15986, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_15988 = and(_T_15985, _T_15987) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_15989 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_15990 = eq(_T_15989, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_15991 = and(_T_15988, _T_15990) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_15992 = or(_T_15984, _T_15991) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_3 = or(_T_15992, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_15993 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_15994 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_15995 = eq(_T_15994, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_15996 = and(_T_15993, _T_15995) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_15997 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_15998 = eq(_T_15997, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_15999 = and(_T_15996, _T_15998) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16000 = or(_T_15999, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16001 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16002 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16003 = eq(_T_16002, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16004 = and(_T_16001, _T_16003) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16005 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16006 = eq(_T_16005, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16007 = and(_T_16004, _T_16006) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16008 = or(_T_16000, _T_16007) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_4 = or(_T_16008, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
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node _T_16009 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
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node _T_16010 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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node _T_16011 = eq(_T_16010, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
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node _T_16012 = and(_T_16009, _T_16011) @[el2_ifu_bp_ctl.scala 373:17]
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node _T_16013 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
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|
node _T_16014 = eq(_T_16013, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
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node _T_16015 = and(_T_16012, _T_16014) @[el2_ifu_bp_ctl.scala 373:82]
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node _T_16016 = or(_T_16015, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
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node _T_16017 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
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|
node _T_16018 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
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|
node _T_16019 = eq(_T_16018, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
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node _T_16020 = and(_T_16017, _T_16019) @[el2_ifu_bp_ctl.scala 373:220]
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node _T_16021 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
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node _T_16022 = eq(_T_16021, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
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node _T_16023 = and(_T_16020, _T_16022) @[el2_ifu_bp_ctl.scala 374:74]
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node _T_16024 = or(_T_16016, _T_16023) @[el2_ifu_bp_ctl.scala 373:204]
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node bht_bank_sel_1_4_5 = or(_T_16024, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
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node _T_16025 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
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|
node _T_16026 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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node _T_16027 = eq(_T_16026, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
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node _T_16028 = and(_T_16025, _T_16027) @[el2_ifu_bp_ctl.scala 373:17]
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node _T_16029 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
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node _T_16030 = eq(_T_16029, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
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node _T_16031 = and(_T_16028, _T_16030) @[el2_ifu_bp_ctl.scala 373:82]
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node _T_16032 = or(_T_16031, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
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node _T_16033 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
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node _T_16034 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
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|
node _T_16035 = eq(_T_16034, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
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|
node _T_16036 = and(_T_16033, _T_16035) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16037 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16038 = eq(_T_16037, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
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|
node _T_16039 = and(_T_16036, _T_16038) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16040 = or(_T_16032, _T_16039) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_6 = or(_T_16040, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16041 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16042 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16043 = eq(_T_16042, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
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|
node _T_16044 = and(_T_16041, _T_16043) @[el2_ifu_bp_ctl.scala 373:17]
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|
node _T_16045 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
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|
node _T_16046 = eq(_T_16045, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16047 = and(_T_16044, _T_16046) @[el2_ifu_bp_ctl.scala 373:82]
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|
node _T_16048 = or(_T_16047, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16049 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16050 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16051 = eq(_T_16050, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
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|
node _T_16052 = and(_T_16049, _T_16051) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16053 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16054 = eq(_T_16053, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16055 = and(_T_16052, _T_16054) @[el2_ifu_bp_ctl.scala 374:74]
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|
node _T_16056 = or(_T_16048, _T_16055) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_7 = or(_T_16056, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16057 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16058 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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|
node _T_16059 = eq(_T_16058, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16060 = and(_T_16057, _T_16059) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16061 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16062 = eq(_T_16061, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16063 = and(_T_16060, _T_16062) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16064 = or(_T_16063, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16065 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16066 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16067 = eq(_T_16066, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
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|
node _T_16068 = and(_T_16065, _T_16067) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16069 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16070 = eq(_T_16069, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16071 = and(_T_16068, _T_16070) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16072 = or(_T_16064, _T_16071) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_8 = or(_T_16072, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16073 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16074 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16075 = eq(_T_16074, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16076 = and(_T_16073, _T_16075) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16077 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16078 = eq(_T_16077, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16079 = and(_T_16076, _T_16078) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16080 = or(_T_16079, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16081 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16082 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16083 = eq(_T_16082, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16084 = and(_T_16081, _T_16083) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16085 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16086 = eq(_T_16085, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16087 = and(_T_16084, _T_16086) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16088 = or(_T_16080, _T_16087) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_9 = or(_T_16088, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16089 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16090 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16091 = eq(_T_16090, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
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|
node _T_16092 = and(_T_16089, _T_16091) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16093 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16094 = eq(_T_16093, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16095 = and(_T_16092, _T_16094) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16096 = or(_T_16095, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16097 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16098 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16099 = eq(_T_16098, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16100 = and(_T_16097, _T_16099) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16101 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16102 = eq(_T_16101, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16103 = and(_T_16100, _T_16102) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16104 = or(_T_16096, _T_16103) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_10 = or(_T_16104, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16105 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16106 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16107 = eq(_T_16106, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16108 = and(_T_16105, _T_16107) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16109 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16110 = eq(_T_16109, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16111 = and(_T_16108, _T_16110) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16112 = or(_T_16111, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16113 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16114 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16115 = eq(_T_16114, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16116 = and(_T_16113, _T_16115) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16117 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16118 = eq(_T_16117, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16119 = and(_T_16116, _T_16118) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16120 = or(_T_16112, _T_16119) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_11 = or(_T_16120, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16121 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16122 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16123 = eq(_T_16122, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
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|
node _T_16124 = and(_T_16121, _T_16123) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16125 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16126 = eq(_T_16125, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16127 = and(_T_16124, _T_16126) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16128 = or(_T_16127, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16129 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16130 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16131 = eq(_T_16130, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16132 = and(_T_16129, _T_16131) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16133 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16134 = eq(_T_16133, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16135 = and(_T_16132, _T_16134) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16136 = or(_T_16128, _T_16135) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_12 = or(_T_16136, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16137 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16138 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16139 = eq(_T_16138, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16140 = and(_T_16137, _T_16139) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16141 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16142 = eq(_T_16141, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16143 = and(_T_16140, _T_16142) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16144 = or(_T_16143, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16145 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16146 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16147 = eq(_T_16146, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16148 = and(_T_16145, _T_16147) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16149 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16150 = eq(_T_16149, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16151 = and(_T_16148, _T_16150) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16152 = or(_T_16144, _T_16151) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_13 = or(_T_16152, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16153 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16154 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16155 = eq(_T_16154, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16156 = and(_T_16153, _T_16155) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16157 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16158 = eq(_T_16157, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16159 = and(_T_16156, _T_16158) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16160 = or(_T_16159, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16161 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16162 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16163 = eq(_T_16162, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16164 = and(_T_16161, _T_16163) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16165 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16166 = eq(_T_16165, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16167 = and(_T_16164, _T_16166) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16168 = or(_T_16160, _T_16167) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_14 = or(_T_16168, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16169 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16170 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16171 = eq(_T_16170, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16172 = and(_T_16169, _T_16171) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16173 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16174 = eq(_T_16173, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16175 = and(_T_16172, _T_16174) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16176 = or(_T_16175, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16177 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16178 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16179 = eq(_T_16178, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16180 = and(_T_16177, _T_16179) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16181 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16182 = eq(_T_16181, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16183 = and(_T_16180, _T_16182) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16184 = or(_T_16176, _T_16183) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_4_15 = or(_T_16184, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16185 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16186 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16187 = eq(_T_16186, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16188 = and(_T_16185, _T_16187) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16189 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16190 = eq(_T_16189, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16191 = and(_T_16188, _T_16190) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16192 = or(_T_16191, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16193 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16194 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16195 = eq(_T_16194, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16196 = and(_T_16193, _T_16195) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16197 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16198 = eq(_T_16197, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16199 = and(_T_16196, _T_16198) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16200 = or(_T_16192, _T_16199) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_0 = or(_T_16200, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16201 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16202 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16203 = eq(_T_16202, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16204 = and(_T_16201, _T_16203) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16205 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16206 = eq(_T_16205, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16207 = and(_T_16204, _T_16206) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16208 = or(_T_16207, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16209 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16210 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16211 = eq(_T_16210, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16212 = and(_T_16209, _T_16211) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16213 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16214 = eq(_T_16213, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16215 = and(_T_16212, _T_16214) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16216 = or(_T_16208, _T_16215) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_1 = or(_T_16216, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16217 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16218 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16219 = eq(_T_16218, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16220 = and(_T_16217, _T_16219) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16221 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16222 = eq(_T_16221, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16223 = and(_T_16220, _T_16222) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16224 = or(_T_16223, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16225 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16226 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16227 = eq(_T_16226, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16228 = and(_T_16225, _T_16227) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16229 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16230 = eq(_T_16229, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16231 = and(_T_16228, _T_16230) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16232 = or(_T_16224, _T_16231) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_2 = or(_T_16232, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16233 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16234 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16235 = eq(_T_16234, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16236 = and(_T_16233, _T_16235) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16237 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16238 = eq(_T_16237, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16239 = and(_T_16236, _T_16238) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16240 = or(_T_16239, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16241 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16242 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16243 = eq(_T_16242, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16244 = and(_T_16241, _T_16243) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16245 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16246 = eq(_T_16245, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16247 = and(_T_16244, _T_16246) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16248 = or(_T_16240, _T_16247) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_3 = or(_T_16248, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16249 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16250 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16251 = eq(_T_16250, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16252 = and(_T_16249, _T_16251) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16253 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16254 = eq(_T_16253, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16255 = and(_T_16252, _T_16254) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16256 = or(_T_16255, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16257 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16258 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16259 = eq(_T_16258, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16260 = and(_T_16257, _T_16259) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16261 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16262 = eq(_T_16261, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16263 = and(_T_16260, _T_16262) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16264 = or(_T_16256, _T_16263) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_4 = or(_T_16264, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16265 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16266 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16267 = eq(_T_16266, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16268 = and(_T_16265, _T_16267) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16269 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16270 = eq(_T_16269, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16271 = and(_T_16268, _T_16270) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16272 = or(_T_16271, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16273 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16274 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16275 = eq(_T_16274, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16276 = and(_T_16273, _T_16275) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16277 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16278 = eq(_T_16277, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16279 = and(_T_16276, _T_16278) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16280 = or(_T_16272, _T_16279) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_5 = or(_T_16280, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16281 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16282 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16283 = eq(_T_16282, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16284 = and(_T_16281, _T_16283) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16285 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16286 = eq(_T_16285, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16287 = and(_T_16284, _T_16286) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16288 = or(_T_16287, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16289 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16290 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16291 = eq(_T_16290, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16292 = and(_T_16289, _T_16291) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16293 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16294 = eq(_T_16293, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16295 = and(_T_16292, _T_16294) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16296 = or(_T_16288, _T_16295) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_6 = or(_T_16296, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16297 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16298 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16299 = eq(_T_16298, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16300 = and(_T_16297, _T_16299) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16301 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16302 = eq(_T_16301, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16303 = and(_T_16300, _T_16302) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16304 = or(_T_16303, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16305 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16306 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16307 = eq(_T_16306, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16308 = and(_T_16305, _T_16307) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16309 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16310 = eq(_T_16309, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16311 = and(_T_16308, _T_16310) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16312 = or(_T_16304, _T_16311) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_7 = or(_T_16312, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16313 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16314 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16315 = eq(_T_16314, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16316 = and(_T_16313, _T_16315) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16317 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16318 = eq(_T_16317, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16319 = and(_T_16316, _T_16318) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16320 = or(_T_16319, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16321 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16322 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16323 = eq(_T_16322, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16324 = and(_T_16321, _T_16323) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16325 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16326 = eq(_T_16325, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16327 = and(_T_16324, _T_16326) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16328 = or(_T_16320, _T_16327) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_8 = or(_T_16328, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16329 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16330 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16331 = eq(_T_16330, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16332 = and(_T_16329, _T_16331) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16333 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16334 = eq(_T_16333, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16335 = and(_T_16332, _T_16334) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16336 = or(_T_16335, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16337 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16338 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16339 = eq(_T_16338, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16340 = and(_T_16337, _T_16339) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16341 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16342 = eq(_T_16341, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16343 = and(_T_16340, _T_16342) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16344 = or(_T_16336, _T_16343) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_9 = or(_T_16344, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16345 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16346 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16347 = eq(_T_16346, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16348 = and(_T_16345, _T_16347) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16349 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16350 = eq(_T_16349, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16351 = and(_T_16348, _T_16350) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16352 = or(_T_16351, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16353 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16354 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16355 = eq(_T_16354, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16356 = and(_T_16353, _T_16355) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16357 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16358 = eq(_T_16357, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16359 = and(_T_16356, _T_16358) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16360 = or(_T_16352, _T_16359) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_10 = or(_T_16360, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16361 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16362 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16363 = eq(_T_16362, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16364 = and(_T_16361, _T_16363) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16365 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16366 = eq(_T_16365, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16367 = and(_T_16364, _T_16366) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16368 = or(_T_16367, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16369 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16370 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16371 = eq(_T_16370, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16372 = and(_T_16369, _T_16371) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16373 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16374 = eq(_T_16373, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16375 = and(_T_16372, _T_16374) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16376 = or(_T_16368, _T_16375) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_11 = or(_T_16376, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16377 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16378 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16379 = eq(_T_16378, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16380 = and(_T_16377, _T_16379) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16381 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16382 = eq(_T_16381, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16383 = and(_T_16380, _T_16382) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16384 = or(_T_16383, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16385 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16386 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16387 = eq(_T_16386, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16388 = and(_T_16385, _T_16387) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16389 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16390 = eq(_T_16389, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16391 = and(_T_16388, _T_16390) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16392 = or(_T_16384, _T_16391) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_12 = or(_T_16392, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16393 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16394 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16395 = eq(_T_16394, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16396 = and(_T_16393, _T_16395) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16397 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16398 = eq(_T_16397, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16399 = and(_T_16396, _T_16398) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16400 = or(_T_16399, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16401 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16402 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16403 = eq(_T_16402, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16404 = and(_T_16401, _T_16403) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16405 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16406 = eq(_T_16405, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16407 = and(_T_16404, _T_16406) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16408 = or(_T_16400, _T_16407) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_13 = or(_T_16408, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16409 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16410 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16411 = eq(_T_16410, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16412 = and(_T_16409, _T_16411) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16413 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16414 = eq(_T_16413, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16415 = and(_T_16412, _T_16414) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16416 = or(_T_16415, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16417 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16418 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16419 = eq(_T_16418, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16420 = and(_T_16417, _T_16419) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16421 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16422 = eq(_T_16421, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16423 = and(_T_16420, _T_16422) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16424 = or(_T_16416, _T_16423) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_14 = or(_T_16424, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16425 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16426 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16427 = eq(_T_16426, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16428 = and(_T_16425, _T_16427) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16429 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16430 = eq(_T_16429, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16431 = and(_T_16428, _T_16430) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16432 = or(_T_16431, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16433 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16434 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16435 = eq(_T_16434, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16436 = and(_T_16433, _T_16435) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16437 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16438 = eq(_T_16437, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16439 = and(_T_16436, _T_16438) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16440 = or(_T_16432, _T_16439) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_5_15 = or(_T_16440, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16441 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16442 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16443 = eq(_T_16442, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16444 = and(_T_16441, _T_16443) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16445 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16446 = eq(_T_16445, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16447 = and(_T_16444, _T_16446) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16448 = or(_T_16447, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16449 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16450 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16451 = eq(_T_16450, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16452 = and(_T_16449, _T_16451) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16453 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16454 = eq(_T_16453, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16455 = and(_T_16452, _T_16454) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16456 = or(_T_16448, _T_16455) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_0 = or(_T_16456, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16457 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16458 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16459 = eq(_T_16458, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16460 = and(_T_16457, _T_16459) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16461 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16462 = eq(_T_16461, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16463 = and(_T_16460, _T_16462) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16464 = or(_T_16463, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16465 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16466 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16467 = eq(_T_16466, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16468 = and(_T_16465, _T_16467) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16469 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16470 = eq(_T_16469, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16471 = and(_T_16468, _T_16470) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16472 = or(_T_16464, _T_16471) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_1 = or(_T_16472, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16473 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16474 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16475 = eq(_T_16474, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16476 = and(_T_16473, _T_16475) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16477 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16478 = eq(_T_16477, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16479 = and(_T_16476, _T_16478) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16480 = or(_T_16479, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16481 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16482 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16483 = eq(_T_16482, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16484 = and(_T_16481, _T_16483) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16485 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16486 = eq(_T_16485, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16487 = and(_T_16484, _T_16486) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16488 = or(_T_16480, _T_16487) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_2 = or(_T_16488, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16489 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16490 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16491 = eq(_T_16490, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16492 = and(_T_16489, _T_16491) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16493 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16494 = eq(_T_16493, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16495 = and(_T_16492, _T_16494) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16496 = or(_T_16495, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16497 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16498 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16499 = eq(_T_16498, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16500 = and(_T_16497, _T_16499) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16501 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16502 = eq(_T_16501, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16503 = and(_T_16500, _T_16502) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16504 = or(_T_16496, _T_16503) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_3 = or(_T_16504, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16505 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16506 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16507 = eq(_T_16506, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16508 = and(_T_16505, _T_16507) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16509 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16510 = eq(_T_16509, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16511 = and(_T_16508, _T_16510) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16512 = or(_T_16511, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16513 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16514 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16515 = eq(_T_16514, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16516 = and(_T_16513, _T_16515) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16517 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16518 = eq(_T_16517, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16519 = and(_T_16516, _T_16518) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16520 = or(_T_16512, _T_16519) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_4 = or(_T_16520, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16521 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16522 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16523 = eq(_T_16522, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16524 = and(_T_16521, _T_16523) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16525 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16526 = eq(_T_16525, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16527 = and(_T_16524, _T_16526) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16528 = or(_T_16527, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16529 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16530 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16531 = eq(_T_16530, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16532 = and(_T_16529, _T_16531) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16533 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16534 = eq(_T_16533, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16535 = and(_T_16532, _T_16534) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16536 = or(_T_16528, _T_16535) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_5 = or(_T_16536, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16537 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16538 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16539 = eq(_T_16538, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16540 = and(_T_16537, _T_16539) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16541 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16542 = eq(_T_16541, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16543 = and(_T_16540, _T_16542) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16544 = or(_T_16543, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16545 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16546 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16547 = eq(_T_16546, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16548 = and(_T_16545, _T_16547) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16549 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16550 = eq(_T_16549, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16551 = and(_T_16548, _T_16550) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16552 = or(_T_16544, _T_16551) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_6 = or(_T_16552, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16553 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16554 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16555 = eq(_T_16554, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16556 = and(_T_16553, _T_16555) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16557 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16558 = eq(_T_16557, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16559 = and(_T_16556, _T_16558) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16560 = or(_T_16559, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16561 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16562 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16563 = eq(_T_16562, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16564 = and(_T_16561, _T_16563) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16565 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16566 = eq(_T_16565, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16567 = and(_T_16564, _T_16566) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16568 = or(_T_16560, _T_16567) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_7 = or(_T_16568, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16569 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16570 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16571 = eq(_T_16570, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16572 = and(_T_16569, _T_16571) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16573 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16574 = eq(_T_16573, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16575 = and(_T_16572, _T_16574) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16576 = or(_T_16575, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16577 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16578 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16579 = eq(_T_16578, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16580 = and(_T_16577, _T_16579) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16581 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16582 = eq(_T_16581, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16583 = and(_T_16580, _T_16582) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16584 = or(_T_16576, _T_16583) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_8 = or(_T_16584, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16585 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16586 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16587 = eq(_T_16586, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16588 = and(_T_16585, _T_16587) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16589 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16590 = eq(_T_16589, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16591 = and(_T_16588, _T_16590) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16592 = or(_T_16591, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16593 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16594 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16595 = eq(_T_16594, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16596 = and(_T_16593, _T_16595) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16597 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16598 = eq(_T_16597, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16599 = and(_T_16596, _T_16598) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16600 = or(_T_16592, _T_16599) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_9 = or(_T_16600, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16601 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16602 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16603 = eq(_T_16602, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16604 = and(_T_16601, _T_16603) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16605 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16606 = eq(_T_16605, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16607 = and(_T_16604, _T_16606) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16608 = or(_T_16607, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16609 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16610 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16611 = eq(_T_16610, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16612 = and(_T_16609, _T_16611) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16613 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16614 = eq(_T_16613, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16615 = and(_T_16612, _T_16614) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16616 = or(_T_16608, _T_16615) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_10 = or(_T_16616, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16617 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16618 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16619 = eq(_T_16618, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16620 = and(_T_16617, _T_16619) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16621 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16622 = eq(_T_16621, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16623 = and(_T_16620, _T_16622) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16624 = or(_T_16623, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16625 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16626 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16627 = eq(_T_16626, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16628 = and(_T_16625, _T_16627) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16629 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16630 = eq(_T_16629, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16631 = and(_T_16628, _T_16630) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16632 = or(_T_16624, _T_16631) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_11 = or(_T_16632, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16633 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16634 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16635 = eq(_T_16634, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16636 = and(_T_16633, _T_16635) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16637 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16638 = eq(_T_16637, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16639 = and(_T_16636, _T_16638) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16640 = or(_T_16639, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16641 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16642 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16643 = eq(_T_16642, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16644 = and(_T_16641, _T_16643) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16645 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16646 = eq(_T_16645, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16647 = and(_T_16644, _T_16646) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16648 = or(_T_16640, _T_16647) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_12 = or(_T_16648, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16649 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16650 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16651 = eq(_T_16650, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16652 = and(_T_16649, _T_16651) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16653 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16654 = eq(_T_16653, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16655 = and(_T_16652, _T_16654) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16656 = or(_T_16655, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16657 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16658 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16659 = eq(_T_16658, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16660 = and(_T_16657, _T_16659) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16661 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16662 = eq(_T_16661, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16663 = and(_T_16660, _T_16662) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16664 = or(_T_16656, _T_16663) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_13 = or(_T_16664, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16665 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16666 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16667 = eq(_T_16666, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16668 = and(_T_16665, _T_16667) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16669 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16670 = eq(_T_16669, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16671 = and(_T_16668, _T_16670) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16672 = or(_T_16671, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16673 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16674 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16675 = eq(_T_16674, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16676 = and(_T_16673, _T_16675) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16677 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16678 = eq(_T_16677, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16679 = and(_T_16676, _T_16678) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16680 = or(_T_16672, _T_16679) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_14 = or(_T_16680, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16681 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16682 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16683 = eq(_T_16682, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16684 = and(_T_16681, _T_16683) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16685 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16686 = eq(_T_16685, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16687 = and(_T_16684, _T_16686) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16688 = or(_T_16687, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16689 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16690 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16691 = eq(_T_16690, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16692 = and(_T_16689, _T_16691) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16693 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16694 = eq(_T_16693, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16695 = and(_T_16692, _T_16694) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16696 = or(_T_16688, _T_16695) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_6_15 = or(_T_16696, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16697 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16698 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16699 = eq(_T_16698, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16700 = and(_T_16697, _T_16699) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16701 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16702 = eq(_T_16701, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16703 = and(_T_16700, _T_16702) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16704 = or(_T_16703, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16705 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16706 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16707 = eq(_T_16706, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16708 = and(_T_16705, _T_16707) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16709 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16710 = eq(_T_16709, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16711 = and(_T_16708, _T_16710) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16712 = or(_T_16704, _T_16711) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_0 = or(_T_16712, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16713 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16714 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16715 = eq(_T_16714, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16716 = and(_T_16713, _T_16715) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16717 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16718 = eq(_T_16717, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16719 = and(_T_16716, _T_16718) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16720 = or(_T_16719, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16721 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16722 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16723 = eq(_T_16722, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16724 = and(_T_16721, _T_16723) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16725 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16726 = eq(_T_16725, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16727 = and(_T_16724, _T_16726) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16728 = or(_T_16720, _T_16727) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_1 = or(_T_16728, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16729 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16730 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16731 = eq(_T_16730, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16732 = and(_T_16729, _T_16731) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16733 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16734 = eq(_T_16733, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16735 = and(_T_16732, _T_16734) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16736 = or(_T_16735, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16737 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16738 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16739 = eq(_T_16738, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16740 = and(_T_16737, _T_16739) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16741 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16742 = eq(_T_16741, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16743 = and(_T_16740, _T_16742) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16744 = or(_T_16736, _T_16743) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_2 = or(_T_16744, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16745 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16746 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16747 = eq(_T_16746, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16748 = and(_T_16745, _T_16747) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16749 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16750 = eq(_T_16749, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16751 = and(_T_16748, _T_16750) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16752 = or(_T_16751, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16753 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16754 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16755 = eq(_T_16754, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16756 = and(_T_16753, _T_16755) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16757 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16758 = eq(_T_16757, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16759 = and(_T_16756, _T_16758) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16760 = or(_T_16752, _T_16759) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_3 = or(_T_16760, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16761 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16762 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16763 = eq(_T_16762, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16764 = and(_T_16761, _T_16763) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16765 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16766 = eq(_T_16765, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16767 = and(_T_16764, _T_16766) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16768 = or(_T_16767, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16769 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16770 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16771 = eq(_T_16770, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16772 = and(_T_16769, _T_16771) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16773 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16774 = eq(_T_16773, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16775 = and(_T_16772, _T_16774) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16776 = or(_T_16768, _T_16775) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_4 = or(_T_16776, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16777 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16778 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16779 = eq(_T_16778, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16780 = and(_T_16777, _T_16779) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16781 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16782 = eq(_T_16781, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16783 = and(_T_16780, _T_16782) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16784 = or(_T_16783, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16785 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16786 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16787 = eq(_T_16786, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16788 = and(_T_16785, _T_16787) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16789 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16790 = eq(_T_16789, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16791 = and(_T_16788, _T_16790) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16792 = or(_T_16784, _T_16791) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_5 = or(_T_16792, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16793 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16794 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16795 = eq(_T_16794, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16796 = and(_T_16793, _T_16795) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16797 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16798 = eq(_T_16797, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16799 = and(_T_16796, _T_16798) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16800 = or(_T_16799, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16801 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16802 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16803 = eq(_T_16802, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16804 = and(_T_16801, _T_16803) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16805 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16806 = eq(_T_16805, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16807 = and(_T_16804, _T_16806) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16808 = or(_T_16800, _T_16807) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_6 = or(_T_16808, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16809 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16810 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16811 = eq(_T_16810, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16812 = and(_T_16809, _T_16811) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16813 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16814 = eq(_T_16813, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16815 = and(_T_16812, _T_16814) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16816 = or(_T_16815, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16817 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16818 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16819 = eq(_T_16818, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16820 = and(_T_16817, _T_16819) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16821 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16822 = eq(_T_16821, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16823 = and(_T_16820, _T_16822) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16824 = or(_T_16816, _T_16823) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_7 = or(_T_16824, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16825 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16826 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16827 = eq(_T_16826, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16828 = and(_T_16825, _T_16827) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16829 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16830 = eq(_T_16829, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16831 = and(_T_16828, _T_16830) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16832 = or(_T_16831, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16833 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16834 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16835 = eq(_T_16834, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16836 = and(_T_16833, _T_16835) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16837 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16838 = eq(_T_16837, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16839 = and(_T_16836, _T_16838) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16840 = or(_T_16832, _T_16839) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_8 = or(_T_16840, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16841 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16842 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16843 = eq(_T_16842, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16844 = and(_T_16841, _T_16843) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16845 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16846 = eq(_T_16845, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16847 = and(_T_16844, _T_16846) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16848 = or(_T_16847, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16849 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16850 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16851 = eq(_T_16850, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16852 = and(_T_16849, _T_16851) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16853 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16854 = eq(_T_16853, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16855 = and(_T_16852, _T_16854) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16856 = or(_T_16848, _T_16855) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_9 = or(_T_16856, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16857 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16858 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16859 = eq(_T_16858, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16860 = and(_T_16857, _T_16859) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16861 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16862 = eq(_T_16861, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16863 = and(_T_16860, _T_16862) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16864 = or(_T_16863, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16865 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16866 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16867 = eq(_T_16866, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16868 = and(_T_16865, _T_16867) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16869 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16870 = eq(_T_16869, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16871 = and(_T_16868, _T_16870) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16872 = or(_T_16864, _T_16871) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_10 = or(_T_16872, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16873 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16874 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16875 = eq(_T_16874, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16876 = and(_T_16873, _T_16875) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16877 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16878 = eq(_T_16877, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16879 = and(_T_16876, _T_16878) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16880 = or(_T_16879, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16881 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16882 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16883 = eq(_T_16882, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16884 = and(_T_16881, _T_16883) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16885 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16886 = eq(_T_16885, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16887 = and(_T_16884, _T_16886) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16888 = or(_T_16880, _T_16887) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_11 = or(_T_16888, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16889 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16890 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16891 = eq(_T_16890, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16892 = and(_T_16889, _T_16891) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16893 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16894 = eq(_T_16893, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16895 = and(_T_16892, _T_16894) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16896 = or(_T_16895, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16897 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16898 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16899 = eq(_T_16898, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16900 = and(_T_16897, _T_16899) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16901 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16902 = eq(_T_16901, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16903 = and(_T_16900, _T_16902) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16904 = or(_T_16896, _T_16903) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_12 = or(_T_16904, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16905 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16906 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16907 = eq(_T_16906, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16908 = and(_T_16905, _T_16907) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16909 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16910 = eq(_T_16909, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16911 = and(_T_16908, _T_16910) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16912 = or(_T_16911, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16913 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16914 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16915 = eq(_T_16914, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16916 = and(_T_16913, _T_16915) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16917 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16918 = eq(_T_16917, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16919 = and(_T_16916, _T_16918) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16920 = or(_T_16912, _T_16919) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_13 = or(_T_16920, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16921 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16922 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16923 = eq(_T_16922, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16924 = and(_T_16921, _T_16923) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16925 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16926 = eq(_T_16925, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16927 = and(_T_16924, _T_16926) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16928 = or(_T_16927, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16929 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16930 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16931 = eq(_T_16930, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16932 = and(_T_16929, _T_16931) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16933 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16934 = eq(_T_16933, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16935 = and(_T_16932, _T_16934) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16936 = or(_T_16928, _T_16935) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_14 = or(_T_16936, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16937 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16938 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16939 = eq(_T_16938, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16940 = and(_T_16937, _T_16939) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16941 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16942 = eq(_T_16941, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16943 = and(_T_16940, _T_16942) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16944 = or(_T_16943, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16945 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16946 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16947 = eq(_T_16946, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16948 = and(_T_16945, _T_16947) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16949 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16950 = eq(_T_16949, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16951 = and(_T_16948, _T_16950) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16952 = or(_T_16944, _T_16951) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_7_15 = or(_T_16952, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16953 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16954 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16955 = eq(_T_16954, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16956 = and(_T_16953, _T_16955) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16957 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16958 = eq(_T_16957, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16959 = and(_T_16956, _T_16958) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16960 = or(_T_16959, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16961 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16962 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16963 = eq(_T_16962, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16964 = and(_T_16961, _T_16963) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16965 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16966 = eq(_T_16965, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16967 = and(_T_16964, _T_16966) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16968 = or(_T_16960, _T_16967) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_0 = or(_T_16968, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16969 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16970 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16971 = eq(_T_16970, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16972 = and(_T_16969, _T_16971) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16973 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16974 = eq(_T_16973, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16975 = and(_T_16972, _T_16974) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16976 = or(_T_16975, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16977 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16978 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16979 = eq(_T_16978, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16980 = and(_T_16977, _T_16979) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16981 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16982 = eq(_T_16981, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16983 = and(_T_16980, _T_16982) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_16984 = or(_T_16976, _T_16983) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_1 = or(_T_16984, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_16985 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_16986 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_16987 = eq(_T_16986, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_16988 = and(_T_16985, _T_16987) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_16989 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_16990 = eq(_T_16989, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_16991 = and(_T_16988, _T_16990) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_16992 = or(_T_16991, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_16993 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_16994 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_16995 = eq(_T_16994, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_16996 = and(_T_16993, _T_16995) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_16997 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_16998 = eq(_T_16997, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_16999 = and(_T_16996, _T_16998) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17000 = or(_T_16992, _T_16999) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_2 = or(_T_17000, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17001 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17002 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17003 = eq(_T_17002, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17004 = and(_T_17001, _T_17003) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17005 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17006 = eq(_T_17005, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17007 = and(_T_17004, _T_17006) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17008 = or(_T_17007, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17009 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17010 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17011 = eq(_T_17010, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17012 = and(_T_17009, _T_17011) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17013 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17014 = eq(_T_17013, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17015 = and(_T_17012, _T_17014) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17016 = or(_T_17008, _T_17015) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_3 = or(_T_17016, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17017 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17018 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17019 = eq(_T_17018, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17020 = and(_T_17017, _T_17019) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17021 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17022 = eq(_T_17021, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17023 = and(_T_17020, _T_17022) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17024 = or(_T_17023, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17025 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17026 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17027 = eq(_T_17026, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17028 = and(_T_17025, _T_17027) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17029 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17030 = eq(_T_17029, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17031 = and(_T_17028, _T_17030) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17032 = or(_T_17024, _T_17031) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_4 = or(_T_17032, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17033 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17034 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17035 = eq(_T_17034, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17036 = and(_T_17033, _T_17035) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17037 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17038 = eq(_T_17037, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17039 = and(_T_17036, _T_17038) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17040 = or(_T_17039, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17041 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17042 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17043 = eq(_T_17042, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17044 = and(_T_17041, _T_17043) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17045 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17046 = eq(_T_17045, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17047 = and(_T_17044, _T_17046) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17048 = or(_T_17040, _T_17047) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_5 = or(_T_17048, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17049 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17050 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17051 = eq(_T_17050, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17052 = and(_T_17049, _T_17051) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17053 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17054 = eq(_T_17053, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17055 = and(_T_17052, _T_17054) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17056 = or(_T_17055, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17057 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17058 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17059 = eq(_T_17058, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17060 = and(_T_17057, _T_17059) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17061 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17062 = eq(_T_17061, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17063 = and(_T_17060, _T_17062) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17064 = or(_T_17056, _T_17063) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_6 = or(_T_17064, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17065 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17066 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17067 = eq(_T_17066, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17068 = and(_T_17065, _T_17067) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17069 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17070 = eq(_T_17069, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17071 = and(_T_17068, _T_17070) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17072 = or(_T_17071, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17073 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17074 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17075 = eq(_T_17074, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17076 = and(_T_17073, _T_17075) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17077 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17078 = eq(_T_17077, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17079 = and(_T_17076, _T_17078) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17080 = or(_T_17072, _T_17079) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_7 = or(_T_17080, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17081 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17082 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17083 = eq(_T_17082, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17084 = and(_T_17081, _T_17083) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17085 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17086 = eq(_T_17085, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17087 = and(_T_17084, _T_17086) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17088 = or(_T_17087, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17089 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17090 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17091 = eq(_T_17090, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17092 = and(_T_17089, _T_17091) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17093 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17094 = eq(_T_17093, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17095 = and(_T_17092, _T_17094) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17096 = or(_T_17088, _T_17095) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_8 = or(_T_17096, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17097 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17098 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17099 = eq(_T_17098, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17100 = and(_T_17097, _T_17099) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17101 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17102 = eq(_T_17101, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17103 = and(_T_17100, _T_17102) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17104 = or(_T_17103, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17105 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17106 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17107 = eq(_T_17106, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17108 = and(_T_17105, _T_17107) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17109 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17110 = eq(_T_17109, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17111 = and(_T_17108, _T_17110) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17112 = or(_T_17104, _T_17111) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_9 = or(_T_17112, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17113 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17114 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17115 = eq(_T_17114, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17116 = and(_T_17113, _T_17115) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17117 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17118 = eq(_T_17117, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17119 = and(_T_17116, _T_17118) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17120 = or(_T_17119, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17121 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17122 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17123 = eq(_T_17122, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17124 = and(_T_17121, _T_17123) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17125 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17126 = eq(_T_17125, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17127 = and(_T_17124, _T_17126) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17128 = or(_T_17120, _T_17127) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_10 = or(_T_17128, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17129 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17130 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17131 = eq(_T_17130, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17132 = and(_T_17129, _T_17131) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17133 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17134 = eq(_T_17133, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17135 = and(_T_17132, _T_17134) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17136 = or(_T_17135, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17137 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17138 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17139 = eq(_T_17138, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17140 = and(_T_17137, _T_17139) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17141 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17142 = eq(_T_17141, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17143 = and(_T_17140, _T_17142) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17144 = or(_T_17136, _T_17143) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_11 = or(_T_17144, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17145 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17146 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17147 = eq(_T_17146, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17148 = and(_T_17145, _T_17147) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17149 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17150 = eq(_T_17149, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17151 = and(_T_17148, _T_17150) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17152 = or(_T_17151, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17153 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17154 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17155 = eq(_T_17154, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17156 = and(_T_17153, _T_17155) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17157 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17158 = eq(_T_17157, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17159 = and(_T_17156, _T_17158) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17160 = or(_T_17152, _T_17159) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_12 = or(_T_17160, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17161 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17162 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17163 = eq(_T_17162, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17164 = and(_T_17161, _T_17163) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17165 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17166 = eq(_T_17165, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17167 = and(_T_17164, _T_17166) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17168 = or(_T_17167, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17169 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17170 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17171 = eq(_T_17170, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17172 = and(_T_17169, _T_17171) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17173 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17174 = eq(_T_17173, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17175 = and(_T_17172, _T_17174) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17176 = or(_T_17168, _T_17175) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_13 = or(_T_17176, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17177 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17178 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17179 = eq(_T_17178, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17180 = and(_T_17177, _T_17179) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17181 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17182 = eq(_T_17181, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17183 = and(_T_17180, _T_17182) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17184 = or(_T_17183, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17185 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17186 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17187 = eq(_T_17186, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17188 = and(_T_17185, _T_17187) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17189 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17190 = eq(_T_17189, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17191 = and(_T_17188, _T_17190) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17192 = or(_T_17184, _T_17191) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_14 = or(_T_17192, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17193 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17194 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17195 = eq(_T_17194, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17196 = and(_T_17193, _T_17195) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17197 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17198 = eq(_T_17197, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17199 = and(_T_17196, _T_17198) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17200 = or(_T_17199, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17201 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17202 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17203 = eq(_T_17202, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17204 = and(_T_17201, _T_17203) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17205 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17206 = eq(_T_17205, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17207 = and(_T_17204, _T_17206) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17208 = or(_T_17200, _T_17207) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_8_15 = or(_T_17208, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17209 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17210 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17211 = eq(_T_17210, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17212 = and(_T_17209, _T_17211) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17213 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17214 = eq(_T_17213, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17215 = and(_T_17212, _T_17214) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17216 = or(_T_17215, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17217 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17218 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17219 = eq(_T_17218, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17220 = and(_T_17217, _T_17219) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17221 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17222 = eq(_T_17221, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17223 = and(_T_17220, _T_17222) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17224 = or(_T_17216, _T_17223) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_0 = or(_T_17224, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17225 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17226 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17227 = eq(_T_17226, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17228 = and(_T_17225, _T_17227) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17229 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17230 = eq(_T_17229, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17231 = and(_T_17228, _T_17230) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17232 = or(_T_17231, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17233 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17234 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17235 = eq(_T_17234, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17236 = and(_T_17233, _T_17235) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17237 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17238 = eq(_T_17237, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17239 = and(_T_17236, _T_17238) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17240 = or(_T_17232, _T_17239) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_1 = or(_T_17240, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17241 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17242 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17243 = eq(_T_17242, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17244 = and(_T_17241, _T_17243) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17245 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17246 = eq(_T_17245, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17247 = and(_T_17244, _T_17246) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17248 = or(_T_17247, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17249 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17250 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17251 = eq(_T_17250, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17252 = and(_T_17249, _T_17251) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17253 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17254 = eq(_T_17253, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17255 = and(_T_17252, _T_17254) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17256 = or(_T_17248, _T_17255) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_2 = or(_T_17256, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17257 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17258 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17259 = eq(_T_17258, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17260 = and(_T_17257, _T_17259) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17261 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17262 = eq(_T_17261, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17263 = and(_T_17260, _T_17262) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17264 = or(_T_17263, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17265 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17266 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17267 = eq(_T_17266, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17268 = and(_T_17265, _T_17267) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17269 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17270 = eq(_T_17269, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17271 = and(_T_17268, _T_17270) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17272 = or(_T_17264, _T_17271) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_3 = or(_T_17272, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17273 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17274 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17275 = eq(_T_17274, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17276 = and(_T_17273, _T_17275) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17277 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17278 = eq(_T_17277, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17279 = and(_T_17276, _T_17278) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17280 = or(_T_17279, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17281 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17282 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17283 = eq(_T_17282, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17284 = and(_T_17281, _T_17283) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17285 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17286 = eq(_T_17285, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17287 = and(_T_17284, _T_17286) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17288 = or(_T_17280, _T_17287) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_4 = or(_T_17288, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17289 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17290 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17291 = eq(_T_17290, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17292 = and(_T_17289, _T_17291) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17293 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17294 = eq(_T_17293, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17295 = and(_T_17292, _T_17294) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17296 = or(_T_17295, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17297 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17298 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17299 = eq(_T_17298, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17300 = and(_T_17297, _T_17299) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17301 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17302 = eq(_T_17301, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17303 = and(_T_17300, _T_17302) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17304 = or(_T_17296, _T_17303) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_5 = or(_T_17304, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17305 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17306 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17307 = eq(_T_17306, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17308 = and(_T_17305, _T_17307) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17309 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17310 = eq(_T_17309, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17311 = and(_T_17308, _T_17310) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17312 = or(_T_17311, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17313 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17314 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17315 = eq(_T_17314, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17316 = and(_T_17313, _T_17315) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17317 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17318 = eq(_T_17317, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17319 = and(_T_17316, _T_17318) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17320 = or(_T_17312, _T_17319) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_6 = or(_T_17320, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17321 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17322 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17323 = eq(_T_17322, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17324 = and(_T_17321, _T_17323) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17325 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17326 = eq(_T_17325, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17327 = and(_T_17324, _T_17326) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17328 = or(_T_17327, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17329 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17330 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17331 = eq(_T_17330, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17332 = and(_T_17329, _T_17331) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17333 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17334 = eq(_T_17333, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17335 = and(_T_17332, _T_17334) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17336 = or(_T_17328, _T_17335) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_7 = or(_T_17336, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17337 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17338 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17339 = eq(_T_17338, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17340 = and(_T_17337, _T_17339) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17341 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17342 = eq(_T_17341, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17343 = and(_T_17340, _T_17342) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17344 = or(_T_17343, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17345 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17346 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17347 = eq(_T_17346, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17348 = and(_T_17345, _T_17347) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17349 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17350 = eq(_T_17349, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17351 = and(_T_17348, _T_17350) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17352 = or(_T_17344, _T_17351) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_8 = or(_T_17352, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17353 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17354 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17355 = eq(_T_17354, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17356 = and(_T_17353, _T_17355) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17357 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17358 = eq(_T_17357, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17359 = and(_T_17356, _T_17358) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17360 = or(_T_17359, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17361 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17362 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17363 = eq(_T_17362, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17364 = and(_T_17361, _T_17363) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17365 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17366 = eq(_T_17365, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17367 = and(_T_17364, _T_17366) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17368 = or(_T_17360, _T_17367) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_9 = or(_T_17368, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17369 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17370 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17371 = eq(_T_17370, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17372 = and(_T_17369, _T_17371) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17373 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17374 = eq(_T_17373, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17375 = and(_T_17372, _T_17374) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17376 = or(_T_17375, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17377 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17378 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17379 = eq(_T_17378, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17380 = and(_T_17377, _T_17379) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17381 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17382 = eq(_T_17381, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17383 = and(_T_17380, _T_17382) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17384 = or(_T_17376, _T_17383) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_10 = or(_T_17384, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17385 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17386 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17387 = eq(_T_17386, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17388 = and(_T_17385, _T_17387) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17389 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17390 = eq(_T_17389, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17391 = and(_T_17388, _T_17390) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17392 = or(_T_17391, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17393 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17394 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17395 = eq(_T_17394, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17396 = and(_T_17393, _T_17395) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17397 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17398 = eq(_T_17397, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17399 = and(_T_17396, _T_17398) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17400 = or(_T_17392, _T_17399) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_11 = or(_T_17400, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17401 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17402 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17403 = eq(_T_17402, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17404 = and(_T_17401, _T_17403) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17405 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17406 = eq(_T_17405, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17407 = and(_T_17404, _T_17406) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17408 = or(_T_17407, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17409 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17410 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17411 = eq(_T_17410, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17412 = and(_T_17409, _T_17411) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17413 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17414 = eq(_T_17413, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17415 = and(_T_17412, _T_17414) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17416 = or(_T_17408, _T_17415) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_12 = or(_T_17416, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17417 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17418 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17419 = eq(_T_17418, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17420 = and(_T_17417, _T_17419) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17421 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17422 = eq(_T_17421, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17423 = and(_T_17420, _T_17422) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17424 = or(_T_17423, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17425 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17426 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17427 = eq(_T_17426, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17428 = and(_T_17425, _T_17427) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17429 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17430 = eq(_T_17429, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17431 = and(_T_17428, _T_17430) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17432 = or(_T_17424, _T_17431) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_13 = or(_T_17432, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17433 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17434 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17435 = eq(_T_17434, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17436 = and(_T_17433, _T_17435) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17437 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17438 = eq(_T_17437, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17439 = and(_T_17436, _T_17438) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17440 = or(_T_17439, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17441 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17442 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17443 = eq(_T_17442, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17444 = and(_T_17441, _T_17443) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17445 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17446 = eq(_T_17445, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17447 = and(_T_17444, _T_17446) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17448 = or(_T_17440, _T_17447) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_14 = or(_T_17448, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17449 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17450 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17451 = eq(_T_17450, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17452 = and(_T_17449, _T_17451) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17453 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17454 = eq(_T_17453, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17455 = and(_T_17452, _T_17454) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17456 = or(_T_17455, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17457 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17458 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17459 = eq(_T_17458, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17460 = and(_T_17457, _T_17459) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17461 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17462 = eq(_T_17461, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17463 = and(_T_17460, _T_17462) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17464 = or(_T_17456, _T_17463) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_9_15 = or(_T_17464, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17465 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17466 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17467 = eq(_T_17466, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17468 = and(_T_17465, _T_17467) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17469 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17470 = eq(_T_17469, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17471 = and(_T_17468, _T_17470) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17472 = or(_T_17471, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17473 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17474 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17475 = eq(_T_17474, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17476 = and(_T_17473, _T_17475) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17477 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17478 = eq(_T_17477, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17479 = and(_T_17476, _T_17478) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17480 = or(_T_17472, _T_17479) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_0 = or(_T_17480, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17481 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17482 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17483 = eq(_T_17482, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17484 = and(_T_17481, _T_17483) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17485 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17486 = eq(_T_17485, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17487 = and(_T_17484, _T_17486) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17488 = or(_T_17487, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17489 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17490 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17491 = eq(_T_17490, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17492 = and(_T_17489, _T_17491) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17493 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17494 = eq(_T_17493, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17495 = and(_T_17492, _T_17494) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17496 = or(_T_17488, _T_17495) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_1 = or(_T_17496, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17497 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17498 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17499 = eq(_T_17498, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17500 = and(_T_17497, _T_17499) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17501 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17502 = eq(_T_17501, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17503 = and(_T_17500, _T_17502) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17504 = or(_T_17503, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17505 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17506 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17507 = eq(_T_17506, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17508 = and(_T_17505, _T_17507) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17509 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17510 = eq(_T_17509, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17511 = and(_T_17508, _T_17510) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17512 = or(_T_17504, _T_17511) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_2 = or(_T_17512, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17513 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17514 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17515 = eq(_T_17514, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17516 = and(_T_17513, _T_17515) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17517 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17518 = eq(_T_17517, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17519 = and(_T_17516, _T_17518) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17520 = or(_T_17519, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17521 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17522 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17523 = eq(_T_17522, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17524 = and(_T_17521, _T_17523) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17525 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17526 = eq(_T_17525, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17527 = and(_T_17524, _T_17526) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17528 = or(_T_17520, _T_17527) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_3 = or(_T_17528, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17529 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17530 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17531 = eq(_T_17530, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17532 = and(_T_17529, _T_17531) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17533 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17534 = eq(_T_17533, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17535 = and(_T_17532, _T_17534) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17536 = or(_T_17535, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17537 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17538 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17539 = eq(_T_17538, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17540 = and(_T_17537, _T_17539) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17541 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17542 = eq(_T_17541, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17543 = and(_T_17540, _T_17542) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17544 = or(_T_17536, _T_17543) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_4 = or(_T_17544, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17545 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17546 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17547 = eq(_T_17546, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17548 = and(_T_17545, _T_17547) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17549 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17550 = eq(_T_17549, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17551 = and(_T_17548, _T_17550) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17552 = or(_T_17551, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17553 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17554 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17555 = eq(_T_17554, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17556 = and(_T_17553, _T_17555) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17557 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17558 = eq(_T_17557, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17559 = and(_T_17556, _T_17558) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17560 = or(_T_17552, _T_17559) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_5 = or(_T_17560, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17561 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17562 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17563 = eq(_T_17562, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17564 = and(_T_17561, _T_17563) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17565 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17566 = eq(_T_17565, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17567 = and(_T_17564, _T_17566) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17568 = or(_T_17567, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17569 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17570 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17571 = eq(_T_17570, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17572 = and(_T_17569, _T_17571) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17573 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17574 = eq(_T_17573, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17575 = and(_T_17572, _T_17574) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17576 = or(_T_17568, _T_17575) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_6 = or(_T_17576, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17577 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17578 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17579 = eq(_T_17578, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17580 = and(_T_17577, _T_17579) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17581 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17582 = eq(_T_17581, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17583 = and(_T_17580, _T_17582) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17584 = or(_T_17583, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17585 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17586 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17587 = eq(_T_17586, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17588 = and(_T_17585, _T_17587) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17589 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17590 = eq(_T_17589, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17591 = and(_T_17588, _T_17590) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17592 = or(_T_17584, _T_17591) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_7 = or(_T_17592, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17593 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17594 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17595 = eq(_T_17594, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17596 = and(_T_17593, _T_17595) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17597 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17598 = eq(_T_17597, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17599 = and(_T_17596, _T_17598) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17600 = or(_T_17599, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17601 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17602 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17603 = eq(_T_17602, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17604 = and(_T_17601, _T_17603) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17605 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17606 = eq(_T_17605, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17607 = and(_T_17604, _T_17606) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17608 = or(_T_17600, _T_17607) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_8 = or(_T_17608, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17609 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17610 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17611 = eq(_T_17610, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17612 = and(_T_17609, _T_17611) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17613 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17614 = eq(_T_17613, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17615 = and(_T_17612, _T_17614) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17616 = or(_T_17615, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17617 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17618 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17619 = eq(_T_17618, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17620 = and(_T_17617, _T_17619) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17621 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17622 = eq(_T_17621, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17623 = and(_T_17620, _T_17622) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17624 = or(_T_17616, _T_17623) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_9 = or(_T_17624, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17625 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17626 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17627 = eq(_T_17626, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17628 = and(_T_17625, _T_17627) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17629 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17630 = eq(_T_17629, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17631 = and(_T_17628, _T_17630) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17632 = or(_T_17631, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17633 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17634 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17635 = eq(_T_17634, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17636 = and(_T_17633, _T_17635) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17637 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17638 = eq(_T_17637, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17639 = and(_T_17636, _T_17638) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17640 = or(_T_17632, _T_17639) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_10 = or(_T_17640, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17641 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17642 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17643 = eq(_T_17642, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17644 = and(_T_17641, _T_17643) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17645 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17646 = eq(_T_17645, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17647 = and(_T_17644, _T_17646) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17648 = or(_T_17647, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17649 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17650 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17651 = eq(_T_17650, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17652 = and(_T_17649, _T_17651) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17653 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17654 = eq(_T_17653, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17655 = and(_T_17652, _T_17654) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17656 = or(_T_17648, _T_17655) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_11 = or(_T_17656, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17657 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17658 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17659 = eq(_T_17658, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17660 = and(_T_17657, _T_17659) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17661 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17662 = eq(_T_17661, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17663 = and(_T_17660, _T_17662) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17664 = or(_T_17663, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17665 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17666 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17667 = eq(_T_17666, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17668 = and(_T_17665, _T_17667) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17669 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17670 = eq(_T_17669, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17671 = and(_T_17668, _T_17670) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17672 = or(_T_17664, _T_17671) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_12 = or(_T_17672, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17673 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17674 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17675 = eq(_T_17674, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17676 = and(_T_17673, _T_17675) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17677 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17678 = eq(_T_17677, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17679 = and(_T_17676, _T_17678) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17680 = or(_T_17679, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17681 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17682 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17683 = eq(_T_17682, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17684 = and(_T_17681, _T_17683) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17685 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17686 = eq(_T_17685, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17687 = and(_T_17684, _T_17686) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17688 = or(_T_17680, _T_17687) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_13 = or(_T_17688, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17689 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17690 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17691 = eq(_T_17690, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17692 = and(_T_17689, _T_17691) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17693 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17694 = eq(_T_17693, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17695 = and(_T_17692, _T_17694) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17696 = or(_T_17695, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17697 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17698 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17699 = eq(_T_17698, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17700 = and(_T_17697, _T_17699) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17701 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17702 = eq(_T_17701, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17703 = and(_T_17700, _T_17702) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17704 = or(_T_17696, _T_17703) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_14 = or(_T_17704, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17705 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17706 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17707 = eq(_T_17706, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17708 = and(_T_17705, _T_17707) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17709 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17710 = eq(_T_17709, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17711 = and(_T_17708, _T_17710) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17712 = or(_T_17711, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17713 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17714 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17715 = eq(_T_17714, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17716 = and(_T_17713, _T_17715) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17717 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17718 = eq(_T_17717, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17719 = and(_T_17716, _T_17718) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17720 = or(_T_17712, _T_17719) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_10_15 = or(_T_17720, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17721 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17722 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17723 = eq(_T_17722, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17724 = and(_T_17721, _T_17723) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17725 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17726 = eq(_T_17725, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17727 = and(_T_17724, _T_17726) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17728 = or(_T_17727, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17729 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17730 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17731 = eq(_T_17730, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17732 = and(_T_17729, _T_17731) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17733 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17734 = eq(_T_17733, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17735 = and(_T_17732, _T_17734) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17736 = or(_T_17728, _T_17735) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_0 = or(_T_17736, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17737 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17738 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17739 = eq(_T_17738, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17740 = and(_T_17737, _T_17739) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17741 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17742 = eq(_T_17741, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17743 = and(_T_17740, _T_17742) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17744 = or(_T_17743, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17745 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17746 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17747 = eq(_T_17746, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17748 = and(_T_17745, _T_17747) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17749 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17750 = eq(_T_17749, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17751 = and(_T_17748, _T_17750) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17752 = or(_T_17744, _T_17751) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_1 = or(_T_17752, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17753 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17754 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17755 = eq(_T_17754, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17756 = and(_T_17753, _T_17755) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17757 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17758 = eq(_T_17757, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17759 = and(_T_17756, _T_17758) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17760 = or(_T_17759, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17761 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17762 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17763 = eq(_T_17762, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17764 = and(_T_17761, _T_17763) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17765 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17766 = eq(_T_17765, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17767 = and(_T_17764, _T_17766) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17768 = or(_T_17760, _T_17767) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_2 = or(_T_17768, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17769 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17770 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17771 = eq(_T_17770, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17772 = and(_T_17769, _T_17771) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17773 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17774 = eq(_T_17773, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17775 = and(_T_17772, _T_17774) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17776 = or(_T_17775, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17777 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17778 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17779 = eq(_T_17778, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17780 = and(_T_17777, _T_17779) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17781 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17782 = eq(_T_17781, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17783 = and(_T_17780, _T_17782) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17784 = or(_T_17776, _T_17783) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_3 = or(_T_17784, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17785 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17786 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17787 = eq(_T_17786, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17788 = and(_T_17785, _T_17787) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17789 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17790 = eq(_T_17789, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17791 = and(_T_17788, _T_17790) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17792 = or(_T_17791, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17793 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17794 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17795 = eq(_T_17794, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17796 = and(_T_17793, _T_17795) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17797 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17798 = eq(_T_17797, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17799 = and(_T_17796, _T_17798) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17800 = or(_T_17792, _T_17799) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_4 = or(_T_17800, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17801 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17802 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17803 = eq(_T_17802, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17804 = and(_T_17801, _T_17803) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17805 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17806 = eq(_T_17805, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17807 = and(_T_17804, _T_17806) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17808 = or(_T_17807, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17809 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17810 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17811 = eq(_T_17810, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17812 = and(_T_17809, _T_17811) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17813 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17814 = eq(_T_17813, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17815 = and(_T_17812, _T_17814) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17816 = or(_T_17808, _T_17815) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_5 = or(_T_17816, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17817 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17818 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17819 = eq(_T_17818, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17820 = and(_T_17817, _T_17819) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17821 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17822 = eq(_T_17821, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17823 = and(_T_17820, _T_17822) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17824 = or(_T_17823, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17825 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17826 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17827 = eq(_T_17826, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17828 = and(_T_17825, _T_17827) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17829 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17830 = eq(_T_17829, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17831 = and(_T_17828, _T_17830) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17832 = or(_T_17824, _T_17831) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_6 = or(_T_17832, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17833 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17834 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17835 = eq(_T_17834, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17836 = and(_T_17833, _T_17835) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17837 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17838 = eq(_T_17837, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17839 = and(_T_17836, _T_17838) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17840 = or(_T_17839, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17841 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17842 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17843 = eq(_T_17842, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17844 = and(_T_17841, _T_17843) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17845 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17846 = eq(_T_17845, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17847 = and(_T_17844, _T_17846) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17848 = or(_T_17840, _T_17847) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_7 = or(_T_17848, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17849 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17850 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17851 = eq(_T_17850, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17852 = and(_T_17849, _T_17851) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17853 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17854 = eq(_T_17853, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17855 = and(_T_17852, _T_17854) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17856 = or(_T_17855, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17857 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17858 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17859 = eq(_T_17858, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17860 = and(_T_17857, _T_17859) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17861 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17862 = eq(_T_17861, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17863 = and(_T_17860, _T_17862) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17864 = or(_T_17856, _T_17863) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_8 = or(_T_17864, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17865 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17866 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17867 = eq(_T_17866, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17868 = and(_T_17865, _T_17867) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17869 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17870 = eq(_T_17869, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17871 = and(_T_17868, _T_17870) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17872 = or(_T_17871, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17873 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17874 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17875 = eq(_T_17874, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17876 = and(_T_17873, _T_17875) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17877 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17878 = eq(_T_17877, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17879 = and(_T_17876, _T_17878) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17880 = or(_T_17872, _T_17879) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_9 = or(_T_17880, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17881 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17882 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17883 = eq(_T_17882, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17884 = and(_T_17881, _T_17883) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17885 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17886 = eq(_T_17885, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17887 = and(_T_17884, _T_17886) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17888 = or(_T_17887, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17889 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17890 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17891 = eq(_T_17890, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17892 = and(_T_17889, _T_17891) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17893 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17894 = eq(_T_17893, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17895 = and(_T_17892, _T_17894) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17896 = or(_T_17888, _T_17895) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_10 = or(_T_17896, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17897 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17898 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17899 = eq(_T_17898, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17900 = and(_T_17897, _T_17899) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17901 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17902 = eq(_T_17901, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17903 = and(_T_17900, _T_17902) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17904 = or(_T_17903, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17905 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17906 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17907 = eq(_T_17906, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17908 = and(_T_17905, _T_17907) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17909 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17910 = eq(_T_17909, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17911 = and(_T_17908, _T_17910) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17912 = or(_T_17904, _T_17911) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_11 = or(_T_17912, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17913 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17914 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17915 = eq(_T_17914, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17916 = and(_T_17913, _T_17915) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17917 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17918 = eq(_T_17917, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17919 = and(_T_17916, _T_17918) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17920 = or(_T_17919, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17921 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17922 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17923 = eq(_T_17922, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17924 = and(_T_17921, _T_17923) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17925 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17926 = eq(_T_17925, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17927 = and(_T_17924, _T_17926) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17928 = or(_T_17920, _T_17927) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_12 = or(_T_17928, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17929 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17930 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17931 = eq(_T_17930, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17932 = and(_T_17929, _T_17931) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17933 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17934 = eq(_T_17933, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17935 = and(_T_17932, _T_17934) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17936 = or(_T_17935, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17937 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17938 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17939 = eq(_T_17938, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17940 = and(_T_17937, _T_17939) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17941 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17942 = eq(_T_17941, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17943 = and(_T_17940, _T_17942) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17944 = or(_T_17936, _T_17943) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_13 = or(_T_17944, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17945 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17946 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17947 = eq(_T_17946, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17948 = and(_T_17945, _T_17947) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17949 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17950 = eq(_T_17949, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17951 = and(_T_17948, _T_17950) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17952 = or(_T_17951, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17953 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17954 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17955 = eq(_T_17954, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17956 = and(_T_17953, _T_17955) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17957 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17958 = eq(_T_17957, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17959 = and(_T_17956, _T_17958) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17960 = or(_T_17952, _T_17959) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_14 = or(_T_17960, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17961 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17962 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17963 = eq(_T_17962, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17964 = and(_T_17961, _T_17963) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17965 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17966 = eq(_T_17965, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17967 = and(_T_17964, _T_17966) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17968 = or(_T_17967, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17969 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17970 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17971 = eq(_T_17970, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17972 = and(_T_17969, _T_17971) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17973 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17974 = eq(_T_17973, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17975 = and(_T_17972, _T_17974) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17976 = or(_T_17968, _T_17975) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_11_15 = or(_T_17976, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17977 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17978 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17979 = eq(_T_17978, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17980 = and(_T_17977, _T_17979) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17981 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17982 = eq(_T_17981, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17983 = and(_T_17980, _T_17982) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_17984 = or(_T_17983, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_17985 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_17986 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_17987 = eq(_T_17986, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_17988 = and(_T_17985, _T_17987) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_17989 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_17990 = eq(_T_17989, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_17991 = and(_T_17988, _T_17990) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_17992 = or(_T_17984, _T_17991) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_0 = or(_T_17992, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_17993 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_17994 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_17995 = eq(_T_17994, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_17996 = and(_T_17993, _T_17995) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_17997 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_17998 = eq(_T_17997, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_17999 = and(_T_17996, _T_17998) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18000 = or(_T_17999, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18001 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18002 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18003 = eq(_T_18002, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18004 = and(_T_18001, _T_18003) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18005 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18006 = eq(_T_18005, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18007 = and(_T_18004, _T_18006) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18008 = or(_T_18000, _T_18007) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_1 = or(_T_18008, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18009 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18010 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18011 = eq(_T_18010, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18012 = and(_T_18009, _T_18011) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18013 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18014 = eq(_T_18013, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18015 = and(_T_18012, _T_18014) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18016 = or(_T_18015, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18017 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18018 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18019 = eq(_T_18018, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18020 = and(_T_18017, _T_18019) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18021 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18022 = eq(_T_18021, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18023 = and(_T_18020, _T_18022) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18024 = or(_T_18016, _T_18023) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_2 = or(_T_18024, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18025 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18026 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18027 = eq(_T_18026, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18028 = and(_T_18025, _T_18027) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18029 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18030 = eq(_T_18029, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18031 = and(_T_18028, _T_18030) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18032 = or(_T_18031, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18033 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18034 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18035 = eq(_T_18034, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18036 = and(_T_18033, _T_18035) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18037 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18038 = eq(_T_18037, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18039 = and(_T_18036, _T_18038) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18040 = or(_T_18032, _T_18039) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_3 = or(_T_18040, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18041 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18042 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18043 = eq(_T_18042, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18044 = and(_T_18041, _T_18043) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18045 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18046 = eq(_T_18045, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18047 = and(_T_18044, _T_18046) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18048 = or(_T_18047, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18049 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18050 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18051 = eq(_T_18050, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18052 = and(_T_18049, _T_18051) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18053 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18054 = eq(_T_18053, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18055 = and(_T_18052, _T_18054) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18056 = or(_T_18048, _T_18055) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_4 = or(_T_18056, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18057 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18058 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18059 = eq(_T_18058, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18060 = and(_T_18057, _T_18059) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18061 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18062 = eq(_T_18061, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18063 = and(_T_18060, _T_18062) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18064 = or(_T_18063, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18065 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18066 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18067 = eq(_T_18066, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18068 = and(_T_18065, _T_18067) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18069 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18070 = eq(_T_18069, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18071 = and(_T_18068, _T_18070) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18072 = or(_T_18064, _T_18071) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_5 = or(_T_18072, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18073 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18074 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18075 = eq(_T_18074, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18076 = and(_T_18073, _T_18075) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18077 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18078 = eq(_T_18077, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18079 = and(_T_18076, _T_18078) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18080 = or(_T_18079, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18081 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18082 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18083 = eq(_T_18082, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18084 = and(_T_18081, _T_18083) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18085 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18086 = eq(_T_18085, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18087 = and(_T_18084, _T_18086) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18088 = or(_T_18080, _T_18087) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_6 = or(_T_18088, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18089 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18090 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18091 = eq(_T_18090, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18092 = and(_T_18089, _T_18091) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18093 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18094 = eq(_T_18093, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18095 = and(_T_18092, _T_18094) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18096 = or(_T_18095, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18097 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18098 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18099 = eq(_T_18098, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18100 = and(_T_18097, _T_18099) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18101 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18102 = eq(_T_18101, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18103 = and(_T_18100, _T_18102) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18104 = or(_T_18096, _T_18103) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_7 = or(_T_18104, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18105 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18106 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18107 = eq(_T_18106, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18108 = and(_T_18105, _T_18107) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18109 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18110 = eq(_T_18109, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18111 = and(_T_18108, _T_18110) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18112 = or(_T_18111, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18113 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18114 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18115 = eq(_T_18114, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18116 = and(_T_18113, _T_18115) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18117 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18118 = eq(_T_18117, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18119 = and(_T_18116, _T_18118) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18120 = or(_T_18112, _T_18119) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_8 = or(_T_18120, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18121 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18122 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18123 = eq(_T_18122, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18124 = and(_T_18121, _T_18123) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18125 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18126 = eq(_T_18125, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18127 = and(_T_18124, _T_18126) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18128 = or(_T_18127, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18129 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18130 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18131 = eq(_T_18130, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18132 = and(_T_18129, _T_18131) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18133 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18134 = eq(_T_18133, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18135 = and(_T_18132, _T_18134) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18136 = or(_T_18128, _T_18135) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_9 = or(_T_18136, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18137 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18138 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18139 = eq(_T_18138, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18140 = and(_T_18137, _T_18139) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18141 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18142 = eq(_T_18141, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18143 = and(_T_18140, _T_18142) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18144 = or(_T_18143, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18145 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18146 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18147 = eq(_T_18146, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18148 = and(_T_18145, _T_18147) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18149 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18150 = eq(_T_18149, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18151 = and(_T_18148, _T_18150) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18152 = or(_T_18144, _T_18151) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_10 = or(_T_18152, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18153 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18154 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18155 = eq(_T_18154, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18156 = and(_T_18153, _T_18155) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18157 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18158 = eq(_T_18157, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18159 = and(_T_18156, _T_18158) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18160 = or(_T_18159, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18161 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18162 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18163 = eq(_T_18162, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18164 = and(_T_18161, _T_18163) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18165 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18166 = eq(_T_18165, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18167 = and(_T_18164, _T_18166) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18168 = or(_T_18160, _T_18167) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_11 = or(_T_18168, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18169 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18170 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18171 = eq(_T_18170, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18172 = and(_T_18169, _T_18171) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18173 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18174 = eq(_T_18173, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18175 = and(_T_18172, _T_18174) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18176 = or(_T_18175, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18177 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18178 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18179 = eq(_T_18178, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18180 = and(_T_18177, _T_18179) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18181 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18182 = eq(_T_18181, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18183 = and(_T_18180, _T_18182) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18184 = or(_T_18176, _T_18183) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_12 = or(_T_18184, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18185 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18186 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18187 = eq(_T_18186, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18188 = and(_T_18185, _T_18187) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18189 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18190 = eq(_T_18189, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18191 = and(_T_18188, _T_18190) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18192 = or(_T_18191, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18193 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18194 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18195 = eq(_T_18194, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18196 = and(_T_18193, _T_18195) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18197 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18198 = eq(_T_18197, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18199 = and(_T_18196, _T_18198) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18200 = or(_T_18192, _T_18199) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_13 = or(_T_18200, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18201 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18202 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18203 = eq(_T_18202, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18204 = and(_T_18201, _T_18203) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18205 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18206 = eq(_T_18205, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18207 = and(_T_18204, _T_18206) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18208 = or(_T_18207, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18209 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18210 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18211 = eq(_T_18210, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18212 = and(_T_18209, _T_18211) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18213 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18214 = eq(_T_18213, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18215 = and(_T_18212, _T_18214) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18216 = or(_T_18208, _T_18215) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_14 = or(_T_18216, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18217 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18218 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18219 = eq(_T_18218, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18220 = and(_T_18217, _T_18219) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18221 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18222 = eq(_T_18221, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18223 = and(_T_18220, _T_18222) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18224 = or(_T_18223, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18225 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18226 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18227 = eq(_T_18226, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18228 = and(_T_18225, _T_18227) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18229 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18230 = eq(_T_18229, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18231 = and(_T_18228, _T_18230) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18232 = or(_T_18224, _T_18231) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_12_15 = or(_T_18232, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18233 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18234 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18235 = eq(_T_18234, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18236 = and(_T_18233, _T_18235) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18237 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18238 = eq(_T_18237, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18239 = and(_T_18236, _T_18238) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18240 = or(_T_18239, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18241 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18242 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18243 = eq(_T_18242, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18244 = and(_T_18241, _T_18243) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18245 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18246 = eq(_T_18245, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18247 = and(_T_18244, _T_18246) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18248 = or(_T_18240, _T_18247) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_0 = or(_T_18248, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18249 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18250 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18251 = eq(_T_18250, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18252 = and(_T_18249, _T_18251) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18253 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18254 = eq(_T_18253, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18255 = and(_T_18252, _T_18254) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18256 = or(_T_18255, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18257 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18258 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18259 = eq(_T_18258, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18260 = and(_T_18257, _T_18259) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18261 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18262 = eq(_T_18261, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18263 = and(_T_18260, _T_18262) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18264 = or(_T_18256, _T_18263) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_1 = or(_T_18264, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18265 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18266 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18267 = eq(_T_18266, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18268 = and(_T_18265, _T_18267) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18269 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18270 = eq(_T_18269, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18271 = and(_T_18268, _T_18270) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18272 = or(_T_18271, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18273 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18274 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18275 = eq(_T_18274, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18276 = and(_T_18273, _T_18275) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18277 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18278 = eq(_T_18277, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18279 = and(_T_18276, _T_18278) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18280 = or(_T_18272, _T_18279) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_2 = or(_T_18280, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18281 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18282 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18283 = eq(_T_18282, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18284 = and(_T_18281, _T_18283) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18285 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18286 = eq(_T_18285, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18287 = and(_T_18284, _T_18286) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18288 = or(_T_18287, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18289 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18290 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18291 = eq(_T_18290, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18292 = and(_T_18289, _T_18291) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18293 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18294 = eq(_T_18293, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18295 = and(_T_18292, _T_18294) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18296 = or(_T_18288, _T_18295) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_3 = or(_T_18296, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18297 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18298 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18299 = eq(_T_18298, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18300 = and(_T_18297, _T_18299) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18301 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18302 = eq(_T_18301, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18303 = and(_T_18300, _T_18302) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18304 = or(_T_18303, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18305 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18306 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18307 = eq(_T_18306, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18308 = and(_T_18305, _T_18307) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18309 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18310 = eq(_T_18309, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18311 = and(_T_18308, _T_18310) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18312 = or(_T_18304, _T_18311) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_4 = or(_T_18312, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18313 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18314 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18315 = eq(_T_18314, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18316 = and(_T_18313, _T_18315) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18317 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18318 = eq(_T_18317, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18319 = and(_T_18316, _T_18318) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18320 = or(_T_18319, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18321 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18322 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18323 = eq(_T_18322, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18324 = and(_T_18321, _T_18323) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18325 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18326 = eq(_T_18325, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18327 = and(_T_18324, _T_18326) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18328 = or(_T_18320, _T_18327) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_5 = or(_T_18328, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18329 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18330 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18331 = eq(_T_18330, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18332 = and(_T_18329, _T_18331) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18333 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18334 = eq(_T_18333, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18335 = and(_T_18332, _T_18334) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18336 = or(_T_18335, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18337 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18338 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18339 = eq(_T_18338, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18340 = and(_T_18337, _T_18339) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18341 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18342 = eq(_T_18341, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18343 = and(_T_18340, _T_18342) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18344 = or(_T_18336, _T_18343) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_6 = or(_T_18344, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18345 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18346 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18347 = eq(_T_18346, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18348 = and(_T_18345, _T_18347) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18349 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18350 = eq(_T_18349, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18351 = and(_T_18348, _T_18350) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18352 = or(_T_18351, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18353 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18354 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18355 = eq(_T_18354, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18356 = and(_T_18353, _T_18355) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18357 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18358 = eq(_T_18357, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18359 = and(_T_18356, _T_18358) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18360 = or(_T_18352, _T_18359) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_7 = or(_T_18360, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18361 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18362 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18363 = eq(_T_18362, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18364 = and(_T_18361, _T_18363) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18365 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18366 = eq(_T_18365, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18367 = and(_T_18364, _T_18366) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18368 = or(_T_18367, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18369 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18370 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18371 = eq(_T_18370, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18372 = and(_T_18369, _T_18371) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18373 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18374 = eq(_T_18373, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18375 = and(_T_18372, _T_18374) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18376 = or(_T_18368, _T_18375) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_8 = or(_T_18376, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18377 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18378 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18379 = eq(_T_18378, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18380 = and(_T_18377, _T_18379) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18381 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18382 = eq(_T_18381, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18383 = and(_T_18380, _T_18382) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18384 = or(_T_18383, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18385 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18386 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18387 = eq(_T_18386, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18388 = and(_T_18385, _T_18387) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18389 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18390 = eq(_T_18389, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18391 = and(_T_18388, _T_18390) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18392 = or(_T_18384, _T_18391) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_9 = or(_T_18392, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18393 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18394 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18395 = eq(_T_18394, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18396 = and(_T_18393, _T_18395) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18397 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18398 = eq(_T_18397, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18399 = and(_T_18396, _T_18398) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18400 = or(_T_18399, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18401 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18402 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18403 = eq(_T_18402, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18404 = and(_T_18401, _T_18403) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18405 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18406 = eq(_T_18405, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18407 = and(_T_18404, _T_18406) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18408 = or(_T_18400, _T_18407) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_10 = or(_T_18408, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18409 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18410 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18411 = eq(_T_18410, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18412 = and(_T_18409, _T_18411) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18413 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18414 = eq(_T_18413, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18415 = and(_T_18412, _T_18414) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18416 = or(_T_18415, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18417 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18418 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18419 = eq(_T_18418, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18420 = and(_T_18417, _T_18419) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18421 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18422 = eq(_T_18421, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18423 = and(_T_18420, _T_18422) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18424 = or(_T_18416, _T_18423) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_11 = or(_T_18424, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18425 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18426 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18427 = eq(_T_18426, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18428 = and(_T_18425, _T_18427) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18429 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18430 = eq(_T_18429, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18431 = and(_T_18428, _T_18430) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18432 = or(_T_18431, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18433 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18434 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18435 = eq(_T_18434, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18436 = and(_T_18433, _T_18435) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18437 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18438 = eq(_T_18437, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18439 = and(_T_18436, _T_18438) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18440 = or(_T_18432, _T_18439) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_12 = or(_T_18440, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18441 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18442 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18443 = eq(_T_18442, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18444 = and(_T_18441, _T_18443) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18445 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18446 = eq(_T_18445, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18447 = and(_T_18444, _T_18446) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18448 = or(_T_18447, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18449 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18450 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18451 = eq(_T_18450, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18452 = and(_T_18449, _T_18451) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18453 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18454 = eq(_T_18453, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18455 = and(_T_18452, _T_18454) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18456 = or(_T_18448, _T_18455) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_13 = or(_T_18456, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18457 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18458 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18459 = eq(_T_18458, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18460 = and(_T_18457, _T_18459) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18461 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18462 = eq(_T_18461, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18463 = and(_T_18460, _T_18462) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18464 = or(_T_18463, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18465 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18466 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18467 = eq(_T_18466, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18468 = and(_T_18465, _T_18467) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18469 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18470 = eq(_T_18469, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18471 = and(_T_18468, _T_18470) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18472 = or(_T_18464, _T_18471) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_14 = or(_T_18472, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18473 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18474 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18475 = eq(_T_18474, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18476 = and(_T_18473, _T_18475) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18477 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18478 = eq(_T_18477, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18479 = and(_T_18476, _T_18478) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18480 = or(_T_18479, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18481 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18482 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18483 = eq(_T_18482, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18484 = and(_T_18481, _T_18483) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18485 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18486 = eq(_T_18485, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18487 = and(_T_18484, _T_18486) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18488 = or(_T_18480, _T_18487) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_13_15 = or(_T_18488, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18489 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18490 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18491 = eq(_T_18490, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18492 = and(_T_18489, _T_18491) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18493 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18494 = eq(_T_18493, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18495 = and(_T_18492, _T_18494) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18496 = or(_T_18495, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18497 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18498 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18499 = eq(_T_18498, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18500 = and(_T_18497, _T_18499) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18501 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18502 = eq(_T_18501, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18503 = and(_T_18500, _T_18502) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18504 = or(_T_18496, _T_18503) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_0 = or(_T_18504, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18505 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18506 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18507 = eq(_T_18506, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18508 = and(_T_18505, _T_18507) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18509 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18510 = eq(_T_18509, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18511 = and(_T_18508, _T_18510) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18512 = or(_T_18511, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18513 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18514 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18515 = eq(_T_18514, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18516 = and(_T_18513, _T_18515) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18517 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18518 = eq(_T_18517, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18519 = and(_T_18516, _T_18518) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18520 = or(_T_18512, _T_18519) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_1 = or(_T_18520, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18521 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18522 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18523 = eq(_T_18522, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18524 = and(_T_18521, _T_18523) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18525 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18526 = eq(_T_18525, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18527 = and(_T_18524, _T_18526) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18528 = or(_T_18527, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18529 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18530 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18531 = eq(_T_18530, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18532 = and(_T_18529, _T_18531) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18533 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18534 = eq(_T_18533, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18535 = and(_T_18532, _T_18534) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18536 = or(_T_18528, _T_18535) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_2 = or(_T_18536, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18537 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18538 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18539 = eq(_T_18538, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18540 = and(_T_18537, _T_18539) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18541 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18542 = eq(_T_18541, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18543 = and(_T_18540, _T_18542) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18544 = or(_T_18543, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18545 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18546 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18547 = eq(_T_18546, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18548 = and(_T_18545, _T_18547) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18549 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18550 = eq(_T_18549, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18551 = and(_T_18548, _T_18550) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18552 = or(_T_18544, _T_18551) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_3 = or(_T_18552, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18553 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18554 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18555 = eq(_T_18554, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18556 = and(_T_18553, _T_18555) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18557 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18558 = eq(_T_18557, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18559 = and(_T_18556, _T_18558) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18560 = or(_T_18559, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18561 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18562 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18563 = eq(_T_18562, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18564 = and(_T_18561, _T_18563) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18565 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18566 = eq(_T_18565, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18567 = and(_T_18564, _T_18566) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18568 = or(_T_18560, _T_18567) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_4 = or(_T_18568, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18569 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18570 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18571 = eq(_T_18570, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18572 = and(_T_18569, _T_18571) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18573 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18574 = eq(_T_18573, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18575 = and(_T_18572, _T_18574) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18576 = or(_T_18575, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18577 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18578 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18579 = eq(_T_18578, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18580 = and(_T_18577, _T_18579) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18581 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18582 = eq(_T_18581, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18583 = and(_T_18580, _T_18582) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18584 = or(_T_18576, _T_18583) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_5 = or(_T_18584, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18585 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18586 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18587 = eq(_T_18586, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18588 = and(_T_18585, _T_18587) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18589 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18590 = eq(_T_18589, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18591 = and(_T_18588, _T_18590) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18592 = or(_T_18591, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18593 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18594 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18595 = eq(_T_18594, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18596 = and(_T_18593, _T_18595) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18597 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18598 = eq(_T_18597, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18599 = and(_T_18596, _T_18598) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18600 = or(_T_18592, _T_18599) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_6 = or(_T_18600, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18601 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18602 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18603 = eq(_T_18602, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18604 = and(_T_18601, _T_18603) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18605 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18606 = eq(_T_18605, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18607 = and(_T_18604, _T_18606) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18608 = or(_T_18607, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18609 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18610 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18611 = eq(_T_18610, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18612 = and(_T_18609, _T_18611) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18613 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18614 = eq(_T_18613, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18615 = and(_T_18612, _T_18614) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18616 = or(_T_18608, _T_18615) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_7 = or(_T_18616, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18617 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18618 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18619 = eq(_T_18618, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18620 = and(_T_18617, _T_18619) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18621 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18622 = eq(_T_18621, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18623 = and(_T_18620, _T_18622) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18624 = or(_T_18623, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18625 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18626 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18627 = eq(_T_18626, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18628 = and(_T_18625, _T_18627) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18629 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18630 = eq(_T_18629, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18631 = and(_T_18628, _T_18630) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18632 = or(_T_18624, _T_18631) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_8 = or(_T_18632, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18633 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18634 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18635 = eq(_T_18634, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18636 = and(_T_18633, _T_18635) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18637 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18638 = eq(_T_18637, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18639 = and(_T_18636, _T_18638) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18640 = or(_T_18639, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18641 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18642 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18643 = eq(_T_18642, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18644 = and(_T_18641, _T_18643) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18645 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18646 = eq(_T_18645, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18647 = and(_T_18644, _T_18646) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18648 = or(_T_18640, _T_18647) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_9 = or(_T_18648, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18649 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18650 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18651 = eq(_T_18650, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18652 = and(_T_18649, _T_18651) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18653 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18654 = eq(_T_18653, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18655 = and(_T_18652, _T_18654) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18656 = or(_T_18655, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18657 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18658 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18659 = eq(_T_18658, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18660 = and(_T_18657, _T_18659) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18661 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18662 = eq(_T_18661, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18663 = and(_T_18660, _T_18662) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18664 = or(_T_18656, _T_18663) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_10 = or(_T_18664, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18665 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18666 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18667 = eq(_T_18666, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18668 = and(_T_18665, _T_18667) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18669 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18670 = eq(_T_18669, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18671 = and(_T_18668, _T_18670) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18672 = or(_T_18671, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18673 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18674 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18675 = eq(_T_18674, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18676 = and(_T_18673, _T_18675) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18677 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18678 = eq(_T_18677, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18679 = and(_T_18676, _T_18678) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18680 = or(_T_18672, _T_18679) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_11 = or(_T_18680, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18681 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18682 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18683 = eq(_T_18682, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18684 = and(_T_18681, _T_18683) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18685 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18686 = eq(_T_18685, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18687 = and(_T_18684, _T_18686) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18688 = or(_T_18687, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18689 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18690 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18691 = eq(_T_18690, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18692 = and(_T_18689, _T_18691) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18693 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18694 = eq(_T_18693, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18695 = and(_T_18692, _T_18694) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18696 = or(_T_18688, _T_18695) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_12 = or(_T_18696, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18697 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18698 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18699 = eq(_T_18698, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18700 = and(_T_18697, _T_18699) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18701 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18702 = eq(_T_18701, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18703 = and(_T_18700, _T_18702) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18704 = or(_T_18703, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18705 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18706 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18707 = eq(_T_18706, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18708 = and(_T_18705, _T_18707) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18709 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18710 = eq(_T_18709, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18711 = and(_T_18708, _T_18710) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18712 = or(_T_18704, _T_18711) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_13 = or(_T_18712, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18713 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18714 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18715 = eq(_T_18714, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18716 = and(_T_18713, _T_18715) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18717 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18718 = eq(_T_18717, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18719 = and(_T_18716, _T_18718) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18720 = or(_T_18719, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18721 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18722 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18723 = eq(_T_18722, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18724 = and(_T_18721, _T_18723) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18725 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18726 = eq(_T_18725, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18727 = and(_T_18724, _T_18726) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18728 = or(_T_18720, _T_18727) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_14 = or(_T_18728, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18729 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18730 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18731 = eq(_T_18730, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18732 = and(_T_18729, _T_18731) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18733 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18734 = eq(_T_18733, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18735 = and(_T_18732, _T_18734) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18736 = or(_T_18735, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18737 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18738 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18739 = eq(_T_18738, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18740 = and(_T_18737, _T_18739) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18741 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18742 = eq(_T_18741, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18743 = and(_T_18740, _T_18742) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18744 = or(_T_18736, _T_18743) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_14_15 = or(_T_18744, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18745 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18746 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18747 = eq(_T_18746, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18748 = and(_T_18745, _T_18747) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18749 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18750 = eq(_T_18749, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18751 = and(_T_18748, _T_18750) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18752 = or(_T_18751, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18753 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18754 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18755 = eq(_T_18754, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18756 = and(_T_18753, _T_18755) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18757 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18758 = eq(_T_18757, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18759 = and(_T_18756, _T_18758) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18760 = or(_T_18752, _T_18759) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_0 = or(_T_18760, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18761 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18762 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18763 = eq(_T_18762, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18764 = and(_T_18761, _T_18763) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18765 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18766 = eq(_T_18765, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18767 = and(_T_18764, _T_18766) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18768 = or(_T_18767, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18769 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18770 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18771 = eq(_T_18770, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18772 = and(_T_18769, _T_18771) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18773 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18774 = eq(_T_18773, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18775 = and(_T_18772, _T_18774) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18776 = or(_T_18768, _T_18775) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_1 = or(_T_18776, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18777 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18778 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18779 = eq(_T_18778, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18780 = and(_T_18777, _T_18779) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18781 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18782 = eq(_T_18781, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18783 = and(_T_18780, _T_18782) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18784 = or(_T_18783, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18785 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18786 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18787 = eq(_T_18786, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18788 = and(_T_18785, _T_18787) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18789 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18790 = eq(_T_18789, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18791 = and(_T_18788, _T_18790) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18792 = or(_T_18784, _T_18791) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_2 = or(_T_18792, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
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|
node _T_18793 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
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|
node _T_18794 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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|
node _T_18795 = eq(_T_18794, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 373:69]
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|
node _T_18796 = and(_T_18793, _T_18795) @[el2_ifu_bp_ctl.scala 373:17]
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node _T_18797 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
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|
node _T_18798 = eq(_T_18797, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
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|
node _T_18799 = and(_T_18796, _T_18798) @[el2_ifu_bp_ctl.scala 373:82]
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node _T_18800 = or(_T_18799, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
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node _T_18801 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18802 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
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|
node _T_18803 = eq(_T_18802, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 374:61]
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|
node _T_18804 = and(_T_18801, _T_18803) @[el2_ifu_bp_ctl.scala 373:220]
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|
node _T_18805 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
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node _T_18806 = eq(_T_18805, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
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|
node _T_18807 = and(_T_18804, _T_18806) @[el2_ifu_bp_ctl.scala 374:74]
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|
node _T_18808 = or(_T_18800, _T_18807) @[el2_ifu_bp_ctl.scala 373:204]
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|
node bht_bank_sel_1_15_3 = or(_T_18808, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
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node _T_18809 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18810 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
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|
node _T_18811 = eq(_T_18810, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 373:69]
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|
node _T_18812 = and(_T_18809, _T_18811) @[el2_ifu_bp_ctl.scala 373:17]
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node _T_18813 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
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|
node _T_18814 = eq(_T_18813, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
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node _T_18815 = and(_T_18812, _T_18814) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18816 = or(_T_18815, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
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|
node _T_18817 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
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|
node _T_18818 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18819 = eq(_T_18818, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18820 = and(_T_18817, _T_18819) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18821 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18822 = eq(_T_18821, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18823 = and(_T_18820, _T_18822) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18824 = or(_T_18816, _T_18823) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_4 = or(_T_18824, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18825 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18826 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18827 = eq(_T_18826, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18828 = and(_T_18825, _T_18827) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18829 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18830 = eq(_T_18829, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18831 = and(_T_18828, _T_18830) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18832 = or(_T_18831, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18833 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18834 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18835 = eq(_T_18834, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18836 = and(_T_18833, _T_18835) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18837 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18838 = eq(_T_18837, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18839 = and(_T_18836, _T_18838) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18840 = or(_T_18832, _T_18839) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_5 = or(_T_18840, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18841 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18842 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18843 = eq(_T_18842, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18844 = and(_T_18841, _T_18843) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18845 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18846 = eq(_T_18845, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18847 = and(_T_18844, _T_18846) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18848 = or(_T_18847, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18849 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18850 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18851 = eq(_T_18850, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18852 = and(_T_18849, _T_18851) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18853 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18854 = eq(_T_18853, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18855 = and(_T_18852, _T_18854) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18856 = or(_T_18848, _T_18855) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_6 = or(_T_18856, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18857 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18858 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18859 = eq(_T_18858, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18860 = and(_T_18857, _T_18859) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18861 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18862 = eq(_T_18861, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18863 = and(_T_18860, _T_18862) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18864 = or(_T_18863, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18865 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18866 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18867 = eq(_T_18866, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18868 = and(_T_18865, _T_18867) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18869 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18870 = eq(_T_18869, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18871 = and(_T_18868, _T_18870) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18872 = or(_T_18864, _T_18871) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_7 = or(_T_18872, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18873 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18874 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18875 = eq(_T_18874, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18876 = and(_T_18873, _T_18875) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18877 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18878 = eq(_T_18877, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18879 = and(_T_18876, _T_18878) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18880 = or(_T_18879, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18881 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18882 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18883 = eq(_T_18882, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18884 = and(_T_18881, _T_18883) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18885 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18886 = eq(_T_18885, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18887 = and(_T_18884, _T_18886) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18888 = or(_T_18880, _T_18887) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_8 = or(_T_18888, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18889 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18890 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18891 = eq(_T_18890, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18892 = and(_T_18889, _T_18891) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18893 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18894 = eq(_T_18893, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18895 = and(_T_18892, _T_18894) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18896 = or(_T_18895, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18897 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18898 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18899 = eq(_T_18898, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18900 = and(_T_18897, _T_18899) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18901 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18902 = eq(_T_18901, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18903 = and(_T_18900, _T_18902) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18904 = or(_T_18896, _T_18903) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_9 = or(_T_18904, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18905 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18906 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18907 = eq(_T_18906, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18908 = and(_T_18905, _T_18907) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18909 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18910 = eq(_T_18909, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18911 = and(_T_18908, _T_18910) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18912 = or(_T_18911, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18913 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18914 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18915 = eq(_T_18914, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18916 = and(_T_18913, _T_18915) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18917 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18918 = eq(_T_18917, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18919 = and(_T_18916, _T_18918) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18920 = or(_T_18912, _T_18919) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_10 = or(_T_18920, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18921 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18922 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18923 = eq(_T_18922, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18924 = and(_T_18921, _T_18923) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18925 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18926 = eq(_T_18925, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18927 = and(_T_18924, _T_18926) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18928 = or(_T_18927, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18929 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18930 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18931 = eq(_T_18930, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18932 = and(_T_18929, _T_18931) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18933 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18934 = eq(_T_18933, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18935 = and(_T_18932, _T_18934) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18936 = or(_T_18928, _T_18935) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_11 = or(_T_18936, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18937 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18938 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18939 = eq(_T_18938, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18940 = and(_T_18937, _T_18939) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18941 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18942 = eq(_T_18941, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18943 = and(_T_18940, _T_18942) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18944 = or(_T_18943, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18945 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18946 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18947 = eq(_T_18946, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18948 = and(_T_18945, _T_18947) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18949 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18950 = eq(_T_18949, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18951 = and(_T_18948, _T_18950) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18952 = or(_T_18944, _T_18951) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_12 = or(_T_18952, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18953 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18954 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18955 = eq(_T_18954, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18956 = and(_T_18953, _T_18955) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18957 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18958 = eq(_T_18957, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18959 = and(_T_18956, _T_18958) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18960 = or(_T_18959, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18961 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18962 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18963 = eq(_T_18962, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18964 = and(_T_18961, _T_18963) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18965 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18966 = eq(_T_18965, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18967 = and(_T_18964, _T_18966) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18968 = or(_T_18960, _T_18967) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_13 = or(_T_18968, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18969 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18970 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18971 = eq(_T_18970, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18972 = and(_T_18969, _T_18971) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18973 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18974 = eq(_T_18973, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18975 = and(_T_18972, _T_18974) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18976 = or(_T_18975, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18977 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18978 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18979 = eq(_T_18978, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18980 = and(_T_18977, _T_18979) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18981 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18982 = eq(_T_18981, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18983 = and(_T_18980, _T_18982) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_18984 = or(_T_18976, _T_18983) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_14 = or(_T_18984, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
node _T_18985 = bits(bht_wr_en0, 1, 1) @[el2_ifu_bp_ctl.scala 373:13]
|
|
node _T_18986 = bits(bht_wr_addr0, 3, 0) @[el2_ifu_bp_ctl.scala 373:32]
|
|
node _T_18987 = eq(_T_18986, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:69]
|
|
node _T_18988 = and(_T_18985, _T_18987) @[el2_ifu_bp_ctl.scala 373:17]
|
|
node _T_18989 = bits(bht_wr_addr0, 4, 4) @[el2_ifu_bp_ctl.scala 373:97]
|
|
node _T_18990 = eq(_T_18989, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 373:169]
|
|
node _T_18991 = and(_T_18988, _T_18990) @[el2_ifu_bp_ctl.scala 373:82]
|
|
node _T_18992 = or(_T_18991, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 373:182]
|
|
node _T_18993 = bits(bht_wr_en2, 1, 1) @[el2_ifu_bp_ctl.scala 373:216]
|
|
node _T_18994 = bits(bht_wr_addr2, 3, 0) @[el2_ifu_bp_ctl.scala 374:24]
|
|
node _T_18995 = eq(_T_18994, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:61]
|
|
node _T_18996 = and(_T_18993, _T_18995) @[el2_ifu_bp_ctl.scala 373:220]
|
|
node _T_18997 = bits(bht_wr_addr2, 4, 4) @[el2_ifu_bp_ctl.scala 374:89]
|
|
node _T_18998 = eq(_T_18997, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 374:161]
|
|
node _T_18999 = and(_T_18996, _T_18998) @[el2_ifu_bp_ctl.scala 374:74]
|
|
node _T_19000 = or(_T_18992, _T_18999) @[el2_ifu_bp_ctl.scala 373:204]
|
|
node bht_bank_sel_1_15_15 = or(_T_19000, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 374:174]
|
|
wire bht_bank_rd_data_out : UInt<2>[256][2] @[el2_ifu_bp_ctl.scala 376:34]
|
|
reg _T_19001 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_0 : @[Reg.scala 28:19]
|
|
_T_19001 <= bht_bank_wr_data_0_0_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][0] <= _T_19001 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19002 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_0 : @[Reg.scala 28:19]
|
|
_T_19002 <= bht_bank_wr_data_0_1_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][1] <= _T_19002 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19003 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_0 : @[Reg.scala 28:19]
|
|
_T_19003 <= bht_bank_wr_data_0_2_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][2] <= _T_19003 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19004 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_0 : @[Reg.scala 28:19]
|
|
_T_19004 <= bht_bank_wr_data_0_3_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][3] <= _T_19004 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19005 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_0 : @[Reg.scala 28:19]
|
|
_T_19005 <= bht_bank_wr_data_0_4_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][4] <= _T_19005 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19006 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_0 : @[Reg.scala 28:19]
|
|
_T_19006 <= bht_bank_wr_data_0_5_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][5] <= _T_19006 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19007 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_0 : @[Reg.scala 28:19]
|
|
_T_19007 <= bht_bank_wr_data_0_6_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][6] <= _T_19007 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19008 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_0 : @[Reg.scala 28:19]
|
|
_T_19008 <= bht_bank_wr_data_0_7_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][7] <= _T_19008 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19009 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_0 : @[Reg.scala 28:19]
|
|
_T_19009 <= bht_bank_wr_data_0_8_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][8] <= _T_19009 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19010 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_0 : @[Reg.scala 28:19]
|
|
_T_19010 <= bht_bank_wr_data_0_9_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][9] <= _T_19010 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19011 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_0 : @[Reg.scala 28:19]
|
|
_T_19011 <= bht_bank_wr_data_0_10_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][10] <= _T_19011 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19012 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_0 : @[Reg.scala 28:19]
|
|
_T_19012 <= bht_bank_wr_data_0_11_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][11] <= _T_19012 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19013 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_0 : @[Reg.scala 28:19]
|
|
_T_19013 <= bht_bank_wr_data_0_12_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][12] <= _T_19013 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19014 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_0 : @[Reg.scala 28:19]
|
|
_T_19014 <= bht_bank_wr_data_0_13_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][13] <= _T_19014 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19015 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_0 : @[Reg.scala 28:19]
|
|
_T_19015 <= bht_bank_wr_data_0_14_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][14] <= _T_19015 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19016 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_0 : @[Reg.scala 28:19]
|
|
_T_19016 <= bht_bank_wr_data_0_15_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][15] <= _T_19016 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19017 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_1 : @[Reg.scala 28:19]
|
|
_T_19017 <= bht_bank_wr_data_0_0_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][16] <= _T_19017 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19018 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_1 : @[Reg.scala 28:19]
|
|
_T_19018 <= bht_bank_wr_data_0_1_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][17] <= _T_19018 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19019 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_1 : @[Reg.scala 28:19]
|
|
_T_19019 <= bht_bank_wr_data_0_2_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][18] <= _T_19019 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19020 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_1 : @[Reg.scala 28:19]
|
|
_T_19020 <= bht_bank_wr_data_0_3_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][19] <= _T_19020 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19021 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_1 : @[Reg.scala 28:19]
|
|
_T_19021 <= bht_bank_wr_data_0_4_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][20] <= _T_19021 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19022 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_1 : @[Reg.scala 28:19]
|
|
_T_19022 <= bht_bank_wr_data_0_5_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][21] <= _T_19022 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19023 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_1 : @[Reg.scala 28:19]
|
|
_T_19023 <= bht_bank_wr_data_0_6_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][22] <= _T_19023 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19024 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_1 : @[Reg.scala 28:19]
|
|
_T_19024 <= bht_bank_wr_data_0_7_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][23] <= _T_19024 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19025 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_1 : @[Reg.scala 28:19]
|
|
_T_19025 <= bht_bank_wr_data_0_8_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][24] <= _T_19025 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19026 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_1 : @[Reg.scala 28:19]
|
|
_T_19026 <= bht_bank_wr_data_0_9_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][25] <= _T_19026 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19027 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_1 : @[Reg.scala 28:19]
|
|
_T_19027 <= bht_bank_wr_data_0_10_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][26] <= _T_19027 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19028 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_1 : @[Reg.scala 28:19]
|
|
_T_19028 <= bht_bank_wr_data_0_11_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][27] <= _T_19028 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19029 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_1 : @[Reg.scala 28:19]
|
|
_T_19029 <= bht_bank_wr_data_0_12_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][28] <= _T_19029 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19030 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_1 : @[Reg.scala 28:19]
|
|
_T_19030 <= bht_bank_wr_data_0_13_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][29] <= _T_19030 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19031 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_1 : @[Reg.scala 28:19]
|
|
_T_19031 <= bht_bank_wr_data_0_14_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][30] <= _T_19031 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19032 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_1 : @[Reg.scala 28:19]
|
|
_T_19032 <= bht_bank_wr_data_0_15_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][31] <= _T_19032 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19033 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_2 : @[Reg.scala 28:19]
|
|
_T_19033 <= bht_bank_wr_data_0_0_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][32] <= _T_19033 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19034 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_2 : @[Reg.scala 28:19]
|
|
_T_19034 <= bht_bank_wr_data_0_1_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][33] <= _T_19034 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19035 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_2 : @[Reg.scala 28:19]
|
|
_T_19035 <= bht_bank_wr_data_0_2_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][34] <= _T_19035 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19036 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_2 : @[Reg.scala 28:19]
|
|
_T_19036 <= bht_bank_wr_data_0_3_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][35] <= _T_19036 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19037 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_2 : @[Reg.scala 28:19]
|
|
_T_19037 <= bht_bank_wr_data_0_4_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][36] <= _T_19037 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19038 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_2 : @[Reg.scala 28:19]
|
|
_T_19038 <= bht_bank_wr_data_0_5_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][37] <= _T_19038 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19039 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_2 : @[Reg.scala 28:19]
|
|
_T_19039 <= bht_bank_wr_data_0_6_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][38] <= _T_19039 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19040 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_2 : @[Reg.scala 28:19]
|
|
_T_19040 <= bht_bank_wr_data_0_7_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][39] <= _T_19040 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19041 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_2 : @[Reg.scala 28:19]
|
|
_T_19041 <= bht_bank_wr_data_0_8_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][40] <= _T_19041 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19042 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_2 : @[Reg.scala 28:19]
|
|
_T_19042 <= bht_bank_wr_data_0_9_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][41] <= _T_19042 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19043 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_2 : @[Reg.scala 28:19]
|
|
_T_19043 <= bht_bank_wr_data_0_10_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][42] <= _T_19043 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19044 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_2 : @[Reg.scala 28:19]
|
|
_T_19044 <= bht_bank_wr_data_0_11_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][43] <= _T_19044 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19045 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_2 : @[Reg.scala 28:19]
|
|
_T_19045 <= bht_bank_wr_data_0_12_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][44] <= _T_19045 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19046 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_2 : @[Reg.scala 28:19]
|
|
_T_19046 <= bht_bank_wr_data_0_13_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][45] <= _T_19046 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19047 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_2 : @[Reg.scala 28:19]
|
|
_T_19047 <= bht_bank_wr_data_0_14_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][46] <= _T_19047 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19048 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_2 : @[Reg.scala 28:19]
|
|
_T_19048 <= bht_bank_wr_data_0_15_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][47] <= _T_19048 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19049 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_3 : @[Reg.scala 28:19]
|
|
_T_19049 <= bht_bank_wr_data_0_0_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][48] <= _T_19049 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19050 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_3 : @[Reg.scala 28:19]
|
|
_T_19050 <= bht_bank_wr_data_0_1_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][49] <= _T_19050 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19051 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_3 : @[Reg.scala 28:19]
|
|
_T_19051 <= bht_bank_wr_data_0_2_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][50] <= _T_19051 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19052 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_3 : @[Reg.scala 28:19]
|
|
_T_19052 <= bht_bank_wr_data_0_3_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][51] <= _T_19052 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19053 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_3 : @[Reg.scala 28:19]
|
|
_T_19053 <= bht_bank_wr_data_0_4_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][52] <= _T_19053 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19054 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_3 : @[Reg.scala 28:19]
|
|
_T_19054 <= bht_bank_wr_data_0_5_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][53] <= _T_19054 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19055 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_3 : @[Reg.scala 28:19]
|
|
_T_19055 <= bht_bank_wr_data_0_6_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][54] <= _T_19055 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19056 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_3 : @[Reg.scala 28:19]
|
|
_T_19056 <= bht_bank_wr_data_0_7_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][55] <= _T_19056 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19057 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_3 : @[Reg.scala 28:19]
|
|
_T_19057 <= bht_bank_wr_data_0_8_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][56] <= _T_19057 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19058 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_3 : @[Reg.scala 28:19]
|
|
_T_19058 <= bht_bank_wr_data_0_9_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][57] <= _T_19058 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19059 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_3 : @[Reg.scala 28:19]
|
|
_T_19059 <= bht_bank_wr_data_0_10_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][58] <= _T_19059 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19060 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_3 : @[Reg.scala 28:19]
|
|
_T_19060 <= bht_bank_wr_data_0_11_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][59] <= _T_19060 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19061 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_3 : @[Reg.scala 28:19]
|
|
_T_19061 <= bht_bank_wr_data_0_12_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][60] <= _T_19061 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19062 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_3 : @[Reg.scala 28:19]
|
|
_T_19062 <= bht_bank_wr_data_0_13_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][61] <= _T_19062 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19063 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_3 : @[Reg.scala 28:19]
|
|
_T_19063 <= bht_bank_wr_data_0_14_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][62] <= _T_19063 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19064 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_3 : @[Reg.scala 28:19]
|
|
_T_19064 <= bht_bank_wr_data_0_15_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][63] <= _T_19064 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19065 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_4 : @[Reg.scala 28:19]
|
|
_T_19065 <= bht_bank_wr_data_0_0_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][64] <= _T_19065 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19066 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_4 : @[Reg.scala 28:19]
|
|
_T_19066 <= bht_bank_wr_data_0_1_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][65] <= _T_19066 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19067 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_4 : @[Reg.scala 28:19]
|
|
_T_19067 <= bht_bank_wr_data_0_2_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][66] <= _T_19067 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19068 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_4 : @[Reg.scala 28:19]
|
|
_T_19068 <= bht_bank_wr_data_0_3_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][67] <= _T_19068 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19069 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_4 : @[Reg.scala 28:19]
|
|
_T_19069 <= bht_bank_wr_data_0_4_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][68] <= _T_19069 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19070 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_4 : @[Reg.scala 28:19]
|
|
_T_19070 <= bht_bank_wr_data_0_5_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][69] <= _T_19070 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19071 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_4 : @[Reg.scala 28:19]
|
|
_T_19071 <= bht_bank_wr_data_0_6_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][70] <= _T_19071 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19072 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_4 : @[Reg.scala 28:19]
|
|
_T_19072 <= bht_bank_wr_data_0_7_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][71] <= _T_19072 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19073 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_4 : @[Reg.scala 28:19]
|
|
_T_19073 <= bht_bank_wr_data_0_8_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][72] <= _T_19073 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19074 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_4 : @[Reg.scala 28:19]
|
|
_T_19074 <= bht_bank_wr_data_0_9_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][73] <= _T_19074 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19075 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_4 : @[Reg.scala 28:19]
|
|
_T_19075 <= bht_bank_wr_data_0_10_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][74] <= _T_19075 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19076 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_4 : @[Reg.scala 28:19]
|
|
_T_19076 <= bht_bank_wr_data_0_11_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][75] <= _T_19076 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19077 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_4 : @[Reg.scala 28:19]
|
|
_T_19077 <= bht_bank_wr_data_0_12_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][76] <= _T_19077 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19078 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_4 : @[Reg.scala 28:19]
|
|
_T_19078 <= bht_bank_wr_data_0_13_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][77] <= _T_19078 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19079 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_4 : @[Reg.scala 28:19]
|
|
_T_19079 <= bht_bank_wr_data_0_14_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][78] <= _T_19079 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19080 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_4 : @[Reg.scala 28:19]
|
|
_T_19080 <= bht_bank_wr_data_0_15_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][79] <= _T_19080 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19081 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_5 : @[Reg.scala 28:19]
|
|
_T_19081 <= bht_bank_wr_data_0_0_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][80] <= _T_19081 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19082 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_5 : @[Reg.scala 28:19]
|
|
_T_19082 <= bht_bank_wr_data_0_1_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][81] <= _T_19082 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19083 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_5 : @[Reg.scala 28:19]
|
|
_T_19083 <= bht_bank_wr_data_0_2_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][82] <= _T_19083 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19084 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_5 : @[Reg.scala 28:19]
|
|
_T_19084 <= bht_bank_wr_data_0_3_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][83] <= _T_19084 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19085 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_5 : @[Reg.scala 28:19]
|
|
_T_19085 <= bht_bank_wr_data_0_4_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][84] <= _T_19085 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19086 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_5 : @[Reg.scala 28:19]
|
|
_T_19086 <= bht_bank_wr_data_0_5_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][85] <= _T_19086 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19087 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_5 : @[Reg.scala 28:19]
|
|
_T_19087 <= bht_bank_wr_data_0_6_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][86] <= _T_19087 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19088 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_5 : @[Reg.scala 28:19]
|
|
_T_19088 <= bht_bank_wr_data_0_7_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][87] <= _T_19088 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19089 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_5 : @[Reg.scala 28:19]
|
|
_T_19089 <= bht_bank_wr_data_0_8_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][88] <= _T_19089 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19090 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_5 : @[Reg.scala 28:19]
|
|
_T_19090 <= bht_bank_wr_data_0_9_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][89] <= _T_19090 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19091 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_5 : @[Reg.scala 28:19]
|
|
_T_19091 <= bht_bank_wr_data_0_10_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][90] <= _T_19091 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19092 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_5 : @[Reg.scala 28:19]
|
|
_T_19092 <= bht_bank_wr_data_0_11_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][91] <= _T_19092 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19093 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_5 : @[Reg.scala 28:19]
|
|
_T_19093 <= bht_bank_wr_data_0_12_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][92] <= _T_19093 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19094 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_5 : @[Reg.scala 28:19]
|
|
_T_19094 <= bht_bank_wr_data_0_13_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][93] <= _T_19094 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19095 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_5 : @[Reg.scala 28:19]
|
|
_T_19095 <= bht_bank_wr_data_0_14_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][94] <= _T_19095 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19096 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_5 : @[Reg.scala 28:19]
|
|
_T_19096 <= bht_bank_wr_data_0_15_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][95] <= _T_19096 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19097 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_6 : @[Reg.scala 28:19]
|
|
_T_19097 <= bht_bank_wr_data_0_0_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][96] <= _T_19097 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19098 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_6 : @[Reg.scala 28:19]
|
|
_T_19098 <= bht_bank_wr_data_0_1_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][97] <= _T_19098 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19099 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_6 : @[Reg.scala 28:19]
|
|
_T_19099 <= bht_bank_wr_data_0_2_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][98] <= _T_19099 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19100 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_6 : @[Reg.scala 28:19]
|
|
_T_19100 <= bht_bank_wr_data_0_3_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][99] <= _T_19100 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19101 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_6 : @[Reg.scala 28:19]
|
|
_T_19101 <= bht_bank_wr_data_0_4_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][100] <= _T_19101 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19102 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_6 : @[Reg.scala 28:19]
|
|
_T_19102 <= bht_bank_wr_data_0_5_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][101] <= _T_19102 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19103 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_6 : @[Reg.scala 28:19]
|
|
_T_19103 <= bht_bank_wr_data_0_6_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][102] <= _T_19103 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19104 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_6 : @[Reg.scala 28:19]
|
|
_T_19104 <= bht_bank_wr_data_0_7_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][103] <= _T_19104 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19105 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_6 : @[Reg.scala 28:19]
|
|
_T_19105 <= bht_bank_wr_data_0_8_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][104] <= _T_19105 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19106 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_6 : @[Reg.scala 28:19]
|
|
_T_19106 <= bht_bank_wr_data_0_9_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][105] <= _T_19106 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19107 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_6 : @[Reg.scala 28:19]
|
|
_T_19107 <= bht_bank_wr_data_0_10_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][106] <= _T_19107 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19108 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_6 : @[Reg.scala 28:19]
|
|
_T_19108 <= bht_bank_wr_data_0_11_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][107] <= _T_19108 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19109 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_6 : @[Reg.scala 28:19]
|
|
_T_19109 <= bht_bank_wr_data_0_12_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][108] <= _T_19109 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19110 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_6 : @[Reg.scala 28:19]
|
|
_T_19110 <= bht_bank_wr_data_0_13_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][109] <= _T_19110 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19111 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_6 : @[Reg.scala 28:19]
|
|
_T_19111 <= bht_bank_wr_data_0_14_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][110] <= _T_19111 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19112 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_6 : @[Reg.scala 28:19]
|
|
_T_19112 <= bht_bank_wr_data_0_15_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][111] <= _T_19112 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19113 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_7 : @[Reg.scala 28:19]
|
|
_T_19113 <= bht_bank_wr_data_0_0_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][112] <= _T_19113 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19114 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_7 : @[Reg.scala 28:19]
|
|
_T_19114 <= bht_bank_wr_data_0_1_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][113] <= _T_19114 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19115 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_7 : @[Reg.scala 28:19]
|
|
_T_19115 <= bht_bank_wr_data_0_2_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][114] <= _T_19115 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19116 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_7 : @[Reg.scala 28:19]
|
|
_T_19116 <= bht_bank_wr_data_0_3_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][115] <= _T_19116 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19117 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_7 : @[Reg.scala 28:19]
|
|
_T_19117 <= bht_bank_wr_data_0_4_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][116] <= _T_19117 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19118 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_7 : @[Reg.scala 28:19]
|
|
_T_19118 <= bht_bank_wr_data_0_5_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][117] <= _T_19118 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19119 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_7 : @[Reg.scala 28:19]
|
|
_T_19119 <= bht_bank_wr_data_0_6_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][118] <= _T_19119 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19120 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_7 : @[Reg.scala 28:19]
|
|
_T_19120 <= bht_bank_wr_data_0_7_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][119] <= _T_19120 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19121 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_7 : @[Reg.scala 28:19]
|
|
_T_19121 <= bht_bank_wr_data_0_8_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][120] <= _T_19121 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19122 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_7 : @[Reg.scala 28:19]
|
|
_T_19122 <= bht_bank_wr_data_0_9_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][121] <= _T_19122 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19123 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_7 : @[Reg.scala 28:19]
|
|
_T_19123 <= bht_bank_wr_data_0_10_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][122] <= _T_19123 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19124 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_7 : @[Reg.scala 28:19]
|
|
_T_19124 <= bht_bank_wr_data_0_11_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][123] <= _T_19124 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19125 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_7 : @[Reg.scala 28:19]
|
|
_T_19125 <= bht_bank_wr_data_0_12_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][124] <= _T_19125 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19126 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_7 : @[Reg.scala 28:19]
|
|
_T_19126 <= bht_bank_wr_data_0_13_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][125] <= _T_19126 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19127 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_7 : @[Reg.scala 28:19]
|
|
_T_19127 <= bht_bank_wr_data_0_14_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][126] <= _T_19127 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19128 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_7 : @[Reg.scala 28:19]
|
|
_T_19128 <= bht_bank_wr_data_0_15_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][127] <= _T_19128 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19129 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_8 : @[Reg.scala 28:19]
|
|
_T_19129 <= bht_bank_wr_data_0_0_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][128] <= _T_19129 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19130 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_8 : @[Reg.scala 28:19]
|
|
_T_19130 <= bht_bank_wr_data_0_1_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][129] <= _T_19130 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19131 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_8 : @[Reg.scala 28:19]
|
|
_T_19131 <= bht_bank_wr_data_0_2_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][130] <= _T_19131 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19132 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_8 : @[Reg.scala 28:19]
|
|
_T_19132 <= bht_bank_wr_data_0_3_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][131] <= _T_19132 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19133 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_8 : @[Reg.scala 28:19]
|
|
_T_19133 <= bht_bank_wr_data_0_4_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][132] <= _T_19133 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19134 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_8 : @[Reg.scala 28:19]
|
|
_T_19134 <= bht_bank_wr_data_0_5_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][133] <= _T_19134 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19135 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_8 : @[Reg.scala 28:19]
|
|
_T_19135 <= bht_bank_wr_data_0_6_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][134] <= _T_19135 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19136 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_8 : @[Reg.scala 28:19]
|
|
_T_19136 <= bht_bank_wr_data_0_7_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][135] <= _T_19136 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19137 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_8 : @[Reg.scala 28:19]
|
|
_T_19137 <= bht_bank_wr_data_0_8_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][136] <= _T_19137 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19138 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_8 : @[Reg.scala 28:19]
|
|
_T_19138 <= bht_bank_wr_data_0_9_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][137] <= _T_19138 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19139 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_8 : @[Reg.scala 28:19]
|
|
_T_19139 <= bht_bank_wr_data_0_10_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][138] <= _T_19139 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19140 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_8 : @[Reg.scala 28:19]
|
|
_T_19140 <= bht_bank_wr_data_0_11_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][139] <= _T_19140 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19141 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_8 : @[Reg.scala 28:19]
|
|
_T_19141 <= bht_bank_wr_data_0_12_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][140] <= _T_19141 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19142 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_8 : @[Reg.scala 28:19]
|
|
_T_19142 <= bht_bank_wr_data_0_13_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][141] <= _T_19142 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19143 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_8 : @[Reg.scala 28:19]
|
|
_T_19143 <= bht_bank_wr_data_0_14_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][142] <= _T_19143 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19144 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_8 : @[Reg.scala 28:19]
|
|
_T_19144 <= bht_bank_wr_data_0_15_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][143] <= _T_19144 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19145 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_9 : @[Reg.scala 28:19]
|
|
_T_19145 <= bht_bank_wr_data_0_0_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][144] <= _T_19145 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19146 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_9 : @[Reg.scala 28:19]
|
|
_T_19146 <= bht_bank_wr_data_0_1_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][145] <= _T_19146 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19147 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_9 : @[Reg.scala 28:19]
|
|
_T_19147 <= bht_bank_wr_data_0_2_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][146] <= _T_19147 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19148 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_9 : @[Reg.scala 28:19]
|
|
_T_19148 <= bht_bank_wr_data_0_3_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][147] <= _T_19148 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19149 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_9 : @[Reg.scala 28:19]
|
|
_T_19149 <= bht_bank_wr_data_0_4_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][148] <= _T_19149 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19150 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_9 : @[Reg.scala 28:19]
|
|
_T_19150 <= bht_bank_wr_data_0_5_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][149] <= _T_19150 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19151 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_9 : @[Reg.scala 28:19]
|
|
_T_19151 <= bht_bank_wr_data_0_6_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][150] <= _T_19151 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19152 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_9 : @[Reg.scala 28:19]
|
|
_T_19152 <= bht_bank_wr_data_0_7_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][151] <= _T_19152 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19153 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_9 : @[Reg.scala 28:19]
|
|
_T_19153 <= bht_bank_wr_data_0_8_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][152] <= _T_19153 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19154 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_9 : @[Reg.scala 28:19]
|
|
_T_19154 <= bht_bank_wr_data_0_9_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][153] <= _T_19154 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19155 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_9 : @[Reg.scala 28:19]
|
|
_T_19155 <= bht_bank_wr_data_0_10_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][154] <= _T_19155 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19156 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_9 : @[Reg.scala 28:19]
|
|
_T_19156 <= bht_bank_wr_data_0_11_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][155] <= _T_19156 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19157 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_9 : @[Reg.scala 28:19]
|
|
_T_19157 <= bht_bank_wr_data_0_12_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][156] <= _T_19157 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19158 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_9 : @[Reg.scala 28:19]
|
|
_T_19158 <= bht_bank_wr_data_0_13_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][157] <= _T_19158 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19159 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_9 : @[Reg.scala 28:19]
|
|
_T_19159 <= bht_bank_wr_data_0_14_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][158] <= _T_19159 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19160 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_9 : @[Reg.scala 28:19]
|
|
_T_19160 <= bht_bank_wr_data_0_15_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][159] <= _T_19160 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19161 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_10 : @[Reg.scala 28:19]
|
|
_T_19161 <= bht_bank_wr_data_0_0_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][160] <= _T_19161 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19162 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_10 : @[Reg.scala 28:19]
|
|
_T_19162 <= bht_bank_wr_data_0_1_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][161] <= _T_19162 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19163 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_10 : @[Reg.scala 28:19]
|
|
_T_19163 <= bht_bank_wr_data_0_2_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][162] <= _T_19163 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19164 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_10 : @[Reg.scala 28:19]
|
|
_T_19164 <= bht_bank_wr_data_0_3_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][163] <= _T_19164 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19165 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_10 : @[Reg.scala 28:19]
|
|
_T_19165 <= bht_bank_wr_data_0_4_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][164] <= _T_19165 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19166 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_10 : @[Reg.scala 28:19]
|
|
_T_19166 <= bht_bank_wr_data_0_5_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][165] <= _T_19166 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19167 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_10 : @[Reg.scala 28:19]
|
|
_T_19167 <= bht_bank_wr_data_0_6_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][166] <= _T_19167 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19168 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_10 : @[Reg.scala 28:19]
|
|
_T_19168 <= bht_bank_wr_data_0_7_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][167] <= _T_19168 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19169 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_10 : @[Reg.scala 28:19]
|
|
_T_19169 <= bht_bank_wr_data_0_8_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][168] <= _T_19169 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19170 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_10 : @[Reg.scala 28:19]
|
|
_T_19170 <= bht_bank_wr_data_0_9_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][169] <= _T_19170 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19171 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_10 : @[Reg.scala 28:19]
|
|
_T_19171 <= bht_bank_wr_data_0_10_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][170] <= _T_19171 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19172 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_10 : @[Reg.scala 28:19]
|
|
_T_19172 <= bht_bank_wr_data_0_11_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][171] <= _T_19172 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19173 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_10 : @[Reg.scala 28:19]
|
|
_T_19173 <= bht_bank_wr_data_0_12_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][172] <= _T_19173 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19174 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_10 : @[Reg.scala 28:19]
|
|
_T_19174 <= bht_bank_wr_data_0_13_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][173] <= _T_19174 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19175 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_10 : @[Reg.scala 28:19]
|
|
_T_19175 <= bht_bank_wr_data_0_14_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][174] <= _T_19175 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19176 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_10 : @[Reg.scala 28:19]
|
|
_T_19176 <= bht_bank_wr_data_0_15_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][175] <= _T_19176 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19177 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_11 : @[Reg.scala 28:19]
|
|
_T_19177 <= bht_bank_wr_data_0_0_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][176] <= _T_19177 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19178 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_11 : @[Reg.scala 28:19]
|
|
_T_19178 <= bht_bank_wr_data_0_1_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][177] <= _T_19178 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19179 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_11 : @[Reg.scala 28:19]
|
|
_T_19179 <= bht_bank_wr_data_0_2_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][178] <= _T_19179 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19180 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_11 : @[Reg.scala 28:19]
|
|
_T_19180 <= bht_bank_wr_data_0_3_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][179] <= _T_19180 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19181 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_11 : @[Reg.scala 28:19]
|
|
_T_19181 <= bht_bank_wr_data_0_4_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][180] <= _T_19181 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19182 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_11 : @[Reg.scala 28:19]
|
|
_T_19182 <= bht_bank_wr_data_0_5_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][181] <= _T_19182 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19183 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_11 : @[Reg.scala 28:19]
|
|
_T_19183 <= bht_bank_wr_data_0_6_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][182] <= _T_19183 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19184 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_11 : @[Reg.scala 28:19]
|
|
_T_19184 <= bht_bank_wr_data_0_7_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][183] <= _T_19184 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19185 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_11 : @[Reg.scala 28:19]
|
|
_T_19185 <= bht_bank_wr_data_0_8_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][184] <= _T_19185 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19186 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_11 : @[Reg.scala 28:19]
|
|
_T_19186 <= bht_bank_wr_data_0_9_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][185] <= _T_19186 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19187 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_11 : @[Reg.scala 28:19]
|
|
_T_19187 <= bht_bank_wr_data_0_10_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][186] <= _T_19187 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19188 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_11 : @[Reg.scala 28:19]
|
|
_T_19188 <= bht_bank_wr_data_0_11_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][187] <= _T_19188 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19189 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_11 : @[Reg.scala 28:19]
|
|
_T_19189 <= bht_bank_wr_data_0_12_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][188] <= _T_19189 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19190 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_11 : @[Reg.scala 28:19]
|
|
_T_19190 <= bht_bank_wr_data_0_13_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][189] <= _T_19190 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19191 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_11 : @[Reg.scala 28:19]
|
|
_T_19191 <= bht_bank_wr_data_0_14_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][190] <= _T_19191 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19192 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_11 : @[Reg.scala 28:19]
|
|
_T_19192 <= bht_bank_wr_data_0_15_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][191] <= _T_19192 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19193 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_12 : @[Reg.scala 28:19]
|
|
_T_19193 <= bht_bank_wr_data_0_0_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][192] <= _T_19193 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19194 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_12 : @[Reg.scala 28:19]
|
|
_T_19194 <= bht_bank_wr_data_0_1_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][193] <= _T_19194 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19195 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_12 : @[Reg.scala 28:19]
|
|
_T_19195 <= bht_bank_wr_data_0_2_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][194] <= _T_19195 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19196 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_12 : @[Reg.scala 28:19]
|
|
_T_19196 <= bht_bank_wr_data_0_3_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][195] <= _T_19196 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19197 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_12 : @[Reg.scala 28:19]
|
|
_T_19197 <= bht_bank_wr_data_0_4_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][196] <= _T_19197 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19198 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_12 : @[Reg.scala 28:19]
|
|
_T_19198 <= bht_bank_wr_data_0_5_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][197] <= _T_19198 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19199 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_12 : @[Reg.scala 28:19]
|
|
_T_19199 <= bht_bank_wr_data_0_6_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][198] <= _T_19199 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19200 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_12 : @[Reg.scala 28:19]
|
|
_T_19200 <= bht_bank_wr_data_0_7_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][199] <= _T_19200 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19201 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_12 : @[Reg.scala 28:19]
|
|
_T_19201 <= bht_bank_wr_data_0_8_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][200] <= _T_19201 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19202 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_12 : @[Reg.scala 28:19]
|
|
_T_19202 <= bht_bank_wr_data_0_9_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][201] <= _T_19202 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19203 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_12 : @[Reg.scala 28:19]
|
|
_T_19203 <= bht_bank_wr_data_0_10_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][202] <= _T_19203 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19204 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_12 : @[Reg.scala 28:19]
|
|
_T_19204 <= bht_bank_wr_data_0_11_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][203] <= _T_19204 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19205 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_12 : @[Reg.scala 28:19]
|
|
_T_19205 <= bht_bank_wr_data_0_12_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][204] <= _T_19205 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19206 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_12 : @[Reg.scala 28:19]
|
|
_T_19206 <= bht_bank_wr_data_0_13_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][205] <= _T_19206 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19207 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_12 : @[Reg.scala 28:19]
|
|
_T_19207 <= bht_bank_wr_data_0_14_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][206] <= _T_19207 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19208 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_12 : @[Reg.scala 28:19]
|
|
_T_19208 <= bht_bank_wr_data_0_15_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][207] <= _T_19208 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19209 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_13 : @[Reg.scala 28:19]
|
|
_T_19209 <= bht_bank_wr_data_0_0_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][208] <= _T_19209 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19210 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_13 : @[Reg.scala 28:19]
|
|
_T_19210 <= bht_bank_wr_data_0_1_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][209] <= _T_19210 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19211 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_13 : @[Reg.scala 28:19]
|
|
_T_19211 <= bht_bank_wr_data_0_2_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][210] <= _T_19211 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19212 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_13 : @[Reg.scala 28:19]
|
|
_T_19212 <= bht_bank_wr_data_0_3_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][211] <= _T_19212 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19213 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_13 : @[Reg.scala 28:19]
|
|
_T_19213 <= bht_bank_wr_data_0_4_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][212] <= _T_19213 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19214 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_13 : @[Reg.scala 28:19]
|
|
_T_19214 <= bht_bank_wr_data_0_5_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][213] <= _T_19214 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19215 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_13 : @[Reg.scala 28:19]
|
|
_T_19215 <= bht_bank_wr_data_0_6_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][214] <= _T_19215 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19216 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_13 : @[Reg.scala 28:19]
|
|
_T_19216 <= bht_bank_wr_data_0_7_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][215] <= _T_19216 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19217 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_13 : @[Reg.scala 28:19]
|
|
_T_19217 <= bht_bank_wr_data_0_8_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][216] <= _T_19217 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19218 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_13 : @[Reg.scala 28:19]
|
|
_T_19218 <= bht_bank_wr_data_0_9_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][217] <= _T_19218 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19219 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_13 : @[Reg.scala 28:19]
|
|
_T_19219 <= bht_bank_wr_data_0_10_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][218] <= _T_19219 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19220 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_13 : @[Reg.scala 28:19]
|
|
_T_19220 <= bht_bank_wr_data_0_11_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][219] <= _T_19220 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19221 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_13 : @[Reg.scala 28:19]
|
|
_T_19221 <= bht_bank_wr_data_0_12_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][220] <= _T_19221 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19222 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_13 : @[Reg.scala 28:19]
|
|
_T_19222 <= bht_bank_wr_data_0_13_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][221] <= _T_19222 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19223 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_13 : @[Reg.scala 28:19]
|
|
_T_19223 <= bht_bank_wr_data_0_14_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][222] <= _T_19223 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19224 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_13 : @[Reg.scala 28:19]
|
|
_T_19224 <= bht_bank_wr_data_0_15_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][223] <= _T_19224 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19225 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_14 : @[Reg.scala 28:19]
|
|
_T_19225 <= bht_bank_wr_data_0_0_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][224] <= _T_19225 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19226 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_14 : @[Reg.scala 28:19]
|
|
_T_19226 <= bht_bank_wr_data_0_1_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][225] <= _T_19226 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19227 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_14 : @[Reg.scala 28:19]
|
|
_T_19227 <= bht_bank_wr_data_0_2_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][226] <= _T_19227 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19228 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_14 : @[Reg.scala 28:19]
|
|
_T_19228 <= bht_bank_wr_data_0_3_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][227] <= _T_19228 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19229 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_14 : @[Reg.scala 28:19]
|
|
_T_19229 <= bht_bank_wr_data_0_4_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][228] <= _T_19229 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19230 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_14 : @[Reg.scala 28:19]
|
|
_T_19230 <= bht_bank_wr_data_0_5_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][229] <= _T_19230 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19231 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_14 : @[Reg.scala 28:19]
|
|
_T_19231 <= bht_bank_wr_data_0_6_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][230] <= _T_19231 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19232 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_14 : @[Reg.scala 28:19]
|
|
_T_19232 <= bht_bank_wr_data_0_7_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][231] <= _T_19232 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19233 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_14 : @[Reg.scala 28:19]
|
|
_T_19233 <= bht_bank_wr_data_0_8_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][232] <= _T_19233 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19234 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_14 : @[Reg.scala 28:19]
|
|
_T_19234 <= bht_bank_wr_data_0_9_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][233] <= _T_19234 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19235 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_14 : @[Reg.scala 28:19]
|
|
_T_19235 <= bht_bank_wr_data_0_10_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][234] <= _T_19235 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19236 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_14 : @[Reg.scala 28:19]
|
|
_T_19236 <= bht_bank_wr_data_0_11_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][235] <= _T_19236 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19237 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_14 : @[Reg.scala 28:19]
|
|
_T_19237 <= bht_bank_wr_data_0_12_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][236] <= _T_19237 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19238 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_14 : @[Reg.scala 28:19]
|
|
_T_19238 <= bht_bank_wr_data_0_13_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][237] <= _T_19238 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19239 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_14 : @[Reg.scala 28:19]
|
|
_T_19239 <= bht_bank_wr_data_0_14_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][238] <= _T_19239 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19240 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_14 : @[Reg.scala 28:19]
|
|
_T_19240 <= bht_bank_wr_data_0_15_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][239] <= _T_19240 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19241 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_0_15 : @[Reg.scala 28:19]
|
|
_T_19241 <= bht_bank_wr_data_0_0_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][240] <= _T_19241 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19242 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_1_15 : @[Reg.scala 28:19]
|
|
_T_19242 <= bht_bank_wr_data_0_1_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][241] <= _T_19242 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19243 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_2_15 : @[Reg.scala 28:19]
|
|
_T_19243 <= bht_bank_wr_data_0_2_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][242] <= _T_19243 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19244 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_3_15 : @[Reg.scala 28:19]
|
|
_T_19244 <= bht_bank_wr_data_0_3_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][243] <= _T_19244 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19245 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_4_15 : @[Reg.scala 28:19]
|
|
_T_19245 <= bht_bank_wr_data_0_4_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][244] <= _T_19245 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19246 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_5_15 : @[Reg.scala 28:19]
|
|
_T_19246 <= bht_bank_wr_data_0_5_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][245] <= _T_19246 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19247 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_6_15 : @[Reg.scala 28:19]
|
|
_T_19247 <= bht_bank_wr_data_0_6_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][246] <= _T_19247 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19248 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_7_15 : @[Reg.scala 28:19]
|
|
_T_19248 <= bht_bank_wr_data_0_7_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][247] <= _T_19248 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19249 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_8_15 : @[Reg.scala 28:19]
|
|
_T_19249 <= bht_bank_wr_data_0_8_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][248] <= _T_19249 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19250 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_9_15 : @[Reg.scala 28:19]
|
|
_T_19250 <= bht_bank_wr_data_0_9_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][249] <= _T_19250 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19251 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_10_15 : @[Reg.scala 28:19]
|
|
_T_19251 <= bht_bank_wr_data_0_10_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][250] <= _T_19251 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19252 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_11_15 : @[Reg.scala 28:19]
|
|
_T_19252 <= bht_bank_wr_data_0_11_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][251] <= _T_19252 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19253 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_12_15 : @[Reg.scala 28:19]
|
|
_T_19253 <= bht_bank_wr_data_0_12_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][252] <= _T_19253 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19254 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_13_15 : @[Reg.scala 28:19]
|
|
_T_19254 <= bht_bank_wr_data_0_13_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][253] <= _T_19254 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19255 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_14_15 : @[Reg.scala 28:19]
|
|
_T_19255 <= bht_bank_wr_data_0_14_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][254] <= _T_19255 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19256 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_0_15_15 : @[Reg.scala 28:19]
|
|
_T_19256 <= bht_bank_wr_data_0_15_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[0][255] <= _T_19256 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19257 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_0 : @[Reg.scala 28:19]
|
|
_T_19257 <= bht_bank_wr_data_1_0_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][0] <= _T_19257 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19258 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_0 : @[Reg.scala 28:19]
|
|
_T_19258 <= bht_bank_wr_data_1_1_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][1] <= _T_19258 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19259 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_0 : @[Reg.scala 28:19]
|
|
_T_19259 <= bht_bank_wr_data_1_2_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][2] <= _T_19259 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19260 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_0 : @[Reg.scala 28:19]
|
|
_T_19260 <= bht_bank_wr_data_1_3_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][3] <= _T_19260 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19261 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_0 : @[Reg.scala 28:19]
|
|
_T_19261 <= bht_bank_wr_data_1_4_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][4] <= _T_19261 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19262 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_0 : @[Reg.scala 28:19]
|
|
_T_19262 <= bht_bank_wr_data_1_5_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][5] <= _T_19262 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19263 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_0 : @[Reg.scala 28:19]
|
|
_T_19263 <= bht_bank_wr_data_1_6_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][6] <= _T_19263 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19264 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_0 : @[Reg.scala 28:19]
|
|
_T_19264 <= bht_bank_wr_data_1_7_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][7] <= _T_19264 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19265 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_0 : @[Reg.scala 28:19]
|
|
_T_19265 <= bht_bank_wr_data_1_8_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][8] <= _T_19265 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19266 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_0 : @[Reg.scala 28:19]
|
|
_T_19266 <= bht_bank_wr_data_1_9_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][9] <= _T_19266 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19267 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_0 : @[Reg.scala 28:19]
|
|
_T_19267 <= bht_bank_wr_data_1_10_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][10] <= _T_19267 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19268 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_0 : @[Reg.scala 28:19]
|
|
_T_19268 <= bht_bank_wr_data_1_11_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][11] <= _T_19268 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19269 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_0 : @[Reg.scala 28:19]
|
|
_T_19269 <= bht_bank_wr_data_1_12_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][12] <= _T_19269 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19270 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_0 : @[Reg.scala 28:19]
|
|
_T_19270 <= bht_bank_wr_data_1_13_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][13] <= _T_19270 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19271 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_0 : @[Reg.scala 28:19]
|
|
_T_19271 <= bht_bank_wr_data_1_14_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][14] <= _T_19271 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19272 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_0 : @[Reg.scala 28:19]
|
|
_T_19272 <= bht_bank_wr_data_1_15_0 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][15] <= _T_19272 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19273 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_1 : @[Reg.scala 28:19]
|
|
_T_19273 <= bht_bank_wr_data_1_0_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][16] <= _T_19273 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19274 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_1 : @[Reg.scala 28:19]
|
|
_T_19274 <= bht_bank_wr_data_1_1_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][17] <= _T_19274 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19275 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_1 : @[Reg.scala 28:19]
|
|
_T_19275 <= bht_bank_wr_data_1_2_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][18] <= _T_19275 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19276 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_1 : @[Reg.scala 28:19]
|
|
_T_19276 <= bht_bank_wr_data_1_3_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][19] <= _T_19276 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19277 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_1 : @[Reg.scala 28:19]
|
|
_T_19277 <= bht_bank_wr_data_1_4_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][20] <= _T_19277 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19278 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_1 : @[Reg.scala 28:19]
|
|
_T_19278 <= bht_bank_wr_data_1_5_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][21] <= _T_19278 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19279 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_1 : @[Reg.scala 28:19]
|
|
_T_19279 <= bht_bank_wr_data_1_6_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][22] <= _T_19279 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19280 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_1 : @[Reg.scala 28:19]
|
|
_T_19280 <= bht_bank_wr_data_1_7_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][23] <= _T_19280 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19281 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_1 : @[Reg.scala 28:19]
|
|
_T_19281 <= bht_bank_wr_data_1_8_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][24] <= _T_19281 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19282 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_1 : @[Reg.scala 28:19]
|
|
_T_19282 <= bht_bank_wr_data_1_9_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][25] <= _T_19282 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19283 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_1 : @[Reg.scala 28:19]
|
|
_T_19283 <= bht_bank_wr_data_1_10_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][26] <= _T_19283 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19284 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_1 : @[Reg.scala 28:19]
|
|
_T_19284 <= bht_bank_wr_data_1_11_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][27] <= _T_19284 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19285 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_1 : @[Reg.scala 28:19]
|
|
_T_19285 <= bht_bank_wr_data_1_12_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][28] <= _T_19285 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19286 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_1 : @[Reg.scala 28:19]
|
|
_T_19286 <= bht_bank_wr_data_1_13_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][29] <= _T_19286 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19287 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_1 : @[Reg.scala 28:19]
|
|
_T_19287 <= bht_bank_wr_data_1_14_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][30] <= _T_19287 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19288 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_1 : @[Reg.scala 28:19]
|
|
_T_19288 <= bht_bank_wr_data_1_15_1 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][31] <= _T_19288 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19289 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_2 : @[Reg.scala 28:19]
|
|
_T_19289 <= bht_bank_wr_data_1_0_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][32] <= _T_19289 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19290 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_2 : @[Reg.scala 28:19]
|
|
_T_19290 <= bht_bank_wr_data_1_1_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][33] <= _T_19290 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19291 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_2 : @[Reg.scala 28:19]
|
|
_T_19291 <= bht_bank_wr_data_1_2_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][34] <= _T_19291 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19292 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_2 : @[Reg.scala 28:19]
|
|
_T_19292 <= bht_bank_wr_data_1_3_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][35] <= _T_19292 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19293 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_2 : @[Reg.scala 28:19]
|
|
_T_19293 <= bht_bank_wr_data_1_4_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][36] <= _T_19293 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19294 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_2 : @[Reg.scala 28:19]
|
|
_T_19294 <= bht_bank_wr_data_1_5_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][37] <= _T_19294 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19295 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_2 : @[Reg.scala 28:19]
|
|
_T_19295 <= bht_bank_wr_data_1_6_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][38] <= _T_19295 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19296 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_2 : @[Reg.scala 28:19]
|
|
_T_19296 <= bht_bank_wr_data_1_7_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][39] <= _T_19296 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19297 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_2 : @[Reg.scala 28:19]
|
|
_T_19297 <= bht_bank_wr_data_1_8_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][40] <= _T_19297 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19298 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_2 : @[Reg.scala 28:19]
|
|
_T_19298 <= bht_bank_wr_data_1_9_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][41] <= _T_19298 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19299 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_2 : @[Reg.scala 28:19]
|
|
_T_19299 <= bht_bank_wr_data_1_10_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][42] <= _T_19299 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19300 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_2 : @[Reg.scala 28:19]
|
|
_T_19300 <= bht_bank_wr_data_1_11_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][43] <= _T_19300 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19301 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_2 : @[Reg.scala 28:19]
|
|
_T_19301 <= bht_bank_wr_data_1_12_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][44] <= _T_19301 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19302 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_2 : @[Reg.scala 28:19]
|
|
_T_19302 <= bht_bank_wr_data_1_13_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][45] <= _T_19302 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19303 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_2 : @[Reg.scala 28:19]
|
|
_T_19303 <= bht_bank_wr_data_1_14_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][46] <= _T_19303 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19304 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_2 : @[Reg.scala 28:19]
|
|
_T_19304 <= bht_bank_wr_data_1_15_2 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][47] <= _T_19304 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19305 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_3 : @[Reg.scala 28:19]
|
|
_T_19305 <= bht_bank_wr_data_1_0_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][48] <= _T_19305 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19306 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_3 : @[Reg.scala 28:19]
|
|
_T_19306 <= bht_bank_wr_data_1_1_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][49] <= _T_19306 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19307 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_3 : @[Reg.scala 28:19]
|
|
_T_19307 <= bht_bank_wr_data_1_2_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][50] <= _T_19307 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19308 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_3 : @[Reg.scala 28:19]
|
|
_T_19308 <= bht_bank_wr_data_1_3_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][51] <= _T_19308 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19309 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_3 : @[Reg.scala 28:19]
|
|
_T_19309 <= bht_bank_wr_data_1_4_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][52] <= _T_19309 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19310 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_3 : @[Reg.scala 28:19]
|
|
_T_19310 <= bht_bank_wr_data_1_5_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][53] <= _T_19310 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19311 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_3 : @[Reg.scala 28:19]
|
|
_T_19311 <= bht_bank_wr_data_1_6_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][54] <= _T_19311 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19312 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_3 : @[Reg.scala 28:19]
|
|
_T_19312 <= bht_bank_wr_data_1_7_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][55] <= _T_19312 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19313 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_3 : @[Reg.scala 28:19]
|
|
_T_19313 <= bht_bank_wr_data_1_8_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][56] <= _T_19313 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19314 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_3 : @[Reg.scala 28:19]
|
|
_T_19314 <= bht_bank_wr_data_1_9_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][57] <= _T_19314 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19315 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_3 : @[Reg.scala 28:19]
|
|
_T_19315 <= bht_bank_wr_data_1_10_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][58] <= _T_19315 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19316 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_3 : @[Reg.scala 28:19]
|
|
_T_19316 <= bht_bank_wr_data_1_11_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][59] <= _T_19316 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19317 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_3 : @[Reg.scala 28:19]
|
|
_T_19317 <= bht_bank_wr_data_1_12_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][60] <= _T_19317 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19318 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_3 : @[Reg.scala 28:19]
|
|
_T_19318 <= bht_bank_wr_data_1_13_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][61] <= _T_19318 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19319 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_3 : @[Reg.scala 28:19]
|
|
_T_19319 <= bht_bank_wr_data_1_14_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][62] <= _T_19319 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19320 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_3 : @[Reg.scala 28:19]
|
|
_T_19320 <= bht_bank_wr_data_1_15_3 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][63] <= _T_19320 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19321 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_4 : @[Reg.scala 28:19]
|
|
_T_19321 <= bht_bank_wr_data_1_0_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][64] <= _T_19321 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19322 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_4 : @[Reg.scala 28:19]
|
|
_T_19322 <= bht_bank_wr_data_1_1_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][65] <= _T_19322 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19323 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_4 : @[Reg.scala 28:19]
|
|
_T_19323 <= bht_bank_wr_data_1_2_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][66] <= _T_19323 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19324 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_4 : @[Reg.scala 28:19]
|
|
_T_19324 <= bht_bank_wr_data_1_3_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][67] <= _T_19324 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19325 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_4 : @[Reg.scala 28:19]
|
|
_T_19325 <= bht_bank_wr_data_1_4_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][68] <= _T_19325 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19326 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_4 : @[Reg.scala 28:19]
|
|
_T_19326 <= bht_bank_wr_data_1_5_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][69] <= _T_19326 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19327 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_4 : @[Reg.scala 28:19]
|
|
_T_19327 <= bht_bank_wr_data_1_6_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][70] <= _T_19327 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19328 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_4 : @[Reg.scala 28:19]
|
|
_T_19328 <= bht_bank_wr_data_1_7_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][71] <= _T_19328 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19329 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_4 : @[Reg.scala 28:19]
|
|
_T_19329 <= bht_bank_wr_data_1_8_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][72] <= _T_19329 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19330 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_4 : @[Reg.scala 28:19]
|
|
_T_19330 <= bht_bank_wr_data_1_9_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][73] <= _T_19330 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19331 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_4 : @[Reg.scala 28:19]
|
|
_T_19331 <= bht_bank_wr_data_1_10_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][74] <= _T_19331 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19332 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_4 : @[Reg.scala 28:19]
|
|
_T_19332 <= bht_bank_wr_data_1_11_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][75] <= _T_19332 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19333 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_4 : @[Reg.scala 28:19]
|
|
_T_19333 <= bht_bank_wr_data_1_12_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][76] <= _T_19333 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19334 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_4 : @[Reg.scala 28:19]
|
|
_T_19334 <= bht_bank_wr_data_1_13_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][77] <= _T_19334 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19335 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_4 : @[Reg.scala 28:19]
|
|
_T_19335 <= bht_bank_wr_data_1_14_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][78] <= _T_19335 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19336 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_4 : @[Reg.scala 28:19]
|
|
_T_19336 <= bht_bank_wr_data_1_15_4 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][79] <= _T_19336 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19337 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_5 : @[Reg.scala 28:19]
|
|
_T_19337 <= bht_bank_wr_data_1_0_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][80] <= _T_19337 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19338 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_5 : @[Reg.scala 28:19]
|
|
_T_19338 <= bht_bank_wr_data_1_1_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][81] <= _T_19338 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19339 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_5 : @[Reg.scala 28:19]
|
|
_T_19339 <= bht_bank_wr_data_1_2_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][82] <= _T_19339 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19340 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_5 : @[Reg.scala 28:19]
|
|
_T_19340 <= bht_bank_wr_data_1_3_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][83] <= _T_19340 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19341 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_5 : @[Reg.scala 28:19]
|
|
_T_19341 <= bht_bank_wr_data_1_4_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][84] <= _T_19341 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19342 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_5 : @[Reg.scala 28:19]
|
|
_T_19342 <= bht_bank_wr_data_1_5_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][85] <= _T_19342 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19343 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_5 : @[Reg.scala 28:19]
|
|
_T_19343 <= bht_bank_wr_data_1_6_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][86] <= _T_19343 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19344 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_5 : @[Reg.scala 28:19]
|
|
_T_19344 <= bht_bank_wr_data_1_7_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][87] <= _T_19344 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19345 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_5 : @[Reg.scala 28:19]
|
|
_T_19345 <= bht_bank_wr_data_1_8_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][88] <= _T_19345 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19346 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_5 : @[Reg.scala 28:19]
|
|
_T_19346 <= bht_bank_wr_data_1_9_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][89] <= _T_19346 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19347 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_5 : @[Reg.scala 28:19]
|
|
_T_19347 <= bht_bank_wr_data_1_10_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][90] <= _T_19347 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19348 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_5 : @[Reg.scala 28:19]
|
|
_T_19348 <= bht_bank_wr_data_1_11_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][91] <= _T_19348 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19349 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_5 : @[Reg.scala 28:19]
|
|
_T_19349 <= bht_bank_wr_data_1_12_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][92] <= _T_19349 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19350 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_5 : @[Reg.scala 28:19]
|
|
_T_19350 <= bht_bank_wr_data_1_13_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][93] <= _T_19350 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19351 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_5 : @[Reg.scala 28:19]
|
|
_T_19351 <= bht_bank_wr_data_1_14_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][94] <= _T_19351 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19352 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_5 : @[Reg.scala 28:19]
|
|
_T_19352 <= bht_bank_wr_data_1_15_5 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][95] <= _T_19352 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19353 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_6 : @[Reg.scala 28:19]
|
|
_T_19353 <= bht_bank_wr_data_1_0_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][96] <= _T_19353 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19354 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_6 : @[Reg.scala 28:19]
|
|
_T_19354 <= bht_bank_wr_data_1_1_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][97] <= _T_19354 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19355 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_6 : @[Reg.scala 28:19]
|
|
_T_19355 <= bht_bank_wr_data_1_2_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][98] <= _T_19355 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19356 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_6 : @[Reg.scala 28:19]
|
|
_T_19356 <= bht_bank_wr_data_1_3_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][99] <= _T_19356 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19357 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_6 : @[Reg.scala 28:19]
|
|
_T_19357 <= bht_bank_wr_data_1_4_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][100] <= _T_19357 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19358 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_6 : @[Reg.scala 28:19]
|
|
_T_19358 <= bht_bank_wr_data_1_5_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][101] <= _T_19358 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19359 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_6 : @[Reg.scala 28:19]
|
|
_T_19359 <= bht_bank_wr_data_1_6_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][102] <= _T_19359 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19360 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_6 : @[Reg.scala 28:19]
|
|
_T_19360 <= bht_bank_wr_data_1_7_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][103] <= _T_19360 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19361 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_6 : @[Reg.scala 28:19]
|
|
_T_19361 <= bht_bank_wr_data_1_8_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][104] <= _T_19361 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19362 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_6 : @[Reg.scala 28:19]
|
|
_T_19362 <= bht_bank_wr_data_1_9_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][105] <= _T_19362 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19363 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_6 : @[Reg.scala 28:19]
|
|
_T_19363 <= bht_bank_wr_data_1_10_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][106] <= _T_19363 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19364 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_6 : @[Reg.scala 28:19]
|
|
_T_19364 <= bht_bank_wr_data_1_11_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][107] <= _T_19364 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19365 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_6 : @[Reg.scala 28:19]
|
|
_T_19365 <= bht_bank_wr_data_1_12_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][108] <= _T_19365 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19366 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_6 : @[Reg.scala 28:19]
|
|
_T_19366 <= bht_bank_wr_data_1_13_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][109] <= _T_19366 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19367 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_6 : @[Reg.scala 28:19]
|
|
_T_19367 <= bht_bank_wr_data_1_14_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][110] <= _T_19367 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19368 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_6 : @[Reg.scala 28:19]
|
|
_T_19368 <= bht_bank_wr_data_1_15_6 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][111] <= _T_19368 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19369 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_7 : @[Reg.scala 28:19]
|
|
_T_19369 <= bht_bank_wr_data_1_0_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][112] <= _T_19369 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19370 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_7 : @[Reg.scala 28:19]
|
|
_T_19370 <= bht_bank_wr_data_1_1_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][113] <= _T_19370 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19371 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_7 : @[Reg.scala 28:19]
|
|
_T_19371 <= bht_bank_wr_data_1_2_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][114] <= _T_19371 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19372 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_7 : @[Reg.scala 28:19]
|
|
_T_19372 <= bht_bank_wr_data_1_3_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][115] <= _T_19372 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19373 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_7 : @[Reg.scala 28:19]
|
|
_T_19373 <= bht_bank_wr_data_1_4_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][116] <= _T_19373 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19374 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_7 : @[Reg.scala 28:19]
|
|
_T_19374 <= bht_bank_wr_data_1_5_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][117] <= _T_19374 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19375 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_7 : @[Reg.scala 28:19]
|
|
_T_19375 <= bht_bank_wr_data_1_6_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][118] <= _T_19375 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19376 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_7 : @[Reg.scala 28:19]
|
|
_T_19376 <= bht_bank_wr_data_1_7_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][119] <= _T_19376 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19377 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_7 : @[Reg.scala 28:19]
|
|
_T_19377 <= bht_bank_wr_data_1_8_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][120] <= _T_19377 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19378 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_7 : @[Reg.scala 28:19]
|
|
_T_19378 <= bht_bank_wr_data_1_9_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][121] <= _T_19378 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19379 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_7 : @[Reg.scala 28:19]
|
|
_T_19379 <= bht_bank_wr_data_1_10_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][122] <= _T_19379 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19380 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_7 : @[Reg.scala 28:19]
|
|
_T_19380 <= bht_bank_wr_data_1_11_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][123] <= _T_19380 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19381 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_7 : @[Reg.scala 28:19]
|
|
_T_19381 <= bht_bank_wr_data_1_12_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][124] <= _T_19381 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19382 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_7 : @[Reg.scala 28:19]
|
|
_T_19382 <= bht_bank_wr_data_1_13_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][125] <= _T_19382 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19383 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_7 : @[Reg.scala 28:19]
|
|
_T_19383 <= bht_bank_wr_data_1_14_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][126] <= _T_19383 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19384 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_7 : @[Reg.scala 28:19]
|
|
_T_19384 <= bht_bank_wr_data_1_15_7 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][127] <= _T_19384 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19385 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_8 : @[Reg.scala 28:19]
|
|
_T_19385 <= bht_bank_wr_data_1_0_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][128] <= _T_19385 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19386 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_8 : @[Reg.scala 28:19]
|
|
_T_19386 <= bht_bank_wr_data_1_1_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][129] <= _T_19386 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19387 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_8 : @[Reg.scala 28:19]
|
|
_T_19387 <= bht_bank_wr_data_1_2_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][130] <= _T_19387 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19388 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_8 : @[Reg.scala 28:19]
|
|
_T_19388 <= bht_bank_wr_data_1_3_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][131] <= _T_19388 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19389 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_8 : @[Reg.scala 28:19]
|
|
_T_19389 <= bht_bank_wr_data_1_4_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][132] <= _T_19389 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19390 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_8 : @[Reg.scala 28:19]
|
|
_T_19390 <= bht_bank_wr_data_1_5_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][133] <= _T_19390 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19391 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_8 : @[Reg.scala 28:19]
|
|
_T_19391 <= bht_bank_wr_data_1_6_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][134] <= _T_19391 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19392 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_8 : @[Reg.scala 28:19]
|
|
_T_19392 <= bht_bank_wr_data_1_7_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][135] <= _T_19392 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19393 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_8 : @[Reg.scala 28:19]
|
|
_T_19393 <= bht_bank_wr_data_1_8_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][136] <= _T_19393 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19394 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_8 : @[Reg.scala 28:19]
|
|
_T_19394 <= bht_bank_wr_data_1_9_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][137] <= _T_19394 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19395 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_8 : @[Reg.scala 28:19]
|
|
_T_19395 <= bht_bank_wr_data_1_10_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][138] <= _T_19395 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19396 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_8 : @[Reg.scala 28:19]
|
|
_T_19396 <= bht_bank_wr_data_1_11_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][139] <= _T_19396 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19397 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_8 : @[Reg.scala 28:19]
|
|
_T_19397 <= bht_bank_wr_data_1_12_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][140] <= _T_19397 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19398 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_8 : @[Reg.scala 28:19]
|
|
_T_19398 <= bht_bank_wr_data_1_13_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][141] <= _T_19398 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19399 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_8 : @[Reg.scala 28:19]
|
|
_T_19399 <= bht_bank_wr_data_1_14_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][142] <= _T_19399 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19400 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_8 : @[Reg.scala 28:19]
|
|
_T_19400 <= bht_bank_wr_data_1_15_8 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][143] <= _T_19400 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19401 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_9 : @[Reg.scala 28:19]
|
|
_T_19401 <= bht_bank_wr_data_1_0_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][144] <= _T_19401 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19402 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_9 : @[Reg.scala 28:19]
|
|
_T_19402 <= bht_bank_wr_data_1_1_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][145] <= _T_19402 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19403 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_9 : @[Reg.scala 28:19]
|
|
_T_19403 <= bht_bank_wr_data_1_2_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][146] <= _T_19403 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19404 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_9 : @[Reg.scala 28:19]
|
|
_T_19404 <= bht_bank_wr_data_1_3_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][147] <= _T_19404 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19405 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_9 : @[Reg.scala 28:19]
|
|
_T_19405 <= bht_bank_wr_data_1_4_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][148] <= _T_19405 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19406 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_9 : @[Reg.scala 28:19]
|
|
_T_19406 <= bht_bank_wr_data_1_5_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][149] <= _T_19406 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19407 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_9 : @[Reg.scala 28:19]
|
|
_T_19407 <= bht_bank_wr_data_1_6_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][150] <= _T_19407 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19408 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_9 : @[Reg.scala 28:19]
|
|
_T_19408 <= bht_bank_wr_data_1_7_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][151] <= _T_19408 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19409 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_9 : @[Reg.scala 28:19]
|
|
_T_19409 <= bht_bank_wr_data_1_8_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][152] <= _T_19409 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19410 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_9 : @[Reg.scala 28:19]
|
|
_T_19410 <= bht_bank_wr_data_1_9_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][153] <= _T_19410 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19411 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_9 : @[Reg.scala 28:19]
|
|
_T_19411 <= bht_bank_wr_data_1_10_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][154] <= _T_19411 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19412 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_9 : @[Reg.scala 28:19]
|
|
_T_19412 <= bht_bank_wr_data_1_11_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][155] <= _T_19412 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19413 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_9 : @[Reg.scala 28:19]
|
|
_T_19413 <= bht_bank_wr_data_1_12_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][156] <= _T_19413 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19414 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_9 : @[Reg.scala 28:19]
|
|
_T_19414 <= bht_bank_wr_data_1_13_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][157] <= _T_19414 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19415 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_9 : @[Reg.scala 28:19]
|
|
_T_19415 <= bht_bank_wr_data_1_14_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][158] <= _T_19415 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19416 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_9 : @[Reg.scala 28:19]
|
|
_T_19416 <= bht_bank_wr_data_1_15_9 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][159] <= _T_19416 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19417 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_10 : @[Reg.scala 28:19]
|
|
_T_19417 <= bht_bank_wr_data_1_0_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][160] <= _T_19417 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19418 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_10 : @[Reg.scala 28:19]
|
|
_T_19418 <= bht_bank_wr_data_1_1_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][161] <= _T_19418 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19419 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_10 : @[Reg.scala 28:19]
|
|
_T_19419 <= bht_bank_wr_data_1_2_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][162] <= _T_19419 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19420 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_10 : @[Reg.scala 28:19]
|
|
_T_19420 <= bht_bank_wr_data_1_3_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][163] <= _T_19420 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19421 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_10 : @[Reg.scala 28:19]
|
|
_T_19421 <= bht_bank_wr_data_1_4_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][164] <= _T_19421 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19422 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_10 : @[Reg.scala 28:19]
|
|
_T_19422 <= bht_bank_wr_data_1_5_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][165] <= _T_19422 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19423 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_10 : @[Reg.scala 28:19]
|
|
_T_19423 <= bht_bank_wr_data_1_6_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][166] <= _T_19423 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19424 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_10 : @[Reg.scala 28:19]
|
|
_T_19424 <= bht_bank_wr_data_1_7_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][167] <= _T_19424 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19425 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_10 : @[Reg.scala 28:19]
|
|
_T_19425 <= bht_bank_wr_data_1_8_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][168] <= _T_19425 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19426 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_10 : @[Reg.scala 28:19]
|
|
_T_19426 <= bht_bank_wr_data_1_9_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][169] <= _T_19426 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19427 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_10 : @[Reg.scala 28:19]
|
|
_T_19427 <= bht_bank_wr_data_1_10_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][170] <= _T_19427 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19428 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_10 : @[Reg.scala 28:19]
|
|
_T_19428 <= bht_bank_wr_data_1_11_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][171] <= _T_19428 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19429 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_10 : @[Reg.scala 28:19]
|
|
_T_19429 <= bht_bank_wr_data_1_12_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][172] <= _T_19429 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19430 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_10 : @[Reg.scala 28:19]
|
|
_T_19430 <= bht_bank_wr_data_1_13_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][173] <= _T_19430 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19431 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_10 : @[Reg.scala 28:19]
|
|
_T_19431 <= bht_bank_wr_data_1_14_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][174] <= _T_19431 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19432 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_10 : @[Reg.scala 28:19]
|
|
_T_19432 <= bht_bank_wr_data_1_15_10 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][175] <= _T_19432 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19433 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_11 : @[Reg.scala 28:19]
|
|
_T_19433 <= bht_bank_wr_data_1_0_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][176] <= _T_19433 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19434 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_11 : @[Reg.scala 28:19]
|
|
_T_19434 <= bht_bank_wr_data_1_1_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][177] <= _T_19434 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19435 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_11 : @[Reg.scala 28:19]
|
|
_T_19435 <= bht_bank_wr_data_1_2_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][178] <= _T_19435 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19436 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_11 : @[Reg.scala 28:19]
|
|
_T_19436 <= bht_bank_wr_data_1_3_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][179] <= _T_19436 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19437 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_11 : @[Reg.scala 28:19]
|
|
_T_19437 <= bht_bank_wr_data_1_4_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][180] <= _T_19437 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19438 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_11 : @[Reg.scala 28:19]
|
|
_T_19438 <= bht_bank_wr_data_1_5_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][181] <= _T_19438 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19439 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_11 : @[Reg.scala 28:19]
|
|
_T_19439 <= bht_bank_wr_data_1_6_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][182] <= _T_19439 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19440 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_11 : @[Reg.scala 28:19]
|
|
_T_19440 <= bht_bank_wr_data_1_7_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][183] <= _T_19440 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19441 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_11 : @[Reg.scala 28:19]
|
|
_T_19441 <= bht_bank_wr_data_1_8_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][184] <= _T_19441 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19442 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_11 : @[Reg.scala 28:19]
|
|
_T_19442 <= bht_bank_wr_data_1_9_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][185] <= _T_19442 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19443 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_11 : @[Reg.scala 28:19]
|
|
_T_19443 <= bht_bank_wr_data_1_10_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][186] <= _T_19443 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19444 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_11 : @[Reg.scala 28:19]
|
|
_T_19444 <= bht_bank_wr_data_1_11_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][187] <= _T_19444 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19445 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_11 : @[Reg.scala 28:19]
|
|
_T_19445 <= bht_bank_wr_data_1_12_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][188] <= _T_19445 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19446 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_11 : @[Reg.scala 28:19]
|
|
_T_19446 <= bht_bank_wr_data_1_13_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][189] <= _T_19446 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19447 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_11 : @[Reg.scala 28:19]
|
|
_T_19447 <= bht_bank_wr_data_1_14_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][190] <= _T_19447 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19448 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_11 : @[Reg.scala 28:19]
|
|
_T_19448 <= bht_bank_wr_data_1_15_11 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][191] <= _T_19448 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19449 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_12 : @[Reg.scala 28:19]
|
|
_T_19449 <= bht_bank_wr_data_1_0_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][192] <= _T_19449 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19450 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_12 : @[Reg.scala 28:19]
|
|
_T_19450 <= bht_bank_wr_data_1_1_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][193] <= _T_19450 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19451 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_12 : @[Reg.scala 28:19]
|
|
_T_19451 <= bht_bank_wr_data_1_2_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][194] <= _T_19451 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19452 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_12 : @[Reg.scala 28:19]
|
|
_T_19452 <= bht_bank_wr_data_1_3_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][195] <= _T_19452 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19453 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_12 : @[Reg.scala 28:19]
|
|
_T_19453 <= bht_bank_wr_data_1_4_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][196] <= _T_19453 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19454 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_12 : @[Reg.scala 28:19]
|
|
_T_19454 <= bht_bank_wr_data_1_5_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][197] <= _T_19454 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19455 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_12 : @[Reg.scala 28:19]
|
|
_T_19455 <= bht_bank_wr_data_1_6_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][198] <= _T_19455 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19456 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_12 : @[Reg.scala 28:19]
|
|
_T_19456 <= bht_bank_wr_data_1_7_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][199] <= _T_19456 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19457 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_12 : @[Reg.scala 28:19]
|
|
_T_19457 <= bht_bank_wr_data_1_8_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][200] <= _T_19457 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19458 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_12 : @[Reg.scala 28:19]
|
|
_T_19458 <= bht_bank_wr_data_1_9_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][201] <= _T_19458 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19459 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_12 : @[Reg.scala 28:19]
|
|
_T_19459 <= bht_bank_wr_data_1_10_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][202] <= _T_19459 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19460 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_12 : @[Reg.scala 28:19]
|
|
_T_19460 <= bht_bank_wr_data_1_11_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][203] <= _T_19460 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19461 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_12 : @[Reg.scala 28:19]
|
|
_T_19461 <= bht_bank_wr_data_1_12_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][204] <= _T_19461 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19462 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_12 : @[Reg.scala 28:19]
|
|
_T_19462 <= bht_bank_wr_data_1_13_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][205] <= _T_19462 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19463 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_12 : @[Reg.scala 28:19]
|
|
_T_19463 <= bht_bank_wr_data_1_14_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][206] <= _T_19463 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19464 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_12 : @[Reg.scala 28:19]
|
|
_T_19464 <= bht_bank_wr_data_1_15_12 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][207] <= _T_19464 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19465 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_13 : @[Reg.scala 28:19]
|
|
_T_19465 <= bht_bank_wr_data_1_0_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][208] <= _T_19465 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19466 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_13 : @[Reg.scala 28:19]
|
|
_T_19466 <= bht_bank_wr_data_1_1_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][209] <= _T_19466 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19467 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_13 : @[Reg.scala 28:19]
|
|
_T_19467 <= bht_bank_wr_data_1_2_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][210] <= _T_19467 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19468 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_13 : @[Reg.scala 28:19]
|
|
_T_19468 <= bht_bank_wr_data_1_3_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][211] <= _T_19468 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19469 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_13 : @[Reg.scala 28:19]
|
|
_T_19469 <= bht_bank_wr_data_1_4_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][212] <= _T_19469 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19470 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_13 : @[Reg.scala 28:19]
|
|
_T_19470 <= bht_bank_wr_data_1_5_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][213] <= _T_19470 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19471 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_13 : @[Reg.scala 28:19]
|
|
_T_19471 <= bht_bank_wr_data_1_6_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][214] <= _T_19471 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19472 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_13 : @[Reg.scala 28:19]
|
|
_T_19472 <= bht_bank_wr_data_1_7_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][215] <= _T_19472 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19473 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_13 : @[Reg.scala 28:19]
|
|
_T_19473 <= bht_bank_wr_data_1_8_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][216] <= _T_19473 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19474 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_13 : @[Reg.scala 28:19]
|
|
_T_19474 <= bht_bank_wr_data_1_9_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][217] <= _T_19474 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19475 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_13 : @[Reg.scala 28:19]
|
|
_T_19475 <= bht_bank_wr_data_1_10_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][218] <= _T_19475 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19476 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_13 : @[Reg.scala 28:19]
|
|
_T_19476 <= bht_bank_wr_data_1_11_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][219] <= _T_19476 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19477 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_13 : @[Reg.scala 28:19]
|
|
_T_19477 <= bht_bank_wr_data_1_12_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][220] <= _T_19477 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19478 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_13 : @[Reg.scala 28:19]
|
|
_T_19478 <= bht_bank_wr_data_1_13_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][221] <= _T_19478 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19479 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_13 : @[Reg.scala 28:19]
|
|
_T_19479 <= bht_bank_wr_data_1_14_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][222] <= _T_19479 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19480 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_13 : @[Reg.scala 28:19]
|
|
_T_19480 <= bht_bank_wr_data_1_15_13 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][223] <= _T_19480 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19481 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_14 : @[Reg.scala 28:19]
|
|
_T_19481 <= bht_bank_wr_data_1_0_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][224] <= _T_19481 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19482 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_14 : @[Reg.scala 28:19]
|
|
_T_19482 <= bht_bank_wr_data_1_1_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][225] <= _T_19482 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19483 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_14 : @[Reg.scala 28:19]
|
|
_T_19483 <= bht_bank_wr_data_1_2_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][226] <= _T_19483 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19484 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_14 : @[Reg.scala 28:19]
|
|
_T_19484 <= bht_bank_wr_data_1_3_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][227] <= _T_19484 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19485 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_14 : @[Reg.scala 28:19]
|
|
_T_19485 <= bht_bank_wr_data_1_4_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][228] <= _T_19485 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19486 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_14 : @[Reg.scala 28:19]
|
|
_T_19486 <= bht_bank_wr_data_1_5_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][229] <= _T_19486 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19487 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_14 : @[Reg.scala 28:19]
|
|
_T_19487 <= bht_bank_wr_data_1_6_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][230] <= _T_19487 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19488 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_14 : @[Reg.scala 28:19]
|
|
_T_19488 <= bht_bank_wr_data_1_7_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][231] <= _T_19488 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19489 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_14 : @[Reg.scala 28:19]
|
|
_T_19489 <= bht_bank_wr_data_1_8_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][232] <= _T_19489 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19490 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_14 : @[Reg.scala 28:19]
|
|
_T_19490 <= bht_bank_wr_data_1_9_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][233] <= _T_19490 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19491 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_14 : @[Reg.scala 28:19]
|
|
_T_19491 <= bht_bank_wr_data_1_10_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][234] <= _T_19491 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19492 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_14 : @[Reg.scala 28:19]
|
|
_T_19492 <= bht_bank_wr_data_1_11_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][235] <= _T_19492 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19493 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_14 : @[Reg.scala 28:19]
|
|
_T_19493 <= bht_bank_wr_data_1_12_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][236] <= _T_19493 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19494 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_14 : @[Reg.scala 28:19]
|
|
_T_19494 <= bht_bank_wr_data_1_13_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][237] <= _T_19494 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19495 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_14 : @[Reg.scala 28:19]
|
|
_T_19495 <= bht_bank_wr_data_1_14_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][238] <= _T_19495 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19496 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_14 : @[Reg.scala 28:19]
|
|
_T_19496 <= bht_bank_wr_data_1_15_14 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][239] <= _T_19496 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19497 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_0_15 : @[Reg.scala 28:19]
|
|
_T_19497 <= bht_bank_wr_data_1_0_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][240] <= _T_19497 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19498 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_1_15 : @[Reg.scala 28:19]
|
|
_T_19498 <= bht_bank_wr_data_1_1_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][241] <= _T_19498 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19499 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_2_15 : @[Reg.scala 28:19]
|
|
_T_19499 <= bht_bank_wr_data_1_2_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][242] <= _T_19499 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19500 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_3_15 : @[Reg.scala 28:19]
|
|
_T_19500 <= bht_bank_wr_data_1_3_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][243] <= _T_19500 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19501 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_4_15 : @[Reg.scala 28:19]
|
|
_T_19501 <= bht_bank_wr_data_1_4_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][244] <= _T_19501 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19502 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_5_15 : @[Reg.scala 28:19]
|
|
_T_19502 <= bht_bank_wr_data_1_5_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][245] <= _T_19502 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19503 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_6_15 : @[Reg.scala 28:19]
|
|
_T_19503 <= bht_bank_wr_data_1_6_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][246] <= _T_19503 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19504 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_7_15 : @[Reg.scala 28:19]
|
|
_T_19504 <= bht_bank_wr_data_1_7_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][247] <= _T_19504 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19505 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_8_15 : @[Reg.scala 28:19]
|
|
_T_19505 <= bht_bank_wr_data_1_8_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][248] <= _T_19505 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19506 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_9_15 : @[Reg.scala 28:19]
|
|
_T_19506 <= bht_bank_wr_data_1_9_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][249] <= _T_19506 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19507 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_10_15 : @[Reg.scala 28:19]
|
|
_T_19507 <= bht_bank_wr_data_1_10_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][250] <= _T_19507 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19508 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_11_15 : @[Reg.scala 28:19]
|
|
_T_19508 <= bht_bank_wr_data_1_11_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][251] <= _T_19508 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19509 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_12_15 : @[Reg.scala 28:19]
|
|
_T_19509 <= bht_bank_wr_data_1_12_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][252] <= _T_19509 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19510 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_13_15 : @[Reg.scala 28:19]
|
|
_T_19510 <= bht_bank_wr_data_1_13_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][253] <= _T_19510 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19511 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_14_15 : @[Reg.scala 28:19]
|
|
_T_19511 <= bht_bank_wr_data_1_14_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][254] <= _T_19511 @[el2_ifu_bp_ctl.scala 378:39]
|
|
reg _T_19512 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
|
|
when bht_bank_sel_1_15_15 : @[Reg.scala 28:19]
|
|
_T_19512 <= bht_bank_wr_data_1_15_15 @[Reg.scala 28:23]
|
|
skip @[Reg.scala 28:19]
|
|
bht_bank_rd_data_out[1][255] <= _T_19512 @[el2_ifu_bp_ctl.scala 378:39]
|
|
node _T_19513 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19514 = eq(_T_19513, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19515 = bits(_T_19514, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19516 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19517 = eq(_T_19516, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19518 = bits(_T_19517, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19519 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19520 = eq(_T_19519, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19521 = bits(_T_19520, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19522 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19523 = eq(_T_19522, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19524 = bits(_T_19523, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19525 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19526 = eq(_T_19525, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19527 = bits(_T_19526, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19528 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19529 = eq(_T_19528, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19530 = bits(_T_19529, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19531 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19532 = eq(_T_19531, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19533 = bits(_T_19532, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19534 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19535 = eq(_T_19534, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19536 = bits(_T_19535, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19537 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19538 = eq(_T_19537, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19539 = bits(_T_19538, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19540 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19541 = eq(_T_19540, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19542 = bits(_T_19541, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19543 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19544 = eq(_T_19543, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19545 = bits(_T_19544, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19546 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19547 = eq(_T_19546, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19548 = bits(_T_19547, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19549 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19550 = eq(_T_19549, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19551 = bits(_T_19550, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19552 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19553 = eq(_T_19552, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19554 = bits(_T_19553, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19555 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19556 = eq(_T_19555, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19557 = bits(_T_19556, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19558 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19559 = eq(_T_19558, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19560 = bits(_T_19559, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19561 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19562 = eq(_T_19561, UInt<5>("h010")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19563 = bits(_T_19562, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19564 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19565 = eq(_T_19564, UInt<5>("h011")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19566 = bits(_T_19565, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19567 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19568 = eq(_T_19567, UInt<5>("h012")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19569 = bits(_T_19568, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19570 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19571 = eq(_T_19570, UInt<5>("h013")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19572 = bits(_T_19571, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19573 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19574 = eq(_T_19573, UInt<5>("h014")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19575 = bits(_T_19574, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19576 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19577 = eq(_T_19576, UInt<5>("h015")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19578 = bits(_T_19577, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19579 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19580 = eq(_T_19579, UInt<5>("h016")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19581 = bits(_T_19580, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19582 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19583 = eq(_T_19582, UInt<5>("h017")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19584 = bits(_T_19583, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19585 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19586 = eq(_T_19585, UInt<5>("h018")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19587 = bits(_T_19586, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19588 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19589 = eq(_T_19588, UInt<5>("h019")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19590 = bits(_T_19589, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19591 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19592 = eq(_T_19591, UInt<5>("h01a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19593 = bits(_T_19592, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19594 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19595 = eq(_T_19594, UInt<5>("h01b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19596 = bits(_T_19595, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19597 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19598 = eq(_T_19597, UInt<5>("h01c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19599 = bits(_T_19598, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19600 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19601 = eq(_T_19600, UInt<5>("h01d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19602 = bits(_T_19601, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19603 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19604 = eq(_T_19603, UInt<5>("h01e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19605 = bits(_T_19604, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19606 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19607 = eq(_T_19606, UInt<5>("h01f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19608 = bits(_T_19607, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19609 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19610 = eq(_T_19609, UInt<6>("h020")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19611 = bits(_T_19610, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19612 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19613 = eq(_T_19612, UInt<6>("h021")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19614 = bits(_T_19613, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19615 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19616 = eq(_T_19615, UInt<6>("h022")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19617 = bits(_T_19616, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19618 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19619 = eq(_T_19618, UInt<6>("h023")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19620 = bits(_T_19619, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19621 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19622 = eq(_T_19621, UInt<6>("h024")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19623 = bits(_T_19622, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19624 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19625 = eq(_T_19624, UInt<6>("h025")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19626 = bits(_T_19625, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19627 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19628 = eq(_T_19627, UInt<6>("h026")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19629 = bits(_T_19628, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19630 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19631 = eq(_T_19630, UInt<6>("h027")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19632 = bits(_T_19631, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19633 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19634 = eq(_T_19633, UInt<6>("h028")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19635 = bits(_T_19634, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19636 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19637 = eq(_T_19636, UInt<6>("h029")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19638 = bits(_T_19637, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19639 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19640 = eq(_T_19639, UInt<6>("h02a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19641 = bits(_T_19640, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19642 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19643 = eq(_T_19642, UInt<6>("h02b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19644 = bits(_T_19643, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19645 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19646 = eq(_T_19645, UInt<6>("h02c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19647 = bits(_T_19646, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19648 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19649 = eq(_T_19648, UInt<6>("h02d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19650 = bits(_T_19649, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19651 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19652 = eq(_T_19651, UInt<6>("h02e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19653 = bits(_T_19652, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19654 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19655 = eq(_T_19654, UInt<6>("h02f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19656 = bits(_T_19655, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19657 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19658 = eq(_T_19657, UInt<6>("h030")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19659 = bits(_T_19658, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19660 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19661 = eq(_T_19660, UInt<6>("h031")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19662 = bits(_T_19661, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19663 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19664 = eq(_T_19663, UInt<6>("h032")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19665 = bits(_T_19664, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19666 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19667 = eq(_T_19666, UInt<6>("h033")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19668 = bits(_T_19667, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19669 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19670 = eq(_T_19669, UInt<6>("h034")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19671 = bits(_T_19670, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19672 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19673 = eq(_T_19672, UInt<6>("h035")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19674 = bits(_T_19673, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19675 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19676 = eq(_T_19675, UInt<6>("h036")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19677 = bits(_T_19676, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19678 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19679 = eq(_T_19678, UInt<6>("h037")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19680 = bits(_T_19679, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19681 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19682 = eq(_T_19681, UInt<6>("h038")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19683 = bits(_T_19682, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19684 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19685 = eq(_T_19684, UInt<6>("h039")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19686 = bits(_T_19685, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19687 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19688 = eq(_T_19687, UInt<6>("h03a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19689 = bits(_T_19688, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19690 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19691 = eq(_T_19690, UInt<6>("h03b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19692 = bits(_T_19691, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19693 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19694 = eq(_T_19693, UInt<6>("h03c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19695 = bits(_T_19694, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19696 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19697 = eq(_T_19696, UInt<6>("h03d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19698 = bits(_T_19697, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19699 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19700 = eq(_T_19699, UInt<6>("h03e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19701 = bits(_T_19700, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19702 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19703 = eq(_T_19702, UInt<6>("h03f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19704 = bits(_T_19703, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19705 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19706 = eq(_T_19705, UInt<7>("h040")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19707 = bits(_T_19706, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19708 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19709 = eq(_T_19708, UInt<7>("h041")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19710 = bits(_T_19709, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19711 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19712 = eq(_T_19711, UInt<7>("h042")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19713 = bits(_T_19712, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19714 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19715 = eq(_T_19714, UInt<7>("h043")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19716 = bits(_T_19715, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19717 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19718 = eq(_T_19717, UInt<7>("h044")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19719 = bits(_T_19718, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19720 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19721 = eq(_T_19720, UInt<7>("h045")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19722 = bits(_T_19721, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19723 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19724 = eq(_T_19723, UInt<7>("h046")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19725 = bits(_T_19724, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19726 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19727 = eq(_T_19726, UInt<7>("h047")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19728 = bits(_T_19727, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19729 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19730 = eq(_T_19729, UInt<7>("h048")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19731 = bits(_T_19730, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19732 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19733 = eq(_T_19732, UInt<7>("h049")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19734 = bits(_T_19733, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19735 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19736 = eq(_T_19735, UInt<7>("h04a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19737 = bits(_T_19736, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19738 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19739 = eq(_T_19738, UInt<7>("h04b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19740 = bits(_T_19739, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19741 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19742 = eq(_T_19741, UInt<7>("h04c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19743 = bits(_T_19742, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19744 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19745 = eq(_T_19744, UInt<7>("h04d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19746 = bits(_T_19745, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19747 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19748 = eq(_T_19747, UInt<7>("h04e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19749 = bits(_T_19748, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19750 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19751 = eq(_T_19750, UInt<7>("h04f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19752 = bits(_T_19751, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19753 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19754 = eq(_T_19753, UInt<7>("h050")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19755 = bits(_T_19754, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19756 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19757 = eq(_T_19756, UInt<7>("h051")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19758 = bits(_T_19757, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19759 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19760 = eq(_T_19759, UInt<7>("h052")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19761 = bits(_T_19760, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19762 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19763 = eq(_T_19762, UInt<7>("h053")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19764 = bits(_T_19763, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19765 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19766 = eq(_T_19765, UInt<7>("h054")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19767 = bits(_T_19766, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19768 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19769 = eq(_T_19768, UInt<7>("h055")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19770 = bits(_T_19769, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19771 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19772 = eq(_T_19771, UInt<7>("h056")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19773 = bits(_T_19772, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19774 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19775 = eq(_T_19774, UInt<7>("h057")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19776 = bits(_T_19775, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19777 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19778 = eq(_T_19777, UInt<7>("h058")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19779 = bits(_T_19778, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19780 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19781 = eq(_T_19780, UInt<7>("h059")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19782 = bits(_T_19781, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19783 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19784 = eq(_T_19783, UInt<7>("h05a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19785 = bits(_T_19784, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19786 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19787 = eq(_T_19786, UInt<7>("h05b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19788 = bits(_T_19787, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19789 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19790 = eq(_T_19789, UInt<7>("h05c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19791 = bits(_T_19790, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19792 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19793 = eq(_T_19792, UInt<7>("h05d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19794 = bits(_T_19793, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19795 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19796 = eq(_T_19795, UInt<7>("h05e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19797 = bits(_T_19796, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19798 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19799 = eq(_T_19798, UInt<7>("h05f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19800 = bits(_T_19799, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19801 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19802 = eq(_T_19801, UInt<7>("h060")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19803 = bits(_T_19802, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19804 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19805 = eq(_T_19804, UInt<7>("h061")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19806 = bits(_T_19805, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19807 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19808 = eq(_T_19807, UInt<7>("h062")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19809 = bits(_T_19808, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19810 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19811 = eq(_T_19810, UInt<7>("h063")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19812 = bits(_T_19811, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19813 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19814 = eq(_T_19813, UInt<7>("h064")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19815 = bits(_T_19814, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19816 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19817 = eq(_T_19816, UInt<7>("h065")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19818 = bits(_T_19817, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19819 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19820 = eq(_T_19819, UInt<7>("h066")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19821 = bits(_T_19820, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19822 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19823 = eq(_T_19822, UInt<7>("h067")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19824 = bits(_T_19823, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19825 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19826 = eq(_T_19825, UInt<7>("h068")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19827 = bits(_T_19826, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19828 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19829 = eq(_T_19828, UInt<7>("h069")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19830 = bits(_T_19829, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19831 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19832 = eq(_T_19831, UInt<7>("h06a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19833 = bits(_T_19832, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19834 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19835 = eq(_T_19834, UInt<7>("h06b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19836 = bits(_T_19835, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19837 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19838 = eq(_T_19837, UInt<7>("h06c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19839 = bits(_T_19838, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19840 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19841 = eq(_T_19840, UInt<7>("h06d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19842 = bits(_T_19841, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19843 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19844 = eq(_T_19843, UInt<7>("h06e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19845 = bits(_T_19844, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19846 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19847 = eq(_T_19846, UInt<7>("h06f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19848 = bits(_T_19847, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19849 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19850 = eq(_T_19849, UInt<7>("h070")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19851 = bits(_T_19850, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19852 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19853 = eq(_T_19852, UInt<7>("h071")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19854 = bits(_T_19853, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19855 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19856 = eq(_T_19855, UInt<7>("h072")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19857 = bits(_T_19856, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19858 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19859 = eq(_T_19858, UInt<7>("h073")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19860 = bits(_T_19859, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19861 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19862 = eq(_T_19861, UInt<7>("h074")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19863 = bits(_T_19862, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19864 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19865 = eq(_T_19864, UInt<7>("h075")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19866 = bits(_T_19865, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19867 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19868 = eq(_T_19867, UInt<7>("h076")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19869 = bits(_T_19868, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19870 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19871 = eq(_T_19870, UInt<7>("h077")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19872 = bits(_T_19871, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19873 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19874 = eq(_T_19873, UInt<7>("h078")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19875 = bits(_T_19874, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19876 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19877 = eq(_T_19876, UInt<7>("h079")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19878 = bits(_T_19877, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19879 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19880 = eq(_T_19879, UInt<7>("h07a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19881 = bits(_T_19880, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19882 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19883 = eq(_T_19882, UInt<7>("h07b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19884 = bits(_T_19883, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19885 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19886 = eq(_T_19885, UInt<7>("h07c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19887 = bits(_T_19886, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19888 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19889 = eq(_T_19888, UInt<7>("h07d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19890 = bits(_T_19889, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19891 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19892 = eq(_T_19891, UInt<7>("h07e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19893 = bits(_T_19892, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19894 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19895 = eq(_T_19894, UInt<7>("h07f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19896 = bits(_T_19895, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19897 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19898 = eq(_T_19897, UInt<8>("h080")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19899 = bits(_T_19898, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19900 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19901 = eq(_T_19900, UInt<8>("h081")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19902 = bits(_T_19901, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19903 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19904 = eq(_T_19903, UInt<8>("h082")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19905 = bits(_T_19904, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19906 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19907 = eq(_T_19906, UInt<8>("h083")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19908 = bits(_T_19907, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19909 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19910 = eq(_T_19909, UInt<8>("h084")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19911 = bits(_T_19910, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19912 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19913 = eq(_T_19912, UInt<8>("h085")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19914 = bits(_T_19913, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19915 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19916 = eq(_T_19915, UInt<8>("h086")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19917 = bits(_T_19916, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19918 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19919 = eq(_T_19918, UInt<8>("h087")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19920 = bits(_T_19919, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19921 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19922 = eq(_T_19921, UInt<8>("h088")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19923 = bits(_T_19922, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19924 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19925 = eq(_T_19924, UInt<8>("h089")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19926 = bits(_T_19925, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19927 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19928 = eq(_T_19927, UInt<8>("h08a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19929 = bits(_T_19928, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19930 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19931 = eq(_T_19930, UInt<8>("h08b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19932 = bits(_T_19931, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19933 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19934 = eq(_T_19933, UInt<8>("h08c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19935 = bits(_T_19934, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19936 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19937 = eq(_T_19936, UInt<8>("h08d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19938 = bits(_T_19937, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19939 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19940 = eq(_T_19939, UInt<8>("h08e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19941 = bits(_T_19940, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19942 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19943 = eq(_T_19942, UInt<8>("h08f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19944 = bits(_T_19943, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19945 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19946 = eq(_T_19945, UInt<8>("h090")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19947 = bits(_T_19946, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19948 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19949 = eq(_T_19948, UInt<8>("h091")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19950 = bits(_T_19949, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19951 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19952 = eq(_T_19951, UInt<8>("h092")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19953 = bits(_T_19952, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19954 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19955 = eq(_T_19954, UInt<8>("h093")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19956 = bits(_T_19955, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19957 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19958 = eq(_T_19957, UInt<8>("h094")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19959 = bits(_T_19958, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19960 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19961 = eq(_T_19960, UInt<8>("h095")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19962 = bits(_T_19961, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19963 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19964 = eq(_T_19963, UInt<8>("h096")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19965 = bits(_T_19964, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19966 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19967 = eq(_T_19966, UInt<8>("h097")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19968 = bits(_T_19967, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19969 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19970 = eq(_T_19969, UInt<8>("h098")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19971 = bits(_T_19970, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19972 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19973 = eq(_T_19972, UInt<8>("h099")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19974 = bits(_T_19973, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19975 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19976 = eq(_T_19975, UInt<8>("h09a")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19977 = bits(_T_19976, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19978 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19979 = eq(_T_19978, UInt<8>("h09b")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19980 = bits(_T_19979, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19981 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19982 = eq(_T_19981, UInt<8>("h09c")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19983 = bits(_T_19982, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19984 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19985 = eq(_T_19984, UInt<8>("h09d")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19986 = bits(_T_19985, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19987 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19988 = eq(_T_19987, UInt<8>("h09e")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19989 = bits(_T_19988, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19990 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19991 = eq(_T_19990, UInt<8>("h09f")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19992 = bits(_T_19991, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19993 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19994 = eq(_T_19993, UInt<8>("h0a0")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19995 = bits(_T_19994, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19996 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_19997 = eq(_T_19996, UInt<8>("h0a1")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_19998 = bits(_T_19997, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_19999 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20000 = eq(_T_19999, UInt<8>("h0a2")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20001 = bits(_T_20000, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20002 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20003 = eq(_T_20002, UInt<8>("h0a3")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20004 = bits(_T_20003, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20005 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20006 = eq(_T_20005, UInt<8>("h0a4")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20007 = bits(_T_20006, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20008 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20009 = eq(_T_20008, UInt<8>("h0a5")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20010 = bits(_T_20009, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20011 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20012 = eq(_T_20011, UInt<8>("h0a6")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20013 = bits(_T_20012, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20014 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20015 = eq(_T_20014, UInt<8>("h0a7")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20016 = bits(_T_20015, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20017 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20018 = eq(_T_20017, UInt<8>("h0a8")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20019 = bits(_T_20018, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20020 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20021 = eq(_T_20020, UInt<8>("h0a9")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20022 = bits(_T_20021, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20023 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20024 = eq(_T_20023, UInt<8>("h0aa")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20025 = bits(_T_20024, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20026 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20027 = eq(_T_20026, UInt<8>("h0ab")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20028 = bits(_T_20027, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20029 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20030 = eq(_T_20029, UInt<8>("h0ac")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20031 = bits(_T_20030, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20032 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20033 = eq(_T_20032, UInt<8>("h0ad")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20034 = bits(_T_20033, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20035 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20036 = eq(_T_20035, UInt<8>("h0ae")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20037 = bits(_T_20036, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20038 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20039 = eq(_T_20038, UInt<8>("h0af")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20040 = bits(_T_20039, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20041 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20042 = eq(_T_20041, UInt<8>("h0b0")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20043 = bits(_T_20042, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20044 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20045 = eq(_T_20044, UInt<8>("h0b1")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20046 = bits(_T_20045, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20047 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20048 = eq(_T_20047, UInt<8>("h0b2")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20049 = bits(_T_20048, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20050 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20051 = eq(_T_20050, UInt<8>("h0b3")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20052 = bits(_T_20051, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20053 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20054 = eq(_T_20053, UInt<8>("h0b4")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20055 = bits(_T_20054, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20056 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20057 = eq(_T_20056, UInt<8>("h0b5")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20058 = bits(_T_20057, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20059 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20060 = eq(_T_20059, UInt<8>("h0b6")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20061 = bits(_T_20060, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20062 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20063 = eq(_T_20062, UInt<8>("h0b7")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20064 = bits(_T_20063, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20065 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20066 = eq(_T_20065, UInt<8>("h0b8")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20067 = bits(_T_20066, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20068 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20069 = eq(_T_20068, UInt<8>("h0b9")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20070 = bits(_T_20069, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20071 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20072 = eq(_T_20071, UInt<8>("h0ba")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20073 = bits(_T_20072, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20074 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20075 = eq(_T_20074, UInt<8>("h0bb")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20076 = bits(_T_20075, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20077 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20078 = eq(_T_20077, UInt<8>("h0bc")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20079 = bits(_T_20078, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20080 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20081 = eq(_T_20080, UInt<8>("h0bd")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20082 = bits(_T_20081, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20083 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20084 = eq(_T_20083, UInt<8>("h0be")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20085 = bits(_T_20084, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20086 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20087 = eq(_T_20086, UInt<8>("h0bf")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20088 = bits(_T_20087, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20089 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20090 = eq(_T_20089, UInt<8>("h0c0")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20091 = bits(_T_20090, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20092 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20093 = eq(_T_20092, UInt<8>("h0c1")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20094 = bits(_T_20093, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20095 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20096 = eq(_T_20095, UInt<8>("h0c2")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20097 = bits(_T_20096, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20098 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20099 = eq(_T_20098, UInt<8>("h0c3")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20100 = bits(_T_20099, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20101 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20102 = eq(_T_20101, UInt<8>("h0c4")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20103 = bits(_T_20102, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20104 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20105 = eq(_T_20104, UInt<8>("h0c5")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20106 = bits(_T_20105, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20107 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20108 = eq(_T_20107, UInt<8>("h0c6")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20109 = bits(_T_20108, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20110 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20111 = eq(_T_20110, UInt<8>("h0c7")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20112 = bits(_T_20111, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20113 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20114 = eq(_T_20113, UInt<8>("h0c8")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20115 = bits(_T_20114, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20116 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20117 = eq(_T_20116, UInt<8>("h0c9")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20118 = bits(_T_20117, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20119 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20120 = eq(_T_20119, UInt<8>("h0ca")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20121 = bits(_T_20120, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20122 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20123 = eq(_T_20122, UInt<8>("h0cb")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20124 = bits(_T_20123, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20125 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20126 = eq(_T_20125, UInt<8>("h0cc")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20127 = bits(_T_20126, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20128 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20129 = eq(_T_20128, UInt<8>("h0cd")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20130 = bits(_T_20129, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20131 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20132 = eq(_T_20131, UInt<8>("h0ce")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20133 = bits(_T_20132, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20134 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20135 = eq(_T_20134, UInt<8>("h0cf")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20136 = bits(_T_20135, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20137 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20138 = eq(_T_20137, UInt<8>("h0d0")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20139 = bits(_T_20138, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20140 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20141 = eq(_T_20140, UInt<8>("h0d1")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20142 = bits(_T_20141, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20143 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20144 = eq(_T_20143, UInt<8>("h0d2")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20145 = bits(_T_20144, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20146 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20147 = eq(_T_20146, UInt<8>("h0d3")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20148 = bits(_T_20147, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20149 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20150 = eq(_T_20149, UInt<8>("h0d4")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20151 = bits(_T_20150, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20152 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20153 = eq(_T_20152, UInt<8>("h0d5")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20154 = bits(_T_20153, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20155 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20156 = eq(_T_20155, UInt<8>("h0d6")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20157 = bits(_T_20156, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20158 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20159 = eq(_T_20158, UInt<8>("h0d7")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20160 = bits(_T_20159, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20161 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20162 = eq(_T_20161, UInt<8>("h0d8")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20163 = bits(_T_20162, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20164 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20165 = eq(_T_20164, UInt<8>("h0d9")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20166 = bits(_T_20165, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20167 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20168 = eq(_T_20167, UInt<8>("h0da")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20169 = bits(_T_20168, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20170 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20171 = eq(_T_20170, UInt<8>("h0db")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20172 = bits(_T_20171, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20173 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20174 = eq(_T_20173, UInt<8>("h0dc")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20175 = bits(_T_20174, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20176 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20177 = eq(_T_20176, UInt<8>("h0dd")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20178 = bits(_T_20177, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20179 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20180 = eq(_T_20179, UInt<8>("h0de")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20181 = bits(_T_20180, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20182 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20183 = eq(_T_20182, UInt<8>("h0df")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20184 = bits(_T_20183, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20185 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20186 = eq(_T_20185, UInt<8>("h0e0")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20187 = bits(_T_20186, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20188 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20189 = eq(_T_20188, UInt<8>("h0e1")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20190 = bits(_T_20189, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20191 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20192 = eq(_T_20191, UInt<8>("h0e2")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20193 = bits(_T_20192, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20194 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20195 = eq(_T_20194, UInt<8>("h0e3")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20196 = bits(_T_20195, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20197 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20198 = eq(_T_20197, UInt<8>("h0e4")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20199 = bits(_T_20198, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20200 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20201 = eq(_T_20200, UInt<8>("h0e5")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20202 = bits(_T_20201, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20203 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20204 = eq(_T_20203, UInt<8>("h0e6")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20205 = bits(_T_20204, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20206 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20207 = eq(_T_20206, UInt<8>("h0e7")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20208 = bits(_T_20207, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20209 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20210 = eq(_T_20209, UInt<8>("h0e8")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20211 = bits(_T_20210, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20212 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20213 = eq(_T_20212, UInt<8>("h0e9")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20214 = bits(_T_20213, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20215 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20216 = eq(_T_20215, UInt<8>("h0ea")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20217 = bits(_T_20216, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20218 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20219 = eq(_T_20218, UInt<8>("h0eb")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20220 = bits(_T_20219, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20221 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20222 = eq(_T_20221, UInt<8>("h0ec")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20223 = bits(_T_20222, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20224 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20225 = eq(_T_20224, UInt<8>("h0ed")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20226 = bits(_T_20225, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20227 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20228 = eq(_T_20227, UInt<8>("h0ee")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20229 = bits(_T_20228, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20230 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20231 = eq(_T_20230, UInt<8>("h0ef")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20232 = bits(_T_20231, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20233 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20234 = eq(_T_20233, UInt<8>("h0f0")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20235 = bits(_T_20234, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20236 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20237 = eq(_T_20236, UInt<8>("h0f1")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20238 = bits(_T_20237, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20239 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20240 = eq(_T_20239, UInt<8>("h0f2")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20241 = bits(_T_20240, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20242 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20243 = eq(_T_20242, UInt<8>("h0f3")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20244 = bits(_T_20243, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20245 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20246 = eq(_T_20245, UInt<8>("h0f4")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20247 = bits(_T_20246, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20248 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20249 = eq(_T_20248, UInt<8>("h0f5")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20250 = bits(_T_20249, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20251 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20252 = eq(_T_20251, UInt<8>("h0f6")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20253 = bits(_T_20252, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20254 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20255 = eq(_T_20254, UInt<8>("h0f7")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20256 = bits(_T_20255, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20257 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20258 = eq(_T_20257, UInt<8>("h0f8")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20259 = bits(_T_20258, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20260 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20261 = eq(_T_20260, UInt<8>("h0f9")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20262 = bits(_T_20261, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20263 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20264 = eq(_T_20263, UInt<8>("h0fa")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20265 = bits(_T_20264, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20266 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20267 = eq(_T_20266, UInt<8>("h0fb")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20268 = bits(_T_20267, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20269 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20270 = eq(_T_20269, UInt<8>("h0fc")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20271 = bits(_T_20270, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20272 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20273 = eq(_T_20272, UInt<8>("h0fd")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20274 = bits(_T_20273, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20275 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20276 = eq(_T_20275, UInt<8>("h0fe")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20277 = bits(_T_20276, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20278 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 381:79]
|
|
node _T_20279 = eq(_T_20278, UInt<8>("h0ff")) @[el2_ifu_bp_ctl.scala 381:106]
|
|
node _T_20280 = bits(_T_20279, 0, 0) @[el2_ifu_bp_ctl.scala 381:114]
|
|
node _T_20281 = mux(_T_19515, bht_bank_rd_data_out[0][0], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20282 = mux(_T_19518, bht_bank_rd_data_out[0][1], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20283 = mux(_T_19521, bht_bank_rd_data_out[0][2], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20284 = mux(_T_19524, bht_bank_rd_data_out[0][3], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20285 = mux(_T_19527, bht_bank_rd_data_out[0][4], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20286 = mux(_T_19530, bht_bank_rd_data_out[0][5], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20287 = mux(_T_19533, bht_bank_rd_data_out[0][6], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20288 = mux(_T_19536, bht_bank_rd_data_out[0][7], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20289 = mux(_T_19539, bht_bank_rd_data_out[0][8], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20290 = mux(_T_19542, bht_bank_rd_data_out[0][9], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20291 = mux(_T_19545, bht_bank_rd_data_out[0][10], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20292 = mux(_T_19548, bht_bank_rd_data_out[0][11], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20293 = mux(_T_19551, bht_bank_rd_data_out[0][12], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20294 = mux(_T_19554, bht_bank_rd_data_out[0][13], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20295 = mux(_T_19557, bht_bank_rd_data_out[0][14], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20296 = mux(_T_19560, bht_bank_rd_data_out[0][15], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20297 = mux(_T_19563, bht_bank_rd_data_out[0][16], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20298 = mux(_T_19566, bht_bank_rd_data_out[0][17], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20299 = mux(_T_19569, bht_bank_rd_data_out[0][18], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20300 = mux(_T_19572, bht_bank_rd_data_out[0][19], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20301 = mux(_T_19575, bht_bank_rd_data_out[0][20], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20302 = mux(_T_19578, bht_bank_rd_data_out[0][21], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20303 = mux(_T_19581, bht_bank_rd_data_out[0][22], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20304 = mux(_T_19584, bht_bank_rd_data_out[0][23], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20305 = mux(_T_19587, bht_bank_rd_data_out[0][24], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20306 = mux(_T_19590, bht_bank_rd_data_out[0][25], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20307 = mux(_T_19593, bht_bank_rd_data_out[0][26], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20308 = mux(_T_19596, bht_bank_rd_data_out[0][27], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20309 = mux(_T_19599, bht_bank_rd_data_out[0][28], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20310 = mux(_T_19602, bht_bank_rd_data_out[0][29], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20311 = mux(_T_19605, bht_bank_rd_data_out[0][30], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20312 = mux(_T_19608, bht_bank_rd_data_out[0][31], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20313 = mux(_T_19611, bht_bank_rd_data_out[0][32], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20314 = mux(_T_19614, bht_bank_rd_data_out[0][33], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20315 = mux(_T_19617, bht_bank_rd_data_out[0][34], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20316 = mux(_T_19620, bht_bank_rd_data_out[0][35], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20317 = mux(_T_19623, bht_bank_rd_data_out[0][36], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20318 = mux(_T_19626, bht_bank_rd_data_out[0][37], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20319 = mux(_T_19629, bht_bank_rd_data_out[0][38], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20320 = mux(_T_19632, bht_bank_rd_data_out[0][39], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20321 = mux(_T_19635, bht_bank_rd_data_out[0][40], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20322 = mux(_T_19638, bht_bank_rd_data_out[0][41], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20323 = mux(_T_19641, bht_bank_rd_data_out[0][42], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20324 = mux(_T_19644, bht_bank_rd_data_out[0][43], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20325 = mux(_T_19647, bht_bank_rd_data_out[0][44], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20326 = mux(_T_19650, bht_bank_rd_data_out[0][45], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20327 = mux(_T_19653, bht_bank_rd_data_out[0][46], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20328 = mux(_T_19656, bht_bank_rd_data_out[0][47], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20329 = mux(_T_19659, bht_bank_rd_data_out[0][48], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20330 = mux(_T_19662, bht_bank_rd_data_out[0][49], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20331 = mux(_T_19665, bht_bank_rd_data_out[0][50], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20332 = mux(_T_19668, bht_bank_rd_data_out[0][51], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20333 = mux(_T_19671, bht_bank_rd_data_out[0][52], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20334 = mux(_T_19674, bht_bank_rd_data_out[0][53], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20335 = mux(_T_19677, bht_bank_rd_data_out[0][54], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20336 = mux(_T_19680, bht_bank_rd_data_out[0][55], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20337 = mux(_T_19683, bht_bank_rd_data_out[0][56], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20338 = mux(_T_19686, bht_bank_rd_data_out[0][57], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20339 = mux(_T_19689, bht_bank_rd_data_out[0][58], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20340 = mux(_T_19692, bht_bank_rd_data_out[0][59], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20341 = mux(_T_19695, bht_bank_rd_data_out[0][60], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20342 = mux(_T_19698, bht_bank_rd_data_out[0][61], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20343 = mux(_T_19701, bht_bank_rd_data_out[0][62], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20344 = mux(_T_19704, bht_bank_rd_data_out[0][63], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20345 = mux(_T_19707, bht_bank_rd_data_out[0][64], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20346 = mux(_T_19710, bht_bank_rd_data_out[0][65], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20347 = mux(_T_19713, bht_bank_rd_data_out[0][66], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20348 = mux(_T_19716, bht_bank_rd_data_out[0][67], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20349 = mux(_T_19719, bht_bank_rd_data_out[0][68], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20350 = mux(_T_19722, bht_bank_rd_data_out[0][69], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20351 = mux(_T_19725, bht_bank_rd_data_out[0][70], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20352 = mux(_T_19728, bht_bank_rd_data_out[0][71], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20353 = mux(_T_19731, bht_bank_rd_data_out[0][72], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20354 = mux(_T_19734, bht_bank_rd_data_out[0][73], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20355 = mux(_T_19737, bht_bank_rd_data_out[0][74], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20356 = mux(_T_19740, bht_bank_rd_data_out[0][75], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20357 = mux(_T_19743, bht_bank_rd_data_out[0][76], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20358 = mux(_T_19746, bht_bank_rd_data_out[0][77], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20359 = mux(_T_19749, bht_bank_rd_data_out[0][78], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20360 = mux(_T_19752, bht_bank_rd_data_out[0][79], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20361 = mux(_T_19755, bht_bank_rd_data_out[0][80], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20362 = mux(_T_19758, bht_bank_rd_data_out[0][81], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20363 = mux(_T_19761, bht_bank_rd_data_out[0][82], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20364 = mux(_T_19764, bht_bank_rd_data_out[0][83], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20365 = mux(_T_19767, bht_bank_rd_data_out[0][84], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20366 = mux(_T_19770, bht_bank_rd_data_out[0][85], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20367 = mux(_T_19773, bht_bank_rd_data_out[0][86], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20368 = mux(_T_19776, bht_bank_rd_data_out[0][87], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20369 = mux(_T_19779, bht_bank_rd_data_out[0][88], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20370 = mux(_T_19782, bht_bank_rd_data_out[0][89], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20371 = mux(_T_19785, bht_bank_rd_data_out[0][90], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20372 = mux(_T_19788, bht_bank_rd_data_out[0][91], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20373 = mux(_T_19791, bht_bank_rd_data_out[0][92], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20374 = mux(_T_19794, bht_bank_rd_data_out[0][93], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20375 = mux(_T_19797, bht_bank_rd_data_out[0][94], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20376 = mux(_T_19800, bht_bank_rd_data_out[0][95], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20377 = mux(_T_19803, bht_bank_rd_data_out[0][96], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20378 = mux(_T_19806, bht_bank_rd_data_out[0][97], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20379 = mux(_T_19809, bht_bank_rd_data_out[0][98], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20380 = mux(_T_19812, bht_bank_rd_data_out[0][99], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20381 = mux(_T_19815, bht_bank_rd_data_out[0][100], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20382 = mux(_T_19818, bht_bank_rd_data_out[0][101], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20383 = mux(_T_19821, bht_bank_rd_data_out[0][102], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20384 = mux(_T_19824, bht_bank_rd_data_out[0][103], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20385 = mux(_T_19827, bht_bank_rd_data_out[0][104], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20386 = mux(_T_19830, bht_bank_rd_data_out[0][105], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20387 = mux(_T_19833, bht_bank_rd_data_out[0][106], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20388 = mux(_T_19836, bht_bank_rd_data_out[0][107], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20389 = mux(_T_19839, bht_bank_rd_data_out[0][108], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20390 = mux(_T_19842, bht_bank_rd_data_out[0][109], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20391 = mux(_T_19845, bht_bank_rd_data_out[0][110], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20392 = mux(_T_19848, bht_bank_rd_data_out[0][111], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20393 = mux(_T_19851, bht_bank_rd_data_out[0][112], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20394 = mux(_T_19854, bht_bank_rd_data_out[0][113], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20395 = mux(_T_19857, bht_bank_rd_data_out[0][114], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20396 = mux(_T_19860, bht_bank_rd_data_out[0][115], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20397 = mux(_T_19863, bht_bank_rd_data_out[0][116], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20398 = mux(_T_19866, bht_bank_rd_data_out[0][117], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20399 = mux(_T_19869, bht_bank_rd_data_out[0][118], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20400 = mux(_T_19872, bht_bank_rd_data_out[0][119], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20401 = mux(_T_19875, bht_bank_rd_data_out[0][120], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20402 = mux(_T_19878, bht_bank_rd_data_out[0][121], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20403 = mux(_T_19881, bht_bank_rd_data_out[0][122], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20404 = mux(_T_19884, bht_bank_rd_data_out[0][123], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20405 = mux(_T_19887, bht_bank_rd_data_out[0][124], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20406 = mux(_T_19890, bht_bank_rd_data_out[0][125], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20407 = mux(_T_19893, bht_bank_rd_data_out[0][126], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20408 = mux(_T_19896, bht_bank_rd_data_out[0][127], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20409 = mux(_T_19899, bht_bank_rd_data_out[0][128], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20410 = mux(_T_19902, bht_bank_rd_data_out[0][129], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20411 = mux(_T_19905, bht_bank_rd_data_out[0][130], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20412 = mux(_T_19908, bht_bank_rd_data_out[0][131], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20413 = mux(_T_19911, bht_bank_rd_data_out[0][132], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20414 = mux(_T_19914, bht_bank_rd_data_out[0][133], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20415 = mux(_T_19917, bht_bank_rd_data_out[0][134], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20416 = mux(_T_19920, bht_bank_rd_data_out[0][135], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20417 = mux(_T_19923, bht_bank_rd_data_out[0][136], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20418 = mux(_T_19926, bht_bank_rd_data_out[0][137], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20419 = mux(_T_19929, bht_bank_rd_data_out[0][138], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20420 = mux(_T_19932, bht_bank_rd_data_out[0][139], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20421 = mux(_T_19935, bht_bank_rd_data_out[0][140], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20422 = mux(_T_19938, bht_bank_rd_data_out[0][141], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20423 = mux(_T_19941, bht_bank_rd_data_out[0][142], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20424 = mux(_T_19944, bht_bank_rd_data_out[0][143], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20425 = mux(_T_19947, bht_bank_rd_data_out[0][144], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20426 = mux(_T_19950, bht_bank_rd_data_out[0][145], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20427 = mux(_T_19953, bht_bank_rd_data_out[0][146], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20428 = mux(_T_19956, bht_bank_rd_data_out[0][147], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20429 = mux(_T_19959, bht_bank_rd_data_out[0][148], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20430 = mux(_T_19962, bht_bank_rd_data_out[0][149], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20431 = mux(_T_19965, bht_bank_rd_data_out[0][150], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20432 = mux(_T_19968, bht_bank_rd_data_out[0][151], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20433 = mux(_T_19971, bht_bank_rd_data_out[0][152], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20434 = mux(_T_19974, bht_bank_rd_data_out[0][153], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20435 = mux(_T_19977, bht_bank_rd_data_out[0][154], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20436 = mux(_T_19980, bht_bank_rd_data_out[0][155], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20437 = mux(_T_19983, bht_bank_rd_data_out[0][156], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20438 = mux(_T_19986, bht_bank_rd_data_out[0][157], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20439 = mux(_T_19989, bht_bank_rd_data_out[0][158], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20440 = mux(_T_19992, bht_bank_rd_data_out[0][159], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20441 = mux(_T_19995, bht_bank_rd_data_out[0][160], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20442 = mux(_T_19998, bht_bank_rd_data_out[0][161], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20443 = mux(_T_20001, bht_bank_rd_data_out[0][162], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20444 = mux(_T_20004, bht_bank_rd_data_out[0][163], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20445 = mux(_T_20007, bht_bank_rd_data_out[0][164], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20446 = mux(_T_20010, bht_bank_rd_data_out[0][165], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20447 = mux(_T_20013, bht_bank_rd_data_out[0][166], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20448 = mux(_T_20016, bht_bank_rd_data_out[0][167], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20449 = mux(_T_20019, bht_bank_rd_data_out[0][168], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20450 = mux(_T_20022, bht_bank_rd_data_out[0][169], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20451 = mux(_T_20025, bht_bank_rd_data_out[0][170], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20452 = mux(_T_20028, bht_bank_rd_data_out[0][171], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20453 = mux(_T_20031, bht_bank_rd_data_out[0][172], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20454 = mux(_T_20034, bht_bank_rd_data_out[0][173], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20455 = mux(_T_20037, bht_bank_rd_data_out[0][174], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20456 = mux(_T_20040, bht_bank_rd_data_out[0][175], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20457 = mux(_T_20043, bht_bank_rd_data_out[0][176], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20458 = mux(_T_20046, bht_bank_rd_data_out[0][177], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20459 = mux(_T_20049, bht_bank_rd_data_out[0][178], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20460 = mux(_T_20052, bht_bank_rd_data_out[0][179], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20461 = mux(_T_20055, bht_bank_rd_data_out[0][180], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20462 = mux(_T_20058, bht_bank_rd_data_out[0][181], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20463 = mux(_T_20061, bht_bank_rd_data_out[0][182], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20464 = mux(_T_20064, bht_bank_rd_data_out[0][183], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20465 = mux(_T_20067, bht_bank_rd_data_out[0][184], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20466 = mux(_T_20070, bht_bank_rd_data_out[0][185], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20467 = mux(_T_20073, bht_bank_rd_data_out[0][186], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20468 = mux(_T_20076, bht_bank_rd_data_out[0][187], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20469 = mux(_T_20079, bht_bank_rd_data_out[0][188], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20470 = mux(_T_20082, bht_bank_rd_data_out[0][189], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20471 = mux(_T_20085, bht_bank_rd_data_out[0][190], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20472 = mux(_T_20088, bht_bank_rd_data_out[0][191], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20473 = mux(_T_20091, bht_bank_rd_data_out[0][192], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20474 = mux(_T_20094, bht_bank_rd_data_out[0][193], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20475 = mux(_T_20097, bht_bank_rd_data_out[0][194], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20476 = mux(_T_20100, bht_bank_rd_data_out[0][195], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20477 = mux(_T_20103, bht_bank_rd_data_out[0][196], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20478 = mux(_T_20106, bht_bank_rd_data_out[0][197], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20479 = mux(_T_20109, bht_bank_rd_data_out[0][198], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20480 = mux(_T_20112, bht_bank_rd_data_out[0][199], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20481 = mux(_T_20115, bht_bank_rd_data_out[0][200], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20482 = mux(_T_20118, bht_bank_rd_data_out[0][201], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20483 = mux(_T_20121, bht_bank_rd_data_out[0][202], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20484 = mux(_T_20124, bht_bank_rd_data_out[0][203], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20485 = mux(_T_20127, bht_bank_rd_data_out[0][204], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20486 = mux(_T_20130, bht_bank_rd_data_out[0][205], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20487 = mux(_T_20133, bht_bank_rd_data_out[0][206], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20488 = mux(_T_20136, bht_bank_rd_data_out[0][207], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20489 = mux(_T_20139, bht_bank_rd_data_out[0][208], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20490 = mux(_T_20142, bht_bank_rd_data_out[0][209], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20491 = mux(_T_20145, bht_bank_rd_data_out[0][210], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20492 = mux(_T_20148, bht_bank_rd_data_out[0][211], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20493 = mux(_T_20151, bht_bank_rd_data_out[0][212], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20494 = mux(_T_20154, bht_bank_rd_data_out[0][213], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20495 = mux(_T_20157, bht_bank_rd_data_out[0][214], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20496 = mux(_T_20160, bht_bank_rd_data_out[0][215], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20497 = mux(_T_20163, bht_bank_rd_data_out[0][216], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20498 = mux(_T_20166, bht_bank_rd_data_out[0][217], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20499 = mux(_T_20169, bht_bank_rd_data_out[0][218], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20500 = mux(_T_20172, bht_bank_rd_data_out[0][219], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20501 = mux(_T_20175, bht_bank_rd_data_out[0][220], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20502 = mux(_T_20178, bht_bank_rd_data_out[0][221], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20503 = mux(_T_20181, bht_bank_rd_data_out[0][222], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20504 = mux(_T_20184, bht_bank_rd_data_out[0][223], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20505 = mux(_T_20187, bht_bank_rd_data_out[0][224], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20506 = mux(_T_20190, bht_bank_rd_data_out[0][225], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20507 = mux(_T_20193, bht_bank_rd_data_out[0][226], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20508 = mux(_T_20196, bht_bank_rd_data_out[0][227], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20509 = mux(_T_20199, bht_bank_rd_data_out[0][228], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20510 = mux(_T_20202, bht_bank_rd_data_out[0][229], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20511 = mux(_T_20205, bht_bank_rd_data_out[0][230], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20512 = mux(_T_20208, bht_bank_rd_data_out[0][231], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20513 = mux(_T_20211, bht_bank_rd_data_out[0][232], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20514 = mux(_T_20214, bht_bank_rd_data_out[0][233], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20515 = mux(_T_20217, bht_bank_rd_data_out[0][234], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20516 = mux(_T_20220, bht_bank_rd_data_out[0][235], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20517 = mux(_T_20223, bht_bank_rd_data_out[0][236], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20518 = mux(_T_20226, bht_bank_rd_data_out[0][237], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20519 = mux(_T_20229, bht_bank_rd_data_out[0][238], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20520 = mux(_T_20232, bht_bank_rd_data_out[0][239], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20521 = mux(_T_20235, bht_bank_rd_data_out[0][240], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20522 = mux(_T_20238, bht_bank_rd_data_out[0][241], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20523 = mux(_T_20241, bht_bank_rd_data_out[0][242], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20524 = mux(_T_20244, bht_bank_rd_data_out[0][243], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20525 = mux(_T_20247, bht_bank_rd_data_out[0][244], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20526 = mux(_T_20250, bht_bank_rd_data_out[0][245], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20527 = mux(_T_20253, bht_bank_rd_data_out[0][246], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20528 = mux(_T_20256, bht_bank_rd_data_out[0][247], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20529 = mux(_T_20259, bht_bank_rd_data_out[0][248], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20530 = mux(_T_20262, bht_bank_rd_data_out[0][249], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20531 = mux(_T_20265, bht_bank_rd_data_out[0][250], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20532 = mux(_T_20268, bht_bank_rd_data_out[0][251], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20533 = mux(_T_20271, bht_bank_rd_data_out[0][252], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20534 = mux(_T_20274, bht_bank_rd_data_out[0][253], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20535 = mux(_T_20277, bht_bank_rd_data_out[0][254], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20536 = mux(_T_20280, bht_bank_rd_data_out[0][255], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_20537 = or(_T_20281, _T_20282) @[Mux.scala 27:72]
|
|
node _T_20538 = or(_T_20537, _T_20283) @[Mux.scala 27:72]
|
|
node _T_20539 = or(_T_20538, _T_20284) @[Mux.scala 27:72]
|
|
node _T_20540 = or(_T_20539, _T_20285) @[Mux.scala 27:72]
|
|
node _T_20541 = or(_T_20540, _T_20286) @[Mux.scala 27:72]
|
|
node _T_20542 = or(_T_20541, _T_20287) @[Mux.scala 27:72]
|
|
node _T_20543 = or(_T_20542, _T_20288) @[Mux.scala 27:72]
|
|
node _T_20544 = or(_T_20543, _T_20289) @[Mux.scala 27:72]
|
|
node _T_20545 = or(_T_20544, _T_20290) @[Mux.scala 27:72]
|
|
node _T_20546 = or(_T_20545, _T_20291) @[Mux.scala 27:72]
|
|
node _T_20547 = or(_T_20546, _T_20292) @[Mux.scala 27:72]
|
|
node _T_20548 = or(_T_20547, _T_20293) @[Mux.scala 27:72]
|
|
node _T_20549 = or(_T_20548, _T_20294) @[Mux.scala 27:72]
|
|
node _T_20550 = or(_T_20549, _T_20295) @[Mux.scala 27:72]
|
|
node _T_20551 = or(_T_20550, _T_20296) @[Mux.scala 27:72]
|
|
node _T_20552 = or(_T_20551, _T_20297) @[Mux.scala 27:72]
|
|
node _T_20553 = or(_T_20552, _T_20298) @[Mux.scala 27:72]
|
|
node _T_20554 = or(_T_20553, _T_20299) @[Mux.scala 27:72]
|
|
node _T_20555 = or(_T_20554, _T_20300) @[Mux.scala 27:72]
|
|
node _T_20556 = or(_T_20555, _T_20301) @[Mux.scala 27:72]
|
|
node _T_20557 = or(_T_20556, _T_20302) @[Mux.scala 27:72]
|
|
node _T_20558 = or(_T_20557, _T_20303) @[Mux.scala 27:72]
|
|
node _T_20559 = or(_T_20558, _T_20304) @[Mux.scala 27:72]
|
|
node _T_20560 = or(_T_20559, _T_20305) @[Mux.scala 27:72]
|
|
node _T_20561 = or(_T_20560, _T_20306) @[Mux.scala 27:72]
|
|
node _T_20562 = or(_T_20561, _T_20307) @[Mux.scala 27:72]
|
|
node _T_20563 = or(_T_20562, _T_20308) @[Mux.scala 27:72]
|
|
node _T_20564 = or(_T_20563, _T_20309) @[Mux.scala 27:72]
|
|
node _T_20565 = or(_T_20564, _T_20310) @[Mux.scala 27:72]
|
|
node _T_20566 = or(_T_20565, _T_20311) @[Mux.scala 27:72]
|
|
node _T_20567 = or(_T_20566, _T_20312) @[Mux.scala 27:72]
|
|
node _T_20568 = or(_T_20567, _T_20313) @[Mux.scala 27:72]
|
|
node _T_20569 = or(_T_20568, _T_20314) @[Mux.scala 27:72]
|
|
node _T_20570 = or(_T_20569, _T_20315) @[Mux.scala 27:72]
|
|
node _T_20571 = or(_T_20570, _T_20316) @[Mux.scala 27:72]
|
|
node _T_20572 = or(_T_20571, _T_20317) @[Mux.scala 27:72]
|
|
node _T_20573 = or(_T_20572, _T_20318) @[Mux.scala 27:72]
|
|
node _T_20574 = or(_T_20573, _T_20319) @[Mux.scala 27:72]
|
|
node _T_20575 = or(_T_20574, _T_20320) @[Mux.scala 27:72]
|
|
node _T_20576 = or(_T_20575, _T_20321) @[Mux.scala 27:72]
|
|
node _T_20577 = or(_T_20576, _T_20322) @[Mux.scala 27:72]
|
|
node _T_20578 = or(_T_20577, _T_20323) @[Mux.scala 27:72]
|
|
node _T_20579 = or(_T_20578, _T_20324) @[Mux.scala 27:72]
|
|
node _T_20580 = or(_T_20579, _T_20325) @[Mux.scala 27:72]
|
|
node _T_20581 = or(_T_20580, _T_20326) @[Mux.scala 27:72]
|
|
node _T_20582 = or(_T_20581, _T_20327) @[Mux.scala 27:72]
|
|
node _T_20583 = or(_T_20582, _T_20328) @[Mux.scala 27:72]
|
|
node _T_20584 = or(_T_20583, _T_20329) @[Mux.scala 27:72]
|
|
node _T_20585 = or(_T_20584, _T_20330) @[Mux.scala 27:72]
|
|
node _T_20586 = or(_T_20585, _T_20331) @[Mux.scala 27:72]
|
|
node _T_20587 = or(_T_20586, _T_20332) @[Mux.scala 27:72]
|
|
node _T_20588 = or(_T_20587, _T_20333) @[Mux.scala 27:72]
|
|
node _T_20589 = or(_T_20588, _T_20334) @[Mux.scala 27:72]
|
|
node _T_20590 = or(_T_20589, _T_20335) @[Mux.scala 27:72]
|
|
node _T_20591 = or(_T_20590, _T_20336) @[Mux.scala 27:72]
|
|
node _T_20592 = or(_T_20591, _T_20337) @[Mux.scala 27:72]
|
|
node _T_20593 = or(_T_20592, _T_20338) @[Mux.scala 27:72]
|
|
node _T_20594 = or(_T_20593, _T_20339) @[Mux.scala 27:72]
|
|
node _T_20595 = or(_T_20594, _T_20340) @[Mux.scala 27:72]
|
|
node _T_20596 = or(_T_20595, _T_20341) @[Mux.scala 27:72]
|
|
node _T_20597 = or(_T_20596, _T_20342) @[Mux.scala 27:72]
|
|
node _T_20598 = or(_T_20597, _T_20343) @[Mux.scala 27:72]
|
|
node _T_20599 = or(_T_20598, _T_20344) @[Mux.scala 27:72]
|
|
node _T_20600 = or(_T_20599, _T_20345) @[Mux.scala 27:72]
|
|
node _T_20601 = or(_T_20600, _T_20346) @[Mux.scala 27:72]
|
|
node _T_20602 = or(_T_20601, _T_20347) @[Mux.scala 27:72]
|
|
node _T_20603 = or(_T_20602, _T_20348) @[Mux.scala 27:72]
|
|
node _T_20604 = or(_T_20603, _T_20349) @[Mux.scala 27:72]
|
|
node _T_20605 = or(_T_20604, _T_20350) @[Mux.scala 27:72]
|
|
node _T_20606 = or(_T_20605, _T_20351) @[Mux.scala 27:72]
|
|
node _T_20607 = or(_T_20606, _T_20352) @[Mux.scala 27:72]
|
|
node _T_20608 = or(_T_20607, _T_20353) @[Mux.scala 27:72]
|
|
node _T_20609 = or(_T_20608, _T_20354) @[Mux.scala 27:72]
|
|
node _T_20610 = or(_T_20609, _T_20355) @[Mux.scala 27:72]
|
|
node _T_20611 = or(_T_20610, _T_20356) @[Mux.scala 27:72]
|
|
node _T_20612 = or(_T_20611, _T_20357) @[Mux.scala 27:72]
|
|
node _T_20613 = or(_T_20612, _T_20358) @[Mux.scala 27:72]
|
|
node _T_20614 = or(_T_20613, _T_20359) @[Mux.scala 27:72]
|
|
node _T_20615 = or(_T_20614, _T_20360) @[Mux.scala 27:72]
|
|
node _T_20616 = or(_T_20615, _T_20361) @[Mux.scala 27:72]
|
|
node _T_20617 = or(_T_20616, _T_20362) @[Mux.scala 27:72]
|
|
node _T_20618 = or(_T_20617, _T_20363) @[Mux.scala 27:72]
|
|
node _T_20619 = or(_T_20618, _T_20364) @[Mux.scala 27:72]
|
|
node _T_20620 = or(_T_20619, _T_20365) @[Mux.scala 27:72]
|
|
node _T_20621 = or(_T_20620, _T_20366) @[Mux.scala 27:72]
|
|
node _T_20622 = or(_T_20621, _T_20367) @[Mux.scala 27:72]
|
|
node _T_20623 = or(_T_20622, _T_20368) @[Mux.scala 27:72]
|
|
node _T_20624 = or(_T_20623, _T_20369) @[Mux.scala 27:72]
|
|
node _T_20625 = or(_T_20624, _T_20370) @[Mux.scala 27:72]
|
|
node _T_20626 = or(_T_20625, _T_20371) @[Mux.scala 27:72]
|
|
node _T_20627 = or(_T_20626, _T_20372) @[Mux.scala 27:72]
|
|
node _T_20628 = or(_T_20627, _T_20373) @[Mux.scala 27:72]
|
|
node _T_20629 = or(_T_20628, _T_20374) @[Mux.scala 27:72]
|
|
node _T_20630 = or(_T_20629, _T_20375) @[Mux.scala 27:72]
|
|
node _T_20631 = or(_T_20630, _T_20376) @[Mux.scala 27:72]
|
|
node _T_20632 = or(_T_20631, _T_20377) @[Mux.scala 27:72]
|
|
node _T_20633 = or(_T_20632, _T_20378) @[Mux.scala 27:72]
|
|
node _T_20634 = or(_T_20633, _T_20379) @[Mux.scala 27:72]
|
|
node _T_20635 = or(_T_20634, _T_20380) @[Mux.scala 27:72]
|
|
node _T_20636 = or(_T_20635, _T_20381) @[Mux.scala 27:72]
|
|
node _T_20637 = or(_T_20636, _T_20382) @[Mux.scala 27:72]
|
|
node _T_20638 = or(_T_20637, _T_20383) @[Mux.scala 27:72]
|
|
node _T_20639 = or(_T_20638, _T_20384) @[Mux.scala 27:72]
|
|
node _T_20640 = or(_T_20639, _T_20385) @[Mux.scala 27:72]
|
|
node _T_20641 = or(_T_20640, _T_20386) @[Mux.scala 27:72]
|
|
node _T_20642 = or(_T_20641, _T_20387) @[Mux.scala 27:72]
|
|
node _T_20643 = or(_T_20642, _T_20388) @[Mux.scala 27:72]
|
|
node _T_20644 = or(_T_20643, _T_20389) @[Mux.scala 27:72]
|
|
node _T_20645 = or(_T_20644, _T_20390) @[Mux.scala 27:72]
|
|
node _T_20646 = or(_T_20645, _T_20391) @[Mux.scala 27:72]
|
|
node _T_20647 = or(_T_20646, _T_20392) @[Mux.scala 27:72]
|
|
node _T_20648 = or(_T_20647, _T_20393) @[Mux.scala 27:72]
|
|
node _T_20649 = or(_T_20648, _T_20394) @[Mux.scala 27:72]
|
|
node _T_20650 = or(_T_20649, _T_20395) @[Mux.scala 27:72]
|
|
node _T_20651 = or(_T_20650, _T_20396) @[Mux.scala 27:72]
|
|
node _T_20652 = or(_T_20651, _T_20397) @[Mux.scala 27:72]
|
|
node _T_20653 = or(_T_20652, _T_20398) @[Mux.scala 27:72]
|
|
node _T_20654 = or(_T_20653, _T_20399) @[Mux.scala 27:72]
|
|
node _T_20655 = or(_T_20654, _T_20400) @[Mux.scala 27:72]
|
|
node _T_20656 = or(_T_20655, _T_20401) @[Mux.scala 27:72]
|
|
node _T_20657 = or(_T_20656, _T_20402) @[Mux.scala 27:72]
|
|
node _T_20658 = or(_T_20657, _T_20403) @[Mux.scala 27:72]
|
|
node _T_20659 = or(_T_20658, _T_20404) @[Mux.scala 27:72]
|
|
node _T_20660 = or(_T_20659, _T_20405) @[Mux.scala 27:72]
|
|
node _T_20661 = or(_T_20660, _T_20406) @[Mux.scala 27:72]
|
|
node _T_20662 = or(_T_20661, _T_20407) @[Mux.scala 27:72]
|
|
node _T_20663 = or(_T_20662, _T_20408) @[Mux.scala 27:72]
|
|
node _T_20664 = or(_T_20663, _T_20409) @[Mux.scala 27:72]
|
|
node _T_20665 = or(_T_20664, _T_20410) @[Mux.scala 27:72]
|
|
node _T_20666 = or(_T_20665, _T_20411) @[Mux.scala 27:72]
|
|
node _T_20667 = or(_T_20666, _T_20412) @[Mux.scala 27:72]
|
|
node _T_20668 = or(_T_20667, _T_20413) @[Mux.scala 27:72]
|
|
node _T_20669 = or(_T_20668, _T_20414) @[Mux.scala 27:72]
|
|
node _T_20670 = or(_T_20669, _T_20415) @[Mux.scala 27:72]
|
|
node _T_20671 = or(_T_20670, _T_20416) @[Mux.scala 27:72]
|
|
node _T_20672 = or(_T_20671, _T_20417) @[Mux.scala 27:72]
|
|
node _T_20673 = or(_T_20672, _T_20418) @[Mux.scala 27:72]
|
|
node _T_20674 = or(_T_20673, _T_20419) @[Mux.scala 27:72]
|
|
node _T_20675 = or(_T_20674, _T_20420) @[Mux.scala 27:72]
|
|
node _T_20676 = or(_T_20675, _T_20421) @[Mux.scala 27:72]
|
|
node _T_20677 = or(_T_20676, _T_20422) @[Mux.scala 27:72]
|
|
node _T_20678 = or(_T_20677, _T_20423) @[Mux.scala 27:72]
|
|
node _T_20679 = or(_T_20678, _T_20424) @[Mux.scala 27:72]
|
|
node _T_20680 = or(_T_20679, _T_20425) @[Mux.scala 27:72]
|
|
node _T_20681 = or(_T_20680, _T_20426) @[Mux.scala 27:72]
|
|
node _T_20682 = or(_T_20681, _T_20427) @[Mux.scala 27:72]
|
|
node _T_20683 = or(_T_20682, _T_20428) @[Mux.scala 27:72]
|
|
node _T_20684 = or(_T_20683, _T_20429) @[Mux.scala 27:72]
|
|
node _T_20685 = or(_T_20684, _T_20430) @[Mux.scala 27:72]
|
|
node _T_20686 = or(_T_20685, _T_20431) @[Mux.scala 27:72]
|
|
node _T_20687 = or(_T_20686, _T_20432) @[Mux.scala 27:72]
|
|
node _T_20688 = or(_T_20687, _T_20433) @[Mux.scala 27:72]
|
|
node _T_20689 = or(_T_20688, _T_20434) @[Mux.scala 27:72]
|
|
node _T_20690 = or(_T_20689, _T_20435) @[Mux.scala 27:72]
|
|
node _T_20691 = or(_T_20690, _T_20436) @[Mux.scala 27:72]
|
|
node _T_20692 = or(_T_20691, _T_20437) @[Mux.scala 27:72]
|
|
node _T_20693 = or(_T_20692, _T_20438) @[Mux.scala 27:72]
|
|
node _T_20694 = or(_T_20693, _T_20439) @[Mux.scala 27:72]
|
|
node _T_20695 = or(_T_20694, _T_20440) @[Mux.scala 27:72]
|
|
node _T_20696 = or(_T_20695, _T_20441) @[Mux.scala 27:72]
|
|
node _T_20697 = or(_T_20696, _T_20442) @[Mux.scala 27:72]
|
|
node _T_20698 = or(_T_20697, _T_20443) @[Mux.scala 27:72]
|
|
node _T_20699 = or(_T_20698, _T_20444) @[Mux.scala 27:72]
|
|
node _T_20700 = or(_T_20699, _T_20445) @[Mux.scala 27:72]
|
|
node _T_20701 = or(_T_20700, _T_20446) @[Mux.scala 27:72]
|
|
node _T_20702 = or(_T_20701, _T_20447) @[Mux.scala 27:72]
|
|
node _T_20703 = or(_T_20702, _T_20448) @[Mux.scala 27:72]
|
|
node _T_20704 = or(_T_20703, _T_20449) @[Mux.scala 27:72]
|
|
node _T_20705 = or(_T_20704, _T_20450) @[Mux.scala 27:72]
|
|
node _T_20706 = or(_T_20705, _T_20451) @[Mux.scala 27:72]
|
|
node _T_20707 = or(_T_20706, _T_20452) @[Mux.scala 27:72]
|
|
node _T_20708 = or(_T_20707, _T_20453) @[Mux.scala 27:72]
|
|
node _T_20709 = or(_T_20708, _T_20454) @[Mux.scala 27:72]
|
|
node _T_20710 = or(_T_20709, _T_20455) @[Mux.scala 27:72]
|
|
node _T_20711 = or(_T_20710, _T_20456) @[Mux.scala 27:72]
|
|
node _T_20712 = or(_T_20711, _T_20457) @[Mux.scala 27:72]
|
|
node _T_20713 = or(_T_20712, _T_20458) @[Mux.scala 27:72]
|
|
node _T_20714 = or(_T_20713, _T_20459) @[Mux.scala 27:72]
|
|
node _T_20715 = or(_T_20714, _T_20460) @[Mux.scala 27:72]
|
|
node _T_20716 = or(_T_20715, _T_20461) @[Mux.scala 27:72]
|
|
node _T_20717 = or(_T_20716, _T_20462) @[Mux.scala 27:72]
|
|
node _T_20718 = or(_T_20717, _T_20463) @[Mux.scala 27:72]
|
|
node _T_20719 = or(_T_20718, _T_20464) @[Mux.scala 27:72]
|
|
node _T_20720 = or(_T_20719, _T_20465) @[Mux.scala 27:72]
|
|
node _T_20721 = or(_T_20720, _T_20466) @[Mux.scala 27:72]
|
|
node _T_20722 = or(_T_20721, _T_20467) @[Mux.scala 27:72]
|
|
node _T_20723 = or(_T_20722, _T_20468) @[Mux.scala 27:72]
|
|
node _T_20724 = or(_T_20723, _T_20469) @[Mux.scala 27:72]
|
|
node _T_20725 = or(_T_20724, _T_20470) @[Mux.scala 27:72]
|
|
node _T_20726 = or(_T_20725, _T_20471) @[Mux.scala 27:72]
|
|
node _T_20727 = or(_T_20726, _T_20472) @[Mux.scala 27:72]
|
|
node _T_20728 = or(_T_20727, _T_20473) @[Mux.scala 27:72]
|
|
node _T_20729 = or(_T_20728, _T_20474) @[Mux.scala 27:72]
|
|
node _T_20730 = or(_T_20729, _T_20475) @[Mux.scala 27:72]
|
|
node _T_20731 = or(_T_20730, _T_20476) @[Mux.scala 27:72]
|
|
node _T_20732 = or(_T_20731, _T_20477) @[Mux.scala 27:72]
|
|
node _T_20733 = or(_T_20732, _T_20478) @[Mux.scala 27:72]
|
|
node _T_20734 = or(_T_20733, _T_20479) @[Mux.scala 27:72]
|
|
node _T_20735 = or(_T_20734, _T_20480) @[Mux.scala 27:72]
|
|
node _T_20736 = or(_T_20735, _T_20481) @[Mux.scala 27:72]
|
|
node _T_20737 = or(_T_20736, _T_20482) @[Mux.scala 27:72]
|
|
node _T_20738 = or(_T_20737, _T_20483) @[Mux.scala 27:72]
|
|
node _T_20739 = or(_T_20738, _T_20484) @[Mux.scala 27:72]
|
|
node _T_20740 = or(_T_20739, _T_20485) @[Mux.scala 27:72]
|
|
node _T_20741 = or(_T_20740, _T_20486) @[Mux.scala 27:72]
|
|
node _T_20742 = or(_T_20741, _T_20487) @[Mux.scala 27:72]
|
|
node _T_20743 = or(_T_20742, _T_20488) @[Mux.scala 27:72]
|
|
node _T_20744 = or(_T_20743, _T_20489) @[Mux.scala 27:72]
|
|
node _T_20745 = or(_T_20744, _T_20490) @[Mux.scala 27:72]
|
|
node _T_20746 = or(_T_20745, _T_20491) @[Mux.scala 27:72]
|
|
node _T_20747 = or(_T_20746, _T_20492) @[Mux.scala 27:72]
|
|
node _T_20748 = or(_T_20747, _T_20493) @[Mux.scala 27:72]
|
|
node _T_20749 = or(_T_20748, _T_20494) @[Mux.scala 27:72]
|
|
node _T_20750 = or(_T_20749, _T_20495) @[Mux.scala 27:72]
|
|
node _T_20751 = or(_T_20750, _T_20496) @[Mux.scala 27:72]
|
|
node _T_20752 = or(_T_20751, _T_20497) @[Mux.scala 27:72]
|
|
node _T_20753 = or(_T_20752, _T_20498) @[Mux.scala 27:72]
|
|
node _T_20754 = or(_T_20753, _T_20499) @[Mux.scala 27:72]
|
|
node _T_20755 = or(_T_20754, _T_20500) @[Mux.scala 27:72]
|
|
node _T_20756 = or(_T_20755, _T_20501) @[Mux.scala 27:72]
|
|
node _T_20757 = or(_T_20756, _T_20502) @[Mux.scala 27:72]
|
|
node _T_20758 = or(_T_20757, _T_20503) @[Mux.scala 27:72]
|
|
node _T_20759 = or(_T_20758, _T_20504) @[Mux.scala 27:72]
|
|
node _T_20760 = or(_T_20759, _T_20505) @[Mux.scala 27:72]
|
|
node _T_20761 = or(_T_20760, _T_20506) @[Mux.scala 27:72]
|
|
node _T_20762 = or(_T_20761, _T_20507) @[Mux.scala 27:72]
|
|
node _T_20763 = or(_T_20762, _T_20508) @[Mux.scala 27:72]
|
|
node _T_20764 = or(_T_20763, _T_20509) @[Mux.scala 27:72]
|
|
node _T_20765 = or(_T_20764, _T_20510) @[Mux.scala 27:72]
|
|
node _T_20766 = or(_T_20765, _T_20511) @[Mux.scala 27:72]
|
|
node _T_20767 = or(_T_20766, _T_20512) @[Mux.scala 27:72]
|
|
node _T_20768 = or(_T_20767, _T_20513) @[Mux.scala 27:72]
|
|
node _T_20769 = or(_T_20768, _T_20514) @[Mux.scala 27:72]
|
|
node _T_20770 = or(_T_20769, _T_20515) @[Mux.scala 27:72]
|
|
node _T_20771 = or(_T_20770, _T_20516) @[Mux.scala 27:72]
|
|
node _T_20772 = or(_T_20771, _T_20517) @[Mux.scala 27:72]
|
|
node _T_20773 = or(_T_20772, _T_20518) @[Mux.scala 27:72]
|
|
node _T_20774 = or(_T_20773, _T_20519) @[Mux.scala 27:72]
|
|
node _T_20775 = or(_T_20774, _T_20520) @[Mux.scala 27:72]
|
|
node _T_20776 = or(_T_20775, _T_20521) @[Mux.scala 27:72]
|
|
node _T_20777 = or(_T_20776, _T_20522) @[Mux.scala 27:72]
|
|
node _T_20778 = or(_T_20777, _T_20523) @[Mux.scala 27:72]
|
|
node _T_20779 = or(_T_20778, _T_20524) @[Mux.scala 27:72]
|
|
node _T_20780 = or(_T_20779, _T_20525) @[Mux.scala 27:72]
|
|
node _T_20781 = or(_T_20780, _T_20526) @[Mux.scala 27:72]
|
|
node _T_20782 = or(_T_20781, _T_20527) @[Mux.scala 27:72]
|
|
node _T_20783 = or(_T_20782, _T_20528) @[Mux.scala 27:72]
|
|
node _T_20784 = or(_T_20783, _T_20529) @[Mux.scala 27:72]
|
|
node _T_20785 = or(_T_20784, _T_20530) @[Mux.scala 27:72]
|
|
node _T_20786 = or(_T_20785, _T_20531) @[Mux.scala 27:72]
|
|
node _T_20787 = or(_T_20786, _T_20532) @[Mux.scala 27:72]
|
|
node _T_20788 = or(_T_20787, _T_20533) @[Mux.scala 27:72]
|
|
node _T_20789 = or(_T_20788, _T_20534) @[Mux.scala 27:72]
|
|
node _T_20790 = or(_T_20789, _T_20535) @[Mux.scala 27:72]
|
|
node _T_20791 = or(_T_20790, _T_20536) @[Mux.scala 27:72]
|
|
wire _T_20792 : UInt<2> @[Mux.scala 27:72]
|
|
_T_20792 <= _T_20791 @[Mux.scala 27:72]
|
|
bht_bank0_rd_data_f <= _T_20792 @[el2_ifu_bp_ctl.scala 381:23]
|
|
node _T_20793 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20794 = eq(_T_20793, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20795 = bits(_T_20794, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20796 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20797 = eq(_T_20796, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20798 = bits(_T_20797, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20799 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20800 = eq(_T_20799, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20801 = bits(_T_20800, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20802 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20803 = eq(_T_20802, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20804 = bits(_T_20803, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20805 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20806 = eq(_T_20805, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20807 = bits(_T_20806, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20808 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20809 = eq(_T_20808, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20810 = bits(_T_20809, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20811 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20812 = eq(_T_20811, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20813 = bits(_T_20812, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20814 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20815 = eq(_T_20814, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20816 = bits(_T_20815, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20817 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20818 = eq(_T_20817, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20819 = bits(_T_20818, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20820 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20821 = eq(_T_20820, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20822 = bits(_T_20821, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20823 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20824 = eq(_T_20823, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20825 = bits(_T_20824, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20826 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20827 = eq(_T_20826, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20828 = bits(_T_20827, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20829 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20830 = eq(_T_20829, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20831 = bits(_T_20830, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20832 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20833 = eq(_T_20832, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20834 = bits(_T_20833, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20835 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20836 = eq(_T_20835, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20837 = bits(_T_20836, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20838 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20839 = eq(_T_20838, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20840 = bits(_T_20839, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20841 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20842 = eq(_T_20841, UInt<5>("h010")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20843 = bits(_T_20842, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20844 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20845 = eq(_T_20844, UInt<5>("h011")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20846 = bits(_T_20845, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20847 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20848 = eq(_T_20847, UInt<5>("h012")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20849 = bits(_T_20848, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20850 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20851 = eq(_T_20850, UInt<5>("h013")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20852 = bits(_T_20851, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20853 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20854 = eq(_T_20853, UInt<5>("h014")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20855 = bits(_T_20854, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20856 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20857 = eq(_T_20856, UInt<5>("h015")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20858 = bits(_T_20857, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20859 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20860 = eq(_T_20859, UInt<5>("h016")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20861 = bits(_T_20860, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20862 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20863 = eq(_T_20862, UInt<5>("h017")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20864 = bits(_T_20863, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20865 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20866 = eq(_T_20865, UInt<5>("h018")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20867 = bits(_T_20866, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20868 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20869 = eq(_T_20868, UInt<5>("h019")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20870 = bits(_T_20869, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20871 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20872 = eq(_T_20871, UInt<5>("h01a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20873 = bits(_T_20872, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20874 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20875 = eq(_T_20874, UInt<5>("h01b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20876 = bits(_T_20875, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20877 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20878 = eq(_T_20877, UInt<5>("h01c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20879 = bits(_T_20878, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20880 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20881 = eq(_T_20880, UInt<5>("h01d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20882 = bits(_T_20881, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20883 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20884 = eq(_T_20883, UInt<5>("h01e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20885 = bits(_T_20884, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20886 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20887 = eq(_T_20886, UInt<5>("h01f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20888 = bits(_T_20887, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20889 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20890 = eq(_T_20889, UInt<6>("h020")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20891 = bits(_T_20890, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20892 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20893 = eq(_T_20892, UInt<6>("h021")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20894 = bits(_T_20893, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20895 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20896 = eq(_T_20895, UInt<6>("h022")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20897 = bits(_T_20896, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20898 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20899 = eq(_T_20898, UInt<6>("h023")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20900 = bits(_T_20899, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20901 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20902 = eq(_T_20901, UInt<6>("h024")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20903 = bits(_T_20902, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20904 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20905 = eq(_T_20904, UInt<6>("h025")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20906 = bits(_T_20905, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20907 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20908 = eq(_T_20907, UInt<6>("h026")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20909 = bits(_T_20908, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20910 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20911 = eq(_T_20910, UInt<6>("h027")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20912 = bits(_T_20911, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20913 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20914 = eq(_T_20913, UInt<6>("h028")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20915 = bits(_T_20914, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20916 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20917 = eq(_T_20916, UInt<6>("h029")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20918 = bits(_T_20917, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20919 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20920 = eq(_T_20919, UInt<6>("h02a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20921 = bits(_T_20920, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20922 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20923 = eq(_T_20922, UInt<6>("h02b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20924 = bits(_T_20923, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20925 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20926 = eq(_T_20925, UInt<6>("h02c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20927 = bits(_T_20926, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20928 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20929 = eq(_T_20928, UInt<6>("h02d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20930 = bits(_T_20929, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20931 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20932 = eq(_T_20931, UInt<6>("h02e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20933 = bits(_T_20932, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20934 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20935 = eq(_T_20934, UInt<6>("h02f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20936 = bits(_T_20935, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20937 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20938 = eq(_T_20937, UInt<6>("h030")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20939 = bits(_T_20938, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20940 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20941 = eq(_T_20940, UInt<6>("h031")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20942 = bits(_T_20941, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20943 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20944 = eq(_T_20943, UInt<6>("h032")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20945 = bits(_T_20944, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20946 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20947 = eq(_T_20946, UInt<6>("h033")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20948 = bits(_T_20947, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20949 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20950 = eq(_T_20949, UInt<6>("h034")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20951 = bits(_T_20950, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20952 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20953 = eq(_T_20952, UInt<6>("h035")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20954 = bits(_T_20953, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20955 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20956 = eq(_T_20955, UInt<6>("h036")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20957 = bits(_T_20956, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20958 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20959 = eq(_T_20958, UInt<6>("h037")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20960 = bits(_T_20959, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20961 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20962 = eq(_T_20961, UInt<6>("h038")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20963 = bits(_T_20962, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20964 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20965 = eq(_T_20964, UInt<6>("h039")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20966 = bits(_T_20965, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20967 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20968 = eq(_T_20967, UInt<6>("h03a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20969 = bits(_T_20968, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20970 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20971 = eq(_T_20970, UInt<6>("h03b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20972 = bits(_T_20971, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20973 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20974 = eq(_T_20973, UInt<6>("h03c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20975 = bits(_T_20974, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20976 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20977 = eq(_T_20976, UInt<6>("h03d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20978 = bits(_T_20977, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20979 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20980 = eq(_T_20979, UInt<6>("h03e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20981 = bits(_T_20980, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20982 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20983 = eq(_T_20982, UInt<6>("h03f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20984 = bits(_T_20983, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20985 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20986 = eq(_T_20985, UInt<7>("h040")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20987 = bits(_T_20986, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20988 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20989 = eq(_T_20988, UInt<7>("h041")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20990 = bits(_T_20989, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20991 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20992 = eq(_T_20991, UInt<7>("h042")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20993 = bits(_T_20992, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20994 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20995 = eq(_T_20994, UInt<7>("h043")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20996 = bits(_T_20995, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_20997 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_20998 = eq(_T_20997, UInt<7>("h044")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_20999 = bits(_T_20998, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21000 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21001 = eq(_T_21000, UInt<7>("h045")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21002 = bits(_T_21001, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21003 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21004 = eq(_T_21003, UInt<7>("h046")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21005 = bits(_T_21004, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21006 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21007 = eq(_T_21006, UInt<7>("h047")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21008 = bits(_T_21007, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21009 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21010 = eq(_T_21009, UInt<7>("h048")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21011 = bits(_T_21010, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21012 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21013 = eq(_T_21012, UInt<7>("h049")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21014 = bits(_T_21013, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21015 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21016 = eq(_T_21015, UInt<7>("h04a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21017 = bits(_T_21016, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21018 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21019 = eq(_T_21018, UInt<7>("h04b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21020 = bits(_T_21019, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21021 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21022 = eq(_T_21021, UInt<7>("h04c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21023 = bits(_T_21022, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21024 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21025 = eq(_T_21024, UInt<7>("h04d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21026 = bits(_T_21025, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21027 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21028 = eq(_T_21027, UInt<7>("h04e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21029 = bits(_T_21028, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21030 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21031 = eq(_T_21030, UInt<7>("h04f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21032 = bits(_T_21031, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21033 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21034 = eq(_T_21033, UInt<7>("h050")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21035 = bits(_T_21034, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21036 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21037 = eq(_T_21036, UInt<7>("h051")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21038 = bits(_T_21037, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21039 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21040 = eq(_T_21039, UInt<7>("h052")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21041 = bits(_T_21040, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21042 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21043 = eq(_T_21042, UInt<7>("h053")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21044 = bits(_T_21043, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21045 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21046 = eq(_T_21045, UInt<7>("h054")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21047 = bits(_T_21046, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21048 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21049 = eq(_T_21048, UInt<7>("h055")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21050 = bits(_T_21049, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21051 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21052 = eq(_T_21051, UInt<7>("h056")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21053 = bits(_T_21052, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21054 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21055 = eq(_T_21054, UInt<7>("h057")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21056 = bits(_T_21055, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21057 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21058 = eq(_T_21057, UInt<7>("h058")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21059 = bits(_T_21058, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21060 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21061 = eq(_T_21060, UInt<7>("h059")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21062 = bits(_T_21061, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21063 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21064 = eq(_T_21063, UInt<7>("h05a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21065 = bits(_T_21064, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21066 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21067 = eq(_T_21066, UInt<7>("h05b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21068 = bits(_T_21067, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21069 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21070 = eq(_T_21069, UInt<7>("h05c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21071 = bits(_T_21070, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21072 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21073 = eq(_T_21072, UInt<7>("h05d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21074 = bits(_T_21073, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21075 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21076 = eq(_T_21075, UInt<7>("h05e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21077 = bits(_T_21076, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21078 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21079 = eq(_T_21078, UInt<7>("h05f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21080 = bits(_T_21079, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21081 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21082 = eq(_T_21081, UInt<7>("h060")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21083 = bits(_T_21082, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21084 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21085 = eq(_T_21084, UInt<7>("h061")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21086 = bits(_T_21085, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21087 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21088 = eq(_T_21087, UInt<7>("h062")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21089 = bits(_T_21088, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21090 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21091 = eq(_T_21090, UInt<7>("h063")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21092 = bits(_T_21091, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21093 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21094 = eq(_T_21093, UInt<7>("h064")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21095 = bits(_T_21094, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21096 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21097 = eq(_T_21096, UInt<7>("h065")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21098 = bits(_T_21097, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21099 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21100 = eq(_T_21099, UInt<7>("h066")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21101 = bits(_T_21100, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21102 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21103 = eq(_T_21102, UInt<7>("h067")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21104 = bits(_T_21103, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21105 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21106 = eq(_T_21105, UInt<7>("h068")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21107 = bits(_T_21106, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21108 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21109 = eq(_T_21108, UInt<7>("h069")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21110 = bits(_T_21109, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21111 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21112 = eq(_T_21111, UInt<7>("h06a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21113 = bits(_T_21112, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21114 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21115 = eq(_T_21114, UInt<7>("h06b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21116 = bits(_T_21115, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21117 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21118 = eq(_T_21117, UInt<7>("h06c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21119 = bits(_T_21118, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21120 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21121 = eq(_T_21120, UInt<7>("h06d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21122 = bits(_T_21121, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21123 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21124 = eq(_T_21123, UInt<7>("h06e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21125 = bits(_T_21124, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21126 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21127 = eq(_T_21126, UInt<7>("h06f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21128 = bits(_T_21127, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21129 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21130 = eq(_T_21129, UInt<7>("h070")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21131 = bits(_T_21130, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21132 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21133 = eq(_T_21132, UInt<7>("h071")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21134 = bits(_T_21133, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21135 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21136 = eq(_T_21135, UInt<7>("h072")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21137 = bits(_T_21136, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21138 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21139 = eq(_T_21138, UInt<7>("h073")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21140 = bits(_T_21139, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21141 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21142 = eq(_T_21141, UInt<7>("h074")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21143 = bits(_T_21142, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21144 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21145 = eq(_T_21144, UInt<7>("h075")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21146 = bits(_T_21145, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21147 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21148 = eq(_T_21147, UInt<7>("h076")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21149 = bits(_T_21148, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21150 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21151 = eq(_T_21150, UInt<7>("h077")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21152 = bits(_T_21151, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21153 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21154 = eq(_T_21153, UInt<7>("h078")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21155 = bits(_T_21154, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21156 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21157 = eq(_T_21156, UInt<7>("h079")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21158 = bits(_T_21157, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21159 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21160 = eq(_T_21159, UInt<7>("h07a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21161 = bits(_T_21160, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21162 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21163 = eq(_T_21162, UInt<7>("h07b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21164 = bits(_T_21163, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21165 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21166 = eq(_T_21165, UInt<7>("h07c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21167 = bits(_T_21166, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21168 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21169 = eq(_T_21168, UInt<7>("h07d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21170 = bits(_T_21169, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21171 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21172 = eq(_T_21171, UInt<7>("h07e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21173 = bits(_T_21172, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21174 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21175 = eq(_T_21174, UInt<7>("h07f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21176 = bits(_T_21175, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21177 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21178 = eq(_T_21177, UInt<8>("h080")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21179 = bits(_T_21178, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21180 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21181 = eq(_T_21180, UInt<8>("h081")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21182 = bits(_T_21181, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21183 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21184 = eq(_T_21183, UInt<8>("h082")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21185 = bits(_T_21184, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21186 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
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node _T_21187 = eq(_T_21186, UInt<8>("h083")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21188 = bits(_T_21187, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21189 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
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node _T_21190 = eq(_T_21189, UInt<8>("h084")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21191 = bits(_T_21190, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21192 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
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node _T_21193 = eq(_T_21192, UInt<8>("h085")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21194 = bits(_T_21193, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21195 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
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node _T_21196 = eq(_T_21195, UInt<8>("h086")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21197 = bits(_T_21196, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21198 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
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node _T_21199 = eq(_T_21198, UInt<8>("h087")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21200 = bits(_T_21199, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21201 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21202 = eq(_T_21201, UInt<8>("h088")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21203 = bits(_T_21202, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21204 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21205 = eq(_T_21204, UInt<8>("h089")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21206 = bits(_T_21205, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21207 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21208 = eq(_T_21207, UInt<8>("h08a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21209 = bits(_T_21208, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21210 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21211 = eq(_T_21210, UInt<8>("h08b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21212 = bits(_T_21211, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21213 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21214 = eq(_T_21213, UInt<8>("h08c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21215 = bits(_T_21214, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21216 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21217 = eq(_T_21216, UInt<8>("h08d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21218 = bits(_T_21217, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21219 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21220 = eq(_T_21219, UInt<8>("h08e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21221 = bits(_T_21220, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21222 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21223 = eq(_T_21222, UInt<8>("h08f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21224 = bits(_T_21223, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21225 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21226 = eq(_T_21225, UInt<8>("h090")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21227 = bits(_T_21226, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21228 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21229 = eq(_T_21228, UInt<8>("h091")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21230 = bits(_T_21229, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21231 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21232 = eq(_T_21231, UInt<8>("h092")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21233 = bits(_T_21232, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21234 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21235 = eq(_T_21234, UInt<8>("h093")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21236 = bits(_T_21235, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21237 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21238 = eq(_T_21237, UInt<8>("h094")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21239 = bits(_T_21238, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21240 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21241 = eq(_T_21240, UInt<8>("h095")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21242 = bits(_T_21241, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21243 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21244 = eq(_T_21243, UInt<8>("h096")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21245 = bits(_T_21244, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21246 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21247 = eq(_T_21246, UInt<8>("h097")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21248 = bits(_T_21247, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21249 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21250 = eq(_T_21249, UInt<8>("h098")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21251 = bits(_T_21250, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21252 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21253 = eq(_T_21252, UInt<8>("h099")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21254 = bits(_T_21253, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21255 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21256 = eq(_T_21255, UInt<8>("h09a")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21257 = bits(_T_21256, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21258 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21259 = eq(_T_21258, UInt<8>("h09b")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21260 = bits(_T_21259, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21261 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21262 = eq(_T_21261, UInt<8>("h09c")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21263 = bits(_T_21262, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21264 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21265 = eq(_T_21264, UInt<8>("h09d")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21266 = bits(_T_21265, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21267 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21268 = eq(_T_21267, UInt<8>("h09e")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21269 = bits(_T_21268, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21270 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21271 = eq(_T_21270, UInt<8>("h09f")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21272 = bits(_T_21271, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21273 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21274 = eq(_T_21273, UInt<8>("h0a0")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21275 = bits(_T_21274, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21276 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21277 = eq(_T_21276, UInt<8>("h0a1")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21278 = bits(_T_21277, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21279 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21280 = eq(_T_21279, UInt<8>("h0a2")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21281 = bits(_T_21280, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21282 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21283 = eq(_T_21282, UInt<8>("h0a3")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21284 = bits(_T_21283, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21285 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21286 = eq(_T_21285, UInt<8>("h0a4")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21287 = bits(_T_21286, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21288 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21289 = eq(_T_21288, UInt<8>("h0a5")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21290 = bits(_T_21289, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21291 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21292 = eq(_T_21291, UInt<8>("h0a6")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21293 = bits(_T_21292, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21294 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21295 = eq(_T_21294, UInt<8>("h0a7")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21296 = bits(_T_21295, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21297 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21298 = eq(_T_21297, UInt<8>("h0a8")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21299 = bits(_T_21298, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21300 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21301 = eq(_T_21300, UInt<8>("h0a9")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21302 = bits(_T_21301, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21303 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21304 = eq(_T_21303, UInt<8>("h0aa")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21305 = bits(_T_21304, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21306 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21307 = eq(_T_21306, UInt<8>("h0ab")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21308 = bits(_T_21307, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21309 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21310 = eq(_T_21309, UInt<8>("h0ac")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21311 = bits(_T_21310, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21312 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21313 = eq(_T_21312, UInt<8>("h0ad")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21314 = bits(_T_21313, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21315 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21316 = eq(_T_21315, UInt<8>("h0ae")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21317 = bits(_T_21316, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21318 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21319 = eq(_T_21318, UInt<8>("h0af")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21320 = bits(_T_21319, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21321 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21322 = eq(_T_21321, UInt<8>("h0b0")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21323 = bits(_T_21322, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21324 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21325 = eq(_T_21324, UInt<8>("h0b1")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21326 = bits(_T_21325, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21327 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21328 = eq(_T_21327, UInt<8>("h0b2")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21329 = bits(_T_21328, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21330 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21331 = eq(_T_21330, UInt<8>("h0b3")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21332 = bits(_T_21331, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21333 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21334 = eq(_T_21333, UInt<8>("h0b4")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21335 = bits(_T_21334, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21336 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21337 = eq(_T_21336, UInt<8>("h0b5")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21338 = bits(_T_21337, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21339 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21340 = eq(_T_21339, UInt<8>("h0b6")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21341 = bits(_T_21340, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21342 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21343 = eq(_T_21342, UInt<8>("h0b7")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21344 = bits(_T_21343, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21345 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21346 = eq(_T_21345, UInt<8>("h0b8")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21347 = bits(_T_21346, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21348 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21349 = eq(_T_21348, UInt<8>("h0b9")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21350 = bits(_T_21349, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21351 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21352 = eq(_T_21351, UInt<8>("h0ba")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21353 = bits(_T_21352, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21354 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21355 = eq(_T_21354, UInt<8>("h0bb")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21356 = bits(_T_21355, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21357 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21358 = eq(_T_21357, UInt<8>("h0bc")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21359 = bits(_T_21358, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21360 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21361 = eq(_T_21360, UInt<8>("h0bd")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21362 = bits(_T_21361, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21363 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21364 = eq(_T_21363, UInt<8>("h0be")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21365 = bits(_T_21364, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21366 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21367 = eq(_T_21366, UInt<8>("h0bf")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21368 = bits(_T_21367, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21369 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
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node _T_21370 = eq(_T_21369, UInt<8>("h0c0")) @[el2_ifu_bp_ctl.scala 382:106]
|
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node _T_21371 = bits(_T_21370, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21372 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21373 = eq(_T_21372, UInt<8>("h0c1")) @[el2_ifu_bp_ctl.scala 382:106]
|
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node _T_21374 = bits(_T_21373, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21375 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21376 = eq(_T_21375, UInt<8>("h0c2")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21377 = bits(_T_21376, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21378 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
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node _T_21379 = eq(_T_21378, UInt<8>("h0c3")) @[el2_ifu_bp_ctl.scala 382:106]
|
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node _T_21380 = bits(_T_21379, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21381 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21382 = eq(_T_21381, UInt<8>("h0c4")) @[el2_ifu_bp_ctl.scala 382:106]
|
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node _T_21383 = bits(_T_21382, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21384 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21385 = eq(_T_21384, UInt<8>("h0c5")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21386 = bits(_T_21385, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21387 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21388 = eq(_T_21387, UInt<8>("h0c6")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21389 = bits(_T_21388, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21390 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21391 = eq(_T_21390, UInt<8>("h0c7")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21392 = bits(_T_21391, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21393 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21394 = eq(_T_21393, UInt<8>("h0c8")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21395 = bits(_T_21394, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21396 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21397 = eq(_T_21396, UInt<8>("h0c9")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21398 = bits(_T_21397, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21399 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21400 = eq(_T_21399, UInt<8>("h0ca")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21401 = bits(_T_21400, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21402 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21403 = eq(_T_21402, UInt<8>("h0cb")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21404 = bits(_T_21403, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21405 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21406 = eq(_T_21405, UInt<8>("h0cc")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21407 = bits(_T_21406, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21408 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21409 = eq(_T_21408, UInt<8>("h0cd")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21410 = bits(_T_21409, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21411 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21412 = eq(_T_21411, UInt<8>("h0ce")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21413 = bits(_T_21412, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21414 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21415 = eq(_T_21414, UInt<8>("h0cf")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21416 = bits(_T_21415, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21417 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21418 = eq(_T_21417, UInt<8>("h0d0")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21419 = bits(_T_21418, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21420 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21421 = eq(_T_21420, UInt<8>("h0d1")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21422 = bits(_T_21421, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21423 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21424 = eq(_T_21423, UInt<8>("h0d2")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21425 = bits(_T_21424, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21426 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21427 = eq(_T_21426, UInt<8>("h0d3")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21428 = bits(_T_21427, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21429 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21430 = eq(_T_21429, UInt<8>("h0d4")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21431 = bits(_T_21430, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21432 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21433 = eq(_T_21432, UInt<8>("h0d5")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21434 = bits(_T_21433, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21435 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21436 = eq(_T_21435, UInt<8>("h0d6")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21437 = bits(_T_21436, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21438 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21439 = eq(_T_21438, UInt<8>("h0d7")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21440 = bits(_T_21439, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21441 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21442 = eq(_T_21441, UInt<8>("h0d8")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21443 = bits(_T_21442, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21444 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21445 = eq(_T_21444, UInt<8>("h0d9")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21446 = bits(_T_21445, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21447 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21448 = eq(_T_21447, UInt<8>("h0da")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21449 = bits(_T_21448, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21450 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21451 = eq(_T_21450, UInt<8>("h0db")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21452 = bits(_T_21451, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21453 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21454 = eq(_T_21453, UInt<8>("h0dc")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21455 = bits(_T_21454, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21456 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21457 = eq(_T_21456, UInt<8>("h0dd")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21458 = bits(_T_21457, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21459 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21460 = eq(_T_21459, UInt<8>("h0de")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21461 = bits(_T_21460, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21462 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21463 = eq(_T_21462, UInt<8>("h0df")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21464 = bits(_T_21463, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21465 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21466 = eq(_T_21465, UInt<8>("h0e0")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21467 = bits(_T_21466, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21468 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21469 = eq(_T_21468, UInt<8>("h0e1")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21470 = bits(_T_21469, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21471 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21472 = eq(_T_21471, UInt<8>("h0e2")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21473 = bits(_T_21472, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21474 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21475 = eq(_T_21474, UInt<8>("h0e3")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21476 = bits(_T_21475, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21477 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21478 = eq(_T_21477, UInt<8>("h0e4")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21479 = bits(_T_21478, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21480 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21481 = eq(_T_21480, UInt<8>("h0e5")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21482 = bits(_T_21481, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21483 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21484 = eq(_T_21483, UInt<8>("h0e6")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21485 = bits(_T_21484, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21486 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21487 = eq(_T_21486, UInt<8>("h0e7")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21488 = bits(_T_21487, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21489 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21490 = eq(_T_21489, UInt<8>("h0e8")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21491 = bits(_T_21490, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21492 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21493 = eq(_T_21492, UInt<8>("h0e9")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21494 = bits(_T_21493, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21495 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21496 = eq(_T_21495, UInt<8>("h0ea")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21497 = bits(_T_21496, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21498 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21499 = eq(_T_21498, UInt<8>("h0eb")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21500 = bits(_T_21499, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21501 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21502 = eq(_T_21501, UInt<8>("h0ec")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21503 = bits(_T_21502, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21504 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21505 = eq(_T_21504, UInt<8>("h0ed")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21506 = bits(_T_21505, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21507 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21508 = eq(_T_21507, UInt<8>("h0ee")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21509 = bits(_T_21508, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21510 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21511 = eq(_T_21510, UInt<8>("h0ef")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21512 = bits(_T_21511, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21513 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21514 = eq(_T_21513, UInt<8>("h0f0")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21515 = bits(_T_21514, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21516 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21517 = eq(_T_21516, UInt<8>("h0f1")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21518 = bits(_T_21517, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21519 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21520 = eq(_T_21519, UInt<8>("h0f2")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21521 = bits(_T_21520, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21522 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21523 = eq(_T_21522, UInt<8>("h0f3")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21524 = bits(_T_21523, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21525 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21526 = eq(_T_21525, UInt<8>("h0f4")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21527 = bits(_T_21526, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21528 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21529 = eq(_T_21528, UInt<8>("h0f5")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21530 = bits(_T_21529, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21531 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21532 = eq(_T_21531, UInt<8>("h0f6")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21533 = bits(_T_21532, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21534 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21535 = eq(_T_21534, UInt<8>("h0f7")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21536 = bits(_T_21535, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21537 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21538 = eq(_T_21537, UInt<8>("h0f8")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21539 = bits(_T_21538, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21540 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21541 = eq(_T_21540, UInt<8>("h0f9")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21542 = bits(_T_21541, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21543 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21544 = eq(_T_21543, UInt<8>("h0fa")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21545 = bits(_T_21544, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21546 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21547 = eq(_T_21546, UInt<8>("h0fb")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21548 = bits(_T_21547, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21549 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21550 = eq(_T_21549, UInt<8>("h0fc")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21551 = bits(_T_21550, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21552 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21553 = eq(_T_21552, UInt<8>("h0fd")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21554 = bits(_T_21553, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21555 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21556 = eq(_T_21555, UInt<8>("h0fe")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21557 = bits(_T_21556, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21558 = bits(bht_rd_addr_f, 7, 0) @[el2_ifu_bp_ctl.scala 382:79]
|
|
node _T_21559 = eq(_T_21558, UInt<8>("h0ff")) @[el2_ifu_bp_ctl.scala 382:106]
|
|
node _T_21560 = bits(_T_21559, 0, 0) @[el2_ifu_bp_ctl.scala 382:114]
|
|
node _T_21561 = mux(_T_20795, bht_bank_rd_data_out[1][0], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21562 = mux(_T_20798, bht_bank_rd_data_out[1][1], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21563 = mux(_T_20801, bht_bank_rd_data_out[1][2], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21564 = mux(_T_20804, bht_bank_rd_data_out[1][3], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21565 = mux(_T_20807, bht_bank_rd_data_out[1][4], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21566 = mux(_T_20810, bht_bank_rd_data_out[1][5], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21567 = mux(_T_20813, bht_bank_rd_data_out[1][6], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21568 = mux(_T_20816, bht_bank_rd_data_out[1][7], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21569 = mux(_T_20819, bht_bank_rd_data_out[1][8], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21570 = mux(_T_20822, bht_bank_rd_data_out[1][9], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21571 = mux(_T_20825, bht_bank_rd_data_out[1][10], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21572 = mux(_T_20828, bht_bank_rd_data_out[1][11], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21573 = mux(_T_20831, bht_bank_rd_data_out[1][12], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21574 = mux(_T_20834, bht_bank_rd_data_out[1][13], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21575 = mux(_T_20837, bht_bank_rd_data_out[1][14], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21576 = mux(_T_20840, bht_bank_rd_data_out[1][15], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21577 = mux(_T_20843, bht_bank_rd_data_out[1][16], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21578 = mux(_T_20846, bht_bank_rd_data_out[1][17], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21579 = mux(_T_20849, bht_bank_rd_data_out[1][18], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21580 = mux(_T_20852, bht_bank_rd_data_out[1][19], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21581 = mux(_T_20855, bht_bank_rd_data_out[1][20], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21582 = mux(_T_20858, bht_bank_rd_data_out[1][21], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21583 = mux(_T_20861, bht_bank_rd_data_out[1][22], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21584 = mux(_T_20864, bht_bank_rd_data_out[1][23], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21585 = mux(_T_20867, bht_bank_rd_data_out[1][24], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21586 = mux(_T_20870, bht_bank_rd_data_out[1][25], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21587 = mux(_T_20873, bht_bank_rd_data_out[1][26], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21588 = mux(_T_20876, bht_bank_rd_data_out[1][27], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21589 = mux(_T_20879, bht_bank_rd_data_out[1][28], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21590 = mux(_T_20882, bht_bank_rd_data_out[1][29], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21591 = mux(_T_20885, bht_bank_rd_data_out[1][30], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21592 = mux(_T_20888, bht_bank_rd_data_out[1][31], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21593 = mux(_T_20891, bht_bank_rd_data_out[1][32], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21594 = mux(_T_20894, bht_bank_rd_data_out[1][33], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21595 = mux(_T_20897, bht_bank_rd_data_out[1][34], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21596 = mux(_T_20900, bht_bank_rd_data_out[1][35], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21597 = mux(_T_20903, bht_bank_rd_data_out[1][36], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21598 = mux(_T_20906, bht_bank_rd_data_out[1][37], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21599 = mux(_T_20909, bht_bank_rd_data_out[1][38], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21600 = mux(_T_20912, bht_bank_rd_data_out[1][39], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21601 = mux(_T_20915, bht_bank_rd_data_out[1][40], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21602 = mux(_T_20918, bht_bank_rd_data_out[1][41], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21603 = mux(_T_20921, bht_bank_rd_data_out[1][42], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21604 = mux(_T_20924, bht_bank_rd_data_out[1][43], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21605 = mux(_T_20927, bht_bank_rd_data_out[1][44], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21606 = mux(_T_20930, bht_bank_rd_data_out[1][45], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21607 = mux(_T_20933, bht_bank_rd_data_out[1][46], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21608 = mux(_T_20936, bht_bank_rd_data_out[1][47], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21609 = mux(_T_20939, bht_bank_rd_data_out[1][48], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21610 = mux(_T_20942, bht_bank_rd_data_out[1][49], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21611 = mux(_T_20945, bht_bank_rd_data_out[1][50], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21612 = mux(_T_20948, bht_bank_rd_data_out[1][51], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21613 = mux(_T_20951, bht_bank_rd_data_out[1][52], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21614 = mux(_T_20954, bht_bank_rd_data_out[1][53], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21615 = mux(_T_20957, bht_bank_rd_data_out[1][54], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21616 = mux(_T_20960, bht_bank_rd_data_out[1][55], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21617 = mux(_T_20963, bht_bank_rd_data_out[1][56], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21618 = mux(_T_20966, bht_bank_rd_data_out[1][57], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21619 = mux(_T_20969, bht_bank_rd_data_out[1][58], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21620 = mux(_T_20972, bht_bank_rd_data_out[1][59], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21621 = mux(_T_20975, bht_bank_rd_data_out[1][60], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21622 = mux(_T_20978, bht_bank_rd_data_out[1][61], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21623 = mux(_T_20981, bht_bank_rd_data_out[1][62], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21624 = mux(_T_20984, bht_bank_rd_data_out[1][63], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21625 = mux(_T_20987, bht_bank_rd_data_out[1][64], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21626 = mux(_T_20990, bht_bank_rd_data_out[1][65], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21627 = mux(_T_20993, bht_bank_rd_data_out[1][66], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21628 = mux(_T_20996, bht_bank_rd_data_out[1][67], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21629 = mux(_T_20999, bht_bank_rd_data_out[1][68], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21630 = mux(_T_21002, bht_bank_rd_data_out[1][69], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21631 = mux(_T_21005, bht_bank_rd_data_out[1][70], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21632 = mux(_T_21008, bht_bank_rd_data_out[1][71], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21633 = mux(_T_21011, bht_bank_rd_data_out[1][72], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21634 = mux(_T_21014, bht_bank_rd_data_out[1][73], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21635 = mux(_T_21017, bht_bank_rd_data_out[1][74], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21636 = mux(_T_21020, bht_bank_rd_data_out[1][75], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21637 = mux(_T_21023, bht_bank_rd_data_out[1][76], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21638 = mux(_T_21026, bht_bank_rd_data_out[1][77], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21639 = mux(_T_21029, bht_bank_rd_data_out[1][78], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21640 = mux(_T_21032, bht_bank_rd_data_out[1][79], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21641 = mux(_T_21035, bht_bank_rd_data_out[1][80], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21642 = mux(_T_21038, bht_bank_rd_data_out[1][81], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21643 = mux(_T_21041, bht_bank_rd_data_out[1][82], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21644 = mux(_T_21044, bht_bank_rd_data_out[1][83], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21645 = mux(_T_21047, bht_bank_rd_data_out[1][84], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21646 = mux(_T_21050, bht_bank_rd_data_out[1][85], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21647 = mux(_T_21053, bht_bank_rd_data_out[1][86], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21648 = mux(_T_21056, bht_bank_rd_data_out[1][87], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21649 = mux(_T_21059, bht_bank_rd_data_out[1][88], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21650 = mux(_T_21062, bht_bank_rd_data_out[1][89], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21651 = mux(_T_21065, bht_bank_rd_data_out[1][90], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21652 = mux(_T_21068, bht_bank_rd_data_out[1][91], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21653 = mux(_T_21071, bht_bank_rd_data_out[1][92], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21654 = mux(_T_21074, bht_bank_rd_data_out[1][93], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21655 = mux(_T_21077, bht_bank_rd_data_out[1][94], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21656 = mux(_T_21080, bht_bank_rd_data_out[1][95], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21657 = mux(_T_21083, bht_bank_rd_data_out[1][96], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21658 = mux(_T_21086, bht_bank_rd_data_out[1][97], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21659 = mux(_T_21089, bht_bank_rd_data_out[1][98], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21660 = mux(_T_21092, bht_bank_rd_data_out[1][99], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21661 = mux(_T_21095, bht_bank_rd_data_out[1][100], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21662 = mux(_T_21098, bht_bank_rd_data_out[1][101], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21663 = mux(_T_21101, bht_bank_rd_data_out[1][102], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21664 = mux(_T_21104, bht_bank_rd_data_out[1][103], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21665 = mux(_T_21107, bht_bank_rd_data_out[1][104], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21666 = mux(_T_21110, bht_bank_rd_data_out[1][105], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21667 = mux(_T_21113, bht_bank_rd_data_out[1][106], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21668 = mux(_T_21116, bht_bank_rd_data_out[1][107], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21669 = mux(_T_21119, bht_bank_rd_data_out[1][108], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21670 = mux(_T_21122, bht_bank_rd_data_out[1][109], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21671 = mux(_T_21125, bht_bank_rd_data_out[1][110], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21672 = mux(_T_21128, bht_bank_rd_data_out[1][111], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21673 = mux(_T_21131, bht_bank_rd_data_out[1][112], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21674 = mux(_T_21134, bht_bank_rd_data_out[1][113], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21675 = mux(_T_21137, bht_bank_rd_data_out[1][114], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21676 = mux(_T_21140, bht_bank_rd_data_out[1][115], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21677 = mux(_T_21143, bht_bank_rd_data_out[1][116], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21678 = mux(_T_21146, bht_bank_rd_data_out[1][117], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21679 = mux(_T_21149, bht_bank_rd_data_out[1][118], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21680 = mux(_T_21152, bht_bank_rd_data_out[1][119], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21681 = mux(_T_21155, bht_bank_rd_data_out[1][120], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21682 = mux(_T_21158, bht_bank_rd_data_out[1][121], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21683 = mux(_T_21161, bht_bank_rd_data_out[1][122], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21684 = mux(_T_21164, bht_bank_rd_data_out[1][123], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21685 = mux(_T_21167, bht_bank_rd_data_out[1][124], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21686 = mux(_T_21170, bht_bank_rd_data_out[1][125], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21687 = mux(_T_21173, bht_bank_rd_data_out[1][126], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21688 = mux(_T_21176, bht_bank_rd_data_out[1][127], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21689 = mux(_T_21179, bht_bank_rd_data_out[1][128], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21690 = mux(_T_21182, bht_bank_rd_data_out[1][129], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21691 = mux(_T_21185, bht_bank_rd_data_out[1][130], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21692 = mux(_T_21188, bht_bank_rd_data_out[1][131], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21693 = mux(_T_21191, bht_bank_rd_data_out[1][132], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21694 = mux(_T_21194, bht_bank_rd_data_out[1][133], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21695 = mux(_T_21197, bht_bank_rd_data_out[1][134], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21696 = mux(_T_21200, bht_bank_rd_data_out[1][135], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21697 = mux(_T_21203, bht_bank_rd_data_out[1][136], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21698 = mux(_T_21206, bht_bank_rd_data_out[1][137], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21699 = mux(_T_21209, bht_bank_rd_data_out[1][138], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21700 = mux(_T_21212, bht_bank_rd_data_out[1][139], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21701 = mux(_T_21215, bht_bank_rd_data_out[1][140], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21702 = mux(_T_21218, bht_bank_rd_data_out[1][141], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21703 = mux(_T_21221, bht_bank_rd_data_out[1][142], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21704 = mux(_T_21224, bht_bank_rd_data_out[1][143], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21705 = mux(_T_21227, bht_bank_rd_data_out[1][144], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21706 = mux(_T_21230, bht_bank_rd_data_out[1][145], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21707 = mux(_T_21233, bht_bank_rd_data_out[1][146], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21708 = mux(_T_21236, bht_bank_rd_data_out[1][147], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21709 = mux(_T_21239, bht_bank_rd_data_out[1][148], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21710 = mux(_T_21242, bht_bank_rd_data_out[1][149], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21711 = mux(_T_21245, bht_bank_rd_data_out[1][150], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21712 = mux(_T_21248, bht_bank_rd_data_out[1][151], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21713 = mux(_T_21251, bht_bank_rd_data_out[1][152], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21714 = mux(_T_21254, bht_bank_rd_data_out[1][153], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21715 = mux(_T_21257, bht_bank_rd_data_out[1][154], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21716 = mux(_T_21260, bht_bank_rd_data_out[1][155], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21717 = mux(_T_21263, bht_bank_rd_data_out[1][156], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21718 = mux(_T_21266, bht_bank_rd_data_out[1][157], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21719 = mux(_T_21269, bht_bank_rd_data_out[1][158], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21720 = mux(_T_21272, bht_bank_rd_data_out[1][159], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21721 = mux(_T_21275, bht_bank_rd_data_out[1][160], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21722 = mux(_T_21278, bht_bank_rd_data_out[1][161], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21723 = mux(_T_21281, bht_bank_rd_data_out[1][162], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21724 = mux(_T_21284, bht_bank_rd_data_out[1][163], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21725 = mux(_T_21287, bht_bank_rd_data_out[1][164], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21726 = mux(_T_21290, bht_bank_rd_data_out[1][165], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21727 = mux(_T_21293, bht_bank_rd_data_out[1][166], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21728 = mux(_T_21296, bht_bank_rd_data_out[1][167], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21729 = mux(_T_21299, bht_bank_rd_data_out[1][168], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21730 = mux(_T_21302, bht_bank_rd_data_out[1][169], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21731 = mux(_T_21305, bht_bank_rd_data_out[1][170], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21732 = mux(_T_21308, bht_bank_rd_data_out[1][171], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21733 = mux(_T_21311, bht_bank_rd_data_out[1][172], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21734 = mux(_T_21314, bht_bank_rd_data_out[1][173], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21735 = mux(_T_21317, bht_bank_rd_data_out[1][174], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21736 = mux(_T_21320, bht_bank_rd_data_out[1][175], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21737 = mux(_T_21323, bht_bank_rd_data_out[1][176], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21738 = mux(_T_21326, bht_bank_rd_data_out[1][177], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21739 = mux(_T_21329, bht_bank_rd_data_out[1][178], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21740 = mux(_T_21332, bht_bank_rd_data_out[1][179], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21741 = mux(_T_21335, bht_bank_rd_data_out[1][180], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21742 = mux(_T_21338, bht_bank_rd_data_out[1][181], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21743 = mux(_T_21341, bht_bank_rd_data_out[1][182], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21744 = mux(_T_21344, bht_bank_rd_data_out[1][183], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21745 = mux(_T_21347, bht_bank_rd_data_out[1][184], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21746 = mux(_T_21350, bht_bank_rd_data_out[1][185], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21747 = mux(_T_21353, bht_bank_rd_data_out[1][186], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21748 = mux(_T_21356, bht_bank_rd_data_out[1][187], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21749 = mux(_T_21359, bht_bank_rd_data_out[1][188], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21750 = mux(_T_21362, bht_bank_rd_data_out[1][189], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21751 = mux(_T_21365, bht_bank_rd_data_out[1][190], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21752 = mux(_T_21368, bht_bank_rd_data_out[1][191], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21753 = mux(_T_21371, bht_bank_rd_data_out[1][192], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21754 = mux(_T_21374, bht_bank_rd_data_out[1][193], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21755 = mux(_T_21377, bht_bank_rd_data_out[1][194], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21756 = mux(_T_21380, bht_bank_rd_data_out[1][195], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21757 = mux(_T_21383, bht_bank_rd_data_out[1][196], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21758 = mux(_T_21386, bht_bank_rd_data_out[1][197], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21759 = mux(_T_21389, bht_bank_rd_data_out[1][198], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21760 = mux(_T_21392, bht_bank_rd_data_out[1][199], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21761 = mux(_T_21395, bht_bank_rd_data_out[1][200], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21762 = mux(_T_21398, bht_bank_rd_data_out[1][201], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21763 = mux(_T_21401, bht_bank_rd_data_out[1][202], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21764 = mux(_T_21404, bht_bank_rd_data_out[1][203], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21765 = mux(_T_21407, bht_bank_rd_data_out[1][204], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21766 = mux(_T_21410, bht_bank_rd_data_out[1][205], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21767 = mux(_T_21413, bht_bank_rd_data_out[1][206], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21768 = mux(_T_21416, bht_bank_rd_data_out[1][207], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21769 = mux(_T_21419, bht_bank_rd_data_out[1][208], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21770 = mux(_T_21422, bht_bank_rd_data_out[1][209], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21771 = mux(_T_21425, bht_bank_rd_data_out[1][210], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21772 = mux(_T_21428, bht_bank_rd_data_out[1][211], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21773 = mux(_T_21431, bht_bank_rd_data_out[1][212], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21774 = mux(_T_21434, bht_bank_rd_data_out[1][213], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21775 = mux(_T_21437, bht_bank_rd_data_out[1][214], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21776 = mux(_T_21440, bht_bank_rd_data_out[1][215], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21777 = mux(_T_21443, bht_bank_rd_data_out[1][216], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21778 = mux(_T_21446, bht_bank_rd_data_out[1][217], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21779 = mux(_T_21449, bht_bank_rd_data_out[1][218], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21780 = mux(_T_21452, bht_bank_rd_data_out[1][219], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21781 = mux(_T_21455, bht_bank_rd_data_out[1][220], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21782 = mux(_T_21458, bht_bank_rd_data_out[1][221], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21783 = mux(_T_21461, bht_bank_rd_data_out[1][222], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21784 = mux(_T_21464, bht_bank_rd_data_out[1][223], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21785 = mux(_T_21467, bht_bank_rd_data_out[1][224], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21786 = mux(_T_21470, bht_bank_rd_data_out[1][225], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21787 = mux(_T_21473, bht_bank_rd_data_out[1][226], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21788 = mux(_T_21476, bht_bank_rd_data_out[1][227], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21789 = mux(_T_21479, bht_bank_rd_data_out[1][228], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21790 = mux(_T_21482, bht_bank_rd_data_out[1][229], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21791 = mux(_T_21485, bht_bank_rd_data_out[1][230], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21792 = mux(_T_21488, bht_bank_rd_data_out[1][231], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21793 = mux(_T_21491, bht_bank_rd_data_out[1][232], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21794 = mux(_T_21494, bht_bank_rd_data_out[1][233], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21795 = mux(_T_21497, bht_bank_rd_data_out[1][234], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21796 = mux(_T_21500, bht_bank_rd_data_out[1][235], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21797 = mux(_T_21503, bht_bank_rd_data_out[1][236], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21798 = mux(_T_21506, bht_bank_rd_data_out[1][237], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21799 = mux(_T_21509, bht_bank_rd_data_out[1][238], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21800 = mux(_T_21512, bht_bank_rd_data_out[1][239], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21801 = mux(_T_21515, bht_bank_rd_data_out[1][240], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21802 = mux(_T_21518, bht_bank_rd_data_out[1][241], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21803 = mux(_T_21521, bht_bank_rd_data_out[1][242], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21804 = mux(_T_21524, bht_bank_rd_data_out[1][243], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21805 = mux(_T_21527, bht_bank_rd_data_out[1][244], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21806 = mux(_T_21530, bht_bank_rd_data_out[1][245], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21807 = mux(_T_21533, bht_bank_rd_data_out[1][246], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21808 = mux(_T_21536, bht_bank_rd_data_out[1][247], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21809 = mux(_T_21539, bht_bank_rd_data_out[1][248], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21810 = mux(_T_21542, bht_bank_rd_data_out[1][249], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21811 = mux(_T_21545, bht_bank_rd_data_out[1][250], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21812 = mux(_T_21548, bht_bank_rd_data_out[1][251], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21813 = mux(_T_21551, bht_bank_rd_data_out[1][252], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21814 = mux(_T_21554, bht_bank_rd_data_out[1][253], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21815 = mux(_T_21557, bht_bank_rd_data_out[1][254], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21816 = mux(_T_21560, bht_bank_rd_data_out[1][255], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_21817 = or(_T_21561, _T_21562) @[Mux.scala 27:72]
|
|
node _T_21818 = or(_T_21817, _T_21563) @[Mux.scala 27:72]
|
|
node _T_21819 = or(_T_21818, _T_21564) @[Mux.scala 27:72]
|
|
node _T_21820 = or(_T_21819, _T_21565) @[Mux.scala 27:72]
|
|
node _T_21821 = or(_T_21820, _T_21566) @[Mux.scala 27:72]
|
|
node _T_21822 = or(_T_21821, _T_21567) @[Mux.scala 27:72]
|
|
node _T_21823 = or(_T_21822, _T_21568) @[Mux.scala 27:72]
|
|
node _T_21824 = or(_T_21823, _T_21569) @[Mux.scala 27:72]
|
|
node _T_21825 = or(_T_21824, _T_21570) @[Mux.scala 27:72]
|
|
node _T_21826 = or(_T_21825, _T_21571) @[Mux.scala 27:72]
|
|
node _T_21827 = or(_T_21826, _T_21572) @[Mux.scala 27:72]
|
|
node _T_21828 = or(_T_21827, _T_21573) @[Mux.scala 27:72]
|
|
node _T_21829 = or(_T_21828, _T_21574) @[Mux.scala 27:72]
|
|
node _T_21830 = or(_T_21829, _T_21575) @[Mux.scala 27:72]
|
|
node _T_21831 = or(_T_21830, _T_21576) @[Mux.scala 27:72]
|
|
node _T_21832 = or(_T_21831, _T_21577) @[Mux.scala 27:72]
|
|
node _T_21833 = or(_T_21832, _T_21578) @[Mux.scala 27:72]
|
|
node _T_21834 = or(_T_21833, _T_21579) @[Mux.scala 27:72]
|
|
node _T_21835 = or(_T_21834, _T_21580) @[Mux.scala 27:72]
|
|
node _T_21836 = or(_T_21835, _T_21581) @[Mux.scala 27:72]
|
|
node _T_21837 = or(_T_21836, _T_21582) @[Mux.scala 27:72]
|
|
node _T_21838 = or(_T_21837, _T_21583) @[Mux.scala 27:72]
|
|
node _T_21839 = or(_T_21838, _T_21584) @[Mux.scala 27:72]
|
|
node _T_21840 = or(_T_21839, _T_21585) @[Mux.scala 27:72]
|
|
node _T_21841 = or(_T_21840, _T_21586) @[Mux.scala 27:72]
|
|
node _T_21842 = or(_T_21841, _T_21587) @[Mux.scala 27:72]
|
|
node _T_21843 = or(_T_21842, _T_21588) @[Mux.scala 27:72]
|
|
node _T_21844 = or(_T_21843, _T_21589) @[Mux.scala 27:72]
|
|
node _T_21845 = or(_T_21844, _T_21590) @[Mux.scala 27:72]
|
|
node _T_21846 = or(_T_21845, _T_21591) @[Mux.scala 27:72]
|
|
node _T_21847 = or(_T_21846, _T_21592) @[Mux.scala 27:72]
|
|
node _T_21848 = or(_T_21847, _T_21593) @[Mux.scala 27:72]
|
|
node _T_21849 = or(_T_21848, _T_21594) @[Mux.scala 27:72]
|
|
node _T_21850 = or(_T_21849, _T_21595) @[Mux.scala 27:72]
|
|
node _T_21851 = or(_T_21850, _T_21596) @[Mux.scala 27:72]
|
|
node _T_21852 = or(_T_21851, _T_21597) @[Mux.scala 27:72]
|
|
node _T_21853 = or(_T_21852, _T_21598) @[Mux.scala 27:72]
|
|
node _T_21854 = or(_T_21853, _T_21599) @[Mux.scala 27:72]
|
|
node _T_21855 = or(_T_21854, _T_21600) @[Mux.scala 27:72]
|
|
node _T_21856 = or(_T_21855, _T_21601) @[Mux.scala 27:72]
|
|
node _T_21857 = or(_T_21856, _T_21602) @[Mux.scala 27:72]
|
|
node _T_21858 = or(_T_21857, _T_21603) @[Mux.scala 27:72]
|
|
node _T_21859 = or(_T_21858, _T_21604) @[Mux.scala 27:72]
|
|
node _T_21860 = or(_T_21859, _T_21605) @[Mux.scala 27:72]
|
|
node _T_21861 = or(_T_21860, _T_21606) @[Mux.scala 27:72]
|
|
node _T_21862 = or(_T_21861, _T_21607) @[Mux.scala 27:72]
|
|
node _T_21863 = or(_T_21862, _T_21608) @[Mux.scala 27:72]
|
|
node _T_21864 = or(_T_21863, _T_21609) @[Mux.scala 27:72]
|
|
node _T_21865 = or(_T_21864, _T_21610) @[Mux.scala 27:72]
|
|
node _T_21866 = or(_T_21865, _T_21611) @[Mux.scala 27:72]
|
|
node _T_21867 = or(_T_21866, _T_21612) @[Mux.scala 27:72]
|
|
node _T_21868 = or(_T_21867, _T_21613) @[Mux.scala 27:72]
|
|
node _T_21869 = or(_T_21868, _T_21614) @[Mux.scala 27:72]
|
|
node _T_21870 = or(_T_21869, _T_21615) @[Mux.scala 27:72]
|
|
node _T_21871 = or(_T_21870, _T_21616) @[Mux.scala 27:72]
|
|
node _T_21872 = or(_T_21871, _T_21617) @[Mux.scala 27:72]
|
|
node _T_21873 = or(_T_21872, _T_21618) @[Mux.scala 27:72]
|
|
node _T_21874 = or(_T_21873, _T_21619) @[Mux.scala 27:72]
|
|
node _T_21875 = or(_T_21874, _T_21620) @[Mux.scala 27:72]
|
|
node _T_21876 = or(_T_21875, _T_21621) @[Mux.scala 27:72]
|
|
node _T_21877 = or(_T_21876, _T_21622) @[Mux.scala 27:72]
|
|
node _T_21878 = or(_T_21877, _T_21623) @[Mux.scala 27:72]
|
|
node _T_21879 = or(_T_21878, _T_21624) @[Mux.scala 27:72]
|
|
node _T_21880 = or(_T_21879, _T_21625) @[Mux.scala 27:72]
|
|
node _T_21881 = or(_T_21880, _T_21626) @[Mux.scala 27:72]
|
|
node _T_21882 = or(_T_21881, _T_21627) @[Mux.scala 27:72]
|
|
node _T_21883 = or(_T_21882, _T_21628) @[Mux.scala 27:72]
|
|
node _T_21884 = or(_T_21883, _T_21629) @[Mux.scala 27:72]
|
|
node _T_21885 = or(_T_21884, _T_21630) @[Mux.scala 27:72]
|
|
node _T_21886 = or(_T_21885, _T_21631) @[Mux.scala 27:72]
|
|
node _T_21887 = or(_T_21886, _T_21632) @[Mux.scala 27:72]
|
|
node _T_21888 = or(_T_21887, _T_21633) @[Mux.scala 27:72]
|
|
node _T_21889 = or(_T_21888, _T_21634) @[Mux.scala 27:72]
|
|
node _T_21890 = or(_T_21889, _T_21635) @[Mux.scala 27:72]
|
|
node _T_21891 = or(_T_21890, _T_21636) @[Mux.scala 27:72]
|
|
node _T_21892 = or(_T_21891, _T_21637) @[Mux.scala 27:72]
|
|
node _T_21893 = or(_T_21892, _T_21638) @[Mux.scala 27:72]
|
|
node _T_21894 = or(_T_21893, _T_21639) @[Mux.scala 27:72]
|
|
node _T_21895 = or(_T_21894, _T_21640) @[Mux.scala 27:72]
|
|
node _T_21896 = or(_T_21895, _T_21641) @[Mux.scala 27:72]
|
|
node _T_21897 = or(_T_21896, _T_21642) @[Mux.scala 27:72]
|
|
node _T_21898 = or(_T_21897, _T_21643) @[Mux.scala 27:72]
|
|
node _T_21899 = or(_T_21898, _T_21644) @[Mux.scala 27:72]
|
|
node _T_21900 = or(_T_21899, _T_21645) @[Mux.scala 27:72]
|
|
node _T_21901 = or(_T_21900, _T_21646) @[Mux.scala 27:72]
|
|
node _T_21902 = or(_T_21901, _T_21647) @[Mux.scala 27:72]
|
|
node _T_21903 = or(_T_21902, _T_21648) @[Mux.scala 27:72]
|
|
node _T_21904 = or(_T_21903, _T_21649) @[Mux.scala 27:72]
|
|
node _T_21905 = or(_T_21904, _T_21650) @[Mux.scala 27:72]
|
|
node _T_21906 = or(_T_21905, _T_21651) @[Mux.scala 27:72]
|
|
node _T_21907 = or(_T_21906, _T_21652) @[Mux.scala 27:72]
|
|
node _T_21908 = or(_T_21907, _T_21653) @[Mux.scala 27:72]
|
|
node _T_21909 = or(_T_21908, _T_21654) @[Mux.scala 27:72]
|
|
node _T_21910 = or(_T_21909, _T_21655) @[Mux.scala 27:72]
|
|
node _T_21911 = or(_T_21910, _T_21656) @[Mux.scala 27:72]
|
|
node _T_21912 = or(_T_21911, _T_21657) @[Mux.scala 27:72]
|
|
node _T_21913 = or(_T_21912, _T_21658) @[Mux.scala 27:72]
|
|
node _T_21914 = or(_T_21913, _T_21659) @[Mux.scala 27:72]
|
|
node _T_21915 = or(_T_21914, _T_21660) @[Mux.scala 27:72]
|
|
node _T_21916 = or(_T_21915, _T_21661) @[Mux.scala 27:72]
|
|
node _T_21917 = or(_T_21916, _T_21662) @[Mux.scala 27:72]
|
|
node _T_21918 = or(_T_21917, _T_21663) @[Mux.scala 27:72]
|
|
node _T_21919 = or(_T_21918, _T_21664) @[Mux.scala 27:72]
|
|
node _T_21920 = or(_T_21919, _T_21665) @[Mux.scala 27:72]
|
|
node _T_21921 = or(_T_21920, _T_21666) @[Mux.scala 27:72]
|
|
node _T_21922 = or(_T_21921, _T_21667) @[Mux.scala 27:72]
|
|
node _T_21923 = or(_T_21922, _T_21668) @[Mux.scala 27:72]
|
|
node _T_21924 = or(_T_21923, _T_21669) @[Mux.scala 27:72]
|
|
node _T_21925 = or(_T_21924, _T_21670) @[Mux.scala 27:72]
|
|
node _T_21926 = or(_T_21925, _T_21671) @[Mux.scala 27:72]
|
|
node _T_21927 = or(_T_21926, _T_21672) @[Mux.scala 27:72]
|
|
node _T_21928 = or(_T_21927, _T_21673) @[Mux.scala 27:72]
|
|
node _T_21929 = or(_T_21928, _T_21674) @[Mux.scala 27:72]
|
|
node _T_21930 = or(_T_21929, _T_21675) @[Mux.scala 27:72]
|
|
node _T_21931 = or(_T_21930, _T_21676) @[Mux.scala 27:72]
|
|
node _T_21932 = or(_T_21931, _T_21677) @[Mux.scala 27:72]
|
|
node _T_21933 = or(_T_21932, _T_21678) @[Mux.scala 27:72]
|
|
node _T_21934 = or(_T_21933, _T_21679) @[Mux.scala 27:72]
|
|
node _T_21935 = or(_T_21934, _T_21680) @[Mux.scala 27:72]
|
|
node _T_21936 = or(_T_21935, _T_21681) @[Mux.scala 27:72]
|
|
node _T_21937 = or(_T_21936, _T_21682) @[Mux.scala 27:72]
|
|
node _T_21938 = or(_T_21937, _T_21683) @[Mux.scala 27:72]
|
|
node _T_21939 = or(_T_21938, _T_21684) @[Mux.scala 27:72]
|
|
node _T_21940 = or(_T_21939, _T_21685) @[Mux.scala 27:72]
|
|
node _T_21941 = or(_T_21940, _T_21686) @[Mux.scala 27:72]
|
|
node _T_21942 = or(_T_21941, _T_21687) @[Mux.scala 27:72]
|
|
node _T_21943 = or(_T_21942, _T_21688) @[Mux.scala 27:72]
|
|
node _T_21944 = or(_T_21943, _T_21689) @[Mux.scala 27:72]
|
|
node _T_21945 = or(_T_21944, _T_21690) @[Mux.scala 27:72]
|
|
node _T_21946 = or(_T_21945, _T_21691) @[Mux.scala 27:72]
|
|
node _T_21947 = or(_T_21946, _T_21692) @[Mux.scala 27:72]
|
|
node _T_21948 = or(_T_21947, _T_21693) @[Mux.scala 27:72]
|
|
node _T_21949 = or(_T_21948, _T_21694) @[Mux.scala 27:72]
|
|
node _T_21950 = or(_T_21949, _T_21695) @[Mux.scala 27:72]
|
|
node _T_21951 = or(_T_21950, _T_21696) @[Mux.scala 27:72]
|
|
node _T_21952 = or(_T_21951, _T_21697) @[Mux.scala 27:72]
|
|
node _T_21953 = or(_T_21952, _T_21698) @[Mux.scala 27:72]
|
|
node _T_21954 = or(_T_21953, _T_21699) @[Mux.scala 27:72]
|
|
node _T_21955 = or(_T_21954, _T_21700) @[Mux.scala 27:72]
|
|
node _T_21956 = or(_T_21955, _T_21701) @[Mux.scala 27:72]
|
|
node _T_21957 = or(_T_21956, _T_21702) @[Mux.scala 27:72]
|
|
node _T_21958 = or(_T_21957, _T_21703) @[Mux.scala 27:72]
|
|
node _T_21959 = or(_T_21958, _T_21704) @[Mux.scala 27:72]
|
|
node _T_21960 = or(_T_21959, _T_21705) @[Mux.scala 27:72]
|
|
node _T_21961 = or(_T_21960, _T_21706) @[Mux.scala 27:72]
|
|
node _T_21962 = or(_T_21961, _T_21707) @[Mux.scala 27:72]
|
|
node _T_21963 = or(_T_21962, _T_21708) @[Mux.scala 27:72]
|
|
node _T_21964 = or(_T_21963, _T_21709) @[Mux.scala 27:72]
|
|
node _T_21965 = or(_T_21964, _T_21710) @[Mux.scala 27:72]
|
|
node _T_21966 = or(_T_21965, _T_21711) @[Mux.scala 27:72]
|
|
node _T_21967 = or(_T_21966, _T_21712) @[Mux.scala 27:72]
|
|
node _T_21968 = or(_T_21967, _T_21713) @[Mux.scala 27:72]
|
|
node _T_21969 = or(_T_21968, _T_21714) @[Mux.scala 27:72]
|
|
node _T_21970 = or(_T_21969, _T_21715) @[Mux.scala 27:72]
|
|
node _T_21971 = or(_T_21970, _T_21716) @[Mux.scala 27:72]
|
|
node _T_21972 = or(_T_21971, _T_21717) @[Mux.scala 27:72]
|
|
node _T_21973 = or(_T_21972, _T_21718) @[Mux.scala 27:72]
|
|
node _T_21974 = or(_T_21973, _T_21719) @[Mux.scala 27:72]
|
|
node _T_21975 = or(_T_21974, _T_21720) @[Mux.scala 27:72]
|
|
node _T_21976 = or(_T_21975, _T_21721) @[Mux.scala 27:72]
|
|
node _T_21977 = or(_T_21976, _T_21722) @[Mux.scala 27:72]
|
|
node _T_21978 = or(_T_21977, _T_21723) @[Mux.scala 27:72]
|
|
node _T_21979 = or(_T_21978, _T_21724) @[Mux.scala 27:72]
|
|
node _T_21980 = or(_T_21979, _T_21725) @[Mux.scala 27:72]
|
|
node _T_21981 = or(_T_21980, _T_21726) @[Mux.scala 27:72]
|
|
node _T_21982 = or(_T_21981, _T_21727) @[Mux.scala 27:72]
|
|
node _T_21983 = or(_T_21982, _T_21728) @[Mux.scala 27:72]
|
|
node _T_21984 = or(_T_21983, _T_21729) @[Mux.scala 27:72]
|
|
node _T_21985 = or(_T_21984, _T_21730) @[Mux.scala 27:72]
|
|
node _T_21986 = or(_T_21985, _T_21731) @[Mux.scala 27:72]
|
|
node _T_21987 = or(_T_21986, _T_21732) @[Mux.scala 27:72]
|
|
node _T_21988 = or(_T_21987, _T_21733) @[Mux.scala 27:72]
|
|
node _T_21989 = or(_T_21988, _T_21734) @[Mux.scala 27:72]
|
|
node _T_21990 = or(_T_21989, _T_21735) @[Mux.scala 27:72]
|
|
node _T_21991 = or(_T_21990, _T_21736) @[Mux.scala 27:72]
|
|
node _T_21992 = or(_T_21991, _T_21737) @[Mux.scala 27:72]
|
|
node _T_21993 = or(_T_21992, _T_21738) @[Mux.scala 27:72]
|
|
node _T_21994 = or(_T_21993, _T_21739) @[Mux.scala 27:72]
|
|
node _T_21995 = or(_T_21994, _T_21740) @[Mux.scala 27:72]
|
|
node _T_21996 = or(_T_21995, _T_21741) @[Mux.scala 27:72]
|
|
node _T_21997 = or(_T_21996, _T_21742) @[Mux.scala 27:72]
|
|
node _T_21998 = or(_T_21997, _T_21743) @[Mux.scala 27:72]
|
|
node _T_21999 = or(_T_21998, _T_21744) @[Mux.scala 27:72]
|
|
node _T_22000 = or(_T_21999, _T_21745) @[Mux.scala 27:72]
|
|
node _T_22001 = or(_T_22000, _T_21746) @[Mux.scala 27:72]
|
|
node _T_22002 = or(_T_22001, _T_21747) @[Mux.scala 27:72]
|
|
node _T_22003 = or(_T_22002, _T_21748) @[Mux.scala 27:72]
|
|
node _T_22004 = or(_T_22003, _T_21749) @[Mux.scala 27:72]
|
|
node _T_22005 = or(_T_22004, _T_21750) @[Mux.scala 27:72]
|
|
node _T_22006 = or(_T_22005, _T_21751) @[Mux.scala 27:72]
|
|
node _T_22007 = or(_T_22006, _T_21752) @[Mux.scala 27:72]
|
|
node _T_22008 = or(_T_22007, _T_21753) @[Mux.scala 27:72]
|
|
node _T_22009 = or(_T_22008, _T_21754) @[Mux.scala 27:72]
|
|
node _T_22010 = or(_T_22009, _T_21755) @[Mux.scala 27:72]
|
|
node _T_22011 = or(_T_22010, _T_21756) @[Mux.scala 27:72]
|
|
node _T_22012 = or(_T_22011, _T_21757) @[Mux.scala 27:72]
|
|
node _T_22013 = or(_T_22012, _T_21758) @[Mux.scala 27:72]
|
|
node _T_22014 = or(_T_22013, _T_21759) @[Mux.scala 27:72]
|
|
node _T_22015 = or(_T_22014, _T_21760) @[Mux.scala 27:72]
|
|
node _T_22016 = or(_T_22015, _T_21761) @[Mux.scala 27:72]
|
|
node _T_22017 = or(_T_22016, _T_21762) @[Mux.scala 27:72]
|
|
node _T_22018 = or(_T_22017, _T_21763) @[Mux.scala 27:72]
|
|
node _T_22019 = or(_T_22018, _T_21764) @[Mux.scala 27:72]
|
|
node _T_22020 = or(_T_22019, _T_21765) @[Mux.scala 27:72]
|
|
node _T_22021 = or(_T_22020, _T_21766) @[Mux.scala 27:72]
|
|
node _T_22022 = or(_T_22021, _T_21767) @[Mux.scala 27:72]
|
|
node _T_22023 = or(_T_22022, _T_21768) @[Mux.scala 27:72]
|
|
node _T_22024 = or(_T_22023, _T_21769) @[Mux.scala 27:72]
|
|
node _T_22025 = or(_T_22024, _T_21770) @[Mux.scala 27:72]
|
|
node _T_22026 = or(_T_22025, _T_21771) @[Mux.scala 27:72]
|
|
node _T_22027 = or(_T_22026, _T_21772) @[Mux.scala 27:72]
|
|
node _T_22028 = or(_T_22027, _T_21773) @[Mux.scala 27:72]
|
|
node _T_22029 = or(_T_22028, _T_21774) @[Mux.scala 27:72]
|
|
node _T_22030 = or(_T_22029, _T_21775) @[Mux.scala 27:72]
|
|
node _T_22031 = or(_T_22030, _T_21776) @[Mux.scala 27:72]
|
|
node _T_22032 = or(_T_22031, _T_21777) @[Mux.scala 27:72]
|
|
node _T_22033 = or(_T_22032, _T_21778) @[Mux.scala 27:72]
|
|
node _T_22034 = or(_T_22033, _T_21779) @[Mux.scala 27:72]
|
|
node _T_22035 = or(_T_22034, _T_21780) @[Mux.scala 27:72]
|
|
node _T_22036 = or(_T_22035, _T_21781) @[Mux.scala 27:72]
|
|
node _T_22037 = or(_T_22036, _T_21782) @[Mux.scala 27:72]
|
|
node _T_22038 = or(_T_22037, _T_21783) @[Mux.scala 27:72]
|
|
node _T_22039 = or(_T_22038, _T_21784) @[Mux.scala 27:72]
|
|
node _T_22040 = or(_T_22039, _T_21785) @[Mux.scala 27:72]
|
|
node _T_22041 = or(_T_22040, _T_21786) @[Mux.scala 27:72]
|
|
node _T_22042 = or(_T_22041, _T_21787) @[Mux.scala 27:72]
|
|
node _T_22043 = or(_T_22042, _T_21788) @[Mux.scala 27:72]
|
|
node _T_22044 = or(_T_22043, _T_21789) @[Mux.scala 27:72]
|
|
node _T_22045 = or(_T_22044, _T_21790) @[Mux.scala 27:72]
|
|
node _T_22046 = or(_T_22045, _T_21791) @[Mux.scala 27:72]
|
|
node _T_22047 = or(_T_22046, _T_21792) @[Mux.scala 27:72]
|
|
node _T_22048 = or(_T_22047, _T_21793) @[Mux.scala 27:72]
|
|
node _T_22049 = or(_T_22048, _T_21794) @[Mux.scala 27:72]
|
|
node _T_22050 = or(_T_22049, _T_21795) @[Mux.scala 27:72]
|
|
node _T_22051 = or(_T_22050, _T_21796) @[Mux.scala 27:72]
|
|
node _T_22052 = or(_T_22051, _T_21797) @[Mux.scala 27:72]
|
|
node _T_22053 = or(_T_22052, _T_21798) @[Mux.scala 27:72]
|
|
node _T_22054 = or(_T_22053, _T_21799) @[Mux.scala 27:72]
|
|
node _T_22055 = or(_T_22054, _T_21800) @[Mux.scala 27:72]
|
|
node _T_22056 = or(_T_22055, _T_21801) @[Mux.scala 27:72]
|
|
node _T_22057 = or(_T_22056, _T_21802) @[Mux.scala 27:72]
|
|
node _T_22058 = or(_T_22057, _T_21803) @[Mux.scala 27:72]
|
|
node _T_22059 = or(_T_22058, _T_21804) @[Mux.scala 27:72]
|
|
node _T_22060 = or(_T_22059, _T_21805) @[Mux.scala 27:72]
|
|
node _T_22061 = or(_T_22060, _T_21806) @[Mux.scala 27:72]
|
|
node _T_22062 = or(_T_22061, _T_21807) @[Mux.scala 27:72]
|
|
node _T_22063 = or(_T_22062, _T_21808) @[Mux.scala 27:72]
|
|
node _T_22064 = or(_T_22063, _T_21809) @[Mux.scala 27:72]
|
|
node _T_22065 = or(_T_22064, _T_21810) @[Mux.scala 27:72]
|
|
node _T_22066 = or(_T_22065, _T_21811) @[Mux.scala 27:72]
|
|
node _T_22067 = or(_T_22066, _T_21812) @[Mux.scala 27:72]
|
|
node _T_22068 = or(_T_22067, _T_21813) @[Mux.scala 27:72]
|
|
node _T_22069 = or(_T_22068, _T_21814) @[Mux.scala 27:72]
|
|
node _T_22070 = or(_T_22069, _T_21815) @[Mux.scala 27:72]
|
|
node _T_22071 = or(_T_22070, _T_21816) @[Mux.scala 27:72]
|
|
wire _T_22072 : UInt<2> @[Mux.scala 27:72]
|
|
_T_22072 <= _T_22071 @[Mux.scala 27:72]
|
|
bht_bank1_rd_data_f <= _T_22072 @[el2_ifu_bp_ctl.scala 382:23]
|
|
node _T_22073 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22074 = eq(_T_22073, UInt<1>("h00")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22075 = bits(_T_22074, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22076 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22077 = eq(_T_22076, UInt<1>("h01")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22078 = bits(_T_22077, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22079 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22080 = eq(_T_22079, UInt<2>("h02")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22081 = bits(_T_22080, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22082 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22083 = eq(_T_22082, UInt<2>("h03")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22084 = bits(_T_22083, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22085 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22086 = eq(_T_22085, UInt<3>("h04")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22087 = bits(_T_22086, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22088 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22089 = eq(_T_22088, UInt<3>("h05")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22090 = bits(_T_22089, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22091 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22092 = eq(_T_22091, UInt<3>("h06")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22093 = bits(_T_22092, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22094 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22095 = eq(_T_22094, UInt<3>("h07")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22096 = bits(_T_22095, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22097 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22098 = eq(_T_22097, UInt<4>("h08")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22099 = bits(_T_22098, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22100 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22101 = eq(_T_22100, UInt<4>("h09")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22102 = bits(_T_22101, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22103 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22104 = eq(_T_22103, UInt<4>("h0a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22105 = bits(_T_22104, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22106 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22107 = eq(_T_22106, UInt<4>("h0b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22108 = bits(_T_22107, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22109 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22110 = eq(_T_22109, UInt<4>("h0c")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22111 = bits(_T_22110, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22112 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22113 = eq(_T_22112, UInt<4>("h0d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22114 = bits(_T_22113, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22115 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22116 = eq(_T_22115, UInt<4>("h0e")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22117 = bits(_T_22116, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22118 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22119 = eq(_T_22118, UInt<4>("h0f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22120 = bits(_T_22119, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22121 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22122 = eq(_T_22121, UInt<5>("h010")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22123 = bits(_T_22122, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22124 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22125 = eq(_T_22124, UInt<5>("h011")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22126 = bits(_T_22125, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22127 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22128 = eq(_T_22127, UInt<5>("h012")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22129 = bits(_T_22128, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22130 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22131 = eq(_T_22130, UInt<5>("h013")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22132 = bits(_T_22131, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22133 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22134 = eq(_T_22133, UInt<5>("h014")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22135 = bits(_T_22134, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22136 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22137 = eq(_T_22136, UInt<5>("h015")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22138 = bits(_T_22137, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22139 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22140 = eq(_T_22139, UInt<5>("h016")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22141 = bits(_T_22140, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22142 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22143 = eq(_T_22142, UInt<5>("h017")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22144 = bits(_T_22143, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22145 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22146 = eq(_T_22145, UInt<5>("h018")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22147 = bits(_T_22146, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22148 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22149 = eq(_T_22148, UInt<5>("h019")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22150 = bits(_T_22149, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22151 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22152 = eq(_T_22151, UInt<5>("h01a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22153 = bits(_T_22152, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22154 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22155 = eq(_T_22154, UInt<5>("h01b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22156 = bits(_T_22155, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22157 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22158 = eq(_T_22157, UInt<5>("h01c")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22159 = bits(_T_22158, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22160 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22161 = eq(_T_22160, UInt<5>("h01d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22162 = bits(_T_22161, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22163 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22164 = eq(_T_22163, UInt<5>("h01e")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22165 = bits(_T_22164, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22166 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22167 = eq(_T_22166, UInt<5>("h01f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22168 = bits(_T_22167, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22169 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22170 = eq(_T_22169, UInt<6>("h020")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22171 = bits(_T_22170, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22172 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22173 = eq(_T_22172, UInt<6>("h021")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22174 = bits(_T_22173, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22175 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22176 = eq(_T_22175, UInt<6>("h022")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22177 = bits(_T_22176, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22178 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22179 = eq(_T_22178, UInt<6>("h023")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22180 = bits(_T_22179, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22181 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22182 = eq(_T_22181, UInt<6>("h024")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22183 = bits(_T_22182, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22184 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22185 = eq(_T_22184, UInt<6>("h025")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22186 = bits(_T_22185, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22187 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22188 = eq(_T_22187, UInt<6>("h026")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22189 = bits(_T_22188, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22190 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22191 = eq(_T_22190, UInt<6>("h027")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22192 = bits(_T_22191, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22193 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22194 = eq(_T_22193, UInt<6>("h028")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22195 = bits(_T_22194, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22196 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22197 = eq(_T_22196, UInt<6>("h029")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22198 = bits(_T_22197, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22199 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22200 = eq(_T_22199, UInt<6>("h02a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22201 = bits(_T_22200, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22202 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22203 = eq(_T_22202, UInt<6>("h02b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22204 = bits(_T_22203, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22205 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22206 = eq(_T_22205, UInt<6>("h02c")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22207 = bits(_T_22206, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22208 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22209 = eq(_T_22208, UInt<6>("h02d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22210 = bits(_T_22209, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22211 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22212 = eq(_T_22211, UInt<6>("h02e")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22213 = bits(_T_22212, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22214 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22215 = eq(_T_22214, UInt<6>("h02f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22216 = bits(_T_22215, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22217 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22218 = eq(_T_22217, UInt<6>("h030")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22219 = bits(_T_22218, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22220 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22221 = eq(_T_22220, UInt<6>("h031")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22222 = bits(_T_22221, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22223 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22224 = eq(_T_22223, UInt<6>("h032")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22225 = bits(_T_22224, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22226 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22227 = eq(_T_22226, UInt<6>("h033")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22228 = bits(_T_22227, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22229 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22230 = eq(_T_22229, UInt<6>("h034")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22231 = bits(_T_22230, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22232 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22233 = eq(_T_22232, UInt<6>("h035")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22234 = bits(_T_22233, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22235 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22236 = eq(_T_22235, UInt<6>("h036")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22237 = bits(_T_22236, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22238 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22239 = eq(_T_22238, UInt<6>("h037")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22240 = bits(_T_22239, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22241 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22242 = eq(_T_22241, UInt<6>("h038")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22243 = bits(_T_22242, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22244 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22245 = eq(_T_22244, UInt<6>("h039")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22246 = bits(_T_22245, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22247 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22248 = eq(_T_22247, UInt<6>("h03a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22249 = bits(_T_22248, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22250 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22251 = eq(_T_22250, UInt<6>("h03b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22252 = bits(_T_22251, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22253 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22254 = eq(_T_22253, UInt<6>("h03c")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22255 = bits(_T_22254, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22256 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22257 = eq(_T_22256, UInt<6>("h03d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22258 = bits(_T_22257, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22259 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22260 = eq(_T_22259, UInt<6>("h03e")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22261 = bits(_T_22260, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22262 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22263 = eq(_T_22262, UInt<6>("h03f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22264 = bits(_T_22263, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22265 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22266 = eq(_T_22265, UInt<7>("h040")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22267 = bits(_T_22266, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22268 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22269 = eq(_T_22268, UInt<7>("h041")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22270 = bits(_T_22269, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22271 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22272 = eq(_T_22271, UInt<7>("h042")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22273 = bits(_T_22272, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22274 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22275 = eq(_T_22274, UInt<7>("h043")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22276 = bits(_T_22275, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22277 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22278 = eq(_T_22277, UInt<7>("h044")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22279 = bits(_T_22278, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22280 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22281 = eq(_T_22280, UInt<7>("h045")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22282 = bits(_T_22281, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22283 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22284 = eq(_T_22283, UInt<7>("h046")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22285 = bits(_T_22284, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22286 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22287 = eq(_T_22286, UInt<7>("h047")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22288 = bits(_T_22287, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22289 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22290 = eq(_T_22289, UInt<7>("h048")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22291 = bits(_T_22290, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22292 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22293 = eq(_T_22292, UInt<7>("h049")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22294 = bits(_T_22293, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22295 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22296 = eq(_T_22295, UInt<7>("h04a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22297 = bits(_T_22296, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22298 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22299 = eq(_T_22298, UInt<7>("h04b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22300 = bits(_T_22299, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22301 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22302 = eq(_T_22301, UInt<7>("h04c")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22303 = bits(_T_22302, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22304 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22305 = eq(_T_22304, UInt<7>("h04d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22306 = bits(_T_22305, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22307 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22308 = eq(_T_22307, UInt<7>("h04e")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22309 = bits(_T_22308, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22310 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22311 = eq(_T_22310, UInt<7>("h04f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22312 = bits(_T_22311, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22313 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22314 = eq(_T_22313, UInt<7>("h050")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22315 = bits(_T_22314, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22316 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22317 = eq(_T_22316, UInt<7>("h051")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22318 = bits(_T_22317, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22319 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22320 = eq(_T_22319, UInt<7>("h052")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22321 = bits(_T_22320, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22322 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22323 = eq(_T_22322, UInt<7>("h053")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22324 = bits(_T_22323, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22325 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22326 = eq(_T_22325, UInt<7>("h054")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22327 = bits(_T_22326, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22328 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22329 = eq(_T_22328, UInt<7>("h055")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22330 = bits(_T_22329, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22331 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22332 = eq(_T_22331, UInt<7>("h056")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22333 = bits(_T_22332, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22334 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22335 = eq(_T_22334, UInt<7>("h057")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22336 = bits(_T_22335, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22337 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22338 = eq(_T_22337, UInt<7>("h058")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22339 = bits(_T_22338, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22340 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22341 = eq(_T_22340, UInt<7>("h059")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22342 = bits(_T_22341, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22343 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22344 = eq(_T_22343, UInt<7>("h05a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22345 = bits(_T_22344, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22346 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22347 = eq(_T_22346, UInt<7>("h05b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22348 = bits(_T_22347, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22349 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22350 = eq(_T_22349, UInt<7>("h05c")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22351 = bits(_T_22350, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22352 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22353 = eq(_T_22352, UInt<7>("h05d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22354 = bits(_T_22353, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22355 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22356 = eq(_T_22355, UInt<7>("h05e")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22357 = bits(_T_22356, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22358 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22359 = eq(_T_22358, UInt<7>("h05f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22360 = bits(_T_22359, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22361 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22362 = eq(_T_22361, UInt<7>("h060")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22363 = bits(_T_22362, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22364 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22365 = eq(_T_22364, UInt<7>("h061")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22366 = bits(_T_22365, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22367 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22368 = eq(_T_22367, UInt<7>("h062")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22369 = bits(_T_22368, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22370 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22371 = eq(_T_22370, UInt<7>("h063")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22372 = bits(_T_22371, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22373 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22374 = eq(_T_22373, UInt<7>("h064")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22375 = bits(_T_22374, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22376 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22377 = eq(_T_22376, UInt<7>("h065")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22378 = bits(_T_22377, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22379 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22380 = eq(_T_22379, UInt<7>("h066")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22381 = bits(_T_22380, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22382 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22383 = eq(_T_22382, UInt<7>("h067")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22384 = bits(_T_22383, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22385 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22386 = eq(_T_22385, UInt<7>("h068")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22387 = bits(_T_22386, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22388 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22389 = eq(_T_22388, UInt<7>("h069")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22390 = bits(_T_22389, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22391 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
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node _T_22392 = eq(_T_22391, UInt<7>("h06a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22393 = bits(_T_22392, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
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node _T_22394 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
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node _T_22395 = eq(_T_22394, UInt<7>("h06b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22396 = bits(_T_22395, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22397 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
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node _T_22398 = eq(_T_22397, UInt<7>("h06c")) @[el2_ifu_bp_ctl.scala 383:112]
|
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node _T_22399 = bits(_T_22398, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22400 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22401 = eq(_T_22400, UInt<7>("h06d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22402 = bits(_T_22401, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22403 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22404 = eq(_T_22403, UInt<7>("h06e")) @[el2_ifu_bp_ctl.scala 383:112]
|
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node _T_22405 = bits(_T_22404, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22406 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22407 = eq(_T_22406, UInt<7>("h06f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22408 = bits(_T_22407, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22409 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22410 = eq(_T_22409, UInt<7>("h070")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22411 = bits(_T_22410, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22412 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22413 = eq(_T_22412, UInt<7>("h071")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22414 = bits(_T_22413, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22415 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22416 = eq(_T_22415, UInt<7>("h072")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22417 = bits(_T_22416, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22418 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22419 = eq(_T_22418, UInt<7>("h073")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22420 = bits(_T_22419, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22421 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22422 = eq(_T_22421, UInt<7>("h074")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22423 = bits(_T_22422, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22424 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22425 = eq(_T_22424, UInt<7>("h075")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22426 = bits(_T_22425, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22427 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22428 = eq(_T_22427, UInt<7>("h076")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22429 = bits(_T_22428, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22430 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22431 = eq(_T_22430, UInt<7>("h077")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22432 = bits(_T_22431, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22433 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22434 = eq(_T_22433, UInt<7>("h078")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22435 = bits(_T_22434, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22436 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22437 = eq(_T_22436, UInt<7>("h079")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22438 = bits(_T_22437, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22439 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22440 = eq(_T_22439, UInt<7>("h07a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22441 = bits(_T_22440, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22442 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22443 = eq(_T_22442, UInt<7>("h07b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22444 = bits(_T_22443, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22445 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22446 = eq(_T_22445, UInt<7>("h07c")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22447 = bits(_T_22446, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22448 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22449 = eq(_T_22448, UInt<7>("h07d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22450 = bits(_T_22449, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22451 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22452 = eq(_T_22451, UInt<7>("h07e")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22453 = bits(_T_22452, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22454 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22455 = eq(_T_22454, UInt<7>("h07f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22456 = bits(_T_22455, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22457 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22458 = eq(_T_22457, UInt<8>("h080")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22459 = bits(_T_22458, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22460 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22461 = eq(_T_22460, UInt<8>("h081")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22462 = bits(_T_22461, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22463 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22464 = eq(_T_22463, UInt<8>("h082")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22465 = bits(_T_22464, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22466 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22467 = eq(_T_22466, UInt<8>("h083")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22468 = bits(_T_22467, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22469 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22470 = eq(_T_22469, UInt<8>("h084")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22471 = bits(_T_22470, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22472 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22473 = eq(_T_22472, UInt<8>("h085")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22474 = bits(_T_22473, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22475 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22476 = eq(_T_22475, UInt<8>("h086")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22477 = bits(_T_22476, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22478 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22479 = eq(_T_22478, UInt<8>("h087")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22480 = bits(_T_22479, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22481 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22482 = eq(_T_22481, UInt<8>("h088")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22483 = bits(_T_22482, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22484 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22485 = eq(_T_22484, UInt<8>("h089")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22486 = bits(_T_22485, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22487 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22488 = eq(_T_22487, UInt<8>("h08a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22489 = bits(_T_22488, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22490 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22491 = eq(_T_22490, UInt<8>("h08b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22492 = bits(_T_22491, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22493 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22494 = eq(_T_22493, UInt<8>("h08c")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22495 = bits(_T_22494, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22496 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22497 = eq(_T_22496, UInt<8>("h08d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22498 = bits(_T_22497, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22499 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22500 = eq(_T_22499, UInt<8>("h08e")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22501 = bits(_T_22500, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22502 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22503 = eq(_T_22502, UInt<8>("h08f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22504 = bits(_T_22503, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22505 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22506 = eq(_T_22505, UInt<8>("h090")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22507 = bits(_T_22506, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22508 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22509 = eq(_T_22508, UInt<8>("h091")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22510 = bits(_T_22509, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22511 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22512 = eq(_T_22511, UInt<8>("h092")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22513 = bits(_T_22512, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22514 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22515 = eq(_T_22514, UInt<8>("h093")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22516 = bits(_T_22515, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22517 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22518 = eq(_T_22517, UInt<8>("h094")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22519 = bits(_T_22518, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22520 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22521 = eq(_T_22520, UInt<8>("h095")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22522 = bits(_T_22521, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22523 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22524 = eq(_T_22523, UInt<8>("h096")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22525 = bits(_T_22524, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22526 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22527 = eq(_T_22526, UInt<8>("h097")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22528 = bits(_T_22527, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22529 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22530 = eq(_T_22529, UInt<8>("h098")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22531 = bits(_T_22530, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22532 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22533 = eq(_T_22532, UInt<8>("h099")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22534 = bits(_T_22533, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22535 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22536 = eq(_T_22535, UInt<8>("h09a")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22537 = bits(_T_22536, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22538 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22539 = eq(_T_22538, UInt<8>("h09b")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22540 = bits(_T_22539, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22541 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22542 = eq(_T_22541, UInt<8>("h09c")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22543 = bits(_T_22542, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22544 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22545 = eq(_T_22544, UInt<8>("h09d")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22546 = bits(_T_22545, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22547 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22548 = eq(_T_22547, UInt<8>("h09e")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22549 = bits(_T_22548, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22550 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22551 = eq(_T_22550, UInt<8>("h09f")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22552 = bits(_T_22551, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22553 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22554 = eq(_T_22553, UInt<8>("h0a0")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22555 = bits(_T_22554, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22556 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22557 = eq(_T_22556, UInt<8>("h0a1")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22558 = bits(_T_22557, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22559 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22560 = eq(_T_22559, UInt<8>("h0a2")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22561 = bits(_T_22560, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22562 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22563 = eq(_T_22562, UInt<8>("h0a3")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22564 = bits(_T_22563, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22565 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22566 = eq(_T_22565, UInt<8>("h0a4")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22567 = bits(_T_22566, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22568 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22569 = eq(_T_22568, UInt<8>("h0a5")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22570 = bits(_T_22569, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22571 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22572 = eq(_T_22571, UInt<8>("h0a6")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22573 = bits(_T_22572, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22574 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22575 = eq(_T_22574, UInt<8>("h0a7")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22576 = bits(_T_22575, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22577 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22578 = eq(_T_22577, UInt<8>("h0a8")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22579 = bits(_T_22578, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22580 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22581 = eq(_T_22580, UInt<8>("h0a9")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22582 = bits(_T_22581, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22583 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22584 = eq(_T_22583, UInt<8>("h0aa")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22585 = bits(_T_22584, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22586 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22587 = eq(_T_22586, UInt<8>("h0ab")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22588 = bits(_T_22587, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22589 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22590 = eq(_T_22589, UInt<8>("h0ac")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22591 = bits(_T_22590, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22592 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22593 = eq(_T_22592, UInt<8>("h0ad")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22594 = bits(_T_22593, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22595 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22596 = eq(_T_22595, UInt<8>("h0ae")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22597 = bits(_T_22596, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22598 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22599 = eq(_T_22598, UInt<8>("h0af")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22600 = bits(_T_22599, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22601 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22602 = eq(_T_22601, UInt<8>("h0b0")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22603 = bits(_T_22602, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22604 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22605 = eq(_T_22604, UInt<8>("h0b1")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22606 = bits(_T_22605, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22607 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22608 = eq(_T_22607, UInt<8>("h0b2")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22609 = bits(_T_22608, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22610 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22611 = eq(_T_22610, UInt<8>("h0b3")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22612 = bits(_T_22611, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22613 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22614 = eq(_T_22613, UInt<8>("h0b4")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22615 = bits(_T_22614, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22616 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22617 = eq(_T_22616, UInt<8>("h0b5")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22618 = bits(_T_22617, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22619 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22620 = eq(_T_22619, UInt<8>("h0b6")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22621 = bits(_T_22620, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22622 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22623 = eq(_T_22622, UInt<8>("h0b7")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22624 = bits(_T_22623, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22625 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22626 = eq(_T_22625, UInt<8>("h0b8")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22627 = bits(_T_22626, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22628 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22629 = eq(_T_22628, UInt<8>("h0b9")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22630 = bits(_T_22629, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22631 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22632 = eq(_T_22631, UInt<8>("h0ba")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22633 = bits(_T_22632, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22634 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22635 = eq(_T_22634, UInt<8>("h0bb")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22636 = bits(_T_22635, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22637 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22638 = eq(_T_22637, UInt<8>("h0bc")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22639 = bits(_T_22638, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22640 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22641 = eq(_T_22640, UInt<8>("h0bd")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22642 = bits(_T_22641, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22643 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22644 = eq(_T_22643, UInt<8>("h0be")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22645 = bits(_T_22644, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22646 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22647 = eq(_T_22646, UInt<8>("h0bf")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22648 = bits(_T_22647, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22649 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22650 = eq(_T_22649, UInt<8>("h0c0")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22651 = bits(_T_22650, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22652 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22653 = eq(_T_22652, UInt<8>("h0c1")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22654 = bits(_T_22653, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22655 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22656 = eq(_T_22655, UInt<8>("h0c2")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22657 = bits(_T_22656, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22658 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22659 = eq(_T_22658, UInt<8>("h0c3")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22660 = bits(_T_22659, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22661 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22662 = eq(_T_22661, UInt<8>("h0c4")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22663 = bits(_T_22662, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22664 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22665 = eq(_T_22664, UInt<8>("h0c5")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22666 = bits(_T_22665, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22667 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22668 = eq(_T_22667, UInt<8>("h0c6")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22669 = bits(_T_22668, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22670 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22671 = eq(_T_22670, UInt<8>("h0c7")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22672 = bits(_T_22671, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22673 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22674 = eq(_T_22673, UInt<8>("h0c8")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22675 = bits(_T_22674, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22676 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22677 = eq(_T_22676, UInt<8>("h0c9")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22678 = bits(_T_22677, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22679 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22680 = eq(_T_22679, UInt<8>("h0ca")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22681 = bits(_T_22680, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22682 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22683 = eq(_T_22682, UInt<8>("h0cb")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22684 = bits(_T_22683, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22685 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22686 = eq(_T_22685, UInt<8>("h0cc")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22687 = bits(_T_22686, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22688 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22689 = eq(_T_22688, UInt<8>("h0cd")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22690 = bits(_T_22689, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22691 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22692 = eq(_T_22691, UInt<8>("h0ce")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22693 = bits(_T_22692, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22694 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22695 = eq(_T_22694, UInt<8>("h0cf")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22696 = bits(_T_22695, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22697 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22698 = eq(_T_22697, UInt<8>("h0d0")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22699 = bits(_T_22698, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22700 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22701 = eq(_T_22700, UInt<8>("h0d1")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22702 = bits(_T_22701, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22703 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22704 = eq(_T_22703, UInt<8>("h0d2")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22705 = bits(_T_22704, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22706 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22707 = eq(_T_22706, UInt<8>("h0d3")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22708 = bits(_T_22707, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22709 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22710 = eq(_T_22709, UInt<8>("h0d4")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22711 = bits(_T_22710, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22712 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22713 = eq(_T_22712, UInt<8>("h0d5")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22714 = bits(_T_22713, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22715 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22716 = eq(_T_22715, UInt<8>("h0d6")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22717 = bits(_T_22716, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22718 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22719 = eq(_T_22718, UInt<8>("h0d7")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22720 = bits(_T_22719, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22721 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22722 = eq(_T_22721, UInt<8>("h0d8")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22723 = bits(_T_22722, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22724 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22725 = eq(_T_22724, UInt<8>("h0d9")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22726 = bits(_T_22725, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22727 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22728 = eq(_T_22727, UInt<8>("h0da")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22729 = bits(_T_22728, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22730 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22731 = eq(_T_22730, UInt<8>("h0db")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22732 = bits(_T_22731, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22733 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22734 = eq(_T_22733, UInt<8>("h0dc")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22735 = bits(_T_22734, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22736 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22737 = eq(_T_22736, UInt<8>("h0dd")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22738 = bits(_T_22737, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22739 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22740 = eq(_T_22739, UInt<8>("h0de")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22741 = bits(_T_22740, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22742 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22743 = eq(_T_22742, UInt<8>("h0df")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22744 = bits(_T_22743, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22745 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22746 = eq(_T_22745, UInt<8>("h0e0")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22747 = bits(_T_22746, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22748 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22749 = eq(_T_22748, UInt<8>("h0e1")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22750 = bits(_T_22749, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22751 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22752 = eq(_T_22751, UInt<8>("h0e2")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22753 = bits(_T_22752, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22754 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22755 = eq(_T_22754, UInt<8>("h0e3")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22756 = bits(_T_22755, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22757 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22758 = eq(_T_22757, UInt<8>("h0e4")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22759 = bits(_T_22758, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22760 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22761 = eq(_T_22760, UInt<8>("h0e5")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22762 = bits(_T_22761, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22763 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22764 = eq(_T_22763, UInt<8>("h0e6")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22765 = bits(_T_22764, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22766 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22767 = eq(_T_22766, UInt<8>("h0e7")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22768 = bits(_T_22767, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22769 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22770 = eq(_T_22769, UInt<8>("h0e8")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22771 = bits(_T_22770, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22772 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22773 = eq(_T_22772, UInt<8>("h0e9")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22774 = bits(_T_22773, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22775 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22776 = eq(_T_22775, UInt<8>("h0ea")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22777 = bits(_T_22776, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22778 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22779 = eq(_T_22778, UInt<8>("h0eb")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22780 = bits(_T_22779, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22781 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22782 = eq(_T_22781, UInt<8>("h0ec")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22783 = bits(_T_22782, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22784 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22785 = eq(_T_22784, UInt<8>("h0ed")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22786 = bits(_T_22785, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22787 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22788 = eq(_T_22787, UInt<8>("h0ee")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22789 = bits(_T_22788, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22790 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22791 = eq(_T_22790, UInt<8>("h0ef")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22792 = bits(_T_22791, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22793 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22794 = eq(_T_22793, UInt<8>("h0f0")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22795 = bits(_T_22794, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22796 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22797 = eq(_T_22796, UInt<8>("h0f1")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22798 = bits(_T_22797, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22799 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22800 = eq(_T_22799, UInt<8>("h0f2")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22801 = bits(_T_22800, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22802 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22803 = eq(_T_22802, UInt<8>("h0f3")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22804 = bits(_T_22803, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22805 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22806 = eq(_T_22805, UInt<8>("h0f4")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22807 = bits(_T_22806, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22808 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22809 = eq(_T_22808, UInt<8>("h0f5")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22810 = bits(_T_22809, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22811 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22812 = eq(_T_22811, UInt<8>("h0f6")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22813 = bits(_T_22812, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22814 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22815 = eq(_T_22814, UInt<8>("h0f7")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22816 = bits(_T_22815, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22817 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22818 = eq(_T_22817, UInt<8>("h0f8")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22819 = bits(_T_22818, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22820 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22821 = eq(_T_22820, UInt<8>("h0f9")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22822 = bits(_T_22821, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22823 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22824 = eq(_T_22823, UInt<8>("h0fa")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22825 = bits(_T_22824, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22826 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22827 = eq(_T_22826, UInt<8>("h0fb")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22828 = bits(_T_22827, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22829 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22830 = eq(_T_22829, UInt<8>("h0fc")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22831 = bits(_T_22830, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22832 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22833 = eq(_T_22832, UInt<8>("h0fd")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22834 = bits(_T_22833, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22835 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22836 = eq(_T_22835, UInt<8>("h0fe")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22837 = bits(_T_22836, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22838 = bits(bht_rd_addr_hashed_p1_f, 7, 0) @[el2_ifu_bp_ctl.scala 383:85]
|
|
node _T_22839 = eq(_T_22838, UInt<8>("h0ff")) @[el2_ifu_bp_ctl.scala 383:112]
|
|
node _T_22840 = bits(_T_22839, 0, 0) @[el2_ifu_bp_ctl.scala 383:120]
|
|
node _T_22841 = mux(_T_22075, bht_bank_rd_data_out[1][0], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22842 = mux(_T_22078, bht_bank_rd_data_out[1][1], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22843 = mux(_T_22081, bht_bank_rd_data_out[1][2], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22844 = mux(_T_22084, bht_bank_rd_data_out[1][3], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22845 = mux(_T_22087, bht_bank_rd_data_out[1][4], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22846 = mux(_T_22090, bht_bank_rd_data_out[1][5], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22847 = mux(_T_22093, bht_bank_rd_data_out[1][6], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22848 = mux(_T_22096, bht_bank_rd_data_out[1][7], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22849 = mux(_T_22099, bht_bank_rd_data_out[1][8], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22850 = mux(_T_22102, bht_bank_rd_data_out[1][9], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22851 = mux(_T_22105, bht_bank_rd_data_out[1][10], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22852 = mux(_T_22108, bht_bank_rd_data_out[1][11], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22853 = mux(_T_22111, bht_bank_rd_data_out[1][12], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22854 = mux(_T_22114, bht_bank_rd_data_out[1][13], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22855 = mux(_T_22117, bht_bank_rd_data_out[1][14], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22856 = mux(_T_22120, bht_bank_rd_data_out[1][15], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22857 = mux(_T_22123, bht_bank_rd_data_out[1][16], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22858 = mux(_T_22126, bht_bank_rd_data_out[1][17], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22859 = mux(_T_22129, bht_bank_rd_data_out[1][18], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22860 = mux(_T_22132, bht_bank_rd_data_out[1][19], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22861 = mux(_T_22135, bht_bank_rd_data_out[1][20], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22862 = mux(_T_22138, bht_bank_rd_data_out[1][21], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22863 = mux(_T_22141, bht_bank_rd_data_out[1][22], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22864 = mux(_T_22144, bht_bank_rd_data_out[1][23], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22865 = mux(_T_22147, bht_bank_rd_data_out[1][24], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22866 = mux(_T_22150, bht_bank_rd_data_out[1][25], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22867 = mux(_T_22153, bht_bank_rd_data_out[1][26], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22868 = mux(_T_22156, bht_bank_rd_data_out[1][27], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22869 = mux(_T_22159, bht_bank_rd_data_out[1][28], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22870 = mux(_T_22162, bht_bank_rd_data_out[1][29], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22871 = mux(_T_22165, bht_bank_rd_data_out[1][30], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22872 = mux(_T_22168, bht_bank_rd_data_out[1][31], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22873 = mux(_T_22171, bht_bank_rd_data_out[1][32], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22874 = mux(_T_22174, bht_bank_rd_data_out[1][33], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22875 = mux(_T_22177, bht_bank_rd_data_out[1][34], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22876 = mux(_T_22180, bht_bank_rd_data_out[1][35], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22877 = mux(_T_22183, bht_bank_rd_data_out[1][36], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22878 = mux(_T_22186, bht_bank_rd_data_out[1][37], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22879 = mux(_T_22189, bht_bank_rd_data_out[1][38], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22880 = mux(_T_22192, bht_bank_rd_data_out[1][39], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22881 = mux(_T_22195, bht_bank_rd_data_out[1][40], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22882 = mux(_T_22198, bht_bank_rd_data_out[1][41], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22883 = mux(_T_22201, bht_bank_rd_data_out[1][42], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22884 = mux(_T_22204, bht_bank_rd_data_out[1][43], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22885 = mux(_T_22207, bht_bank_rd_data_out[1][44], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22886 = mux(_T_22210, bht_bank_rd_data_out[1][45], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22887 = mux(_T_22213, bht_bank_rd_data_out[1][46], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22888 = mux(_T_22216, bht_bank_rd_data_out[1][47], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22889 = mux(_T_22219, bht_bank_rd_data_out[1][48], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22890 = mux(_T_22222, bht_bank_rd_data_out[1][49], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22891 = mux(_T_22225, bht_bank_rd_data_out[1][50], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22892 = mux(_T_22228, bht_bank_rd_data_out[1][51], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22893 = mux(_T_22231, bht_bank_rd_data_out[1][52], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22894 = mux(_T_22234, bht_bank_rd_data_out[1][53], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22895 = mux(_T_22237, bht_bank_rd_data_out[1][54], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22896 = mux(_T_22240, bht_bank_rd_data_out[1][55], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22897 = mux(_T_22243, bht_bank_rd_data_out[1][56], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22898 = mux(_T_22246, bht_bank_rd_data_out[1][57], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22899 = mux(_T_22249, bht_bank_rd_data_out[1][58], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22900 = mux(_T_22252, bht_bank_rd_data_out[1][59], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22901 = mux(_T_22255, bht_bank_rd_data_out[1][60], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22902 = mux(_T_22258, bht_bank_rd_data_out[1][61], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22903 = mux(_T_22261, bht_bank_rd_data_out[1][62], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22904 = mux(_T_22264, bht_bank_rd_data_out[1][63], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22905 = mux(_T_22267, bht_bank_rd_data_out[1][64], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22906 = mux(_T_22270, bht_bank_rd_data_out[1][65], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22907 = mux(_T_22273, bht_bank_rd_data_out[1][66], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22908 = mux(_T_22276, bht_bank_rd_data_out[1][67], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22909 = mux(_T_22279, bht_bank_rd_data_out[1][68], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22910 = mux(_T_22282, bht_bank_rd_data_out[1][69], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22911 = mux(_T_22285, bht_bank_rd_data_out[1][70], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22912 = mux(_T_22288, bht_bank_rd_data_out[1][71], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22913 = mux(_T_22291, bht_bank_rd_data_out[1][72], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22914 = mux(_T_22294, bht_bank_rd_data_out[1][73], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22915 = mux(_T_22297, bht_bank_rd_data_out[1][74], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22916 = mux(_T_22300, bht_bank_rd_data_out[1][75], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22917 = mux(_T_22303, bht_bank_rd_data_out[1][76], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22918 = mux(_T_22306, bht_bank_rd_data_out[1][77], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22919 = mux(_T_22309, bht_bank_rd_data_out[1][78], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22920 = mux(_T_22312, bht_bank_rd_data_out[1][79], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22921 = mux(_T_22315, bht_bank_rd_data_out[1][80], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22922 = mux(_T_22318, bht_bank_rd_data_out[1][81], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22923 = mux(_T_22321, bht_bank_rd_data_out[1][82], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22924 = mux(_T_22324, bht_bank_rd_data_out[1][83], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22925 = mux(_T_22327, bht_bank_rd_data_out[1][84], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22926 = mux(_T_22330, bht_bank_rd_data_out[1][85], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22927 = mux(_T_22333, bht_bank_rd_data_out[1][86], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22928 = mux(_T_22336, bht_bank_rd_data_out[1][87], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22929 = mux(_T_22339, bht_bank_rd_data_out[1][88], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22930 = mux(_T_22342, bht_bank_rd_data_out[1][89], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22931 = mux(_T_22345, bht_bank_rd_data_out[1][90], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22932 = mux(_T_22348, bht_bank_rd_data_out[1][91], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22933 = mux(_T_22351, bht_bank_rd_data_out[1][92], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22934 = mux(_T_22354, bht_bank_rd_data_out[1][93], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22935 = mux(_T_22357, bht_bank_rd_data_out[1][94], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22936 = mux(_T_22360, bht_bank_rd_data_out[1][95], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22937 = mux(_T_22363, bht_bank_rd_data_out[1][96], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22938 = mux(_T_22366, bht_bank_rd_data_out[1][97], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22939 = mux(_T_22369, bht_bank_rd_data_out[1][98], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22940 = mux(_T_22372, bht_bank_rd_data_out[1][99], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22941 = mux(_T_22375, bht_bank_rd_data_out[1][100], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22942 = mux(_T_22378, bht_bank_rd_data_out[1][101], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22943 = mux(_T_22381, bht_bank_rd_data_out[1][102], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22944 = mux(_T_22384, bht_bank_rd_data_out[1][103], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22945 = mux(_T_22387, bht_bank_rd_data_out[1][104], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22946 = mux(_T_22390, bht_bank_rd_data_out[1][105], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22947 = mux(_T_22393, bht_bank_rd_data_out[1][106], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22948 = mux(_T_22396, bht_bank_rd_data_out[1][107], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22949 = mux(_T_22399, bht_bank_rd_data_out[1][108], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22950 = mux(_T_22402, bht_bank_rd_data_out[1][109], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22951 = mux(_T_22405, bht_bank_rd_data_out[1][110], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22952 = mux(_T_22408, bht_bank_rd_data_out[1][111], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22953 = mux(_T_22411, bht_bank_rd_data_out[1][112], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22954 = mux(_T_22414, bht_bank_rd_data_out[1][113], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22955 = mux(_T_22417, bht_bank_rd_data_out[1][114], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22956 = mux(_T_22420, bht_bank_rd_data_out[1][115], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22957 = mux(_T_22423, bht_bank_rd_data_out[1][116], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22958 = mux(_T_22426, bht_bank_rd_data_out[1][117], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22959 = mux(_T_22429, bht_bank_rd_data_out[1][118], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22960 = mux(_T_22432, bht_bank_rd_data_out[1][119], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22961 = mux(_T_22435, bht_bank_rd_data_out[1][120], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22962 = mux(_T_22438, bht_bank_rd_data_out[1][121], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22963 = mux(_T_22441, bht_bank_rd_data_out[1][122], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22964 = mux(_T_22444, bht_bank_rd_data_out[1][123], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22965 = mux(_T_22447, bht_bank_rd_data_out[1][124], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22966 = mux(_T_22450, bht_bank_rd_data_out[1][125], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22967 = mux(_T_22453, bht_bank_rd_data_out[1][126], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22968 = mux(_T_22456, bht_bank_rd_data_out[1][127], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22969 = mux(_T_22459, bht_bank_rd_data_out[1][128], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22970 = mux(_T_22462, bht_bank_rd_data_out[1][129], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22971 = mux(_T_22465, bht_bank_rd_data_out[1][130], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22972 = mux(_T_22468, bht_bank_rd_data_out[1][131], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22973 = mux(_T_22471, bht_bank_rd_data_out[1][132], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22974 = mux(_T_22474, bht_bank_rd_data_out[1][133], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22975 = mux(_T_22477, bht_bank_rd_data_out[1][134], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22976 = mux(_T_22480, bht_bank_rd_data_out[1][135], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22977 = mux(_T_22483, bht_bank_rd_data_out[1][136], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22978 = mux(_T_22486, bht_bank_rd_data_out[1][137], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22979 = mux(_T_22489, bht_bank_rd_data_out[1][138], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22980 = mux(_T_22492, bht_bank_rd_data_out[1][139], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22981 = mux(_T_22495, bht_bank_rd_data_out[1][140], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22982 = mux(_T_22498, bht_bank_rd_data_out[1][141], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22983 = mux(_T_22501, bht_bank_rd_data_out[1][142], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22984 = mux(_T_22504, bht_bank_rd_data_out[1][143], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22985 = mux(_T_22507, bht_bank_rd_data_out[1][144], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22986 = mux(_T_22510, bht_bank_rd_data_out[1][145], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22987 = mux(_T_22513, bht_bank_rd_data_out[1][146], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22988 = mux(_T_22516, bht_bank_rd_data_out[1][147], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22989 = mux(_T_22519, bht_bank_rd_data_out[1][148], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22990 = mux(_T_22522, bht_bank_rd_data_out[1][149], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22991 = mux(_T_22525, bht_bank_rd_data_out[1][150], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22992 = mux(_T_22528, bht_bank_rd_data_out[1][151], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22993 = mux(_T_22531, bht_bank_rd_data_out[1][152], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22994 = mux(_T_22534, bht_bank_rd_data_out[1][153], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22995 = mux(_T_22537, bht_bank_rd_data_out[1][154], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22996 = mux(_T_22540, bht_bank_rd_data_out[1][155], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22997 = mux(_T_22543, bht_bank_rd_data_out[1][156], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22998 = mux(_T_22546, bht_bank_rd_data_out[1][157], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_22999 = mux(_T_22549, bht_bank_rd_data_out[1][158], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23000 = mux(_T_22552, bht_bank_rd_data_out[1][159], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23001 = mux(_T_22555, bht_bank_rd_data_out[1][160], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23002 = mux(_T_22558, bht_bank_rd_data_out[1][161], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23003 = mux(_T_22561, bht_bank_rd_data_out[1][162], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23004 = mux(_T_22564, bht_bank_rd_data_out[1][163], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23005 = mux(_T_22567, bht_bank_rd_data_out[1][164], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23006 = mux(_T_22570, bht_bank_rd_data_out[1][165], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23007 = mux(_T_22573, bht_bank_rd_data_out[1][166], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23008 = mux(_T_22576, bht_bank_rd_data_out[1][167], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23009 = mux(_T_22579, bht_bank_rd_data_out[1][168], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23010 = mux(_T_22582, bht_bank_rd_data_out[1][169], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23011 = mux(_T_22585, bht_bank_rd_data_out[1][170], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23012 = mux(_T_22588, bht_bank_rd_data_out[1][171], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23013 = mux(_T_22591, bht_bank_rd_data_out[1][172], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23014 = mux(_T_22594, bht_bank_rd_data_out[1][173], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23015 = mux(_T_22597, bht_bank_rd_data_out[1][174], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23016 = mux(_T_22600, bht_bank_rd_data_out[1][175], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23017 = mux(_T_22603, bht_bank_rd_data_out[1][176], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23018 = mux(_T_22606, bht_bank_rd_data_out[1][177], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23019 = mux(_T_22609, bht_bank_rd_data_out[1][178], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23020 = mux(_T_22612, bht_bank_rd_data_out[1][179], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23021 = mux(_T_22615, bht_bank_rd_data_out[1][180], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23022 = mux(_T_22618, bht_bank_rd_data_out[1][181], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23023 = mux(_T_22621, bht_bank_rd_data_out[1][182], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23024 = mux(_T_22624, bht_bank_rd_data_out[1][183], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23025 = mux(_T_22627, bht_bank_rd_data_out[1][184], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23026 = mux(_T_22630, bht_bank_rd_data_out[1][185], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23027 = mux(_T_22633, bht_bank_rd_data_out[1][186], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23028 = mux(_T_22636, bht_bank_rd_data_out[1][187], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23029 = mux(_T_22639, bht_bank_rd_data_out[1][188], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23030 = mux(_T_22642, bht_bank_rd_data_out[1][189], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23031 = mux(_T_22645, bht_bank_rd_data_out[1][190], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23032 = mux(_T_22648, bht_bank_rd_data_out[1][191], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23033 = mux(_T_22651, bht_bank_rd_data_out[1][192], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23034 = mux(_T_22654, bht_bank_rd_data_out[1][193], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23035 = mux(_T_22657, bht_bank_rd_data_out[1][194], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23036 = mux(_T_22660, bht_bank_rd_data_out[1][195], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23037 = mux(_T_22663, bht_bank_rd_data_out[1][196], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23038 = mux(_T_22666, bht_bank_rd_data_out[1][197], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23039 = mux(_T_22669, bht_bank_rd_data_out[1][198], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23040 = mux(_T_22672, bht_bank_rd_data_out[1][199], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23041 = mux(_T_22675, bht_bank_rd_data_out[1][200], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23042 = mux(_T_22678, bht_bank_rd_data_out[1][201], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23043 = mux(_T_22681, bht_bank_rd_data_out[1][202], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23044 = mux(_T_22684, bht_bank_rd_data_out[1][203], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23045 = mux(_T_22687, bht_bank_rd_data_out[1][204], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23046 = mux(_T_22690, bht_bank_rd_data_out[1][205], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23047 = mux(_T_22693, bht_bank_rd_data_out[1][206], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23048 = mux(_T_22696, bht_bank_rd_data_out[1][207], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23049 = mux(_T_22699, bht_bank_rd_data_out[1][208], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23050 = mux(_T_22702, bht_bank_rd_data_out[1][209], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23051 = mux(_T_22705, bht_bank_rd_data_out[1][210], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23052 = mux(_T_22708, bht_bank_rd_data_out[1][211], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23053 = mux(_T_22711, bht_bank_rd_data_out[1][212], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23054 = mux(_T_22714, bht_bank_rd_data_out[1][213], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23055 = mux(_T_22717, bht_bank_rd_data_out[1][214], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23056 = mux(_T_22720, bht_bank_rd_data_out[1][215], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23057 = mux(_T_22723, bht_bank_rd_data_out[1][216], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23058 = mux(_T_22726, bht_bank_rd_data_out[1][217], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23059 = mux(_T_22729, bht_bank_rd_data_out[1][218], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23060 = mux(_T_22732, bht_bank_rd_data_out[1][219], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23061 = mux(_T_22735, bht_bank_rd_data_out[1][220], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23062 = mux(_T_22738, bht_bank_rd_data_out[1][221], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23063 = mux(_T_22741, bht_bank_rd_data_out[1][222], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23064 = mux(_T_22744, bht_bank_rd_data_out[1][223], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23065 = mux(_T_22747, bht_bank_rd_data_out[1][224], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23066 = mux(_T_22750, bht_bank_rd_data_out[1][225], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23067 = mux(_T_22753, bht_bank_rd_data_out[1][226], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23068 = mux(_T_22756, bht_bank_rd_data_out[1][227], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23069 = mux(_T_22759, bht_bank_rd_data_out[1][228], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23070 = mux(_T_22762, bht_bank_rd_data_out[1][229], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23071 = mux(_T_22765, bht_bank_rd_data_out[1][230], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23072 = mux(_T_22768, bht_bank_rd_data_out[1][231], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23073 = mux(_T_22771, bht_bank_rd_data_out[1][232], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23074 = mux(_T_22774, bht_bank_rd_data_out[1][233], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23075 = mux(_T_22777, bht_bank_rd_data_out[1][234], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23076 = mux(_T_22780, bht_bank_rd_data_out[1][235], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23077 = mux(_T_22783, bht_bank_rd_data_out[1][236], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23078 = mux(_T_22786, bht_bank_rd_data_out[1][237], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23079 = mux(_T_22789, bht_bank_rd_data_out[1][238], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23080 = mux(_T_22792, bht_bank_rd_data_out[1][239], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23081 = mux(_T_22795, bht_bank_rd_data_out[1][240], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23082 = mux(_T_22798, bht_bank_rd_data_out[1][241], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23083 = mux(_T_22801, bht_bank_rd_data_out[1][242], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23084 = mux(_T_22804, bht_bank_rd_data_out[1][243], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23085 = mux(_T_22807, bht_bank_rd_data_out[1][244], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23086 = mux(_T_22810, bht_bank_rd_data_out[1][245], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23087 = mux(_T_22813, bht_bank_rd_data_out[1][246], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23088 = mux(_T_22816, bht_bank_rd_data_out[1][247], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23089 = mux(_T_22819, bht_bank_rd_data_out[1][248], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23090 = mux(_T_22822, bht_bank_rd_data_out[1][249], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23091 = mux(_T_22825, bht_bank_rd_data_out[1][250], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23092 = mux(_T_22828, bht_bank_rd_data_out[1][251], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23093 = mux(_T_22831, bht_bank_rd_data_out[1][252], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23094 = mux(_T_22834, bht_bank_rd_data_out[1][253], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23095 = mux(_T_22837, bht_bank_rd_data_out[1][254], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23096 = mux(_T_22840, bht_bank_rd_data_out[1][255], UInt<1>("h00")) @[Mux.scala 27:72]
|
|
node _T_23097 = or(_T_22841, _T_22842) @[Mux.scala 27:72]
|
|
node _T_23098 = or(_T_23097, _T_22843) @[Mux.scala 27:72]
|
|
node _T_23099 = or(_T_23098, _T_22844) @[Mux.scala 27:72]
|
|
node _T_23100 = or(_T_23099, _T_22845) @[Mux.scala 27:72]
|
|
node _T_23101 = or(_T_23100, _T_22846) @[Mux.scala 27:72]
|
|
node _T_23102 = or(_T_23101, _T_22847) @[Mux.scala 27:72]
|
|
node _T_23103 = or(_T_23102, _T_22848) @[Mux.scala 27:72]
|
|
node _T_23104 = or(_T_23103, _T_22849) @[Mux.scala 27:72]
|
|
node _T_23105 = or(_T_23104, _T_22850) @[Mux.scala 27:72]
|
|
node _T_23106 = or(_T_23105, _T_22851) @[Mux.scala 27:72]
|
|
node _T_23107 = or(_T_23106, _T_22852) @[Mux.scala 27:72]
|
|
node _T_23108 = or(_T_23107, _T_22853) @[Mux.scala 27:72]
|
|
node _T_23109 = or(_T_23108, _T_22854) @[Mux.scala 27:72]
|
|
node _T_23110 = or(_T_23109, _T_22855) @[Mux.scala 27:72]
|
|
node _T_23111 = or(_T_23110, _T_22856) @[Mux.scala 27:72]
|
|
node _T_23112 = or(_T_23111, _T_22857) @[Mux.scala 27:72]
|
|
node _T_23113 = or(_T_23112, _T_22858) @[Mux.scala 27:72]
|
|
node _T_23114 = or(_T_23113, _T_22859) @[Mux.scala 27:72]
|
|
node _T_23115 = or(_T_23114, _T_22860) @[Mux.scala 27:72]
|
|
node _T_23116 = or(_T_23115, _T_22861) @[Mux.scala 27:72]
|
|
node _T_23117 = or(_T_23116, _T_22862) @[Mux.scala 27:72]
|
|
node _T_23118 = or(_T_23117, _T_22863) @[Mux.scala 27:72]
|
|
node _T_23119 = or(_T_23118, _T_22864) @[Mux.scala 27:72]
|
|
node _T_23120 = or(_T_23119, _T_22865) @[Mux.scala 27:72]
|
|
node _T_23121 = or(_T_23120, _T_22866) @[Mux.scala 27:72]
|
|
node _T_23122 = or(_T_23121, _T_22867) @[Mux.scala 27:72]
|
|
node _T_23123 = or(_T_23122, _T_22868) @[Mux.scala 27:72]
|
|
node _T_23124 = or(_T_23123, _T_22869) @[Mux.scala 27:72]
|
|
node _T_23125 = or(_T_23124, _T_22870) @[Mux.scala 27:72]
|
|
node _T_23126 = or(_T_23125, _T_22871) @[Mux.scala 27:72]
|
|
node _T_23127 = or(_T_23126, _T_22872) @[Mux.scala 27:72]
|
|
node _T_23128 = or(_T_23127, _T_22873) @[Mux.scala 27:72]
|
|
node _T_23129 = or(_T_23128, _T_22874) @[Mux.scala 27:72]
|
|
node _T_23130 = or(_T_23129, _T_22875) @[Mux.scala 27:72]
|
|
node _T_23131 = or(_T_23130, _T_22876) @[Mux.scala 27:72]
|
|
node _T_23132 = or(_T_23131, _T_22877) @[Mux.scala 27:72]
|
|
node _T_23133 = or(_T_23132, _T_22878) @[Mux.scala 27:72]
|
|
node _T_23134 = or(_T_23133, _T_22879) @[Mux.scala 27:72]
|
|
node _T_23135 = or(_T_23134, _T_22880) @[Mux.scala 27:72]
|
|
node _T_23136 = or(_T_23135, _T_22881) @[Mux.scala 27:72]
|
|
node _T_23137 = or(_T_23136, _T_22882) @[Mux.scala 27:72]
|
|
node _T_23138 = or(_T_23137, _T_22883) @[Mux.scala 27:72]
|
|
node _T_23139 = or(_T_23138, _T_22884) @[Mux.scala 27:72]
|
|
node _T_23140 = or(_T_23139, _T_22885) @[Mux.scala 27:72]
|
|
node _T_23141 = or(_T_23140, _T_22886) @[Mux.scala 27:72]
|
|
node _T_23142 = or(_T_23141, _T_22887) @[Mux.scala 27:72]
|
|
node _T_23143 = or(_T_23142, _T_22888) @[Mux.scala 27:72]
|
|
node _T_23144 = or(_T_23143, _T_22889) @[Mux.scala 27:72]
|
|
node _T_23145 = or(_T_23144, _T_22890) @[Mux.scala 27:72]
|
|
node _T_23146 = or(_T_23145, _T_22891) @[Mux.scala 27:72]
|
|
node _T_23147 = or(_T_23146, _T_22892) @[Mux.scala 27:72]
|
|
node _T_23148 = or(_T_23147, _T_22893) @[Mux.scala 27:72]
|
|
node _T_23149 = or(_T_23148, _T_22894) @[Mux.scala 27:72]
|
|
node _T_23150 = or(_T_23149, _T_22895) @[Mux.scala 27:72]
|
|
node _T_23151 = or(_T_23150, _T_22896) @[Mux.scala 27:72]
|
|
node _T_23152 = or(_T_23151, _T_22897) @[Mux.scala 27:72]
|
|
node _T_23153 = or(_T_23152, _T_22898) @[Mux.scala 27:72]
|
|
node _T_23154 = or(_T_23153, _T_22899) @[Mux.scala 27:72]
|
|
node _T_23155 = or(_T_23154, _T_22900) @[Mux.scala 27:72]
|
|
node _T_23156 = or(_T_23155, _T_22901) @[Mux.scala 27:72]
|
|
node _T_23157 = or(_T_23156, _T_22902) @[Mux.scala 27:72]
|
|
node _T_23158 = or(_T_23157, _T_22903) @[Mux.scala 27:72]
|
|
node _T_23159 = or(_T_23158, _T_22904) @[Mux.scala 27:72]
|
|
node _T_23160 = or(_T_23159, _T_22905) @[Mux.scala 27:72]
|
|
node _T_23161 = or(_T_23160, _T_22906) @[Mux.scala 27:72]
|
|
node _T_23162 = or(_T_23161, _T_22907) @[Mux.scala 27:72]
|
|
node _T_23163 = or(_T_23162, _T_22908) @[Mux.scala 27:72]
|
|
node _T_23164 = or(_T_23163, _T_22909) @[Mux.scala 27:72]
|
|
node _T_23165 = or(_T_23164, _T_22910) @[Mux.scala 27:72]
|
|
node _T_23166 = or(_T_23165, _T_22911) @[Mux.scala 27:72]
|
|
node _T_23167 = or(_T_23166, _T_22912) @[Mux.scala 27:72]
|
|
node _T_23168 = or(_T_23167, _T_22913) @[Mux.scala 27:72]
|
|
node _T_23169 = or(_T_23168, _T_22914) @[Mux.scala 27:72]
|
|
node _T_23170 = or(_T_23169, _T_22915) @[Mux.scala 27:72]
|
|
node _T_23171 = or(_T_23170, _T_22916) @[Mux.scala 27:72]
|
|
node _T_23172 = or(_T_23171, _T_22917) @[Mux.scala 27:72]
|
|
node _T_23173 = or(_T_23172, _T_22918) @[Mux.scala 27:72]
|
|
node _T_23174 = or(_T_23173, _T_22919) @[Mux.scala 27:72]
|
|
node _T_23175 = or(_T_23174, _T_22920) @[Mux.scala 27:72]
|
|
node _T_23176 = or(_T_23175, _T_22921) @[Mux.scala 27:72]
|
|
node _T_23177 = or(_T_23176, _T_22922) @[Mux.scala 27:72]
|
|
node _T_23178 = or(_T_23177, _T_22923) @[Mux.scala 27:72]
|
|
node _T_23179 = or(_T_23178, _T_22924) @[Mux.scala 27:72]
|
|
node _T_23180 = or(_T_23179, _T_22925) @[Mux.scala 27:72]
|
|
node _T_23181 = or(_T_23180, _T_22926) @[Mux.scala 27:72]
|
|
node _T_23182 = or(_T_23181, _T_22927) @[Mux.scala 27:72]
|
|
node _T_23183 = or(_T_23182, _T_22928) @[Mux.scala 27:72]
|
|
node _T_23184 = or(_T_23183, _T_22929) @[Mux.scala 27:72]
|
|
node _T_23185 = or(_T_23184, _T_22930) @[Mux.scala 27:72]
|
|
node _T_23186 = or(_T_23185, _T_22931) @[Mux.scala 27:72]
|
|
node _T_23187 = or(_T_23186, _T_22932) @[Mux.scala 27:72]
|
|
node _T_23188 = or(_T_23187, _T_22933) @[Mux.scala 27:72]
|
|
node _T_23189 = or(_T_23188, _T_22934) @[Mux.scala 27:72]
|
|
node _T_23190 = or(_T_23189, _T_22935) @[Mux.scala 27:72]
|
|
node _T_23191 = or(_T_23190, _T_22936) @[Mux.scala 27:72]
|
|
node _T_23192 = or(_T_23191, _T_22937) @[Mux.scala 27:72]
|
|
node _T_23193 = or(_T_23192, _T_22938) @[Mux.scala 27:72]
|
|
node _T_23194 = or(_T_23193, _T_22939) @[Mux.scala 27:72]
|
|
node _T_23195 = or(_T_23194, _T_22940) @[Mux.scala 27:72]
|
|
node _T_23196 = or(_T_23195, _T_22941) @[Mux.scala 27:72]
|
|
node _T_23197 = or(_T_23196, _T_22942) @[Mux.scala 27:72]
|
|
node _T_23198 = or(_T_23197, _T_22943) @[Mux.scala 27:72]
|
|
node _T_23199 = or(_T_23198, _T_22944) @[Mux.scala 27:72]
|
|
node _T_23200 = or(_T_23199, _T_22945) @[Mux.scala 27:72]
|
|
node _T_23201 = or(_T_23200, _T_22946) @[Mux.scala 27:72]
|
|
node _T_23202 = or(_T_23201, _T_22947) @[Mux.scala 27:72]
|
|
node _T_23203 = or(_T_23202, _T_22948) @[Mux.scala 27:72]
|
|
node _T_23204 = or(_T_23203, _T_22949) @[Mux.scala 27:72]
|
|
node _T_23205 = or(_T_23204, _T_22950) @[Mux.scala 27:72]
|
|
node _T_23206 = or(_T_23205, _T_22951) @[Mux.scala 27:72]
|
|
node _T_23207 = or(_T_23206, _T_22952) @[Mux.scala 27:72]
|
|
node _T_23208 = or(_T_23207, _T_22953) @[Mux.scala 27:72]
|
|
node _T_23209 = or(_T_23208, _T_22954) @[Mux.scala 27:72]
|
|
node _T_23210 = or(_T_23209, _T_22955) @[Mux.scala 27:72]
|
|
node _T_23211 = or(_T_23210, _T_22956) @[Mux.scala 27:72]
|
|
node _T_23212 = or(_T_23211, _T_22957) @[Mux.scala 27:72]
|
|
node _T_23213 = or(_T_23212, _T_22958) @[Mux.scala 27:72]
|
|
node _T_23214 = or(_T_23213, _T_22959) @[Mux.scala 27:72]
|
|
node _T_23215 = or(_T_23214, _T_22960) @[Mux.scala 27:72]
|
|
node _T_23216 = or(_T_23215, _T_22961) @[Mux.scala 27:72]
|
|
node _T_23217 = or(_T_23216, _T_22962) @[Mux.scala 27:72]
|
|
node _T_23218 = or(_T_23217, _T_22963) @[Mux.scala 27:72]
|
|
node _T_23219 = or(_T_23218, _T_22964) @[Mux.scala 27:72]
|
|
node _T_23220 = or(_T_23219, _T_22965) @[Mux.scala 27:72]
|
|
node _T_23221 = or(_T_23220, _T_22966) @[Mux.scala 27:72]
|
|
node _T_23222 = or(_T_23221, _T_22967) @[Mux.scala 27:72]
|
|
node _T_23223 = or(_T_23222, _T_22968) @[Mux.scala 27:72]
|
|
node _T_23224 = or(_T_23223, _T_22969) @[Mux.scala 27:72]
|
|
node _T_23225 = or(_T_23224, _T_22970) @[Mux.scala 27:72]
|
|
node _T_23226 = or(_T_23225, _T_22971) @[Mux.scala 27:72]
|
|
node _T_23227 = or(_T_23226, _T_22972) @[Mux.scala 27:72]
|
|
node _T_23228 = or(_T_23227, _T_22973) @[Mux.scala 27:72]
|
|
node _T_23229 = or(_T_23228, _T_22974) @[Mux.scala 27:72]
|
|
node _T_23230 = or(_T_23229, _T_22975) @[Mux.scala 27:72]
|
|
node _T_23231 = or(_T_23230, _T_22976) @[Mux.scala 27:72]
|
|
node _T_23232 = or(_T_23231, _T_22977) @[Mux.scala 27:72]
|
|
node _T_23233 = or(_T_23232, _T_22978) @[Mux.scala 27:72]
|
|
node _T_23234 = or(_T_23233, _T_22979) @[Mux.scala 27:72]
|
|
node _T_23235 = or(_T_23234, _T_22980) @[Mux.scala 27:72]
|
|
node _T_23236 = or(_T_23235, _T_22981) @[Mux.scala 27:72]
|
|
node _T_23237 = or(_T_23236, _T_22982) @[Mux.scala 27:72]
|
|
node _T_23238 = or(_T_23237, _T_22983) @[Mux.scala 27:72]
|
|
node _T_23239 = or(_T_23238, _T_22984) @[Mux.scala 27:72]
|
|
node _T_23240 = or(_T_23239, _T_22985) @[Mux.scala 27:72]
|
|
node _T_23241 = or(_T_23240, _T_22986) @[Mux.scala 27:72]
|
|
node _T_23242 = or(_T_23241, _T_22987) @[Mux.scala 27:72]
|
|
node _T_23243 = or(_T_23242, _T_22988) @[Mux.scala 27:72]
|
|
node _T_23244 = or(_T_23243, _T_22989) @[Mux.scala 27:72]
|
|
node _T_23245 = or(_T_23244, _T_22990) @[Mux.scala 27:72]
|
|
node _T_23246 = or(_T_23245, _T_22991) @[Mux.scala 27:72]
|
|
node _T_23247 = or(_T_23246, _T_22992) @[Mux.scala 27:72]
|
|
node _T_23248 = or(_T_23247, _T_22993) @[Mux.scala 27:72]
|
|
node _T_23249 = or(_T_23248, _T_22994) @[Mux.scala 27:72]
|
|
node _T_23250 = or(_T_23249, _T_22995) @[Mux.scala 27:72]
|
|
node _T_23251 = or(_T_23250, _T_22996) @[Mux.scala 27:72]
|
|
node _T_23252 = or(_T_23251, _T_22997) @[Mux.scala 27:72]
|
|
node _T_23253 = or(_T_23252, _T_22998) @[Mux.scala 27:72]
|
|
node _T_23254 = or(_T_23253, _T_22999) @[Mux.scala 27:72]
|
|
node _T_23255 = or(_T_23254, _T_23000) @[Mux.scala 27:72]
|
|
node _T_23256 = or(_T_23255, _T_23001) @[Mux.scala 27:72]
|
|
node _T_23257 = or(_T_23256, _T_23002) @[Mux.scala 27:72]
|
|
node _T_23258 = or(_T_23257, _T_23003) @[Mux.scala 27:72]
|
|
node _T_23259 = or(_T_23258, _T_23004) @[Mux.scala 27:72]
|
|
node _T_23260 = or(_T_23259, _T_23005) @[Mux.scala 27:72]
|
|
node _T_23261 = or(_T_23260, _T_23006) @[Mux.scala 27:72]
|
|
node _T_23262 = or(_T_23261, _T_23007) @[Mux.scala 27:72]
|
|
node _T_23263 = or(_T_23262, _T_23008) @[Mux.scala 27:72]
|
|
node _T_23264 = or(_T_23263, _T_23009) @[Mux.scala 27:72]
|
|
node _T_23265 = or(_T_23264, _T_23010) @[Mux.scala 27:72]
|
|
node _T_23266 = or(_T_23265, _T_23011) @[Mux.scala 27:72]
|
|
node _T_23267 = or(_T_23266, _T_23012) @[Mux.scala 27:72]
|
|
node _T_23268 = or(_T_23267, _T_23013) @[Mux.scala 27:72]
|
|
node _T_23269 = or(_T_23268, _T_23014) @[Mux.scala 27:72]
|
|
node _T_23270 = or(_T_23269, _T_23015) @[Mux.scala 27:72]
|
|
node _T_23271 = or(_T_23270, _T_23016) @[Mux.scala 27:72]
|
|
node _T_23272 = or(_T_23271, _T_23017) @[Mux.scala 27:72]
|
|
node _T_23273 = or(_T_23272, _T_23018) @[Mux.scala 27:72]
|
|
node _T_23274 = or(_T_23273, _T_23019) @[Mux.scala 27:72]
|
|
node _T_23275 = or(_T_23274, _T_23020) @[Mux.scala 27:72]
|
|
node _T_23276 = or(_T_23275, _T_23021) @[Mux.scala 27:72]
|
|
node _T_23277 = or(_T_23276, _T_23022) @[Mux.scala 27:72]
|
|
node _T_23278 = or(_T_23277, _T_23023) @[Mux.scala 27:72]
|
|
node _T_23279 = or(_T_23278, _T_23024) @[Mux.scala 27:72]
|
|
node _T_23280 = or(_T_23279, _T_23025) @[Mux.scala 27:72]
|
|
node _T_23281 = or(_T_23280, _T_23026) @[Mux.scala 27:72]
|
|
node _T_23282 = or(_T_23281, _T_23027) @[Mux.scala 27:72]
|
|
node _T_23283 = or(_T_23282, _T_23028) @[Mux.scala 27:72]
|
|
node _T_23284 = or(_T_23283, _T_23029) @[Mux.scala 27:72]
|
|
node _T_23285 = or(_T_23284, _T_23030) @[Mux.scala 27:72]
|
|
node _T_23286 = or(_T_23285, _T_23031) @[Mux.scala 27:72]
|
|
node _T_23287 = or(_T_23286, _T_23032) @[Mux.scala 27:72]
|
|
node _T_23288 = or(_T_23287, _T_23033) @[Mux.scala 27:72]
|
|
node _T_23289 = or(_T_23288, _T_23034) @[Mux.scala 27:72]
|
|
node _T_23290 = or(_T_23289, _T_23035) @[Mux.scala 27:72]
|
|
node _T_23291 = or(_T_23290, _T_23036) @[Mux.scala 27:72]
|
|
node _T_23292 = or(_T_23291, _T_23037) @[Mux.scala 27:72]
|
|
node _T_23293 = or(_T_23292, _T_23038) @[Mux.scala 27:72]
|
|
node _T_23294 = or(_T_23293, _T_23039) @[Mux.scala 27:72]
|
|
node _T_23295 = or(_T_23294, _T_23040) @[Mux.scala 27:72]
|
|
node _T_23296 = or(_T_23295, _T_23041) @[Mux.scala 27:72]
|
|
node _T_23297 = or(_T_23296, _T_23042) @[Mux.scala 27:72]
|
|
node _T_23298 = or(_T_23297, _T_23043) @[Mux.scala 27:72]
|
|
node _T_23299 = or(_T_23298, _T_23044) @[Mux.scala 27:72]
|
|
node _T_23300 = or(_T_23299, _T_23045) @[Mux.scala 27:72]
|
|
node _T_23301 = or(_T_23300, _T_23046) @[Mux.scala 27:72]
|
|
node _T_23302 = or(_T_23301, _T_23047) @[Mux.scala 27:72]
|
|
node _T_23303 = or(_T_23302, _T_23048) @[Mux.scala 27:72]
|
|
node _T_23304 = or(_T_23303, _T_23049) @[Mux.scala 27:72]
|
|
node _T_23305 = or(_T_23304, _T_23050) @[Mux.scala 27:72]
|
|
node _T_23306 = or(_T_23305, _T_23051) @[Mux.scala 27:72]
|
|
node _T_23307 = or(_T_23306, _T_23052) @[Mux.scala 27:72]
|
|
node _T_23308 = or(_T_23307, _T_23053) @[Mux.scala 27:72]
|
|
node _T_23309 = or(_T_23308, _T_23054) @[Mux.scala 27:72]
|
|
node _T_23310 = or(_T_23309, _T_23055) @[Mux.scala 27:72]
|
|
node _T_23311 = or(_T_23310, _T_23056) @[Mux.scala 27:72]
|
|
node _T_23312 = or(_T_23311, _T_23057) @[Mux.scala 27:72]
|
|
node _T_23313 = or(_T_23312, _T_23058) @[Mux.scala 27:72]
|
|
node _T_23314 = or(_T_23313, _T_23059) @[Mux.scala 27:72]
|
|
node _T_23315 = or(_T_23314, _T_23060) @[Mux.scala 27:72]
|
|
node _T_23316 = or(_T_23315, _T_23061) @[Mux.scala 27:72]
|
|
node _T_23317 = or(_T_23316, _T_23062) @[Mux.scala 27:72]
|
|
node _T_23318 = or(_T_23317, _T_23063) @[Mux.scala 27:72]
|
|
node _T_23319 = or(_T_23318, _T_23064) @[Mux.scala 27:72]
|
|
node _T_23320 = or(_T_23319, _T_23065) @[Mux.scala 27:72]
|
|
node _T_23321 = or(_T_23320, _T_23066) @[Mux.scala 27:72]
|
|
node _T_23322 = or(_T_23321, _T_23067) @[Mux.scala 27:72]
|
|
node _T_23323 = or(_T_23322, _T_23068) @[Mux.scala 27:72]
|
|
node _T_23324 = or(_T_23323, _T_23069) @[Mux.scala 27:72]
|
|
node _T_23325 = or(_T_23324, _T_23070) @[Mux.scala 27:72]
|
|
node _T_23326 = or(_T_23325, _T_23071) @[Mux.scala 27:72]
|
|
node _T_23327 = or(_T_23326, _T_23072) @[Mux.scala 27:72]
|
|
node _T_23328 = or(_T_23327, _T_23073) @[Mux.scala 27:72]
|
|
node _T_23329 = or(_T_23328, _T_23074) @[Mux.scala 27:72]
|
|
node _T_23330 = or(_T_23329, _T_23075) @[Mux.scala 27:72]
|
|
node _T_23331 = or(_T_23330, _T_23076) @[Mux.scala 27:72]
|
|
node _T_23332 = or(_T_23331, _T_23077) @[Mux.scala 27:72]
|
|
node _T_23333 = or(_T_23332, _T_23078) @[Mux.scala 27:72]
|
|
node _T_23334 = or(_T_23333, _T_23079) @[Mux.scala 27:72]
|
|
node _T_23335 = or(_T_23334, _T_23080) @[Mux.scala 27:72]
|
|
node _T_23336 = or(_T_23335, _T_23081) @[Mux.scala 27:72]
|
|
node _T_23337 = or(_T_23336, _T_23082) @[Mux.scala 27:72]
|
|
node _T_23338 = or(_T_23337, _T_23083) @[Mux.scala 27:72]
|
|
node _T_23339 = or(_T_23338, _T_23084) @[Mux.scala 27:72]
|
|
node _T_23340 = or(_T_23339, _T_23085) @[Mux.scala 27:72]
|
|
node _T_23341 = or(_T_23340, _T_23086) @[Mux.scala 27:72]
|
|
node _T_23342 = or(_T_23341, _T_23087) @[Mux.scala 27:72]
|
|
node _T_23343 = or(_T_23342, _T_23088) @[Mux.scala 27:72]
|
|
node _T_23344 = or(_T_23343, _T_23089) @[Mux.scala 27:72]
|
|
node _T_23345 = or(_T_23344, _T_23090) @[Mux.scala 27:72]
|
|
node _T_23346 = or(_T_23345, _T_23091) @[Mux.scala 27:72]
|
|
node _T_23347 = or(_T_23346, _T_23092) @[Mux.scala 27:72]
|
|
node _T_23348 = or(_T_23347, _T_23093) @[Mux.scala 27:72]
|
|
node _T_23349 = or(_T_23348, _T_23094) @[Mux.scala 27:72]
|
|
node _T_23350 = or(_T_23349, _T_23095) @[Mux.scala 27:72]
|
|
node _T_23351 = or(_T_23350, _T_23096) @[Mux.scala 27:72]
|
|
wire _T_23352 : UInt<2> @[Mux.scala 27:72]
|
|
_T_23352 <= _T_23351 @[Mux.scala 27:72]
|
|
bht_bank0_rd_data_p1_f <= _T_23352 @[el2_ifu_bp_ctl.scala 383:26]
|
|
|