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quasar/el2_lsu_lsc_ctl.anno.json

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[
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_by",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_by",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_single_ecc_error_incr",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_valid",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_single_ecc_error_r",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_commit_r",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_dma",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_double_ecc_error_r",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_flush_r",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_store",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_load"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_word",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_store",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_store",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_write"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_store_data_bypass_d",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_store_data_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_unsign",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_unsign",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_fir_addr",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_corr_r"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_valid",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_dccm_req",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_valid",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_flush_m_up",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_fast_int"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_store_data_m",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_picm_mask_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_store_data_bypass_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_in_pic_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_by",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_unsign"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dword",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dword",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_in_pic_d",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_by",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_unsign",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dword",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dword",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_addr_d",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_by",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_unsign"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_by",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_unsign"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_corr_r",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_corr_r",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_by",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_unsign"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_half",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_end_addr_d",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_by",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_unsign",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dword",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dword",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_write"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_store_data_bypass_m",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_store_data_bypass_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dma",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dma",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_fast_int",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_fast_int",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_commit_r",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_dma",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_valid",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_flush_r",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_store",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_r_load"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_in_dccm_d",
"sources":[
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_result_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_load_ldst_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_exu_lsu_rs1_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_addr",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_valid_raw_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_load_ldst_bypass_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dec_lsu_offset_d",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_bus_read_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_ld_data_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_addr_external_m",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_by",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_m_unsign",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_dword",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_pkt_d_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_dword",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_half",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_lsu_p_word",
"~el2_lsu_lsc_ctl|el2_lsu_lsc_ctl>io_dma_mem_sz"
]
},
{
"class":"firrtl.EmitCircuitAnnotation",
"emitter":"firrtl.VerilogEmitter"
},
{
"class":"firrtl.options.TargetDirAnnotation",
"directory":"."
},
{
"class":"firrtl.options.OutputAnnotationFileAnnotation",
"file":"el2_lsu_lsc_ctl"
},
{
"class":"firrtl.transforms.BlackBoxTargetDirAnno",
"targetDir":"."
}
]
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