quasar/test_run_dir/lib.GCDMain166617760/RVCExpander.anno.json

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[
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~RVCExpander|RVCExpander>io_waleed_out",
"sources":[
"~RVCExpander|RVCExpander>io_legal",
"~RVCExpander|RVCExpander>io_out_bits",
"~RVCExpander|RVCExpander>io_in"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~RVCExpander|RVCExpander>io_out_rs2",
"sources":[
"~RVCExpander|RVCExpander>io_in"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~RVCExpander|RVCExpander>io_out_rd",
"sources":[
"~RVCExpander|RVCExpander>io_in"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~RVCExpander|RVCExpander>io_out_rs1",
"sources":[
"~RVCExpander|RVCExpander>io_in"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~RVCExpander|RVCExpander>io_legal",
"sources":[
"~RVCExpander|RVCExpander>io_in"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~RVCExpander|RVCExpander>io_out_bits",
"sources":[
"~RVCExpander|RVCExpander>io_in"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~RVCExpander|RVCExpander>io_rvc",
"sources":[
"~RVCExpander|RVCExpander>io_in"
]
},
{
"class":"firrtl.transforms.CombinationalPath",
"sink":"~RVCExpander|RVCExpander>io_out_rs3",
"sources":[
"~RVCExpander|RVCExpander>io_in"
]
},
{
"class":"logger.LogLevelAnnotation",
"globalLogLevel":{
}
},
{
"class":"firrtl.options.TargetDirAnnotation",
"directory":"test_run_dir/lib.GCDMain166617760"
},
{
"class":"firrtl.options.OutputAnnotationFileAnnotation",
"file":"RVCExpander"
},
{
"class":"firrtl.EmitCircuitAnnotation",
"emitter":"firrtl.VerilogEmitter"
},
{
"class":"firrtl.transforms.BlackBoxTargetDirAnno",
"targetDir":"test_run_dir/lib.GCDMain166617760"
}
]