74 lines
1.9 KiB
JSON
74 lines
1.9 KiB
JSON
[
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_out_1",
|
|
"sources":[
|
|
"~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_db_out_0",
|
|
"sources":[
|
|
"~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_sb_out_1",
|
|
"sources":[
|
|
"~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_out_0",
|
|
"sources":[
|
|
"~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_data_out_1",
|
|
"sources":[
|
|
"~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_sb_out_0",
|
|
"sources":[
|
|
"~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_data_out_0",
|
|
"sources":[
|
|
"~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~EL2_IC_TAG|EL2_IC_TAG>io_test_ecc_db_out_1",
|
|
"sources":[
|
|
"~EL2_IC_TAG|EL2_IC_TAG>io_dec_tlu_core_ecc_disable"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.EmitCircuitAnnotation",
|
|
"emitter":"firrtl.VerilogEmitter"
|
|
},
|
|
{
|
|
"class":"firrtl.options.TargetDirAnnotation",
|
|
"directory":"."
|
|
},
|
|
{
|
|
"class":"firrtl.options.OutputAnnotationFileAnnotation",
|
|
"file":"EL2_IC_TAG"
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.BlackBoxTargetDirAnno",
|
|
"targetDir":"."
|
|
}
|
|
] |