64 lines
2.5 KiB
Verilog
64 lines
2.5 KiB
Verilog
module el2_ifu_bp_ctl(
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input clock,
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input reset,
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input io_clk,
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input io_active_clk,
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input io_rst_l,
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input io_ic_hit_f,
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input [31:0] io_ifc_fetch_addr_f,
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input io_ifc_fetch_req_f,
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input io_dec_tlu_br0_r_pkt_valid,
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input [1:0] io_dec_tlu_br0_r_pkt_hist,
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input io_dec_tlu_br0_r_pkt_br_error,
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input io_dec_tlu_br0_r_pkt_br_start_error,
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input io_dec_tlu_br0_r_pkt_way,
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input io_dec_tlu_br0_r_pkt_middle,
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input [7:0] io_exu_i0_br_fghr_r,
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input [6:0] io_exu_i0_br_index_r,
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input io_dec_tlu_flush_lower_wb,
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input io_dec_tlu_flush_leak_one_wb,
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input io_dec_tlu_bpred_disable,
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input io_exu_mp_pkt_misp,
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input io_exu_mp_pkt_ataken,
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input io_exu_mp_pkt_boffset,
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input io_exu_mp_pkt_pc4,
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input [1:0] io_exu_mp_pkt_hist,
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input [11:0] io_exu_mp_pkt_toffset,
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input io_exu_mp_pkt_valid,
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input io_exu_mp_pkt_br_error,
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input io_exu_mp_pkt_br_start_error,
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input [31:0] io_exu_mp_pkt_prett,
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input io_exu_mp_pkt_pcall,
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input io_exu_mp_pkt_pret,
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input io_exu_mp_pkt_pja,
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input io_exu_mp_pkt_way,
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input [7:0] io_exu_mp_eghr,
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input [7:0] io_exu_mp_fghr,
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input [6:0] io_exu_mp_index,
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input [4:0] io_exu_mp_btag,
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input io_exu_flush_final,
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output io_ifu_bp_hit_taken_f,
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output [30:0] io_ifu_bp_btb_target_f,
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output io_ifu_bp_inst_mask_f,
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output [7:0] io_ifu_bp_fghr_f,
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output [1:0] io_ifu_bp_way_f,
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output [1:0] io_ifu_bp_ret_f,
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output [1:0] io_ifu_bp_hist1_f,
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output [1:0] io_ifu_bp_hist0_f,
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output [1:0] io_ifu_bp_pc4_f,
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output [1:0] io_ifu_bp_valid_f,
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output [11:0] io_ifu_bp_poffset_f
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);
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assign io_ifu_bp_hit_taken_f = 1'h0; // @[el2_ifu_bp_ctl.scala 42:25]
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assign io_ifu_bp_btb_target_f = 31'h0; // @[el2_ifu_bp_ctl.scala 43:26]
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assign io_ifu_bp_inst_mask_f = 1'h0; // @[el2_ifu_bp_ctl.scala 44:25]
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assign io_ifu_bp_fghr_f = 8'h0; // @[el2_ifu_bp_ctl.scala 45:20]
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assign io_ifu_bp_way_f = 2'h0; // @[el2_ifu_bp_ctl.scala 46:19]
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assign io_ifu_bp_ret_f = 2'h0; // @[el2_ifu_bp_ctl.scala 47:19]
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assign io_ifu_bp_hist1_f = 2'h0; // @[el2_ifu_bp_ctl.scala 48:21]
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assign io_ifu_bp_hist0_f = 2'h0; // @[el2_ifu_bp_ctl.scala 49:21]
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assign io_ifu_bp_pc4_f = 2'h0; // @[el2_ifu_bp_ctl.scala 50:19]
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assign io_ifu_bp_valid_f = 2'h0; // @[el2_ifu_bp_ctl.scala 51:21]
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assign io_ifu_bp_poffset_f = 12'h0; // @[el2_ifu_bp_ctl.scala 52:23]
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endmodule
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