quasar/verif/LEC/setup_files/Constant_2.0.fms

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set_constant i:/WORK/quasar_wrapper/core/dec/decode/cam_raw_0_bits_tag_reg[2] 0
set_constant i:/WORK/quasar_wrapper/core/dec/decode/cam_raw_1_bits_tag_reg[2] 0
set_constant i:/WORK/quasar_wrapper/core/dec/decode/cam_raw_2_bits_tag_reg[2] 0
set_constant i:/WORK/quasar_wrapper/core/dec/decode/cam_raw_3_bits_tag_reg[2] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[10] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[11] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[12] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[13] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[14] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[15] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[16] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[17] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[18] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[19] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[20] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[21] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[22] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[23] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[24] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[25] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[26] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[27] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[28] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[29] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[2] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[30] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[31] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[3] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[4] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[5] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[6] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[7] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[8] 0
set_constant i:/WORK/quasar_wrapper/core/dec/io_dec_dbg_dbg_dctl_dbg_cmd_wrdata[9] 0
set_constant i:/WORK/quasar_wrapper/core/dec/tlu/int_timers/mitcnt0_inc1[8] 0
set_constant i:/WORK/quasar_wrapper/core/dec/tlu/int_timers/mitcnt1_inc1[8] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/dec_fa_error_index[0] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/dec_fa_error_index[1] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/dec_fa_error_index[2] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/dec_fa_error_index[3] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/dec_fa_error_index[4] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/dec_fa_error_index[5] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/dec_fa_error_index[6] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/dec_fa_error_index[7] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/dec_fa_error_index[8] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/ifu_i0_fa_index[0] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/ifu_i0_fa_index[1] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/ifu_i0_fa_index[2] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/ifu_i0_fa_index[3] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/ifu_i0_fa_index[4] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/ifu_i0_fa_index[5] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/ifu_i0_fa_index[6] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/ifu_i0_fa_index[7] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/ifu_i0_fa_index[8] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/tlu/excinfo_wb_ff/genblock.dff/genblock.dffs/dout_reg[0] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/tlu/freeff/genblock.dff/genblock.dffs/dout_reg[7] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/tlu/genblk7.mstatus_ff/genblock.dff/genblock.dffs/dout_reg[13] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/tlu/genblk7.mstatus_ff/genblock.dff/genblock.dffs/dout_reg[28] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/tlu/int_timers/mitcnt0_inc_cout 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/dec/tlu/int_timers/mitcnt1_inc_cout 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/dec_fa_error_index[0] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/dec_fa_error_index[1] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/dec_fa_error_index[2] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/dec_fa_error_index[3] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/dec_fa_error_index[4] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/dec_fa_error_index[5] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/dec_fa_error_index[6] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/dec_fa_error_index[7] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/dec_fa_error_index[8] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/lsu/bus_intf/bus_buffer/obuf_tag0ff/genblock.dffs/genblock.dffs/dout_reg[2] 0
set_constant r:/WORK/el2_swerv_wrapper/swerv/lsu/bus_intf/bus_buffer/obuf_tag1ff/genblock.dffs/genblock.dffs/dout_reg[2] 0
# set_constant r:/WORK/el2_swerv_wrapper/swerv/ifu/mem_ctl/misc1_ff/genblock.dff/genblock.dffs/dout_reg[2] 0