quasar/target/streams/compile/copyResources/_global/streams/copy-resources

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[[{"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/dmi_wrapper.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/dmi_wrapper.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_lsu_dccm_mem.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/el2_lsu_dccm_mem.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/dmi_jtag_to_core_sync.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/dmi_jtag_to_core_sync.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/gated_latch.v":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/gated_latch.v"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_ifu_ic_mem.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/el2_ifu_ic_mem.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_ifu_iccm_mem.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/el2_ifu_iccm_mem.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/rvtaj_tap.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/rvtaj_tap.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_mem.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/el2_mem.sv"]},{"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/el2_mem.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_mem.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/dmi_jtag_to_core_sync.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/dmi_jtag_to_core_sync.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/gated_latch.v":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/gated_latch.v"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/el2_ifu_iccm_mem.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_ifu_iccm_mem.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/rvtaj_tap.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/rvtaj_tap.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/el2_lsu_dccm_mem.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_lsu_dccm_mem.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/el2_ifu_ic_mem.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_ifu_ic_mem.sv"],"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/target/scala-2.12/classes/vsrc/dmi_wrapper.sv":["file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/dmi_wrapper.sv"]}],{"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/dmi_wrapper.sv":{"file":"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/dmi_wrapper.sv","lastModified":1606809829000},"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_lsu_dccm_mem.sv":{"file":"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_lsu_dccm_mem.sv","lastModified":1606809829000},"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/dmi_jtag_to_core_sync.sv":{"file":"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/dmi_jtag_to_core_sync.sv","lastModified":1606809829000},"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/gated_latch.v":{"file":"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/gated_latch.v","lastModified":1606809829000},"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_ifu_ic_mem.sv":{"file":"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_ifu_ic_mem.sv","lastModified":1606809829000},"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_ifu_iccm_mem.sv":{"file":"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_ifu_iccm_mem.sv","lastModified":1606809829000},"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/rvtaj_tap.sv":{"file":"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/rvtaj_tap.sv","lastModified":1606809829000},"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_mem.sv":{"file":"file:///home/abdulhameed.akram/Documents/SweRV-Chislified/src/main/resources/vsrc/el2_mem.sv","lastModified":1606809829000}}]