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;buildInfoPackage: chisel3, version: 3.3.1, scalaVersion: 2.12.11, sbtVersion: 1.3.10
circuit exu_div_new_3bit_fullshortq :
module exu_div_cls :
input clock : Clock
input reset : Reset
output io : {flip operand : UInt<33>, cls : UInt<5>}
wire cls_zeros : UInt<5>
cls_zeros <= UInt<5>("h00")
wire cls_ones : UInt<5>
cls_ones <= UInt<5>("h00")
node _T = bits(io.operand, 31, 31) @[exu_div_ctl.scala 935:54]
node _T_1 = eq(_T, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_2 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 935:54]
node _T_3 = eq(_T_2, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_4 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 935:54]
node _T_5 = eq(_T_4, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_6 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 935:54]
node _T_7 = eq(_T_6, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_8 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 935:54]
node _T_9 = eq(_T_8, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_10 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 935:54]
node _T_11 = eq(_T_10, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_12 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 935:54]
node _T_13 = eq(_T_12, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_14 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 935:54]
node _T_15 = eq(_T_14, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_16 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 935:54]
node _T_17 = eq(_T_16, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_18 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 935:54]
node _T_19 = eq(_T_18, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_20 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 935:54]
node _T_21 = eq(_T_20, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_22 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 935:54]
node _T_23 = eq(_T_22, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_24 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 935:54]
node _T_25 = eq(_T_24, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_26 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 935:54]
node _T_27 = eq(_T_26, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_28 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 935:54]
node _T_29 = eq(_T_28, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_30 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 935:54]
node _T_31 = eq(_T_30, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_32 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 935:54]
node _T_33 = eq(_T_32, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_34 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 935:54]
node _T_35 = eq(_T_34, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_36 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 935:54]
node _T_37 = eq(_T_36, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_38 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 935:54]
node _T_39 = eq(_T_38, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_40 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 935:54]
node _T_41 = eq(_T_40, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_42 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 935:54]
node _T_43 = eq(_T_42, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_44 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 935:54]
node _T_45 = eq(_T_44, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_46 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 935:54]
node _T_47 = eq(_T_46, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_48 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 935:54]
node _T_49 = eq(_T_48, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_50 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 935:54]
node _T_51 = eq(_T_50, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_52 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 935:54]
node _T_53 = eq(_T_52, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_54 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 935:54]
node _T_55 = eq(_T_54, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_56 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 935:54]
node _T_57 = eq(_T_56, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_58 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 935:54]
node _T_59 = eq(_T_58, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_60 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 935:54]
node _T_61 = eq(_T_60, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_62 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 935:54]
node _T_63 = eq(_T_62, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_64 = mux(_T_1, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_65 = mux(_T_3, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_66 = mux(_T_5, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_67 = mux(_T_7, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_68 = mux(_T_9, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_69 = mux(_T_11, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_70 = mux(_T_13, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_71 = mux(_T_15, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_72 = mux(_T_17, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_73 = mux(_T_19, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_74 = mux(_T_21, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_75 = mux(_T_23, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_76 = mux(_T_25, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_77 = mux(_T_27, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_78 = mux(_T_29, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_79 = mux(_T_31, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_80 = mux(_T_33, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_81 = mux(_T_35, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_82 = mux(_T_37, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_83 = mux(_T_39, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_84 = mux(_T_41, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_85 = mux(_T_43, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_86 = mux(_T_45, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_87 = mux(_T_47, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_88 = mux(_T_49, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_89 = mux(_T_51, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_90 = mux(_T_53, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_91 = mux(_T_55, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_92 = mux(_T_57, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_93 = mux(_T_59, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_94 = mux(_T_61, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_95 = mux(_T_63, UInt<5>("h01f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_96 = or(_T_64, _T_65) @[Mux.scala 27:72]
node _T_97 = or(_T_96, _T_66) @[Mux.scala 27:72]
node _T_98 = or(_T_97, _T_67) @[Mux.scala 27:72]
node _T_99 = or(_T_98, _T_68) @[Mux.scala 27:72]
node _T_100 = or(_T_99, _T_69) @[Mux.scala 27:72]
node _T_101 = or(_T_100, _T_70) @[Mux.scala 27:72]
node _T_102 = or(_T_101, _T_71) @[Mux.scala 27:72]
node _T_103 = or(_T_102, _T_72) @[Mux.scala 27:72]
node _T_104 = or(_T_103, _T_73) @[Mux.scala 27:72]
node _T_105 = or(_T_104, _T_74) @[Mux.scala 27:72]
node _T_106 = or(_T_105, _T_75) @[Mux.scala 27:72]
node _T_107 = or(_T_106, _T_76) @[Mux.scala 27:72]
node _T_108 = or(_T_107, _T_77) @[Mux.scala 27:72]
node _T_109 = or(_T_108, _T_78) @[Mux.scala 27:72]
node _T_110 = or(_T_109, _T_79) @[Mux.scala 27:72]
node _T_111 = or(_T_110, _T_80) @[Mux.scala 27:72]
node _T_112 = or(_T_111, _T_81) @[Mux.scala 27:72]
node _T_113 = or(_T_112, _T_82) @[Mux.scala 27:72]
node _T_114 = or(_T_113, _T_83) @[Mux.scala 27:72]
node _T_115 = or(_T_114, _T_84) @[Mux.scala 27:72]
node _T_116 = or(_T_115, _T_85) @[Mux.scala 27:72]
node _T_117 = or(_T_116, _T_86) @[Mux.scala 27:72]
node _T_118 = or(_T_117, _T_87) @[Mux.scala 27:72]
node _T_119 = or(_T_118, _T_88) @[Mux.scala 27:72]
node _T_120 = or(_T_119, _T_89) @[Mux.scala 27:72]
node _T_121 = or(_T_120, _T_90) @[Mux.scala 27:72]
node _T_122 = or(_T_121, _T_91) @[Mux.scala 27:72]
node _T_123 = or(_T_122, _T_92) @[Mux.scala 27:72]
node _T_124 = or(_T_123, _T_93) @[Mux.scala 27:72]
node _T_125 = or(_T_124, _T_94) @[Mux.scala 27:72]
node _T_126 = or(_T_125, _T_95) @[Mux.scala 27:72]
wire _T_127 : UInt<5> @[Mux.scala 27:72]
_T_127 <= _T_126 @[Mux.scala 27:72]
cls_zeros <= _T_127 @[exu_div_ctl.scala 935:13]
node _T_128 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 937:18]
node _T_129 = eq(_T_128, UInt<32>("h0ffffffff")) @[exu_div_ctl.scala 937:25]
when _T_129 : @[exu_div_ctl.scala 937:44]
cls_ones <= UInt<5>("h01f") @[exu_div_ctl.scala 937:55]
skip @[exu_div_ctl.scala 937:44]
else : @[exu_div_ctl.scala 938:15]
node _T_130 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 938:66]
node _T_131 = cat(UInt<1>("h01"), UInt<1>("h00")) @[Cat.scala 29:58]
node _T_132 = eq(_T_130, _T_131) @[exu_div_ctl.scala 938:76]
node _T_133 = bits(_T_132, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_134 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 938:66]
node _T_135 = mux(UInt<1>("h01"), UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
node _T_136 = cat(_T_135, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_137 = eq(_T_134, _T_136) @[exu_div_ctl.scala 938:76]
node _T_138 = bits(_T_137, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_139 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 938:66]
node _T_140 = mux(UInt<1>("h01"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12]
node _T_141 = cat(_T_140, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_142 = eq(_T_139, _T_141) @[exu_div_ctl.scala 938:76]
node _T_143 = bits(_T_142, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_144 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 938:66]
node _T_145 = mux(UInt<1>("h01"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
node _T_146 = cat(_T_145, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_147 = eq(_T_144, _T_146) @[exu_div_ctl.scala 938:76]
node _T_148 = bits(_T_147, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_149 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 938:66]
node _T_150 = mux(UInt<1>("h01"), UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
node _T_151 = cat(_T_150, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_152 = eq(_T_149, _T_151) @[exu_div_ctl.scala 938:76]
node _T_153 = bits(_T_152, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_154 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 938:66]
node _T_155 = mux(UInt<1>("h01"), UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
node _T_156 = cat(_T_155, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_157 = eq(_T_154, _T_156) @[exu_div_ctl.scala 938:76]
node _T_158 = bits(_T_157, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_159 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 938:66]
node _T_160 = mux(UInt<1>("h01"), UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
node _T_161 = cat(_T_160, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_162 = eq(_T_159, _T_161) @[exu_div_ctl.scala 938:76]
node _T_163 = bits(_T_162, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_164 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 938:66]
node _T_165 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_166 = cat(_T_165, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_167 = eq(_T_164, _T_166) @[exu_div_ctl.scala 938:76]
node _T_168 = bits(_T_167, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_169 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 938:66]
node _T_170 = mux(UInt<1>("h01"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12]
node _T_171 = cat(_T_170, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_172 = eq(_T_169, _T_171) @[exu_div_ctl.scala 938:76]
node _T_173 = bits(_T_172, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_174 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 938:66]
node _T_175 = mux(UInt<1>("h01"), UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
node _T_176 = cat(_T_175, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_177 = eq(_T_174, _T_176) @[exu_div_ctl.scala 938:76]
node _T_178 = bits(_T_177, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_179 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 938:66]
node _T_180 = mux(UInt<1>("h01"), UInt<11>("h07ff"), UInt<11>("h00")) @[Bitwise.scala 72:12]
node _T_181 = cat(_T_180, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_182 = eq(_T_179, _T_181) @[exu_div_ctl.scala 938:76]
node _T_183 = bits(_T_182, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_184 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 938:66]
node _T_185 = mux(UInt<1>("h01"), UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12]
node _T_186 = cat(_T_185, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_187 = eq(_T_184, _T_186) @[exu_div_ctl.scala 938:76]
node _T_188 = bits(_T_187, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_189 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 938:66]
node _T_190 = mux(UInt<1>("h01"), UInt<13>("h01fff"), UInt<13>("h00")) @[Bitwise.scala 72:12]
node _T_191 = cat(_T_190, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_192 = eq(_T_189, _T_191) @[exu_div_ctl.scala 938:76]
node _T_193 = bits(_T_192, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_194 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 938:66]
node _T_195 = mux(UInt<1>("h01"), UInt<14>("h03fff"), UInt<14>("h00")) @[Bitwise.scala 72:12]
node _T_196 = cat(_T_195, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_197 = eq(_T_194, _T_196) @[exu_div_ctl.scala 938:76]
node _T_198 = bits(_T_197, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_199 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 938:66]
node _T_200 = mux(UInt<1>("h01"), UInt<15>("h07fff"), UInt<15>("h00")) @[Bitwise.scala 72:12]
node _T_201 = cat(_T_200, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_202 = eq(_T_199, _T_201) @[exu_div_ctl.scala 938:76]
node _T_203 = bits(_T_202, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_204 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 938:66]
node _T_205 = mux(UInt<1>("h01"), UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
node _T_206 = cat(_T_205, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_207 = eq(_T_204, _T_206) @[exu_div_ctl.scala 938:76]
node _T_208 = bits(_T_207, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_209 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 938:66]
node _T_210 = mux(UInt<1>("h01"), UInt<17>("h01ffff"), UInt<17>("h00")) @[Bitwise.scala 72:12]
node _T_211 = cat(_T_210, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_212 = eq(_T_209, _T_211) @[exu_div_ctl.scala 938:76]
node _T_213 = bits(_T_212, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_214 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 938:66]
node _T_215 = mux(UInt<1>("h01"), UInt<18>("h03ffff"), UInt<18>("h00")) @[Bitwise.scala 72:12]
node _T_216 = cat(_T_215, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_217 = eq(_T_214, _T_216) @[exu_div_ctl.scala 938:76]
node _T_218 = bits(_T_217, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_219 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 938:66]
node _T_220 = mux(UInt<1>("h01"), UInt<19>("h07ffff"), UInt<19>("h00")) @[Bitwise.scala 72:12]
node _T_221 = cat(_T_220, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_222 = eq(_T_219, _T_221) @[exu_div_ctl.scala 938:76]
node _T_223 = bits(_T_222, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_224 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 938:66]
node _T_225 = mux(UInt<1>("h01"), UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12]
node _T_226 = cat(_T_225, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_227 = eq(_T_224, _T_226) @[exu_div_ctl.scala 938:76]
node _T_228 = bits(_T_227, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_229 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 938:66]
node _T_230 = mux(UInt<1>("h01"), UInt<21>("h01fffff"), UInt<21>("h00")) @[Bitwise.scala 72:12]
node _T_231 = cat(_T_230, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_232 = eq(_T_229, _T_231) @[exu_div_ctl.scala 938:76]
node _T_233 = bits(_T_232, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_234 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 938:66]
node _T_235 = mux(UInt<1>("h01"), UInt<22>("h03fffff"), UInt<22>("h00")) @[Bitwise.scala 72:12]
node _T_236 = cat(_T_235, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_237 = eq(_T_234, _T_236) @[exu_div_ctl.scala 938:76]
node _T_238 = bits(_T_237, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_239 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 938:66]
node _T_240 = mux(UInt<1>("h01"), UInt<23>("h07fffff"), UInt<23>("h00")) @[Bitwise.scala 72:12]
node _T_241 = cat(_T_240, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_242 = eq(_T_239, _T_241) @[exu_div_ctl.scala 938:76]
node _T_243 = bits(_T_242, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_244 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 938:66]
node _T_245 = mux(UInt<1>("h01"), UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
node _T_246 = cat(_T_245, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_247 = eq(_T_244, _T_246) @[exu_div_ctl.scala 938:76]
node _T_248 = bits(_T_247, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_249 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 938:66]
node _T_250 = mux(UInt<1>("h01"), UInt<25>("h01ffffff"), UInt<25>("h00")) @[Bitwise.scala 72:12]
node _T_251 = cat(_T_250, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_252 = eq(_T_249, _T_251) @[exu_div_ctl.scala 938:76]
node _T_253 = bits(_T_252, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_254 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 938:66]
node _T_255 = mux(UInt<1>("h01"), UInt<26>("h03ffffff"), UInt<26>("h00")) @[Bitwise.scala 72:12]
node _T_256 = cat(_T_255, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_257 = eq(_T_254, _T_256) @[exu_div_ctl.scala 938:76]
node _T_258 = bits(_T_257, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_259 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 938:66]
node _T_260 = mux(UInt<1>("h01"), UInt<27>("h07ffffff"), UInt<27>("h00")) @[Bitwise.scala 72:12]
node _T_261 = cat(_T_260, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_262 = eq(_T_259, _T_261) @[exu_div_ctl.scala 938:76]
node _T_263 = bits(_T_262, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_264 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 938:66]
node _T_265 = mux(UInt<1>("h01"), UInt<28>("h0fffffff"), UInt<28>("h00")) @[Bitwise.scala 72:12]
node _T_266 = cat(_T_265, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_267 = eq(_T_264, _T_266) @[exu_div_ctl.scala 938:76]
node _T_268 = bits(_T_267, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_269 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 938:66]
node _T_270 = mux(UInt<1>("h01"), UInt<29>("h01fffffff"), UInt<29>("h00")) @[Bitwise.scala 72:12]
node _T_271 = cat(_T_270, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_272 = eq(_T_269, _T_271) @[exu_div_ctl.scala 938:76]
node _T_273 = bits(_T_272, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_274 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 938:66]
node _T_275 = mux(UInt<1>("h01"), UInt<30>("h03fffffff"), UInt<30>("h00")) @[Bitwise.scala 72:12]
node _T_276 = cat(_T_275, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_277 = eq(_T_274, _T_276) @[exu_div_ctl.scala 938:76]
node _T_278 = bits(_T_277, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_279 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 938:66]
node _T_280 = mux(UInt<1>("h01"), UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
node _T_281 = cat(_T_280, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_282 = eq(_T_279, _T_281) @[exu_div_ctl.scala 938:76]
node _T_283 = bits(_T_282, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_284 = mux(_T_133, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_285 = mux(_T_138, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_286 = mux(_T_143, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_287 = mux(_T_148, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_288 = mux(_T_153, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_289 = mux(_T_158, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_290 = mux(_T_163, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_291 = mux(_T_168, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_292 = mux(_T_173, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_293 = mux(_T_178, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_294 = mux(_T_183, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_295 = mux(_T_188, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_296 = mux(_T_193, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_297 = mux(_T_198, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_298 = mux(_T_203, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_299 = mux(_T_208, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_300 = mux(_T_213, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_301 = mux(_T_218, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_302 = mux(_T_223, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_303 = mux(_T_228, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_304 = mux(_T_233, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_305 = mux(_T_238, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_306 = mux(_T_243, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_307 = mux(_T_248, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_308 = mux(_T_253, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_309 = mux(_T_258, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_310 = mux(_T_263, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_311 = mux(_T_268, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_312 = mux(_T_273, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_313 = mux(_T_278, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_314 = mux(_T_283, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_315 = or(_T_284, _T_285) @[Mux.scala 27:72]
node _T_316 = or(_T_315, _T_286) @[Mux.scala 27:72]
node _T_317 = or(_T_316, _T_287) @[Mux.scala 27:72]
node _T_318 = or(_T_317, _T_288) @[Mux.scala 27:72]
node _T_319 = or(_T_318, _T_289) @[Mux.scala 27:72]
node _T_320 = or(_T_319, _T_290) @[Mux.scala 27:72]
node _T_321 = or(_T_320, _T_291) @[Mux.scala 27:72]
node _T_322 = or(_T_321, _T_292) @[Mux.scala 27:72]
node _T_323 = or(_T_322, _T_293) @[Mux.scala 27:72]
node _T_324 = or(_T_323, _T_294) @[Mux.scala 27:72]
node _T_325 = or(_T_324, _T_295) @[Mux.scala 27:72]
node _T_326 = or(_T_325, _T_296) @[Mux.scala 27:72]
node _T_327 = or(_T_326, _T_297) @[Mux.scala 27:72]
node _T_328 = or(_T_327, _T_298) @[Mux.scala 27:72]
node _T_329 = or(_T_328, _T_299) @[Mux.scala 27:72]
node _T_330 = or(_T_329, _T_300) @[Mux.scala 27:72]
node _T_331 = or(_T_330, _T_301) @[Mux.scala 27:72]
node _T_332 = or(_T_331, _T_302) @[Mux.scala 27:72]
node _T_333 = or(_T_332, _T_303) @[Mux.scala 27:72]
node _T_334 = or(_T_333, _T_304) @[Mux.scala 27:72]
node _T_335 = or(_T_334, _T_305) @[Mux.scala 27:72]
node _T_336 = or(_T_335, _T_306) @[Mux.scala 27:72]
node _T_337 = or(_T_336, _T_307) @[Mux.scala 27:72]
node _T_338 = or(_T_337, _T_308) @[Mux.scala 27:72]
node _T_339 = or(_T_338, _T_309) @[Mux.scala 27:72]
node _T_340 = or(_T_339, _T_310) @[Mux.scala 27:72]
node _T_341 = or(_T_340, _T_311) @[Mux.scala 27:72]
node _T_342 = or(_T_341, _T_312) @[Mux.scala 27:72]
node _T_343 = or(_T_342, _T_313) @[Mux.scala 27:72]
node _T_344 = or(_T_343, _T_314) @[Mux.scala 27:72]
wire _T_345 : UInt<5> @[Mux.scala 27:72]
_T_345 <= _T_344 @[Mux.scala 27:72]
cls_ones <= _T_345 @[exu_div_ctl.scala 938:25]
skip @[exu_div_ctl.scala 938:15]
node _T_346 = bits(io.operand, 32, 32) @[exu_div_ctl.scala 939:27]
node _T_347 = mux(_T_346, cls_ones, cls_zeros) @[exu_div_ctl.scala 939:16]
io.cls <= _T_347 @[exu_div_ctl.scala 939:10]
module exu_div_cls_1 :
input clock : Clock
input reset : Reset
output io : {flip operand : UInt<33>, cls : UInt<5>}
wire cls_zeros : UInt<5>
cls_zeros <= UInt<5>("h00")
wire cls_ones : UInt<5>
cls_ones <= UInt<5>("h00")
node _T = bits(io.operand, 31, 31) @[exu_div_ctl.scala 935:54]
node _T_1 = eq(_T, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_2 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 935:54]
node _T_3 = eq(_T_2, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_4 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 935:54]
node _T_5 = eq(_T_4, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_6 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 935:54]
node _T_7 = eq(_T_6, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_8 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 935:54]
node _T_9 = eq(_T_8, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_10 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 935:54]
node _T_11 = eq(_T_10, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_12 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 935:54]
node _T_13 = eq(_T_12, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_14 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 935:54]
node _T_15 = eq(_T_14, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_16 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 935:54]
node _T_17 = eq(_T_16, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_18 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 935:54]
node _T_19 = eq(_T_18, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_20 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 935:54]
node _T_21 = eq(_T_20, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_22 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 935:54]
node _T_23 = eq(_T_22, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_24 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 935:54]
node _T_25 = eq(_T_24, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_26 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 935:54]
node _T_27 = eq(_T_26, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_28 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 935:54]
node _T_29 = eq(_T_28, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_30 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 935:54]
node _T_31 = eq(_T_30, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_32 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 935:54]
node _T_33 = eq(_T_32, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_34 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 935:54]
node _T_35 = eq(_T_34, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_36 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 935:54]
node _T_37 = eq(_T_36, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_38 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 935:54]
node _T_39 = eq(_T_38, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_40 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 935:54]
node _T_41 = eq(_T_40, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_42 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 935:54]
node _T_43 = eq(_T_42, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_44 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 935:54]
node _T_45 = eq(_T_44, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_46 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 935:54]
node _T_47 = eq(_T_46, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_48 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 935:54]
node _T_49 = eq(_T_48, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_50 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 935:54]
node _T_51 = eq(_T_50, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_52 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 935:54]
node _T_53 = eq(_T_52, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_54 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 935:54]
node _T_55 = eq(_T_54, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_56 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 935:54]
node _T_57 = eq(_T_56, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_58 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 935:54]
node _T_59 = eq(_T_58, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_60 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 935:54]
node _T_61 = eq(_T_60, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_62 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 935:54]
node _T_63 = eq(_T_62, UInt<1>("h01")) @[exu_div_ctl.scala 935:63]
node _T_64 = mux(_T_1, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_65 = mux(_T_3, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_66 = mux(_T_5, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_67 = mux(_T_7, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_68 = mux(_T_9, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_69 = mux(_T_11, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_70 = mux(_T_13, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_71 = mux(_T_15, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_72 = mux(_T_17, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_73 = mux(_T_19, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_74 = mux(_T_21, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_75 = mux(_T_23, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_76 = mux(_T_25, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_77 = mux(_T_27, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_78 = mux(_T_29, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_79 = mux(_T_31, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_80 = mux(_T_33, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_81 = mux(_T_35, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_82 = mux(_T_37, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_83 = mux(_T_39, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_84 = mux(_T_41, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_85 = mux(_T_43, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_86 = mux(_T_45, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_87 = mux(_T_47, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_88 = mux(_T_49, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_89 = mux(_T_51, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_90 = mux(_T_53, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_91 = mux(_T_55, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_92 = mux(_T_57, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_93 = mux(_T_59, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_94 = mux(_T_61, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_95 = mux(_T_63, UInt<5>("h01f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_96 = or(_T_64, _T_65) @[Mux.scala 27:72]
node _T_97 = or(_T_96, _T_66) @[Mux.scala 27:72]
node _T_98 = or(_T_97, _T_67) @[Mux.scala 27:72]
node _T_99 = or(_T_98, _T_68) @[Mux.scala 27:72]
node _T_100 = or(_T_99, _T_69) @[Mux.scala 27:72]
node _T_101 = or(_T_100, _T_70) @[Mux.scala 27:72]
node _T_102 = or(_T_101, _T_71) @[Mux.scala 27:72]
node _T_103 = or(_T_102, _T_72) @[Mux.scala 27:72]
node _T_104 = or(_T_103, _T_73) @[Mux.scala 27:72]
node _T_105 = or(_T_104, _T_74) @[Mux.scala 27:72]
node _T_106 = or(_T_105, _T_75) @[Mux.scala 27:72]
node _T_107 = or(_T_106, _T_76) @[Mux.scala 27:72]
node _T_108 = or(_T_107, _T_77) @[Mux.scala 27:72]
node _T_109 = or(_T_108, _T_78) @[Mux.scala 27:72]
node _T_110 = or(_T_109, _T_79) @[Mux.scala 27:72]
node _T_111 = or(_T_110, _T_80) @[Mux.scala 27:72]
node _T_112 = or(_T_111, _T_81) @[Mux.scala 27:72]
node _T_113 = or(_T_112, _T_82) @[Mux.scala 27:72]
node _T_114 = or(_T_113, _T_83) @[Mux.scala 27:72]
node _T_115 = or(_T_114, _T_84) @[Mux.scala 27:72]
node _T_116 = or(_T_115, _T_85) @[Mux.scala 27:72]
node _T_117 = or(_T_116, _T_86) @[Mux.scala 27:72]
node _T_118 = or(_T_117, _T_87) @[Mux.scala 27:72]
node _T_119 = or(_T_118, _T_88) @[Mux.scala 27:72]
node _T_120 = or(_T_119, _T_89) @[Mux.scala 27:72]
node _T_121 = or(_T_120, _T_90) @[Mux.scala 27:72]
node _T_122 = or(_T_121, _T_91) @[Mux.scala 27:72]
node _T_123 = or(_T_122, _T_92) @[Mux.scala 27:72]
node _T_124 = or(_T_123, _T_93) @[Mux.scala 27:72]
node _T_125 = or(_T_124, _T_94) @[Mux.scala 27:72]
node _T_126 = or(_T_125, _T_95) @[Mux.scala 27:72]
wire _T_127 : UInt<5> @[Mux.scala 27:72]
_T_127 <= _T_126 @[Mux.scala 27:72]
cls_zeros <= _T_127 @[exu_div_ctl.scala 935:13]
node _T_128 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 937:18]
node _T_129 = eq(_T_128, UInt<32>("h0ffffffff")) @[exu_div_ctl.scala 937:25]
when _T_129 : @[exu_div_ctl.scala 937:44]
cls_ones <= UInt<5>("h01f") @[exu_div_ctl.scala 937:55]
skip @[exu_div_ctl.scala 937:44]
else : @[exu_div_ctl.scala 938:15]
node _T_130 = bits(io.operand, 31, 30) @[exu_div_ctl.scala 938:66]
node _T_131 = cat(UInt<1>("h01"), UInt<1>("h00")) @[Cat.scala 29:58]
node _T_132 = eq(_T_130, _T_131) @[exu_div_ctl.scala 938:76]
node _T_133 = bits(_T_132, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_134 = bits(io.operand, 31, 29) @[exu_div_ctl.scala 938:66]
node _T_135 = mux(UInt<1>("h01"), UInt<2>("h03"), UInt<2>("h00")) @[Bitwise.scala 72:12]
node _T_136 = cat(_T_135, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_137 = eq(_T_134, _T_136) @[exu_div_ctl.scala 938:76]
node _T_138 = bits(_T_137, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_139 = bits(io.operand, 31, 28) @[exu_div_ctl.scala 938:66]
node _T_140 = mux(UInt<1>("h01"), UInt<3>("h07"), UInt<3>("h00")) @[Bitwise.scala 72:12]
node _T_141 = cat(_T_140, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_142 = eq(_T_139, _T_141) @[exu_div_ctl.scala 938:76]
node _T_143 = bits(_T_142, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_144 = bits(io.operand, 31, 27) @[exu_div_ctl.scala 938:66]
node _T_145 = mux(UInt<1>("h01"), UInt<4>("h0f"), UInt<4>("h00")) @[Bitwise.scala 72:12]
node _T_146 = cat(_T_145, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_147 = eq(_T_144, _T_146) @[exu_div_ctl.scala 938:76]
node _T_148 = bits(_T_147, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_149 = bits(io.operand, 31, 26) @[exu_div_ctl.scala 938:66]
node _T_150 = mux(UInt<1>("h01"), UInt<5>("h01f"), UInt<5>("h00")) @[Bitwise.scala 72:12]
node _T_151 = cat(_T_150, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_152 = eq(_T_149, _T_151) @[exu_div_ctl.scala 938:76]
node _T_153 = bits(_T_152, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_154 = bits(io.operand, 31, 25) @[exu_div_ctl.scala 938:66]
node _T_155 = mux(UInt<1>("h01"), UInt<6>("h03f"), UInt<6>("h00")) @[Bitwise.scala 72:12]
node _T_156 = cat(_T_155, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_157 = eq(_T_154, _T_156) @[exu_div_ctl.scala 938:76]
node _T_158 = bits(_T_157, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_159 = bits(io.operand, 31, 24) @[exu_div_ctl.scala 938:66]
node _T_160 = mux(UInt<1>("h01"), UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
node _T_161 = cat(_T_160, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_162 = eq(_T_159, _T_161) @[exu_div_ctl.scala 938:76]
node _T_163 = bits(_T_162, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_164 = bits(io.operand, 31, 23) @[exu_div_ctl.scala 938:66]
node _T_165 = mux(UInt<1>("h01"), UInt<8>("h0ff"), UInt<8>("h00")) @[Bitwise.scala 72:12]
node _T_166 = cat(_T_165, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_167 = eq(_T_164, _T_166) @[exu_div_ctl.scala 938:76]
node _T_168 = bits(_T_167, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_169 = bits(io.operand, 31, 22) @[exu_div_ctl.scala 938:66]
node _T_170 = mux(UInt<1>("h01"), UInt<9>("h01ff"), UInt<9>("h00")) @[Bitwise.scala 72:12]
node _T_171 = cat(_T_170, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_172 = eq(_T_169, _T_171) @[exu_div_ctl.scala 938:76]
node _T_173 = bits(_T_172, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_174 = bits(io.operand, 31, 21) @[exu_div_ctl.scala 938:66]
node _T_175 = mux(UInt<1>("h01"), UInt<10>("h03ff"), UInt<10>("h00")) @[Bitwise.scala 72:12]
node _T_176 = cat(_T_175, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_177 = eq(_T_174, _T_176) @[exu_div_ctl.scala 938:76]
node _T_178 = bits(_T_177, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_179 = bits(io.operand, 31, 20) @[exu_div_ctl.scala 938:66]
node _T_180 = mux(UInt<1>("h01"), UInt<11>("h07ff"), UInt<11>("h00")) @[Bitwise.scala 72:12]
node _T_181 = cat(_T_180, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_182 = eq(_T_179, _T_181) @[exu_div_ctl.scala 938:76]
node _T_183 = bits(_T_182, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_184 = bits(io.operand, 31, 19) @[exu_div_ctl.scala 938:66]
node _T_185 = mux(UInt<1>("h01"), UInt<12>("h0fff"), UInt<12>("h00")) @[Bitwise.scala 72:12]
node _T_186 = cat(_T_185, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_187 = eq(_T_184, _T_186) @[exu_div_ctl.scala 938:76]
node _T_188 = bits(_T_187, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_189 = bits(io.operand, 31, 18) @[exu_div_ctl.scala 938:66]
node _T_190 = mux(UInt<1>("h01"), UInt<13>("h01fff"), UInt<13>("h00")) @[Bitwise.scala 72:12]
node _T_191 = cat(_T_190, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_192 = eq(_T_189, _T_191) @[exu_div_ctl.scala 938:76]
node _T_193 = bits(_T_192, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_194 = bits(io.operand, 31, 17) @[exu_div_ctl.scala 938:66]
node _T_195 = mux(UInt<1>("h01"), UInt<14>("h03fff"), UInt<14>("h00")) @[Bitwise.scala 72:12]
node _T_196 = cat(_T_195, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_197 = eq(_T_194, _T_196) @[exu_div_ctl.scala 938:76]
node _T_198 = bits(_T_197, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_199 = bits(io.operand, 31, 16) @[exu_div_ctl.scala 938:66]
node _T_200 = mux(UInt<1>("h01"), UInt<15>("h07fff"), UInt<15>("h00")) @[Bitwise.scala 72:12]
node _T_201 = cat(_T_200, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_202 = eq(_T_199, _T_201) @[exu_div_ctl.scala 938:76]
node _T_203 = bits(_T_202, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_204 = bits(io.operand, 31, 15) @[exu_div_ctl.scala 938:66]
node _T_205 = mux(UInt<1>("h01"), UInt<16>("h0ffff"), UInt<16>("h00")) @[Bitwise.scala 72:12]
node _T_206 = cat(_T_205, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_207 = eq(_T_204, _T_206) @[exu_div_ctl.scala 938:76]
node _T_208 = bits(_T_207, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_209 = bits(io.operand, 31, 14) @[exu_div_ctl.scala 938:66]
node _T_210 = mux(UInt<1>("h01"), UInt<17>("h01ffff"), UInt<17>("h00")) @[Bitwise.scala 72:12]
node _T_211 = cat(_T_210, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_212 = eq(_T_209, _T_211) @[exu_div_ctl.scala 938:76]
node _T_213 = bits(_T_212, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_214 = bits(io.operand, 31, 13) @[exu_div_ctl.scala 938:66]
node _T_215 = mux(UInt<1>("h01"), UInt<18>("h03ffff"), UInt<18>("h00")) @[Bitwise.scala 72:12]
node _T_216 = cat(_T_215, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_217 = eq(_T_214, _T_216) @[exu_div_ctl.scala 938:76]
node _T_218 = bits(_T_217, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_219 = bits(io.operand, 31, 12) @[exu_div_ctl.scala 938:66]
node _T_220 = mux(UInt<1>("h01"), UInt<19>("h07ffff"), UInt<19>("h00")) @[Bitwise.scala 72:12]
node _T_221 = cat(_T_220, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_222 = eq(_T_219, _T_221) @[exu_div_ctl.scala 938:76]
node _T_223 = bits(_T_222, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_224 = bits(io.operand, 31, 11) @[exu_div_ctl.scala 938:66]
node _T_225 = mux(UInt<1>("h01"), UInt<20>("h0fffff"), UInt<20>("h00")) @[Bitwise.scala 72:12]
node _T_226 = cat(_T_225, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_227 = eq(_T_224, _T_226) @[exu_div_ctl.scala 938:76]
node _T_228 = bits(_T_227, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_229 = bits(io.operand, 31, 10) @[exu_div_ctl.scala 938:66]
node _T_230 = mux(UInt<1>("h01"), UInt<21>("h01fffff"), UInt<21>("h00")) @[Bitwise.scala 72:12]
node _T_231 = cat(_T_230, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_232 = eq(_T_229, _T_231) @[exu_div_ctl.scala 938:76]
node _T_233 = bits(_T_232, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_234 = bits(io.operand, 31, 9) @[exu_div_ctl.scala 938:66]
node _T_235 = mux(UInt<1>("h01"), UInt<22>("h03fffff"), UInt<22>("h00")) @[Bitwise.scala 72:12]
node _T_236 = cat(_T_235, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_237 = eq(_T_234, _T_236) @[exu_div_ctl.scala 938:76]
node _T_238 = bits(_T_237, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_239 = bits(io.operand, 31, 8) @[exu_div_ctl.scala 938:66]
node _T_240 = mux(UInt<1>("h01"), UInt<23>("h07fffff"), UInt<23>("h00")) @[Bitwise.scala 72:12]
node _T_241 = cat(_T_240, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_242 = eq(_T_239, _T_241) @[exu_div_ctl.scala 938:76]
node _T_243 = bits(_T_242, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_244 = bits(io.operand, 31, 7) @[exu_div_ctl.scala 938:66]
node _T_245 = mux(UInt<1>("h01"), UInt<24>("h0ffffff"), UInt<24>("h00")) @[Bitwise.scala 72:12]
node _T_246 = cat(_T_245, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_247 = eq(_T_244, _T_246) @[exu_div_ctl.scala 938:76]
node _T_248 = bits(_T_247, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_249 = bits(io.operand, 31, 6) @[exu_div_ctl.scala 938:66]
node _T_250 = mux(UInt<1>("h01"), UInt<25>("h01ffffff"), UInt<25>("h00")) @[Bitwise.scala 72:12]
node _T_251 = cat(_T_250, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_252 = eq(_T_249, _T_251) @[exu_div_ctl.scala 938:76]
node _T_253 = bits(_T_252, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_254 = bits(io.operand, 31, 5) @[exu_div_ctl.scala 938:66]
node _T_255 = mux(UInt<1>("h01"), UInt<26>("h03ffffff"), UInt<26>("h00")) @[Bitwise.scala 72:12]
node _T_256 = cat(_T_255, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_257 = eq(_T_254, _T_256) @[exu_div_ctl.scala 938:76]
node _T_258 = bits(_T_257, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_259 = bits(io.operand, 31, 4) @[exu_div_ctl.scala 938:66]
node _T_260 = mux(UInt<1>("h01"), UInt<27>("h07ffffff"), UInt<27>("h00")) @[Bitwise.scala 72:12]
node _T_261 = cat(_T_260, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_262 = eq(_T_259, _T_261) @[exu_div_ctl.scala 938:76]
node _T_263 = bits(_T_262, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_264 = bits(io.operand, 31, 3) @[exu_div_ctl.scala 938:66]
node _T_265 = mux(UInt<1>("h01"), UInt<28>("h0fffffff"), UInt<28>("h00")) @[Bitwise.scala 72:12]
node _T_266 = cat(_T_265, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_267 = eq(_T_264, _T_266) @[exu_div_ctl.scala 938:76]
node _T_268 = bits(_T_267, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_269 = bits(io.operand, 31, 2) @[exu_div_ctl.scala 938:66]
node _T_270 = mux(UInt<1>("h01"), UInt<29>("h01fffffff"), UInt<29>("h00")) @[Bitwise.scala 72:12]
node _T_271 = cat(_T_270, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_272 = eq(_T_269, _T_271) @[exu_div_ctl.scala 938:76]
node _T_273 = bits(_T_272, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_274 = bits(io.operand, 31, 1) @[exu_div_ctl.scala 938:66]
node _T_275 = mux(UInt<1>("h01"), UInt<30>("h03fffffff"), UInt<30>("h00")) @[Bitwise.scala 72:12]
node _T_276 = cat(_T_275, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_277 = eq(_T_274, _T_276) @[exu_div_ctl.scala 938:76]
node _T_278 = bits(_T_277, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_279 = bits(io.operand, 31, 0) @[exu_div_ctl.scala 938:66]
node _T_280 = mux(UInt<1>("h01"), UInt<31>("h07fffffff"), UInt<31>("h00")) @[Bitwise.scala 72:12]
node _T_281 = cat(_T_280, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_282 = eq(_T_279, _T_281) @[exu_div_ctl.scala 938:76]
node _T_283 = bits(_T_282, 0, 0) @[exu_div_ctl.scala 938:102]
node _T_284 = mux(_T_133, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_285 = mux(_T_138, UInt<1>("h01"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_286 = mux(_T_143, UInt<2>("h02"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_287 = mux(_T_148, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_288 = mux(_T_153, UInt<3>("h04"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_289 = mux(_T_158, UInt<3>("h05"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_290 = mux(_T_163, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_291 = mux(_T_168, UInt<3>("h07"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_292 = mux(_T_173, UInt<4>("h08"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_293 = mux(_T_178, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_294 = mux(_T_183, UInt<4>("h0a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_295 = mux(_T_188, UInt<4>("h0b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_296 = mux(_T_193, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_297 = mux(_T_198, UInt<4>("h0d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_298 = mux(_T_203, UInt<4>("h0e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_299 = mux(_T_208, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_300 = mux(_T_213, UInt<5>("h010"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_301 = mux(_T_218, UInt<5>("h011"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_302 = mux(_T_223, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_303 = mux(_T_228, UInt<5>("h013"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_304 = mux(_T_233, UInt<5>("h014"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_305 = mux(_T_238, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_306 = mux(_T_243, UInt<5>("h016"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_307 = mux(_T_248, UInt<5>("h017"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_308 = mux(_T_253, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_309 = mux(_T_258, UInt<5>("h019"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_310 = mux(_T_263, UInt<5>("h01a"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_311 = mux(_T_268, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_312 = mux(_T_273, UInt<5>("h01c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_313 = mux(_T_278, UInt<5>("h01d"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_314 = mux(_T_283, UInt<5>("h01e"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_315 = or(_T_284, _T_285) @[Mux.scala 27:72]
node _T_316 = or(_T_315, _T_286) @[Mux.scala 27:72]
node _T_317 = or(_T_316, _T_287) @[Mux.scala 27:72]
node _T_318 = or(_T_317, _T_288) @[Mux.scala 27:72]
node _T_319 = or(_T_318, _T_289) @[Mux.scala 27:72]
node _T_320 = or(_T_319, _T_290) @[Mux.scala 27:72]
node _T_321 = or(_T_320, _T_291) @[Mux.scala 27:72]
node _T_322 = or(_T_321, _T_292) @[Mux.scala 27:72]
node _T_323 = or(_T_322, _T_293) @[Mux.scala 27:72]
node _T_324 = or(_T_323, _T_294) @[Mux.scala 27:72]
node _T_325 = or(_T_324, _T_295) @[Mux.scala 27:72]
node _T_326 = or(_T_325, _T_296) @[Mux.scala 27:72]
node _T_327 = or(_T_326, _T_297) @[Mux.scala 27:72]
node _T_328 = or(_T_327, _T_298) @[Mux.scala 27:72]
node _T_329 = or(_T_328, _T_299) @[Mux.scala 27:72]
node _T_330 = or(_T_329, _T_300) @[Mux.scala 27:72]
node _T_331 = or(_T_330, _T_301) @[Mux.scala 27:72]
node _T_332 = or(_T_331, _T_302) @[Mux.scala 27:72]
node _T_333 = or(_T_332, _T_303) @[Mux.scala 27:72]
node _T_334 = or(_T_333, _T_304) @[Mux.scala 27:72]
node _T_335 = or(_T_334, _T_305) @[Mux.scala 27:72]
node _T_336 = or(_T_335, _T_306) @[Mux.scala 27:72]
node _T_337 = or(_T_336, _T_307) @[Mux.scala 27:72]
node _T_338 = or(_T_337, _T_308) @[Mux.scala 27:72]
node _T_339 = or(_T_338, _T_309) @[Mux.scala 27:72]
node _T_340 = or(_T_339, _T_310) @[Mux.scala 27:72]
node _T_341 = or(_T_340, _T_311) @[Mux.scala 27:72]
node _T_342 = or(_T_341, _T_312) @[Mux.scala 27:72]
node _T_343 = or(_T_342, _T_313) @[Mux.scala 27:72]
node _T_344 = or(_T_343, _T_314) @[Mux.scala 27:72]
wire _T_345 : UInt<5> @[Mux.scala 27:72]
_T_345 <= _T_344 @[Mux.scala 27:72]
cls_ones <= _T_345 @[exu_div_ctl.scala 938:25]
skip @[exu_div_ctl.scala 938:15]
node _T_346 = bits(io.operand, 32, 32) @[exu_div_ctl.scala 939:27]
node _T_347 = mux(_T_346, cls_ones, cls_zeros) @[exu_div_ctl.scala 939:16]
io.cls <= _T_347 @[exu_div_ctl.scala 939:10]
extmodule gated_latch :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_1 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_1 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_1 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_2 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_2 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_2 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_3 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_3 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_3 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_4 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_4 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_4 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_5 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_5 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_5 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_6 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_6 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_6 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_7 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_7 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_7 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_8 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_8 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_8 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_9 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_9 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_9 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
extmodule gated_latch_10 :
output Q : Clock
input CK : Clock
input EN : UInt<1>
input SE : UInt<1>
defname = gated_latch
module rvclkhdr_10 :
input clock : Clock
input reset : Reset
output io : {l1clk : Clock, flip clk : Clock, flip en : UInt<1>, flip scan_mode : UInt<1>}
inst clkhdr of gated_latch_10 @[lib.scala 334:26]
clkhdr.SE is invalid
clkhdr.EN is invalid
clkhdr.CK is invalid
clkhdr.Q is invalid
io.l1clk <= clkhdr.Q @[lib.scala 335:14]
clkhdr.CK <= io.clk @[lib.scala 336:18]
clkhdr.EN <= io.en @[lib.scala 337:18]
clkhdr.SE <= io.scan_mode @[lib.scala 338:18]
module exu_div_new_3bit_fullshortq :
input clock : Clock
input reset : AsyncReset
output io : {flip scan_mode : UInt<1>, flip cancel : UInt<1>, flip valid_in : UInt<1>, flip signed_in : UInt<1>, flip rem_in : UInt<1>, flip dividend_in : UInt<32>, flip divisor_in : UInt<32>, data_out : UInt<32>, valid_out : UInt<1>}
wire valid_ff : UInt<1>
valid_ff <= UInt<1>("h00")
wire finish_ff : UInt<1>
finish_ff <= UInt<1>("h00")
wire control_ff : UInt<3>
control_ff <= UInt<3>("h00")
wire count_ff : UInt<7>
count_ff <= UInt<7>("h00")
wire smallnum : UInt<4>
smallnum <= UInt<4>("h00")
wire a_ff : UInt<33>
a_ff <= UInt<33>("h00")
wire b_ff1 : UInt<33>
b_ff1 <= UInt<33>("h00")
wire b_ff : UInt<37>
b_ff <= UInt<37>("h00")
wire q_ff : UInt<32>
q_ff <= UInt<32>("h00")
wire r_ff : UInt<33>
r_ff <= UInt<33>("h00")
wire quotient_raw : UInt<8>
quotient_raw <= UInt<8>("h00")
wire quotient_new : UInt<3>
quotient_new <= UInt<3>("h00")
wire shortq_enable : UInt<1>
shortq_enable <= UInt<1>("h00")
wire shortq_enable_ff : UInt<1>
shortq_enable_ff <= UInt<1>("h00")
wire by_zero_case_ff : UInt<1>
by_zero_case_ff <= UInt<1>("h00")
wire ar_shifted : UInt<66>
ar_shifted <= UInt<66>("h00")
wire shortq_shift : UInt<5>
shortq_shift <= UInt<5>("h00")
wire shortq_decode : UInt<5>
shortq_decode <= UInt<5>("h00")
wire shortq_shift_ff : UInt<5>
shortq_shift_ff <= UInt<5>("h00")
node _T = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 605:35]
node valid_ff_in = and(io.valid_in, _T) @[exu_div_ctl.scala 605:33]
node _T_1 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 606:35]
node _T_2 = bits(control_ff, 2, 2) @[exu_div_ctl.scala 606:60]
node _T_3 = and(_T_1, _T_2) @[exu_div_ctl.scala 606:48]
node _T_4 = and(io.valid_in, io.signed_in) @[exu_div_ctl.scala 606:80]
node _T_5 = bits(io.dividend_in, 31, 31) @[exu_div_ctl.scala 606:112]
node _T_6 = and(_T_4, _T_5) @[exu_div_ctl.scala 606:96]
node _T_7 = or(_T_3, _T_6) @[exu_div_ctl.scala 606:65]
node _T_8 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 606:120]
node _T_9 = bits(control_ff, 1, 1) @[exu_div_ctl.scala 606:145]
node _T_10 = and(_T_8, _T_9) @[exu_div_ctl.scala 606:133]
node _T_11 = and(io.valid_in, io.signed_in) @[exu_div_ctl.scala 606:165]
node _T_12 = bits(io.divisor_in, 31, 31) @[exu_div_ctl.scala 606:197]
node _T_13 = and(_T_11, _T_12) @[exu_div_ctl.scala 606:181]
node _T_14 = or(_T_10, _T_13) @[exu_div_ctl.scala 606:150]
node _T_15 = eq(io.valid_in, UInt<1>("h00")) @[exu_div_ctl.scala 606:205]
node _T_16 = bits(control_ff, 0, 0) @[exu_div_ctl.scala 606:230]
node _T_17 = and(_T_15, _T_16) @[exu_div_ctl.scala 606:218]
node _T_18 = and(io.valid_in, io.rem_in) @[exu_div_ctl.scala 606:250]
node _T_19 = or(_T_17, _T_18) @[exu_div_ctl.scala 606:235]
node _T_20 = cat(_T_7, _T_14) @[Cat.scala 29:58]
node control_in = cat(_T_20, _T_19) @[Cat.scala 29:58]
node dividend_sign_ff = bits(control_ff, 2, 2) @[exu_div_ctl.scala 607:40]
node divisor_sign_ff = bits(control_ff, 1, 1) @[exu_div_ctl.scala 608:40]
node rem_ff = bits(control_ff, 0, 0) @[exu_div_ctl.scala 609:40]
node _T_21 = bits(b_ff, 31, 0) @[exu_div_ctl.scala 610:47]
node _T_22 = eq(_T_21, UInt<1>("h00")) @[exu_div_ctl.scala 610:54]
node by_zero_case = and(valid_ff, _T_22) @[exu_div_ctl.scala 610:40]
node _T_23 = bits(a_ff, 31, 4) @[exu_div_ctl.scala 612:30]
node _T_24 = eq(_T_23, UInt<1>("h00")) @[exu_div_ctl.scala 612:37]
node _T_25 = bits(b_ff, 31, 4) @[exu_div_ctl.scala 612:53]
node _T_26 = eq(_T_25, UInt<1>("h00")) @[exu_div_ctl.scala 612:60]
node _T_27 = and(_T_24, _T_26) @[exu_div_ctl.scala 612:46]
node _T_28 = eq(by_zero_case, UInt<1>("h00")) @[exu_div_ctl.scala 612:71]
node _T_29 = and(_T_27, _T_28) @[exu_div_ctl.scala 612:69]
node _T_30 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 612:87]
node _T_31 = and(_T_29, _T_30) @[exu_div_ctl.scala 612:85]
node _T_32 = and(_T_31, valid_ff) @[exu_div_ctl.scala 612:95]
node _T_33 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 612:108]
node _T_34 = and(_T_32, _T_33) @[exu_div_ctl.scala 612:106]
node _T_35 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 613:11]
node _T_36 = eq(_T_35, UInt<1>("h00")) @[exu_div_ctl.scala 613:18]
node _T_37 = eq(by_zero_case, UInt<1>("h00")) @[exu_div_ctl.scala 613:29]
node _T_38 = and(_T_36, _T_37) @[exu_div_ctl.scala 613:27]
node _T_39 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 613:45]
node _T_40 = and(_T_38, _T_39) @[exu_div_ctl.scala 613:43]
node _T_41 = and(_T_40, valid_ff) @[exu_div_ctl.scala 613:53]
node _T_42 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 613:66]
node _T_43 = and(_T_41, _T_42) @[exu_div_ctl.scala 613:64]
node smallnum_case = or(_T_34, _T_43) @[exu_div_ctl.scala 612:120]
node _T_44 = orr(count_ff) @[exu_div_ctl.scala 614:42]
node running_state = or(_T_44, shortq_enable_ff) @[exu_div_ctl.scala 614:45]
node _T_45 = or(io.valid_in, valid_ff) @[exu_div_ctl.scala 615:43]
node _T_46 = or(_T_45, io.cancel) @[exu_div_ctl.scala 615:54]
node _T_47 = or(_T_46, running_state) @[exu_div_ctl.scala 615:66]
node misc_enable = or(_T_47, finish_ff) @[exu_div_ctl.scala 615:82]
node _T_48 = or(smallnum_case, by_zero_case) @[exu_div_ctl.scala 616:45]
node _T_49 = eq(count_ff, UInt<6>("h021")) @[exu_div_ctl.scala 616:72]
node finish_raw = or(_T_48, _T_49) @[exu_div_ctl.scala 616:60]
node _T_50 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 617:43]
node finish = and(finish_raw, _T_50) @[exu_div_ctl.scala 617:41]
node _T_51 = or(valid_ff, running_state) @[exu_div_ctl.scala 618:40]
node _T_52 = eq(finish, UInt<1>("h00")) @[exu_div_ctl.scala 618:59]
node _T_53 = and(_T_51, _T_52) @[exu_div_ctl.scala 618:57]
node _T_54 = eq(finish_ff, UInt<1>("h00")) @[exu_div_ctl.scala 618:69]
node _T_55 = and(_T_53, _T_54) @[exu_div_ctl.scala 618:67]
node _T_56 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 618:82]
node _T_57 = and(_T_55, _T_56) @[exu_div_ctl.scala 618:80]
node _T_58 = eq(shortq_enable, UInt<1>("h00")) @[exu_div_ctl.scala 618:95]
node count_enable = and(_T_57, _T_58) @[exu_div_ctl.scala 618:93]
node _T_59 = bits(count_enable, 0, 0) @[Bitwise.scala 72:15]
node _T_60 = mux(_T_59, UInt<7>("h07f"), UInt<7>("h00")) @[Bitwise.scala 72:12]
node _T_61 = cat(UInt<5>("h00"), UInt<2>("h03")) @[Cat.scala 29:58]
node _T_62 = add(count_ff, _T_61) @[exu_div_ctl.scala 619:63]
node _T_63 = tail(_T_62, 1) @[exu_div_ctl.scala 619:63]
node _T_64 = cat(UInt<2>("h00"), shortq_shift_ff) @[Cat.scala 29:58]
node _T_65 = add(_T_63, _T_64) @[exu_div_ctl.scala 619:88]
node _T_66 = tail(_T_65, 1) @[exu_div_ctl.scala 619:88]
node count_in = and(_T_60, _T_66) @[exu_div_ctl.scala 619:51]
node a_enable = or(io.valid_in, running_state) @[exu_div_ctl.scala 620:43]
node _T_67 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 621:47]
node a_shift = and(running_state, _T_67) @[exu_div_ctl.scala 621:45]
node _T_68 = bits(dividend_sign_ff, 0, 0) @[Bitwise.scala 72:15]
node _T_69 = mux(_T_68, UInt<33>("h01ffffffff"), UInt<33>("h00")) @[Bitwise.scala 72:12]
node _T_70 = cat(_T_69, a_ff) @[Cat.scala 29:58]
node _T_71 = bits(shortq_shift_ff, 4, 0) @[exu_div_ctl.scala 622:86]
node _T_72 = dshl(_T_70, _T_71) @[exu_div_ctl.scala 622:68]
ar_shifted <= _T_72 @[exu_div_ctl.scala 622:28]
node _T_73 = xor(dividend_sign_ff, divisor_sign_ff) @[exu_div_ctl.scala 623:61]
node _T_74 = eq(_T_73, UInt<1>("h00")) @[exu_div_ctl.scala 623:42]
node b_twos_comp = and(valid_ff, _T_74) @[exu_div_ctl.scala 623:40]
node _T_75 = xor(dividend_sign_ff, divisor_sign_ff) @[exu_div_ctl.scala 624:62]
node _T_76 = eq(_T_75, UInt<1>("h00")) @[exu_div_ctl.scala 624:43]
node twos_comp_b_sel = and(valid_ff, _T_76) @[exu_div_ctl.scala 624:41]
node _T_77 = eq(valid_ff, UInt<1>("h00")) @[exu_div_ctl.scala 625:30]
node _T_78 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 625:42]
node _T_79 = and(_T_77, _T_78) @[exu_div_ctl.scala 625:40]
node _T_80 = xor(dividend_sign_ff, divisor_sign_ff) @[exu_div_ctl.scala 625:71]
node _T_81 = and(_T_79, _T_80) @[exu_div_ctl.scala 625:50]
node _T_82 = eq(by_zero_case_ff, UInt<1>("h00")) @[exu_div_ctl.scala 625:92]
node twos_comp_q_sel = and(_T_81, _T_82) @[exu_div_ctl.scala 625:90]
node b_enable = or(io.valid_in, b_twos_comp) @[exu_div_ctl.scala 626:43]
node _T_83 = or(io.valid_in, valid_ff) @[exu_div_ctl.scala 627:43]
node rq_enable = or(_T_83, running_state) @[exu_div_ctl.scala 627:54]
node _T_84 = and(valid_ff, dividend_sign_ff) @[exu_div_ctl.scala 628:40]
node _T_85 = eq(by_zero_case, UInt<1>("h00")) @[exu_div_ctl.scala 628:61]
node r_sign_sel = and(_T_84, _T_85) @[exu_div_ctl.scala 628:59]
node _T_86 = eq(quotient_new, UInt<1>("h00")) @[exu_div_ctl.scala 630:70]
node _T_87 = and(running_state, _T_86) @[exu_div_ctl.scala 630:54]
node _T_88 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 630:86]
node r_adder_sel_0 = and(_T_87, _T_88) @[exu_div_ctl.scala 630:84]
node _T_89 = eq(quotient_new, UInt<1>("h01")) @[exu_div_ctl.scala 630:70]
node _T_90 = and(running_state, _T_89) @[exu_div_ctl.scala 630:54]
node _T_91 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 630:86]
node r_adder_sel_1 = and(_T_90, _T_91) @[exu_div_ctl.scala 630:84]
node _T_92 = eq(quotient_new, UInt<2>("h02")) @[exu_div_ctl.scala 630:70]
node _T_93 = and(running_state, _T_92) @[exu_div_ctl.scala 630:54]
node _T_94 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 630:86]
node r_adder_sel_2 = and(_T_93, _T_94) @[exu_div_ctl.scala 630:84]
node _T_95 = eq(quotient_new, UInt<2>("h03")) @[exu_div_ctl.scala 630:70]
node _T_96 = and(running_state, _T_95) @[exu_div_ctl.scala 630:54]
node _T_97 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 630:86]
node r_adder_sel_3 = and(_T_96, _T_97) @[exu_div_ctl.scala 630:84]
node _T_98 = eq(quotient_new, UInt<3>("h04")) @[exu_div_ctl.scala 630:70]
node _T_99 = and(running_state, _T_98) @[exu_div_ctl.scala 630:54]
node _T_100 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 630:86]
node r_adder_sel_4 = and(_T_99, _T_100) @[exu_div_ctl.scala 630:84]
node _T_101 = eq(quotient_new, UInt<3>("h05")) @[exu_div_ctl.scala 630:70]
node _T_102 = and(running_state, _T_101) @[exu_div_ctl.scala 630:54]
node _T_103 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 630:86]
node r_adder_sel_5 = and(_T_102, _T_103) @[exu_div_ctl.scala 630:84]
node _T_104 = eq(quotient_new, UInt<3>("h06")) @[exu_div_ctl.scala 630:70]
node _T_105 = and(running_state, _T_104) @[exu_div_ctl.scala 630:54]
node _T_106 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 630:86]
node r_adder_sel_6 = and(_T_105, _T_106) @[exu_div_ctl.scala 630:84]
node _T_107 = eq(quotient_new, UInt<3>("h07")) @[exu_div_ctl.scala 630:70]
node _T_108 = and(running_state, _T_107) @[exu_div_ctl.scala 630:54]
node _T_109 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 630:86]
node r_adder_sel_7 = and(_T_108, _T_109) @[exu_div_ctl.scala 630:84]
node _T_110 = bits(r_ff, 30, 0) @[exu_div_ctl.scala 641:29]
node _T_111 = bits(a_ff, 32, 30) @[exu_div_ctl.scala 641:40]
node _T_112 = cat(_T_110, _T_111) @[Cat.scala 29:58]
node _T_113 = bits(b_ff, 33, 0) @[exu_div_ctl.scala 641:55]
node _T_114 = add(_T_112, _T_113) @[exu_div_ctl.scala 641:49]
node adder1_out = tail(_T_114, 1) @[exu_div_ctl.scala 641:49]
node _T_115 = bits(r_ff, 31, 0) @[exu_div_ctl.scala 642:29]
node _T_116 = bits(a_ff, 32, 30) @[exu_div_ctl.scala 642:40]
node _T_117 = cat(_T_115, _T_116) @[Cat.scala 29:58]
node _T_118 = bits(b_ff, 33, 0) @[exu_div_ctl.scala 642:59]
node _T_119 = cat(_T_118, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_120 = add(_T_117, _T_119) @[exu_div_ctl.scala 642:49]
node adder2_out = tail(_T_120, 1) @[exu_div_ctl.scala 642:49]
node _T_121 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 643:29]
node _T_122 = bits(a_ff, 32, 30) @[exu_div_ctl.scala 643:40]
node _T_123 = cat(_T_121, _T_122) @[Cat.scala 29:58]
node _T_124 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 643:59]
node _T_125 = cat(_T_124, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_126 = add(_T_123, _T_125) @[exu_div_ctl.scala 643:49]
node _T_127 = tail(_T_126, 1) @[exu_div_ctl.scala 643:49]
node _T_128 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 643:77]
node _T_129 = add(_T_127, _T_128) @[exu_div_ctl.scala 643:71]
node adder3_out = tail(_T_129, 1) @[exu_div_ctl.scala 643:71]
node _T_130 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 644:29]
node _T_131 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 644:38]
node _T_132 = bits(a_ff, 32, 30) @[exu_div_ctl.scala 644:49]
node _T_133 = cat(_T_130, _T_131) @[Cat.scala 29:58]
node _T_134 = cat(_T_133, _T_132) @[Cat.scala 29:58]
node _T_135 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 644:68]
node _T_136 = cat(_T_135, UInt<2>("h00")) @[Cat.scala 29:58]
node _T_137 = add(_T_134, _T_136) @[exu_div_ctl.scala 644:58]
node adder4_out = tail(_T_137, 1) @[exu_div_ctl.scala 644:58]
node _T_138 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 645:29]
node _T_139 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 645:38]
node _T_140 = bits(a_ff, 32, 30) @[exu_div_ctl.scala 645:49]
node _T_141 = cat(_T_138, _T_139) @[Cat.scala 29:58]
node _T_142 = cat(_T_141, _T_140) @[Cat.scala 29:58]
node _T_143 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 645:68]
node _T_144 = cat(_T_143, UInt<2>("h00")) @[Cat.scala 29:58]
node _T_145 = add(_T_142, _T_144) @[exu_div_ctl.scala 645:58]
node _T_146 = tail(_T_145, 1) @[exu_div_ctl.scala 645:58]
node _T_147 = add(_T_146, b_ff) @[exu_div_ctl.scala 645:85]
node adder5_out = tail(_T_147, 1) @[exu_div_ctl.scala 645:85]
node _T_148 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 646:29]
node _T_149 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 646:38]
node _T_150 = bits(a_ff, 32, 30) @[exu_div_ctl.scala 646:49]
node _T_151 = cat(_T_148, _T_149) @[Cat.scala 29:58]
node _T_152 = cat(_T_151, _T_150) @[Cat.scala 29:58]
node _T_153 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 646:68]
node _T_154 = cat(_T_153, UInt<2>("h00")) @[Cat.scala 29:58]
node _T_155 = add(_T_152, _T_154) @[exu_div_ctl.scala 646:58]
node _T_156 = tail(_T_155, 1) @[exu_div_ctl.scala 646:58]
node _T_157 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 646:95]
node _T_158 = cat(_T_157, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_159 = add(_T_156, _T_158) @[exu_div_ctl.scala 646:85]
node adder6_out = tail(_T_159, 1) @[exu_div_ctl.scala 646:85]
node _T_160 = bits(r_ff, 32, 32) @[exu_div_ctl.scala 647:29]
node _T_161 = bits(r_ff, 32, 0) @[exu_div_ctl.scala 647:38]
node _T_162 = bits(a_ff, 32, 30) @[exu_div_ctl.scala 647:49]
node _T_163 = cat(_T_160, _T_161) @[Cat.scala 29:58]
node _T_164 = cat(_T_163, _T_162) @[Cat.scala 29:58]
node _T_165 = bits(b_ff, 34, 0) @[exu_div_ctl.scala 647:68]
node _T_166 = cat(_T_165, UInt<2>("h00")) @[Cat.scala 29:58]
node _T_167 = add(_T_164, _T_166) @[exu_div_ctl.scala 647:58]
node _T_168 = tail(_T_167, 1) @[exu_div_ctl.scala 647:58]
node _T_169 = bits(b_ff, 35, 0) @[exu_div_ctl.scala 647:95]
node _T_170 = cat(_T_169, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_171 = add(_T_168, _T_170) @[exu_div_ctl.scala 647:85]
node _T_172 = tail(_T_171, 1) @[exu_div_ctl.scala 647:85]
node _T_173 = add(_T_172, b_ff) @[exu_div_ctl.scala 647:107]
node adder7_out = tail(_T_173, 1) @[exu_div_ctl.scala 647:107]
node _T_174 = bits(adder7_out, 36, 36) @[exu_div_ctl.scala 648:35]
node _T_175 = eq(_T_174, UInt<1>("h00")) @[exu_div_ctl.scala 648:24]
node _T_176 = xor(_T_175, dividend_sign_ff) @[exu_div_ctl.scala 648:40]
node _T_177 = bits(a_ff, 29, 0) @[exu_div_ctl.scala 648:68]
node _T_178 = eq(_T_177, UInt<1>("h00")) @[exu_div_ctl.scala 648:75]
node _T_179 = eq(adder7_out, UInt<1>("h00")) @[exu_div_ctl.scala 648:98]
node _T_180 = and(_T_178, _T_179) @[exu_div_ctl.scala 648:84]
node _T_181 = or(_T_176, _T_180) @[exu_div_ctl.scala 648:60]
node _T_182 = bits(adder6_out, 36, 36) @[exu_div_ctl.scala 649:34]
node _T_183 = eq(_T_182, UInt<1>("h00")) @[exu_div_ctl.scala 649:23]
node _T_184 = xor(_T_183, dividend_sign_ff) @[exu_div_ctl.scala 649:39]
node _T_185 = bits(a_ff, 29, 0) @[exu_div_ctl.scala 649:67]
node _T_186 = eq(_T_185, UInt<1>("h00")) @[exu_div_ctl.scala 649:74]
node _T_187 = eq(adder6_out, UInt<1>("h00")) @[exu_div_ctl.scala 649:97]
node _T_188 = and(_T_186, _T_187) @[exu_div_ctl.scala 649:83]
node _T_189 = or(_T_184, _T_188) @[exu_div_ctl.scala 649:59]
node _T_190 = bits(adder5_out, 36, 36) @[exu_div_ctl.scala 650:34]
node _T_191 = eq(_T_190, UInt<1>("h00")) @[exu_div_ctl.scala 650:23]
node _T_192 = xor(_T_191, dividend_sign_ff) @[exu_div_ctl.scala 650:39]
node _T_193 = bits(a_ff, 29, 0) @[exu_div_ctl.scala 650:67]
node _T_194 = eq(_T_193, UInt<1>("h00")) @[exu_div_ctl.scala 650:74]
node _T_195 = eq(adder5_out, UInt<1>("h00")) @[exu_div_ctl.scala 650:97]
node _T_196 = and(_T_194, _T_195) @[exu_div_ctl.scala 650:83]
node _T_197 = or(_T_192, _T_196) @[exu_div_ctl.scala 650:59]
node _T_198 = bits(adder4_out, 36, 36) @[exu_div_ctl.scala 651:34]
node _T_199 = eq(_T_198, UInt<1>("h00")) @[exu_div_ctl.scala 651:23]
node _T_200 = xor(_T_199, dividend_sign_ff) @[exu_div_ctl.scala 651:39]
node _T_201 = bits(a_ff, 29, 0) @[exu_div_ctl.scala 651:67]
node _T_202 = eq(_T_201, UInt<1>("h00")) @[exu_div_ctl.scala 651:74]
node _T_203 = eq(adder4_out, UInt<1>("h00")) @[exu_div_ctl.scala 651:97]
node _T_204 = and(_T_202, _T_203) @[exu_div_ctl.scala 651:83]
node _T_205 = or(_T_200, _T_204) @[exu_div_ctl.scala 651:59]
node _T_206 = bits(adder3_out, 35, 35) @[exu_div_ctl.scala 652:34]
node _T_207 = eq(_T_206, UInt<1>("h00")) @[exu_div_ctl.scala 652:23]
node _T_208 = xor(_T_207, dividend_sign_ff) @[exu_div_ctl.scala 652:39]
node _T_209 = bits(a_ff, 29, 0) @[exu_div_ctl.scala 652:67]
node _T_210 = eq(_T_209, UInt<1>("h00")) @[exu_div_ctl.scala 652:74]
node _T_211 = eq(adder3_out, UInt<1>("h00")) @[exu_div_ctl.scala 652:97]
node _T_212 = and(_T_210, _T_211) @[exu_div_ctl.scala 652:83]
node _T_213 = or(_T_208, _T_212) @[exu_div_ctl.scala 652:59]
node _T_214 = bits(adder2_out, 34, 34) @[exu_div_ctl.scala 653:34]
node _T_215 = eq(_T_214, UInt<1>("h00")) @[exu_div_ctl.scala 653:23]
node _T_216 = xor(_T_215, dividend_sign_ff) @[exu_div_ctl.scala 653:39]
node _T_217 = bits(a_ff, 29, 0) @[exu_div_ctl.scala 653:67]
node _T_218 = eq(_T_217, UInt<1>("h00")) @[exu_div_ctl.scala 653:74]
node _T_219 = eq(adder2_out, UInt<1>("h00")) @[exu_div_ctl.scala 653:97]
node _T_220 = and(_T_218, _T_219) @[exu_div_ctl.scala 653:83]
node _T_221 = or(_T_216, _T_220) @[exu_div_ctl.scala 653:59]
node _T_222 = bits(adder1_out, 33, 33) @[exu_div_ctl.scala 654:34]
node _T_223 = eq(_T_222, UInt<1>("h00")) @[exu_div_ctl.scala 654:23]
node _T_224 = xor(_T_223, dividend_sign_ff) @[exu_div_ctl.scala 654:39]
node _T_225 = bits(a_ff, 29, 0) @[exu_div_ctl.scala 654:67]
node _T_226 = eq(_T_225, UInt<1>("h00")) @[exu_div_ctl.scala 654:74]
node _T_227 = eq(adder1_out, UInt<1>("h00")) @[exu_div_ctl.scala 654:97]
node _T_228 = and(_T_226, _T_227) @[exu_div_ctl.scala 654:83]
node _T_229 = or(_T_224, _T_228) @[exu_div_ctl.scala 654:59]
node _T_230 = cat(_T_229, UInt<1>("h00")) @[Cat.scala 29:58]
node _T_231 = cat(_T_213, _T_221) @[Cat.scala 29:58]
node _T_232 = cat(_T_231, _T_230) @[Cat.scala 29:58]
node _T_233 = cat(_T_197, _T_205) @[Cat.scala 29:58]
node _T_234 = cat(_T_181, _T_189) @[Cat.scala 29:58]
node _T_235 = cat(_T_234, _T_233) @[Cat.scala 29:58]
node _T_236 = cat(_T_235, _T_232) @[Cat.scala 29:58]
quotient_raw <= _T_236 @[exu_div_ctl.scala 648:16]
node _T_237 = bits(quotient_raw, 7, 7) @[exu_div_ctl.scala 655:39]
node _T_238 = bits(quotient_raw, 6, 6) @[exu_div_ctl.scala 655:58]
node _T_239 = or(_T_237, _T_238) @[exu_div_ctl.scala 655:43]
node _T_240 = bits(quotient_raw, 5, 5) @[exu_div_ctl.scala 655:76]
node _T_241 = or(_T_239, _T_240) @[exu_div_ctl.scala 655:62]
node _T_242 = bits(quotient_raw, 4, 4) @[exu_div_ctl.scala 655:95]
node _T_243 = or(_T_241, _T_242) @[exu_div_ctl.scala 655:80]
node _T_244 = bits(quotient_raw, 7, 7) @[exu_div_ctl.scala 656:38]
node _T_245 = bits(quotient_raw, 6, 6) @[exu_div_ctl.scala 656:57]
node _T_246 = or(_T_244, _T_245) @[exu_div_ctl.scala 656:42]
node _T_247 = bits(quotient_raw, 4, 4) @[exu_div_ctl.scala 656:76]
node _T_248 = eq(_T_247, UInt<1>("h00")) @[exu_div_ctl.scala 656:63]
node _T_249 = bits(quotient_raw, 3, 3) @[exu_div_ctl.scala 656:94]
node _T_250 = and(_T_248, _T_249) @[exu_div_ctl.scala 656:80]
node _T_251 = or(_T_246, _T_250) @[exu_div_ctl.scala 656:61]
node _T_252 = bits(quotient_raw, 3, 3) @[exu_div_ctl.scala 656:114]
node _T_253 = eq(_T_252, UInt<1>("h00")) @[exu_div_ctl.scala 656:101]
node _T_254 = bits(quotient_raw, 2, 2) @[exu_div_ctl.scala 656:132]
node _T_255 = and(_T_253, _T_254) @[exu_div_ctl.scala 656:118]
node _T_256 = or(_T_251, _T_255) @[exu_div_ctl.scala 656:99]
node _T_257 = bits(quotient_raw, 7, 7) @[exu_div_ctl.scala 657:38]
node _T_258 = bits(quotient_raw, 6, 6) @[exu_div_ctl.scala 657:59]
node _T_259 = eq(_T_258, UInt<1>("h00")) @[exu_div_ctl.scala 657:46]
node _T_260 = bits(quotient_raw, 5, 5) @[exu_div_ctl.scala 657:77]
node _T_261 = and(_T_259, _T_260) @[exu_div_ctl.scala 657:63]
node _T_262 = or(_T_257, _T_261) @[exu_div_ctl.scala 657:42]
node _T_263 = bits(quotient_raw, 4, 4) @[exu_div_ctl.scala 657:98]
node _T_264 = eq(_T_263, UInt<1>("h00")) @[exu_div_ctl.scala 657:85]
node _T_265 = bits(quotient_raw, 3, 3) @[exu_div_ctl.scala 657:116]
node _T_266 = and(_T_264, _T_265) @[exu_div_ctl.scala 657:102]
node _T_267 = or(_T_262, _T_266) @[exu_div_ctl.scala 657:82]
node _T_268 = bits(quotient_raw, 2, 2) @[exu_div_ctl.scala 657:136]
node _T_269 = eq(_T_268, UInt<1>("h00")) @[exu_div_ctl.scala 657:123]
node _T_270 = bits(quotient_raw, 1, 1) @[exu_div_ctl.scala 657:154]
node _T_271 = and(_T_269, _T_270) @[exu_div_ctl.scala 657:140]
node _T_272 = or(_T_267, _T_271) @[exu_div_ctl.scala 657:121]
node _T_273 = cat(_T_243, _T_256) @[Cat.scala 29:58]
node _T_274 = cat(_T_273, _T_272) @[Cat.scala 29:58]
quotient_new <= _T_274 @[exu_div_ctl.scala 655:18]
node _T_275 = bits(b_ff, 31, 0) @[exu_div_ctl.scala 660:48]
node _T_276 = mux(twos_comp_q_sel, q_ff, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_277 = mux(twos_comp_b_sel, _T_275, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_278 = or(_T_276, _T_277) @[Mux.scala 27:72]
wire twos_comp_in : UInt<32> @[Mux.scala 27:72]
twos_comp_in <= _T_278 @[Mux.scala 27:72]
wire _T_279 : UInt<1>[31] @[lib.scala 426:20]
node _T_280 = bits(twos_comp_in, 0, 0) @[lib.scala 428:27]
node _T_281 = orr(_T_280) @[lib.scala 428:35]
node _T_282 = bits(twos_comp_in, 1, 1) @[lib.scala 428:44]
node _T_283 = not(_T_282) @[lib.scala 428:40]
node _T_284 = bits(twos_comp_in, 1, 1) @[lib.scala 428:51]
node _T_285 = mux(_T_281, _T_283, _T_284) @[lib.scala 428:23]
_T_279[0] <= _T_285 @[lib.scala 428:17]
node _T_286 = bits(twos_comp_in, 1, 0) @[lib.scala 428:27]
node _T_287 = orr(_T_286) @[lib.scala 428:35]
node _T_288 = bits(twos_comp_in, 2, 2) @[lib.scala 428:44]
node _T_289 = not(_T_288) @[lib.scala 428:40]
node _T_290 = bits(twos_comp_in, 2, 2) @[lib.scala 428:51]
node _T_291 = mux(_T_287, _T_289, _T_290) @[lib.scala 428:23]
_T_279[1] <= _T_291 @[lib.scala 428:17]
node _T_292 = bits(twos_comp_in, 2, 0) @[lib.scala 428:27]
node _T_293 = orr(_T_292) @[lib.scala 428:35]
node _T_294 = bits(twos_comp_in, 3, 3) @[lib.scala 428:44]
node _T_295 = not(_T_294) @[lib.scala 428:40]
node _T_296 = bits(twos_comp_in, 3, 3) @[lib.scala 428:51]
node _T_297 = mux(_T_293, _T_295, _T_296) @[lib.scala 428:23]
_T_279[2] <= _T_297 @[lib.scala 428:17]
node _T_298 = bits(twos_comp_in, 3, 0) @[lib.scala 428:27]
node _T_299 = orr(_T_298) @[lib.scala 428:35]
node _T_300 = bits(twos_comp_in, 4, 4) @[lib.scala 428:44]
node _T_301 = not(_T_300) @[lib.scala 428:40]
node _T_302 = bits(twos_comp_in, 4, 4) @[lib.scala 428:51]
node _T_303 = mux(_T_299, _T_301, _T_302) @[lib.scala 428:23]
_T_279[3] <= _T_303 @[lib.scala 428:17]
node _T_304 = bits(twos_comp_in, 4, 0) @[lib.scala 428:27]
node _T_305 = orr(_T_304) @[lib.scala 428:35]
node _T_306 = bits(twos_comp_in, 5, 5) @[lib.scala 428:44]
node _T_307 = not(_T_306) @[lib.scala 428:40]
node _T_308 = bits(twos_comp_in, 5, 5) @[lib.scala 428:51]
node _T_309 = mux(_T_305, _T_307, _T_308) @[lib.scala 428:23]
_T_279[4] <= _T_309 @[lib.scala 428:17]
node _T_310 = bits(twos_comp_in, 5, 0) @[lib.scala 428:27]
node _T_311 = orr(_T_310) @[lib.scala 428:35]
node _T_312 = bits(twos_comp_in, 6, 6) @[lib.scala 428:44]
node _T_313 = not(_T_312) @[lib.scala 428:40]
node _T_314 = bits(twos_comp_in, 6, 6) @[lib.scala 428:51]
node _T_315 = mux(_T_311, _T_313, _T_314) @[lib.scala 428:23]
_T_279[5] <= _T_315 @[lib.scala 428:17]
node _T_316 = bits(twos_comp_in, 6, 0) @[lib.scala 428:27]
node _T_317 = orr(_T_316) @[lib.scala 428:35]
node _T_318 = bits(twos_comp_in, 7, 7) @[lib.scala 428:44]
node _T_319 = not(_T_318) @[lib.scala 428:40]
node _T_320 = bits(twos_comp_in, 7, 7) @[lib.scala 428:51]
node _T_321 = mux(_T_317, _T_319, _T_320) @[lib.scala 428:23]
_T_279[6] <= _T_321 @[lib.scala 428:17]
node _T_322 = bits(twos_comp_in, 7, 0) @[lib.scala 428:27]
node _T_323 = orr(_T_322) @[lib.scala 428:35]
node _T_324 = bits(twos_comp_in, 8, 8) @[lib.scala 428:44]
node _T_325 = not(_T_324) @[lib.scala 428:40]
node _T_326 = bits(twos_comp_in, 8, 8) @[lib.scala 428:51]
node _T_327 = mux(_T_323, _T_325, _T_326) @[lib.scala 428:23]
_T_279[7] <= _T_327 @[lib.scala 428:17]
node _T_328 = bits(twos_comp_in, 8, 0) @[lib.scala 428:27]
node _T_329 = orr(_T_328) @[lib.scala 428:35]
node _T_330 = bits(twos_comp_in, 9, 9) @[lib.scala 428:44]
node _T_331 = not(_T_330) @[lib.scala 428:40]
node _T_332 = bits(twos_comp_in, 9, 9) @[lib.scala 428:51]
node _T_333 = mux(_T_329, _T_331, _T_332) @[lib.scala 428:23]
_T_279[8] <= _T_333 @[lib.scala 428:17]
node _T_334 = bits(twos_comp_in, 9, 0) @[lib.scala 428:27]
node _T_335 = orr(_T_334) @[lib.scala 428:35]
node _T_336 = bits(twos_comp_in, 10, 10) @[lib.scala 428:44]
node _T_337 = not(_T_336) @[lib.scala 428:40]
node _T_338 = bits(twos_comp_in, 10, 10) @[lib.scala 428:51]
node _T_339 = mux(_T_335, _T_337, _T_338) @[lib.scala 428:23]
_T_279[9] <= _T_339 @[lib.scala 428:17]
node _T_340 = bits(twos_comp_in, 10, 0) @[lib.scala 428:27]
node _T_341 = orr(_T_340) @[lib.scala 428:35]
node _T_342 = bits(twos_comp_in, 11, 11) @[lib.scala 428:44]
node _T_343 = not(_T_342) @[lib.scala 428:40]
node _T_344 = bits(twos_comp_in, 11, 11) @[lib.scala 428:51]
node _T_345 = mux(_T_341, _T_343, _T_344) @[lib.scala 428:23]
_T_279[10] <= _T_345 @[lib.scala 428:17]
node _T_346 = bits(twos_comp_in, 11, 0) @[lib.scala 428:27]
node _T_347 = orr(_T_346) @[lib.scala 428:35]
node _T_348 = bits(twos_comp_in, 12, 12) @[lib.scala 428:44]
node _T_349 = not(_T_348) @[lib.scala 428:40]
node _T_350 = bits(twos_comp_in, 12, 12) @[lib.scala 428:51]
node _T_351 = mux(_T_347, _T_349, _T_350) @[lib.scala 428:23]
_T_279[11] <= _T_351 @[lib.scala 428:17]
node _T_352 = bits(twos_comp_in, 12, 0) @[lib.scala 428:27]
node _T_353 = orr(_T_352) @[lib.scala 428:35]
node _T_354 = bits(twos_comp_in, 13, 13) @[lib.scala 428:44]
node _T_355 = not(_T_354) @[lib.scala 428:40]
node _T_356 = bits(twos_comp_in, 13, 13) @[lib.scala 428:51]
node _T_357 = mux(_T_353, _T_355, _T_356) @[lib.scala 428:23]
_T_279[12] <= _T_357 @[lib.scala 428:17]
node _T_358 = bits(twos_comp_in, 13, 0) @[lib.scala 428:27]
node _T_359 = orr(_T_358) @[lib.scala 428:35]
node _T_360 = bits(twos_comp_in, 14, 14) @[lib.scala 428:44]
node _T_361 = not(_T_360) @[lib.scala 428:40]
node _T_362 = bits(twos_comp_in, 14, 14) @[lib.scala 428:51]
node _T_363 = mux(_T_359, _T_361, _T_362) @[lib.scala 428:23]
_T_279[13] <= _T_363 @[lib.scala 428:17]
node _T_364 = bits(twos_comp_in, 14, 0) @[lib.scala 428:27]
node _T_365 = orr(_T_364) @[lib.scala 428:35]
node _T_366 = bits(twos_comp_in, 15, 15) @[lib.scala 428:44]
node _T_367 = not(_T_366) @[lib.scala 428:40]
node _T_368 = bits(twos_comp_in, 15, 15) @[lib.scala 428:51]
node _T_369 = mux(_T_365, _T_367, _T_368) @[lib.scala 428:23]
_T_279[14] <= _T_369 @[lib.scala 428:17]
node _T_370 = bits(twos_comp_in, 15, 0) @[lib.scala 428:27]
node _T_371 = orr(_T_370) @[lib.scala 428:35]
node _T_372 = bits(twos_comp_in, 16, 16) @[lib.scala 428:44]
node _T_373 = not(_T_372) @[lib.scala 428:40]
node _T_374 = bits(twos_comp_in, 16, 16) @[lib.scala 428:51]
node _T_375 = mux(_T_371, _T_373, _T_374) @[lib.scala 428:23]
_T_279[15] <= _T_375 @[lib.scala 428:17]
node _T_376 = bits(twos_comp_in, 16, 0) @[lib.scala 428:27]
node _T_377 = orr(_T_376) @[lib.scala 428:35]
node _T_378 = bits(twos_comp_in, 17, 17) @[lib.scala 428:44]
node _T_379 = not(_T_378) @[lib.scala 428:40]
node _T_380 = bits(twos_comp_in, 17, 17) @[lib.scala 428:51]
node _T_381 = mux(_T_377, _T_379, _T_380) @[lib.scala 428:23]
_T_279[16] <= _T_381 @[lib.scala 428:17]
node _T_382 = bits(twos_comp_in, 17, 0) @[lib.scala 428:27]
node _T_383 = orr(_T_382) @[lib.scala 428:35]
node _T_384 = bits(twos_comp_in, 18, 18) @[lib.scala 428:44]
node _T_385 = not(_T_384) @[lib.scala 428:40]
node _T_386 = bits(twos_comp_in, 18, 18) @[lib.scala 428:51]
node _T_387 = mux(_T_383, _T_385, _T_386) @[lib.scala 428:23]
_T_279[17] <= _T_387 @[lib.scala 428:17]
node _T_388 = bits(twos_comp_in, 18, 0) @[lib.scala 428:27]
node _T_389 = orr(_T_388) @[lib.scala 428:35]
node _T_390 = bits(twos_comp_in, 19, 19) @[lib.scala 428:44]
node _T_391 = not(_T_390) @[lib.scala 428:40]
node _T_392 = bits(twos_comp_in, 19, 19) @[lib.scala 428:51]
node _T_393 = mux(_T_389, _T_391, _T_392) @[lib.scala 428:23]
_T_279[18] <= _T_393 @[lib.scala 428:17]
node _T_394 = bits(twos_comp_in, 19, 0) @[lib.scala 428:27]
node _T_395 = orr(_T_394) @[lib.scala 428:35]
node _T_396 = bits(twos_comp_in, 20, 20) @[lib.scala 428:44]
node _T_397 = not(_T_396) @[lib.scala 428:40]
node _T_398 = bits(twos_comp_in, 20, 20) @[lib.scala 428:51]
node _T_399 = mux(_T_395, _T_397, _T_398) @[lib.scala 428:23]
_T_279[19] <= _T_399 @[lib.scala 428:17]
node _T_400 = bits(twos_comp_in, 20, 0) @[lib.scala 428:27]
node _T_401 = orr(_T_400) @[lib.scala 428:35]
node _T_402 = bits(twos_comp_in, 21, 21) @[lib.scala 428:44]
node _T_403 = not(_T_402) @[lib.scala 428:40]
node _T_404 = bits(twos_comp_in, 21, 21) @[lib.scala 428:51]
node _T_405 = mux(_T_401, _T_403, _T_404) @[lib.scala 428:23]
_T_279[20] <= _T_405 @[lib.scala 428:17]
node _T_406 = bits(twos_comp_in, 21, 0) @[lib.scala 428:27]
node _T_407 = orr(_T_406) @[lib.scala 428:35]
node _T_408 = bits(twos_comp_in, 22, 22) @[lib.scala 428:44]
node _T_409 = not(_T_408) @[lib.scala 428:40]
node _T_410 = bits(twos_comp_in, 22, 22) @[lib.scala 428:51]
node _T_411 = mux(_T_407, _T_409, _T_410) @[lib.scala 428:23]
_T_279[21] <= _T_411 @[lib.scala 428:17]
node _T_412 = bits(twos_comp_in, 22, 0) @[lib.scala 428:27]
node _T_413 = orr(_T_412) @[lib.scala 428:35]
node _T_414 = bits(twos_comp_in, 23, 23) @[lib.scala 428:44]
node _T_415 = not(_T_414) @[lib.scala 428:40]
node _T_416 = bits(twos_comp_in, 23, 23) @[lib.scala 428:51]
node _T_417 = mux(_T_413, _T_415, _T_416) @[lib.scala 428:23]
_T_279[22] <= _T_417 @[lib.scala 428:17]
node _T_418 = bits(twos_comp_in, 23, 0) @[lib.scala 428:27]
node _T_419 = orr(_T_418) @[lib.scala 428:35]
node _T_420 = bits(twos_comp_in, 24, 24) @[lib.scala 428:44]
node _T_421 = not(_T_420) @[lib.scala 428:40]
node _T_422 = bits(twos_comp_in, 24, 24) @[lib.scala 428:51]
node _T_423 = mux(_T_419, _T_421, _T_422) @[lib.scala 428:23]
_T_279[23] <= _T_423 @[lib.scala 428:17]
node _T_424 = bits(twos_comp_in, 24, 0) @[lib.scala 428:27]
node _T_425 = orr(_T_424) @[lib.scala 428:35]
node _T_426 = bits(twos_comp_in, 25, 25) @[lib.scala 428:44]
node _T_427 = not(_T_426) @[lib.scala 428:40]
node _T_428 = bits(twos_comp_in, 25, 25) @[lib.scala 428:51]
node _T_429 = mux(_T_425, _T_427, _T_428) @[lib.scala 428:23]
_T_279[24] <= _T_429 @[lib.scala 428:17]
node _T_430 = bits(twos_comp_in, 25, 0) @[lib.scala 428:27]
node _T_431 = orr(_T_430) @[lib.scala 428:35]
node _T_432 = bits(twos_comp_in, 26, 26) @[lib.scala 428:44]
node _T_433 = not(_T_432) @[lib.scala 428:40]
node _T_434 = bits(twos_comp_in, 26, 26) @[lib.scala 428:51]
node _T_435 = mux(_T_431, _T_433, _T_434) @[lib.scala 428:23]
_T_279[25] <= _T_435 @[lib.scala 428:17]
node _T_436 = bits(twos_comp_in, 26, 0) @[lib.scala 428:27]
node _T_437 = orr(_T_436) @[lib.scala 428:35]
node _T_438 = bits(twos_comp_in, 27, 27) @[lib.scala 428:44]
node _T_439 = not(_T_438) @[lib.scala 428:40]
node _T_440 = bits(twos_comp_in, 27, 27) @[lib.scala 428:51]
node _T_441 = mux(_T_437, _T_439, _T_440) @[lib.scala 428:23]
_T_279[26] <= _T_441 @[lib.scala 428:17]
node _T_442 = bits(twos_comp_in, 27, 0) @[lib.scala 428:27]
node _T_443 = orr(_T_442) @[lib.scala 428:35]
node _T_444 = bits(twos_comp_in, 28, 28) @[lib.scala 428:44]
node _T_445 = not(_T_444) @[lib.scala 428:40]
node _T_446 = bits(twos_comp_in, 28, 28) @[lib.scala 428:51]
node _T_447 = mux(_T_443, _T_445, _T_446) @[lib.scala 428:23]
_T_279[27] <= _T_447 @[lib.scala 428:17]
node _T_448 = bits(twos_comp_in, 28, 0) @[lib.scala 428:27]
node _T_449 = orr(_T_448) @[lib.scala 428:35]
node _T_450 = bits(twos_comp_in, 29, 29) @[lib.scala 428:44]
node _T_451 = not(_T_450) @[lib.scala 428:40]
node _T_452 = bits(twos_comp_in, 29, 29) @[lib.scala 428:51]
node _T_453 = mux(_T_449, _T_451, _T_452) @[lib.scala 428:23]
_T_279[28] <= _T_453 @[lib.scala 428:17]
node _T_454 = bits(twos_comp_in, 29, 0) @[lib.scala 428:27]
node _T_455 = orr(_T_454) @[lib.scala 428:35]
node _T_456 = bits(twos_comp_in, 30, 30) @[lib.scala 428:44]
node _T_457 = not(_T_456) @[lib.scala 428:40]
node _T_458 = bits(twos_comp_in, 30, 30) @[lib.scala 428:51]
node _T_459 = mux(_T_455, _T_457, _T_458) @[lib.scala 428:23]
_T_279[29] <= _T_459 @[lib.scala 428:17]
node _T_460 = bits(twos_comp_in, 30, 0) @[lib.scala 428:27]
node _T_461 = orr(_T_460) @[lib.scala 428:35]
node _T_462 = bits(twos_comp_in, 31, 31) @[lib.scala 428:44]
node _T_463 = not(_T_462) @[lib.scala 428:40]
node _T_464 = bits(twos_comp_in, 31, 31) @[lib.scala 428:51]
node _T_465 = mux(_T_461, _T_463, _T_464) @[lib.scala 428:23]
_T_279[30] <= _T_465 @[lib.scala 428:17]
node _T_466 = cat(_T_279[2], _T_279[1]) @[lib.scala 430:14]
node _T_467 = cat(_T_466, _T_279[0]) @[lib.scala 430:14]
node _T_468 = cat(_T_279[4], _T_279[3]) @[lib.scala 430:14]
node _T_469 = cat(_T_279[6], _T_279[5]) @[lib.scala 430:14]
node _T_470 = cat(_T_469, _T_468) @[lib.scala 430:14]
node _T_471 = cat(_T_470, _T_467) @[lib.scala 430:14]
node _T_472 = cat(_T_279[8], _T_279[7]) @[lib.scala 430:14]
node _T_473 = cat(_T_279[10], _T_279[9]) @[lib.scala 430:14]
node _T_474 = cat(_T_473, _T_472) @[lib.scala 430:14]
node _T_475 = cat(_T_279[12], _T_279[11]) @[lib.scala 430:14]
node _T_476 = cat(_T_279[14], _T_279[13]) @[lib.scala 430:14]
node _T_477 = cat(_T_476, _T_475) @[lib.scala 430:14]
node _T_478 = cat(_T_477, _T_474) @[lib.scala 430:14]
node _T_479 = cat(_T_478, _T_471) @[lib.scala 430:14]
node _T_480 = cat(_T_279[16], _T_279[15]) @[lib.scala 430:14]
node _T_481 = cat(_T_279[18], _T_279[17]) @[lib.scala 430:14]
node _T_482 = cat(_T_481, _T_480) @[lib.scala 430:14]
node _T_483 = cat(_T_279[20], _T_279[19]) @[lib.scala 430:14]
node _T_484 = cat(_T_279[22], _T_279[21]) @[lib.scala 430:14]
node _T_485 = cat(_T_484, _T_483) @[lib.scala 430:14]
node _T_486 = cat(_T_485, _T_482) @[lib.scala 430:14]
node _T_487 = cat(_T_279[24], _T_279[23]) @[lib.scala 430:14]
node _T_488 = cat(_T_279[26], _T_279[25]) @[lib.scala 430:14]
node _T_489 = cat(_T_488, _T_487) @[lib.scala 430:14]
node _T_490 = cat(_T_279[28], _T_279[27]) @[lib.scala 430:14]
node _T_491 = cat(_T_279[30], _T_279[29]) @[lib.scala 430:14]
node _T_492 = cat(_T_491, _T_490) @[lib.scala 430:14]
node _T_493 = cat(_T_492, _T_489) @[lib.scala 430:14]
node _T_494 = cat(_T_493, _T_486) @[lib.scala 430:14]
node _T_495 = cat(_T_494, _T_479) @[lib.scala 430:14]
node _T_496 = bits(twos_comp_in, 0, 0) @[lib.scala 430:24]
node twos_comp_out = cat(_T_495, _T_496) @[Cat.scala 29:58]
node _T_497 = eq(a_shift, UInt<1>("h00")) @[exu_div_ctl.scala 664:6]
node _T_498 = eq(shortq_enable_ff, UInt<1>("h00")) @[exu_div_ctl.scala 664:17]
node _T_499 = and(_T_497, _T_498) @[exu_div_ctl.scala 664:15]
node _T_500 = bits(_T_499, 0, 0) @[exu_div_ctl.scala 664:36]
node _T_501 = bits(io.dividend_in, 31, 31) @[exu_div_ctl.scala 664:79]
node _T_502 = and(io.signed_in, _T_501) @[exu_div_ctl.scala 664:63]
node _T_503 = bits(io.dividend_in, 31, 0) @[exu_div_ctl.scala 664:98]
node _T_504 = cat(_T_502, _T_503) @[Cat.scala 29:58]
node _T_505 = bits(a_ff, 29, 0) @[exu_div_ctl.scala 665:52]
node _T_506 = cat(_T_505, UInt<3>("h00")) @[Cat.scala 29:58]
node _T_507 = bits(ar_shifted, 32, 0) @[exu_div_ctl.scala 666:54]
node _T_508 = mux(_T_500, _T_504, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_509 = mux(a_shift, _T_506, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_510 = mux(shortq_enable_ff, _T_507, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_511 = or(_T_508, _T_509) @[Mux.scala 27:72]
node _T_512 = or(_T_511, _T_510) @[Mux.scala 27:72]
wire a_in : UInt<33> @[Mux.scala 27:72]
a_in <= _T_512 @[Mux.scala 27:72]
node _T_513 = eq(b_twos_comp, UInt<1>("h00")) @[exu_div_ctl.scala 669:5]
node _T_514 = bits(io.divisor_in, 31, 31) @[exu_div_ctl.scala 669:78]
node _T_515 = and(io.signed_in, _T_514) @[exu_div_ctl.scala 669:63]
node _T_516 = bits(io.divisor_in, 31, 0) @[exu_div_ctl.scala 669:96]
node _T_517 = cat(_T_515, _T_516) @[Cat.scala 29:58]
node _T_518 = eq(divisor_sign_ff, UInt<1>("h00")) @[exu_div_ctl.scala 670:50]
node _T_519 = bits(twos_comp_out, 31, 0) @[exu_div_ctl.scala 670:80]
node _T_520 = cat(_T_518, _T_519) @[Cat.scala 29:58]
node _T_521 = mux(_T_513, _T_517, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_522 = mux(b_twos_comp, _T_520, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_523 = or(_T_521, _T_522) @[Mux.scala 27:72]
wire b_in : UInt<33> @[Mux.scala 27:72]
b_in <= _T_523 @[Mux.scala 27:72]
node _T_524 = mux(UInt<1>("h01"), UInt<33>("h01ffffffff"), UInt<33>("h00")) @[Bitwise.scala 72:12]
node _T_525 = bits(r_ff, 29, 0) @[exu_div_ctl.scala 674:55]
node _T_526 = bits(a_ff, 32, 30) @[exu_div_ctl.scala 674:66]
node _T_527 = cat(_T_525, _T_526) @[Cat.scala 29:58]
node _T_528 = bits(adder1_out, 32, 0) @[exu_div_ctl.scala 675:59]
node _T_529 = bits(adder2_out, 32, 0) @[exu_div_ctl.scala 676:59]
node _T_530 = bits(adder3_out, 32, 0) @[exu_div_ctl.scala 677:59]
node _T_531 = bits(adder4_out, 32, 0) @[exu_div_ctl.scala 678:59]
node _T_532 = bits(adder5_out, 32, 0) @[exu_div_ctl.scala 679:59]
node _T_533 = bits(adder6_out, 32, 0) @[exu_div_ctl.scala 680:59]
node _T_534 = bits(adder7_out, 32, 0) @[exu_div_ctl.scala 681:59]
node _T_535 = bits(ar_shifted, 65, 33) @[exu_div_ctl.scala 682:57]
node _T_536 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 683:59]
node _T_537 = cat(UInt<1>("h00"), _T_536) @[Cat.scala 29:58]
node _T_538 = mux(r_sign_sel, _T_524, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_539 = mux(r_adder_sel_0, _T_527, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_540 = mux(r_adder_sel_1, _T_528, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_541 = mux(r_adder_sel_2, _T_529, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_542 = mux(r_adder_sel_3, _T_530, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_543 = mux(r_adder_sel_4, _T_531, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_544 = mux(r_adder_sel_5, _T_532, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_545 = mux(r_adder_sel_6, _T_533, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_546 = mux(r_adder_sel_7, _T_534, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_547 = mux(shortq_enable_ff, _T_535, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_548 = mux(by_zero_case, _T_537, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_549 = or(_T_538, _T_539) @[Mux.scala 27:72]
node _T_550 = or(_T_549, _T_540) @[Mux.scala 27:72]
node _T_551 = or(_T_550, _T_541) @[Mux.scala 27:72]
node _T_552 = or(_T_551, _T_542) @[Mux.scala 27:72]
node _T_553 = or(_T_552, _T_543) @[Mux.scala 27:72]
node _T_554 = or(_T_553, _T_544) @[Mux.scala 27:72]
node _T_555 = or(_T_554, _T_545) @[Mux.scala 27:72]
node _T_556 = or(_T_555, _T_546) @[Mux.scala 27:72]
node _T_557 = or(_T_556, _T_547) @[Mux.scala 27:72]
node _T_558 = or(_T_557, _T_548) @[Mux.scala 27:72]
wire r_in : UInt<33> @[Mux.scala 27:72]
r_in <= _T_558 @[Mux.scala 27:72]
node _T_559 = eq(valid_ff, UInt<1>("h00")) @[exu_div_ctl.scala 686:4]
node _T_560 = bits(q_ff, 28, 0) @[exu_div_ctl.scala 686:54]
node _T_561 = cat(_T_560, quotient_new) @[Cat.scala 29:58]
node _T_562 = cat(UInt<28>("h00"), smallnum) @[Cat.scala 29:58]
node _T_563 = mux(UInt<1>("h01"), UInt<32>("h0ffffffff"), UInt<32>("h00")) @[Bitwise.scala 72:12]
node _T_564 = mux(_T_559, _T_561, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_565 = mux(smallnum_case, _T_562, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_566 = mux(by_zero_case, _T_563, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_567 = or(_T_564, _T_565) @[Mux.scala 27:72]
node _T_568 = or(_T_567, _T_566) @[Mux.scala 27:72]
wire q_in : UInt<32> @[Mux.scala 27:72]
q_in <= _T_568 @[Mux.scala 27:72]
node _T_569 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 690:30]
node _T_570 = and(finish_ff, _T_569) @[exu_div_ctl.scala 690:28]
io.valid_out <= _T_570 @[exu_div_ctl.scala 690:15]
node _T_571 = eq(rem_ff, UInt<1>("h00")) @[exu_div_ctl.scala 692:6]
node _T_572 = eq(twos_comp_q_sel, UInt<1>("h00")) @[exu_div_ctl.scala 692:16]
node _T_573 = and(_T_571, _T_572) @[exu_div_ctl.scala 692:14]
node _T_574 = bits(_T_573, 0, 0) @[exu_div_ctl.scala 692:40]
node _T_575 = bits(r_ff, 31, 0) @[exu_div_ctl.scala 693:48]
node _T_576 = mux(_T_574, q_ff, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_577 = mux(rem_ff, _T_575, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_578 = mux(twos_comp_q_sel, twos_comp_out, UInt<1>("h00")) @[Mux.scala 27:72]
node _T_579 = or(_T_576, _T_577) @[Mux.scala 27:72]
node _T_580 = or(_T_579, _T_578) @[Mux.scala 27:72]
wire _T_581 : UInt<32> @[Mux.scala 27:72]
_T_581 <= _T_580 @[Mux.scala 27:72]
io.data_out <= _T_581 @[exu_div_ctl.scala 691:15]
node _T_582 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_583 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_584 = eq(_T_583, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_585 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_586 = eq(_T_585, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_587 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_588 = eq(_T_587, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_589 = and(_T_584, _T_586) @[exu_div_ctl.scala 698:95]
node _T_590 = and(_T_589, _T_588) @[exu_div_ctl.scala 698:95]
node _T_591 = and(_T_582, _T_590) @[exu_div_ctl.scala 699:11]
node _T_592 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_593 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_594 = eq(_T_593, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_595 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_596 = eq(_T_595, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_597 = and(_T_594, _T_596) @[exu_div_ctl.scala 698:95]
node _T_598 = and(_T_592, _T_597) @[exu_div_ctl.scala 699:11]
node _T_599 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 704:38]
node _T_600 = eq(_T_599, UInt<1>("h00")) @[exu_div_ctl.scala 704:33]
node _T_601 = and(_T_598, _T_600) @[exu_div_ctl.scala 704:31]
node _T_602 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_603 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_604 = eq(_T_603, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_605 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_606 = eq(_T_605, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_607 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_608 = eq(_T_607, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_609 = and(_T_604, _T_606) @[exu_div_ctl.scala 698:95]
node _T_610 = and(_T_609, _T_608) @[exu_div_ctl.scala 698:95]
node _T_611 = and(_T_602, _T_610) @[exu_div_ctl.scala 699:11]
node _T_612 = or(_T_601, _T_611) @[exu_div_ctl.scala 704:42]
node _T_613 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_614 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_615 = and(_T_613, _T_614) @[exu_div_ctl.scala 697:95]
node _T_616 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_617 = eq(_T_616, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_618 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_619 = eq(_T_618, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_620 = and(_T_617, _T_619) @[exu_div_ctl.scala 698:95]
node _T_621 = and(_T_615, _T_620) @[exu_div_ctl.scala 699:11]
node _T_622 = or(_T_612, _T_621) @[exu_div_ctl.scala 704:75]
node _T_623 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_624 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_625 = eq(_T_624, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_626 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_627 = eq(_T_626, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_628 = and(_T_625, _T_627) @[exu_div_ctl.scala 698:95]
node _T_629 = and(_T_623, _T_628) @[exu_div_ctl.scala 699:11]
node _T_630 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 706:38]
node _T_631 = eq(_T_630, UInt<1>("h00")) @[exu_div_ctl.scala 706:33]
node _T_632 = and(_T_629, _T_631) @[exu_div_ctl.scala 706:31]
node _T_633 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_634 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_635 = eq(_T_634, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_636 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_637 = eq(_T_636, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_638 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_639 = eq(_T_638, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_640 = and(_T_635, _T_637) @[exu_div_ctl.scala 698:95]
node _T_641 = and(_T_640, _T_639) @[exu_div_ctl.scala 698:95]
node _T_642 = and(_T_633, _T_641) @[exu_div_ctl.scala 699:11]
node _T_643 = or(_T_632, _T_642) @[exu_div_ctl.scala 706:42]
node _T_644 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_645 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_646 = eq(_T_645, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_647 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_648 = eq(_T_647, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_649 = and(_T_646, _T_648) @[exu_div_ctl.scala 698:95]
node _T_650 = and(_T_644, _T_649) @[exu_div_ctl.scala 699:11]
node _T_651 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 706:113]
node _T_652 = eq(_T_651, UInt<1>("h00")) @[exu_div_ctl.scala 706:108]
node _T_653 = and(_T_650, _T_652) @[exu_div_ctl.scala 706:106]
node _T_654 = or(_T_643, _T_653) @[exu_div_ctl.scala 706:78]
node _T_655 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_656 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:75]
node _T_657 = eq(_T_656, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_658 = and(_T_655, _T_657) @[exu_div_ctl.scala 697:95]
node _T_659 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_660 = eq(_T_659, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_661 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_662 = eq(_T_661, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_663 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:58]
node _T_664 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 698:58]
node _T_665 = and(_T_660, _T_662) @[exu_div_ctl.scala 698:95]
node _T_666 = and(_T_665, _T_663) @[exu_div_ctl.scala 698:95]
node _T_667 = and(_T_666, _T_664) @[exu_div_ctl.scala 698:95]
node _T_668 = and(_T_658, _T_667) @[exu_div_ctl.scala 699:11]
node _T_669 = or(_T_654, _T_668) @[exu_div_ctl.scala 706:117]
node _T_670 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:75]
node _T_671 = eq(_T_670, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_672 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_673 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_674 = and(_T_671, _T_672) @[exu_div_ctl.scala 697:95]
node _T_675 = and(_T_674, _T_673) @[exu_div_ctl.scala 697:95]
node _T_676 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_677 = eq(_T_676, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_678 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_679 = eq(_T_678, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_680 = and(_T_677, _T_679) @[exu_div_ctl.scala 698:95]
node _T_681 = and(_T_675, _T_680) @[exu_div_ctl.scala 699:11]
node _T_682 = or(_T_669, _T_681) @[exu_div_ctl.scala 707:44]
node _T_683 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_684 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_685 = and(_T_683, _T_684) @[exu_div_ctl.scala 697:95]
node _T_686 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_687 = eq(_T_686, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_688 = and(_T_685, _T_687) @[exu_div_ctl.scala 699:11]
node _T_689 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 707:114]
node _T_690 = eq(_T_689, UInt<1>("h00")) @[exu_div_ctl.scala 707:109]
node _T_691 = and(_T_688, _T_690) @[exu_div_ctl.scala 707:107]
node _T_692 = or(_T_682, _T_691) @[exu_div_ctl.scala 707:80]
node _T_693 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_694 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_695 = and(_T_693, _T_694) @[exu_div_ctl.scala 697:95]
node _T_696 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_697 = eq(_T_696, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_698 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:58]
node _T_699 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_700 = eq(_T_699, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_701 = and(_T_697, _T_698) @[exu_div_ctl.scala 698:95]
node _T_702 = and(_T_701, _T_700) @[exu_div_ctl.scala 698:95]
node _T_703 = and(_T_695, _T_702) @[exu_div_ctl.scala 699:11]
node _T_704 = or(_T_692, _T_703) @[exu_div_ctl.scala 707:119]
node _T_705 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_706 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_707 = and(_T_705, _T_706) @[exu_div_ctl.scala 697:95]
node _T_708 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_709 = eq(_T_708, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_710 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_711 = eq(_T_710, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_712 = and(_T_709, _T_711) @[exu_div_ctl.scala 698:95]
node _T_713 = and(_T_707, _T_712) @[exu_div_ctl.scala 699:11]
node _T_714 = or(_T_704, _T_713) @[exu_div_ctl.scala 708:44]
node _T_715 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_716 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_717 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_718 = and(_T_715, _T_716) @[exu_div_ctl.scala 697:95]
node _T_719 = and(_T_718, _T_717) @[exu_div_ctl.scala 697:95]
node _T_720 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_721 = eq(_T_720, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_722 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:58]
node _T_723 = and(_T_721, _T_722) @[exu_div_ctl.scala 698:95]
node _T_724 = and(_T_719, _T_723) @[exu_div_ctl.scala 699:11]
node _T_725 = or(_T_714, _T_724) @[exu_div_ctl.scala 708:79]
node _T_726 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_727 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_728 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_729 = and(_T_726, _T_727) @[exu_div_ctl.scala 697:95]
node _T_730 = and(_T_729, _T_728) @[exu_div_ctl.scala 697:95]
node _T_731 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_732 = eq(_T_731, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_733 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_734 = eq(_T_733, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_735 = and(_T_732, _T_734) @[exu_div_ctl.scala 698:95]
node _T_736 = and(_T_730, _T_735) @[exu_div_ctl.scala 699:11]
node _T_737 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_738 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:75]
node _T_739 = eq(_T_738, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_740 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_741 = and(_T_737, _T_739) @[exu_div_ctl.scala 697:95]
node _T_742 = and(_T_741, _T_740) @[exu_div_ctl.scala 697:95]
node _T_743 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_744 = eq(_T_743, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_745 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:58]
node _T_746 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 698:58]
node _T_747 = and(_T_744, _T_745) @[exu_div_ctl.scala 698:95]
node _T_748 = and(_T_747, _T_746) @[exu_div_ctl.scala 698:95]
node _T_749 = and(_T_742, _T_748) @[exu_div_ctl.scala 699:11]
node _T_750 = or(_T_736, _T_749) @[exu_div_ctl.scala 710:45]
node _T_751 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_752 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_753 = eq(_T_752, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_754 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_755 = eq(_T_754, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_756 = and(_T_753, _T_755) @[exu_div_ctl.scala 698:95]
node _T_757 = and(_T_751, _T_756) @[exu_div_ctl.scala 699:11]
node _T_758 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 710:121]
node _T_759 = eq(_T_758, UInt<1>("h00")) @[exu_div_ctl.scala 710:116]
node _T_760 = and(_T_757, _T_759) @[exu_div_ctl.scala 710:114]
node _T_761 = or(_T_750, _T_760) @[exu_div_ctl.scala 710:86]
node _T_762 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_763 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_764 = eq(_T_763, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_765 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_766 = eq(_T_765, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_767 = and(_T_764, _T_766) @[exu_div_ctl.scala 698:95]
node _T_768 = and(_T_762, _T_767) @[exu_div_ctl.scala 699:11]
node _T_769 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 711:40]
node _T_770 = eq(_T_769, UInt<1>("h00")) @[exu_div_ctl.scala 711:35]
node _T_771 = and(_T_768, _T_770) @[exu_div_ctl.scala 711:33]
node _T_772 = or(_T_761, _T_771) @[exu_div_ctl.scala 710:129]
node _T_773 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_774 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_775 = eq(_T_774, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_776 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_777 = eq(_T_776, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_778 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_779 = eq(_T_778, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_780 = and(_T_775, _T_777) @[exu_div_ctl.scala 698:95]
node _T_781 = and(_T_780, _T_779) @[exu_div_ctl.scala 698:95]
node _T_782 = and(_T_773, _T_781) @[exu_div_ctl.scala 699:11]
node _T_783 = or(_T_772, _T_782) @[exu_div_ctl.scala 711:47]
node _T_784 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:75]
node _T_785 = eq(_T_784, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_786 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_787 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:75]
node _T_788 = eq(_T_787, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_789 = and(_T_785, _T_786) @[exu_div_ctl.scala 697:95]
node _T_790 = and(_T_789, _T_788) @[exu_div_ctl.scala 697:95]
node _T_791 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_792 = eq(_T_791, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_793 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_794 = eq(_T_793, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_795 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:58]
node _T_796 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 698:58]
node _T_797 = and(_T_792, _T_794) @[exu_div_ctl.scala 698:95]
node _T_798 = and(_T_797, _T_795) @[exu_div_ctl.scala 698:95]
node _T_799 = and(_T_798, _T_796) @[exu_div_ctl.scala 698:95]
node _T_800 = and(_T_790, _T_799) @[exu_div_ctl.scala 699:11]
node _T_801 = or(_T_783, _T_800) @[exu_div_ctl.scala 711:88]
node _T_802 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:75]
node _T_803 = eq(_T_802, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_804 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_805 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_806 = and(_T_803, _T_804) @[exu_div_ctl.scala 697:95]
node _T_807 = and(_T_806, _T_805) @[exu_div_ctl.scala 697:95]
node _T_808 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_809 = eq(_T_808, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_810 = and(_T_807, _T_809) @[exu_div_ctl.scala 699:11]
node _T_811 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 712:43]
node _T_812 = eq(_T_811, UInt<1>("h00")) @[exu_div_ctl.scala 712:38]
node _T_813 = and(_T_810, _T_812) @[exu_div_ctl.scala 712:36]
node _T_814 = or(_T_801, _T_813) @[exu_div_ctl.scala 711:131]
node _T_815 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_816 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_817 = eq(_T_816, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_818 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_819 = eq(_T_818, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_820 = and(_T_817, _T_819) @[exu_div_ctl.scala 698:95]
node _T_821 = and(_T_815, _T_820) @[exu_div_ctl.scala 699:11]
node _T_822 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 712:83]
node _T_823 = eq(_T_822, UInt<1>("h00")) @[exu_div_ctl.scala 712:78]
node _T_824 = and(_T_821, _T_823) @[exu_div_ctl.scala 712:76]
node _T_825 = or(_T_814, _T_824) @[exu_div_ctl.scala 712:47]
node _T_826 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_827 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:75]
node _T_828 = eq(_T_827, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_829 = and(_T_826, _T_828) @[exu_div_ctl.scala 697:95]
node _T_830 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_831 = eq(_T_830, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_832 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:58]
node _T_833 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:58]
node _T_834 = and(_T_831, _T_832) @[exu_div_ctl.scala 698:95]
node _T_835 = and(_T_834, _T_833) @[exu_div_ctl.scala 698:95]
node _T_836 = and(_T_829, _T_835) @[exu_div_ctl.scala 699:11]
node _T_837 = or(_T_825, _T_836) @[exu_div_ctl.scala 712:88]
node _T_838 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:75]
node _T_839 = eq(_T_838, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_840 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_841 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_842 = and(_T_839, _T_840) @[exu_div_ctl.scala 697:95]
node _T_843 = and(_T_842, _T_841) @[exu_div_ctl.scala 697:95]
node _T_844 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_845 = eq(_T_844, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_846 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:58]
node _T_847 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_848 = eq(_T_847, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_849 = and(_T_845, _T_846) @[exu_div_ctl.scala 698:95]
node _T_850 = and(_T_849, _T_848) @[exu_div_ctl.scala 698:95]
node _T_851 = and(_T_843, _T_850) @[exu_div_ctl.scala 699:11]
node _T_852 = or(_T_837, _T_851) @[exu_div_ctl.scala 712:131]
node _T_853 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:75]
node _T_854 = eq(_T_853, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_855 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_856 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_857 = and(_T_854, _T_855) @[exu_div_ctl.scala 697:95]
node _T_858 = and(_T_857, _T_856) @[exu_div_ctl.scala 697:95]
node _T_859 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_860 = eq(_T_859, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_861 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_862 = eq(_T_861, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_863 = and(_T_860, _T_862) @[exu_div_ctl.scala 698:95]
node _T_864 = and(_T_858, _T_863) @[exu_div_ctl.scala 699:11]
node _T_865 = or(_T_852, _T_864) @[exu_div_ctl.scala 713:47]
node _T_866 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_867 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:75]
node _T_868 = eq(_T_867, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_869 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:75]
node _T_870 = eq(_T_869, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_871 = and(_T_866, _T_868) @[exu_div_ctl.scala 697:95]
node _T_872 = and(_T_871, _T_870) @[exu_div_ctl.scala 697:95]
node _T_873 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_874 = eq(_T_873, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_875 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:58]
node _T_876 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 698:58]
node _T_877 = and(_T_874, _T_875) @[exu_div_ctl.scala 698:95]
node _T_878 = and(_T_877, _T_876) @[exu_div_ctl.scala 698:95]
node _T_879 = and(_T_872, _T_878) @[exu_div_ctl.scala 699:11]
node _T_880 = or(_T_865, _T_879) @[exu_div_ctl.scala 713:88]
node _T_881 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:75]
node _T_882 = eq(_T_881, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_883 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_884 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_885 = and(_T_882, _T_883) @[exu_div_ctl.scala 697:95]
node _T_886 = and(_T_885, _T_884) @[exu_div_ctl.scala 697:95]
node _T_887 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_888 = eq(_T_887, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_889 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_890 = eq(_T_889, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_891 = and(_T_888, _T_890) @[exu_div_ctl.scala 698:95]
node _T_892 = and(_T_886, _T_891) @[exu_div_ctl.scala 699:11]
node _T_893 = or(_T_880, _T_892) @[exu_div_ctl.scala 713:131]
node _T_894 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_895 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_896 = and(_T_894, _T_895) @[exu_div_ctl.scala 697:95]
node _T_897 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_898 = eq(_T_897, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_899 = and(_T_896, _T_898) @[exu_div_ctl.scala 699:11]
node _T_900 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 714:82]
node _T_901 = eq(_T_900, UInt<1>("h00")) @[exu_div_ctl.scala 714:77]
node _T_902 = and(_T_899, _T_901) @[exu_div_ctl.scala 714:75]
node _T_903 = or(_T_893, _T_902) @[exu_div_ctl.scala 714:47]
node _T_904 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:75]
node _T_905 = eq(_T_904, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_906 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_907 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_908 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_909 = and(_T_905, _T_906) @[exu_div_ctl.scala 697:95]
node _T_910 = and(_T_909, _T_907) @[exu_div_ctl.scala 697:95]
node _T_911 = and(_T_910, _T_908) @[exu_div_ctl.scala 697:95]
node _T_912 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_913 = eq(_T_912, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_914 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:58]
node _T_915 = and(_T_913, _T_914) @[exu_div_ctl.scala 698:95]
node _T_916 = and(_T_911, _T_915) @[exu_div_ctl.scala 699:11]
node _T_917 = or(_T_903, _T_916) @[exu_div_ctl.scala 714:88]
node _T_918 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_919 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_920 = and(_T_918, _T_919) @[exu_div_ctl.scala 697:95]
node _T_921 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:58]
node _T_922 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_923 = eq(_T_922, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_924 = and(_T_921, _T_923) @[exu_div_ctl.scala 698:95]
node _T_925 = and(_T_920, _T_924) @[exu_div_ctl.scala 699:11]
node _T_926 = or(_T_917, _T_925) @[exu_div_ctl.scala 714:131]
node _T_927 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_928 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_929 = and(_T_927, _T_928) @[exu_div_ctl.scala 697:95]
node _T_930 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:58]
node _T_931 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_932 = eq(_T_931, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_933 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_934 = eq(_T_933, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_935 = and(_T_930, _T_932) @[exu_div_ctl.scala 698:95]
node _T_936 = and(_T_935, _T_934) @[exu_div_ctl.scala 698:95]
node _T_937 = and(_T_929, _T_936) @[exu_div_ctl.scala 699:11]
node _T_938 = or(_T_926, _T_937) @[exu_div_ctl.scala 715:47]
node _T_939 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_940 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_941 = and(_T_939, _T_940) @[exu_div_ctl.scala 697:95]
node _T_942 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_943 = eq(_T_942, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_944 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_945 = eq(_T_944, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_946 = and(_T_943, _T_945) @[exu_div_ctl.scala 698:95]
node _T_947 = and(_T_941, _T_946) @[exu_div_ctl.scala 699:11]
node _T_948 = or(_T_938, _T_947) @[exu_div_ctl.scala 715:88]
node _T_949 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_950 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:75]
node _T_951 = eq(_T_950, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_952 = and(_T_949, _T_951) @[exu_div_ctl.scala 697:95]
node _T_953 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_954 = eq(_T_953, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_955 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:58]
node _T_956 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:58]
node _T_957 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 698:58]
node _T_958 = and(_T_954, _T_955) @[exu_div_ctl.scala 698:95]
node _T_959 = and(_T_958, _T_956) @[exu_div_ctl.scala 698:95]
node _T_960 = and(_T_959, _T_957) @[exu_div_ctl.scala 698:95]
node _T_961 = and(_T_952, _T_960) @[exu_div_ctl.scala 699:11]
node _T_962 = or(_T_948, _T_961) @[exu_div_ctl.scala 715:131]
node _T_963 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_964 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_965 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_966 = and(_T_963, _T_964) @[exu_div_ctl.scala 697:95]
node _T_967 = and(_T_966, _T_965) @[exu_div_ctl.scala 697:95]
node _T_968 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:58]
node _T_969 = and(_T_967, _T_968) @[exu_div_ctl.scala 699:11]
node _T_970 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 716:84]
node _T_971 = eq(_T_970, UInt<1>("h00")) @[exu_div_ctl.scala 716:79]
node _T_972 = and(_T_969, _T_971) @[exu_div_ctl.scala 716:77]
node _T_973 = or(_T_962, _T_972) @[exu_div_ctl.scala 716:47]
node _T_974 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_975 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_976 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_977 = and(_T_974, _T_975) @[exu_div_ctl.scala 697:95]
node _T_978 = and(_T_977, _T_976) @[exu_div_ctl.scala 697:95]
node _T_979 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:58]
node _T_980 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_981 = eq(_T_980, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_982 = and(_T_979, _T_981) @[exu_div_ctl.scala 698:95]
node _T_983 = and(_T_978, _T_982) @[exu_div_ctl.scala 699:11]
node _T_984 = or(_T_973, _T_983) @[exu_div_ctl.scala 716:88]
node _T_985 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_986 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_987 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_988 = and(_T_985, _T_986) @[exu_div_ctl.scala 697:95]
node _T_989 = and(_T_988, _T_987) @[exu_div_ctl.scala 697:95]
node _T_990 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:58]
node _T_991 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:75]
node _T_992 = eq(_T_991, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_993 = and(_T_990, _T_992) @[exu_div_ctl.scala 698:95]
node _T_994 = and(_T_989, _T_993) @[exu_div_ctl.scala 699:11]
node _T_995 = or(_T_984, _T_994) @[exu_div_ctl.scala 716:131]
node _T_996 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_997 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:75]
node _T_998 = eq(_T_997, UInt<1>("h00")) @[exu_div_ctl.scala 697:70]
node _T_999 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_1000 = and(_T_996, _T_998) @[exu_div_ctl.scala 697:95]
node _T_1001 = and(_T_1000, _T_999) @[exu_div_ctl.scala 697:95]
node _T_1002 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:75]
node _T_1003 = eq(_T_1002, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_1004 = bits(b_ff, 1, 1) @[exu_div_ctl.scala 698:58]
node _T_1005 = and(_T_1003, _T_1004) @[exu_div_ctl.scala 698:95]
node _T_1006 = and(_T_1001, _T_1005) @[exu_div_ctl.scala 699:11]
node _T_1007 = or(_T_995, _T_1006) @[exu_div_ctl.scala 717:47]
node _T_1008 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_1009 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_1010 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_1011 = and(_T_1008, _T_1009) @[exu_div_ctl.scala 697:95]
node _T_1012 = and(_T_1011, _T_1010) @[exu_div_ctl.scala 697:95]
node _T_1013 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_1014 = eq(_T_1013, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_1015 = and(_T_1012, _T_1014) @[exu_div_ctl.scala 699:11]
node _T_1016 = or(_T_1007, _T_1015) @[exu_div_ctl.scala 717:88]
node _T_1017 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_1018 = bits(a_ff, 2, 2) @[exu_div_ctl.scala 697:58]
node _T_1019 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_1020 = bits(a_ff, 0, 0) @[exu_div_ctl.scala 697:58]
node _T_1021 = and(_T_1017, _T_1018) @[exu_div_ctl.scala 697:95]
node _T_1022 = and(_T_1021, _T_1019) @[exu_div_ctl.scala 697:95]
node _T_1023 = and(_T_1022, _T_1020) @[exu_div_ctl.scala 697:95]
node _T_1024 = bits(b_ff, 3, 3) @[exu_div_ctl.scala 698:58]
node _T_1025 = and(_T_1023, _T_1024) @[exu_div_ctl.scala 699:11]
node _T_1026 = or(_T_1016, _T_1025) @[exu_div_ctl.scala 717:131]
node _T_1027 = bits(a_ff, 3, 3) @[exu_div_ctl.scala 697:58]
node _T_1028 = bits(a_ff, 1, 1) @[exu_div_ctl.scala 697:58]
node _T_1029 = and(_T_1027, _T_1028) @[exu_div_ctl.scala 697:95]
node _T_1030 = bits(b_ff, 2, 2) @[exu_div_ctl.scala 698:75]
node _T_1031 = eq(_T_1030, UInt<1>("h00")) @[exu_div_ctl.scala 698:70]
node _T_1032 = and(_T_1029, _T_1031) @[exu_div_ctl.scala 699:11]
node _T_1033 = bits(b_ff, 0, 0) @[exu_div_ctl.scala 718:81]
node _T_1034 = eq(_T_1033, UInt<1>("h00")) @[exu_div_ctl.scala 718:76]
node _T_1035 = and(_T_1032, _T_1034) @[exu_div_ctl.scala 718:74]
node _T_1036 = or(_T_1026, _T_1035) @[exu_div_ctl.scala 718:47]
node _T_1037 = cat(_T_725, _T_1036) @[Cat.scala 29:58]
node _T_1038 = cat(_T_591, _T_622) @[Cat.scala 29:58]
node _T_1039 = cat(_T_1038, _T_1037) @[Cat.scala 29:58]
smallnum <= _T_1039 @[exu_div_ctl.scala 701:12]
node _T_1040 = bits(a_ff, 31, 0) @[exu_div_ctl.scala 720:49]
node shortq_dividend = cat(dividend_sign_ff, _T_1040) @[Cat.scala 29:58]
inst a_enc of exu_div_cls @[exu_div_ctl.scala 721:21]
a_enc.clock <= clock
a_enc.reset <= reset
a_enc.io.operand <= shortq_dividend @[exu_div_ctl.scala 722:20]
inst b_enc of exu_div_cls_1 @[exu_div_ctl.scala 724:20]
b_enc.clock <= clock
b_enc.reset <= reset
node _T_1041 = bits(b_ff, 32, 0) @[exu_div_ctl.scala 725:27]
b_enc.io.operand <= _T_1041 @[exu_div_ctl.scala 725:20]
node dw_a_enc = cat(UInt<1>("h00"), a_enc.io.cls) @[Cat.scala 29:58]
node dw_b_enc = cat(UInt<1>("h00"), b_enc.io.cls) @[Cat.scala 29:58]
node _T_1042 = cat(UInt<1>("h00"), dw_b_enc) @[Cat.scala 29:58]
node _T_1043 = cat(UInt<1>("h00"), dw_a_enc) @[Cat.scala 29:58]
node _T_1044 = sub(_T_1042, _T_1043) @[exu_div_ctl.scala 730:42]
node _T_1045 = tail(_T_1044, 1) @[exu_div_ctl.scala 730:42]
node _T_1046 = add(_T_1045, UInt<7>("h01")) @[exu_div_ctl.scala 730:62]
node dw_shortq_raw = tail(_T_1046, 1) @[exu_div_ctl.scala 730:62]
node _T_1047 = bits(dw_shortq_raw, 6, 6) @[exu_div_ctl.scala 731:33]
node _T_1048 = bits(_T_1047, 0, 0) @[exu_div_ctl.scala 731:43]
node _T_1049 = bits(dw_shortq_raw, 5, 0) @[exu_div_ctl.scala 731:63]
node shortq = mux(_T_1048, UInt<1>("h00"), _T_1049) @[exu_div_ctl.scala 731:19]
node _T_1050 = bits(shortq, 5, 5) @[exu_div_ctl.scala 732:38]
node _T_1051 = eq(_T_1050, UInt<1>("h00")) @[exu_div_ctl.scala 732:31]
node _T_1052 = and(valid_ff, _T_1051) @[exu_div_ctl.scala 732:29]
node _T_1053 = bits(shortq, 4, 2) @[exu_div_ctl.scala 732:52]
node _T_1054 = eq(_T_1053, UInt<3>("h07")) @[exu_div_ctl.scala 732:58]
node _T_1055 = eq(_T_1054, UInt<1>("h00")) @[exu_div_ctl.scala 732:44]
node _T_1056 = and(_T_1052, _T_1055) @[exu_div_ctl.scala 732:42]
node _T_1057 = eq(io.cancel, UInt<1>("h00")) @[exu_div_ctl.scala 732:75]
node _T_1058 = and(_T_1056, _T_1057) @[exu_div_ctl.scala 732:73]
shortq_enable <= _T_1058 @[exu_div_ctl.scala 732:17]
node _T_1059 = eq(shortq, UInt<5>("h01f")) @[exu_div_ctl.scala 734:58]
node _T_1060 = eq(shortq, UInt<5>("h01e")) @[exu_div_ctl.scala 734:58]
node _T_1061 = eq(shortq, UInt<5>("h01d")) @[exu_div_ctl.scala 734:58]
node _T_1062 = eq(shortq, UInt<5>("h01c")) @[exu_div_ctl.scala 734:58]
node _T_1063 = eq(shortq, UInt<5>("h01b")) @[exu_div_ctl.scala 734:58]
node _T_1064 = eq(shortq, UInt<5>("h01a")) @[exu_div_ctl.scala 734:58]
node _T_1065 = eq(shortq, UInt<5>("h019")) @[exu_div_ctl.scala 734:58]
node _T_1066 = eq(shortq, UInt<5>("h018")) @[exu_div_ctl.scala 734:58]
node _T_1067 = eq(shortq, UInt<5>("h017")) @[exu_div_ctl.scala 734:58]
node _T_1068 = eq(shortq, UInt<5>("h016")) @[exu_div_ctl.scala 734:58]
node _T_1069 = eq(shortq, UInt<5>("h015")) @[exu_div_ctl.scala 734:58]
node _T_1070 = eq(shortq, UInt<5>("h014")) @[exu_div_ctl.scala 734:58]
node _T_1071 = eq(shortq, UInt<5>("h013")) @[exu_div_ctl.scala 734:58]
node _T_1072 = eq(shortq, UInt<5>("h012")) @[exu_div_ctl.scala 734:58]
node _T_1073 = eq(shortq, UInt<5>("h011")) @[exu_div_ctl.scala 734:58]
node _T_1074 = eq(shortq, UInt<5>("h010")) @[exu_div_ctl.scala 734:58]
node _T_1075 = eq(shortq, UInt<4>("h0f")) @[exu_div_ctl.scala 734:58]
node _T_1076 = eq(shortq, UInt<4>("h0e")) @[exu_div_ctl.scala 734:58]
node _T_1077 = eq(shortq, UInt<4>("h0d")) @[exu_div_ctl.scala 734:58]
node _T_1078 = eq(shortq, UInt<4>("h0c")) @[exu_div_ctl.scala 734:58]
node _T_1079 = eq(shortq, UInt<4>("h0b")) @[exu_div_ctl.scala 734:58]
node _T_1080 = eq(shortq, UInt<4>("h0a")) @[exu_div_ctl.scala 734:58]
node _T_1081 = eq(shortq, UInt<4>("h09")) @[exu_div_ctl.scala 734:58]
node _T_1082 = eq(shortq, UInt<4>("h08")) @[exu_div_ctl.scala 734:58]
node _T_1083 = eq(shortq, UInt<3>("h07")) @[exu_div_ctl.scala 734:58]
node _T_1084 = eq(shortq, UInt<3>("h06")) @[exu_div_ctl.scala 734:58]
node _T_1085 = eq(shortq, UInt<3>("h05")) @[exu_div_ctl.scala 734:58]
node _T_1086 = eq(shortq, UInt<3>("h04")) @[exu_div_ctl.scala 734:58]
node _T_1087 = eq(shortq, UInt<2>("h03")) @[exu_div_ctl.scala 734:58]
node _T_1088 = eq(shortq, UInt<2>("h02")) @[exu_div_ctl.scala 734:58]
node _T_1089 = eq(shortq, UInt<1>("h01")) @[exu_div_ctl.scala 734:58]
node _T_1090 = eq(shortq, UInt<1>("h00")) @[exu_div_ctl.scala 734:58]
node _T_1091 = mux(_T_1059, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1092 = mux(_T_1060, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1093 = mux(_T_1061, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1094 = mux(_T_1062, UInt<1>("h00"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1095 = mux(_T_1063, UInt<2>("h03"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1096 = mux(_T_1064, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1097 = mux(_T_1065, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1098 = mux(_T_1066, UInt<3>("h06"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1099 = mux(_T_1067, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1100 = mux(_T_1068, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1101 = mux(_T_1069, UInt<4>("h09"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1102 = mux(_T_1070, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1103 = mux(_T_1071, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1104 = mux(_T_1072, UInt<4>("h0c"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1105 = mux(_T_1073, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1106 = mux(_T_1074, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1107 = mux(_T_1075, UInt<4>("h0f"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1108 = mux(_T_1076, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1109 = mux(_T_1077, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1110 = mux(_T_1078, UInt<5>("h012"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1111 = mux(_T_1079, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1112 = mux(_T_1080, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1113 = mux(_T_1081, UInt<5>("h015"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1114 = mux(_T_1082, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1115 = mux(_T_1083, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1116 = mux(_T_1084, UInt<5>("h018"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1117 = mux(_T_1085, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1118 = mux(_T_1086, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1119 = mux(_T_1087, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1120 = mux(_T_1088, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1121 = mux(_T_1089, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1122 = mux(_T_1090, UInt<5>("h01b"), UInt<1>("h00")) @[Mux.scala 27:72]
node _T_1123 = or(_T_1091, _T_1092) @[Mux.scala 27:72]
node _T_1124 = or(_T_1123, _T_1093) @[Mux.scala 27:72]
node _T_1125 = or(_T_1124, _T_1094) @[Mux.scala 27:72]
node _T_1126 = or(_T_1125, _T_1095) @[Mux.scala 27:72]
node _T_1127 = or(_T_1126, _T_1096) @[Mux.scala 27:72]
node _T_1128 = or(_T_1127, _T_1097) @[Mux.scala 27:72]
node _T_1129 = or(_T_1128, _T_1098) @[Mux.scala 27:72]
node _T_1130 = or(_T_1129, _T_1099) @[Mux.scala 27:72]
node _T_1131 = or(_T_1130, _T_1100) @[Mux.scala 27:72]
node _T_1132 = or(_T_1131, _T_1101) @[Mux.scala 27:72]
node _T_1133 = or(_T_1132, _T_1102) @[Mux.scala 27:72]
node _T_1134 = or(_T_1133, _T_1103) @[Mux.scala 27:72]
node _T_1135 = or(_T_1134, _T_1104) @[Mux.scala 27:72]
node _T_1136 = or(_T_1135, _T_1105) @[Mux.scala 27:72]
node _T_1137 = or(_T_1136, _T_1106) @[Mux.scala 27:72]
node _T_1138 = or(_T_1137, _T_1107) @[Mux.scala 27:72]
node _T_1139 = or(_T_1138, _T_1108) @[Mux.scala 27:72]
node _T_1140 = or(_T_1139, _T_1109) @[Mux.scala 27:72]
node _T_1141 = or(_T_1140, _T_1110) @[Mux.scala 27:72]
node _T_1142 = or(_T_1141, _T_1111) @[Mux.scala 27:72]
node _T_1143 = or(_T_1142, _T_1112) @[Mux.scala 27:72]
node _T_1144 = or(_T_1143, _T_1113) @[Mux.scala 27:72]
node _T_1145 = or(_T_1144, _T_1114) @[Mux.scala 27:72]
node _T_1146 = or(_T_1145, _T_1115) @[Mux.scala 27:72]
node _T_1147 = or(_T_1146, _T_1116) @[Mux.scala 27:72]
node _T_1148 = or(_T_1147, _T_1117) @[Mux.scala 27:72]
node _T_1149 = or(_T_1148, _T_1118) @[Mux.scala 27:72]
node _T_1150 = or(_T_1149, _T_1119) @[Mux.scala 27:72]
node _T_1151 = or(_T_1150, _T_1120) @[Mux.scala 27:72]
node _T_1152 = or(_T_1151, _T_1121) @[Mux.scala 27:72]
node _T_1153 = or(_T_1152, _T_1122) @[Mux.scala 27:72]
wire _T_1154 : UInt<5> @[Mux.scala 27:72]
_T_1154 <= _T_1153 @[Mux.scala 27:72]
shortq_decode <= _T_1154 @[exu_div_ctl.scala 734:17]
node _T_1155 = eq(shortq_enable, UInt<1>("h00")) @[exu_div_ctl.scala 735:23]
node _T_1156 = mux(_T_1155, UInt<1>("h00"), shortq_decode) @[exu_div_ctl.scala 735:22]
shortq_shift <= _T_1156 @[exu_div_ctl.scala 735:16]
node _T_1157 = bits(b_ff1, 32, 32) @[exu_div_ctl.scala 736:20]
node _T_1158 = bits(b_ff1, 32, 32) @[exu_div_ctl.scala 736:30]
node _T_1159 = bits(b_ff1, 32, 32) @[exu_div_ctl.scala 736:40]
node _T_1160 = bits(b_ff1, 32, 32) @[exu_div_ctl.scala 736:50]
node _T_1161 = cat(_T_1160, b_ff1) @[Cat.scala 29:58]
node _T_1162 = cat(_T_1157, _T_1158) @[Cat.scala 29:58]
node _T_1163 = cat(_T_1162, _T_1159) @[Cat.scala 29:58]
node _T_1164 = cat(_T_1163, _T_1161) @[Cat.scala 29:58]
b_ff <= _T_1164 @[exu_div_ctl.scala 736:8]
inst rvclkhdr of rvclkhdr @[lib.scala 390:23]
rvclkhdr.clock <= clock
rvclkhdr.reset <= reset
rvclkhdr.io.clk <= clock @[lib.scala 392:18]
rvclkhdr.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1165 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_1165 <= valid_ff_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
valid_ff <= _T_1165 @[exu_div_ctl.scala 737:12]
inst rvclkhdr_1 of rvclkhdr_1 @[lib.scala 390:23]
rvclkhdr_1.clock <= clock
rvclkhdr_1.reset <= reset
rvclkhdr_1.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_1.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_1.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1166 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_1166 <= control_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
control_ff <= _T_1166 @[exu_div_ctl.scala 738:16]
inst rvclkhdr_2 of rvclkhdr_2 @[lib.scala 390:23]
rvclkhdr_2.clock <= clock
rvclkhdr_2.reset <= reset
rvclkhdr_2.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_2.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_2.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1167 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_1167 <= by_zero_case @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
by_zero_case_ff <= _T_1167 @[exu_div_ctl.scala 739:19]
inst rvclkhdr_3 of rvclkhdr_3 @[lib.scala 390:23]
rvclkhdr_3.clock <= clock
rvclkhdr_3.reset <= reset
rvclkhdr_3.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_3.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_3.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1168 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_1168 <= shortq_enable @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
shortq_enable_ff <= _T_1168 @[exu_div_ctl.scala 740:20]
inst rvclkhdr_4 of rvclkhdr_4 @[lib.scala 390:23]
rvclkhdr_4.clock <= clock
rvclkhdr_4.reset <= reset
rvclkhdr_4.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_4.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_4.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1169 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_1169 <= shortq_shift @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
shortq_shift_ff <= _T_1169 @[exu_div_ctl.scala 741:19]
inst rvclkhdr_5 of rvclkhdr_5 @[lib.scala 390:23]
rvclkhdr_5.clock <= clock
rvclkhdr_5.reset <= reset
rvclkhdr_5.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_5.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_5.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1170 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_1170 <= finish @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
finish_ff <= _T_1170 @[exu_div_ctl.scala 742:13]
inst rvclkhdr_6 of rvclkhdr_6 @[lib.scala 390:23]
rvclkhdr_6.clock <= clock
rvclkhdr_6.reset <= reset
rvclkhdr_6.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_6.io.en <= misc_enable @[lib.scala 393:17]
rvclkhdr_6.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1171 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when misc_enable : @[Reg.scala 28:19]
_T_1171 <= count_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
count_ff <= _T_1171 @[exu_div_ctl.scala 743:12]
inst rvclkhdr_7 of rvclkhdr_7 @[lib.scala 390:23]
rvclkhdr_7.clock <= clock
rvclkhdr_7.reset <= reset
rvclkhdr_7.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_7.io.en <= a_enable @[lib.scala 393:17]
rvclkhdr_7.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1172 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when a_enable : @[Reg.scala 28:19]
_T_1172 <= a_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
a_ff <= _T_1172 @[exu_div_ctl.scala 745:8]
node _T_1173 = bits(b_in, 32, 0) @[exu_div_ctl.scala 746:23]
inst rvclkhdr_8 of rvclkhdr_8 @[lib.scala 390:23]
rvclkhdr_8.clock <= clock
rvclkhdr_8.reset <= reset
rvclkhdr_8.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_8.io.en <= b_enable @[lib.scala 393:17]
rvclkhdr_8.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1174 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when b_enable : @[Reg.scala 28:19]
_T_1174 <= _T_1173 @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
b_ff1 <= _T_1174 @[exu_div_ctl.scala 746:9]
inst rvclkhdr_9 of rvclkhdr_9 @[lib.scala 390:23]
rvclkhdr_9.clock <= clock
rvclkhdr_9.reset <= reset
rvclkhdr_9.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_9.io.en <= rq_enable @[lib.scala 393:17]
rvclkhdr_9.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1175 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when rq_enable : @[Reg.scala 28:19]
_T_1175 <= r_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
r_ff <= _T_1175 @[exu_div_ctl.scala 747:8]
inst rvclkhdr_10 of rvclkhdr_10 @[lib.scala 390:23]
rvclkhdr_10.clock <= clock
rvclkhdr_10.reset <= reset
rvclkhdr_10.io.clk <= clock @[lib.scala 392:18]
rvclkhdr_10.io.en <= rq_enable @[lib.scala 393:17]
rvclkhdr_10.io.scan_mode <= UInt<1>("h00") @[lib.scala 394:24]
reg _T_1176 : UInt, clock with : (reset => (reset, UInt<1>("h00"))) @[Reg.scala 27:20]
when rq_enable : @[Reg.scala 28:19]
_T_1176 <= q_in @[Reg.scala 28:23]
skip @[Reg.scala 28:19]
q_ff <= _T_1176 @[exu_div_ctl.scala 748:8]
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