362 lines
13 KiB
JSON
362 lines
13 KiB
JSON
[
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_iccm_dma_ecc_error",
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"sources":[
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"~el2_ifu|el2_ifu>io_dec_tlu_core_ecc_disable",
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"~el2_ifu|el2_ifu>io_iccm_rd_data_ecc",
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ic_rd_en",
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"sources":[
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_dec_tlu_force_halt",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_exu_flush_path_final",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_noredir_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_mrac_ff",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_err_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_i0_commit_cmt",
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"~el2_ifu|el2_ifu>io_ic_rd_data",
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"~el2_ifu|el2_ifu>io_dec_i0_decode_d"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_iccm_rden",
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"sources":[
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"~el2_ifu|el2_ifu>io_dma_iccm_req",
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"~el2_ifu|el2_ifu>io_dma_mem_write",
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"~el2_ifu|el2_ifu>io_dec_tlu_core_ecc_disable",
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"~el2_ifu|el2_ifu>io_iccm_rd_data_ecc",
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_exu_flush_path_final",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_noredir_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_err_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_i0_commit_cmt",
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"~el2_ifu|el2_ifu>io_ic_rd_data",
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"~el2_ifu|el2_ifu>io_dec_i0_decode_d"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ic_premux_data",
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"sources":[
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"~el2_ifu|el2_ifu>io_iccm_rd_data",
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_ifu_axi_rid",
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"~el2_ifu|el2_ifu>io_ifu_axi_rvalid",
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"~el2_ifu|el2_ifu>io_ifu_bus_clk_en",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_iccm_ready",
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"sources":[
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"~el2_ifu|el2_ifu>io_dec_tlu_core_ecc_disable",
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"~el2_ifu|el2_ifu>io_iccm_rd_data_ecc",
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_noredir_wb",
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"~el2_ifu|el2_ifu>io_exu_flush_path_final",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r",
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"~el2_ifu|el2_ifu>io_dec_i0_decode_d",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_err_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_i0_commit_cmt",
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"~el2_ifu|el2_ifu>io_ic_rd_data"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ic_debug_addr",
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"sources":[
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"~el2_ifu|el2_ifu>io_dec_tlu_ic_diag_pkt_icache_dicawics"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ic_debug_way",
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"sources":[
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"~el2_ifu|el2_ifu>io_dec_tlu_ic_diag_pkt_icache_dicawics"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ic_debug_rd_en",
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"sources":[
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"~el2_ifu|el2_ifu>io_dec_tlu_ic_diag_pkt_icache_rd_valid"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_iccm_dma_sb_error",
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"sources":[
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"~el2_ifu|el2_ifu>io_dec_tlu_core_ecc_disable",
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"~el2_ifu|el2_ifu>io_iccm_rd_data_ecc",
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ifu_ic_error_start",
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"sources":[
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"~el2_ifu|el2_ifu>io_ic_eccerr",
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"~el2_ifu|el2_ifu>io_ic_tag_perr",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ifu_axi_rid",
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"~el2_ifu|el2_ifu>io_ifu_axi_rvalid",
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"~el2_ifu|el2_ifu>io_ifu_bus_clk_en",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ic_sel_premux_data",
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"sources":[
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_ifu_axi_rid",
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"~el2_ifu|el2_ifu>io_ifu_axi_rvalid",
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"~el2_ifu|el2_ifu>io_ifu_bus_clk_en",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_iccm_wr_data",
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"sources":[
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"~el2_ifu|el2_ifu>io_dma_iccm_req",
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"~el2_ifu|el2_ifu>io_dma_mem_wdata",
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"~el2_ifu|el2_ifu>io_dec_tlu_core_ecc_disable",
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"~el2_ifu|el2_ifu>io_iccm_rd_data_ecc",
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_noredir_wb",
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"~el2_ifu|el2_ifu>io_exu_flush_path_final",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r",
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"~el2_ifu|el2_ifu>io_dec_i0_decode_d",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_err_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_i0_commit_cmt",
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"~el2_ifu|el2_ifu>io_ic_rd_data"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_iccm_wr_size",
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"sources":[
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"~el2_ifu|el2_ifu>io_dma_mem_sz",
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"~el2_ifu|el2_ifu>io_dma_iccm_req"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ic_debug_wr_en",
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"sources":[
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"~el2_ifu|el2_ifu>io_dec_tlu_ic_diag_pkt_icache_wr_valid"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_iccm_rw_addr",
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"sources":[
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"~el2_ifu|el2_ifu>io_dma_mem_addr",
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"~el2_ifu|el2_ifu>io_dma_iccm_req",
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"~el2_ifu|el2_ifu>io_dec_tlu_core_ecc_disable",
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"~el2_ifu|el2_ifu>io_iccm_rd_data_ecc",
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_exu_flush_path_final",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_noredir_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r",
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"~el2_ifu|el2_ifu>io_dec_i0_decode_d",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_err_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_i0_commit_cmt",
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"~el2_ifu|el2_ifu>io_ic_rd_data"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_iccm_wren",
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"sources":[
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"~el2_ifu|el2_ifu>io_dma_mem_write",
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"~el2_ifu|el2_ifu>io_dma_iccm_req",
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"~el2_ifu|el2_ifu>io_dec_tlu_core_ecc_disable",
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"~el2_ifu|el2_ifu>io_iccm_rd_data_ecc",
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_noredir_wb",
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"~el2_ifu|el2_ifu>io_exu_flush_path_final",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r",
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"~el2_ifu|el2_ifu>io_dec_i0_decode_d",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_err_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_i0_commit_cmt",
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"~el2_ifu|el2_ifu>io_ic_rd_data"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ifu_pmu_instr_aligned",
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"sources":[
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"~el2_ifu|el2_ifu>io_dec_i0_decode_d"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ifu_iccm_rd_ecc_single_err",
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"sources":[
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"~el2_ifu|el2_ifu>io_exu_flush_final",
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"~el2_ifu|el2_ifu>io_dec_tlu_core_ecc_disable",
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"~el2_ifu|el2_ifu>io_iccm_rd_data_ecc",
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"~el2_ifu|el2_ifu>io_ic_rd_hit",
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"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
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"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
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"~el2_ifu|el2_ifu>io_exu_i0_br_index_r"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu|el2_ifu>io_ic_debug_tag_array",
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"sources":[
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"~el2_ifu|el2_ifu>io_dec_tlu_ic_diag_pkt_icache_dicawics"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~el2_ifu|el2_ifu>io_ifu_pmu_fetch_stall",
|
|
"sources":[
|
|
"~el2_ifu|el2_ifu>io_exu_flush_final",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_flush_err_wb",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_i0_commit_cmt",
|
|
"~el2_ifu|el2_ifu>io_ic_rd_data",
|
|
"~el2_ifu|el2_ifu>io_dec_i0_decode_d",
|
|
"~el2_ifu|el2_ifu>io_ic_rd_hit",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
|
|
"~el2_ifu|el2_ifu>io_exu_i0_br_index_r"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~el2_ifu|el2_ifu>io_ic_tag_valid",
|
|
"sources":[
|
|
"~el2_ifu|el2_ifu>io_exu_flush_final"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~el2_ifu|el2_ifu>io_ic_rw_addr",
|
|
"sources":[
|
|
"~el2_ifu|el2_ifu>io_exu_flush_path_final",
|
|
"~el2_ifu|el2_ifu>io_exu_flush_final",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_flush_leak_one_wb",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_flush_lower_wb",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_start_error",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_br0_r_pkt_bits_br_error",
|
|
"~el2_ifu|el2_ifu>io_exu_i0_br_index_r",
|
|
"~el2_ifu|el2_ifu>io_ic_rd_hit",
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_bpred_disable"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
|
|
"sink":"~el2_ifu|el2_ifu>io_ic_debug_wr_data",
|
|
"sources":[
|
|
"~el2_ifu|el2_ifu>io_dec_tlu_ic_diag_pkt_icache_wrdata"
|
|
]
|
|
},
|
|
{
|
|
"class":"firrtl.EmitCircuitAnnotation",
|
|
"emitter":"firrtl.VerilogEmitter"
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.BlackBoxResourceAnno",
|
|
"target":"el2_ifu.gated_latch",
|
|
"resourceId":"/vsrc/gated_latch.v"
|
|
},
|
|
{
|
|
"class":"firrtl.options.TargetDirAnnotation",
|
|
"directory":"."
|
|
},
|
|
{
|
|
"class":"firrtl.options.OutputAnnotationFileAnnotation",
|
|
"file":"el2_ifu"
|
|
},
|
|
{
|
|
"class":"firrtl.transforms.BlackBoxTargetDirAnno",
|
|
"targetDir":"."
|
|
}
|
|
] |