203 lines
5.5 KiB
Systemverilog
203 lines
5.5 KiB
Systemverilog
// SPDX-License-Identifier: Apache-2.0
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// Copyright 2020 Western Digital Corporation or it's affiliates.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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`define EL2_LOCAL_RAM_TEST_IO \
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input logic WE, \
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input logic ME, \
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input logic CLK
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`define EL2_RAM(depth, width) \
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module ram_``depth``x``width( \
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input logic [$clog2(depth)-1:0] ADR, \
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input logic [(width-1):0] D, \
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output logic [(width-1):0] Q, \
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`EL2_LOCAL_RAM_TEST_IO \
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); \
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reg [(width-1):0] ram_core [(depth-1):0]; \
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\
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always @(posedge CLK) begin \
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if (ME && WE) ram_core[ADR] = D; \
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if (ME && ~WE) Q <= ram_core[ADR]; \
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end \
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\
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endmodule
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`define EL2_RAM_BE(depth, width) \
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module ram_be_``depth``x``width( \
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input logic [$clog2(depth)-1:0] ADR, \
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input logic [(width-1):0] D, WEM, \
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output logic [(width-1):0] Q, \
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`EL2_LOCAL_RAM_TEST_IO \
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); \
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reg [(width-1):0] ram_core [(depth-1):0]; \
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\
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always @(posedge CLK) begin \
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if (ME && WE) ram_core[ADR] = D & WEM | ~WEM & ram_core[ADR];\
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if (ME && ~WE) Q <= ram_core[ADR]; \
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end \
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\
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\
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endmodule
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// parameterizable RAM for verilator sims
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module el2_ram #(depth=4096, width=39) (
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input logic [$clog2(depth)-1:0] ADR,
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input logic [(width-1):0] D,
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output logic [(width-1):0] Q,
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`EL2_LOCAL_RAM_TEST_IO
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);
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reg [(width-1):0] ram_core [(depth-1):0];
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always @(posedge CLK) begin
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if (ME && WE) ram_core[ADR] = D;
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if (ME && ~WE) Q <= ram_core[ADR];
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end
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endmodule
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//=========================================================================================================================
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//=================================== START OF CCM =======================================================================
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//============= Possible sram sizes for a 39 bit wide memory ( 4 bytes + 7 bits ECC ) =====================================
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//-------------------------------------------------------------------------------------------------------------------------
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`EL2_RAM(32768, 39)
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`EL2_RAM(16384, 39)
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`EL2_RAM(8192, 39)
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`EL2_RAM(4096, 39)
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`EL2_RAM(3072, 39)
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`EL2_RAM(2048, 39)
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`EL2_RAM(1536, 39) // need this for the 48KB DCCM option)
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`EL2_RAM(1024, 39)
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`EL2_RAM(768, 39)
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`EL2_RAM(512, 39)
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`EL2_RAM(256, 39)
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`EL2_RAM(128, 39)
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`EL2_RAM(1024, 20)
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`EL2_RAM(512, 20)
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`EL2_RAM(256, 20)
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`EL2_RAM(128, 20)
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`EL2_RAM(64, 20)
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`EL2_RAM(4096, 34)
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`EL2_RAM(2048, 34)
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`EL2_RAM(1024, 34)
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`EL2_RAM(512, 34)
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`EL2_RAM(256, 34)
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`EL2_RAM(128, 34)
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`EL2_RAM(64, 34)
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`EL2_RAM(8192, 68)
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`EL2_RAM(4096, 68)
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`EL2_RAM(2048, 68)
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`EL2_RAM(1024, 68)
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`EL2_RAM(512, 68)
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`EL2_RAM(256, 68)
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`EL2_RAM(128, 68)
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`EL2_RAM(64, 68)
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`EL2_RAM(8192, 71)
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`EL2_RAM(4096, 71)
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`EL2_RAM(2048, 71)
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`EL2_RAM(1024, 71)
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`EL2_RAM(512, 71)
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`EL2_RAM(256, 71)
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`EL2_RAM(128, 71)
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`EL2_RAM(64, 71)
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`EL2_RAM(4096, 42)
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`EL2_RAM(2048, 42)
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`EL2_RAM(1024, 42)
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`EL2_RAM(512, 42)
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`EL2_RAM(256, 42)
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`EL2_RAM(128, 42)
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`EL2_RAM(64, 42)
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`EL2_RAM(4096, 22)
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`EL2_RAM(2048, 22)
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`EL2_RAM(1024, 22)
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`EL2_RAM(512, 22)
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`EL2_RAM(256, 22)
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`EL2_RAM(128, 22)
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`EL2_RAM(64, 22)
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`EL2_RAM(1024, 26)
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`EL2_RAM(4096, 26)
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`EL2_RAM(2048, 26)
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`EL2_RAM(512, 26)
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`EL2_RAM(256, 26)
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`EL2_RAM(128, 26)
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`EL2_RAM(64, 26)
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`EL2_RAM(32, 26)
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`EL2_RAM(32, 22)
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`EL2_RAM_BE(8192, 142)
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`EL2_RAM_BE(4096, 142)
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`EL2_RAM_BE(2048, 142)
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`EL2_RAM_BE(1024, 142)
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`EL2_RAM_BE(512, 142)
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`EL2_RAM_BE(256, 142)
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`EL2_RAM_BE(128, 142)
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`EL2_RAM_BE(64, 142)
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`EL2_RAM_BE(8192, 284)
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`EL2_RAM_BE(4096, 284)
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`EL2_RAM_BE(2048, 284)
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`EL2_RAM_BE(1024, 284)
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`EL2_RAM_BE(512, 284)
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`EL2_RAM_BE(256, 284)
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`EL2_RAM_BE(128, 284)
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`EL2_RAM_BE(64, 284)
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`EL2_RAM_BE(8192, 136)
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`EL2_RAM_BE(4096, 136)
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`EL2_RAM_BE(2048, 136)
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`EL2_RAM_BE(1024, 136)
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`EL2_RAM_BE(512, 136)
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`EL2_RAM_BE(256, 136)
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`EL2_RAM_BE(128, 136)
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`EL2_RAM_BE(64, 136)
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`EL2_RAM_BE(8192, 272)
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`EL2_RAM_BE(4096, 272)
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`EL2_RAM_BE(2048, 272)
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`EL2_RAM_BE(1024, 272)
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`EL2_RAM_BE(512, 272)
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`EL2_RAM_BE(256, 272)
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`EL2_RAM_BE(128, 272)
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`EL2_RAM_BE(64, 272)
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`EL2_RAM_BE(4096, 52)
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`EL2_RAM_BE(2048, 52)
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`EL2_RAM_BE(1024, 52)
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`EL2_RAM_BE(512, 52)
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`EL2_RAM_BE(256, 52)
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`EL2_RAM_BE(128, 52)
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`EL2_RAM_BE(64, 52)
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`EL2_RAM_BE(4096, 104)
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`EL2_RAM_BE(2048, 104)
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`EL2_RAM_BE(1024, 104)
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`EL2_RAM_BE(512, 104)
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`EL2_RAM_BE(256, 104)
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`EL2_RAM_BE(128, 104)
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`EL2_RAM_BE(64, 104)
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`EL2_RAM_BE(4096, 44)
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`EL2_RAM_BE(2048, 44)
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`EL2_RAM_BE(1024, 44)
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`EL2_RAM_BE(512, 44)
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`EL2_RAM_BE(256, 44)
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`EL2_RAM_BE(128, 44)
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`EL2_RAM_BE(64, 44)
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`EL2_RAM_BE(4096, 88)
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`EL2_RAM_BE(2048, 88)
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`EL2_RAM_BE(1024, 88)
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`EL2_RAM_BE(512, 88)
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`EL2_RAM_BE(256, 88)
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`EL2_RAM_BE(128, 88)
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`EL2_RAM_BE(64, 88)
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`undef EL2_RAM
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`undef EL2_RAM_BE
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`undef EL2_LOCAL_RAM_TEST_IO
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