34 lines
1.5 KiB
Systemverilog
Executable File
34 lines
1.5 KiB
Systemverilog
Executable File
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module el2_lsu_trigger
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`include "parameter.sv"
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(
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input el2_trigger_pkt_t [3:0] trigger_pkt_any, // trigger packet from dec
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input el2_lsu_pkt_t lsu_pkt_m, // lsu packet
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input logic [31:0] lsu_addr_m, // address
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input logic [31:0] store_data_m, // store data
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output logic [3:0] lsu_trigger_match_m // match result
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);
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logic [3:0][31:0] lsu_match_data;
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logic [3:0] lsu_trigger_data_match;
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logic [31:0] store_data_trigger_m;
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assign store_data_trigger_m[31:0] = {({16{lsu_pkt_m.word}} & store_data_m[31:16]),({8{(lsu_pkt_m.half | lsu_pkt_m.word)}} & store_data_m[15:8]), store_data_m[7:0]};
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for (genvar i=0; i<4; i++) begin
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assign lsu_match_data[i][31:0] = ({32{~trigger_pkt_any[i].select}} & lsu_addr_m[31:0]) |
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({32{trigger_pkt_any[i].select & trigger_pkt_any[i].store}} & store_data_trigger_m[31:0]);
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rvmaskandmatch trigger_match (.mask(trigger_pkt_any[i].tdata2[31:0]), .data(lsu_match_data[i][31:0]), .masken(trigger_pkt_any[i].match), .match(lsu_trigger_data_match[i]));
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assign lsu_trigger_match_m[i] = lsu_pkt_m.valid & ~lsu_pkt_m.dma &
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((trigger_pkt_any[i].store & lsu_pkt_m.store) | (trigger_pkt_any[i].load & lsu_pkt_m.load & ~trigger_pkt_any[i].select)) &
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lsu_trigger_data_match[i];
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end
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endmodule // el2_lsu_trigger
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