115 lines
3.3 KiB
JSON
115 lines
3.3 KiB
JSON
[
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_dccm_stall_any",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_dec_tlu_dma_qos_prty",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_pmu_any_write",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_dccm_req",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_iccm_req",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dccm_ready",
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"~el2_dma_ctrl|el2_dma_ctrl>io_iccm_ready"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_pmu_dccm_write",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_dccm_req",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dccm_ready"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_iccm_stall_any",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_dec_tlu_dma_qos_prty",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_dccm_req",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_dccm_ready",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_addr",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_pmu_any_read",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_dccm_req",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_iccm_req",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dccm_ready",
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"~el2_dma_ctrl|el2_dma_ctrl>io_iccm_ready"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_pmu_dccm_read",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_dccm_req",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dccm_ready"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_sz",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_dma_ctrl|el2_dma_ctrl>io_dma_iccm_req",
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"sources":[
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"~el2_dma_ctrl|el2_dma_ctrl>io_iccm_ready",
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"~el2_dma_ctrl|el2_dma_ctrl>io_dma_mem_write"
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]
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},
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{
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"class":"logger.LogLevelAnnotation",
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"globalLogLevel":{
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}
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},
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{
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"class":"firrtl.EmitCircuitAnnotation",
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"emitter":"firrtl.VerilogEmitter"
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},
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{
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"class":"firrtl.transforms.BlackBoxResourceAnno",
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"target":"el2_dma_ctrl.gated_latch",
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"resourceId":"/vsrc/gated_latch.v"
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},
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{
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"class":"firrtl.options.TargetDirAnnotation",
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"directory":"."
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},
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{
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"class":"firrtl.options.OutputAnnotationFileAnnotation",
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"file":"el2_dma_ctrl"
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},
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{
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"class":"firrtl.transforms.BlackBoxTargetDirAnno",
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"targetDir":"."
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}
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] |