357 lines
14 KiB
JSON
357 lines
14 KiB
JSON
[
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_access_fault_type_f",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_double_err",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_sel_premux_data",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rid",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rvalid",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bus_clk_en"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_write_stall",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rw_addr",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_addr",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_fetch_addr_bf",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_debug_addr",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_ic_diag_pkt_icache_dicawics"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_async_error_start",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_ecc_single_err",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_error_start",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_eccerr",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_tag_perr",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rid",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rvalid",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bus_clk_en"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_debug_way",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_ic_diag_pkt_icache_dicawics"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_wren",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_write",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_debug_rd_en",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_ic_diag_pkt_icache_rd_valid"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_access_fault_f",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rden",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_iccm_access_bf",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_fetch_req_bf",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_write",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_en",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_iccm_access_bf",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_fetch_req_bf",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_fetch_uncacheable_bf",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_force_halt",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_premux_data",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rid",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rvalid",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bus_clk_en"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_wr_size",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_sz",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_debug_wr_en",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_ic_diag_pkt_icache_wr_valid"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_dma_active",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_flush_err_wb",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_i0_commit_cmt",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_fetch_val",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_data_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_data"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_ready",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_error_start",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_eccerr",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_tag_perr",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_hit_taken_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rid",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_axi_rvalid",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bus_clk_en"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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|
{
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"class":"firrtl.transforms.CombinationalPath",
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|
"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_debug_tag_array",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_ic_diag_pkt_icache_dicawics"
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]
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},
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{
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"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_wr_data",
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_iccm_req",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dma_mem_wdata",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_dma_sb_error",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifc_dma_access_ok",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_core_ecc_disable",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
|
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},
|
|
{
|
|
"class":"firrtl.transforms.CombinationalPath",
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"sink":"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_tag_valid",
|
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_exu_flush_final"
|
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]
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},
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{
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"sources":[
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|
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|
|
"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_iccm_rd_data_ecc",
|
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_fetch_val_f",
|
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_hit_f",
|
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
|
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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]
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},
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{
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"sources":[
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_data"
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]
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},
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{
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]
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{
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ifu_bp_inst_mask_f",
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_ic_rd_hit"
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"~el2_ifu_mem_ctl|el2_ifu_mem_ctl>io_dec_tlu_ic_diag_pkt_icache_wrdata"
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]
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"emitter":"firrtl.VerilogEmitter"
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{
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"target":"el2_ifu_mem_ctl.gated_latch",
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"resourceId":"/vsrc/gated_latch.v"
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},
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{
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"directory":"."
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{
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"file":"el2_ifu_mem_ctl"
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},
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{
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] |