diff --git a/inc/Registers.h b/inc/Registers.h
index 575f006..6368104 100644
--- a/inc/Registers.h
+++ b/inc/Registers.h
@@ -16,6 +16,21 @@
 #include "Performance.h"
 #include "Memory.h"
 
+#define WARL_M_EXTENSION (1 << 12)
+#define WARL_C_EXTENSION (1 << 2)
+#define WARL_I_BASE (1 << 8)
+#define WARL_MXL (1 << 29)
+
+
+#define CSR_MSTATUS (0x300)
+#define CSR_MISA (0x301)
+#define CSR_MEDELEG (0x302)
+#define CSR_MIDELEG (0x303)
+#define CSR_MIE (0x304)
+#define CSR_MTVEC (0x305)
+#define CSR_MCOUNTEREN (0x306)
+
+
 using namespace sc_core;
 using namespace sc_dt;
 using namespace std;
@@ -141,18 +156,14 @@ public:
    * @param csr CSR number to access
    * @return CSR value
    */
-  inline uint32_t getCSR(int csr) {
-    return CSR[csr];
-  }
+  uint32_t getCSR(int csr);
 
   /**
    * @brief Set CSR value
    * @param csr   CSR number to access
    * @param value new value to register
    */
-  inline void setCSR(int csr, uint32_t value) {
-    CSR[csr] = value;
-  }
+  void setCSR(int csr, uint32_t value);
 
   /**
    * Dump register data to console
@@ -174,6 +185,8 @@ private:
    */
   uint32_t CSR[4096];
   Performance *perf;
+
+  void initCSR(void);
 };
 
 #endif
diff --git a/src/Execute.cpp b/src/Execute.cpp
index ecbdd42..fe53e8a 100644
--- a/src/Execute.cpp
+++ b/src/Execute.cpp
@@ -829,21 +829,23 @@ void Execute::CSRRS(Instruction &inst) {
 
   /* These operations must be atomical */
   aux = regs->getCSR(csr);
+  bitmask = regs->getValue(rs1);
+
   regs->setValue(rd, aux);
 
-  bitmask = regs->getValue(rs1);
   aux2 = aux | bitmask;
   regs->setCSR(csr, aux2);
 
   log->SC_log(Log::INFO) << "CSRRS: CSR #"
-          << csr << "(" << aux << ") -> x" << dec << rd
-          << ". x" << rs1 << " & CSR #" << csr << endl;
+          << csr << "(0x" << hex << aux << ") -> x" << dec << rd
+          << ". x" << rs1 << " & CSR #" << csr
+          << " <- 0x" << hex << aux2 << endl;
 }
 
 void Execute::CSRRC(Instruction &inst) {
   int rd, rs1;
   int csr;
-  uint32_t bitmask, aux;
+  uint32_t bitmask, aux, aux2;
 
   rd = inst.get_rd();
   rs1 = inst.get_rs1();
@@ -855,15 +857,17 @@ void Execute::CSRRC(Instruction &inst) {
 
   /* These operations must be atomical */
   aux = regs->getCSR(csr);
+  bitmask = regs->getValue(rs1);
+
   regs->setValue(rd, aux);
 
-  bitmask = regs->getValue(rs1);
-  aux = aux & ~bitmask;
-  regs->setCSR(csr, aux);
+  aux2 = aux & ~bitmask;
+  regs->setCSR(csr, aux2);
 
   log->SC_log(Log::INFO) << "CSRRC: CSR #"
-          << csr << " -> x" << rd
-          << ". x" << rs1 << " & CSR #" << csr << endl;
+          << csr << "(0x" << hex << aux << ") -> x" << dec << rd
+          << ". x" << rs1 << " & CSR #" << csr
+          << " <- 0x" << hex << aux2 << endl;
 }
 
 void Execute::CSRRWI(Instruction &inst) {
diff --git a/src/Registers.cpp b/src/Registers.cpp
index c5821c1..9a17355 100644
--- a/src/Registers.cpp
+++ b/src/Registers.cpp
@@ -6,6 +6,7 @@ Registers::Registers() {
   memset(CSR, 0, sizeof(uint32_t)*4096);
   perf = Performance::getInstance();
 
+  initCSR();
   //register_bank[sp] = 1024-1;  // SP points to end of memory
   register_bank[sp] = Memory::SIZE-4;
   register_PC = 0x10000;       // default _start address
@@ -82,3 +83,17 @@ uint32_t Registers::getPC() {
 void Registers::setPC(uint32_t new_pc) {
   register_PC = new_pc;
 }
+
+uint32_t Registers::getCSR(int csr) {
+  return CSR[csr];
+}
+
+
+void Registers::setCSR(int csr, uint32_t value) {
+  CSR[csr] = value;
+}
+
+void Registers::initCSR() {
+  CSR[0x301] = WARL_MXL | WARL_M_EXTENSION | WARL_C_EXTENSION | WARL_I_BASE;
+
+}