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risc-v-tlm
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removed SP init, moved to CPU module

This commit is contained in:
mariusmonton 2019-01-22 18:30:09 +01:00
parent d6f774eaea
commit 4c89c48fb0
1 changed files with 2 additions and 1 deletions
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3
src/Registers.cpp
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@ -9,7 +9,8 @@ Registers::Registers() {
initCSR(); initCSR();
//register_bank[sp] = 1024-1; // SP points to end of memory //register_bank[sp] = 1024-1; // SP points to end of memory
//register_bank[sp] = 0x70000000; //register_bank[sp] = 0x70000000;
register_bank[sp] = (0x10000000 / 4) - 1; //register_bank[sp] = (0x10000000 / 4) - 1;
//cout << "Memory size: 0x" << hex << Memory::SIZE << endl; //cout << "Memory size: 0x" << hex << Memory::SIZE << endl;
//cout << "SP address: 0x" << hex << (0x10000000 / 4) - 1 << endl; //cout << "SP address: 0x" << hex << (0x10000000 / 4) - 1 << endl;