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risc-v-tlm
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better log for CSRRW instruction

This commit is contained in:
mariusmonton 2019-02-18 13:57:24 +01:00
parent 9d89f847a0
commit 5ad8ced434
1 changed files with 4 additions and 3 deletions
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7
src/Execute.cpp
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@ -912,9 +912,10 @@ bool Execute::CSRRW(Instruction &inst) {
aux = regs->getValue(rs1); aux = regs->getValue(rs1);
regs->setCSR(csr, aux); regs->setCSR(csr, aux);
log->SC_log(Log::INFO) << "CSRRW: CSR #" log->SC_log(Log::INFO) << hex << "CSRRW: CSR #"
<< csr << " -> x" << rd << csr << " -> x" << dec << rd
<< ". x" << rs1 << "-> CSR #" << csr << endl; << ". x" << rs1 << "-> CSR #" << hex << csr << " (0x"
<< aux << ")" << endl;
return true; return true;
} }