better explanation

This commit is contained in:
mariusmonton 2018-11-14 19:19:05 +01:00
parent aa2a47b571
commit 5b8862b251
1 changed files with 2 additions and 0 deletions

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@ -17,6 +17,8 @@ Brief description of the modules:
* Memory: Memory highly based on TLM-2 example with read file capability * Memory: Memory highly based on TLM-2 example with read file capability
* Registers: Implements the register file, PC register & CSR registers * Registers: Implements the register file, PC register & CSR registers
* Execute: Executes ISA instructions * Execute: Executes ISA instructions
* Executes C instruction extensions
* Executes M instruction extensions
* Instruction: Decodes instruction and acces to any instruction field * Instruction: Decodes instruction and acces to any instruction field
* C_Instruction: Decodes Compressed instructions (C extension) * C_Instruction: Decodes Compressed instructions (C extension)
* M_INstruction: Decodes Multiplication and Division instructions (M extension) * M_INstruction: Decodes Multiplication and Division instructions (M extension)