From 5b91897244a240818711a769af77504b200675c1 Mon Sep 17 00:00:00 2001 From: mariusmonton Date: Sun, 21 Jun 2020 00:22:51 +0200 Subject: [PATCH] added likely, unlikely attributes to switch case, could boost perfomance --- src/A_extension.cpp | 4 ++-- src/BASE_ISA.cpp | 2 +- src/BusCtrl.cpp | 2 +- src/CPU.cpp | 6 +++--- src/C_extension.cpp | 10 +++++----- src/M_extension.cpp | 4 ++-- 6 files changed, 14 insertions(+), 14 deletions(-) diff --git a/src/A_extension.cpp b/src/A_extension.cpp index d1ebc95..595da0b 100644 --- a/src/A_extension.cpp +++ b/src/A_extension.cpp @@ -44,7 +44,7 @@ op_A_Codes A_extension::decode() { case A_AMOMAXU: return OP_A_AMOMAXU; break; - default: + [[unlikely]] default: return OP_A_ERROR; break; @@ -405,7 +405,7 @@ bool A_extension::process_instruction(Instruction &inst) { case OP_A_AMOMAXU: Exec_A_AMOMAXU(); break; - default: + [[unlikely]] default: std::cout << "A instruction not implemented yet" << std::endl; inst.dump(); NOP(); diff --git a/src/BASE_ISA.cpp b/src/BASE_ISA.cpp index 650b457..7678899 100644 --- a/src/BASE_ISA.cpp +++ b/src/BASE_ISA.cpp @@ -1316,7 +1316,7 @@ bool BASE_ISA::process_instruction(Instruction &inst) { case OP_SFENCE: Exec_SFENCE(); break; - default: + [[unlikely]] default: std::cout << "Wrong instruction" << std::endl; inst.dump(); NOP(); diff --git a/src/BusCtrl.cpp b/src/BusCtrl.cpp index cc5c6ef..52fa20a 100644 --- a/src/BusCtrl.cpp +++ b/src/BusCtrl.cpp @@ -37,7 +37,7 @@ void BusCtrl::b_transport(tlm::tlm_generic_payload &trans, case TRACE_MEMORY_ADDRESS / 4: trace_socket->b_transport(trans, delay); break; - default: + [[likely]] default: memory_socket->b_transport(trans, delay); break; } diff --git a/src/CPU.cpp b/src/CPU.cpp index 7587ca4..90f6ace 100644 --- a/src/CPU.cpp +++ b/src/CPU.cpp @@ -162,7 +162,7 @@ void CPU::CPU_thread(void) { /* check what type of instruction is and execute it */ switch (inst->check_extension()) { - case BASE_EXTENSION: + [[likely]] case BASE_EXTENSION: PC_not_affected = exec->process_instruction(*inst); incPCby2 = false; break; @@ -178,7 +178,7 @@ void CPU::CPU_thread(void) { PC_not_affected = a_inst->process_instruction(*inst); incPCby2 = false; break; - default: + [[unlikely]] default: std::cout << "Extension not implemented yet" << std::endl; inst->dump(); exec->NOP(); @@ -193,7 +193,7 @@ void CPU::CPU_thread(void) { /* Process IRQ (if any) */ cpu_process_IRQ(); - /* Fixed instruction time to 10 ns (i.e. 100 MHz)*/ + /* Fixed instruction time to 10 ns (i.e. 100 MHz) */ //#define USE_QK #ifdef USE_QK // Model time used for additional processing diff --git a/src/C_extension.cpp b/src/C_extension.cpp index e550177..1c8f32b 100644 --- a/src/C_extension.cpp +++ b/src/C_extension.cpp @@ -33,7 +33,7 @@ op_C_Codes C_extension::decode() { case C_FSW: return OP_C_FSW; break; - default: + [[unlikely]] default: return OP_C_ERROR; break; } @@ -90,7 +90,7 @@ op_C_Codes C_extension::decode() { case C_BNEZ: return OP_C_BNEZ; break; - default: + [[unlikely]] default: return OP_C_ERROR; break; } @@ -131,13 +131,13 @@ op_C_Codes C_extension::decode() { return OP_C_SWSP; break; case C_FWWSP: - default: + [[unlikely]] default: return OP_C_ERROR; break; } break; - default: + [[unlikely]] default: return OP_C_ERROR; break; @@ -745,7 +745,7 @@ bool C_extension::process_instruction(Instruction &inst) { case OP_C_AND: Exec_C_AND(); break; - default: + [[unlikely]] default: std::cout << "C instruction not implemented yet" << std::endl; inst.dump(); NOP(); diff --git a/src/M_extension.cpp b/src/M_extension.cpp index ef59fd6..5cda739 100644 --- a/src/M_extension.cpp +++ b/src/M_extension.cpp @@ -35,7 +35,7 @@ op_M_Codes M_extension::decode() { case M_REMU: return OP_M_REMU; break; - default: + [[unlikely]] default: return OP_M_ERROR; break; } @@ -275,7 +275,7 @@ bool M_extension::process_instruction(Instruction &inst) { case OP_M_REMU: Exec_M_REMU(); break; - default: + [[unlikely]] default: std::cout << "M instruction not implemented yet" << std::endl; inst.dump(); //NOP(inst);