From 6b21b1bfee95618b9a77660eed39c6a2a61327cf Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?M=C3=A0rius=20Mont=C3=B3n?= <marius.monton@gmail.com>
Date: Mon, 19 Sep 2022 14:43:44 +0200
Subject: [PATCH] Remove #include from headers and move to cpp file.

---
 inc/BASE_ISA.h   | 12 ++----------
 inc/CPU.h        | 11 ++++-------
 src/BASE_ISA.cpp | 17 ++++++++++-------
 3 files changed, 16 insertions(+), 24 deletions(-)

diff --git a/inc/BASE_ISA.h b/inc/BASE_ISA.h
index a246175..660fd5b 100644
--- a/inc/BASE_ISA.h
+++ b/inc/BASE_ISA.h
@@ -12,18 +12,10 @@
 #define SC_INCLUDE_DYNAMIC_PROCESSES
 #include <type_traits>
 #include <limits>
-
 #include "systemc"
-#include "tlm.h"
-#include "tlm_utils/simple_initiator_socket.h"
 
-#include "memory.h"
-#include "MemoryInterface.h"
-#include "Instruction.h"
-#include "C_extension.h"
-#include "M_extension.h"
-#include "A_extension.h"
-#include "Registers.h"
+#include "BASE_ISA.h"
+#include "extension_base.h"
 
 namespace riscv_tlm {
 
diff --git a/inc/CPU.h b/inc/CPU.h
index 794419f..bf3b66c 100644
--- a/inc/CPU.h
+++ b/inc/CPU.h
@@ -12,20 +12,17 @@
 #define SC_INCLUDE_DYNAMIC_PROCESSES
 
 #include "systemc"
-
 #include "tlm.h"
 #include "tlm_utils/simple_initiator_socket.h"
-#include "tlm_utils/tlm_quantumkeeper.h"
+#include "tlm_utils/simple_target_socket.h"
 
-#include "memory.h"
-#include "MemoryInterface.h"
 #include "BASE_ISA.h"
-#include "Registers.h"
-#include "Instruction.h"
 #include "C_extension.h"
 #include "M_extension.h"
 #include "A_extension.h"
-
+#include "MemoryInterface.h"
+#include "Performance.h"
+#include "Registers.h"
 
 namespace riscv_tlm {
 
diff --git a/src/BASE_ISA.cpp b/src/BASE_ISA.cpp
index 873a2a1..e5d4d95 100644
--- a/src/BASE_ISA.cpp
+++ b/src/BASE_ISA.cpp
@@ -7,6 +7,16 @@
 // SPDX-License-Identifier: GPL-3.0-or-later
 
 #include "BASE_ISA.h"
+#include "tlm.h"
+#include "tlm_utils/simple_initiator_socket.h"
+
+#include "memory.h"
+#include "MemoryInterface.h"
+#include "Instruction.h"
+#include "C_extension.h"
+#include "M_extension.h"
+#include "A_extension.h"
+#include "Registers.h"
 
 namespace riscv_tlm {
 
@@ -55,7 +65,6 @@ namespace riscv_tlm {
         return static_cast<std::int32_t>(aux);
     }
 
-
     template<>
     std::int32_t BASE_ISA<std::uint32_t>::get_imm_J() const {
         std::uint32_t aux = 0;
@@ -294,7 +303,6 @@ namespace riscv_tlm {
         return this->m_instr.range(31, 26);
     }
 
-    // PASS
     template<>
     bool BASE_ISA<std::uint64_t>::Exec_SLLI() {
         unsigned int rd, rs1, rs2;
@@ -326,7 +334,6 @@ namespace riscv_tlm {
         return true;
     }
 
-    // PASS
     template<>
     bool BASE_ISA<std::uint64_t>::Exec_SRLI() const {
         unsigned int rd, rs1, rs2;
@@ -350,7 +357,6 @@ namespace riscv_tlm {
         return true;
     }
 
-    // PASS
     template<>
     bool BASE_ISA<std::uint64_t>::Exec_SRAI() const {
         unsigned int rd, rs1, rs2;
@@ -374,7 +380,6 @@ namespace riscv_tlm {
         return true;
     }
 
-    // PASS
     template<>
     bool BASE_ISA<std::uint64_t>::Exec_SRL() const {
         unsigned int rd, rs1, rs2;
@@ -398,7 +403,6 @@ namespace riscv_tlm {
         return true;
     }
 
-    // PASS
     template<>
     bool BASE_ISA<std::uint64_t>::Exec_SRA() const {
         unsigned int rd, rs1, rs2;
@@ -421,7 +425,6 @@ namespace riscv_tlm {
         return true;
     }
 
-    // PASS
     template<>
     bool BASE_ISA<std::uint64_t>::Exec_SLL() const {
         unsigned int rd, rs1, rs2;